diff --git a/patch/kernel/sunxi-next/add-realtek-8189fs-driver.patch b/patch/kernel/sunxi-next/add-realtek-8189fs-driver.patch index 0ed67b608f..69cc5bf869 100644 --- a/patch/kernel/sunxi-next/add-realtek-8189fs-driver.patch +++ b/patch/kernel/sunxi-next/add-realtek-8189fs-driver.patch @@ -24,21 +24,21 @@ index 9c78deb5e..36898a86c 100644 diff --git a/drivers/net/wireless/realtek/rtl8189fs/Kconfig b/drivers/net/wireless/realtek/rtl8189fs/Kconfig new file mode 100644 -index 000000000..ca442c613 +index 0000000..0684b59 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/Kconfig @@ -0,0 +1,5 @@ +config RTL8189FS -+ tristate "Realtek 8189FS SDIO WiFi" ++ tristate "Realtek 8189F SDIO WiFi" + depends on USB + ---help--- + Help message of RTL8189FS diff --git a/drivers/net/wireless/realtek/rtl8189fs/Makefile b/drivers/net/wireless/realtek/rtl8189fs/Makefile new file mode 100644 -index 000000000..dd9c36da2 +index 0000000..04181ee --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/Makefile -@@ -0,0 +1,1736 @@ +@@ -0,0 +1,1733 @@ +EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) +EXTRA_CFLAGS += -O1 +#EXTRA_CFLAGS += -O3 @@ -53,13 +53,16 @@ index 000000000..dd9c36da2 +EXTRA_CFLAGS += -Wno-unused-label +EXTRA_CFLAGS += -Wno-unused-parameter +EXTRA_CFLAGS += -Wno-unused-function -+EXTRA_CFLAGS += -Wno-unused -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -Wno-unused +#EXTRA_CFLAGS += -Wno-uninitialized +#EXTRA_CFLAGS += -Wno-error=date-time # Fix compile error on gcc 4.9 and later + +EXTRA_CFLAGS += -I$(src)/include +EXTRA_CFLAGS += -I$(src)/hal/phydm + ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++ +EXTRA_LDFLAGS += --strip-debug + +CONFIG_AUTOCFG_CP = n @@ -1382,23 +1385,20 @@ index 000000000..dd9c36da2 +EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS +ifeq ($(CONFIG_USB_HCI), y) +EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o ++_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o +endif +ifeq ($(CONFIG_SDIO_HCI), y) +# default setting for A10-EVB mmc0 +#EXTRA_CFLAGS += -DCONFIG_WITS_EVB_V13 -+#_PLATFORM_FILES += platform/platform_ARM_SUNxI_sdio.o ++_PLATFORM_FILES += platform/platform_ARM_SUNxI_sdio.o +endif + +ARCH := arm +#CROSS_COMPILE := arm-none-linux-gnueabi- -+#CROSS_COMPILE=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/buildroot/output/external-toolchain/bin/arm-none-linux-gnueabi- -+CROSS_COMPILE= -+#KVER := 3.0.8 ++CROSS_COMPILE=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/buildroot/output/external-toolchain/bin/arm-none-linux-gnueabi- ++KVER := 3.0.8 +#KSRC:= ../lichee/linux-3.0/ -+#KSRC=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/linux-3.0 -+KVER := $(shell uname -r) -+KSRC=/usr/src/linux ++KSRC=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/linux-3.0 +endif + +ifeq ($(CONFIG_PLATFORM_ARM_SUN6I), y) @@ -1473,10 +1473,10 @@ index 000000000..dd9c36da2 +EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS +ifeq ($(CONFIG_USB_HCI), y) +EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o ++_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o +endif +ifeq ($(CONFIG_SDIO_HCI), y) -+#_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o ++_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o +endif + +ARCH := arm @@ -1484,11 +1484,8 @@ index 000000000..dd9c36da2 +#CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-jb42/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- +#KSRC :=/home/android_sdk/Allwinner/a23/android-jb42/lichee/linux-3.4 +# ===Cross compile setting for Android 4.4 SDK === -+#CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-kk44/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -+#KSRC :=/home/android_sdk/Allwinner/a23/android-kk44/lichee/linux-3.4 -+KVER := $(shell uname -r) -+KSRC := /lib/modules/$(KVER)/build -+MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ ++CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-kk44/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- ++KSRC :=/home/android_sdk/Allwinner/a23/android-kk44/lichee/linux-3.4 +endif + +ifeq ($(CONFIG_PLATFORM_ARM_SUN8I_W5P1), y) @@ -1777,7 +1774,7 @@ index 000000000..dd9c36da2 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/clean b/drivers/net/wireless/realtek/rtl8189fs/clean new file mode 100644 -index 000000000..87664218b +index 0000000..8766421 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/clean @@ -0,0 +1,5 @@ @@ -1788,7 +1785,7 @@ index 000000000..87664218b +rmmod 8192de diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/efuse/rtw_efuse.c b/drivers/net/wireless/realtek/rtl8189fs/core/efuse/rtw_efuse.c new file mode 100644 -index 000000000..ace255f38 +index 0000000..ace255f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/efuse/rtw_efuse.c @@ -0,0 +1,1721 @@ @@ -3515,5478 +3512,5478 @@ index 000000000..ace255f38 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ap.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ap.c new file mode 100644 -index 000000000..c042d540d +index 0000000..abc0fab --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ap.c @@ -0,0 +1,4215 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#define _RTW_AP_C_ -+ -+#include -+ -+ -+#ifdef CONFIG_AP_MODE -+ -+extern unsigned char RTW_WPA_OUI[]; -+extern unsigned char WMM_OUI[]; -+extern unsigned char WPS_OUI[]; -+extern unsigned char P2P_OUI[]; -+extern unsigned char WFD_OUI[]; -+ -+void init_mlme_ap_info(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; -+ -+ -+ _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); -+ -+ //for ACL -+ _rtw_init_queue(&pacl_list->acl_node_q); -+ -+ //pmlmeext->bstart_bss = _FALSE; -+ -+ start_ap_mode(padapter); -+} -+ -+void free_mlme_ap_info(_adapter *padapter) -+{ -+ _irqL irqL; -+ struct sta_info *psta=NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ //stop_ap_mode(padapter); -+ -+ pmlmepriv->update_bcn = _FALSE; -+ pmlmeext->bstart_bss = _FALSE; -+ -+ rtw_sta_flush(padapter, _TRUE); -+ -+ pmlmeinfo->state = _HW_STATE_NOLINK_; -+ -+ //free_assoc_sta_resources -+ rtw_free_all_stainfo(padapter); -+ -+ //free bc/mc sta_info -+ psta = rtw_get_bcmc_stainfo(padapter); -+ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ rtw_free_stainfo(padapter, psta); -+ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ -+ -+ _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); -+ -+} -+ -+static void update_BCNTIM(_adapter *padapter) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); -+ unsigned char *pie = pnetwork_mlmeext->IEs; -+ -+/* -+ //DBG_871X("%s\n", __FUNCTION__); -+ -+ //update TIM IE -+ //if(pstapriv->tim_bitmap) -+*/ -+ if (_TRUE) { -+ u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL; -+ u16 tim_bitmap_le; -+ uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; -+ -+ tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); -+ -+ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); -+ if (p != NULL && tim_ielen > 0) { -+ tim_ielen += 2; -+ -+ premainder_ie = p + tim_ielen; -+ -+ tim_ie_offset = (sint)(p -pie); -+ -+ remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; -+ -+ /*append TIM IE from dst_ie offset*/ -+ dst_ie = p; -+ } else { -+ tim_ielen = 0; -+ -+ /*calculate head_len*/ -+ offset = _FIXED_IE_LENGTH_; -+ -+ /* get ssid_ie len */ -+ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); -+ if (p != NULL) -+ offset += tmp_len+2; -+ -+ /*get supported rates len*/ -+ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); -+ if (p != NULL) -+ { -+ offset += tmp_len+2; -+ } -+ -+ /*DS Parameter Set IE, len=3*/ -+ offset += 3; -+ -+ premainder_ie = pie + offset; -+ -+ remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; -+ -+ /*append TIM IE from offset*/ -+ dst_ie = pie + offset; -+ -+ } -+ -+ if (remainder_ielen > 0) { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if(pbackup_remainder_ie && premainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ *dst_ie++=_TIM_IE_; -+ -+ if ((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fe)) -+ tim_ielen = 5; -+ else -+ tim_ielen = 4; -+ -+ *dst_ie++ = tim_ielen; -+ -+ *dst_ie++ = 0;/*DTIM count*/ -+ *dst_ie++ = 1;/*DTIM period*/ -+ -+ if (pstapriv->tim_bitmap & BIT(0))/*for bc/mc frames*/ -+ *dst_ie++ = BIT(0);/*bitmap ctrl */ -+ else -+ *dst_ie++ = 0; -+ -+ if (tim_ielen == 4) { -+ u8 pvb = 0; -+ -+ if (pstapriv->tim_bitmap & 0x00fe) -+ pvb = (u8)tim_bitmap_le; -+ else if (pstapriv->tim_bitmap & 0xff00) -+ pvb = (u8)(tim_bitmap_le >> 8); -+ else -+ pvb = (u8)tim_bitmap_le; -+ -+ *dst_ie++ = pvb; -+ -+ } else if (tim_ielen == 5) { -+ _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); -+ dst_ie += 2; -+ } -+ -+ /*copy remainder IE*/ -+ if (pbackup_remainder_ie) { -+ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ } -+ -+ offset = (uint)(dst_ie - pie); -+ pnetwork_mlmeext->IELength = offset + remainder_ielen; -+ -+ } -+} -+ -+void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) -+{ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 bmatch = _FALSE; -+ u8 *pie = pnetwork->IEs; -+ u8 *p=NULL, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; -+ u32 i, offset, ielen, ie_offset, remainder_ielen = 0; -+ -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) -+ { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); -+ -+ if (pIE->ElementID > index) -+ { -+ break; -+ } -+ else if(pIE->ElementID == index) // already exist the same IE -+ { -+ p = (u8 *)pIE; -+ ielen = pIE->Length; -+ bmatch = _TRUE; -+ break; -+ } -+ -+ p = (u8 *)pIE; -+ ielen = pIE->Length; -+ i += (pIE->Length + 2); -+ } -+ -+ if (p != NULL && ielen>0) -+ { -+ ielen += 2; -+ -+ premainder_ie = p+ielen; -+ -+ ie_offset = (sint)(p -pie); -+ -+ remainder_ielen = pnetwork->IELength - ie_offset - ielen; -+ -+ if(bmatch) -+ dst_ie = p; -+ else -+ dst_ie = (p+ielen); -+ } -+ -+ if(dst_ie == NULL) -+ return; -+ -+ if(remainder_ielen>0) -+ { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if(pbackup_remainder_ie && premainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ *dst_ie++=index; -+ *dst_ie++=len; -+ -+ _rtw_memcpy(dst_ie, data, len); -+ dst_ie+=len; -+ -+ //copy remainder IE -+ if(pbackup_remainder_ie) -+ { -+ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ } -+ -+ offset = (uint)(dst_ie - pie); -+ pnetwork->IELength = offset + remainder_ielen; -+} -+ -+void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) -+{ -+ u8 *p, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; -+ uint offset, ielen, ie_offset, remainder_ielen = 0; -+ u8 *pie = pnetwork->IEs; -+ -+ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); -+ if (p != NULL && ielen>0) -+ { -+ ielen += 2; -+ -+ premainder_ie = p+ielen; -+ -+ ie_offset = (sint)(p -pie); -+ -+ remainder_ielen = pnetwork->IELength - ie_offset - ielen; -+ -+ dst_ie = p; -+ } -+ else { -+ return; -+ } -+ -+ if(remainder_ielen>0) -+ { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if(pbackup_remainder_ie && premainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ //copy remainder IE -+ if(pbackup_remainder_ie) -+ { -+ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ } -+ -+ offset = (uint)(dst_ie - pie); -+ pnetwork->IELength = offset + remainder_ielen; -+} -+ -+ -+u8 chk_sta_is_alive(struct sta_info *psta); -+u8 chk_sta_is_alive(struct sta_info *psta) -+{ -+ u8 ret = _FALSE; -+ #ifdef DBG_EXPIRATION_CHK -+ DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" -+ , MAC_ARG(psta->hwaddr) -+ , psta->rssi_stat.UndecoratedSmoothedPWDB -+ //, STA_RX_PKTS_ARG(psta) -+ , STA_RX_PKTS_DIFF_ARG(psta) -+ , psta->expire_to -+ , psta->state&WIFI_SLEEP_STATE?"PS, ":"" -+ , psta->state&WIFI_STA_ALIVE_CHK_STATE?"SAC, ":"" -+ , psta->sleepq_len -+ ); -+ #endif -+ -+ //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) -+ if((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) -+ { -+ #if 0 -+ if(psta->state&WIFI_SLEEP_STATE) -+ ret = _TRUE; -+ #endif -+ } -+ else -+ { -+ ret = _TRUE; -+ } -+ -+ sta_update_last_rx_pkts(psta); -+ -+ return ret; -+} -+ -+void expire_timeout_chk(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 updated = _FALSE; -+ struct sta_info *psta=NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 chk_alive_num = 0; -+ char chk_alive_list[NUM_STA]; -+ int i; -+ -+ -+ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ -+ phead = &pstapriv->auth_list; -+ plist = get_next(phead); -+ -+ //check auth_queue -+ #ifdef DBG_EXPIRATION_CHK -+ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ DBG_871X(FUNC_NDEV_FMT" auth_list, cnt:%u\n" -+ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); -+ } -+ #endif -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); -+ -+ plist = get_next(plist); -+ -+ -+#ifdef CONFIG_ATMEL_RC_PATCH -+ if (_TRUE == _rtw_memcmp((void *)(pstapriv->atmel_rc_pattern), (void *)(psta->hwaddr), ETH_ALEN)) -+ continue; -+ if (psta->flag_atmel_rc) -+ continue; -+#endif -+ if(psta->expire_to>0) -+ { -+ psta->expire_to--; -+ if (psta->expire_to == 0) -+ { -+ rtw_list_delete(&psta->auth_list); -+ pstapriv->auth_list_cnt--; -+ -+ DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", -+ psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); -+ -+ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ -+ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ rtw_free_stainfo(padapter, psta); -+ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ -+ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ } -+ } -+ -+ } -+ -+ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ psta = NULL; -+ -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ //check asoc_queue -+ #ifdef DBG_EXPIRATION_CHK -+ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ DBG_871X(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" -+ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); -+ } -+ #endif -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+#ifdef CONFIG_ATMEL_RC_PATCH -+ DBG_871X("%s:%d psta=%p, %02x,%02x||%02x,%02x \n\n", __func__, __LINE__, -+ psta,pstapriv->atmel_rc_pattern[0], pstapriv->atmel_rc_pattern[5], psta->hwaddr[0], psta->hwaddr[5]); -+ if (_TRUE == _rtw_memcmp((void *)pstapriv->atmel_rc_pattern, (void *)(psta->hwaddr), ETH_ALEN)) -+ continue; -+ if (psta->flag_atmel_rc) -+ continue; -+ DBG_871X("%s: debug line:%d \n", __func__, __LINE__); -+#endif -+#ifdef CONFIG_AUTO_AP_MODE -+ if(psta->isrc) -+ continue; -+#endif -+ if (chk_sta_is_alive(psta) || !psta->expire_to) { -+ psta->expire_to = pstapriv->expire_to; -+ psta->keep_alive_trycnt = 0; -+ #ifdef CONFIG_TX_MCAST2UNI -+ psta->under_exist_checking = 0; -+ #endif // CONFIG_TX_MCAST2UNI -+ } else { -+ psta->expire_to--; -+ } -+ -+#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+#ifdef CONFIG_80211N_HT -+#ifdef CONFIG_TX_MCAST2UNI -+ if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { -+ // check sta by delba(addba) for 11n STA -+ // ToDo: use CCX report to check for all STAs -+ //DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); -+ -+ if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { -+ DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); -+ psta->under_exist_checking = 0; -+ psta->expire_to = 0; -+ } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { -+ DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); -+ psta->under_exist_checking = 1; -+ //tear down TX AMPDU -+ send_delba(padapter, 1, psta->hwaddr);// // originator -+ psta->htpriv.agg_enable_bitmap = 0x0;//reset -+ psta->htpriv.candidate_tid_bitmap = 0x0;//reset -+ } -+ } -+#endif //CONFIG_TX_MCAST2UNI -+#endif //CONFIG_80211N_HT -+#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ -+ if (psta->expire_to <= 0) -+ { -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ if (padapter->registrypriv.wifi_spec == 1) -+ { -+ psta->expire_to = pstapriv->expire_to; -+ continue; -+ } -+ -+#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+#ifdef CONFIG_80211N_HT -+ -+#define KEEP_ALIVE_TRYCNT (3) -+ -+ if(psta->keep_alive_trycnt > 0 && psta->keep_alive_trycnt <= KEEP_ALIVE_TRYCNT) -+ { -+ if(psta->state & WIFI_STA_ALIVE_CHK_STATE) -+ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; -+ else -+ psta->keep_alive_trycnt = 0; -+ -+ } -+ else if((psta->keep_alive_trycnt > KEEP_ALIVE_TRYCNT) && !(psta->state & WIFI_STA_ALIVE_CHK_STATE)) -+ { -+ psta->keep_alive_trycnt = 0; -+ } -+ if((psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE)) -+ { -+ uint priority = 1; //test using BK -+ u8 issued=0; -+ -+ //issued = (psta->htpriv.agg_enable_bitmap>>priority)&0x1; -+ issued |= (psta->htpriv.candidate_tid_bitmap>>priority)&0x1; -+ -+ if(0==issued) -+ { -+ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) -+ { -+ psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); -+ -+ if (psta->state & WIFI_SLEEP_STATE) -+ psta->expire_to = 2; // 2x2=4 sec -+ else -+ psta->expire_to = 1; // 2 sec -+ -+ psta->state |= WIFI_STA_ALIVE_CHK_STATE; -+ -+ //add_ba_hdl(padapter, (u8*)paddbareq_parm); -+ -+ DBG_871X("issue addba_req to check if sta alive, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); -+ -+ issue_addba_req(padapter, psta->hwaddr, (u8)priority); -+ -+ _set_timer(&psta->addba_retry_timer, ADDBA_TO); -+ -+ psta->keep_alive_trycnt++; -+ -+ continue; -+ } -+ } -+ } -+ if(psta->keep_alive_trycnt > 0 && psta->state & WIFI_STA_ALIVE_CHK_STATE) -+ { -+ psta->keep_alive_trycnt = 0; -+ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; -+ DBG_871X("change to another methods to check alive if staion is at ps mode\n"); -+ } -+ -+#endif //CONFIG_80211N_HT -+#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ if (psta->state & WIFI_SLEEP_STATE) { -+ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { -+ //to check if alive by another methods if staion is at ps mode. -+ psta->expire_to = pstapriv->expire_to; -+ psta->state |= WIFI_STA_ALIVE_CHK_STATE; -+ -+ //DBG_871X("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->hwaddr)); -+ -+ //to update bcn with tim_bitmap for this station -+ pstapriv->tim_bitmap |= BIT(psta->aid); -+ update_beacon(padapter, _TIM_IE_, NULL, _TRUE); -+ -+ if(!pmlmeext->active_keep_alive_check) -+ continue; -+ } -+ } -+ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ if (pmlmeext->active_keep_alive_check) { -+ int stainfo_offset; -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) { -+ chk_alive_list[chk_alive_num++] = stainfo_offset; -+ } -+ -+ continue; -+ } -+ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); -+ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); -+ } -+ else -+ { -+ /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ -+ if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) -+ && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME/pstapriv->asoc_list_cnt)/2) -+ ){ -+ DBG_871X("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ -+ , MAC_ARG(psta->hwaddr) -+ , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); -+ wakeup_sta_to_xmit(padapter, psta); -+ } -+ } -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+if (chk_alive_num) { -+ -+ u8 backup_oper_channel=0; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ /* switch to correct channel of current network before issue keep-alive frames */ -+ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { -+ backup_oper_channel = rtw_get_oper_ch(padapter); -+ SelectChannel(padapter, pmlmeext->cur_channel); -+ } -+ -+ /* issue null data to check sta alive*/ -+ for (i = 0; i < chk_alive_num; i++) { -+ int ret = _FAIL; -+ -+ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); -+#ifdef CONFIG_ATMEL_RC_PATCH -+ if (_TRUE == _rtw_memcmp( pstapriv->atmel_rc_pattern, psta->hwaddr, ETH_ALEN)) -+ continue; -+ if (psta->flag_atmel_rc) -+ continue; -+#endif -+ if(!(psta->state &_FW_LINKED)) -+ continue; -+ -+ if (psta->state & WIFI_SLEEP_STATE) -+ ret = issue_nulldata(padapter, psta->hwaddr, 0, 1, 50); -+ else -+ ret = issue_nulldata(padapter, psta->hwaddr, 0, 3, 50); -+ -+ psta->keep_alive_trycnt++; -+ if (ret == _SUCCESS) -+ { -+ DBG_871X("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr)); -+ psta->expire_to = pstapriv->expire_to; -+ psta->keep_alive_trycnt = 0; -+ continue; -+ } -+ else if (psta->keep_alive_trycnt <= 3) -+ { -+ DBG_871X("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); -+ psta->expire_to = 1; -+ continue; -+ } -+ -+ psta->keep_alive_trycnt = 0; -+ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list)==_FALSE) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ } -+ -+ if (backup_oper_channel>0) /* back to the original operation channel */ -+ SelectChannel(padapter, backup_oper_channel); -+} -+#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+} -+ -+void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level) -+{ -+ int i; -+ u8 rf_type; -+ unsigned char sta_band = 0, shortGIrate = _FALSE; -+ u64 tx_ra_bitmap = 0; -+ struct ht_priv *psta_ht = NULL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ -+#ifdef CONFIG_80211N_HT -+ if(psta) -+ psta_ht = &psta->htpriv; -+ else -+ return; -+#endif //CONFIG_80211N_HT -+ -+ if(!(psta->state & _FW_LINKED)) -+ return; -+ -+#if 0//gtest -+ if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) -+ { -+ //is this a 2r STA? -+ if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) -+ { -+ priv->pshare->has_2r_sta |= BIT(pstat->aid); -+ if(rtw_read16(padapter, 0x102501f6) != 0xffff) -+ { -+ rtw_write16(padapter, 0x102501f6, 0xffff); -+ reset_1r_sta_RA(priv, 0xffff); -+ Switch_1SS_Antenna(priv, 3); -+ } -+ } -+ else// bg or 1R STA? -+ { -+ if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) -+ { -+ if(rtw_read16(padapter, 0x102501f6) != 0x7777) -+ { // MCS7 SGI -+ rtw_write16(padapter, 0x102501f6,0x7777); -+ reset_1r_sta_RA(priv, 0x7777); -+ Switch_1SS_Antenna(priv, 2); -+ } -+ } -+ } -+ -+ } -+ -+ if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) -+ { -+ if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) -+ pstat->rssi_level = 1; -+ else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || -+ ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && -+ (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && -+ (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) -+ pstat->rssi_level = 2; -+ else -+ pstat->rssi_level = 3; -+ } -+ -+ // rate adaptive by rssi -+ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) -+ { -+ if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) -+ { -+ switch (pstat->rssi_level) { -+ case 1: -+ pstat->tx_ra_bitmap &= 0x100f0000; -+ break; -+ case 2: -+ pstat->tx_ra_bitmap &= 0x100ff000; -+ break; -+ case 3: -+ if (priv->pshare->is_40m_bw) -+ pstat->tx_ra_bitmap &= 0x100ff005; -+ else -+ pstat->tx_ra_bitmap &= 0x100ff001; -+ -+ break; -+ } -+ } -+ else -+ { -+ switch (pstat->rssi_level) { -+ case 1: -+ pstat->tx_ra_bitmap &= 0x1f0f0000; -+ break; -+ case 2: -+ pstat->tx_ra_bitmap &= 0x1f0ff000; -+ break; -+ case 3: -+ if (priv->pshare->is_40m_bw) -+ pstat->tx_ra_bitmap &= 0x000ff005; -+ else -+ pstat->tx_ra_bitmap &= 0x000ff001; -+ -+ break; -+ } -+ -+ // Don't need to mask high rates due to new rate adaptive parameters -+ //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta -+ // pstat->tx_ra_bitmap &= 0x81ffffff; -+ -+ // NIC driver will report not supporting MCS15 and MCS14 in asoc req -+ //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) -+ // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 -+ } -+ } -+ else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) -+ { -+ switch (pstat->rssi_level) { -+ case 1: -+ pstat->tx_ra_bitmap &= 0x00000f00; -+ break; -+ case 2: -+ pstat->tx_ra_bitmap &= 0x00000ff0; -+ break; -+ case 3: -+ pstat->tx_ra_bitmap &= 0x00000ff5; -+ break; -+ } -+ } -+ else -+ { -+ pstat->tx_ra_bitmap &= 0x0000000d; -+ } -+ -+ // disable tx short GI when station cannot rx MCS15(AP is 2T2R) -+ // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) -+ // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate -+ if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || -+ (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) -+ { -+ pstat->tx_ra_bitmap &= ~BIT(28); -+ } -+#endif -+ -+ rtw_hal_update_sta_rate_mask(padapter, psta); -+ tx_ra_bitmap = psta->ra_mask; -+ -+ shortGIrate = query_ra_short_GI(psta); -+ -+ if ( pcur_network->Configuration.DSConfig > 14 ) { -+ -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_5N ; -+ -+ if (tx_ra_bitmap & 0xff0) -+ sta_band |= WIRELESS_11A; -+ -+ // 5G band -+ #ifdef CONFIG_80211AC_VHT -+ if (psta->vhtpriv.vht_option) { -+ sta_band = WIRELESS_11_5AC; -+ } -+ #endif -+ -+ } else { -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_24N; -+ -+ if (tx_ra_bitmap & 0xff0) -+ sta_band |= WIRELESS_11G; -+ -+ if (tx_ra_bitmap & 0x0f) -+ sta_band |= WIRELESS_11B; -+ } -+ -+ psta->wireless_mode = sta_band; -+ psta->raid = rtw_hal_networktype_to_raid(padapter, psta); -+ -+ if (psta->aid < NUM_STA) -+ { -+ u8 arg[4] = {0}; -+ -+ arg[0] = psta->mac_id; -+ arg[1] = psta->raid; -+ arg[2] = shortGIrate; -+ arg[3] = psta->init_rate; -+ -+ DBG_871X("%s=> mac_id:%d , raid:%d , shortGIrate=%d, tx_ra_bitmap:0x%016llx, networkType:0x%02x\n", -+ __FUNCTION__, psta->mac_id, psta->raid, shortGIrate, tx_ra_bitmap, psta->wireless_mode); -+ -+ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, rssi_level); -+ } -+ else -+ { -+ DBG_871X("station aid %d exceed the max number\n", psta->aid); -+ } -+ -+} -+ -+void update_bmc_sta(_adapter *padapter) -+{ -+ _irqL irqL; -+ unsigned char network_type; -+ int supportRateNum = 0; -+ u64 tx_ra_bitmap = 0; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); -+ -+ if(psta) -+ { -+ psta->aid = 0;//default set to 0 -+ psta->qos_option = 0; -+#ifdef CONFIG_80211N_HT -+ psta->htpriv.ht_option = _FALSE; -+#endif //CONFIG_80211N_HT -+ -+ psta->ieee8021x_blocked = 0; -+ -+ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); -+ -+ //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. -+ -+ //prepare for add_RATid -+ supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); -+ network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, pcur_network->Configuration.DSConfig); -+ if (IsSupportedTxCCK(network_type)) { -+ network_type = WIRELESS_11B; -+ } -+ else if (network_type == WIRELESS_INVALID) { // error handling -+ if ( pcur_network->Configuration.DSConfig > 14 ) -+ network_type = WIRELESS_11A; -+ else -+ network_type = WIRELESS_11B; -+ } -+ update_sta_basic_rate(psta, network_type); -+ psta->wireless_mode = network_type; -+ -+ rtw_hal_update_sta_rate_mask(padapter, psta); -+ tx_ra_bitmap = psta->ra_mask; -+ -+ psta->raid = rtw_hal_networktype_to_raid(padapter,psta); -+ -+ //ap mode -+ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); -+ -+ //if(pHalData->fw_ractrl == _TRUE) -+ { -+ u8 arg[4] = {0}; -+ -+ arg[0] = psta->mac_id; -+ arg[1] = psta->raid; -+ arg[2] = 0; -+ arg[3] = psta->init_rate; -+ -+ DBG_871X("%s=> mac_id:%d , raid:%d , bitmap=0x%016llx\n", -+ __FUNCTION__ , psta->mac_id, psta->raid , tx_ra_bitmap); -+ -+ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, 0); -+ } -+ -+ rtw_sta_media_status_rpt(padapter, psta, 1); -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ psta->state = _FW_LINKED; -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ } -+ else -+ { -+ DBG_871X("add_RATid_bmc_sta error!\n"); -+ } -+ -+} -+ -+//notes: -+//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode -+//MAC_ID = AID+1 for sta in ap/adhoc mode -+//MAC_ID = 1 for bc/mc for sta/ap/adhoc -+//MAC_ID = 0 for bssid for sta/ap/adhoc -+//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; -+ -+void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#ifdef CONFIG_80211N_HT -+ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; -+ struct ht_priv *phtpriv_sta = &psta->htpriv; -+#endif //CONFIG_80211N_HT -+ u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0; -+ //set intf_tag to if1 -+ //psta->intf_tag = 0; -+ -+ DBG_871X("%s\n",__FUNCTION__); -+ -+ //psta->mac_id = psta->aid+4; -+ //psta->mac_id = psta->aid+1;//alloc macid when call rtw_alloc_stainfo(), -+ //release macid when call rtw_free_stainfo() -+ -+ //ap mode -+ rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,psta,_TRUE); -+ -+ if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) -+ psta->ieee8021x_blocked = _TRUE; -+ else -+ psta->ieee8021x_blocked = _FALSE; -+ -+ -+ //update sta's cap -+ -+ //ERP -+ VCS_update(padapter, psta); -+#ifdef CONFIG_80211N_HT -+ //HT related cap -+ if(phtpriv_sta->ht_option) -+ { -+ //check if sta supports rx ampdu -+ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; -+ -+ phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; -+ -+ // bwmode -+ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) -+ { -+ psta->bw_mode = CHANNEL_WIDTH_40; -+ } -+ else -+ { -+ psta->bw_mode = CHANNEL_WIDTH_20; -+ } -+ -+ if (psta->ht_40mhz_intolerant) -+ psta->bw_mode = CHANNEL_WIDTH_20; -+ -+ if(pmlmeext->cur_bwmode < psta->bw_mode) -+ { -+ psta->bw_mode = pmlmeext->cur_bwmode; -+ } -+ -+ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; -+ -+ -+ //check if sta support s Short GI 20M -+ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) -+ { -+ phtpriv_sta->sgi_20m = _TRUE; -+ } -+ -+ //check if sta support s Short GI 40M -+ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) -+ { -+ if(psta->bw_mode == CHANNEL_WIDTH_40) //according to psta->bw_mode -+ phtpriv_sta->sgi_40m = _TRUE; -+ else -+ phtpriv_sta->sgi_40m = _FALSE; -+ } -+ -+ psta->qos_option = _TRUE; -+ -+ // B0 Config LDPC Coding Capability -+ if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) && -+ GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap))) -+ { -+ SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); -+ DBG_871X("Enable HT Tx LDPC for STA(%d)\n",psta->aid); -+ } -+ -+ // B7 B8 B9 Config STBC setting -+ if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) && -+ GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap))) -+ { -+ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) ); -+ DBG_871X("Enable HT Tx STBC for STA(%d)\n",psta->aid); -+ } -+ -+#ifdef CONFIG_BEAMFORMING -+ /*Config Tx beamforming setting*/ -+ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP((u8 *)(&phtpriv_sta->ht_cap))) -+ { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); -+ /*Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 6); -+ } -+ -+ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP((u8 *)(&phtpriv_sta->ht_cap))) -+ { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); -+ /*Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 4); -+ } -+ if (cur_beamform_cap) { -+ DBG_871X("Client STA(%d) HT Beamforming Cap = 0x%02X\n", psta->aid, cur_beamform_cap); -+ } -+#endif /*CONFIG_BEAMFORMING*/ -+ } -+ else -+ { -+ phtpriv_sta->ampdu_enable = _FALSE; -+ -+ phtpriv_sta->sgi_20m = _FALSE; -+ phtpriv_sta->sgi_40m = _FALSE; -+ psta->bw_mode = CHANNEL_WIDTH_20; -+ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ phtpriv_sta->ldpc_cap = cur_ldpc_cap; -+ phtpriv_sta->stbc_cap = cur_stbc_cap; -+ phtpriv_sta->beamform_cap = cur_beamform_cap; -+ -+ //Rx AMPDU -+ send_delba(padapter, 0, psta->hwaddr);// recipient -+ -+ //TX AMPDU -+ send_delba(padapter, 1, psta->hwaddr);// // originator -+ phtpriv_sta->agg_enable_bitmap = 0x0;//reset -+ phtpriv_sta->candidate_tid_bitmap = 0x0;//reset -+#endif //CONFIG_80211N_HT -+ -+#ifdef CONFIG_80211AC_VHT -+ update_sta_vht_info_apmode(padapter, psta); -+#endif -+ -+ update_ldpc_stbc_cap(psta); -+ -+ //todo: init other variables -+ -+ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); -+ -+ -+ //add ratid -+ //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() -+ -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ psta->state |= _FW_LINKED; -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ -+} -+ -+static void update_ap_info(_adapter *padapter, struct sta_info *psta) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#ifdef CONFIG_80211N_HT -+ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; -+#endif //CONFIG_80211N_HT -+ -+ psta->wireless_mode = pmlmeext->cur_wireless_mode; -+ -+ psta->bssratelen = rtw_get_rateset_len(pnetwork->SupportedRates); -+ _rtw_memcpy(psta->bssrateset, pnetwork->SupportedRates, psta->bssratelen); -+ -+#ifdef CONFIG_80211N_HT -+ //HT related cap -+ if(phtpriv_ap->ht_option) -+ { -+ //check if sta supports rx ampdu -+ //phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; -+ -+ //check if sta support s Short GI 20M -+ if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) -+ { -+ phtpriv_ap->sgi_20m = _TRUE; -+ } -+ //check if sta support s Short GI 40M -+ if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) -+ { -+ phtpriv_ap->sgi_40m = _TRUE; -+ } -+ -+ psta->qos_option = _TRUE; -+ } -+ else -+ { -+ phtpriv_ap->ampdu_enable = _FALSE; -+ -+ phtpriv_ap->sgi_20m = _FALSE; -+ phtpriv_ap->sgi_40m = _FALSE; -+ } -+ -+ psta->bw_mode = pmlmeext->cur_bwmode; -+ phtpriv_ap->ch_offset = pmlmeext->cur_ch_offset; -+ -+ phtpriv_ap->agg_enable_bitmap = 0x0;//reset -+ phtpriv_ap->candidate_tid_bitmap = 0x0;//reset -+ -+ _rtw_memcpy(&psta->htpriv, &pmlmepriv->htpriv, sizeof(struct ht_priv)); -+ -+#ifdef CONFIG_80211AC_VHT -+ _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); -+#endif //CONFIG_80211AC_VHT -+ -+#endif //CONFIG_80211N_HT -+ -+ psta->state |= WIFI_AP_STATE; /* Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 */ -+} -+ -+static void rtw_set_hw_wmm_param(_adapter *padapter) -+{ -+ u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; -+ u8 acm_mask; -+ u16 TXOP; -+ u32 acParm, i; -+ u32 edca[4], inx[4]; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ acm_mask = 0; -+ -+ if (IsSupported5G(pmlmeext->cur_wireless_mode) || -+ (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ -+ if (pmlmeinfo->WMM_enable == 0) { -+ padapter->mlmepriv.acm_mask = 0; -+ -+ AIFS = aSifsTime + (2 * pmlmeinfo->slotTime); -+ -+ if (pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11A)) { -+ ECWMin = 4; -+ ECWMax = 10; -+ } else if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { -+ ECWMin = 5; -+ ECWMax = 10; -+ } else { -+ ECWMin = 4; -+ ECWMax = 10; -+ } -+ -+ TXOP = 0; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); -+ -+ ECWMin = 2; -+ ECWMax = 3; -+ TXOP = 0x2f; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); -+ -+ } else { -+ edca[0] = edca[1] = edca[2] = edca[3] = 0; -+ -+ /*TODO:*/ -+ acm_mask = 0; -+ padapter->mlmepriv.acm_mask = acm_mask; -+ -+ /* -+ //BK -+ //AIFS = AIFSN * slot time + SIFS - r2t phy delay -+ */ -+ AIFS = (7 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 4; -+ ECWMax = 10; -+ TXOP = 0; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); -+ edca[XMIT_BK_QUEUE] = acParm; -+ DBG_871X("WMM(BK): %x\n", acParm); -+ -+ /* BE */ -+ AIFS = (3 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 4; -+ ECWMax = 6; -+ TXOP = 0; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); -+ edca[XMIT_BE_QUEUE] = acParm; -+ DBG_871X("WMM(BE): %x\n", acParm); -+ -+ /* VI */ -+ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 3; -+ ECWMax = 4; -+ TXOP = 94; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); -+ edca[XMIT_VI_QUEUE] = acParm; -+ DBG_871X("WMM(VI): %x\n", acParm); -+ -+ /* VO */ -+ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 2; -+ ECWMax = 3; -+ TXOP = 47; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); -+ edca[XMIT_VO_QUEUE] = acParm; -+ DBG_871X("WMM(VO): %x\n", acParm); -+ -+ -+ if (padapter->registrypriv.acm_method == 1) -+ rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); -+ else -+ padapter->mlmepriv.acm_mask = acm_mask; -+ -+ inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; -+ -+ if (pregpriv->wifi_spec == 1) { -+ u32 j, tmp, change_inx = _FALSE; -+ -+ /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ -+ for (i = 0 ; i < 4 ; i++) { -+ for (j = i+1 ; j < 4 ; j++) { -+ /* compare CW and AIFS */ -+ if ((edca[j] & 0xFFFF) < (edca[i] & 0xFFFF)) { -+ change_inx = _TRUE; -+ } else if ((edca[j] & 0xFFFF) == (edca[i] & 0xFFFF)) { -+ /* compare TXOP */ -+ if ((edca[j] >> 16) > (edca[i] >> 16)) -+ change_inx = _TRUE; -+ } -+ -+ if (change_inx) { -+ tmp = edca[i]; -+ edca[i] = edca[j]; -+ edca[j] = tmp; -+ -+ tmp = inx[i]; -+ inx[i] = inx[j]; -+ inx[j] = tmp; -+ -+ change_inx = _FALSE; -+ } -+ } -+ } -+ } -+ -+ for (i = 0 ; i < 4 ; i++) { -+ pxmitpriv->wmm_para_seq[i] = inx[i]; -+ DBG_871X("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]); -+ } -+ -+ } -+ -+} -+ -+static void update_hw_ht_param(_adapter *padapter) -+{ -+ unsigned char max_AMPDU_len; -+ unsigned char min_MPDU_spacing; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+ -+ //handle A-MPDU parameter field -+ /* -+ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k -+ AMPDU_para [4:2]:Min MPDU Start Spacing -+ */ -+ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; -+ -+ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); -+ -+ // -+ // Config SM Power Save setting -+ // -+ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; -+ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) -+ { -+ /*u8 i; -+ //update the MCS rates -+ for (i = 0; i < 16; i++) -+ { -+ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; -+ }*/ -+ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); -+ } -+ -+ // -+ // Config current HT Protection mode. -+ // -+ //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; -+ -+} -+ -+static void rtw_ap_check_scan(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ u32 delta_time, lifetime; -+ struct wlan_network *pnetwork = NULL; -+ WLAN_BSSID_EX *pbss = NULL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ u8 do_scan = _FALSE; -+ -+ lifetime = SCANQUEUE_LIFETIME; /* 20 sec */ -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ phead = get_list_head(queue); -+ if (rtw_end_of_queue_search(phead, get_next(phead)) == _TRUE) -+ if (padapter->registrypriv.wifi_spec) -+ do_scan = _TRUE; -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+#ifdef CONFIG_AUTO_CHNL_SEL_NHM -+ if (padapter->registrypriv.acs_auto_scan) { -+ do_scan = _TRUE; -+ rtw_acs_start(padapter, _TRUE); -+ } -+#endif -+ -+ if (_TRUE == do_scan) { -+ DBG_871X("%s : drv scans by itself and wait_completed\n", __func__); -+ rtw_drv_scan_by_self(padapter); -+ rtw_scan_wait_completed(padapter); -+ } -+ -+#ifdef CONFIG_AUTO_CHNL_SEL_NHM -+ if (padapter->registrypriv.acs_auto_scan) -+ rtw_acs_start(padapter, _FALSE); -+#endif -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 -+ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE -+ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))) { -+ delta_time = (u32) rtw_get_passing_time_ms(pnetwork->last_scanned); -+ -+ if (delta_time < lifetime) { -+ -+ uint ie_len = 0; -+ u8 *pbuf = NULL; -+ u8 *ie = NULL; -+ -+ pbss = &pnetwork->network; -+ ie = pbss->IEs; -+ -+ /*check if HT CAP INFO IE exists or not*/ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf == NULL) { -+ /* HT CAP INFO IE don't exist, it is b/g mode bss.*/ -+ -+ if (pmlmepriv->olbc == _FALSE) -+ pmlmepriv->olbc = _TRUE; -+ -+ if (pmlmepriv->olbc_ht == _FALSE) -+ pmlmepriv->olbc_ht = _TRUE; -+ } -+ } -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ pmlmepriv->num_sta_no_ht = 0; /* reset to 0 after ap do scanning*/ -+ -+} -+ -+void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter) -+{ -+ WLAN_BSSID_EX *pnetwork = &(adapter->mlmepriv.cur_network.network); -+ struct sta_info *sta = NULL; -+ -+ /* update cur_wireless_mode */ -+ update_wireless_mode(adapter); -+ -+ /* update RRSR and RTS_INIT_RATE register after set channel and bandwidth */ -+ UpdateBrateTbl(adapter, pnetwork->SupportedRates); -+ rtw_hal_set_hwreg(adapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); -+ -+ /* update capability after cur_wireless_mode updated */ -+ update_capinfo(adapter, rtw_get_capability(pnetwork)); -+ -+ /* update bc/mc sta_info */ -+ update_bmc_sta(adapter); -+ -+ /* update AP's sta info */ -+ sta = rtw_get_stainfo(&adapter->stapriv, pnetwork->MacAddress); -+ if (!sta) { -+ DBG_871X(FUNC_ADPT_FMT" !sta for macaddr="MAC_FMT"\n", FUNC_ADPT_ARG(adapter), MAC_ARG(pnetwork->MacAddress)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ update_ap_info(adapter, sta); -+} -+ -+void start_bss_network(_adapter *padapter, struct createbss_parm *parm) -+{ -+#define DUMP_ADAPTERS_STATUS 0 -+ -+ u8 val8; -+ u16 bcn_interval; -+ u32 acparm; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv* psecuritypriv=&(padapter->securitypriv); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; /* used as input */ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); -+ u8 req_ch, req_bw, req_offset; -+ bool ch_setting_changed = _FALSE; -+ u8 ch_to_set = 0, bw_to_set, offset_to_set; -+ u8 doiqk = _FALSE; -+ -+ if (parm->req_ch == 0) { -+ /* change to unspecificed ch, bw, offset, get from IE */ -+ goto get_cbhw_from_ie; -+ } else if (parm->req_ch > 0) { -+ /* change ch, bw, offset */ -+ req_ch = parm->req_ch; -+ req_bw = parm->req_bw; -+ req_offset = parm->req_offset; -+ goto change_chbw; -+ } -+ -+ bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; -+ -+ //check if there is wps ie, -+ //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, -+ //and at first time the security ie ( RSN/WPA IE) will not include in beacon. -+ if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) -+ { -+ pmlmeext->bstart_bss = _TRUE; -+ } -+ -+ //todo: update wmm, ht cap -+ //pmlmeinfo->WMM_enable; -+ //pmlmeinfo->HT_enable; -+ if(pmlmepriv->qospriv.qos_option) -+ pmlmeinfo->WMM_enable = _TRUE; -+#ifdef CONFIG_80211N_HT -+ if(pmlmepriv->htpriv.ht_option) -+ { -+ pmlmeinfo->WMM_enable = _TRUE; -+ pmlmeinfo->HT_enable = _TRUE; -+ //pmlmeinfo->HT_info_enable = _TRUE; -+ //pmlmeinfo->HT_caps_enable = _TRUE; -+ -+ update_hw_ht_param(padapter); -+ } -+#endif //#CONFIG_80211N_HT -+ -+#ifdef CONFIG_80211AC_VHT -+ if(pmlmepriv->vhtpriv.vht_option) { -+ pmlmeinfo->VHT_enable = _TRUE; -+ update_hw_vht_param(padapter); -+ } -+#endif //CONFIG_80211AC_VHT -+ -+ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time -+ { -+ //WEP Key will be set before this function, do not clear CAM. -+ if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) -+ flush_all_cam_entry(padapter); //clear CAM -+ } -+ -+ //set MSR to AP_Mode -+ Set_MSR(padapter, _HW_STATE_AP_); -+ -+ //Set BSSID REG -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); -+ -+ //Set EDCA param reg -+#ifdef CONFIG_CONCURRENT_MODE -+ acparm = 0x005ea42b; -+#else -+ acparm = 0x002F3217; // VO -+#endif -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); -+ acparm = 0x005E4317; // VI -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); -+ //acparm = 0x00105320; // BE -+ acparm = 0x005ea42b; -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); -+ acparm = 0x0000A444; // BK -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); -+ -+ //Set Security -+ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); -+ -+ //Beacon Control related register -+ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); -+ -+#if 0 -+ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time -+ { -+ //u32 initialgain; -+ -+ //initialgain = 0x1e; -+ -+ -+ //disable dynamic functions, such as high power, DIG -+ /*rtw_phydm_ability_backup(padapter);*/ -+ /*rtw_phydm_func_disable_all(padapter);*/ -+ -+ //turn on all dynamic functions -+ /* Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE);*/ -+ -+ /*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/ -+ -+ } -+#endif -+ -+get_cbhw_from_ie: -+ rtw_ies_get_chbw(pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs) -+ , pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs) -+ , &req_ch, &req_bw, &req_offset); -+ -+change_chbw: -+ rtw_warn_on(req_ch == 0); -+ -+ ch_setting_changed = rtw_ap_chbw_decision(padapter, req_ch, req_bw, req_offset -+ , &ch_to_set, &bw_to_set, &offset_to_set); -+ -+ //let pnetwork_mlmeext == pnetwork_mlme. -+ _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); -+ -+ rtw_start_bss_hdl_after_chbw_decided(padapter); -+ -+ #if defined(CONFIG_DFS_MASTER) -+ rtw_dfs_master_status_apply(padapter, MLME_AP_STARTED); -+ #endif -+ -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ -+ if (ch_to_set != 0) -+ set_channel_bwmode(padapter, ch_to_set, offset_to_set, bw_to_set); -+ -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ if (DUMP_ADAPTERS_STATUS) { -+ DBG_871X(FUNC_ADPT_FMT" done\n", FUNC_ADPT_ARG(padapter)); -+ dump_adapters_status(RTW_DBGDUMP , adapter_to_dvobj(padapter)); -+ } -+ -+ if (_TRUE == pmlmeext->bstart_bss -+ && !check_fwstate(pmlmepriv, WIFI_SITE_MONITOR) -+ && !check_fwstate(pmlmepriv, WIFI_OP_CH_SWITCHING) -+ #ifdef CONFIG_CONCURRENT_MODE -+ && !check_buddy_fwstate(padapter, WIFI_SITE_MONITOR) -+ #endif -+ ) { -+ -+ if ((pmlmepriv->olbc == _TRUE) || (pmlmepriv->olbc_ht == _TRUE)) { -+ -+ /* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */ -+ -+ pmlmepriv->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK); -+ pmlmepriv->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS; -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); -+ } -+ -+ update_beacon(padapter, _TIM_IE_, NULL, _TRUE); -+ -+ #if !defined(CONFIG_INTERRUPT_BASED_TXBCN) -+ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ /* other case will tx beacon when bcn interrupt coming in. */ -+ if (send_beacon(padapter) == _FAIL) -+ DBG_871X("issue_beacon, fail!\n"); -+ #endif -+ #endif /* !defined(CONFIG_INTERRUPT_BASED_TXBCN) */ -+ } -+ -+ /*Set EDCA param reg after update cur_wireless_mode & update_capinfo*/ -+ if (pregpriv->wifi_spec == 1) -+ rtw_set_hw_wmm_param(padapter); -+ -+ /*pmlmeext->bstart_bss = _TRUE;*/ -+} -+ -+int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) -+{ -+ int ret=_SUCCESS; -+ u8 *p; -+ u8 *pHT_caps_ie=NULL; -+ u8 *pHT_info_ie=NULL; -+ u16 cap, ht_cap=_FALSE; -+ uint ie_len = 0; -+ int group_cipher, pairwise_cipher; -+ u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; -+ int supportRateNum = 0; -+ u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; -+ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; -+ u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ie = pbss_network->IEs; -+ u8 vht_cap=_FALSE; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 rf_num = 0; -+ -+ /* SSID */ -+ /* Supported rates */ -+ /* DS Params */ -+ /* WLAN_EID_COUNTRY */ -+ /* ERP Information element */ -+ /* Extended supported rates */ -+ /* WPA/WPA2 */ -+ /* Wi-Fi Wireless Multimedia Extensions */ -+ /* ht_capab, ht_oper */ -+ /* WPS IE */ -+ -+ DBG_871X("%s, len=%d\n", __FUNCTION__, len); -+ -+ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return _FAIL; -+ -+ -+ if(len>MAX_IE_SZ) -+ return _FAIL; -+ -+ pbss_network->IELength = len; -+ -+ _rtw_memset(ie, 0, MAX_IE_SZ); -+ -+ _rtw_memcpy(ie, pbuf, pbss_network->IELength); -+ -+ -+ if(pbss_network->InfrastructureMode!=Ndis802_11APMode) -+ return _FAIL; -+ -+ -+ rtw_ap_check_scan(padapter); -+ -+ -+ pbss_network->Rssi = 0; -+ -+ _rtw_memcpy(pbss_network->MacAddress, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ //beacon interval -+ p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability -+ //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); -+ pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); -+ -+ //capability -+ //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); -+ //cap = le16_to_cpu(cap); -+ cap = RTW_GET_LE16(ie); -+ -+ //SSID -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); -+ if(p && ie_len>0) -+ { -+ _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); -+ _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); -+ pbss_network->Ssid.SsidLength = ie_len; -+ #ifdef CONFIG_P2P -+ _rtw_memcpy(padapter->wdinfo.p2p_group_ssid, pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); -+ padapter->wdinfo.p2p_group_ssid_len = pbss_network->Ssid.SsidLength; -+ #endif -+ } -+ -+ //chnnel -+ channel = 0; -+ pbss_network->Configuration.Length = 0; -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if(p && ie_len>0) -+ channel = *(p + 2); -+ -+ pbss_network->Configuration.DSConfig = channel; -+ -+ -+ _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); -+ // get supported rates -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p != NULL) -+ { -+ _rtw_memcpy(supportRate, p+2, ie_len); -+ supportRateNum = ie_len; -+ } -+ -+ //get ext_supported rates -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); -+ if (p != NULL) -+ { -+ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); -+ supportRateNum += ie_len; -+ -+ } -+ -+ network_type = rtw_check_network_type(supportRate, supportRateNum, channel); -+ -+ rtw_set_supported_rate(pbss_network->SupportedRates, network_type); -+ -+ -+ //parsing ERP_IE -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if(p && ie_len>0) -+ { -+ ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); -+ } -+ -+ //update privacy/security -+ if (cap & BIT(4)) -+ pbss_network->Privacy = 1; -+ else -+ pbss_network->Privacy = 0; -+ -+ psecuritypriv->wpa_psk = 0; -+ -+ //wpa2 -+ group_cipher = 0; pairwise_cipher = 0; -+ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; -+ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if(p && ie_len>0) -+ { -+ if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) -+ { -+ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; -+ -+ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x -+ psecuritypriv->wpa_psk |= BIT(1); -+ -+ psecuritypriv->wpa2_group_cipher = group_cipher; -+ psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; -+#if 0 -+ switch(group_cipher) -+ { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa2_group_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa2_group_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa2_group_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa2_group_cipher = _WEP104_; -+ break; -+ } -+ -+ switch(pairwise_cipher) -+ { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa2_pairwise_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa2_pairwise_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa2_pairwise_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa2_pairwise_cipher = _WEP104_; -+ break; -+ } -+#endif -+ } -+ -+ } -+ -+ //wpa -+ ie_len = 0; -+ group_cipher = 0; pairwise_cipher = 0; -+ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; -+ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; -+ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) -+ { -+ p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); -+ if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) -+ { -+ if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) -+ { -+ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; -+ -+ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x -+ -+ psecuritypriv->wpa_psk |= BIT(0); -+ -+ psecuritypriv->wpa_group_cipher = group_cipher; -+ psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; -+ -+#if 0 -+ switch(group_cipher) -+ { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa_group_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa_group_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa_group_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa_group_cipher = _WEP104_; -+ break; -+ } -+ -+ switch(pairwise_cipher) -+ { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa_pairwise_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa_pairwise_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa_pairwise_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa_pairwise_cipher = _WEP104_; -+ break; -+ } -+#endif -+ } -+ -+ break; -+ -+ } -+ -+ if ((p == NULL) || (ie_len == 0)) -+ { -+ break; -+ } -+ -+ } -+ -+ //wmm -+ ie_len = 0; -+ pmlmepriv->qospriv.qos_option = 0; -+ if(pregistrypriv->wmm_enable) -+ { -+ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) -+ { -+ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); -+ if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) -+ { -+ pmlmepriv->qospriv.qos_option = 1; -+ -+ *(p+8) |= BIT(7);//QoS Info, support U-APSD -+ -+ /* disable all ACM bits since the WMM admission control is not supported */ -+ *(p + 10) &= ~BIT(4); /* BE */ -+ *(p + 14) &= ~BIT(4); /* BK */ -+ *(p + 18) &= ~BIT(4); /* VI */ -+ *(p + 22) &= ~BIT(4); /* VO */ -+ -+ break; -+ } -+ -+ if ((p == NULL) || (ie_len == 0)) -+ { -+ break; -+ } -+ } -+ } -+#ifdef CONFIG_80211N_HT -+ //parsing HT_CAP_IE -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if(p && ie_len>0) -+ { -+ u8 rf_type=0; -+ HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K; -+ struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); -+ -+ if (0) { -+ DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); -+ dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); -+ } -+ -+ pHT_caps_ie=p; -+ -+ ht_cap = _TRUE; -+ network_type |= WIRELESS_11_24N; -+ -+ rtw_ht_use_default_setting(padapter); -+ -+ /* Update HT Capabilities Info field */ -+ if (pmlmepriv->htpriv.sgi_20m == _FALSE) -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); -+ -+ if (pmlmepriv->htpriv.sgi_40m == _FALSE) -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); -+ -+ if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) -+ { -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); -+ } -+ -+ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) -+ { -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); -+ } -+ -+ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) -+ { -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); -+ } -+ -+ /* Update A-MPDU Parameters field */ -+ pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY); -+ -+ if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || -+ (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) -+ { -+ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); -+ } -+ else -+ { -+ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); -+ } -+ -+ rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); -+ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); //set Max Rx AMPDU size to 64K -+ -+ _rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element)); -+ -+ /* Update Supported MCS Set field */ -+ { -+ int i; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); -+ -+ /* RX MCS Bitmask */ -+ switch(rf_type) -+ { -+ case RF_1T1R: -+ case RF_1T2R: //? -+ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); -+ break; -+ case RF_2T2R: -+ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); -+ break; -+ case RF_3T3R: -+ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R); -+ break; -+ default: -+ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); -+ } -+ for (i = 0; i < 10; i++) -+ *(HT_CAP_ELE_RX_MCS_MAP(pht_cap)+i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; -+ } -+ -+#ifdef CONFIG_BEAMFORMING -+ // Use registry value to enable HT Beamforming. -+ // ToDo: use configure file to set these capability. -+ pht_cap->tx_BF_cap_info = 0; -+ -+ // HT Beamformer -+ if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) -+ { -+ // Transmit NDP Capable -+ SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); -+ // Explicit Compressed Steering Capable -+ SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); -+ // Compressed Steering Number Antennas -+ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); -+ SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num); -+ } -+ -+ // HT Beamformee -+ if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) -+ { -+ // Receive NDP Capable -+ SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); -+ // Explicit Compressed Beamforming Feedback Capable -+ SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); -+ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num); -+ } -+#endif //CONFIG_BEAMFORMING -+ -+ _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); -+ -+ if (0) { -+ DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); -+ dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); -+ } -+ } -+ -+ //parsing HT_INFO_IE -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if(p && ie_len>0) -+ { -+ pHT_info_ie=p; -+ } -+#endif //CONFIG_80211N_HT -+ switch(network_type) -+ { -+ case WIRELESS_11B: -+ pbss_network->NetworkTypeInUse = Ndis802_11DS; -+ break; -+ case WIRELESS_11G: -+ case WIRELESS_11BG: -+ case WIRELESS_11G_24N: -+ case WIRELESS_11BG_24N: -+ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; -+ break; -+ case WIRELESS_11A: -+ pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; -+ break; -+ default : -+ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; -+ break; -+ } -+ -+ pmlmepriv->cur_network.network_type = network_type; -+ -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->htpriv.ht_option = _FALSE; -+ -+ if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || -+ (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) -+ { -+ //todo: -+ //ht_cap = _FALSE; -+ } -+ -+ //ht_cap -+ if(pregistrypriv->ht_enable && ht_cap==_TRUE) -+ { -+ pmlmepriv->htpriv.ht_option = _TRUE; -+ pmlmepriv->qospriv.qos_option = 1; -+ -+ if(pregistrypriv->ampdu_enable==1) -+ { -+ pmlmepriv->htpriv.ampdu_enable = _TRUE; -+ } -+ -+ HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); -+ -+ HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); -+ } -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ -+ //Parsing VHT CAP IE -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if(p && ie_len>0) -+ { -+ vht_cap = _TRUE; -+ } -+ //Parsing VHT OPERATION IE -+ -+ -+ pmlmepriv->vhtpriv.vht_option = _FALSE; -+ // if channel in 5G band, then add vht ie . -+ if ((pbss_network->Configuration.DSConfig > 14) -+ && (pmlmepriv->htpriv.ht_option == _TRUE) -+ && (pregistrypriv->vht_enable) -+ && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent)) -+ ) { -+ if(vht_cap == _TRUE) -+ { -+ pmlmepriv->vhtpriv.vht_option = _TRUE; -+ } -+ else if(pregistrypriv->vht_enable == 2) // auto enabled -+ { -+ u8 cap_len, operation_len; -+ -+ rtw_vht_use_default_setting(padapter); -+ -+ { -+ /* VHT Operation mode notifiy bit in Extended IE (127) */ -+ uint len = 0; -+ -+ SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(pmlmepriv->ext_capab_ie_data, 1); -+ pmlmepriv->ext_capab_ie_len = 10; -+ rtw_set_ie(pbss_network->IEs + pbss_network->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); -+ pbss_network->IELength += pmlmepriv->ext_capab_ie_len; -+ } -+ -+ // VHT Capabilities element -+ cap_len = rtw_build_vht_cap_ie(padapter, pbss_network->IEs + pbss_network->IELength); -+ pbss_network->IELength += cap_len; -+ -+ // VHT Operation element -+ operation_len = rtw_build_vht_operation_ie(padapter, pbss_network->IEs + pbss_network->IELength, pbss_network->Configuration.DSConfig); -+ pbss_network->IELength += operation_len; -+ -+ pmlmepriv->vhtpriv.vht_option = _TRUE; -+ } -+ } -+#endif //CONFIG_80211AC_VHT -+ -+ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); -+ -+ rtw_ies_get_chbw(pbss_network->IEs + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_ -+ , &pmlmepriv->ori_ch, &pmlmepriv->ori_bw, &pmlmepriv->ori_offset); -+ rtw_warn_on(pmlmepriv->ori_ch == 0); -+ -+{ -+ /* alloc sta_info for ap itself */ -+ -+ struct sta_info *sta; -+ -+ sta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); -+ if (!sta) { -+ sta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); -+ if (sta == NULL) -+ return _FAIL; -+ } -+} -+ -+ rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK); -+ -+ rtw_indicate_connect( padapter); -+ -+ pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon -+ -+ //update bc/mc sta_info -+ //update_bmc_sta(padapter); -+ -+ return ret; -+ -+} -+ -+void rtw_set_macaddr_acl(_adapter *padapter, int mode) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; -+ -+ DBG_871X("%s, mode=%d\n", __func__, mode); -+ -+ pacl_list->mode = mode; -+} -+ -+int rtw_acl_add_sta(_adapter *padapter, u8 *addr) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ u8 added = _FALSE; -+ int i, ret=0; -+ struct rtw_wlan_acl_node *paclnode; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; -+ _queue *pacl_node_q =&pacl_list->acl_node_q; -+ -+ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); -+ -+ if((NUM_ACL-1) < pacl_list->num) -+ return (-1); -+ -+ -+ _enter_critical_bh(&(pacl_node_q->lock), &irqL); -+ -+ phead = get_list_head(pacl_node_q); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); -+ plist = get_next(plist); -+ -+ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) -+ { -+ if(paclnode->valid == _TRUE) -+ { -+ added = _TRUE; -+ DBG_871X("%s, sta has been added\n", __func__); -+ break; -+ } -+ } -+ } -+ -+ _exit_critical_bh(&(pacl_node_q->lock), &irqL); -+ -+ -+ if(added == _TRUE) -+ return ret; -+ -+ -+ _enter_critical_bh(&(pacl_node_q->lock), &irqL); -+ -+ for(i=0; i< NUM_ACL; i++) -+ { -+ paclnode = &pacl_list->aclnode[i]; -+ -+ if(paclnode->valid == _FALSE) -+ { -+ _rtw_init_listhead(&paclnode->list); -+ -+ _rtw_memcpy(paclnode->addr, addr, ETH_ALEN); -+ -+ paclnode->valid = _TRUE; -+ -+ rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q)); -+ -+ pacl_list->num++; -+ -+ break; -+ } -+ } -+ -+ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); -+ -+ _exit_critical_bh(&(pacl_node_q->lock), &irqL); -+ -+ return ret; -+} -+ -+int rtw_acl_remove_sta(_adapter *padapter, u8 *addr) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ int i, ret=0; -+ struct rtw_wlan_acl_node *paclnode; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; -+ _queue *pacl_node_q =&pacl_list->acl_node_q; -+ u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; //Baddr is used for clearing acl_list -+ -+ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); -+ -+ _enter_critical_bh(&(pacl_node_q->lock), &irqL); -+ -+ phead = get_list_head(pacl_node_q); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); -+ plist = get_next(plist); -+ -+ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN) || _rtw_memcmp(baddr, addr, ETH_ALEN)) -+ { -+ if(paclnode->valid == _TRUE) -+ { -+ paclnode->valid = _FALSE; -+ -+ rtw_list_delete(&paclnode->list); -+ -+ pacl_list->num--; -+ } -+ } -+ } -+ -+ _exit_critical_bh(&(pacl_node_q->lock), &irqL); -+ -+ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); -+ -+ return ret; -+ -+} -+ -+u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta) -+{ -+ struct cmd_obj* ph2c; -+ struct set_stakey_parm *psetstakey_para; -+ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; -+ u8 res=_SUCCESS; -+ -+ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if ( ph2c == NULL){ -+ res= _FAIL; -+ goto exit; -+ } -+ -+ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); -+ if(psetstakey_para==NULL){ -+ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); -+ res=_FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); -+ -+ -+ psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; -+ -+ _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); -+ -+ _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); -+ -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ return res; -+ -+} -+ -+static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set_tx) -+{ -+ u8 keylen; -+ struct cmd_obj* pcmd; -+ struct setkey_parm *psetkeyparm; -+ struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); -+ int res=_SUCCESS; -+ -+ //DBG_871X("%s\n", __FUNCTION__); -+ -+ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if(pcmd==NULL){ -+ res= _FAIL; -+ goto exit; -+ } -+ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); -+ if(psetkeyparm==NULL){ -+ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); -+ res= _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); -+ -+ psetkeyparm->keyid=(u8)keyid; -+ if (is_wep_enc(alg)) -+ padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); -+ -+ psetkeyparm->algorithm = alg; -+ -+ psetkeyparm->set_tx = set_tx; -+ -+ switch(alg) -+ { -+ case _WEP40_: -+ keylen = 5; -+ break; -+ case _WEP104_: -+ keylen = 13; -+ break; -+ case _TKIP_: -+ case _TKIP_WTMIC_: -+ case _AES_: -+ default: -+ keylen = 16; -+ } -+ -+ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); -+ -+ pcmd->cmdcode = _SetKey_CMD_; -+ pcmd->parmbuf = (u8 *)psetkeyparm; -+ pcmd->cmdsz = (sizeof(struct setkey_parm)); -+ pcmd->rsp = NULL; -+ pcmd->rspsz = 0; -+ -+ -+ _rtw_init_listhead(&pcmd->list); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmd); -+ -+exit: -+ -+ return res; -+} -+ -+int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) -+{ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+ return rtw_ap_set_key(padapter, key, alg, keyid, 1); -+} -+ -+int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx) -+{ -+ u8 alg; -+ -+ switch(keylen) -+ { -+ case 5: -+ alg =_WEP40_; -+ break; -+ case 13: -+ alg =_WEP104_; -+ break; -+ default: -+ alg =_NO_PRIVACY_; -+ } -+ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+ return rtw_ap_set_key(padapter, key, alg, keyid, set_tx); -+} -+ -+u8 rtw_ap_bmc_frames_hdl(_adapter *padapter) -+{ -+#define HIQ_XMIT_COUNTS (6) -+ _irqL irqL; -+ struct sta_info *psta_bmc; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ bool update_tim = _FALSE; -+ -+ -+ if (padapter->registrypriv.wifi_spec != 1) -+ return H2C_SUCCESS; -+ -+ -+ psta_bmc = rtw_get_bcmc_stainfo(padapter); -+ if (!psta_bmc) -+ return H2C_SUCCESS; -+ -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ if ((pstapriv->tim_bitmap & BIT(0)) && (psta_bmc->sleepq_len > 0)) { -+ int tx_counts = 0; -+ -+ _update_beacon(padapter, _TIM_IE_, NULL, _FALSE, "update TIM with TIB=1"); -+ -+ DBG_871X("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len); -+ -+ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ psta_bmc->sleepq_len--; -+ tx_counts++; -+ -+ if (psta_bmc->sleepq_len > 0) -+ pxmitframe->attrib.mdata = 1; -+ else -+ pxmitframe->attrib.mdata = 0; -+ -+ if (tx_counts == HIQ_XMIT_COUNTS) -+ pxmitframe->attrib.mdata = 0; -+ -+ pxmitframe->attrib.triggered = 1; -+ -+ if (xmitframe_hiq_filter(pxmitframe) == _TRUE) -+ pxmitframe->attrib.qsel = QSLT_HIGH;/*HIQ*/ -+ -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ -+ if (tx_counts == HIQ_XMIT_COUNTS) -+ break; -+ -+ } -+ -+ } else { -+ if (psta_bmc->sleepq_len == 0) { -+ -+ /*DBG_871X("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len);*/ -+ -+ if (pstapriv->tim_bitmap & BIT(0)) -+ update_tim = _TRUE; -+ -+ pstapriv->tim_bitmap &= ~BIT(0); -+ pstapriv->sta_dz_bitmap &= ~BIT(0); -+ -+ if (update_tim == _TRUE) { -+ DBG_871X("clear TIB\n"); -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "bmc sleepq and HIQ empty"); -+ } -+ } -+ } -+ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+/* -+ //HIQ Check -+ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); -+ -+ while (_FALSE == empty && rtw_get_passing_time_ms(start) < 3000) -+ { -+ rtw_msleep_os(100); -+ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); -+ } -+ -+ -+ printk("check if hiq empty=%d\n", empty); -+*/ -+ -+ return H2C_SUCCESS; -+} -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ -+static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta, u32 sta_info_type) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ DBG_871X("%s: "MAC_FMT", updated_type=0x%x\n", __func__, MAC_ARG(psta->hwaddr), sta_info_type); -+ -+ if (sta_info_type & STA_INFO_UPDATE_BW) { -+ -+ if ((psta->flags & WLAN_STA_HT) && !psta->ht_20mhz_set) { -+ if (pmlmepriv->sw_to_20mhz) { -+ psta->bw_mode = CHANNEL_WIDTH_20; -+ /*psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;*/ -+ psta->htpriv.sgi_40m = _FALSE; -+ } else { -+ /*TODO: Switch back to 40MHZ?80MHZ*/ -+ } -+ } -+ } -+ -+/* -+ if (sta_info_type & STA_INFO_UPDATE_RATE) { -+ -+ } -+*/ -+ -+ if (sta_info_type & STA_INFO_UPDATE_PROTECTION_MODE) -+ VCS_update(padapter, psta); -+ -+/* -+ if (sta_info_type & STA_INFO_UPDATE_CAP) { -+ -+ } -+ -+ if (sta_info_type & STA_INFO_UPDATE_HT_CAP) { -+ -+ } -+ -+ if (sta_info_type & STA_INFO_UPDATE_VHT_CAP) { -+ -+ } -+*/ -+ -+} -+ -+static void update_bcn_ext_capab_ie(_adapter *padapter) -+{ -+ sint ie_len = 0; -+ unsigned char *pbuf; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ u8 *ie = pnetwork->IEs; -+ u8 null_extcap_data[8] = {0}; -+ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_CAP_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf && ie_len > 0) -+ rtw_remove_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_); -+ -+ if ((pmlmepriv->ext_capab_ie_len > 0) && -+ (_rtw_memcmp(pmlmepriv->ext_capab_ie_data, null_extcap_data, sizeof(null_extcap_data)) == _FALSE)) -+ rtw_add_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_, pmlmepriv->ext_capab_ie_data, pmlmepriv->ext_capab_ie_len); -+ -+} -+ -+static void update_bcn_fixed_ie(_adapter *padapter) -+{ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_erpinfo_ie(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ unsigned char *p, *ie = pnetwork->IEs; -+ u32 len = 0; -+ -+ DBG_871X("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); -+ -+ if(!pmlmeinfo->ERP_enable) -+ return; -+ -+ //parsing ERP_IE -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if(p && len>0) -+ { -+ PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; -+ -+ if (pmlmepriv->num_sta_non_erp == 1) -+ pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION; -+ else -+ pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION); -+ -+ if(pmlmepriv->num_sta_no_short_preamble > 0) -+ pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; -+ else -+ pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); -+ -+ ERP_IE_handler(padapter, pIE); -+ } -+ -+} -+ -+static void update_bcn_htcap_ie(_adapter *padapter) -+{ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_htinfo_ie(_adapter *padapter) -+{ -+ /* -+ u8 beacon_updated = _FALSE; -+ u32 sta_info_update_type = STA_INFO_UPDATE_NONE; -+ */ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ unsigned char *p, *ie = pnetwork->IEs; -+ u32 len = 0; -+ -+ if (pmlmepriv->htpriv.ht_option == _FALSE) -+ return; -+ -+ if (pmlmeinfo->HT_info_enable != 1) -+ return; -+ -+ -+ DBG_871X("%s current operation mode=0x%X\n", -+ __FUNCTION__, pmlmepriv->ht_op_mode); -+ -+ DBG_871X("num_sta_40mhz_intolerant(%d), 20mhz_width_req(%d), intolerant_ch_rpt(%d), olbc(%d)\n", -+ pmlmepriv->num_sta_40mhz_intolerant, pmlmepriv->ht_20mhz_width_req, pmlmepriv->ht_intolerant_ch_reported, pmlmepriv->olbc); -+ -+ /*parsing HT_INFO_IE, currently only update ht_op_mode - pht_info->infos[1] & pht_info->infos[2] for wifi logo test*/ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (p && len > 0) { -+ struct HT_info_element *pht_info = NULL; -+ -+ pht_info = (struct HT_info_element *)(p + 2); -+ -+ /* for STA Channel Width/Secondary Channel Offset*/ -+ if ((pmlmepriv->sw_to_20mhz == 0) && (pmlmeext->cur_channel <= 14)) { -+ if ((pmlmepriv->num_sta_40mhz_intolerant > 0) || (pmlmepriv->ht_20mhz_width_req == _TRUE) -+ || (pmlmepriv->ht_intolerant_ch_reported == _TRUE) || (pmlmepriv->olbc == _TRUE)) { -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, 0); -+ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 0); -+ -+ pmlmepriv->sw_to_20mhz = 1; -+ /* -+ sta_info_update_type |= STA_INFO_UPDATE_BW; -+ beacon_updated = _TRUE; -+ */ -+ -+ DBG_871X("%s:switching to 20Mhz\n", __FUNCTION__); -+ -+ /*TODO : cur_bwmode/cur_ch_offset switches to 20Mhz*/ -+ } -+ } else { -+ -+ if ((pmlmepriv->num_sta_40mhz_intolerant == 0) && (pmlmepriv->ht_20mhz_width_req == _FALSE) -+ && (pmlmepriv->ht_intolerant_ch_reported == _FALSE) && (pmlmepriv->olbc == _FALSE)) { -+ -+ if (pmlmeext->cur_bwmode >= CHANNEL_WIDTH_40) { -+ -+ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 1); -+ -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, -+ (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ? -+ HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE : HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW); -+ -+ pmlmepriv->sw_to_20mhz = 0; -+ /* -+ sta_info_update_type |= STA_INFO_UPDATE_BW; -+ beacon_updated = _TRUE; -+ */ -+ -+ DBG_871X("%s:switching back to 40Mhz\n", __FUNCTION__); -+ } -+ } -+ } -+ -+ /* to update ht_op_mode*/ -+ *(u16 *)(pht_info->infos + 1) = cpu_to_le16(pmlmepriv->ht_op_mode); -+ -+ } -+ -+ /*associated_clients_update(padapter, beacon_updated, sta_info_update_type);*/ -+ -+} -+ -+static void update_bcn_rsn_ie(_adapter *padapter) -+{ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_wpa_ie(_adapter *padapter) -+{ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_wmm_ie(_adapter *padapter) -+{ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_wps_ie(_adapter *padapter) -+{ -+ u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; -+ uint wps_ielen=0, wps_offset, remainder_ielen; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ unsigned char *ie = pnetwork->IEs; -+ u32 ielen = pnetwork->IELength; -+ -+ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+ pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); -+ -+ if(pwps_ie==NULL || wps_ielen==0) -+ return; -+ -+ pwps_ie_src = pmlmepriv->wps_beacon_ie; -+ if(pwps_ie_src == NULL) -+ return; -+ -+ wps_offset = (uint)(pwps_ie-ie); -+ -+ premainder_ie = pwps_ie + wps_ielen; -+ -+ remainder_ielen = ielen - wps_offset - wps_ielen; -+ -+ if(remainder_ielen>0) -+ { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if(pbackup_remainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ wps_ielen = (uint)pwps_ie_src[1];//to get ie data len -+ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) -+ { -+ _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); -+ pwps_ie += (wps_ielen+2); -+ -+ if(pbackup_remainder_ie) -+ _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ //update IELength -+ pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; -+ } -+ -+ if(pbackup_remainder_ie) -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ -+ // deal with the case without set_tx_beacon_cmd() in update_beacon() -+#if defined( CONFIG_INTERRUPT_BASED_TXBCN ) || defined( CONFIG_PCI_HCI ) -+ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) -+ { -+ u8 sr = 0; -+ rtw_get_wps_attr_content(pwps_ie_src, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); -+ -+ if( sr ) { -+ set_fwstate(pmlmepriv, WIFI_UNDER_WPS); -+ DBG_871X("%s, set WIFI_UNDER_WPS\n", __func__); -+ } -+ } -+#endif -+} -+ -+static void update_bcn_p2p_ie(_adapter *padapter) -+{ -+ -+} -+ -+static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) -+{ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+ if(_rtw_memcmp(RTW_WPA_OUI, oui, 4)) -+ { -+ update_bcn_wpa_ie(padapter); -+ } -+ else if(_rtw_memcmp(WMM_OUI, oui, 4)) -+ { -+ update_bcn_wmm_ie(padapter); -+ } -+ else if(_rtw_memcmp(WPS_OUI, oui, 4)) -+ { -+ update_bcn_wps_ie(padapter); -+ } -+ else if(_rtw_memcmp(P2P_OUI, oui, 4)) -+ { -+ update_bcn_p2p_ie(padapter); -+ } -+ else -+ { -+ DBG_871X("unknown OUI type!\n"); -+ } -+ -+ -+} -+ -+void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv; -+ struct mlme_ext_priv *pmlmeext; -+ //struct mlme_ext_info *pmlmeinfo; -+ -+ //DBG_871X("%s\n", __FUNCTION__); -+ -+ if(!padapter) -+ return; -+ -+ pmlmepriv = &(padapter->mlmepriv); -+ pmlmeext = &(padapter->mlmeextpriv); -+ //pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if(_FALSE == pmlmeext->bstart_bss) -+ return; -+ -+ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+ -+ switch(ie_id) -+ { -+ case 0xFF: -+ -+ update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability -+ -+ break; -+ -+ case _TIM_IE_: -+ -+ update_BCNTIM(padapter); -+ -+ break; -+ -+ case _ERPINFO_IE_: -+ -+ update_bcn_erpinfo_ie(padapter); -+ -+ break; -+ -+ case _HT_CAPABILITY_IE_: -+ -+ update_bcn_htcap_ie(padapter); -+ -+ break; -+ -+ case _RSN_IE_2_: -+ -+ update_bcn_rsn_ie(padapter); -+ -+ break; -+ -+ case _HT_ADD_INFO_IE_: -+ -+ update_bcn_htinfo_ie(padapter); -+ -+ break; -+ -+ case _EXT_CAP_IE_: -+ -+ update_bcn_ext_capab_ie(padapter); -+ -+ break; -+ -+ case _VENDOR_SPECIFIC_IE_: -+ -+ update_bcn_vendor_spec_ie(padapter, oui); -+ -+ break; -+ -+ default: -+ break; -+ } -+ -+ pmlmepriv->update_bcn = _TRUE; -+ -+ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+ -+#ifndef CONFIG_INTERRUPT_BASED_TXBCN -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ if(tx) -+ { -+ //send_beacon(padapter);//send_beacon must execute on TSR level -+ if (0) -+ DBG_871X(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag); -+ set_tx_beacon_cmd(padapter); -+ } -+#else -+ { -+ //PCI will issue beacon when BCN interrupt occurs. -+ } -+#endif -+#endif //!CONFIG_INTERRUPT_BASED_TXBCN -+ -+} -+ -+#ifdef CONFIG_80211N_HT -+ -+void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len) -+{ -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 beacon_updated = _FALSE; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ uint frame_body_len = frame_len - sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 category, action; -+ -+ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); -+ if (psta == NULL) -+ return; -+ -+ -+ category = frame_body[0]; -+ action = frame_body[1]; -+ -+ if (frame_body_len > 0) { -+ if ((frame_body[2] == EID_BSSCoexistence) && (frame_body[3] > 0)) { -+ u8 ie_data = frame_body[4]; -+ -+ if (ie_data & RTW_WLAN_20_40_BSS_COEX_40MHZ_INTOL) { -+ if (psta->ht_40mhz_intolerant == 0) { -+ psta->ht_40mhz_intolerant = 1; -+ pmlmepriv->num_sta_40mhz_intolerant++; -+ beacon_updated = _TRUE; -+ } -+ } else if (ie_data & RTW_WLAN_20_40_BSS_COEX_20MHZ_WIDTH_REQ) { -+ if (pmlmepriv->ht_20mhz_width_req == _FALSE) { -+ pmlmepriv->ht_20mhz_width_req = _TRUE; -+ beacon_updated = _TRUE; -+ } -+ } else -+ beacon_updated = _FALSE; -+ } -+ } -+ -+ if (frame_body_len > 8) { -+ /* if EID_BSSIntolerantChlReport ie exists */ -+ if ((frame_body[5] == EID_BSSIntolerantChlReport) && (frame_body[6] > 0)) { -+ /*todo:*/ -+ if (pmlmepriv->ht_intolerant_ch_reported == _FALSE) { -+ pmlmepriv->ht_intolerant_ch_reported = _TRUE; -+ beacon_updated = _TRUE; -+ } -+ } -+ } -+ -+ if (beacon_updated) { -+ -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); -+ -+ associated_stainfo_update(padapter, psta, STA_INFO_UPDATE_BW); -+ } -+ -+ -+ -+} -+ -+void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field) -+{ -+ u8 e_field, m_field; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ psta = rtw_get_stainfo(pstapriv, ta); -+ if (psta == NULL) -+ return; -+ -+ e_field = (ctrl_field & BIT(0)) ? 1 : 0; -+ m_field = (ctrl_field & BIT(1)) ? 1 : 0; -+ -+ if (e_field) { -+ -+ /* enable */ -+ /* 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ -+ -+ if (m_field) /*mode*/ -+ psta->htpriv.smps_cap = 1; -+ else -+ psta->htpriv.smps_cap = 0; -+ } else { -+ /*disable*/ -+ psta->htpriv.smps_cap = 3; -+ } -+ -+ rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); -+ -+} -+ -+/* -+op_mode -+Set to 0 (HT pure) under the followign conditions -+ - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or -+ - all STAs in the BSS are 20 MHz HT in 20 MHz BSS -+Set to 1 (HT non-member protection) if there may be non-HT STAs -+ in both the primary and the secondary channel -+Set to 2 if only HT STAs are associated in BSS, -+ however and at least one 20 MHz HT STA is associated -+Set to 3 (HT mixed mode) when one or more non-HT STAs are associated -+ (currently non-GF HT station is considered as non-HT STA also) -+*/ -+static int rtw_ht_operation_update(_adapter *padapter) -+{ -+ u16 cur_op_mode, new_op_mode; -+ int op_mode_changes = 0; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; -+ -+ if (pmlmepriv->htpriv.ht_option == _FALSE) -+ return 0; -+ -+ /*if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) -+ return 0;*/ -+ -+ DBG_871X("%s current operation mode=0x%X\n", -+ __FUNCTION__, pmlmepriv->ht_op_mode); -+ -+ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) -+ && pmlmepriv->num_sta_ht_no_gf) { -+ pmlmepriv->ht_op_mode |= -+ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; -+ op_mode_changes++; -+ } else if ((pmlmepriv->ht_op_mode & -+ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && -+ pmlmepriv->num_sta_ht_no_gf == 0) { -+ pmlmepriv->ht_op_mode &= -+ ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; -+ op_mode_changes++; -+ } -+ -+ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && -+ (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { -+ pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; -+ op_mode_changes++; -+ } else if ((pmlmepriv->ht_op_mode & -+ HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && -+ (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { -+ pmlmepriv->ht_op_mode &= -+ ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; -+ op_mode_changes++; -+ } -+ -+ /* Note: currently we switch to the MIXED op mode if HT non-greenfield -+ * station is associated. Probably it's a theoretical case, since -+ * it looks like all known HT STAs support greenfield. -+ */ -+ new_op_mode = 0; -+ if (pmlmepriv->num_sta_no_ht /*|| -+ (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)*/) -+ new_op_mode = OP_MODE_MIXED; -+ else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) -+ && pmlmepriv->num_sta_ht_20mhz) -+ new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; -+ else if (pmlmepriv->olbc_ht) -+ new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; -+ else -+ new_op_mode = OP_MODE_PURE; -+ -+ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; -+ if (cur_op_mode != new_op_mode) { -+ pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; -+ pmlmepriv->ht_op_mode |= new_op_mode; -+ op_mode_changes++; -+ } -+ -+ DBG_871X("%s new operation mode=0x%X changes=%d\n", -+ __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); -+ -+ return op_mode_changes; -+ -+} -+ -+#endif /* CONFIG_80211N_HT */ -+ -+void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type) -+{ -+ //update associcated stations cap. -+ if(updated == _TRUE) -+ { -+ _irqL irqL; -+ _list *phead, *plist; -+ struct sta_info *psta=NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ //check asoc_queue -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ -+ plist = get_next(plist); -+ -+ associated_stainfo_update(padapter, psta, sta_info_type); -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ } -+ -+} -+ -+/* called > TSR LEVEL for USB or SDIO Interface*/ -+void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) -+{ -+ u8 beacon_updated = _FALSE; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ -+#if 0 -+ if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && -+ !psta->no_short_preamble_set) { -+ psta->no_short_preamble_set = 1; -+ pmlmepriv->num_sta_no_short_preamble++; -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_preamble == 1)) -+ ieee802_11_set_beacons(hapd->iface); -+ } -+#endif -+ -+ -+ if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) -+ { -+ if(!psta->no_short_preamble_set) -+ { -+ psta->no_short_preamble_set = 1; -+ -+ pmlmepriv->num_sta_no_short_preamble++; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_preamble == 1)) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, 0xFF, NULL, _TRUE); -+ } -+ -+ } -+ } -+ else -+ { -+ if(psta->no_short_preamble_set) -+ { -+ psta->no_short_preamble_set = 0; -+ -+ pmlmepriv->num_sta_no_short_preamble--; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_preamble == 0)) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, 0xFF, NULL, _TRUE); -+ } -+ -+ } -+ } -+ -+#if 0 -+ if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { -+ psta->nonerp_set = 1; -+ pmlmepriv->num_sta_non_erp++; -+ if (pmlmepriv->num_sta_non_erp == 1) -+ ieee802_11_set_beacons(hapd->iface); -+ } -+#endif -+ -+ if(psta->flags & WLAN_STA_NONERP) -+ { -+ if(!psta->nonerp_set) -+ { -+ psta->nonerp_set = 1; -+ -+ pmlmepriv->num_sta_non_erp++; -+ -+ if (pmlmepriv->num_sta_non_erp == 1) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); -+ } -+ } -+ -+ } -+ else -+ { -+ if(psta->nonerp_set) -+ { -+ psta->nonerp_set = 0; -+ -+ pmlmepriv->num_sta_non_erp--; -+ -+ if (pmlmepriv->num_sta_non_erp == 0) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); -+ } -+ } -+ -+ } -+ -+ -+#if 0 -+ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && -+ !psta->no_short_slot_time_set) { -+ psta->no_short_slot_time_set = 1; -+ pmlmepriv->num_sta_no_short_slot_time++; -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_slot_time == 1)) -+ ieee802_11_set_beacons(hapd->iface); -+ } -+#endif -+ -+ if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) -+ { -+ if(!psta->no_short_slot_time_set) -+ { -+ psta->no_short_slot_time_set = 1; -+ -+ pmlmepriv->num_sta_no_short_slot_time++; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_slot_time == 1)) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, 0xFF, NULL, _TRUE); -+ } -+ -+ } -+ } -+ else -+ { -+ if(psta->no_short_slot_time_set) -+ { -+ psta->no_short_slot_time_set = 0; -+ -+ pmlmepriv->num_sta_no_short_slot_time--; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_slot_time == 0)) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, 0xFF, NULL, _TRUE); -+ } -+ } -+ } -+ -+#ifdef CONFIG_80211N_HT -+ -+ if (psta->flags & WLAN_STA_HT) -+ { -+ u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); -+ -+ DBG_871X("HT: STA " MAC_FMT " HT Capabilities " -+ "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); -+ -+ if (psta->no_ht_set) { -+ psta->no_ht_set = 0; -+ pmlmepriv->num_sta_no_ht--; -+ } -+ -+ if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { -+ if (!psta->no_ht_gf_set) { -+ psta->no_ht_gf_set = 1; -+ pmlmepriv->num_sta_ht_no_gf++; -+ } -+ DBG_871X("%s STA " MAC_FMT " - no " -+ "greenfield, num of non-gf stations %d\n", -+ __FUNCTION__, MAC_ARG(psta->hwaddr), -+ pmlmepriv->num_sta_ht_no_gf); -+ } -+ -+ if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { -+ if (!psta->ht_20mhz_set) { -+ psta->ht_20mhz_set = 1; -+ pmlmepriv->num_sta_ht_20mhz++; -+ } -+ DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " -+ "num of 20MHz HT STAs %d\n", -+ __FUNCTION__, MAC_ARG(psta->hwaddr), -+ pmlmepriv->num_sta_ht_20mhz); -+ } -+ -+ -+ if (ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) { -+ -+ if (!psta->ht_40mhz_intolerant) { -+ psta->ht_40mhz_intolerant = 1; -+ pmlmepriv->num_sta_40mhz_intolerant++; -+ DBG_871X("%s STA " MAC_FMT " - HT_CAP_40MHZ_INTOLERANT is set\n" , -+ __FUNCTION__, MAC_ARG(psta->hwaddr)); -+ beacon_updated = _TRUE; -+ } -+ -+/* -+ if (pmlmepriv->ht_40mhz_intolerant == _FALSE) { -+ -+ pmlmepriv->ht_40mhz_intolerant = _TRUE; -+ -+ DBG_871X("%s STA " MAC_FMT " - HT_CAP_40MHZ_INTOLERANT is set\n" , -+ __FUNCTION__, MAC_ARG(psta->hwaddr)); -+ -+ beacon_updated = _TRUE; -+ } -+*/ -+ -+ /*update ext_capab_ie_len & ext_capab_ie_data for beacon, probersp, assocrsp.*/ -+ if (pmlmepriv->ext_capab_ie_len == 0) -+ pmlmepriv->ext_capab_ie_len = 1; -+ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 1); -+ -+ update_beacon(padapter, _EXT_CAP_IE_, NULL, _FALSE); -+ } -+ -+ } -+ else -+ { -+ if (!psta->no_ht_set) { -+ psta->no_ht_set = 1; -+ pmlmepriv->num_sta_no_ht++; -+ } -+ if(pmlmepriv->htpriv.ht_option == _TRUE) { -+ DBG_871X("%s STA " MAC_FMT -+ " - no HT, num of non-HT stations %d\n", -+ __FUNCTION__, MAC_ARG(psta->hwaddr), -+ pmlmepriv->num_sta_no_ht); -+ } -+ } -+ -+ if (rtw_ht_operation_update(padapter) > 0) { -+ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); -+ /*beacon_updated = _TRUE;*/ -+ } -+ -+#endif /* CONFIG_80211N_HT */ -+ -+ //update associcated stations cap. -+ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); -+ -+ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); -+ -+} -+ -+u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) -+{ -+ u8 beacon_updated = _FALSE; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ if(!psta) -+ return beacon_updated; -+ -+ if (psta->no_short_preamble_set) { -+ psta->no_short_preamble_set = 0; -+ pmlmepriv->num_sta_no_short_preamble--; -+ if (pmlmeext->cur_wireless_mode > WIRELESS_11B -+ && pmlmepriv->num_sta_no_short_preamble == 0) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, 0xFF, NULL, _TRUE); -+ } -+ } -+ -+ if (psta->nonerp_set) { -+ psta->nonerp_set = 0; -+ pmlmepriv->num_sta_non_erp--; -+ if (pmlmepriv->num_sta_non_erp == 0) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); -+ } -+ } -+ -+ if (psta->no_short_slot_time_set) { -+ psta->no_short_slot_time_set = 0; -+ pmlmepriv->num_sta_no_short_slot_time--; -+ if (pmlmeext->cur_wireless_mode > WIRELESS_11B -+ && pmlmepriv->num_sta_no_short_slot_time == 0) -+ { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, 0xFF, NULL, _TRUE); -+ } -+ } -+ -+#ifdef CONFIG_80211N_HT -+ -+ if (psta->no_ht_gf_set) { -+ psta->no_ht_gf_set = 0; -+ pmlmepriv->num_sta_ht_no_gf--; -+ } -+ -+ if (psta->no_ht_set) { -+ psta->no_ht_set = 0; -+ pmlmepriv->num_sta_no_ht--; -+ } -+ -+ if (psta->ht_20mhz_set) { -+ psta->ht_20mhz_set = 0; -+ pmlmepriv->num_sta_ht_20mhz--; -+ } -+ -+ if (psta->ht_40mhz_intolerant) { -+ psta->ht_40mhz_intolerant = 0; -+ pmlmepriv->num_sta_40mhz_intolerant--; -+ -+ /*update ext_capab_ie_len & ext_capab_ie_data for beacon, probersp, assocrsp.*/ -+ if ((pmlmepriv->ext_capab_ie_len > 0) && (pmlmepriv->num_sta_40mhz_intolerant == 0)) { -+ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 0); -+ update_beacon(padapter, _EXT_CAP_IE_, NULL, _FALSE); -+ } -+ -+ beacon_updated = _TRUE; -+ -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); -+ } -+ -+ if (rtw_ht_operation_update(padapter) > 0) { -+ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); -+ } -+ -+#endif /* CONFIG_80211N_HT */ -+ -+ /* update associated stations cap. -+ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); //move it to avoid deadlock -+ */ -+ -+ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); -+ -+ return beacon_updated; -+ -+} -+ -+u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue) -+{ -+ _irqL irqL; -+ u8 beacon_updated = _FALSE; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ if(!psta) -+ return beacon_updated; -+ -+ if (active == _TRUE) -+ { -+#ifdef CONFIG_80211N_HT -+ //tear down Rx AMPDU -+ send_delba(padapter, 0, psta->hwaddr);// recipient -+ -+ //tear down TX AMPDU -+ send_delba(padapter, 1, psta->hwaddr);// // originator -+ -+#endif //CONFIG_80211N_HT -+ -+ issue_deauth(padapter, psta->hwaddr, reason); -+ } -+ -+#ifdef CONFIG_BEAMFORMING -+ beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->hwaddr, ETH_ALEN, 1); -+#endif -+ -+ psta->htpriv.agg_enable_bitmap = 0x0;//reset -+ psta->htpriv.candidate_tid_bitmap = 0x0;//reset -+ -+ //clear cam entry / key -+ rtw_clearstakey_cmd(padapter, psta, enqueue); -+ -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ psta->state &= ~_FW_LINKED; -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ #ifdef CONFIG_IOCTL_CFG80211 -+ if (1) { -+ #ifdef COMPAT_KERNEL_RELEASE -+ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); -+ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); -+ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ -+ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ } else -+ #endif //CONFIG_IOCTL_CFG80211 -+ { -+ rtw_indicate_sta_disassoc_event(padapter, psta); -+ } -+ -+ report_del_sta_event(padapter, psta->hwaddr, reason, enqueue); -+ -+ beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); -+ -+ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ rtw_free_stainfo(padapter, psta); -+ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ -+ -+ return beacon_updated; -+ -+} -+ -+int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ int ret=0; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; -+ -+ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) -+ return ret; -+ -+ DBG_871X(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", -+ FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* for each sta in asoc_queue */ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); -+ psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); -+ -+ return ret; -+} -+ -+int rtw_sta_flush(_adapter *padapter, bool enqueue) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ int ret = 0; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; -+ u8 flush_num = 0; -+ char flush_list[NUM_STA]; -+ int i; -+ -+ if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) -+ return ret; -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); -+ -+ /* pick sta from sta asoc_queue */ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ int stainfo_offset; -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ flush_list[flush_num++] = stainfo_offset; -+ else -+ rtw_warn_on(1); -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ /* call ap_free_sta() for each sta picked */ -+ for (i = 0; i < flush_num; i++) { -+ psta = rtw_get_stainfo_by_offset(pstapriv, flush_list[i]); -+ ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, enqueue); -+ } -+ -+ issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); -+ -+ associated_clients_update(padapter, _TRUE, STA_INFO_UPDATE_ALL); -+ -+ return ret; -+} -+ -+/* called > TSR LEVEL for USB or SDIO Interface*/ -+void sta_info_update(_adapter *padapter, struct sta_info *psta) -+{ -+ int flags = psta->flags; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ -+ //update wmm cap. -+ if(WLAN_STA_WME&flags) -+ psta->qos_option = 1; -+ else -+ psta->qos_option = 0; -+ -+ if(pmlmepriv->qospriv.qos_option == 0) -+ psta->qos_option = 0; -+ -+ -+#ifdef CONFIG_80211N_HT -+ //update 802.11n ht cap. -+ if(WLAN_STA_HT&flags) -+ { -+ psta->htpriv.ht_option = _TRUE; -+ psta->qos_option = 1; -+ -+ psta->htpriv.smps_cap = (psta->htpriv.ht_cap.cap_info & IEEE80211_HT_CAP_SM_PS)>>2; -+ } -+ else -+ { -+ psta->htpriv.ht_option = _FALSE; -+ } -+ -+ if(pmlmepriv->htpriv.ht_option == _FALSE) -+ psta->htpriv.ht_option = _FALSE; -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ //update 802.11AC vht cap. -+ if(WLAN_STA_VHT&flags) -+ { -+ psta->vhtpriv.vht_option = _TRUE; -+ } -+ else -+ { -+ psta->vhtpriv.vht_option = _FALSE; -+ } -+ -+ if(pmlmepriv->vhtpriv.vht_option == _FALSE) -+ psta->vhtpriv.vht_option = _FALSE; -+#endif -+ -+ -+ update_sta_info_apmode(padapter, psta); -+ -+ -+} -+ -+/* called >= TSR LEVEL for USB or SDIO Interface*/ -+void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) -+{ -+ if (psta->state & _FW_LINKED) { -+ //add ratid -+ add_RATid(padapter, psta, 0);//DM_RATR_STA_INIT -+ } -+} -+/* restore hw setting from sw data structures */ -+void rtw_ap_restore_network(_adapter *padapter) -+{ -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv * pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ struct security_priv* psecuritypriv=&(padapter->securitypriv); -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 chk_alive_num = 0; -+ char chk_alive_list[NUM_STA]; -+ int i; -+ -+ rtw_setopmode_cmd(padapter, Ndis802_11APMode,_FALSE); -+ -+ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ -+ rtw_startbss_cmd(padapter, RTW_CMDF_DIRECTLY); -+ -+ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || -+ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) -+ { -+ /* restore group key, WEP keys is restored in ips_leave() */ -+ rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0,_FALSE); -+ } -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ int stainfo_offset; -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) { -+ chk_alive_list[chk_alive_num++] = stainfo_offset; -+ } -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ for (i = 0; i < chk_alive_num; i++) { -+ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); -+ -+ if (psta == NULL) { -+ DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); -+ } else if (psta->state &_FW_LINKED) { -+ rtw_sta_media_status_rpt(padapter, psta, 1); -+ Update_RA_Entry(padapter, psta); -+ //pairwise key -+ /* per sta pairwise key and settings */ -+ if( (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || -+ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) -+ { -+ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY,_FALSE); -+ } -+ } -+ } -+ -+} -+ -+void start_ap_mode(_adapter *padapter) -+{ -+ int i; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; -+ -+ pmlmepriv->update_bcn = _FALSE; -+ -+ /*init_mlme_ap_info(padapter);*/ -+ -+ pmlmeext->bstart_bss = _FALSE; -+ -+ pmlmepriv->num_sta_non_erp = 0; -+ -+ pmlmepriv->num_sta_no_short_slot_time = 0; -+ -+ pmlmepriv->num_sta_no_short_preamble = 0; -+ -+ pmlmepriv->num_sta_ht_no_gf = 0; -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->num_sta_no_ht = 0; -+#endif //CONFIG_80211N_HT -+ pmlmeinfo->HT_info_enable = 0; -+ pmlmeinfo->HT_caps_enable = 0; -+ pmlmeinfo->HT_enable = 0; -+ -+ pmlmepriv->num_sta_ht_20mhz = 0; -+ pmlmepriv->num_sta_40mhz_intolerant = 0; -+ pmlmepriv->olbc = _FALSE; -+ pmlmepriv->olbc_ht = _FALSE; -+ -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->ht_20mhz_width_req = _FALSE; -+ pmlmepriv->ht_intolerant_ch_reported = _FALSE; -+ pmlmepriv->ht_op_mode = 0; -+ pmlmepriv->sw_to_20mhz = 0; -+#endif -+ -+ _rtw_memset(pmlmepriv->ext_capab_ie_data, 0, sizeof(pmlmepriv->ext_capab_ie_data)); -+ pmlmepriv->ext_capab_ie_len = 0; -+ -+ for (i = 0 ; i < NUM_STA ; i++) -+ pstapriv->sta_aid[i] = NULL; -+ -+ //for ACL -+ _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); -+ pacl_list->num = 0; -+ pacl_list->mode = 0; -+ for(i = 0; i < NUM_ACL; i++) -+ { -+ _rtw_init_listhead(&pacl_list->aclnode[i].list); -+ pacl_list->aclnode[i].valid = _FALSE; -+ } -+ -+} -+ -+void stop_ap_mode(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ struct rtw_wlan_acl_node *paclnode; -+ struct sta_info *psta=NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; -+ _queue *pacl_node_q =&pacl_list->acl_node_q; -+ -+ pmlmepriv->update_bcn = _FALSE; -+ pmlmeext->bstart_bss = _FALSE; -+ padapter->netif_up = _FALSE; -+ //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); -+ -+ //reset and init security priv , this can refine with rtw_reset_securitypriv -+ _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; -+ -+ #ifdef CONFIG_DFS_MASTER -+ rtw_dfs_master_status_apply(padapter, MLME_AP_STOPPED); -+ #endif -+ -+ /* free scan queue */ -+ rtw_free_network_queue(padapter, _TRUE); -+ -+ //for ACL -+ _enter_critical_bh(&(pacl_node_q->lock), &irqL); -+ phead = get_list_head(pacl_node_q); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); -+ plist = get_next(plist); -+ -+ if(paclnode->valid == _TRUE) -+ { -+ paclnode->valid = _FALSE; -+ -+ rtw_list_delete(&paclnode->list); -+ -+ pacl_list->num--; -+ } -+ } -+ _exit_critical_bh(&(pacl_node_q->lock), &irqL); -+ -+ DBG_871X("%s, free acl_node_queue, num=%d\n", __func__, pacl_list->num); -+ -+ rtw_sta_flush(padapter, _TRUE); -+ -+ //free_assoc_sta_resources -+ rtw_free_all_stainfo(padapter); -+ -+ psta = rtw_get_bcmc_stainfo(padapter); -+ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ rtw_free_stainfo(padapter, psta); -+ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ -+ rtw_init_bcmc_stainfo(padapter); -+ -+ rtw_free_mlme_priv_ie_data(pmlmepriv); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_MediaStatusNotify(padapter, 0); //disconnect -+#endif -+ -+} -+ -+#endif //CONFIG_NATIVEAP_MLME -+ -+void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset) -+{ -+#define UPDATE_VHT_CAP 1 -+#define UPDATE_HT_CAP 1 -+ -+#ifdef CONFIG_80211AC_VHT -+ { -+ struct vht_priv *vhtpriv = &adapter->mlmepriv.vhtpriv; -+ u8 *vht_cap_ie, *vht_op_ie; -+ int vht_cap_ielen, vht_op_ielen; -+ u8 center_freq; -+ -+ vht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ vht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ center_freq = rtw_get_center_ch(ch, bw, offset); -+ -+ /* update vht cap ie */ -+ if (vht_cap_ie && vht_cap_ielen) { -+ #if UPDATE_VHT_CAP -+ /* if ((bw == CHANNEL_WIDTH_160 || bw == CHANNEL_WIDTH_80_80) && pvhtpriv->sgi_160m) -+ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvht_cap_ie + 2, 1); -+ else */ -+ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(vht_cap_ie + 2, 0); -+ -+ if (bw >= CHANNEL_WIDTH_80 && vhtpriv->sgi_80m) -+ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 1); -+ else -+ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 0); -+ #endif -+ } -+ -+ /* update vht op ie */ -+ if (vht_op_ie && vht_op_ielen) { -+ if (bw < CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); -+ } else if (bw == CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 1); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, center_freq); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); -+ } else { -+ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(adapter), bw); -+ rtw_warn_on(1); -+ } -+ } -+ } -+#endif /* CONFIG_80211AC_VHT */ -+#ifdef CONFIG_80211N_HT -+ { -+ struct ht_priv *htpriv = &adapter->mlmepriv.htpriv; -+ u8 *ht_cap_ie, *ht_op_ie; -+ int ht_cap_ielen, ht_op_ielen; -+ -+ ht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTCapability, &ht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ ht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTInfo, &ht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ -+ /* update ht cap ie */ -+ if (ht_cap_ie && ht_cap_ielen) { -+ #if UPDATE_HT_CAP -+ if (bw >= CHANNEL_WIDTH_40) -+ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 1); -+ else -+ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 0); -+ -+ if (bw >= CHANNEL_WIDTH_40 && htpriv->sgi_40m) -+ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 1); -+ else -+ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 0); -+ -+ if (htpriv->sgi_20m) -+ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 1); -+ else -+ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 0); -+ #endif -+ } -+ -+ /* update ht op ie */ -+ if (ht_op_ie && ht_op_ielen) { -+ SET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2, ch); -+ switch (offset) { -+ case HAL_PRIME_CHNL_OFFSET_LOWER: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCA); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_UPPER: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCB); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: -+ default: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCN); -+ break; -+ } -+ -+ if (bw >= CHANNEL_WIDTH_40) -+ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 1); -+ else -+ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 0); -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+ -+{ -+ u8 *p; -+ int ie_len; -+ u8 old_ch = bss->Configuration.DSConfig; -+ bool change_band = _FALSE; -+ -+ if ((ch <= 14 && old_ch >= 36) || (ch >= 36 && old_ch <= 14)) -+ change_band = _TRUE; -+ -+ /* update channel in IE */ -+ p = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ if (p && ie_len > 0) -+ *(p + 2) = ch; -+ -+ bss->Configuration.DSConfig = ch; -+ -+ /* band is changed, update ERP, support rate, ext support rate IE */ -+ if (change_band == _TRUE) -+ change_band_update_ie(adapter, bss, ch); -+} -+ -+} -+ -+bool rtw_ap_chbw_decision(_adapter *adapter, u8 req_ch, u8 req_bw, u8 req_offset -+ , u8 *ch, u8 *bw, u8 *offset) -+{ -+ u8 dec_ch, dec_bw, dec_offset; -+ u8 u_ch = 0, u_offset, u_bw; -+ bool changed = _FALSE; -+ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); -+ u8 sta_num; -+ u8 ld_sta_num; -+ u8 lg_sta_num; -+ u8 ap_num; -+ u8 ld_ap_num; -+ bool set_u_ch = _FALSE, set_dec_ch = _FALSE; -+ -+ dec_ch = req_ch; -+ dec_bw = req_bw; -+ dec_offset = req_offset; -+ -+ rtw_dev_iface_status_no_self(adapter, &sta_num, &ld_sta_num, &lg_sta_num, &ap_num, &ld_ap_num); -+ DBG_871X(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num%u, ap_num:%u\n" -+ , FUNC_ADPT_ARG(adapter), ld_sta_num, lg_sta_num, ap_num); -+ -+ if (ld_sta_num || ap_num) { -+ /* has linked STA or AP mode, follow */ -+ -+ rtw_warn_on(!rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); -+ -+ DBG_871X(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); -+ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); -+ -+ rtw_adjust_chbw(adapter, u_ch, &dec_bw, &dec_offset); -+ -+ rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset -+ , &u_ch, &u_bw, &u_offset); -+ -+ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) -+ , dec_ch, dec_bw, dec_offset); -+ -+ set_u_ch = _TRUE; -+ } else if (lg_sta_num) { -+ /* has linking STA */ -+ -+ rtw_warn_on(!rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); -+ -+ DBG_871X(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); -+ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); -+ -+ rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); -+ -+ if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch, dec_bw, dec_offset)) { -+ -+ rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset -+ , &u_ch, &u_bw, &u_offset); -+ -+ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) -+ , dec_ch, dec_bw, dec_offset); -+ -+ set_u_ch = _TRUE; -+ } else { -+ /* set this for possible ch change when join down*/ -+ set_fwstate(&adapter->mlmepriv, WIFI_OP_CH_SWITCHING); -+ } -+ } else { -+ /* single AP mode */ -+ -+ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); -+ rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); -+ -+ #if defined(CONFIG_DFS_MASTER) -+ /* check NOL */ -+ if (rtw_chset_is_ch_non_ocp(mlmeext->channel_set, dec_ch, dec_bw, dec_offset)) { -+ /* choose 5G DFS channel for debug */ -+ if (adapter_to_rfctl(adapter)->dbg_dfs_master_choose_dfs_ch_first -+ && rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_NON_DFS) == _TRUE) { -+ DBG_871X(FUNC_ADPT_FMT" choose 5G DFS channel for debug\n", FUNC_ADPT_ARG(adapter)); -+ } else -+ /* choose from 5G no DFS */ -+ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_DFS) == _FALSE) { -+ /* including 5G DFS, not long CAC */ -+ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_LONG_CAC) == _FALSE) { -+ /* including 5G DFS, long CAC */ -+ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G) == _FALSE) { -+ /* including 2.4G channel */ -+ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_5G) == _FALSE) { -+ DBG_871X(FUNC_ADPT_FMT" no available ch\n", FUNC_ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ } -+ } -+ } -+ } -+ #endif /* defined(CONFIG_DFS_MASTER) */ -+ -+ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) -+ , dec_ch, dec_bw, dec_offset); -+ -+ set_dec_ch = _TRUE; -+ } -+ -+ if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) -+ #ifdef CONFIG_CONCURRENT_MODE -+ || check_buddy_fwstate(adapter, _FW_UNDER_SURVEY) -+ #endif -+ ) { -+ /* scanning, leave ch setting to scan state machine */ -+ set_u_ch = set_dec_ch = _FALSE; -+ } -+ -+ if (mlmeext->cur_channel != dec_ch -+ || mlmeext->cur_bwmode != dec_bw -+ || mlmeext->cur_ch_offset != dec_offset) -+ changed = _TRUE; -+ -+ if (changed == _TRUE && rtw_linked_check(adapter) == _TRUE) { -+ #ifdef CONFIG_SPCT_CH_SWITCH -+ if (1) -+ rtw_ap_inform_ch_switch(adapter, dec_ch, dec_offset); -+ else -+ #endif -+ rtw_sta_flush(adapter, _FALSE); -+ } -+ -+ mlmeext->cur_channel = dec_ch; -+ mlmeext->cur_bwmode = dec_bw; -+ mlmeext->cur_ch_offset = dec_offset; -+ -+ if (u_ch != 0) -+ DBG_871X(FUNC_ADPT_FMT" union: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); -+ -+ DBG_871X(FUNC_ADPT_FMT" dec: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset); -+ -+ if (set_u_ch == _TRUE) { -+ *ch = u_ch; -+ *bw = u_bw; -+ *offset = u_offset; -+ } else if (set_dec_ch == _TRUE) { -+ *ch = dec_ch; -+ *bw = dec_bw; -+ *offset = dec_offset; -+ } -+ -+ return changed; -+} -+ -+#endif //CONFIG_AP_MODE -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_AP_C_ ++ ++#include ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++extern unsigned char RTW_WPA_OUI[]; ++extern unsigned char WMM_OUI[]; ++extern unsigned char WPS_OUI[]; ++extern unsigned char P2P_OUI[]; ++extern unsigned char WFD_OUI[]; ++ ++void init_mlme_ap_info(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ ++ _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); ++ ++ //for ACL ++ _rtw_init_queue(&pacl_list->acl_node_q); ++ ++ //pmlmeext->bstart_bss = _FALSE; ++ ++ start_ap_mode(padapter); ++} ++ ++void free_mlme_ap_info(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //stop_ap_mode(padapter); ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ ++ rtw_sta_flush(padapter, _TRUE); ++ ++ pmlmeinfo->state = _HW_STATE_NOLINK_; ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ //free bc/mc sta_info ++ psta = rtw_get_bcmc_stainfo(padapter); ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++} ++ ++static void update_BCNTIM(_adapter *padapter) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ unsigned char *pie = pnetwork_mlmeext->IEs; ++ ++/* ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ //update TIM IE ++ //if(pstapriv->tim_bitmap) ++*/ ++ if (_TRUE) { ++ u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL; ++ u16 tim_bitmap_le; ++ uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; ++ ++ tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && tim_ielen > 0) { ++ tim_ielen += 2; ++ ++ premainder_ie = p + tim_ielen; ++ ++ tim_ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; ++ ++ /*append TIM IE from dst_ie offset*/ ++ dst_ie = p; ++ } else { ++ tim_ielen = 0; ++ ++ /*calculate head_len*/ ++ offset = _FIXED_IE_LENGTH_; ++ ++ /* get ssid_ie len */ ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ offset += tmp_len+2; ++ ++ /*get supported rates len*/ ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ offset += tmp_len+2; ++ } ++ ++ /*DS Parameter Set IE, len=3*/ ++ offset += 3; ++ ++ premainder_ie = pie + offset; ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; ++ ++ /*append TIM IE from offset*/ ++ dst_ie = pie + offset; ++ ++ } ++ ++ if (remainder_ielen > 0) { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=_TIM_IE_; ++ ++ if ((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fe)) ++ tim_ielen = 5; ++ else ++ tim_ielen = 4; ++ ++ *dst_ie++ = tim_ielen; ++ ++ *dst_ie++ = 0;/*DTIM count*/ ++ *dst_ie++ = 1;/*DTIM period*/ ++ ++ if (pstapriv->tim_bitmap & BIT(0))/*for bc/mc frames*/ ++ *dst_ie++ = BIT(0);/*bitmap ctrl */ ++ else ++ *dst_ie++ = 0; ++ ++ if (tim_ielen == 4) { ++ u8 pvb = 0; ++ ++ if (pstapriv->tim_bitmap & 0x00fe) ++ pvb = (u8)tim_bitmap_le; ++ else if (pstapriv->tim_bitmap & 0xff00) ++ pvb = (u8)(tim_bitmap_le >> 8); ++ else ++ pvb = (u8)tim_bitmap_le; ++ ++ *dst_ie++ = pvb; ++ ++ } else if (tim_ielen == 5) { ++ _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); ++ dst_ie += 2; ++ } ++ ++ /*copy remainder IE*/ ++ if (pbackup_remainder_ie) { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork_mlmeext->IELength = offset + remainder_ielen; ++ ++ } ++} ++ ++void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 bmatch = _FALSE; ++ u8 *pie = pnetwork->IEs; ++ u8 *p=NULL, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ u32 i, offset, ielen, ie_offset, remainder_ielen = 0; ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); ++ ++ if (pIE->ElementID > index) ++ { ++ break; ++ } ++ else if(pIE->ElementID == index) // already exist the same IE ++ { ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ bmatch = _TRUE; ++ break; ++ } ++ ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ i += (pIE->Length + 2); ++ } ++ ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ if(bmatch) ++ dst_ie = p; ++ else ++ dst_ie = (p+ielen); ++ } ++ ++ if(dst_ie == NULL) ++ return; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=index; ++ *dst_ie++=len; ++ ++ _rtw_memcpy(dst_ie, data, len); ++ dst_ie+=len; ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) ++{ ++ u8 *p, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ uint offset, ielen, ie_offset, remainder_ielen = 0; ++ u8 *pie = pnetwork->IEs; ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ dst_ie = p; ++ } ++ else { ++ return; ++ } ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++ ++u8 chk_sta_is_alive(struct sta_info *psta); ++u8 chk_sta_is_alive(struct sta_info *psta) ++{ ++ u8 ret = _FALSE; ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" ++ , MAC_ARG(psta->hwaddr) ++ , psta->rssi_stat.UndecoratedSmoothedPWDB ++ //, STA_RX_PKTS_ARG(psta) ++ , STA_RX_PKTS_DIFF_ARG(psta) ++ , psta->expire_to ++ , psta->state&WIFI_SLEEP_STATE?"PS, ":"" ++ , psta->state&WIFI_STA_ALIVE_CHK_STATE?"SAC, ":"" ++ , psta->sleepq_len ++ ); ++ #endif ++ ++ //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) ++ if((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) ++ { ++ #if 0 ++ if(psta->state&WIFI_SLEEP_STATE) ++ ret = _TRUE; ++ #endif ++ } ++ else ++ { ++ ret = _TRUE; ++ } ++ ++ sta_update_last_rx_pkts(psta); ++ ++ return ret; ++} ++ ++void expire_timeout_chk(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 updated = _FALSE; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ phead = &pstapriv->auth_list; ++ plist = get_next(phead); ++ ++ //check auth_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" auth_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); ++ ++ plist = get_next(plist); ++ ++ ++#ifdef CONFIG_ATMEL_RC_PATCH ++ if (_TRUE == _rtw_memcmp((void *)(pstapriv->atmel_rc_pattern), (void *)(psta->hwaddr), ETH_ALEN)) ++ continue; ++ if (psta->flag_atmel_rc) ++ continue; ++#endif ++ if(psta->expire_to>0) ++ { ++ psta->expire_to--; ++ if (psta->expire_to == 0) ++ { ++ rtw_list_delete(&psta->auth_list); ++ pstapriv->auth_list_cnt--; ++ ++ DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", ++ psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ } ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ psta = NULL; ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++#ifdef CONFIG_ATMEL_RC_PATCH ++ DBG_871X("%s:%d psta=%p, %02x,%02x||%02x,%02x \n\n", __func__, __LINE__, ++ psta,pstapriv->atmel_rc_pattern[0], pstapriv->atmel_rc_pattern[5], psta->hwaddr[0], psta->hwaddr[5]); ++ if (_TRUE == _rtw_memcmp((void *)pstapriv->atmel_rc_pattern, (void *)(psta->hwaddr), ETH_ALEN)) ++ continue; ++ if (psta->flag_atmel_rc) ++ continue; ++ DBG_871X("%s: debug line:%d \n", __func__, __LINE__); ++#endif ++#ifdef CONFIG_AUTO_AP_MODE ++ if(psta->isrc) ++ continue; ++#endif ++ if (chk_sta_is_alive(psta) || !psta->expire_to) { ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ #ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++ #endif // CONFIG_TX_MCAST2UNI ++ } else { ++ psta->expire_to--; ++ } ++ ++#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_80211N_HT ++#ifdef CONFIG_TX_MCAST2UNI ++ if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { ++ // check sta by delba(addba) for 11n STA ++ // ToDo: use CCX report to check for all STAs ++ //DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); ++ ++ if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { ++ DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 0; ++ psta->expire_to = 0; ++ } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { ++ DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 1; ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ } ++ } ++#endif //CONFIG_TX_MCAST2UNI ++#endif //CONFIG_80211N_HT ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ ++ if (psta->expire_to <= 0) ++ { ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if (padapter->registrypriv.wifi_spec == 1) ++ { ++ psta->expire_to = pstapriv->expire_to; ++ continue; ++ } ++ ++#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_80211N_HT ++ ++#define KEEP_ALIVE_TRYCNT (3) ++ ++ if(psta->keep_alive_trycnt > 0 && psta->keep_alive_trycnt <= KEEP_ALIVE_TRYCNT) ++ { ++ if(psta->state & WIFI_STA_ALIVE_CHK_STATE) ++ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; ++ else ++ psta->keep_alive_trycnt = 0; ++ ++ } ++ else if((psta->keep_alive_trycnt > KEEP_ALIVE_TRYCNT) && !(psta->state & WIFI_STA_ALIVE_CHK_STATE)) ++ { ++ psta->keep_alive_trycnt = 0; ++ } ++ if((psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE)) ++ { ++ uint priority = 1; //test using BK ++ u8 issued=0; ++ ++ //issued = (psta->htpriv.agg_enable_bitmap>>priority)&0x1; ++ issued |= (psta->htpriv.candidate_tid_bitmap>>priority)&0x1; ++ ++ if(0==issued) ++ { ++ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) ++ { ++ psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); ++ ++ if (psta->state & WIFI_SLEEP_STATE) ++ psta->expire_to = 2; // 2x2=4 sec ++ else ++ psta->expire_to = 1; // 2 sec ++ ++ psta->state |= WIFI_STA_ALIVE_CHK_STATE; ++ ++ //add_ba_hdl(padapter, (u8*)paddbareq_parm); ++ ++ DBG_871X("issue addba_req to check if sta alive, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); ++ ++ issue_addba_req(padapter, psta->hwaddr, (u8)priority); ++ ++ _set_timer(&psta->addba_retry_timer, ADDBA_TO); ++ ++ psta->keep_alive_trycnt++; ++ ++ continue; ++ } ++ } ++ } ++ if(psta->keep_alive_trycnt > 0 && psta->state & WIFI_STA_ALIVE_CHK_STATE) ++ { ++ psta->keep_alive_trycnt = 0; ++ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; ++ DBG_871X("change to another methods to check alive if staion is at ps mode\n"); ++ } ++ ++#endif //CONFIG_80211N_HT ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ if (psta->state & WIFI_SLEEP_STATE) { ++ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { ++ //to check if alive by another methods if staion is at ps mode. ++ psta->expire_to = pstapriv->expire_to; ++ psta->state |= WIFI_STA_ALIVE_CHK_STATE; ++ ++ //DBG_871X("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->hwaddr)); ++ ++ //to update bcn with tim_bitmap for this station ++ pstapriv->tim_bitmap |= BIT(psta->aid); ++ update_beacon(padapter, _TIM_IE_, NULL, _TRUE); ++ ++ if(!pmlmeext->active_keep_alive_check) ++ continue; ++ } ++ } ++ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ if (pmlmeext->active_keep_alive_check) { ++ int stainfo_offset; ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ ++ continue; ++ } ++ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); ++ } ++ else ++ { ++ /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ ++ if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) ++ && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME/pstapriv->asoc_list_cnt)/2) ++ ){ ++ DBG_871X("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ ++ , MAC_ARG(psta->hwaddr) ++ , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); ++ wakeup_sta_to_xmit(padapter, psta); ++ } ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++if (chk_alive_num) { ++ ++ u8 backup_oper_channel=0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ /* switch to correct channel of current network before issue keep-alive frames */ ++ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { ++ backup_oper_channel = rtw_get_oper_ch(padapter); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ } ++ ++ /* issue null data to check sta alive*/ ++ for (i = 0; i < chk_alive_num; i++) { ++ int ret = _FAIL; ++ ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++#ifdef CONFIG_ATMEL_RC_PATCH ++ if (_TRUE == _rtw_memcmp( pstapriv->atmel_rc_pattern, psta->hwaddr, ETH_ALEN)) ++ continue; ++ if (psta->flag_atmel_rc) ++ continue; ++#endif ++ if(!(psta->state &_FW_LINKED)) ++ continue; ++ ++ if (psta->state & WIFI_SLEEP_STATE) ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 1, 50); ++ else ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 3, 50); ++ ++ psta->keep_alive_trycnt++; ++ if (ret == _SUCCESS) ++ { ++ DBG_871X("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr)); ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ continue; ++ } ++ else if (psta->keep_alive_trycnt <= 3) ++ { ++ DBG_871X("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); ++ psta->expire_to = 1; ++ continue; ++ } ++ ++ psta->keep_alive_trycnt = 0; ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&psta->asoc_list)==_FALSE) { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++ if (backup_oper_channel>0) /* back to the original operation channel */ ++ SelectChannel(padapter, backup_oper_channel); ++} ++#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); ++} ++ ++void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level) ++{ ++ int i; ++ u8 rf_type; ++ unsigned char sta_band = 0, shortGIrate = _FALSE; ++ u64 tx_ra_bitmap = 0; ++ struct ht_priv *psta_ht = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++#ifdef CONFIG_80211N_HT ++ if(psta) ++ psta_ht = &psta->htpriv; ++ else ++ return; ++#endif //CONFIG_80211N_HT ++ ++ if(!(psta->state & _FW_LINKED)) ++ return; ++ ++#if 0//gtest ++ if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) ++ { ++ //is this a 2r STA? ++ if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) ++ { ++ priv->pshare->has_2r_sta |= BIT(pstat->aid); ++ if(rtw_read16(padapter, 0x102501f6) != 0xffff) ++ { ++ rtw_write16(padapter, 0x102501f6, 0xffff); ++ reset_1r_sta_RA(priv, 0xffff); ++ Switch_1SS_Antenna(priv, 3); ++ } ++ } ++ else// bg or 1R STA? ++ { ++ if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) ++ { ++ if(rtw_read16(padapter, 0x102501f6) != 0x7777) ++ { // MCS7 SGI ++ rtw_write16(padapter, 0x102501f6,0x7777); ++ reset_1r_sta_RA(priv, 0x7777); ++ Switch_1SS_Antenna(priv, 2); ++ } ++ } ++ } ++ ++ } ++ ++ if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) ++ { ++ if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) ++ pstat->rssi_level = 1; ++ else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || ++ ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && ++ (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && ++ (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) ++ pstat->rssi_level = 2; ++ else ++ pstat->rssi_level = 3; ++ } ++ ++ // rate adaptive by rssi ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) ++ { ++ if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x100f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x100ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x100ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x100ff001; ++ ++ break; ++ } ++ } ++ else ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x1f0f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x1f0ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x000ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x000ff001; ++ ++ break; ++ } ++ ++ // Don't need to mask high rates due to new rate adaptive parameters ++ //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta ++ // pstat->tx_ra_bitmap &= 0x81ffffff; ++ ++ // NIC driver will report not supporting MCS15 and MCS14 in asoc req ++ //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) ++ // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 ++ } ++ } ++ else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x00000f00; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x00000ff0; ++ break; ++ case 3: ++ pstat->tx_ra_bitmap &= 0x00000ff5; ++ break; ++ } ++ } ++ else ++ { ++ pstat->tx_ra_bitmap &= 0x0000000d; ++ } ++ ++ // disable tx short GI when station cannot rx MCS15(AP is 2T2R) ++ // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) ++ // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate ++ if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || ++ (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) ++ { ++ pstat->tx_ra_bitmap &= ~BIT(28); ++ } ++#endif ++ ++ rtw_hal_update_sta_rate_mask(padapter, psta); ++ tx_ra_bitmap = psta->ra_mask; ++ ++ shortGIrate = query_ra_short_GI(psta); ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N ; ++ ++ if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11A; ++ ++ // 5G band ++ #ifdef CONFIG_80211AC_VHT ++ if (psta->vhtpriv.vht_option) { ++ sta_band = WIRELESS_11_5AC; ++ } ++ #endif ++ ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N; ++ ++ if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G; ++ ++ if (tx_ra_bitmap & 0x0f) ++ sta_band |= WIRELESS_11B; ++ } ++ ++ psta->wireless_mode = sta_band; ++ psta->raid = rtw_hal_networktype_to_raid(padapter, psta); ++ ++ if (psta->aid < NUM_STA) ++ { ++ u8 arg[4] = {0}; ++ ++ arg[0] = psta->mac_id; ++ arg[1] = psta->raid; ++ arg[2] = shortGIrate; ++ arg[3] = psta->init_rate; ++ ++ DBG_871X("%s=> mac_id:%d , raid:%d , shortGIrate=%d, tx_ra_bitmap:0x%016llx, networkType:0x%02x\n", ++ __FUNCTION__, psta->mac_id, psta->raid, shortGIrate, tx_ra_bitmap, psta->wireless_mode); ++ ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, rssi_level); ++ } ++ else ++ { ++ DBG_871X("station aid %d exceed the max number\n", psta->aid); ++ } ++ ++} ++ ++void update_bmc_sta(_adapter *padapter) ++{ ++ _irqL irqL; ++ unsigned char network_type; ++ int supportRateNum = 0; ++ u64 tx_ra_bitmap = 0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); ++ ++ if(psta) ++ { ++ psta->aid = 0;//default set to 0 ++ psta->qos_option = 0; ++#ifdef CONFIG_80211N_HT ++ psta->htpriv.ht_option = _FALSE; ++#endif //CONFIG_80211N_HT ++ ++ psta->ieee8021x_blocked = 0; ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. ++ ++ //prepare for add_RATid ++ supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); ++ network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, pcur_network->Configuration.DSConfig); ++ if (IsSupportedTxCCK(network_type)) { ++ network_type = WIRELESS_11B; ++ } ++ else if (network_type == WIRELESS_INVALID) { // error handling ++ if ( pcur_network->Configuration.DSConfig > 14 ) ++ network_type = WIRELESS_11A; ++ else ++ network_type = WIRELESS_11B; ++ } ++ update_sta_basic_rate(psta, network_type); ++ psta->wireless_mode = network_type; ++ ++ rtw_hal_update_sta_rate_mask(padapter, psta); ++ tx_ra_bitmap = psta->ra_mask; ++ ++ psta->raid = rtw_hal_networktype_to_raid(padapter,psta); ++ ++ //ap mode ++ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); ++ ++ //if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg[4] = {0}; ++ ++ arg[0] = psta->mac_id; ++ arg[1] = psta->raid; ++ arg[2] = 0; ++ arg[3] = psta->init_rate; ++ ++ DBG_871X("%s=> mac_id:%d , raid:%d , bitmap=0x%016llx\n", ++ __FUNCTION__ , psta->mac_id, psta->raid , tx_ra_bitmap); ++ ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, 0); ++ } ++ ++ rtw_sta_media_status_rpt(padapter, psta, 1); ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state = _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ } ++ else ++ { ++ DBG_871X("add_RATid_bmc_sta error!\n"); ++ } ++ ++} ++ ++//notes: ++//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode ++//MAC_ID = AID+1 for sta in ap/adhoc mode ++//MAC_ID = 1 for bc/mc for sta/ap/adhoc ++//MAC_ID = 0 for bssid for sta/ap/adhoc ++//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; ++ ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_80211N_HT ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ struct ht_priv *phtpriv_sta = &psta->htpriv; ++#endif //CONFIG_80211N_HT ++ u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0; ++ //set intf_tag to if1 ++ //psta->intf_tag = 0; ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ //psta->mac_id = psta->aid+4; ++ //psta->mac_id = psta->aid+1;//alloc macid when call rtw_alloc_stainfo(), ++ //release macid when call rtw_free_stainfo() ++ ++ //ap mode ++ rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,psta,_TRUE); ++ ++ if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) ++ psta->ieee8021x_blocked = _TRUE; ++ else ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ //update sta's cap ++ ++ //ERP ++ VCS_update(padapter, psta); ++#ifdef CONFIG_80211N_HT ++ //HT related cap ++ if(phtpriv_sta->ht_option) ++ { ++ //check if sta supports rx ampdu ++ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; ++ ++ phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; ++ ++ // bwmode ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) ++ { ++ psta->bw_mode = CHANNEL_WIDTH_40; ++ } ++ else ++ { ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ } ++ ++ if (psta->ht_40mhz_intolerant) ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ ++ if(pmlmeext->cur_bwmode < psta->bw_mode) ++ { ++ psta->bw_mode = pmlmeext->cur_bwmode; ++ } ++ ++ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; ++ ++ ++ //check if sta support s Short GI 20M ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) ++ { ++ phtpriv_sta->sgi_20m = _TRUE; ++ } ++ ++ //check if sta support s Short GI 40M ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) ++ { ++ if(psta->bw_mode == CHANNEL_WIDTH_40) //according to psta->bw_mode ++ phtpriv_sta->sgi_40m = _TRUE; ++ else ++ phtpriv_sta->sgi_40m = _FALSE; ++ } ++ ++ psta->qos_option = _TRUE; ++ ++ // B0 Config LDPC Coding Capability ++ if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) && ++ GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); ++ DBG_871X("Enable HT Tx LDPC for STA(%d)\n",psta->aid); ++ } ++ ++ // B7 B8 B9 Config STBC setting ++ if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) && ++ GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) ); ++ DBG_871X("Enable HT Tx STBC for STA(%d)\n",psta->aid); ++ } ++ ++#ifdef CONFIG_BEAMFORMING ++ /*Config Tx beamforming setting*/ ++ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); ++ /*Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 6); ++ } ++ ++ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); ++ /*Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 4); ++ } ++ if (cur_beamform_cap) { ++ DBG_871X("Client STA(%d) HT Beamforming Cap = 0x%02X\n", psta->aid, cur_beamform_cap); ++ } ++#endif /*CONFIG_BEAMFORMING*/ ++ } ++ else ++ { ++ phtpriv_sta->ampdu_enable = _FALSE; ++ ++ phtpriv_sta->sgi_20m = _FALSE; ++ phtpriv_sta->sgi_40m = _FALSE; ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ phtpriv_sta->ldpc_cap = cur_ldpc_cap; ++ phtpriv_sta->stbc_cap = cur_stbc_cap; ++ phtpriv_sta->beamform_cap = cur_beamform_cap; ++ ++ //Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ phtpriv_sta->agg_enable_bitmap = 0x0;//reset ++ phtpriv_sta->candidate_tid_bitmap = 0x0;//reset ++#endif //CONFIG_80211N_HT ++ ++#ifdef CONFIG_80211AC_VHT ++ update_sta_vht_info_apmode(padapter, psta); ++#endif ++ ++ update_ldpc_stbc_cap(psta); ++ ++ //todo: init other variables ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ ++ //add ratid ++ //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state |= _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ ++} ++ ++static void update_ap_info(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_80211N_HT ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++#endif //CONFIG_80211N_HT ++ ++ psta->wireless_mode = pmlmeext->cur_wireless_mode; ++ ++ psta->bssratelen = rtw_get_rateset_len(pnetwork->SupportedRates); ++ _rtw_memcpy(psta->bssrateset, pnetwork->SupportedRates, psta->bssratelen); ++ ++#ifdef CONFIG_80211N_HT ++ //HT related cap ++ if(phtpriv_ap->ht_option) ++ { ++ //check if sta supports rx ampdu ++ //phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; ++ ++ //check if sta support s Short GI 20M ++ if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) ++ { ++ phtpriv_ap->sgi_20m = _TRUE; ++ } ++ //check if sta support s Short GI 40M ++ if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) ++ { ++ phtpriv_ap->sgi_40m = _TRUE; ++ } ++ ++ psta->qos_option = _TRUE; ++ } ++ else ++ { ++ phtpriv_ap->ampdu_enable = _FALSE; ++ ++ phtpriv_ap->sgi_20m = _FALSE; ++ phtpriv_ap->sgi_40m = _FALSE; ++ } ++ ++ psta->bw_mode = pmlmeext->cur_bwmode; ++ phtpriv_ap->ch_offset = pmlmeext->cur_ch_offset; ++ ++ phtpriv_ap->agg_enable_bitmap = 0x0;//reset ++ phtpriv_ap->candidate_tid_bitmap = 0x0;//reset ++ ++ _rtw_memcpy(&psta->htpriv, &pmlmepriv->htpriv, sizeof(struct ht_priv)); ++ ++#ifdef CONFIG_80211AC_VHT ++ _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); ++#endif //CONFIG_80211AC_VHT ++ ++#endif //CONFIG_80211N_HT ++ ++ psta->state |= WIFI_AP_STATE; /* Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 */ ++} ++ ++static void rtw_set_hw_wmm_param(_adapter *padapter) ++{ ++ u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; ++ u8 acm_mask; ++ u16 TXOP; ++ u32 acParm, i; ++ u32 edca[4], inx[4]; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ acm_mask = 0; ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || ++ (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ if (pmlmeinfo->WMM_enable == 0) { ++ padapter->mlmepriv.acm_mask = 0; ++ ++ AIFS = aSifsTime + (2 * pmlmeinfo->slotTime); ++ ++ if (pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11A)) { ++ ECWMin = 4; ++ ECWMax = 10; ++ } else if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { ++ ECWMin = 5; ++ ECWMax = 10; ++ } else { ++ ECWMin = 4; ++ ECWMax = 10; ++ } ++ ++ TXOP = 0; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); ++ ++ ECWMin = 2; ++ ECWMax = 3; ++ TXOP = 0x2f; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); ++ ++ } else { ++ edca[0] = edca[1] = edca[2] = edca[3] = 0; ++ ++ /*TODO:*/ ++ acm_mask = 0; ++ padapter->mlmepriv.acm_mask = acm_mask; ++ ++ /* ++ //BK ++ //AIFS = AIFSN * slot time + SIFS - r2t phy delay ++ */ ++ AIFS = (7 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 4; ++ ECWMax = 10; ++ TXOP = 0; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); ++ edca[XMIT_BK_QUEUE] = acParm; ++ DBG_871X("WMM(BK): %x\n", acParm); ++ ++ /* BE */ ++ AIFS = (3 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 4; ++ ECWMax = 6; ++ TXOP = 0; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); ++ edca[XMIT_BE_QUEUE] = acParm; ++ DBG_871X("WMM(BE): %x\n", acParm); ++ ++ /* VI */ ++ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 3; ++ ECWMax = 4; ++ TXOP = 94; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); ++ edca[XMIT_VI_QUEUE] = acParm; ++ DBG_871X("WMM(VI): %x\n", acParm); ++ ++ /* VO */ ++ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 2; ++ ECWMax = 3; ++ TXOP = 47; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); ++ edca[XMIT_VO_QUEUE] = acParm; ++ DBG_871X("WMM(VO): %x\n", acParm); ++ ++ ++ if (padapter->registrypriv.acm_method == 1) ++ rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); ++ else ++ padapter->mlmepriv.acm_mask = acm_mask; ++ ++ inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; ++ ++ if (pregpriv->wifi_spec == 1) { ++ u32 j, tmp, change_inx = _FALSE; ++ ++ /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ ++ for (i = 0 ; i < 4 ; i++) { ++ for (j = i+1 ; j < 4 ; j++) { ++ /* compare CW and AIFS */ ++ if ((edca[j] & 0xFFFF) < (edca[i] & 0xFFFF)) { ++ change_inx = _TRUE; ++ } else if ((edca[j] & 0xFFFF) == (edca[i] & 0xFFFF)) { ++ /* compare TXOP */ ++ if ((edca[j] >> 16) > (edca[i] >> 16)) ++ change_inx = _TRUE; ++ } ++ ++ if (change_inx) { ++ tmp = edca[i]; ++ edca[i] = edca[j]; ++ edca[j] = tmp; ++ ++ tmp = inx[i]; ++ inx[i] = inx[j]; ++ inx[j] = tmp; ++ ++ change_inx = _FALSE; ++ } ++ } ++ } ++ } ++ ++ for (i = 0 ; i < 4 ; i++) { ++ pxmitpriv->wmm_para_seq[i] = inx[i]; ++ DBG_871X("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]); ++ } ++ ++ } ++ ++} ++ ++static void update_hw_ht_param(_adapter *padapter) ++{ ++ unsigned char max_AMPDU_len; ++ unsigned char min_MPDU_spacing; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ //handle A-MPDU parameter field ++ /* ++ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k ++ AMPDU_para [4:2]:Min MPDU Start Spacing ++ */ ++ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; ++ ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); ++ ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++ ++} ++ ++static void rtw_ap_check_scan(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u32 delta_time, lifetime; ++ struct wlan_network *pnetwork = NULL; ++ WLAN_BSSID_EX *pbss = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ u8 do_scan = _FALSE; ++ ++ lifetime = SCANQUEUE_LIFETIME; /* 20 sec */ ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ if (rtw_end_of_queue_search(phead, get_next(phead)) == _TRUE) ++ if (padapter->registrypriv.wifi_spec) ++ do_scan = _TRUE; ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ if (padapter->registrypriv.acs_auto_scan) { ++ do_scan = _TRUE; ++ rtw_acs_start(padapter, _TRUE); ++ } ++#endif ++ ++ if (_TRUE == do_scan) { ++ DBG_871X("%s : drv scans by itself and wait_completed\n", __func__); ++ rtw_drv_scan_by_self(padapter); ++ rtw_scan_wait_completed(padapter); ++ } ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ if (padapter->registrypriv.acs_auto_scan) ++ rtw_acs_start(padapter, _FALSE); ++#endif ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while (1) { ++ ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 ++ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))) { ++ delta_time = (u32) rtw_get_passing_time_ms(pnetwork->last_scanned); ++ ++ if (delta_time < lifetime) { ++ ++ uint ie_len = 0; ++ u8 *pbuf = NULL; ++ u8 *ie = NULL; ++ ++ pbss = &pnetwork->network; ++ ie = pbss->IEs; ++ ++ /*check if HT CAP INFO IE exists or not*/ ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss->IELength - _BEACON_IE_OFFSET_)); ++ if (pbuf == NULL) { ++ /* HT CAP INFO IE don't exist, it is b/g mode bss.*/ ++ ++ if (pmlmepriv->olbc == _FALSE) ++ pmlmepriv->olbc = _TRUE; ++ ++ if (pmlmepriv->olbc_ht == _FALSE) ++ pmlmepriv->olbc_ht = _TRUE; ++ } ++ } ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ pmlmepriv->num_sta_no_ht = 0; /* reset to 0 after ap do scanning*/ ++ ++} ++ ++void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter) ++{ ++ WLAN_BSSID_EX *pnetwork = &(adapter->mlmepriv.cur_network.network); ++ struct sta_info *sta = NULL; ++ ++ /* update cur_wireless_mode */ ++ update_wireless_mode(adapter); ++ ++ /* update RRSR and RTS_INIT_RATE register after set channel and bandwidth */ ++ UpdateBrateTbl(adapter, pnetwork->SupportedRates); ++ rtw_hal_set_hwreg(adapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); ++ ++ /* update capability after cur_wireless_mode updated */ ++ update_capinfo(adapter, rtw_get_capability(pnetwork)); ++ ++ /* update bc/mc sta_info */ ++ update_bmc_sta(adapter); ++ ++ /* update AP's sta info */ ++ sta = rtw_get_stainfo(&adapter->stapriv, pnetwork->MacAddress); ++ if (!sta) { ++ DBG_871X(FUNC_ADPT_FMT" !sta for macaddr="MAC_FMT"\n", FUNC_ADPT_ARG(adapter), MAC_ARG(pnetwork->MacAddress)); ++ rtw_warn_on(1); ++ return; ++ } ++ ++ update_ap_info(adapter, sta); ++} ++ ++void start_bss_network(_adapter *padapter, struct createbss_parm *parm) ++{ ++#define DUMP_ADAPTERS_STATUS 0 ++ ++ u8 val8; ++ u16 bcn_interval; ++ u32 acparm; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; /* used as input */ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ u8 req_ch, req_bw, req_offset; ++ bool ch_setting_changed = _FALSE; ++ u8 ch_to_set = 0, bw_to_set, offset_to_set; ++ u8 doiqk = _FALSE; ++ ++ if (parm->req_ch == 0) { ++ /* change to unspecificed ch, bw, offset, get from IE */ ++ goto get_cbhw_from_ie; ++ } else if (parm->req_ch > 0) { ++ /* change ch, bw, offset */ ++ req_ch = parm->req_ch; ++ req_bw = parm->req_bw; ++ req_offset = parm->req_offset; ++ goto change_chbw; ++ } ++ ++ bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; ++ ++ //check if there is wps ie, ++ //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, ++ //and at first time the security ie ( RSN/WPA IE) will not include in beacon. ++ if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) ++ { ++ pmlmeext->bstart_bss = _TRUE; ++ } ++ ++ //todo: update wmm, ht cap ++ //pmlmeinfo->WMM_enable; ++ //pmlmeinfo->HT_enable; ++ if(pmlmepriv->qospriv.qos_option) ++ pmlmeinfo->WMM_enable = _TRUE; ++#ifdef CONFIG_80211N_HT ++ if(pmlmepriv->htpriv.ht_option) ++ { ++ pmlmeinfo->WMM_enable = _TRUE; ++ pmlmeinfo->HT_enable = _TRUE; ++ //pmlmeinfo->HT_info_enable = _TRUE; ++ //pmlmeinfo->HT_caps_enable = _TRUE; ++ ++ update_hw_ht_param(padapter); ++ } ++#endif //#CONFIG_80211N_HT ++ ++#ifdef CONFIG_80211AC_VHT ++ if(pmlmepriv->vhtpriv.vht_option) { ++ pmlmeinfo->VHT_enable = _TRUE; ++ update_hw_vht_param(padapter); ++ } ++#endif //CONFIG_80211AC_VHT ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ //WEP Key will be set before this function, do not clear CAM. ++ if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) ++ flush_all_cam_entry(padapter); //clear CAM ++ } ++ ++ //set MSR to AP_Mode ++ Set_MSR(padapter, _HW_STATE_AP_); ++ ++ //Set BSSID REG ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); ++ ++ //Set EDCA param reg ++#ifdef CONFIG_CONCURRENT_MODE ++ acparm = 0x005ea42b; ++#else ++ acparm = 0x002F3217; // VO ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E4317; // VI ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ //acparm = 0x00105320; // BE ++ acparm = 0x005ea42b; ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A444; // BK ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ ++ //Set Security ++ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //Beacon Control related register ++ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); ++ ++#if 0 ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ //u32 initialgain; ++ ++ //initialgain = 0x1e; ++ ++ ++ //disable dynamic functions, such as high power, DIG ++ /*rtw_phydm_ability_backup(padapter);*/ ++ /*rtw_phydm_func_disable_all(padapter);*/ ++ ++ //turn on all dynamic functions ++ /* Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE);*/ ++ ++ /*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/ ++ ++ } ++#endif ++ ++get_cbhw_from_ie: ++ rtw_ies_get_chbw(pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs) ++ , pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs) ++ , &req_ch, &req_bw, &req_offset); ++ ++change_chbw: ++ rtw_warn_on(req_ch == 0); ++ ++ ch_setting_changed = rtw_ap_chbw_decision(padapter, req_ch, req_bw, req_offset ++ , &ch_to_set, &bw_to_set, &offset_to_set); ++ ++ //let pnetwork_mlmeext == pnetwork_mlme. ++ _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); ++ ++ rtw_start_bss_hdl_after_chbw_decided(padapter); ++ ++ #if defined(CONFIG_DFS_MASTER) ++ rtw_dfs_master_status_apply(padapter, MLME_AP_STARTED); ++ #endif ++ ++ doiqk = _TRUE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); ++ ++ if (ch_to_set != 0) ++ set_channel_bwmode(padapter, ch_to_set, offset_to_set, bw_to_set); ++ ++ doiqk = _FALSE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); ++ if (DUMP_ADAPTERS_STATUS) { ++ DBG_871X(FUNC_ADPT_FMT" done\n", FUNC_ADPT_ARG(padapter)); ++ dump_adapters_status(RTW_DBGDUMP , adapter_to_dvobj(padapter)); ++ } ++ ++ if (_TRUE == pmlmeext->bstart_bss ++ && !check_fwstate(pmlmepriv, WIFI_SITE_MONITOR) ++ && !check_fwstate(pmlmepriv, WIFI_OP_CH_SWITCHING) ++ #ifdef CONFIG_CONCURRENT_MODE ++ && !check_buddy_fwstate(padapter, WIFI_SITE_MONITOR) ++ #endif ++ ) { ++ ++ if ((pmlmepriv->olbc == _TRUE) || (pmlmepriv->olbc_ht == _TRUE)) { ++ ++ /* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */ ++ ++ pmlmepriv->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK); ++ pmlmepriv->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS; ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); ++ } ++ ++ update_beacon(padapter, _TIM_IE_, NULL, _TRUE); ++ ++ #if !defined(CONFIG_INTERRUPT_BASED_TXBCN) ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ /* other case will tx beacon when bcn interrupt coming in. */ ++ if (send_beacon(padapter) == _FAIL) ++ DBG_871X("issue_beacon, fail!\n"); ++ #endif ++ #endif /* !defined(CONFIG_INTERRUPT_BASED_TXBCN) */ ++ } ++ ++ /*Set EDCA param reg after update cur_wireless_mode & update_capinfo*/ ++ if (pregpriv->wifi_spec == 1) ++ rtw_set_hw_wmm_param(padapter); ++ ++ /*pmlmeext->bstart_bss = _TRUE;*/ ++} ++ ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) ++{ ++ int ret=_SUCCESS; ++ u8 *p; ++ u8 *pHT_caps_ie=NULL; ++ u8 *pHT_info_ie=NULL; ++ u16 cap, ht_cap=_FALSE; ++ uint ie_len = 0; ++ int group_cipher, pairwise_cipher; ++ u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; ++ int supportRateNum = 0; ++ u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; ++ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ie = pbss_network->IEs; ++ u8 vht_cap=_FALSE; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 rf_num = 0; ++ ++ /* SSID */ ++ /* Supported rates */ ++ /* DS Params */ ++ /* WLAN_EID_COUNTRY */ ++ /* ERP Information element */ ++ /* Extended supported rates */ ++ /* WPA/WPA2 */ ++ /* Wi-Fi Wireless Multimedia Extensions */ ++ /* ht_capab, ht_oper */ ++ /* WPS IE */ ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return _FAIL; ++ ++ ++ if(len>MAX_IE_SZ) ++ return _FAIL; ++ ++ pbss_network->IELength = len; ++ ++ _rtw_memset(ie, 0, MAX_IE_SZ); ++ ++ _rtw_memcpy(ie, pbuf, pbss_network->IELength); ++ ++ ++ if(pbss_network->InfrastructureMode!=Ndis802_11APMode) ++ return _FAIL; ++ ++ ++ rtw_ap_check_scan(padapter); ++ ++ ++ pbss_network->Rssi = 0; ++ ++ _rtw_memcpy(pbss_network->MacAddress, adapter_mac_addr(padapter), ETH_ALEN); ++ ++ //beacon interval ++ p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability ++ //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); ++ pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); ++ ++ //capability ++ //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); ++ //cap = le16_to_cpu(cap); ++ cap = RTW_GET_LE16(ie); ++ ++ //SSID ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); ++ pbss_network->Ssid.SsidLength = ie_len; ++ #ifdef CONFIG_P2P ++ _rtw_memcpy(padapter->wdinfo.p2p_group_ssid, pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); ++ padapter->wdinfo.p2p_group_ssid_len = pbss_network->Ssid.SsidLength; ++ #endif ++ } ++ ++ //chnnel ++ channel = 0; ++ pbss_network->Configuration.Length = 0; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ channel = *(p + 2); ++ ++ pbss_network->Configuration.DSConfig = channel; ++ ++ ++ _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); ++ // get supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate, p+2, ie_len); ++ supportRateNum = ie_len; ++ } ++ ++ //get ext_supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); ++ supportRateNum += ie_len; ++ ++ } ++ ++ network_type = rtw_check_network_type(supportRate, supportRateNum, channel); ++ ++ rtw_set_supported_rate(pbss_network->SupportedRates, network_type); ++ ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); ++ } ++ ++ //update privacy/security ++ if (cap & BIT(4)) ++ pbss_network->Privacy = 1; ++ else ++ pbss_network->Privacy = 0; ++ ++ psecuritypriv->wpa_psk = 0; ++ ++ //wpa2 ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ psecuritypriv->wpa_psk |= BIT(1); ++ ++ psecuritypriv->wpa2_group_cipher = group_cipher; ++ psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ } ++ ++ //wpa ++ ie_len = 0; ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) ++ { ++ if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ ++ psecuritypriv->wpa_psk |= BIT(0); ++ ++ psecuritypriv->wpa_group_cipher = group_cipher; ++ psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; ++ ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ break; ++ ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ ++ } ++ ++ //wmm ++ ie_len = 0; ++ pmlmepriv->qospriv.qos_option = 0; ++ if(pregistrypriv->wmm_enable) ++ { ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) ++ { ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ *(p+8) |= BIT(7);//QoS Info, support U-APSD ++ ++ /* disable all ACM bits since the WMM admission control is not supported */ ++ *(p + 10) &= ~BIT(4); /* BE */ ++ *(p + 14) &= ~BIT(4); /* BK */ ++ *(p + 18) &= ~BIT(4); /* VI */ ++ *(p + 22) &= ~BIT(4); /* VO */ ++ ++ break; ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ } ++ } ++#ifdef CONFIG_80211N_HT ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ u8 rf_type=0; ++ HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K; ++ struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ if (0) { ++ DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); ++ dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); ++ } ++ ++ pHT_caps_ie=p; ++ ++ ht_cap = _TRUE; ++ network_type |= WIRELESS_11_24N; ++ ++ rtw_ht_use_default_setting(padapter); ++ ++ /* Update HT Capabilities Info field */ ++ if (pmlmepriv->htpriv.sgi_20m == _FALSE) ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); ++ ++ if (pmlmepriv->htpriv.sgi_40m == _FALSE) ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); ++ ++ if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) ++ { ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); ++ } ++ ++ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) ++ { ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); ++ } ++ ++ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) ++ { ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); ++ } ++ ++ /* Update A-MPDU Parameters field */ ++ pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY); ++ ++ if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || ++ (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); ++ } ++ else ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); ++ } ++ ++ rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); //set Max Rx AMPDU size to 64K ++ ++ _rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element)); ++ ++ /* Update Supported MCS Set field */ ++ { ++ int i; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ /* RX MCS Bitmask */ ++ switch(rf_type) ++ { ++ case RF_1T1R: ++ case RF_1T2R: //? ++ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); ++ break; ++ case RF_2T2R: ++ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); ++ break; ++ case RF_3T3R: ++ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R); ++ break; ++ default: ++ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); ++ } ++ for (i = 0; i < 10; i++) ++ *(HT_CAP_ELE_RX_MCS_MAP(pht_cap)+i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; ++ } ++ ++#ifdef CONFIG_BEAMFORMING ++ // Use registry value to enable HT Beamforming. ++ // ToDo: use configure file to set these capability. ++ pht_cap->tx_BF_cap_info = 0; ++ ++ // HT Beamformer ++ if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) ++ { ++ // Transmit NDP Capable ++ SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); ++ // Explicit Compressed Steering Capable ++ SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); ++ // Compressed Steering Number Antennas ++ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); ++ SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num); ++ } ++ ++ // HT Beamformee ++ if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) ++ { ++ // Receive NDP Capable ++ SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); ++ // Explicit Compressed Beamforming Feedback Capable ++ SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); ++ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num); ++ } ++#endif //CONFIG_BEAMFORMING ++ ++ _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); ++ ++ if (0) { ++ DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); ++ dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); ++ } ++ } ++ ++ //parsing HT_INFO_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ pHT_info_ie=p; ++ } ++#endif //CONFIG_80211N_HT ++ switch(network_type) ++ { ++ case WIRELESS_11B: ++ pbss_network->NetworkTypeInUse = Ndis802_11DS; ++ break; ++ case WIRELESS_11G: ++ case WIRELESS_11BG: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11BG_24N: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ case WIRELESS_11A: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; ++ break; ++ default : ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ } ++ ++ pmlmepriv->cur_network.network_type = network_type; ++ ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->htpriv.ht_option = _FALSE; ++ ++ if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || ++ (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) ++ { ++ //todo: ++ //ht_cap = _FALSE; ++ } ++ ++ //ht_cap ++ if(pregistrypriv->ht_enable && ht_cap==_TRUE) ++ { ++ pmlmepriv->htpriv.ht_option = _TRUE; ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ if(pregistrypriv->ampdu_enable==1) ++ { ++ pmlmepriv->htpriv.ampdu_enable = _TRUE; ++ } ++ ++ HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); ++ ++ HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); ++ } ++#endif ++ ++#ifdef CONFIG_80211AC_VHT ++ ++ //Parsing VHT CAP IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ vht_cap = _TRUE; ++ } ++ //Parsing VHT OPERATION IE ++ ++ ++ pmlmepriv->vhtpriv.vht_option = _FALSE; ++ // if channel in 5G band, then add vht ie . ++ if ((pbss_network->Configuration.DSConfig > 14) ++ && (pmlmepriv->htpriv.ht_option == _TRUE) ++ && (pregistrypriv->vht_enable) ++ && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent)) ++ ) { ++ if(vht_cap == _TRUE) ++ { ++ pmlmepriv->vhtpriv.vht_option = _TRUE; ++ } ++ else if(pregistrypriv->vht_enable == 2) // auto enabled ++ { ++ u8 cap_len, operation_len; ++ ++ rtw_vht_use_default_setting(padapter); ++ ++ { ++ /* VHT Operation mode notifiy bit in Extended IE (127) */ ++ uint len = 0; ++ ++ SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(pmlmepriv->ext_capab_ie_data, 1); ++ pmlmepriv->ext_capab_ie_len = 10; ++ rtw_set_ie(pbss_network->IEs + pbss_network->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); ++ pbss_network->IELength += pmlmepriv->ext_capab_ie_len; ++ } ++ ++ // VHT Capabilities element ++ cap_len = rtw_build_vht_cap_ie(padapter, pbss_network->IEs + pbss_network->IELength); ++ pbss_network->IELength += cap_len; ++ ++ // VHT Operation element ++ operation_len = rtw_build_vht_operation_ie(padapter, pbss_network->IEs + pbss_network->IELength, pbss_network->Configuration.DSConfig); ++ pbss_network->IELength += operation_len; ++ ++ pmlmepriv->vhtpriv.vht_option = _TRUE; ++ } ++ } ++#endif //CONFIG_80211AC_VHT ++ ++ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); ++ ++ rtw_ies_get_chbw(pbss_network->IEs + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_ ++ , &pmlmepriv->ori_ch, &pmlmepriv->ori_bw, &pmlmepriv->ori_offset); ++ rtw_warn_on(pmlmepriv->ori_ch == 0); ++ ++{ ++ /* alloc sta_info for ap itself */ ++ ++ struct sta_info *sta; ++ ++ sta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if (!sta) { ++ sta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if (sta == NULL) ++ return _FAIL; ++ } ++} ++ ++ rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK); ++ ++ rtw_indicate_connect( padapter); ++ ++ pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon ++ ++ //update bc/mc sta_info ++ //update_bmc_sta(padapter); ++ ++ return ret; ++ ++} ++ ++void rtw_set_macaddr_acl(_adapter *padapter, int mode) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ DBG_871X("%s, mode=%d\n", __func__, mode); ++ ++ pacl_list->mode = mode; ++} ++ ++int rtw_acl_add_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 added = _FALSE; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ if((NUM_ACL-1) < pacl_list->num) ++ return (-1); ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ added = _TRUE; ++ DBG_871X("%s, sta has been added\n", __func__); ++ break; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ ++ if(added == _TRUE) ++ return ret; ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ for(i=0; i< NUM_ACL; i++) ++ { ++ paclnode = &pacl_list->aclnode[i]; ++ ++ if(paclnode->valid == _FALSE) ++ { ++ _rtw_init_listhead(&paclnode->list); ++ ++ _rtw_memcpy(paclnode->addr, addr, ETH_ALEN); ++ ++ paclnode->valid = _TRUE; ++ ++ rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q)); ++ ++ pacl_list->num++; ++ ++ break; ++ } ++ } ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ return ret; ++} ++ ++int rtw_acl_remove_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; //Baddr is used for clearing acl_list ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN) || _rtw_memcmp(baddr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ return ret; ++ ++} ++ ++u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ++ ++ psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; ++ ++ _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); ++ ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++ ++static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set_tx) ++{ ++ u8 keylen; ++ struct cmd_obj* pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); ++ int res=_SUCCESS; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ psetkeyparm->keyid=(u8)keyid; ++ if (is_wep_enc(alg)) ++ padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); ++ ++ psetkeyparm->algorithm = alg; ++ ++ psetkeyparm->set_tx = set_tx; ++ ++ switch(alg) ++ { ++ case _WEP40_: ++ keylen = 5; ++ break; ++ case _WEP104_: ++ keylen = 13; ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ case _AES_: ++ default: ++ keylen = 16; ++ } ++ ++ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++ return res; ++} ++ ++int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ return rtw_ap_set_key(padapter, key, alg, keyid, 1); ++} ++ ++int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx) ++{ ++ u8 alg; ++ ++ switch(keylen) ++ { ++ case 5: ++ alg =_WEP40_; ++ break; ++ case 13: ++ alg =_WEP104_; ++ break; ++ default: ++ alg =_NO_PRIVACY_; ++ } ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ return rtw_ap_set_key(padapter, key, alg, keyid, set_tx); ++} ++ ++u8 rtw_ap_bmc_frames_hdl(_adapter *padapter) ++{ ++#define HIQ_XMIT_COUNTS (6) ++ _irqL irqL; ++ struct sta_info *psta_bmc; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe = NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ bool update_tim = _FALSE; ++ ++ ++ if (padapter->registrypriv.wifi_spec != 1) ++ return H2C_SUCCESS; ++ ++ ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if (!psta_bmc) ++ return H2C_SUCCESS; ++ ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if ((pstapriv->tim_bitmap & BIT(0)) && (psta_bmc->sleepq_len > 0)) { ++ int tx_counts = 0; ++ ++ _update_beacon(padapter, _TIM_IE_, NULL, _FALSE, "update TIM with TIB=1"); ++ ++ DBG_871X("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len); ++ ++ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta_bmc->sleepq_len--; ++ tx_counts++; ++ ++ if (psta_bmc->sleepq_len > 0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ if (tx_counts == HIQ_XMIT_COUNTS) ++ pxmitframe->attrib.mdata = 0; ++ ++ pxmitframe->attrib.triggered = 1; ++ ++ if (xmitframe_hiq_filter(pxmitframe) == _TRUE) ++ pxmitframe->attrib.qsel = QSLT_HIGH;/*HIQ*/ ++ ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ if (tx_counts == HIQ_XMIT_COUNTS) ++ break; ++ ++ } ++ ++ } else { ++ if (psta_bmc->sleepq_len == 0) { ++ ++ /*DBG_871X("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len);*/ ++ ++ if (pstapriv->tim_bitmap & BIT(0)) ++ update_tim = _TRUE; ++ ++ pstapriv->tim_bitmap &= ~BIT(0); ++ pstapriv->sta_dz_bitmap &= ~BIT(0); ++ ++ if (update_tim == _TRUE) { ++ DBG_871X("clear TIB\n"); ++ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "bmc sleepq and HIQ empty"); ++ } ++ } ++ } ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++/* ++ //HIQ Check ++ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); ++ ++ while (_FALSE == empty && rtw_get_passing_time_ms(start) < 3000) ++ { ++ rtw_msleep_os(100); ++ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); ++ } ++ ++ ++ printk("check if hiq empty=%d\n", empty); ++*/ ++ ++ return H2C_SUCCESS; ++} ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ ++static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta, u32 sta_info_type) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ DBG_871X("%s: "MAC_FMT", updated_type=0x%x\n", __func__, MAC_ARG(psta->hwaddr), sta_info_type); ++ ++ if (sta_info_type & STA_INFO_UPDATE_BW) { ++ ++ if ((psta->flags & WLAN_STA_HT) && !psta->ht_20mhz_set) { ++ if (pmlmepriv->sw_to_20mhz) { ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ /*psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;*/ ++ psta->htpriv.sgi_40m = _FALSE; ++ } else { ++ /*TODO: Switch back to 40MHZ?80MHZ*/ ++ } ++ } ++ } ++ ++/* ++ if (sta_info_type & STA_INFO_UPDATE_RATE) { ++ ++ } ++*/ ++ ++ if (sta_info_type & STA_INFO_UPDATE_PROTECTION_MODE) ++ VCS_update(padapter, psta); ++ ++/* ++ if (sta_info_type & STA_INFO_UPDATE_CAP) { ++ ++ } ++ ++ if (sta_info_type & STA_INFO_UPDATE_HT_CAP) { ++ ++ } ++ ++ if (sta_info_type & STA_INFO_UPDATE_VHT_CAP) { ++ ++ } ++*/ ++ ++} ++ ++static void update_bcn_ext_capab_ie(_adapter *padapter) ++{ ++ sint ie_len = 0; ++ unsigned char *pbuf; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ u8 *ie = pnetwork->IEs; ++ u8 null_extcap_data[8] = {0}; ++ ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_CAP_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if (pbuf && ie_len > 0) ++ rtw_remove_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_); ++ ++ if ((pmlmepriv->ext_capab_ie_len > 0) && ++ (_rtw_memcmp(pmlmepriv->ext_capab_ie_data, null_extcap_data, sizeof(null_extcap_data)) == _FALSE)) ++ rtw_add_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_, pmlmepriv->ext_capab_ie_data, pmlmepriv->ext_capab_ie_len); ++ ++} ++ ++static void update_bcn_fixed_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_erpinfo_ie(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *p, *ie = pnetwork->IEs; ++ u32 len = 0; ++ ++ DBG_871X("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); ++ ++ if(!pmlmeinfo->ERP_enable) ++ return; ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(p && len>0) ++ { ++ PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION); ++ ++ if(pmlmepriv->num_sta_no_short_preamble > 0) ++ pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); ++ ++ ERP_IE_handler(padapter, pIE); ++ } ++ ++} ++ ++static void update_bcn_htcap_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_htinfo_ie(_adapter *padapter) ++{ ++ /* ++ u8 beacon_updated = _FALSE; ++ u32 sta_info_update_type = STA_INFO_UPDATE_NONE; ++ */ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *p, *ie = pnetwork->IEs; ++ u32 len = 0; ++ ++ if (pmlmepriv->htpriv.ht_option == _FALSE) ++ return; ++ ++ if (pmlmeinfo->HT_info_enable != 1) ++ return; ++ ++ ++ DBG_871X("%s current operation mode=0x%X\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode); ++ ++ DBG_871X("num_sta_40mhz_intolerant(%d), 20mhz_width_req(%d), intolerant_ch_rpt(%d), olbc(%d)\n", ++ pmlmepriv->num_sta_40mhz_intolerant, pmlmepriv->ht_20mhz_width_req, pmlmepriv->ht_intolerant_ch_reported, pmlmepriv->olbc); ++ ++ /*parsing HT_INFO_IE, currently only update ht_op_mode - pht_info->infos[1] & pht_info->infos[2] for wifi logo test*/ ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if (p && len > 0) { ++ struct HT_info_element *pht_info = NULL; ++ ++ pht_info = (struct HT_info_element *)(p + 2); ++ ++ /* for STA Channel Width/Secondary Channel Offset*/ ++ if ((pmlmepriv->sw_to_20mhz == 0) && (pmlmeext->cur_channel <= 14)) { ++ if ((pmlmepriv->num_sta_40mhz_intolerant > 0) || (pmlmepriv->ht_20mhz_width_req == _TRUE) ++ || (pmlmepriv->ht_intolerant_ch_reported == _TRUE) || (pmlmepriv->olbc == _TRUE)) { ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, 0); ++ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 0); ++ ++ pmlmepriv->sw_to_20mhz = 1; ++ /* ++ sta_info_update_type |= STA_INFO_UPDATE_BW; ++ beacon_updated = _TRUE; ++ */ ++ ++ DBG_871X("%s:switching to 20Mhz\n", __FUNCTION__); ++ ++ /*TODO : cur_bwmode/cur_ch_offset switches to 20Mhz*/ ++ } ++ } else { ++ ++ if ((pmlmepriv->num_sta_40mhz_intolerant == 0) && (pmlmepriv->ht_20mhz_width_req == _FALSE) ++ && (pmlmepriv->ht_intolerant_ch_reported == _FALSE) && (pmlmepriv->olbc == _FALSE)) { ++ ++ if (pmlmeext->cur_bwmode >= CHANNEL_WIDTH_40) { ++ ++ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 1); ++ ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, ++ (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ? ++ HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE : HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW); ++ ++ pmlmepriv->sw_to_20mhz = 0; ++ /* ++ sta_info_update_type |= STA_INFO_UPDATE_BW; ++ beacon_updated = _TRUE; ++ */ ++ ++ DBG_871X("%s:switching back to 40Mhz\n", __FUNCTION__); ++ } ++ } ++ } ++ ++ /* to update ht_op_mode*/ ++ *(u16 *)(pht_info->infos + 1) = cpu_to_le16(pmlmepriv->ht_op_mode); ++ ++ } ++ ++ /*associated_clients_update(padapter, beacon_updated, sta_info_update_type);*/ ++ ++} ++ ++static void update_bcn_rsn_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wpa_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wmm_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wps_ie(_adapter *padapter) ++{ ++ u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; ++ uint wps_ielen=0, wps_offset, remainder_ielen; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *ie = pnetwork->IEs; ++ u32 ielen = pnetwork->IELength; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); ++ ++ if(pwps_ie==NULL || wps_ielen==0) ++ return; ++ ++ pwps_ie_src = pmlmepriv->wps_beacon_ie; ++ if(pwps_ie_src == NULL) ++ return; ++ ++ wps_offset = (uint)(pwps_ie-ie); ++ ++ premainder_ie = pwps_ie + wps_ielen; ++ ++ remainder_ielen = ielen - wps_offset - wps_ielen; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ wps_ielen = (uint)pwps_ie_src[1];//to get ie data len ++ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); ++ pwps_ie += (wps_ielen+2); ++ ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ //update IELength ++ pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; ++ } ++ ++ if(pbackup_remainder_ie) ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ ++ // deal with the case without set_tx_beacon_cmd() in update_beacon() ++#if defined( CONFIG_INTERRUPT_BASED_TXBCN ) || defined( CONFIG_PCI_HCI ) ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ u8 sr = 0; ++ rtw_get_wps_attr_content(pwps_ie_src, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if( sr ) { ++ set_fwstate(pmlmepriv, WIFI_UNDER_WPS); ++ DBG_871X("%s, set WIFI_UNDER_WPS\n", __func__); ++ } ++ } ++#endif ++} ++ ++static void update_bcn_p2p_ie(_adapter *padapter) ++{ ++ ++} ++ ++static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if(_rtw_memcmp(RTW_WPA_OUI, oui, 4)) ++ { ++ update_bcn_wpa_ie(padapter); ++ } ++ else if(_rtw_memcmp(WMM_OUI, oui, 4)) ++ { ++ update_bcn_wmm_ie(padapter); ++ } ++ else if(_rtw_memcmp(WPS_OUI, oui, 4)) ++ { ++ update_bcn_wps_ie(padapter); ++ } ++ else if(_rtw_memcmp(P2P_OUI, oui, 4)) ++ { ++ update_bcn_p2p_ie(padapter); ++ } ++ else ++ { ++ DBG_871X("unknown OUI type!\n"); ++ } ++ ++ ++} ++ ++void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv; ++ struct mlme_ext_priv *pmlmeext; ++ //struct mlme_ext_info *pmlmeinfo; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if(!padapter) ++ return; ++ ++ pmlmepriv = &(padapter->mlmepriv); ++ pmlmeext = &(padapter->mlmeextpriv); ++ //pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(_FALSE == pmlmeext->bstart_bss) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++ switch(ie_id) ++ { ++ case 0xFF: ++ ++ update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability ++ ++ break; ++ ++ case _TIM_IE_: ++ ++ update_BCNTIM(padapter); ++ ++ break; ++ ++ case _ERPINFO_IE_: ++ ++ update_bcn_erpinfo_ie(padapter); ++ ++ break; ++ ++ case _HT_CAPABILITY_IE_: ++ ++ update_bcn_htcap_ie(padapter); ++ ++ break; ++ ++ case _RSN_IE_2_: ++ ++ update_bcn_rsn_ie(padapter); ++ ++ break; ++ ++ case _HT_ADD_INFO_IE_: ++ ++ update_bcn_htinfo_ie(padapter); ++ ++ break; ++ ++ case _EXT_CAP_IE_: ++ ++ update_bcn_ext_capab_ie(padapter); ++ ++ break; ++ ++ case _VENDOR_SPECIFIC_IE_: ++ ++ update_bcn_vendor_spec_ie(padapter, oui); ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++ pmlmepriv->update_bcn = _TRUE; ++ ++ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ if(tx) ++ { ++ //send_beacon(padapter);//send_beacon must execute on TSR level ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag); ++ set_tx_beacon_cmd(padapter); ++ } ++#else ++ { ++ //PCI will issue beacon when BCN interrupt occurs. ++ } ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++} ++ ++#ifdef CONFIG_80211N_HT ++ ++void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len) ++{ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ uint frame_body_len = frame_len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 category, action; ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if (psta == NULL) ++ return; ++ ++ ++ category = frame_body[0]; ++ action = frame_body[1]; ++ ++ if (frame_body_len > 0) { ++ if ((frame_body[2] == EID_BSSCoexistence) && (frame_body[3] > 0)) { ++ u8 ie_data = frame_body[4]; ++ ++ if (ie_data & RTW_WLAN_20_40_BSS_COEX_40MHZ_INTOL) { ++ if (psta->ht_40mhz_intolerant == 0) { ++ psta->ht_40mhz_intolerant = 1; ++ pmlmepriv->num_sta_40mhz_intolerant++; ++ beacon_updated = _TRUE; ++ } ++ } else if (ie_data & RTW_WLAN_20_40_BSS_COEX_20MHZ_WIDTH_REQ) { ++ if (pmlmepriv->ht_20mhz_width_req == _FALSE) { ++ pmlmepriv->ht_20mhz_width_req = _TRUE; ++ beacon_updated = _TRUE; ++ } ++ } else ++ beacon_updated = _FALSE; ++ } ++ } ++ ++ if (frame_body_len > 8) { ++ /* if EID_BSSIntolerantChlReport ie exists */ ++ if ((frame_body[5] == EID_BSSIntolerantChlReport) && (frame_body[6] > 0)) { ++ /*todo:*/ ++ if (pmlmepriv->ht_intolerant_ch_reported == _FALSE) { ++ pmlmepriv->ht_intolerant_ch_reported = _TRUE; ++ beacon_updated = _TRUE; ++ } ++ } ++ } ++ ++ if (beacon_updated) { ++ ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ ++ associated_stainfo_update(padapter, psta, STA_INFO_UPDATE_BW); ++ } ++ ++ ++ ++} ++ ++void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field) ++{ ++ u8 e_field, m_field; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ psta = rtw_get_stainfo(pstapriv, ta); ++ if (psta == NULL) ++ return; ++ ++ e_field = (ctrl_field & BIT(0)) ? 1 : 0; ++ m_field = (ctrl_field & BIT(1)) ? 1 : 0; ++ ++ if (e_field) { ++ ++ /* enable */ ++ /* 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ ++ ++ if (m_field) /*mode*/ ++ psta->htpriv.smps_cap = 1; ++ else ++ psta->htpriv.smps_cap = 0; ++ } else { ++ /*disable*/ ++ psta->htpriv.smps_cap = 3; ++ } ++ ++ rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); ++ ++} ++ ++/* ++op_mode ++Set to 0 (HT pure) under the followign conditions ++ - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or ++ - all STAs in the BSS are 20 MHz HT in 20 MHz BSS ++Set to 1 (HT non-member protection) if there may be non-HT STAs ++ in both the primary and the secondary channel ++Set to 2 if only HT STAs are associated in BSS, ++ however and at least one 20 MHz HT STA is associated ++Set to 3 (HT mixed mode) when one or more non-HT STAs are associated ++ (currently non-GF HT station is considered as non-HT STA also) ++*/ ++static int rtw_ht_operation_update(_adapter *padapter) ++{ ++ u16 cur_op_mode, new_op_mode; ++ int op_mode_changes = 0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ ++ if (pmlmepriv->htpriv.ht_option == _FALSE) ++ return 0; ++ ++ /*if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) ++ return 0;*/ ++ ++ DBG_871X("%s current operation mode=0x%X\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode); ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) ++ && pmlmepriv->num_sta_ht_no_gf) { ++ pmlmepriv->ht_op_mode |= ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && ++ pmlmepriv->num_sta_ht_no_gf == 0) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } ++ ++ /* Note: currently we switch to the MIXED op mode if HT non-greenfield ++ * station is associated. Probably it's a theoretical case, since ++ * it looks like all known HT STAs support greenfield. ++ */ ++ new_op_mode = 0; ++ if (pmlmepriv->num_sta_no_ht /*|| ++ (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)*/) ++ new_op_mode = OP_MODE_MIXED; ++ else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ++ && pmlmepriv->num_sta_ht_20mhz) ++ new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; ++ else if (pmlmepriv->olbc_ht) ++ new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; ++ else ++ new_op_mode = OP_MODE_PURE; ++ ++ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ if (cur_op_mode != new_op_mode) { ++ pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ pmlmepriv->ht_op_mode |= new_op_mode; ++ op_mode_changes++; ++ } ++ ++ DBG_871X("%s new operation mode=0x%X changes=%d\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); ++ ++ return op_mode_changes; ++ ++} ++ ++#endif /* CONFIG_80211N_HT */ ++ ++void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type) ++{ ++ //update associcated stations cap. ++ if(updated == _TRUE) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ associated_stainfo_update(padapter, psta, sta_info_type); ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && ++ !psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 1; ++ pmlmepriv->num_sta_no_short_preamble++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ ++ if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) ++ { ++ if(!psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 1; ++ ++ pmlmepriv->num_sta_no_short_preamble++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ ++#if 0 ++ if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { ++ psta->nonerp_set = 1; ++ pmlmepriv->num_sta_non_erp++; ++ if (pmlmepriv->num_sta_non_erp == 1) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(psta->flags & WLAN_STA_NONERP) ++ { ++ if(!psta->nonerp_set) ++ { ++ psta->nonerp_set = 1; ++ ++ pmlmepriv->num_sta_non_erp++; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ else ++ { ++ if(psta->nonerp_set) ++ { ++ psta->nonerp_set = 0; ++ ++ pmlmepriv->num_sta_non_erp--; ++ ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && ++ !psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 1; ++ pmlmepriv->num_sta_no_short_slot_time++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) ++ { ++ if(!psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 1; ++ ++ pmlmepriv->num_sta_no_short_slot_time++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->flags & WLAN_STA_HT) ++ { ++ u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); ++ ++ DBG_871X("HT: STA " MAC_FMT " HT Capabilities " ++ "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { ++ if (!psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 1; ++ pmlmepriv->num_sta_ht_no_gf++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - no " ++ "greenfield, num of non-gf stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_no_gf); ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { ++ if (!psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 1; ++ pmlmepriv->num_sta_ht_20mhz++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " ++ "num of 20MHz HT STAs %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_20mhz); ++ } ++ ++ ++ if (ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) { ++ ++ if (!psta->ht_40mhz_intolerant) { ++ psta->ht_40mhz_intolerant = 1; ++ pmlmepriv->num_sta_40mhz_intolerant++; ++ DBG_871X("%s STA " MAC_FMT " - HT_CAP_40MHZ_INTOLERANT is set\n" , ++ __FUNCTION__, MAC_ARG(psta->hwaddr)); ++ beacon_updated = _TRUE; ++ } ++ ++/* ++ if (pmlmepriv->ht_40mhz_intolerant == _FALSE) { ++ ++ pmlmepriv->ht_40mhz_intolerant = _TRUE; ++ ++ DBG_871X("%s STA " MAC_FMT " - HT_CAP_40MHZ_INTOLERANT is set\n" , ++ __FUNCTION__, MAC_ARG(psta->hwaddr)); ++ ++ beacon_updated = _TRUE; ++ } ++*/ ++ ++ /*update ext_capab_ie_len & ext_capab_ie_data for beacon, probersp, assocrsp.*/ ++ if (pmlmepriv->ext_capab_ie_len == 0) ++ pmlmepriv->ext_capab_ie_len = 1; ++ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 1); ++ ++ update_beacon(padapter, _EXT_CAP_IE_, NULL, _FALSE); ++ } ++ ++ } ++ else ++ { ++ if (!psta->no_ht_set) { ++ psta->no_ht_set = 1; ++ pmlmepriv->num_sta_no_ht++; ++ } ++ if(pmlmepriv->htpriv.ht_option == _TRUE) { ++ DBG_871X("%s STA " MAC_FMT ++ " - no HT, num of non-HT stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_no_ht); ++ } ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ /*beacon_updated = _TRUE;*/ ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ //update associcated stations cap. ++ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++} ++ ++u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 0; ++ pmlmepriv->num_sta_no_short_preamble--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_preamble == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->nonerp_set) { ++ psta->nonerp_set = 0; ++ pmlmepriv->num_sta_non_erp--; ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 0; ++ pmlmepriv->num_sta_no_short_slot_time--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_slot_time == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 0; ++ pmlmepriv->num_sta_ht_no_gf--; ++ } ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if (psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 0; ++ pmlmepriv->num_sta_ht_20mhz--; ++ } ++ ++ if (psta->ht_40mhz_intolerant) { ++ psta->ht_40mhz_intolerant = 0; ++ pmlmepriv->num_sta_40mhz_intolerant--; ++ ++ /*update ext_capab_ie_len & ext_capab_ie_data for beacon, probersp, assocrsp.*/ ++ if ((pmlmepriv->ext_capab_ie_len > 0) && (pmlmepriv->num_sta_40mhz_intolerant == 0)) { ++ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 0); ++ update_beacon(padapter, _EXT_CAP_IE_, NULL, _FALSE); ++ } ++ ++ beacon_updated = _TRUE; ++ ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ /* update associated stations cap. ++ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); //move it to avoid deadlock ++ */ ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++ return beacon_updated; ++ ++} ++ ++u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue) ++{ ++ _irqL irqL; ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (active == _TRUE) ++ { ++#ifdef CONFIG_80211N_HT ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ ++#endif //CONFIG_80211N_HT ++ ++ issue_deauth(padapter, psta->hwaddr, reason); ++ } ++ ++#ifdef CONFIG_BEAMFORMING ++ beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->hwaddr, ETH_ALEN, 1); ++#endif ++ ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ //clear cam entry / key ++ rtw_clearstakey_cmd(padapter, psta, enqueue); ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state &= ~_FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ if (1) { ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ ++ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ } else ++ #endif //CONFIG_IOCTL_CFG80211 ++ { ++ rtw_indicate_sta_disassoc_event(padapter, psta); ++ } ++ ++ report_del_sta_event(padapter, psta->hwaddr, reason, enqueue); ++ ++ beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ return beacon_updated; ++ ++} ++ ++int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ DBG_871X(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ /* for each sta in asoc_queue */ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); ++ psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); ++ ++ return ret; ++} ++ ++int rtw_sta_flush(_adapter *padapter, bool enqueue) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret = 0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 flush_num = 0; ++ char flush_list[NUM_STA]; ++ int i; ++ ++ if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); ++ ++ /* pick sta from sta asoc_queue */ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) ++ flush_list[flush_num++] = stainfo_offset; ++ else ++ rtw_warn_on(1); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ /* call ap_free_sta() for each sta picked */ ++ for (i = 0; i < flush_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, flush_list[i]); ++ ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, enqueue); ++ } ++ ++ issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ associated_clients_update(padapter, _TRUE, STA_INFO_UPDATE_ALL); ++ ++ return ret; ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void sta_info_update(_adapter *padapter, struct sta_info *psta) ++{ ++ int flags = psta->flags; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ //update wmm cap. ++ if(WLAN_STA_WME&flags) ++ psta->qos_option = 1; ++ else ++ psta->qos_option = 0; ++ ++ if(pmlmepriv->qospriv.qos_option == 0) ++ psta->qos_option = 0; ++ ++ ++#ifdef CONFIG_80211N_HT ++ //update 802.11n ht cap. ++ if(WLAN_STA_HT&flags) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ psta->qos_option = 1; ++ ++ psta->htpriv.smps_cap = (psta->htpriv.ht_cap.cap_info & IEEE80211_HT_CAP_SM_PS)>>2; ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->htpriv.ht_option == _FALSE) ++ psta->htpriv.ht_option = _FALSE; ++#endif ++ ++#ifdef CONFIG_80211AC_VHT ++ //update 802.11AC vht cap. ++ if(WLAN_STA_VHT&flags) ++ { ++ psta->vhtpriv.vht_option = _TRUE; ++ } ++ else ++ { ++ psta->vhtpriv.vht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->vhtpriv.vht_option == _FALSE) ++ psta->vhtpriv.vht_option = _FALSE; ++#endif ++ ++ ++ update_sta_info_apmode(padapter, psta); ++ ++ ++} ++ ++/* called >= TSR LEVEL for USB or SDIO Interface*/ ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) ++{ ++ if (psta->state & _FW_LINKED) { ++ //add ratid ++ add_RATid(padapter, psta, 0);//DM_RATR_STA_INIT ++ } ++} ++/* restore hw setting from sw data structures */ ++void rtw_ap_restore_network(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ rtw_setopmode_cmd(padapter, Ndis802_11APMode,_FALSE); ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ rtw_startbss_cmd(padapter, RTW_CMDF_DIRECTLY); ++ ++ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ /* restore group key, WEP keys is restored in ips_leave() */ ++ rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0,_FALSE); ++ } ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ for (i = 0; i < chk_alive_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ ++ if (psta == NULL) { ++ DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); ++ } else if (psta->state &_FW_LINKED) { ++ rtw_sta_media_status_rpt(padapter, psta, 1); ++ Update_RA_Entry(padapter, psta); ++ //pairwise key ++ /* per sta pairwise key and settings */ ++ if( (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY,_FALSE); ++ } ++ } ++ } ++ ++} ++ ++void start_ap_mode(_adapter *padapter) ++{ ++ int i; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ ++ /*init_mlme_ap_info(padapter);*/ ++ ++ pmlmeext->bstart_bss = _FALSE; ++ ++ pmlmepriv->num_sta_non_erp = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble = 0; ++ ++ pmlmepriv->num_sta_ht_no_gf = 0; ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->num_sta_no_ht = 0; ++#endif //CONFIG_80211N_HT ++ pmlmeinfo->HT_info_enable = 0; ++ pmlmeinfo->HT_caps_enable = 0; ++ pmlmeinfo->HT_enable = 0; ++ ++ pmlmepriv->num_sta_ht_20mhz = 0; ++ pmlmepriv->num_sta_40mhz_intolerant = 0; ++ pmlmepriv->olbc = _FALSE; ++ pmlmepriv->olbc_ht = _FALSE; ++ ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->ht_20mhz_width_req = _FALSE; ++ pmlmepriv->ht_intolerant_ch_reported = _FALSE; ++ pmlmepriv->ht_op_mode = 0; ++ pmlmepriv->sw_to_20mhz = 0; ++#endif ++ ++ _rtw_memset(pmlmepriv->ext_capab_ie_data, 0, sizeof(pmlmepriv->ext_capab_ie_data)); ++ pmlmepriv->ext_capab_ie_len = 0; ++ ++ for (i = 0 ; i < NUM_STA ; i++) ++ pstapriv->sta_aid[i] = NULL; ++ ++ //for ACL ++ _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); ++ pacl_list->num = 0; ++ pacl_list->mode = 0; ++ for(i = 0; i < NUM_ACL; i++) ++ { ++ _rtw_init_listhead(&pacl_list->aclnode[i].list); ++ pacl_list->aclnode[i].valid = _FALSE; ++ } ++ ++} ++ ++void stop_ap_mode(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ padapter->netif_up = _FALSE; ++ //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++ //reset and init security priv , this can refine with rtw_reset_securitypriv ++ _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ #ifdef CONFIG_DFS_MASTER ++ rtw_dfs_master_status_apply(padapter, MLME_AP_STOPPED); ++ #endif ++ ++ /* free scan queue */ ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ //for ACL ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, free acl_node_queue, num=%d\n", __func__, pacl_list->num); ++ ++ rtw_sta_flush(padapter, _TRUE); ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ psta = rtw_get_bcmc_stainfo(padapter); ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ rtw_init_bcmc_stainfo(padapter); ++ ++ rtw_free_mlme_priv_ie_data(pmlmepriv); ++ ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_MediaStatusNotify(padapter, 0); //disconnect ++#endif ++ ++} ++ ++#endif //CONFIG_NATIVEAP_MLME ++ ++void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset) ++{ ++#define UPDATE_VHT_CAP 1 ++#define UPDATE_HT_CAP 1 ++ ++#ifdef CONFIG_80211AC_VHT ++ { ++ struct vht_priv *vhtpriv = &adapter->mlmepriv.vhtpriv; ++ u8 *vht_cap_ie, *vht_op_ie; ++ int vht_cap_ielen, vht_op_ielen; ++ u8 center_freq; ++ ++ vht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ vht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ center_freq = rtw_get_center_ch(ch, bw, offset); ++ ++ /* update vht cap ie */ ++ if (vht_cap_ie && vht_cap_ielen) { ++ #if UPDATE_VHT_CAP ++ /* if ((bw == CHANNEL_WIDTH_160 || bw == CHANNEL_WIDTH_80_80) && pvhtpriv->sgi_160m) ++ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvht_cap_ie + 2, 1); ++ else */ ++ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(vht_cap_ie + 2, 0); ++ ++ if (bw >= CHANNEL_WIDTH_80 && vhtpriv->sgi_80m) ++ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 1); ++ else ++ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 0); ++ #endif ++ } ++ ++ /* update vht op ie */ ++ if (vht_op_ie && vht_op_ielen) { ++ if (bw < CHANNEL_WIDTH_80) { ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); ++ } else if (bw == CHANNEL_WIDTH_80) { ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 1); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, center_freq); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); ++ } else { ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(adapter), bw); ++ rtw_warn_on(1); ++ } ++ } ++ } ++#endif /* CONFIG_80211AC_VHT */ ++#ifdef CONFIG_80211N_HT ++ { ++ struct ht_priv *htpriv = &adapter->mlmepriv.htpriv; ++ u8 *ht_cap_ie, *ht_op_ie; ++ int ht_cap_ielen, ht_op_ielen; ++ ++ ht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTCapability, &ht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ ht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTInfo, &ht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ ++ /* update ht cap ie */ ++ if (ht_cap_ie && ht_cap_ielen) { ++ #if UPDATE_HT_CAP ++ if (bw >= CHANNEL_WIDTH_40) ++ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 1); ++ else ++ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 0); ++ ++ if (bw >= CHANNEL_WIDTH_40 && htpriv->sgi_40m) ++ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 1); ++ else ++ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 0); ++ ++ if (htpriv->sgi_20m) ++ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 1); ++ else ++ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 0); ++ #endif ++ } ++ ++ /* update ht op ie */ ++ if (ht_op_ie && ht_op_ielen) { ++ SET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2, ch); ++ switch (offset) { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCA); ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCB); ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCN); ++ break; ++ } ++ ++ if (bw >= CHANNEL_WIDTH_40) ++ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 1); ++ else ++ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 0); ++ } ++ } ++#endif /* CONFIG_80211N_HT */ ++ ++{ ++ u8 *p; ++ int ie_len; ++ u8 old_ch = bss->Configuration.DSConfig; ++ bool change_band = _FALSE; ++ ++ if ((ch <= 14 && old_ch >= 36) || (ch >= 36 && old_ch <= 14)) ++ change_band = _TRUE; ++ ++ /* update channel in IE */ ++ p = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if (p && ie_len > 0) ++ *(p + 2) = ch; ++ ++ bss->Configuration.DSConfig = ch; ++ ++ /* band is changed, update ERP, support rate, ext support rate IE */ ++ if (change_band == _TRUE) ++ change_band_update_ie(adapter, bss, ch); ++} ++ ++} ++ ++bool rtw_ap_chbw_decision(_adapter *adapter, u8 req_ch, u8 req_bw, u8 req_offset ++ , u8 *ch, u8 *bw, u8 *offset) ++{ ++ u8 dec_ch, dec_bw, dec_offset; ++ u8 u_ch = 0, u_offset, u_bw; ++ bool changed = _FALSE; ++ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); ++ u8 sta_num; ++ u8 ld_sta_num; ++ u8 lg_sta_num; ++ u8 ap_num; ++ u8 ld_ap_num; ++ bool set_u_ch = _FALSE, set_dec_ch = _FALSE; ++ ++ dec_ch = req_ch; ++ dec_bw = req_bw; ++ dec_offset = req_offset; ++ ++ rtw_dev_iface_status_no_self(adapter, &sta_num, &ld_sta_num, &lg_sta_num, &ap_num, &ld_ap_num); ++ DBG_871X(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num%u, ap_num:%u\n" ++ , FUNC_ADPT_ARG(adapter), ld_sta_num, lg_sta_num, ap_num); ++ ++ if (ld_sta_num || ap_num) { ++ /* has linked STA or AP mode, follow */ ++ ++ rtw_warn_on(!rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); ++ ++ DBG_871X(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); ++ ++ rtw_adjust_chbw(adapter, u_ch, &dec_bw, &dec_offset); ++ ++ rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset ++ , &u_ch, &u_bw, &u_offset); ++ ++ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) ++ , dec_ch, dec_bw, dec_offset); ++ ++ set_u_ch = _TRUE; ++ } else if (lg_sta_num) { ++ /* has linking STA */ ++ ++ rtw_warn_on(!rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); ++ ++ DBG_871X(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); ++ ++ rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); ++ ++ if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch, dec_bw, dec_offset)) { ++ ++ rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset ++ , &u_ch, &u_bw, &u_offset); ++ ++ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) ++ , dec_ch, dec_bw, dec_offset); ++ ++ set_u_ch = _TRUE; ++ } else { ++ /* set this for possible ch change when join down*/ ++ set_fwstate(&adapter->mlmepriv, WIFI_OP_CH_SWITCHING); ++ } ++ } else { ++ /* single AP mode */ ++ ++ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); ++ rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); ++ ++ #if defined(CONFIG_DFS_MASTER) ++ /* check NOL */ ++ if (rtw_chset_is_ch_non_ocp(mlmeext->channel_set, dec_ch, dec_bw, dec_offset)) { ++ /* choose 5G DFS channel for debug */ ++ if (adapter_to_rfctl(adapter)->dbg_dfs_master_choose_dfs_ch_first ++ && rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_NON_DFS) == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT" choose 5G DFS channel for debug\n", FUNC_ADPT_ARG(adapter)); ++ } else ++ /* choose from 5G no DFS */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_DFS) == _FALSE) { ++ /* including 5G DFS, not long CAC */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_LONG_CAC) == _FALSE) { ++ /* including 5G DFS, long CAC */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G) == _FALSE) { ++ /* including 2.4G channel */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_5G) == _FALSE) { ++ DBG_871X(FUNC_ADPT_FMT" no available ch\n", FUNC_ADPT_ARG(adapter)); ++ rtw_warn_on(1); ++ } ++ } ++ } ++ } ++ } ++ #endif /* defined(CONFIG_DFS_MASTER) */ ++ ++ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) ++ , dec_ch, dec_bw, dec_offset); ++ ++ set_dec_ch = _TRUE; ++ } ++ ++ if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) ++ #ifdef CONFIG_CONCURRENT_MODE ++ || check_buddy_fwstate(adapter, _FW_UNDER_SURVEY) ++ #endif ++ ) { ++ /* scanning, leave ch setting to scan state machine */ ++ set_u_ch = set_dec_ch = _FALSE; ++ } ++ ++ if (mlmeext->cur_channel != dec_ch ++ || mlmeext->cur_bwmode != dec_bw ++ || mlmeext->cur_ch_offset != dec_offset) ++ changed = _TRUE; ++ ++ if (changed == _TRUE && rtw_linked_check(adapter) == _TRUE) { ++ #ifdef CONFIG_SPCT_CH_SWITCH ++ if (1) ++ rtw_ap_inform_ch_switch(adapter, dec_ch, dec_offset); ++ else ++ #endif ++ rtw_sta_flush(adapter, _FALSE); ++ } ++ ++ mlmeext->cur_channel = dec_ch; ++ mlmeext->cur_bwmode = dec_bw; ++ mlmeext->cur_ch_offset = dec_offset; ++ ++ if (u_ch != 0) ++ DBG_871X(FUNC_ADPT_FMT" union: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ ++ DBG_871X(FUNC_ADPT_FMT" dec: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset); ++ ++ if (set_u_ch == _TRUE) { ++ *ch = u_ch; ++ *bw = u_bw; ++ *offset = u_offset; ++ } else if (set_dec_ch == _TRUE) { ++ *ch = dec_ch; ++ *bw = dec_bw; ++ *offset = dec_offset; ++ } ++ ++ return changed; ++} ++ ++#endif //CONFIG_AP_MODE ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_beamforming.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_beamforming.c new file mode 100644 -index 000000000..854f8ef08 +index 0000000..0b52972 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_beamforming.c @@ -0,0 +1,1244 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#define _RTW_BEAMFORMING_C_ -+ -+#include -+#include -+ -+#ifdef CONFIG_BEAMFORMING -+ -+#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ -+struct beamforming_entry *beamforming_get_entry_by_addr(struct mlme_priv *pmlmepriv, u8* ra,u8* idx) -+{ -+ u8 i = 0; -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ -+ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) -+ { -+ if( pBeamInfo->beamforming_entry[i].bUsed && -+ (_rtw_memcmp(ra,pBeamInfo->beamforming_entry[i].mac_addr, ETH_ALEN))) -+ { -+ *idx = i; -+ return &(pBeamInfo->beamforming_entry[i]); -+ } -+ } -+ -+ return NULL; -+} -+ -+BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id) -+{ -+ u8 i = 0; -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((struct mlme_priv *)pmlmepriv); -+ BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; -+ -+ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) -+ { -+ if( pBeamInfo->beamforming_entry[i].bUsed && -+ (mac_id == pBeamInfo->beamforming_entry[i].mac_id)) -+ { -+ BeamformEntryCap = pBeamInfo->beamforming_entry[i].beamforming_entry_cap; -+ i = BEAMFORMING_ENTRY_NUM; -+ } -+ } -+ -+ return BeamformEntryCap; -+} -+ -+struct beamforming_entry *beamforming_get_free_entry(struct mlme_priv *pmlmepriv, u8* idx) -+{ -+ u8 i = 0; -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ -+ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) -+ { -+ if(pBeamInfo->beamforming_entry[i].bUsed == _FALSE) -+ { -+ *idx = i; -+ return &(pBeamInfo->beamforming_entry[i]); -+ } -+ } -+ return NULL; -+} -+ -+ -+struct beamforming_entry *beamforming_add_entry(PADAPTER adapter, u8* ra, u16 aid, -+ u16 mac_id, CHANNEL_WIDTH bw, BEAMFORMING_CAP beamfrom_cap, u8* idx) -+{ -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct beamforming_entry *pEntry = beamforming_get_free_entry(pmlmepriv, idx); -+ -+ if(pEntry != NULL) -+ { -+ pEntry->bUsed = _TRUE; -+ pEntry->aid = aid; -+ pEntry->mac_id = mac_id; -+ pEntry->sound_bw = bw; -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) -+ { -+ u16 BSSID = ((*(adapter_mac_addr(adapter) + 5) & 0xf0) >> 4) ^ -+ (*(adapter_mac_addr(adapter) + 5) & 0xf); /* BSSID[44:47] xor BSSID[40:43] */ -+ pEntry->p_aid = (aid + BSSID * 32) & 0x1ff; // (dec(A) + dec(B)*32) mod 512 -+ pEntry->g_id = 63; -+ } -+ else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) -+ { -+ pEntry->p_aid = 0; -+ pEntry->g_id = 63; -+ } -+ else -+ { -+ pEntry->p_aid = ra[5]; // BSSID[39:47] -+ pEntry->p_aid = (pEntry->p_aid << 1) | (ra[4] >> 7 ); -+ pEntry->g_id = 0; -+ } -+ _rtw_memcpy(pEntry->mac_addr, ra, ETH_ALEN); -+ pEntry->bSound = _FALSE; -+ -+ //3 TODO SW/FW sound period -+ pEntry->sound_period = 200; -+ pEntry->beamforming_entry_cap = beamfrom_cap; -+ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ -+ -+ pEntry->PreLogSeq = 0; /*Modified by Jeffery @2015-04-13*/ -+ pEntry->LogSeq = 0; /*Modified by Jeffery @2014-10-29*/ -+ pEntry->LogRetryCnt = 0; /*Modified by Jeffery @2014-10-29*/ -+ pEntry->LogSuccess = 0; /*LogSuccess is NOT needed to be accumulated, so LogSuccessCnt->LogSuccess, 2015-04-13, Jeffery*/ -+ pEntry->ClockResetTimes = 0; /*Modified by Jeffery @2015-04-13*/ -+ pEntry->LogStatusFailCnt = 0; -+ -+ return pEntry; -+ } -+ else -+ return NULL; -+} -+ -+BOOLEAN beamforming_remove_entry(struct mlme_priv *pmlmepriv, u8* ra, u8* idx) -+{ -+ struct beamforming_entry *pEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); -+ -+ if(pEntry != NULL) -+ { -+ pEntry->bUsed = _FALSE; -+ pEntry->beamforming_entry_cap = BEAMFORMING_CAP_NONE; -+ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ return _TRUE; -+ } -+ else -+ return _FALSE; -+} -+ -+/* Used for BeamformingStart_V1 */ -+void beamforming_dym_ndpa_rate(PADAPTER adapter) -+{ -+ u16 NDPARate = MGN_6M; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ -+ if(pHalData->MinUndecoratedPWDBForDM > 30) // link RSSI > 30% -+ NDPARate = MGN_24M; -+ else -+ NDPARate = MGN_6M; -+ -+ //BW = CHANNEL_WIDTH_20; -+ NDPARate = NDPARate << 8; -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_RATE, (u8 *)&NDPARate); -+} -+ -+void beamforming_dym_period(PADAPTER Adapter) -+{ -+ u8 Idx; -+ BOOLEAN bChangePeriod = _FALSE; -+ u16 SoundPeriod_SW, SoundPeriod_FW; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); -+ struct beamforming_entry *pBeamformEntry; -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &Adapter->mlmepriv)); -+ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); -+ -+ //3 TODO per-client throughput caculation. -+ -+ if(pdvobjpriv->traffic_stat.cur_tx_tp + pdvobjpriv->traffic_stat.cur_rx_tp > 2) -+ { -+ SoundPeriod_SW = 32*20; -+ SoundPeriod_FW = 2; -+ } -+ else -+ { -+ SoundPeriod_SW = 32*2000; -+ SoundPeriod_FW = 200; -+ } -+ -+ for(Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) -+ { -+ pBeamformEntry = pBeamInfo->beamforming_entry+Idx; -+ if(pBeamformEntry->bDefaultCSI) -+ { -+ SoundPeriod_SW = 32*2000; -+ SoundPeriod_FW = 200; -+ } -+ -+ if(pBeamformEntry->beamforming_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) -+ { -+ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) -+ { -+ if(pBeamformEntry->sound_period != SoundPeriod_FW) -+ { -+ pBeamformEntry->sound_period = SoundPeriod_FW; -+ bChangePeriod = _TRUE; // Only FW sounding need to send H2C packet to change sound period. -+ } -+ } -+ else if(pBeamformEntry->sound_period != SoundPeriod_SW) -+ { -+ pBeamformEntry->sound_period = SoundPeriod_SW; -+ } -+ } -+ } -+ -+ if(bChangePeriod) -+ rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&Idx); -+} -+ -+BOOLEAN issue_ht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ u8 aSifsTime = 0; -+ u8 NDPTxRate = 0; -+ -+ DBG_871X("%s: issue_ht_sw_ndpa_packet!\n", __func__); -+ -+ NDPTxRate = MGN_MCS8; -+ DBG_871X("%s: NDPTxRate =%d\n", __func__, NDPTxRate); -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) -+ return _FALSE; -+ -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(Adapter, pattrib); -+ pattrib->qsel = QSLT_MGNT; -+ pattrib->rate = NDPTxRate; -+ pattrib->bwmode = bw; -+ pattrib->order = 1; -+ pattrib->subtype = WIFI_ACTION_NOACK; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ SetOrderBit(pframe); -+ SetFrameSubType(pframe, WIFI_ACTION_NOACK); -+ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) -+ aSifsTime = 10; -+ else -+ aSifsTime = 16; -+ -+ duration = 2*aSifsTime + 40; -+ -+ if (bw == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ SetDuration(pframe, duration); -+ -+ /*HT control field*/ -+ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); -+ -+ _rtw_memcpy(pframe+28, ActionHdr, 4); -+ -+ pattrib->pktlen = 32; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ -+ return _TRUE; -+ -+ -+} -+BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ u8 aSifsTime = 0; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) -+ return _FALSE; -+ -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(Adapter, pattrib); -+ -+ if (qidx == BCN_QUEUE_INX) -+ pattrib->qsel = QSLT_BEACON; -+ pattrib->rate = MGN_MCS8; -+ pattrib->bwmode = bw; -+ pattrib->order = 1; -+ pattrib->subtype = WIFI_ACTION_NOACK; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ SetOrderBit(pframe); -+ SetFrameSubType(pframe, WIFI_ACTION_NOACK); -+ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) -+ aSifsTime = 10; -+ else -+ aSifsTime = 16; -+ -+ duration = 2*aSifsTime + 40; -+ -+ if(bw == CHANNEL_WIDTH_40) -+ duration+= 87; -+ else -+ duration+= 180; -+ -+ SetDuration(pframe, duration); -+ -+ //HT control field -+ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); -+ -+ _rtw_memcpy(pframe+28, ActionHdr, 4); -+ -+ pattrib->pktlen = 32; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) -+{ -+ return issue_ht_ndpa_packet(Adapter, ra, bw, qidx); -+} -+BOOLEAN issue_vht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ struct rtw_ndpa_sta_info sta_info; -+ u8 NDPTxRate = 0; -+ -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ u8 sequence = 0, aSifsTime = 0; -+ -+ DBG_871X("%s: issue_vht_sw_ndpa_packet!\n", __func__); -+ -+ -+ NDPTxRate = MGN_VHT2SS_MCS0; -+ DBG_871X("%s: NDPTxRate =%d\n", __func__, NDPTxRate); -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ DBG_871X("%s, alloc mgnt frame fail\n", __func__); -+ return _FALSE; -+ } -+ -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(Adapter, pattrib); -+ pattrib->qsel = QSLT_MGNT; -+ pattrib->rate = NDPTxRate; -+ pattrib->bwmode = bw; -+ pattrib->subtype = WIFI_NDPA; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ SetFrameSubType(pframe, WIFI_NDPA); -+ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); -+ -+ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ -+ duration = 2*aSifsTime + 44; -+ -+ if (bw == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (bw == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ SetDuration(pframe, duration); -+ -+ sequence = pBeamInfo->sounding_sequence << 2; -+ if (pBeamInfo->sounding_sequence >= 0x3f) -+ pBeamInfo->sounding_sequence = 0; -+ else -+ pBeamInfo->sounding_sequence++; -+ -+ _rtw_memcpy(pframe+16, &sequence, 1); -+ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) -+ aid = 0; -+ -+ sta_info.aid = aid; -+ sta_info.feedback_type = 0; -+ sta_info.nc_index = 0; -+ -+ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); -+ -+ pattrib->pktlen = 19; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ -+ -+ return _TRUE; -+ -+} -+BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ struct rtw_ndpa_sta_info sta_info; -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ u8 sequence = 0, aSifsTime = 0; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ return _FALSE; -+ -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(Adapter, pattrib); -+ -+ if (qidx == BCN_QUEUE_INX) -+ pattrib->qsel = QSLT_BEACON; -+ pattrib->rate = MGN_VHT2SS_MCS0; -+ pattrib->bwmode = bw; -+ pattrib->subtype = WIFI_NDPA; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ SetFrameSubType(pframe, WIFI_NDPA); -+ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); -+ -+ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ -+ duration = 2*aSifsTime + 44; -+ -+ if(bw == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if(bw == CHANNEL_WIDTH_40) -+ duration+= 87; -+ else -+ duration+= 180; -+ -+ SetDuration(pframe, duration); -+ -+ sequence = pBeamInfo->sounding_sequence<< 2; -+ if (pBeamInfo->sounding_sequence >= 0x3f) -+ pBeamInfo->sounding_sequence = 0; -+ else -+ pBeamInfo->sounding_sequence++; -+ -+ _rtw_memcpy(pframe+16, &sequence,1); -+ -+ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) -+ aid = 0; -+ -+ sta_info.aid = aid; -+ sta_info.feedback_type = 0; -+ sta_info.nc_index= 0; -+ -+ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); -+ -+ pattrib->pktlen = 19; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) -+{ -+ return issue_vht_ndpa_packet(Adapter, ra, aid, bw, qidx); -+} -+ -+BOOLEAN beamfomring_bSounding(struct beamforming_info *pBeamInfo) -+{ -+ BOOLEAN bSounding = _FALSE; -+ -+ if(( beamforming_get_beamform_cap(pBeamInfo) & BEAMFORMER_CAP) == 0) -+ bSounding = _FALSE; -+ else -+ bSounding = _TRUE; -+ -+ return bSounding; -+} -+ -+u8 beamforming_sounding_idx(struct beamforming_info *pBeamInfo) -+{ -+ u8 idx = 0; -+ u8 i; -+ -+ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) -+ { -+ if (pBeamInfo->beamforming_entry[i].bUsed && -+ (_FALSE == pBeamInfo->beamforming_entry[i].bSound)) -+ { -+ idx = i; -+ break; -+ } -+ } -+ -+ return idx; -+} -+ -+SOUNDING_MODE beamforming_sounding_mode(struct beamforming_info *pBeamInfo, u8 idx) -+{ -+ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; -+ SOUNDING_MODE mode; -+ -+ if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) -+ { -+ mode = SOUNDING_FW_VHT_TIMER; -+ } -+ else if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) -+ { -+ mode = SOUNDING_FW_HT_TIMER; -+ } -+ else -+ { -+ mode = SOUNDING_STOP_All_TIMER; -+ } -+ -+ return mode; -+} -+ -+u16 beamforming_sounding_time(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) -+{ -+ u16 sounding_time = 0xffff; -+ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; -+ -+ sounding_time = BeamEntry.sound_period; -+ -+ return sounding_time; -+} -+ -+CHANNEL_WIDTH beamforming_sounding_bw(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) -+{ -+ CHANNEL_WIDTH sounding_bw = CHANNEL_WIDTH_20; -+ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; -+ -+ sounding_bw = BeamEntry.sound_bw; -+ -+ return sounding_bw; -+} -+ -+BOOLEAN beamforming_select_beam_entry(struct beamforming_info *pBeamInfo) -+{ -+ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); -+ -+ pSoundInfo->sound_idx = beamforming_sounding_idx(pBeamInfo); -+ -+ if(pSoundInfo->sound_idx < BEAMFORMING_ENTRY_NUM) -+ pSoundInfo->sound_mode = beamforming_sounding_mode(pBeamInfo, pSoundInfo->sound_idx); -+ else -+ pSoundInfo->sound_mode = SOUNDING_STOP_All_TIMER; -+ -+ if(SOUNDING_STOP_All_TIMER == pSoundInfo->sound_mode) -+ { -+ return _FALSE; -+ } -+ else -+ { -+ pSoundInfo->sound_bw = beamforming_sounding_bw(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); -+ pSoundInfo->sound_period = beamforming_sounding_time(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); -+ return _TRUE; -+ } -+} -+ -+BOOLEAN beamforming_start_fw(PADAPTER adapter, u8 idx) -+{ -+ u8 *RA = NULL; -+ struct beamforming_entry *pEntry; -+ BOOLEAN ret = _TRUE; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ -+ pEntry = &(pBeamInfo->beamforming_entry[idx]); -+ if(pEntry->bUsed == _FALSE) -+ { -+ DBG_871X("Skip Beamforming, no entry for Idx =%d\n", idx); -+ return _FALSE; -+ } -+ -+ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; -+ pEntry->bSound = _TRUE; -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); -+ -+ return _TRUE; -+} -+ -+void beamforming_end_fw(PADAPTER adapter) -+{ -+ u8 idx = 0; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); -+ -+ DBG_871X("%s\n", __FUNCTION__); -+} -+ -+BOOLEAN beamforming_start_period(PADAPTER adapter) -+{ -+ BOOLEAN ret = _TRUE; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); -+ -+ beamforming_dym_ndpa_rate(adapter); -+ -+ beamforming_select_beam_entry(pBeamInfo); -+ -+ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) -+ { -+ ret = beamforming_start_fw(adapter, pSoundInfo->sound_idx); -+ } -+ else -+ { -+ ret = _FALSE; -+ } -+ -+ DBG_871X("%s Idx %d Mode %d BW %d Period %d\n", __FUNCTION__, -+ pSoundInfo->sound_idx, pSoundInfo->sound_mode, pSoundInfo->sound_bw, pSoundInfo->sound_period); -+ -+ return ret; -+} -+ -+void beamforming_end_period(PADAPTER adapter) -+{ -+ u8 idx = 0; -+ struct beamforming_entry *pBeamformEntry; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); -+ -+ -+ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) -+ { -+ beamforming_end_fw(adapter); -+ } -+} -+ -+void beamforming_notify(PADAPTER adapter) -+{ -+ BOOLEAN bSounding = _FALSE; -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(adapter->mlmepriv)); -+ -+ bSounding = beamfomring_bSounding(pBeamInfo); -+ -+ if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_IDLE) -+ { -+ if(bSounding) -+ { -+ if(beamforming_start_period(adapter) == _TRUE) -+ pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; -+ } -+ } -+ else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_START) -+ { -+ if(bSounding) -+ { -+ if(beamforming_start_period(adapter) == _FALSE) -+ pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; -+ } -+ else -+ { -+ beamforming_end_period(adapter); -+ pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; -+ } -+ } -+ else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_END) -+ { -+ if(bSounding) -+ { -+ if(beamforming_start_period(adapter) == _TRUE) -+ pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; -+ } -+ } -+ else -+ { -+ DBG_871X("%s BeamformState %d\n", __FUNCTION__, pBeamInfo->beamforming_state); -+ } -+ -+ DBG_871X("%s BeamformState %d bSounding %d\n", __FUNCTION__, pBeamInfo->beamforming_state, bSounding); -+} -+ -+BOOLEAN beamforming_init_entry(PADAPTER adapter, struct sta_info *psta, u8* idx) -+{ -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct ht_priv *phtpriv = &(pmlmepriv->htpriv); -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv *pvhtpriv = &(pmlmepriv->vhtpriv); -+#endif -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct beamforming_entry *pBeamformEntry = NULL; -+ u8 *ra; -+ u16 aid, mac_id; -+ u8 wireless_mode; -+ CHANNEL_WIDTH bw = CHANNEL_WIDTH_20; -+ BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; -+ -+ // The current setting does not support Beaforming -+ if (0 == phtpriv->beamform_cap -+#ifdef CONFIG_80211AC_VHT -+ && 0 == pvhtpriv->beamform_cap -+#endif -+ ) { -+ DBG_871X("The configuration disabled Beamforming! Skip...\n"); -+ return _FALSE; -+ } -+ -+ aid = psta->aid; -+ ra = psta->hwaddr; -+ mac_id = psta->mac_id; -+ wireless_mode = psta->wireless_mode; -+ bw = psta->bw_mode; -+ -+ if (IsSupportedHT(wireless_mode) || IsSupportedVHT(wireless_mode)) { -+ //3 // HT -+ u8 cur_beamform; -+ -+ cur_beamform = psta->htpriv.beamform_cap; -+ -+ // We are Beamformee because the STA is Beamformer -+ if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) -+ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_HT_EXPLICIT); -+ -+ // We are Beamformer because the STA is Beamformee -+ if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) -+ beamform_cap =(BEAMFORMING_CAP)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); -+#ifdef CONFIG_80211AC_VHT -+ if (IsSupportedVHT(wireless_mode)) { -+ //3 // VHT -+ cur_beamform = psta->vhtpriv.beamform_cap; -+ -+ // We are Beamformee because the STA is Beamformer -+ if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) -+ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_VHT_SU); -+ // We are Beamformer because the STA is Beamformee -+ if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) -+ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMER_CAP_VHT_SU); -+ } -+#endif //CONFIG_80211AC_VHT -+ -+ if(beamform_cap == BEAMFORMING_CAP_NONE) -+ return _FALSE; -+ -+ DBG_871X("Beamforming Config Capability = 0x%02X\n", beamform_cap); -+ -+ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); -+ if (pBeamformEntry == NULL) { -+ pBeamformEntry = beamforming_add_entry(adapter, ra, aid, mac_id, bw, beamform_cap, idx); -+ if(pBeamformEntry == NULL) -+ return _FALSE; -+ else -+ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; -+ } else { -+ // Entry has been created. If entry is initialing or progressing then errors occur. -+ if (pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && -+ pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ DBG_871X("Error State of Beamforming"); -+ return _FALSE; -+ } else { -+ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; -+ } -+ } -+ -+ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ psta->txbf_paid = pBeamformEntry->p_aid; -+ psta->txbf_gid = pBeamformEntry->g_id; -+ -+ DBG_871X("%s Idx %d\n", __FUNCTION__, *idx); -+ } else { -+ return _FALSE; -+ } -+ -+ return _SUCCESS; -+} -+ -+void beamforming_deinit_entry(PADAPTER adapter, u8* ra) -+{ -+ u8 idx = 0; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ -+ if(beamforming_remove_entry(pmlmepriv, ra, &idx) == _TRUE) -+ { -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); -+ } -+ -+ DBG_871X("%s Idx %d\n", __FUNCTION__, idx); -+} -+ -+void beamforming_reset(PADAPTER adapter) -+{ -+ u8 idx = 0; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ -+ for(idx = 0; idx < BEAMFORMING_ENTRY_NUM; idx++) -+ { -+ if(pBeamInfo->beamforming_entry[idx].bUsed == _TRUE) -+ { -+ pBeamInfo->beamforming_entry[idx].bUsed = _FALSE; -+ pBeamInfo->beamforming_entry[idx].beamforming_entry_cap = BEAMFORMING_CAP_NONE; -+ pBeamInfo->beamforming_entry[idx].beamforming_entry_state= BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); -+ } -+ } -+ -+ DBG_871X("%s\n", __FUNCTION__); -+} -+ -+void beamforming_sounding_fail(PADAPTER Adapter) -+{ -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); -+ -+ pEntry->bSound = _FALSE; -+ rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); -+ beamforming_deinit_entry(Adapter, pEntry->mac_addr); -+} -+ -+void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status) -+{ -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); -+ struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); -+ -+ if(status == 1) -+ { -+ pEntry->LogStatusFailCnt = 0; -+ } -+ else -+ { -+ pEntry->LogStatusFailCnt++; -+ DBG_871X("%s LogStatusFailCnt %d\n", __FUNCTION__, pEntry->LogStatusFailCnt); -+ } -+ if(pEntry->LogStatusFailCnt > 20) -+ { -+ DBG_871X("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __FUNCTION__); -+ //pEntry->bSound = _FALSE; -+ //rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); -+ //beamforming_deinit_entry(Adapter, pEntry->mac_addr); -+ beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_FAIL, NULL, 0, 1); -+ } -+} -+ -+void beamforming_enter(PADAPTER adapter, PVOID psta) -+{ -+ u8 idx = 0xff; -+ -+ if(beamforming_init_entry(adapter, (struct sta_info *)psta, &idx)) -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_ENTER, (u8 *)&idx); -+ -+ //DBG_871X("%s Idx %d\n", __FUNCTION__, idx); -+} -+ -+void beamforming_leave(PADAPTER adapter,u8* ra) -+{ -+ if(ra == NULL) -+ beamforming_reset(adapter); -+ else -+ beamforming_deinit_entry(adapter, ra); -+ -+ beamforming_notify(adapter); -+} -+ -+BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo) -+{ -+ u8 i; -+ BOOLEAN bSelfBeamformer = _FALSE; -+ BOOLEAN bSelfBeamformee = _FALSE; -+ struct beamforming_entry beamforming_entry; -+ BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; -+ -+ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) -+ { -+ beamforming_entry = pBeamInfo->beamforming_entry[i]; -+ -+ if(beamforming_entry.bUsed) -+ { -+ if( (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || -+ (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)) -+ bSelfBeamformee = _TRUE; -+ if( (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) || -+ (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) -+ bSelfBeamformer = _TRUE; -+ } -+ -+ if(bSelfBeamformer && bSelfBeamformee) -+ i = BEAMFORMING_ENTRY_NUM; -+ } -+ -+ if(bSelfBeamformer) -+ beamform_cap |= BEAMFORMER_CAP; -+ if(bSelfBeamformee) -+ beamform_cap |= BEAMFORMEE_CAP; -+ -+ return beamform_cap; -+} -+ -+void beamforming_watchdog(PADAPTER Adapter) -+{ -+ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &(Adapter->mlmepriv))); -+ -+ if(pBeamInfo->beamforming_state != BEAMFORMING_STATE_START) -+ return; -+ -+ beamforming_dym_period(Adapter); -+ beamforming_dym_ndpa_rate(Adapter); -+} -+#endif/* #if (BEAMFORMING_SUPPORT ==0) - for diver defined beamforming*/ -+ -+u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame) -+{ -+ u32 ret = _SUCCESS; -+#if (BEAMFORMING_SUPPORT == 1) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+ -+ ret = Beamforming_GetReportFrame(pDM_Odm, precv_frame); -+ -+#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ -+ struct beamforming_entry *pBeamformEntry = NULL; -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ u32 frame_len = precv_frame->u.hdr.len; -+ u8 *ta; -+ u8 idx, offset; -+ -+ /*DBG_871X("beamforming_get_report_frame\n");*/ -+ -+ /*Memory comparison to see if CSI report is the same with previous one*/ -+ ta = GetAddr2Ptr(pframe); -+ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); -+ if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) -+ offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ -+ else if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) -+ offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ -+ else -+ return ret; -+ -+ /*DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset);*/ -+ -+ if (_rtw_memcmp(pBeamformEntry->PreCsiReport + offset, pframe+offset, frame_len-offset) == _FALSE) -+ pBeamformEntry->DefaultCsiCnt = 0; -+ else -+ pBeamformEntry->DefaultCsiCnt++; -+ -+ _rtw_memcpy(&pBeamformEntry->PreCsiReport, pframe, frame_len); -+ -+ pBeamformEntry->bDefaultCSI = _FALSE; -+ -+ if (pBeamformEntry->DefaultCsiCnt > 20) -+ pBeamformEntry->bDefaultCSI = _TRUE; -+ else -+ pBeamformEntry->bDefaultCSI = _FALSE; -+#endif -+ return ret; -+} -+ -+void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame) -+{ -+#if (BEAMFORMING_SUPPORT == 1) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+ -+ Beamforming_GetNDPAFrame(pDM_Odm, precv_frame); -+ -+#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ -+ u8 *ta; -+ u8 idx, Sequence; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ struct beamforming_entry *pBeamformEntry = NULL; -+ -+ /*DBG_871X("beamforming_get_ndpa_frame\n");*/ -+ -+ if (IS_HARDWARE_TYPE_8812(Adapter) == _FALSE) -+ return; -+ else if (GetFrameSubType(pframe) != WIFI_NDPA) -+ return; -+ -+ ta = GetAddr2Ptr(pframe); -+ /*Remove signaling TA. */ -+ ta[0] = ta[0] & 0xFE; -+ -+ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); -+ -+ if (pBeamformEntry == NULL) -+ return; -+ else if (!(pBeamformEntry->beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU)) -+ return; -+ /*LogSuccess: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ -+ /*ClockResetTimes: While BFer entry always doesn't receive our CSI, clock will reset again and again.So ClockResetTimes is limited to 5 times.2015-04-13, Jeffery*/ -+ else if ((pBeamformEntry->LogSuccess == 1) || (pBeamformEntry->ClockResetTimes == 5)) { -+ DBG_871X("[%s] LogSeq=%d, PreLogSeq=%d\n", __func__, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq); -+ return; -+ } -+ -+ Sequence = (pframe[16]) >> 2; -+ DBG_871X("[%s] Start, Sequence=%d, LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, ClockResetTimes=%d, LogSuccess=%d\n", -+ __func__, Sequence, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq, pBeamformEntry->LogRetryCnt, pBeamformEntry->ClockResetTimes, pBeamformEntry->LogSuccess); -+ -+ if ((pBeamformEntry->LogSeq != 0) && (pBeamformEntry->PreLogSeq != 0)) { -+ /*Success condition*/ -+ if ((pBeamformEntry->LogSeq != Sequence) && (pBeamformEntry->PreLogSeq != pBeamformEntry->LogSeq)) { -+ /* break option for clcok reset, 2015-03-30, Jeffery */ -+ pBeamformEntry->LogRetryCnt = 0; -+ /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ -+ /*That is, LogSuccess is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ -+ pBeamformEntry->LogSuccess = 1; -+ -+ } else {/*Fail condition*/ -+ -+ if (pBeamformEntry->LogRetryCnt == 5) { -+ pBeamformEntry->ClockResetTimes++; -+ pBeamformEntry->LogRetryCnt = 0; -+ -+ DBG_871X("[%s] Clock Reset!!! ClockResetTimes=%d\n", __func__, pBeamformEntry->ClockResetTimes); -+ beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_CLK, NULL, 0, 1); -+ -+ } else -+ pBeamformEntry->LogRetryCnt++; -+ } -+ } -+ -+ /*Update LogSeq & PreLogSeq*/ -+ pBeamformEntry->PreLogSeq = pBeamformEntry->LogSeq; -+ pBeamformEntry->LogSeq = Sequence; -+ -+#endif -+ -+} -+ -+ -+ -+ -+void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+_func_enter_; -+ -+#if (BEAMFORMING_SUPPORT == 1) /*(BEAMFORMING_SUPPORT == 1)- for PHYDM beamfoming*/ -+ switch (type) { -+ case BEAMFORMING_CTRL_ENTER: -+ { -+ struct sta_info *psta = (PVOID)pbuf; -+ u16 staIdx = psta->mac_id; -+ -+ Beamforming_Enter(pDM_Odm, staIdx); -+ break; -+ } -+ case BEAMFORMING_CTRL_LEAVE: -+ Beamforming_Leave(pDM_Odm, pbuf); -+ break; -+ default: -+ break; -+ -+ } -+#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ -+ switch (type) { -+ case BEAMFORMING_CTRL_ENTER: -+ beamforming_enter(padapter, (PVOID)pbuf); -+ break; -+ -+ case BEAMFORMING_CTRL_LEAVE: -+ beamforming_leave(padapter, pbuf); -+ break; -+ -+ case BEAMFORMING_CTRL_SOUNDING_FAIL: -+ beamforming_sounding_fail(padapter); -+ break; -+ -+ case BEAMFORMING_CTRL_SOUNDING_CLK: -+ rtw_hal_set_hwreg(padapter, HW_VAR_SOUNDING_CLK, NULL); -+ break; -+ -+ default: -+ break; -+ } -+#endif -+_func_exit_; -+} -+ -+u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+_func_enter_; -+ -+ if(enqueue) -+ { -+ u8 *wk_buf; -+ -+ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if(ph2c==NULL){ -+ res= _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if(pdrvextra_cmd_parm==NULL){ -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res= _FAIL; -+ goto exit; -+ } -+ -+ if (pbuf != NULL) { -+ wk_buf = rtw_zmalloc(size); -+ if(wk_buf==NULL){ -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res= _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(wk_buf, pbuf, size); -+ } else { -+ wk_buf = NULL; -+ size = 0; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = BEAMFORMING_WK_CID; -+ pdrvextra_cmd_parm->type = type; -+ pdrvextra_cmd_parm->size = size; -+ pdrvextra_cmd_parm->pbuf = wk_buf; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ } -+ else -+ { -+ beamforming_wk_hdl(padapter, type, pbuf); -+ } -+ -+exit: -+ -+_func_exit_; -+ -+ return res; -+} -+ -+void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) -+{ -+ if (psta) { -+ pattrib->txbf_g_id = psta->txbf_gid; -+ pattrib->txbf_p_aid = psta->txbf_paid; -+ } -+} -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_BEAMFORMING_C_ ++ ++#include ++#include ++ ++#ifdef CONFIG_BEAMFORMING ++ ++#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ ++struct beamforming_entry *beamforming_get_entry_by_addr(struct mlme_priv *pmlmepriv, u8* ra,u8* idx) ++{ ++ u8 i = 0; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if( pBeamInfo->beamforming_entry[i].bUsed && ++ (_rtw_memcmp(ra,pBeamInfo->beamforming_entry[i].mac_addr, ETH_ALEN))) ++ { ++ *idx = i; ++ return &(pBeamInfo->beamforming_entry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id) ++{ ++ u8 i = 0; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((struct mlme_priv *)pmlmepriv); ++ BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if( pBeamInfo->beamforming_entry[i].bUsed && ++ (mac_id == pBeamInfo->beamforming_entry[i].mac_id)) ++ { ++ BeamformEntryCap = pBeamInfo->beamforming_entry[i].beamforming_entry_cap; ++ i = BEAMFORMING_ENTRY_NUM; ++ } ++ } ++ ++ return BeamformEntryCap; ++} ++ ++struct beamforming_entry *beamforming_get_free_entry(struct mlme_priv *pmlmepriv, u8* idx) ++{ ++ u8 i = 0; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if(pBeamInfo->beamforming_entry[i].bUsed == _FALSE) ++ { ++ *idx = i; ++ return &(pBeamInfo->beamforming_entry[i]); ++ } ++ } ++ return NULL; ++} ++ ++ ++struct beamforming_entry *beamforming_add_entry(PADAPTER adapter, u8* ra, u16 aid, ++ u16 mac_id, CHANNEL_WIDTH bw, BEAMFORMING_CAP beamfrom_cap, u8* idx) ++{ ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_entry *pEntry = beamforming_get_free_entry(pmlmepriv, idx); ++ ++ if(pEntry != NULL) ++ { ++ pEntry->bUsed = _TRUE; ++ pEntry->aid = aid; ++ pEntry->mac_id = mac_id; ++ pEntry->sound_bw = bw; ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ u16 BSSID = ((*(adapter_mac_addr(adapter) + 5) & 0xf0) >> 4) ^ ++ (*(adapter_mac_addr(adapter) + 5) & 0xf); /* BSSID[44:47] xor BSSID[40:43] */ ++ pEntry->p_aid = (aid + BSSID * 32) & 0x1ff; // (dec(A) + dec(B)*32) mod 512 ++ pEntry->g_id = 63; ++ } ++ else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ++ { ++ pEntry->p_aid = 0; ++ pEntry->g_id = 63; ++ } ++ else ++ { ++ pEntry->p_aid = ra[5]; // BSSID[39:47] ++ pEntry->p_aid = (pEntry->p_aid << 1) | (ra[4] >> 7 ); ++ pEntry->g_id = 0; ++ } ++ _rtw_memcpy(pEntry->mac_addr, ra, ETH_ALEN); ++ pEntry->bSound = _FALSE; ++ ++ //3 TODO SW/FW sound period ++ pEntry->sound_period = 200; ++ pEntry->beamforming_entry_cap = beamfrom_cap; ++ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ ++ ++ pEntry->PreLogSeq = 0; /*Modified by Jeffery @2015-04-13*/ ++ pEntry->LogSeq = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogRetryCnt = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogSuccess = 0; /*LogSuccess is NOT needed to be accumulated, so LogSuccessCnt->LogSuccess, 2015-04-13, Jeffery*/ ++ pEntry->ClockResetTimes = 0; /*Modified by Jeffery @2015-04-13*/ ++ pEntry->LogStatusFailCnt = 0; ++ ++ return pEntry; ++ } ++ else ++ return NULL; ++} ++ ++BOOLEAN beamforming_remove_entry(struct mlme_priv *pmlmepriv, u8* ra, u8* idx) ++{ ++ struct beamforming_entry *pEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); ++ ++ if(pEntry != NULL) ++ { ++ pEntry->bUsed = _FALSE; ++ pEntry->beamforming_entry_cap = BEAMFORMING_CAP_NONE; ++ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ return _TRUE; ++ } ++ else ++ return _FALSE; ++} ++ ++/* Used for BeamformingStart_V1 */ ++void beamforming_dym_ndpa_rate(PADAPTER adapter) ++{ ++ u16 NDPARate = MGN_6M; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); ++ ++ if(pHalData->MinUndecoratedPWDBForDM > 30) // link RSSI > 30% ++ NDPARate = MGN_24M; ++ else ++ NDPARate = MGN_6M; ++ ++ //BW = CHANNEL_WIDTH_20; ++ NDPARate = NDPARate << 8; ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_RATE, (u8 *)&NDPARate); ++} ++ ++void beamforming_dym_period(PADAPTER Adapter) ++{ ++ u8 Idx; ++ BOOLEAN bChangePeriod = _FALSE; ++ u16 SoundPeriod_SW, SoundPeriod_FW; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); ++ struct beamforming_entry *pBeamformEntry; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &Adapter->mlmepriv)); ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ //3 TODO per-client throughput caculation. ++ ++ if(pdvobjpriv->traffic_stat.cur_tx_tp + pdvobjpriv->traffic_stat.cur_rx_tp > 2) ++ { ++ SoundPeriod_SW = 32*20; ++ SoundPeriod_FW = 2; ++ } ++ else ++ { ++ SoundPeriod_SW = 32*2000; ++ SoundPeriod_FW = 200; ++ } ++ ++ for(Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) ++ { ++ pBeamformEntry = pBeamInfo->beamforming_entry+Idx; ++ if(pBeamformEntry->bDefaultCSI) ++ { ++ SoundPeriod_SW = 32*2000; ++ SoundPeriod_FW = 200; ++ } ++ ++ if(pBeamformEntry->beamforming_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) ++ { ++ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) ++ { ++ if(pBeamformEntry->sound_period != SoundPeriod_FW) ++ { ++ pBeamformEntry->sound_period = SoundPeriod_FW; ++ bChangePeriod = _TRUE; // Only FW sounding need to send H2C packet to change sound period. ++ } ++ } ++ else if(pBeamformEntry->sound_period != SoundPeriod_SW) ++ { ++ pBeamformEntry->sound_period = SoundPeriod_SW; ++ } ++ } ++ } ++ ++ if(bChangePeriod) ++ rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&Idx); ++} ++ ++BOOLEAN issue_ht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 aSifsTime = 0; ++ u8 NDPTxRate = 0; ++ ++ DBG_871X("%s: issue_ht_sw_ndpa_packet!\n", __func__); ++ ++ NDPTxRate = MGN_MCS8; ++ DBG_871X("%s: NDPTxRate =%d\n", __func__, NDPTxRate); ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) ++ return _FALSE; ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = bw; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if (bw == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ /*HT control field*/ ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++ ++ ++} ++BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 aSifsTime = 0; ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) ++ return _FALSE; ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ if (qidx == BCN_QUEUE_INX) ++ pattrib->qsel = QSLT_BEACON; ++ pattrib->rate = MGN_MCS8; ++ pattrib->bwmode = bw; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if(bw == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ //HT control field ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ return issue_ht_ndpa_packet(Adapter, ra, bw, qidx); ++} ++BOOLEAN issue_vht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct rtw_ndpa_sta_info sta_info; ++ u8 NDPTxRate = 0; ++ ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 sequence = 0, aSifsTime = 0; ++ ++ DBG_871X("%s: issue_vht_sw_ndpa_packet!\n", __func__); ++ ++ ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ DBG_871X("%s: NDPTxRate =%d\n", __func__, NDPTxRate); ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = bw; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if (bw == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if (bw == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->sounding_sequence << 2; ++ if (pBeamInfo->sounding_sequence >= 0x3f) ++ pBeamInfo->sounding_sequence = 0; ++ else ++ pBeamInfo->sounding_sequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence, 1); ++ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ aid = 0; ++ ++ sta_info.aid = aid; ++ sta_info.feedback_type = 0; ++ sta_info.nc_index = 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ ++ return _TRUE; ++ ++} ++BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct rtw_ndpa_sta_info sta_info; ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 sequence = 0, aSifsTime = 0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ return _FALSE; ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ if (qidx == BCN_QUEUE_INX) ++ pattrib->qsel = QSLT_BEACON; ++ pattrib->rate = MGN_VHT2SS_MCS0; ++ pattrib->bwmode = bw; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if(bw == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if(bw == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->sounding_sequence<< 2; ++ if (pBeamInfo->sounding_sequence >= 0x3f) ++ pBeamInfo->sounding_sequence = 0; ++ else ++ pBeamInfo->sounding_sequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence,1); ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ aid = 0; ++ ++ sta_info.aid = aid; ++ sta_info.feedback_type = 0; ++ sta_info.nc_index= 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ return issue_vht_ndpa_packet(Adapter, ra, aid, bw, qidx); ++} ++ ++BOOLEAN beamfomring_bSounding(struct beamforming_info *pBeamInfo) ++{ ++ BOOLEAN bSounding = _FALSE; ++ ++ if(( beamforming_get_beamform_cap(pBeamInfo) & BEAMFORMER_CAP) == 0) ++ bSounding = _FALSE; ++ else ++ bSounding = _TRUE; ++ ++ return bSounding; ++} ++ ++u8 beamforming_sounding_idx(struct beamforming_info *pBeamInfo) ++{ ++ u8 idx = 0; ++ u8 i; ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if (pBeamInfo->beamforming_entry[i].bUsed && ++ (_FALSE == pBeamInfo->beamforming_entry[i].bSound)) ++ { ++ idx = i; ++ break; ++ } ++ } ++ ++ return idx; ++} ++ ++SOUNDING_MODE beamforming_sounding_mode(struct beamforming_info *pBeamInfo, u8 idx) ++{ ++ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; ++ SOUNDING_MODE mode; ++ ++ if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) ++ { ++ mode = SOUNDING_FW_VHT_TIMER; ++ } ++ else if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) ++ { ++ mode = SOUNDING_FW_HT_TIMER; ++ } ++ else ++ { ++ mode = SOUNDING_STOP_All_TIMER; ++ } ++ ++ return mode; ++} ++ ++u16 beamforming_sounding_time(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) ++{ ++ u16 sounding_time = 0xffff; ++ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; ++ ++ sounding_time = BeamEntry.sound_period; ++ ++ return sounding_time; ++} ++ ++CHANNEL_WIDTH beamforming_sounding_bw(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) ++{ ++ CHANNEL_WIDTH sounding_bw = CHANNEL_WIDTH_20; ++ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; ++ ++ sounding_bw = BeamEntry.sound_bw; ++ ++ return sounding_bw; ++} ++ ++BOOLEAN beamforming_select_beam_entry(struct beamforming_info *pBeamInfo) ++{ ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ pSoundInfo->sound_idx = beamforming_sounding_idx(pBeamInfo); ++ ++ if(pSoundInfo->sound_idx < BEAMFORMING_ENTRY_NUM) ++ pSoundInfo->sound_mode = beamforming_sounding_mode(pBeamInfo, pSoundInfo->sound_idx); ++ else ++ pSoundInfo->sound_mode = SOUNDING_STOP_All_TIMER; ++ ++ if(SOUNDING_STOP_All_TIMER == pSoundInfo->sound_mode) ++ { ++ return _FALSE; ++ } ++ else ++ { ++ pSoundInfo->sound_bw = beamforming_sounding_bw(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); ++ pSoundInfo->sound_period = beamforming_sounding_time(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); ++ return _TRUE; ++ } ++} ++ ++BOOLEAN beamforming_start_fw(PADAPTER adapter, u8 idx) ++{ ++ u8 *RA = NULL; ++ struct beamforming_entry *pEntry; ++ BOOLEAN ret = _TRUE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ pEntry = &(pBeamInfo->beamforming_entry[idx]); ++ if(pEntry->bUsed == _FALSE) ++ { ++ DBG_871X("Skip Beamforming, no entry for Idx =%d\n", idx); ++ return _FALSE; ++ } ++ ++ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = _TRUE; ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); ++ ++ return _TRUE; ++} ++ ++void beamforming_end_fw(PADAPTER adapter) ++{ ++ u8 idx = 0; ++ ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++} ++ ++BOOLEAN beamforming_start_period(PADAPTER adapter) ++{ ++ BOOLEAN ret = _TRUE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ beamforming_dym_ndpa_rate(adapter); ++ ++ beamforming_select_beam_entry(pBeamInfo); ++ ++ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) ++ { ++ ret = beamforming_start_fw(adapter, pSoundInfo->sound_idx); ++ } ++ else ++ { ++ ret = _FALSE; ++ } ++ ++ DBG_871X("%s Idx %d Mode %d BW %d Period %d\n", __FUNCTION__, ++ pSoundInfo->sound_idx, pSoundInfo->sound_mode, pSoundInfo->sound_bw, pSoundInfo->sound_period); ++ ++ return ret; ++} ++ ++void beamforming_end_period(PADAPTER adapter) ++{ ++ u8 idx = 0; ++ struct beamforming_entry *pBeamformEntry; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ ++ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) ++ { ++ beamforming_end_fw(adapter); ++ } ++} ++ ++void beamforming_notify(PADAPTER adapter) ++{ ++ BOOLEAN bSounding = _FALSE; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(adapter->mlmepriv)); ++ ++ bSounding = beamfomring_bSounding(pBeamInfo); ++ ++ if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_IDLE) ++ { ++ if(bSounding) ++ { ++ if(beamforming_start_period(adapter) == _TRUE) ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; ++ } ++ } ++ else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_START) ++ { ++ if(bSounding) ++ { ++ if(beamforming_start_period(adapter) == _FALSE) ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; ++ } ++ else ++ { ++ beamforming_end_period(adapter); ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; ++ } ++ } ++ else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_END) ++ { ++ if(bSounding) ++ { ++ if(beamforming_start_period(adapter) == _TRUE) ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; ++ } ++ } ++ else ++ { ++ DBG_871X("%s BeamformState %d\n", __FUNCTION__, pBeamInfo->beamforming_state); ++ } ++ ++ DBG_871X("%s BeamformState %d bSounding %d\n", __FUNCTION__, pBeamInfo->beamforming_state, bSounding); ++} ++ ++BOOLEAN beamforming_init_entry(PADAPTER adapter, struct sta_info *psta, u8* idx) ++{ ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct ht_priv *phtpriv = &(pmlmepriv->htpriv); ++#ifdef CONFIG_80211AC_VHT ++ struct vht_priv *pvhtpriv = &(pmlmepriv->vhtpriv); ++#endif ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct beamforming_entry *pBeamformEntry = NULL; ++ u8 *ra; ++ u16 aid, mac_id; ++ u8 wireless_mode; ++ CHANNEL_WIDTH bw = CHANNEL_WIDTH_20; ++ BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; ++ ++ // The current setting does not support Beaforming ++ if (0 == phtpriv->beamform_cap ++#ifdef CONFIG_80211AC_VHT ++ && 0 == pvhtpriv->beamform_cap ++#endif ++ ) { ++ DBG_871X("The configuration disabled Beamforming! Skip...\n"); ++ return _FALSE; ++ } ++ ++ aid = psta->aid; ++ ra = psta->hwaddr; ++ mac_id = psta->mac_id; ++ wireless_mode = psta->wireless_mode; ++ bw = psta->bw_mode; ++ ++ if (IsSupportedHT(wireless_mode) || IsSupportedVHT(wireless_mode)) { ++ //3 // HT ++ u8 cur_beamform; ++ ++ cur_beamform = psta->htpriv.beamform_cap; ++ ++ // We are Beamformee because the STA is Beamformer ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_HT_EXPLICIT); ++ ++ // We are Beamformer because the STA is Beamformee ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); ++#ifdef CONFIG_80211AC_VHT ++ if (IsSupportedVHT(wireless_mode)) { ++ //3 // VHT ++ cur_beamform = psta->vhtpriv.beamform_cap; ++ ++ // We are Beamformee because the STA is Beamformer ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_VHT_SU); ++ // We are Beamformer because the STA is Beamformee ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMER_CAP_VHT_SU); ++ } ++#endif //CONFIG_80211AC_VHT ++ ++ if(beamform_cap == BEAMFORMING_CAP_NONE) ++ return _FALSE; ++ ++ DBG_871X("Beamforming Config Capability = 0x%02X\n", beamform_cap); ++ ++ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); ++ if (pBeamformEntry == NULL) { ++ pBeamformEntry = beamforming_add_entry(adapter, ra, aid, mac_id, bw, beamform_cap, idx); ++ if(pBeamformEntry == NULL) ++ return _FALSE; ++ else ++ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } else { ++ // Entry has been created. If entry is initialing or progressing then errors occur. ++ if (pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && ++ pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ DBG_871X("Error State of Beamforming"); ++ return _FALSE; ++ } else { ++ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } ++ } ++ ++ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ psta->txbf_paid = pBeamformEntry->p_aid; ++ psta->txbf_gid = pBeamformEntry->g_id; ++ ++ DBG_871X("%s Idx %d\n", __FUNCTION__, *idx); ++ } else { ++ return _FALSE; ++ } ++ ++ return _SUCCESS; ++} ++ ++void beamforming_deinit_entry(PADAPTER adapter, u8* ra) ++{ ++ u8 idx = 0; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++ if(beamforming_remove_entry(pmlmepriv, ra, &idx) == _TRUE) ++ { ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); ++ } ++ ++ DBG_871X("%s Idx %d\n", __FUNCTION__, idx); ++} ++ ++void beamforming_reset(PADAPTER adapter) ++{ ++ u8 idx = 0; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ for(idx = 0; idx < BEAMFORMING_ENTRY_NUM; idx++) ++ { ++ if(pBeamInfo->beamforming_entry[idx].bUsed == _TRUE) ++ { ++ pBeamInfo->beamforming_entry[idx].bUsed = _FALSE; ++ pBeamInfo->beamforming_entry[idx].beamforming_entry_cap = BEAMFORMING_CAP_NONE; ++ pBeamInfo->beamforming_entry[idx].beamforming_entry_state= BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); ++ } ++ } ++ ++ DBG_871X("%s\n", __FUNCTION__); ++} ++ ++void beamforming_sounding_fail(PADAPTER Adapter) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); ++ ++ pEntry->bSound = _FALSE; ++ rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); ++ beamforming_deinit_entry(Adapter, pEntry->mac_addr); ++} ++ ++void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); ++ ++ if(status == 1) ++ { ++ pEntry->LogStatusFailCnt = 0; ++ } ++ else ++ { ++ pEntry->LogStatusFailCnt++; ++ DBG_871X("%s LogStatusFailCnt %d\n", __FUNCTION__, pEntry->LogStatusFailCnt); ++ } ++ if(pEntry->LogStatusFailCnt > 20) ++ { ++ DBG_871X("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __FUNCTION__); ++ //pEntry->bSound = _FALSE; ++ //rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); ++ //beamforming_deinit_entry(Adapter, pEntry->mac_addr); ++ beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_FAIL, NULL, 0, 1); ++ } ++} ++ ++void beamforming_enter(PADAPTER adapter, PVOID psta) ++{ ++ u8 idx = 0xff; ++ ++ if(beamforming_init_entry(adapter, (struct sta_info *)psta, &idx)) ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_ENTER, (u8 *)&idx); ++ ++ //DBG_871X("%s Idx %d\n", __FUNCTION__, idx); ++} ++ ++void beamforming_leave(PADAPTER adapter,u8* ra) ++{ ++ if(ra == NULL) ++ beamforming_reset(adapter); ++ else ++ beamforming_deinit_entry(adapter, ra); ++ ++ beamforming_notify(adapter); ++} ++ ++BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo) ++{ ++ u8 i; ++ BOOLEAN bSelfBeamformer = _FALSE; ++ BOOLEAN bSelfBeamformee = _FALSE; ++ struct beamforming_entry beamforming_entry; ++ BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ beamforming_entry = pBeamInfo->beamforming_entry[i]; ++ ++ if(beamforming_entry.bUsed) ++ { ++ if( (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || ++ (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)) ++ bSelfBeamformee = _TRUE; ++ if( (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) || ++ (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) ++ bSelfBeamformer = _TRUE; ++ } ++ ++ if(bSelfBeamformer && bSelfBeamformee) ++ i = BEAMFORMING_ENTRY_NUM; ++ } ++ ++ if(bSelfBeamformer) ++ beamform_cap |= BEAMFORMER_CAP; ++ if(bSelfBeamformee) ++ beamform_cap |= BEAMFORMEE_CAP; ++ ++ return beamform_cap; ++} ++ ++void beamforming_watchdog(PADAPTER Adapter) ++{ ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &(Adapter->mlmepriv))); ++ ++ if(pBeamInfo->beamforming_state != BEAMFORMING_STATE_START) ++ return; ++ ++ beamforming_dym_period(Adapter); ++ beamforming_dym_ndpa_rate(Adapter); ++} ++#endif/* #if (BEAMFORMING_SUPPORT ==0) - for diver defined beamforming*/ ++ ++u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame) ++{ ++ u32 ret = _SUCCESS; ++#if (BEAMFORMING_SUPPORT == 1) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ ret = Beamforming_GetReportFrame(pDM_Odm, precv_frame); ++ ++#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ ++ struct beamforming_entry *pBeamformEntry = NULL; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ u32 frame_len = precv_frame->u.hdr.len; ++ u8 *ta; ++ u8 idx, offset; ++ ++ /*DBG_871X("beamforming_get_report_frame\n");*/ ++ ++ /*Memory comparison to see if CSI report is the same with previous one*/ ++ ta = GetAddr2Ptr(pframe); ++ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); ++ if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) ++ offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) ++ offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else ++ return ret; ++ ++ /*DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset);*/ ++ ++ if (_rtw_memcmp(pBeamformEntry->PreCsiReport + offset, pframe+offset, frame_len-offset) == _FALSE) ++ pBeamformEntry->DefaultCsiCnt = 0; ++ else ++ pBeamformEntry->DefaultCsiCnt++; ++ ++ _rtw_memcpy(&pBeamformEntry->PreCsiReport, pframe, frame_len); ++ ++ pBeamformEntry->bDefaultCSI = _FALSE; ++ ++ if (pBeamformEntry->DefaultCsiCnt > 20) ++ pBeamformEntry->bDefaultCSI = _TRUE; ++ else ++ pBeamformEntry->bDefaultCSI = _FALSE; ++#endif ++ return ret; ++} ++ ++void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame) ++{ ++#if (BEAMFORMING_SUPPORT == 1) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ Beamforming_GetNDPAFrame(pDM_Odm, precv_frame); ++ ++#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ ++ u8 *ta; ++ u8 idx, Sequence; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_entry *pBeamformEntry = NULL; ++ ++ /*DBG_871X("beamforming_get_ndpa_frame\n");*/ ++ ++ if (IS_HARDWARE_TYPE_8812(Adapter) == _FALSE) ++ return; ++ else if (GetFrameSubType(pframe) != WIFI_NDPA) ++ return; ++ ++ ta = GetAddr2Ptr(pframe); ++ /*Remove signaling TA. */ ++ ta[0] = ta[0] & 0xFE; ++ ++ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); ++ ++ if (pBeamformEntry == NULL) ++ return; ++ else if (!(pBeamformEntry->beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU)) ++ return; ++ /*LogSuccess: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ ++ /*ClockResetTimes: While BFer entry always doesn't receive our CSI, clock will reset again and again.So ClockResetTimes is limited to 5 times.2015-04-13, Jeffery*/ ++ else if ((pBeamformEntry->LogSuccess == 1) || (pBeamformEntry->ClockResetTimes == 5)) { ++ DBG_871X("[%s] LogSeq=%d, PreLogSeq=%d\n", __func__, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq); ++ return; ++ } ++ ++ Sequence = (pframe[16]) >> 2; ++ DBG_871X("[%s] Start, Sequence=%d, LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, ClockResetTimes=%d, LogSuccess=%d\n", ++ __func__, Sequence, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq, pBeamformEntry->LogRetryCnt, pBeamformEntry->ClockResetTimes, pBeamformEntry->LogSuccess); ++ ++ if ((pBeamformEntry->LogSeq != 0) && (pBeamformEntry->PreLogSeq != 0)) { ++ /*Success condition*/ ++ if ((pBeamformEntry->LogSeq != Sequence) && (pBeamformEntry->PreLogSeq != pBeamformEntry->LogSeq)) { ++ /* break option for clcok reset, 2015-03-30, Jeffery */ ++ pBeamformEntry->LogRetryCnt = 0; ++ /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ ++ /*That is, LogSuccess is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ ++ pBeamformEntry->LogSuccess = 1; ++ ++ } else {/*Fail condition*/ ++ ++ if (pBeamformEntry->LogRetryCnt == 5) { ++ pBeamformEntry->ClockResetTimes++; ++ pBeamformEntry->LogRetryCnt = 0; ++ ++ DBG_871X("[%s] Clock Reset!!! ClockResetTimes=%d\n", __func__, pBeamformEntry->ClockResetTimes); ++ beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_CLK, NULL, 0, 1); ++ ++ } else ++ pBeamformEntry->LogRetryCnt++; ++ } ++ } ++ ++ /*Update LogSeq & PreLogSeq*/ ++ pBeamformEntry->PreLogSeq = pBeamformEntry->LogSeq; ++ pBeamformEntry->LogSeq = Sequence; ++ ++#endif ++ ++} ++ ++ ++ ++ ++void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++_func_enter_; ++ ++#if (BEAMFORMING_SUPPORT == 1) /*(BEAMFORMING_SUPPORT == 1)- for PHYDM beamfoming*/ ++ switch (type) { ++ case BEAMFORMING_CTRL_ENTER: ++ { ++ struct sta_info *psta = (PVOID)pbuf; ++ u16 staIdx = psta->mac_id; ++ ++ Beamforming_Enter(pDM_Odm, staIdx); ++ break; ++ } ++ case BEAMFORMING_CTRL_LEAVE: ++ Beamforming_Leave(pDM_Odm, pbuf); ++ break; ++ default: ++ break; ++ ++ } ++#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ ++ switch (type) { ++ case BEAMFORMING_CTRL_ENTER: ++ beamforming_enter(padapter, (PVOID)pbuf); ++ break; ++ ++ case BEAMFORMING_CTRL_LEAVE: ++ beamforming_leave(padapter, pbuf); ++ break; ++ ++ case BEAMFORMING_CTRL_SOUNDING_FAIL: ++ beamforming_sounding_fail(padapter); ++ break; ++ ++ case BEAMFORMING_CTRL_SOUNDING_CLK: ++ rtw_hal_set_hwreg(padapter, HW_VAR_SOUNDING_CLK, NULL); ++ break; ++ ++ default: ++ break; ++ } ++#endif ++_func_exit_; ++} ++ ++u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if(enqueue) ++ { ++ u8 *wk_buf; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ if (pbuf != NULL) { ++ wk_buf = rtw_zmalloc(size); ++ if(wk_buf==NULL){ ++ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(wk_buf, pbuf, size); ++ } else { ++ wk_buf = NULL; ++ size = 0; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = BEAMFORMING_WK_CID; ++ pdrvextra_cmd_parm->type = type; ++ pdrvextra_cmd_parm->size = size; ++ pdrvextra_cmd_parm->pbuf = wk_buf; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else ++ { ++ beamforming_wk_hdl(padapter, type, pbuf); ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) ++{ ++ if (psta) { ++ pattrib->txbf_g_id = psta->txbf_gid; ++ pattrib->txbf_p_aid = psta->txbf_paid; ++ } ++} ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_br_ext.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_br_ext.c new file mode 100644 -index 000000000..024049cfb +index 0000000..024049c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_br_ext.c @@ -0,0 +1,1699 @@ @@ -10691,1766 +10688,1766 @@ index 000000000..024049cfb + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_bt_mp.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_bt_mp.c new file mode 100644 -index 000000000..338a5b315 +index 0000000..30cf14e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_bt_mp.c @@ -0,0 +1,1753 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ -+#include -+#include -+ -+#if defined(CONFIG_RTL8723B) -+#include -+#endif -+ -+#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) -+void MPh2c_timeout_handle(void *FunctionContext) -+{ -+ PADAPTER pAdapter; -+ PMPT_CONTEXT pMptCtx; -+ -+ -+ DBG_8192C("[MPT], MPh2c_timeout_handle \n"); -+ -+ pAdapter = (PADAPTER)FunctionContext; -+ pMptCtx = &pAdapter->mppriv.MptCtx; -+ -+ pMptCtx->bMPh2c_timeout = _TRUE; -+ -+ if ((_FALSE == pMptCtx->MptH2cRspEvent) -+ || ((_TRUE == pMptCtx->MptH2cRspEvent) -+ && (_FALSE == pMptCtx->MptBtC2hEvent))) -+ { -+ _rtw_up_sema(&pMptCtx->MPh2c_Sema); -+ } -+} -+ -+u32 WaitC2Hevent(PADAPTER pAdapter, u8 *C2H_event, u32 delay_time) -+{ -+ PMPT_CONTEXT pMptCtx=&(pAdapter->mppriv.MptCtx); -+ pMptCtx->bMPh2c_timeout=_FALSE; -+ -+ if( pAdapter->registrypriv.mp_mode == 0 ) -+ { -+ DBG_8192C("[MPT], Error!! WaitC2Hevent mp_mode == 0!!\n"); -+ return _FALSE; -+ } -+ -+ _set_timer( &pMptCtx->MPh2c_timeout_timer, delay_time ); -+ -+ _rtw_down_sema(&pMptCtx->MPh2c_Sema); -+ -+ if (pMptCtx->bMPh2c_timeout == _TRUE) -+ { -+ *C2H_event = _FALSE; -+ -+ return _FALSE; -+ } -+ -+ // for safty, cancel timer here again -+ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); -+ -+ return _TRUE; -+} -+ -+BT_CTRL_STATUS -+mptbt_CheckC2hFrame( -+ PADAPTER Adapter, -+ PBT_H2C pH2c, -+ PBT_EXT_C2H pExtC2h -+ ) -+{ -+ BT_CTRL_STATUS c2hStatus = BT_STATUS_C2H_SUCCESS; -+ -+ //DBG_8192C("[MPT], MPT rsp C2H hex: %x %x %x %x %x %x \n"), pExtC2h , pExtC2h+1 ,pExtC2h+2 ,pExtC2h+3 ,pExtC2h+4 ,pExtC2h+5); -+ -+ DBG_8192C("[MPT], statusCode = 0x%x\n", pExtC2h->statusCode); -+ DBG_8192C("[MPT], retLen = %d\n", pExtC2h->retLen); -+ DBG_8192C("[MPT], opCodeVer : req/rsp=%d/%d\n", pH2c->opCodeVer, pExtC2h->opCodeVer); -+ DBG_8192C("[MPT], reqNum : req/rsp=%d/%d\n", pH2c->reqNum, pExtC2h->reqNum); -+ if(pExtC2h->reqNum != pH2c->reqNum) -+ { -+ c2hStatus = BT_STATUS_C2H_REQNUM_MISMATCH; -+ DBG_8192C("[MPT], Error!! C2H reqNum Mismatch!!\n"); -+ } -+ else if(pExtC2h->opCodeVer != pH2c->opCodeVer) -+ { -+ c2hStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; -+ DBG_8192C("[MPT], Error!! OPCode version L mismatch!!\n"); -+ } -+ -+ return c2hStatus; -+} -+ -+BT_CTRL_STATUS -+mptbt_SendH2c( -+ PADAPTER Adapter, -+ PBT_H2C pH2c, -+ u2Byte h2cCmdLen -+ ) -+{ -+ //KIRQL OldIrql = KeGetCurrentIrql(); -+ BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS; -+ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); -+ u1Byte i; -+ -+ DBG_8192C("[MPT], mptbt_SendH2c()=========>\n"); -+ -+ //PlatformResetEvent(&pMptCtx->MptH2cRspEvent); -+ //PlatformResetEvent(&pMptCtx->MptBtC2hEvent); -+ -+// if(OldIrql == PASSIVE_LEVEL) -+// { -+ //RTPRINT_DATA(FMPBT, FMPBT_H2C_CONTENT, ("[MPT], MPT H2C hex: \n"), pH2c, h2cCmdLen); -+ -+ for(i=0; iMptH2cRspEvent = _FALSE; -+ pMptCtx->MptBtC2hEvent = _FALSE; -+ -+#if defined(CONFIG_RTL8723B) -+ rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf); -+#endif -+ pMptCtx->h2cReqNum++; -+ pMptCtx->h2cReqNum %= 16; -+ -+ if(WaitC2Hevent(Adapter, &pMptCtx->MptH2cRspEvent, 100)) -+ { -+ DBG_8192C("[MPT], Received WiFi MptH2cRspEvent!!!\n"); -+ if(WaitC2Hevent(Adapter, &pMptCtx->MptBtC2hEvent, 400)) -+ { -+ DBG_8192C("[MPT], Received MptBtC2hEvent!!!\n"); -+ break; -+ } -+ else -+ { -+ DBG_8192C("[MPT], Error!!BT MptBtC2hEvent timeout!!\n"); -+ h2cStatus = BT_STATUS_H2C_BT_NO_RSP; -+ } -+ } -+ else -+ { -+ DBG_8192C("[MPT], Error!!WiFi MptH2cRspEvent timeout!!\n"); -+ h2cStatus = BT_STATUS_H2C_TIMTOUT; -+ } -+ } -+// } -+// else -+// { -+// RT_ASSERT(FALSE, ("[MPT], mptbt_SendH2c() can only run under PASSIVE_LEVEL!!\n")); -+// h2cStatus = BT_STATUS_WRONG_LEVEL; -+// } -+ -+ DBG_8192C("[MPT], mptbt_SendH2c()<=========\n"); -+ return h2cStatus; -+} -+ -+ -+ -+BT_CTRL_STATUS -+mptbt_CheckBtRspStatus( -+ PADAPTER Adapter, -+ PBT_EXT_C2H pExtC2h -+ ) -+{ -+ BT_CTRL_STATUS retStatus=BT_OP_STATUS_SUCCESS; -+ -+ switch(pExtC2h->statusCode) -+ { -+ case BT_OP_STATUS_SUCCESS: -+ retStatus = BT_STATUS_BT_OP_SUCCESS; -+ DBG_8192C("[MPT], BT status : BT_STATUS_SUCCESS\n"); -+ break; -+ case BT_OP_STATUS_VERSION_MISMATCH: -+ retStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; -+ DBG_8192C("[MPT], BT status : BT_STATUS_OPCODE_L_VERSION_MISMATCH\n"); -+ break; -+ case BT_OP_STATUS_UNKNOWN_OPCODE: -+ retStatus = BT_STATUS_UNKNOWN_OPCODE_L; -+ DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_OPCODE_L\n"); -+ break; -+ case BT_OP_STATUS_ERROR_PARAMETER: -+ retStatus = BT_STATUS_PARAMETER_FORMAT_ERROR_L; -+ DBG_8192C("[MPT], BT status : BT_STATUS_PARAMETER_FORMAT_ERROR_L\n"); -+ break; -+ default: -+ retStatus = BT_STATUS_UNKNOWN_STATUS_L; -+ DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_STATUS_L\n"); -+ break; -+ } -+ -+ return retStatus; -+} -+ -+ -+ -+BT_CTRL_STATUS -+mptbt_BtFwOpCodeProcess( -+ PADAPTER Adapter, -+ u1Byte btFwOpCode, -+ u1Byte opCodeVer, -+ pu1Byte pH2cPar, -+ u1Byte h2cParaLen -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; -+ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); -+ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; -+ u2Byte paraLen=0,i; -+ BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS, c2hStatus=BT_STATUS_C2H_SUCCESS; -+ BT_CTRL_STATUS retStatus=BT_STATUS_H2C_BT_NO_RSP; -+ -+ if( Adapter->registrypriv.mp_mode == 0 ) -+ { -+ DBG_8192C("[MPT], Error!! mptbt_BtFwOpCodeProces mp_mode == 0!!\n"); -+ return _FALSE; -+ } -+ -+ pH2c->opCode = btFwOpCode; -+ pH2c->opCodeVer = opCodeVer; -+ pH2c->reqNum = pMptCtx->h2cReqNum; -+ //PlatformMoveMemory(&pH2c->buf[0], pH2cPar, h2cParaLen); -+ //_rtw_memcpy(&pH2c->buf[0], pH2cPar, h2cParaLen); -+ _rtw_memcpy(pH2c->buf, pH2cPar, h2cParaLen); -+ -+ DBG_8192C("[MPT], pH2c->opCode=%d\n", pH2c->opCode); -+ DBG_8192C("[MPT], pH2c->opCodeVer=%d\n", pH2c->opCodeVer); -+ DBG_8192C("[MPT], pH2c->reqNum=%d\n", pH2c->reqNum); -+ DBG_8192C("[MPT], h2c parameter length=%d\n", h2cParaLen); -+ for (i=0; ibuf[i]); -+ } -+ -+ h2cStatus = mptbt_SendH2c(Adapter, pH2c, h2cParaLen+2); -+ if(BT_STATUS_H2C_SUCCESS == h2cStatus) -+ { -+ // if reach here, it means H2C get the correct c2h response, -+ c2hStatus = mptbt_CheckC2hFrame(Adapter, pH2c, pExtC2h); -+ if(BT_STATUS_C2H_SUCCESS == c2hStatus) -+ { -+ retStatus = mptbt_CheckBtRspStatus(Adapter, pExtC2h); -+ } -+ else -+ { -+ DBG_8192C("[MPT], Error!! C2H failed for pH2c->opCode=%d\n", pH2c->opCode); -+ // check c2h status error, return error status code to upper layer. -+ retStatus = c2hStatus; -+ } -+ } -+ else -+ { -+ DBG_8192C("[MPT], Error!! H2C failed for pH2c->opCode=%d\n", pH2c->opCode); -+ // check h2c status error, return error status code to upper layer. -+ retStatus = h2cStatus; -+ } -+ -+ return retStatus; -+} -+ -+ -+ -+ -+u2Byte -+mptbt_BtReady( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+ ) -+{ -+ u1Byte h2cParaBuf[6] ={0}; -+ u1Byte h2cParaLen=0; -+ u2Byte paraLen=0; -+ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; -+ u1Byte btOpcode; -+ u1Byte btOpcodeVer=0; -+ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); -+ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; -+ u1Byte i; -+ u1Byte btFwVer=0, bdAddr[6]={0}; -+ u2Byte btRealFwVer=0; -+ pu2Byte pu2Tmp=NULL; -+ -+ // -+ // check upper layer parameters -+ // -+ -+ // 1. check upper layer opcode version -+ if(pBtReq->opCodeVer != 1) -+ { -+ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ -+ pBtRsp->pParamStart[0] = MP_BT_NOT_READY; -+ paraLen = 10; -+ // -+ // execute lower layer opcodes -+ // -+ -+ // Get BT FW version -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_GET_BT_VERSION; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ else -+ { -+ pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; -+ btRealFwVer = *pu2Tmp; -+ btFwVer = pExtC2h->buf[1]; -+ DBG_8192C("[MPT], btRealFwVer=0x%x, btFwVer=0x%x\n", btRealFwVer, btFwVer); -+ } -+ -+ // Get BD Address -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_GET_BD_ADDR_L; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ else -+ { -+ bdAddr[5] = pExtC2h->buf[0]; -+ bdAddr[4] = pExtC2h->buf[1]; -+ bdAddr[3] = pExtC2h->buf[2]; -+ } -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_GET_BD_ADDR_H; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ else -+ { -+ bdAddr[2] = pExtC2h->buf[0]; -+ bdAddr[1] = pExtC2h->buf[1]; -+ bdAddr[0] = pExtC2h->buf[2]; -+ } -+ DBG_8192C("[MPT], Local BDAddr:"); -+ for(i=0; i<6; i++) -+ { -+ DBG_8192C(" 0x%x ", bdAddr[i]); -+ } -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ pBtRsp->pParamStart[0] = MP_BT_READY; -+ pu2Tmp = (pu2Byte)&pBtRsp->pParamStart[1]; -+ *pu2Tmp = btRealFwVer; -+ pBtRsp->pParamStart[3] = btFwVer; -+ for(i=0; i<6; i++) -+ { -+ pBtRsp->pParamStart[4+i] = bdAddr[5-i]; -+ } -+ -+ return paraLen; -+} -+ -+void mptbt_close_WiFiRF(PADAPTER Adapter) -+{ -+ PHY_SetBBReg(Adapter, 0x824, 0xF, 0x0); -+ PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x0); -+ PHY_SetRFReg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x0); -+} -+ -+void mptbt_open_WiFiRF(PADAPTER Adapter) -+{ -+ PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x3); -+ PHY_SetBBReg(Adapter, 0x824, 0xF, 0x2); -+ PHY_SetRFReg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x3); -+} -+ -+u4Byte mptbt_switch_RF(PADAPTER Adapter, u1Byte Enter) -+{ -+ u2Byte tmp_2byte = 0; -+ -+ //Enter test mode -+ if (Enter) { -+ ////1>. close WiFi RF -+ mptbt_close_WiFiRF(Adapter); -+ -+ ////2>. change ant switch to BT -+ tmp_2byte = rtw_read16(Adapter, 0x860); -+ tmp_2byte = tmp_2byte | BIT(9); -+ tmp_2byte = tmp_2byte & (~BIT(8)); -+ rtw_write16(Adapter, 0x860, tmp_2byte); -+ rtw_write16(Adapter, 0x870, 0x300); -+ } else { -+ ////1>. Open WiFi RF -+ mptbt_open_WiFiRF(Adapter); -+ -+ ////2>. change ant switch back -+ tmp_2byte = rtw_read16(Adapter, 0x860); -+ tmp_2byte = tmp_2byte | BIT(8); -+ tmp_2byte = tmp_2byte & (~BIT(9)); -+ rtw_write16(Adapter, 0x860, tmp_2byte); -+ rtw_write16(Adapter, 0x870, 0x300); -+ } -+ -+ return 0; -+} -+ -+u2Byte -+mptbt_BtSetMode( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+ ) -+{ -+ u1Byte h2cParaBuf[6] ={0}; -+ u1Byte h2cParaLen=0; -+ u2Byte paraLen=0; -+ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; -+ u1Byte btOpcode; -+ u1Byte btOpcodeVer=0; -+ u1Byte btModeToSet=0; -+ -+ // -+ // check upper layer parameters -+ // -+ // 1. check upper layer opcode version -+ if(pBtReq->opCodeVer != 1) -+ { -+ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ // 2. check upper layer parameter length -+ if(1 == pBtReq->paraLength) -+ { -+ btModeToSet = pBtReq->pParamStart[0]; -+ DBG_8192C("[MPT], BtTestMode=%d \n", btModeToSet); -+ } -+ else -+ { -+ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ // -+ // execute lower layer opcodes -+ // -+ -+ // 1. fill h2c parameters -+ // check bt mode -+ btOpcode = BT_LO_OP_SET_BT_MODE; -+ if(btModeToSet >= MP_BT_MODE_MAX) -+ { -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ mptbt_switch_RF(Adapter, 1); -+ -+ h2cParaBuf[0] = btModeToSet; -+ h2cParaLen = 1; -+ // 2. execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // 3. construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS == retStatus) -+ { -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ } -+ else -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ } -+ -+ return paraLen; -+} -+ -+ -+VOID -+MPTBT_FwC2hBtMpCtrl( -+ PADAPTER Adapter, -+ pu1Byte tmpBuf, -+ u1Byte length -+ ) -+{ -+ u32 i; -+ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); -+ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)tmpBuf; -+ -+ if(Adapter->bBTFWReady == _FALSE || Adapter->registrypriv.mp_mode == 0 ) -+ { -+ //DBG_8192C("Ignore C2H BT MP Info since not in MP mode \n"); -+ return; -+ } -+ if( length > 32 || length < 3 ) -+ { -+ DBG_8192C("\n [MPT], pExtC2h->buf hex: length=%d > 32 || < 3\n",length); -+ return; -+ } -+ -+ //cancel_timeout for h2c handle -+ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); -+ -+ for (i=0; iextendId=0x%x\n", pExtC2h->extendId); -+ -+ switch(pExtC2h->extendId) -+ { -+ case EXT_C2H_WIFI_FW_ACTIVE_RSP: -+ DBG_8192C("[MPT], EXT_C2H_WIFI_FW_ACTIVE_RSP\n"); -+#if 0 -+ DBG_8192C("[MPT], pExtC2h->buf hex: \n"); -+ for (i=0; i<(length-3); i++) -+ { -+ DBG_8192C(" 0x%x ", pExtC2h->buf[i]); -+ } -+#endif -+ if ((_FALSE == pMptCtx->bMPh2c_timeout) -+ && (_FALSE == pMptCtx->MptH2cRspEvent)) -+ { -+ pMptCtx->MptH2cRspEvent = _TRUE; -+ _rtw_up_sema(&pMptCtx->MPh2c_Sema); -+ } -+ break; -+ -+ case EXT_C2H_TRIG_BY_BT_FW: -+ DBG_8192C("[MPT], EXT_C2H_TRIG_BY_BT_FW\n"); -+ _rtw_memcpy(&pMptCtx->c2hBuf[0], tmpBuf, length); -+ DBG_8192C("[MPT], pExtC2h->statusCode=0x%x\n", pExtC2h->statusCode); -+ DBG_8192C("[MPT], pExtC2h->retLen=0x%x\n", pExtC2h->retLen); -+ DBG_8192C("[MPT], pExtC2h->opCodeVer=0x%x\n", pExtC2h->opCodeVer); -+ DBG_8192C("[MPT], pExtC2h->reqNum=0x%x\n", pExtC2h->reqNum); -+ for (i=0; i<(length-3); i++) -+ { -+ DBG_8192C("[MPT], pExtC2h->buf[%d]=0x%02x\n", i, pExtC2h->buf[i]); -+ } -+ -+ if ((_FALSE == pMptCtx->bMPh2c_timeout) -+ && (_TRUE == pMptCtx->MptH2cRspEvent) -+ && (_FALSE == pMptCtx->MptBtC2hEvent)) -+ { -+ pMptCtx->MptBtC2hEvent = _TRUE; -+ _rtw_up_sema(&pMptCtx->MPh2c_Sema); -+ } -+ break; -+ -+ default: -+ DBG_8192C("[MPT], EXT_C2H Target not found,pExtC2h->extendId =%d ,pExtC2h->reqNum=%d\n",pExtC2h->extendId,pExtC2h->reqNum); -+ break; -+ } -+ -+ -+ -+} -+ -+ -+u2Byte -+mptbt_BtGetGeneral( -+ IN PADAPTER Adapter, -+ IN PBT_REQ_CMD pBtReq, -+ IN PBT_RSP_CMD pBtRsp -+ ) -+{ -+ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); -+ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; -+ u1Byte h2cParaBuf[6] ={0}; -+ u1Byte h2cParaLen=0; -+ u2Byte paraLen=0; -+ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; -+ u1Byte btOpcode, bdAddr[6]={0}; -+ u1Byte btOpcodeVer=0; -+ u1Byte getType=0, i; -+ u2Byte getParaLen=0, validParaLen=0; -+ u1Byte regType=0, reportType=0; -+ u4Byte regAddr=0, regValue=0; -+ pu4Byte pu4Tmp; -+ pu2Byte pu2Tmp; -+ pu1Byte pu1Tmp; -+ -+ // -+ // check upper layer parameters -+ // -+ -+ // check upper layer opcode version -+ if(pBtReq->opCodeVer != 1) -+ { -+ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ // check upper layer parameter length -+ if(pBtReq->paraLength < 1) -+ { -+ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ getParaLen = pBtReq->paraLength - 1; -+ getType = pBtReq->pParamStart[0]; -+ -+ DBG_8192C("[MPT], getType=%d, getParaLen=%d\n", getType, getParaLen); -+ -+ // check parameter first -+ switch(getType) -+ { -+ case BT_GGET_REG: -+ DBG_8192C("[MPT], [BT_GGET_REG]\n"); -+ validParaLen = 5; -+ if(getParaLen == validParaLen) -+ { -+ btOpcode = BT_LO_OP_READ_REG; -+ regType = pBtReq->pParamStart[1]; -+ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; -+ regAddr = *pu4Tmp; -+ DBG_8192C("[MPT], BT_GGET_REG regType=0x%02x, regAddr=0x%08x!!\n", -+ regType, regAddr); -+ if(regType >= BT_REG_MAX) -+ { -+ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || -+ ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || -+ ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || -+ ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || -+ ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) -+ { -+ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ } -+ } -+ break; -+ case BT_GGET_STATUS: -+ DBG_8192C("[MPT], [BT_GGET_STATUS]\n"); -+ validParaLen = 0; -+ break; -+ case BT_GGET_REPORT: -+ DBG_8192C("[MPT], [BT_GGET_REPORT]\n"); -+ validParaLen = 1; -+ if(getParaLen == validParaLen) -+ { -+ reportType = pBtReq->pParamStart[1]; -+ DBG_8192C("[MPT], BT_GGET_REPORT reportType=0x%x!!\n", reportType); -+ if(reportType >= BT_REPORT_MAX) -+ { -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ } -+ break; -+ default: -+ { -+ DBG_8192C("[MPT], Error!! getType=%d, out of range\n", getType); -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ break; -+ } -+ if(getParaLen != validParaLen) -+ { -+ DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_GET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", -+ getParaLen, getType, validParaLen); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ // -+ // execute lower layer opcodes -+ // -+ if(BT_GGET_REG == getType) -+ { -+ // fill h2c parameters -+ // here we should write reg value first then write the address, adviced by Austin -+ btOpcode = BT_LO_OP_READ_REG; -+ h2cParaBuf[0] = regType; -+ h2cParaBuf[1] = pBtReq->pParamStart[2]; -+ h2cParaBuf[2] = pBtReq->pParamStart[3]; -+ h2cParaLen = 3; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; -+ regValue = *pu2Tmp; -+ DBG_8192C("[MPT], read reg regType=0x%02x, regAddr=0x%08x, regValue=0x%04x\n", -+ regType, regAddr, regValue); -+ -+ pu4Tmp = (pu4Byte)&pBtRsp->pParamStart[0]; -+ *pu4Tmp = regValue; -+ paraLen = 4; -+ } -+ else if(BT_GGET_STATUS == getType) -+ { -+ btOpcode = BT_LO_OP_GET_BT_STATUS; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ DBG_8192C("[MPT], read bt status, testMode=0x%x, testStatus=0x%x\n", -+ pBtRsp->pParamStart[0], pBtRsp->pParamStart[1]); -+ paraLen = 2; -+ } -+ else if(BT_GGET_REPORT == getType) -+ { -+ switch(reportType) -+ { -+ case BT_REPORT_RX_PACKET_CNT: -+ { -+ DBG_8192C("[MPT], [Rx Packet Counts]\n"); -+ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_L; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ -+ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_H; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; -+ paraLen = 4; -+ } -+ break; -+ case BT_REPORT_RX_ERROR_BITS: -+ { -+ DBG_8192C("[MPT], [Rx Error Bits]\n"); -+ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_L; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ -+ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_H; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; -+ paraLen = 4; -+ } -+ break; -+ case BT_REPORT_RSSI: -+ { -+ DBG_8192C("[MPT], [RSSI]\n"); -+ btOpcode = BT_LO_OP_GET_RSSI; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ paraLen = 2; -+ } -+ break; -+ case BT_REPORT_CFO_HDR_QUALITY: -+ { -+ DBG_8192C("[MPT], [CFO & Header Quality]\n"); -+ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_L; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ -+ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_H; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; -+ paraLen = 4; -+ } -+ break; -+ case BT_REPORT_CONNECT_TARGET_BD_ADDR: -+ { -+ DBG_8192C("[MPT], [Connected Target BD ADDR]\n"); -+ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_L; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ bdAddr[5] = pExtC2h->buf[0]; -+ bdAddr[4] = pExtC2h->buf[1]; -+ bdAddr[3] = pExtC2h->buf[2]; -+ -+ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_H; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ bdAddr[2] = pExtC2h->buf[0]; -+ bdAddr[1] = pExtC2h->buf[1]; -+ bdAddr[0] = pExtC2h->buf[2]; -+ -+ DBG_8192C("[MPT], Connected Target BDAddr:%s", bdAddr); -+ for(i=0; i<6; i++) -+ { -+ pBtRsp->pParamStart[i] = bdAddr[5-i]; -+ } -+ paraLen = 6; -+ } -+ break; -+ default: -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ break; -+ } -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+ -+u2Byte -+mptbt_BtSetGeneral( -+ IN PADAPTER Adapter, -+ IN PBT_REQ_CMD pBtReq, -+ IN PBT_RSP_CMD pBtRsp -+ ) -+{ -+ u1Byte h2cParaBuf[6] ={0}; -+ u1Byte h2cParaLen=0; -+ u2Byte paraLen=0; -+ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; -+ u1Byte btOpcode; -+ u1Byte btOpcodeVer=0; -+ u1Byte setType=0; -+ u2Byte setParaLen=0, validParaLen=0; -+ u1Byte regType=0, bdAddr[6]={0}, calVal=0; -+ u4Byte regAddr=0, regValue=0; -+ pu4Byte pu4Tmp; -+ pu2Byte pu2Tmp; -+ pu1Byte pu1Tmp; -+ -+ // -+ // check upper layer parameters -+ // -+ -+ // check upper layer opcode version -+ if(pBtReq->opCodeVer != 1) -+ { -+ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ // check upper layer parameter length -+ if(pBtReq->paraLength < 1) -+ { -+ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ setParaLen = pBtReq->paraLength - 1; -+ setType = pBtReq->pParamStart[0]; -+ -+ DBG_8192C("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen); -+ -+ // check parameter first -+ switch(setType) -+ { -+ case BT_GSET_REG: -+ DBG_8192C ("[MPT], [BT_GSET_REG]\n"); -+ validParaLen = 9; -+ if(setParaLen == validParaLen) -+ { -+ btOpcode = BT_LO_OP_WRITE_REG_VALUE; -+ regType = pBtReq->pParamStart[1]; -+ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; -+ regAddr = *pu4Tmp; -+ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6]; -+ regValue = *pu4Tmp; -+ DBG_8192C("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n", -+ regType, regAddr, regValue); -+ if(regType >= BT_REG_MAX) -+ { -+ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || -+ ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || -+ ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || -+ ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || -+ ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) -+ { -+ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ } -+ } -+ break; -+ case BT_GSET_RESET: -+ DBG_8192C("[MPT], [BT_GSET_RESET]\n"); -+ validParaLen = 0; -+ break; -+ case BT_GSET_TARGET_BD_ADDR: -+ DBG_8192C("[MPT], [BT_GSET_TARGET_BD_ADDR]\n"); -+ validParaLen = 6; -+ if(setParaLen == validParaLen) -+ { -+ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; -+ if( (pBtReq->pParamStart[1]==0) && -+ (pBtReq->pParamStart[2]==0) && -+ (pBtReq->pParamStart[3]==0) && -+ (pBtReq->pParamStart[4]==0) && -+ (pBtReq->pParamStart[5]==0) && -+ (pBtReq->pParamStart[6]==0) ) -+ { -+ DBG_8192C("[MPT], Error!! targetBDAddr=all zero\n"); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ if( (pBtReq->pParamStart[1]==0xff) && -+ (pBtReq->pParamStart[2]==0xff) && -+ (pBtReq->pParamStart[3]==0xff) && -+ (pBtReq->pParamStart[4]==0xff) && -+ (pBtReq->pParamStart[5]==0xff) && -+ (pBtReq->pParamStart[6]==0xff) ) -+ { -+ DBG_8192C("[MPT], Error!! targetBDAddr=all 0xf\n"); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ bdAddr[0] = pBtReq->pParamStart[6]; -+ bdAddr[1] = pBtReq->pParamStart[5]; -+ bdAddr[2] = pBtReq->pParamStart[4]; -+ bdAddr[3] = pBtReq->pParamStart[3]; -+ bdAddr[4] = pBtReq->pParamStart[2]; -+ bdAddr[5] = pBtReq->pParamStart[1]; -+ DBG_8192C ("[MPT], target BDAddr:%x,%x,%x,%x,%x,%x\n", -+ bdAddr[0],bdAddr[1],bdAddr[2],bdAddr[3],bdAddr[4],bdAddr[5]); -+ } -+ break; -+ case BT_GSET_TX_PWR_FINETUNE: -+ DBG_8192C("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n"); -+ validParaLen = 1; -+ if(setParaLen == validParaLen) -+ { -+ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; -+ calVal = pBtReq->pParamStart[1]; -+ if( (calVal<1) || (calVal>9) ) -+ { -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ DBG_8192C ("[MPT], calVal=%d\n", calVal); -+ } -+ break; -+ case BT_SET_TRACKING_INTERVAL: -+ DBG_871X("[MPT], [BT_SET_TRACKING_INTERVAL] setParaLen =%d \n",setParaLen); -+ -+ validParaLen = 1; -+ if(setParaLen == validParaLen) -+ calVal = pBtReq->pParamStart[1]; -+ break; -+ case BT_SET_THERMAL_METER: -+ DBG_871X("[MPT], [BT_SET_THERMAL_METER] setParaLen =%d \n",setParaLen); -+ validParaLen = 1; -+ if(setParaLen == validParaLen) -+ calVal = pBtReq->pParamStart[1]; -+ break; -+ case BT_ENABLE_CFO_TRACKING: -+ DBG_871X("[MPT], [BT_ENABLE_CFO_TRACKING] setParaLen =%d \n",setParaLen); -+ validParaLen = 1; -+ if(setParaLen == validParaLen) -+ calVal = pBtReq->pParamStart[1]; -+ break; -+ case BT_GSET_UPDATE_BT_PATCH: -+ -+ break; -+ default: -+ { -+ DBG_8192C ("[MPT], Error!! setType=%d, out of range\n", setType); -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ break; -+ } -+ if(setParaLen != validParaLen) -+ { -+ DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", -+ setParaLen, setType, validParaLen); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ // -+ // execute lower layer opcodes -+ // -+ if(BT_GSET_REG == setType) -+ { -+ // fill h2c parameters -+ // here we should write reg value first then write the address, adviced by Austin -+ btOpcode = BT_LO_OP_WRITE_REG_VALUE; -+ h2cParaBuf[0] = pBtReq->pParamStart[6]; -+ h2cParaBuf[1] = pBtReq->pParamStart[7]; -+ h2cParaBuf[2] = pBtReq->pParamStart[8]; -+ h2cParaLen = 3; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ // write reg address -+ btOpcode = BT_LO_OP_WRITE_REG_ADDR; -+ h2cParaBuf[0] = regType; -+ h2cParaBuf[1] = pBtReq->pParamStart[2]; -+ h2cParaBuf[2] = pBtReq->pParamStart[3]; -+ h2cParaLen = 3; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ else if(BT_GSET_RESET == setType) -+ { -+ btOpcode = BT_LO_OP_RESET; -+ h2cParaLen = 0; -+ // execute h2c and check respond c2h from bt fw is correct or not -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ else if(BT_GSET_TARGET_BD_ADDR == setType) -+ { -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L; -+ h2cParaBuf[0] = pBtReq->pParamStart[1]; -+ h2cParaBuf[1] = pBtReq->pParamStart[2]; -+ h2cParaBuf[2] = pBtReq->pParamStart[3]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; -+ h2cParaBuf[0] = pBtReq->pParamStart[4]; -+ h2cParaBuf[1] = pBtReq->pParamStart[5]; -+ h2cParaBuf[2] = pBtReq->pParamStart[6]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ else if(BT_GSET_TX_PWR_FINETUNE == setType) -+ { -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ else if(BT_SET_TRACKING_INTERVAL == setType) -+ { -+ // BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, -+ // BT_LO_OP_SET_THERMAL_METER = 0x23, -+ // BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, -+ btOpcode = BT_LO_OP_SET_TRACKING_INTERVAL; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ else if(BT_SET_THERMAL_METER == setType) -+ { -+ btOpcode = BT_LO_OP_SET_THERMAL_METER; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ else if(BT_ENABLE_CFO_TRACKING == setType) -+ { -+ btOpcode = BT_LO_OP_ENABLE_CFO_TRACKING; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+ -+u2Byte -+mptbt_BtSetTxRxPars( -+ IN PADAPTER Adapter, -+ IN PBT_REQ_CMD pBtReq, -+ IN PBT_RSP_CMD pBtRsp -+ ) -+{ -+ u1Byte h2cParaBuf[6] ={0}; -+ u1Byte h2cParaLen=0; -+ u2Byte paraLen=0; -+ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; -+ u1Byte btOpcode; -+ u1Byte btOpcodeVer=0; -+ PBT_TXRX_PARAMETERS pTxRxPars=(PBT_TXRX_PARAMETERS)&pBtReq->pParamStart[0]; -+ u2Byte lenTxRx=sizeof(BT_TXRX_PARAMETERS); -+ u1Byte i; -+ u1Byte bdAddr[6]={0}; -+ -+ // -+ // check upper layer parameters -+ // -+ -+ // 1. check upper layer opcode version -+ if(pBtReq->opCodeVer != 1) -+ { -+ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ // 2. check upper layer parameter length -+ if(pBtReq->paraLength == sizeof(BT_TXRX_PARAMETERS)) -+ { -+ DBG_8192C ("[MPT], pTxRxPars->txrxChannel=0x%x \n", pTxRxPars->txrxChannel); -+ DBG_8192C ("[MPT], pTxRxPars->txrxTxPktCnt=0x%8x \n", pTxRxPars->txrxTxPktCnt); -+ DBG_8192C ("[MPT], pTxRxPars->txrxTxPktInterval=0x%x \n", pTxRxPars->txrxTxPktInterval); -+ DBG_8192C ("[MPT], pTxRxPars->txrxPayloadType=0x%x \n", pTxRxPars->txrxPayloadType); -+ DBG_8192C ("[MPT], pTxRxPars->txrxPktType=0x%x \n", pTxRxPars->txrxPktType); -+ DBG_8192C ("[MPT], pTxRxPars->txrxPayloadLen=0x%x \n", pTxRxPars->txrxPayloadLen); -+ DBG_8192C ("[MPT], pTxRxPars->txrxPktHeader=0x%x \n", pTxRxPars->txrxPktHeader); -+ DBG_8192C ("[MPT], pTxRxPars->txrxWhitenCoeff=0x%x \n", pTxRxPars->txrxWhitenCoeff); -+ bdAddr[0] = pTxRxPars->txrxBdaddr[5]; -+ bdAddr[1] = pTxRxPars->txrxBdaddr[4]; -+ bdAddr[2] = pTxRxPars->txrxBdaddr[3]; -+ bdAddr[3] = pTxRxPars->txrxBdaddr[2]; -+ bdAddr[4] = pTxRxPars->txrxBdaddr[1]; -+ bdAddr[5] = pTxRxPars->txrxBdaddr[0]; -+ DBG_8192C ("[MPT], pTxRxPars->txrxBdaddr: %s", &bdAddr[0]); -+ DBG_8192C ("[MPT], pTxRxPars->txrxTxGainIndex=0x%x \n", pTxRxPars->txrxTxGainIndex); -+ } -+ else -+ { -+ DBG_8192C ("[MPT], Error!! pBtReq->paraLength=%d, correct Len=%d\n", pBtReq->paraLength, lenTxRx); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ // -+ // execute lower layer opcodes -+ // -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_PKT_HEADER; -+ if(pTxRxPars->txrxPktHeader > 0x3ffff) -+ { -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPktHeader=0x%x is out of range, (should be between 0x0~0x3ffff)\n", pTxRxPars->txrxPktHeader); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ h2cParaBuf[0] = (u1Byte)(pTxRxPars->txrxPktHeader&0xff); -+ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff00)>>8); -+ h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff0000)>>16); -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_PKT_TYPE_LEN; -+ { -+ u2Byte payloadLenLimit=0; -+ switch(pTxRxPars->txrxPktType) -+ { -+ case MP_BT_PKT_DH1: -+ payloadLenLimit = 27*8; -+ break; -+ case MP_BT_PKT_DH3: -+ payloadLenLimit = 183*8; -+ break; -+ case MP_BT_PKT_DH5: -+ payloadLenLimit = 339*8; -+ break; -+ case MP_BT_PKT_2DH1: -+ payloadLenLimit = 54*8; -+ break; -+ case MP_BT_PKT_2DH3: -+ payloadLenLimit = 367*8; -+ break; -+ case MP_BT_PKT_2DH5: -+ payloadLenLimit = 679*8; -+ break; -+ case MP_BT_PKT_3DH1: -+ payloadLenLimit = 83*8; -+ break; -+ case MP_BT_PKT_3DH3: -+ payloadLenLimit = 552*8; -+ break; -+ case MP_BT_PKT_3DH5: -+ payloadLenLimit = 1021*8; -+ break; -+ case MP_BT_PKT_LE: -+ payloadLenLimit = 39*8; -+ break; -+ default: -+ { -+ DBG_8192C ("[MPT], Error!! Unknown pTxRxPars->txrxPktType=0x%x\n", pTxRxPars->txrxPktType); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ break; -+ } -+ -+ if(pTxRxPars->txrxPayloadLen > payloadLenLimit) -+ { -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadLen=0x%x, (should smaller than %d)\n", -+ pTxRxPars->txrxPayloadLen, payloadLenLimit); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ -+ h2cParaBuf[0] = pTxRxPars->txrxPktType; -+ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff)); -+ h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff00)>>8); -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_PKT_CNT_L_PL_TYPE; -+ if(pTxRxPars->txrxPayloadType > MP_BT_PAYLOAD_MAX) -+ { -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadType=0x%x, (should be between 0~4)\n", pTxRxPars->txrxPayloadType); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff)); -+ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff00)>>8); -+ h2cParaBuf[2] = pTxRxPars->txrxPayloadType; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_PKT_CNT_H_PKT_INTV; -+ if(pTxRxPars->txrxTxPktInterval > 15) -+ { -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxPktInterval=0x%x, (should be between 0~15)\n", pTxRxPars->txrxTxPktInterval); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff0000)>>16); -+ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff000000)>>24); -+ h2cParaBuf[2] = pTxRxPars->txrxTxPktInterval; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_WHITENCOEFF; -+ { -+ h2cParaBuf[0] = pTxRxPars->txrxWhitenCoeff; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_CHNL_TX_GAIN; -+ if( (pTxRxPars->txrxChannel > 78) || -+ (pTxRxPars->txrxTxGainIndex > 7) ) -+ { -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxChannel=0x%x, (should be between 0~78)\n", pTxRxPars->txrxChannel); -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxGainIndex=0x%x, (should be between 0~7)\n", pTxRxPars->txrxTxGainIndex); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ h2cParaBuf[0] = pTxRxPars->txrxChannel; -+ h2cParaBuf[1] = pTxRxPars->txrxTxGainIndex; -+ h2cParaLen = 2; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ // fill h2c parameters -+ btOpcode = BT_LO_OP_SET_BD_ADDR_L; -+ if( (pTxRxPars->txrxBdaddr[0]==0) && -+ (pTxRxPars->txrxBdaddr[1]==0) && -+ (pTxRxPars->txrxBdaddr[2]==0) && -+ (pTxRxPars->txrxBdaddr[3]==0) && -+ (pTxRxPars->txrxBdaddr[4]==0) && -+ (pTxRxPars->txrxBdaddr[5]==0) ) -+ { -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all zero\n"); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ if( (pTxRxPars->txrxBdaddr[0]==0xff) && -+ (pTxRxPars->txrxBdaddr[1]==0xff) && -+ (pTxRxPars->txrxBdaddr[2]==0xff) && -+ (pTxRxPars->txrxBdaddr[3]==0xff) && -+ (pTxRxPars->txrxBdaddr[4]==0xff) && -+ (pTxRxPars->txrxBdaddr[5]==0xff) ) -+ { -+ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all 0xf\n"); -+ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ -+ { -+ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[0]; -+ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[1]; -+ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[2]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ btOpcode = BT_LO_OP_SET_BD_ADDR_H; -+ { -+ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[3]; -+ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[4]; -+ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[5]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ // ckeck bt return status. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+ -+u2Byte -+mptbt_BtTestCtrl( -+ IN PADAPTER Adapter, -+ IN PBT_REQ_CMD pBtReq, -+ IN PBT_RSP_CMD pBtRsp -+ ) -+{ -+ u1Byte h2cParaBuf[6] ={0}; -+ u1Byte h2cParaLen=0; -+ u2Byte paraLen=0; -+ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; -+ u1Byte btOpcode; -+ u1Byte btOpcodeVer=0; -+ u1Byte testCtrl=0; -+ -+ // -+ // check upper layer parameters -+ // -+ -+ // 1. check upper layer opcode version -+ if(pBtReq->opCodeVer != 1) -+ { -+ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ // 2. check upper layer parameter length -+ if(1 == pBtReq->paraLength) -+ { -+ testCtrl = pBtReq->pParamStart[0]; -+ DBG_8192C("[MPT], testCtrl=%d \n", testCtrl); -+ } -+ else -+ { -+ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ // -+ // execute lower layer opcodes -+ // -+ -+ // 1. fill h2c parameters -+ // check bt mode -+ btOpcode = BT_LO_OP_TEST_CTRL; -+ if(testCtrl >= MP_BT_TEST_MAX) -+ { -+ DBG_8192C("[MPT], Error!! testCtrl=0x%x, (should be between smaller or equal to 0x%x)\n", -+ testCtrl, MP_BT_TEST_MAX-1); -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ else -+ { -+ h2cParaBuf[0] = testCtrl; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ // 3. construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+u2Byte -+mptbt_TestBT( -+ IN PADAPTER Adapter, -+ IN PBT_REQ_CMD pBtReq, -+ IN PBT_RSP_CMD pBtRsp -+ ) -+{ -+ -+ u1Byte h2cParaBuf[6] ={0}; -+ u1Byte h2cParaLen=0; -+ u2Byte paraLen=0; -+ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; -+ u1Byte btOpcode; -+ u1Byte btOpcodeVer=0; -+ u1Byte testCtrl=0; -+ -+ // 1. fill h2c parameters -+ btOpcode = 0x11; -+ h2cParaBuf[0] = 0x11; -+ h2cParaBuf[1] = 0x0; -+ h2cParaBuf[2] = 0x0; -+ h2cParaBuf[3] = 0x0; -+ h2cParaBuf[4] = 0x0; -+ h2cParaLen = 1; -+ // retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, h2cParaBuf, h2cParaLen); -+ -+ -+ // 3. construct respond status code and data. -+ if(BT_STATUS_BT_OP_SUCCESS != retStatus) -+ { -+ pBtRsp->status = ((btOpcode<<8)|retStatus); -+ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+VOID -+mptbt_BtControlProcess( -+ PADAPTER Adapter, -+ PVOID pInBuf -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; -+ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); -+ PBT_REQ_CMD pBtReq=(PBT_REQ_CMD)pInBuf; -+ PBT_RSP_CMD pBtRsp; -+ u1Byte i; -+ -+ -+ DBG_8192C("[MPT], mptbt_BtControlProcess()=========>\n"); -+ -+ DBG_8192C("[MPT], input opCodeVer=%d\n", pBtReq->opCodeVer); -+ DBG_8192C("[MPT], input OpCode=%d\n", pBtReq->OpCode); -+ DBG_8192C("[MPT], paraLength=%d \n", pBtReq->paraLength); -+ if(pBtReq->paraLength) -+ { -+ //DBG_8192C("[MPT], parameters(hex):0x%x %d \n",&pBtReq->pParamStart[0], pBtReq->paraLength); -+ } -+ -+ _rtw_memset((void*)pMptCtx->mptOutBuf, 0, 100); -+ pMptCtx->mptOutLen = 4; //length of (BT_RSP_CMD.status+BT_RSP_CMD.paraLength) -+ -+ pBtRsp = (PBT_RSP_CMD)pMptCtx->mptOutBuf; -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ pBtRsp->paraLength = 0x0; -+ -+ // The following we should maintain the User OP codes sent by upper layer -+ switch(pBtReq->OpCode) -+ { -+ case BT_UP_OP_BT_READY: -+ DBG_8192C("[MPT], OPcode : [BT_READY]\n"); -+ pBtRsp->paraLength = mptbt_BtReady(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_SET_MODE: -+ DBG_8192C("[MPT], OPcode : [BT_SET_MODE]\n"); -+ pBtRsp->paraLength = mptbt_BtSetMode(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_SET_TX_RX_PARAMETER: -+ DBG_8192C("[MPT], OPcode : [BT_SET_TXRX_PARAMETER]\n"); -+ pBtRsp->paraLength = mptbt_BtSetTxRxPars(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_SET_GENERAL: -+ DBG_8192C("[MPT], OPcode : [BT_SET_GENERAL]\n"); -+ pBtRsp->paraLength = mptbt_BtSetGeneral(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_GET_GENERAL: -+ DBG_8192C("[MPT], OPcode : [BT_GET_GENERAL]\n"); -+ pBtRsp->paraLength = mptbt_BtGetGeneral(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_TEST_CTRL: -+ DBG_8192C("[MPT], OPcode : [BT_TEST_CTRL]\n"); -+ pBtRsp->paraLength = mptbt_BtTestCtrl(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_TEST_BT: -+ DBG_8192C("[MPT], OPcode : [TEST_BT]\n"); -+ pBtRsp->paraLength = mptbt_TestBT(Adapter, pBtReq, pBtRsp); -+ break; -+ default: -+ DBG_8192C("[MPT], Error!! OPcode : UNDEFINED!!!!\n"); -+ pBtRsp->status = BT_STATUS_UNKNOWN_OPCODE_U; -+ pBtRsp->paraLength = 0x0; -+ break; -+ } -+ -+ pMptCtx->mptOutLen += pBtRsp->paraLength; -+ -+ DBG_8192C("[MPT], pMptCtx->mptOutLen=%d, pBtRsp->paraLength=%d\n", pMptCtx->mptOutLen, pBtRsp->paraLength); -+ DBG_8192C("[MPT], mptbt_BtControlProcess()<=========\n"); -+} -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#include ++#include ++ ++#if defined(CONFIG_RTL8723B) ++#include ++#endif ++ ++#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) ++void MPh2c_timeout_handle(void *FunctionContext) ++{ ++ PADAPTER pAdapter; ++ PMPT_CONTEXT pMptCtx; ++ ++ ++ DBG_8192C("[MPT], MPh2c_timeout_handle \n"); ++ ++ pAdapter = (PADAPTER)FunctionContext; ++ pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ pMptCtx->bMPh2c_timeout = _TRUE; ++ ++ if ((_FALSE == pMptCtx->MptH2cRspEvent) ++ || ((_TRUE == pMptCtx->MptH2cRspEvent) ++ && (_FALSE == pMptCtx->MptBtC2hEvent))) ++ { ++ _rtw_up_sema(&pMptCtx->MPh2c_Sema); ++ } ++} ++ ++u32 WaitC2Hevent(PADAPTER pAdapter, u8 *C2H_event, u32 delay_time) ++{ ++ PMPT_CONTEXT pMptCtx=&(pAdapter->mppriv.MptCtx); ++ pMptCtx->bMPh2c_timeout=_FALSE; ++ ++ if( pAdapter->registrypriv.mp_mode == 0 ) ++ { ++ DBG_8192C("[MPT], Error!! WaitC2Hevent mp_mode == 0!!\n"); ++ return _FALSE; ++ } ++ ++ _set_timer( &pMptCtx->MPh2c_timeout_timer, delay_time ); ++ ++ _rtw_down_sema(&pMptCtx->MPh2c_Sema); ++ ++ if (pMptCtx->bMPh2c_timeout == _TRUE) ++ { ++ *C2H_event = _FALSE; ++ ++ return _FALSE; ++ } ++ ++ // for safty, cancel timer here again ++ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); ++ ++ return _TRUE; ++} ++ ++BT_CTRL_STATUS ++mptbt_CheckC2hFrame( ++ PADAPTER Adapter, ++ PBT_H2C pH2c, ++ PBT_EXT_C2H pExtC2h ++ ) ++{ ++ BT_CTRL_STATUS c2hStatus = BT_STATUS_C2H_SUCCESS; ++ ++ //DBG_8192C("[MPT], MPT rsp C2H hex: %x %x %x %x %x %x \n"), pExtC2h , pExtC2h+1 ,pExtC2h+2 ,pExtC2h+3 ,pExtC2h+4 ,pExtC2h+5); ++ ++ DBG_8192C("[MPT], statusCode = 0x%x\n", pExtC2h->statusCode); ++ DBG_8192C("[MPT], retLen = %d\n", pExtC2h->retLen); ++ DBG_8192C("[MPT], opCodeVer : req/rsp=%d/%d\n", pH2c->opCodeVer, pExtC2h->opCodeVer); ++ DBG_8192C("[MPT], reqNum : req/rsp=%d/%d\n", pH2c->reqNum, pExtC2h->reqNum); ++ if(pExtC2h->reqNum != pH2c->reqNum) ++ { ++ c2hStatus = BT_STATUS_C2H_REQNUM_MISMATCH; ++ DBG_8192C("[MPT], Error!! C2H reqNum Mismatch!!\n"); ++ } ++ else if(pExtC2h->opCodeVer != pH2c->opCodeVer) ++ { ++ c2hStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; ++ DBG_8192C("[MPT], Error!! OPCode version L mismatch!!\n"); ++ } ++ ++ return c2hStatus; ++} ++ ++BT_CTRL_STATUS ++mptbt_SendH2c( ++ PADAPTER Adapter, ++ PBT_H2C pH2c, ++ u2Byte h2cCmdLen ++ ) ++{ ++ //KIRQL OldIrql = KeGetCurrentIrql(); ++ BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ u1Byte i; ++ ++ DBG_8192C("[MPT], mptbt_SendH2c()=========>\n"); ++ ++ //PlatformResetEvent(&pMptCtx->MptH2cRspEvent); ++ //PlatformResetEvent(&pMptCtx->MptBtC2hEvent); ++ ++// if(OldIrql == PASSIVE_LEVEL) ++// { ++ //RTPRINT_DATA(FMPBT, FMPBT_H2C_CONTENT, ("[MPT], MPT H2C hex: \n"), pH2c, h2cCmdLen); ++ ++ for(i=0; iMptH2cRspEvent = _FALSE; ++ pMptCtx->MptBtC2hEvent = _FALSE; ++ ++#if defined(CONFIG_RTL8723B) ++ rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf); ++#endif ++ pMptCtx->h2cReqNum++; ++ pMptCtx->h2cReqNum %= 16; ++ ++ if(WaitC2Hevent(Adapter, &pMptCtx->MptH2cRspEvent, 100)) ++ { ++ DBG_8192C("[MPT], Received WiFi MptH2cRspEvent!!!\n"); ++ if(WaitC2Hevent(Adapter, &pMptCtx->MptBtC2hEvent, 400)) ++ { ++ DBG_8192C("[MPT], Received MptBtC2hEvent!!!\n"); ++ break; ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!!BT MptBtC2hEvent timeout!!\n"); ++ h2cStatus = BT_STATUS_H2C_BT_NO_RSP; ++ } ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!!WiFi MptH2cRspEvent timeout!!\n"); ++ h2cStatus = BT_STATUS_H2C_TIMTOUT; ++ } ++ } ++// } ++// else ++// { ++// RT_ASSERT(FALSE, ("[MPT], mptbt_SendH2c() can only run under PASSIVE_LEVEL!!\n")); ++// h2cStatus = BT_STATUS_WRONG_LEVEL; ++// } ++ ++ DBG_8192C("[MPT], mptbt_SendH2c()<=========\n"); ++ return h2cStatus; ++} ++ ++ ++ ++BT_CTRL_STATUS ++mptbt_CheckBtRspStatus( ++ PADAPTER Adapter, ++ PBT_EXT_C2H pExtC2h ++ ) ++{ ++ BT_CTRL_STATUS retStatus=BT_OP_STATUS_SUCCESS; ++ ++ switch(pExtC2h->statusCode) ++ { ++ case BT_OP_STATUS_SUCCESS: ++ retStatus = BT_STATUS_BT_OP_SUCCESS; ++ DBG_8192C("[MPT], BT status : BT_STATUS_SUCCESS\n"); ++ break; ++ case BT_OP_STATUS_VERSION_MISMATCH: ++ retStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; ++ DBG_8192C("[MPT], BT status : BT_STATUS_OPCODE_L_VERSION_MISMATCH\n"); ++ break; ++ case BT_OP_STATUS_UNKNOWN_OPCODE: ++ retStatus = BT_STATUS_UNKNOWN_OPCODE_L; ++ DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_OPCODE_L\n"); ++ break; ++ case BT_OP_STATUS_ERROR_PARAMETER: ++ retStatus = BT_STATUS_PARAMETER_FORMAT_ERROR_L; ++ DBG_8192C("[MPT], BT status : BT_STATUS_PARAMETER_FORMAT_ERROR_L\n"); ++ break; ++ default: ++ retStatus = BT_STATUS_UNKNOWN_STATUS_L; ++ DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_STATUS_L\n"); ++ break; ++ } ++ ++ return retStatus; ++} ++ ++ ++ ++BT_CTRL_STATUS ++mptbt_BtFwOpCodeProcess( ++ PADAPTER Adapter, ++ u1Byte btFwOpCode, ++ u1Byte opCodeVer, ++ pu1Byte pH2cPar, ++ u1Byte h2cParaLen ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; ++ u2Byte paraLen=0,i; ++ BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS, c2hStatus=BT_STATUS_C2H_SUCCESS; ++ BT_CTRL_STATUS retStatus=BT_STATUS_H2C_BT_NO_RSP; ++ ++ if( Adapter->registrypriv.mp_mode == 0 ) ++ { ++ DBG_8192C("[MPT], Error!! mptbt_BtFwOpCodeProces mp_mode == 0!!\n"); ++ return _FALSE; ++ } ++ ++ pH2c->opCode = btFwOpCode; ++ pH2c->opCodeVer = opCodeVer; ++ pH2c->reqNum = pMptCtx->h2cReqNum; ++ //PlatformMoveMemory(&pH2c->buf[0], pH2cPar, h2cParaLen); ++ //_rtw_memcpy(&pH2c->buf[0], pH2cPar, h2cParaLen); ++ _rtw_memcpy(pH2c->buf, pH2cPar, h2cParaLen); ++ ++ DBG_8192C("[MPT], pH2c->opCode=%d\n", pH2c->opCode); ++ DBG_8192C("[MPT], pH2c->opCodeVer=%d\n", pH2c->opCodeVer); ++ DBG_8192C("[MPT], pH2c->reqNum=%d\n", pH2c->reqNum); ++ DBG_8192C("[MPT], h2c parameter length=%d\n", h2cParaLen); ++ for (i=0; ibuf[i]); ++ } ++ ++ h2cStatus = mptbt_SendH2c(Adapter, pH2c, h2cParaLen+2); ++ if(BT_STATUS_H2C_SUCCESS == h2cStatus) ++ { ++ // if reach here, it means H2C get the correct c2h response, ++ c2hStatus = mptbt_CheckC2hFrame(Adapter, pH2c, pExtC2h); ++ if(BT_STATUS_C2H_SUCCESS == c2hStatus) ++ { ++ retStatus = mptbt_CheckBtRspStatus(Adapter, pExtC2h); ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! C2H failed for pH2c->opCode=%d\n", pH2c->opCode); ++ // check c2h status error, return error status code to upper layer. ++ retStatus = c2hStatus; ++ } ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! H2C failed for pH2c->opCode=%d\n", pH2c->opCode); ++ // check h2c status error, return error status code to upper layer. ++ retStatus = h2cStatus; ++ } ++ ++ return retStatus; ++} ++ ++ ++ ++ ++u2Byte ++mptbt_BtReady( ++ PADAPTER Adapter, ++ PBT_REQ_CMD pBtReq, ++ PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; ++ u1Byte i; ++ u1Byte btFwVer=0, bdAddr[6]={0}; ++ u2Byte btRealFwVer=0; ++ pu2Byte pu2Tmp=NULL; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ ++ pBtRsp->pParamStart[0] = MP_BT_NOT_READY; ++ paraLen = 10; ++ // ++ // execute lower layer opcodes ++ // ++ ++ // Get BT FW version ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_GET_BT_VERSION; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ else ++ { ++ pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; ++ btRealFwVer = *pu2Tmp; ++ btFwVer = pExtC2h->buf[1]; ++ DBG_8192C("[MPT], btRealFwVer=0x%x, btFwVer=0x%x\n", btRealFwVer, btFwVer); ++ } ++ ++ // Get BD Address ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_GET_BD_ADDR_L; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ else ++ { ++ bdAddr[5] = pExtC2h->buf[0]; ++ bdAddr[4] = pExtC2h->buf[1]; ++ bdAddr[3] = pExtC2h->buf[2]; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_GET_BD_ADDR_H; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ else ++ { ++ bdAddr[2] = pExtC2h->buf[0]; ++ bdAddr[1] = pExtC2h->buf[1]; ++ bdAddr[0] = pExtC2h->buf[2]; ++ } ++ DBG_8192C("[MPT], Local BDAddr:"); ++ for(i=0; i<6; i++) ++ { ++ DBG_8192C(" 0x%x ", bdAddr[i]); ++ } ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ pBtRsp->pParamStart[0] = MP_BT_READY; ++ pu2Tmp = (pu2Byte)&pBtRsp->pParamStart[1]; ++ *pu2Tmp = btRealFwVer; ++ pBtRsp->pParamStart[3] = btFwVer; ++ for(i=0; i<6; i++) ++ { ++ pBtRsp->pParamStart[4+i] = bdAddr[5-i]; ++ } ++ ++ return paraLen; ++} ++ ++void mptbt_close_WiFiRF(PADAPTER Adapter) ++{ ++ PHY_SetBBReg(Adapter, 0x824, 0xF, 0x0); ++ PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x0); ++ PHY_SetRFReg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x0); ++} ++ ++void mptbt_open_WiFiRF(PADAPTER Adapter) ++{ ++ PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x3); ++ PHY_SetBBReg(Adapter, 0x824, 0xF, 0x2); ++ PHY_SetRFReg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x3); ++} ++ ++u4Byte mptbt_switch_RF(PADAPTER Adapter, u1Byte Enter) ++{ ++ u2Byte tmp_2byte = 0; ++ ++ //Enter test mode ++ if (Enter) { ++ ////1>. close WiFi RF ++ mptbt_close_WiFiRF(Adapter); ++ ++ ////2>. change ant switch to BT ++ tmp_2byte = rtw_read16(Adapter, 0x860); ++ tmp_2byte = tmp_2byte | BIT(9); ++ tmp_2byte = tmp_2byte & (~BIT(8)); ++ rtw_write16(Adapter, 0x860, tmp_2byte); ++ rtw_write16(Adapter, 0x870, 0x300); ++ } else { ++ ////1>. Open WiFi RF ++ mptbt_open_WiFiRF(Adapter); ++ ++ ////2>. change ant switch back ++ tmp_2byte = rtw_read16(Adapter, 0x860); ++ tmp_2byte = tmp_2byte | BIT(8); ++ tmp_2byte = tmp_2byte & (~BIT(9)); ++ rtw_write16(Adapter, 0x860, tmp_2byte); ++ rtw_write16(Adapter, 0x870, 0x300); ++ } ++ ++ return 0; ++} ++ ++u2Byte ++mptbt_BtSetMode( ++ PADAPTER Adapter, ++ PBT_REQ_CMD pBtReq, ++ PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte btModeToSet=0; ++ ++ // ++ // check upper layer parameters ++ // ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // 2. check upper layer parameter length ++ if(1 == pBtReq->paraLength) ++ { ++ btModeToSet = pBtReq->pParamStart[0]; ++ DBG_8192C("[MPT], BtTestMode=%d \n", btModeToSet); ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ ++ // 1. fill h2c parameters ++ // check bt mode ++ btOpcode = BT_LO_OP_SET_BT_MODE; ++ if(btModeToSet >= MP_BT_MODE_MAX) ++ { ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ mptbt_switch_RF(Adapter, 1); ++ ++ h2cParaBuf[0] = btModeToSet; ++ h2cParaLen = 1; ++ // 2. execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // 3. construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS == retStatus) ++ { ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ } ++ else ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ } ++ ++ return paraLen; ++} ++ ++ ++VOID ++MPTBT_FwC2hBtMpCtrl( ++ PADAPTER Adapter, ++ pu1Byte tmpBuf, ++ u1Byte length ++ ) ++{ ++ u32 i; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)tmpBuf; ++ ++ if(Adapter->bBTFWReady == _FALSE || Adapter->registrypriv.mp_mode == 0 ) ++ { ++ //DBG_8192C("Ignore C2H BT MP Info since not in MP mode \n"); ++ return; ++ } ++ if( length > 32 || length < 3 ) ++ { ++ DBG_8192C("\n [MPT], pExtC2h->buf hex: length=%d > 32 || < 3\n",length); ++ return; ++ } ++ ++ //cancel_timeout for h2c handle ++ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); ++ ++ for (i=0; iextendId=0x%x\n", pExtC2h->extendId); ++ ++ switch(pExtC2h->extendId) ++ { ++ case EXT_C2H_WIFI_FW_ACTIVE_RSP: ++ DBG_8192C("[MPT], EXT_C2H_WIFI_FW_ACTIVE_RSP\n"); ++#if 0 ++ DBG_8192C("[MPT], pExtC2h->buf hex: \n"); ++ for (i=0; i<(length-3); i++) ++ { ++ DBG_8192C(" 0x%x ", pExtC2h->buf[i]); ++ } ++#endif ++ if ((_FALSE == pMptCtx->bMPh2c_timeout) ++ && (_FALSE == pMptCtx->MptH2cRspEvent)) ++ { ++ pMptCtx->MptH2cRspEvent = _TRUE; ++ _rtw_up_sema(&pMptCtx->MPh2c_Sema); ++ } ++ break; ++ ++ case EXT_C2H_TRIG_BY_BT_FW: ++ DBG_8192C("[MPT], EXT_C2H_TRIG_BY_BT_FW\n"); ++ _rtw_memcpy(&pMptCtx->c2hBuf[0], tmpBuf, length); ++ DBG_8192C("[MPT], pExtC2h->statusCode=0x%x\n", pExtC2h->statusCode); ++ DBG_8192C("[MPT], pExtC2h->retLen=0x%x\n", pExtC2h->retLen); ++ DBG_8192C("[MPT], pExtC2h->opCodeVer=0x%x\n", pExtC2h->opCodeVer); ++ DBG_8192C("[MPT], pExtC2h->reqNum=0x%x\n", pExtC2h->reqNum); ++ for (i=0; i<(length-3); i++) ++ { ++ DBG_8192C("[MPT], pExtC2h->buf[%d]=0x%02x\n", i, pExtC2h->buf[i]); ++ } ++ ++ if ((_FALSE == pMptCtx->bMPh2c_timeout) ++ && (_TRUE == pMptCtx->MptH2cRspEvent) ++ && (_FALSE == pMptCtx->MptBtC2hEvent)) ++ { ++ pMptCtx->MptBtC2hEvent = _TRUE; ++ _rtw_up_sema(&pMptCtx->MPh2c_Sema); ++ } ++ break; ++ ++ default: ++ DBG_8192C("[MPT], EXT_C2H Target not found,pExtC2h->extendId =%d ,pExtC2h->reqNum=%d\n",pExtC2h->extendId,pExtC2h->reqNum); ++ break; ++ } ++ ++ ++ ++} ++ ++ ++u2Byte ++mptbt_BtGetGeneral( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode, bdAddr[6]={0}; ++ u1Byte btOpcodeVer=0; ++ u1Byte getType=0, i; ++ u2Byte getParaLen=0, validParaLen=0; ++ u1Byte regType=0, reportType=0; ++ u4Byte regAddr=0, regValue=0; ++ pu4Byte pu4Tmp; ++ pu2Byte pu2Tmp; ++ pu1Byte pu1Tmp; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // check upper layer parameter length ++ if(pBtReq->paraLength < 1) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ getParaLen = pBtReq->paraLength - 1; ++ getType = pBtReq->pParamStart[0]; ++ ++ DBG_8192C("[MPT], getType=%d, getParaLen=%d\n", getType, getParaLen); ++ ++ // check parameter first ++ switch(getType) ++ { ++ case BT_GGET_REG: ++ DBG_8192C("[MPT], [BT_GGET_REG]\n"); ++ validParaLen = 5; ++ if(getParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_READ_REG; ++ regType = pBtReq->pParamStart[1]; ++ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; ++ regAddr = *pu4Tmp; ++ DBG_8192C("[MPT], BT_GGET_REG regType=0x%02x, regAddr=0x%08x!!\n", ++ regType, regAddr); ++ if(regType >= BT_REG_MAX) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || ++ ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || ++ ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ } ++ } ++ break; ++ case BT_GGET_STATUS: ++ DBG_8192C("[MPT], [BT_GGET_STATUS]\n"); ++ validParaLen = 0; ++ break; ++ case BT_GGET_REPORT: ++ DBG_8192C("[MPT], [BT_GGET_REPORT]\n"); ++ validParaLen = 1; ++ if(getParaLen == validParaLen) ++ { ++ reportType = pBtReq->pParamStart[1]; ++ DBG_8192C("[MPT], BT_GGET_REPORT reportType=0x%x!!\n", reportType); ++ if(reportType >= BT_REPORT_MAX) ++ { ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ } ++ break; ++ default: ++ { ++ DBG_8192C("[MPT], Error!! getType=%d, out of range\n", getType); ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ break; ++ } ++ if(getParaLen != validParaLen) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_GET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", ++ getParaLen, getType, validParaLen); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ if(BT_GGET_REG == getType) ++ { ++ // fill h2c parameters ++ // here we should write reg value first then write the address, adviced by Austin ++ btOpcode = BT_LO_OP_READ_REG; ++ h2cParaBuf[0] = regType; ++ h2cParaBuf[1] = pBtReq->pParamStart[2]; ++ h2cParaBuf[2] = pBtReq->pParamStart[3]; ++ h2cParaLen = 3; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; ++ regValue = *pu2Tmp; ++ DBG_8192C("[MPT], read reg regType=0x%02x, regAddr=0x%08x, regValue=0x%04x\n", ++ regType, regAddr, regValue); ++ ++ pu4Tmp = (pu4Byte)&pBtRsp->pParamStart[0]; ++ *pu4Tmp = regValue; ++ paraLen = 4; ++ } ++ else if(BT_GGET_STATUS == getType) ++ { ++ btOpcode = BT_LO_OP_GET_BT_STATUS; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ DBG_8192C("[MPT], read bt status, testMode=0x%x, testStatus=0x%x\n", ++ pBtRsp->pParamStart[0], pBtRsp->pParamStart[1]); ++ paraLen = 2; ++ } ++ else if(BT_GGET_REPORT == getType) ++ { ++ switch(reportType) ++ { ++ case BT_REPORT_RX_PACKET_CNT: ++ { ++ DBG_8192C("[MPT], [Rx Packet Counts]\n"); ++ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ ++ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; ++ paraLen = 4; ++ } ++ break; ++ case BT_REPORT_RX_ERROR_BITS: ++ { ++ DBG_8192C("[MPT], [Rx Error Bits]\n"); ++ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ ++ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; ++ paraLen = 4; ++ } ++ break; ++ case BT_REPORT_RSSI: ++ { ++ DBG_8192C("[MPT], [RSSI]\n"); ++ btOpcode = BT_LO_OP_GET_RSSI; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ paraLen = 2; ++ } ++ break; ++ case BT_REPORT_CFO_HDR_QUALITY: ++ { ++ DBG_8192C("[MPT], [CFO & Header Quality]\n"); ++ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ ++ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; ++ paraLen = 4; ++ } ++ break; ++ case BT_REPORT_CONNECT_TARGET_BD_ADDR: ++ { ++ DBG_8192C("[MPT], [Connected Target BD ADDR]\n"); ++ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ bdAddr[5] = pExtC2h->buf[0]; ++ bdAddr[4] = pExtC2h->buf[1]; ++ bdAddr[3] = pExtC2h->buf[2]; ++ ++ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ bdAddr[2] = pExtC2h->buf[0]; ++ bdAddr[1] = pExtC2h->buf[1]; ++ bdAddr[0] = pExtC2h->buf[2]; ++ ++ DBG_8192C("[MPT], Connected Target BDAddr:%s", bdAddr); ++ for(i=0; i<6; i++) ++ { ++ pBtRsp->pParamStart[i] = bdAddr[5-i]; ++ } ++ paraLen = 6; ++ } ++ break; ++ default: ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ break; ++ } ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++ ++u2Byte ++mptbt_BtSetGeneral( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte setType=0; ++ u2Byte setParaLen=0, validParaLen=0; ++ u1Byte regType=0, bdAddr[6]={0}, calVal=0; ++ u4Byte regAddr=0, regValue=0; ++ pu4Byte pu4Tmp; ++ pu2Byte pu2Tmp; ++ pu1Byte pu1Tmp; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // check upper layer parameter length ++ if(pBtReq->paraLength < 1) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ setParaLen = pBtReq->paraLength - 1; ++ setType = pBtReq->pParamStart[0]; ++ ++ DBG_8192C("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen); ++ ++ // check parameter first ++ switch(setType) ++ { ++ case BT_GSET_REG: ++ DBG_8192C ("[MPT], [BT_GSET_REG]\n"); ++ validParaLen = 9; ++ if(setParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_WRITE_REG_VALUE; ++ regType = pBtReq->pParamStart[1]; ++ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; ++ regAddr = *pu4Tmp; ++ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6]; ++ regValue = *pu4Tmp; ++ DBG_8192C("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n", ++ regType, regAddr, regValue); ++ if(regType >= BT_REG_MAX) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || ++ ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || ++ ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ } ++ } ++ break; ++ case BT_GSET_RESET: ++ DBG_8192C("[MPT], [BT_GSET_RESET]\n"); ++ validParaLen = 0; ++ break; ++ case BT_GSET_TARGET_BD_ADDR: ++ DBG_8192C("[MPT], [BT_GSET_TARGET_BD_ADDR]\n"); ++ validParaLen = 6; ++ if(setParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; ++ if( (pBtReq->pParamStart[1]==0) && ++ (pBtReq->pParamStart[2]==0) && ++ (pBtReq->pParamStart[3]==0) && ++ (pBtReq->pParamStart[4]==0) && ++ (pBtReq->pParamStart[5]==0) && ++ (pBtReq->pParamStart[6]==0) ) ++ { ++ DBG_8192C("[MPT], Error!! targetBDAddr=all zero\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ if( (pBtReq->pParamStart[1]==0xff) && ++ (pBtReq->pParamStart[2]==0xff) && ++ (pBtReq->pParamStart[3]==0xff) && ++ (pBtReq->pParamStart[4]==0xff) && ++ (pBtReq->pParamStart[5]==0xff) && ++ (pBtReq->pParamStart[6]==0xff) ) ++ { ++ DBG_8192C("[MPT], Error!! targetBDAddr=all 0xf\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ bdAddr[0] = pBtReq->pParamStart[6]; ++ bdAddr[1] = pBtReq->pParamStart[5]; ++ bdAddr[2] = pBtReq->pParamStart[4]; ++ bdAddr[3] = pBtReq->pParamStart[3]; ++ bdAddr[4] = pBtReq->pParamStart[2]; ++ bdAddr[5] = pBtReq->pParamStart[1]; ++ DBG_8192C ("[MPT], target BDAddr:%x,%x,%x,%x,%x,%x\n", ++ bdAddr[0],bdAddr[1],bdAddr[2],bdAddr[3],bdAddr[4],bdAddr[5]); ++ } ++ break; ++ case BT_GSET_TX_PWR_FINETUNE: ++ DBG_8192C("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n"); ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; ++ calVal = pBtReq->pParamStart[1]; ++ if( (calVal<1) || (calVal>9) ) ++ { ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ DBG_8192C ("[MPT], calVal=%d\n", calVal); ++ } ++ break; ++ case BT_SET_TRACKING_INTERVAL: ++ DBG_871X("[MPT], [BT_SET_TRACKING_INTERVAL] setParaLen =%d \n",setParaLen); ++ ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ calVal = pBtReq->pParamStart[1]; ++ break; ++ case BT_SET_THERMAL_METER: ++ DBG_871X("[MPT], [BT_SET_THERMAL_METER] setParaLen =%d \n",setParaLen); ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ calVal = pBtReq->pParamStart[1]; ++ break; ++ case BT_ENABLE_CFO_TRACKING: ++ DBG_871X("[MPT], [BT_ENABLE_CFO_TRACKING] setParaLen =%d \n",setParaLen); ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ calVal = pBtReq->pParamStart[1]; ++ break; ++ case BT_GSET_UPDATE_BT_PATCH: ++ ++ break; ++ default: ++ { ++ DBG_8192C ("[MPT], Error!! setType=%d, out of range\n", setType); ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ break; ++ } ++ if(setParaLen != validParaLen) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", ++ setParaLen, setType, validParaLen); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ if(BT_GSET_REG == setType) ++ { ++ // fill h2c parameters ++ // here we should write reg value first then write the address, adviced by Austin ++ btOpcode = BT_LO_OP_WRITE_REG_VALUE; ++ h2cParaBuf[0] = pBtReq->pParamStart[6]; ++ h2cParaBuf[1] = pBtReq->pParamStart[7]; ++ h2cParaBuf[2] = pBtReq->pParamStart[8]; ++ h2cParaLen = 3; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // write reg address ++ btOpcode = BT_LO_OP_WRITE_REG_ADDR; ++ h2cParaBuf[0] = regType; ++ h2cParaBuf[1] = pBtReq->pParamStart[2]; ++ h2cParaBuf[2] = pBtReq->pParamStart[3]; ++ h2cParaLen = 3; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_GSET_RESET == setType) ++ { ++ btOpcode = BT_LO_OP_RESET; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_GSET_TARGET_BD_ADDR == setType) ++ { ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L; ++ h2cParaBuf[0] = pBtReq->pParamStart[1]; ++ h2cParaBuf[1] = pBtReq->pParamStart[2]; ++ h2cParaBuf[2] = pBtReq->pParamStart[3]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; ++ h2cParaBuf[0] = pBtReq->pParamStart[4]; ++ h2cParaBuf[1] = pBtReq->pParamStart[5]; ++ h2cParaBuf[2] = pBtReq->pParamStart[6]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_GSET_TX_PWR_FINETUNE == setType) ++ { ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_SET_TRACKING_INTERVAL == setType) ++ { ++ // BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, ++ // BT_LO_OP_SET_THERMAL_METER = 0x23, ++ // BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, ++ btOpcode = BT_LO_OP_SET_TRACKING_INTERVAL; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_SET_THERMAL_METER == setType) ++ { ++ btOpcode = BT_LO_OP_SET_THERMAL_METER; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_ENABLE_CFO_TRACKING == setType) ++ { ++ btOpcode = BT_LO_OP_ENABLE_CFO_TRACKING; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++ ++u2Byte ++mptbt_BtSetTxRxPars( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ PBT_TXRX_PARAMETERS pTxRxPars=(PBT_TXRX_PARAMETERS)&pBtReq->pParamStart[0]; ++ u2Byte lenTxRx=sizeof(BT_TXRX_PARAMETERS); ++ u1Byte i; ++ u1Byte bdAddr[6]={0}; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // 2. check upper layer parameter length ++ if(pBtReq->paraLength == sizeof(BT_TXRX_PARAMETERS)) ++ { ++ DBG_8192C ("[MPT], pTxRxPars->txrxChannel=0x%x \n", pTxRxPars->txrxChannel); ++ DBG_8192C ("[MPT], pTxRxPars->txrxTxPktCnt=0x%8x \n", pTxRxPars->txrxTxPktCnt); ++ DBG_8192C ("[MPT], pTxRxPars->txrxTxPktInterval=0x%x \n", pTxRxPars->txrxTxPktInterval); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPayloadType=0x%x \n", pTxRxPars->txrxPayloadType); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPktType=0x%x \n", pTxRxPars->txrxPktType); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPayloadLen=0x%x \n", pTxRxPars->txrxPayloadLen); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPktHeader=0x%x \n", pTxRxPars->txrxPktHeader); ++ DBG_8192C ("[MPT], pTxRxPars->txrxWhitenCoeff=0x%x \n", pTxRxPars->txrxWhitenCoeff); ++ bdAddr[0] = pTxRxPars->txrxBdaddr[5]; ++ bdAddr[1] = pTxRxPars->txrxBdaddr[4]; ++ bdAddr[2] = pTxRxPars->txrxBdaddr[3]; ++ bdAddr[3] = pTxRxPars->txrxBdaddr[2]; ++ bdAddr[4] = pTxRxPars->txrxBdaddr[1]; ++ bdAddr[5] = pTxRxPars->txrxBdaddr[0]; ++ DBG_8192C ("[MPT], pTxRxPars->txrxBdaddr: %s", &bdAddr[0]); ++ DBG_8192C ("[MPT], pTxRxPars->txrxTxGainIndex=0x%x \n", pTxRxPars->txrxTxGainIndex); ++ } ++ else ++ { ++ DBG_8192C ("[MPT], Error!! pBtReq->paraLength=%d, correct Len=%d\n", pBtReq->paraLength, lenTxRx); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_HEADER; ++ if(pTxRxPars->txrxPktHeader > 0x3ffff) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPktHeader=0x%x is out of range, (should be between 0x0~0x3ffff)\n", pTxRxPars->txrxPktHeader); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = (u1Byte)(pTxRxPars->txrxPktHeader&0xff); ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff00)>>8); ++ h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff0000)>>16); ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_TYPE_LEN; ++ { ++ u2Byte payloadLenLimit=0; ++ switch(pTxRxPars->txrxPktType) ++ { ++ case MP_BT_PKT_DH1: ++ payloadLenLimit = 27*8; ++ break; ++ case MP_BT_PKT_DH3: ++ payloadLenLimit = 183*8; ++ break; ++ case MP_BT_PKT_DH5: ++ payloadLenLimit = 339*8; ++ break; ++ case MP_BT_PKT_2DH1: ++ payloadLenLimit = 54*8; ++ break; ++ case MP_BT_PKT_2DH3: ++ payloadLenLimit = 367*8; ++ break; ++ case MP_BT_PKT_2DH5: ++ payloadLenLimit = 679*8; ++ break; ++ case MP_BT_PKT_3DH1: ++ payloadLenLimit = 83*8; ++ break; ++ case MP_BT_PKT_3DH3: ++ payloadLenLimit = 552*8; ++ break; ++ case MP_BT_PKT_3DH5: ++ payloadLenLimit = 1021*8; ++ break; ++ case MP_BT_PKT_LE: ++ payloadLenLimit = 39*8; ++ break; ++ default: ++ { ++ DBG_8192C ("[MPT], Error!! Unknown pTxRxPars->txrxPktType=0x%x\n", pTxRxPars->txrxPktType); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ break; ++ } ++ ++ if(pTxRxPars->txrxPayloadLen > payloadLenLimit) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadLen=0x%x, (should smaller than %d)\n", ++ pTxRxPars->txrxPayloadLen, payloadLenLimit); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ ++ h2cParaBuf[0] = pTxRxPars->txrxPktType; ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff)); ++ h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff00)>>8); ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_CNT_L_PL_TYPE; ++ if(pTxRxPars->txrxPayloadType > MP_BT_PAYLOAD_MAX) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadType=0x%x, (should be between 0~4)\n", pTxRxPars->txrxPayloadType); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff)); ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff00)>>8); ++ h2cParaBuf[2] = pTxRxPars->txrxPayloadType; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_CNT_H_PKT_INTV; ++ if(pTxRxPars->txrxTxPktInterval > 15) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxPktInterval=0x%x, (should be between 0~15)\n", pTxRxPars->txrxTxPktInterval); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff0000)>>16); ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff000000)>>24); ++ h2cParaBuf[2] = pTxRxPars->txrxTxPktInterval; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_WHITENCOEFF; ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxWhitenCoeff; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_CHNL_TX_GAIN; ++ if( (pTxRxPars->txrxChannel > 78) || ++ (pTxRxPars->txrxTxGainIndex > 7) ) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxChannel=0x%x, (should be between 0~78)\n", pTxRxPars->txrxChannel); ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxGainIndex=0x%x, (should be between 0~7)\n", pTxRxPars->txrxTxGainIndex); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxChannel; ++ h2cParaBuf[1] = pTxRxPars->txrxTxGainIndex; ++ h2cParaLen = 2; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_BD_ADDR_L; ++ if( (pTxRxPars->txrxBdaddr[0]==0) && ++ (pTxRxPars->txrxBdaddr[1]==0) && ++ (pTxRxPars->txrxBdaddr[2]==0) && ++ (pTxRxPars->txrxBdaddr[3]==0) && ++ (pTxRxPars->txrxBdaddr[4]==0) && ++ (pTxRxPars->txrxBdaddr[5]==0) ) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all zero\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ if( (pTxRxPars->txrxBdaddr[0]==0xff) && ++ (pTxRxPars->txrxBdaddr[1]==0xff) && ++ (pTxRxPars->txrxBdaddr[2]==0xff) && ++ (pTxRxPars->txrxBdaddr[3]==0xff) && ++ (pTxRxPars->txrxBdaddr[4]==0xff) && ++ (pTxRxPars->txrxBdaddr[5]==0xff) ) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all 0xf\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[0]; ++ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[1]; ++ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[2]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ btOpcode = BT_LO_OP_SET_BD_ADDR_H; ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[3]; ++ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[4]; ++ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[5]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++ ++u2Byte ++mptbt_BtTestCtrl( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte testCtrl=0; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // 2. check upper layer parameter length ++ if(1 == pBtReq->paraLength) ++ { ++ testCtrl = pBtReq->pParamStart[0]; ++ DBG_8192C("[MPT], testCtrl=%d \n", testCtrl); ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ ++ // 1. fill h2c parameters ++ // check bt mode ++ btOpcode = BT_LO_OP_TEST_CTRL; ++ if(testCtrl >= MP_BT_TEST_MAX) ++ { ++ DBG_8192C("[MPT], Error!! testCtrl=0x%x, (should be between smaller or equal to 0x%x)\n", ++ testCtrl, MP_BT_TEST_MAX-1); ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = testCtrl; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // 3. construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++u2Byte ++mptbt_TestBT( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte testCtrl=0; ++ ++ // 1. fill h2c parameters ++ btOpcode = 0x11; ++ h2cParaBuf[0] = 0x11; ++ h2cParaBuf[1] = 0x0; ++ h2cParaBuf[2] = 0x0; ++ h2cParaBuf[3] = 0x0; ++ h2cParaBuf[4] = 0x0; ++ h2cParaLen = 1; ++ // retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, h2cParaBuf, h2cParaLen); ++ ++ ++ // 3. construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++VOID ++mptbt_BtControlProcess( ++ PADAPTER Adapter, ++ PVOID pInBuf ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_REQ_CMD pBtReq=(PBT_REQ_CMD)pInBuf; ++ PBT_RSP_CMD pBtRsp; ++ u1Byte i; ++ ++ ++ DBG_8192C("[MPT], mptbt_BtControlProcess()=========>\n"); ++ ++ DBG_8192C("[MPT], input opCodeVer=%d\n", pBtReq->opCodeVer); ++ DBG_8192C("[MPT], input OpCode=%d\n", pBtReq->OpCode); ++ DBG_8192C("[MPT], paraLength=%d \n", pBtReq->paraLength); ++ if(pBtReq->paraLength) ++ { ++ //DBG_8192C("[MPT], parameters(hex):0x%x %d \n",&pBtReq->pParamStart[0], pBtReq->paraLength); ++ } ++ ++ _rtw_memset((void*)pMptCtx->mptOutBuf, 0, 100); ++ pMptCtx->mptOutLen = 4; //length of (BT_RSP_CMD.status+BT_RSP_CMD.paraLength) ++ ++ pBtRsp = (PBT_RSP_CMD)pMptCtx->mptOutBuf; ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ pBtRsp->paraLength = 0x0; ++ ++ // The following we should maintain the User OP codes sent by upper layer ++ switch(pBtReq->OpCode) ++ { ++ case BT_UP_OP_BT_READY: ++ DBG_8192C("[MPT], OPcode : [BT_READY]\n"); ++ pBtRsp->paraLength = mptbt_BtReady(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_SET_MODE: ++ DBG_8192C("[MPT], OPcode : [BT_SET_MODE]\n"); ++ pBtRsp->paraLength = mptbt_BtSetMode(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_SET_TX_RX_PARAMETER: ++ DBG_8192C("[MPT], OPcode : [BT_SET_TXRX_PARAMETER]\n"); ++ pBtRsp->paraLength = mptbt_BtSetTxRxPars(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_SET_GENERAL: ++ DBG_8192C("[MPT], OPcode : [BT_SET_GENERAL]\n"); ++ pBtRsp->paraLength = mptbt_BtSetGeneral(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_GET_GENERAL: ++ DBG_8192C("[MPT], OPcode : [BT_GET_GENERAL]\n"); ++ pBtRsp->paraLength = mptbt_BtGetGeneral(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_TEST_CTRL: ++ DBG_8192C("[MPT], OPcode : [BT_TEST_CTRL]\n"); ++ pBtRsp->paraLength = mptbt_BtTestCtrl(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_TEST_BT: ++ DBG_8192C("[MPT], OPcode : [TEST_BT]\n"); ++ pBtRsp->paraLength = mptbt_TestBT(Adapter, pBtReq, pBtRsp); ++ break; ++ default: ++ DBG_8192C("[MPT], Error!! OPcode : UNDEFINED!!!!\n"); ++ pBtRsp->status = BT_STATUS_UNKNOWN_OPCODE_U; ++ pBtRsp->paraLength = 0x0; ++ break; ++ } ++ ++ pMptCtx->mptOutLen += pBtRsp->paraLength; ++ ++ DBG_8192C("[MPT], pMptCtx->mptOutLen=%d, pBtRsp->paraLength=%d\n", pMptCtx->mptOutLen, pBtRsp->paraLength); ++ DBG_8192C("[MPT], mptbt_BtControlProcess()<=========\n"); ++} ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_btcoex.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_btcoex.c new file mode 100644 -index 000000000..aafdd72c7 +index 0000000..aafdd72 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_btcoex.c @@ -0,0 +1,1739 @@ @@ -14195,7 +14192,7 @@ index 000000000..aafdd72c7 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_cmd.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_cmd.c new file mode 100644 -index 000000000..e2759028a +index 0000000..e275902 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_cmd.c @@ -0,0 +1,4584 @@ @@ -18785,7 +18782,7 @@ index 000000000..e2759028a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_debug.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_debug.c new file mode 100644 -index 000000000..e88c1ef28 +index 0000000..e88c1ef --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_debug.c @@ -0,0 +1,3861 @@ @@ -22652,7 +22649,7 @@ index 000000000..e88c1ef28 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_eeprom.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_eeprom.c new file mode 100644 -index 000000000..e83c090ac +index 0000000..e83c090 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_eeprom.c @@ -0,0 +1,423 @@ @@ -23081,10 +23078,10 @@ index 000000000..e83c090ac + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ieee80211.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ieee80211.c new file mode 100644 -index 000000000..5620f212c +index 0000000..1acab8a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ieee80211.c -@@ -0,0 +1,2834 @@ +@@ -0,0 +1,2844 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. @@ -23110,6 +23107,7 @@ index 000000000..5620f212c +#include +#endif +#include ++#include + + +u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 }; @@ -24571,10 +24569,13 @@ index 000000000..5620f212c + * @out: buf to store mac address decided + * @hw_mac_addr: mac address from efuse/epprom + */ -+void rtw_macaddr_cfg(u8 *out, const u8 *hw_mac_addr) ++void rtw_macaddr_cfg(struct device *dev, u8 *out, const u8 *hw_mac_addr) +{ +#define DEFAULT_RANDOM_MACADDR 1 + u8 mac[ETH_ALEN]; ++ struct device_node *np = dev->of_node; ++ const unsigned char *addr; ++ int len; + + if (out == NULL) { + rtw_warn_on(1); @@ -24604,22 +24605,28 @@ index 000000000..5620f212c + } + +err_chk: -+ if (rtw_check_invalid_mac_address(mac, _FALSE) == _TRUE) { -+ #if DEFAULT_RANDOM_MACADDR -+ DBG_871X_LEVEL(_drv_err_, "invalid mac addr:"MAC_FMT", assign random MAC\n", MAC_ARG(mac)); -+ *((u32 *)(&mac[2])) = rtw_random32(); -+ mac[0] = 0x00; -+ mac[1] = 0xe0; -+ mac[2] = 0x4c; -+ #else -+ DBG_871X_LEVEL(_drv_err_, "invalid mac addr:"MAC_FMT", assign default one\n", MAC_ARG(mac)); -+ mac[0] = 0x00; -+ mac[1] = 0xe0; -+ mac[2] = 0x4c; -+ mac[3] = 0x87; -+ mac[4] = 0x00; -+ mac[5] = 0x00; -+ #endif ++ if (rtw_check_invalid_mac_address(mac, _TRUE) == _TRUE) { ++ if (np && ++ (addr = of_get_property(np, "local-mac-address", &len)) && ++ len == ETH_ALEN) { ++ memcpy(mac, addr, ETH_ALEN); ++ } else { ++ #if DEFAULT_RANDOM_MACADDR ++ DBG_871X_LEVEL(_drv_err_, "invalid mac addr:"MAC_FMT", assign random MAC\n", MAC_ARG(mac)); ++ *((u32 *)(&mac[2])) = rtw_random32(); ++ mac[0] = 0x00; ++ mac[1] = 0xe0; ++ mac[2] = 0x4c; ++ #else ++ DBG_871X_LEVEL(_drv_err_, "invalid mac addr:"MAC_FMT", assign default one\n", MAC_ARG(mac)); ++ mac[0] = 0x00; ++ mac[1] = 0xe0; ++ mac[2] = 0x4c; ++ mac[3] = 0x87; ++ mac[4] = 0x00; ++ mac[5] = 0x00; ++ #endif ++ } + } + + _rtw_memcpy(out, mac, ETH_ALEN); @@ -25921,7 +25928,7 @@ index 000000000..5620f212c + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_io.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_io.c new file mode 100644 -index 000000000..d08c16dac +index 0000000..d08c16d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_io.c @@ -0,0 +1,737 @@ @@ -26664,7 +26671,7 @@ index 000000000..d08c16dac + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_query.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_query.c new file mode 100644 -index 000000000..d7cd88590 +index 0000000..d7cd885 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_query.c @@ -0,0 +1,192 @@ @@ -26862,7 +26869,7 @@ index 000000000..d7cd88590 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_rtl.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_rtl.c new file mode 100644 -index 000000000..998965975 +index 0000000..9989659 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_rtl.c @@ -0,0 +1,1021 @@ @@ -27889,7 +27896,7 @@ index 000000000..998965975 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_set.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_set.c new file mode 100644 -index 000000000..7ba82cf5f +index 0000000..7ba82cf --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_ioctl_set.c @@ -0,0 +1,1477 @@ @@ -29372,7 +29379,7 @@ index 000000000..7ba82cf5f + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_iol.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_iol.c new file mode 100644 -index 000000000..3524e1c5a +index 0000000..3524e1c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_iol.c @@ -0,0 +1,390 @@ @@ -29768,135 +29775,135 @@ index 000000000..3524e1c5a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mem.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mem.c new file mode 100644 -index 000000000..db371c1b8 +index 0000000..d05e3af --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mem.c @@ -0,0 +1,122 @@ -+ -+#include -+#include -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); -+MODULE_AUTHOR("Realtek Semiconductor Corp."); -+MODULE_VERSION("DRIVERVERSION"); -+ -+struct sk_buff_head rtk_skb_mem_q; -+struct u8* rtk_buf_mem[NR_RECVBUFF]; -+ -+struct u8 * rtw_get_buf_premem(int index) -+{ -+ printk("%s, rtk_buf_mem index : %d\n", __func__, index); -+ return rtk_buf_mem[index]; -+} -+ -+u16 rtw_rtkm_get_buff_size(void) -+{ -+ return MAX_RTKM_RECVBUF_SZ; -+} -+EXPORT_SYMBOL(rtw_rtkm_get_buff_size); -+ -+u8 rtw_rtkm_get_nr_recv_skb(void) -+{ -+ return MAX_RTKM_NR_PREALLOC_RECV_SKB; -+} -+EXPORT_SYMBOL(rtw_rtkm_get_nr_recv_skb); -+ -+struct sk_buff *rtw_alloc_skb_premem(u16 in_size) -+{ -+ struct sk_buff *skb = NULL; -+ -+ if (in_size > MAX_RTKM_RECVBUF_SZ) { -+ pr_info("warning %s: driver buffer size(%d) > rtkm buffer size(%d)\n", __func__, in_size, MAX_RTKM_RECVBUF_SZ); -+ WARN_ON(1); -+ return skb; -+ } -+ -+ skb = skb_dequeue(&rtk_skb_mem_q); -+ -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ -+ return skb; -+} -+EXPORT_SYMBOL(rtw_alloc_skb_premem); -+ -+int rtw_free_skb_premem(struct sk_buff *pskb) -+{ -+ if(!pskb) -+ return -1; -+ -+ if (skb_queue_len(&rtk_skb_mem_q) >= MAX_RTKM_NR_PREALLOC_RECV_SKB) -+ return -1; -+ -+ skb_queue_tail(&rtk_skb_mem_q, pskb); -+ -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ -+ return 0; -+} -+EXPORT_SYMBOL(rtw_free_skb_premem); -+ -+static int __init rtw_mem_init(void) -+{ -+ int i; -+ SIZE_PTR tmpaddr=0; -+ SIZE_PTR alignment=0; -+ struct sk_buff *pskb=NULL; -+ -+ printk("%s\n", __func__); -+ pr_info("MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", MAX_RTKM_NR_PREALLOC_RECV_SKB); -+ pr_info("MAX_RTKM_RECVBUF_SZ: %d\n", MAX_RTKM_RECVBUF_SZ); -+ -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ for(i=0; idata; -+ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); -+ skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); -+ -+ skb_queue_tail(&rtk_skb_mem_q, pskb); -+ } -+ else -+ { -+ printk("%s, alloc skb memory fail!\n", __func__); -+ } -+ -+ pskb=NULL; -+ } -+ -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ -+ return 0; -+ -+} -+ -+static void __exit rtw_mem_exit(void) -+{ -+ if (skb_queue_len(&rtk_skb_mem_q)) { -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ } -+ -+ skb_queue_purge(&rtk_skb_mem_q); -+ -+ printk("%s\n", __func__); -+} -+ -+module_init(rtw_mem_init); -+module_exit(rtw_mem_exit); ++ ++#include ++#include ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); ++MODULE_AUTHOR("Realtek Semiconductor Corp."); ++MODULE_VERSION("DRIVERVERSION"); ++ ++struct sk_buff_head rtk_skb_mem_q; ++struct u8* rtk_buf_mem[NR_RECVBUFF]; ++ ++struct u8 * rtw_get_buf_premem(int index) ++{ ++ printk("%s, rtk_buf_mem index : %d\n", __func__, index); ++ return rtk_buf_mem[index]; ++} ++ ++u16 rtw_rtkm_get_buff_size(void) ++{ ++ return MAX_RTKM_RECVBUF_SZ; ++} ++EXPORT_SYMBOL(rtw_rtkm_get_buff_size); ++ ++u8 rtw_rtkm_get_nr_recv_skb(void) ++{ ++ return MAX_RTKM_NR_PREALLOC_RECV_SKB; ++} ++EXPORT_SYMBOL(rtw_rtkm_get_nr_recv_skb); ++ ++struct sk_buff *rtw_alloc_skb_premem(u16 in_size) ++{ ++ struct sk_buff *skb = NULL; ++ ++ if (in_size > MAX_RTKM_RECVBUF_SZ) { ++ pr_info("warning %s: driver buffer size(%d) > rtkm buffer size(%d)\n", __func__, in_size, MAX_RTKM_RECVBUF_SZ); ++ WARN_ON(1); ++ return skb; ++ } ++ ++ skb = skb_dequeue(&rtk_skb_mem_q); ++ ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ ++ return skb; ++} ++EXPORT_SYMBOL(rtw_alloc_skb_premem); ++ ++int rtw_free_skb_premem(struct sk_buff *pskb) ++{ ++ if(!pskb) ++ return -1; ++ ++ if (skb_queue_len(&rtk_skb_mem_q) >= MAX_RTKM_NR_PREALLOC_RECV_SKB) ++ return -1; ++ ++ skb_queue_tail(&rtk_skb_mem_q, pskb); ++ ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ ++ return 0; ++} ++EXPORT_SYMBOL(rtw_free_skb_premem); ++ ++static int __init rtw_mem_init(void) ++{ ++ int i; ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ struct sk_buff *pskb=NULL; ++ ++ printk("%s\n", __func__); ++ pr_info("MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", MAX_RTKM_NR_PREALLOC_RECV_SKB); ++ pr_info("MAX_RTKM_RECVBUF_SZ: %d\n", MAX_RTKM_RECVBUF_SZ); ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ for(i=0; idata; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ skb_queue_tail(&rtk_skb_mem_q, pskb); ++ } ++ else ++ { ++ printk("%s, alloc skb memory fail!\n", __func__); ++ } ++ ++ pskb=NULL; ++ } ++ ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ ++ return 0; ++ ++} ++ ++static void __exit rtw_mem_exit(void) ++{ ++ if (skb_queue_len(&rtk_skb_mem_q)) { ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ } ++ ++ skb_queue_purge(&rtk_skb_mem_q); ++ ++ printk("%s\n", __func__); ++} ++ ++module_init(rtw_mem_init); ++module_exit(rtw_mem_exit); diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mlme.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mlme.c new file mode 100644 -index 000000000..8a0b7bc34 +index 0000000..8a0b7bc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mlme.c @@ -0,0 +1,4835 @@ @@ -34737,10 +34744,10 @@ index 000000000..8a0b7bc34 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mlme_ext.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mlme_ext.c new file mode 100644 -index 000000000..549113e82 +index 0000000..7f64ebb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mlme_ext.c -@@ -0,0 +1,15390 @@ +@@ -0,0 +1,15391 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. @@ -46888,14 +46895,15 @@ index 000000000..549113e82 + ret = issue_del_ba_ex(padapter, psta->hwaddr, i, 39, 0, 3, 1); + else + issue_del_ba(padapter, psta->hwaddr, i, 39, 0); -+ psta->recvreorder_ctrl[i].enable = _FALSE; ++ ++ psta->recvreorder_ctrl[i].enable = _FALSE; + if (ret != _FAIL) + psta->recvreorder_ctrl[i].ampdu_size = RX_AMPDU_SIZE_INVALID; -+ rtw_reset_continual_no_rx_packet(psta, i); -+ } ++ ++ rtw_reset_continual_no_rx_packet(psta, i); + } + } -+ else{ ++ } else { + /* The inactivity timer is reset when MPDUs to the TID is received. */ + rtw_reset_continual_no_rx_packet(psta, i); + } @@ -50133,7 +50141,7 @@ index 000000000..549113e82 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mp.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mp.c new file mode 100644 -index 000000000..ef571140e +index 0000000..ef57114 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mp.c @@ -0,0 +1,3540 @@ @@ -53679,7 +53687,7 @@ index 000000000..ef571140e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mp_ioctl.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mp_ioctl.c new file mode 100644 -index 000000000..ff0c66b38 +index 0000000..ff0c66b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_mp_ioctl.c @@ -0,0 +1,2946 @@ @@ -56631,7 +56639,7 @@ index 000000000..ff0c66b38 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_odm.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_odm.c new file mode 100644 -index 000000000..c5596d5e7 +index 0000000..c5596d5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_odm.c @@ -0,0 +1,449 @@ @@ -57086,7 +57094,7 @@ index 000000000..c5596d5e7 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_p2p.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_p2p.c new file mode 100644 -index 000000000..d96d00f94 +index 0000000..d96d00f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_p2p.c @@ -0,0 +1,5636 @@ @@ -62728,7 +62736,7 @@ index 000000000..d96d00f94 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_pwrctrl.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_pwrctrl.c new file mode 100644 -index 000000000..2f0b7000c +index 0000000..2f0b700 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_pwrctrl.c @@ -0,0 +1,2699 @@ @@ -65433,10 +65441,10 @@ index 000000000..2f0b7000c + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_recv.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_recv.c new file mode 100644 -index 000000000..75dffd41f +index 0000000..31925c7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_recv.c -@@ -0,0 +1,4963 @@ +@@ -0,0 +1,4972 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. @@ -65467,6 +65475,15 @@ index 000000000..75dffd41f + +#endif + ++static u8 rtw_rfc1042_header[] = ++{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; ++/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */ ++static u8 rtw_bridge_tunnel_header[] = ++{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 }; ++ ++static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37}; ++ ++static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3}; + +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS +void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS); @@ -70402,7 +70419,7 @@ index 000000000..75dffd41f +} diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_rf.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_rf.c new file mode 100644 -index 000000000..a2299ec2e +index 0000000..a2299ec --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_rf.c @@ -0,0 +1,741 @@ @@ -71149,7 +71166,7 @@ index 000000000..a2299ec2e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_security.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_security.c new file mode 100644 -index 000000000..072950175 +index 0000000..8dac771 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_security.c @@ -0,0 +1,3346 @@ @@ -72753,8 +72770,8 @@ index 000000000..072950175 + for (j = 0; j < 8; j++) + pframe[payload_index+j] = mic[j]; //message[payload_index+j] = mic[j]; + -+ payload_index = hdrlen + 8; -+ for (i=0; i< num_blocks; i++) ++ payload_index = hdrlen + 8; ++ for (i=0; i< num_blocks; i++) + { + construct_ctr_preload( + ctr_preload, @@ -73139,8 +73156,8 @@ index 000000000..072950175 + for (j = 0; j < 8; j++) + message[payload_index+j] = mic[j]; + -+ payload_index = hdrlen + 8; -+ for (i=0; i< num_blocks; i++) ++ payload_index = hdrlen + 8; ++ for (i=0; i< num_blocks; i++) + { + construct_ctr_preload( + ctr_preload, @@ -74501,382 +74518,382 @@ index 000000000..072950175 +#endif /*CONFIG_WOWLAN*/ diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_sreset.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_sreset.c new file mode 100644 -index 000000000..17a48ed19 +index 0000000..e5d5661 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_sreset.c @@ -0,0 +1,369 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#include -+#include -+#include -+ -+void sreset_init_value(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ -+ _rtw_mutex_init(&psrtpriv->silentreset_mutex); -+ psrtpriv->silent_reset_inprogress = _FALSE; -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ psrtpriv->last_tx_time =0; -+ psrtpriv->last_tx_complete_time =0; -+#endif -+} -+void sreset_reset_value(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ psrtpriv->last_tx_time =0; -+ psrtpriv->last_tx_complete_time =0; -+#endif -+} -+ -+u8 sreset_get_wifi_status(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ -+ u8 status = WIFI_STATUS_SUCCESS; -+ u32 val32 = 0; -+ _irqL irqL; -+ if(psrtpriv->silent_reset_inprogress == _TRUE) -+ { -+ return status; -+ } -+ val32 =rtw_read32(padapter,REG_TXDMA_STATUS); -+ if(val32==0xeaeaeaea){ -+ psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; -+ } -+ else if(val32!=0){ -+ DBG_8192C("txdmastatu(%x)\n",val32); -+ psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; -+ } -+ -+ if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) -+ { -+ DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); -+ status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); -+ } -+ DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); -+ -+ //status restore -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ -+ return status; -+#else -+ return WIFI_STATUS_SUCCESS; -+#endif -+} -+ -+void sreset_set_wifi_error_status(_adapter *padapter, u32 status) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ pHalData->srestpriv.Wifi_Error_Status = status; -+#endif -+} -+ -+void sreset_set_trigger_point(_adapter *padapter, s32 tgp) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ pHalData->srestpriv.dbg_trigger_point = tgp; -+#endif -+} -+ -+bool sreset_inprogress(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_RESET) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ return pHalData->srestpriv.silent_reset_inprogress; -+#else -+ return _FALSE; -+#endif -+} -+ -+void sreset_restore_security_station(_adapter *padapter) -+{ -+ u8 EntryId = 0; -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ struct sta_priv * pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ struct security_priv* psecuritypriv=&(padapter->securitypriv); -+ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; -+ -+ { -+ u8 val8; -+ -+ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) { -+ val8 = 0xcc; -+ #ifdef CONFIG_WAPI_SUPPORT -+ } else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { -+ //Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. -+ val8 = 0x4c; -+ #endif -+ } else { -+ val8 = 0xcf; -+ } -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); -+ } -+ -+ #if 0 -+ if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || -+ ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) -+ { -+ -+ for(EntryId=0; EntryId<4; EntryId++) -+ { -+ if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) -+ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1,_FALSE); -+ else -+ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0,_FALSE); -+ } -+ -+ } -+ else -+ #endif -+ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || -+ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) -+ { -+ psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv)); -+ if (psta == NULL) { -+ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); -+ } -+ else -+ { -+ //pairwise key -+ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY,_FALSE); -+ //group key -+ rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0,_FALSE); -+ } -+ } -+} -+ -+void sreset_restore_network_station(_adapter *padapter) -+{ -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 doiqk = _FALSE; -+ -+ #if 0 -+ { -+ //======================================================= -+ // reset related register of Beacon control -+ -+ //set MSR to nolink -+ Set_MSR(padapter, _HW_STATE_NOLINK_); -+ // reject all data frame -+ rtw_write16(padapter, REG_RXFLTMAP2,0x00); -+ //reset TSF -+ rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); -+ -+ // disable update TSF -+ SetBcnCtrlReg(padapter, BIT(4), 0); -+ -+ //======================================================= -+ } -+ #endif -+ -+ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_FALSE); -+ -+ { -+ u8 threshold; -+ #ifdef CONFIG_USB_HCI -+ // TH=1 => means that invalidate usb rx aggregation -+ // TH=0 => means that validate usb rx aggregation, use init value. -+ if(mlmepriv->htpriv.ht_option) { -+ if(padapter->registrypriv.wifi_spec==1) -+ threshold = 1; -+ else -+ threshold = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); -+ } else { -+ threshold = 1; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); -+ } -+ #endif -+ } -+ -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK , &doiqk); -+ -+ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ //disable dynamic functions, such as high power, DIG -+ /*rtw_phydm_func_disable_all(padapter);*/ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); -+ -+ { -+ u8 join_type = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); -+ } -+ -+ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); -+ -+ mlmeext_joinbss_event_callback(padapter, 1); -+ //restore Sequence No. -+ rtw_hal_set_hwreg(padapter, HW_VAR_RESTORE_HW_SEQ, 0); -+ -+ sreset_restore_security_station(padapter); -+} -+ -+ -+void sreset_restore_network_status(_adapter *padapter) -+{ -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { -+ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); -+ sreset_restore_network_station(padapter); -+ } else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) { -+ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); -+ rtw_ap_restore_network(padapter); -+ } else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) { -+ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); -+ } else { -+ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); -+ } -+} -+ -+void sreset_stop_adapter(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ if (padapter == NULL) -+ return; -+ -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_netif_stop_queue(padapter->pnetdev); -+ -+ rtw_cancel_all_timer(padapter); -+ -+ /* TODO: OS and HCI independent */ -+ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) -+ tasklet_kill(&pxmitpriv->xmit_tasklet); -+ #endif -+ -+ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) -+ rtw_scan_abort(padapter); -+ -+ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) -+ { -+ rtw_set_to_roam(padapter, 0); -+ _rtw_join_timeout_handler(padapter); -+ } -+ -+} -+ -+void sreset_start_adapter(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ if (padapter == NULL) -+ return; -+ -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (check_fwstate(pmlmepriv, _FW_LINKED)) { -+ sreset_restore_network_status(padapter); -+ } -+ -+ /* TODO: OS and HCI independent */ -+ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) -+ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -+ #endif -+ -+ if (is_primary_adapter(padapter)) -+ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); -+ -+ rtw_netif_wake_queue(padapter->pnetdev); -+} -+ -+void sreset_reset(_adapter *padapter) -+{ -+#ifdef DBG_CONFIG_ERROR_RESET -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ _irqL irqL; -+ u32 start = rtw_get_current_time(); -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ -+ DBG_871X("%s\n", __FUNCTION__); -+ -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ -+ -+#ifdef CONFIG_LPS -+ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET"); -+#endif//#ifdef CONFIG_LPS -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ -+ psrtpriv->silent_reset_inprogress = _TRUE; -+ pwrpriv->change_rfpwrstate = rf_off; -+ -+ sreset_stop_adapter(padapter); -+ #ifdef CONFIG_CONCURRENT_MODE -+ sreset_stop_adapter(padapter->pbuddy_adapter); -+ #endif -+ -+ #ifdef CONFIG_IPS -+ _ips_enter(padapter); -+ _ips_leave(padapter); -+ #endif -+ -+ sreset_start_adapter(padapter); -+ #ifdef CONFIG_CONCURRENT_MODE -+ sreset_start_adapter(padapter->pbuddy_adapter); -+ #endif -+ -+ psrtpriv->silent_reset_inprogress = _FALSE; -+ -+ _exit_pwrlock(&pwrpriv->lock); -+ -+ DBG_871X("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); -+ pdbgpriv->dbg_sreset_cnt++; -+#endif -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++#include ++#include ++ ++void sreset_init_value(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ _rtw_mutex_init(&psrtpriv->silentreset_mutex); ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++#endif ++} ++void sreset_reset_value(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++#endif ++} ++ ++u8 sreset_get_wifi_status(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ u8 status = WIFI_STATUS_SUCCESS; ++ u32 val32 = 0; ++ _irqL irqL; ++ if(psrtpriv->silent_reset_inprogress == _TRUE) ++ { ++ return status; ++ } ++ val32 =rtw_read32(padapter,REG_TXDMA_STATUS); ++ if(val32==0xeaeaeaea){ ++ psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; ++ } ++ else if(val32!=0){ ++ DBG_8192C("txdmastatu(%x)\n",val32); ++ psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; ++ } ++ ++ if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) ++ { ++ DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); ++ status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); ++ } ++ DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); ++ ++ //status restore ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ return status; ++#else ++ return WIFI_STATUS_SUCCESS; ++#endif ++} ++ ++void sreset_set_wifi_error_status(_adapter *padapter, u32 status) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = status; ++#endif ++} ++ ++void sreset_set_trigger_point(_adapter *padapter, s32 tgp) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.dbg_trigger_point = tgp; ++#endif ++} ++ ++bool sreset_inprogress(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_RESET) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ return pHalData->srestpriv.silent_reset_inprogress; ++#else ++ return _FALSE; ++#endif ++} ++ ++void sreset_restore_security_station(_adapter *padapter) ++{ ++ u8 EntryId = 0; ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ ++ { ++ u8 val8; ++ ++ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) { ++ val8 = 0xcc; ++ #ifdef CONFIG_WAPI_SUPPORT ++ } else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { ++ //Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. ++ val8 = 0x4c; ++ #endif ++ } else { ++ val8 = 0xcf; ++ } ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ } ++ ++ #if 0 ++ if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || ++ ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) ++ { ++ ++ for(EntryId=0; EntryId<4; EntryId++) ++ { ++ if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1,_FALSE); ++ else ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0,_FALSE); ++ } ++ ++ } ++ else ++ #endif ++ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ } ++ else ++ { ++ //pairwise key ++ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY,_FALSE); ++ //group key ++ rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0,_FALSE); ++ } ++ } ++} ++ ++void sreset_restore_network_station(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 doiqk = _FALSE; ++ ++ #if 0 ++ { ++ //======================================================= ++ // reset related register of Beacon control ++ ++ //set MSR to nolink ++ Set_MSR(padapter, _HW_STATE_NOLINK_); ++ // reject all data frame ++ rtw_write16(padapter, REG_RXFLTMAP2,0x00); ++ //reset TSF ++ rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); ++ ++ // disable update TSF ++ SetBcnCtrlReg(padapter, BIT(4), 0); ++ ++ //======================================================= ++ } ++ #endif ++ ++ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_FALSE); ++ ++ { ++ u8 threshold; ++ #ifdef CONFIG_USB_HCI ++ // TH=1 => means that invalidate usb rx aggregation ++ // TH=0 => means that validate usb rx aggregation, use init value. ++ if(mlmepriv->htpriv.ht_option) { ++ if(padapter->registrypriv.wifi_spec==1) ++ threshold = 1; ++ else ++ threshold = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } else { ++ threshold = 1; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } ++ #endif ++ } ++ ++ doiqk = _TRUE; ++ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK , &doiqk); ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ doiqk = _FALSE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); ++ //disable dynamic functions, such as high power, DIG ++ /*rtw_phydm_func_disable_all(padapter);*/ ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); ++ ++ { ++ u8 join_type = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ } ++ ++ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ mlmeext_joinbss_event_callback(padapter, 1); ++ //restore Sequence No. ++ rtw_hal_set_hwreg(padapter, HW_VAR_RESTORE_HW_SEQ, 0); ++ ++ sreset_restore_security_station(padapter); ++} ++ ++ ++void sreset_restore_network_status(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ sreset_restore_network_station(padapter); ++ } else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ rtw_ap_restore_network(padapter); ++ } else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ } else { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ } ++} ++ ++void sreset_stop_adapter(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if (padapter == NULL) ++ return; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ rtw_netif_stop_queue(padapter->pnetdev); ++ ++ rtw_cancel_all_timer(padapter); ++ ++ /* TODO: OS and HCI independent */ ++ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) ++ tasklet_kill(&pxmitpriv->xmit_tasklet); ++ #endif ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ rtw_scan_abort(padapter); ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) ++ { ++ rtw_set_to_roam(padapter, 0); ++ _rtw_join_timeout_handler(padapter); ++ } ++ ++} ++ ++void sreset_start_adapter(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if (padapter == NULL) ++ return; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED)) { ++ sreset_restore_network_status(padapter); ++ } ++ ++ /* TODO: OS and HCI independent */ ++ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ #endif ++ ++ if (is_primary_adapter(padapter)) ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ rtw_netif_wake_queue(padapter->pnetdev); ++} ++ ++void sreset_reset(_adapter *padapter) ++{ ++#ifdef DBG_CONFIG_ERROR_RESET ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ u32 start = rtw_get_current_time(); ++ struct dvobj_priv *psdpriv = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ ++#ifdef CONFIG_LPS ++ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET"); ++#endif//#ifdef CONFIG_LPS ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ ++ psrtpriv->silent_reset_inprogress = _TRUE; ++ pwrpriv->change_rfpwrstate = rf_off; ++ ++ sreset_stop_adapter(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ sreset_stop_adapter(padapter->pbuddy_adapter); ++ #endif ++ ++ #ifdef CONFIG_IPS ++ _ips_enter(padapter); ++ _ips_leave(padapter); ++ #endif ++ ++ sreset_start_adapter(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ sreset_start_adapter(padapter->pbuddy_adapter); ++ #endif ++ ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ ++ _exit_pwrlock(&pwrpriv->lock); ++ ++ DBG_871X("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); ++ pdbgpriv->dbg_sreset_cnt++; ++#endif ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_sta_mgt.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_sta_mgt.c new file mode 100644 -index 000000000..b24e7874e +index 0000000..b24e787 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_sta_mgt.c @@ -0,0 +1,1021 @@ @@ -75903,488 +75920,488 @@ index 000000000..b24e7874e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_tdls.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_tdls.c new file mode 100644 -index 000000000..a9f4ab90f +index 0000000..12bac1f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_tdls.c @@ -0,0 +1,3155 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#define _RTW_TDLS_C_ -+ -+#include -+ -+#ifdef CONFIG_TDLS -+#define ONE_SEC 1000 /* 1000 ms */ -+ -+extern unsigned char MCS_rate_2R[16]; -+extern unsigned char MCS_rate_1R[16]; -+extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); -+ -+void rtw_reset_tdls_info(_adapter* padapter) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ ptdlsinfo->ap_prohibited = _FALSE; -+ -+ /* For TDLS channel switch, currently we only allow it to work in wifi logo test mode */ -+ if (padapter->registrypriv.wifi_spec == 1) -+ { -+ ptdlsinfo->ch_switch_prohibited = _FALSE; -+ } -+ else -+ { -+ ptdlsinfo->ch_switch_prohibited = _TRUE; -+ } -+ -+ ptdlsinfo->link_established = _FALSE; -+ ptdlsinfo->sta_cnt = 0; -+ ptdlsinfo->sta_maximum = _FALSE; -+ -+#ifdef CONFIG_TDLS_CH_SW -+ ptdlsinfo->chsw_info.ch_sw_state = TDLS_STATE_NONE; -+ ATOMIC_SET(&ptdlsinfo->chsw_info.chsw_on, _FALSE); -+ ptdlsinfo->chsw_info.off_ch_num = 0; -+ ptdlsinfo->chsw_info.ch_offset = 0; -+ ptdlsinfo->chsw_info.cur_time = 0; -+ ptdlsinfo->chsw_info.delay_switch_back = _FALSE; -+ ptdlsinfo->chsw_info.dump_stack = _FALSE; -+#endif -+ -+ ptdlsinfo->ch_sensing = 0; -+ ptdlsinfo->watchdog_count = 0; -+ ptdlsinfo->dev_discovered = _FALSE; -+ -+#ifdef CONFIG_WFD -+ ptdlsinfo->wfd_info = &padapter->wfd_info; -+#endif -+} -+ -+int rtw_init_tdls_info(_adapter* padapter) -+{ -+ int res = _SUCCESS; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ rtw_reset_tdls_info(padapter); -+ -+ ptdlsinfo->tdls_enable = _TRUE; -+#ifdef CONFIG_TDLS_DRIVER_SETUP -+ ptdlsinfo->driver_setup = _TRUE; -+#else -+ ptdlsinfo->driver_setup = _FALSE; -+#endif /* CONFIG_TDLS_DRIVER_SETUP */ -+ -+ _rtw_spinlock_init(&ptdlsinfo->cmd_lock); -+ _rtw_spinlock_init(&ptdlsinfo->hdl_lock); -+ -+ return res; -+ -+} -+ -+void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) -+{ -+ _rtw_spinlock_free(&ptdlsinfo->cmd_lock); -+ _rtw_spinlock_free(&ptdlsinfo->hdl_lock); -+ -+ _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); -+ -+} -+ -+int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len) -+{ -+ u8 tdls_prohibited_bit = 0x40; /* bit(38); TDLS_prohibited */ -+ -+ if (pkt_len < 5) { -+ return _FALSE; -+ } -+ -+ pframe += 4; -+ if ((*pframe) & tdls_prohibited_bit) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len) -+{ -+ u8 tdls_ch_swithcing_prohibited_bit = 0x80; /* bit(39); TDLS_channel_switching prohibited */ -+ -+ if (pkt_len < 5) { -+ return _FALSE; -+ } -+ -+ pframe += 4; -+ if ((*pframe) & tdls_ch_swithcing_prohibited_bit) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+int _issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) -+{ -+ int ret = _FAIL; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl, *qc; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ pattrib->hdrlen +=2; -+ pattrib->qos_en = _TRUE; -+ pattrib->eosp = 1; -+ pattrib->ack_policy = 0; -+ pattrib->mdata = 0; -+ pattrib->retry_ctrl = _FALSE; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ if (power_mode) -+ SetPwrMgt(fctrl); -+ -+ qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); -+ -+ SetPriority(qc, 7); /* Set priority to VO */ -+ -+ SetEOSP(qc, pattrib->eosp); -+ -+ SetAckpolicy(qc, pattrib->ack_policy); -+ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ return ret; -+ -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_TDLS_C_ ++ ++#include ++ ++#ifdef CONFIG_TDLS ++#define ONE_SEC 1000 /* 1000 ms */ ++ ++extern unsigned char MCS_rate_2R[16]; ++extern unsigned char MCS_rate_1R[16]; ++extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); ++ ++void rtw_reset_tdls_info(_adapter* padapter) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ ptdlsinfo->ap_prohibited = _FALSE; ++ ++ /* For TDLS channel switch, currently we only allow it to work in wifi logo test mode */ ++ if (padapter->registrypriv.wifi_spec == 1) ++ { ++ ptdlsinfo->ch_switch_prohibited = _FALSE; ++ } ++ else ++ { ++ ptdlsinfo->ch_switch_prohibited = _TRUE; ++ } ++ ++ ptdlsinfo->link_established = _FALSE; ++ ptdlsinfo->sta_cnt = 0; ++ ptdlsinfo->sta_maximum = _FALSE; ++ ++#ifdef CONFIG_TDLS_CH_SW ++ ptdlsinfo->chsw_info.ch_sw_state = TDLS_STATE_NONE; ++ ATOMIC_SET(&ptdlsinfo->chsw_info.chsw_on, _FALSE); ++ ptdlsinfo->chsw_info.off_ch_num = 0; ++ ptdlsinfo->chsw_info.ch_offset = 0; ++ ptdlsinfo->chsw_info.cur_time = 0; ++ ptdlsinfo->chsw_info.delay_switch_back = _FALSE; ++ ptdlsinfo->chsw_info.dump_stack = _FALSE; ++#endif ++ ++ ptdlsinfo->ch_sensing = 0; ++ ptdlsinfo->watchdog_count = 0; ++ ptdlsinfo->dev_discovered = _FALSE; ++ ++#ifdef CONFIG_WFD ++ ptdlsinfo->wfd_info = &padapter->wfd_info; ++#endif ++} ++ ++int rtw_init_tdls_info(_adapter* padapter) ++{ ++ int res = _SUCCESS; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ rtw_reset_tdls_info(padapter); ++ ++ ptdlsinfo->tdls_enable = _TRUE; ++#ifdef CONFIG_TDLS_DRIVER_SETUP ++ ptdlsinfo->driver_setup = _TRUE; ++#else ++ ptdlsinfo->driver_setup = _FALSE; ++#endif /* CONFIG_TDLS_DRIVER_SETUP */ ++ ++ _rtw_spinlock_init(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_init(&ptdlsinfo->hdl_lock); ++ ++ return res; ++ ++} ++ ++void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) ++{ ++ _rtw_spinlock_free(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_free(&ptdlsinfo->hdl_lock); ++ ++ _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); ++ ++} ++ ++int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len) ++{ ++ u8 tdls_prohibited_bit = 0x40; /* bit(38); TDLS_prohibited */ ++ ++ if (pkt_len < 5) { ++ return _FALSE; ++ } ++ ++ pframe += 4; ++ if ((*pframe) & tdls_prohibited_bit) ++ return _TRUE; ++ ++ return _FALSE; ++} ++ ++int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len) ++{ ++ u8 tdls_ch_swithcing_prohibited_bit = 0x80; /* bit(39); TDLS_channel_switching prohibited */ ++ ++ if (pkt_len < 5) { ++ return _FALSE; ++ } ++ ++ pframe += 4; ++ if ((*pframe) & tdls_ch_swithcing_prohibited_bit) ++ return _TRUE; ++ ++ return _FALSE; ++} ++ ++int _issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) ++{ ++ int ret = _FAIL; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl, *qc; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ pattrib->hdrlen +=2; ++ pattrib->qos_en = _TRUE; ++ pattrib->eosp = 1; ++ pattrib->ack_policy = 0; ++ pattrib->mdata = 0; ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if (power_mode) ++ SetPwrMgt(fctrl); ++ ++ qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); ++ ++ SetPriority(qc, 7); /* Set priority to VO */ ++ ++ SetEOSP(qc, pattrib->eosp); ++ ++ SetAckpolicy(qc, pattrib->ack_policy); ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ if (wait_ack) ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ return ret; ++ ++} ++ +/* + *wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT + *wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX + *try_cnt means the maximal TX count to try + */ -+int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) -+{ -+ int ret; -+ int i = 0; -+ u32 start = rtw_get_current_time(); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ #if 0 -+ psta = rtw_get_stainfo(&padapter->stapriv, da); -+ if (psta) { -+ if (power_mode) -+ rtw_hal_macid_sleep(padapter, psta->mac_id); -+ else -+ rtw_hal_macid_wakeup(padapter, psta->mac_id); -+ } else { -+ DBG_871X(FUNC_ADPT_FMT ": Can't find sta info for " MAC_FMT ", skip macid %s!!\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), power_mode?"sleep":"wakeup"); -+ rtw_warn_on(1); -+ } -+ #endif -+ -+ do { -+ ret = _issue_nulldata_to_TDLS_peer_STA(padapter, da, power_mode, wait_ms>0 ? _TRUE : _FALSE); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && (ret==_FAIL || wait_ms==0)); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+ #ifndef DBG_XMIT_ACK -+ goto exit; -+ #endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (da) -+ DBG_871X(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), -+ ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ DBG_871X(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), -+ ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _irqL irqL; -+ -+ /* free peer sta_info */ -+ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ if (ptdlsinfo->sta_cnt != 0) -+ ptdlsinfo->sta_cnt--; -+ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ /* -2: AP + BC/MC sta, -4: default key */ -+ if (ptdlsinfo->sta_cnt < MAX_ALLOWED_TDLS_STA_NUM) { -+ ptdlsinfo->sta_maximum = _FALSE; -+ _rtw_memset( &ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record) ); -+ } -+ -+ /* clear cam */ -+ rtw_clearstakey_cmd(padapter, ptdls_sta, _TRUE); -+ -+ if (ptdlsinfo->sta_cnt == 0) { -+ rtw_tdls_cmd(padapter, NULL, TDLS_RS_RCR); -+ ptdlsinfo->link_established = _FALSE; -+ } -+ else -+ DBG_871X("Remain tdls sta:%02x\n", ptdlsinfo->sta_cnt); -+ -+ rtw_free_stainfo(padapter, ptdls_sta); -+ -+} -+ -+ -+/* TDLS encryption(if needed) will always be CCMP */ -+void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta) -+{ -+ ptdls_sta->dot118021XPrivacy=_AES_; -+ rtw_setstakey_cmd(padapter, ptdls_sta, TDLS_KEY, _TRUE); -+} -+ -+#ifdef CONFIG_80211N_HT -+void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ u8 max_AMPDU_len, min_MPDU_spacing; -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0; -+ -+ /* Save HT capabilities in the sta object */ -+ _rtw_memset(&ptdls_sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); -+ if (data && Length >= sizeof(struct rtw_ieee80211_ht_cap)) { -+ ptdls_sta->flags |= WLAN_STA_HT; -+ ptdls_sta->flags |= WLAN_STA_WME; -+ -+ _rtw_memcpy(&ptdls_sta->htpriv.ht_cap, data, sizeof(struct rtw_ieee80211_ht_cap)); -+ } else -+ ptdls_sta->flags &= ~WLAN_STA_HT; -+ -+ if (ptdls_sta->flags & WLAN_STA_HT) { -+ if (padapter->registrypriv.ht_enable == _TRUE) { -+ ptdls_sta->htpriv.ht_option = _TRUE; -+ ptdls_sta->qos_option = _TRUE; -+ } else { -+ ptdls_sta->htpriv.ht_option = _FALSE; -+ ptdls_sta->qos_option = _FALSE; -+ } -+ } -+ -+ /* HT related cap */ -+ if (ptdls_sta->htpriv.ht_option) { -+ /* Check if sta supports rx ampdu */ -+ if (padapter->registrypriv.ampdu_enable == 1) -+ ptdls_sta->htpriv.ampdu_enable = _TRUE; -+ -+ /* AMPDU Parameters field */ -+ /* Get MIN of MAX AMPDU Length Exp */ -+ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (data[2] & 0x3)) -+ max_AMPDU_len = (data[2] & 0x3); -+ else -+ max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); -+ /* Get MAX of MIN MPDU Start Spacing */ -+ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (data[2] & 0x1c)) -+ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); -+ else -+ min_MPDU_spacing = (data[2] & 0x1c); -+ ptdls_sta->htpriv.rx_ampdu_min_spacing = max_AMPDU_len | min_MPDU_spacing; -+ -+ /* Check if sta support s Short GI 20M */ -+ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) -+ ptdls_sta->htpriv.sgi_20m = _TRUE; -+ -+ /* Check if sta support s Short GI 40M */ -+ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) -+ ptdls_sta->htpriv.sgi_40m = _TRUE; -+ -+ /* Bwmode would still followed AP's setting */ -+ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) { -+ if (padapter->mlmeextpriv.cur_bwmode >= CHANNEL_WIDTH_40) -+ ptdls_sta->bw_mode = CHANNEL_WIDTH_40; -+ ptdls_sta->htpriv.ch_offset = padapter->mlmeextpriv.cur_ch_offset; -+ } -+ -+ /* Config LDPC Coding Capability */ -+ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(data)) { ++int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) ++{ ++ int ret; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ #if 0 ++ psta = rtw_get_stainfo(&padapter->stapriv, da); ++ if (psta) { ++ if (power_mode) ++ rtw_hal_macid_sleep(padapter, psta->mac_id); ++ else ++ rtw_hal_macid_wakeup(padapter, psta->mac_id); ++ } else { ++ DBG_871X(FUNC_ADPT_FMT ": Can't find sta info for " MAC_FMT ", skip macid %s!!\n", ++ FUNC_ADPT_ARG(padapter), MAC_ARG(da), power_mode?"sleep":"wakeup"); ++ rtw_warn_on(1); ++ } ++ #endif ++ ++ do { ++ ret = _issue_nulldata_to_TDLS_peer_STA(padapter, da, power_mode, wait_ms>0 ? _TRUE : _FALSE); ++ ++ i++; ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ break; ++ ++ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ } while ((i < try_cnt) && (ret==_FAIL || wait_ms==0)); ++ ++ if (ret != _FAIL) { ++ ret = _SUCCESS; ++ #ifndef DBG_XMIT_ACK ++ goto exit; ++ #endif ++ } ++ ++ if (try_cnt && wait_ms) { ++ if (da) ++ DBG_871X(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", ++ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), ++ ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); ++ else ++ DBG_871X(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", ++ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), ++ ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); ++ } ++exit: ++ return ret; ++} ++ ++void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ _irqL irqL; ++ ++ /* free peer sta_info */ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if (ptdlsinfo->sta_cnt != 0) ++ ptdlsinfo->sta_cnt--; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ /* -2: AP + BC/MC sta, -4: default key */ ++ if (ptdlsinfo->sta_cnt < MAX_ALLOWED_TDLS_STA_NUM) { ++ ptdlsinfo->sta_maximum = _FALSE; ++ _rtw_memset( &ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record) ); ++ } ++ ++ /* clear cam */ ++ rtw_clearstakey_cmd(padapter, ptdls_sta, _TRUE); ++ ++ if (ptdlsinfo->sta_cnt == 0) { ++ rtw_tdls_cmd(padapter, NULL, TDLS_RS_RCR); ++ ptdlsinfo->link_established = _FALSE; ++ } ++ else ++ DBG_871X("Remain tdls sta:%02x\n", ptdlsinfo->sta_cnt); ++ ++ rtw_free_stainfo(padapter, ptdls_sta); ++ ++} ++ ++ ++/* TDLS encryption(if needed) will always be CCMP */ ++void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ ptdls_sta->dot118021XPrivacy=_AES_; ++ rtw_setstakey_cmd(padapter, ptdls_sta, TDLS_KEY, _TRUE); ++} ++ ++#ifdef CONFIG_80211N_HT ++void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ u8 max_AMPDU_len, min_MPDU_spacing; ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0; ++ ++ /* Save HT capabilities in the sta object */ ++ _rtw_memset(&ptdls_sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ if (data && Length >= sizeof(struct rtw_ieee80211_ht_cap)) { ++ ptdls_sta->flags |= WLAN_STA_HT; ++ ptdls_sta->flags |= WLAN_STA_WME; ++ ++ _rtw_memcpy(&ptdls_sta->htpriv.ht_cap, data, sizeof(struct rtw_ieee80211_ht_cap)); ++ } else ++ ptdls_sta->flags &= ~WLAN_STA_HT; ++ ++ if (ptdls_sta->flags & WLAN_STA_HT) { ++ if (padapter->registrypriv.ht_enable == _TRUE) { ++ ptdls_sta->htpriv.ht_option = _TRUE; ++ ptdls_sta->qos_option = _TRUE; ++ } else { ++ ptdls_sta->htpriv.ht_option = _FALSE; ++ ptdls_sta->qos_option = _FALSE; ++ } ++ } ++ ++ /* HT related cap */ ++ if (ptdls_sta->htpriv.ht_option) { ++ /* Check if sta supports rx ampdu */ ++ if (padapter->registrypriv.ampdu_enable == 1) ++ ptdls_sta->htpriv.ampdu_enable = _TRUE; ++ ++ /* AMPDU Parameters field */ ++ /* Get MIN of MAX AMPDU Length Exp */ ++ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (data[2] & 0x3)) ++ max_AMPDU_len = (data[2] & 0x3); ++ else ++ max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); ++ /* Get MAX of MIN MPDU Start Spacing */ ++ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (data[2] & 0x1c)) ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); ++ else ++ min_MPDU_spacing = (data[2] & 0x1c); ++ ptdls_sta->htpriv.rx_ampdu_min_spacing = max_AMPDU_len | min_MPDU_spacing; ++ ++ /* Check if sta support s Short GI 20M */ ++ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) ++ ptdls_sta->htpriv.sgi_20m = _TRUE; ++ ++ /* Check if sta support s Short GI 40M */ ++ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) ++ ptdls_sta->htpriv.sgi_40m = _TRUE; ++ ++ /* Bwmode would still followed AP's setting */ ++ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) { ++ if (padapter->mlmeextpriv.cur_bwmode >= CHANNEL_WIDTH_40) ++ ptdls_sta->bw_mode = CHANNEL_WIDTH_40; ++ ptdls_sta->htpriv.ch_offset = padapter->mlmeextpriv.cur_ch_offset; ++ } ++ ++ /* Config LDPC Coding Capability */ ++ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(data)) { + SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); + DBG_871X("Enable HT Tx LDPC!\n"); + } -+ ptdls_sta->htpriv.ldpc_cap = cur_ldpc_cap; ++ ptdls_sta->htpriv.ldpc_cap = cur_ldpc_cap; + -+ /* Config STBC setting */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(data)) { -+ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX)); ++ /* Config STBC setting */ ++ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(data)) { ++ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX)); + DBG_871X("Enable HT Tx STBC!\n"); + } -+ ptdls_sta->htpriv.stbc_cap = cur_stbc_cap; ++ ptdls_sta->htpriv.stbc_cap = cur_stbc_cap; + +#ifdef CONFIG_BEAMFORMING -+ /* Config Tx beamforming setting */ ++ /* Config Tx beamforming setting */ + if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(data)) { ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(data)) { + SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); + } + + if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(data)) { ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(data)) { + SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); + } -+ ptdls_sta->htpriv.beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) -+ DBG_871X("Client HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); -+#endif /* CONFIG_BEAMFORMING */ -+ } ++ ptdls_sta->htpriv.beamform_cap = cur_beamform_cap; ++ if (cur_beamform_cap) ++ DBG_871X("Client HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); ++#endif /* CONFIG_BEAMFORMING */ ++ } ++ ++} ++ ++u8 *rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ rtw_ht_use_default_setting(padapter); ++ ++ rtw_restructure_ht_ie(padapter, NULL, pframe, 0, &(pattrib->pktlen), padapter->mlmeextpriv.cur_channel); ++ ++ return pframe + pattrib->pktlen; ++} ++#endif ++ ++#ifdef CONFIG_80211AC_VHT ++void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, rf_type = RF_1T1R; ++ u8 *pcap_mcs; ++ u8 vht_mcs[2]; ++ ++ _rtw_memset(&ptdls_sta->vhtpriv, 0, sizeof(struct vht_priv)); ++ if (data && Length == 12) { ++ ptdls_sta->flags |= WLAN_STA_VHT; + -+} -+ -+u8 *rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ rtw_ht_use_default_setting(padapter); -+ -+ rtw_restructure_ht_ie(padapter, NULL, pframe, 0, &(pattrib->pktlen), padapter->mlmeextpriv.cur_channel); -+ -+ return pframe + pattrib->pktlen; -+} -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, rf_type = RF_1T1R; -+ u8 *pcap_mcs; -+ u8 vht_mcs[2]; -+ -+ _rtw_memset(&ptdls_sta->vhtpriv, 0, sizeof(struct vht_priv)); -+ if (data && Length == 12) { -+ ptdls_sta->flags |= WLAN_STA_VHT; -+ -+ _rtw_memcpy(ptdls_sta->vhtpriv.vht_cap, data, 12); -+ -+#if 0 ++ _rtw_memcpy(ptdls_sta->vhtpriv.vht_cap, data, 12); ++ ++#if 0 + if (elems.vht_op_mode_notify && elems.vht_op_mode_notify_len == 1) { + _rtw_memcpy(&pstat->vhtpriv.vht_op_mode_notify, elems.vht_op_mode_notify, 1); -+ } else /* for Frame without Operating Mode notify ie; default: 80M */ { ++ } else /* for Frame without Operating Mode notify ie; default: 80M */ { + pstat->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; + } -+#else -+ ptdls_sta->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; -+#endif -+ } else -+ ptdls_sta->flags &= ~WLAN_STA_VHT; -+ -+ if (ptdls_sta->flags & WLAN_STA_VHT) { -+ if (padapter->registrypriv.vht_enable != 0 -+ && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent))) -+ ptdls_sta->vhtpriv.vht_option = _TRUE; -+ else -+ ptdls_sta->vhtpriv.vht_option = _FALSE; -+ } -+ -+ /* B4 Rx LDPC */ ++#else ++ ptdls_sta->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; ++#endif ++ } else ++ ptdls_sta->flags &= ~WLAN_STA_VHT; ++ ++ if (ptdls_sta->flags & WLAN_STA_VHT) { ++ if (padapter->registrypriv.vht_enable != 0 ++ && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent))) ++ ptdls_sta->vhtpriv.vht_option = _TRUE; ++ else ++ ptdls_sta->vhtpriv.vht_option = _FALSE; ++ } ++ ++ /* B4 Rx LDPC */ + if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_LDPC(data)) { ++ GET_VHT_CAPABILITY_ELE_RX_LDPC(data)) { + SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); + DBG_871X("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap); + } -+ ptdls_sta->vhtpriv.ldpc_cap = cur_ldpc_cap; ++ ptdls_sta->vhtpriv.ldpc_cap = cur_ldpc_cap; + -+ /* B5 Short GI for 80 MHz */ -+ ptdls_sta->vhtpriv.sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; -+ -+ /* B8 B9 B10 Rx STBC */ ++ /* B5 Short GI for 80 MHz */ ++ ptdls_sta->vhtpriv.sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; ++ ++ /* B8 B9 B10 Rx STBC */ + if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_STBC(data)) { ++ GET_VHT_CAPABILITY_ELE_RX_STBC(data)) { + SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); + DBG_871X("Current VHT STBC Setting = %02X\n", cur_stbc_cap); + } -+ ptdls_sta->vhtpriv.stbc_cap = cur_stbc_cap; ++ ptdls_sta->vhtpriv.stbc_cap = cur_stbc_cap; + -+ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ ++ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ + if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFEE(data)) { ++ GET_VHT_CAPABILITY_ELE_SU_BFEE(data)) { + SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); + } + -+ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ ++ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ + if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFER(data)) { ++ GET_VHT_CAPABILITY_ELE_SU_BFER(data)) { + SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); + } -+ ptdls_sta->vhtpriv.beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) ++ ptdls_sta->vhtpriv.beamform_cap = cur_beamform_cap; ++ if (cur_beamform_cap) + DBG_871X("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); ++ ++ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ ++ ptdls_sta->vhtpriv.ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(data); + -+ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ -+ ptdls_sta->vhtpriv.ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(data); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(data); ++ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(data); + _rtw_memcpy(vht_mcs, pcap_mcs, 2); + + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); @@ -76395,2676 +76412,2676 @@ index 000000000..a9f4ab90f + else if (rf_type == RF_3T3R) + vht_mcs[0] |= 0xc0; + -+ _rtw_memcpy(ptdls_sta->vhtpriv.vht_mcs_map, vht_mcs, 2); -+ -+ ptdls_sta->vhtpriv.vht_highest_rate = rtw_get_vht_highest_rate(ptdls_sta->vhtpriv.vht_mcs_map); -+} -+ -+u8 *rtw_tdls_set_aid(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, EID_AID, 2, (u8 *)&(padapter->mlmepriv.cur_network.aid), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_vht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u32 ie_len = 0; -+ -+ rtw_vht_use_default_setting(padapter); -+ -+ ie_len = rtw_build_vht_cap_ie(padapter, pframe); -+ pattrib->pktlen += ie_len; -+ -+ return pframe + ie_len; -+} -+ -+u8 *rtw_tdls_set_vht_operation(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 channel) -+{ -+ u32 ie_len = 0; -+ -+ ie_len = rtw_build_vht_operation_ie(padapter, pframe, channel); -+ pattrib->pktlen += ie_len; -+ -+ return pframe + ie_len; -+} -+ -+u8 *rtw_tdls_set_vht_op_mode_notify(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 bw) -+{ -+ u32 ie_len = 0; -+ -+ ie_len = rtw_build_vht_op_mode_notify_ie(padapter, pframe, bw); -+ pattrib->pktlen += ie_len; -+ -+ return pframe + ie_len; -+} -+#endif -+ -+ -+u8 *rtw_tdls_set_sup_ch(struct mlme_ext_priv *pmlmeext, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 sup_ch[30 * 2] = {0x00}, ch_set_idx = 0, sup_ch_idx = 2; -+ -+ do { -+ if (pmlmeext->channel_set[ch_set_idx].ChannelNum <= 14) { -+ sup_ch[0] = 1; /* First channel number */ -+ sup_ch[1] = pmlmeext->channel_set[ch_set_idx].ChannelNum; /* Number of channel */ -+ } else { -+ sup_ch[sup_ch_idx++] = pmlmeext->channel_set[ch_set_idx].ChannelNum; -+ sup_ch[sup_ch_idx++] = 1; -+ } -+ ch_set_idx++; -+ } while (pmlmeext->channel_set[ch_set_idx].ChannelNum != 0 && ch_set_idx < MAX_CHANNEL_NUM); -+ -+ return rtw_set_ie(pframe, _SUPPORTED_CH_IE_, sup_ch_idx, sup_ch, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_rsnie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) -+{ -+ u8 *p = NULL; -+ int len = 0; -+ -+ if (ptxmgmt->len > 0) -+ p = rtw_get_ie(ptxmgmt->buf, _RSN_IE_2_, &len, ptxmgmt->len); -+ -+ if (p != NULL) -+ return rtw_set_ie(pframe, _RSN_IE_2_, len, p+2, &(pattrib->pktlen)); -+ else -+ if (init == _TRUE) -+ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); -+ else -+ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(ptdls_sta->TDLS_RSNIE), ptdls_sta->TDLS_RSNIE, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_ext_cap(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_qos_cap(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_ftie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, u8 *ANonce, u8 *SNonce) -+{ -+ struct wpa_tdls_ftie FTIE = {0}; -+ u8 *p = NULL; -+ int len = 0; -+ -+ if (ptxmgmt->len > 0) -+ p = rtw_get_ie(ptxmgmt->buf, _FTIE_, &len, ptxmgmt->len); -+ -+ if (p != NULL) -+ return rtw_set_ie(pframe, _FTIE_, len, p+2, &(pattrib->pktlen)); -+ else { -+ if (ANonce != NULL) -+ _rtw_memcpy(FTIE.Anonce, ANonce, WPA_NONCE_LEN); -+ if (SNonce != NULL) -+ _rtw_memcpy(FTIE.Snonce, SNonce, WPA_NONCE_LEN); -+ return rtw_set_ie(pframe, _FTIE_ , 82, (u8 *)FTIE.mic_ctrl, &(pattrib->pktlen)); -+ } -+} -+ -+u8 *rtw_tdls_set_timeout_interval(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) -+{ -+ u8 timeout_itvl[5]; /* set timeout interval to maximum value */ -+ u32 timeout_interval= TPK_RESEND_COUNT; -+ u8 *p = NULL; -+ int len = 0; -+ -+ if (ptxmgmt->len > 0) -+ p = rtw_get_ie(ptxmgmt->buf, _TIMEOUT_ITVL_IE_, &len, ptxmgmt->len); -+ -+ if (p != NULL) -+ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, len, p+2, &(pattrib->pktlen)); -+ else { -+ /* Timeout interval */ -+ timeout_itvl[0]=0x02; -+ if (init == _TRUE) -+ _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); -+ else -+ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); -+ -+ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); -+ } -+} -+ -+u8 *rtw_tdls_set_bss_coexist(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 iedata=0; -+ -+ if (padapter->mlmepriv.num_FortyMHzIntolerant > 0) -+ iedata |= BIT(2); /* 20 MHz BSS Width Request */ -+ -+ /* Information Bit should be set by TDLS test plan 5.9 */ -+ iedata |= BIT(0); -+ return rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_payload_type(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 payload_type = 0x02; -+ return rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_category(u8 *pframe, struct pkt_attrib *pattrib, u8 category) -+{ -+ return rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_action(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) -+{ -+ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->action_code), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_status_code(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) -+{ -+ return rtw_set_fixed_ie(pframe, 2, (u8 *)&(ptxmgmt->status_code), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_dialog(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) -+{ -+ u8 dialogtoken = 1; -+ if (ptxmgmt->dialog_token) -+ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->dialog_token), &(pattrib->pktlen)); -+ else -+ return rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_reg_class(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) -+{ -+ u8 reg_class = 1; -+ return rtw_set_fixed_ie(pframe, 1, &(reg_class), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_capability(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ u8 cap_from_ie[2] = {0}; -+ -+ _rtw_memcpy(cap_from_ie, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); -+ -+ return rtw_set_fixed_ie(pframe, 2, cap_from_ie, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_supported_rate(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; -+ int bssrate_len = 0; -+ u8 more_supportedrates = 0; -+ -+ rtw_set_supported_rate(bssrate, (padapter->registrypriv.wireless_mode == WIRELESS_MODE_MAX) ? padapter->mlmeextpriv.cur_wireless_mode : padapter->registrypriv.wireless_mode); -+ bssrate_len = rtw_get_rateset_len(bssrate); -+ -+ if (bssrate_len > 8) { -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); -+ more_supportedrates = 1; -+ } else { -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); -+ } -+ -+ /* extended supported rates */ -+ if (more_supportedrates == 1) { -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); -+ } -+ -+ return pframe; -+} -+ -+u8 *rtw_tdls_set_sup_reg_class(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, _SRC_IE_ , sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_linkid(u8 *pframe, struct pkt_attrib *pattrib, u8 init) -+{ -+ u8 link_id_addr[18] = {0}; -+ if (init == _TRUE) { -+ _rtw_memcpy(link_id_addr, pattrib->ra, 6); -+ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); -+ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); -+ } else { -+ _rtw_memcpy(link_id_addr, pattrib->ra, 6); -+ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); -+ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); -+ } -+ return rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+u8 *rtw_tdls_set_target_ch(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 target_ch = 1; -+ if (padapter->tdlsinfo.chsw_info.off_ch_num) -+ return rtw_set_fixed_ie(pframe, 1, &(padapter->tdlsinfo.chsw_info.off_ch_num), &(pattrib->pktlen)); -+ else -+ return rtw_set_fixed_ie(pframe, 1, &(target_ch), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_ch_sw(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) -+{ -+ u8 ch_switch_timing[4] = {0}; -+ u16 switch_time = (ptdls_sta->ch_switch_time >= CH_SWITCH_TIME * 1000) ? -+ ptdls_sta->ch_switch_time : CH_SWITCH_TIME; -+ u16 switch_timeout = (ptdls_sta->ch_switch_timeout >= CH_SWITCH_TIMEOUT * 1000) ? -+ ptdls_sta->ch_switch_timeout : CH_SWITCH_TIMEOUT; -+ -+ _rtw_memcpy(ch_switch_timing, &switch_time, 2); -+ _rtw_memcpy(ch_switch_timing + 2, &switch_timeout, 2); -+ -+ return rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); -+} -+#endif -+ -+u8 *rtw_tdls_set_wmm_params(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 wmm_param_ele[24] = {0}; -+ -+ if (&pmlmeinfo->WMM_param) { -+ _rtw_memcpy(wmm_param_ele, WMM_PARA_OUI, 6); -+ if (_rtw_memcmp(&pmlmeinfo->WMM_param, &wmm_param_ele[6], 18) == _TRUE) -+ /* Use default WMM Param */ -+ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&TDLS_WMM_PARAM_IE, sizeof(TDLS_WMM_PARAM_IE)); -+ else -+ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&pmlmeinfo->WMM_param, sizeof(pmlmeinfo->WMM_param)); -+ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 24, wmm_param_ele, &(pattrib->pktlen)); -+ } -+ else -+ return pframe; -+} -+ -+#ifdef CONFIG_WFD -+void rtw_tdls_process_wfd_ie(struct tdls_info *ptdlsinfo, u8 *ptr, u8 length) -+{ -+ u8 *wfd_ie; -+ u32 wfd_ielen = 0; -+ -+ if (!hal_chk_wl_func(tdls_info_to_adapter(ptdlsinfo), WL_FUNC_MIRACAST)) -+ return; -+ -+ /* Try to get the TCP port information when receiving the negotiation response. */ -+ -+ wfd_ie = rtw_get_wfd_ie(ptr, length, NULL, &wfd_ielen); -+ while (wfd_ie) { -+ u8 *attr_content; -+ u32 attr_contentlen = 0; -+ int i; -+ -+ DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); -+ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); -+ if (attr_content && attr_contentlen) { -+ ptdlsinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); -+ DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, ptdlsinfo->wfd_info->peer_rtsp_ctrlport ); -+ } -+ -+ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_LOCAL_IP_ADDR, NULL, &attr_contentlen); -+ if (attr_content && attr_contentlen) { -+ _rtw_memcpy(ptdlsinfo->wfd_info->peer_ip_address, ( attr_content + 1 ), 4); -+ DBG_871X("[%s] Peer IP = %02u.%02u.%02u.%02u\n", __FUNCTION__, -+ ptdlsinfo->wfd_info->peer_ip_address[0], ptdlsinfo->wfd_info->peer_ip_address[1], -+ ptdlsinfo->wfd_info->peer_ip_address[2], ptdlsinfo->wfd_info->peer_ip_address[3]); -+ } -+ -+ wfd_ie = rtw_get_wfd_ie(wfd_ie + wfd_ielen, (ptr + length) - (wfd_ie + wfd_ielen), NULL, &wfd_ielen); -+ } -+} -+ -+int issue_tunneled_probe_req(_adapter *padapter) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ DBG_871X("[%s]\n", __FUNCTION__); -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TUNNELED_PROBE_REQ; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+ -+int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ DBG_871X("[%s]\n", __FUNCTION__); -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TUNNELED_PROBE_RSP; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, precv_frame->u.hdr.attrib.src, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+#endif /* CONFIG_WFD */ -+ -+int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *ptdls_sta= NULL; -+ _irqL irqL; -+ int ret = _FAIL; -+ /* Retry timer should be set at least 301 sec, using TPK_count counting 301 times. */ -+ u32 timeout_interval= TPK_RESEND_COUNT; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_SETUP_REQUEST; -+ if (ptdlsinfo->ap_prohibited == _TRUE) -+ goto exit; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ -+ /* init peer sta_info */ -+ ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); -+ if (ptdls_sta == NULL) { -+ ptdls_sta = rtw_alloc_stainfo(pstapriv, ptxmgmt->peer); -+ if (ptdls_sta == NULL) { -+ DBG_871X("[%s] rtw_alloc_stainfo fail\n", __FUNCTION__); -+ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ } -+ -+ if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) -+ ptdlsinfo->sta_cnt++; -+ -+ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) -+ ptdlsinfo->sta_maximum = _TRUE; -+ -+ ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; -+ _set_timer(&ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); -+ } -+ -+ pattrib->qsel = pattrib->priority; -+ -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ if (wait_ack) { -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ } else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ -+ return ret; -+} -+ -+int _issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *ptdls_sta=NULL; -+ _irqL irqL; -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_TEARDOWN; -+ ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); -+ if (ptdls_sta == NULL) { -+ DBG_871X("Np tdls_sta for tearing down\n"); -+ goto exit; -+ } -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ rtw_set_scan_deny(padapter, 550); -+ -+ rtw_scan_abort(padapter); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_buddy_adapter_up(padapter)) -+ rtw_scan_abort(padapter->pbuddy_adapter); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) -+ if (pattrib->encrypt) -+ _cancel_timer_ex(&ptdls_sta->TPK_timer); -+ -+ if (wait_ack) { -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ } else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+ if (ret == _SUCCESS && rtw_tdls_is_driver_setup(padapter)) -+ rtw_tdls_cmd(padapter, ptxmgmt->peer, TDLS_TEAR_STA); -+ -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) -+{ -+ int ret = _FAIL; -+ -+ ret = _issue_tdls_teardown(padapter, ptxmgmt, wait_ack); -+ if ((ptxmgmt->status_code == _RSON_TDLS_TEAR_UN_RSN_) && (ret == _FAIL)) { -+ /* Change status code and send teardown again via AP */ -+ ptxmgmt->status_code = _RSON_TDLS_TEAR_TOOFAR_; -+ ret = _issue_tdls_teardown(padapter, ptxmgmt, wait_ack); -+ } -+ -+ return ret; -+} -+ -+int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_DISCOVERY_REQUEST; -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ dump_mgntframe(padapter, pmgntframe); -+ DBG_871X("issue tdls dis req\n"); -+ -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_SETUP_RESPONSE; -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(&(padapter->mlmepriv)), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+ -+} -+ -+int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_SETUP_CONFIRM; -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(&padapter->mlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+ -+} -+ -+/* TDLS Discovery Response frame is a management action frame */ -+int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ /* unicast probe request frame */ -+ _rtw_memcpy(pwlanhdr->addr1, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ SetFrameSubType(pframe, WIFI_ACTION); -+ -+ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); -+ -+ rtw_build_tdls_dis_rsp_ies(padapter, pmgntframe, pframe, ptxmgmt, privacy); -+ -+ pattrib->nr_frags = 1; -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *ptdls_sta, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_PEER_TRAFFIC_RESPONSE; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TDLS_PEER_TRAFFIC_INDICATION; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ /* PTI frame's priority should be AC_VO */ -+ pattrib->priority = 7; -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) -+ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TDLS_CHANNEL_SWITCH_REQUEST; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ DBG_871X("[TDLS] %s\n", __FUNCTION__); -+ -+ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) -+ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ ptxmgmt->action_code = TDLS_CHANNEL_SWITCH_RESPONSE; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+/* -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ return _FALSE; -+ } -+*/ -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ if (wait_ack) { -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ } else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+ -+int On_TDLS_Dis_Rsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct sta_info *ptdls_sta = NULL, *psta = rtw_get_stainfo(&(padapter->stapriv), get_bssid(&(padapter->mlmepriv))); -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ u8 *ptr = precv_frame->u.hdr.rx_data, *psa; -+ struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); -+ struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); -+ u8 empty_addr[ETH_ALEN] = { 0x00 }; -+ int UndecoratedSmoothedPWDB; -+ struct tdls_txmgmt txmgmt; -+ int ret = _SUCCESS; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ /* WFDTDLS: for sigma test, not to setup direct link automatically */ -+ ptdlsinfo->dev_discovered = _TRUE; -+ -+ psa = get_sa(ptr); -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), psa); -+ if (ptdls_sta != NULL) -+ ptdls_sta->sta_stats.rx_tdls_disc_rsp_pkts++; -+ -+#ifdef CONFIG_TDLS_AUTOSETUP -+ if (ptdls_sta != NULL) { -+ /* Record the tdls sta with lowest signal strength */ -+ if (ptdlsinfo->sta_maximum == _TRUE && ptdls_sta->alive_count >= 1 ) { -+ if (_rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { -+ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); -+ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.RxPWDBAll; -+ } else { -+ if (ptdlsinfo->ss_record.RxPWDBAll < pattrib->phy_info.RxPWDBAll) { -+ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); -+ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.RxPWDBAll; -+ } -+ } -+ } -+ } else { -+ if (ptdlsinfo->sta_maximum == _TRUE) { -+ if (_rtw_memcmp( ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { -+ /* All traffics are busy, do not set up another direct link. */ -+ ret = _FAIL; -+ goto exit; -+ } else { -+ if (pattrib->phy_info.RxPWDBAll > ptdlsinfo->ss_record.RxPWDBAll) { -+ _rtw_memcpy(txmgmt.peer, ptdlsinfo->ss_record.macaddr, ETH_ALEN); -+ /* issue_tdls_teardown(padapter, ptdlsinfo->ss_record.macaddr, _FALSE); */ -+ } else { -+ ret = _FAIL; -+ goto exit; -+ } -+ } -+ } -+ -+ rtw_hal_get_def_var(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); -+ -+ if (pattrib->phy_info.RxPWDBAll + TDLS_SIGNAL_THRESH >= UndecoratedSmoothedPWDB) { -+ DBG_871X("pattrib->RxPWDBAll=%d, pdmpriv->UndecoratedSmoothedPWDB=%d\n", pattrib->phy_info.RxPWDBAll, UndecoratedSmoothedPWDB); -+ _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); -+ issue_tdls_setup_req(padapter, &txmgmt, _FALSE); -+ } -+ } -+#endif /* CONFIG_TDLS_AUTOSETUP */ -+ -+exit: -+ return ret; -+ -+} -+ -+sint On_TDLS_Setup_Req(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ u8 *psa, *pmyid; -+ struct sta_info *ptdls_sta= NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ _irqL irqL; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *prsnie, *ppairwise_cipher; -+ u8 i, k; -+ u8 ccmp_included=0, rsnie_included=0; -+ u16 j, pairwise_count; -+ u8 SNonce[32]; -+ u32 timeout_interval = TPK_RESEND_COUNT; -+ sint parsing_length; /* Frame body length, without icv_len */ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 5; -+ unsigned char supportRate[16]; -+ int supportRateNum = 0; -+ struct tdls_txmgmt txmgmt; -+ -+ if (ptdlsinfo->ap_prohibited == _TRUE) -+ goto exit; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ psa = get_sa(ptr); -+ ptdls_sta = rtw_get_stainfo(pstapriv, psa); -+ -+ pmyid = adapter_mac_addr(padapter); -+ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; -+ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -+ -prx_pkt_attrib->hdrlen -+ -prx_pkt_attrib->iv_len -+ -prx_pkt_attrib->icv_len -+ -LLC_HEADER_SIZE -+ -ETH_TYPE_LEN -+ -PAYLOAD_TYPE_LEN -+ -FIXED_IE; -+ -+ if (ptdls_sta == NULL) { -+ ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); -+ } else { -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { -+ /* If the direct link is already set up */ -+ /* Process as re-setup after tear down */ -+ DBG_871X("re-setup a direct link\n"); -+ } -+ /* Already receiving TDLS setup request */ -+ else if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { -+ DBG_871X("receive duplicated TDLS setup request frame in handshaking\n"); -+ goto exit; -+ } -+ /* When receiving and sending setup_req to the same link at the same time */ -+ /* STA with higher MAC_addr would be initiator */ -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { -+ DBG_871X("receive setup_req after sending setup_req\n"); -+ for (i=0;i<6;i++){ -+ if(*(pmyid+i)==*(psa+i)){ -+ } -+ else if(*(pmyid+i)>*(psa+i)){ -+ ptdls_sta->tdls_sta_state = TDLS_INITIATOR_STATE; -+ break; -+ }else if(*(pmyid+i)<*(psa+i)){ -+ goto exit; -+ } -+ } -+ } -+ } -+ -+ if (ptdls_sta) { -+ txmgmt.dialog_token = *(ptr+2); /* Copy dialog token */ -+ txmgmt.status_code = _STATS_SUCCESSFUL_; -+ -+ /* Parsing information element */ -+ for (j=FIXED_IE; jElementID) { -+ case _SUPPORTEDRATES_IE_: -+ _rtw_memcpy(supportRate, pIE->data, pIE->Length); -+ supportRateNum = pIE->Length; -+ break; -+ case _COUNTRY_IE_: -+ break; -+ case _EXT_SUPPORTEDRATES_IE_: -+ if (supportRateNum<=sizeof(supportRate)) { -+ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); -+ supportRateNum += pIE->Length; -+ } -+ break; -+ case _SUPPORTED_CH_IE_: -+ break; -+ case _RSN_IE_2_: -+ rsnie_included=1; -+ if (prx_pkt_attrib->encrypt) { -+ prsnie=(u8*)pIE; -+ /* Check CCMP pairwise_cipher presence. */ -+ ppairwise_cipher=prsnie+10; -+ _rtw_memcpy(ptdls_sta->TDLS_RSNIE, pIE->data, pIE->Length); -+ pairwise_count = *(u16*)(ppairwise_cipher-2); -+ for (k=0; kencrypt) -+ _rtw_memcpy(SNonce, (ptr+j+52), 32); -+ break; -+ case _TIMEOUT_ITVL_IE_: -+ if (prx_pkt_attrib->encrypt) -+ timeout_interval = cpu_to_le32(*(u32*)(ptr+j+3)); -+ break; -+ case _RIC_Descriptor_IE_: -+ break; -+#ifdef CONFIG_80211N_HT -+ case _HT_CAPABILITY_IE_: -+ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+#ifdef CONFIG_80211AC_VHT -+ case EID_AID: -+ break; -+ case EID_VHTCapability: -+ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+ case EID_BSSCoexistence: -+ break; -+ case _LINK_ID_IE_: -+ if (_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) -+ txmgmt.status_code=_STATS_NOT_IN_SAME_BSS_; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ /* Check status code */ -+ /* If responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject */ -+ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { -+ if (rsnie_included && prx_pkt_attrib->encrypt == 0) -+ txmgmt.status_code = _STATS_SEC_DISABLED_; -+ else if (rsnie_included==0 && prx_pkt_attrib->encrypt) -+ txmgmt.status_code = _STATS_INVALID_PARAMETERS_; -+ -+#ifdef CONFIG_WFD -+ /* WFD test plan version 0.18.2 test item 5.1.5 */ -+ /* SoUT does not use TDLS if AP uses weak security */ -+ if (padapter->wdinfo.wfd_tdls_enable && (rsnie_included && prx_pkt_attrib->encrypt != _AES_)) -+ txmgmt.status_code = _STATS_SEC_DISABLED_; -+#endif /* CONFIG_WFD */ -+ } -+ -+ ptdls_sta->tdls_sta_state|= TDLS_INITIATOR_STATE; -+ if (prx_pkt_attrib->encrypt) { -+ _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); -+ -+ if (timeout_interval <= 300) -+ ptdls_sta->TDLS_PeerKey_Lifetime = TPK_RESEND_COUNT; -+ else -+ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; -+ } -+ -+ /* Update station supportRate */ -+ ptdls_sta->bssratelen = supportRateNum; -+ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); -+ -+ if (!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) -+ ptdlsinfo->sta_cnt++; -+ /* -2: AP + BC/MC sta, -4: default key */ -+ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) -+ ptdlsinfo->sta_maximum = _TRUE; -+ -+#ifdef CONFIG_WFD -+ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); -+#endif -+ -+ }else { -+ goto exit; -+ } -+ -+ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ issue_tdls_setup_rsp(padapter, &txmgmt); -+ -+ if (txmgmt.status_code==_STATS_SUCCESSFUL_) { -+ _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); -+ }else { -+ free_tdls_sta(padapter, ptdls_sta); -+ } -+ } -+ -+exit: -+ -+ return _SUCCESS; -+} -+ -+int On_TDLS_Setup_Rsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_info *ptdls_sta= NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ _irqL irqL; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *psa; -+ u16 status_code=0; -+ sint parsing_length; /* Frame body length, without icv_len */ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE =7; -+ u8 ANonce[32]; -+ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; -+ u16 pairwise_count, j, k; -+ u8 verify_ccmp=0; -+ unsigned char supportRate[16]; -+ int supportRateNum = 0; -+ struct tdls_txmgmt txmgmt; -+ int ret = _SUCCESS; -+ u32 timeout_interval = TPK_RESEND_COUNT; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ psa = get_sa(ptr); -+ ptdls_sta = rtw_get_stainfo(pstapriv, psa); -+ -+ if (NULL == ptdls_sta) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; -+ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -+ -prx_pkt_attrib->hdrlen -+ -prx_pkt_attrib->iv_len -+ -prx_pkt_attrib->icv_len -+ -LLC_HEADER_SIZE -+ -ETH_TYPE_LEN -+ -PAYLOAD_TYPE_LEN -+ -FIXED_IE; -+ -+ _rtw_memcpy(&status_code, ptr+2, 2); -+ -+ if (status_code != 0) { -+ DBG_871X( "[TDLS] %s status_code = %d, free_tdls_sta\n", __FUNCTION__, status_code ); -+ free_tdls_sta(padapter, ptdls_sta); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ status_code = 0; -+ -+ /* parsing information element */ -+ for (j = FIXED_IE; jElementID) { -+ case _SUPPORTEDRATES_IE_: -+ _rtw_memcpy(supportRate, pIE->data, pIE->Length); -+ supportRateNum = pIE->Length; -+ break; -+ case _COUNTRY_IE_: -+ break; -+ case _EXT_SUPPORTEDRATES_IE_: -+ if (supportRateNum<=sizeof(supportRate)) { -+ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); -+ supportRateNum += pIE->Length; -+ } -+ break; -+ case _SUPPORTED_CH_IE_: -+ break; -+ case _RSN_IE_2_: -+ prsnie=(u8*)pIE; -+ /* Check CCMP pairwise_cipher presence. */ -+ ppairwise_cipher=prsnie+10; -+ _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2); -+ for (k=0;kwmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) -+ ptdls_sta->qos_option = _TRUE; -+ } -+ break; -+ case _FTIE_: -+ pftie=(u8*)pIE; -+ _rtw_memcpy(ANonce, (ptr+j+20), 32); -+ break; -+ case _TIMEOUT_ITVL_IE_: -+ ptimeout_ie=(u8*)pIE; -+ timeout_interval = cpu_to_le32(*(u32*)(ptimeout_ie+3)); -+ break; -+ case _RIC_Descriptor_IE_: -+ break; -+#ifdef CONFIG_80211N_HT -+ case _HT_CAPABILITY_IE_: -+ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+#ifdef CONFIG_80211AC_VHT -+ case EID_AID: -+ /* todo in the future if necessary */ -+ break; -+ case EID_VHTCapability: -+ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+ case EID_OpModeNotification: -+ rtw_process_vht_op_mode_notify(padapter, pIE->data, ptdls_sta); -+ break; -+#endif -+ case EID_BSSCoexistence: -+ break; -+ case _LINK_ID_IE_: -+ plinkid_ie=(u8*)pIE; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ ptdls_sta->bssratelen = supportRateNum; -+ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); -+ _rtw_memcpy(ptdls_sta->ANonce, ANonce, 32); -+ -+#ifdef CONFIG_WFD -+ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); -+#endif -+ -+ if (status_code != _STATS_SUCCESSFUL_) { -+ txmgmt.status_code = status_code; -+ } else { -+ if (prx_pkt_attrib->encrypt) { -+ if (verify_ccmp == 1) { -+ txmgmt.status_code = _STATS_SUCCESSFUL_; -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ wpa_tdls_generate_tpk(padapter, ptdls_sta); -+ if (tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL) { -+ DBG_871X( "[TDLS] %s tdls_verify_mic fail, free_tdls_sta\n", __FUNCTION__); -+ free_tdls_sta(padapter, ptdls_sta); -+ ret = _FAIL; -+ goto exit; -+ } -+ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; -+ } -+ } -+ else -+ { -+ txmgmt.status_code = _STATS_INVALID_RSNIE_; -+ } -+ -+ }else{ -+ txmgmt.status_code = _STATS_SUCCESSFUL_; -+ } -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); -+ issue_tdls_setup_cfm(padapter, &txmgmt); -+ -+ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { -+ ptdlsinfo->link_established = _TRUE; -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { -+ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; -+ ptdls_sta->state |= _FW_LINKED; -+ _cancel_timer_ex( &ptdls_sta->handshake_timer); -+ } -+ -+ if (prx_pkt_attrib->encrypt) -+ rtw_tdls_set_key(padapter, ptdls_sta); -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); -+ -+ } -+ } -+ -+exit: -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ return ret; -+ else -+ return _SUCCESS; -+ -+} -+ -+int On_TDLS_Setup_Cfm(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_info *ptdls_sta= NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ _irqL irqL; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *psa; -+ u16 status_code=0; -+ sint parsing_length; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE =5; -+ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; -+ u16 j, pairwise_count; -+ int ret = _SUCCESS; -+ -+ psa = get_sa(ptr); -+ ptdls_sta = rtw_get_stainfo(pstapriv, psa); -+ -+ if (ptdls_sta == NULL) { -+ DBG_871X("[%s] Direct Link Peer = "MAC_FMT" not found\n", __FUNCTION__, MAC_ARG(psa)); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; -+ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -+ -prx_pkt_attrib->hdrlen -+ -prx_pkt_attrib->iv_len -+ -prx_pkt_attrib->icv_len -+ -LLC_HEADER_SIZE -+ -ETH_TYPE_LEN -+ -PAYLOAD_TYPE_LEN -+ -FIXED_IE; -+ -+ _rtw_memcpy(&status_code, ptr+2, 2); -+ -+ if (status_code!= 0) { -+ DBG_871X("[%s] status_code = %d\n, free_tdls_sta", __FUNCTION__, status_code); -+ free_tdls_sta(padapter, ptdls_sta); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* Parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); -+ -+ switch (pIE->ElementID) { -+ case _RSN_IE_2_: -+ prsnie = (u8 *)pIE; -+ break; -+ case _VENDOR_SPECIFIC_IE_: -+ if (_rtw_memcmp((u8 *)pIE + 2, WMM_PARA_OUI, 6) == _TRUE) { -+ /* WMM Parameter ID and OUI */ -+ ptdls_sta->qos_option = _TRUE; -+ } -+ break; -+ case _FTIE_: -+ pftie = (u8 *)pIE; -+ break; -+ case _TIMEOUT_ITVL_IE_: -+ ptimeout_ie = (u8 *)pIE; -+ break; -+#ifdef CONFIG_80211N_HT -+ case _HT_EXTRA_INFO_IE_: -+ break; -+#endif -+#ifdef CONFIG_80211AC_VHT -+ case EID_VHTOperation: -+ break; -+ case EID_OpModeNotification: -+ rtw_process_vht_op_mode_notify(padapter, pIE->data, ptdls_sta); -+ break; -+#endif -+ case _LINK_ID_IE_: -+ plinkid_ie = (u8 *)pIE; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ if (prx_pkt_attrib->encrypt) { -+ /* Verify mic in FTIE MIC field */ -+ if (rtw_tdls_is_driver_setup(padapter) && -+ (tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL)) { -+ free_tdls_sta(padapter, ptdls_sta); -+ ret = _FAIL; -+ goto exit; -+ } -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ ptdlsinfo->link_established = _TRUE; -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { -+ ptdls_sta->tdls_sta_state|=TDLS_LINKED_STATE; -+ ptdls_sta->state |= _FW_LINKED; -+ _cancel_timer_ex(&ptdls_sta->handshake_timer); -+ } -+ -+ if (prx_pkt_attrib->encrypt) { -+ rtw_tdls_set_key(padapter, ptdls_sta); -+ -+ /* Start TPK timer */ -+ ptdls_sta->TPK_count = 0; -+ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); -+ } -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); -+ } -+ -+exit: -+ return ret; -+ -+} -+ -+int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta_ap; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ sint parsing_length; /* Frame body length, without icv_len */ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 3, *dst; -+ u16 j; -+ struct tdls_txmgmt txmgmt; -+ int ret = _SUCCESS; -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _FALSE) -+ goto exit; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; -+ txmgmt.dialog_token = *(ptr+2); -+ _rtw_memcpy(&txmgmt.peer, precv_frame->u.hdr.attrib.src, ETH_ALEN); -+ txmgmt.action_code = TDLS_DISCOVERY_RESPONSE; -+ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -+ -prx_pkt_attrib->hdrlen -+ -prx_pkt_attrib->iv_len -+ -prx_pkt_attrib->icv_len -+ -LLC_HEADER_SIZE -+ -ETH_TYPE_LEN -+ -PAYLOAD_TYPE_LEN -+ -FIXED_IE; -+ -+ /* Parsing information element */ -+ for (j=FIXED_IE; jElementID) { -+ case _LINK_ID_IE_: -+ psta_ap = rtw_get_stainfo(pstapriv, pIE->data); -+ if (psta_ap == NULL) -+ goto exit; -+ dst = pIE->data + 12; -+ if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, 6) == _FALSE)) -+ goto exit; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ issue_tdls_dis_rsp(padapter, &txmgmt, prx_pkt_attrib->privacy); -+ -+exit: -+ return ret; -+ -+} -+ -+int On_TDLS_Teardown(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ u8 *psa; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *ptdls_sta= NULL; -+ _irqL irqL; -+ u8 reason; -+ -+ reason = *(ptr + prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN + 2); -+ DBG_871X("[TDLS] %s Reason code(%d)\n", __FUNCTION__,reason); -+ -+ psa = get_sa(ptr); -+ -+ ptdls_sta = rtw_get_stainfo(pstapriv, psa); -+ if (ptdls_sta != NULL) { -+ if (rtw_tdls_is_driver_setup(padapter)) -+ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_TEAR_STA); -+ } -+ -+ return _SUCCESS; -+ -+} -+ -+#if 0 -+u8 TDLS_check_ch_state(uint state){ -+ if (state & TDLS_CH_SWITCH_ON_STATE && -+ state & TDLS_PEER_AT_OFF_STATE) { -+ if (state & TDLS_PEER_SLEEP_STATE) -+ return 2; /* U-APSD + ch. switch */ -+ else -+ return 1; /* ch. switch */ -+ }else -+ return 0; -+} -+#endif -+ -+int On_TDLS_Peer_Traffic_Indication(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->src); -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct tdls_txmgmt txmgmt; -+ -+ ptr +=pattrib->hdrlen + pattrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ -+ if (ptdls_sta != NULL) { -+ txmgmt.dialog_token = *(ptr+2); -+ issue_tdls_peer_traffic_rsp(padapter, ptdls_sta, &txmgmt); -+ //issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 0, 0); -+ } else { -+ DBG_871X("from unknown sta:"MAC_FMT"\n", MAC_ARG(pattrib->src)); -+ return _FAIL; -+ } -+ -+ return _SUCCESS; -+} -+ -+/* We process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here */ -+int On_TDLS_Peer_Traffic_Rsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); -+ u8 wmmps_ac=0; -+ /* u8 state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); */ -+ int i; -+ -+ ptdls_sta->sta_stats.rx_data_pkts++; -+ -+ ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); -+ -+ /* Check 4-AC queue bit */ -+ if (ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) -+ wmmps_ac=1; -+ -+ /* If it's a direct link and have buffered frame */ -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { -+ if (wmmps_ac) { -+ _irqL irqL; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe=NULL; -+ -+ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); -+ -+ xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ /* transmit buffered frames */ -+ while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ xmitframe_plist = get_next(xmitframe_plist); -+ rtw_list_delete(&pxmitframe->list); -+ -+ ptdls_sta->sleepq_len--; -+ ptdls_sta->sleepq_ac_len--; -+ if (ptdls_sta->sleepq_len>0) { -+ pxmitframe->attrib.mdata = 1; -+ pxmitframe->attrib.eosp = 0; -+ } else { -+ pxmitframe->attrib.mdata = 0; -+ pxmitframe->attrib.eosp = 1; -+ } -+ pxmitframe->attrib.triggered = 1; -+ -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ } -+ -+ if (ptdls_sta->sleepq_len==0) -+ DBG_871X("no buffered packets for tdls to xmit\n"); -+ else { -+ DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); -+ ptdls_sta->sleepq_len=0; -+ } -+ -+ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); -+ -+ } -+ -+ } -+ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+sint On_TDLS_Ch_Switch_Req(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ struct sta_info *ptdls_sta= NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *psa; -+ sint parsing_length; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 4; -+ u16 j; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct tdls_txmgmt txmgmt; -+ u16 switch_time= CH_SWITCH_TIME * 1000, switch_timeout=CH_SWITCH_TIMEOUT * 1000; -+ -+ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) -+ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); -+ return _SUCCESS; -+ } -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ psa = get_sa(ptr); -+ ptdls_sta = rtw_get_stainfo(pstapriv, psa); -+ -+ ptdls_sta->ch_switch_time=switch_time; -+ ptdls_sta->ch_switch_timeout=switch_timeout; -+ -+ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; -+ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -+ -prx_pkt_attrib->hdrlen -+ -prx_pkt_attrib->iv_len -+ -prx_pkt_attrib->icv_len -+ -LLC_HEADER_SIZE -+ -ETH_TYPE_LEN -+ -PAYLOAD_TYPE_LEN -+ -FIXED_IE; -+ -+ pchsw_info->off_ch_num = *(ptr + 2); -+ -+ if (*(ptr + 2) == 2) { -+ pchsw_info->off_ch_num = 11; -+ } -+ -+ if (pchsw_info->off_ch_num != pmlmeext->cur_channel) { -+ pchsw_info->delay_switch_back = _FALSE; -+ } -+ -+ /* Parsing information element */ -+ for (j=FIXED_IE; jElementID) { -+ case EID_SecondaryChnlOffset: -+ padapter->tdlsinfo.chsw_info.ch_offset = *(pIE->data); -+ break; -+ case _LINK_ID_IE_: -+ break; -+ case _CH_SWITCH_TIMING_: -+ ptdls_sta->ch_switch_time = (RTW_GET_LE16(pIE->data) >= CH_SWITCH_TIME * 1000) ? -+ RTW_GET_LE16(pIE->data) : CH_SWITCH_TIME * 1000; -+ ptdls_sta->ch_switch_timeout = (RTW_GET_LE16(pIE->data + 2) >= CH_SWITCH_TIMEOUT * 1000) ? -+ RTW_GET_LE16(pIE->data + 2) : CH_SWITCH_TIMEOUT * 1000; -+ DBG_871X("%s ch_switch_time:%d, ch_switch_timeout:%d\n" -+ , __FUNCTION__, RTW_GET_LE16(pIE->data), RTW_GET_LE16(pIE->data + 2)); -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ } -+ -+ /* Todo: check status */ -+ txmgmt.status_code = 0; -+ _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); -+ -+ ATOMIC_SET(&pchsw_info->chsw_on, _TRUE); -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_RESP); -+ -+ return _SUCCESS; -+} -+ -+sint On_TDLS_Ch_Switch_Rsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ struct sta_info *ptdls_sta= NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *psa; -+ sint parsing_length; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 4; -+ u16 status_code, j, switch_time, switch_timeout; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ int ret = _SUCCESS; -+ -+ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) -+ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); -+ return _SUCCESS; -+ } -+ -+ psa = get_sa(ptr); -+ ptdls_sta = rtw_get_stainfo(pstapriv, psa); -+ -+ /* If we receive Unsolicited TDLS Channel Switch Response when channel switch is running, */ -+ /* we will go back to base channel and terminate this channel switch procedure */ -+ if (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) { -+ if (pmlmeext->cur_channel != rtw_get_oper_ch(padapter)) { -+ DBG_871X("receive unsolicited channel switch response \n"); -+ rtw_tdls_cmd(padapter, NULL, TDLS_CH_SW_BACK); -+ goto exit; -+ } -+ } -+ -+ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; -+ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len -+ -prx_pkt_attrib->hdrlen -+ -prx_pkt_attrib->iv_len -+ -prx_pkt_attrib->icv_len -+ -LLC_HEADER_SIZE -+ -ETH_TYPE_LEN -+ -PAYLOAD_TYPE_LEN -+ -FIXED_IE; -+ -+ _rtw_memcpy(&status_code, ptr+2, 2); -+ -+ if (status_code != 0) { -+ DBG_871X("[%s] status_code:%d\n", __FUNCTION__, status_code); -+ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE); -+ ATOMIC_SET(&pchsw_info->chsw_on, _FALSE); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* Parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j); -+ -+ switch (pIE->ElementID) { -+ case _LINK_ID_IE_: -+ break; -+ case _CH_SWITCH_TIMING_: -+ _rtw_memcpy(&switch_time, pIE->data, 2); -+ if (switch_time > ptdls_sta->ch_switch_time) -+ _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); -+ -+ _rtw_memcpy(&switch_timeout, pIE->data + 2, 2); -+ if (switch_timeout > ptdls_sta->ch_switch_timeout) -+ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ } -+ -+ if ((pmlmeext->cur_channel == rtw_get_oper_ch(padapter)) && -+ (pchsw_info->ch_sw_state & TDLS_WAIT_CH_RSP_STATE)) { -+ ATOMIC_SET(&pchsw_info->chsw_on, _TRUE); -+ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW); -+ } -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_TDLS_CH_SW */ -+ -+#ifdef CONFIG_WFD -+void wfd_ie_tdls(_adapter * padapter, u8 *pframe, u32 *pktlen ) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->tdlsinfo.wfd_info; -+ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 wfdielen = 0; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ return; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[ wfdielen++ ] = 0x50; -+ wfdie[ wfdielen++ ] = 0x6F; -+ wfdie[ wfdielen++ ] = 0x9A; -+ wfdie[ wfdielen++ ] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* -+ * Commented by Albert 20110825 -+ * According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes -+ * 1. WFD Device Information -+ * 2. Associated BSSID ( Optional ) -+ * 3. Local IP Adress ( Optional ) -+ */ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* available for WFD session + Preferred TDLS + WSD ( WFD Service Discovery ) */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL -+ | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_WSD); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ ++ _rtw_memcpy(ptdls_sta->vhtpriv.vht_mcs_map, vht_mcs, 2); ++ ++ ptdls_sta->vhtpriv.vht_highest_rate = rtw_get_vht_highest_rate(ptdls_sta->vhtpriv.vht_mcs_map); ++} ++ ++u8 *rtw_tdls_set_aid(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, EID_AID, 2, (u8 *)&(padapter->mlmepriv.cur_network.aid), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_vht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u32 ie_len = 0; ++ ++ rtw_vht_use_default_setting(padapter); ++ ++ ie_len = rtw_build_vht_cap_ie(padapter, pframe); ++ pattrib->pktlen += ie_len; ++ ++ return pframe + ie_len; ++} ++ ++u8 *rtw_tdls_set_vht_operation(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 channel) ++{ ++ u32 ie_len = 0; ++ ++ ie_len = rtw_build_vht_operation_ie(padapter, pframe, channel); ++ pattrib->pktlen += ie_len; ++ ++ return pframe + ie_len; ++} ++ ++u8 *rtw_tdls_set_vht_op_mode_notify(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 bw) ++{ ++ u32 ie_len = 0; ++ ++ ie_len = rtw_build_vht_op_mode_notify_ie(padapter, pframe, bw); ++ pattrib->pktlen += ie_len; ++ ++ return pframe + ie_len; ++} ++#endif ++ ++ ++u8 *rtw_tdls_set_sup_ch(struct mlme_ext_priv *pmlmeext, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 sup_ch[30 * 2] = {0x00}, ch_set_idx = 0, sup_ch_idx = 2; ++ ++ do { ++ if (pmlmeext->channel_set[ch_set_idx].ChannelNum <= 14) { ++ sup_ch[0] = 1; /* First channel number */ ++ sup_ch[1] = pmlmeext->channel_set[ch_set_idx].ChannelNum; /* Number of channel */ ++ } else { ++ sup_ch[sup_ch_idx++] = pmlmeext->channel_set[ch_set_idx].ChannelNum; ++ sup_ch[sup_ch_idx++] = 1; ++ } ++ ch_set_idx++; ++ } while (pmlmeext->channel_set[ch_set_idx].ChannelNum != 0 && ch_set_idx < MAX_CHANNEL_NUM); ++ ++ return rtw_set_ie(pframe, _SUPPORTED_CH_IE_, sup_ch_idx, sup_ch, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_rsnie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) ++{ ++ u8 *p = NULL; ++ int len = 0; ++ ++ if (ptxmgmt->len > 0) ++ p = rtw_get_ie(ptxmgmt->buf, _RSN_IE_2_, &len, ptxmgmt->len); ++ ++ if (p != NULL) ++ return rtw_set_ie(pframe, _RSN_IE_2_, len, p+2, &(pattrib->pktlen)); ++ else ++ if (init == _TRUE) ++ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); ++ else ++ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(ptdls_sta->TDLS_RSNIE), ptdls_sta->TDLS_RSNIE, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_ext_cap(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_qos_cap(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_ftie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, u8 *ANonce, u8 *SNonce) ++{ ++ struct wpa_tdls_ftie FTIE = {0}; ++ u8 *p = NULL; ++ int len = 0; ++ ++ if (ptxmgmt->len > 0) ++ p = rtw_get_ie(ptxmgmt->buf, _FTIE_, &len, ptxmgmt->len); ++ ++ if (p != NULL) ++ return rtw_set_ie(pframe, _FTIE_, len, p+2, &(pattrib->pktlen)); ++ else { ++ if (ANonce != NULL) ++ _rtw_memcpy(FTIE.Anonce, ANonce, WPA_NONCE_LEN); ++ if (SNonce != NULL) ++ _rtw_memcpy(FTIE.Snonce, SNonce, WPA_NONCE_LEN); ++ return rtw_set_ie(pframe, _FTIE_ , 82, (u8 *)FTIE.mic_ctrl, &(pattrib->pktlen)); ++ } ++} ++ ++u8 *rtw_tdls_set_timeout_interval(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) ++{ ++ u8 timeout_itvl[5]; /* set timeout interval to maximum value */ ++ u32 timeout_interval= TPK_RESEND_COUNT; ++ u8 *p = NULL; ++ int len = 0; ++ ++ if (ptxmgmt->len > 0) ++ p = rtw_get_ie(ptxmgmt->buf, _TIMEOUT_ITVL_IE_, &len, ptxmgmt->len); ++ ++ if (p != NULL) ++ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, len, p+2, &(pattrib->pktlen)); ++ else { ++ /* Timeout interval */ ++ timeout_itvl[0]=0x02; ++ if (init == _TRUE) ++ _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); ++ else ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ ++ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++} ++ ++u8 *rtw_tdls_set_bss_coexist(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 iedata=0; ++ ++ if (padapter->mlmepriv.num_FortyMHzIntolerant > 0) ++ iedata |= BIT(2); /* 20 MHz BSS Width Request */ ++ ++ /* Information Bit should be set by TDLS test plan 5.9 */ ++ iedata |= BIT(0); ++ return rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_payload_type(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 payload_type = 0x02; ++ return rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_category(u8 *pframe, struct pkt_attrib *pattrib, u8 category) ++{ ++ return rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_action(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) ++{ ++ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->action_code), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_status_code(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) ++{ ++ return rtw_set_fixed_ie(pframe, 2, (u8 *)&(ptxmgmt->status_code), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_dialog(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) ++{ ++ u8 dialogtoken = 1; ++ if (ptxmgmt->dialog_token) ++ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->dialog_token), &(pattrib->pktlen)); ++ else ++ return rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_reg_class(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) ++{ ++ u8 reg_class = 1; ++ return rtw_set_fixed_ie(pframe, 1, &(reg_class), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_capability(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 cap_from_ie[2] = {0}; ++ ++ _rtw_memcpy(cap_from_ie, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ return rtw_set_fixed_ie(pframe, 2, cap_from_ie, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_supported_rate(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; ++ int bssrate_len = 0; ++ u8 more_supportedrates = 0; ++ ++ rtw_set_supported_rate(bssrate, (padapter->registrypriv.wireless_mode == WIRELESS_MODE_MAX) ? padapter->mlmeextpriv.cur_wireless_mode : padapter->registrypriv.wireless_mode); ++ bssrate_len = rtw_get_rateset_len(bssrate); ++ ++ if (bssrate_len > 8) { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } else { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ /* extended supported rates */ ++ if (more_supportedrates == 1) { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ return pframe; ++} ++ ++u8 *rtw_tdls_set_sup_reg_class(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, _SRC_IE_ , sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_linkid(u8 *pframe, struct pkt_attrib *pattrib, u8 init) ++{ ++ u8 link_id_addr[18] = {0}; ++ if (init == _TRUE) { ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ } else { ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ } ++ return rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++u8 *rtw_tdls_set_target_ch(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 target_ch = 1; ++ if (padapter->tdlsinfo.chsw_info.off_ch_num) ++ return rtw_set_fixed_ie(pframe, 1, &(padapter->tdlsinfo.chsw_info.off_ch_num), &(pattrib->pktlen)); ++ else ++ return rtw_set_fixed_ie(pframe, 1, &(target_ch), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_ch_sw(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) ++{ ++ u8 ch_switch_timing[4] = {0}; ++ u16 switch_time = (ptdls_sta->ch_switch_time >= CH_SWITCH_TIME * 1000) ? ++ ptdls_sta->ch_switch_time : CH_SWITCH_TIME; ++ u16 switch_timeout = (ptdls_sta->ch_switch_timeout >= CH_SWITCH_TIMEOUT * 1000) ? ++ ptdls_sta->ch_switch_timeout : CH_SWITCH_TIMEOUT; ++ ++ _rtw_memcpy(ch_switch_timing, &switch_time, 2); ++ _rtw_memcpy(ch_switch_timing + 2, &switch_timeout, 2); ++ ++ return rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); ++} ++#endif ++ ++u8 *rtw_tdls_set_wmm_params(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 wmm_param_ele[24] = {0}; ++ ++ if (&pmlmeinfo->WMM_param) { ++ _rtw_memcpy(wmm_param_ele, WMM_PARA_OUI, 6); ++ if (_rtw_memcmp(&pmlmeinfo->WMM_param, &wmm_param_ele[6], 18) == _TRUE) ++ /* Use default WMM Param */ ++ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&TDLS_WMM_PARAM_IE, sizeof(TDLS_WMM_PARAM_IE)); ++ else ++ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&pmlmeinfo->WMM_param, sizeof(pmlmeinfo->WMM_param)); ++ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 24, wmm_param_ele, &(pattrib->pktlen)); ++ } ++ else ++ return pframe; ++} ++ ++#ifdef CONFIG_WFD ++void rtw_tdls_process_wfd_ie(struct tdls_info *ptdlsinfo, u8 *ptr, u8 length) ++{ ++ u8 *wfd_ie; ++ u32 wfd_ielen = 0; ++ ++ if (!hal_chk_wl_func(tdls_info_to_adapter(ptdlsinfo), WL_FUNC_MIRACAST)) ++ return; ++ ++ /* Try to get the TCP port information when receiving the negotiation response. */ ++ ++ wfd_ie = rtw_get_wfd_ie(ptr, length, NULL, &wfd_ielen); ++ while (wfd_ie) { ++ u8 *attr_content; ++ u32 attr_contentlen = 0; ++ int i; ++ ++ DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); ++ if (attr_content && attr_contentlen) { ++ ptdlsinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, ptdlsinfo->wfd_info->peer_rtsp_ctrlport ); ++ } ++ ++ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_LOCAL_IP_ADDR, NULL, &attr_contentlen); ++ if (attr_content && attr_contentlen) { ++ _rtw_memcpy(ptdlsinfo->wfd_info->peer_ip_address, ( attr_content + 1 ), 4); ++ DBG_871X("[%s] Peer IP = %02u.%02u.%02u.%02u\n", __FUNCTION__, ++ ptdlsinfo->wfd_info->peer_ip_address[0], ptdlsinfo->wfd_info->peer_ip_address[1], ++ ptdlsinfo->wfd_info->peer_ip_address[2], ptdlsinfo->wfd_info->peer_ip_address[3]); ++ } ++ ++ wfd_ie = rtw_get_wfd_ie(wfd_ie + wfd_ielen, (ptr + length) - (wfd_ie + wfd_ielen), NULL, &wfd_ielen); ++ } ++} ++ ++int issue_tunneled_probe_req(_adapter *padapter) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TUNNELED_PROBE_REQ; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++ ++int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TUNNELED_PROBE_RSP; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, precv_frame->u.hdr.attrib.src, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++#endif /* CONFIG_WFD */ ++ ++int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ int ret = _FAIL; ++ /* Retry timer should be set at least 301 sec, using TPK_count counting 301 times. */ ++ u32 timeout_interval= TPK_RESEND_COUNT; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_SETUP_REQUEST; ++ if (ptdlsinfo->ap_prohibited == _TRUE) ++ goto exit; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ /* init peer sta_info */ ++ ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); ++ if (ptdls_sta == NULL) { ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, ptxmgmt->peer); ++ if (ptdls_sta == NULL) { ++ DBG_871X("[%s] rtw_alloc_stainfo fail\n", __FUNCTION__); ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ } ++ ++ if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ++ ptdlsinfo->sta_cnt++; ++ ++ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) ++ ptdlsinfo->sta_maximum = _TRUE; ++ ++ ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ _set_timer(&ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); ++ } ++ ++ pattrib->qsel = pattrib->priority; ++ ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ ++ return ret; ++} ++ ++int _issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta=NULL; ++ _irqL irqL; ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_TEARDOWN; ++ ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); ++ if (ptdls_sta == NULL) { ++ DBG_871X("Np tdls_sta for tearing down\n"); ++ goto exit; ++ } ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ rtw_set_scan_deny(padapter, 550); ++ ++ rtw_scan_abort(padapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_buddy_adapter_up(padapter)) ++ rtw_scan_abort(padapter->pbuddy_adapter); ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ++ if (pattrib->encrypt) ++ _cancel_timer_ex(&ptdls_sta->TPK_timer); ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++ if (ret == _SUCCESS && rtw_tdls_is_driver_setup(padapter)) ++ rtw_tdls_cmd(padapter, ptxmgmt->peer, TDLS_TEAR_STA); ++ ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) ++{ ++ int ret = _FAIL; ++ ++ ret = _issue_tdls_teardown(padapter, ptxmgmt, wait_ack); ++ if ((ptxmgmt->status_code == _RSON_TDLS_TEAR_UN_RSN_) && (ret == _FAIL)) { ++ /* Change status code and send teardown again via AP */ ++ ptxmgmt->status_code = _RSON_TDLS_TEAR_TOOFAR_; ++ ret = _issue_tdls_teardown(padapter, ptxmgmt, wait_ack); ++ } ++ ++ return ret; ++} ++ ++int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_DISCOVERY_REQUEST; ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ dump_mgntframe(padapter, pmgntframe); ++ DBG_871X("issue tdls dis req\n"); ++ ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_SETUP_RESPONSE; ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(&(padapter->mlmepriv)), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++ ++} ++ ++int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_SETUP_CONFIRM; ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(&padapter->mlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++ ++} ++ ++/* TDLS Discovery Response frame is a management action frame */ ++int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ /* unicast probe request frame */ ++ _rtw_memcpy(pwlanhdr->addr1, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ rtw_build_tdls_dis_rsp_ies(padapter, pmgntframe, pframe, ptxmgmt, privacy); ++ ++ pattrib->nr_frags = 1; ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *ptdls_sta, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_PEER_TRAFFIC_RESPONSE; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TDLS_PEER_TRAFFIC_INDICATION; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ /* PTI frame's priority should be AC_VO */ ++ pattrib->priority = 7; ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) ++ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); ++ goto exit; ++ } ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TDLS_CHANNEL_SWITCH_REQUEST; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) ++ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); ++ goto exit; ++ } ++ ++ ptxmgmt->action_code = TDLS_CHANNEL_SWITCH_RESPONSE; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++/* ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ return _FALSE; ++ } ++*/ ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++ ++int On_TDLS_Dis_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta = NULL, *psta = rtw_get_stainfo(&(padapter->stapriv), get_bssid(&(padapter->mlmepriv))); ++ struct recv_priv *precvpriv = &(padapter->recvpriv); ++ u8 *ptr = precv_frame->u.hdr.rx_data, *psa; ++ struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); ++ struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); ++ u8 empty_addr[ETH_ALEN] = { 0x00 }; ++ int UndecoratedSmoothedPWDB; ++ struct tdls_txmgmt txmgmt; ++ int ret = _SUCCESS; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ /* WFDTDLS: for sigma test, not to setup direct link automatically */ ++ ptdlsinfo->dev_discovered = _TRUE; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), psa); ++ if (ptdls_sta != NULL) ++ ptdls_sta->sta_stats.rx_tdls_disc_rsp_pkts++; ++ ++#ifdef CONFIG_TDLS_AUTOSETUP ++ if (ptdls_sta != NULL) { ++ /* Record the tdls sta with lowest signal strength */ ++ if (ptdlsinfo->sta_maximum == _TRUE && ptdls_sta->alive_count >= 1 ) { ++ if (_rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.RxPWDBAll; ++ } else { ++ if (ptdlsinfo->ss_record.RxPWDBAll < pattrib->phy_info.RxPWDBAll) { ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.RxPWDBAll; ++ } ++ } ++ } ++ } else { ++ if (ptdlsinfo->sta_maximum == _TRUE) { ++ if (_rtw_memcmp( ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { ++ /* All traffics are busy, do not set up another direct link. */ ++ ret = _FAIL; ++ goto exit; ++ } else { ++ if (pattrib->phy_info.RxPWDBAll > ptdlsinfo->ss_record.RxPWDBAll) { ++ _rtw_memcpy(txmgmt.peer, ptdlsinfo->ss_record.macaddr, ETH_ALEN); ++ /* issue_tdls_teardown(padapter, ptdlsinfo->ss_record.macaddr, _FALSE); */ ++ } else { ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ } ++ ++ rtw_hal_get_def_var(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); ++ ++ if (pattrib->phy_info.RxPWDBAll + TDLS_SIGNAL_THRESH >= UndecoratedSmoothedPWDB) { ++ DBG_871X("pattrib->RxPWDBAll=%d, pdmpriv->UndecoratedSmoothedPWDB=%d\n", pattrib->phy_info.RxPWDBAll, UndecoratedSmoothedPWDB); ++ _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); ++ issue_tdls_setup_req(padapter, &txmgmt, _FALSE); ++ } ++ } ++#endif /* CONFIG_TDLS_AUTOSETUP */ ++ ++exit: ++ return ret; ++ ++} ++ ++sint On_TDLS_Setup_Req(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 *psa, *pmyid; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *prsnie, *ppairwise_cipher; ++ u8 i, k; ++ u8 ccmp_included=0, rsnie_included=0; ++ u16 j, pairwise_count; ++ u8 SNonce[32]; ++ u32 timeout_interval = TPK_RESEND_COUNT; ++ sint parsing_length; /* Frame body length, without icv_len */ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 5; ++ unsigned char supportRate[16]; ++ int supportRateNum = 0; ++ struct tdls_txmgmt txmgmt; ++ ++ if (ptdlsinfo->ap_prohibited == _TRUE) ++ goto exit; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ pmyid = adapter_mac_addr(padapter); ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ if (ptdls_sta == NULL) { ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); ++ } else { ++ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { ++ /* If the direct link is already set up */ ++ /* Process as re-setup after tear down */ ++ DBG_871X("re-setup a direct link\n"); ++ } ++ /* Already receiving TDLS setup request */ ++ else if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { ++ DBG_871X("receive duplicated TDLS setup request frame in handshaking\n"); ++ goto exit; ++ } ++ /* When receiving and sending setup_req to the same link at the same time */ ++ /* STA with higher MAC_addr would be initiator */ ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { ++ DBG_871X("receive setup_req after sending setup_req\n"); ++ for (i=0;i<6;i++){ ++ if(*(pmyid+i)==*(psa+i)){ ++ } ++ else if(*(pmyid+i)>*(psa+i)){ ++ ptdls_sta->tdls_sta_state = TDLS_INITIATOR_STATE; ++ break; ++ }else if(*(pmyid+i)<*(psa+i)){ ++ goto exit; ++ } ++ } ++ } ++ } ++ ++ if (ptdls_sta) { ++ txmgmt.dialog_token = *(ptr+2); /* Copy dialog token */ ++ txmgmt.status_code = _STATS_SUCCESSFUL_; ++ ++ /* Parsing information element */ ++ for (j=FIXED_IE; jElementID) { ++ case _SUPPORTEDRATES_IE_: ++ _rtw_memcpy(supportRate, pIE->data, pIE->Length); ++ supportRateNum = pIE->Length; ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ if (supportRateNum<=sizeof(supportRate)) { ++ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); ++ supportRateNum += pIE->Length; ++ } ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ rsnie_included=1; ++ if (prx_pkt_attrib->encrypt) { ++ prsnie=(u8*)pIE; ++ /* Check CCMP pairwise_cipher presence. */ ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(ptdls_sta->TDLS_RSNIE, pIE->data, pIE->Length); ++ pairwise_count = *(u16*)(ppairwise_cipher-2); ++ for (k=0; kencrypt) ++ _rtw_memcpy(SNonce, (ptr+j+52), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ if (prx_pkt_attrib->encrypt) ++ timeout_interval = cpu_to_le32(*(u32*)(ptr+j+3)); ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++#ifdef CONFIG_80211N_HT ++ case _HT_CAPABILITY_IE_: ++ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++#endif ++#ifdef CONFIG_80211AC_VHT ++ case EID_AID: ++ break; ++ case EID_VHTCapability: ++ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++#endif ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ if (_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) ++ txmgmt.status_code=_STATS_NOT_IN_SAME_BSS_; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ /* Check status code */ ++ /* If responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject */ ++ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { ++ if (rsnie_included && prx_pkt_attrib->encrypt == 0) ++ txmgmt.status_code = _STATS_SEC_DISABLED_; ++ else if (rsnie_included==0 && prx_pkt_attrib->encrypt) ++ txmgmt.status_code = _STATS_INVALID_PARAMETERS_; ++ ++#ifdef CONFIG_WFD ++ /* WFD test plan version 0.18.2 test item 5.1.5 */ ++ /* SoUT does not use TDLS if AP uses weak security */ ++ if (padapter->wdinfo.wfd_tdls_enable && (rsnie_included && prx_pkt_attrib->encrypt != _AES_)) ++ txmgmt.status_code = _STATS_SEC_DISABLED_; ++#endif /* CONFIG_WFD */ ++ } ++ ++ ptdls_sta->tdls_sta_state|= TDLS_INITIATOR_STATE; ++ if (prx_pkt_attrib->encrypt) { ++ _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); ++ ++ if (timeout_interval <= 300) ++ ptdls_sta->TDLS_PeerKey_Lifetime = TPK_RESEND_COUNT; ++ else ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ } ++ ++ /* Update station supportRate */ ++ ptdls_sta->bssratelen = supportRateNum; ++ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); ++ ++ if (!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ++ ptdlsinfo->sta_cnt++; ++ /* -2: AP + BC/MC sta, -4: default key */ ++ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) ++ ptdlsinfo->sta_maximum = _TRUE; ++ ++#ifdef CONFIG_WFD ++ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); ++#endif ++ ++ }else { ++ goto exit; ++ } ++ ++ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ issue_tdls_setup_rsp(padapter, &txmgmt); ++ ++ if (txmgmt.status_code==_STATS_SUCCESSFUL_) { ++ _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); ++ }else { ++ free_tdls_sta(padapter, ptdls_sta); ++ } ++ } ++ ++exit: ++ ++ return _SUCCESS; ++} ++ ++int On_TDLS_Setup_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 status_code=0; ++ sint parsing_length; /* Frame body length, without icv_len */ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =7; ++ u8 ANonce[32]; ++ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; ++ u16 pairwise_count, j, k; ++ u8 verify_ccmp=0; ++ unsigned char supportRate[16]; ++ int supportRateNum = 0; ++ struct tdls_txmgmt txmgmt; ++ int ret = _SUCCESS; ++ u32 timeout_interval = TPK_RESEND_COUNT; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ if (NULL == ptdls_sta) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ _rtw_memcpy(&status_code, ptr+2, 2); ++ ++ if (status_code != 0) { ++ DBG_871X( "[TDLS] %s status_code = %d, free_tdls_sta\n", __FUNCTION__, status_code ); ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ status_code = 0; ++ ++ /* parsing information element */ ++ for (j = FIXED_IE; jElementID) { ++ case _SUPPORTEDRATES_IE_: ++ _rtw_memcpy(supportRate, pIE->data, pIE->Length); ++ supportRateNum = pIE->Length; ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ if (supportRateNum<=sizeof(supportRate)) { ++ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); ++ supportRateNum += pIE->Length; ++ } ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ prsnie=(u8*)pIE; ++ /* Check CCMP pairwise_cipher presence. */ ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2); ++ for (k=0;kwmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) ++ ptdls_sta->qos_option = _TRUE; ++ } ++ break; ++ case _FTIE_: ++ pftie=(u8*)pIE; ++ _rtw_memcpy(ANonce, (ptr+j+20), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie=(u8*)pIE; ++ timeout_interval = cpu_to_le32(*(u32*)(ptimeout_ie+3)); ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++#ifdef CONFIG_80211N_HT ++ case _HT_CAPABILITY_IE_: ++ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++#endif ++#ifdef CONFIG_80211AC_VHT ++ case EID_AID: ++ /* todo in the future if necessary */ ++ break; ++ case EID_VHTCapability: ++ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++ case EID_OpModeNotification: ++ rtw_process_vht_op_mode_notify(padapter, pIE->data, ptdls_sta); ++ break; ++#endif ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ plinkid_ie=(u8*)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ ptdls_sta->bssratelen = supportRateNum; ++ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); ++ _rtw_memcpy(ptdls_sta->ANonce, ANonce, 32); ++ ++#ifdef CONFIG_WFD ++ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); ++#endif ++ ++ if (status_code != _STATS_SUCCESSFUL_) { ++ txmgmt.status_code = status_code; ++ } else { ++ if (prx_pkt_attrib->encrypt) { ++ if (verify_ccmp == 1) { ++ txmgmt.status_code = _STATS_SUCCESSFUL_; ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ wpa_tdls_generate_tpk(padapter, ptdls_sta); ++ if (tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL) { ++ DBG_871X( "[TDLS] %s tdls_verify_mic fail, free_tdls_sta\n", __FUNCTION__); ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ } ++ } ++ else ++ { ++ txmgmt.status_code = _STATS_INVALID_RSNIE_; ++ } ++ ++ }else{ ++ txmgmt.status_code = _STATS_SUCCESSFUL_; ++ } ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); ++ issue_tdls_setup_cfm(padapter, &txmgmt); ++ ++ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { ++ ptdlsinfo->link_established = _TRUE; ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { ++ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; ++ ptdls_sta->state |= _FW_LINKED; ++ _cancel_timer_ex( &ptdls_sta->handshake_timer); ++ } ++ ++ if (prx_pkt_attrib->encrypt) ++ rtw_tdls_set_key(padapter, ptdls_sta); ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); ++ ++ } ++ } ++ ++exit: ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ return ret; ++ else ++ return _SUCCESS; ++ ++} ++ ++int On_TDLS_Setup_Cfm(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 status_code=0; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =5; ++ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; ++ u16 j, pairwise_count; ++ int ret = _SUCCESS; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ if (ptdls_sta == NULL) { ++ DBG_871X("[%s] Direct Link Peer = "MAC_FMT" not found\n", __FUNCTION__, MAC_ARG(psa)); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ _rtw_memcpy(&status_code, ptr+2, 2); ++ ++ if (status_code!= 0) { ++ DBG_871X("[%s] status_code = %d\n, free_tdls_sta", __FUNCTION__, status_code); ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ /* Parsing information element */ ++ for (j = FIXED_IE; j < parsing_length;) { ++ ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); ++ ++ switch (pIE->ElementID) { ++ case _RSN_IE_2_: ++ prsnie = (u8 *)pIE; ++ break; ++ case _VENDOR_SPECIFIC_IE_: ++ if (_rtw_memcmp((u8 *)pIE + 2, WMM_PARA_OUI, 6) == _TRUE) { ++ /* WMM Parameter ID and OUI */ ++ ptdls_sta->qos_option = _TRUE; ++ } ++ break; ++ case _FTIE_: ++ pftie = (u8 *)pIE; ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie = (u8 *)pIE; ++ break; ++#ifdef CONFIG_80211N_HT ++ case _HT_EXTRA_INFO_IE_: ++ break; ++#endif ++#ifdef CONFIG_80211AC_VHT ++ case EID_VHTOperation: ++ break; ++ case EID_OpModeNotification: ++ rtw_process_vht_op_mode_notify(padapter, pIE->data, ptdls_sta); ++ break; ++#endif ++ case _LINK_ID_IE_: ++ plinkid_ie = (u8 *)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ if (prx_pkt_attrib->encrypt) { ++ /* Verify mic in FTIE MIC field */ ++ if (rtw_tdls_is_driver_setup(padapter) && ++ (tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL)) { ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ ptdlsinfo->link_established = _TRUE; ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { ++ ptdls_sta->tdls_sta_state|=TDLS_LINKED_STATE; ++ ptdls_sta->state |= _FW_LINKED; ++ _cancel_timer_ex(&ptdls_sta->handshake_timer); ++ } ++ ++ if (prx_pkt_attrib->encrypt) { ++ rtw_tdls_set_key(padapter, ptdls_sta); ++ ++ /* Start TPK timer */ ++ ptdls_sta->TPK_count = 0; ++ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); ++ } ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); ++ } ++ ++exit: ++ return ret; ++ ++} ++ ++int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta_ap; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ sint parsing_length; /* Frame body length, without icv_len */ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 3, *dst; ++ u16 j; ++ struct tdls_txmgmt txmgmt; ++ int ret = _SUCCESS; ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _FALSE) ++ goto exit; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ txmgmt.dialog_token = *(ptr+2); ++ _rtw_memcpy(&txmgmt.peer, precv_frame->u.hdr.attrib.src, ETH_ALEN); ++ txmgmt.action_code = TDLS_DISCOVERY_RESPONSE; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ /* Parsing information element */ ++ for (j=FIXED_IE; jElementID) { ++ case _LINK_ID_IE_: ++ psta_ap = rtw_get_stainfo(pstapriv, pIE->data); ++ if (psta_ap == NULL) ++ goto exit; ++ dst = pIE->data + 12; ++ if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, 6) == _FALSE)) ++ goto exit; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ issue_tdls_dis_rsp(padapter, &txmgmt, prx_pkt_attrib->privacy); ++ ++exit: ++ return ret; ++ ++} ++ ++int On_TDLS_Teardown(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ u8 *psa; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ u8 reason; ++ ++ reason = *(ptr + prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN + 2); ++ DBG_871X("[TDLS] %s Reason code(%d)\n", __FUNCTION__,reason); ++ ++ psa = get_sa(ptr); ++ ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ if (ptdls_sta != NULL) { ++ if (rtw_tdls_is_driver_setup(padapter)) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_TEAR_STA); ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++#if 0 ++u8 TDLS_check_ch_state(uint state){ ++ if (state & TDLS_CH_SWITCH_ON_STATE && ++ state & TDLS_PEER_AT_OFF_STATE) { ++ if (state & TDLS_PEER_SLEEP_STATE) ++ return 2; /* U-APSD + ch. switch */ ++ else ++ return 1; /* ch. switch */ ++ }else ++ return 0; ++} ++#endif ++ ++int On_TDLS_Peer_Traffic_Indication(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->src); ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct tdls_txmgmt txmgmt; ++ ++ ptr +=pattrib->hdrlen + pattrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ ++ if (ptdls_sta != NULL) { ++ txmgmt.dialog_token = *(ptr+2); ++ issue_tdls_peer_traffic_rsp(padapter, ptdls_sta, &txmgmt); ++ //issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 0, 0); ++ } else { ++ DBG_871X("from unknown sta:"MAC_FMT"\n", MAC_ARG(pattrib->src)); ++ return _FAIL; ++ } ++ ++ return _SUCCESS; ++} ++ ++/* We process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here */ ++int On_TDLS_Peer_Traffic_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); ++ u8 wmmps_ac=0; ++ /* u8 state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); */ ++ int i; ++ ++ ptdls_sta->sta_stats.rx_data_pkts++; ++ ++ ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); ++ ++ /* Check 4-AC queue bit */ ++ if (ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) ++ wmmps_ac=1; ++ ++ /* If it's a direct link and have buffered frame */ ++ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { ++ if (wmmps_ac) { ++ _irqL irqL; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ ++ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ /* transmit buffered frames */ ++ while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ xmitframe_plist = get_next(xmitframe_plist); ++ rtw_list_delete(&pxmitframe->list); ++ ++ ptdls_sta->sleepq_len--; ++ ptdls_sta->sleepq_ac_len--; ++ if (ptdls_sta->sleepq_len>0) { ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ } else { ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ pxmitframe->attrib.triggered = 1; ++ ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ } ++ ++ if (ptdls_sta->sleepq_len==0) ++ DBG_871X("no buffered packets for tdls to xmit\n"); ++ else { ++ DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); ++ ptdls_sta->sleepq_len=0; ++ } ++ ++ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ } ++ ++ } ++ ++ return _SUCCESS; ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++sint On_TDLS_Ch_Switch_Req(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 4; ++ u16 j; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct tdls_txmgmt txmgmt; ++ u16 switch_time= CH_SWITCH_TIME * 1000, switch_timeout=CH_SWITCH_TIMEOUT * 1000; ++ ++ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) ++ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); ++ return _SUCCESS; ++ } ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ ptdls_sta->ch_switch_time=switch_time; ++ ptdls_sta->ch_switch_timeout=switch_timeout; ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ pchsw_info->off_ch_num = *(ptr + 2); ++ ++ if (*(ptr + 2) == 2) { ++ pchsw_info->off_ch_num = 11; ++ } ++ ++ if (pchsw_info->off_ch_num != pmlmeext->cur_channel) { ++ pchsw_info->delay_switch_back = _FALSE; ++ } ++ ++ /* Parsing information element */ ++ for (j=FIXED_IE; jElementID) { ++ case EID_SecondaryChnlOffset: ++ padapter->tdlsinfo.chsw_info.ch_offset = *(pIE->data); ++ break; ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ ptdls_sta->ch_switch_time = (RTW_GET_LE16(pIE->data) >= CH_SWITCH_TIME * 1000) ? ++ RTW_GET_LE16(pIE->data) : CH_SWITCH_TIME * 1000; ++ ptdls_sta->ch_switch_timeout = (RTW_GET_LE16(pIE->data + 2) >= CH_SWITCH_TIMEOUT * 1000) ? ++ RTW_GET_LE16(pIE->data + 2) : CH_SWITCH_TIMEOUT * 1000; ++ DBG_871X("%s ch_switch_time:%d, ch_switch_timeout:%d\n" ++ , __FUNCTION__, RTW_GET_LE16(pIE->data), RTW_GET_LE16(pIE->data + 2)); ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ } ++ ++ /* Todo: check status */ ++ txmgmt.status_code = 0; ++ _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); ++ ++ ATOMIC_SET(&pchsw_info->chsw_on, _TRUE); ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_RESP); ++ ++ return _SUCCESS; ++} ++ ++sint On_TDLS_Ch_Switch_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 4; ++ u16 status_code, j, switch_time, switch_timeout; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ int ret = _SUCCESS; ++ ++ if (padapter->tdlsinfo.ch_switch_prohibited == _TRUE) ++ { DBG_871X("[TDLS] Ignore %s since ch_switch_prohibited = _TRUE\n", __FUNCTION__); ++ return _SUCCESS; ++ } ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ /* If we receive Unsolicited TDLS Channel Switch Response when channel switch is running, */ ++ /* we will go back to base channel and terminate this channel switch procedure */ ++ if (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) { ++ if (pmlmeext->cur_channel != rtw_get_oper_ch(padapter)) { ++ DBG_871X("receive unsolicited channel switch response \n"); ++ rtw_tdls_cmd(padapter, NULL, TDLS_CH_SW_BACK); ++ goto exit; ++ } ++ } ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ _rtw_memcpy(&status_code, ptr+2, 2); ++ ++ if (status_code != 0) { ++ DBG_871X("[%s] status_code:%d\n", __FUNCTION__, status_code); ++ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE); ++ ATOMIC_SET(&pchsw_info->chsw_on, _FALSE); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ /* Parsing information element */ ++ for (j = FIXED_IE; j < parsing_length;) { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j); ++ ++ switch (pIE->ElementID) { ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ _rtw_memcpy(&switch_time, pIE->data, 2); ++ if (switch_time > ptdls_sta->ch_switch_time) ++ _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); ++ ++ _rtw_memcpy(&switch_timeout, pIE->data + 2, 2); ++ if (switch_timeout > ptdls_sta->ch_switch_timeout) ++ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ } ++ ++ if ((pmlmeext->cur_channel == rtw_get_oper_ch(padapter)) && ++ (pchsw_info->ch_sw_state & TDLS_WAIT_CH_RSP_STATE)) { ++ ATOMIC_SET(&pchsw_info->chsw_on, _TRUE); ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW); ++ } ++ ++exit: ++ return ret; ++} ++#endif /* CONFIG_TDLS_CH_SW */ ++ ++#ifdef CONFIG_WFD ++void wfd_ie_tdls(_adapter * padapter, u8 *pframe, u32 *pktlen ) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info *pwfd_info = padapter->tdlsinfo.wfd_info; ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 wfdielen = 0; ++ ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ return; ++ ++ /* WFD OUI */ ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; /* WFA WFD v1.0 */ ++ ++ /* ++ * Commented by Albert 20110825 ++ * According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ * 1. WFD Device Information ++ * 2. Associated BSSID ( Optional ) ++ * 3. Local IP Adress ( Optional ) ++ */ ++ ++ /* WFD Device Information ATTR */ ++ /* Type: */ ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ /* Length: */ ++ /* Note: In the WFD specification, the size of length field is 2. */ ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ /* Value1: */ ++ /* WFD device information */ ++ /* available for WFD session + Preferred TDLS + WSD ( WFD Service Discovery ) */ ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL ++ | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_WSD); ++ wfdielen += 2; ++ ++ /* Value2: */ ++ /* Session Management Control Port */ ++ /* Default TCP port for RTSP messages is 554 */ + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->tdls_rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate( pmlmepriv, _FW_LINKED) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ /* Local IP Address ATTR */ -+ wfdie[ wfdielen++ ] = WFD_ATTR_LOCAL_IP_ADDR; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0005); -+ wfdielen += 2; -+ -+ /* Version: */ -+ /* 0x01: Version1;IPv4 */ -+ wfdie[ wfdielen++ ] = 0x01; -+ -+ /* IPv4 Address */ -+ _rtw_memcpy( wfdie + wfdielen, pwfd_info->ip_address, 4 ); -+ wfdielen += 4; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, pktlen); -+ -+} -+#endif /* CONFIG_WFD */ -+ -+void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); -+ -+ int i = 0 ; -+ u32 time; -+ u8 *pframe_head; -+ -+ /* SNonce */ -+ if (pattrib->encrypt) { -+ for (i=0;i<8;i++) { -+ time=rtw_get_current_time(); -+ _rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4); -+ } -+ } -+ -+ pframe_head = pframe; /* For rtw_tdls_set_ht_cap() */ -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib); -+ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); -+ -+ if (pattrib->encrypt) -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ -+ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); -+ -+ if (pattrib->encrypt) { -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , NULL -+ , ptdls_sta->SNonce); -+ -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ } -+ -+#ifdef CONFIG_80211N_HT -+ /* Sup_reg_classes(optional) */ -+ if (pregistrypriv->ht_enable == _TRUE) -+ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); -+#endif -+ -+ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); -+ -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+ -+ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) -+ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); -+ -+#ifdef CONFIG_80211AC_VHT -+ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pregistrypriv->vht_enable != 0) && (pmlmeext->cur_channel > 14) -+ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) -+ ) { -+ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); -+ } -+#endif -+ -+#ifdef CONFIG_WFD -+ if (padapter->wdinfo.wfd_tdls_enable == 1) -+ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); -+#endif -+ -+} -+ -+void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *ptdls_sta; -+ u8 k; /* for random ANonce */ -+ u8 *pftie=NULL, *ptimeout_ie = NULL, *plinkid_ie = NULL, *prsnie = NULL, *pftie_mic = NULL; -+ u32 time; -+ u8 *pframe_head; -+ -+ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); -+ -+ if (ptdls_sta == NULL) -+ DBG_871X("[%s] %d ptdls_sta is NULL\n", __FUNCTION__, __LINE__); -+ -+ if (pattrib->encrypt && ptdls_sta != NULL) { -+ for (k=0;k<8;k++) { -+ time = rtw_get_current_time(); -+ _rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4); -+ } -+ } -+ -+ pframe_head = pframe; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ -+ if (ptxmgmt->status_code != 0) { -+ DBG_871X("[%s] status_code:%04x \n", __FUNCTION__, ptxmgmt->status_code); -+ return; -+ } -+ -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib); -+ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); -+ -+ if (pattrib->encrypt) { -+ prsnie = pframe; -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); -+ } -+ -+ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); -+ -+ if (pattrib->encrypt) { -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ wpa_tdls_generate_tpk(padapter, ptdls_sta); -+ -+ pftie = pframe; -+ pftie_mic = pframe+4; -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , ptdls_sta->ANonce -+ , ptdls_sta->SNonce); -+ -+ ptimeout_ie = pframe; -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); -+ } -+ -+#ifdef CONFIG_80211N_HT -+ /* Sup_reg_classes(optional) */ -+ if (pregistrypriv->ht_enable == _TRUE) -+ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); -+#endif -+ -+ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); -+ -+ plinkid_ie = pframe; -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); -+ -+ /* Fill FTIE mic */ -+ if (pattrib->encrypt && rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); -+ -+ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) -+ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); -+ -+#ifdef CONFIG_80211AC_VHT -+ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pregistrypriv->vht_enable != 0) && (pmlmeext->cur_channel > 14) -+ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) -+ ) { -+ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); -+ } -+#endif -+ -+#ifdef CONFIG_WFD -+ if (padapter->wdinfo.wfd_tdls_enable) -+ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); -+#endif -+ -+} -+ -+void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); -+ -+ unsigned int ie_len; -+ unsigned char *p; -+ u8 wmm_param_ele[24] = {0}; -+ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ if (ptxmgmt->status_code!=0) -+ return; -+ -+ if (pattrib->encrypt) { -+ prsnie = pframe; -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ } -+ -+ if (pattrib->encrypt) { -+ pftie = pframe; -+ pftie_mic = pframe+4; -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , ptdls_sta->ANonce -+ , ptdls_sta->SNonce); -+ -+ ptimeout_ie = pframe; -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ /* Start TPK timer */ -+ ptdls_sta->TPK_count=0; -+ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); -+ } -+ } -+ -+ /* HT operation; todo */ -+ -+ plinkid_ie = pframe; -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+ -+ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) -+ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); -+ -+ if (ptdls_sta->qos_option == _TRUE) -+ pframe = rtw_tdls_set_wmm_params(padapter, pframe, pattrib); -+ -+#ifdef CONFIG_80211AC_VHT -+ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pregistrypriv->vht_enable == _TRUE) -+ && (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14) -+ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) -+ ) { -+ pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel); -+ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); -+ } -+#endif -+} -+ -+void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); -+ u8 *pftie = NULL, *pftie_mic = NULL, *plinkid_ie = NULL; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ -+ if (pattrib->encrypt) { -+ pftie = pframe; -+ pftie_mic = pframe + 4; -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , ptdls_sta->ANonce -+ , ptdls_sta->SNonce); -+ } -+ -+ plinkid_ie = pframe; -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+ -+ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) -+ wpa_tdls_teardown_ftie_mic(ptdls_sta->tpk.kck, plinkid_ie, ptxmgmt->status_code, 1, 4, pftie, pftie_mic); -+} -+ -+void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+ -+} -+ -+void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 *pframe_head, pktlen_index; -+ -+ pktlen_index = pattrib->pktlen; -+ pframe_head = pframe; -+ -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_PUBLIC); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); -+ -+ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); -+ -+ pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); -+ -+ if (privacy) -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, NULL); -+ -+ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); -+ -+ if (privacy) { -+ pframe = rtw_tdls_set_ftie(ptxmgmt, pframe, pattrib, NULL, NULL); -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, NULL); -+ } -+ -+#ifdef CONFIG_80211N_HT -+ if (pregistrypriv->ht_enable == _TRUE) -+ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head - pktlen_index, pattrib); -+#endif -+ -+ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); -+ -+} -+ -+ -+void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 AC_queue=0; -+ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+ -+ /* PTI control */ -+ /* PU buffer status */ -+ if (ptdls_sta->uapsd_bk & BIT(1)) -+ AC_queue=BIT(0); -+ if (ptdls_sta->uapsd_be & BIT(1)) -+ AC_queue=BIT(1); -+ if (ptdls_sta->uapsd_vi & BIT(1)) -+ AC_queue=BIT(2); -+ if (ptdls_sta->uapsd_vo & BIT(1)) -+ AC_queue=BIT(3); -+ pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); -+ -+} -+ -+void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); -+ u16 switch_time= CH_SWITCH_TIME * 1000, switch_timeout=CH_SWITCH_TIMEOUT * 1000; -+ -+ ptdls_sta->ch_switch_time=switch_time; -+ ptdls_sta->ch_switch_timeout=switch_timeout; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_target_ch(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_reg_class(pframe, pattrib, ptdls_sta); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+ -+ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); -+ -+} -+ -+void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); -+ -+ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); -+} -+#endif -+ -+#ifdef CONFIG_WFD -+void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; -+ u8 category = RTW_WLAN_CATEGORY_P2P; -+ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; -+ u8 probe_req = 4; -+ u8 wfdielen = 0; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_req), &(pattrib->pktlen)); -+ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+ } else if (!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { -+ wfdielen = build_probe_req_wfd_ie(pbuddy_wdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+ } -+ -+} -+ -+void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; -+ u8 category = RTW_WLAN_CATEGORY_P2P; -+ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; -+ u8 probe_rsp = 5; -+ u8 wfdielen = 0; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_rsp), &(pattrib->pktlen)); -+ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 1); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+ } else if (!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { -+ wfdielen = build_probe_resp_wfd_ie(pbuddy_wdinfo, pframe, 1); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+ } -+ -+} -+#endif /* CONFIG_WFD */ -+ -+void _tdls_tpk_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ struct tdls_txmgmt txmgmt; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ ptdls_sta->TPK_count++; -+ /* TPK_timer expired in a second */ -+ /* Retry timer should set at least 301 sec. */ -+ if (ptdls_sta->TPK_count >= ptdls_sta->TDLS_PeerKey_Lifetime) { -+ DBG_871X("[TDLS] %s, Re-Setup TDLS link with "MAC_FMT" since TPK lifetime expires!\n", __FUNCTION__, MAC_ARG(ptdls_sta->hwaddr)); -+ ptdls_sta->TPK_count=0; -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); -+ issue_tdls_setup_req(ptdls_sta->padapter, &txmgmt, _FALSE); -+ } -+ -+ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+void _tdls_ch_switch_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ -+ //DBG_871X("%s %d, tdls_sta_state:0x%08x\n", __FUNCTION__, __LINE__, ptdls_sta->tdls_sta_state); -+ -+ if (padapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(padapter)) { -+ if (!(pchsw_info->ch_sw_state & TDLS_PEER_AT_OFF_STATE)) { -+ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_BACK); -+ ATOMIC_SET(&pchsw_info->chsw_on, _FALSE); -+ DBG_871X("[TDLS] %s, can't get traffic from op_ch:%d\n", __FUNCTION__, rtw_get_oper_ch(padapter)); -+ } else { -+ //DBG_871X("%s %d\n", __FUNCTION__, __LINE__); -+ //_set_timer(&ptdls_sta->delay_timer, padapter->mlmeextpriv.mlmext_info.bcn_interval - 5 - ptdls_sta->ch_switch_timeout/1000); -+ } -+ } else { -+ //DBG_871X("%s %d, op_ch:%d, tdls_state:0x%08x\n", __FUNCTION__, __LINE__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); -+ } -+ -+#if 0 -+ if (!(pchsw_info->ch_sw_state & TDLS_PEER_AT_OFF_STATE)) { -+ //SelectChannel(padapter, padapter->mlmeextpriv.cur_channel); -+ ATOMIC_SET(&pchsw_info->chsw_on, _FALSE); -+ DBG_871X("%s %d, op_ch:%d, tdls_state:0x%08x\n", __FUNCTION__, __LINE__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); -+ } -+ -+ if (pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE) { -+ if (padapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(padapter)) { -+ DBG_871X("%s %d\n", __FUNCTION__, __LINE__); -+ _set_timer(&ptdls_sta->delay_timer, padapter->mlmeextpriv.mlmext_info.bcn_interval - 5 - ptdls_sta->ch_switch_timeout/1000); -+ //_set_timer(&ptdls_sta->delay_timer, 1000); -+ } else { -+ DBG_871X("%s %d\n", __FUNCTION__, __LINE__); -+ issue_tdls_ch_switch_req(padapter, ptdls_sta); -+ //_set_timer(&ptdls_sta->delay_timer, 500); -+ } -+ } -+#endif -+} -+ -+void _tdls_delay_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ -+ DBG_871X("[TDLS] %s, op_ch:%d, tdls_state:0x%08x\n", __FUNCTION__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); -+ pchsw_info->delay_switch_back = _TRUE; -+} -+#endif -+ -+void _tdls_handshake_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_txmgmt txmgmt; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); -+ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; -+ -+ if (ptdls_sta != NULL) { -+ DBG_871X("[TDLS] Handshake time out\n"); -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) -+ { -+ issue_tdls_teardown(padapter, &txmgmt, _TRUE); -+ } -+ else -+ { -+ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_TEAR_STA); -+ } -+ } -+} -+ -+void _tdls_pti_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_txmgmt txmgmt; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); -+ txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; -+ -+ if (ptdls_sta != NULL) { -+ if (ptdls_sta->tdls_sta_state & TDLS_WAIT_PTR_STATE) { -+ DBG_871X("[TDLS] Doesn't receive PTR from peer dev:"MAC_FMT"; " -+ "Send TDLS Tear Down\n", MAC_ARG(ptdls_sta->hwaddr)); -+ issue_tdls_teardown(padapter, &txmgmt, _FALSE); -+ } -+ } -+} -+ -+void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta) -+{ -+ psta->padapter=padapter; -+ _init_timer(&psta->TPK_timer, padapter->pnetdev, _tdls_tpk_timer_hdl, psta); -+#ifdef CONFIG_TDLS_CH_SW -+ _init_timer(&psta->ch_sw_timer, padapter->pnetdev, _tdls_ch_switch_timer_hdl, psta); -+ _init_timer(&psta->delay_timer, padapter->pnetdev, _tdls_delay_timer_hdl, psta); -+#endif -+ _init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta); -+ _init_timer(&psta->pti_timer, padapter->pnetdev, _tdls_pti_timer_hdl, psta); -+} -+ -+void rtw_free_tdls_timer(struct sta_info *psta) -+{ -+ _cancel_timer_ex(&psta->TPK_timer); -+#ifdef CONFIG_TDLS_CH_SW -+ _cancel_timer_ex(&psta->ch_sw_timer); -+ _cancel_timer_ex(&psta->delay_timer); -+#endif -+ _cancel_timer_ex(&psta->handshake_timer); -+ _cancel_timer_ex(&psta->pti_timer); -+} -+ -+u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta) -+{ -+ return query_ra_short_GI(psta); -+} -+ -+u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta) -+{ -+ unsigned char sta_band = 0; -+ unsigned int tx_ra_bitmap=0; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ -+ rtw_hal_update_sta_rate_mask(padapter, psta); -+ tx_ra_bitmap = psta->ra_mask; -+ -+ if (pcur_network->Configuration.DSConfig > 14) { -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_5N | WIRELESS_11A; -+ else -+ sta_band |= WIRELESS_11A; -+ } else { -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; -+ else if (tx_ra_bitmap & 0xff0) -+ sta_band |= WIRELESS_11G |WIRELESS_11B; -+ else -+ sta_band |= WIRELESS_11B; -+ } -+ -+ psta->wireless_mode = sta_band; -+ -+ psta->raid = rtw_hal_networktype_to_raid(padapter,psta); -+ tx_ra_bitmap |= ((psta->raid<<28)&0xf0000000); -+ return tx_ra_bitmap; -+} -+ -+int rtw_tdls_is_driver_setup(_adapter *padapter) -+{ -+ return padapter->tdlsinfo.driver_setup; -+} -+ -+const char * rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action) -+{ -+ switch (action) { -+ case TDLS_SETUP_REQUEST: -+ return "TDLS_SETUP_REQUEST"; -+ case TDLS_SETUP_RESPONSE: -+ return "TDLS_SETUP_RESPONSE"; -+ case TDLS_SETUP_CONFIRM: -+ return "TDLS_SETUP_CONFIRM"; -+ case TDLS_TEARDOWN: -+ return "TDLS_TEARDOWN"; -+ case TDLS_PEER_TRAFFIC_INDICATION: -+ return "TDLS_PEER_TRAFFIC_INDICATION"; -+ case TDLS_CHANNEL_SWITCH_REQUEST: -+ return "TDLS_CHANNEL_SWITCH_REQUEST"; -+ case TDLS_CHANNEL_SWITCH_RESPONSE: -+ return "TDLS_CHANNEL_SWITCH_RESPONSE"; -+ case TDLS_PEER_PSM_REQUEST: -+ return "TDLS_PEER_PSM_REQUEST"; -+ case TDLS_PEER_PSM_RESPONSE: -+ return "TDLS_PEER_PSM_RESPONSE"; -+ case TDLS_PEER_TRAFFIC_RESPONSE: -+ return "TDLS_PEER_TRAFFIC_RESPONSE"; -+ case TDLS_DISCOVERY_REQUEST: -+ return "TDLS_DISCOVERY_REQUEST"; -+ case TDLS_DISCOVERY_RESPONSE: -+ return "TDLS_DISCOVERY_RESPONSE"; -+ default: -+ return "UNKNOWN"; -+ } -+} -+ -+#endif /* CONFIG_TDLS */ ++ wfdielen += 2; ++ ++ /* Value3: */ ++ /* WFD Device Maximum Throughput */ ++ /* 300Mbps is the maximum throughput */ ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ /* Associated BSSID ATTR */ ++ /* Type: */ ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ /* Length: */ ++ /* Note: In the WFD specification, the size of length field is 2. */ ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ /* Value: */ ++ /* Associated BSSID */ ++ if (check_fwstate( pmlmepriv, _FW_LINKED) == _TRUE) ++ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN); ++ else ++ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); ++ ++ /* Local IP Address ATTR */ ++ wfdie[ wfdielen++ ] = WFD_ATTR_LOCAL_IP_ADDR; ++ ++ /* Length: */ ++ /* Note: In the WFD specification, the size of length field is 2. */ ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0005); ++ wfdielen += 2; ++ ++ /* Version: */ ++ /* 0x01: Version1;IPv4 */ ++ wfdie[ wfdielen++ ] = 0x01; ++ ++ /* IPv4 Address */ ++ _rtw_memcpy( wfdie + wfdielen, pwfd_info->ip_address, 4 ); ++ wfdielen += 4; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, pktlen); ++ ++} ++#endif /* CONFIG_WFD */ ++ ++void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ int i = 0 ; ++ u32 time; ++ u8 *pframe_head; ++ ++ /* SNonce */ ++ if (pattrib->encrypt) { ++ for (i=0;i<8;i++) { ++ time=rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4); ++ } ++ } ++ ++ pframe_head = pframe; /* For rtw_tdls_set_ht_cap() */ ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib); ++ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); ++ ++ if (pattrib->encrypt) ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ ++ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); ++ ++ if (pattrib->encrypt) { ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , NULL ++ , ptdls_sta->SNonce); ++ ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ /* Sup_reg_classes(optional) */ ++ if (pregistrypriv->ht_enable == _TRUE) ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); ++#endif ++ ++ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); ++ ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) ++ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); ++ ++#ifdef CONFIG_80211AC_VHT ++ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pregistrypriv->vht_enable != 0) && (pmlmeext->cur_channel > 14) ++ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) ++ ) { ++ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); ++ } ++#endif ++ ++#ifdef CONFIG_WFD ++ if (padapter->wdinfo.wfd_tdls_enable == 1) ++ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); ++#endif ++ ++} ++ ++void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta; ++ u8 k; /* for random ANonce */ ++ u8 *pftie=NULL, *ptimeout_ie = NULL, *plinkid_ie = NULL, *prsnie = NULL, *pftie_mic = NULL; ++ u32 time; ++ u8 *pframe_head; ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ ++ if (ptdls_sta == NULL) ++ DBG_871X("[%s] %d ptdls_sta is NULL\n", __FUNCTION__, __LINE__); ++ ++ if (pattrib->encrypt && ptdls_sta != NULL) { ++ for (k=0;k<8;k++) { ++ time = rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4); ++ } ++ } ++ ++ pframe_head = pframe; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ ++ if (ptxmgmt->status_code != 0) { ++ DBG_871X("[%s] status_code:%04x \n", __FUNCTION__, ptxmgmt->status_code); ++ return; ++ } ++ ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib); ++ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); ++ ++ if (pattrib->encrypt) { ++ prsnie = pframe; ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); ++ } ++ ++ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); ++ ++ if (pattrib->encrypt) { ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ wpa_tdls_generate_tpk(padapter, ptdls_sta); ++ ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , ptdls_sta->ANonce ++ , ptdls_sta->SNonce); ++ ++ ptimeout_ie = pframe; ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ /* Sup_reg_classes(optional) */ ++ if (pregistrypriv->ht_enable == _TRUE) ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); ++#endif ++ ++ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); ++ ++ plinkid_ie = pframe; ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ ++ /* Fill FTIE mic */ ++ if (pattrib->encrypt && rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) ++ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); ++ ++#ifdef CONFIG_80211AC_VHT ++ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pregistrypriv->vht_enable != 0) && (pmlmeext->cur_channel > 14) ++ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) ++ ) { ++ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); ++ } ++#endif ++ ++#ifdef CONFIG_WFD ++ if (padapter->wdinfo.wfd_tdls_enable) ++ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); ++#endif ++ ++} ++ ++void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ unsigned int ie_len; ++ unsigned char *p; ++ u8 wmm_param_ele[24] = {0}; ++ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ if (ptxmgmt->status_code!=0) ++ return; ++ ++ if (pattrib->encrypt) { ++ prsnie = pframe; ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ } ++ ++ if (pattrib->encrypt) { ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , ptdls_sta->ANonce ++ , ptdls_sta->SNonce); ++ ++ ptimeout_ie = pframe; ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ /* Start TPK timer */ ++ ptdls_sta->TPK_count=0; ++ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); ++ } ++ } ++ ++ /* HT operation; todo */ ++ ++ plinkid_ie = pframe; ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++ if (ptdls_sta->qos_option == _TRUE) ++ pframe = rtw_tdls_set_wmm_params(padapter, pframe, pattrib); ++ ++#ifdef CONFIG_80211AC_VHT ++ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pregistrypriv->vht_enable == _TRUE) ++ && (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14) ++ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) ++ ) { ++ pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel); ++ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); ++ } ++#endif ++} ++ ++void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ u8 *pftie = NULL, *pftie_mic = NULL, *plinkid_ie = NULL; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ ++ if (pattrib->encrypt) { ++ pftie = pframe; ++ pftie_mic = pframe + 4; ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , ptdls_sta->ANonce ++ , ptdls_sta->SNonce); ++ } ++ ++ plinkid_ie = pframe; ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) ++ wpa_tdls_teardown_ftie_mic(ptdls_sta->tpk.kck, plinkid_ie, ptxmgmt->status_code, 1, 4, pftie, pftie_mic); ++} ++ ++void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++} ++ ++void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 *pframe_head, pktlen_index; ++ ++ pktlen_index = pattrib->pktlen; ++ pframe_head = pframe; ++ ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_PUBLIC); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); ++ ++ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); ++ ++ pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); ++ ++ if (privacy) ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, NULL); ++ ++ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); ++ ++ if (privacy) { ++ pframe = rtw_tdls_set_ftie(ptxmgmt, pframe, pattrib, NULL, NULL); ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, NULL); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ if (pregistrypriv->ht_enable == _TRUE) ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head - pktlen_index, pattrib); ++#endif ++ ++ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ ++} ++ ++ ++void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 AC_queue=0; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ /* PTI control */ ++ /* PU buffer status */ ++ if (ptdls_sta->uapsd_bk & BIT(1)) ++ AC_queue=BIT(0); ++ if (ptdls_sta->uapsd_be & BIT(1)) ++ AC_queue=BIT(1); ++ if (ptdls_sta->uapsd_vi & BIT(1)) ++ AC_queue=BIT(2); ++ if (ptdls_sta->uapsd_vo & BIT(1)) ++ AC_queue=BIT(3); ++ pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ u16 switch_time= CH_SWITCH_TIME * 1000, switch_timeout=CH_SWITCH_TIMEOUT * 1000; ++ ++ ptdls_sta->ch_switch_time=switch_time; ++ ptdls_sta->ch_switch_timeout=switch_timeout; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_target_ch(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_reg_class(pframe, pattrib, ptdls_sta); ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); ++ ++} ++ ++void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); ++} ++#endif ++ ++#ifdef CONFIG_WFD ++void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; ++ u8 category = RTW_WLAN_CATEGORY_P2P; ++ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; ++ u8 probe_req = 4; ++ u8 wfdielen = 0; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_req), &(pattrib->pktlen)); ++ ++ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } else if (!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_req_wfd_ie(pbuddy_wdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ ++} ++ ++void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; ++ u8 category = RTW_WLAN_CATEGORY_P2P; ++ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; ++ u8 probe_rsp = 5; ++ u8 wfdielen = 0; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_rsp), &(pattrib->pktlen)); ++ ++ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 1); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } else if (!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_resp_wfd_ie(pbuddy_wdinfo, pframe, 1); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ ++} ++#endif /* CONFIG_WFD */ ++ ++void _tdls_tpk_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ struct tdls_txmgmt txmgmt; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ ptdls_sta->TPK_count++; ++ /* TPK_timer expired in a second */ ++ /* Retry timer should set at least 301 sec. */ ++ if (ptdls_sta->TPK_count >= ptdls_sta->TDLS_PeerKey_Lifetime) { ++ DBG_871X("[TDLS] %s, Re-Setup TDLS link with "MAC_FMT" since TPK lifetime expires!\n", __FUNCTION__, MAC_ARG(ptdls_sta->hwaddr)); ++ ptdls_sta->TPK_count=0; ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ issue_tdls_setup_req(ptdls_sta->padapter, &txmgmt, _FALSE); ++ } ++ ++ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++void _tdls_ch_switch_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ ++ //DBG_871X("%s %d, tdls_sta_state:0x%08x\n", __FUNCTION__, __LINE__, ptdls_sta->tdls_sta_state); ++ ++ if (padapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(padapter)) { ++ if (!(pchsw_info->ch_sw_state & TDLS_PEER_AT_OFF_STATE)) { ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_BACK); ++ ATOMIC_SET(&pchsw_info->chsw_on, _FALSE); ++ DBG_871X("[TDLS] %s, can't get traffic from op_ch:%d\n", __FUNCTION__, rtw_get_oper_ch(padapter)); ++ } else { ++ //DBG_871X("%s %d\n", __FUNCTION__, __LINE__); ++ //_set_timer(&ptdls_sta->delay_timer, padapter->mlmeextpriv.mlmext_info.bcn_interval - 5 - ptdls_sta->ch_switch_timeout/1000); ++ } ++ } else { ++ //DBG_871X("%s %d, op_ch:%d, tdls_state:0x%08x\n", __FUNCTION__, __LINE__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); ++ } ++ ++#if 0 ++ if (!(pchsw_info->ch_sw_state & TDLS_PEER_AT_OFF_STATE)) { ++ //SelectChannel(padapter, padapter->mlmeextpriv.cur_channel); ++ ATOMIC_SET(&pchsw_info->chsw_on, _FALSE); ++ DBG_871X("%s %d, op_ch:%d, tdls_state:0x%08x\n", __FUNCTION__, __LINE__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); ++ } ++ ++ if (pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE) { ++ if (padapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(padapter)) { ++ DBG_871X("%s %d\n", __FUNCTION__, __LINE__); ++ _set_timer(&ptdls_sta->delay_timer, padapter->mlmeextpriv.mlmext_info.bcn_interval - 5 - ptdls_sta->ch_switch_timeout/1000); ++ //_set_timer(&ptdls_sta->delay_timer, 1000); ++ } else { ++ DBG_871X("%s %d\n", __FUNCTION__, __LINE__); ++ issue_tdls_ch_switch_req(padapter, ptdls_sta); ++ //_set_timer(&ptdls_sta->delay_timer, 500); ++ } ++ } ++#endif ++} ++ ++void _tdls_delay_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ ++ DBG_871X("[TDLS] %s, op_ch:%d, tdls_state:0x%08x\n", __FUNCTION__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); ++ pchsw_info->delay_switch_back = _TRUE; ++} ++#endif ++ ++void _tdls_handshake_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_txmgmt txmgmt; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; ++ ++ if (ptdls_sta != NULL) { ++ DBG_871X("[TDLS] Handshake time out\n"); ++ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ++ { ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); ++ } ++ else ++ { ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_TEAR_STA); ++ } ++ } ++} ++ ++void _tdls_pti_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_txmgmt txmgmt; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; ++ ++ if (ptdls_sta != NULL) { ++ if (ptdls_sta->tdls_sta_state & TDLS_WAIT_PTR_STATE) { ++ DBG_871X("[TDLS] Doesn't receive PTR from peer dev:"MAC_FMT"; " ++ "Send TDLS Tear Down\n", MAC_ARG(ptdls_sta->hwaddr)); ++ issue_tdls_teardown(padapter, &txmgmt, _FALSE); ++ } ++ } ++} ++ ++void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->TPK_timer, padapter->pnetdev, _tdls_tpk_timer_hdl, psta); ++#ifdef CONFIG_TDLS_CH_SW ++ _init_timer(&psta->ch_sw_timer, padapter->pnetdev, _tdls_ch_switch_timer_hdl, psta); ++ _init_timer(&psta->delay_timer, padapter->pnetdev, _tdls_delay_timer_hdl, psta); ++#endif ++ _init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta); ++ _init_timer(&psta->pti_timer, padapter->pnetdev, _tdls_pti_timer_hdl, psta); ++} ++ ++void rtw_free_tdls_timer(struct sta_info *psta) ++{ ++ _cancel_timer_ex(&psta->TPK_timer); ++#ifdef CONFIG_TDLS_CH_SW ++ _cancel_timer_ex(&psta->ch_sw_timer); ++ _cancel_timer_ex(&psta->delay_timer); ++#endif ++ _cancel_timer_ex(&psta->handshake_timer); ++ _cancel_timer_ex(&psta->pti_timer); ++} ++ ++u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta) ++{ ++ return query_ra_short_GI(psta); ++} ++ ++u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta) ++{ ++ unsigned char sta_band = 0; ++ unsigned int tx_ra_bitmap=0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++ rtw_hal_update_sta_rate_mask(padapter, psta); ++ tx_ra_bitmap = psta->ra_mask; ++ ++ if (pcur_network->Configuration.DSConfig > 14) { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N | WIRELESS_11A; ++ else ++ sta_band |= WIRELESS_11A; ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; ++ else if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G |WIRELESS_11B; ++ else ++ sta_band |= WIRELESS_11B; ++ } ++ ++ psta->wireless_mode = sta_band; ++ ++ psta->raid = rtw_hal_networktype_to_raid(padapter,psta); ++ tx_ra_bitmap |= ((psta->raid<<28)&0xf0000000); ++ return tx_ra_bitmap; ++} ++ ++int rtw_tdls_is_driver_setup(_adapter *padapter) ++{ ++ return padapter->tdlsinfo.driver_setup; ++} ++ ++const char * rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action) ++{ ++ switch (action) { ++ case TDLS_SETUP_REQUEST: ++ return "TDLS_SETUP_REQUEST"; ++ case TDLS_SETUP_RESPONSE: ++ return "TDLS_SETUP_RESPONSE"; ++ case TDLS_SETUP_CONFIRM: ++ return "TDLS_SETUP_CONFIRM"; ++ case TDLS_TEARDOWN: ++ return "TDLS_TEARDOWN"; ++ case TDLS_PEER_TRAFFIC_INDICATION: ++ return "TDLS_PEER_TRAFFIC_INDICATION"; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ return "TDLS_CHANNEL_SWITCH_REQUEST"; ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ return "TDLS_CHANNEL_SWITCH_RESPONSE"; ++ case TDLS_PEER_PSM_REQUEST: ++ return "TDLS_PEER_PSM_REQUEST"; ++ case TDLS_PEER_PSM_RESPONSE: ++ return "TDLS_PEER_PSM_RESPONSE"; ++ case TDLS_PEER_TRAFFIC_RESPONSE: ++ return "TDLS_PEER_TRAFFIC_RESPONSE"; ++ case TDLS_DISCOVERY_REQUEST: ++ return "TDLS_DISCOVERY_REQUEST"; ++ case TDLS_DISCOVERY_RESPONSE: ++ return "TDLS_DISCOVERY_RESPONSE"; ++ default: ++ return "UNKNOWN"; ++ } ++} ++ ++#endif /* CONFIG_TDLS */ diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_vht.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_vht.c new file mode 100644 -index 000000000..0bdc2a38e +index 0000000..0bdc2a3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_vht.c @@ -0,0 +1,803 @@ @@ -79873,2268 +79890,2268 @@ index 000000000..0bdc2a38e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wapi.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wapi.c new file mode 100644 -index 000000000..cf4a995f8 +index 0000000..d4835da --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wapi.c @@ -0,0 +1,1326 @@ -+#ifdef CONFIG_WAPI_SUPPORT -+ -+#include -+#include -+#include -+#include -+ -+ -+u32 wapi_debug_component = -+// WAPI_INIT | -+// WAPI_API | -+// WAPI_TX | -+// WAPI_RX | -+ WAPI_ERR ; //always open err flags on -+ -+void WapiFreeAllStaInfo(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ PRT_WAPI_STA_INFO pWapiStaInfo; -+ PRT_WAPI_BKID pWapiBkid; -+ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ pWapiInfo = &padapter->wapiInfo; -+ -+ //Pust to Idle List -+ rtw_wapi_return_all_sta_info(padapter); -+ -+ //Sta Info List -+ while(!list_empty(&(pWapiInfo->wapiSTAIdleList))) -+ { -+ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); -+ list_del_init(&pWapiStaInfo->list); -+ } -+ -+ //BKID List -+ while(!list_empty(&(pWapiInfo->wapiBKIDIdleList))) -+ { -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ } -+ WAPI_TRACE(WAPI_INIT, "<=========== %s\n", __FUNCTION__); -+ return; -+} -+ -+void WapiSetIE(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ //PRT_WAPI_BKID pWapiBkid; -+ u16 protocolVer = 1; -+ u16 akmCnt = 1; -+ u16 suiteCnt = 1; -+ u16 capability = 0; -+ u8 OUI[3]; -+ -+ OUI[0] = 0x00; -+ OUI[1] = 0x14; -+ OUI[2] = 0x72; -+ -+ pWapiInfo->wapiIELength = 0; -+//protocol version -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &protocolVer, 2); -+ pWapiInfo->wapiIELength +=2; -+//akm -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &akmCnt, 2); -+ pWapiInfo->wapiIELength +=2; -+ -+ if(pWapiInfo->bWapiPSK){ -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); -+ pWapiInfo->wapiIELength +=3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x2; -+ pWapiInfo->wapiIELength +=1; -+ }else{ -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); -+ pWapiInfo->wapiIELength +=3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; -+ pWapiInfo->wapiIELength +=1; -+ } -+ -+//usk -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &suiteCnt, 2); -+ pWapiInfo->wapiIELength +=2; -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); -+ pWapiInfo->wapiIELength +=3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; -+ pWapiInfo->wapiIELength +=1; -+ -+//msk -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); -+ pWapiInfo->wapiIELength +=3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; -+ pWapiInfo->wapiIELength +=1; -+ -+//Capbility -+ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &capability, 2); -+ pWapiInfo->wapiIELength +=2; -+} -+ -+ -+/* PN1 > PN2, return 1, -+ * else return 0. -+ */ -+u32 WapiComparePN(u8 *PN1, u8 *PN2) -+{ -+ char i; -+ -+ if ((NULL == PN1) || (NULL == PN2)) -+ return 1; -+ -+ // overflow case -+ if ((PN2[15] - PN1[15]) & 0x80) -+ return 1; -+ -+ for (i=16; i>0; i--) -+ { -+ if(PN1[i-1] == PN2[i-1]) -+ continue; -+ else if(PN1[i-1] > PN2[i-1]) -+ return 1; -+ else -+ return 0; -+ } -+ -+ return 0; -+} -+ -+u8 -+WapiGetEntryForCamWrite(_adapter *padapter,u8 *pMacAddr,u8 KID,BOOLEAN IsMsk) -+{ -+ PRT_WAPI_T pWapiInfo=NULL; -+ //PRT_WAPI_CAM_ENTRY pEntry=NULL; -+ u8 i=0; -+ u8 ret = 0xff; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ //exist? -+ for(i=0;iwapiCamEntry[i].IsUsed -+ && (_rtw_memcmp(pMacAddr, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) -+ && pWapiInfo->wapiCamEntry[i].keyidx == KID -+ && pWapiInfo->wapiCamEntry[i].type == IsMsk) -+ { -+ ret = pWapiInfo->wapiCamEntry[i].entry_idx; //cover it -+ break; -+ } -+ } -+ -+ if(i == WAPI_CAM_ENTRY_NUM) //not found -+ { -+ for(i=0;iwapiCamEntry[i].IsUsed == 0) -+ { -+ pWapiInfo->wapiCamEntry[i].IsUsed = 1; -+ pWapiInfo->wapiCamEntry[i].type = IsMsk; -+ pWapiInfo->wapiCamEntry[i].keyidx = KID; -+ _rtw_memcpy(pWapiInfo->wapiCamEntry[i].PeerMacAddr, pMacAddr,ETH_ALEN); -+ ret = pWapiInfo->wapiCamEntry[i].entry_idx; -+ break; -+ } -+ } -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ return ret; -+ -+/* -+ if(RTIsListEmpty(&pWapiInfo->wapiCamIdleList)){ -+ RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); -+ return 0; -+ } -+ -+ pEntry = (PRT_WAPI_CAM_ENTRY)RTRemoveHeadList(&pWapiInfo->wapiCamIdleList); -+ RTInsertTailList(&pWapiInfo->wapiCamUsedList, &pEntry->list); -+ -+ RT_TRACE(COMP_SEC,DBG_LOUD,("<====WapiGetCamEntry(),Get Entry Idx:%d.but we just return 4 for test\n",pEntry->entry_idx)); -+ -+ return pEntry->entry_idx;*/ -+} -+ -+u8 WapiGetEntryForCamClear(_adapter *padapter,u8 *pPeerMac,u8 keyid,u8 IsMsk) -+{ -+ PRT_WAPI_T pWapiInfo=NULL; -+ u8 i=0; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ for(i=0;iwapiCamEntry[i].IsUsed -+ && (_rtw_memcmp(pPeerMac, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) -+ && pWapiInfo->wapiCamEntry[i].keyidx == keyid -+ && pWapiInfo->wapiCamEntry[i].type == IsMsk) -+ { -+ pWapiInfo->wapiCamEntry[i].IsUsed = 0; -+ pWapiInfo->wapiCamEntry[i].keyidx = 2; -+ _rtw_memset(pWapiInfo->wapiCamEntry[i].PeerMacAddr,0,ETH_ALEN); -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ return pWapiInfo->wapiCamEntry[i].entry_idx; -+ } -+ } -+ -+ WAPI_TRACE(WAPI_API,"<====WapiGetReturnCamEntry(), No this cam entry.\n"); -+ return 0xff; -+/* -+ if(RTIsListEmpty(&pWapiInfo->wapiCamUsedList)){ -+ RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); -+ return FALSE; -+ } -+ -+ pList = &pWapiInfo->wapiCamUsedList; -+ while(pList->Flink != &pWapiInfo->wapiCamUsedList) -+ { -+ pEntry = (PRT_WAPI_CAM_ENTRY)pList->Flink; -+ if(PlatformCompareMemory(pPeerMac,pEntry->PeerMacAddr, ETHER_ADDRLEN)== 0 -+ && keyid == pEntry->keyidx) -+ { -+ RTRemoveEntryList(pList); -+ RTInsertHeadList(&pWapiInfo->wapiCamIdleList, pList); -+ return pEntry->entry_idx; -+ } -+ pList = pList->Flink; -+ } -+ -+ return 0; -+*/ -+} -+ -+void -+WapiResetAllCamEntry(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ int i; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ for (i=0;iwapiCamEntry[i].PeerMacAddr, 0, ETH_ALEN); -+ pWapiInfo->wapiCamEntry[i].IsUsed = 0; -+ pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid -+ pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ -+ return; -+} -+ -+u8 WapiWriteOneCamEntry( -+ _adapter *padapter, -+ u8 *pMacAddr, -+ u8 KeyId, -+ u8 EntryId, -+ u8 EncAlg, -+ u8 bGroupKey, -+ u8 *pKey -+) -+{ -+ u8 retVal = 0; -+ u16 usConfig = 0; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if(EntryId >= 32) -+ { -+ WAPI_TRACE(WAPI_ERR, "<=== CamAddOneEntry(): ulKeyId exceed!\n"); -+ return retVal; -+ } -+ -+ usConfig=usConfig|(0x01<<15)|((u16)(EncAlg)<<2)|(KeyId); -+ -+ if(EncAlg == _SMS4_ ) -+ { -+ if(bGroupKey == 1) -+ usConfig |= (0x01<<6); -+ if((EntryId % 2)==1) // ==0 sec key; == 1mic key -+ usConfig |= (0x01<<5); -+ } -+ -+ write_cam(padapter, EntryId, usConfig, pMacAddr, pKey); -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ return 1; -+} -+ -+void rtw_wapi_init(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ int i; -+ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ RT_ASSERT_RET(padapter); -+ -+ if (!padapter->WapiSupport) -+ { -+ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ pWapiInfo = &padapter->wapiInfo; -+ pWapiInfo->bWapiEnable = false; -+ -+ //Init BKID List -+ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDIdleList); -+ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDStoreList); -+ for(i=0;iwapiBKID[i].list, &pWapiInfo->wapiBKIDIdleList); -+ } -+ -+ //Init STA List -+ INIT_LIST_HEAD(&pWapiInfo->wapiSTAIdleList); -+ INIT_LIST_HEAD(&pWapiInfo->wapiSTAUsedList); -+ for(i=0;iwapiSta[i].list, &pWapiInfo->wapiSTAIdleList); -+ } -+ -+ for (i=0;iwapiCamEntry[i].IsUsed = 0; -+ pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid -+ pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; -+ } -+ -+ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_free(_adapter *padapter) -+{ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ RT_ASSERT_RET(padapter); -+ -+ if (!padapter->WapiSupport) -+ { -+ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiFreeAllStaInfo(padapter); -+ -+ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_disable_tx(_adapter *padapter) -+{ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ RT_ASSERT_RET(padapter); -+ -+ if (!padapter->WapiSupport) -+ { -+ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ padapter->wapiInfo.wapiTxMsk.bTxEnable = false; -+ padapter->wapiInfo.wapiTxMsk.bSet = false; -+ -+ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); -+} -+ -+u8 rtw_wapi_is_wai_packet(_adapter* padapter,u8 *pkt_data) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 WaiPkt = 0, *pTaddr, bFind = false; -+ u8 Offset_TypeWAI = 0 ; // (mac header len + llc length) -+ -+ WAPI_TRACE(WAPI_TX|WAPI_RX, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return 0; -+ } -+ -+ Offset_TypeWAI = 24 + 6 ; -+ -+ //YJ,add,091103. Data frame may also have skb->data[30]=0x88 and skb->data[31]=0xb4. -+ if ((pkt_data[1]&0x40) !=0) -+ { -+ //DBG_871X("data is privacy \n"); -+ return 0; -+ } -+ -+ pTaddr = GetAddr2Ptr(pkt_data); -+ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ -+ bFind = false; -+ }else{ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ -+ if (_rtw_memcmp(pTaddr, pWapiSta->PeerMacAddr, 6) == _TRUE) { -+ bFind = true; -+ break; -+ } -+ } -+ } -+ -+ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s: bFind=%d pTaddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(pTaddr)); -+ -+ if (pkt_data[0] == WIFI_QOS_DATA_TYPE) -+ { -+ Offset_TypeWAI += 2; -+ } -+ -+ // 88b4? -+ if( (pkt_data[Offset_TypeWAI]==0x88) && (pkt_data[Offset_TypeWAI+1]==0xb4) ){ -+ WaiPkt = pkt_data[Offset_TypeWAI+5]; -+ -+ psecuritypriv->hw_decrypted = _TRUE; -+ }else{ -+ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): non wai packet\n",__FUNCTION__); -+ } -+ -+ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): Recvd WAI frame. IsWAIPkt(%d)\n",__FUNCTION__, WaiPkt); -+ -+ return WaiPkt; -+} -+ -+ -+void rtw_wapi_update_info(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ struct recv_frame_hdr *precv_hdr; -+ u8 *ptr; -+ u8 *pTA; -+ u8 *pRecvPN; -+ -+ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ precv_hdr = &precv_frame->u.hdr; -+ ptr = precv_hdr->rx_data; -+ -+ if (precv_hdr->attrib.qos == 1) -+ { -+ precv_hdr->UserPriority = GetTid(ptr); -+ } -+ else -+ { -+ precv_hdr->UserPriority = 0; -+ } -+ -+ pTA = GetAddr2Ptr(ptr); -+ _rtw_memcpy((u8 *)precv_hdr->WapiSrcAddr, pTA, 6); -+ pRecvPN = ptr + precv_hdr->attrib.hdrlen + 2; -+ _rtw_memcpy((u8 *)precv_hdr->WapiTempPN, pRecvPN, 16); -+ -+ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); -+} -+ -+/**************************************************************************** -+TRUE-----------------Drop -+FALSE---------------- handle -+add to support WAPI to N-mode -+*****************************************************************************/ -+u8 rtw_wapi_check_for_drop( -+ _adapter *padapter, -+ union recv_frame *precv_frame -+) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 *pLastRecvPN = NULL; -+ u8 bFind = false; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 bDrop = false; -+ struct recv_frame_hdr *precv_hdr = &precv_frame->u.hdr; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ int i; -+ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return false; -+ } -+ -+ if(precv_hdr->bIsWaiPacket !=0) -+ { -+ if(precv_hdr->bIsWaiPacket== 0x8) -+ { -+ -+ DBG_871X("rtw_wapi_check_for_drop: dump packet \n"); -+ for(i=0;i<50;i++) -+ { -+ DBG_871X("%02X ",ptr[i]); -+ if((i+1) %8 ==0) -+ DBG_871X("\n"); -+ } -+ DBG_871X("\n rtw_wapi_check_for_drop: dump packet \n"); -+ -+ for(i=0;i<16;i++) -+ { -+ if(ptr[i+27] !=0) -+ break; -+ } -+ -+ if(i== 16) -+ { -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: drop with zero BKID \n"); -+ return true; -+ } -+ else -+ { -+ return false; -+ } -+ } -+ else -+ return false; -+ } -+ -+ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ -+ bFind = false; -+ }else{ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (_rtw_memcmp(precv_hdr->WapiSrcAddr, pWapiSta->PeerMacAddr, ETH_ALEN) == _TRUE) { -+ bFind = true; -+ break; -+ } -+ } -+ } -+ WAPI_TRACE(WAPI_RX, "%s: bFind=%d prxb->WapiSrcAddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(precv_hdr->WapiSrcAddr)); -+ -+ if(bFind) -+ { -+ if(IS_MCAST(precv_hdr->attrib.ra)) -+ { -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: multicast case \n"); -+ pLastRecvPN = pWapiSta->lastRxMulticastPN; -+ } -+ else -+ { -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: unicast case \n"); -+ switch(precv_hdr->UserPriority) -+ { -+ case 0: -+ case 3: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNBEQueue; -+ break; -+ case 1: -+ case 2: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNBKQueue; -+ break; -+ case 4: -+ case 5: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNVIQueue; -+ break; -+ case 6: -+ case 7: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNVOQueue; -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR,"%s: Unknown TID \n",__FUNCTION__); -+ break; -+ } -+ } -+ -+ if(!WapiComparePN(precv_hdr->WapiTempPN,pLastRecvPN)) -+ { -+ WAPI_TRACE(WAPI_RX,"%s: Equal PN!!\n",__FUNCTION__); -+ if(IS_MCAST(precv_hdr->attrib.ra)) -+ _rtw_memcpy(pLastRecvPN,WapiAEMultiCastPNInitialValueSrc,16); -+ else -+ _rtw_memcpy(pLastRecvPN,WapiAEPNInitialValueSrc,16); -+ bDrop = true; -+ } -+ else -+ { -+ _rtw_memcpy(pLastRecvPN,precv_hdr->WapiTempPN,16); -+ } -+ } -+ -+ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); -+ return bDrop; -+} -+ -+void rtw_build_probe_resp_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 WapiIELength = 0; -+ -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiSetIE(padapter); -+ WapiIELength = pWapiInfo->wapiIELength; -+ pframe[0] = _WAPI_IE_; -+ pframe[1] = WapiIELength; -+ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); -+ pframe += WapiIELength+2; -+ pattrib->pktlen += WapiIELength+2; -+ -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_build_beacon_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 WapiIELength = 0; -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiSetIE(padapter); -+ WapiIELength = pWapiInfo->wapiIELength; -+ pframe[0] = _WAPI_IE_; -+ pframe[1] = WapiIELength; -+ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); -+ pframe += WapiIELength+2; -+ pattrib->pktlen += WapiIELength+2; -+ -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_build_assoc_req_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) -+{ -+ PRT_WAPI_BKID pWapiBKID; -+ u16 bkidNum; -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 WapiIELength = 0; -+ -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiSetIE(padapter); -+ WapiIELength = pWapiInfo->wapiIELength; -+ bkidNum = 0; -+ if(!list_empty(&(pWapiInfo->wapiBKIDStoreList))){ -+ list_for_each_entry(pWapiBKID, &pWapiInfo->wapiBKIDStoreList, list) { -+ bkidNum ++; -+ _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength+2, pWapiBKID->bkid,16); -+ WapiIELength += 16; -+ } -+ } -+ _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength, &bkidNum, 2); -+ WapiIELength += 2; -+ -+ pframe[0] = _WAPI_IE_; -+ pframe[1] = WapiIELength; -+ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); -+ pframe += WapiIELength+2; -+ pattrib->pktlen += WapiIELength+2; -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_on_assoc_ok(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ PRT_WAPI_STA_INFO pWapiSta; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ //u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ pWapiSta =(PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); -+ list_del_init(&pWapiSta->list); -+ list_add_tail(&pWapiSta->list, &pWapiInfo->wapiSTAUsedList); -+ _rtw_memcpy(pWapiSta->PeerMacAddr,padapter->mlmeextpriv.mlmext_info.network.MacAddress,6); -+ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPN, WapiAEPNInitialValueSrc, 16); -+ -+ //For chenk PN error with Qos Data after s3: add by ylb 20111114 -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); -+ -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+ -+void rtw_wapi_return_one_sta_info(_adapter *padapter, u8 *MacAddr) -+{ -+ PRT_WAPI_T pWapiInfo; -+ PRT_WAPI_STA_INFO pWapiStaInfo = NULL; -+ PRT_WAPI_BKID pWapiBkid = NULL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ WAPI_TRACE(WAPI_API, "==========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) -+ { -+ while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) -+ { -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ _rtw_memset(pWapiBkid->bkid,0,16); -+ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); -+ } -+ } -+ -+ -+ WAPI_TRACE(WAPI_API, " %s: after clear bkid \n", __FUNCTION__); -+ -+ -+ //Remove STA info -+ if(list_empty(&(pWapiInfo->wapiSTAUsedList))){ -+ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is null \n", __FUNCTION__); -+ return; -+ }else{ -+ -+ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is not null \n", __FUNCTION__); -+#if 0 -+ pWapiStaInfo=(PRT_WAPI_STA_INFO)list_entry((pWapiInfo->wapiSTAUsedList.next),RT_WAPI_STA_INFO,list); -+ -+ list_for_each_entry(pWapiStaInfo, &(pWapiInfo->wapiSTAUsedList), list) { -+ -+ DBG_871X("MAC Addr %02x-%02x-%02x-%02x-%02x-%02x \n",MacAddr[0],MacAddr[1],MacAddr[2],MacAddr[3],MacAddr[4],MacAddr[5]); -+ -+ -+ DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); -+ -+ if(pWapiStaInfo == NULL) -+ { -+ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo == NULL Case \n", __FUNCTION__); -+ return; -+ } -+ -+ if(pWapiStaInfo->PeerMacAddr == NULL) -+ { -+ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo->PeerMacAddr == NULL Case \n", __FUNCTION__); -+ return; -+ } -+ -+ if(MacAddr == NULL) -+ { -+ WAPI_TRACE(WAPI_API, " %s: MacAddr == NULL Case \n", __FUNCTION__); -+ return; -+ } -+ -+ if (_rtw_memcmp(pWapiStaInfo->PeerMacAddr, MacAddr, ETH_ALEN) == _TRUE) { -+ pWapiStaInfo->bAuthenticateInProgress = false; -+ pWapiStaInfo->bSetkeyOk = false; -+ _rtw_memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); -+ list_del_init(&pWapiStaInfo->list); -+ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); -+ break; -+ } -+ -+ } -+#endif -+ -+ while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) -+ { -+ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); -+ -+ DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); -+ -+ list_del_init(&pWapiStaInfo->list); -+ memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); -+ pWapiStaInfo->bSetkeyOk = 0; -+ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); -+ } -+ -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ return; -+} -+ -+void rtw_wapi_return_all_sta_info(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ PRT_WAPI_STA_INFO pWapiStaInfo; -+ PRT_WAPI_BKID pWapiBkid; -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ //Sta Info List -+ while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) -+ { -+ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); -+ list_del_init(&pWapiStaInfo->list); -+ memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); -+ pWapiStaInfo->bSetkeyOk = 0; -+ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); -+ } -+ -+ //BKID List -+ while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) -+ { -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ memset(pWapiBkid->bkid,0,16); -+ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); -+ } -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr) -+{ -+ u8 UcIndex = 0; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 0); -+ if(UcIndex != 0xff){ -+ //CAM_mark_invalid(Adapter, UcIndex); -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 0); -+ if(UcIndex != 0xff){ -+ //CAM_mark_invalid(Adapter, UcIndex); -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 1); -+ if(UcIndex != 0xff){ -+ //CAM_mark_invalid(Adapter, UcIndex); -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 1); -+ if(UcIndex != 0xff){ -+ //CAM_mark_invalid(padapter, UcIndex); -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_clear_all_cam_entry(_adapter *padapter) -+{ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ invalidate_cam_all(padapter); // is this ok? -+ WapiResetAllCamEntry(padapter); -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_set_key(_adapter *padapter, RT_WAPI_KEY *pWapiKey, RT_WAPI_STA_INFO *pWapiSta, u8 bGroupKey, u8 bUseDefaultKey) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ u8 *pMacAddr = pWapiSta->PeerMacAddr; -+ u32 EntryId = 0; -+ BOOLEAN IsPairWise = false ; -+ u8 EncAlgo; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_API, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ EncAlgo = _SMS4_; -+ -+ //For Tx bc/mc pkt,use defualt key entry -+ if(bUseDefaultKey) -+ { -+ // when WAPI update key, keyid will be 0 or 1 by turns. -+ if (pWapiKey->keyId == 0) -+ EntryId = 0; -+ else -+ EntryId = 2; -+ } -+ else -+ { -+ // tx/rx unicast pkt, or rx broadcast, find the key entry by peer's MacAddr -+ EntryId = WapiGetEntryForCamWrite(padapter,pMacAddr,pWapiKey->keyId,bGroupKey); -+ } -+ -+ if(EntryId == 0xff){ -+ WAPI_TRACE(WAPI_API, "===>No entry for WAPI setkey! !!\n"); -+ return; -+ } -+ -+ //EntryId is also used to diff Sec key and Mic key -+ //Sec Key -+ WapiWriteOneCamEntry(padapter, -+ pMacAddr, -+ pWapiKey->keyId, //keyid -+ EntryId, //entry -+ EncAlgo, //type -+ bGroupKey, //pairwise or group key -+ pWapiKey->dataKey); -+ //MIC key -+ WapiWriteOneCamEntry(padapter, -+ pMacAddr, -+ pWapiKey->keyId, //keyid -+ EntryId+1, //entry -+ EncAlgo, //type -+ bGroupKey, //pairwise or group key -+ pWapiKey->micKey); -+ -+ WAPI_TRACE(WAPI_API, "Set Wapi Key :KeyId:%d,EntryId:%d,PairwiseKey:%d.\n",pWapiKey->keyId,EntryId,!bGroupKey); -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+} -+ -+#if 0 -+//YJ,test,091013 -+void wapi_test_set_key(struct _adapter *padapter, u8* buf) -+{ /*Data: keyType(1) + bTxEnable(1) + bAuthenticator(1) + bUpdate(1) + PeerAddr(6) + DataKey(16) + MicKey(16) + KeyId(1)*/ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_BKID pWapiBkid; -+ PRT_WAPI_STA_INFO pWapiSta; -+ u8 data[43]; -+ bool bTxEnable; -+ bool bUpdate; -+ bool bAuthenticator; -+ u8 PeerAddr[6]; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ -+ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); -+ -+ if (!padapter->WapiSupport){ -+ return; -+ } -+ -+ copy_from_user(data, buf, 43); -+ bTxEnable = data[1]; -+ bAuthenticator = data[2]; -+ bUpdate = data[3]; -+ memcpy(PeerAddr,data+4,6); -+ -+ if(data[0] == 0x3){ -+ if(!list_empty(&(pWapiInfo->wapiBKIDIdleList))){ -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ memcpy(pWapiBkid->bkid, data+10, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - BKID", pWapiBkid->bkid, 16); -+ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDStoreList); -+ } -+ }else{ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if(!memcmp(pWapiSta->PeerMacAddr,PeerAddr,6)){ -+ pWapiSta->bAuthenticatorInUpdata = false; -+ switch(data[0]){ -+ case 1: //usk -+ if(bAuthenticator){ //authenticator -+ memcpy(pWapiSta->lastTxUnicastPN,WapiAEPNInitialValueSrc,16); -+ if(!bUpdate) { //first -+ WAPI_TRACE(WAPI_INIT,"AE fisrt set usk \n"); -+ pWapiSta->wapiUsk.bSet = true; -+ memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); -+ memcpy(pWapiSta->wapiUsk.micKey,data+26,16); -+ pWapiSta->wapiUsk.keyId = *(data+42); -+ pWapiSta->wapiUsk.bTxEnable = true; -+ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Data Key", pWapiSta->wapiUsk.dataKey, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Mic Key", pWapiSta->wapiUsk.micKey, 16); -+ } -+ else //update -+ { -+ WAPI_TRACE(WAPI_INIT, "AE update usk \n"); -+ pWapiSta->wapiUskUpdate.bSet = true; -+ pWapiSta->bAuthenticatorInUpdata = true; -+ memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); -+ memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); -+ memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); -+ pWapiSta->wapiUskUpdate.keyId = *(data+42); -+ pWapiSta->wapiUskUpdate.bTxEnable = true; -+ } -+ } -+ else{ -+ if(!bUpdate){ -+ WAPI_TRACE(WAPI_INIT,"ASUE fisrt set usk \n"); -+ if(bTxEnable){ -+ pWapiSta->wapiUsk.bTxEnable = true; -+ memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); -+ }else{ -+ pWapiSta->wapiUsk.bSet = true; -+ memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); -+ memcpy(pWapiSta->wapiUsk.micKey,data+26,16); -+ pWapiSta->wapiUsk.keyId = *(data+42); -+ pWapiSta->wapiUsk.bTxEnable = false; -+ } -+ }else{ -+ WAPI_TRACE(WAPI_INIT,"ASUE update usk \n"); -+ if(bTxEnable){ -+ pWapiSta->wapiUskUpdate.bTxEnable = true; -+ if(pWapiSta->wapiUskUpdate.bSet){ -+ memcpy(pWapiSta->wapiUsk.dataKey,pWapiSta->wapiUskUpdate.dataKey,16); -+ memcpy(pWapiSta->wapiUsk.micKey,pWapiSta->wapiUskUpdate.micKey,16); -+ pWapiSta->wapiUsk.keyId=pWapiSta->wapiUskUpdate.keyId; -+ memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); -+ memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); -+ pWapiSta->wapiUskUpdate.bTxEnable = false; -+ pWapiSta->wapiUskUpdate.bSet = false; -+ } -+ memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); -+ }else{ -+ pWapiSta->wapiUskUpdate.bSet = true; -+ memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); -+ memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); -+ pWapiSta->wapiUskUpdate.keyId = *(data+42); -+ pWapiSta->wapiUskUpdate.bTxEnable = false; -+ } -+ } -+ } -+ break; -+ case 2: //msk -+ if(bAuthenticator){ //authenticator -+ pWapiInfo->wapiTxMsk.bSet = true; -+ memcpy(pWapiInfo->wapiTxMsk.dataKey,data+10,16); -+ memcpy(pWapiInfo->wapiTxMsk.micKey,data+26,16); -+ pWapiInfo->wapiTxMsk.keyId = *(data+42); -+ pWapiInfo->wapiTxMsk.bTxEnable = true; -+ memcpy(pWapiInfo->lastTxMulticastPN,WapiAEMultiCastPNInitialValueSrc,16); -+ -+ if(!bUpdate){ //first -+ WAPI_TRACE(WAPI_INIT, "AE fisrt set msk \n"); -+ if(!pWapiSta->bSetkeyOk) -+ pWapiSta->bSetkeyOk = true; -+ pWapiInfo->bFirstAuthentiateInProgress= false; -+ }else{ //update -+ WAPI_TRACE(WAPI_INIT,"AE update msk \n"); -+ } -+ -+ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Data Key", pWapiInfo->wapiTxMsk.dataKey, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Mic Key", pWapiInfo->wapiTxMsk.micKey, 16); -+ } -+ else{ -+ if(!bUpdate){ -+ WAPI_TRACE(WAPI_INIT,"ASUE fisrt set msk \n"); -+ pWapiSta->wapiMsk.bSet = true; -+ memcpy(pWapiSta->wapiMsk.dataKey,data+10,16); -+ memcpy(pWapiSta->wapiMsk.micKey,data+26,16); -+ pWapiSta->wapiMsk.keyId = *(data+42); -+ pWapiSta->wapiMsk.bTxEnable = false; -+ if(!pWapiSta->bSetkeyOk) -+ pWapiSta->bSetkeyOk = true; -+ pWapiInfo->bFirstAuthentiateInProgress= false; -+ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Data Key", pWapiSta->wapiMsk.dataKey, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Mic Key", pWapiSta->wapiMsk.micKey, 16); -+ }else{ -+ WAPI_TRACE(WAPI_INIT,"ASUE update msk \n"); -+ pWapiSta->wapiMskUpdate.bSet = true; -+ memcpy(pWapiSta->wapiMskUpdate.dataKey,data+10,16); -+ memcpy(pWapiSta->wapiMskUpdate.micKey,data+26,16); -+ pWapiSta->wapiMskUpdate.keyId = *(data+42); -+ pWapiSta->wapiMskUpdate.bTxEnable = false; -+ } -+ } -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR,"Unknown Flag \n"); -+ break; -+ } -+ } -+ } -+ } -+ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); -+} -+ -+ -+void wapi_test_init(struct _adapter *padapter) -+{ -+ u8 keybuf[100]; -+ u8 mac_addr[6]={0x00,0xe0,0x4c,0x72,0x04,0x70}; -+ u8 UskDataKey[16]={0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f}; -+ u8 UskMicKey[16]={0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f}; -+ u8 UskId = 0; -+ u8 MskDataKey[16]={0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f}; -+ u8 MskMicKey[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f}; -+ u8 MskId = 0; -+ -+ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); -+ -+ //Enable Wapi -+ WAPI_TRACE(WAPI_INIT, "%s: Enable wapi!!!!\n", __FUNCTION__); -+ padapter->wapiInfo.bWapiEnable = true; -+ padapter->pairwise_key_type = KEY_TYPE_SMS4; -+ ieee->group_key_type = KEY_TYPE_SMS4; -+ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; -+ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; -+ -+ //set usk -+ WAPI_TRACE(WAPI_INIT, "%s: Set USK!!!!\n", __FUNCTION__); -+ memset(keybuf,0,100); -+ keybuf[0] = 1; //set usk -+ keybuf[1] = 1; //enable tx -+ keybuf[2] = 1; //AE -+ keybuf[3] = 0; //not update -+ -+ memcpy(keybuf+4,mac_addr,6); -+ memcpy(keybuf+10,UskDataKey,16); -+ memcpy(keybuf+26,UskMicKey,16); -+ keybuf[42]=UskId; -+ wapi_test_set_key(padapter, keybuf); -+ -+ memset(keybuf,0,100); -+ keybuf[0] = 1; //set usk -+ keybuf[1] = 1; //enable tx -+ keybuf[2] = 0; //AE -+ keybuf[3] = 0; //not update -+ -+ memcpy(keybuf+4,mac_addr,6); -+ memcpy(keybuf+10,UskDataKey,16); -+ memcpy(keybuf+26,UskMicKey,16); -+ keybuf[42]=UskId; -+ wapi_test_set_key(padapter, keybuf); -+ -+ //set msk -+ WAPI_TRACE(WAPI_INIT, "%s: Set MSK!!!!\n", __FUNCTION__); -+ memset(keybuf,0,100); -+ keybuf[0] = 2; //set msk -+ keybuf[1] = 1; //Enable TX -+ keybuf[2] = 1; //AE -+ keybuf[3] = 0; //not update -+ memcpy(keybuf+4,mac_addr,6); -+ memcpy(keybuf+10,MskDataKey,16); -+ memcpy(keybuf+26,MskMicKey,16); -+ keybuf[42] = MskId; -+ wapi_test_set_key(padapter, keybuf); -+ -+ memset(keybuf,0,100); -+ keybuf[0] = 2; //set msk -+ keybuf[1] = 1; //Enable TX -+ keybuf[2] = 0; //AE -+ keybuf[3] = 0; //not update -+ memcpy(keybuf+4,mac_addr,6); -+ memcpy(keybuf+10,MskDataKey,16); -+ memcpy(keybuf+26,MskMicKey,16); -+ keybuf[42] = MskId; -+ wapi_test_set_key(padapter, keybuf); -+ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); -+} -+#endif -+ -+void rtw_wapi_get_iv(_adapter *padapter,u8 *pRA, u8*IV) -+{ -+ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ bool bPNOverflow = false; -+ bool bFindMatchPeer = false; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ -+ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)IV; -+ -+ WAPI_DATA(WAPI_RX,"wapi_get_iv: pra",pRA,6); -+ -+ if(IS_MCAST(pRA)){ -+ if(!pWapiInfo->wapiTxMsk.bTxEnable){ -+ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); -+ return; -+ } -+ -+ if(pWapiInfo->wapiTxMsk.keyId <= 1){ -+ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); -+ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); -+ } -+ } -+ else -+ { -+ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_get_iv: list is empty \n"); -+ _rtw_memset(IV,10,18); -+ return; -+ } -+ else{ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ -+ WAPI_DATA(WAPI_RX,"rtw_wapi_get_iv: peermacaddr ",pWapiSta->PeerMacAddr,6); -+ if (_rtw_memcmp((u8*)pWapiSta->PeerMacAddr, pRA, 6) == _TRUE) { -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ -+ WAPI_TRACE(WAPI_RX,"bFindMatchPeer: %d \n",bFindMatchPeer); -+ WAPI_DATA(WAPI_RX,"Addr",pRA,6); -+ -+ if (bFindMatchPeer){ -+ if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) -+ return; -+ -+ if (pWapiSta->wapiUsk.keyId <= 1){ -+ if(pWapiSta->wapiUskUpdate.bTxEnable) -+ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; -+ else -+ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; -+ -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); -+ _rtw_memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); -+ -+ } -+ } -+ } -+ -+ } -+ -+} -+ -+bool rtw_wapi_drop_for_key_absent(_adapter *padapter,u8 *pRA) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ bool bFindMatchPeer = false; -+ bool bDrop = false; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: ra ",pRA,6); -+ -+ if(psecuritypriv->dot11PrivacyAlgrthm == _SMS4_) -+ { -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ return true; -+ -+ if(IS_MCAST(pRA)){ -+ if(!pWapiInfo->wapiTxMsk.bTxEnable){ -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: multicast key is absent \n"); -+ return bDrop; -+ } -+ } -+ else{ -+ if(!list_empty(&pWapiInfo->wapiSTAUsedList)){ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ -+ WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: pWapiSta->PeerMacAddr ",pWapiSta->PeerMacAddr,6); -+ if (_rtw_memcmp(pRA, pWapiSta->PeerMacAddr, 6) == _TRUE){ -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ if (bFindMatchPeer) { -+ if (!pWapiSta->wapiUsk.bTxEnable){ -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: unicast key is absent \n"); -+ return bDrop; -+ } -+ } -+ else{ -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no peer find \n"); -+ return bDrop; -+ } -+ -+ } -+ else{ -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no sta exist \n"); -+ return bDrop; -+ } -+ } -+ } -+ else -+ { -+ return bDrop; -+ } -+ -+ return bDrop; -+} -+ -+#endif ++#ifdef CONFIG_WAPI_SUPPORT ++ ++#include ++#include ++#include ++#include ++ ++ ++u32 wapi_debug_component = ++// WAPI_INIT | ++// WAPI_API | ++// WAPI_TX | ++// WAPI_RX | ++ WAPI_ERR ; //always open err flags on ++ ++void WapiFreeAllStaInfo(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ PRT_WAPI_STA_INFO pWapiStaInfo; ++ PRT_WAPI_BKID pWapiBkid; ++ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ pWapiInfo = &padapter->wapiInfo; ++ ++ //Pust to Idle List ++ rtw_wapi_return_all_sta_info(padapter); ++ ++ //Sta Info List ++ while(!list_empty(&(pWapiInfo->wapiSTAIdleList))) ++ { ++ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); ++ list_del_init(&pWapiStaInfo->list); ++ } ++ ++ //BKID List ++ while(!list_empty(&(pWapiInfo->wapiBKIDIdleList))) ++ { ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ } ++ WAPI_TRACE(WAPI_INIT, "<=========== %s\n", __FUNCTION__); ++ return; ++} ++ ++void WapiSetIE(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ //PRT_WAPI_BKID pWapiBkid; ++ u16 protocolVer = 1; ++ u16 akmCnt = 1; ++ u16 suiteCnt = 1; ++ u16 capability = 0; ++ u8 OUI[3]; ++ ++ OUI[0] = 0x00; ++ OUI[1] = 0x14; ++ OUI[2] = 0x72; ++ ++ pWapiInfo->wapiIELength = 0; ++//protocol version ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &protocolVer, 2); ++ pWapiInfo->wapiIELength +=2; ++//akm ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &akmCnt, 2); ++ pWapiInfo->wapiIELength +=2; ++ ++ if(pWapiInfo->bWapiPSK){ ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x2; ++ pWapiInfo->wapiIELength +=1; ++ }else{ ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; ++ pWapiInfo->wapiIELength +=1; ++ } ++ ++//usk ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &suiteCnt, 2); ++ pWapiInfo->wapiIELength +=2; ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; ++ pWapiInfo->wapiIELength +=1; ++ ++//msk ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; ++ pWapiInfo->wapiIELength +=1; ++ ++//Capbility ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &capability, 2); ++ pWapiInfo->wapiIELength +=2; ++} ++ ++ ++/* PN1 > PN2, return 1, ++ * else return 0. ++ */ ++u32 WapiComparePN(u8 *PN1, u8 *PN2) ++{ ++ char i; ++ ++ if ((NULL == PN1) || (NULL == PN2)) ++ return 1; ++ ++ // overflow case ++ if ((PN2[15] - PN1[15]) & 0x80) ++ return 1; ++ ++ for (i=16; i>0; i--) ++ { ++ if(PN1[i-1] == PN2[i-1]) ++ continue; ++ else if(PN1[i-1] > PN2[i-1]) ++ return 1; ++ else ++ return 0; ++ } ++ ++ return 0; ++} ++ ++u8 ++WapiGetEntryForCamWrite(_adapter *padapter,u8 *pMacAddr,u8 KID,BOOLEAN IsMsk) ++{ ++ PRT_WAPI_T pWapiInfo=NULL; ++ //PRT_WAPI_CAM_ENTRY pEntry=NULL; ++ u8 i=0; ++ u8 ret = 0xff; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ //exist? ++ for(i=0;iwapiCamEntry[i].IsUsed ++ && (_rtw_memcmp(pMacAddr, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) ++ && pWapiInfo->wapiCamEntry[i].keyidx == KID ++ && pWapiInfo->wapiCamEntry[i].type == IsMsk) ++ { ++ ret = pWapiInfo->wapiCamEntry[i].entry_idx; //cover it ++ break; ++ } ++ } ++ ++ if(i == WAPI_CAM_ENTRY_NUM) //not found ++ { ++ for(i=0;iwapiCamEntry[i].IsUsed == 0) ++ { ++ pWapiInfo->wapiCamEntry[i].IsUsed = 1; ++ pWapiInfo->wapiCamEntry[i].type = IsMsk; ++ pWapiInfo->wapiCamEntry[i].keyidx = KID; ++ _rtw_memcpy(pWapiInfo->wapiCamEntry[i].PeerMacAddr, pMacAddr,ETH_ALEN); ++ ret = pWapiInfo->wapiCamEntry[i].entry_idx; ++ break; ++ } ++ } ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ return ret; ++ ++/* ++ if(RTIsListEmpty(&pWapiInfo->wapiCamIdleList)){ ++ RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); ++ return 0; ++ } ++ ++ pEntry = (PRT_WAPI_CAM_ENTRY)RTRemoveHeadList(&pWapiInfo->wapiCamIdleList); ++ RTInsertTailList(&pWapiInfo->wapiCamUsedList, &pEntry->list); ++ ++ RT_TRACE(COMP_SEC,DBG_LOUD,("<====WapiGetCamEntry(),Get Entry Idx:%d.but we just return 4 for test\n",pEntry->entry_idx)); ++ ++ return pEntry->entry_idx;*/ ++} ++ ++u8 WapiGetEntryForCamClear(_adapter *padapter,u8 *pPeerMac,u8 keyid,u8 IsMsk) ++{ ++ PRT_WAPI_T pWapiInfo=NULL; ++ u8 i=0; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ for(i=0;iwapiCamEntry[i].IsUsed ++ && (_rtw_memcmp(pPeerMac, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) ++ && pWapiInfo->wapiCamEntry[i].keyidx == keyid ++ && pWapiInfo->wapiCamEntry[i].type == IsMsk) ++ { ++ pWapiInfo->wapiCamEntry[i].IsUsed = 0; ++ pWapiInfo->wapiCamEntry[i].keyidx = 2; ++ _rtw_memset(pWapiInfo->wapiCamEntry[i].PeerMacAddr,0,ETH_ALEN); ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ return pWapiInfo->wapiCamEntry[i].entry_idx; ++ } ++ } ++ ++ WAPI_TRACE(WAPI_API,"<====WapiGetReturnCamEntry(), No this cam entry.\n"); ++ return 0xff; ++/* ++ if(RTIsListEmpty(&pWapiInfo->wapiCamUsedList)){ ++ RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); ++ return FALSE; ++ } ++ ++ pList = &pWapiInfo->wapiCamUsedList; ++ while(pList->Flink != &pWapiInfo->wapiCamUsedList) ++ { ++ pEntry = (PRT_WAPI_CAM_ENTRY)pList->Flink; ++ if(PlatformCompareMemory(pPeerMac,pEntry->PeerMacAddr, ETHER_ADDRLEN)== 0 ++ && keyid == pEntry->keyidx) ++ { ++ RTRemoveEntryList(pList); ++ RTInsertHeadList(&pWapiInfo->wapiCamIdleList, pList); ++ return pEntry->entry_idx; ++ } ++ pList = pList->Flink; ++ } ++ ++ return 0; ++*/ ++} ++ ++void ++WapiResetAllCamEntry(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ int i; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ for (i=0;iwapiCamEntry[i].PeerMacAddr, 0, ETH_ALEN); ++ pWapiInfo->wapiCamEntry[i].IsUsed = 0; ++ pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid ++ pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ ++ return; ++} ++ ++u8 WapiWriteOneCamEntry( ++ _adapter *padapter, ++ u8 *pMacAddr, ++ u8 KeyId, ++ u8 EntryId, ++ u8 EncAlg, ++ u8 bGroupKey, ++ u8 *pKey ++) ++{ ++ u8 retVal = 0; ++ u16 usConfig = 0; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if(EntryId >= 32) ++ { ++ WAPI_TRACE(WAPI_ERR, "<=== CamAddOneEntry(): ulKeyId exceed!\n"); ++ return retVal; ++ } ++ ++ usConfig=usConfig|(0x01<<15)|((u16)(EncAlg)<<2)|(KeyId); ++ ++ if(EncAlg == _SMS4_ ) ++ { ++ if(bGroupKey == 1) ++ usConfig |= (0x01<<6); ++ if((EntryId % 2)==1) // ==0 sec key; == 1mic key ++ usConfig |= (0x01<<5); ++ } ++ ++ write_cam(padapter, EntryId, usConfig, pMacAddr, pKey); ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ return 1; ++} ++ ++void rtw_wapi_init(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ int i; ++ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ RT_ASSERT_RET(padapter); ++ ++ if (!padapter->WapiSupport) ++ { ++ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ pWapiInfo = &padapter->wapiInfo; ++ pWapiInfo->bWapiEnable = false; ++ ++ //Init BKID List ++ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDIdleList); ++ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDStoreList); ++ for(i=0;iwapiBKID[i].list, &pWapiInfo->wapiBKIDIdleList); ++ } ++ ++ //Init STA List ++ INIT_LIST_HEAD(&pWapiInfo->wapiSTAIdleList); ++ INIT_LIST_HEAD(&pWapiInfo->wapiSTAUsedList); ++ for(i=0;iwapiSta[i].list, &pWapiInfo->wapiSTAIdleList); ++ } ++ ++ for (i=0;iwapiCamEntry[i].IsUsed = 0; ++ pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid ++ pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; ++ } ++ ++ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_free(_adapter *padapter) ++{ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ RT_ASSERT_RET(padapter); ++ ++ if (!padapter->WapiSupport) ++ { ++ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiFreeAllStaInfo(padapter); ++ ++ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_disable_tx(_adapter *padapter) ++{ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ RT_ASSERT_RET(padapter); ++ ++ if (!padapter->WapiSupport) ++ { ++ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ padapter->wapiInfo.wapiTxMsk.bTxEnable = false; ++ padapter->wapiInfo.wapiTxMsk.bSet = false; ++ ++ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); ++} ++ ++u8 rtw_wapi_is_wai_packet(_adapter* padapter,u8 *pkt_data) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 WaiPkt = 0, *pTaddr, bFind = false; ++ u8 Offset_TypeWAI = 0 ; // (mac header len + llc length) ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return 0; ++ } ++ ++ Offset_TypeWAI = 24 + 6 ; ++ ++ //YJ,add,091103. Data frame may also have skb->data[30]=0x88 and skb->data[31]=0xb4. ++ if ((pkt_data[1]&0x40) !=0) ++ { ++ //DBG_871X("data is privacy \n"); ++ return 0; ++ } ++ ++ pTaddr = GetAddr2Ptr(pkt_data); ++ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ bFind = false; ++ }else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ ++ if (_rtw_memcmp(pTaddr, pWapiSta->PeerMacAddr, 6) == _TRUE) { ++ bFind = true; ++ break; ++ } ++ } ++ } ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s: bFind=%d pTaddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(pTaddr)); ++ ++ if (pkt_data[0] == WIFI_QOS_DATA_TYPE) ++ { ++ Offset_TypeWAI += 2; ++ } ++ ++ // 88b4? ++ if( (pkt_data[Offset_TypeWAI]==0x88) && (pkt_data[Offset_TypeWAI+1]==0xb4) ){ ++ WaiPkt = pkt_data[Offset_TypeWAI+5]; ++ ++ psecuritypriv->hw_decrypted = _TRUE; ++ }else{ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): non wai packet\n",__FUNCTION__); ++ } ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): Recvd WAI frame. IsWAIPkt(%d)\n",__FUNCTION__, WaiPkt); ++ ++ return WaiPkt; ++} ++ ++ ++void rtw_wapi_update_info(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ struct recv_frame_hdr *precv_hdr; ++ u8 *ptr; ++ u8 *pTA; ++ u8 *pRecvPN; ++ ++ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ precv_hdr = &precv_frame->u.hdr; ++ ptr = precv_hdr->rx_data; ++ ++ if (precv_hdr->attrib.qos == 1) ++ { ++ precv_hdr->UserPriority = GetTid(ptr); ++ } ++ else ++ { ++ precv_hdr->UserPriority = 0; ++ } ++ ++ pTA = GetAddr2Ptr(ptr); ++ _rtw_memcpy((u8 *)precv_hdr->WapiSrcAddr, pTA, 6); ++ pRecvPN = ptr + precv_hdr->attrib.hdrlen + 2; ++ _rtw_memcpy((u8 *)precv_hdr->WapiTempPN, pRecvPN, 16); ++ ++ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); ++} ++ ++/**************************************************************************** ++TRUE-----------------Drop ++FALSE---------------- handle ++add to support WAPI to N-mode ++*****************************************************************************/ ++u8 rtw_wapi_check_for_drop( ++ _adapter *padapter, ++ union recv_frame *precv_frame ++) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 *pLastRecvPN = NULL; ++ u8 bFind = false; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 bDrop = false; ++ struct recv_frame_hdr *precv_hdr = &precv_frame->u.hdr; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ int i; ++ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return false; ++ } ++ ++ if(precv_hdr->bIsWaiPacket !=0) ++ { ++ if(precv_hdr->bIsWaiPacket== 0x8) ++ { ++ ++ DBG_871X("rtw_wapi_check_for_drop: dump packet \n"); ++ for(i=0;i<50;i++) ++ { ++ DBG_871X("%02X ",ptr[i]); ++ if((i+1) %8 ==0) ++ DBG_871X("\n"); ++ } ++ DBG_871X("\n rtw_wapi_check_for_drop: dump packet \n"); ++ ++ for(i=0;i<16;i++) ++ { ++ if(ptr[i+27] !=0) ++ break; ++ } ++ ++ if(i== 16) ++ { ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: drop with zero BKID \n"); ++ return true; ++ } ++ else ++ { ++ return false; ++ } ++ } ++ else ++ return false; ++ } ++ ++ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ bFind = false; ++ }else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if (_rtw_memcmp(precv_hdr->WapiSrcAddr, pWapiSta->PeerMacAddr, ETH_ALEN) == _TRUE) { ++ bFind = true; ++ break; ++ } ++ } ++ } ++ WAPI_TRACE(WAPI_RX, "%s: bFind=%d prxb->WapiSrcAddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(precv_hdr->WapiSrcAddr)); ++ ++ if(bFind) ++ { ++ if(IS_MCAST(precv_hdr->attrib.ra)) ++ { ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: multicast case \n"); ++ pLastRecvPN = pWapiSta->lastRxMulticastPN; ++ } ++ else ++ { ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: unicast case \n"); ++ switch(precv_hdr->UserPriority) ++ { ++ case 0: ++ case 3: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNBEQueue; ++ break; ++ case 1: ++ case 2: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNBKQueue; ++ break; ++ case 4: ++ case 5: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNVIQueue; ++ break; ++ case 6: ++ case 7: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNVOQueue; ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR,"%s: Unknown TID \n",__FUNCTION__); ++ break; ++ } ++ } ++ ++ if(!WapiComparePN(precv_hdr->WapiTempPN,pLastRecvPN)) ++ { ++ WAPI_TRACE(WAPI_RX,"%s: Equal PN!!\n",__FUNCTION__); ++ if(IS_MCAST(precv_hdr->attrib.ra)) ++ _rtw_memcpy(pLastRecvPN,WapiAEMultiCastPNInitialValueSrc,16); ++ else ++ _rtw_memcpy(pLastRecvPN,WapiAEPNInitialValueSrc,16); ++ bDrop = true; ++ } ++ else ++ { ++ _rtw_memcpy(pLastRecvPN,precv_hdr->WapiTempPN,16); ++ } ++ } ++ ++ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); ++ return bDrop; ++} ++ ++void rtw_build_probe_resp_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 WapiIELength = 0; ++ ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiSetIE(padapter); ++ WapiIELength = pWapiInfo->wapiIELength; ++ pframe[0] = _WAPI_IE_; ++ pframe[1] = WapiIELength; ++ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); ++ pframe += WapiIELength+2; ++ pattrib->pktlen += WapiIELength+2; ++ ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_build_beacon_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 WapiIELength = 0; ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiSetIE(padapter); ++ WapiIELength = pWapiInfo->wapiIELength; ++ pframe[0] = _WAPI_IE_; ++ pframe[1] = WapiIELength; ++ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); ++ pframe += WapiIELength+2; ++ pattrib->pktlen += WapiIELength+2; ++ ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_build_assoc_req_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) ++{ ++ PRT_WAPI_BKID pWapiBKID; ++ u16 bkidNum; ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 WapiIELength = 0; ++ ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiSetIE(padapter); ++ WapiIELength = pWapiInfo->wapiIELength; ++ bkidNum = 0; ++ if(!list_empty(&(pWapiInfo->wapiBKIDStoreList))){ ++ list_for_each_entry(pWapiBKID, &pWapiInfo->wapiBKIDStoreList, list) { ++ bkidNum ++; ++ _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength+2, pWapiBKID->bkid,16); ++ WapiIELength += 16; ++ } ++ } ++ _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength, &bkidNum, 2); ++ WapiIELength += 2; ++ ++ pframe[0] = _WAPI_IE_; ++ pframe[1] = WapiIELength; ++ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); ++ pframe += WapiIELength+2; ++ pattrib->pktlen += WapiIELength+2; ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_on_assoc_ok(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ PRT_WAPI_STA_INFO pWapiSta; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ //u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ pWapiSta =(PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); ++ list_del_init(&pWapiSta->list); ++ list_add_tail(&pWapiSta->list, &pWapiInfo->wapiSTAUsedList); ++ _rtw_memcpy(pWapiSta->PeerMacAddr,padapter->mlmeextpriv.mlmext_info.network.MacAddress,6); ++ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPN, WapiAEPNInitialValueSrc, 16); ++ ++ //For chenk PN error with Qos Data after s3: add by ylb 20111114 ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); ++ ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++ ++void rtw_wapi_return_one_sta_info(_adapter *padapter, u8 *MacAddr) ++{ ++ PRT_WAPI_T pWapiInfo; ++ PRT_WAPI_STA_INFO pWapiStaInfo = NULL; ++ PRT_WAPI_BKID pWapiBkid = NULL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ WAPI_TRACE(WAPI_API, "==========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) ++ { ++ while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) ++ { ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ _rtw_memset(pWapiBkid->bkid,0,16); ++ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); ++ } ++ } ++ ++ ++ WAPI_TRACE(WAPI_API, " %s: after clear bkid \n", __FUNCTION__); ++ ++ ++ //Remove STA info ++ if(list_empty(&(pWapiInfo->wapiSTAUsedList))){ ++ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is null \n", __FUNCTION__); ++ return; ++ }else{ ++ ++ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is not null \n", __FUNCTION__); ++#if 0 ++ pWapiStaInfo=(PRT_WAPI_STA_INFO)list_entry((pWapiInfo->wapiSTAUsedList.next),RT_WAPI_STA_INFO,list); ++ ++ list_for_each_entry(pWapiStaInfo, &(pWapiInfo->wapiSTAUsedList), list) { ++ ++ DBG_871X("MAC Addr %02x-%02x-%02x-%02x-%02x-%02x \n",MacAddr[0],MacAddr[1],MacAddr[2],MacAddr[3],MacAddr[4],MacAddr[5]); ++ ++ ++ DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); ++ ++ if(pWapiStaInfo == NULL) ++ { ++ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo == NULL Case \n", __FUNCTION__); ++ return; ++ } ++ ++ if(pWapiStaInfo->PeerMacAddr == NULL) ++ { ++ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo->PeerMacAddr == NULL Case \n", __FUNCTION__); ++ return; ++ } ++ ++ if(MacAddr == NULL) ++ { ++ WAPI_TRACE(WAPI_API, " %s: MacAddr == NULL Case \n", __FUNCTION__); ++ return; ++ } ++ ++ if (_rtw_memcmp(pWapiStaInfo->PeerMacAddr, MacAddr, ETH_ALEN) == _TRUE) { ++ pWapiStaInfo->bAuthenticateInProgress = false; ++ pWapiStaInfo->bSetkeyOk = false; ++ _rtw_memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); ++ list_del_init(&pWapiStaInfo->list); ++ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); ++ break; ++ } ++ ++ } ++#endif ++ ++ while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) ++ { ++ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); ++ ++ DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); ++ ++ list_del_init(&pWapiStaInfo->list); ++ memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); ++ pWapiStaInfo->bSetkeyOk = 0; ++ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); ++ } ++ ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ return; ++} ++ ++void rtw_wapi_return_all_sta_info(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ PRT_WAPI_STA_INFO pWapiStaInfo; ++ PRT_WAPI_BKID pWapiBkid; ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ //Sta Info List ++ while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) ++ { ++ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); ++ list_del_init(&pWapiStaInfo->list); ++ memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); ++ pWapiStaInfo->bSetkeyOk = 0; ++ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); ++ } ++ ++ //BKID List ++ while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) ++ { ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ memset(pWapiBkid->bkid,0,16); ++ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); ++ } ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr) ++{ ++ u8 UcIndex = 0; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 0); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(Adapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 0); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(Adapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 1); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(Adapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 1); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(padapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_clear_all_cam_entry(_adapter *padapter) ++{ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ invalidate_cam_all(padapter); // is this ok? ++ WapiResetAllCamEntry(padapter); ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_set_key(_adapter *padapter, RT_WAPI_KEY *pWapiKey, RT_WAPI_STA_INFO *pWapiSta, u8 bGroupKey, u8 bUseDefaultKey) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ u8 *pMacAddr = pWapiSta->PeerMacAddr; ++ u32 EntryId = 0; ++ BOOLEAN IsPairWise = false ; ++ u8 EncAlgo; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_API, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ EncAlgo = _SMS4_; ++ ++ //For Tx bc/mc pkt,use defualt key entry ++ if(bUseDefaultKey) ++ { ++ // when WAPI update key, keyid will be 0 or 1 by turns. ++ if (pWapiKey->keyId == 0) ++ EntryId = 0; ++ else ++ EntryId = 2; ++ } ++ else ++ { ++ // tx/rx unicast pkt, or rx broadcast, find the key entry by peer's MacAddr ++ EntryId = WapiGetEntryForCamWrite(padapter,pMacAddr,pWapiKey->keyId,bGroupKey); ++ } ++ ++ if(EntryId == 0xff){ ++ WAPI_TRACE(WAPI_API, "===>No entry for WAPI setkey! !!\n"); ++ return; ++ } ++ ++ //EntryId is also used to diff Sec key and Mic key ++ //Sec Key ++ WapiWriteOneCamEntry(padapter, ++ pMacAddr, ++ pWapiKey->keyId, //keyid ++ EntryId, //entry ++ EncAlgo, //type ++ bGroupKey, //pairwise or group key ++ pWapiKey->dataKey); ++ //MIC key ++ WapiWriteOneCamEntry(padapter, ++ pMacAddr, ++ pWapiKey->keyId, //keyid ++ EntryId+1, //entry ++ EncAlgo, //type ++ bGroupKey, //pairwise or group key ++ pWapiKey->micKey); ++ ++ WAPI_TRACE(WAPI_API, "Set Wapi Key :KeyId:%d,EntryId:%d,PairwiseKey:%d.\n",pWapiKey->keyId,EntryId,!bGroupKey); ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++} ++ ++#if 0 ++//YJ,test,091013 ++void wapi_test_set_key(struct _adapter *padapter, u8* buf) ++{ /*Data: keyType(1) + bTxEnable(1) + bAuthenticator(1) + bUpdate(1) + PeerAddr(6) + DataKey(16) + MicKey(16) + KeyId(1)*/ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_BKID pWapiBkid; ++ PRT_WAPI_STA_INFO pWapiSta; ++ u8 data[43]; ++ bool bTxEnable; ++ bool bUpdate; ++ bool bAuthenticator; ++ u8 PeerAddr[6]; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ ++ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); ++ ++ if (!padapter->WapiSupport){ ++ return; ++ } ++ ++ copy_from_user(data, buf, 43); ++ bTxEnable = data[1]; ++ bAuthenticator = data[2]; ++ bUpdate = data[3]; ++ memcpy(PeerAddr,data+4,6); ++ ++ if(data[0] == 0x3){ ++ if(!list_empty(&(pWapiInfo->wapiBKIDIdleList))){ ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ memcpy(pWapiBkid->bkid, data+10, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - BKID", pWapiBkid->bkid, 16); ++ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDStoreList); ++ } ++ }else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(!memcmp(pWapiSta->PeerMacAddr,PeerAddr,6)){ ++ pWapiSta->bAuthenticatorInUpdata = false; ++ switch(data[0]){ ++ case 1: //usk ++ if(bAuthenticator){ //authenticator ++ memcpy(pWapiSta->lastTxUnicastPN,WapiAEPNInitialValueSrc,16); ++ if(!bUpdate) { //first ++ WAPI_TRACE(WAPI_INIT,"AE fisrt set usk \n"); ++ pWapiSta->wapiUsk.bSet = true; ++ memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUsk.micKey,data+26,16); ++ pWapiSta->wapiUsk.keyId = *(data+42); ++ pWapiSta->wapiUsk.bTxEnable = true; ++ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Data Key", pWapiSta->wapiUsk.dataKey, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Mic Key", pWapiSta->wapiUsk.micKey, 16); ++ } ++ else //update ++ { ++ WAPI_TRACE(WAPI_INIT, "AE update usk \n"); ++ pWapiSta->wapiUskUpdate.bSet = true; ++ pWapiSta->bAuthenticatorInUpdata = true; ++ memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); ++ memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ pWapiSta->wapiUskUpdate.keyId = *(data+42); ++ pWapiSta->wapiUskUpdate.bTxEnable = true; ++ } ++ } ++ else{ ++ if(!bUpdate){ ++ WAPI_TRACE(WAPI_INIT,"ASUE fisrt set usk \n"); ++ if(bTxEnable){ ++ pWapiSta->wapiUsk.bTxEnable = true; ++ memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ }else{ ++ pWapiSta->wapiUsk.bSet = true; ++ memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUsk.micKey,data+26,16); ++ pWapiSta->wapiUsk.keyId = *(data+42); ++ pWapiSta->wapiUsk.bTxEnable = false; ++ } ++ }else{ ++ WAPI_TRACE(WAPI_INIT,"ASUE update usk \n"); ++ if(bTxEnable){ ++ pWapiSta->wapiUskUpdate.bTxEnable = true; ++ if(pWapiSta->wapiUskUpdate.bSet){ ++ memcpy(pWapiSta->wapiUsk.dataKey,pWapiSta->wapiUskUpdate.dataKey,16); ++ memcpy(pWapiSta->wapiUsk.micKey,pWapiSta->wapiUskUpdate.micKey,16); ++ pWapiSta->wapiUsk.keyId=pWapiSta->wapiUskUpdate.keyId; ++ memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ pWapiSta->wapiUskUpdate.bTxEnable = false; ++ pWapiSta->wapiUskUpdate.bSet = false; ++ } ++ memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ }else{ ++ pWapiSta->wapiUskUpdate.bSet = true; ++ memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); ++ pWapiSta->wapiUskUpdate.keyId = *(data+42); ++ pWapiSta->wapiUskUpdate.bTxEnable = false; ++ } ++ } ++ } ++ break; ++ case 2: //msk ++ if(bAuthenticator){ //authenticator ++ pWapiInfo->wapiTxMsk.bSet = true; ++ memcpy(pWapiInfo->wapiTxMsk.dataKey,data+10,16); ++ memcpy(pWapiInfo->wapiTxMsk.micKey,data+26,16); ++ pWapiInfo->wapiTxMsk.keyId = *(data+42); ++ pWapiInfo->wapiTxMsk.bTxEnable = true; ++ memcpy(pWapiInfo->lastTxMulticastPN,WapiAEMultiCastPNInitialValueSrc,16); ++ ++ if(!bUpdate){ //first ++ WAPI_TRACE(WAPI_INIT, "AE fisrt set msk \n"); ++ if(!pWapiSta->bSetkeyOk) ++ pWapiSta->bSetkeyOk = true; ++ pWapiInfo->bFirstAuthentiateInProgress= false; ++ }else{ //update ++ WAPI_TRACE(WAPI_INIT,"AE update msk \n"); ++ } ++ ++ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Data Key", pWapiInfo->wapiTxMsk.dataKey, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Mic Key", pWapiInfo->wapiTxMsk.micKey, 16); ++ } ++ else{ ++ if(!bUpdate){ ++ WAPI_TRACE(WAPI_INIT,"ASUE fisrt set msk \n"); ++ pWapiSta->wapiMsk.bSet = true; ++ memcpy(pWapiSta->wapiMsk.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiMsk.micKey,data+26,16); ++ pWapiSta->wapiMsk.keyId = *(data+42); ++ pWapiSta->wapiMsk.bTxEnable = false; ++ if(!pWapiSta->bSetkeyOk) ++ pWapiSta->bSetkeyOk = true; ++ pWapiInfo->bFirstAuthentiateInProgress= false; ++ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Data Key", pWapiSta->wapiMsk.dataKey, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Mic Key", pWapiSta->wapiMsk.micKey, 16); ++ }else{ ++ WAPI_TRACE(WAPI_INIT,"ASUE update msk \n"); ++ pWapiSta->wapiMskUpdate.bSet = true; ++ memcpy(pWapiSta->wapiMskUpdate.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiMskUpdate.micKey,data+26,16); ++ pWapiSta->wapiMskUpdate.keyId = *(data+42); ++ pWapiSta->wapiMskUpdate.bTxEnable = false; ++ } ++ } ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR,"Unknown Flag \n"); ++ break; ++ } ++ } ++ } ++ } ++ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); ++} ++ ++ ++void wapi_test_init(struct _adapter *padapter) ++{ ++ u8 keybuf[100]; ++ u8 mac_addr[6]={0x00,0xe0,0x4c,0x72,0x04,0x70}; ++ u8 UskDataKey[16]={0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f}; ++ u8 UskMicKey[16]={0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f}; ++ u8 UskId = 0; ++ u8 MskDataKey[16]={0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f}; ++ u8 MskMicKey[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f}; ++ u8 MskId = 0; ++ ++ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); ++ ++ //Enable Wapi ++ WAPI_TRACE(WAPI_INIT, "%s: Enable wapi!!!!\n", __FUNCTION__); ++ padapter->wapiInfo.bWapiEnable = true; ++ padapter->pairwise_key_type = KEY_TYPE_SMS4; ++ ieee->group_key_type = KEY_TYPE_SMS4; ++ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; ++ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; ++ ++ //set usk ++ WAPI_TRACE(WAPI_INIT, "%s: Set USK!!!!\n", __FUNCTION__); ++ memset(keybuf,0,100); ++ keybuf[0] = 1; //set usk ++ keybuf[1] = 1; //enable tx ++ keybuf[2] = 1; //AE ++ keybuf[3] = 0; //not update ++ ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,UskDataKey,16); ++ memcpy(keybuf+26,UskMicKey,16); ++ keybuf[42]=UskId; ++ wapi_test_set_key(padapter, keybuf); ++ ++ memset(keybuf,0,100); ++ keybuf[0] = 1; //set usk ++ keybuf[1] = 1; //enable tx ++ keybuf[2] = 0; //AE ++ keybuf[3] = 0; //not update ++ ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,UskDataKey,16); ++ memcpy(keybuf+26,UskMicKey,16); ++ keybuf[42]=UskId; ++ wapi_test_set_key(padapter, keybuf); ++ ++ //set msk ++ WAPI_TRACE(WAPI_INIT, "%s: Set MSK!!!!\n", __FUNCTION__); ++ memset(keybuf,0,100); ++ keybuf[0] = 2; //set msk ++ keybuf[1] = 1; //Enable TX ++ keybuf[2] = 1; //AE ++ keybuf[3] = 0; //not update ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,MskDataKey,16); ++ memcpy(keybuf+26,MskMicKey,16); ++ keybuf[42] = MskId; ++ wapi_test_set_key(padapter, keybuf); ++ ++ memset(keybuf,0,100); ++ keybuf[0] = 2; //set msk ++ keybuf[1] = 1; //Enable TX ++ keybuf[2] = 0; //AE ++ keybuf[3] = 0; //not update ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,MskDataKey,16); ++ memcpy(keybuf+26,MskMicKey,16); ++ keybuf[42] = MskId; ++ wapi_test_set_key(padapter, keybuf); ++ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); ++} ++#endif ++ ++void rtw_wapi_get_iv(_adapter *padapter,u8 *pRA, u8*IV) ++{ ++ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ bool bPNOverflow = false; ++ bool bFindMatchPeer = false; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ ++ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)IV; ++ ++ WAPI_DATA(WAPI_RX,"wapi_get_iv: pra",pRA,6); ++ ++ if(IS_MCAST(pRA)){ ++ if(!pWapiInfo->wapiTxMsk.bTxEnable){ ++ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); ++ return; ++ } ++ ++ if(pWapiInfo->wapiTxMsk.keyId <= 1){ ++ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); ++ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); ++ } ++ } ++ else ++ { ++ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_get_iv: list is empty \n"); ++ _rtw_memset(IV,10,18); ++ return; ++ } ++ else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ ++ WAPI_DATA(WAPI_RX,"rtw_wapi_get_iv: peermacaddr ",pWapiSta->PeerMacAddr,6); ++ if (_rtw_memcmp((u8*)pWapiSta->PeerMacAddr, pRA, 6) == _TRUE) { ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ ++ WAPI_TRACE(WAPI_RX,"bFindMatchPeer: %d \n",bFindMatchPeer); ++ WAPI_DATA(WAPI_RX,"Addr",pRA,6); ++ ++ if (bFindMatchPeer){ ++ if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) ++ return; ++ ++ if (pWapiSta->wapiUsk.keyId <= 1){ ++ if(pWapiSta->wapiUskUpdate.bTxEnable) ++ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; ++ else ++ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; ++ ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); ++ _rtw_memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); ++ ++ } ++ } ++ } ++ ++ } ++ ++} ++ ++bool rtw_wapi_drop_for_key_absent(_adapter *padapter,u8 *pRA) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ bool bFindMatchPeer = false; ++ bool bDrop = false; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: ra ",pRA,6); ++ ++ if(psecuritypriv->dot11PrivacyAlgrthm == _SMS4_) ++ { ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ return true; ++ ++ if(IS_MCAST(pRA)){ ++ if(!pWapiInfo->wapiTxMsk.bTxEnable){ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: multicast key is absent \n"); ++ return bDrop; ++ } ++ } ++ else{ ++ if(!list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ ++ WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: pWapiSta->PeerMacAddr ",pWapiSta->PeerMacAddr,6); ++ if (_rtw_memcmp(pRA, pWapiSta->PeerMacAddr, 6) == _TRUE){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ if (bFindMatchPeer) { ++ if (!pWapiSta->wapiUsk.bTxEnable){ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: unicast key is absent \n"); ++ return bDrop; ++ } ++ } ++ else{ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no peer find \n"); ++ return bDrop; ++ } ++ ++ } ++ else{ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no sta exist \n"); ++ return bDrop; ++ } ++ } ++ } ++ else ++ { ++ return bDrop; ++ } ++ ++ return bDrop; ++} ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wapi_sms4.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wapi_sms4.c new file mode 100644 -index 000000000..aa6419390 +index 0000000..6126ed9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wapi_sms4.c @@ -0,0 +1,923 @@ -+#ifdef CONFIG_WAPI_SUPPORT -+ -+#include -+#include -+#include -+#include -+ -+ -+#ifdef CONFIG_WAPI_SW_SMS4 -+ -+#define WAPI_LITTLE_ENDIAN -+//#define BIG_ENDIAN -+#define ENCRYPT 0 -+#define DECRYPT 1 -+ -+ -+/********************************************************** -+ **********************************************************/ -+const u8 Sbox[256] = { -+0xd6,0x90,0xe9,0xfe,0xcc,0xe1,0x3d,0xb7,0x16,0xb6,0x14,0xc2,0x28,0xfb,0x2c,0x05, -+0x2b,0x67,0x9a,0x76,0x2a,0xbe,0x04,0xc3,0xaa,0x44,0x13,0x26,0x49,0x86,0x06,0x99, -+0x9c,0x42,0x50,0xf4,0x91,0xef,0x98,0x7a,0x33,0x54,0x0b,0x43,0xed,0xcf,0xac,0x62, -+0xe4,0xb3,0x1c,0xa9,0xc9,0x08,0xe8,0x95,0x80,0xdf,0x94,0xfa,0x75,0x8f,0x3f,0xa6, -+0x47,0x07,0xa7,0xfc,0xf3,0x73,0x17,0xba,0x83,0x59,0x3c,0x19,0xe6,0x85,0x4f,0xa8, -+0x68,0x6b,0x81,0xb2,0x71,0x64,0xda,0x8b,0xf8,0xeb,0x0f,0x4b,0x70,0x56,0x9d,0x35, -+0x1e,0x24,0x0e,0x5e,0x63,0x58,0xd1,0xa2,0x25,0x22,0x7c,0x3b,0x01,0x21,0x78,0x87, -+0xd4,0x00,0x46,0x57,0x9f,0xd3,0x27,0x52,0x4c,0x36,0x02,0xe7,0xa0,0xc4,0xc8,0x9e, -+0xea,0xbf,0x8a,0xd2,0x40,0xc7,0x38,0xb5,0xa3,0xf7,0xf2,0xce,0xf9,0x61,0x15,0xa1, -+0xe0,0xae,0x5d,0xa4,0x9b,0x34,0x1a,0x55,0xad,0x93,0x32,0x30,0xf5,0x8c,0xb1,0xe3, -+0x1d,0xf6,0xe2,0x2e,0x82,0x66,0xca,0x60,0xc0,0x29,0x23,0xab,0x0d,0x53,0x4e,0x6f, -+0xd5,0xdb,0x37,0x45,0xde,0xfd,0x8e,0x2f,0x03,0xff,0x6a,0x72,0x6d,0x6c,0x5b,0x51, -+0x8d,0x1b,0xaf,0x92,0xbb,0xdd,0xbc,0x7f,0x11,0xd9,0x5c,0x41,0x1f,0x10,0x5a,0xd8, -+0x0a,0xc1,0x31,0x88,0xa5,0xcd,0x7b,0xbd,0x2d,0x74,0xd0,0x12,0xb8,0xe5,0xb4,0xb0, -+0x89,0x69,0x97,0x4a,0x0c,0x96,0x77,0x7e,0x65,0xb9,0xf1,0x09,0xc5,0x6e,0xc6,0x84, -+0x18,0xf0,0x7d,0xec,0x3a,0xdc,0x4d,0x20,0x79,0xee,0x5f,0x3e,0xd7,0xcb,0x39,0x48 -+}; -+ -+const u32 CK[32] = { -+ 0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269, -+ 0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9, -+ 0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249, -+ 0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9, -+ 0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229, -+ 0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299, -+ 0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209, -+ 0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279 }; -+ -+#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y)))) -+ -+#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \ -+ Sbox[(_A) >> 16 & 0xFF] << 16 | \ -+ Sbox[(_A) >> 8 & 0xFF] << 8 | \ -+ Sbox[(_A) & 0xFF]) -+ -+#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24)) -+#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23)) -+ -+static void -+xor_block(void *dst, void *src1, void *src2) -+/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */ -+{ -+ ((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0]; -+ ((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1]; -+ ((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2]; -+ ((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3]; -+} -+ -+ -+void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk) -+{ -+ u32 r, mid, x0, x1, x2, x3, *p; -+ p = (u32 *)Input; -+ x0 = p[0]; -+ x1 = p[1]; -+ x2 = p[2]; -+ x3 = p[3]; -+#ifdef WAPI_LITTLE_ENDIAN -+ x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); -+ x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); -+ x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); -+ x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); -+#endif -+ for (r = 0; r < 32; r += 4) -+ { -+ mid = x1 ^ x2 ^ x3 ^ rk[r + 0]; -+ mid = ByteSub(mid); -+ x0 ^= L1(mid); -+ mid = x2 ^ x3 ^ x0 ^ rk[r + 1]; -+ mid = ByteSub(mid); -+ x1 ^= L1(mid); -+ mid = x3 ^ x0 ^ x1 ^ rk[r + 2]; -+ mid = ByteSub(mid); -+ x2 ^= L1(mid); -+ mid = x0 ^ x1 ^ x2 ^ rk[r + 3]; -+ mid = ByteSub(mid); -+ x3 ^= L1(mid); -+ } -+#ifdef WAPI_LITTLE_ENDIAN -+ x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); -+ x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); -+ x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); -+ x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); -+#endif -+ p = (u32 *)Output; -+ p[0] = x3; -+ p[1] = x2; -+ p[2] = x1; -+ p[3] = x0; -+} -+ -+ -+ -+void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag) -+{ -+ u32 r, mid, x0, x1, x2, x3, *p; -+ -+ p = (u32 *)Key; -+ x0 = p[0]; -+ x1 = p[1]; -+ x2 = p[2]; -+ x3 = p[3]; -+#ifdef WAPI_LITTLE_ENDIAN -+ x0 = Rotl(x0, 16); x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); -+ x1 = Rotl(x1, 16); x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); -+ x2 = Rotl(x2, 16); x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); -+ x3 = Rotl(x3, 16); x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); -+#endif -+ -+ x0 ^= 0xa3b1bac6; -+ x1 ^= 0x56aa3350; -+ x2 ^= 0x677d9197; -+ x3 ^= 0xb27022dc; -+ for (r = 0; r < 32; r += 4) -+ { -+ mid = x1 ^ x2 ^ x3 ^ CK[r + 0]; -+ mid = ByteSub(mid); -+ rk[r + 0] = x0 ^= L2(mid); -+ mid = x2 ^ x3 ^ x0 ^ CK[r + 1]; -+ mid = ByteSub(mid); -+ rk[r + 1] = x1 ^= L2(mid); -+ mid = x3 ^ x0 ^ x1 ^ CK[r + 2]; -+ mid = ByteSub(mid); -+ rk[r + 2] = x2 ^= L2(mid); -+ mid = x0 ^ x1 ^ x2 ^ CK[r + 3]; -+ mid = ByteSub(mid); -+ rk[r + 3] = x3 ^= L2(mid); -+ } -+ if (CryptFlag == DECRYPT) -+ { -+ for (r = 0; r < 16; r++) -+ mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid; -+ } -+} -+ -+ -+void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, -+ u8 *Output, u16 *OutputLength, u32 CryptFlag) -+{ -+ u32 blockNum,i,j, rk[32]; -+ u16 remainder; -+ u8 blockIn[16],blockOut[16], tempIV[16], k; -+ -+ *OutputLength = 0; -+ remainder = InputLength & 0x0F; -+ blockNum = InputLength >> 4; -+ if(remainder !=0) -+ blockNum++; -+ else -+ remainder = 16; -+ -+ for(k=0;k<16;k++) -+ tempIV[k] = IV[15-k]; -+ -+ memcpy(blockIn, tempIV, 16); -+ -+ SMS4KeyExt((u8 *)Key, rk,CryptFlag); -+ -+ for(i=0; i> 4; -+ -+ for(k=0;k<16;k++) -+ tempIV[k] = IV[15-k]; -+ -+ memcpy(BlockIn, tempIV, 16); -+ -+ SMS4KeyExt((u8 *)Key, rk, ENCRYPT); -+ -+ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); -+ -+ for(i=0; i> 4; -+ -+ for(i=0; i%s\n", __FUNCTION__); -+ -+ header = (struct ieee80211_hdr_3addr_qos *)pHeader; -+ memset(TempBuf, 0, 34); -+ memcpy(TempBuf, pHeader, 2); //FrameCtrl -+ pTemp = (u16*)TempBuf; -+ *pTemp &= 0xc78f; //bit4,5,6,11,12,13 -+ -+ memcpy((TempBuf+2), (pHeader+4), 12); //Addr1, Addr2 -+ memcpy((TempBuf+14), (pHeader+22), 2); // SeqCtrl -+ pTemp = (u16*)(TempBuf + 14); -+ *pTemp &= 0x000f; -+ -+ memcpy((TempBuf+16), (pHeader+16), 6); //Addr3 -+ -+ fc = le16_to_cpu(header->frame_ctl); -+ -+ -+ -+ if (GetFrDs((u16*)&fc) && GetToDs((u16 *)&fc)) -+ { -+ memcpy((TempBuf+22), (pHeader+24), 6); -+ QosOffset = 30; -+ }else{ -+ memset((TempBuf+22), 0, 6); -+ QosOffset = 24; -+ } -+ -+ if((fc & 0x0088) == 0x0088){ -+ memcpy((TempBuf+28), (pHeader+QosOffset), 2); -+ TempLen += 2; -+ //IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; -+ IV = pHeader + QosOffset + 2 + 2; -+ }else{ -+ IV = pHeader + QosOffset + 2; -+ //IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; -+ } -+ -+ TempBuf[TempLen-1] = (u8)(DataLen & 0xff); -+ TempBuf[TempLen-2] = (u8)((DataLen & 0xff00)>>8); -+ TempBuf[TempLen-4] = KeyIdx; -+ -+ WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16); -+ WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16); -+ WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen); -+ WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen); -+ -+ WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen, -+ pData, DataLen, MicBuffer, &MicLen); -+ -+ if (MicLen != 16) -+ WAPI_TRACE(WAPI_ERR,"%s: MIC Length Error!!\n",__FUNCTION__); -+ -+ WAPI_TRACE(WAPI_TX|WAPI_RX, "<=========%s\n", __FUNCTION__); -+#endif -+} -+ -+/* AddCount: 1 or 2. -+ * If overflow, return 1, -+ * else return 0. -+ */ -+u8 WapiIncreasePN(u8 *PN, u8 AddCount) -+{ -+ u8 i; -+ -+ if (NULL == PN) -+ return 1; -+ //YJ,test,091102 -+ /* -+ if(AddCount == 2){ -+ DBG_8192C("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]); -+ if(PN[0] == 0x48){ -+ PN[0] += AddCount; -+ return 1; -+ }else{ -+ PN[0] += AddCount; -+ return 0; -+ } -+ } -+ */ -+ //YJ,test,091102,end -+ -+ for (i=0; i<16; i++) -+ { -+ if (PN[i] + AddCount <= 0xff) -+ { -+ PN[i] += AddCount; -+ return 0; -+ } -+ else -+ { -+ PN[i] += AddCount; -+ AddCount = 1; -+ } -+ } -+ return 1; -+} -+ -+ -+void WapiGetLastRxUnicastPNForQoSData( -+ u8 UserPriority, -+ PRT_WAPI_STA_INFO pWapiStaInfo, -+ u8 *PNOut -+) -+{ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ switch(UserPriority) -+ { -+ case 0: -+ case 3: -+ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBEQueue,16); -+ break; -+ case 1: -+ case 2: -+ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBKQueue,16); -+ break; -+ case 4: -+ case 5: -+ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVIQueue,16); -+ break; -+ case 6: -+ case 7: -+ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVOQueue,16); -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); -+ break; -+ } -+ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); -+} -+ -+ -+void WapiSetLastRxUnicastPNForQoSData( -+ u8 UserPriority, -+ u8 *PNIn, -+ PRT_WAPI_STA_INFO pWapiStaInfo -+) -+{ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ switch(UserPriority) -+ { -+ case 0: -+ case 3: -+ memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue,PNIn,16); -+ break; -+ case 1: -+ case 2: -+ memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue,PNIn,16); -+ break; -+ case 4: -+ case 5: -+ memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue,PNIn,16); -+ break; -+ case 6: -+ case 7: -+ memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue,PNIn,16); -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); -+ break; -+ } -+ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); -+} -+ -+ -+/**************************************************************************** -+ FALSE not RX-Reorder -+ TRUE do RX Reorder -+add to support WAPI to N-mode -+*****************************************************************************/ -+u8 WapiCheckPnInSwDecrypt( -+ _adapter *padapter, -+ struct sk_buff *pskb -+) -+{ -+ u8 ret = false; -+ -+#if 0 -+ struct ieee80211_hdr_3addr_qos *header; -+ u16 fc; -+ u8 *pDaddr, *pTaddr, *pRaddr; -+ -+ header = (struct ieee80211_hdr_3addr_qos *)pskb->data; -+ pTaddr = header->addr2; -+ pRaddr = header->addr1; -+ fc = le16_to_cpu(header->frame_ctl); -+ -+ if(GetToDs(&fc)) -+ pDaddr = header->addr3; -+ else -+ pDaddr = header->addr1; -+ -+ if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0) -+ && ! (pDaddr) -+ && (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE)) -+ //&& ieee->pHTInfo->bCurrentHTSupport && -+ //ieee->pHTInfo->bCurRxReorderEnable) -+ ret = false; -+ else -+ ret = true; -+#endif -+ WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret); -+ return ret; -+} -+ -+int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe) -+{ -+ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; -+ u8 * frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET; -+ u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL; -+ u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0; -+ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ int ret = 0; -+ -+ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); -+ -+ return ret; -+#if 0 -+ hdr_len = sMacHdrLng; -+ if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) -+ { -+ hdr_len += 2; -+ } -+ //hdr_len += SNAP_SIZE + sizeof(u16); -+ -+ pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len); -+ memmove(pos, pos+padapter->wapiInfo.extra_prefix_len, hdr_len); -+ -+ pSecHeader = pskb->data + hdr_len; -+ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader; -+ pRA = pskb->data + 4; -+ -+ WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len); -+ -+ //Address 1 is always receiver's address -+ if( IS_MCAST(pRA) ){ -+ if(!pWapiInfo->wapiTxMsk.bTxEnable){ -+ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); -+ return -2; -+ } -+ if(pWapiInfo->wapiTxMsk.keyId <= 1){ -+ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); -+ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); -+ if (bPNOverflow){ -+ // Update MSK Notification. -+ WAPI_TRACE(WAPI_ERR,"===============>%s():multicast PN overflow\n",__FUNCTION__); -+ rtw_wapi_app_event_handler(padapter,NULL,0,pRA, false, false, true, 0, false); -+ } -+ }else{ -+ WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Multicast KeyIdx!!\n",__FUNCTION__); -+ ret = -3; -+ } -+ } -+ else{ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if(!memcmp(pWapiSta->PeerMacAddr,pRA,6)){ -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ if (bFindMatchPeer){ -+ if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)){ -+ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); -+ return -4; -+ } -+ if (pWapiSta->wapiUsk.keyId <= 1){ -+ if(pWapiSta->wapiUskUpdate.bTxEnable) -+ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; -+ else -+ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; -+ -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); -+ memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); -+ if (bPNOverflow){ -+ // Update USK Notification. -+ WAPI_TRACE(WAPI_ERR,"===============>%s():unicast PN overflow\n",__FUNCTION__); -+ rtw_wapi_app_event_handler(padapter,NULL,0,pWapiSta->PeerMacAddr, false, true, false, 0, false); -+ } -+ }else{ -+ WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Unicast KeyIdx!!\n",__FUNCTION__); -+ ret = -5; -+ } -+ } -+ else{ -+ WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta "MAC_FMT"!!\n",__FUNCTION__, MAC_ARG(pRA)); -+ ret = -6; -+ } -+ } -+ -+ WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len); -+ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); -+ return ret; -+#endif -+} -+ -+// WAPI SW Enc: must have done Coalesce! -+void SecSWSMS4Encryption( -+ _adapter *padapter, -+ u8 * pxmitframe -+ ) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 *pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE; -+ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; -+ -+ u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL; -+ u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16]; -+ u16 OutputLength; -+ -+ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); -+ -+ WAPI_TRACE(WAPI_TX,"hdrlen: %d \n",pattrib->hdrlen); -+ -+ return; -+ -+ DataOffset = pattrib->hdrlen + pattrib->iv_len; -+ -+ pRA = pframe + 4; -+ -+ -+ if( IS_MCAST(pRA) ){ -+ KeyIdx = pWapiInfo->wapiTxMsk.keyId; -+ pIV = pWapiInfo->lastTxMulticastPN; -+ pMicKey = pWapiInfo->wapiTxMsk.micKey; -+ pDataKey = pWapiInfo->wapiTxMsk.dataKey; -+ }else{ -+ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)){ -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ -+ if (bFindMatchPeer){ -+ if (pWapiSta->wapiUskUpdate.bTxEnable){ -+ KeyIdx = pWapiSta->wapiUskUpdate.keyId; -+ WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); -+ pIV = pWapiSta->lastTxUnicastPN; -+ pMicKey = pWapiSta->wapiUskUpdate.micKey; -+ pDataKey = pWapiSta->wapiUskUpdate.dataKey; -+ }else{ -+ KeyIdx = pWapiSta->wapiUsk.keyId; -+ WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); -+ pIV = pWapiSta->lastTxUnicastPN; -+ pMicKey = pWapiSta->wapiUsk.micKey; -+ pDataKey = pWapiSta->wapiUsk.dataKey; -+ } -+ }else{ -+ WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta!!\n",__FUNCTION__); -+ return; -+ } -+ }else{ -+ WAPI_TRACE(WAPI_ERR,"%s: wapiSTAUsedList is empty!!\n",__FUNCTION__); -+ return; -+ } -+ } -+ -+ SecPtr = pframe; -+ SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr+DataOffset), pattrib->pktlen, MicBuffer); -+ -+ WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len); -+ -+ memcpy(pframe+pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen-pattrib->icv_len, -+ (u8 *)MicBuffer, -+ padapter->wapiInfo.extra_postfix_len -+ ); -+ -+ -+ WapiSMS4Encryption(pDataKey, pIV, (SecPtr+DataOffset),pattrib->pktlen+pattrib->icv_len, (SecPtr+DataOffset), &OutputLength); -+ -+ WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption",pframe,pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen); -+ -+ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); -+} -+ -+u8 SecSWSMS4Decryption( -+ _adapter *padapter, -+ u8 *precv_frame, -+ struct recv_priv *precv_priv -+ ) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ struct recv_frame_hdr *precv_hdr; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false; -+ u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16]; -+ u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos; -+ u8 TID = 0; -+ u16 OutputLength, DataLen; -+ u8 bQosData; -+ struct sk_buff * pskb; -+ -+ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); -+ -+ return 0; -+ -+ precv_hdr = &((union recv_frame*)precv_frame)->u.hdr; -+ pskb = (struct sk_buff *)(precv_hdr->rx_data); -+ precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb); -+ WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __FUNCTION__,precv_hdr->bWapiCheckPNInDecrypt); -+ WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len); -+ -+ IVOffset = sMacHdrLng; -+ bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE; -+ if (bQosData){ -+ IVOffset += 2; -+ } -+ -+ //if(GetHTC()) -+ // IVOffset += 4; -+ -+ //IVOffset += SNAP_SIZE + sizeof(u16); -+ -+ DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len; -+ -+ pRA = pskb->data + 4; -+ pTA = pskb->data + 10; -+ KeyIdx = *(pskb->data + IVOffset); -+ pRecvPN = pskb->data + IVOffset + 2; -+ pSecData = pskb->data + DataOffset; -+ DataLen = pskb->len - DataOffset; -+ pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len; -+ TID = GetTid(pskb->data); -+ -+ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)){ -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ } -+ -+ if (!bFindMatchPeer){ -+ WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA)); -+ return false; -+ } -+ -+ if( IS_MCAST(pRA) ){ -+ WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__); -+ if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet){ -+ pLastRxPN = pWapiSta->lastRxMulticastPN; -+ if (!WapiComparePN(pRecvPN, pLastRxPN)){ -+ WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__); -+ WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16); -+ WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16); -+ return false; -+ } -+ -+ memcpy(pLastRxPN, pRecvPN, 16); -+ pMicKey = pWapiSta->wapiMsk.micKey; -+ pDataKey = pWapiSta->wapiMsk.dataKey; -+ }else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet){ -+ WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__); -+ bUseUpdatedKey = true; -+ memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16); -+ pMicKey = pWapiSta->wapiMskUpdate.micKey; -+ pDataKey = pWapiSta->wapiMskUpdate.dataKey; -+ }else{ -+ WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__,KeyIdx); -+ return false; -+ } -+ } -+ else{ -+ WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__); -+ if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet){ -+ WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__); -+ if(precv_hdr->bWapiCheckPNInDecrypt){ -+ if(GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE){ -+ WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS); -+ pLastRxPN = lastRxPNforQoS; -+ }else{ -+ pLastRxPN = pWapiSta->lastRxUnicastPN; -+ } -+ if (!WapiComparePN(pRecvPN, pLastRxPN)){ -+ return false; -+ } -+ if(bQosData){ -+ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); -+ }else{ -+ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); -+ } -+ }else{ -+ memcpy(precv_hdr->WapiTempPN,pRecvPN,16); -+ } -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) -+ { -+ if ((pRecvPN[0] & 0x1) == 0){ -+ WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__); -+ return false; -+ } -+ } -+ -+ pMicKey = pWapiSta->wapiUsk.micKey; -+ pDataKey = pWapiSta->wapiUsk.dataKey; -+ } -+ else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet ){ -+ WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__); -+ if(pWapiSta->bAuthenticatorInUpdata) -+ bUseUpdatedKey = true; -+ else -+ bUseUpdatedKey = false; -+ -+ if(bQosData){ -+ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); -+ }else{ -+ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); -+ } -+ pMicKey = pWapiSta->wapiUskUpdate.micKey; -+ pDataKey = pWapiSta->wapiUskUpdate.dataKey; -+ }else{ -+ WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId, pWapiSta->wapiUskUpdate.keyId); -+ //dump_buf(pskb->data,pskb->len); -+ return false; -+ } -+ } -+ -+ WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16); -+ WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16); -+ WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength); -+ -+ if (OutputLength != DataLen) -+ WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __FUNCTION__); -+ -+ WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len); -+ -+ DataLen -= padapter->wapiInfo.extra_postfix_len; -+ -+ SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer); -+ -+ WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN); -+ WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN); -+ -+ if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)){ -+ WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__); -+ if (bUseUpdatedKey){ -+ // delete the old key -+ if ( IS_MCAST(pRA) ){ -+ WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__); -+ pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId; -+ memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16); -+ memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16); -+ pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false; -+ }else{ -+ WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__); -+ pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId; -+ memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16); -+ memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16); -+ pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false; -+ } -+ } -+ }else{ -+ WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __FUNCTION__); -+ return false; -+ } -+ -+ pos = pskb->data; -+ memmove(pos+padapter->wapiInfo.extra_prefix_len, pos, IVOffset); -+ skb_pull(pskb, padapter->wapiInfo.extra_prefix_len); -+ -+ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); -+ -+ return true; -+} -+ -+u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ -+ u8 *pframe; -+ u32 res = _SUCCESS; -+ -+ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) -+ return _FAIL; -+ -+ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; -+ -+ SecSWSMS4Encryption(padapter, pxmitframe); -+ -+ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); -+ return res; -+} -+ -+u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ u8 *pframe; -+ u32 res = _SUCCESS; -+ -+ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) -+ { -+ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ -+ //drop packet when hw decrypt fail -+ //return tempraily -+ return _FAIL; -+ -+ //pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; -+ -+ if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) -+ { -+ WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n",__FUNCTION__); -+ return _FAIL; -+ } -+ -+ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); -+ return res; -+} -+ -+#else -+ -+u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__); -+ WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__); -+ return _SUCCESS; -+} -+ -+u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__); -+ WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__); -+ return _SUCCESS; -+} -+ -+#endif -+ -+#endif ++#ifdef CONFIG_WAPI_SUPPORT ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef CONFIG_WAPI_SW_SMS4 ++ ++#define WAPI_LITTLE_ENDIAN ++//#define BIG_ENDIAN ++#define ENCRYPT 0 ++#define DECRYPT 1 ++ ++ ++/********************************************************** ++ **********************************************************/ ++const u8 Sbox[256] = { ++0xd6,0x90,0xe9,0xfe,0xcc,0xe1,0x3d,0xb7,0x16,0xb6,0x14,0xc2,0x28,0xfb,0x2c,0x05, ++0x2b,0x67,0x9a,0x76,0x2a,0xbe,0x04,0xc3,0xaa,0x44,0x13,0x26,0x49,0x86,0x06,0x99, ++0x9c,0x42,0x50,0xf4,0x91,0xef,0x98,0x7a,0x33,0x54,0x0b,0x43,0xed,0xcf,0xac,0x62, ++0xe4,0xb3,0x1c,0xa9,0xc9,0x08,0xe8,0x95,0x80,0xdf,0x94,0xfa,0x75,0x8f,0x3f,0xa6, ++0x47,0x07,0xa7,0xfc,0xf3,0x73,0x17,0xba,0x83,0x59,0x3c,0x19,0xe6,0x85,0x4f,0xa8, ++0x68,0x6b,0x81,0xb2,0x71,0x64,0xda,0x8b,0xf8,0xeb,0x0f,0x4b,0x70,0x56,0x9d,0x35, ++0x1e,0x24,0x0e,0x5e,0x63,0x58,0xd1,0xa2,0x25,0x22,0x7c,0x3b,0x01,0x21,0x78,0x87, ++0xd4,0x00,0x46,0x57,0x9f,0xd3,0x27,0x52,0x4c,0x36,0x02,0xe7,0xa0,0xc4,0xc8,0x9e, ++0xea,0xbf,0x8a,0xd2,0x40,0xc7,0x38,0xb5,0xa3,0xf7,0xf2,0xce,0xf9,0x61,0x15,0xa1, ++0xe0,0xae,0x5d,0xa4,0x9b,0x34,0x1a,0x55,0xad,0x93,0x32,0x30,0xf5,0x8c,0xb1,0xe3, ++0x1d,0xf6,0xe2,0x2e,0x82,0x66,0xca,0x60,0xc0,0x29,0x23,0xab,0x0d,0x53,0x4e,0x6f, ++0xd5,0xdb,0x37,0x45,0xde,0xfd,0x8e,0x2f,0x03,0xff,0x6a,0x72,0x6d,0x6c,0x5b,0x51, ++0x8d,0x1b,0xaf,0x92,0xbb,0xdd,0xbc,0x7f,0x11,0xd9,0x5c,0x41,0x1f,0x10,0x5a,0xd8, ++0x0a,0xc1,0x31,0x88,0xa5,0xcd,0x7b,0xbd,0x2d,0x74,0xd0,0x12,0xb8,0xe5,0xb4,0xb0, ++0x89,0x69,0x97,0x4a,0x0c,0x96,0x77,0x7e,0x65,0xb9,0xf1,0x09,0xc5,0x6e,0xc6,0x84, ++0x18,0xf0,0x7d,0xec,0x3a,0xdc,0x4d,0x20,0x79,0xee,0x5f,0x3e,0xd7,0xcb,0x39,0x48 ++}; ++ ++const u32 CK[32] = { ++ 0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269, ++ 0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9, ++ 0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249, ++ 0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9, ++ 0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229, ++ 0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299, ++ 0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209, ++ 0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279 }; ++ ++#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y)))) ++ ++#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \ ++ Sbox[(_A) >> 16 & 0xFF] << 16 | \ ++ Sbox[(_A) >> 8 & 0xFF] << 8 | \ ++ Sbox[(_A) & 0xFF]) ++ ++#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24)) ++#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23)) ++ ++static void ++xor_block(void *dst, void *src1, void *src2) ++/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */ ++{ ++ ((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0]; ++ ((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1]; ++ ((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2]; ++ ((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3]; ++} ++ ++ ++void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk) ++{ ++ u32 r, mid, x0, x1, x2, x3, *p; ++ p = (u32 *)Input; ++ x0 = p[0]; ++ x1 = p[1]; ++ x2 = p[2]; ++ x3 = p[3]; ++#ifdef WAPI_LITTLE_ENDIAN ++ x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); ++ x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); ++ x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); ++ x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); ++#endif ++ for (r = 0; r < 32; r += 4) ++ { ++ mid = x1 ^ x2 ^ x3 ^ rk[r + 0]; ++ mid = ByteSub(mid); ++ x0 ^= L1(mid); ++ mid = x2 ^ x3 ^ x0 ^ rk[r + 1]; ++ mid = ByteSub(mid); ++ x1 ^= L1(mid); ++ mid = x3 ^ x0 ^ x1 ^ rk[r + 2]; ++ mid = ByteSub(mid); ++ x2 ^= L1(mid); ++ mid = x0 ^ x1 ^ x2 ^ rk[r + 3]; ++ mid = ByteSub(mid); ++ x3 ^= L1(mid); ++ } ++#ifdef WAPI_LITTLE_ENDIAN ++ x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); ++ x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); ++ x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); ++ x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); ++#endif ++ p = (u32 *)Output; ++ p[0] = x3; ++ p[1] = x2; ++ p[2] = x1; ++ p[3] = x0; ++} ++ ++ ++ ++void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag) ++{ ++ u32 r, mid, x0, x1, x2, x3, *p; ++ ++ p = (u32 *)Key; ++ x0 = p[0]; ++ x1 = p[1]; ++ x2 = p[2]; ++ x3 = p[3]; ++#ifdef WAPI_LITTLE_ENDIAN ++ x0 = Rotl(x0, 16); x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); ++ x1 = Rotl(x1, 16); x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); ++ x2 = Rotl(x2, 16); x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); ++ x3 = Rotl(x3, 16); x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); ++#endif ++ ++ x0 ^= 0xa3b1bac6; ++ x1 ^= 0x56aa3350; ++ x2 ^= 0x677d9197; ++ x3 ^= 0xb27022dc; ++ for (r = 0; r < 32; r += 4) ++ { ++ mid = x1 ^ x2 ^ x3 ^ CK[r + 0]; ++ mid = ByteSub(mid); ++ rk[r + 0] = x0 ^= L2(mid); ++ mid = x2 ^ x3 ^ x0 ^ CK[r + 1]; ++ mid = ByteSub(mid); ++ rk[r + 1] = x1 ^= L2(mid); ++ mid = x3 ^ x0 ^ x1 ^ CK[r + 2]; ++ mid = ByteSub(mid); ++ rk[r + 2] = x2 ^= L2(mid); ++ mid = x0 ^ x1 ^ x2 ^ CK[r + 3]; ++ mid = ByteSub(mid); ++ rk[r + 3] = x3 ^= L2(mid); ++ } ++ if (CryptFlag == DECRYPT) ++ { ++ for (r = 0; r < 16; r++) ++ mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid; ++ } ++} ++ ++ ++void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, ++ u8 *Output, u16 *OutputLength, u32 CryptFlag) ++{ ++ u32 blockNum,i,j, rk[32]; ++ u16 remainder; ++ u8 blockIn[16],blockOut[16], tempIV[16], k; ++ ++ *OutputLength = 0; ++ remainder = InputLength & 0x0F; ++ blockNum = InputLength >> 4; ++ if(remainder !=0) ++ blockNum++; ++ else ++ remainder = 16; ++ ++ for(k=0;k<16;k++) ++ tempIV[k] = IV[15-k]; ++ ++ memcpy(blockIn, tempIV, 16); ++ ++ SMS4KeyExt((u8 *)Key, rk,CryptFlag); ++ ++ for(i=0; i> 4; ++ ++ for(k=0;k<16;k++) ++ tempIV[k] = IV[15-k]; ++ ++ memcpy(BlockIn, tempIV, 16); ++ ++ SMS4KeyExt((u8 *)Key, rk, ENCRYPT); ++ ++ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); ++ ++ for(i=0; i> 4; ++ ++ for(i=0; i%s\n", __FUNCTION__); ++ ++ header = (struct ieee80211_hdr_3addr_qos *)pHeader; ++ memset(TempBuf, 0, 34); ++ memcpy(TempBuf, pHeader, 2); //FrameCtrl ++ pTemp = (u16*)TempBuf; ++ *pTemp &= 0xc78f; //bit4,5,6,11,12,13 ++ ++ memcpy((TempBuf+2), (pHeader+4), 12); //Addr1, Addr2 ++ memcpy((TempBuf+14), (pHeader+22), 2); // SeqCtrl ++ pTemp = (u16*)(TempBuf + 14); ++ *pTemp &= 0x000f; ++ ++ memcpy((TempBuf+16), (pHeader+16), 6); //Addr3 ++ ++ fc = le16_to_cpu(header->frame_ctl); ++ ++ ++ ++ if (GetFrDs((u16*)&fc) && GetToDs((u16 *)&fc)) ++ { ++ memcpy((TempBuf+22), (pHeader+24), 6); ++ QosOffset = 30; ++ }else{ ++ memset((TempBuf+22), 0, 6); ++ QosOffset = 24; ++ } ++ ++ if((fc & 0x0088) == 0x0088){ ++ memcpy((TempBuf+28), (pHeader+QosOffset), 2); ++ TempLen += 2; ++ //IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; ++ IV = pHeader + QosOffset + 2 + 2; ++ }else{ ++ IV = pHeader + QosOffset + 2; ++ //IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; ++ } ++ ++ TempBuf[TempLen-1] = (u8)(DataLen & 0xff); ++ TempBuf[TempLen-2] = (u8)((DataLen & 0xff00)>>8); ++ TempBuf[TempLen-4] = KeyIdx; ++ ++ WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16); ++ WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16); ++ WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen); ++ WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen); ++ ++ WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen, ++ pData, DataLen, MicBuffer, &MicLen); ++ ++ if (MicLen != 16) ++ WAPI_TRACE(WAPI_ERR,"%s: MIC Length Error!!\n",__FUNCTION__); ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "<=========%s\n", __FUNCTION__); ++#endif ++} ++ ++/* AddCount: 1 or 2. ++ * If overflow, return 1, ++ * else return 0. ++ */ ++u8 WapiIncreasePN(u8 *PN, u8 AddCount) ++{ ++ u8 i; ++ ++ if (NULL == PN) ++ return 1; ++ //YJ,test,091102 ++ /* ++ if(AddCount == 2){ ++ DBG_8192C("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]); ++ if(PN[0] == 0x48){ ++ PN[0] += AddCount; ++ return 1; ++ }else{ ++ PN[0] += AddCount; ++ return 0; ++ } ++ } ++ */ ++ //YJ,test,091102,end ++ ++ for (i=0; i<16; i++) ++ { ++ if (PN[i] + AddCount <= 0xff) ++ { ++ PN[i] += AddCount; ++ return 0; ++ } ++ else ++ { ++ PN[i] += AddCount; ++ AddCount = 1; ++ } ++ } ++ return 1; ++} ++ ++ ++void WapiGetLastRxUnicastPNForQoSData( ++ u8 UserPriority, ++ PRT_WAPI_STA_INFO pWapiStaInfo, ++ u8 *PNOut ++) ++{ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ switch(UserPriority) ++ { ++ case 0: ++ case 3: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBEQueue,16); ++ break; ++ case 1: ++ case 2: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBKQueue,16); ++ break; ++ case 4: ++ case 5: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVIQueue,16); ++ break; ++ case 6: ++ case 7: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVOQueue,16); ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); ++ break; ++ } ++ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); ++} ++ ++ ++void WapiSetLastRxUnicastPNForQoSData( ++ u8 UserPriority, ++ u8 *PNIn, ++ PRT_WAPI_STA_INFO pWapiStaInfo ++) ++{ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ switch(UserPriority) ++ { ++ case 0: ++ case 3: ++ memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue,PNIn,16); ++ break; ++ case 1: ++ case 2: ++ memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue,PNIn,16); ++ break; ++ case 4: ++ case 5: ++ memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue,PNIn,16); ++ break; ++ case 6: ++ case 7: ++ memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue,PNIn,16); ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); ++ break; ++ } ++ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); ++} ++ ++ ++/**************************************************************************** ++ FALSE not RX-Reorder ++ TRUE do RX Reorder ++add to support WAPI to N-mode ++*****************************************************************************/ ++u8 WapiCheckPnInSwDecrypt( ++ _adapter *padapter, ++ struct sk_buff *pskb ++) ++{ ++ u8 ret = false; ++ ++#if 0 ++ struct ieee80211_hdr_3addr_qos *header; ++ u16 fc; ++ u8 *pDaddr, *pTaddr, *pRaddr; ++ ++ header = (struct ieee80211_hdr_3addr_qos *)pskb->data; ++ pTaddr = header->addr2; ++ pRaddr = header->addr1; ++ fc = le16_to_cpu(header->frame_ctl); ++ ++ if(GetToDs(&fc)) ++ pDaddr = header->addr3; ++ else ++ pDaddr = header->addr1; ++ ++ if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0) ++ && ! (pDaddr) ++ && (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE)) ++ //&& ieee->pHTInfo->bCurrentHTSupport && ++ //ieee->pHTInfo->bCurRxReorderEnable) ++ ret = false; ++ else ++ ret = true; ++#endif ++ WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret); ++ return ret; ++} ++ ++int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe) ++{ ++ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; ++ u8 * frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET; ++ u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL; ++ u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0; ++ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ int ret = 0; ++ ++ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); ++ ++ return ret; ++#if 0 ++ hdr_len = sMacHdrLng; ++ if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) ++ { ++ hdr_len += 2; ++ } ++ //hdr_len += SNAP_SIZE + sizeof(u16); ++ ++ pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len); ++ memmove(pos, pos+padapter->wapiInfo.extra_prefix_len, hdr_len); ++ ++ pSecHeader = pskb->data + hdr_len; ++ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader; ++ pRA = pskb->data + 4; ++ ++ WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len); ++ ++ //Address 1 is always receiver's address ++ if( IS_MCAST(pRA) ){ ++ if(!pWapiInfo->wapiTxMsk.bTxEnable){ ++ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); ++ return -2; ++ } ++ if(pWapiInfo->wapiTxMsk.keyId <= 1){ ++ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); ++ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); ++ if (bPNOverflow){ ++ // Update MSK Notification. ++ WAPI_TRACE(WAPI_ERR,"===============>%s():multicast PN overflow\n",__FUNCTION__); ++ rtw_wapi_app_event_handler(padapter,NULL,0,pRA, false, false, true, 0, false); ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Multicast KeyIdx!!\n",__FUNCTION__); ++ ret = -3; ++ } ++ } ++ else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(!memcmp(pWapiSta->PeerMacAddr,pRA,6)){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ if (bFindMatchPeer){ ++ if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)){ ++ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); ++ return -4; ++ } ++ if (pWapiSta->wapiUsk.keyId <= 1){ ++ if(pWapiSta->wapiUskUpdate.bTxEnable) ++ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; ++ else ++ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; ++ ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); ++ memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); ++ if (bPNOverflow){ ++ // Update USK Notification. ++ WAPI_TRACE(WAPI_ERR,"===============>%s():unicast PN overflow\n",__FUNCTION__); ++ rtw_wapi_app_event_handler(padapter,NULL,0,pWapiSta->PeerMacAddr, false, true, false, 0, false); ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Unicast KeyIdx!!\n",__FUNCTION__); ++ ret = -5; ++ } ++ } ++ else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta "MAC_FMT"!!\n",__FUNCTION__, MAC_ARG(pRA)); ++ ret = -6; ++ } ++ } ++ ++ WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len); ++ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); ++ return ret; ++#endif ++} ++ ++// WAPI SW Enc: must have done Coalesce! ++void SecSWSMS4Encryption( ++ _adapter *padapter, ++ u8 * pxmitframe ++ ) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 *pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE; ++ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; ++ ++ u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL; ++ u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16]; ++ u16 OutputLength; ++ ++ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); ++ ++ WAPI_TRACE(WAPI_TX,"hdrlen: %d \n",pattrib->hdrlen); ++ ++ return; ++ ++ DataOffset = pattrib->hdrlen + pattrib->iv_len; ++ ++ pRA = pframe + 4; ++ ++ ++ if( IS_MCAST(pRA) ){ ++ KeyIdx = pWapiInfo->wapiTxMsk.keyId; ++ pIV = pWapiInfo->lastTxMulticastPN; ++ pMicKey = pWapiInfo->wapiTxMsk.micKey; ++ pDataKey = pWapiInfo->wapiTxMsk.dataKey; ++ }else{ ++ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ ++ if (bFindMatchPeer){ ++ if (pWapiSta->wapiUskUpdate.bTxEnable){ ++ KeyIdx = pWapiSta->wapiUskUpdate.keyId; ++ WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); ++ pIV = pWapiSta->lastTxUnicastPN; ++ pMicKey = pWapiSta->wapiUskUpdate.micKey; ++ pDataKey = pWapiSta->wapiUskUpdate.dataKey; ++ }else{ ++ KeyIdx = pWapiSta->wapiUsk.keyId; ++ WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); ++ pIV = pWapiSta->lastTxUnicastPN; ++ pMicKey = pWapiSta->wapiUsk.micKey; ++ pDataKey = pWapiSta->wapiUsk.dataKey; ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta!!\n",__FUNCTION__); ++ return; ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: wapiSTAUsedList is empty!!\n",__FUNCTION__); ++ return; ++ } ++ } ++ ++ SecPtr = pframe; ++ SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr+DataOffset), pattrib->pktlen, MicBuffer); ++ ++ WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len); ++ ++ memcpy(pframe+pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen-pattrib->icv_len, ++ (u8 *)MicBuffer, ++ padapter->wapiInfo.extra_postfix_len ++ ); ++ ++ ++ WapiSMS4Encryption(pDataKey, pIV, (SecPtr+DataOffset),pattrib->pktlen+pattrib->icv_len, (SecPtr+DataOffset), &OutputLength); ++ ++ WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption",pframe,pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen); ++ ++ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); ++} ++ ++u8 SecSWSMS4Decryption( ++ _adapter *padapter, ++ u8 *precv_frame, ++ struct recv_priv *precv_priv ++ ) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ struct recv_frame_hdr *precv_hdr; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false; ++ u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16]; ++ u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos; ++ u8 TID = 0; ++ u16 OutputLength, DataLen; ++ u8 bQosData; ++ struct sk_buff * pskb; ++ ++ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); ++ ++ return 0; ++ ++ precv_hdr = &((union recv_frame*)precv_frame)->u.hdr; ++ pskb = (struct sk_buff *)(precv_hdr->rx_data); ++ precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb); ++ WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __FUNCTION__,precv_hdr->bWapiCheckPNInDecrypt); ++ WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len); ++ ++ IVOffset = sMacHdrLng; ++ bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE; ++ if (bQosData){ ++ IVOffset += 2; ++ } ++ ++ //if(GetHTC()) ++ // IVOffset += 4; ++ ++ //IVOffset += SNAP_SIZE + sizeof(u16); ++ ++ DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len; ++ ++ pRA = pskb->data + 4; ++ pTA = pskb->data + 10; ++ KeyIdx = *(pskb->data + IVOffset); ++ pRecvPN = pskb->data + IVOffset + 2; ++ pSecData = pskb->data + DataOffset; ++ DataLen = pskb->len - DataOffset; ++ pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len; ++ TID = GetTid(pskb->data); ++ ++ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ } ++ ++ if (!bFindMatchPeer){ ++ WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA)); ++ return false; ++ } ++ ++ if( IS_MCAST(pRA) ){ ++ WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__); ++ if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet){ ++ pLastRxPN = pWapiSta->lastRxMulticastPN; ++ if (!WapiComparePN(pRecvPN, pLastRxPN)){ ++ WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__); ++ WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16); ++ WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16); ++ return false; ++ } ++ ++ memcpy(pLastRxPN, pRecvPN, 16); ++ pMicKey = pWapiSta->wapiMsk.micKey; ++ pDataKey = pWapiSta->wapiMsk.dataKey; ++ }else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet){ ++ WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__); ++ bUseUpdatedKey = true; ++ memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16); ++ pMicKey = pWapiSta->wapiMskUpdate.micKey; ++ pDataKey = pWapiSta->wapiMskUpdate.dataKey; ++ }else{ ++ WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__,KeyIdx); ++ return false; ++ } ++ } ++ else{ ++ WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__); ++ if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet){ ++ WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__); ++ if(precv_hdr->bWapiCheckPNInDecrypt){ ++ if(GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE){ ++ WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS); ++ pLastRxPN = lastRxPNforQoS; ++ }else{ ++ pLastRxPN = pWapiSta->lastRxUnicastPN; ++ } ++ if (!WapiComparePN(pRecvPN, pLastRxPN)){ ++ return false; ++ } ++ if(bQosData){ ++ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); ++ }else{ ++ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); ++ } ++ }else{ ++ memcpy(precv_hdr->WapiTempPN,pRecvPN,16); ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) ++ { ++ if ((pRecvPN[0] & 0x1) == 0){ ++ WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__); ++ return false; ++ } ++ } ++ ++ pMicKey = pWapiSta->wapiUsk.micKey; ++ pDataKey = pWapiSta->wapiUsk.dataKey; ++ } ++ else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet ){ ++ WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__); ++ if(pWapiSta->bAuthenticatorInUpdata) ++ bUseUpdatedKey = true; ++ else ++ bUseUpdatedKey = false; ++ ++ if(bQosData){ ++ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); ++ }else{ ++ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); ++ } ++ pMicKey = pWapiSta->wapiUskUpdate.micKey; ++ pDataKey = pWapiSta->wapiUskUpdate.dataKey; ++ }else{ ++ WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId, pWapiSta->wapiUskUpdate.keyId); ++ //dump_buf(pskb->data,pskb->len); ++ return false; ++ } ++ } ++ ++ WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16); ++ WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16); ++ WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength); ++ ++ if (OutputLength != DataLen) ++ WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __FUNCTION__); ++ ++ WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len); ++ ++ DataLen -= padapter->wapiInfo.extra_postfix_len; ++ ++ SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer); ++ ++ WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN); ++ WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN); ++ ++ if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)){ ++ WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__); ++ if (bUseUpdatedKey){ ++ // delete the old key ++ if ( IS_MCAST(pRA) ){ ++ WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__); ++ pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId; ++ memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16); ++ memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16); ++ pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false; ++ }else{ ++ WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__); ++ pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId; ++ memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16); ++ memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16); ++ pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false; ++ } ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __FUNCTION__); ++ return false; ++ } ++ ++ pos = pskb->data; ++ memmove(pos+padapter->wapiInfo.extra_prefix_len, pos, IVOffset); ++ skb_pull(pskb, padapter->wapiInfo.extra_prefix_len); ++ ++ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); ++ ++ return true; ++} ++ ++u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ ++ ++ u8 *pframe; ++ u32 res = _SUCCESS; ++ ++ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); ++ return _FAIL; ++ } ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return _FAIL; ++ ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++ ++ SecSWSMS4Encryption(padapter, pxmitframe); ++ ++ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); ++ return res; ++} ++ ++u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) ++{ ++ u8 *pframe; ++ u32 res = _SUCCESS; ++ ++ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); ++ return _FAIL; ++ } ++ ++ ++ //drop packet when hw decrypt fail ++ //return tempraily ++ return _FAIL; ++ ++ //pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ ++ if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) ++ { ++ WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n",__FUNCTION__); ++ return _FAIL; ++ } ++ ++ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); ++ return res; ++} ++ ++#else ++ ++u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ ++ WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__); ++ WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__); ++ return _SUCCESS; ++} ++ ++u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) ++{ ++ WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__); ++ WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__); ++ return _SUCCESS; ++} ++ ++#endif ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wlan_util.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wlan_util.c new file mode 100644 -index 000000000..347027167 +index 0000000..3470271 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_wlan_util.c @@ -0,0 +1,4735 @@ @@ -86875,7 +86892,7 @@ index 000000000..347027167 +#endif //CONFIG_PNO_SUPPORT diff --git a/drivers/net/wireless/realtek/rtl8189fs/core/rtw_xmit.c b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_xmit.c new file mode 100644 -index 000000000..04dedd3b0 +index 0000000..04dedd3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/core/rtw_xmit.c @@ -0,0 +1,5074 @@ @@ -91955,65120 +91972,65120 @@ index 000000000..04dedd3b0 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/HalPwrSeqCmd.c b/drivers/net/wireless/realtek/rtl8189fs/hal/HalPwrSeqCmd.c new file mode 100644 -index 000000000..6d063aa98 +index 0000000..732c4d8 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/HalPwrSeqCmd.c @@ -0,0 +1,183 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+/*++ -+Copyright (c) Realtek Semiconductor Corp. All rights reserved. -+ -+Module Name: -+ HalPwrSeqCmd.c -+ -+Abstract: -+ Implement HW Power sequence configuration CMD handling routine for Realtek devices. -+ -+Major Change History: -+ When Who What -+ ---------- --------------- ------------------------------- -+ 2011-10-26 Lucas Modify to be compatible with SD4-CE driver. -+ 2011-07-07 Roger Create. -+ -+--*/ -+#include -+ -+ -+// -+// Description: -+// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. -+// -+// Assumption: -+// We should follow specific format which was released from HW SD. -+// -+// 2011.07.07, added by Roger. -+// -+u8 HalPwrSeqCmdParsing( -+ PADAPTER padapter, -+ u8 CutVersion, -+ u8 FabVersion, -+ u8 InterfaceType, -+ WLAN_PWR_CFG PwrSeqCmd[]) -+{ -+ WLAN_PWR_CFG PwrCfgCmd = {0}; -+ u8 bPollingBit = _FALSE; -+ u32 AryIdx = 0; -+ u8 value = 0; -+ u32 offset = 0; -+ u32 pollingCount = 0; // polling autoload done. -+ u32 maxPollingCnt = 5000; -+ -+ do { -+ PwrCfgCmd = PwrSeqCmd[AryIdx]; -+ -+ RT_TRACE(_module_hal_init_c_ , _drv_info_, -+ ("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n", -+ GET_PWR_CFG_OFFSET(PwrCfgCmd), -+ GET_PWR_CFG_CUT_MASK(PwrCfgCmd), -+ GET_PWR_CFG_FAB_MASK(PwrCfgCmd), -+ GET_PWR_CFG_INTF_MASK(PwrCfgCmd), -+ GET_PWR_CFG_BASE(PwrCfgCmd), -+ GET_PWR_CFG_CMD(PwrCfgCmd), -+ GET_PWR_CFG_MASK(PwrCfgCmd), -+ GET_PWR_CFG_VALUE(PwrCfgCmd))); -+ -+ //2 Only Handle the command whose FAB, CUT, and Interface are matched -+ if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) && -+ (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) && -+ (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) -+ { -+ switch (GET_PWR_CFG_CMD(PwrCfgCmd)) -+ { -+ case PWR_CMD_READ: -+ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n")); -+ break; -+ -+ case PWR_CMD_WRITE: -+ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n")); -+ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); -+ -+#ifdef CONFIG_SDIO_HCI -+ // -+ // We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface -+ // 2011.07.07. -+ // -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) -+ { -+ // Read Back SDIO Local value -+ value = SdioLocalCmd52Read1Byte(padapter, offset); -+ -+ value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); -+ value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); -+ -+ // Write Back SDIO Local value -+ SdioLocalCmd52Write1Byte(padapter, offset, value); -+ } -+ else -+#endif -+ { -+#ifdef CONFIG_GSPI_HCI -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) -+ offset = SPI_LOCAL_OFFSET | offset; -+#endif -+ // Read the value from system register -+ value = rtw_read8(padapter, offset); -+ -+ value=value&(~(GET_PWR_CFG_MASK(PwrCfgCmd))); -+ value=value|(GET_PWR_CFG_VALUE(PwrCfgCmd)&GET_PWR_CFG_MASK(PwrCfgCmd)); -+ -+ // Write the value back to sytem register -+ rtw_write8(padapter, offset, value); -+ } -+ break; -+ -+ case PWR_CMD_POLLING: -+ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n")); -+ -+ bPollingBit = _FALSE; -+ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); -+#ifdef CONFIG_GSPI_HCI -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) -+ offset = SPI_LOCAL_OFFSET | offset; -+#endif -+ do { -+#ifdef CONFIG_SDIO_HCI -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) -+ value = SdioLocalCmd52Read1Byte(padapter, offset); -+ else -+#endif -+ value = rtw_read8(padapter, offset); -+ -+ value=value&GET_PWR_CFG_MASK(PwrCfgCmd); -+ if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd))) -+ bPollingBit = _TRUE; -+ else -+ rtw_udelay_os(10); -+ -+ if (pollingCount++ > maxPollingCnt) { -+ DBG_871X_LEVEL(_drv_err_, "HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value); -+ return _FALSE; -+ } -+ } while (!bPollingBit); -+ -+ break; -+ -+ case PWR_CMD_DELAY: -+ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n")); -+ if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) -+ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)); -+ else -+ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000); -+ break; -+ -+ case PWR_CMD_END: -+ // When this command is parsed, end the process -+ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n")); -+ return _TRUE; -+ break; -+ -+ default: -+ RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n")); -+ break; -+ } -+ } -+ -+ AryIdx++;//Add Array Index -+ }while(1); -+ -+ return _TRUE; -+} -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*++ ++Copyright (c) Realtek Semiconductor Corp. All rights reserved. ++ ++Module Name: ++ HalPwrSeqCmd.c ++ ++Abstract: ++ Implement HW Power sequence configuration CMD handling routine for Realtek devices. ++ ++Major Change History: ++ When Who What ++ ---------- --------------- ------------------------------- ++ 2011-10-26 Lucas Modify to be compatible with SD4-CE driver. ++ 2011-07-07 Roger Create. ++ ++--*/ ++#include ++ ++ ++// ++// Description: ++// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. ++// ++// Assumption: ++// We should follow specific format which was released from HW SD. ++// ++// 2011.07.07, added by Roger. ++// ++u8 HalPwrSeqCmdParsing( ++ PADAPTER padapter, ++ u8 CutVersion, ++ u8 FabVersion, ++ u8 InterfaceType, ++ WLAN_PWR_CFG PwrSeqCmd[]) ++{ ++ WLAN_PWR_CFG PwrCfgCmd = {0}; ++ u8 bPollingBit = _FALSE; ++ u32 AryIdx = 0; ++ u8 value = 0; ++ u32 offset = 0; ++ u32 pollingCount = 0; // polling autoload done. ++ u32 maxPollingCnt = 5000; ++ ++ do { ++ PwrCfgCmd = PwrSeqCmd[AryIdx]; ++ ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ++ ("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n", ++ GET_PWR_CFG_OFFSET(PwrCfgCmd), ++ GET_PWR_CFG_CUT_MASK(PwrCfgCmd), ++ GET_PWR_CFG_FAB_MASK(PwrCfgCmd), ++ GET_PWR_CFG_INTF_MASK(PwrCfgCmd), ++ GET_PWR_CFG_BASE(PwrCfgCmd), ++ GET_PWR_CFG_CMD(PwrCfgCmd), ++ GET_PWR_CFG_MASK(PwrCfgCmd), ++ GET_PWR_CFG_VALUE(PwrCfgCmd))); ++ ++ //2 Only Handle the command whose FAB, CUT, and Interface are matched ++ if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) && ++ (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) && ++ (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) ++ { ++ switch (GET_PWR_CFG_CMD(PwrCfgCmd)) ++ { ++ case PWR_CMD_READ: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n")); ++ break; ++ ++ case PWR_CMD_WRITE: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n")); ++ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); ++ ++#ifdef CONFIG_SDIO_HCI ++ // ++ // We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface ++ // 2011.07.07. ++ // ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ { ++ // Read Back SDIO Local value ++ value = SdioLocalCmd52Read1Byte(padapter, offset); ++ ++ value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); ++ value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); ++ ++ // Write Back SDIO Local value ++ SdioLocalCmd52Write1Byte(padapter, offset, value); ++ } ++ else ++#endif ++ { ++#ifdef CONFIG_GSPI_HCI ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ offset = SPI_LOCAL_OFFSET | offset; ++#endif ++ // Read the value from system register ++ value = rtw_read8(padapter, offset); ++ ++ value=value&(~(GET_PWR_CFG_MASK(PwrCfgCmd))); ++ value=value|(GET_PWR_CFG_VALUE(PwrCfgCmd)&GET_PWR_CFG_MASK(PwrCfgCmd)); ++ ++ // Write the value back to sytem register ++ rtw_write8(padapter, offset, value); ++ } ++ break; ++ ++ case PWR_CMD_POLLING: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n")); ++ ++ bPollingBit = _FALSE; ++ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); ++#ifdef CONFIG_GSPI_HCI ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ offset = SPI_LOCAL_OFFSET | offset; ++#endif ++ do { ++#ifdef CONFIG_SDIO_HCI ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ value = SdioLocalCmd52Read1Byte(padapter, offset); ++ else ++#endif ++ value = rtw_read8(padapter, offset); ++ ++ value=value&GET_PWR_CFG_MASK(PwrCfgCmd); ++ if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd))) ++ bPollingBit = _TRUE; ++ else ++ rtw_udelay_os(10); ++ ++ if (pollingCount++ > maxPollingCnt) { ++ DBG_871X_LEVEL(_drv_err_, "HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value); ++ return _FALSE; ++ } ++ } while (!bPollingBit); ++ ++ break; ++ ++ case PWR_CMD_DELAY: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n")); ++ if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) ++ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)); ++ else ++ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000); ++ break; ++ ++ case PWR_CMD_END: ++ // When this command is parsed, end the process ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n")); ++ return _TRUE; ++ break; ++ ++ default: ++ RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n")); ++ break; ++ } ++ } ++ ++ AryIdx++;//Add Array Index ++ }while(1); ++ ++ return _TRUE; ++} ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8188c2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8188c2Ant.c new file mode 100644 -index 000000000..59c2d4c7b +index 0000000..d8d4a11 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8188c2Ant.c @@ -0,0 +1,1987 @@ -+//============================================================ -+// Description: -+// -+// This file is for 92CE/92CU BT 1 Antenna Co-exist mechanism -+// -+// By cosa 02/11/2011 -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8188c2Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8188C_2ANT GLCoexDm8188c2Ant; -+static PCOEX_DM_8188C_2ANT pCoexDm=&GLCoexDm8188c2Ant; -+static COEX_STA_8188C_2ANT GLCoexSta8188c2Ant; -+static PCOEX_STA_8188C_2ANT pCoexSta=&GLCoexSta8188c2Ant; -+ -+//============================================================ -+// local function start with btdm_ -+//============================================================ -+u1Byte -+halbtc8188c2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+u1Byte -+halbtc8188c2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ u1Byte algorithm=BT_8188C_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ if(!pStackInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pStackInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(pStackInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n")); -+ algorithm = BT_8188C_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(numOfDiffProfile == 1) -+ { -+ if(pStackInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8188C_2ANT_COEX_ALGO_HID; -+ } -+ else if(pStackInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8188C_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pStackInfo->bPanExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n")); -+ algorithm = BT_8188C_2ANT_COEX_ALGO_PAN; -+ } -+ } -+ else -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8188C_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n")); -+ algorithm = BT_8188C_2ANT_COEX_ALGO_HID_PAN; -+ } -+ else if( pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n")); -+ algorithm = BT_8188C_2ANT_COEX_ALGO_PAN_A2DP; -+ } -+ } -+ } -+ return algorithm; -+} -+ -+VOID -+halbtc8188c2ant_SetFwBalance( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBalanceOn, -+ IN u1Byte ms0, -+ IN u1Byte ms1 -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ -+ if(bBalanceOn) -+ { -+ H2C_Parameter[2] = 1; -+ H2C_Parameter[1] = ms1; -+ H2C_Parameter[0] = ms0; -+ } -+ else -+ { -+ H2C_Parameter[2] = 0; -+ H2C_Parameter[1] = 0; -+ H2C_Parameter[0] = 0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", -+ bBalanceOn?"ON":"OFF", ms0, ms1, -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter); -+} -+ -+VOID -+halbtc8188c2ant_Balance( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bBalanceOn, -+ IN u1Byte ms0, -+ IN u1Byte ms1 -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n", -+ (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF"))); -+ pCoexDm->bCurBalanceOn = bBalanceOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn) -+ return; -+ } -+ halbtc8188c2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1); -+ -+ pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn; -+} -+ -+VOID -+halbtc8188c2ant_SetFwDiminishWifi( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bDacOn, -+ IN BOOLEAN bInterruptOn, -+ IN u1Byte fwDacSwingLvl, -+ IN BOOLEAN bNavOn -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ -+ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20)) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n")); -+ fwDacSwingLvl = 0x18; -+ } -+ -+ H2C_Parameter[2] = 0; -+ H2C_Parameter[1] = fwDacSwingLvl; -+ H2C_Parameter[0] = 0; -+ if(bDacOn) -+ { -+ H2C_Parameter[2] |= 0x01; //BIT0 -+ if(bInterruptOn) -+ { -+ H2C_Parameter[2] |= 0x02; //BIT1 -+ } -+ } -+ if(bNavOn) -+ { -+ H2C_Parameter[2] |= 0x08; //BIT3 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0xe=0x%x\n", -+ (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"), -+ (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]))); -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xe, 3, H2C_Parameter); -+} -+ -+VOID -+halbtc8188c2ant_DiminishWifi( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacOn, -+ IN BOOLEAN bInterruptOn, -+ IN u1Byte fwDacSwingLvl, -+ IN BOOLEAN bNavOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n", -+ (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF"))); -+ -+ pCoexDm->bCurDacOn = bDacOn; -+ pCoexDm->bCurInterruptOn = bInterruptOn; -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ pCoexDm->bCurNavOn = bNavOn; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) && -+ (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) && -+ (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) && -+ (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) ) -+ return; -+ } -+ halbtc8188c2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn); -+ -+ pCoexDm->bPreDacOn = pCoexDm->bCurDacOn; -+ pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn; -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+ pCoexDm->bPreNavOn = pCoexDm->bCurNavOn; -+} -+ -+VOID -+halbtc8188c2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0, 0xf); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8188c2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8188c2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8188c2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte tmpU1; -+ -+ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); -+ if(bLowPenaltyRa) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); -+ tmpU1 &= ~BIT2; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); -+ tmpU1 |= BIT2; -+ } -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); -+} -+ -+VOID -+halbtc8188c2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8188c2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8188c2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ u4Byte dacSwingLvl; -+ -+ if(bSwDacSwingOn) -+ { -+ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20)) -+ { -+ dacSwingLvl = 0x18; -+ } -+ else -+ { -+ dacSwingLvl = swDacSwingLvl; -+ } -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl); -+ } -+ else -+ { -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30); -+ } -+} -+ -+VOID -+halbtc8188c2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8188c2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8188c2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); -+ } -+} -+ -+VOID -+halbtc8188c2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8188c2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8188c2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4e1c0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4d1d0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4c1e0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4b1f0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4a200001); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x90000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x51000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x12000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x00255); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x641c0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x631d0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x621e0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x611f0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x60200001); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x32000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x71000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xb0000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xfc000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x10255); -+ } -+ -+ // set rssiAdjustVal for wifi module. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+ -+VOID -+halbtc8188c2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8188c2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8188c2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u4Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8188c2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u4Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8188c2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8188c2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw mechanism -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+} -+VOID -+halbtc8188c2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+ -+VOID -+halbtc8188c2ant_MonitorBtState( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN stateChange=FALSE; -+ u4Byte BT_Polling, Ratio_Act, Ratio_STA; -+ u4Byte BT_Active, BT_State; -+ u4Byte regBTActive=0, regBTState=0, regBTPolling=0; -+ u4Byte btBusyThresh=0; -+ u4Byte fwVer=0; -+ static BOOLEAN bBtBusyTraffic=FALSE; -+ BOOLEAN bRejApAggPkt=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer)); -+ if(fwVer < 62) -+ { -+ regBTActive = 0x488; -+ regBTState = 0x48c; -+ regBTPolling = 0x490; -+ } -+ else -+ { -+ regBTActive = 0x444; -+ regBTState = 0x448; -+ if(fwVer >= 74) -+ regBTPolling = 0x44c; -+ else -+ regBTPolling = 0x700; -+ } -+ btBusyThresh = 60; -+ -+ BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active)); -+ BT_Active = BT_Active & 0x00ffffff; -+ -+ BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State)); -+ BT_State = BT_State & 0x00ffffff; -+ -+ BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling)); -+ -+ if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) -+ return; -+ -+ // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running -+ // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f -+ // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to -+ // HW divide trap. -+ if (BT_Polling==0) -+ return; -+ -+ Ratio_Act = BT_Active*1000/BT_Polling; -+ Ratio_STA = BT_State*1000/BT_Polling; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA)); -+ -+ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ if(Ratio_STA < 60) // BT PAN idle -+ { -+ } -+ else -+ { -+ // Check if BT PAN (under BT 2.1) is uplink or downlink -+ if((Ratio_Act/Ratio_STA) < 2) -+ { // BT PAN Uplink -+ pCoexSta->bBtUplink = TRUE; -+ } -+ else -+ { // BT PAN downlink -+ pCoexSta->bBtUplink = FALSE; -+ } -+ } -+ } -+ -+ // Check BT is idle or not -+ if(!pBtCoexist->stackInfo.bBtLinkExist) -+ { -+ pCoexSta->bBtBusy = FALSE; -+ } -+ else -+ { -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ if(Ratio_Act<20) -+ { -+ pCoexSta->bBtBusy = FALSE; -+ } -+ else -+ { -+ pCoexSta->bBtBusy = TRUE; -+ } -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ if(Ratio_STA < btBusyThresh) -+ { -+ pCoexSta->bBtBusy = FALSE; -+ } -+ else -+ { -+ pCoexSta->bBtBusy = TRUE; -+ } -+ -+ if( (Ratio_STA < btBusyThresh) || -+ (Ratio_Act<180 && Ratio_STA<130) ) -+ { -+ pCoexSta->bA2dpBusy = FALSE; -+ } -+ else -+ { -+ pCoexSta->bA2dpBusy = TRUE; -+ } -+ } -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy); -+ -+ if(bBtBusyTraffic != pCoexSta->bBtBusy) -+ { // BT idle or BT non-idle -+ bBtBusyTraffic = pCoexSta->bBtBusy; -+ stateChange = TRUE; -+ } -+ -+ if(stateChange) -+ { -+ if(!pCoexSta->bBtBusy) -+ { -+ halbtc8188c2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ } -+ else -+ { -+ halbtc8188c2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ } -+ -+ if(stateChange) -+ { -+ bRejApAggPkt = pCoexSta->bBtBusy; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionA2dpBc4( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState; -+ u4Byte wifiBw, wifiTrafficDir; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ -+ if(pCoexSta->bBtBusy) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism first -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ } -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionA2dpBc8( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState; -+ u4Byte wifiBw, wifiTrafficDir; -+ BOOLEAN bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ if(pCoexSta->bA2dpBusy && bWifiBusy) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ -+ // fw mechanism first -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ } -+ else if(pCoexSta->bA2dpBusy) -+ { -+ // fw mechanism first -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionA2dpBc4(pBtCoexist); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionA2dpBc8(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionPanBc4( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ if(bBtHsOn) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ else -+ { -+ if(pCoexSta->bBtBusy && bWifiBusy) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ } -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+} -+ -+VOID -+halbtc8188c2ant_ActionPanBc8( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState; -+ u4Byte wifiBw, wifiTrafficDir; -+ s4Byte wifiRssi; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(bBtHsOn) -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+ else -+ { -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50); -+ -+ if(pCoexSta->bBtBusy && bWifiBusy) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ // fw mechanism first -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ } -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ } -+ else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) -+ { -+ // fw mechanism first -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); -+ -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); -+ else -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ // fw mechanism first -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); -+ -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ if(pCoexSta->bBtUplink) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); -+ } -+ else -+ { -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ } -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else if(pCoexSta->bBtBusy && !bWifiBusy && (wifiRssi < 30)) -+ { -+ // fw mechanism first -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionPan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionPanBc4(pBtCoexist); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionPanBc8(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte wifiBw, wifiTrafficDir; -+ BOOLEAN bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ if(BTC_WIFI_BW_LEGACY == wifiBw) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else if(!bWifiBusy) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+} -+ -+ -+VOID -+halbtc8188c2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState; -+ u4Byte wifiBw; -+ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ -+ // fw mechanism -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism first -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ // fw mechanism first -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionHidA2dpBc4( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState; -+ u4Byte wifiBw, wifiTrafficDir; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ -+ if(pCoexSta->bBtBusy) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism first -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x7, 0x20); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ } -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else -+ { -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ // fw mechanism first -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x7, 0x20); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+} -+VOID -+halbtc8188c2ant_ActionHidA2dpBc8( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState; -+ u4Byte wifiBw; -+ -+ if(pCoexSta->bBtBusy) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism first -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else -+ { -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ // fw mechanism -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionHidA2dpBc4(pBtCoexist); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionHidA2dpBc8(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionHidPanBc4( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u4Byte wifiBw, wifiTrafficDir; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(bBtHsOn) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ if(BTC_WIFI_BW_LEGACY == wifiBw) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(!bWifiBusy) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ } -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+} -+VOID -+halbtc8188c2ant_ActionHidPanBc8( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState; -+ u4Byte wifiBw, wifiTrafficDir; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!bBtHsOn) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); -+ if((pCoexSta->bBtBusy && bWifiBusy)) -+ { -+ // fw mechanism first -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); -+ } -+ else -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); -+ } -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+ else -+ { -+ if(BTC_INTF_USB == pBtCoexist->chipInterface) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ } -+ else -+ { -+ if(pCoexSta->bBtBusy) -+ { -+ // fw mechanism -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionHidPan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionHidPanBc4(pBtCoexist); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionHidPanBc8(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionPanA2dpBc4( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ if(bBtHsOn) -+ { -+ if(pCoexSta->bBtBusy) -+ { -+ // fw mechanism -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ if(pCoexSta->bBtBusy && bWifiBusy) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+} -+VOID -+halbtc8188c2ant_ActionPanA2dpBc8( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState; -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!bBtHsOn) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); -+ if((pCoexSta->bBtBusy && bWifiBusy)) -+ { -+ // fw mechanism first -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); -+ } -+ else -+ { -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); -+ } -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+ else -+ { -+ if(pCoexSta->bBtBusy) -+ { -+ // fw mechanism -+ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+} -+ -+VOID -+halbtc8188c2ant_ActionPanA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionPanA2dpBc4(pBtCoexist); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8188c2ant_ActionPanA2dpBc8(pBtCoexist); -+ } -+} -+ -+//============================================================ -+// extern function start with EXhalbtc8188c2ant_ -+//============================================================ -+VOID -+EXhalbtc8188c2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8188c2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0); -+ -+ if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || -+ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) -+ { -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp); -+ -+ halbtc8188c2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010); -+ } -+} -+ -+VOID -+EXhalbtc8188c2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8188c2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8188c2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pStackInfo->bProfileNotified) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8188c2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ //halbtc8188c2ant_InitCoexDm(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8188c2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ halbtc8188c2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ halbtc8188c2ant_InitCoexDm(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8188c2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8188c2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8188c2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+} -+ -+VOID -+EXhalbtc8188c2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8188c2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8188c2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ EXhalbtc8188c2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8188c2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte algorithm; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); -+ -+ // NOTE: -+ // sw mechanism must be done after fw mechanism -+ // -+ -+ if((BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || -+ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL); -+ -+ halbtc8188c2ant_MonitorBtState(pBtCoexist); -+ algorithm = halbtc8188c2ant_ActionAlgorithm(pBtCoexist); -+ pCoexDm->curAlgorithm = algorithm; -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8188C_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n")); -+ halbtc8188c2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8188C_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n")); -+ halbtc8188c2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8188C_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n")); -+ halbtc8188c2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8188C_2ANT_COEX_ALGO_PAN: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n")); -+ halbtc8188c2ant_ActionPan(pBtCoexist); -+ break; -+ case BT_8188C_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n")); -+ halbtc8188c2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ case BT_8188C_2ANT_COEX_ALGO_HID_PAN: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n")); -+ halbtc8188c2ant_ActionHidPan(pBtCoexist); -+ break; -+ case BT_8188C_2ANT_COEX_ALGO_PAN_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n")); -+ halbtc8188c2ant_ActionPanA2dp(pBtCoexist); -+ break; -+ default: -+ break; -+ } -+ } -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU BT 1 Antenna Co-exist mechanism ++// ++// By cosa 02/11/2011 ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8188c2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8188C_2ANT GLCoexDm8188c2Ant; ++static PCOEX_DM_8188C_2ANT pCoexDm=&GLCoexDm8188c2Ant; ++static COEX_STA_8188C_2ANT GLCoexSta8188c2Ant; ++static PCOEX_STA_8188C_2ANT pCoexSta=&GLCoexSta8188c2Ant; ++ ++//============================================================ ++// local function start with btdm_ ++//============================================================ ++u1Byte ++halbtc8188c2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++u1Byte ++halbtc8188c2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ u1Byte algorithm=BT_8188C_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pStackInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(pStackInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(numOfDiffProfile == 1) ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_PAN; ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_HID_PAN; ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_PAN_A2DP; ++ } ++ } ++ } ++ return algorithm; ++} ++ ++VOID ++halbtc8188c2ant_SetFwBalance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if(bBalanceOn) ++ { ++ H2C_Parameter[2] = 1; ++ H2C_Parameter[1] = ms1; ++ H2C_Parameter[0] = ms0; ++ } ++ else ++ { ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = 0; ++ H2C_Parameter[0] = 0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", ++ bBalanceOn?"ON":"OFF", ms0, ms1, ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8188c2ant_Balance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n", ++ (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF"))); ++ pCoexDm->bCurBalanceOn = bBalanceOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn) ++ return; ++ } ++ halbtc8188c2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1); ++ ++ pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn; ++} ++ ++VOID ++halbtc8188c2ant_SetFwDiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20)) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n")); ++ fwDacSwingLvl = 0x18; ++ } ++ ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = fwDacSwingLvl; ++ H2C_Parameter[0] = 0; ++ if(bDacOn) ++ { ++ H2C_Parameter[2] |= 0x01; //BIT0 ++ if(bInterruptOn) ++ { ++ H2C_Parameter[2] |= 0x02; //BIT1 ++ } ++ } ++ if(bNavOn) ++ { ++ H2C_Parameter[2] |= 0x08; //BIT3 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0xe=0x%x\n", ++ (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"), ++ (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]))); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xe, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8188c2ant_DiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n", ++ (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF"))); ++ ++ pCoexDm->bCurDacOn = bDacOn; ++ pCoexDm->bCurInterruptOn = bInterruptOn; ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ pCoexDm->bCurNavOn = bNavOn; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) && ++ (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) && ++ (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) && ++ (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) ) ++ return; ++ } ++ halbtc8188c2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn); ++ ++ pCoexDm->bPreDacOn = pCoexDm->bCurDacOn; ++ pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn; ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++ pCoexDm->bPreNavOn = pCoexDm->bCurNavOn; ++} ++ ++VOID ++halbtc8188c2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0, 0xf); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8188c2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8188c2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8188c2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8188c2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8188c2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ u4Byte dacSwingLvl; ++ ++ if(bSwDacSwingOn) ++ { ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20)) ++ { ++ dacSwingLvl = 0x18; ++ } ++ else ++ { ++ dacSwingLvl = swDacSwingLvl; ++ } ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30); ++ } ++} ++ ++VOID ++halbtc8188c2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8188c2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8188c2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); ++ } ++} ++ ++VOID ++halbtc8188c2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8188c2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8188c2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4e1c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4d1d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4c1e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4b1f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4a200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x90000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x51000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x12000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x00255); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x641c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x631d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x621e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x611f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x60200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x32000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x71000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xb0000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xfc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x10255); ++ } ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++ ++VOID ++halbtc8188c2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8188c2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8188c2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8188c2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8188c2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8188c2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8188c2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++ ++VOID ++halbtc8188c2ant_MonitorBtState( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN stateChange=FALSE; ++ u4Byte BT_Polling, Ratio_Act, Ratio_STA; ++ u4Byte BT_Active, BT_State; ++ u4Byte regBTActive=0, regBTState=0, regBTPolling=0; ++ u4Byte btBusyThresh=0; ++ u4Byte fwVer=0; ++ static BOOLEAN bBtBusyTraffic=FALSE; ++ BOOLEAN bRejApAggPkt=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer)); ++ if(fwVer < 62) ++ { ++ regBTActive = 0x488; ++ regBTState = 0x48c; ++ regBTPolling = 0x490; ++ } ++ else ++ { ++ regBTActive = 0x444; ++ regBTState = 0x448; ++ if(fwVer >= 74) ++ regBTPolling = 0x44c; ++ else ++ regBTPolling = 0x700; ++ } ++ btBusyThresh = 60; ++ ++ BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active)); ++ BT_Active = BT_Active & 0x00ffffff; ++ ++ BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State)); ++ BT_State = BT_State & 0x00ffffff; ++ ++ BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling)); ++ ++ if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) ++ return; ++ ++ // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running ++ // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f ++ // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to ++ // HW divide trap. ++ if (BT_Polling==0) ++ return; ++ ++ Ratio_Act = BT_Active*1000/BT_Polling; ++ Ratio_STA = BT_State*1000/BT_Polling; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA)); ++ ++ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < 60) // BT PAN idle ++ { ++ } ++ else ++ { ++ // Check if BT PAN (under BT 2.1) is uplink or downlink ++ if((Ratio_Act/Ratio_STA) < 2) ++ { // BT PAN Uplink ++ pCoexSta->bBtUplink = TRUE; ++ } ++ else ++ { // BT PAN downlink ++ pCoexSta->bBtUplink = FALSE; ++ } ++ } ++ } ++ ++ // Check BT is idle or not ++ if(!pBtCoexist->stackInfo.bBtLinkExist) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_Act<20) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < btBusyThresh) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ ++ if( (Ratio_STA < btBusyThresh) || ++ (Ratio_Act<180 && Ratio_STA<130) ) ++ { ++ pCoexSta->bA2dpBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bA2dpBusy = TRUE; ++ } ++ } ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy); ++ ++ if(bBtBusyTraffic != pCoexSta->bBtBusy) ++ { // BT idle or BT non-idle ++ bBtBusyTraffic = pCoexSta->bBtBusy; ++ stateChange = TRUE; ++ } ++ ++ if(stateChange) ++ { ++ if(!pCoexSta->bBtBusy) ++ { ++ halbtc8188c2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ } ++ else ++ { ++ halbtc8188c2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ } ++ ++ if(stateChange) ++ { ++ bRejApAggPkt = pCoexSta->bBtBusy; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ ++ if(pCoexSta->bBtBusy) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ if(pCoexSta->bA2dpBusy && bWifiBusy) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++ else if(pCoexSta->bA2dpBusy) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionA2dpBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPanBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ if(bBtHsOn) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++ ++VOID ++halbtc8188c2ant_ActionPanBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ s4Byte wifiRssi; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(bBtHsOn) ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50); ++ ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ } ++ else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ else ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(pCoexSta->bBtUplink) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ } ++ else ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else if(pCoexSta->bBtBusy && !bWifiBusy && (wifiRssi < 30)) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte wifiBw, wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(!bWifiBusy) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++ ++ ++VOID ++halbtc8188c2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ ++ if(pCoexSta->bBtBusy) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x7, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x7, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++VOID ++halbtc8188c2ant_ActionHidA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ if(pCoexSta->bBtBusy) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidA2dpBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidPanBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(bBtHsOn) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(!bWifiBusy) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ } ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8188c2ant_ActionHidPanBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(BTC_INTF_USB == pBtCoexist->chipInterface) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidPanBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidPanBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPanA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ if(bBtHsOn) ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++} ++VOID ++halbtc8188c2ant_ActionPanA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPanA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanA2dpBc8(pBtCoexist); ++ } ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8188c2ant_ ++//============================================================ ++VOID ++EXhalbtc8188c2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8188c2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0); ++ ++ if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || ++ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) ++ { ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8188c2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8188c2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8188c2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8188c2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ halbtc8188c2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++} ++ ++VOID ++EXhalbtc8188c2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8188c2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ EXhalbtc8188c2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8188c2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); ++ ++ // NOTE: ++ // sw mechanism must be done after fw mechanism ++ // ++ ++ if((BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || ++ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL); ++ ++ halbtc8188c2ant_MonitorBtState(pBtCoexist); ++ algorithm = halbtc8188c2ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8188C_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n")); ++ halbtc8188c2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n")); ++ halbtc8188c2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n")); ++ halbtc8188c2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n")); ++ halbtc8188c2ant_ActionPan(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n")); ++ halbtc8188c2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_HID_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n")); ++ halbtc8188c2ant_ActionHidPan(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_PAN_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n")); ++ halbtc8188c2ant_ActionPanA2dp(pBtCoexist); ++ break; ++ default: ++ break; ++ } ++ } ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8188c2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8188c2Ant.h new file mode 100644 -index 000000000..e4aa7152d +index 0000000..ce7ec56 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8188c2Ant.h @@ -0,0 +1,149 @@ -+//=========================================== -+// The following is for 8188C 2Ant BT Co-exist definition -+//=========================================== -+#define BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT 6 -+ -+typedef enum _BT_INFO_SRC_8188C_2ANT{ -+ BT_INFO_SRC_8188C_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8188C_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8188C_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8188C_2ANT_MAX -+}BT_INFO_SRC_8188C_2ANT,*PBT_INFO_SRC_8188C_2ANT; -+ -+typedef enum _BT_8188C_2ANT_BT_STATUS{ -+ BT_8188C_2ANT_BT_STATUS_IDLE = 0x0, -+ BT_8188C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8188C_2ANT_BT_STATUS_NON_IDLE = 0x2, -+ BT_8188C_2ANT_BT_STATUS_MAX -+}BT_8188C_2ANT_BT_STATUS,*PBT_8188C_2ANT_BT_STATUS; -+ -+typedef enum _BT_8188C_2ANT_COEX_ALGO{ -+ BT_8188C_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8188C_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8188C_2ANT_COEX_ALGO_HID = 0x2, -+ BT_8188C_2ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8188C_2ANT_COEX_ALGO_PAN = 0x4, -+ BT_8188C_2ANT_COEX_ALGO_HID_A2DP = 0x5, -+ BT_8188C_2ANT_COEX_ALGO_HID_PAN = 0x6, -+ BT_8188C_2ANT_COEX_ALGO_PAN_A2DP = 0x7, -+ BT_8188C_2ANT_COEX_ALGO_MAX -+}BT_8188C_2ANT_COEX_ALGO,*PBT_8188C_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8188C_2ANT{ -+ // fw mechanism -+ BOOLEAN bPreBalanceOn; -+ BOOLEAN bCurBalanceOn; -+ -+ // diminishWifi -+ BOOLEAN bPreDacOn; -+ BOOLEAN bCurDacOn; -+ BOOLEAN bPreInterruptOn; -+ BOOLEAN bCurInterruptOn; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bPreNavOn; -+ BOOLEAN bCurNavOn; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ //u4Byte preVal0x6c0; -+ //u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u4Byte preVal0x6cc; -+ u4Byte curVal0x6cc; -+ //BOOLEAN bLimitedDig; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ //u1Byte btStatus; -+ //u1Byte wifiChnlInfo[3]; -+} COEX_DM_8188C_2ANT, *PCOEX_DM_8188C_2ANT; -+ -+typedef struct _COEX_STA_8188C_2ANT{ -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bBtBusy; -+ BOOLEAN bBtUplink; -+ BOOLEAN bBtDownLink; -+ BOOLEAN bA2dpBusy; -+}COEX_STA_8188C_2ANT, *PCOEX_STA_8188C_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8188c2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8188c2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8188c2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8188c2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8188c2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8188c2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8188c2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8188c2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8188c2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8188c2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8188c2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8188c2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8188c2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); ++//=========================================== ++// The following is for 8188C 2Ant BT Co-exist definition ++//=========================================== ++#define BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT 6 ++ ++typedef enum _BT_INFO_SRC_8188C_2ANT{ ++ BT_INFO_SRC_8188C_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8188C_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8188C_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8188C_2ANT_MAX ++}BT_INFO_SRC_8188C_2ANT,*PBT_INFO_SRC_8188C_2ANT; ++ ++typedef enum _BT_8188C_2ANT_BT_STATUS{ ++ BT_8188C_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8188C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8188C_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8188C_2ANT_BT_STATUS_MAX ++}BT_8188C_2ANT_BT_STATUS,*PBT_8188C_2ANT_BT_STATUS; ++ ++typedef enum _BT_8188C_2ANT_COEX_ALGO{ ++ BT_8188C_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8188C_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8188C_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8188C_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8188C_2ANT_COEX_ALGO_PAN = 0x4, ++ BT_8188C_2ANT_COEX_ALGO_HID_A2DP = 0x5, ++ BT_8188C_2ANT_COEX_ALGO_HID_PAN = 0x6, ++ BT_8188C_2ANT_COEX_ALGO_PAN_A2DP = 0x7, ++ BT_8188C_2ANT_COEX_ALGO_MAX ++}BT_8188C_2ANT_COEX_ALGO,*PBT_8188C_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8188C_2ANT{ ++ // fw mechanism ++ BOOLEAN bPreBalanceOn; ++ BOOLEAN bCurBalanceOn; ++ ++ // diminishWifi ++ BOOLEAN bPreDacOn; ++ BOOLEAN bCurDacOn; ++ BOOLEAN bPreInterruptOn; ++ BOOLEAN bCurInterruptOn; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bPreNavOn; ++ BOOLEAN bCurNavOn; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ //u4Byte preVal0x6c0; ++ //u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u4Byte preVal0x6cc; ++ u4Byte curVal0x6cc; ++ //BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ //u1Byte btStatus; ++ //u1Byte wifiChnlInfo[3]; ++} COEX_DM_8188C_2ANT, *PCOEX_DM_8188C_2ANT; ++ ++typedef struct _COEX_STA_8188C_2ANT{ ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bBtBusy; ++ BOOLEAN bBtUplink; ++ BOOLEAN bBtDownLink; ++ BOOLEAN bA2dpBusy; ++}COEX_STA_8188C_2ANT, *PCOEX_STA_8188C_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8188c2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8188c2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8188c2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192d2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192d2Ant.c new file mode 100644 -index 000000000..0cb38ee7c +index 0000000..239c073 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192d2Ant.c @@ -0,0 +1,1992 @@ -+//============================================================ -+// Description: -+// -+// This file is for 92D BT 2 Antenna Co-exist mechanism -+// -+// By cosa 02/11/2011 -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8192d2Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8192D_2ANT GLCoexDm8192d2Ant; -+static PCOEX_DM_8192D_2ANT pCoexDm=&GLCoexDm8192d2Ant; -+static COEX_STA_8192D_2ANT GLCoexSta8192d2Ant; -+static PCOEX_STA_8192D_2ANT pCoexSta=&GLCoexSta8192d2Ant; -+ -+//============================================================ -+// local function start with btdm_ -+//============================================================ -+u1Byte -+halbtc8192d2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+u1Byte -+halbtc8192d2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8192D_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pStackInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pStackInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(pStackInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n")); -+ algorithm = BT_8192D_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(numOfDiffProfile == 1) -+ { -+ if(pStackInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8192D_2ANT_COEX_ALGO_HID; -+ } -+ else if(pStackInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8192D_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pStackInfo->bPanExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n")); -+ algorithm = BT_8192D_2ANT_COEX_ALGO_PAN; -+ } -+ } -+ else -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8192D_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n")); -+ algorithm = BT_8192D_2ANT_COEX_ALGO_HID_PAN; -+ } -+ else if( pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n")); -+ algorithm = BT_8192D_2ANT_COEX_ALGO_PAN_A2DP; -+ } -+ } -+ } -+ return algorithm; -+} -+ -+VOID -+halbtc8192d2ant_SetFwBalance( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBalanceOn, -+ IN u1Byte ms0, -+ IN u1Byte ms1 -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ -+ if(bBalanceOn) -+ { -+ H2C_Parameter[2] = 1; -+ H2C_Parameter[1] = ms1; -+ H2C_Parameter[0] = ms0; -+ } -+ else -+ { -+ H2C_Parameter[2] = 0; -+ H2C_Parameter[1] = 0; -+ H2C_Parameter[0] = 0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", -+ bBalanceOn?"ON":"OFF", ms0, ms1, -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter); -+} -+ -+VOID -+halbtc8192d2ant_Balance( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bBalanceOn, -+ IN u1Byte ms0, -+ IN u1Byte ms1 -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n", -+ (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF"))); -+ pCoexDm->bCurBalanceOn = bBalanceOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn) -+ return; -+ } -+ halbtc8192d2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1); -+ -+ pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn; -+} -+ -+VOID -+halbtc8192d2ant_SetFwDiminishWifi( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bDacOn, -+ IN BOOLEAN bInterruptOn, -+ IN u1Byte fwDacSwingLvl, -+ IN BOOLEAN bNavOn -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ -+ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20)) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n")); -+ fwDacSwingLvl = 0x18; -+ } -+ -+ H2C_Parameter[2] = 0; -+ H2C_Parameter[1] = fwDacSwingLvl; -+ H2C_Parameter[0] = 0; -+ if(bDacOn) -+ { -+ H2C_Parameter[2] |= 0x01; //BIT0 -+ if(bInterruptOn) -+ { -+ H2C_Parameter[2] |= 0x02; //BIT1 -+ } -+ } -+ if(bNavOn) -+ { -+ H2C_Parameter[2] |= 0x08; //BIT3 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0x12=0x%x\n", -+ (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"), -+ (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]))); -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x12, 3, H2C_Parameter); -+} -+ -+ -+VOID -+halbtc8192d2ant_DiminishWifi( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacOn, -+ IN BOOLEAN bInterruptOn, -+ IN u1Byte fwDacSwingLvl, -+ IN BOOLEAN bNavOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n", -+ (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF"))); -+ -+ pCoexDm->bCurDacOn = bDacOn; -+ pCoexDm->bCurInterruptOn = bInterruptOn; -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ pCoexDm->bCurNavOn = bNavOn; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) && -+ (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) && -+ (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) && -+ (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) ) -+ return; -+ } -+ halbtc8192d2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn); -+ -+ pCoexDm->bPreDacOn = pCoexDm->bCurDacOn; -+ pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn; -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+ pCoexDm->bPreNavOn = pCoexDm->bCurNavOn; -+} -+ -+VOID -+halbtc8192d2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf2ff7); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+ -+VOID -+halbtc8192d2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8192d2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8192d2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte tmpU1; -+ -+ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); -+ if(bLowPenaltyRa) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); -+ tmpU1 &= ~BIT2; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); -+ tmpU1 |= BIT2; -+ } -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); -+} -+ -+VOID -+halbtc8192d2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8192d2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ u4Byte dacSwingLvl; -+ -+ if(bSwDacSwingOn) -+ { -+ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20)) -+ { -+ dacSwingLvl = 0x18; -+ } -+ else -+ { -+ dacSwingLvl = swDacSwingLvl; -+ } -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl); -+ } -+ else -+ { -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30); -+ } -+} -+ -+VOID -+halbtc8192d2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8192d2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8192d2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); -+ } -+} -+ -+VOID -+halbtc8192d2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8192d2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8192d2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0xa99); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xd4000); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b000001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b010001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b020001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b030001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b040001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b050001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b060001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b070001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b080001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b090001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7a0C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x790D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x780E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x76100001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x75110001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x74120001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x73130001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x72140001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71150001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70160001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6f170001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e180001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d190001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4f1E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4e1F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4d200001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4c210001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4b220001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4a230001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49240001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48250001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47260001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46270001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45280001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44290001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x432A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x422B0001); -+ -+ rssiAdjustVal = 12; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30a99); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B000001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B010001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B020001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B030001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B040001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B050001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B060001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7A070001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x79080001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x78090001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x760B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x750C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x740D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x730E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x720F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71100001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70110001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6F120001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6E130001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6D140001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6C150001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6B160001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6A170001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x69180001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68190001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x671A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x661B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x651C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x641D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x631E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x621F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x61200001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x60210001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49220001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48230001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47240001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46250001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45260001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44270001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x43280001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x42290001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x412A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x402B0001); -+ } -+ -+ // set rssiAdjustVal for wifi module. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+ -+ -+VOID -+halbtc8192d2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8192d2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8192d2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u4Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8192d2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u4Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8192d2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8192d2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw mechanism -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+} -+VOID -+halbtc8192d2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+halbtc8192d2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte btActive -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtDisabled=FALSE, bForceToRoam=FALSE; -+ u4Byte u4Tmp=0; -+ -+ // This function check if bt is disabled -+ if(btActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ -+ bForceToRoam = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_FORCE_TO_ROAM, &bForceToRoam); -+ -+ bPreBtDisabled = bBtDisabled; -+ } -+} -+ -+VOID -+halbtc8192d2ant_MonitorBtState( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN stateChange=FALSE; -+ u4Byte BT_Polling, Ratio_Act, Ratio_STA; -+ u4Byte BT_Active, BT_State; -+ u4Byte regBTActive=0, regBTState=0, regBTPolling=0; -+ u4Byte btBusyThresh=0; -+ u4Byte fwVer=0; -+ static BOOLEAN bBtBusyTraffic=FALSE; -+ BOOLEAN bRejApAggPkt=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer)); -+ -+ regBTActive = 0x444; -+ regBTState = 0x448; -+ regBTPolling = 0x44c; -+ -+ btBusyThresh = 40; -+ -+ BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active)); -+ BT_Active = BT_Active & 0x00ffffff; -+ -+ BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State)); -+ BT_State = BT_State & 0x00ffffff; -+ -+ BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling)); -+ -+ if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) -+ return; -+ -+ // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running -+ // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f -+ // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to -+ // HW divide trap. -+ if (BT_Polling==0) -+ return; -+ -+ halbtc8192d2ant_MonitorBtEnableDisable(pBtCoexist, BT_Active); -+ -+ Ratio_Act = BT_Active*1000/BT_Polling; -+ Ratio_STA = BT_State*1000/BT_Polling; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA)); -+ -+ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ if(Ratio_STA < 60) // BT PAN idle -+ { -+ } -+ else -+ { -+ // Check if BT PAN (under BT 2.1) is uplink or downlink -+ if((Ratio_Act/Ratio_STA) < 2) -+ { // BT PAN Uplink -+ pCoexSta->bBtUplink = TRUE; -+ } -+ else -+ { // BT PAN downlink -+ pCoexSta->bBtUplink = FALSE; -+ } -+ } -+ } -+ -+ // Check BT is idle or not -+ if(!pBtCoexist->stackInfo.bBtLinkExist) -+ { -+ pCoexSta->bBtBusy = FALSE; -+ } -+ else -+ { -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ if(Ratio_Act<20) -+ { -+ pCoexSta->bBtBusy = FALSE; -+ } -+ else -+ { -+ pCoexSta->bBtBusy = TRUE; -+ } -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ if(Ratio_STA < btBusyThresh) -+ { -+ pCoexSta->bBtBusy = FALSE; -+ } -+ else -+ { -+ pCoexSta->bBtBusy = TRUE; -+ } -+ -+ if( (Ratio_STA < btBusyThresh) || -+ (Ratio_Act<180 && Ratio_STA<130) ) -+ { -+ pCoexSta->bA2dpBusy = FALSE; -+ } -+ else -+ { -+ pCoexSta->bA2dpBusy = TRUE; -+ } -+ } -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy); -+ -+ if(bBtBusyTraffic != pCoexSta->bBtBusy) -+ { // BT idle or BT non-idle -+ bBtBusyTraffic = pCoexSta->bBtBusy; -+ stateChange = TRUE; -+ } -+ -+ if(stateChange) -+ { -+ if(!pCoexSta->bBtBusy) -+ { -+ halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ } -+ else -+ { -+ halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ } -+ -+ if(stateChange) -+ { -+ bRejApAggPkt = pCoexSta->bBtBusy; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ } -+} -+ -+VOID -+halbtc8192d2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw, wifiTrafficDir; -+ BOOLEAN bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ if(pCoexSta->bA2dpBusy && bWifiBusy) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ } -+ else -+ { -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0); -+ } -+ } -+ -+ // fw mechanism first -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ } -+ else if(pCoexSta->bA2dpBusy) -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); -+ -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8192d2ant_ActionPan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState, wifiRssiState1; -+ u4Byte wifiBw, wifiTrafficDir; -+ s4Byte wifiRssi; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(bBtHsOn) -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+ else -+ { -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ } -+ else -+ { -+ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0); -+ } -+ -+ if(pCoexSta->bBtBusy && bWifiBusy) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ // fw mechanism first -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ } -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ } -+ else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); -+ -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); -+ else -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); -+ -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ if(pCoexSta->bBtUplink) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); -+ } -+ else -+ { -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ } -+ else -+ { -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ } -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else if(pCoexSta->bBtBusy && -+ !bWifiBusy && -+ (wifiRssi < 30)) -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+} -+ -+ -+VOID -+halbtc8192d2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiTrafficDir; -+ BOOLEAN bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 45, 0); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 20, 0); -+ } -+ -+ if(pCoexSta->bBtBusy && bWifiBusy) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ // fw mechanism first -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x15); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x30, FALSE); -+ } -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+} -+ -+ -+ -+VOID -+halbtc8192d2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState; -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+} -+ -+VOID -+halbtc8192d2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1; -+ u4Byte wifiBw; -+ -+ if(pCoexSta->bBtBusy) -+ { -+ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 35, 0); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism first -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else -+ { -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ // fw mechanism -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else -+ { -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ } -+ } -+ else -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+} -+ -+ -+VOID -+halbtc8192d2ant_ActionHidPanBc4( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u4Byte wifiBw, wifiTrafficDir; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(bBtHsOn) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ if(BTC_WIFI_BW_LEGACY == wifiBw) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else if(!bWifiBusy) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ } -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+} -+VOID -+halbtc8192d2ant_ActionHidPanBc8( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState; -+ u4Byte wifiBw, wifiTrafficDir; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!bBtHsOn) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); -+ if((pCoexSta->bBtBusy && bWifiBusy)) -+ { -+ // fw mechanism first -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); -+ } -+ else -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); -+ } -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+ else -+ { -+ if(BTC_INTF_USB == pBtCoexist->chipInterface) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ -+ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) -+ { -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ } -+ } -+ else -+ { -+ if(pCoexSta->bBtBusy) -+ { -+ // fw mechanism -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ } -+} -+ -+VOID -+halbtc8192d2ant_ActionHidPan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8192d2ant_ActionHidPanBc4(pBtCoexist); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8192d2ant_ActionHidPanBc8(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8192d2ant_ActionPanA2dpBc4( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); -+ if(bBtHsOn) -+ { -+ if(pCoexSta->bBtBusy) -+ { -+ // fw mechanism -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ if(pCoexSta->bBtBusy && bWifiBusy) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ } -+ else -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); -+ } -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+} -+VOID -+halbtc8192d2ant_ActionPanA2dpBc8( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; -+ u1Byte wifiRssiState; -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!bBtHsOn) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); -+ if((pCoexSta->bBtBusy && bWifiBusy)) -+ { -+ // fw mechanism first -+ if(pCoexSta->bBtUplink) -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); -+ } -+ else -+ { -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); -+ } -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+ else -+ { -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+ } -+ else -+ { -+ if(pCoexSta->bBtBusy) -+ { -+ // fw mechanism -+ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); -+ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); -+ -+ // sw mechanism -+ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); -+ } -+ else -+ { -+ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); -+ } -+ } -+} -+ -+VOID -+halbtc8192d2ant_ActionPanA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8192d2ant_ActionPanA2dpBc4(pBtCoexist); -+ } -+ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ halbtc8192d2ant_ActionPanA2dpBc8(pBtCoexist); -+ } -+} -+ -+BOOLEAN -+halbtc8192d2ant_IsBtCoexistEnter( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte macPhyMode; -+ BOOLEAN bRet=TRUE; -+ BOOLEAN bWifiUnder5G=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_MAC_PHY_MODE, &macPhyMode); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ -+ if(BTC_SMSP != macPhyMode) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Only support single mac single phy!!\n")); -+ bRet = FALSE; -+ } -+ -+ if(bWifiUnder5G) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under 5G or A band\n")); -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ bRet = FALSE; -+ } -+ -+ return bRet; -+} -+ -+//============================================================ -+// extern function start with EXhalbtc8192d2ant_ -+//============================================================ -+VOID -+EXhalbtc8192d2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8192d2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || -+ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) -+ { -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp); -+ -+ halbtc8192d2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010); -+ -+ // switch control, here we set pathA to control -+ // 0x878[13] = 1, 0:pathB, 1:pathA(default) -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x878, BIT13, 0x1); -+ -+ // antsel control, here we use phy0 and enable antsel. -+ // 0x87c[16:15] = b'11, enable antsel, antsel output pin -+ // 0x87c[30] = 0, 0: phy0, 1:phy 1 -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x87c, bMaskDWord, 0x1fff8); -+ -+ // antsel to Bt or Wifi, it depends Bt on/off. -+ // 0x860[9:8] = 'b10, b10:Bt On, WL2G off(default), b01:Bt off, WL2G on. -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x860, BIT9|BIT8, 0x2); -+ -+ // sw/hw control switch, here we set sw control -+ // 0x870[9:8] = 'b11 sw control, 'b00 hw control -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x870, BIT9|BIT8, 0x3); -+ } -+} -+ -+VOID -+EXhalbtc8192d2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8192d2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8192d2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pStackInfo->bProfileNotified) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8192d2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ //halbtc8192d2ant_InitCoexDm(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8192d2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ halbtc8192d2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ halbtc8192d2ant_InitCoexDm(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8192d2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8192d2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8192d2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8192d2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8192d2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8192d2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8192d2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte algorithm; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); -+ -+ // NOTE: -+ // sw mechanism must be done after fw mechanism -+ // -+ if(!halbtc8192d2ant_IsBtCoexistEnter(pBtCoexist)) -+ return; -+ -+ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL); -+ -+ halbtc8192d2ant_MonitorBtState(pBtCoexist); -+ algorithm = halbtc8192d2ant_ActionAlgorithm(pBtCoexist); -+ pCoexDm->curAlgorithm = algorithm; -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8192D_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n")); -+ halbtc8192d2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8192D_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n")); -+ halbtc8192d2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8192D_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n")); -+ halbtc8192d2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8192D_2ANT_COEX_ALGO_PAN: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n")); -+ halbtc8192d2ant_ActionPan(pBtCoexist); -+ break; -+ case BT_8192D_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n")); -+ halbtc8192d2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ case BT_8192D_2ANT_COEX_ALGO_HID_PAN: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n")); -+ halbtc8192d2ant_ActionHidPan(pBtCoexist); -+ break; -+ case BT_8192D_2ANT_COEX_ALGO_PAN_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n")); -+ halbtc8192d2ant_ActionPanA2dp(pBtCoexist); -+ break; -+ default: -+ break; -+ } -+ } -+} -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for 92D BT 2 Antenna Co-exist mechanism ++// ++// By cosa 02/11/2011 ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8192d2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8192D_2ANT GLCoexDm8192d2Ant; ++static PCOEX_DM_8192D_2ANT pCoexDm=&GLCoexDm8192d2Ant; ++static COEX_STA_8192D_2ANT GLCoexSta8192d2Ant; ++static PCOEX_STA_8192D_2ANT pCoexSta=&GLCoexSta8192d2Ant; ++ ++//============================================================ ++// local function start with btdm_ ++//============================================================ ++u1Byte ++halbtc8192d2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++u1Byte ++halbtc8192d2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8192D_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pStackInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(pStackInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(numOfDiffProfile == 1) ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_PAN; ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_HID_PAN; ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_PAN_A2DP; ++ } ++ } ++ } ++ return algorithm; ++} ++ ++VOID ++halbtc8192d2ant_SetFwBalance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if(bBalanceOn) ++ { ++ H2C_Parameter[2] = 1; ++ H2C_Parameter[1] = ms1; ++ H2C_Parameter[0] = ms0; ++ } ++ else ++ { ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = 0; ++ H2C_Parameter[0] = 0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", ++ bBalanceOn?"ON":"OFF", ms0, ms1, ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8192d2ant_Balance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n", ++ (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF"))); ++ pCoexDm->bCurBalanceOn = bBalanceOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn) ++ return; ++ } ++ halbtc8192d2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1); ++ ++ pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn; ++} ++ ++VOID ++halbtc8192d2ant_SetFwDiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20)) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n")); ++ fwDacSwingLvl = 0x18; ++ } ++ ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = fwDacSwingLvl; ++ H2C_Parameter[0] = 0; ++ if(bDacOn) ++ { ++ H2C_Parameter[2] |= 0x01; //BIT0 ++ if(bInterruptOn) ++ { ++ H2C_Parameter[2] |= 0x02; //BIT1 ++ } ++ } ++ if(bNavOn) ++ { ++ H2C_Parameter[2] |= 0x08; //BIT3 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0x12=0x%x\n", ++ (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"), ++ (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]))); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x12, 3, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8192d2ant_DiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n", ++ (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF"))); ++ ++ pCoexDm->bCurDacOn = bDacOn; ++ pCoexDm->bCurInterruptOn = bInterruptOn; ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ pCoexDm->bCurNavOn = bNavOn; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) && ++ (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) && ++ (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) && ++ (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) ) ++ return; ++ } ++ halbtc8192d2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn); ++ ++ pCoexDm->bPreDacOn = pCoexDm->bCurDacOn; ++ pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn; ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++ pCoexDm->bPreNavOn = pCoexDm->bCurNavOn; ++} ++ ++VOID ++halbtc8192d2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf2ff7); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8192d2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8192d2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8192d2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8192d2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8192d2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ u4Byte dacSwingLvl; ++ ++ if(bSwDacSwingOn) ++ { ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20)) ++ { ++ dacSwingLvl = 0x18; ++ } ++ else ++ { ++ dacSwingLvl = swDacSwingLvl; ++ } ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30); ++ } ++} ++ ++VOID ++halbtc8192d2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8192d2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8192d2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); ++ } ++} ++ ++VOID ++halbtc8192d2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8192d2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8192d2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0xa99); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xd4000); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b000001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b010001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b020001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b030001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b040001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b050001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b060001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b070001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b080001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b090001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7a0C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x790D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x780E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x76100001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x75110001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x74120001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x73130001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x72140001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71150001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70160001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6f170001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e180001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d190001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4f1E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4e1F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4d200001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4c210001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4b220001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4a230001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49240001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48250001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47260001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46270001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45280001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44290001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x432A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x422B0001); ++ ++ rssiAdjustVal = 12; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30a99); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B000001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B010001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B020001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B030001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B040001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B050001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B060001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7A070001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x79080001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x78090001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x760B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x750C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x740D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x730E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x720F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71100001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70110001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6F120001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6E130001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6D140001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6C150001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6B160001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6A170001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x69180001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68190001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x671A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x661B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x651C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x641D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x631E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x621F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x61200001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x60210001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49220001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48230001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47240001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46250001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45260001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44270001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x43280001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x42290001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x412A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x402B0001); ++ } ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++ ++ ++VOID ++halbtc8192d2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8192d2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8192d2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8192d2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8192d2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8192d2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8192d2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++halbtc8192d2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte btActive ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtDisabled=FALSE, bForceToRoam=FALSE; ++ u4Byte u4Tmp=0; ++ ++ // This function check if bt is disabled ++ if(btActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ ++ bForceToRoam = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_FORCE_TO_ROAM, &bForceToRoam); ++ ++ bPreBtDisabled = bBtDisabled; ++ } ++} ++ ++VOID ++halbtc8192d2ant_MonitorBtState( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN stateChange=FALSE; ++ u4Byte BT_Polling, Ratio_Act, Ratio_STA; ++ u4Byte BT_Active, BT_State; ++ u4Byte regBTActive=0, regBTState=0, regBTPolling=0; ++ u4Byte btBusyThresh=0; ++ u4Byte fwVer=0; ++ static BOOLEAN bBtBusyTraffic=FALSE; ++ BOOLEAN bRejApAggPkt=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer)); ++ ++ regBTActive = 0x444; ++ regBTState = 0x448; ++ regBTPolling = 0x44c; ++ ++ btBusyThresh = 40; ++ ++ BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active)); ++ BT_Active = BT_Active & 0x00ffffff; ++ ++ BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State)); ++ BT_State = BT_State & 0x00ffffff; ++ ++ BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling)); ++ ++ if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) ++ return; ++ ++ // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running ++ // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f ++ // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to ++ // HW divide trap. ++ if (BT_Polling==0) ++ return; ++ ++ halbtc8192d2ant_MonitorBtEnableDisable(pBtCoexist, BT_Active); ++ ++ Ratio_Act = BT_Active*1000/BT_Polling; ++ Ratio_STA = BT_State*1000/BT_Polling; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA)); ++ ++ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < 60) // BT PAN idle ++ { ++ } ++ else ++ { ++ // Check if BT PAN (under BT 2.1) is uplink or downlink ++ if((Ratio_Act/Ratio_STA) < 2) ++ { // BT PAN Uplink ++ pCoexSta->bBtUplink = TRUE; ++ } ++ else ++ { // BT PAN downlink ++ pCoexSta->bBtUplink = FALSE; ++ } ++ } ++ } ++ ++ // Check BT is idle or not ++ if(!pBtCoexist->stackInfo.bBtLinkExist) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_Act<20) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < btBusyThresh) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ ++ if( (Ratio_STA < btBusyThresh) || ++ (Ratio_Act<180 && Ratio_STA<130) ) ++ { ++ pCoexSta->bA2dpBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bA2dpBusy = TRUE; ++ } ++ } ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy); ++ ++ if(bBtBusyTraffic != pCoexSta->bBtBusy) ++ { // BT idle or BT non-idle ++ bBtBusyTraffic = pCoexSta->bBtBusy; ++ stateChange = TRUE; ++ } ++ ++ if(stateChange) ++ { ++ if(!pCoexSta->bBtBusy) ++ { ++ halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ } ++ else ++ { ++ halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ } ++ ++ if(stateChange) ++ { ++ bRejApAggPkt = pCoexSta->bBtBusy; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw, wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ if(pCoexSta->bA2dpBusy && bWifiBusy) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ } ++ else ++ { ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0); ++ } ++ } ++ ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++ else if(pCoexSta->bA2dpBusy) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw, wifiTrafficDir; ++ s4Byte wifiRssi; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(bBtHsOn) ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ else ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ } ++ else ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0); ++ } ++ ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ } ++ else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ else ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(pCoexSta->bBtUplink) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ } ++ else ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else if(pCoexSta->bBtBusy && ++ !bWifiBusy && ++ (wifiRssi < 30)) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8192d2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 45, 0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 20, 0); ++ } ++ ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x15); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x30, FALSE); ++ } ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++ ++ ++VOID ++halbtc8192d2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(pCoexSta->bBtBusy) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 35, 0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++ ++VOID ++halbtc8192d2ant_ActionHidPanBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(bBtHsOn) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(!bWifiBusy) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ } ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8192d2ant_ActionHidPanBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(BTC_INTF_USB == pBtCoexist->chipInterface) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionHidPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionHidPanBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionHidPanBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionPanA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ if(bBtHsOn) ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++} ++VOID ++halbtc8192d2ant_ActionPanA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionPanA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionPanA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionPanA2dpBc8(pBtCoexist); ++ } ++} ++ ++BOOLEAN ++halbtc8192d2ant_IsBtCoexistEnter( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte macPhyMode; ++ BOOLEAN bRet=TRUE; ++ BOOLEAN bWifiUnder5G=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_MAC_PHY_MODE, &macPhyMode); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ ++ if(BTC_SMSP != macPhyMode) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Only support single mac single phy!!\n")); ++ bRet = FALSE; ++ } ++ ++ if(bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under 5G or A band\n")); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ bRet = FALSE; ++ } ++ ++ return bRet; ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8192d2ant_ ++//============================================================ ++VOID ++EXhalbtc8192d2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8192d2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || ++ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) ++ { ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010); ++ ++ // switch control, here we set pathA to control ++ // 0x878[13] = 1, 0:pathB, 1:pathA(default) ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x878, BIT13, 0x1); ++ ++ // antsel control, here we use phy0 and enable antsel. ++ // 0x87c[16:15] = b'11, enable antsel, antsel output pin ++ // 0x87c[30] = 0, 0: phy0, 1:phy 1 ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x87c, bMaskDWord, 0x1fff8); ++ ++ // antsel to Bt or Wifi, it depends Bt on/off. ++ // 0x860[9:8] = 'b10, b10:Bt On, WL2G off(default), b01:Bt off, WL2G on. ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x860, BIT9|BIT8, 0x2); ++ ++ // sw/hw control switch, here we set sw control ++ // 0x870[9:8] = 'b11 sw control, 'b00 hw control ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x870, BIT9|BIT8, 0x3); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8192d2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8192d2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8192d2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8192d2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ halbtc8192d2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8192d2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8192d2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); ++ ++ // NOTE: ++ // sw mechanism must be done after fw mechanism ++ // ++ if(!halbtc8192d2ant_IsBtCoexistEnter(pBtCoexist)) ++ return; ++ ++ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL); ++ ++ halbtc8192d2ant_MonitorBtState(pBtCoexist); ++ algorithm = halbtc8192d2ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8192D_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n")); ++ halbtc8192d2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n")); ++ halbtc8192d2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n")); ++ halbtc8192d2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n")); ++ halbtc8192d2ant_ActionPan(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n")); ++ halbtc8192d2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_HID_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n")); ++ halbtc8192d2ant_ActionHidPan(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_PAN_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n")); ++ halbtc8192d2ant_ActionPanA2dp(pBtCoexist); ++ break; ++ default: ++ break; ++ } ++ } ++} ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192d2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192d2Ant.h new file mode 100644 -index 000000000..f3862b33e +index 0000000..85fd674 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192d2Ant.h @@ -0,0 +1,170 @@ -+//=========================================== -+// The following is for 8192D 2Ant BT Co-exist definition -+//=========================================== -+#define BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT 6 -+ -+typedef enum _BT_INFO_SRC_8192D_2ANT{ -+ BT_INFO_SRC_8192D_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8192D_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8192D_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8192D_2ANT_MAX -+}BT_INFO_SRC_8192D_2ANT,*PBT_INFO_SRC_8192D_2ANT; -+ -+typedef enum _BT_8192D_2ANT_BT_STATUS{ -+ BT_8192D_2ANT_BT_STATUS_IDLE = 0x0, -+ BT_8192D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8192D_2ANT_BT_STATUS_NON_IDLE = 0x2, -+ BT_8192D_2ANT_BT_STATUS_MAX -+}BT_8192D_2ANT_BT_STATUS,*PBT_8192D_2ANT_BT_STATUS; -+ -+typedef enum _BT_8192D_2ANT_COEX_ALGO{ -+ BT_8192D_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8192D_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8192D_2ANT_COEX_ALGO_HID = 0x2, -+ BT_8192D_2ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8192D_2ANT_COEX_ALGO_PAN = 0x4, -+ BT_8192D_2ANT_COEX_ALGO_HID_A2DP = 0x5, -+ BT_8192D_2ANT_COEX_ALGO_HID_PAN = 0x6, -+ BT_8192D_2ANT_COEX_ALGO_PAN_A2DP = 0x7, -+ BT_8192D_2ANT_COEX_ALGO_MAX -+}BT_8192D_2ANT_COEX_ALGO,*PBT_8192D_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8192D_2ANT{ -+ // fw mechanism -+ BOOLEAN bPreBalanceOn; -+ BOOLEAN bCurBalanceOn; -+ -+ // diminishWifi -+ BOOLEAN bPreDacOn; -+ BOOLEAN bCurDacOn; -+ BOOLEAN bPreInterruptOn; -+ BOOLEAN bCurInterruptOn; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bPreNavOn; -+ BOOLEAN bCurNavOn; -+ -+ -+ -+ -+ -+ //BOOLEAN bPreDecBtPwr; -+ //BOOLEAN bCurDecBtPwr; -+ -+ //u1Byte preFwDacSwingLvl; -+ //u1Byte curFwDacSwingLvl; -+ //BOOLEAN bCurIgnoreWlanAct; -+ //BOOLEAN bPreIgnoreWlanAct; -+ //u1Byte prePsTdma; -+ //u1Byte curPsTdma; -+ //u1Byte psTdmaPara[5]; -+ //u1Byte psTdmaDuAdjType; -+ //BOOLEAN bResetTdmaAdjust; -+ //BOOLEAN bPrePsTdmaOn; -+ //BOOLEAN bCurPsTdmaOn; -+ //BOOLEAN bPreBtAutoReport; -+ //BOOLEAN bCurBtAutoReport; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ //u4Byte preVal0x6c0; -+ //u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u4Byte preVal0x6cc; -+ u4Byte curVal0x6cc; -+ //BOOLEAN bLimitedDig; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ //u1Byte btStatus; -+ //u1Byte wifiChnlInfo[3]; -+} COEX_DM_8192D_2ANT, *PCOEX_DM_8192D_2ANT; -+ -+typedef struct _COEX_STA_8192D_2ANT{ -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bBtBusy; -+ BOOLEAN bBtUplink; -+ BOOLEAN bBtDownLink; -+ BOOLEAN bA2dpBusy; -+}COEX_STA_8192D_2ANT, *PCOEX_STA_8192D_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8192d2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192d2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8192d2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192d2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192d2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192d2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192d2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192d2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192d2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192d2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192d2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192d2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8192d2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); ++//=========================================== ++// The following is for 8192D 2Ant BT Co-exist definition ++//=========================================== ++#define BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT 6 ++ ++typedef enum _BT_INFO_SRC_8192D_2ANT{ ++ BT_INFO_SRC_8192D_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8192D_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8192D_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8192D_2ANT_MAX ++}BT_INFO_SRC_8192D_2ANT,*PBT_INFO_SRC_8192D_2ANT; ++ ++typedef enum _BT_8192D_2ANT_BT_STATUS{ ++ BT_8192D_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8192D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8192D_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8192D_2ANT_BT_STATUS_MAX ++}BT_8192D_2ANT_BT_STATUS,*PBT_8192D_2ANT_BT_STATUS; ++ ++typedef enum _BT_8192D_2ANT_COEX_ALGO{ ++ BT_8192D_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8192D_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8192D_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8192D_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8192D_2ANT_COEX_ALGO_PAN = 0x4, ++ BT_8192D_2ANT_COEX_ALGO_HID_A2DP = 0x5, ++ BT_8192D_2ANT_COEX_ALGO_HID_PAN = 0x6, ++ BT_8192D_2ANT_COEX_ALGO_PAN_A2DP = 0x7, ++ BT_8192D_2ANT_COEX_ALGO_MAX ++}BT_8192D_2ANT_COEX_ALGO,*PBT_8192D_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8192D_2ANT{ ++ // fw mechanism ++ BOOLEAN bPreBalanceOn; ++ BOOLEAN bCurBalanceOn; ++ ++ // diminishWifi ++ BOOLEAN bPreDacOn; ++ BOOLEAN bCurDacOn; ++ BOOLEAN bPreInterruptOn; ++ BOOLEAN bCurInterruptOn; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bPreNavOn; ++ BOOLEAN bCurNavOn; ++ ++ ++ ++ ++ ++ //BOOLEAN bPreDecBtPwr; ++ //BOOLEAN bCurDecBtPwr; ++ ++ //u1Byte preFwDacSwingLvl; ++ //u1Byte curFwDacSwingLvl; ++ //BOOLEAN bCurIgnoreWlanAct; ++ //BOOLEAN bPreIgnoreWlanAct; ++ //u1Byte prePsTdma; ++ //u1Byte curPsTdma; ++ //u1Byte psTdmaPara[5]; ++ //u1Byte psTdmaDuAdjType; ++ //BOOLEAN bResetTdmaAdjust; ++ //BOOLEAN bPrePsTdmaOn; ++ //BOOLEAN bCurPsTdmaOn; ++ //BOOLEAN bPreBtAutoReport; ++ //BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ //u4Byte preVal0x6c0; ++ //u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u4Byte preVal0x6cc; ++ u4Byte curVal0x6cc; ++ //BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ //u1Byte btStatus; ++ //u1Byte wifiChnlInfo[3]; ++} COEX_DM_8192D_2ANT, *PCOEX_DM_8192D_2ANT; ++ ++typedef struct _COEX_STA_8192D_2ANT{ ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bBtBusy; ++ BOOLEAN bBtUplink; ++ BOOLEAN bBtDownLink; ++ BOOLEAN bA2dpBusy; ++}COEX_STA_8192D_2ANT, *PCOEX_STA_8192D_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8192d2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8192d2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8192d2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e1Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e1Ant.c new file mode 100644 -index 000000000..5bed91272 +index 0000000..86e006d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e1Ant.c @@ -0,0 +1,3738 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8192E Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8192e1Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8192E_1ANT GLCoexDm8192e1Ant; -+static PCOEX_DM_8192E_1ANT pCoexDm=&GLCoexDm8192e1Ant; -+static COEX_STA_8192E_1ANT GLCoexSta8192e1Ant; -+static PCOEX_STA_8192E_1ANT pCoexSta=&GLCoexSta8192e1Ant; -+ -+const char *const GLBtInfoSrc8192e1Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8192e1Ant=20140527; -+u4Byte GLCoexVer8192e1Ant=0x4f; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8192e1ant_ -+//============================================================ -+u1Byte -+halbtc8192e1ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8192e1ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8192e1ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+VOID -+halbtc8192e1ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+VOID -+halbtc8192e1ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+VOID -+halbtc8192e1ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8192e1ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType -+ ) -+{ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ halbtc8192e1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); -+ break; -+ case 1: // disable cck 1/2 -+ halbtc8192e1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ halbtc8192e1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); -+ break; -+ default: -+ break; -+ } -+ -+ halbtc8192e1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8192e1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8192e1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+} -+ -+VOID -+halbtc8192e1ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+VOID -+halbtc8192e1ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e1ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp, u1Tmp1; -+ s4Byte wifiRssi; -+ static u1Byte NumOfBtCounterChk = 0; -+ -+ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS -+ //if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->highPriorityTx = 65535; -+ pCoexSta->highPriorityRx = 65535; -+ pCoexSta->lowPriorityTx = 65535; -+ pCoexSta->lowPriorityRx = 65535; -+ return; -+ } -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ if( (pCoexSta->lowPriorityTx >= 1050) && (!pCoexSta->bC2hBtInquiryPage)) -+ pCoexSta->popEventCnt++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", -+ regHPRx, regHPTx, regLPRx, regLPTx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+ -+ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) -+ { -+ NumOfBtCounterChk++; -+ if (NumOfBtCounterChk >= 3) -+ { -+ halbtc8192e1ant_QueryBtInfo(pBtCoexist); -+ NumOfBtCounterChk = 0; -+ } -+ } -+} -+ -+ -+VOID -+halbtc8192e1ant_MonitorWiFiCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u2Byte u2Tmp[3]; -+ s4Byte wifiRssi=0; -+ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; -+ static u1Byte nCCKLockCounter = 0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->nCRCOK_CCK = 0; -+ pCoexSta->nCRCOK_11g = 0; -+ pCoexSta->nCRCOK_11n = 0; -+ pCoexSta->nCRCOK_11nAgg = 0; -+ -+ pCoexSta->nCRCErr_CCK = 0; -+ pCoexSta->nCRCErr_11g = 0; -+ pCoexSta->nCRCErr_11n = 0; -+ pCoexSta->nCRCErr_11nAgg = 0; -+ } -+ else -+ { -+ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); -+ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); -+ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); -+ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); -+ -+ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); -+ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); -+ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); -+ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); -+ } -+ -+ -+ //reset counter -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); -+ -+ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) -+ { -+ if ( (pCoexDm->btStatus == BT_8192E_1ANT_BT_STATUS_ACL_BUSY) || -+ (pCoexDm->btStatus == BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY) || -+ (pCoexDm->btStatus == BT_8192E_1ANT_BT_STATUS_SCO_BUSY) ) -+ { -+ if (pCoexSta->nCRCOK_CCK >(pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + -+ pCoexSta->nCRCOK_11nAgg) ) -+ { -+ if (nCCKLockCounter < 5) -+ nCCKLockCounter++; -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ if (!pCoexSta->bPreCCKLock) -+ { -+ -+ if (nCCKLockCounter >= 5) -+ pCoexSta->bCCKLock = TRUE; -+ else -+ pCoexSta->bCCKLock = FALSE; -+ } -+ else -+ { -+ if (nCCKLockCounter == 0) -+ pCoexSta->bCCKLock = FALSE; -+ else -+ pCoexSta->bCCKLock = TRUE; -+ } -+ -+ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; -+ -+ -+} -+ -+BOOLEAN -+halbtc8192e1ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8192e1ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+ -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8192e1ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8192E_1ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8192e1ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e1ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8192e1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8192e1ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!") )); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e1ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8192e1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8192e1ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8192e1ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8192e1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8192e1ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); -+ -+ pCoexSta->nCoexTableType = type; -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaa5a5a5a, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 7: -+ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8192e1ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e1ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8192e1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8192e1ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8192e1ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8192e1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8192e1ant_SwMechanism( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRA -+ ) -+{ -+ halbtc8192e1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8192e1ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ u4Byte u4Tmp=0; -+ -+ if(bInitHwCfg) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x944, 0x24); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x930, 0x700700); -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); -+ else -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); -+ -+ // 0x4c[27][24]='00', Set Antenna to BB -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &= ~BIT24; -+ u4Tmp &= ~BIT27; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ else if(bWifiOff) -+ { -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); -+ else -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); -+ -+ // 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp |= BIT24; -+ u4Tmp |= BIT27; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_PATH_WIFI: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); -+ break; -+ case BTC_ANT_PATH_BT: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x20); -+ break; -+ default: -+ case BTC_ANT_PATH_PTA: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); -+ break; -+ } -+} -+ -+VOID -+halbtc8192e1ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ if(byte1&BIT4 && !(byte1&BIT5)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+ -+VOID -+halbtc8192e1ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; -+ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; -+ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; -+ s1Byte nWiFiDurationAdjust = 0x0; -+ -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if (pCoexDm->bCurPsTdmaOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ -+ if (pCoexSta->nScanAPNum <= 5) -+ nWiFiDurationAdjust = 5; -+ else if (pCoexSta->nScanAPNum >= 40) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nScanAPNum >= 20) -+ nWiFiDurationAdjust = -10; -+ -+ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle -+ } -+ -+ if ( (type == 3) || (type == 13) || (type == 14) ) -+ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile -+ -+ if (pBtLinkInfo->bSlaveRole == TRUE) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ default: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); -+ break; -+ case 1: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 2: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 3: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); -+ break; -+ case 4: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); -+ break; -+ case 5: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x11); -+ break; -+ case 6: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x11); -+ break; -+ case 7: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); -+ break; -+ case 8: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 9: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 10: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); -+ break; -+ case 11: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 12: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); -+ break; -+ case 13: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); -+ break; -+ case 14: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, psTdmaByte4Val); -+ break; -+ case 15: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); -+ break; -+ case 16: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); -+ break; -+ case 18: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 20: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x3f, 0x03, 0x11, 0x10); -+ break; -+ case 21: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); -+ break; -+ case 22: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x10); -+ break; -+ case 23: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); -+ break; -+ case 24: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); -+ break; -+ case 25: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 26: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 27: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); -+ break; -+ case 28: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); -+ break; -+ case 29: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); -+ break; -+ case 30: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); -+ break; -+ case 31: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); -+ break; -+ case 32: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); -+ break; -+ case 33: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); -+ break; -+ case 34: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 35: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 36: -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); -+ break; -+ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving -+ /* here softap mode screen off will cost 70-80mA for phone */ -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); -+ break; -+ } -+ } -+ else -+ { -+ -+ // disable PS tdma -+ switch(type) -+ { -+ case 8: //PTA Control -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FALSE, FALSE); -+ break; -+ case 0: -+ default: //Software control, Antenna at BT side -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); -+ break; -+ case 9: //Software control, Antenna at WiFi side -+ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); -+ break; -+ } -+ } -+ rssiAdjustVal =0; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", -+ pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67))); -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8192e1ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // sw all off -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ // hw all off -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+BOOLEAN -+halbtc8192e1ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected && -+ BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); -+ -+ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ -+ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); -+ -+ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ -+ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); -+ -+ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if (bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ } -+ -+ bCommon = FALSE; -+ } -+ -+ return bCommon; -+} -+ -+ -+VOID -+halbtc8192e1ant_TdmaDurationAdjustForAcl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0, btInfoExt; -+ static BOOLEAN bPreWifiBusy=FALSE; -+ BOOLEAN bWifiBusy = FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); -+ -+ if(BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) -+ bWifiBusy = TRUE; -+ else -+ bWifiBusy = FALSE; -+ -+ if( (BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || -+ (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || -+ (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) -+ { -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 3 && -+ pCoexDm->curPsTdma != 9 ) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ return; -+ } -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) -+ retryCount++; -+ -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ if(result == -1) -+ { -+ if( (BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ else if(result == 1) -+ { -+ if( (BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ } -+ else //no change -+ { -+ /* Bryant Modify -+ if(bWifiBusy != bPreWifiBusy) //if busy / idle change -+ { -+ bPreWifiBusy = bWifiBusy; -+ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); -+ } -+ */ -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 9 && -+ pCoexDm->curPsTdma != 11 ) -+ { -+ // recover to previous adjust type -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ } -+} -+ -+VOID -+halbtc8192e1ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8192e1ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8192e1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8192e1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8192e1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiOnly( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+} -+ -+VOID -+halbtc8192e1ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ halbtc8192e1ant_ActionWifiOnly(pBtCoexist); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ } -+ } -+} -+ -+//============================================= -+// -+// Software Coex Mechanism start -+// -+//============================================= -+ -+// SCO only or SCO+PAN(HS) -+ -+/* -+VOID -+halbtc8192e1ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+ -+VOID -+halbtc8192e1ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8192e1ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8192e1ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8192e1ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(HS) only -+VOID -+halbtc8192e1ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8192e1ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8192e1ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8192e1ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+VOID -+halbtc8192e1ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+*/ -+ -+//============================================= -+// -+// Non-Software Coex Mechanism start -+// -+//============================================= -+VOID -+halbtc8192e1ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8192e1ant_ActionHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8192e1ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ if((!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask)) -+ { -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) -+ { -+ // SCO/HID/A2DP busy -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if ((pBtLinkInfo->bPanExist) || (bWifiBusy)) -+ { -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionBtScoHidOnlyBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ // tdma and coex table -+ -+ if(pBtLinkInfo->bScoExist) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else //HID -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiConnectedBtAclBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ u1Byte btRssiState; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ btRssiState = halbtc8192e1ant_BtRssiState(2, 28, 0); -+ -+ if ( (pCoexSta->lowPriorityRx >= 1000) && (pCoexSta->lowPriorityRx != 65535) ) -+ { -+ pBtLinkInfo->bSlaveRole = TRUE; -+ } -+ else -+ { -+ pBtLinkInfo->bSlaveRole = FALSE; -+ } -+ -+ if(pBtLinkInfo->bHidOnly) //HID -+ { -+ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ return; -+ } -+ else if(pBtLinkInfo->bA2dpOnly) //A2DP -+ { -+ if(BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ halbtc8192e1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); -+#if 0 -+ if (pCoexSta->bCCKLock) -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ else -+#endif -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ } -+ } -+ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || -+ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ //BT no-profile busy (0x9) -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiNotConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // power save state -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiNotConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiNotConnectedAssoAuth( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bPanExist) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiConnectedSpecialPacket( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8192e1ant_ActionWifiConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiBusy=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; -+ u4Byte wifiBw; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ if(bUnder4way) -+ { -+ halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ if(bScan || bLink || bRoam) -+ { -+ if(bScan) -+ halbtc8192e1ant_ActionWifiConnectedScan(pBtCoexist); -+ else -+ halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ // power save state -+ if(!bApEnable && BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) -+ { -+ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP -+ { -+ if(!bWifiBusy) -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else //busy -+ { -+ if (pCoexSta->nScanAPNum >= BT_8192E_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA -+ { -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ } -+ } -+ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ else -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(!bWifiBusy) -+ { -+ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ -+ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ else -+ { -+ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else -+ { -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ -+ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+} -+ -+VOID -+halbtc8192e1ant_RunSwCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte algorithm=0; -+ -+ algorithm = halbtc8192e1ant_ActionAlgorithm(pBtCoexist); -+ pCoexDm->curAlgorithm = algorithm; -+ -+ if(halbtc8192e1ant_IsCommonAction(pBtCoexist)) -+ { -+ -+ } -+ else -+ { -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8192E_1ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); -+ //halbtc8192e1ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); -+ //halbtc8192e1ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); -+ //halbtc8192e1ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); -+ //halbtc8192e1ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); -+ //halbtc8192e1ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); -+ //halbtc8192e1ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); -+ //halbtc8192e1ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); -+ //halbtc8192e1ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); -+ //halbtc8192e1ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8192E_1ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); -+ //halbtc8192e1ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); -+ //halbtc8192e1ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8192e1ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bIncreaseScanDevNum=FALSE; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ BOOLEAN bMiracastPlusBt=FALSE; -+ u1Byte aggBufSize=5; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ if( (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bIncreaseScanDevNum = TRUE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); -+ -+ if(pBtLinkInfo->bBtLinkExist) -+ { -+ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ bMiracastPlusBt = TRUE; -+ } -+ else -+ { -+ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ bMiracastPlusBt = FALSE; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ -+ if ( (pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); -+ } -+ else -+ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); -+ -+ return; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ } -+ -+ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) -+ { -+ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ -+ if(pBtLinkInfo->bScoExist) -+ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); -+ else -+ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); -+ halbtc8192e1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message -+ } -+ else -+ { -+ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ -+ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); -+ -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ halbtc8192e1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8192e1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ -+ if(!bWifiConnected) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ if (bScan) -+ halbtc8192e1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ else -+ halbtc8192e1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else -+ halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else // wifi LPS/Busy -+ { -+ halbtc8192e1ant_ActionWifiConnected(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8192e1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ -+ // sw all off -+ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ //halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ pCoexSta->popEventCnt = 0; -+} -+ -+VOID -+halbtc8192e1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ u4Byte u4Tmp=0; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); -+ -+ // antenna sw ctrl to bt -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE); -+ -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ // antenna switch control parameter -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0x55555555); -+ -+ // coex parameters -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ // enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // enable PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); -+ // enable mailbox interface -+ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x40); -+ u2Tmp |= BIT9; -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x40, u2Tmp); -+ -+ // enable PTA I2C mailbox -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x101); -+ u1Tmp |= BIT4; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x101, u1Tmp); -+ -+ // enable bt clock when wifi is disabled. -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x93); -+ u1Tmp |= BIT0; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x93, u1Tmp); -+ // enable bt clock when suspend. -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); -+ u1Tmp |= BIT0; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); -+} -+ -+ -+/* -+VOID -+halbtc8192e1ant_WifiOffHwCfg( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // set wlan_act to low -+ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+} -+*/ -+ -+//============================================================ -+// work around function start with wa_halbtc8192e1ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8192e1ant_ -+//============================================================ -+VOID -+EXhalbtc8192e1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+#if 0 -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u1Byte u1Tmp=0x0; -+ u2Byte u2Tmp=0x0; -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); -+ -+ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. -+ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); -+ -+ // set GRAN_BT = 1 -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ // set WLAN_ACT = 0 -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // -+ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) -+ // Local setting bit define -+ // BIT0: "0" for no antenna inverse; "1" for antenna inverse -+ // BIT1: "0" for internal switch; "1" for external switch -+ // BIT2: "0" for one antenna; "1" for two antenna -+ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ -+ u1Tmp |= 0x1; // antenna inverse -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); -+ -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ else -+ { -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ // set to S1 -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ u1Tmp |= 0x1; // antenna inverse -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_PCI) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); -+ } -+ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); -+ } -+ } -+#endif -+} -+ -+VOID -+EXhalbtc8192e1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8192e1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8192e1ant_InitHwConfig(pBtCoexist, bWifiOnly); -+ pBtCoexist->bStopCoexDm = FALSE; -+} -+ -+VOID -+EXhalbtc8192e1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ pBtCoexist->bStopCoexDm = FALSE; -+ -+ halbtc8192e1ant_InitCoexDm(pBtCoexist); -+ -+ halbtc8192e1ant_QueryBtInfo(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8192e1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ if(pBtCoexist->bStopCoexDm) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8192e1Ant, GLCoexVer8192e1Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8192e1Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ if(!pBtCoexist->bManualControl) -+ { -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ -+ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), -+ pBtCoexist->btInfo.aggBufSize); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ -+ pBtCoexist->btInfo.raMask); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ -+ pCoexDm->errorCondition); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ -+ pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ } -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc04); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xd04); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x90c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xc04/ 0xd04/ 0x90c", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x92c); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x92c/ 0x930", \ -+ (u1Tmp[0]), u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4f); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x40/ 0x4f", \ -+ u1Tmp[0], u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 1) -+ halbtc8192e1ant_MonitorBtCtr(pBtCoexist); -+#endif -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+VOID -+EXhalbtc8192e1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp=0; -+ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ -+ halbtc8192e1ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8192e1ant_InitCoexDm(pBtCoexist); -+ halbtc8192e1ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8192e1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8192e1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ u1Byte u1Tmpa, u1Tmpb; -+ u4Byte u4Tmp; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm ) -+ return; -+ -+ if(BTC_SCAN_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ -+ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); -+ } -+ -+ if(pBtCoexist->btInfo.bBtDisabled) -+ return; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ halbtc8192e1ant_QueryBtInfo(pBtCoexist); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8192e1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_SCAN_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8192e1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ } -+ else // wifi is connected -+ { -+ halbtc8192e1ant_ActionWifiConnectedScan(pBtCoexist); -+ } -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8192e1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8192e1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ pCoexDm->nArpCnt = 0; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ //pCoexDm->nArpCnt = 0; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8192e1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ halbtc8192e1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8192e1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8192e1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ BOOLEAN bWifiUnderBMode = FALSE; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ -+ //Set CCK Tx/Rx high Pri except 11b mode -+ if (bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx -+ } -+ -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ pCoexDm->nArpCnt = 0; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ //H2C_Parameter[0] = 0x1; -+ H2C_Parameter[0] = 0x0; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+} -+ -+VOID -+EXhalbtc8192e1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ BTC_PACKET_ARP == type ) -+ { -+ if(BTC_PACKET_ARP == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); -+ -+ pCoexDm->nArpCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); -+ -+ if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); -+ } -+ -+ pCoexSta->specialPktPeriodCnt = 0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8192e1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) -+ { -+ halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8192e1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bBtBusy=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8192E_1ANT_MAX) -+ rspSource = BT_INFO_SRC_8192E_1ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(BT_INFO_SRC_8192E_1ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ if (pCoexSta->btRetryCnt >= 1) -+ pCoexSta->popEventCnt++; -+ -+ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) -+ pCoexSta->bC2hBtPage = TRUE; -+ else -+ pCoexSta->bC2hBtPage = FALSE; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2-90; -+ //pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ if(!pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); -+ } -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if(pCoexSta->btInfoExt & BIT1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if(pCoexSta->btInfoExt & BIT3) -+ { -+ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+#if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8192e1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8192E_1ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8192E_1ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8192E_1ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8192E_1ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8192E_1ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8192E_1ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ } -+ -+ halbtc8192e1ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) -+ -+ if(!(btInfo&BT_INFO_8192E_1ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8192E_1ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8192E_1ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8192E_1ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8192E_1ANT_B_ACL_BUSY) -+ { -+ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ bBtBusy = TRUE; -+ else -+ bBtBusy = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ halbtc8192e1ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8192e1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); -+ -+ if(BTC_RF_ON == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); -+ pBtCoexist->bStopCoexDm = FALSE; -+ } -+ else if(BTC_RF_OFF == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); -+ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ -+ halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ pBtCoexist->bStopCoexDm = TRUE; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ u1Tmpc = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb, u1Tmpc)); -+ -+ } -+} -+ -+VOID -+EXhalbtc8192e1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ -+ halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+} -+ -+VOID -+EXhalbtc8192e1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ pBtCoexist->bStopCoexDm = FALSE; -+ halbtc8192e1ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8192e1ant_InitCoexDm(pBtCoexist); -+ halbtc8192e1ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8192e1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); -+ -+ halbtc8192e1ant_InitHwConfig(pBtCoexist, FALSE); -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); -+ halbtc8192e1ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8192e1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8192e1Ant, GLCoexVer8192e1Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) -+ halbtc8192e1ant_QueryBtInfo(pBtCoexist); -+ halbtc8192e1ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ halbtc8192e1ant_MonitorBtCtr(pBtCoexist); -+ halbtc8192e1ant_MonitorWiFiCtr(pBtCoexist); -+ -+ if( halbtc8192e1ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust ) -+ { -+ -+ halbtc8192e1ant_RunCoexistMechanism(pBtCoexist); -+ } -+ -+ pCoexSta->specialPktPeriodCnt++; -+#endif -+} -+ -+ -+VOID -+EXhalbtc8192e1ant_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ) -+{ -+ switch(opCode) -+ { -+ case BTC_DBG_SET_COEX_NORMAL: -+ pBtCoexist->bManualControl = FALSE; -+ halbtc8192e1ant_InitCoexDm(pBtCoexist); -+ break; -+ case BTC_DBG_SET_COEX_WIFI_ONLY: -+ pBtCoexist->bManualControl = TRUE; -+ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+ break; -+ case BTC_DBG_SET_COEX_BT_ONLY: -+ // todo -+ break; -+ default: -+ break; -+ } -+} -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8192E Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8192e1Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8192E_1ANT GLCoexDm8192e1Ant; ++static PCOEX_DM_8192E_1ANT pCoexDm=&GLCoexDm8192e1Ant; ++static COEX_STA_8192E_1ANT GLCoexSta8192e1Ant; ++static PCOEX_STA_8192E_1ANT pCoexSta=&GLCoexSta8192e1Ant; ++ ++const char *const GLBtInfoSrc8192e1Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8192e1Ant=20140527; ++u4Byte GLCoexVer8192e1Ant=0x4f; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8192e1ant_ ++//============================================================ ++u1Byte ++halbtc8192e1ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8192e1ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8192e1ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++VOID ++halbtc8192e1ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++VOID ++halbtc8192e1ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++VOID ++halbtc8192e1ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8192e1ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType ++ ) ++{ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ halbtc8192e1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); ++ break; ++ case 1: // disable cck 1/2 ++ halbtc8192e1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ halbtc8192e1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8192e1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8192e1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8192e1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++} ++ ++VOID ++halbtc8192e1ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++VOID ++halbtc8192e1ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e1ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp, u1Tmp1; ++ s4Byte wifiRssi; ++ static u1Byte NumOfBtCounterChk = 0; ++ ++ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS ++ //if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->highPriorityTx = 65535; ++ pCoexSta->highPriorityRx = 65535; ++ pCoexSta->lowPriorityTx = 65535; ++ pCoexSta->lowPriorityRx = 65535; ++ return; ++ } ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if( (pCoexSta->lowPriorityTx >= 1050) && (!pCoexSta->bC2hBtInquiryPage)) ++ pCoexSta->popEventCnt++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ regHPRx, regHPTx, regLPRx, regLPTx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++ ++ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) ++ { ++ NumOfBtCounterChk++; ++ if (NumOfBtCounterChk >= 3) ++ { ++ halbtc8192e1ant_QueryBtInfo(pBtCoexist); ++ NumOfBtCounterChk = 0; ++ } ++ } ++} ++ ++ ++VOID ++halbtc8192e1ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); ++ } ++ ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); ++ ++ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) ++ { ++ if ( (pCoexDm->btStatus == BT_8192E_1ANT_BT_STATUS_ACL_BUSY) || ++ (pCoexDm->btStatus == BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (pCoexDm->btStatus == BT_8192E_1ANT_BT_STATUS_SCO_BUSY) ) ++ { ++ if (pCoexSta->nCRCOK_CCK >(pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + ++ pCoexSta->nCRCOK_11nAgg) ) ++ { ++ if (nCCKLockCounter < 5) ++ nCCKLockCounter++; ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ if (!pCoexSta->bPreCCKLock) ++ { ++ ++ if (nCCKLockCounter >= 5) ++ pCoexSta->bCCKLock = TRUE; ++ else ++ pCoexSta->bCCKLock = FALSE; ++ } ++ else ++ { ++ if (nCCKLockCounter == 0) ++ pCoexSta->bCCKLock = FALSE; ++ else ++ pCoexSta->bCCKLock = TRUE; ++ } ++ ++ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; ++ ++ ++} ++ ++BOOLEAN ++halbtc8192e1ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8192e1ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++ ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8192e1ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8192E_1ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8192e1ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e1ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8192e1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8192e1ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!") )); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e1ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8192e1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8192e1ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8192e1ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8192e1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8192e1ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); ++ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaa5a5a5a, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8192e1ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e1ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8192e1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8192e1ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8192e1ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8192e1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8192e1ant_SwMechanism( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRA ++ ) ++{ ++ halbtc8192e1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8192e1ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ u4Byte u4Tmp=0; ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x944, 0x24); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x930, 0x700700); ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); ++ else ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); ++ ++ // 0x4c[27][24]='00', Set Antenna to BB ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &= ~BIT24; ++ u4Tmp &= ~BIT27; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ else if(bWifiOff) ++ { ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); ++ else ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); ++ ++ // 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp |= BIT24; ++ u4Tmp |= BIT27; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_PATH_WIFI: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); ++ break; ++ case BTC_ANT_PATH_BT: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x20); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); ++ break; ++ } ++} ++ ++VOID ++halbtc8192e1ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ if(byte1&BIT4 && !(byte1&BIT5)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8192e1ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; ++ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; ++ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; ++ s1Byte nWiFiDurationAdjust = 0x0; ++ ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if (pCoexDm->bCurPsTdmaOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ ++ if (pCoexSta->nScanAPNum <= 5) ++ nWiFiDurationAdjust = 5; ++ else if (pCoexSta->nScanAPNum >= 40) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nScanAPNum >= 20) ++ nWiFiDurationAdjust = -10; ++ ++ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle ++ } ++ ++ if ( (type == 3) || (type == 13) || (type == 14) ) ++ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile ++ ++ if (pBtLinkInfo->bSlaveRole == TRUE) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ default: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); ++ break; ++ case 1: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 2: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 3: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); ++ break; ++ case 4: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); ++ break; ++ case 5: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x11); ++ break; ++ case 6: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x11); ++ break; ++ case 7: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 10: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 12: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); ++ break; ++ case 14: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, psTdmaByte4Val); ++ break; ++ case 15: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x3f, 0x03, 0x11, 0x10); ++ break; ++ case 21: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x10); ++ break; ++ case 23: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); ++ break; ++ case 33: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); ++ break; ++ case 34: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); ++ break; ++ } ++ } ++ else ++ { ++ ++ // disable PS tdma ++ switch(type) ++ { ++ case 8: //PTA Control ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FALSE, FALSE); ++ break; ++ case 0: ++ default: //Software control, Antenna at BT side ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); ++ break; ++ case 9: //Software control, Antenna at WiFi side ++ halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); ++ break; ++ } ++ } ++ rssiAdjustVal =0; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67))); ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8192e1ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // sw all off ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ // hw all off ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++BOOLEAN ++halbtc8192e1ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected && ++ BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); ++ ++ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); ++ ++ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ ++ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); ++ ++ //halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if (bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ } ++ ++ bCommon = FALSE; ++ } ++ ++ return bCommon; ++} ++ ++ ++VOID ++halbtc8192e1ant_TdmaDurationAdjustForAcl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0, btInfoExt; ++ static BOOLEAN bPreWifiBusy=FALSE; ++ BOOLEAN bWifiBusy = FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); ++ ++ if(BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) ++ bWifiBusy = TRUE; ++ else ++ bWifiBusy = FALSE; ++ ++ if( (BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || ++ (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || ++ (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) ++ { ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 3 && ++ pCoexDm->curPsTdma != 9 ) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ return; ++ } ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) ++ retryCount++; ++ ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ if(result == -1) ++ { ++ if( (BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ else if(result == 1) ++ { ++ if( (BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ } ++ else //no change ++ { ++ /* Bryant Modify ++ if(bWifiBusy != bPreWifiBusy) //if busy / idle change ++ { ++ bPreWifiBusy = bWifiBusy; ++ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); ++ } ++ */ ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 9 && ++ pCoexDm->curPsTdma != 11 ) ++ { ++ // recover to previous adjust type ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ } ++} ++ ++VOID ++halbtc8192e1ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8192e1ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8192e1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8192e1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8192e1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiOnly( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++} ++ ++VOID ++halbtc8192e1ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ halbtc8192e1ant_ActionWifiOnly(pBtCoexist); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++//============================================= ++// ++// Software Coex Mechanism start ++// ++//============================================= ++ ++// SCO only or SCO+PAN(HS) ++ ++/* ++VOID ++halbtc8192e1ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++ ++VOID ++halbtc8192e1ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8192e1ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8192e1ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8192e1ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(HS) only ++VOID ++halbtc8192e1ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8192e1ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8192e1ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8192e1ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++VOID ++halbtc8192e1ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++*/ ++ ++//============================================= ++// ++// Non-Software Coex Mechanism start ++// ++//============================================= ++VOID ++halbtc8192e1ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8192e1ant_ActionHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8192e1ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ if((!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask)) ++ { ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) ++ { ++ // SCO/HID/A2DP busy ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if ((pBtLinkInfo->bPanExist) || (bWifiBusy)) ++ { ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionBtScoHidOnlyBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ // tdma and coex table ++ ++ if(pBtLinkInfo->bScoExist) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else //HID ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiConnectedBtAclBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ u1Byte btRssiState; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ btRssiState = halbtc8192e1ant_BtRssiState(2, 28, 0); ++ ++ if ( (pCoexSta->lowPriorityRx >= 1000) && (pCoexSta->lowPriorityRx != 65535) ) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ if(pBtLinkInfo->bHidOnly) //HID ++ { ++ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ return; ++ } ++ else if(pBtLinkInfo->bA2dpOnly) //A2DP ++ { ++ if(BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ halbtc8192e1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); ++#if 0 ++ if (pCoexSta->bCCKLock) ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ else ++#endif ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ } ++ } ++ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || ++ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ //BT no-profile busy (0x9) ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiNotConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // power save state ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiNotConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiNotConnectedAssoAuth( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bPanExist) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiConnectedSpecialPacket( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8192e1ant_ActionWifiConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiBusy=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; ++ u4Byte wifiBw; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ if(bUnder4way) ++ { ++ halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ if(bScan || bLink || bRoam) ++ { ++ if(bScan) ++ halbtc8192e1ant_ActionWifiConnectedScan(pBtCoexist); ++ else ++ halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ // power save state ++ if(!bApEnable && BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) ++ { ++ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP ++ { ++ if(!bWifiBusy) ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else //busy ++ { ++ if (pCoexSta->nScanAPNum >= BT_8192E_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA ++ { ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ } ++ } ++ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ else ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(!bWifiBusy) ++ { ++ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ ++ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ else ++ { ++ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else ++ { ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ ++ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++} ++ ++VOID ++halbtc8192e1ant_RunSwCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm=0; ++ ++ algorithm = halbtc8192e1ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ ++ if(halbtc8192e1ant_IsCommonAction(pBtCoexist)) ++ { ++ ++ } ++ else ++ { ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8192E_1ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); ++ //halbtc8192e1ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); ++ //halbtc8192e1ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); ++ //halbtc8192e1ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); ++ //halbtc8192e1ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); ++ //halbtc8192e1ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); ++ //halbtc8192e1ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); ++ //halbtc8192e1ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); ++ //halbtc8192e1ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); ++ //halbtc8192e1ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); ++ //halbtc8192e1ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); ++ //halbtc8192e1ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8192e1ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bIncreaseScanDevNum=FALSE; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ u1Byte aggBufSize=5; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if( (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bIncreaseScanDevNum = TRUE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ bMiracastPlusBt = FALSE; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ ++ if ( (pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); ++ } ++ else ++ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) ++ { ++ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ if(pBtLinkInfo->bScoExist) ++ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); ++ else ++ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, TRUE); ++ halbtc8192e1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message ++ } ++ else ++ { ++ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); ++ ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ halbtc8192e1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8192e1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ ++ if(!bWifiConnected) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ if (bScan) ++ halbtc8192e1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ else ++ halbtc8192e1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else ++ halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else // wifi LPS/Busy ++ { ++ halbtc8192e1ant_ActionWifiConnected(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8192e1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ ++ // sw all off ++ halbtc8192e1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ //halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ pCoexSta->popEventCnt = 0; ++} ++ ++VOID ++halbtc8192e1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u4Byte u4Tmp=0; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); ++ ++ // antenna sw ctrl to bt ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE); ++ ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ // antenna switch control parameter ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0x55555555); ++ ++ // coex parameters ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ // enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // enable PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++ // enable mailbox interface ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x40); ++ u2Tmp |= BIT9; ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x40, u2Tmp); ++ ++ // enable PTA I2C mailbox ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x101); ++ u1Tmp |= BIT4; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x101, u1Tmp); ++ ++ // enable bt clock when wifi is disabled. ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x93); ++ u1Tmp |= BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x93, u1Tmp); ++ // enable bt clock when suspend. ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); ++ u1Tmp |= BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); ++} ++ ++ ++/* ++VOID ++halbtc8192e1ant_WifiOffHwCfg( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // set wlan_act to low ++ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++} ++*/ ++ ++//============================================================ ++// work around function start with wa_halbtc8192e1ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8192e1ant_ ++//============================================================ ++VOID ++EXhalbtc8192e1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++#if 0 ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u1Byte u1Tmp=0x0; ++ u2Byte u2Tmp=0x0; ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); ++ ++ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); ++ ++ // set GRAN_BT = 1 ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ // set WLAN_ACT = 0 ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // ++ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) ++ // Local setting bit define ++ // BIT0: "0" for no antenna inverse; "1" for antenna inverse ++ // BIT1: "0" for internal switch; "1" for external switch ++ // BIT2: "0" for one antenna; "1" for two antenna ++ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ u1Tmp |= 0x1; // antenna inverse ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ // set to S1 ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ u1Tmp |= 0x1; // antenna inverse ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_PCI) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ } ++#endif ++} ++ ++VOID ++EXhalbtc8192e1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8192e1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8192e1ant_InitHwConfig(pBtCoexist, bWifiOnly); ++ pBtCoexist->bStopCoexDm = FALSE; ++} ++ ++VOID ++EXhalbtc8192e1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ pBtCoexist->bStopCoexDm = FALSE; ++ ++ halbtc8192e1ant_InitCoexDm(pBtCoexist); ++ ++ halbtc8192e1ant_QueryBtInfo(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8192e1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ if(pBtCoexist->bStopCoexDm) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8192e1Ant, GLCoexVer8192e1Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8192e1Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ ++ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), ++ pBtCoexist->btInfo.aggBufSize); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ ++ pBtCoexist->btInfo.raMask); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ ++ pCoexDm->errorCondition); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ ++ pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc04); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xd04); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x90c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xc04/ 0xd04/ 0x90c", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x92c); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x92c/ 0x930", \ ++ (u1Tmp[0]), u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4f); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x40/ 0x4f", \ ++ u1Tmp[0], u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 1) ++ halbtc8192e1ant_MonitorBtCtr(pBtCoexist); ++#endif ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++VOID ++EXhalbtc8192e1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp=0; ++ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ ++ halbtc8192e1ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8192e1ant_InitCoexDm(pBtCoexist); ++ halbtc8192e1ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8192e1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8192e1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ u1Byte u1Tmpa, u1Tmpb; ++ u4Byte u4Tmp; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm ) ++ return; ++ ++ if(BTC_SCAN_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ ++ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); ++ } ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ return; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ halbtc8192e1ant_QueryBtInfo(pBtCoexist); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8192e1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_SCAN_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8192e1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ } ++ else // wifi is connected ++ { ++ halbtc8192e1ant_ActionWifiConnectedScan(pBtCoexist); ++ } ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8192e1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8192e1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ pCoexDm->nArpCnt = 0; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ //pCoexDm->nArpCnt = 0; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8192e1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ halbtc8192e1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8192e1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8192e1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ BOOLEAN bWifiUnderBMode = FALSE; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ ++ //Set CCK Tx/Rx high Pri except 11b mode ++ if (bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx ++ } ++ ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ pCoexDm->nArpCnt = 0; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ //H2C_Parameter[0] = 0x1; ++ H2C_Parameter[0] = 0x0; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8192e1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type ) ++ { ++ if(BTC_PACKET_ARP == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); ++ ++ pCoexDm->nArpCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); ++ ++ if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); ++ } ++ ++ pCoexSta->specialPktPeriodCnt = 0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8192e1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8192e1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8192e1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8192e1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8192e1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) ++ { ++ halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8192e1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bBtBusy=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8192E_1ANT_MAX) ++ rspSource = BT_INFO_SRC_8192E_1ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8192E_1ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ if (pCoexSta->btRetryCnt >= 1) ++ pCoexSta->popEventCnt++; ++ ++ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) ++ pCoexSta->bC2hBtPage = TRUE; ++ else ++ pCoexSta->bC2hBtPage = FALSE; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2-90; ++ //pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ if(!pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if(pCoexSta->btInfoExt & BIT1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if(pCoexSta->btInfoExt & BIT3) ++ { ++ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8192e1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8192E_1ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8192E_1ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8192E_1ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8192E_1ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8192E_1ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8192E_1ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ } ++ ++ halbtc8192e1ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) ++ ++ if(!(btInfo&BT_INFO_8192E_1ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8192E_1ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8192E_1ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8192E_1ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8192E_1ANT_B_ACL_BUSY) ++ { ++ if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ bBtBusy = TRUE; ++ else ++ bBtBusy = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ halbtc8192e1ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8192e1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); ++ ++ if(BTC_RF_ON == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); ++ pBtCoexist->bStopCoexDm = FALSE; ++ } ++ else if(BTC_RF_OFF == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); ++ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ ++ halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ pBtCoexist->bStopCoexDm = TRUE; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ u1Tmpc = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb, u1Tmpc)); ++ ++ } ++} ++ ++VOID ++EXhalbtc8192e1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ ++ halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++} ++ ++VOID ++EXhalbtc8192e1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8192e1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ pBtCoexist->bStopCoexDm = FALSE; ++ halbtc8192e1ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8192e1ant_InitCoexDm(pBtCoexist); ++ halbtc8192e1ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8192e1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); ++ ++ halbtc8192e1ant_InitHwConfig(pBtCoexist, FALSE); ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); ++ halbtc8192e1ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8192e1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8192e1Ant, GLCoexVer8192e1Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) ++ halbtc8192e1ant_QueryBtInfo(pBtCoexist); ++ halbtc8192e1ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8192e1ant_MonitorBtCtr(pBtCoexist); ++ halbtc8192e1ant_MonitorWiFiCtr(pBtCoexist); ++ ++ if( halbtc8192e1ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust ) ++ { ++ ++ halbtc8192e1ant_RunCoexistMechanism(pBtCoexist); ++ } ++ ++ pCoexSta->specialPktPeriodCnt++; ++#endif ++} ++ ++ ++VOID ++EXhalbtc8192e1ant_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ) ++{ ++ switch(opCode) ++ { ++ case BTC_DBG_SET_COEX_NORMAL: ++ pBtCoexist->bManualControl = FALSE; ++ halbtc8192e1ant_InitCoexDm(pBtCoexist); ++ break; ++ case BTC_DBG_SET_COEX_WIFI_ONLY: ++ pBtCoexist->bManualControl = TRUE; ++ halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ break; ++ case BTC_DBG_SET_COEX_BT_ONLY: ++ // todo ++ break; ++ default: ++ break; ++ } ++} ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e1Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e1Ant.h new file mode 100644 -index 000000000..1e9327e34 +index 0000000..02914bc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e1Ant.h @@ -0,0 +1,254 @@ -+//=========================================== -+// The following is for 8192E 1ANT BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8192E_1ANT 1 -+ -+#define BT_INFO_8192E_1ANT_B_FTP BIT7 -+#define BT_INFO_8192E_1ANT_B_A2DP BIT6 -+#define BT_INFO_8192E_1ANT_B_HID BIT5 -+#define BT_INFO_8192E_1ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8192E_1ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8192E_1ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8192E_1ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8192E_1ANT_B_CONNECTION BIT0 -+ -+#define BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT 2 -+ -+#define BT_8192E_1ANT_WIFI_NOISY_THRESH 30 //max: 255 -+ -+typedef enum _BT_INFO_SRC_8192E_1ANT{ -+ BT_INFO_SRC_8192E_1ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8192E_1ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8192E_1ANT_MAX -+}BT_INFO_SRC_8192E_1ANT,*PBT_INFO_SRC_8192E_1ANT; -+ -+typedef enum _BT_8192E_1ANT_BT_STATUS{ -+ BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8192E_1ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8192E_1ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8192E_1ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8192E_1ANT_BT_STATUS_MAX -+}BT_8192E_1ANT_BT_STATUS,*PBT_8192E_1ANT_BT_STATUS; -+ -+typedef enum _BT_8192E_1ANT_WIFI_STATUS{ -+ BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, -+ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, -+ BT_8192E_1ANT_WIFI_STATUS_MAX -+}BT_8192E_1ANT_WIFI_STATUS,*PBT_8192E_1ANT_WIFI_STATUS; -+ -+typedef enum _BT_8192E_1ANT_COEX_ALGO{ -+ BT_8192E_1ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8192E_1ANT_COEX_ALGO_SCO = 0x1, -+ BT_8192E_1ANT_COEX_ALGO_HID = 0x2, -+ BT_8192E_1ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8192E_1ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8192E_1ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8192E_1ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8192E_1ANT_COEX_ALGO_MAX = 0xb, -+}BT_8192E_1ANT_COEX_ALGO,*PBT_8192E_1ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8192E_1ANT{ -+ // fw mechanism -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ // sw mechanism -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt -+ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt -+ u2Byte backupRetryLimit; -+ u1Byte backupAmpduMaxTime; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ u1Byte preArfrType; -+ u1Byte curArfrType; -+ u1Byte preRetryLimitType; -+ u1Byte curRetryLimitType; -+ u1Byte preAmpduTimeType; -+ u1Byte curAmpduTimeType; -+ u4Byte nArpCnt; -+ -+ u1Byte errorCondition; -+} COEX_DM_8192E_1ANT, *PCOEX_DM_8192E_1ANT; -+ -+typedef struct _COEX_STA_8192E_1ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte specialPktPeriodCnt; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ s1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8192E_1ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8192E_1ANT_MAX]; -+ BOOLEAN bC2hBtInquiryPage; -+ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue -+ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ u4Byte popEventCnt; -+ u1Byte nScanAPNum; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ BOOLEAN bCCKLock; -+ BOOLEAN bPreCCKLock; -+ u1Byte nCoexTableType; -+ -+ BOOLEAN bForceLpsOn; -+}COEX_STA_8192E_1ANT, *PCOEX_STA_8192E_1ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8192e1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8192e1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8192e1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8192e1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e1ant_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ); -+ ++//=========================================== ++// The following is for 8192E 1ANT BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8192E_1ANT 1 ++ ++#define BT_INFO_8192E_1ANT_B_FTP BIT7 ++#define BT_INFO_8192E_1ANT_B_A2DP BIT6 ++#define BT_INFO_8192E_1ANT_B_HID BIT5 ++#define BT_INFO_8192E_1ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8192E_1ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8192E_1ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8192E_1ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8192E_1ANT_B_CONNECTION BIT0 ++ ++#define BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT 2 ++ ++#define BT_8192E_1ANT_WIFI_NOISY_THRESH 30 //max: 255 ++ ++typedef enum _BT_INFO_SRC_8192E_1ANT{ ++ BT_INFO_SRC_8192E_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8192E_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8192E_1ANT_MAX ++}BT_INFO_SRC_8192E_1ANT,*PBT_INFO_SRC_8192E_1ANT; ++ ++typedef enum _BT_8192E_1ANT_BT_STATUS{ ++ BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8192E_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8192E_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8192E_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8192E_1ANT_BT_STATUS_MAX ++}BT_8192E_1ANT_BT_STATUS,*PBT_8192E_1ANT_BT_STATUS; ++ ++typedef enum _BT_8192E_1ANT_WIFI_STATUS{ ++ BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8192E_1ANT_WIFI_STATUS_MAX ++}BT_8192E_1ANT_WIFI_STATUS,*PBT_8192E_1ANT_WIFI_STATUS; ++ ++typedef enum _BT_8192E_1ANT_COEX_ALGO{ ++ BT_8192E_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8192E_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8192E_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8192E_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8192E_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8192E_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8192E_1ANT_COEX_ALGO_MAX = 0xb, ++}BT_8192E_1ANT_COEX_ALGO,*PBT_8192E_1ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8192E_1ANT{ ++ // fw mechanism ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ // sw mechanism ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt ++ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt ++ u2Byte backupRetryLimit; ++ u1Byte backupAmpduMaxTime; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ u1Byte preArfrType; ++ u1Byte curArfrType; ++ u1Byte preRetryLimitType; ++ u1Byte curRetryLimitType; ++ u1Byte preAmpduTimeType; ++ u1Byte curAmpduTimeType; ++ u4Byte nArpCnt; ++ ++ u1Byte errorCondition; ++} COEX_DM_8192E_1ANT, *PCOEX_DM_8192E_1ANT; ++ ++typedef struct _COEX_STA_8192E_1ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte specialPktPeriodCnt; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ s1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8192E_1ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8192E_1ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue ++ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ u4Byte popEventCnt; ++ u1Byte nScanAPNum; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ BOOLEAN bCCKLock; ++ BOOLEAN bPreCCKLock; ++ u1Byte nCoexTableType; ++ ++ BOOLEAN bForceLpsOn; ++}COEX_STA_8192E_1ANT, *PCOEX_STA_8192E_1ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8192e1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8192e1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8192e1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8192e1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e1ant_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e2Ant.c new file mode 100644 -index 000000000..3bcf5d604 +index 0000000..648e669 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e2Ant.c @@ -0,0 +1,5027 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8192E Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8192E_2ANT GLCoexDm8192e2Ant; -+static PCOEX_DM_8192E_2ANT pCoexDm=&GLCoexDm8192e2Ant; -+static COEX_STA_8192E_2ANT GLCoexSta8192e2Ant; -+static PCOEX_STA_8192E_2ANT pCoexSta=&GLCoexSta8192e2Ant; -+ -+const char *const GLBtInfoSrc8192e2Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8192e2Ant=20150615; -+u4Byte GLCoexVer8192e2Ant=0x41; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8192e2ant_ -+//============================================================ -+u1Byte -+halbtc8192e2ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8192e2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8192e2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ } -+ } -+} -+ -+u4Byte -+halbtc8192e2ant_DecideRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte ssType, -+ IN u4Byte raMaskType -+ ) -+{ -+ u4Byte disRaMask=0x0; -+ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ if(ssType == 2) -+ disRaMask = 0x0; // enable 2ss -+ else -+ disRaMask = 0xfff00000; // disable 2ss -+ break; -+ case 1: // disable cck 1/2 -+ if(ssType == 2) -+ disRaMask = 0x00000003; // enable 2ss -+ else -+ disRaMask = 0xfff00003; // disable 2ss -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ if(ssType == 2) -+ disRaMask = 0x0001f1f7; // enable 2ss -+ else -+ disRaMask = 0xfff1f1f7; // disable 2ss -+ break; -+ default: -+ break; -+ } -+ -+ return disRaMask; -+} -+ -+VOID -+halbtc8192e2ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+VOID -+halbtc8192e2ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+VOID -+halbtc8192e2ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+VOID -+halbtc8192e2ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8192e2ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType -+ ) -+{ -+ u4Byte disRaMask=0x0; -+ -+ pCoexDm->curRaMaskType = raMaskType; -+ disRaMask = halbtc8192e2ant_DecideRaMask(pBtCoexist, pCoexDm->curSsType, raMaskType); -+ halbtc8192e2ant_UpdateRaMask(pBtCoexist, bForceExec, disRaMask); -+ -+ halbtc8192e2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8192e2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8192e2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+} -+ -+VOID -+halbtc8192e2ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+VOID -+halbtc8192e2ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8192e2ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+BOOLEAN -+halbtc8192e2ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist,3, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ -+ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) -+ { -+ return TRUE; -+ } -+ -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8192e2ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+ -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8192e2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8192E_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO_PAN; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(pStackInfo->numOfHid >= 2) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO_PAN; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8192e2ant_SetFwDacSwingLevel( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte dacSwingLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ // There are several type of dacswing -+ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 -+ H2C_Parameter[0] = dacSwingLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e2ant_SetFwDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = decBtPwrLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", -+ decBtPwrLvl, H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e2ant_DecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", -+ (bForceExec? "force to":""), decBtPwrLvl)); -+ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n", -+ pCoexDm->preBtDecPwrLvl, pCoexDm->curBtDecPwrLvl)); -+#if 0 // work around, avoid h2c command fail. -+ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) -+ return; -+#endif -+ } -+ halbtc8192e2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); -+ -+ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; -+} -+ -+VOID -+halbtc8192e2ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e2ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreBtAutoReport=%d, bCurBtAutoReport=%d\n", -+ pCoexDm->bPreBtAutoReport, pCoexDm->bCurBtAutoReport)); -+ -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8192e2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8192e2ant_FwDacSwingLvl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte fwDacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", -+ (bForceExec? "force to":""), fwDacSwingLvl)); -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", -+ pCoexDm->preFwDacSwingLvl, pCoexDm->curFwDacSwingLvl)); -+ -+ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) -+ return; -+ } -+ -+ halbtc8192e2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); -+ -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+} -+ -+VOID -+halbtc8192e2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8192e2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n", -+ pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink)); -+ -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8192e2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8192e2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!")) ); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8192e2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ //return; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n", -+ pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa)); -+ -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8192e2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8192e2ant_SetDacSwingReg( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte level -+ ) -+{ -+ u1Byte val=(u1Byte)level; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val); -+} -+ -+VOID -+halbtc8192e2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ if(bSwDacSwingOn) -+ { -+ halbtc8192e2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); -+ } -+ else -+ { -+ halbtc8192e2ant_SetDacSwingReg(pBtCoexist, 0x18); -+ } -+} -+ -+ -+VOID -+halbtc8192e2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n", -+ pCoexDm->bPreDacSwingOn, pCoexDm->preDacSwingLvl, -+ pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl)); -+ -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8192e2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8192e2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1); -+ } -+} -+ -+VOID -+halbtc8192e2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n", -+ pCoexDm->bPreAdcBackOff, pCoexDm->bCurAdcBackOff)); -+ -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8192e2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8192e2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ //=================BB AGC Gain Table -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x0a1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x091B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x081C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x071D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x061E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x051F0001); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); -+ } -+ -+#if 0 -+ //=================RF Gain -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); -+ -+ // set rssiAdjustVal for wifi module. -+ if(bAgcTableEn) -+ { -+ rssiAdjustVal = 8; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+#endif -+ -+} -+ -+VOID -+halbtc8192e2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", -+ pCoexDm->bPreAgcTableEn, pCoexDm->bCurAgcTableEn)); -+ -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8192e2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8192e2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8192e2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n", -+ pCoexDm->preVal0x6c0, pCoexDm->preVal0x6c4, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n", -+ pCoexDm->curVal0x6c0, pCoexDm->curVal0x6c4, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc)); -+ -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8192e2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8192e2ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexSta->nCoexTableType = type; -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0xdfffdfff, 0x5ffb5ffb, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5ddd5ddd, 0x5fdb5fdb, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 7: -+ if(pCoexSta->nScanAPNum <= NOISY_AP_NUM_THRESH) -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xfafafafa, 0xffffff, 0x3); -+ else -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 8: -+ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5f5f5f5f, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8192e2ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+ -+VOID -+halbtc8192e2ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n", -+ pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct)); -+ -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8192e2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+ -+VOID -+halbtc8192e2ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+ -+VOID -+halbtc8192e2ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preLps/curLps=0x%x/0x%x, preRpwm/curRpwm=0x%x/0x%x!!\n", -+ pCoexDm->preLps, pCoexDm->curLps, pCoexDm->preRpwm, pCoexDm->curRpwm)); -+ -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], LPS-RPWM_Last=0x%x , LPS-RPWM_Now=0x%x!!\n", -+ pCoexDm->preRpwm, pCoexDm->curRpwm)); -+ -+ return; -+ } -+ } -+ halbtc8192e2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+ -+ -+VOID -+halbtc8192e2ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ if(byte1&BIT4 && !(byte1&BIT5)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+ -+VOID -+halbtc8192e2ant_SwMechanism1( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bShrinkRxLPF, -+ IN BOOLEAN bLowPenaltyRA, -+ IN BOOLEAN bLimitedDIG, -+ IN BOOLEAN bBTLNAConstrain -+ ) -+{ -+ /* -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 -+ { -+ if (bShrinkRxLPF) -+ bShrinkRxLPF = FALSE; -+ } -+ */ -+ -+ halbtc8192e2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); -+ //halbtc8192e2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8192e2ant_SwMechanism2( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAGCTableShift, -+ IN BOOLEAN bADCBackOff, -+ IN BOOLEAN bSWDACSwing, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ halbtc8192e2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); -+ //halbtc8192e2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); -+ halbtc8192e2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); -+} -+ -+VOID -+halbtc8192e2ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ u4Byte u4Tmp=0; -+ -+ if(bInitHwCfg) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x944, 0x24); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x930, 0x700700); -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); -+ else -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); -+ -+ // 0x4c[27][24]='00', Set Antenna to BB -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &= ~BIT24; -+ u4Tmp &= ~BIT27; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ else if(bWifiOff) -+ { -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); -+ else -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); -+ -+ // 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp |= BIT24; -+ u4Tmp |= BIT27; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_PATH_WIFI: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); -+ break; -+ case BTC_ANT_PATH_BT: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x20); -+ break; -+ default: -+ case BTC_ANT_PATH_PTA: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); -+ break; -+ } -+} -+ -+VOID -+halbtc8192e2ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bTurnOnByCnt=FALSE; -+ u1Byte psTdmaTypeByCnt=0; -+ s1Byte nWiFiDurationAdjust = 0x0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", -+ pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", -+ pCoexDm->prePsTdma, pCoexDm->curPsTdma)); -+ -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ -+ if (pCoexSta->nScanAPNum >= 40) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nScanAPNum >= 20) -+ nWiFiDurationAdjust = -10; -+ -+/* -+ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle -+ } -+ -+ -+ if ( (type == 3) || (type == 13) || (type == 14) ) -+ { -+ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile -+ -+ if (!bWifiBusy) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ } -+ -+ if (pBtLinkInfo->bSlaveRole == TRUE) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ -+*/ -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ case 1: -+ default: //d1,wb -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x11, 0x10); -+ break; -+ case 2: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x11, 0x10); -+ break; -+ case 3: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x11, 0x10); -+ break; -+ case 4: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x11, 0x10); -+ break; -+ case 5: //d1,pb,TXpause -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x3c, 0x03, 0x90, 0x10); -+ break; -+ case 6: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x32, 0x03, 0x90, 0x10); -+ break; -+ case 7: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x28, 0x03, 0x90, 0x10); -+ break; -+ case 8: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x1e, 0x03, 0x90, 0x10); -+ break; -+ case 9: //d1,bb -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x31, 0x10); -+ break; -+ case 10: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x31, 0x10); -+ break; -+ case 11: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x31, 0x10); -+ break; -+ case 12: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x31, 0x10); -+ break; -+ case 13: //d1,bb,TXpause -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x30, 0x10); -+ break; -+ case 14: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x30, 0x10); -+ break; -+ case 15: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x30, 0x10); -+ break; -+ case 16: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x30, 0x10); -+ break; -+ case 17: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x03, 0x10, 0x10); -+ break; -+ case 18: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ break; -+ case 19: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); -+ break; -+ case 20: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); -+ break; -+ case 21: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x03, 0x11, 0x11); -+ break; -+ case 71: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ break; -+ -+ // following cases is for wifi rssi low // bad antenna isolation, started from 81 -+ case 80: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3c, 0x3, 0x90, 0x50); -+ break; -+ case 81: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3a+nWiFiDurationAdjust, 0x3, 0x90, 0x50); -+ break; -+ case 82: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x30+nWiFiDurationAdjust, 0x03, 0x90, 0x50); -+ break; -+ case 83: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x21, 0x03, 0x90, 0x50); -+ break; -+ case 84: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x15, 0x3, 0x90, 0x50); -+ break; -+ case 85: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3a, 0x03, 0x90, 0x50); -+ break; -+ case 86: -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x21, 0x03, 0x90, 0x50); -+ break; -+ -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(type) -+ { -+ default: -+ case 0: //ANT2PTA, 0x778=1 -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); -+ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FALSE, FALSE); -+ break; -+ case 1: //ANT2BT, 0x778=3 -+ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); -+ delay_ms(5); -+ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); -+ break; -+ -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8192e2ant_SetSwitchSsType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte ssType -+ ) -+{ -+ u1Byte mimoPs=BTC_MIMO_PS_DYNAMIC; -+ u4Byte disRaMask=0x0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], REAL set SS Type = %d\n", ssType)); -+ -+ disRaMask = halbtc8192e2ant_DecideRaMask(pBtCoexist, ssType, pCoexDm->curRaMaskType); -+ halbtc8192e2ant_UpdateRaMask(pBtCoexist, FORCE_EXEC, disRaMask); -+ -+ if(ssType == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ // switch ofdm path -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x11); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81111111); -+ // switch cck patch -+ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x1); -+ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x81); -+ mimoPs=BTC_MIMO_PS_STATIC; -+ } -+ else if(ssType == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x33); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x3); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81121313); -+ // remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu -+ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x0); -+ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x41); -+ mimoPs=BTC_MIMO_PS_DYNAMIC; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimoPs); // set rx 1ss or 2ss -+} -+ -+VOID -+halbtc8192e2ant_SwitchSsType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte newSsType -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s Switch SS Type = %d\n", -+ (bForceExec? "force to":""), newSsType)); -+ pCoexDm->curSsType = newSsType; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preSsType == pCoexDm->curSsType) -+ return; -+ } -+ halbtc8192e2ant_SetSwitchSsType(pBtCoexist, pCoexDm->curSsType); -+ -+ pCoexDm->preSsType = pCoexDm->curSsType; -+} -+ -+VOID -+halbtc8192e2ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8192e2ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ psType = BTC_PS_WIFI_NATIVE; -+ lpsVal = 0x0; -+ rpwmVal = 0x0; -+ } -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8192e2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8192e2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8192e2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+ -+VOID -+halbtc8192e2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8192e2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); -+ -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ halbtc8192e2ant_SwitchSsType(pBtCoexist, FORCE_EXEC, 2); -+ -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+// BOOLEAN bLowPwrDisable=TRUE; -+ -+// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); -+ -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21); -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionWiFiLinkProcess( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ -+} -+ -+BOOLEAN -+halbtc8192e2ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(pBtLinkInfo->bScoExist || pBtLinkInfo->bHidExist) -+ { -+ halbtc8192e2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 0, 0, 0); -+ } -+ else -+ { -+ halbtc8192e2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ } -+ -+ if(!bWifiConnected) -+ { -+// bLowPwrDisable = FALSE; -+// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); -+ -+ if( (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) || -+ (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if(BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+// bLowPwrDisable = FALSE; -+// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else if(BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+// bLowPwrDisable = TRUE; -+// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bBtHsOn) -+ return FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+// bLowPwrDisable = TRUE; -+// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ bCommon = FALSE; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21); -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ bCommon = TRUE; -+ } -+ } -+ } -+ -+ return bCommon; -+} -+ -+ -+VOID -+halbtc8192e2ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bScoHid, -+ IN BOOLEAN bTxPause, -+ IN u1Byte maxInterval -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ { -+ if(bScoHid) -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ else -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ } -+ } -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); -+ if(maxInterval == 1) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 2) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 3) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+} -+ -+VOID -+halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow( -+ IN PBTC_COEXIST pBtCoexist//, -+ //IN u1Byte wifiStatus -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0, btInfoExt; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow()\n")); -+#if 0 -+ if( (BT_8192E_2ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || -+ (BT_8192E_2ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || -+ (BT_8192E_2ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) -+ { -+ if( pCoexDm->curPsTdma != 81 && -+ pCoexDm->curPsTdma != 82 && -+ pCoexDm->curPsTdma != 83 && -+ pCoexDm->curPsTdma != 84 ) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ return; -+ } -+#endif -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ -+ retryCount = pCoexSta->btRetryCnt; -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if(!pCoexDm->bAutoTdmaAdjustLowRssi) -+ { -+ pCoexDm->bAutoTdmaAdjustLowRssi = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjustForWifiRssiLow()!!\n")); -+ -+/* -+ if(BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+ else -+*/ -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); -+ pCoexDm->psTdmaDuAdjType = 81; -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+// retryCount = pCoexSta->btRetryCnt; -+// btInfoExt = pCoexSta->btInfoExt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) -+ retryCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ if(result == -1) -+ { -+/* -+ if( (BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) -+ if( (BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) -+ -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); -+ pCoexDm->psTdmaDuAdjType = 84; -+ } -+*/ -+ if(pCoexDm->curPsTdma == 80) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); -+ pCoexDm->psTdmaDuAdjType = 81; -+ } -+ else if(pCoexDm->curPsTdma == 81) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ } -+ else if(pCoexDm->curPsTdma == 82) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+ else if(pCoexDm->curPsTdma == 83) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); -+ pCoexDm->psTdmaDuAdjType = 84; -+ } -+ } -+ else if(result == 1) -+ { -+/* -+ if( (BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+*/ -+ if(pCoexDm->curPsTdma == 84) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+ else if(pCoexDm->curPsTdma == 83) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ } -+ else if(pCoexDm->curPsTdma == 82) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); -+ pCoexDm->psTdmaDuAdjType = 81; -+ } -+ else if((pCoexDm->curPsTdma == 81)&&((pCoexSta->nScanAPNum <= NOISY_AP_NUM_THRESH))) -+ { -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 80); -+ pCoexDm->psTdmaDuAdjType = 80; -+ } -+ -+ } -+ -+ if( pCoexDm->curPsTdma != 80 && -+ pCoexDm->curPsTdma != 81 && -+ pCoexDm->curPsTdma != 82 && -+ pCoexDm->curPsTdma != 83 && -+ pCoexDm->curPsTdma != 84 ) -+ { -+ // recover to previous adjust type -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ } -+} -+ -+VOID -+halbtc8192e2ant_GetBtRssiThreshold( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte pThres0, -+ IN pu1Byte pThres1 -+ ) -+{ -+ u1Byte antType, btThreshold=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &antType); -+ -+ switch(antType) -+ { -+ case BTC_ANT_TYPE_0: // 92E with SPDT -+ *pThres0 = 100; -+ *pThres1 = 100; -+ break; -+ case BTC_ANT_TYPE_1: //92E without SPDT, poor antenna isolation -+ *pThres0 = 34; -+ *pThres1 = 42; -+ break; -+ case BTC_ANT_TYPE_2: //92E without SPDT, normal antenna isolation -+ *pThres0 = 34; //92E with coupler, goodl antenna isolation -+ *pThres1 = 42; -+ break; -+ case BTC_ANT_TYPE_3: -+ *pThres0 = 34; -+ *pThres1 = 42; -+ break; -+ case BTC_ANT_TYPE_4: -+ *pThres0 = 34; -+ *pThres1 = 42; -+ break; -+ default: -+ break; -+ } -+} -+ -+ -+//undefined -+VOID -+halbtc8192e2ant_ActionUndefined( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // power save state -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ // decrease BT power -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+ -+// SCO only or SCO+PAN(HS) -+VOID -+halbtc8192e2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ // halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, TRUE, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ else -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ else -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ // decrease BT power -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionScoPan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ else -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ -+ // pstdm -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); //shielding room -+ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 10); //open space //antenna at BT -+ else //low RSSI -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); -+ -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room -+ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space -+ else //low RSSI -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte anttype=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &anttype); -+ -+// halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+// btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT -+ { -+ // power save state & pstdma & coex table -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation -+ { -+ // power save state & pstdma & coex table -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ } -+ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ } -+ else //ANTTYPE = 4 for test -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ -+ // power save state -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ // decrease BT power -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8192e2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte anttype=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &anttype); -+ -+// halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+// btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+// anttype = 4; -+ -+ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); //shielding room -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ -+ } -+ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ } -+ else //ANTTYPE = 4 for test -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room -+ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x06); //open space -+ else //low RSSI -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ -+ if( (btRssiState == BTC_RSSI_STATE_LOW) || -+ (btRssiState == BTC_RSSI_STATE_STAY_LOW) ) -+ { -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) -+ { -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2); -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); //shielding room -+ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); //open space //antenna at BT -+ else //low RSSI -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 85); -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room -+ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space -+ else //low RSSI -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+//PAN(HS) only -+VOID -+halbtc8192e2ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ -+ if( (btRssiState == BTC_RSSI_STATE_LOW) || -+ (btRssiState == BTC_RSSI_STATE_STAY_LOW) ) -+ { -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) -+ { -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8192e2ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); //shielding room -+ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); //open space //antenna at BT -+ else //low RSSI -+{ -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); -+} -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room -+ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space -+ else //low RSSI -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ else -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdm -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); //shielding room -+ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); //open space //antenna at BT -+ else //low RSSI -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room -+ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space -+ else //low RSSI -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8192e2ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ else -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); //6 -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); //shielding room -+ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); //open space //antenna at BT -+ else //low RSSI -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); -+ } -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room -+ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space -+ else //low RSSI -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0, anttype=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &anttype); -+ -+ // halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ // btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); -+ -+ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ } -+ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ } -+ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ } -+ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ } -+ else //ANTTYPE = 4 for test -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room -+ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ -+ // limited Rx -+ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ // sw mechanism -+ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room -+ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x06); //open space -+ else //low RSSI -+ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8192e2ant_ActionBtWhckTest( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ -+} -+ -+VOID -+halbtc8192e2ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ -+} -+ -+VOID -+halbtc8192e2ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiUnder5G=FALSE; -+ u1Byte btInfoOriginal=0, btRetryCnt=0; -+ u1Byte algorithm=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ algorithm = halbtc8192e2ant_ActionAlgorithm(pBtCoexist); -+ if(pCoexSta->bC2hBtInquiryPage && (BT_8192E_2ANT_COEX_ALGO_PANHS!=algorithm)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); -+ halbtc8192e2ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ -+ pCoexDm->curAlgorithm = algorithm; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); -+ -+ if(halbtc8192e2ant_IsCommonAction(pBtCoexist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ } -+ else -+ { -+ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", -+ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ } -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8192E_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); -+ halbtc8192e2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_SCO_PAN: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n")); -+ halbtc8192e2ant_ActionScoPan(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); -+ halbtc8192e2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); -+ halbtc8192e2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); -+ halbtc8192e2ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); -+ halbtc8192e2ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); -+ halbtc8192e2ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); -+ halbtc8192e2ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); -+ halbtc8192e2ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); -+ halbtc8192e2ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8192E_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); -+ halbtc8192e2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = undefined!!\n")); -+ halbtc8192e2ant_ActionUndefined(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8192e2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp -+ ) -+{ -+ u4Byte u4Tmp=0; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ if(bBackUp) -+ { -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+ -+ // antenna sw ctrl to bt -+ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE); -+ -+ halbtc8192e2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ // antenna switch control parameter -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0x55555555); -+ -+ // coex parameters -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ // enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // enable PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); -+ // enable mailbox interface -+ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x40); -+ u2Tmp |= BIT9; -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x40, u2Tmp); -+ -+ // enable PTA I2C mailbox -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x101); -+ u1Tmp |= BIT4; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x101, u1Tmp); -+ -+ // enable bt clock when wifi is disabled. -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x93); -+ u1Tmp |= BIT0; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x93, u1Tmp); -+ // enable bt clock when suspend. -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); -+ u1Tmp |= BIT0; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8192e2ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8192e2ant_ -+//============================================================ -+VOID -+EXhalbtc8192e2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8192e2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8192e2ant_InitHwConfig(pBtCoexist, TRUE); -+} -+ -+VOID -+EXhalbtc8192e2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8192e2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8192e2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u2Byte u2Tmp[4]; -+ u4Byte u4Tmp[4]; -+ u4Byte faOfdm, faCck; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Antenna type:", \ -+ pBoardInfo->antType); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8192e2Ant, GLCoexVer8192e2Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8192e2Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+/* -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type", \ -+ pCoexDm->curSsType); -+ CL_PRINTF(cliBuf); -+*/ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ -+ pBtCoexist->btInfo.raMask); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ -+ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ -+ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ -+ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc04); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xd04); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x90c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xc04/ 0xd04/ 0x90c", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x92c); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x92c/ 0x930", \ -+ (u1Tmp[0]), u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4f); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x40/ 0x4f", \ -+ u1Tmp[0], u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 1) -+ halbtc8192e2ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8192e2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ halbtc8192e2ant_CoexAllOff(pBtCoexist); -+ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8192e2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8192e2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); -+ -+ } -+} -+ -+VOID -+EXhalbtc8192e2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8192e2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+} -+ -+VOID -+EXhalbtc8192e2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8192e2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8192E_2ANT_MAX) -+ rspSource = BT_INFO_SRC_8192E_2ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(BT_INFO_SRC_8192E_2ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if( (pCoexSta->btInfoExt & BIT1) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ if(bWifiConnected) -+ { -+ EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if( (pCoexSta->btInfoExt & BIT3) ) -+ { -+ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8192e2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8192e2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8192E_2ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8192E_2ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8192E_2ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8192E_2ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8192E_2ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8192E_2ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ } -+ -+ halbtc8192e2ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ if(!(btInfo&BT_INFO_8192E_2ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8192E_2ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8192E_2ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8192E_2ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8192E_2ANT_B_ACL_BUSY) -+ { -+ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8192E_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bBtBusy = TRUE; -+ bLimitedDig = TRUE; -+ } -+ else -+ { -+ bBtBusy = FALSE; -+ bLimitedDig = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ pCoexDm->bLimitedDig = bLimitedDig; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); -+ -+ halbtc8192e2ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8192e2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ halbtc8192e2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8192e2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8192e2Ant, GLCoexVer8192e2Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) -+ halbtc8192e2ant_QueryBtInfo(pBtCoexist); -+ halbtc8192e2ant_MonitorBtCtr(pBtCoexist); -+ halbtc8192e2ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ if( halbtc8192e2ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust) -+ { -+ halbtc8192e2ant_RunCoexistMechanism(pBtCoexist); -+ } -+#endif -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8192E Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8192E_2ANT GLCoexDm8192e2Ant; ++static PCOEX_DM_8192E_2ANT pCoexDm=&GLCoexDm8192e2Ant; ++static COEX_STA_8192E_2ANT GLCoexSta8192e2Ant; ++static PCOEX_STA_8192E_2ANT pCoexSta=&GLCoexSta8192e2Ant; ++ ++const char *const GLBtInfoSrc8192e2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8192e2Ant=20150615; ++u4Byte GLCoexVer8192e2Ant=0x41; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8192e2ant_ ++//============================================================ ++u1Byte ++halbtc8192e2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8192e2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8192e2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ } ++ } ++} ++ ++u4Byte ++halbtc8192e2ant_DecideRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte ssType, ++ IN u4Byte raMaskType ++ ) ++{ ++ u4Byte disRaMask=0x0; ++ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ if(ssType == 2) ++ disRaMask = 0x0; // enable 2ss ++ else ++ disRaMask = 0xfff00000; // disable 2ss ++ break; ++ case 1: // disable cck 1/2 ++ if(ssType == 2) ++ disRaMask = 0x00000003; // enable 2ss ++ else ++ disRaMask = 0xfff00003; // disable 2ss ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ if(ssType == 2) ++ disRaMask = 0x0001f1f7; // enable 2ss ++ else ++ disRaMask = 0xfff1f1f7; // disable 2ss ++ break; ++ default: ++ break; ++ } ++ ++ return disRaMask; ++} ++ ++VOID ++halbtc8192e2ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++VOID ++halbtc8192e2ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++VOID ++halbtc8192e2ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++VOID ++halbtc8192e2ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8192e2ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType ++ ) ++{ ++ u4Byte disRaMask=0x0; ++ ++ pCoexDm->curRaMaskType = raMaskType; ++ disRaMask = halbtc8192e2ant_DecideRaMask(pBtCoexist, pCoexDm->curSsType, raMaskType); ++ halbtc8192e2ant_UpdateRaMask(pBtCoexist, bForceExec, disRaMask); ++ ++ halbtc8192e2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8192e2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8192e2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++} ++ ++VOID ++halbtc8192e2ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++VOID ++halbtc8192e2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8192e2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++BOOLEAN ++halbtc8192e2ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist,3, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ ++ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) ++ { ++ return TRUE; ++ } ++ ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8192e2ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++ ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8192e2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8192E_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO_PAN; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(pStackInfo->numOfHid >= 2) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO_PAN; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8192e2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = decBtPwrLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", ++ decBtPwrLvl, H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", ++ (bForceExec? "force to":""), decBtPwrLvl)); ++ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n", ++ pCoexDm->preBtDecPwrLvl, pCoexDm->curBtDecPwrLvl)); ++#if 0 // work around, avoid h2c command fail. ++ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) ++ return; ++#endif ++ } ++ halbtc8192e2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); ++ ++ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; ++} ++ ++VOID ++halbtc8192e2ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e2ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreBtAutoReport=%d, bCurBtAutoReport=%d\n", ++ pCoexDm->bPreBtAutoReport, pCoexDm->bCurBtAutoReport)); ++ ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8192e2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8192e2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", ++ pCoexDm->preFwDacSwingLvl, pCoexDm->curFwDacSwingLvl)); ++ ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8192e2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8192e2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8192e2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n", ++ pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink)); ++ ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8192e2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8192e2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!")) ); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8192e2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ //return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n", ++ pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa)); ++ ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8192e2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8192e2ant_SetDacSwingReg( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte level ++ ) ++{ ++ u1Byte val=(u1Byte)level; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val); ++} ++ ++VOID ++halbtc8192e2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ halbtc8192e2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); ++ } ++ else ++ { ++ halbtc8192e2ant_SetDacSwingReg(pBtCoexist, 0x18); ++ } ++} ++ ++ ++VOID ++halbtc8192e2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n", ++ pCoexDm->bPreDacSwingOn, pCoexDm->preDacSwingLvl, ++ pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl)); ++ ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8192e2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8192e2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1); ++ } ++} ++ ++VOID ++halbtc8192e2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n", ++ pCoexDm->bPreAdcBackOff, pCoexDm->bCurAdcBackOff)); ++ ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8192e2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8192e2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ //=================BB AGC Gain Table ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x0a1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x091B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x081C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x071D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x061E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x051F0001); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); ++ } ++ ++#if 0 ++ //=================RF Gain ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); ++ ++ // set rssiAdjustVal for wifi module. ++ if(bAgcTableEn) ++ { ++ rssiAdjustVal = 8; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++#endif ++ ++} ++ ++VOID ++halbtc8192e2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", ++ pCoexDm->bPreAgcTableEn, pCoexDm->bCurAgcTableEn)); ++ ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8192e2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8192e2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8192e2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n", ++ pCoexDm->preVal0x6c0, pCoexDm->preVal0x6c4, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n", ++ pCoexDm->curVal0x6c0, pCoexDm->curVal0x6c4, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc)); ++ ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8192e2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8192e2ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0xdfffdfff, 0x5ffb5ffb, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5ddd5ddd, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ if(pCoexSta->nScanAPNum <= NOISY_AP_NUM_THRESH) ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xfafafafa, 0xffffff, 0x3); ++ else ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5f5f5f5f, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8192e2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8192e2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n", ++ pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct)); ++ ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8192e2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++ ++VOID ++halbtc8192e2ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++ ++VOID ++halbtc8192e2ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], preLps/curLps=0x%x/0x%x, preRpwm/curRpwm=0x%x/0x%x!!\n", ++ pCoexDm->preLps, pCoexDm->curLps, pCoexDm->preRpwm, pCoexDm->curRpwm)); ++ ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], LPS-RPWM_Last=0x%x , LPS-RPWM_Now=0x%x!!\n", ++ pCoexDm->preRpwm, pCoexDm->curRpwm)); ++ ++ return; ++ } ++ } ++ halbtc8192e2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++ ++ ++VOID ++halbtc8192e2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ if(byte1&BIT4 && !(byte1&BIT5)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8192e2ant_SwMechanism1( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bShrinkRxLPF, ++ IN BOOLEAN bLowPenaltyRA, ++ IN BOOLEAN bLimitedDIG, ++ IN BOOLEAN bBTLNAConstrain ++ ) ++{ ++ /* ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 ++ { ++ if (bShrinkRxLPF) ++ bShrinkRxLPF = FALSE; ++ } ++ */ ++ ++ halbtc8192e2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); ++ //halbtc8192e2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8192e2ant_SwMechanism2( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAGCTableShift, ++ IN BOOLEAN bADCBackOff, ++ IN BOOLEAN bSWDACSwing, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ halbtc8192e2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); ++ //halbtc8192e2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); ++ halbtc8192e2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); ++} ++ ++VOID ++halbtc8192e2ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ u4Byte u4Tmp=0; ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x944, 0x24); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x930, 0x700700); ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); ++ else ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); ++ ++ // 0x4c[27][24]='00', Set Antenna to BB ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &= ~BIT24; ++ u4Tmp &= ~BIT27; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ else if(bWifiOff) ++ { ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004); ++ else ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004); ++ ++ // 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp |= BIT24; ++ u4Tmp |= BIT27; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_PATH_WIFI: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); ++ break; ++ case BTC_ANT_PATH_BT: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x20); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4); ++ break; ++ } ++} ++ ++VOID ++halbtc8192e2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0; ++ s1Byte nWiFiDurationAdjust = 0x0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", ++ pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", ++ pCoexDm->prePsTdma, pCoexDm->curPsTdma)); ++ ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ ++ if (pCoexSta->nScanAPNum >= 40) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nScanAPNum >= 20) ++ nWiFiDurationAdjust = -10; ++ ++/* ++ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle ++ } ++ ++ ++ if ( (type == 3) || (type == 13) || (type == 14) ) ++ { ++ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile ++ ++ if (!bWifiBusy) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ } ++ ++ if (pBtLinkInfo->bSlaveRole == TRUE) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ ++*/ ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ case 1: ++ default: //d1,wb ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x11, 0x10); ++ break; ++ case 2: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x11, 0x10); ++ break; ++ case 3: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x11, 0x10); ++ break; ++ case 4: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x11, 0x10); ++ break; ++ case 5: //d1,pb,TXpause ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x3c, 0x03, 0x90, 0x10); ++ break; ++ case 6: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x32, 0x03, 0x90, 0x10); ++ break; ++ case 7: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x28, 0x03, 0x90, 0x10); ++ break; ++ case 8: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x63, 0x1e, 0x03, 0x90, 0x10); ++ break; ++ case 9: //d1,bb ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x31, 0x10); ++ break; ++ case 10: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x31, 0x10); ++ break; ++ case 11: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x31, 0x10); ++ break; ++ case 12: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x31, 0x10); ++ break; ++ case 13: //d1,bb,TXpause ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x30, 0x10); ++ break; ++ case 14: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x30, 0x10); ++ break; ++ case 15: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x30, 0x10); ++ break; ++ case 16: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x30, 0x10); ++ break; ++ case 17: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x03, 0x10, 0x10); ++ break; ++ case 18: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x03, 0x11, 0x11); ++ break; ++ case 71: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ ++ // following cases is for wifi rssi low // bad antenna isolation, started from 81 ++ case 80: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3c, 0x3, 0x90, 0x50); ++ break; ++ case 81: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3a+nWiFiDurationAdjust, 0x3, 0x90, 0x50); ++ break; ++ case 82: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x30+nWiFiDurationAdjust, 0x03, 0x90, 0x50); ++ break; ++ case 83: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x21, 0x03, 0x90, 0x50); ++ break; ++ case 84: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x15, 0x3, 0x90, 0x50); ++ break; ++ case 85: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3a, 0x03, 0x90, 0x50); ++ break; ++ case 86: ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x53, 0x21, 0x03, 0x90, 0x50); ++ break; ++ ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ default: ++ case 0: //ANT2PTA, 0x778=1 ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FALSE, FALSE); ++ break; ++ case 1: //ANT2BT, 0x778=3 ++ halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); ++ delay_ms(5); ++ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); ++ break; ++ ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8192e2ant_SetSwitchSsType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte ssType ++ ) ++{ ++ u1Byte mimoPs=BTC_MIMO_PS_DYNAMIC; ++ u4Byte disRaMask=0x0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], REAL set SS Type = %d\n", ssType)); ++ ++ disRaMask = halbtc8192e2ant_DecideRaMask(pBtCoexist, ssType, pCoexDm->curRaMaskType); ++ halbtc8192e2ant_UpdateRaMask(pBtCoexist, FORCE_EXEC, disRaMask); ++ ++ if(ssType == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ // switch ofdm path ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x11); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81111111); ++ // switch cck patch ++ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x1); ++ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x81); ++ mimoPs=BTC_MIMO_PS_STATIC; ++ } ++ else if(ssType == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x33); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x3); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81121313); ++ // remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu ++ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x0); ++ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x41); ++ mimoPs=BTC_MIMO_PS_DYNAMIC; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimoPs); // set rx 1ss or 2ss ++} ++ ++VOID ++halbtc8192e2ant_SwitchSsType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte newSsType ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s Switch SS Type = %d\n", ++ (bForceExec? "force to":""), newSsType)); ++ pCoexDm->curSsType = newSsType; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preSsType == pCoexDm->curSsType) ++ return; ++ } ++ halbtc8192e2ant_SetSwitchSsType(pBtCoexist, pCoexDm->curSsType); ++ ++ pCoexDm->preSsType = pCoexDm->curSsType; ++} ++ ++VOID ++halbtc8192e2ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8192e2ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ psType = BTC_PS_WIFI_NATIVE; ++ lpsVal = 0x0; ++ rpwmVal = 0x0; ++ } ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8192e2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8192e2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8192e2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++VOID ++halbtc8192e2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8192e2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); ++ ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ halbtc8192e2ant_SwitchSsType(pBtCoexist, FORCE_EXEC, 2); ++ ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++// BOOLEAN bLowPwrDisable=TRUE; ++ ++// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); ++ ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21); ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionWiFiLinkProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ ++} ++ ++BOOLEAN ++halbtc8192e2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(pBtLinkInfo->bScoExist || pBtLinkInfo->bHidExist) ++ { ++ halbtc8192e2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 0, 0, 0); ++ } ++ else ++ { ++ halbtc8192e2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ } ++ ++ if(!bWifiConnected) ++ { ++// bLowPwrDisable = FALSE; ++// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); ++ ++ if( (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) || ++ (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if(BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++// bLowPwrDisable = FALSE; ++// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else if(BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++// bLowPwrDisable = TRUE; ++// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bBtHsOn) ++ return FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++// bLowPwrDisable = TRUE; ++// pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ bCommon = FALSE; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21); ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ bCommon = TRUE; ++ } ++ } ++ } ++ ++ return bCommon; ++} ++ ++ ++VOID ++halbtc8192e2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++VOID ++halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow( ++ IN PBTC_COEXIST pBtCoexist//, ++ //IN u1Byte wifiStatus ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0, btInfoExt; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow()\n")); ++#if 0 ++ if( (BT_8192E_2ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || ++ (BT_8192E_2ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || ++ (BT_8192E_2ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) ++ { ++ if( pCoexDm->curPsTdma != 81 && ++ pCoexDm->curPsTdma != 82 && ++ pCoexDm->curPsTdma != 83 && ++ pCoexDm->curPsTdma != 84 ) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ return; ++ } ++#endif ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ ++ retryCount = pCoexSta->btRetryCnt; ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(!pCoexDm->bAutoTdmaAdjustLowRssi) ++ { ++ pCoexDm->bAutoTdmaAdjustLowRssi = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjustForWifiRssiLow()!!\n")); ++ ++/* ++ if(BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++ else ++*/ ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); ++ pCoexDm->psTdmaDuAdjType = 81; ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++// retryCount = pCoexSta->btRetryCnt; ++// btInfoExt = pCoexSta->btInfoExt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) ++ retryCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ if(result == -1) ++ { ++/* ++ if( (BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) ++ if( (BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) ++ ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); ++ pCoexDm->psTdmaDuAdjType = 84; ++ } ++*/ ++ if(pCoexDm->curPsTdma == 80) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); ++ pCoexDm->psTdmaDuAdjType = 81; ++ } ++ else if(pCoexDm->curPsTdma == 81) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ } ++ else if(pCoexDm->curPsTdma == 82) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++ else if(pCoexDm->curPsTdma == 83) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); ++ pCoexDm->psTdmaDuAdjType = 84; ++ } ++ } ++ else if(result == 1) ++ { ++/* ++ if( (BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++*/ ++ if(pCoexDm->curPsTdma == 84) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++ else if(pCoexDm->curPsTdma == 83) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ } ++ else if(pCoexDm->curPsTdma == 82) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); ++ pCoexDm->psTdmaDuAdjType = 81; ++ } ++ else if((pCoexDm->curPsTdma == 81)&&((pCoexSta->nScanAPNum <= NOISY_AP_NUM_THRESH))) ++ { ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 80); ++ pCoexDm->psTdmaDuAdjType = 80; ++ } ++ ++ } ++ ++ if( pCoexDm->curPsTdma != 80 && ++ pCoexDm->curPsTdma != 81 && ++ pCoexDm->curPsTdma != 82 && ++ pCoexDm->curPsTdma != 83 && ++ pCoexDm->curPsTdma != 84 ) ++ { ++ // recover to previous adjust type ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ } ++} ++ ++VOID ++halbtc8192e2ant_GetBtRssiThreshold( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte pThres0, ++ IN pu1Byte pThres1 ++ ) ++{ ++ u1Byte antType, btThreshold=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &antType); ++ ++ switch(antType) ++ { ++ case BTC_ANT_TYPE_0: // 92E with SPDT ++ *pThres0 = 100; ++ *pThres1 = 100; ++ break; ++ case BTC_ANT_TYPE_1: //92E without SPDT, poor antenna isolation ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_2: //92E without SPDT, normal antenna isolation ++ *pThres0 = 34; //92E with coupler, goodl antenna isolation ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_3: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_4: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++//undefined ++VOID ++halbtc8192e2ant_ActionUndefined( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // power save state ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // decrease BT power ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8192e2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ // halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, TRUE, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ else ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ else ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // decrease BT power ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionScoPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ else ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ ++ // pstdm ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); //shielding room ++ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 10); //open space //antenna at BT ++ else //low RSSI ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); ++ ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room ++ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space ++ else //low RSSI ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte anttype=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &anttype); ++ ++// halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++// btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT ++ { ++ // power save state & pstdma & coex table ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation ++ { ++ // power save state & pstdma & coex table ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ } ++ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ } ++ else //ANTTYPE = 4 for test ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ ++ // power save state ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // decrease BT power ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8192e2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte anttype=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &anttype); ++ ++// halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++// btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++// anttype = 4; ++ ++ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); //shielding room ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ ++ } ++ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ } ++ else //ANTTYPE = 4 for test ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room ++ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x06); //open space ++ else //low RSSI ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ ++ if( (btRssiState == BTC_RSSI_STATE_LOW) || ++ (btRssiState == BTC_RSSI_STATE_STAY_LOW) ) ++ { ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) ++ { ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2); ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); //shielding room ++ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); //open space //antenna at BT ++ else //low RSSI ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 85); ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room ++ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space ++ else //low RSSI ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++//PAN(HS) only ++VOID ++halbtc8192e2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++// halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ ++ if( (btRssiState == BTC_RSSI_STATE_LOW) || ++ (btRssiState == BTC_RSSI_STATE_STAY_LOW) ) ++ { ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) ++ { ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8192e2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); //shielding room ++ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); //open space //antenna at BT ++ else //low RSSI ++{ ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); ++} ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room ++ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space ++ else //low RSSI ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ else ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdm ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); //shielding room ++ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); //open space //antenna at BT ++ else //low RSSI ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room ++ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space ++ else //low RSSI ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8192e2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++ halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ // btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ else ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); //6 ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); //shielding room ++ else if (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); //open space //antenna at BT ++ else //low RSSI ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); ++ } ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room ++ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //open space ++ else //low RSSI ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0, anttype=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &anttype); ++ ++ // halbtc8192e2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ // btRssiState = halbtc8192e2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42); ++ ++ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ } ++ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ } ++ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ } ++ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ } ++ else //ANTTYPE = 4 for test ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8192e2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8192e2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH) // BT HIGH RSSI & shielding room ++ halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ ++ // limited Rx ++ halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ // sw mechanism ++ halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); //shielding room ++ else if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH)) ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x06); //open space ++ else //low RSSI ++ halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8192e2ant_ActionBtWhckTest( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ ++} ++ ++VOID ++halbtc8192e2ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ ++} ++ ++VOID ++halbtc8192e2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiUnder5G=FALSE; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ algorithm = halbtc8192e2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bC2hBtInquiryPage && (BT_8192E_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8192e2ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ ++ if(halbtc8192e2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8192E_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8192e2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_SCO_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n")); ++ halbtc8192e2ant_ActionScoPan(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8192e2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8192e2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); ++ halbtc8192e2ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8192e2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8192e2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8192e2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8192e2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8192e2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8192e2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = undefined!!\n")); ++ halbtc8192e2ant_ActionUndefined(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8192e2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp ++ ) ++{ ++ u4Byte u4Tmp=0; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ if(bBackUp) ++ { ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++ ++ // antenna sw ctrl to bt ++ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE); ++ ++ halbtc8192e2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ // antenna switch control parameter ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0x55555555); ++ ++ // coex parameters ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ // enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // enable PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++ // enable mailbox interface ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x40); ++ u2Tmp |= BIT9; ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x40, u2Tmp); ++ ++ // enable PTA I2C mailbox ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x101); ++ u1Tmp |= BIT4; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x101, u1Tmp); ++ ++ // enable bt clock when wifi is disabled. ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x93); ++ u1Tmp |= BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x93, u1Tmp); ++ // enable bt clock when suspend. ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); ++ u1Tmp |= BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8192e2ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8192e2ant_ ++//============================================================ ++VOID ++EXhalbtc8192e2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8192e2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8192e2ant_InitHwConfig(pBtCoexist, TRUE); ++} ++ ++VOID ++EXhalbtc8192e2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8192e2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8192e2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u2Byte u2Tmp[4]; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Antenna type:", \ ++ pBoardInfo->antType); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8192e2Ant, GLCoexVer8192e2Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8192e2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++/* ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type", \ ++ pCoexDm->curSsType); ++ CL_PRINTF(cliBuf); ++*/ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ ++ pBtCoexist->btInfo.raMask); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ ++ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ ++ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc04); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xd04); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x90c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xc04/ 0xd04/ 0x90c", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x92c); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x92c/ 0x930", \ ++ (u1Tmp[0]), u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4f); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x40/ 0x4f", \ ++ u1Tmp[0], u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 1) ++ halbtc8192e2ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8192e2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ halbtc8192e2ant_CoexAllOff(pBtCoexist); ++ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8192e2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8192e2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); ++ ++ } ++} ++ ++VOID ++EXhalbtc8192e2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192e2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8192e2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192e2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8192E_2ANT_MAX) ++ rspSource = BT_INFO_SRC_8192E_2ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8192E_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if( (pCoexSta->btInfoExt & BIT1) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ if(bWifiConnected) ++ { ++ EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if( (pCoexSta->btInfoExt & BIT3) ) ++ { ++ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8192e2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8192e2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8192E_2ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8192E_2ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8192E_2ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8192E_2ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8192E_2ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8192E_2ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ } ++ ++ halbtc8192e2ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ if(!(btInfo&BT_INFO_8192E_2ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8192E_2ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8192E_2ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8192E_2ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8192E_2ANT_B_ACL_BUSY) ++ { ++ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8192E_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bBtBusy = TRUE; ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ pCoexDm->bLimitedDig = bLimitedDig; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ ++ halbtc8192e2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8192e2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ halbtc8192e2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8192e2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8192e2Ant, GLCoexVer8192e2Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) ++ halbtc8192e2ant_QueryBtInfo(pBtCoexist); ++ halbtc8192e2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8192e2ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ if( halbtc8192e2ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust) ++ { ++ halbtc8192e2ant_RunCoexistMechanism(pBtCoexist); ++ } ++#endif ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e2Ant.h new file mode 100644 -index 000000000..c580a8979 +index 0000000..1876bf4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8192e2Ant.h @@ -0,0 +1,231 @@ -+//=========================================== -+// The following is for 8192E 2Ant BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8192E_2ANT 0 -+ -+#define BT_INFO_8192E_2ANT_B_FTP BIT7 -+#define BT_INFO_8192E_2ANT_B_A2DP BIT6 -+#define BT_INFO_8192E_2ANT_B_HID BIT5 -+#define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8192E_2ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8192E_2ANT_B_CONNECTION BIT0 -+ -+#define BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT 2 -+#define NOISY_AP_NUM_THRESH 5 -+ -+typedef enum _BT_INFO_SRC_8192E_2ANT{ -+ BT_INFO_SRC_8192E_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8192E_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8192E_2ANT_MAX -+}BT_INFO_SRC_8192E_2ANT,*PBT_INFO_SRC_8192E_2ANT; -+ -+typedef enum _BT_8192E_2ANT_BT_STATUS{ -+ BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8192E_2ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8192E_2ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8192E_2ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8192E_2ANT_BT_STATUS_MAX -+}BT_8192E_2ANT_BT_STATUS,*PBT_8192E_2ANT_BT_STATUS; -+ -+typedef enum _BT_8192E_2ANT_COEX_ALGO{ -+ BT_8192E_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8192E_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8192E_2ANT_COEX_ALGO_SCO_PAN = 0x2, -+ BT_8192E_2ANT_COEX_ALGO_HID = 0x3, -+ BT_8192E_2ANT_COEX_ALGO_A2DP = 0x4, -+ BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS = 0x5, -+ BT_8192E_2ANT_COEX_ALGO_PANEDR = 0x6, -+ BT_8192E_2ANT_COEX_ALGO_PANHS = 0x7, -+ BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8, -+ BT_8192E_2ANT_COEX_ALGO_PANEDR_HID = 0x9, -+ BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa, -+ BT_8192E_2ANT_COEX_ALGO_HID_A2DP = 0xb, -+ BT_8192E_2ANT_COEX_ALGO_MAX = 0xc -+}BT_8192E_2ANT_COEX_ALGO,*PBT_8192E_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8192E_2ANT{ -+ // fw mechanism -+ u1Byte preBtDecPwrLvl; -+ u1Byte curBtDecPwrLvl; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bResetTdmaAdjust; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bAutoTdmaAdjustLowRssi; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt -+ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt -+ u2Byte backupRetryLimit; -+ u1Byte backupAmpduMaxTime; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ u1Byte preSsType; -+ u1Byte curSsType; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ u1Byte curRaMaskType; -+ u1Byte preArfrType; -+ u1Byte curArfrType; -+ u1Byte preRetryLimitType; -+ u1Byte curRetryLimitType; -+ u1Byte preAmpduTimeType; -+ u1Byte curAmpduTimeType; -+} COEX_DM_8192E_2ANT, *PCOEX_DM_8192E_2ANT; -+ -+typedef struct _COEX_STA_8192E_2ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8192E_2ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8192E_2ANT_MAX]; -+ BOOLEAN bC2hBtInquiryPage; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ u1Byte nScanAPNum; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ u1Byte nCoexTableType; -+ BOOLEAN bForceLpsOn; -+ -+ u1Byte disVerInfoCnt; -+}COEX_STA_8192E_2ANT, *PCOEX_STA_8192E_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8192e2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8192e2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8192e2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8192e2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8192e2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8192E 2Ant BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8192E_2ANT 0 ++ ++#define BT_INFO_8192E_2ANT_B_FTP BIT7 ++#define BT_INFO_8192E_2ANT_B_A2DP BIT6 ++#define BT_INFO_8192E_2ANT_B_HID BIT5 ++#define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8192E_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8192E_2ANT_B_CONNECTION BIT0 ++ ++#define BT_INFO_8192E_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT 2 ++#define NOISY_AP_NUM_THRESH 5 ++ ++typedef enum _BT_INFO_SRC_8192E_2ANT{ ++ BT_INFO_SRC_8192E_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8192E_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8192E_2ANT_MAX ++}BT_INFO_SRC_8192E_2ANT,*PBT_INFO_SRC_8192E_2ANT; ++ ++typedef enum _BT_8192E_2ANT_BT_STATUS{ ++ BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8192E_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8192E_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8192E_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8192E_2ANT_BT_STATUS_MAX ++}BT_8192E_2ANT_BT_STATUS,*PBT_8192E_2ANT_BT_STATUS; ++ ++typedef enum _BT_8192E_2ANT_COEX_ALGO{ ++ BT_8192E_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8192E_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8192E_2ANT_COEX_ALGO_SCO_PAN = 0x2, ++ BT_8192E_2ANT_COEX_ALGO_HID = 0x3, ++ BT_8192E_2ANT_COEX_ALGO_A2DP = 0x4, ++ BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS = 0x5, ++ BT_8192E_2ANT_COEX_ALGO_PANEDR = 0x6, ++ BT_8192E_2ANT_COEX_ALGO_PANHS = 0x7, ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8, ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_HID = 0x9, ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa, ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP = 0xb, ++ BT_8192E_2ANT_COEX_ALGO_MAX = 0xc ++}BT_8192E_2ANT_COEX_ALGO,*PBT_8192E_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8192E_2ANT{ ++ // fw mechanism ++ u1Byte preBtDecPwrLvl; ++ u1Byte curBtDecPwrLvl; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bAutoTdmaAdjustLowRssi; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt ++ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt ++ u2Byte backupRetryLimit; ++ u1Byte backupAmpduMaxTime; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ u1Byte preSsType; ++ u1Byte curSsType; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ u1Byte curRaMaskType; ++ u1Byte preArfrType; ++ u1Byte curArfrType; ++ u1Byte preRetryLimitType; ++ u1Byte curRetryLimitType; ++ u1Byte preAmpduTimeType; ++ u1Byte curAmpduTimeType; ++} COEX_DM_8192E_2ANT, *PCOEX_DM_8192E_2ANT; ++ ++typedef struct _COEX_STA_8192E_2ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8192E_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8192E_2ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ u1Byte nScanAPNum; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ u1Byte nCoexTableType; ++ BOOLEAN bForceLpsOn; ++ ++ u1Byte disVerInfoCnt; ++}COEX_STA_8192E_2ANT, *PCOEX_STA_8192E_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8192e2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8192e2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192e2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8192e2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192e2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b1Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b1Ant.c new file mode 100644 -index 000000000..de5cd9529 +index 0000000..ccc67ee --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b1Ant.c @@ -0,0 +1,5239 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8703B Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8703b1Ant.tmh" -+#endif -+ -+#if (RTL8703B_SUPPORT == 1) -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8703B_1ANT GLCoexDm8703b1Ant; -+static PCOEX_DM_8703B_1ANT pCoexDm=&GLCoexDm8703b1Ant; -+static COEX_STA_8703B_1ANT GLCoexSta8703b1Ant; -+static PCOEX_STA_8703B_1ANT pCoexSta=&GLCoexSta8703b1Ant; -+static PSDSCAN_STA_8703B_1ANT GLPsdScan8703b1Ant; -+static PPSDSCAN_STA_8703B_1ANT pPsdScan = &GLPsdScan8703b1Ant; -+ -+ -+const char *const GLBtInfoSrc8703b1Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8703b1Ant=20150904; -+u4Byte GLCoexVer8703b1Ant=0x04; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8703b1ant_ -+//============================================================ -+u1Byte -+halbtc8703b1ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8703b1ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8703b1ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+VOID -+halbtc8703b1ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+VOID -+halbtc8703b1ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+VOID -+halbtc8703b1ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8703b1ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType -+ ) -+{ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ halbtc8703b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); -+ break; -+ case 1: // disable cck 1/2 -+ halbtc8703b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ halbtc8703b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); -+ break; -+ default: -+ break; -+ } -+ -+ halbtc8703b1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8703b1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8703b1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+} -+ -+VOID -+halbtc8703b1ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+VOID -+halbtc8703b1ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b1ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp, u1Tmp1; -+ s4Byte wifiRssi; -+ static u1Byte NumOfBtCounterChk = 0; -+ -+ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS -+ //if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) -+ -+ if (pCoexSta->bUnderIps) -+ { -+ //pCoexSta->highPriorityTx = 65535; -+ //pCoexSta->highPriorityRx = 65535; -+ //pCoexSta->lowPriorityTx = 65535; -+ //pCoexSta->lowPriorityRx = 65535; -+ //return; -+ } -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ if( (pCoexSta->lowPriorityTx > 1150) && (!pCoexSta->bC2hBtInquiryPage)) -+ pCoexSta->popEventCnt++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", -+ regHPRx, regHPTx, regLPRx, regLPTx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+ -+ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) -+ { -+ NumOfBtCounterChk++; -+ if (NumOfBtCounterChk >= 3) -+ { -+ halbtc8703b1ant_QueryBtInfo(pBtCoexist); -+ NumOfBtCounterChk = 0; -+ } -+ } -+} -+ -+ -+VOID -+halbtc8703b1ant_MonitorWiFiCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u2Byte u2Tmp[3]; -+ s4Byte wifiRssi=0; -+ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; -+ static u1Byte nCCKLockCounter = 0; -+ u4Byte TotalCnt; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->nCRCOK_CCK = 0; -+ pCoexSta->nCRCOK_11g = 0; -+ pCoexSta->nCRCOK_11n = 0; -+ pCoexSta->nCRCOK_11nAgg = 0; -+ -+ pCoexSta->nCRCErr_CCK = 0; -+ pCoexSta->nCRCErr_11g = 0; -+ pCoexSta->nCRCErr_11n = 0; -+ pCoexSta->nCRCErr_11nAgg = 0; -+ } -+ else -+ { -+ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); -+ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); -+ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); -+ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); -+ -+ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); -+ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); -+ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); -+ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); -+ } -+ -+ -+ //reset counter -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); -+ -+ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) -+ { -+ TotalCnt = pCoexSta->nCRCOK_CCK + pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + -+ pCoexSta->nCRCOK_11nAgg; -+ -+ if ( (pCoexDm->btStatus == BT_8703B_1ANT_BT_STATUS_ACL_BUSY) || -+ (pCoexDm->btStatus == BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY) || -+ (pCoexDm->btStatus == BT_8703B_1ANT_BT_STATUS_SCO_BUSY) ) -+ { -+ if (pCoexSta->nCRCOK_CCK >(TotalCnt -pCoexSta->nCRCOK_CCK)) -+ { -+ if (nCCKLockCounter < 3) -+ nCCKLockCounter++; -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ if (!pCoexSta->bPreCCKLock) -+ { -+ -+ if (nCCKLockCounter >= 3) -+ pCoexSta->bCCKLock = TRUE; -+ else -+ pCoexSta->bCCKLock = FALSE; -+ } -+ else -+ { -+ if (nCCKLockCounter == 0) -+ pCoexSta->bCCKLock = FALSE; -+ else -+ pCoexSta->bCCKLock = TRUE; -+ } -+ -+ if (pCoexSta->bCCKLock) -+ pCoexSta->bCCKEverLock = TRUE; -+ -+ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; -+ -+ -+} -+ -+BOOLEAN -+halbtc8703b1ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8703b1ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ pBtLinkInfo->bBtHiPriLinkExist = pCoexSta->bBtHiPriLinkExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+ -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+VOID -+halbtc8703b1ant_UpdateWifiChannelInfo( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ BOOLEAN bWifiUnderBMode = FALSE; -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; //enable BT AFH skip WL channel for 8703b because BT Rx LO interference -+ //H2C_Parameter[0] = 0x0; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+ -+} -+ -+u1Byte -+halbtc8703b1ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8703B_1ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8703b1ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b1ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8703b1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID halbtc8703b1ant_WriteScoreBoard( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u2Byte scoreboardval -+ ) -+{ -+ u2Byte val; -+ -+ val = (scoreboardval & 0x7fff) | 0x8000; -+ -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0xaa, val); -+ -+#if 0 -+ u1Byte H2C_Parameter[3] ={0,0,0}; -+ -+ -+ // write "Set Status" -+ H2C_Parameter[0] = 0x2; -+ -+ // write score board 15-bit value to H2C parameter -+ H2C_Parameter[1] = scoreboardval & 0xff; -+ H2C_Parameter[2] = (scoreboardval & 0x7f00) >> 8; -+ -+ // Set Interrupt to BT -+ H2C_Parameter[2] = H2C_Parameter[2] | 0x80; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Write BT Scoreboard: H2C 0x71[1:0]= %02x%02x\n", -+ H2C_Parameter[2], H2C_Parameter[1])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x71, 3, H2C_Parameter); -+ -+#endif -+} -+ -+VOID halbtc8703b1ant_ReadScoreBoard( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u2Byte* uScoreBoardVal -+ ) -+{ -+ -+ *uScoreBoardVal = (pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xaa)) & 0x7fff; -+ -+ -+ -+#if 0 -+ u1Byte H2C_Parameter[3] ={0,0,0}; -+ -+ // write "Get Status" -+ H2C_Parameter[0] = 0x1; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Read BT Scoreboard!!\n")); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x71, 3, H2C_Parameter); -+ -+ //the BT Scoreboard will be returned by C2H from EXhalbtc8703b1ant_ScoreBoardStatusNotify() -+#endif -+} -+ -+VOID halbtc8703b1ant_PostActiveStateToBT( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiActive -+ ) -+{ -+ -+ if(bWifiActive) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Post WL = Active in Scoreboard!!\n")); -+ halbtc8703b1ant_WriteScoreBoard(pBtCoexist, 0x0001); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Post WL = Non-Active in Scoreboard!!\n")); -+ halbtc8703b1ant_WriteScoreBoard(pBtCoexist, 0x0000); -+ } -+ -+ // The BT should set "No Shunt-down" mode if WL = Active for BT Synthesizer on/off interference WL Lo issue at 8703b b-cut. -+ -+} -+ -+VOID -+halbtc8703b1ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!") )); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b1ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8703b1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+u4Byte -+halbtc8703b1ant_LTECoex_InDirectReadReg( -+IN PBTC_COEXIST pBtCoexist, -+IN u2Byte RegAddr -+) -+{ -+ u4Byte j =0; -+ -+ -+ //wait for ready bit before access 0x7c0 -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x7c0, 0x800F0000|RegAddr); -+ -+ do -+ { -+ j++; -+ }while( ((pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7c3) & BIT5) ==0) && (j fBtcRead4Byte(pBtCoexist, 0x7c8)); //get read data -+ -+} -+ -+VOID -+halbtc8703b1ant_LTECoex_InDirectWriteReg( -+IN PBTC_COEXIST pBtCoexist, -+IN u2Byte RegAddr, -+IN u4Byte BitMask, -+IN u4Byte RegValue -+) -+{ -+ u4Byte val, i=0, j=0, bitpos = 0; -+ -+ -+ if (BitMask == 0x0) -+ return; -+ if (BitMask == 0xffffffff) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x7c4, RegValue); //put write data -+ -+ //wait for ready bit before access 0x7c0 -+ do -+ { -+ j++; -+ }while( ((pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7c3) & BIT5) ==0) && (j fBtcWrite4Byte(pBtCoexist, 0x7c0, 0xc00F0000|RegAddr); -+ } -+ else -+ { -+ for(i=0; i<=31; i++) -+ { -+ if ( ((BitMask >> i) & 0x1) == 0x1) -+ { -+ bitpos = i; -+ break; -+ } -+ } -+ -+ //read back register value before write -+ val = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, RegAddr); -+ val = (val & (~BitMask)) | (RegValue << bitpos); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x7c4, val); //put write data -+ -+ //wait for ready bit before access 0x7c0 -+ do -+ { -+ j++; -+ }while( ((pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7c3) & BIT5) ==0) && (j fBtcWrite4Byte(pBtCoexist, 0x7c0, 0xc00F0000|RegAddr); -+ -+ } -+ -+} -+ -+void -+halbtc8703b1ant_LTECoex_Enable( -+IN PBTC_COEXIST pBtCoexist, -+IN BOOLEAN bEnable -+) -+{ -+ u1Byte val; -+ -+ val = (bEnable)? 1 : 0; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, 0x80, val); //0x38[7] -+ -+} -+ -+void -+halbtc8703b1ant_LTECoex_PathControlOwner( -+IN PBTC_COEXIST pBtCoexist, -+IN BOOLEAN bWiFiControl -+) -+{ -+ u1Byte val; -+ -+ val = (bWiFiControl)? 1 : 0; -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x73, 0x4, val); //0x70[26] -+ -+} -+ -+void -+halbtc8703b1ant_LTECoex_Set_GNT_BT( -+IN PBTC_COEXIST pBtCoexist, -+IN u1Byte nControlBlock, -+IN BOOLEAN bSWControl, -+IN u1Byte nState -+) -+{ -+ u4Byte val=0, BitMask; -+ -+ nState = nState & 0x1; -+ val = (bSWControl)? ((nState<<1) | 0x1) : 0; -+ -+ switch(nControlBlock) -+ { -+ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: -+ default: -+ BitMask = 0xc000; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[15:14] -+ BitMask = 0x0c00; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[11:10] -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_RFC: -+ BitMask = 0xc000; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[15:14] -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_BB: -+ BitMask = 0x0c00; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[11:10] -+ break; -+ -+ } -+ -+} -+ -+void -+halbtc8703b1ant_LTECoex_Set_GNT_WL( -+IN PBTC_COEXIST pBtCoexist, -+IN u1Byte nControlBlock, -+IN BOOLEAN bSWControl, -+IN u1Byte nState -+) -+{ -+ u4Byte val=0, BitMask; -+ -+ nState = nState & 0x1; -+ val = (bSWControl)? ((nState<<1) | 0x1) : 0; -+ -+ switch(nControlBlock) -+ { -+ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: -+ default: -+ BitMask = 0x3000; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[13:12] -+ BitMask = 0x0300; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[9:8] -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_RFC: -+ BitMask = 0x3000; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[13:12] -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_BB: -+ BitMask = 0x0300; -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[9:8] -+ break; -+ -+ } -+ -+} -+ -+void -+halbtc8703b1ant_LTECoex_Set_CoexTable( -+IN PBTC_COEXIST pBtCoexist, -+IN u1Byte nTableType, -+IN u2Byte nTableContent -+) -+{ -+ u2Byte RegAddr = 0x0000; -+ -+ switch(nTableType) -+ { -+ case BT_8703B_1ANT_CTT_WL_VS_LTE: -+ RegAddr = 0xa0; -+ break; -+ case BT_8703B_1ANT_CTT_BT_VS_LTE: -+ RegAddr = 0xa4; -+ break; -+ } -+ -+ if (RegAddr != 0x0000) -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, RegAddr, 0xffff, nTableContent); // 0xa0[15:0] or 0xa4[15:0] -+ -+ -+} -+ -+ -+void -+halbtc8703b1ant_LTECoex_Set_BreakTable( -+IN PBTC_COEXIST pBtCoexist, -+IN u1Byte nTableType, -+IN u1Byte nTableContent -+) -+{ -+ u2Byte RegAddr = 0x0000; -+ -+ switch(nTableType) -+ { -+ case BT_8703B_1ANT_LBTT_WL_BREAK_LTE: -+ RegAddr = 0xa8; -+ break; -+ case BT_8703B_1ANT_LBTT_BT_BREAK_LTE: -+ RegAddr = 0xac; -+ break; -+ case BT_8703B_1ANT_LBTT_LTE_BREAK_WL: -+ RegAddr = 0xb0; -+ break; -+ case BT_8703B_1ANT_LBTT_LTE_BREAK_BT: -+ RegAddr = 0xb4; -+ break; -+ } -+ -+ if (RegAddr != 0x0000) -+ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, RegAddr, 0xff, nTableContent); // 0xa8[15:0] or 0xb4[15:0] -+ -+ -+} -+ -+VOID -+halbtc8703b1ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8703b1ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8703b1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8703b1ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+ u4Byte nBreakTable; -+ u1Byte nSelectTable; -+ -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); -+ -+ pCoexSta->nCoexTableType = type; -+ -+ if (pCoexSta->bConCurrentRxModeOn == TRUE) -+ { -+ nBreakTable = 0xf0ffffff; //set WL hi-pri can break BT -+ nSelectTable = 0xb; //set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) -+ } -+ else -+ { -+ nBreakTable = 0xffffff; -+ nSelectTable = 0x3; -+ } -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, nBreakTable, nSelectTable); -+ break; -+ case 1: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, nBreakTable, nSelectTable); -+ break; -+ case 2: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa5a5a5a, 0xaa5a5a5a, nBreakTable, nSelectTable); -+ break; -+ case 3: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaa5a5a5a, nBreakTable, nSelectTable); -+ break; -+ case 4: -+ //if ( (pCoexSta->bCCKEverLock) && (pCoexSta->nScanAPNum <= 5) ) -+ // halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaaaa5a5a, nBreakTable, nSelectTable); -+ //else -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaa5a5a5a, nBreakTable, nSelectTable); -+ break; -+ case 5: -+ //if ( (pCoexSta->bCCKEverLock) && (pCoexSta->nScanAPNum <= 5) ) -+ // halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaaaa5a5a, nBreakTable, nSelectTable); -+ //else -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, nBreakTable, nSelectTable); -+ break; -+ case 6: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, nBreakTable, nSelectTable); -+ break; -+ case 7: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, nBreakTable, nSelectTable); -+ break; -+ case 8: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); -+ break; -+ case 9: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); -+ break; -+ case 10: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); -+ break; -+ case 11: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); -+ break; -+ case 12: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); -+ break; -+ case 13: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, nBreakTable, nSelectTable); -+ break; -+ case 14: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, nBreakTable, nSelectTable); -+ break; -+ case 15: -+ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, nBreakTable, nSelectTable); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8703b1ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b1ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8703b1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8703b1ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8703b1ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8703b1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8703b1ant_SwMechanism( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRA -+ ) -+{ -+ halbtc8703b1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8703b1ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte fwVer=0, u4Tmp=0, cntBtCalChk=0; -+ BOOLEAN bPgExtSwitch=FALSE; -+ BOOLEAN bUseExtSwitch=FALSE; -+ BOOLEAN bIsInMpMode = FALSE; -+ u1Byte H2C_Parameter[2] ={0}, u1Tmp = 0; -+ u4Byte u4Tmp1=0, u4Tmp2=0; -+ -+ pCoexDm->curAntPosType = antPosType; -+ -+#if 1 -+ u4Tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); -+ u4Tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x73); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (Before Setup) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); -+#endif -+ -+ if(bInitHwCfg) -+ { -+ //Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) -+ halbtc8703b1ant_LTECoex_Enable(pBtCoexist, 0x0); -+ -+ //GNT_WL_LTE always = 1 (this should be config if LTE coex is required) -+ halbtc8703b1ant_LTECoex_Set_CoexTable(pBtCoexist, BT_8703B_1ANT_CTT_WL_VS_LTE, 0xffff); -+ -+ //GNT_BT_LTE always = 1 (this should be config if LTE coex is required) -+ halbtc8703b1ant_LTECoex_Set_CoexTable(pBtCoexist, BT_8703B_1ANT_CTT_BT_VS_LTE, 0xffff); -+ -+ // Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) -+ while(cntBtCalChk <= 20) -+ { -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d); -+ cntBtCalChk++; -+ if(u1Tmp & BIT0) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", cntBtCalChk)); -+ delay_ms(50); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", cntBtCalChk)); -+ break; -+ } -+ } -+ -+ //set Path control owner to WL at initial step -+ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); -+ } -+ else if(bWifiOff) -+ { -+ //Disable LTE Coex Function in WiFi side -+ halbtc8703b1ant_LTECoex_Enable(pBtCoexist, 0x0); -+ -+ //if MP mode -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); -+ if(bIsInMpMode) -+ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); //set Path control owner to WiFI -+ else -+ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_BTSIDE);//set Path control owner to BT -+ } -+ else -+ { -+ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); -+ } -+ -+ -+ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType) || bInitHwCfg || bWifiOff) -+ { -+ // internal switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_PATH_WIFI: -+ // set GNT_BT to low -+ halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_LOW); -+ //Set GNT_WL to high -+ halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); -+ break; -+ case BTC_ANT_PATH_BT: -+ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_BTSIDE); -+ // set GNT_BT to high -+ /* halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); */ -+ //Set GNT_WL to low -+ /* halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_LOW); */ -+ break; -+ default: -+ case BTC_ANT_PATH_PTA: -+ // set GNT_BT to PTA -+ halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, BT_8703B_1ANT_SIG_STA_SET_BY_HW); -+ //Set GNT_WL to PTA -+ halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, BT_8703B_1ANT_SIG_STA_SET_BY_HW); -+ break; -+ } -+ } -+ -+#if 1 -+ u4Tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); -+ u4Tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x73); -+ -+ if(bInitHwCfg) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (After Init) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); -+ } -+ else if (bWifiOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (After WiFi off) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (After Run time) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); -+ } -+#endif -+ -+ pCoexDm->preAntPosType = pCoexDm->curAntPosType; -+} -+ -+ -+VOID -+halbtc8703b1ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ if(byte1&BIT4 && !(byte1&BIT5)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+ -+VOID -+halbtc8703b1ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; -+ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; -+ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; -+ s1Byte nWiFiDurationAdjust = 0x0; -+ static BOOLEAN bPreWifiBusy=FALSE; -+ -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if (bWifiBusy != bPreWifiBusy) -+ { -+ bForceExec = TRUE; -+ bPreWifiBusy = bWifiBusy; -+ } -+ -+ if (pCoexDm->bCurPsTdmaOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ -+ // Adjust WiFi slot by AP number -+ if (pCoexSta->nScanAPNum <= 5) -+ nWiFiDurationAdjust = 5; -+ else if (pCoexSta->nScanAPNum >= 40) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nScanAPNum >= 20) -+ nWiFiDurationAdjust = -10; -+ -+ // for A2DP only case, PS-TDMA/ TDMA -+ if ((type == 1) || (type == 2) || (type == 9) || (type == 11) || (type == 101) -+ || (type == 102) || (type == 109) || (type == 101) || (type == 7) ) -+ { -+ if (!pCoexSta->bForceLpsOn) //Native power save TDMA, only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt (TDMA) -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ -+ if (type == 7) -+ psTdmaByte4Val = 0x14; //BT-Auto-Slot -+ else -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot -+ } -+ else -+ { -+ psTdmaByte0Val = 0x51; //null-pkt (PS-TDMA) -+ psTdmaByte3Val = 0x10; //tx-pause at BT-slot -+ -+ if (type == 7) -+ psTdmaByte4Val = 0x14; //BT-Auto-Slot -+ else -+ psTdmaByte4Val = 0x50; // 0x778 = d/1 toggle, dynamic slot -+ } -+ } -+ else if ((type == 3) ||(type == 4) || (type == 13) || (type == 14) || (type == 103) || (type == 113) || (type == 114)) -+ { -+ psTdmaByte0Val = 0x51; //null-pkt (PS-TDMA) -+ psTdmaByte3Val = 0x10; //tx-pause at BT-slot -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot -+ } -+ else //native power save case -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt (TDMA) -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ psTdmaByte4Val = 0x11; // 0x778 = d/1 toggle, no dynamic slot -+ //psTdmaByte4Va is not defne for 0x778 = d/1, 1/1 case -+ } -+ -+ // for A2DP slave -+ if ((pBtLinkInfo->bSlaveRole == TRUE) && (pBtLinkInfo->bA2dpExist)) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ -+ // (for Antenna Detection Mechanism) -+ if (type > 100) -+ { -+ psTdmaByte0Val = psTdmaByte0Val | 0x82; //set antenna control by SW -+ psTdmaByte3Val = psTdmaByte3Val | 0x60; //set antenna no toggle, control by antenna diversity -+ } -+ -+ -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ default: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); -+ break; -+ case 1: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 2: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 3: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 4: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 5: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 6: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 7: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x1e, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 8: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1e, 0x3, 0x10, 0x14); -+ break; -+ case 9: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 10: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); -+ break; -+ case 11: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 12: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); -+ break; -+ case 13: -+ if (pCoexSta->nScanAPNum <= 3) // for Lenovo CPT test A2DP + OPP -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ else -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 14: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 15: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); -+ break; -+ case 16: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); -+ break; -+ case 18: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 20: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 21: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); -+ break; -+ case 22: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 23: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); -+ break; -+ case 24: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); -+ break; -+ case 25: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 26: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 27: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); -+ break; -+ case 28: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); -+ break; -+ case 29: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); -+ break; -+ case 30: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); -+ break; -+ case 31: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); -+ break; -+ case 32: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 33: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, 0x10); -+ break; -+ case 34: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 35: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 36: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); -+ break; -+ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving -+ /* here softap mode screen off will cost 70-80mA for phone */ -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); -+ break; -+ -+ // 1-Ant translate to 2-Ant (for Antenna Detection Mechanism) -+ case 101: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 102: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 103: -+ //halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 105: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 106: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 109: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 111: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 113: -+ //halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 114: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 120: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 122: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 132: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 133: -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x11); -+ break; -+ -+ } -+ } -+ else -+ { -+ -+ // disable PS tdma -+ switch(type) -+ { -+ case 8: //PTA Control -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 0: -+ default: //Software control, Antenna at BT side -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 1: // 2-Ant, 0x778=3, antenna control by antenna diversity -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); -+ break; -+#if 0 -+ case 9: //Software control, Antenna at WiFi side -+ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); -+ break; -+#endif -+ } -+ } -+ rssiAdjustVal =0; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", -+ pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67))); -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+BOOLEAN -+halbtc8703b1ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected && -+ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); -+ -+ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ -+ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); -+ -+ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ -+ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); -+ -+ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if (bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ } -+ -+ bCommon = FALSE; -+ } -+ -+ return bCommon; -+} -+ -+ -+VOID -+halbtc8703b1ant_TdmaDurationAdjustForAcl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0, btInfoExt; -+ static BOOLEAN bPreWifiBusy=FALSE; -+ BOOLEAN bWifiBusy = FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); -+ -+ if(BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) -+ bWifiBusy = TRUE; -+ else -+ bWifiBusy = FALSE; -+ -+ if( (BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || -+ (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || -+ (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) -+ { -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 3 && -+ pCoexDm->curPsTdma != 9 ) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ return; -+ } -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) -+ retryCount++; -+ -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ if(result == -1) -+ { -+/* if( (BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else */ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ else if(result == 1) -+ { -+/* if( (BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else */ if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ } -+ else //no change -+ { -+ /* Bryant Modify -+ if(bWifiBusy != bPreWifiBusy) //if busy / idle change -+ { -+ bPreWifiBusy = bWifiBusy; -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); -+ } -+ */ -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 9 && -+ pCoexDm->curPsTdma != 11 ) -+ { -+ // recover to previous adjust type -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ } -+} -+ -+VOID -+halbtc8703b1ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8703b1ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ pCoexSta->bForceLpsOn = FALSE; -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ -+ break; -+ case BTC_PS_LPS_ON: -+ pCoexSta->bForceLpsOn = TRUE; -+ halbtc8703b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8703b1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ -+ break; -+ case BTC_PS_LPS_OFF: -+ pCoexSta->bForceLpsOn = FALSE; -+ halbtc8703b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiOnly( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+} -+ -+VOID -+halbtc8703b1ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ halbtc8703b1ant_ActionWifiOnly(pBtCoexist); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ } -+ } -+} -+ -+//============================================= -+// -+// Software Coex Mechanism start -+// -+//============================================= -+ -+// SCO only or SCO+PAN(HS) -+ -+/* -+VOID -+halbtc8703b1ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+ -+VOID -+halbtc8703b1ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8703b1ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8703b1ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8703b1ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(HS) only -+VOID -+halbtc8703b1ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8703b1ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8703b1ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8703b1ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+VOID -+halbtc8703b1ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+*/ -+ -+//============================================= -+// -+// Non-Software Coex Mechanism start -+// -+//============================================= -+VOID -+halbtc8703b1ant_ActionBtWhckTest( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8703b1ant_ActionHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8703b1ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ if ( (!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask) ) -+ { -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) -+ { -+ // SCO/HID/A2DP busy -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if ( (pBtLinkInfo->bPanExist) || (bWifiBusy) ) -+ { -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ //for BT inquiry/page fail after S4 resume -+ //halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ -+ -+ //halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ //halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionBtScoHidOnlyBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ // tdma and coex table -+ -+ if(pBtLinkInfo->bScoExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else //HID -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiConnectedBtAclBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ u1Byte btRssiState; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ btRssiState = halbtc8703b1ant_BtRssiState(2, 28, 0); -+ -+ if ( (pCoexSta->lowPriorityRx >= 950) && (!pCoexSta->bUnderIps) -+ && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bC2hBtInquiryPage)) -+ { -+ pBtLinkInfo->bSlaveRole = TRUE; -+ } -+ else -+ { -+ pBtLinkInfo->bSlaveRole = FALSE; -+ } -+ -+ if(pBtLinkInfo->bHidOnly) //HID -+ { -+ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ return; -+ } -+ else if(pBtLinkInfo->bA2dpOnly) //A2DP -+ { -+ if(BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ //halbtc8703b1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ } -+ } -+ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || -+ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) -+ { -+ if(BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ else -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ //BT no-profile busy (0x9) -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiNotConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // power save state -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiNotConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiNotConnectedAssoAuth( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bPanExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); -+ } -+ else -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiConnectedSpecialPacket( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiBusy = FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ //no special packet process for both WiFi and BT very busy -+ if ((bWifiBusy) && ((pBtLinkInfo->bPanExist) || (pCoexSta->nNumOfProfile >= 2))) -+ return; -+ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist)) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8703b1ant_ActionWifiConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiBusy=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; -+ u4Byte wifiBw; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ if(bUnder4way) -+ { -+ halbtc8703b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ if(bScan || bLink || bRoam) -+ { -+ if(bScan) -+ halbtc8703b1ant_ActionWifiConnectedScan(pBtCoexist); -+ else -+ halbtc8703b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ // power save state -+ if(!bApEnable && BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) -+ { -+ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP -+ { -+ if(!bWifiBusy) -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else //busy -+ { -+ if (pCoexSta->nScanAPNum >= BT_8703B_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA -+ { -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ } -+ } -+ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ else -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(!bWifiBusy) -+ { -+ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8703b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else -+ { -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ } -+ else -+ { -+ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8703b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else -+ { -+ //halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ //halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+} -+ -+VOID -+halbtc8703b1ant_RunSwCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte algorithm=0; -+ -+ algorithm = halbtc8703b1ant_ActionAlgorithm(pBtCoexist); -+ pCoexDm->curAlgorithm = algorithm; -+ -+ if(halbtc8703b1ant_IsCommonAction(pBtCoexist)) -+ { -+ -+ } -+ else -+ { -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8703B_1ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); -+ //halbtc8703b1ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); -+ //halbtc8703b1ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); -+ //halbtc8703b1ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); -+ //halbtc8703b1ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); -+ //halbtc8703b1ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); -+ //halbtc8703b1ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); -+ //halbtc8703b1ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); -+ //halbtc8703b1ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); -+ //halbtc8703b1ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); -+ //halbtc8703b1ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); -+ //halbtc8703b1ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8703b1ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bIncreaseScanDevNum=FALSE; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ BOOLEAN bMiracastPlusBt=FALSE; -+ u1Byte aggBufSize=5; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0, wifiBw; -+ u1Byte iotPeer=BTC_IOT_PEER_UNKNOWN; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ if(pCoexSta->bBtWhckTest) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); -+ halbtc8703b1ant_ActionBtWhckTest(pBtCoexist); -+ return; -+ } -+ -+ if( (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bIncreaseScanDevNum = TRUE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); -+ -+ if(pBtLinkInfo->bBtLinkExist) -+ { -+ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ bMiracastPlusBt = TRUE; -+ } -+ else -+ { -+ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ bMiracastPlusBt = FALSE; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ -+ if ( (pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); -+ } -+ else -+ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); -+ -+ return; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) -+ { -+ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_IOT_PEER, &iotPeer); -+ -+ if(BTC_IOT_PEER_CISCO != iotPeer) -+ { -+ if(pBtLinkInfo->bScoExist)//if (pBtLinkInfo->bBtHiPriLinkExist) -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); -+ else -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); -+ } -+ else -+ { -+ if(pBtLinkInfo->bScoExist) -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); -+ else -+ { -+ if (BTC_WIFI_BW_HT40==wifiBw) -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x10); -+ else -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ } -+ } -+ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); -+ halbtc8703b1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message -+ } -+ else -+ { -+ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); -+ -+ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+ halbtc8703b1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8703b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ -+ if(!bWifiConnected) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ if (bScan) -+ halbtc8703b1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ else -+ halbtc8703b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else -+ halbtc8703b1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else // wifi LPS/Busy -+ { -+ halbtc8703b1ant_ActionWifiConnected(pBtCoexist); -+ } -+} -+ -+u4Byte -+halbtc8703b1ant_PSD_Log2Base( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val -+ -+ ) -+{ -+ u1Byte i,j; -+ u4Byte tmp, tmp2, val_integerdB=0, tindex, shiftcount=0; -+ u4Byte result,val_fractiondB=0,Table_fraction[21]= {0,432, 332, 274, 232, 200, -+ 174, 151,132,115,100,86,74,62,51,42, -+ 32,23,15,7,0}; -+ -+ if (val == 0) -+ return 0; -+ -+ tmp = val; -+ -+ while(1) -+ { -+ if (tmp == 1) -+ break; -+ else -+ { -+ tmp = (tmp >> 1); -+ shiftcount++; -+ } -+ } -+ -+ -+ val_integerdB = shiftcount+1; -+ -+ tmp2=1; -+ for (j=1; j<= val_integerdB;j++) -+ tmp2 = tmp2*2; -+ -+ tmp = (val*100) /tmp2; -+ tindex = tmp/5; -+ -+ if (tindex > 20) -+ tindex = 20; -+ -+ val_fractiondB = Table_fraction[tindex]; -+ -+ result = val_integerdB*100 - val_fractiondB; -+ -+ return (result); -+ -+ -+} -+ -+VOID -+halbtc8703b1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ -+ // sw all off -+ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ //halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ //halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ pCoexSta->popEventCnt = 0; -+} -+ -+VOID -+halbtc8703b1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0;//, fwVer; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0, u1Tmpa=0, u1Tmpb=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ u4Byte u4Tmp1=0, u4Tmp2=0; -+ -+ -+ u4Tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); -+ u4Tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (Before Init HW config) 0x38= 0x%x, 0x54= 0x%x**********\n", u4Tmp1, u4Tmp2)); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); -+ -+ -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x550, 0x8, 0x1); //enable TBTT nterrupt -+ -+ //BT report packet sample rate -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, 0x5); -+ -+ // Enable BT counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); -+ -+ //Enable PTA (3-wire function form BT side) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x41, 0x02, 0x1); -+ -+ //Enable PTA (tx/rx signal form WiFi side) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x4c6, 0x10, 0x1); -+ -+ //enable GNT_WL/GNT_BT debug signal to GPIO14/15 -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x73, 0x8, 0x1); -+ -+ //enable GNT_WL -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x4e, 0x40, 0x0); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x1, 0x0); -+ -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ -+ //Antenna config -+ if(bWifiOnly) -+ { -+ pCoexSta->bConCurrentRxModeOn = FALSE; -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FORCE_EXEC, TRUE, FALSE); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FORCE_EXEC, FALSE, FALSE); -+ } -+ else -+ { -+ pCoexSta->bConCurrentRxModeOn = TRUE; -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x953, 0x2, 0x1); -+ //RF 0x1[0] = 0 -> Set GNT_WL_RF_Rx always = 1 for con-current Rx -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0x1, 0x0); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, TRUE, FALSE); -+ } -+ -+ // PTA parameter -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+} -+ -+ -+ -+VOID -+halbtc8703b1ant_PSD_ShowData( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u4Byte nDeltaFreqPerPoint; -+ u4Byte freq,freq1,freq2,n=0,i=0, j=0, m=0, PsdRep1, PsdRep2; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n\n============[PSD info] (%d)============\n", -+ pPsdScan->nPSDGenCount); -+ CL_PRINTF(cliBuf); -+ -+ if (pPsdScan->nPSDGenCount == 0) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n No Data !!\n"); -+ CL_PRINTF(cliBuf); -+ return; -+ } -+ -+ if (pPsdScan->nPSDPoint == 0) -+ nDeltaFreqPerPoint = 0; -+ else -+ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; -+ -+ //if (pPsdScan->bIsPSDShowMaxOnly) -+ if (0) -+ { -+ PsdRep1 = pPsdScan->nPSDMaxValue/100; -+ PsdRep2 = pPsdScan->nPSDMaxValue - PsdRep1 * 100; -+ -+ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + pPsdScan->nPSDMaxValuePoint * nDeltaFreqPerPoint); -+ freq1 = freq/1000000; -+ freq2 = freq/1000 - freq1 * 1000; -+ -+ if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.0%d MHz", -+ freq1, freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.%d MHz", -+ freq1, freq2); -+ -+ if (PsdRep2 < 10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.0%d dB, (%d) \n", -+ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.%d dB, (%d)\n", -+ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); -+ -+ CL_PRINTF(cliBuf); -+ } -+ else -+ { -+ m = pPsdScan->nPSDStartPoint; -+ n = pPsdScan->nPSDStartPoint; -+ i = 1; -+ j = 1; -+ -+ while(1) -+ { -+ do -+ { -+ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + m * nDeltaFreqPerPoint); -+ freq1 = freq/1000000; -+ freq2 = freq/1000 - freq1 * 1000; -+ -+ if (i ==1) -+ { -+ if (freq2 == 0) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.000", freq1); -+ else if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.0%2d", freq1,freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.%3d", freq1,freq2); -+ } -+ else if ( (i%8 == 0) || (m == pPsdScan->nPSDStopPoint) ) -+ { -+ if (freq2 == 0) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000\n", freq1); -+ else if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d\n", freq1,freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d\n", freq1,freq2); -+ } -+ else -+ { -+ if (freq2 == 0) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000", freq1); -+ else if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d", freq1,freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d", freq1,freq2); -+ } -+ -+ i++; -+ m++; -+ CL_PRINTF(cliBuf); -+ -+ }while( (i <= 8) && (m <= pPsdScan->nPSDStopPoint)); -+ -+ -+ do -+ { -+ PsdRep1 = pPsdScan->nPSDReport_MaxHold[n]/100; -+ PsdRep2 = pPsdScan->nPSDReport_MaxHold[n] - PsdRep1 * 100; -+ -+ if (j ==1) -+ { -+ if (PsdRep2 <10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.0%d", PsdRep1,PsdRep2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.%d", PsdRep1,PsdRep2); -+ } -+ else if ( (j%8 == 0) || (n == pPsdScan->nPSDStopPoint) ) -+ { -+ if (PsdRep2 <10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d\n", PsdRep1,PsdRep2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d\n", PsdRep1,PsdRep2); -+ } -+ else -+ { -+ if (PsdRep2 <10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d", PsdRep1,PsdRep2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d", PsdRep1,PsdRep2); -+ } -+ -+ j++; -+ n++; -+ CL_PRINTF(cliBuf); -+ -+ } while( (j <= 8) && (n <= pPsdScan->nPSDStopPoint)); -+ -+ if ( (m > pPsdScan->nPSDStopPoint) || (n > pPsdScan->nPSDStopPoint) ) -+ break; -+ else -+ { -+ i = 1; -+ j = 1; -+ } -+ -+ } -+ } -+ -+ -+} -+ -+VOID -+halbtc8703b1ant_PSD_MaxHoldData( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte GenCount -+ ) -+{ -+ u4Byte i=0, i_max=0, val_max=0, j; -+ -+ if (GenCount== 1) -+ { -+ memcpy(pPsdScan->nPSDReport_MaxHold, pPsdScan->nPSDReport, BT_8703B_1ANT_ANTDET_PSD_POINTS*sizeof(u4Byte)); -+ -+ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); -+ } -+ -+ pPsdScan->nPSDMaxValuePoint = 0; -+ pPsdScan->nPSDMaxValue = 0; -+ -+ } -+ else -+ { -+ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) -+ { -+ if (pPsdScan->nPSDReport[i] > pPsdScan->nPSDReport_MaxHold[i]) -+ pPsdScan->nPSDReport_MaxHold[i] = pPsdScan->nPSDReport[i]; -+ -+ //search Max Value -+ if (i ==pPsdScan->nPSDStartPoint ) -+ { -+ i_max = i; -+ val_max = pPsdScan->nPSDReport_MaxHold[i]; -+ } -+ else -+ { -+ if (pPsdScan->nPSDReport_MaxHold[i] > val_max) -+ { -+ i_max = i; -+ val_max = pPsdScan->nPSDReport_MaxHold[i]; -+ } -+ } -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); -+ -+ } -+ -+ pPsdScan->nPSDMaxValuePoint = i_max; -+ pPsdScan->nPSDMaxValue = val_max; -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i_Max = %d, PSDReport_Max = %d dB\n", pPsdScan->nPSDMaxValuePoint -+ // ,pPsdScan->nPSDMaxValue)); -+ } -+ -+ -+} -+ -+u4Byte -+halbtc8703b1ant_PSD_GetData( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte nPoint -+ ) -+{ -+ //reg 0x808[9:0]: FFT data x -+ //reg 0x808[22]: 0-->1 to get 1 FFT data y -+ //reg 0x8b4[15:0]: FFT data y report -+ -+ u4Byte val = 0, psd_report =0; -+ -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); -+ -+ val &= 0xffbffc00; -+ val |= nPoint; -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); -+ -+ val |= 0x00400000; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); -+ -+ -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x8b4); -+ -+ psd_report = val & 0x0000ffff; -+ -+ return psd_report; -+} -+ -+ -+VOID -+halbtc8703b1ant_PSD_SweepPoint( -+IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN s4Byte offset, -+ IN u4Byte span, -+ IN u4Byte points, -+ IN u4Byte avgnum -+ ) -+{ -+ u4Byte i,val,n,k=0; -+ u4Byte nPoints=0, psd_report=0; -+ u4Byte nStartP=0, nStopP=0, nDeltaFreqPerPoint=156250; -+ u4Byte nPSDCenterFreq=20*10^6, freq,freq1,freq2; -+ BOOLEAN outloop = FALSE; -+ u1Byte flag = 0; -+ u4Byte tmp, PsdRep1, PsdRep2; -+ u4Byte WiFi_OriginalChannel = 1; -+ -+ pPsdScan->bIsPSDRunning = TRUE; -+ -+ do -+ { -+ switch(flag) -+ { -+ case 0: //Get PSD parameters -+ default: -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), centFreq=0x%x, offset=0x%x, span=0x%x\n", -+ // centFreq, offset, span)); -+ -+ pPsdScan->nPSDBandWidth = 40*1000000; -+ pPsdScan->nPSDPoint = points; -+ pPsdScan->nPSDStartBase = points/2; -+ pPsdScan->nPSDAvgNum = avgnum; -+ pPsdScan->nRealCentFreq = centFreq; -+ pPsdScan->nRealOffset = offset; -+ pPsdScan->nRealSpan = span; -+ -+ -+ nPoints = pPsdScan->nPSDPoint; -+ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; -+ -+ //PSD point setup -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); -+ val &= 0xffff0fff; -+ -+ switch(pPsdScan->nPSDPoint) -+ { -+ case 128: -+ val |= 0x0; -+ break; -+ case 256: -+ default: -+ val |=0x00004000; -+ break; -+ case 512: -+ val |= 0x00008000; -+ break; -+ case 1024: -+ val |= 0x0000c000; -+ break; -+ } -+ -+ switch(pPsdScan->nPSDAvgNum) -+ { -+ case 1: -+ val |= 0x0; -+ break; -+ case 8: -+ val |=0x00001000; -+ break; -+ case 16: -+ val |= 0x00002000; -+ break; -+ case 32: -+ default: -+ val |= 0x00003000; -+ break; -+ } -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD BW= %d, DeltaFreq=%d\n" -+ // , pPsdScan->nPSDBandWidth, nDeltaFreqPerPoint)); -+ flag = 1; -+ break; -+ case 1: //calculate the PSD point index from freq/offset/span -+ nPSDCenterFreq = pPsdScan->nPSDBandWidth /2 +offset*(1000000); -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD Center Freq = %d\n", (centFreq + offset))); -+ -+ nStartP = pPsdScan->nPSDStartBase + (nPSDCenterFreq - span *(1000000)/2) /nDeltaFreqPerPoint; -+ pPsdScan->nPSDStartPoint = nStartP - pPsdScan->nPSDStartBase; -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Start PSD Poin Matrix Index = %d\n", pPsdScan->nPSDStartPoint)); -+ -+ nStopP = pPsdScan->nPSDStartBase + (nPSDCenterFreq + span *(1000000)/2) /nDeltaFreqPerPoint; -+ pPsdScan->nPSDStopPoint = nStopP - pPsdScan->nPSDStartBase-1; -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Stop PSD Poin Matrix Index = %d\n",pPsdScan->nPSDStopPoint)); -+ -+ flag = 2; -+ break; -+ case 2: //set RF channel/BW/Mode -+ -+ //set 3-wire off -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); -+ val |= 0x00300000; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); -+ -+ //CCK off -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); -+ val &= 0xfeffffff; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); -+ -+ //store WiFi original channel -+ WiFi_OriginalChannel = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff); -+ -+ //Set RF channel -+ if (centFreq == 2484) -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, 0xe); -+ else -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, (centFreq-2412)/5 + 1); //WiFi TRx Mask on -+ -+ //Set RF mode = Rx, RF Gain = 0x8a0 -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x0, 0xfffff, 0x308a0); -+ -+ //Set RF Rx filter corner -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x3e4); -+ -+ //Set TRx mask off -+ //un-lock TRx Mask setup -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x1); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x1); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ flag = 3; -+ break; -+ case 3: -+ memset(pPsdScan->nPSDReport,0, pPsdScan->nPSDPoint*sizeof(u4Byte)); -+ nStartP = pPsdScan->nPSDStartPoint + pPsdScan->nPSDStartBase; -+ nStopP = pPsdScan->nPSDStopPoint + pPsdScan->nPSDStartBase + 1; -+ -+ i = nStartP; -+ -+ while (i < nStopP) -+ { -+ if (i >= nPoints) -+ { -+ psd_report = halbtc8703b1ant_PSD_GetData(pBtCoexist,i-nPoints); -+ } -+ else -+ { -+ psd_report = halbtc8703b1ant_PSD_GetData(pBtCoexist,i); -+ } -+ -+ if (psd_report == 0) -+ tmp = 0; -+ else -+ //tmp = 20*log10((double)psd_report); -+ //20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 -+ tmp = 6 * halbtc8703b1ant_PSD_Log2Base(pBtCoexist, psd_report); -+ -+ n = i-pPsdScan->nPSDStartBase; -+ pPsdScan->nPSDReport[n] = tmp; -+ PsdRep1 = pPsdScan->nPSDReport[n] /100; -+ PsdRep2 = pPsdScan->nPSDReport[n] - PsdRep1 * 100; -+ -+ freq = ((centFreq-20) * 1000000 + n * nDeltaFreqPerPoint); -+ freq1 = freq/1000000; -+ freq2 = freq/1000 - freq1 * 1000; -+/* -+ if (freq2 < 100) -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.0%d MHz)", n, freq1, freq2)); -+ else -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.%d MHz)", n, freq1, freq2)); -+ -+ if (PsdRep2 < 10) -+ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.0%d dB)\n",psd_report, PsdRep1, PsdRep2)); -+ else -+ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.%d dB)\n",psd_report, PsdRep1,PsdRep2)); -+*/ -+ i++; -+ -+ k=0; -+ -+ //Add Delay between PSD point -+ while(1) -+ { -+ if (k++ > 20000) -+ break; -+ } -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint()==============\n")); -+ } -+ -+ flag = 100; -+ break; -+ case 99: //error -+ -+ outloop = TRUE; -+ break; -+ case 100: //recovery -+ -+ //set 3-wire on -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); -+ val &=0xffcfffff; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); -+ -+ //CCK on -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); -+ val |= 0x01000000; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); -+ -+ //PSD off -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); -+ val &=0xffbfffff; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x808,val); -+ -+ //TRx Mask on -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); -+ -+ //lock TRx Mask setup -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x0); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x0); -+ -+ //Set RF Rx filter corner -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x0); -+ -+ //restore WiFi original channel -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, WiFi_OriginalChannel); -+ -+ outloop = TRUE; -+ break; -+ -+ } -+ -+ }while (!outloop); -+ -+ -+ -+ pPsdScan->bIsPSDRunning = FALSE; -+ -+ -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8703b1ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8703b1ant_ -+//============================================================ -+VOID -+EXhalbtc8703b1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u1Byte u1Tmp=0x0; -+ u2Byte u2Tmp=0x0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx Execute 8703b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n")); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("Ant Det Finish = %s, Ant Det Number = %d\n", -+ (pBoardInfo->btdmAntDetFinish? "Yes":"No"), pBoardInfo->btdmAntNumByAntDet)); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ -+ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. -+ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); -+ -+ //set Path control owner to WiFi -+ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); -+ -+ // set GNT_BT to high -+ halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); -+ //Set GNT_WL to low -+ halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_LOW); -+ -+ // set WLAN_ACT = 0 -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // -+ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) -+ // Local setting bit define -+ // BIT0: "0" for no antenna inverse; "1" for antenna inverse -+ // BIT1: "0" for internal switch; "1" for external switch -+ // BIT2: "0" for one antenna; "1" for two antenna -+ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 -+ -+ u1Tmp = 0; -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); -+ } -+ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** LTE coex Reg 0x38 (Power-On) = 0x%x**********\n", halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38))); -+ -+ -+#if 0 -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ -+ u1Tmp |= 0x1; // antenna inverse -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); -+ -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ else -+ { -+ -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ // set to S1 -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ u1Tmp |= 0x1; // antenna inverse -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ -+ -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_PCI) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); -+ } -+ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); -+ } -+ } -+ -+#endif -+} -+ -+VOID -+EXhalbtc8703b1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8703b1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8703b1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); -+ pBtCoexist->bStopCoexDm = FALSE; -+} -+ -+VOID -+EXhalbtc8703b1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ pBtCoexist->bStopCoexDm = FALSE; -+ -+ halbtc8703b1ant_InitCoexDm(pBtCoexist); -+ -+ halbtc8703b1ant_QueryBtInfo(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8703b1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u2Byte u2Tmp[4]; -+ u4Byte u4Tmp[4]; -+ u4Byte faOfdm, faCck; -+ u4Byte fwVer=0, btPatchVer=0; -+ static u1Byte PopReportIn10s = 0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ if(pBtCoexist->bStopCoexDm) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ if (pPsdScan->bAntDet_TryCount == 0) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Mech/ Pos", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); -+ CL_PRINTF(cliBuf); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)", "Ant PG Num/ Mech(Ant_Det)/ Pos", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNumByAntDet, pBoardInfo->btdmAntPos, -+ pPsdScan->bAntDet_TryCount, pPsdScan->bAntDet_FailCount, pPsdScan->nAntDet_Result); -+ CL_PRINTF(cliBuf); -+ -+ if (pBoardInfo->btdmAntDetFinish) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "Ant Det PSD Value", pPsdScan->nAntDet_PeakVal); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8703b1Ant, GLCoexVer8703b1Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "WifibHiPri/ Ccklock/ CckEverLock", \ -+ (pCoexSta->bWiFiIsHighPriTask? "Yes":"No"), -+ (pCoexSta->bCCKLock? "Yes":"No"), -+ (pCoexSta->bCCKEverLock? "Yes":"No")); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ PopReportIn10s++; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt, pCoexSta->popEventCnt); -+ CL_PRINTF(cliBuf); -+ -+ if (PopReportIn10s >= 5) -+ { -+ pCoexSta->popEventCnt = 0; -+ PopReportIn10s = 0; -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d / %d", "SCO/HID/PAN/A2DP/Hi-Pri", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist, pBtLinkInfo->bBtHiPriLinkExist); -+ CL_PRINTF(cliBuf); -+ -+ if (pStackInfo->bProfileNotified) -+ { -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ else -+ { -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", "BT Role/A2DP rate", \ -+ (pBtLinkInfo->bSlaveRole )? "Slave":"Master", (btInfoExt&BIT0)? "BR":"EDR"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8703b1Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ } -+ -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ 0x%x", "SM[LowPenaltyRA]/RA Mask", \ -+ pCoexDm->bCurLowPenaltyRa, pBtCoexist->btInfo.raMask); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "NoAggr/ CtrlAggr/ AggrSize", \ -+ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), -+ pBtCoexist->btInfo.aggBufSize); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ } -+ -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, -+ (pCoexDm->bCurPsTdmaOn? "On":"Off"), -+ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); -+ -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "WL/BT Coex Table Type", \ -+ pCoexSta->nCoexTableType); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/0x6cc/IgnWlanAct", \ -+ u1Tmp[0], u4Tmp[0], pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xa0); -+ u4Tmp[1] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xa4); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "LTE Coex Table W_L/B_L", \ -+ u4Tmp[0]&0xffff, u4Tmp[1]&0xffff); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xa8); -+ u4Tmp[1] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xac); -+ u4Tmp[2] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xb0); -+ u4Tmp[3] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xb4); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "LTE Break Table W_L/B_L/L_W/L_B", \ -+ u4Tmp[0]&0xffff, u4Tmp[1]&0xffff, u4Tmp[2]&0xffff, u4Tmp[3]&0xffff); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ -+ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ -+ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x73); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s", "LTE CoexOn/Path Ctrl Owner", \ -+ ((u4Tmp[0]&BIT7)>> 7), ((u1Tmp[0]&BIT2)? "WL":"BT")); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "LTE 3Wire/OPMode/UART/UARTMode", \ -+ ((u4Tmp[0]&BIT6)>> 6), ((u4Tmp[0]&(BIT5|BIT4))>> 4),((u4Tmp[0]&BIT3)>> 3), (u4Tmp[0]&(BIT2|BIT1|BIT0))); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s", "GNT_WL_SWCtrl/GNT_BT_SWCtrl/Dbg", \ -+ ((u4Tmp[0]&BIT12)>> 12), ((u4Tmp[0]&BIT14)>> 14), ((u1Tmp[0]&BIT3)? "On":"Off")); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "GNT_WL/GNT_BT/LTE_Busy/UART_Busy", \ -+ ((u4Tmp[0]&BIT2)>> 2), ((u4Tmp[0]&BIT3)>> 3), ((u4Tmp[0]&BIT1)>> 1), (u4Tmp[0]&BIT0)); -+ CL_PRINTF(cliBuf); -+ -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4c6); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x4c6[4]/0x40[5] (WL/BT PTA)", \ -+ ((u1Tmp[0] & BIT4)>>4), ((u1Tmp[1] & BIT5)>>5)); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x953); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %s", "0x550(bcn ctrl)/0x522/4-RxAGC", \ -+ u4Tmp[0], u1Tmp[0], (u1Tmp[1]&0x2)? "On": "Off"); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); -+ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ -+ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ -+ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; -+ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; -+ -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xc50/OFDM-CCA/OFDM-FA/CCK-FA", \ -+ u4Tmp[1]&0xff, u4Tmp[0]&0xffff, faOfdm, faCck); -+ CL_PRINTF(cliBuf); -+ -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+ -+ halbtc8703b1ant_ReadScoreBoard(pBtCoexist, &u2Tmp[0]); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %04x", "ScoreBoard[14:0] (from BT)", u2Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+#if(BT_AUTO_REPORT_ONLY_8703B_1ANT == 1) -+ //halbtc8703b1ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8703b1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp=0; -+ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ -+ //Write WL "Active" in Score-board for LPS off -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); -+ -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ -+ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8703b1ant_InitCoexDm(pBtCoexist); -+ halbtc8703b1ant_QueryBtInfo(pBtCoexist); -+ -+ pCoexSta->bUnderIps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8703b1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ -+ if (pCoexSta->bForceLpsOn == TRUE) // LPS No-32K -+ { -+ //Write WL "Active" in Score-board for PS-TDMA -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ -+ } -+ else // LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) -+ { -+ //Write WL "Non-Active" in Score-board for Native-PS -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); -+ -+ } -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ -+ -+ //Write WL "Active" in Score-board for LPS off -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ -+ } -+} -+ -+VOID -+EXhalbtc8703b1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ u1Byte u1Tmpa, u1Tmpb; -+ u4Byte u4Tmp; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm ) -+ return; -+ -+ if(BTC_SCAN_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); -+ } -+ -+ if(pBtCoexist->btInfo.bBtDisabled) -+ return; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ halbtc8703b1ant_QueryBtInfo(pBtCoexist); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8703b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_SCAN_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8703b1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ } -+ else // wifi is connected -+ { -+ halbtc8703b1ant_ActionWifiConnectedScan(pBtCoexist); -+ } -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8703b1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8703b1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8703b1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ pCoexDm->nArpCnt = 0; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ //pCoexDm->nArpCnt = 0; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8703b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ halbtc8703b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8703b1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8703b1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8703b1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ BOOLEAN bWifiUnderBMode = FALSE; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ -+ //Set CCK Tx/Rx high Pri except 11b mode -+ if (bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx -+ } -+ else -+ { -+ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx -+ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx -+ } -+ -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); -+ pCoexDm->nArpCnt = 0; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx -+ -+ pCoexSta->bCCKEverLock = FALSE; -+ } -+ -+ halbtc8703b1ant_UpdateWifiChannelInfo(pBtCoexist, type); -+ -+} -+ -+VOID -+EXhalbtc8703b1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE, bUnder4way=FALSE; -+ u1Byte aggBufSize=5; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ BTC_PACKET_ARP == type ) -+ { -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ -+ if (BTC_PACKET_ARP == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); -+ -+ pCoexDm->nArpCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); -+ -+ if((pCoexDm->nArpCnt >= 10) && (!bUnder4way)) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); -+ } -+ -+ pCoexSta->specialPktPeriodCnt = 0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8703b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) -+ { -+ halbtc8703b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8703b1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bBtBusy=FALSE; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8703B_1ANT_MAX) -+ rspSource = BT_INFO_SRC_8703B_1ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ // if 0xff, it means BT is under WHCK test -+ if (btInfo == 0xff) -+ pCoexSta->bBtWhckTest = TRUE; -+ else -+ pCoexSta->bBtWhckTest = FALSE; -+ -+ if(BT_INFO_SRC_8703B_1ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ if (pCoexSta->btRetryCnt >= 1) -+ pCoexSta->popEventCnt++; -+ -+ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) -+ pCoexSta->bC2hBtPage = TRUE; -+ else -+ pCoexSta->bC2hBtPage = FALSE; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2-90; -+ //pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if(pCoexSta->btInfoExt & BIT1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ halbtc8703b1ant_UpdateWifiChannelInfo(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ halbtc8703b1ant_UpdateWifiChannelInfo(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if(pCoexSta->btInfoExt & BIT3) -+ { -+ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8703b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+#if(BT_AUTO_REPORT_ONLY_8703B_1ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8703b1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8703B_1ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ pCoexSta->nNumOfProfile = 0; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8703B_1ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ -+ pCoexSta->bBtHiPriLinkExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8703B_1ANT_B_FTP) -+ { -+ pCoexSta->bPanExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8703B_1ANT_B_A2DP) -+ { -+ pCoexSta->bA2dpExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8703B_1ANT_B_HID) -+ { -+ pCoexSta->bHidExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8703B_1ANT_B_SCO_ESCO) -+ { -+ pCoexSta->bScoExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bScoExist = FALSE; -+ -+ if ((pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) &&( pCoexSta->bScoExist == FALSE)) -+ { -+ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) -+ { -+ pCoexSta->bHidExist = TRUE; -+ pCoexSta->wrongProfileNotification++; -+ pCoexSta->nNumOfProfile++; -+ btInfo = btInfo | 0x28; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT HID = true (Hi-Pri > 160)!\n")); -+ } -+ } -+ -+ //Add Hi-Pri Tx/Rx counter to avoid false detection -+ if (((pCoexSta->bHidExist) || (pCoexSta->bScoExist)) && (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) -+ && (!pCoexSta->bC2hBtInquiryPage)) -+ pCoexSta->bBtHiPriLinkExist = TRUE; -+ else -+ pCoexSta->bBtHiPriLinkExist = FALSE; -+ -+ if((btInfo&BT_INFO_8703B_1ANT_B_ACL_BUSY) && (pCoexSta->nNumOfProfile == 0)) -+ { -+ if (pCoexSta->lowPriorityTx + pCoexSta->lowPriorityRx >= 160) -+ { -+ pCoexSta->bPanExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ pCoexSta->wrongProfileNotification++; -+ btInfo = btInfo | 0x88; -+ } -+ } -+ } -+ -+ halbtc8703b1ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) -+ -+ if(!(btInfo&BT_INFO_8703B_1ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8703B_1ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8703B_1ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8703B_1ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8703B_1ANT_B_ACL_BUSY) -+ { -+ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ bBtBusy = TRUE; -+ else -+ bBtBusy = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ halbtc8703b1ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8703b1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); -+ -+ if(BTC_RF_ON == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ pBtCoexist->bStopCoexDm = FALSE; -+ } -+ else if(BTC_RF_OFF == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); -+ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ halbtc8703b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ pBtCoexist->bStopCoexDm = TRUE; -+ -+ } -+} -+ -+VOID -+EXhalbtc8703b1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); -+ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ -+ halbtc8703b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8703b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+} -+ -+VOID -+EXhalbtc8703b1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); -+ -+ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); -+ -+ pBtCoexist->bStopCoexDm = FALSE; -+ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8703b1ant_InitCoexDm(pBtCoexist); -+ halbtc8703b1ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+ -+VOID -+EXhalbtc8703b1ant_ScoreBoardStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ // -+ -+ -+} -+ -+VOID -+EXhalbtc8703b1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); -+ -+ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); -+ halbtc8703b1ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8703b1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8703b1Ant, GLCoexVer8703b1Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8703B_1ANT == 0) -+ halbtc8703b1ant_QueryBtInfo(pBtCoexist); -+ halbtc8703b1ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ halbtc8703b1ant_MonitorBtCtr(pBtCoexist); -+ halbtc8703b1ant_MonitorWiFiCtr(pBtCoexist); -+#if BT_8703B_1ANT_ANTDET_ENABLE -+ halbtc8703b1ant_MonitorBtEnableDisable(pBtCoexist); -+#endif -+ -+ if( halbtc8703b1ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust ) -+ { -+ -+ halbtc8703b1ant_RunCoexistMechanism(pBtCoexist); -+ } -+ -+ pCoexSta->specialPktPeriodCnt++; -+ -+#endif -+} -+ -+VOID -+EXhalbtc8703b1ant_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ) -+{ -+ //No Antenna Detection required because 8730b is only 1-Ant -+} -+ -+VOID -+EXhalbtc8703b1ant_AntennaIsolation( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ) -+{ -+ -+ -+} -+ -+VOID -+EXhalbtc8703b1ant_PSDScan( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ) -+{ -+ -+ -+} -+ -+VOID -+EXhalbtc8703b1ant_DisplayAntDetection( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ -+} -+ -+#endif -+ -+#else // #if (RTL8723B_SUPPORT == 1) -+VOID -+EXhalbtc8703b1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8703b1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8703b1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ){} -+VOID -+EXhalbtc8703b1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8703b1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8703b1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8703b1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8703b1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8703b1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8703b1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8703b1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ){} -+VOID -+EXhalbtc8703b1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8703b1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8703b1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ){} -+VOID -+EXhalbtc8703b1ant_ScoreBoardStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ){} -+VOID -+EXhalbtc8703b1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8703b1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8703b1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8703b1ant_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ){} -+VOID -+EXhalbtc8703b1ant_DisplayAntDetection( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+ -+#endif ++//============================================================ ++// Description: ++// ++// This file is for RTL8703B Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8703b1Ant.tmh" ++#endif ++ ++#if (RTL8703B_SUPPORT == 1) ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8703B_1ANT GLCoexDm8703b1Ant; ++static PCOEX_DM_8703B_1ANT pCoexDm=&GLCoexDm8703b1Ant; ++static COEX_STA_8703B_1ANT GLCoexSta8703b1Ant; ++static PCOEX_STA_8703B_1ANT pCoexSta=&GLCoexSta8703b1Ant; ++static PSDSCAN_STA_8703B_1ANT GLPsdScan8703b1Ant; ++static PPSDSCAN_STA_8703B_1ANT pPsdScan = &GLPsdScan8703b1Ant; ++ ++ ++const char *const GLBtInfoSrc8703b1Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8703b1Ant=20150904; ++u4Byte GLCoexVer8703b1Ant=0x04; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8703b1ant_ ++//============================================================ ++u1Byte ++halbtc8703b1ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8703b1ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8703b1ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++VOID ++halbtc8703b1ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++VOID ++halbtc8703b1ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++VOID ++halbtc8703b1ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8703b1ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType ++ ) ++{ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ halbtc8703b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); ++ break; ++ case 1: // disable cck 1/2 ++ halbtc8703b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ halbtc8703b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8703b1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8703b1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8703b1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++} ++ ++VOID ++halbtc8703b1ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++VOID ++halbtc8703b1ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b1ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp, u1Tmp1; ++ s4Byte wifiRssi; ++ static u1Byte NumOfBtCounterChk = 0; ++ ++ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS ++ //if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) ++ ++ if (pCoexSta->bUnderIps) ++ { ++ //pCoexSta->highPriorityTx = 65535; ++ //pCoexSta->highPriorityRx = 65535; ++ //pCoexSta->lowPriorityTx = 65535; ++ //pCoexSta->lowPriorityRx = 65535; ++ //return; ++ } ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if( (pCoexSta->lowPriorityTx > 1150) && (!pCoexSta->bC2hBtInquiryPage)) ++ pCoexSta->popEventCnt++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ regHPRx, regHPTx, regLPRx, regLPTx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++ ++ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) ++ { ++ NumOfBtCounterChk++; ++ if (NumOfBtCounterChk >= 3) ++ { ++ halbtc8703b1ant_QueryBtInfo(pBtCoexist); ++ NumOfBtCounterChk = 0; ++ } ++ } ++} ++ ++ ++VOID ++halbtc8703b1ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ u4Byte TotalCnt; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); ++ } ++ ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); ++ ++ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) ++ { ++ TotalCnt = pCoexSta->nCRCOK_CCK + pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + ++ pCoexSta->nCRCOK_11nAgg; ++ ++ if ( (pCoexDm->btStatus == BT_8703B_1ANT_BT_STATUS_ACL_BUSY) || ++ (pCoexDm->btStatus == BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (pCoexDm->btStatus == BT_8703B_1ANT_BT_STATUS_SCO_BUSY) ) ++ { ++ if (pCoexSta->nCRCOK_CCK >(TotalCnt -pCoexSta->nCRCOK_CCK)) ++ { ++ if (nCCKLockCounter < 3) ++ nCCKLockCounter++; ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ if (!pCoexSta->bPreCCKLock) ++ { ++ ++ if (nCCKLockCounter >= 3) ++ pCoexSta->bCCKLock = TRUE; ++ else ++ pCoexSta->bCCKLock = FALSE; ++ } ++ else ++ { ++ if (nCCKLockCounter == 0) ++ pCoexSta->bCCKLock = FALSE; ++ else ++ pCoexSta->bCCKLock = TRUE; ++ } ++ ++ if (pCoexSta->bCCKLock) ++ pCoexSta->bCCKEverLock = TRUE; ++ ++ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; ++ ++ ++} ++ ++BOOLEAN ++halbtc8703b1ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8703b1ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ pBtLinkInfo->bBtHiPriLinkExist = pCoexSta->bBtHiPriLinkExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++ ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++VOID ++halbtc8703b1ant_UpdateWifiChannelInfo( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ BOOLEAN bWifiUnderBMode = FALSE; ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; //enable BT AFH skip WL channel for 8703b because BT Rx LO interference ++ //H2C_Parameter[0] = 0x0; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++ ++} ++ ++u1Byte ++halbtc8703b1ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8703B_1ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8703b1ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b1ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8703b1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID halbtc8703b1ant_WriteScoreBoard( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u2Byte scoreboardval ++ ) ++{ ++ u2Byte val; ++ ++ val = (scoreboardval & 0x7fff) | 0x8000; ++ ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0xaa, val); ++ ++#if 0 ++ u1Byte H2C_Parameter[3] ={0,0,0}; ++ ++ ++ // write "Set Status" ++ H2C_Parameter[0] = 0x2; ++ ++ // write score board 15-bit value to H2C parameter ++ H2C_Parameter[1] = scoreboardval & 0xff; ++ H2C_Parameter[2] = (scoreboardval & 0x7f00) >> 8; ++ ++ // Set Interrupt to BT ++ H2C_Parameter[2] = H2C_Parameter[2] | 0x80; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Write BT Scoreboard: H2C 0x71[1:0]= %02x%02x\n", ++ H2C_Parameter[2], H2C_Parameter[1])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x71, 3, H2C_Parameter); ++ ++#endif ++} ++ ++VOID halbtc8703b1ant_ReadScoreBoard( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u2Byte* uScoreBoardVal ++ ) ++{ ++ ++ *uScoreBoardVal = (pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xaa)) & 0x7fff; ++ ++ ++ ++#if 0 ++ u1Byte H2C_Parameter[3] ={0,0,0}; ++ ++ // write "Get Status" ++ H2C_Parameter[0] = 0x1; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Read BT Scoreboard!!\n")); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x71, 3, H2C_Parameter); ++ ++ //the BT Scoreboard will be returned by C2H from EXhalbtc8703b1ant_ScoreBoardStatusNotify() ++#endif ++} ++ ++VOID halbtc8703b1ant_PostActiveStateToBT( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiActive ++ ) ++{ ++ ++ if(bWifiActive) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Post WL = Active in Scoreboard!!\n")); ++ halbtc8703b1ant_WriteScoreBoard(pBtCoexist, 0x0001); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Post WL = Non-Active in Scoreboard!!\n")); ++ halbtc8703b1ant_WriteScoreBoard(pBtCoexist, 0x0000); ++ } ++ ++ // The BT should set "No Shunt-down" mode if WL = Active for BT Synthesizer on/off interference WL Lo issue at 8703b b-cut. ++ ++} ++ ++VOID ++halbtc8703b1ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!") )); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b1ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8703b1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++u4Byte ++halbtc8703b1ant_LTECoex_InDirectReadReg( ++IN PBTC_COEXIST pBtCoexist, ++IN u2Byte RegAddr ++) ++{ ++ u4Byte j =0; ++ ++ ++ //wait for ready bit before access 0x7c0 ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x7c0, 0x800F0000|RegAddr); ++ ++ do ++ { ++ j++; ++ }while( ((pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7c3) & BIT5) ==0) && (j fBtcRead4Byte(pBtCoexist, 0x7c8)); //get read data ++ ++} ++ ++VOID ++halbtc8703b1ant_LTECoex_InDirectWriteReg( ++IN PBTC_COEXIST pBtCoexist, ++IN u2Byte RegAddr, ++IN u4Byte BitMask, ++IN u4Byte RegValue ++) ++{ ++ u4Byte val, i=0, j=0, bitpos = 0; ++ ++ ++ if (BitMask == 0x0) ++ return; ++ if (BitMask == 0xffffffff) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x7c4, RegValue); //put write data ++ ++ //wait for ready bit before access 0x7c0 ++ do ++ { ++ j++; ++ }while( ((pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7c3) & BIT5) ==0) && (j fBtcWrite4Byte(pBtCoexist, 0x7c0, 0xc00F0000|RegAddr); ++ } ++ else ++ { ++ for(i=0; i<=31; i++) ++ { ++ if ( ((BitMask >> i) & 0x1) == 0x1) ++ { ++ bitpos = i; ++ break; ++ } ++ } ++ ++ //read back register value before write ++ val = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, RegAddr); ++ val = (val & (~BitMask)) | (RegValue << bitpos); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x7c4, val); //put write data ++ ++ //wait for ready bit before access 0x7c0 ++ do ++ { ++ j++; ++ }while( ((pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7c3) & BIT5) ==0) && (j fBtcWrite4Byte(pBtCoexist, 0x7c0, 0xc00F0000|RegAddr); ++ ++ } ++ ++} ++ ++void ++halbtc8703b1ant_LTECoex_Enable( ++IN PBTC_COEXIST pBtCoexist, ++IN BOOLEAN bEnable ++) ++{ ++ u1Byte val; ++ ++ val = (bEnable)? 1 : 0; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, 0x80, val); //0x38[7] ++ ++} ++ ++void ++halbtc8703b1ant_LTECoex_PathControlOwner( ++IN PBTC_COEXIST pBtCoexist, ++IN BOOLEAN bWiFiControl ++) ++{ ++ u1Byte val; ++ ++ val = (bWiFiControl)? 1 : 0; ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x73, 0x4, val); //0x70[26] ++ ++} ++ ++void ++halbtc8703b1ant_LTECoex_Set_GNT_BT( ++IN PBTC_COEXIST pBtCoexist, ++IN u1Byte nControlBlock, ++IN BOOLEAN bSWControl, ++IN u1Byte nState ++) ++{ ++ u4Byte val=0, BitMask; ++ ++ nState = nState & 0x1; ++ val = (bSWControl)? ((nState<<1) | 0x1) : 0; ++ ++ switch(nControlBlock) ++ { ++ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: ++ default: ++ BitMask = 0xc000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[15:14] ++ BitMask = 0x0c00; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[11:10] ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_RFC: ++ BitMask = 0xc000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[15:14] ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_BB: ++ BitMask = 0x0c00; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[11:10] ++ break; ++ ++ } ++ ++} ++ ++void ++halbtc8703b1ant_LTECoex_Set_GNT_WL( ++IN PBTC_COEXIST pBtCoexist, ++IN u1Byte nControlBlock, ++IN BOOLEAN bSWControl, ++IN u1Byte nState ++) ++{ ++ u4Byte val=0, BitMask; ++ ++ nState = nState & 0x1; ++ val = (bSWControl)? ((nState<<1) | 0x1) : 0; ++ ++ switch(nControlBlock) ++ { ++ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: ++ default: ++ BitMask = 0x3000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[13:12] ++ BitMask = 0x0300; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[9:8] ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_RFC: ++ BitMask = 0x3000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[13:12] ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_BB: ++ BitMask = 0x0300; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, 0x38, BitMask, val); // 0x38[9:8] ++ break; ++ ++ } ++ ++} ++ ++void ++halbtc8703b1ant_LTECoex_Set_CoexTable( ++IN PBTC_COEXIST pBtCoexist, ++IN u1Byte nTableType, ++IN u2Byte nTableContent ++) ++{ ++ u2Byte RegAddr = 0x0000; ++ ++ switch(nTableType) ++ { ++ case BT_8703B_1ANT_CTT_WL_VS_LTE: ++ RegAddr = 0xa0; ++ break; ++ case BT_8703B_1ANT_CTT_BT_VS_LTE: ++ RegAddr = 0xa4; ++ break; ++ } ++ ++ if (RegAddr != 0x0000) ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, RegAddr, 0xffff, nTableContent); // 0xa0[15:0] or 0xa4[15:0] ++ ++ ++} ++ ++ ++void ++halbtc8703b1ant_LTECoex_Set_BreakTable( ++IN PBTC_COEXIST pBtCoexist, ++IN u1Byte nTableType, ++IN u1Byte nTableContent ++) ++{ ++ u2Byte RegAddr = 0x0000; ++ ++ switch(nTableType) ++ { ++ case BT_8703B_1ANT_LBTT_WL_BREAK_LTE: ++ RegAddr = 0xa8; ++ break; ++ case BT_8703B_1ANT_LBTT_BT_BREAK_LTE: ++ RegAddr = 0xac; ++ break; ++ case BT_8703B_1ANT_LBTT_LTE_BREAK_WL: ++ RegAddr = 0xb0; ++ break; ++ case BT_8703B_1ANT_LBTT_LTE_BREAK_BT: ++ RegAddr = 0xb4; ++ break; ++ } ++ ++ if (RegAddr != 0x0000) ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(pBtCoexist, RegAddr, 0xff, nTableContent); // 0xa8[15:0] or 0xb4[15:0] ++ ++ ++} ++ ++VOID ++halbtc8703b1ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8703b1ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8703b1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8703b1ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++ u4Byte nBreakTable; ++ u1Byte nSelectTable; ++ ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); ++ ++ pCoexSta->nCoexTableType = type; ++ ++ if (pCoexSta->bConCurrentRxModeOn == TRUE) ++ { ++ nBreakTable = 0xf0ffffff; //set WL hi-pri can break BT ++ nSelectTable = 0xb; //set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) ++ } ++ else ++ { ++ nBreakTable = 0xffffff; ++ nSelectTable = 0x3; ++ } ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, nBreakTable, nSelectTable); ++ break; ++ case 1: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, nBreakTable, nSelectTable); ++ break; ++ case 2: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa5a5a5a, 0xaa5a5a5a, nBreakTable, nSelectTable); ++ break; ++ case 3: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaa5a5a5a, nBreakTable, nSelectTable); ++ break; ++ case 4: ++ //if ( (pCoexSta->bCCKEverLock) && (pCoexSta->nScanAPNum <= 5) ) ++ // halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaaaa5a5a, nBreakTable, nSelectTable); ++ //else ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaa5a5a5a, nBreakTable, nSelectTable); ++ break; ++ case 5: ++ //if ( (pCoexSta->bCCKEverLock) && (pCoexSta->nScanAPNum <= 5) ) ++ // halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaa555555, 0xaaaa5a5a, nBreakTable, nSelectTable); ++ //else ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, nBreakTable, nSelectTable); ++ break; ++ case 6: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, nBreakTable, nSelectTable); ++ break; ++ case 7: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, nBreakTable, nSelectTable); ++ break; ++ case 8: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); ++ break; ++ case 9: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); ++ break; ++ case 10: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); ++ break; ++ case 11: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); ++ break; ++ case 12: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, nBreakTable, nSelectTable); ++ break; ++ case 13: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, nBreakTable, nSelectTable); ++ break; ++ case 14: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, nBreakTable, nSelectTable); ++ break; ++ case 15: ++ halbtc8703b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, nBreakTable, nSelectTable); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8703b1ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b1ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8703b1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8703b1ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8703b1ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8703b1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8703b1ant_SwMechanism( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRA ++ ) ++{ ++ halbtc8703b1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8703b1ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte fwVer=0, u4Tmp=0, cntBtCalChk=0; ++ BOOLEAN bPgExtSwitch=FALSE; ++ BOOLEAN bUseExtSwitch=FALSE; ++ BOOLEAN bIsInMpMode = FALSE; ++ u1Byte H2C_Parameter[2] ={0}, u1Tmp = 0; ++ u4Byte u4Tmp1=0, u4Tmp2=0; ++ ++ pCoexDm->curAntPosType = antPosType; ++ ++#if 1 ++ u4Tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); ++ u4Tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x73); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (Before Setup) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); ++#endif ++ ++ if(bInitHwCfg) ++ { ++ //Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) ++ halbtc8703b1ant_LTECoex_Enable(pBtCoexist, 0x0); ++ ++ //GNT_WL_LTE always = 1 (this should be config if LTE coex is required) ++ halbtc8703b1ant_LTECoex_Set_CoexTable(pBtCoexist, BT_8703B_1ANT_CTT_WL_VS_LTE, 0xffff); ++ ++ //GNT_BT_LTE always = 1 (this should be config if LTE coex is required) ++ halbtc8703b1ant_LTECoex_Set_CoexTable(pBtCoexist, BT_8703B_1ANT_CTT_BT_VS_LTE, 0xffff); ++ ++ // Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) ++ while(cntBtCalChk <= 20) ++ { ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d); ++ cntBtCalChk++; ++ if(u1Tmp & BIT0) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", cntBtCalChk)); ++ delay_ms(50); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", cntBtCalChk)); ++ break; ++ } ++ } ++ ++ //set Path control owner to WL at initial step ++ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); ++ } ++ else if(bWifiOff) ++ { ++ //Disable LTE Coex Function in WiFi side ++ halbtc8703b1ant_LTECoex_Enable(pBtCoexist, 0x0); ++ ++ //if MP mode ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); ++ if(bIsInMpMode) ++ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); //set Path control owner to WiFI ++ else ++ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_BTSIDE);//set Path control owner to BT ++ } ++ else ++ { ++ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); ++ } ++ ++ ++ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType) || bInitHwCfg || bWifiOff) ++ { ++ // internal switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_PATH_WIFI: ++ // set GNT_BT to low ++ halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_LOW); ++ //Set GNT_WL to high ++ halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); ++ break; ++ case BTC_ANT_PATH_BT: ++ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_BTSIDE); ++ // set GNT_BT to high ++ /* halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); */ ++ //Set GNT_WL to low ++ /* halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_LOW); */ ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ // set GNT_BT to PTA ++ halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, BT_8703B_1ANT_SIG_STA_SET_BY_HW); ++ //Set GNT_WL to PTA ++ halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, BT_8703B_1ANT_SIG_STA_SET_BY_HW); ++ break; ++ } ++ } ++ ++#if 1 ++ u4Tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); ++ u4Tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x73); ++ ++ if(bInitHwCfg) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (After Init) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); ++ } ++ else if (bWifiOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (After WiFi off) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (After Run time) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", u1Tmp, u4Tmp1, u4Tmp2)); ++ } ++#endif ++ ++ pCoexDm->preAntPosType = pCoexDm->curAntPosType; ++} ++ ++ ++VOID ++halbtc8703b1ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ if(byte1&BIT4 && !(byte1&BIT5)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8703b1ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; ++ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; ++ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; ++ s1Byte nWiFiDurationAdjust = 0x0; ++ static BOOLEAN bPreWifiBusy=FALSE; ++ ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if (bWifiBusy != bPreWifiBusy) ++ { ++ bForceExec = TRUE; ++ bPreWifiBusy = bWifiBusy; ++ } ++ ++ if (pCoexDm->bCurPsTdmaOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ ++ // Adjust WiFi slot by AP number ++ if (pCoexSta->nScanAPNum <= 5) ++ nWiFiDurationAdjust = 5; ++ else if (pCoexSta->nScanAPNum >= 40) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nScanAPNum >= 20) ++ nWiFiDurationAdjust = -10; ++ ++ // for A2DP only case, PS-TDMA/ TDMA ++ if ((type == 1) || (type == 2) || (type == 9) || (type == 11) || (type == 101) ++ || (type == 102) || (type == 109) || (type == 101) || (type == 7) ) ++ { ++ if (!pCoexSta->bForceLpsOn) //Native power save TDMA, only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt (TDMA) ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ ++ if (type == 7) ++ psTdmaByte4Val = 0x14; //BT-Auto-Slot ++ else ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot ++ } ++ else ++ { ++ psTdmaByte0Val = 0x51; //null-pkt (PS-TDMA) ++ psTdmaByte3Val = 0x10; //tx-pause at BT-slot ++ ++ if (type == 7) ++ psTdmaByte4Val = 0x14; //BT-Auto-Slot ++ else ++ psTdmaByte4Val = 0x50; // 0x778 = d/1 toggle, dynamic slot ++ } ++ } ++ else if ((type == 3) ||(type == 4) || (type == 13) || (type == 14) || (type == 103) || (type == 113) || (type == 114)) ++ { ++ psTdmaByte0Val = 0x51; //null-pkt (PS-TDMA) ++ psTdmaByte3Val = 0x10; //tx-pause at BT-slot ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot ++ } ++ else //native power save case ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt (TDMA) ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ psTdmaByte4Val = 0x11; // 0x778 = d/1 toggle, no dynamic slot ++ //psTdmaByte4Va is not defne for 0x778 = d/1, 1/1 case ++ } ++ ++ // for A2DP slave ++ if ((pBtLinkInfo->bSlaveRole == TRUE) && (pBtLinkInfo->bA2dpExist)) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ ++ // (for Antenna Detection Mechanism) ++ if (type > 100) ++ { ++ psTdmaByte0Val = psTdmaByte0Val | 0x82; //set antenna control by SW ++ psTdmaByte3Val = psTdmaByte3Val | 0x60; //set antenna no toggle, control by antenna diversity ++ } ++ ++ ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ default: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); ++ break; ++ case 1: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 2: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 3: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 4: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 5: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 6: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 7: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x1e, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 8: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1e, 0x3, 0x10, 0x14); ++ break; ++ case 9: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 10: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 12: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ if (pCoexSta->nScanAPNum <= 3) // for Lenovo CPT test A2DP + OPP ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ else ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 14: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 15: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 21: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 23: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 33: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, 0x10); ++ break; ++ case 34: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); ++ break; ++ ++ // 1-Ant translate to 2-Ant (for Antenna Detection Mechanism) ++ case 101: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 102: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 103: ++ //halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 105: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 106: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 109: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 111: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 113: ++ //halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 114: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 120: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 122: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 132: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 133: ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x11); ++ break; ++ ++ } ++ } ++ else ++ { ++ ++ // disable PS tdma ++ switch(type) ++ { ++ case 8: //PTA Control ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: //Software control, Antenna at BT side ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 1: // 2-Ant, 0x778=3, antenna control by antenna diversity ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); ++ break; ++#if 0 ++ case 9: //Software control, Antenna at WiFi side ++ halbtc8703b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); ++ break; ++#endif ++ } ++ } ++ rssiAdjustVal =0; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67))); ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++BOOLEAN ++halbtc8703b1ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected && ++ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); ++ ++ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); ++ ++ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ ++ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); ++ ++ //halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if (bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ } ++ ++ bCommon = FALSE; ++ } ++ ++ return bCommon; ++} ++ ++ ++VOID ++halbtc8703b1ant_TdmaDurationAdjustForAcl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0, btInfoExt; ++ static BOOLEAN bPreWifiBusy=FALSE; ++ BOOLEAN bWifiBusy = FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); ++ ++ if(BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) ++ bWifiBusy = TRUE; ++ else ++ bWifiBusy = FALSE; ++ ++ if( (BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || ++ (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || ++ (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) ++ { ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 3 && ++ pCoexDm->curPsTdma != 9 ) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ return; ++ } ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) ++ retryCount++; ++ ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ if(result == -1) ++ { ++/* if( (BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else */ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ else if(result == 1) ++ { ++/* if( (BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else */ if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ } ++ else //no change ++ { ++ /* Bryant Modify ++ if(bWifiBusy != bPreWifiBusy) //if busy / idle change ++ { ++ bPreWifiBusy = bWifiBusy; ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); ++ } ++ */ ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 9 && ++ pCoexDm->curPsTdma != 11 ) ++ { ++ // recover to previous adjust type ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ } ++} ++ ++VOID ++halbtc8703b1ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8703b1ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ pCoexSta->bForceLpsOn = FALSE; ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ ++ break; ++ case BTC_PS_LPS_ON: ++ pCoexSta->bForceLpsOn = TRUE; ++ halbtc8703b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8703b1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ ++ break; ++ case BTC_PS_LPS_OFF: ++ pCoexSta->bForceLpsOn = FALSE; ++ halbtc8703b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiOnly( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++} ++ ++VOID ++halbtc8703b1ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ halbtc8703b1ant_ActionWifiOnly(pBtCoexist); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++//============================================= ++// ++// Software Coex Mechanism start ++// ++//============================================= ++ ++// SCO only or SCO+PAN(HS) ++ ++/* ++VOID ++halbtc8703b1ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++ ++VOID ++halbtc8703b1ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8703b1ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8703b1ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8703b1ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(HS) only ++VOID ++halbtc8703b1ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8703b1ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8703b1ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8703b1ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++VOID ++halbtc8703b1ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++*/ ++ ++//============================================= ++// ++// Non-Software Coex Mechanism start ++// ++//============================================= ++VOID ++halbtc8703b1ant_ActionBtWhckTest( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8703b1ant_ActionHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8703b1ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ if ( (!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask) ) ++ { ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) ++ { ++ // SCO/HID/A2DP busy ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if ( (pBtLinkInfo->bPanExist) || (bWifiBusy) ) ++ { ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ //for BT inquiry/page fail after S4 resume ++ //halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ ++ ++ //halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ //halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionBtScoHidOnlyBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ // tdma and coex table ++ ++ if(pBtLinkInfo->bScoExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else //HID ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiConnectedBtAclBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ u1Byte btRssiState; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ btRssiState = halbtc8703b1ant_BtRssiState(2, 28, 0); ++ ++ if ( (pCoexSta->lowPriorityRx >= 950) && (!pCoexSta->bUnderIps) ++ && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bC2hBtInquiryPage)) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ if(pBtLinkInfo->bHidOnly) //HID ++ { ++ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ return; ++ } ++ else if(pBtLinkInfo->bA2dpOnly) //A2DP ++ { ++ if(BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ //halbtc8703b1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ } ++ } ++ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || ++ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) ++ { ++ if(BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ else ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ //BT no-profile busy (0x9) ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiNotConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // power save state ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiNotConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiNotConnectedAssoAuth( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bPanExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); ++ } ++ else ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiConnectedSpecialPacket( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiBusy = FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ //no special packet process for both WiFi and BT very busy ++ if ((bWifiBusy) && ((pBtLinkInfo->bPanExist) || (pCoexSta->nNumOfProfile >= 2))) ++ return; ++ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist)) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8703b1ant_ActionWifiConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiBusy=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; ++ u4Byte wifiBw; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ if(bUnder4way) ++ { ++ halbtc8703b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ if(bScan || bLink || bRoam) ++ { ++ if(bScan) ++ halbtc8703b1ant_ActionWifiConnectedScan(pBtCoexist); ++ else ++ halbtc8703b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ // power save state ++ if(!bApEnable && BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) ++ { ++ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP ++ { ++ if(!bWifiBusy) ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else //busy ++ { ++ if (pCoexSta->nScanAPNum >= BT_8703B_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA ++ { ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ } ++ } ++ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ else ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(!bWifiBusy) ++ { ++ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8703b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else ++ { ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ } ++ else ++ { ++ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8703b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else if( (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8703b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else ++ { ++ //halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ //halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++} ++ ++VOID ++halbtc8703b1ant_RunSwCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm=0; ++ ++ algorithm = halbtc8703b1ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ ++ if(halbtc8703b1ant_IsCommonAction(pBtCoexist)) ++ { ++ ++ } ++ else ++ { ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8703B_1ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); ++ //halbtc8703b1ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); ++ //halbtc8703b1ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); ++ //halbtc8703b1ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); ++ //halbtc8703b1ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); ++ //halbtc8703b1ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); ++ //halbtc8703b1ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); ++ //halbtc8703b1ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); ++ //halbtc8703b1ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); ++ //halbtc8703b1ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); ++ //halbtc8703b1ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); ++ //halbtc8703b1ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8703b1ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bIncreaseScanDevNum=FALSE; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ u1Byte aggBufSize=5; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0, wifiBw; ++ u1Byte iotPeer=BTC_IOT_PEER_UNKNOWN; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if(pCoexSta->bBtWhckTest) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); ++ halbtc8703b1ant_ActionBtWhckTest(pBtCoexist); ++ return; ++ } ++ ++ if( (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bIncreaseScanDevNum = TRUE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ bMiracastPlusBt = FALSE; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ ++ if ( (pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); ++ } ++ else ++ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) ++ { ++ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_IOT_PEER, &iotPeer); ++ ++ if(BTC_IOT_PEER_CISCO != iotPeer) ++ { ++ if(pBtLinkInfo->bScoExist)//if (pBtLinkInfo->bBtHiPriLinkExist) ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); ++ else ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); ++ } ++ else ++ { ++ if(pBtLinkInfo->bScoExist) ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); ++ else ++ { ++ if (BTC_WIFI_BW_HT40==wifiBw) ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x10); ++ else ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ } ++ } ++ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, TRUE); ++ halbtc8703b1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message ++ } ++ else ++ { ++ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); ++ ++ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++ halbtc8703b1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8703b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ ++ if(!bWifiConnected) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ if (bScan) ++ halbtc8703b1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ else ++ halbtc8703b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else ++ halbtc8703b1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else // wifi LPS/Busy ++ { ++ halbtc8703b1ant_ActionWifiConnected(pBtCoexist); ++ } ++} ++ ++u4Byte ++halbtc8703b1ant_PSD_Log2Base( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val ++ ++ ) ++{ ++ u1Byte i,j; ++ u4Byte tmp, tmp2, val_integerdB=0, tindex, shiftcount=0; ++ u4Byte result,val_fractiondB=0,Table_fraction[21]= {0,432, 332, 274, 232, 200, ++ 174, 151,132,115,100,86,74,62,51,42, ++ 32,23,15,7,0}; ++ ++ if (val == 0) ++ return 0; ++ ++ tmp = val; ++ ++ while(1) ++ { ++ if (tmp == 1) ++ break; ++ else ++ { ++ tmp = (tmp >> 1); ++ shiftcount++; ++ } ++ } ++ ++ ++ val_integerdB = shiftcount+1; ++ ++ tmp2=1; ++ for (j=1; j<= val_integerdB;j++) ++ tmp2 = tmp2*2; ++ ++ tmp = (val*100) /tmp2; ++ tindex = tmp/5; ++ ++ if (tindex > 20) ++ tindex = 20; ++ ++ val_fractiondB = Table_fraction[tindex]; ++ ++ result = val_integerdB*100 - val_fractiondB; ++ ++ return (result); ++ ++ ++} ++ ++VOID ++halbtc8703b1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ ++ // sw all off ++ halbtc8703b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ //halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ //halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ pCoexSta->popEventCnt = 0; ++} ++ ++VOID ++halbtc8703b1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0;//, fwVer; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0, u1Tmpa=0, u1Tmpb=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ u4Byte u4Tmp1=0, u4Tmp2=0; ++ ++ ++ u4Tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); ++ u4Tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** (Before Init HW config) 0x38= 0x%x, 0x54= 0x%x**********\n", u4Tmp1, u4Tmp2)); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); ++ ++ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x550, 0x8, 0x1); //enable TBTT nterrupt ++ ++ //BT report packet sample rate ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, 0x5); ++ ++ // Enable BT counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); ++ ++ //Enable PTA (3-wire function form BT side) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x41, 0x02, 0x1); ++ ++ //Enable PTA (tx/rx signal form WiFi side) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x4c6, 0x10, 0x1); ++ ++ //enable GNT_WL/GNT_BT debug signal to GPIO14/15 ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x73, 0x8, 0x1); ++ ++ //enable GNT_WL ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x4e, 0x40, 0x0); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x1, 0x0); ++ ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ ++ //Antenna config ++ if(bWifiOnly) ++ { ++ pCoexSta->bConCurrentRxModeOn = FALSE; ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FORCE_EXEC, TRUE, FALSE); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FORCE_EXEC, FALSE, FALSE); ++ } ++ else ++ { ++ pCoexSta->bConCurrentRxModeOn = TRUE; ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x953, 0x2, 0x1); ++ //RF 0x1[0] = 0 -> Set GNT_WL_RF_Rx always = 1 for con-current Rx ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0x1, 0x0); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, TRUE, FALSE); ++ } ++ ++ // PTA parameter ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++} ++ ++ ++ ++VOID ++halbtc8703b1ant_PSD_ShowData( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u4Byte nDeltaFreqPerPoint; ++ u4Byte freq,freq1,freq2,n=0,i=0, j=0, m=0, PsdRep1, PsdRep2; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n\n============[PSD info] (%d)============\n", ++ pPsdScan->nPSDGenCount); ++ CL_PRINTF(cliBuf); ++ ++ if (pPsdScan->nPSDGenCount == 0) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n No Data !!\n"); ++ CL_PRINTF(cliBuf); ++ return; ++ } ++ ++ if (pPsdScan->nPSDPoint == 0) ++ nDeltaFreqPerPoint = 0; ++ else ++ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; ++ ++ //if (pPsdScan->bIsPSDShowMaxOnly) ++ if (0) ++ { ++ PsdRep1 = pPsdScan->nPSDMaxValue/100; ++ PsdRep2 = pPsdScan->nPSDMaxValue - PsdRep1 * 100; ++ ++ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + pPsdScan->nPSDMaxValuePoint * nDeltaFreqPerPoint); ++ freq1 = freq/1000000; ++ freq2 = freq/1000 - freq1 * 1000; ++ ++ if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.0%d MHz", ++ freq1, freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.%d MHz", ++ freq1, freq2); ++ ++ if (PsdRep2 < 10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.0%d dB, (%d) \n", ++ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.%d dB, (%d)\n", ++ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); ++ ++ CL_PRINTF(cliBuf); ++ } ++ else ++ { ++ m = pPsdScan->nPSDStartPoint; ++ n = pPsdScan->nPSDStartPoint; ++ i = 1; ++ j = 1; ++ ++ while(1) ++ { ++ do ++ { ++ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + m * nDeltaFreqPerPoint); ++ freq1 = freq/1000000; ++ freq2 = freq/1000 - freq1 * 1000; ++ ++ if (i ==1) ++ { ++ if (freq2 == 0) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.000", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.0%2d", freq1,freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.%3d", freq1,freq2); ++ } ++ else if ( (i%8 == 0) || (m == pPsdScan->nPSDStopPoint) ) ++ { ++ if (freq2 == 0) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000\n", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d\n", freq1,freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d\n", freq1,freq2); ++ } ++ else ++ { ++ if (freq2 == 0) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d", freq1,freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d", freq1,freq2); ++ } ++ ++ i++; ++ m++; ++ CL_PRINTF(cliBuf); ++ ++ }while( (i <= 8) && (m <= pPsdScan->nPSDStopPoint)); ++ ++ ++ do ++ { ++ PsdRep1 = pPsdScan->nPSDReport_MaxHold[n]/100; ++ PsdRep2 = pPsdScan->nPSDReport_MaxHold[n] - PsdRep1 * 100; ++ ++ if (j ==1) ++ { ++ if (PsdRep2 <10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.0%d", PsdRep1,PsdRep2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.%d", PsdRep1,PsdRep2); ++ } ++ else if ( (j%8 == 0) || (n == pPsdScan->nPSDStopPoint) ) ++ { ++ if (PsdRep2 <10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d\n", PsdRep1,PsdRep2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d\n", PsdRep1,PsdRep2); ++ } ++ else ++ { ++ if (PsdRep2 <10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d", PsdRep1,PsdRep2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d", PsdRep1,PsdRep2); ++ } ++ ++ j++; ++ n++; ++ CL_PRINTF(cliBuf); ++ ++ } while( (j <= 8) && (n <= pPsdScan->nPSDStopPoint)); ++ ++ if ( (m > pPsdScan->nPSDStopPoint) || (n > pPsdScan->nPSDStopPoint) ) ++ break; ++ else ++ { ++ i = 1; ++ j = 1; ++ } ++ ++ } ++ } ++ ++ ++} ++ ++VOID ++halbtc8703b1ant_PSD_MaxHoldData( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte GenCount ++ ) ++{ ++ u4Byte i=0, i_max=0, val_max=0, j; ++ ++ if (GenCount== 1) ++ { ++ memcpy(pPsdScan->nPSDReport_MaxHold, pPsdScan->nPSDReport, BT_8703B_1ANT_ANTDET_PSD_POINTS*sizeof(u4Byte)); ++ ++ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); ++ } ++ ++ pPsdScan->nPSDMaxValuePoint = 0; ++ pPsdScan->nPSDMaxValue = 0; ++ ++ } ++ else ++ { ++ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) ++ { ++ if (pPsdScan->nPSDReport[i] > pPsdScan->nPSDReport_MaxHold[i]) ++ pPsdScan->nPSDReport_MaxHold[i] = pPsdScan->nPSDReport[i]; ++ ++ //search Max Value ++ if (i ==pPsdScan->nPSDStartPoint ) ++ { ++ i_max = i; ++ val_max = pPsdScan->nPSDReport_MaxHold[i]; ++ } ++ else ++ { ++ if (pPsdScan->nPSDReport_MaxHold[i] > val_max) ++ { ++ i_max = i; ++ val_max = pPsdScan->nPSDReport_MaxHold[i]; ++ } ++ } ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); ++ ++ } ++ ++ pPsdScan->nPSDMaxValuePoint = i_max; ++ pPsdScan->nPSDMaxValue = val_max; ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i_Max = %d, PSDReport_Max = %d dB\n", pPsdScan->nPSDMaxValuePoint ++ // ,pPsdScan->nPSDMaxValue)); ++ } ++ ++ ++} ++ ++u4Byte ++halbtc8703b1ant_PSD_GetData( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte nPoint ++ ) ++{ ++ //reg 0x808[9:0]: FFT data x ++ //reg 0x808[22]: 0-->1 to get 1 FFT data y ++ //reg 0x8b4[15:0]: FFT data y report ++ ++ u4Byte val = 0, psd_report =0; ++ ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); ++ ++ val &= 0xffbffc00; ++ val |= nPoint; ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); ++ ++ val |= 0x00400000; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); ++ ++ ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x8b4); ++ ++ psd_report = val & 0x0000ffff; ++ ++ return psd_report; ++} ++ ++ ++VOID ++halbtc8703b1ant_PSD_SweepPoint( ++IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN s4Byte offset, ++ IN u4Byte span, ++ IN u4Byte points, ++ IN u4Byte avgnum ++ ) ++{ ++ u4Byte i,val,n,k=0; ++ u4Byte nPoints=0, psd_report=0; ++ u4Byte nStartP=0, nStopP=0, nDeltaFreqPerPoint=156250; ++ u4Byte nPSDCenterFreq=20*10^6, freq,freq1,freq2; ++ BOOLEAN outloop = FALSE; ++ u1Byte flag = 0; ++ u4Byte tmp, PsdRep1, PsdRep2; ++ u4Byte WiFi_OriginalChannel = 1; ++ ++ pPsdScan->bIsPSDRunning = TRUE; ++ ++ do ++ { ++ switch(flag) ++ { ++ case 0: //Get PSD parameters ++ default: ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), centFreq=0x%x, offset=0x%x, span=0x%x\n", ++ // centFreq, offset, span)); ++ ++ pPsdScan->nPSDBandWidth = 40*1000000; ++ pPsdScan->nPSDPoint = points; ++ pPsdScan->nPSDStartBase = points/2; ++ pPsdScan->nPSDAvgNum = avgnum; ++ pPsdScan->nRealCentFreq = centFreq; ++ pPsdScan->nRealOffset = offset; ++ pPsdScan->nRealSpan = span; ++ ++ ++ nPoints = pPsdScan->nPSDPoint; ++ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; ++ ++ //PSD point setup ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); ++ val &= 0xffff0fff; ++ ++ switch(pPsdScan->nPSDPoint) ++ { ++ case 128: ++ val |= 0x0; ++ break; ++ case 256: ++ default: ++ val |=0x00004000; ++ break; ++ case 512: ++ val |= 0x00008000; ++ break; ++ case 1024: ++ val |= 0x0000c000; ++ break; ++ } ++ ++ switch(pPsdScan->nPSDAvgNum) ++ { ++ case 1: ++ val |= 0x0; ++ break; ++ case 8: ++ val |=0x00001000; ++ break; ++ case 16: ++ val |= 0x00002000; ++ break; ++ case 32: ++ default: ++ val |= 0x00003000; ++ break; ++ } ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD BW= %d, DeltaFreq=%d\n" ++ // , pPsdScan->nPSDBandWidth, nDeltaFreqPerPoint)); ++ flag = 1; ++ break; ++ case 1: //calculate the PSD point index from freq/offset/span ++ nPSDCenterFreq = pPsdScan->nPSDBandWidth /2 +offset*(1000000); ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD Center Freq = %d\n", (centFreq + offset))); ++ ++ nStartP = pPsdScan->nPSDStartBase + (nPSDCenterFreq - span *(1000000)/2) /nDeltaFreqPerPoint; ++ pPsdScan->nPSDStartPoint = nStartP - pPsdScan->nPSDStartBase; ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Start PSD Poin Matrix Index = %d\n", pPsdScan->nPSDStartPoint)); ++ ++ nStopP = pPsdScan->nPSDStartBase + (nPSDCenterFreq + span *(1000000)/2) /nDeltaFreqPerPoint; ++ pPsdScan->nPSDStopPoint = nStopP - pPsdScan->nPSDStartBase-1; ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Stop PSD Poin Matrix Index = %d\n",pPsdScan->nPSDStopPoint)); ++ ++ flag = 2; ++ break; ++ case 2: //set RF channel/BW/Mode ++ ++ //set 3-wire off ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); ++ val |= 0x00300000; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); ++ ++ //CCK off ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); ++ val &= 0xfeffffff; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); ++ ++ //store WiFi original channel ++ WiFi_OriginalChannel = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff); ++ ++ //Set RF channel ++ if (centFreq == 2484) ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, 0xe); ++ else ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, (centFreq-2412)/5 + 1); //WiFi TRx Mask on ++ ++ //Set RF mode = Rx, RF Gain = 0x8a0 ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x0, 0xfffff, 0x308a0); ++ ++ //Set RF Rx filter corner ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x3e4); ++ ++ //Set TRx mask off ++ //un-lock TRx Mask setup ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x1); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x1); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ flag = 3; ++ break; ++ case 3: ++ memset(pPsdScan->nPSDReport,0, pPsdScan->nPSDPoint*sizeof(u4Byte)); ++ nStartP = pPsdScan->nPSDStartPoint + pPsdScan->nPSDStartBase; ++ nStopP = pPsdScan->nPSDStopPoint + pPsdScan->nPSDStartBase + 1; ++ ++ i = nStartP; ++ ++ while (i < nStopP) ++ { ++ if (i >= nPoints) ++ { ++ psd_report = halbtc8703b1ant_PSD_GetData(pBtCoexist,i-nPoints); ++ } ++ else ++ { ++ psd_report = halbtc8703b1ant_PSD_GetData(pBtCoexist,i); ++ } ++ ++ if (psd_report == 0) ++ tmp = 0; ++ else ++ //tmp = 20*log10((double)psd_report); ++ //20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 ++ tmp = 6 * halbtc8703b1ant_PSD_Log2Base(pBtCoexist, psd_report); ++ ++ n = i-pPsdScan->nPSDStartBase; ++ pPsdScan->nPSDReport[n] = tmp; ++ PsdRep1 = pPsdScan->nPSDReport[n] /100; ++ PsdRep2 = pPsdScan->nPSDReport[n] - PsdRep1 * 100; ++ ++ freq = ((centFreq-20) * 1000000 + n * nDeltaFreqPerPoint); ++ freq1 = freq/1000000; ++ freq2 = freq/1000 - freq1 * 1000; ++/* ++ if (freq2 < 100) ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.0%d MHz)", n, freq1, freq2)); ++ else ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.%d MHz)", n, freq1, freq2)); ++ ++ if (PsdRep2 < 10) ++ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.0%d dB)\n",psd_report, PsdRep1, PsdRep2)); ++ else ++ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.%d dB)\n",psd_report, PsdRep1,PsdRep2)); ++*/ ++ i++; ++ ++ k=0; ++ ++ //Add Delay between PSD point ++ while(1) ++ { ++ if (k++ > 20000) ++ break; ++ } ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint()==============\n")); ++ } ++ ++ flag = 100; ++ break; ++ case 99: //error ++ ++ outloop = TRUE; ++ break; ++ case 100: //recovery ++ ++ //set 3-wire on ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); ++ val &=0xffcfffff; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); ++ ++ //CCK on ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); ++ val |= 0x01000000; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); ++ ++ //PSD off ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); ++ val &=0xffbfffff; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x808,val); ++ ++ //TRx Mask on ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); ++ ++ //lock TRx Mask setup ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x0); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x0); ++ ++ //Set RF Rx filter corner ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x0); ++ ++ //restore WiFi original channel ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, WiFi_OriginalChannel); ++ ++ outloop = TRUE; ++ break; ++ ++ } ++ ++ }while (!outloop); ++ ++ ++ ++ pPsdScan->bIsPSDRunning = FALSE; ++ ++ ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8703b1ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8703b1ant_ ++//============================================================ ++VOID ++EXhalbtc8703b1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u1Byte u1Tmp=0x0; ++ u2Byte u2Tmp=0x0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx Execute 8703b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n")); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("Ant Det Finish = %s, Ant Det Number = %d\n", ++ (pBoardInfo->btdmAntDetFinish? "Yes":"No"), pBoardInfo->btdmAntNumByAntDet)); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ ++ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); ++ ++ //set Path control owner to WiFi ++ halbtc8703b1ant_LTECoex_PathControlOwner(pBtCoexist, BT_8703B_1ANT_PCO_WLSIDE); ++ ++ // set GNT_BT to high ++ halbtc8703b1ant_LTECoex_Set_GNT_BT(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); ++ //Set GNT_WL to low ++ halbtc8703b1ant_LTECoex_Set_GNT_WL(pBtCoexist, BT_8703B_1ANT_GNT_BLOCK_RFC_BB, BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, BT_8703B_1ANT_SIG_STA_SET_TO_LOW); ++ ++ // set WLAN_ACT = 0 ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // ++ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) ++ // Local setting bit define ++ // BIT0: "0" for no antenna inverse; "1" for antenna inverse ++ // BIT1: "0" for internal switch; "1" for external switch ++ // BIT2: "0" for one antenna; "1" for two antenna ++ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 ++ ++ u1Tmp = 0; ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** LTE coex Reg 0x38 (Power-On) = 0x%x**********\n", halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38))); ++ ++ ++#if 0 ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ u1Tmp |= 0x1; // antenna inverse ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ else ++ { ++ ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ // set to S1 ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ u1Tmp |= 0x1; // antenna inverse ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ ++ ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_PCI) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ } ++ ++#endif ++} ++ ++VOID ++EXhalbtc8703b1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8703b1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8703b1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); ++ pBtCoexist->bStopCoexDm = FALSE; ++} ++ ++VOID ++EXhalbtc8703b1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ pBtCoexist->bStopCoexDm = FALSE; ++ ++ halbtc8703b1ant_InitCoexDm(pBtCoexist); ++ ++ halbtc8703b1ant_QueryBtInfo(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8703b1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u2Byte u2Tmp[4]; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ static u1Byte PopReportIn10s = 0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ if(pBtCoexist->bStopCoexDm) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ if (pPsdScan->bAntDet_TryCount == 0) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Mech/ Pos", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); ++ CL_PRINTF(cliBuf); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)", "Ant PG Num/ Mech(Ant_Det)/ Pos", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNumByAntDet, pBoardInfo->btdmAntPos, ++ pPsdScan->bAntDet_TryCount, pPsdScan->bAntDet_FailCount, pPsdScan->nAntDet_Result); ++ CL_PRINTF(cliBuf); ++ ++ if (pBoardInfo->btdmAntDetFinish) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "Ant Det PSD Value", pPsdScan->nAntDet_PeakVal); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8703b1Ant, GLCoexVer8703b1Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "WifibHiPri/ Ccklock/ CckEverLock", \ ++ (pCoexSta->bWiFiIsHighPriTask? "Yes":"No"), ++ (pCoexSta->bCCKLock? "Yes":"No"), ++ (pCoexSta->bCCKEverLock? "Yes":"No")); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ PopReportIn10s++; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt, pCoexSta->popEventCnt); ++ CL_PRINTF(cliBuf); ++ ++ if (PopReportIn10s >= 5) ++ { ++ pCoexSta->popEventCnt = 0; ++ PopReportIn10s = 0; ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d / %d", "SCO/HID/PAN/A2DP/Hi-Pri", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist, pBtLinkInfo->bBtHiPriLinkExist); ++ CL_PRINTF(cliBuf); ++ ++ if (pStackInfo->bProfileNotified) ++ { ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ else ++ { ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", "BT Role/A2DP rate", \ ++ (pBtLinkInfo->bSlaveRole )? "Slave":"Master", (btInfoExt&BIT0)? "BR":"EDR"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8703b1Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ } ++ ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ 0x%x", "SM[LowPenaltyRA]/RA Mask", \ ++ pCoexDm->bCurLowPenaltyRa, pBtCoexist->btInfo.raMask); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "NoAggr/ CtrlAggr/ AggrSize", \ ++ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), ++ pBtCoexist->btInfo.aggBufSize); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ } ++ ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, ++ (pCoexDm->bCurPsTdmaOn? "On":"Off"), ++ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); ++ ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "WL/BT Coex Table Type", \ ++ pCoexSta->nCoexTableType); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/0x6cc/IgnWlanAct", \ ++ u1Tmp[0], u4Tmp[0], pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xa0); ++ u4Tmp[1] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xa4); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "LTE Coex Table W_L/B_L", \ ++ u4Tmp[0]&0xffff, u4Tmp[1]&0xffff); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xa8); ++ u4Tmp[1] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xac); ++ u4Tmp[2] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xb0); ++ u4Tmp[3] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0xb4); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "LTE Break Table W_L/B_L/L_W/L_B", \ ++ u4Tmp[0]&0xffff, u4Tmp[1]&0xffff, u4Tmp[2]&0xffff, u4Tmp[3]&0xffff); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ ++ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ ++ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x38); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x73); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s", "LTE CoexOn/Path Ctrl Owner", \ ++ ((u4Tmp[0]&BIT7)>> 7), ((u1Tmp[0]&BIT2)? "WL":"BT")); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "LTE 3Wire/OPMode/UART/UARTMode", \ ++ ((u4Tmp[0]&BIT6)>> 6), ((u4Tmp[0]&(BIT5|BIT4))>> 4),((u4Tmp[0]&BIT3)>> 3), (u4Tmp[0]&(BIT2|BIT1|BIT0))); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s", "GNT_WL_SWCtrl/GNT_BT_SWCtrl/Dbg", \ ++ ((u4Tmp[0]&BIT12)>> 12), ((u4Tmp[0]&BIT14)>> 14), ((u1Tmp[0]&BIT3)? "On":"Off")); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(pBtCoexist, 0x54); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "GNT_WL/GNT_BT/LTE_Busy/UART_Busy", \ ++ ((u4Tmp[0]&BIT2)>> 2), ((u4Tmp[0]&BIT3)>> 3), ((u4Tmp[0]&BIT1)>> 1), (u4Tmp[0]&BIT0)); ++ CL_PRINTF(cliBuf); ++ ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4c6); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x4c6[4]/0x40[5] (WL/BT PTA)", \ ++ ((u1Tmp[0] & BIT4)>>4), ((u1Tmp[1] & BIT5)>>5)); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x953); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %s", "0x550(bcn ctrl)/0x522/4-RxAGC", \ ++ u4Tmp[0], u1Tmp[0], (u1Tmp[1]&0x2)? "On": "Off"); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ ++ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ ++ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; ++ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; ++ ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xc50/OFDM-CCA/OFDM-FA/CCK-FA", \ ++ u4Tmp[1]&0xff, u4Tmp[0]&0xffff, faOfdm, faCck); ++ CL_PRINTF(cliBuf); ++ ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++ ++ halbtc8703b1ant_ReadScoreBoard(pBtCoexist, &u2Tmp[0]); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %04x", "ScoreBoard[14:0] (from BT)", u2Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++#if(BT_AUTO_REPORT_ONLY_8703B_1ANT == 1) ++ //halbtc8703b1ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8703b1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp=0; ++ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ ++ //Write WL "Active" in Score-board for LPS off ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); ++ ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ ++ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8703b1ant_InitCoexDm(pBtCoexist); ++ halbtc8703b1ant_QueryBtInfo(pBtCoexist); ++ ++ pCoexSta->bUnderIps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8703b1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ ++ if (pCoexSta->bForceLpsOn == TRUE) // LPS No-32K ++ { ++ //Write WL "Active" in Score-board for PS-TDMA ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ ++ } ++ else // LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) ++ { ++ //Write WL "Non-Active" in Score-board for Native-PS ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); ++ ++ } ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ ++ ++ //Write WL "Active" in Score-board for LPS off ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ ++ } ++} ++ ++VOID ++EXhalbtc8703b1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ u1Byte u1Tmpa, u1Tmpb; ++ u4Byte u4Tmp; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm ) ++ return; ++ ++ if(BTC_SCAN_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); ++ } ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ return; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ halbtc8703b1ant_QueryBtInfo(pBtCoexist); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8703b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_SCAN_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8703b1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ } ++ else // wifi is connected ++ { ++ halbtc8703b1ant_ActionWifiConnectedScan(pBtCoexist); ++ } ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8703b1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8703b1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8703b1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ pCoexDm->nArpCnt = 0; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ //pCoexDm->nArpCnt = 0; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8703b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ halbtc8703b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8703b1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8703b1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8703b1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ BOOLEAN bWifiUnderBMode = FALSE; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ ++ //Set CCK Tx/Rx high Pri except 11b mode ++ if (bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx ++ } ++ else ++ { ++ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx ++ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx ++ } ++ ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); ++ pCoexDm->nArpCnt = 0; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx ++ ++ pCoexSta->bCCKEverLock = FALSE; ++ } ++ ++ halbtc8703b1ant_UpdateWifiChannelInfo(pBtCoexist, type); ++ ++} ++ ++VOID ++EXhalbtc8703b1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE, bUnder4way=FALSE; ++ u1Byte aggBufSize=5; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type ) ++ { ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ ++ if (BTC_PACKET_ARP == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); ++ ++ pCoexDm->nArpCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); ++ ++ if((pCoexDm->nArpCnt >= 10) && (!bUnder4way)) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); ++ } ++ ++ pCoexSta->specialPktPeriodCnt = 0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8703b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8703b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8703b1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8703b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8703b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) ++ { ++ halbtc8703b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8703b1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bBtBusy=FALSE; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8703B_1ANT_MAX) ++ rspSource = BT_INFO_SRC_8703B_1ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ // if 0xff, it means BT is under WHCK test ++ if (btInfo == 0xff) ++ pCoexSta->bBtWhckTest = TRUE; ++ else ++ pCoexSta->bBtWhckTest = FALSE; ++ ++ if(BT_INFO_SRC_8703B_1ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ if (pCoexSta->btRetryCnt >= 1) ++ pCoexSta->popEventCnt++; ++ ++ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) ++ pCoexSta->bC2hBtPage = TRUE; ++ else ++ pCoexSta->bC2hBtPage = FALSE; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2-90; ++ //pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if(pCoexSta->btInfoExt & BIT1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ halbtc8703b1ant_UpdateWifiChannelInfo(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ halbtc8703b1ant_UpdateWifiChannelInfo(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if(pCoexSta->btInfoExt & BIT3) ++ { ++ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8703b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8703B_1ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8703b1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8703B_1ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ pCoexSta->nNumOfProfile = 0; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8703B_1ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ ++ pCoexSta->bBtHiPriLinkExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8703B_1ANT_B_FTP) ++ { ++ pCoexSta->bPanExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8703B_1ANT_B_A2DP) ++ { ++ pCoexSta->bA2dpExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8703B_1ANT_B_HID) ++ { ++ pCoexSta->bHidExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8703B_1ANT_B_SCO_ESCO) ++ { ++ pCoexSta->bScoExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bScoExist = FALSE; ++ ++ if ((pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) &&( pCoexSta->bScoExist == FALSE)) ++ { ++ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ { ++ pCoexSta->bHidExist = TRUE; ++ pCoexSta->wrongProfileNotification++; ++ pCoexSta->nNumOfProfile++; ++ btInfo = btInfo | 0x28; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT HID = true (Hi-Pri > 160)!\n")); ++ } ++ } ++ ++ //Add Hi-Pri Tx/Rx counter to avoid false detection ++ if (((pCoexSta->bHidExist) || (pCoexSta->bScoExist)) && (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ && (!pCoexSta->bC2hBtInquiryPage)) ++ pCoexSta->bBtHiPriLinkExist = TRUE; ++ else ++ pCoexSta->bBtHiPriLinkExist = FALSE; ++ ++ if((btInfo&BT_INFO_8703B_1ANT_B_ACL_BUSY) && (pCoexSta->nNumOfProfile == 0)) ++ { ++ if (pCoexSta->lowPriorityTx + pCoexSta->lowPriorityRx >= 160) ++ { ++ pCoexSta->bPanExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ pCoexSta->wrongProfileNotification++; ++ btInfo = btInfo | 0x88; ++ } ++ } ++ } ++ ++ halbtc8703b1ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) ++ ++ if(!(btInfo&BT_INFO_8703B_1ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8703B_1ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8703B_1ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8703B_1ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8703B_1ANT_B_ACL_BUSY) ++ { ++ if(BT_8703B_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8703B_1ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ bBtBusy = TRUE; ++ else ++ bBtBusy = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ halbtc8703b1ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8703b1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); ++ ++ if(BTC_RF_ON == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ pBtCoexist->bStopCoexDm = FALSE; ++ } ++ else if(BTC_RF_OFF == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); ++ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ halbtc8703b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ pBtCoexist->bStopCoexDm = TRUE; ++ ++ } ++} ++ ++VOID ++EXhalbtc8703b1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); ++ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ ++ halbtc8703b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8703b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++} ++ ++VOID ++EXhalbtc8703b1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, FALSE); ++ ++ halbtc8703b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8703b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ halbtc8703b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ halbtc8703b1ant_PostActiveStateToBT(pBtCoexist, TRUE); ++ ++ pBtCoexist->bStopCoexDm = FALSE; ++ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8703b1ant_InitCoexDm(pBtCoexist); ++ halbtc8703b1ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++ ++VOID ++EXhalbtc8703b1ant_ScoreBoardStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ // ++ ++ ++} ++ ++VOID ++EXhalbtc8703b1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); ++ ++ halbtc8703b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); ++ halbtc8703b1ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8703b1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8703b1Ant, GLCoexVer8703b1Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8703B_1ANT == 0) ++ halbtc8703b1ant_QueryBtInfo(pBtCoexist); ++ halbtc8703b1ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8703b1ant_MonitorBtCtr(pBtCoexist); ++ halbtc8703b1ant_MonitorWiFiCtr(pBtCoexist); ++#if BT_8703B_1ANT_ANTDET_ENABLE ++ halbtc8703b1ant_MonitorBtEnableDisable(pBtCoexist); ++#endif ++ ++ if( halbtc8703b1ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust ) ++ { ++ ++ halbtc8703b1ant_RunCoexistMechanism(pBtCoexist); ++ } ++ ++ pCoexSta->specialPktPeriodCnt++; ++ ++#endif ++} ++ ++VOID ++EXhalbtc8703b1ant_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ) ++{ ++ //No Antenna Detection required because 8730b is only 1-Ant ++} ++ ++VOID ++EXhalbtc8703b1ant_AntennaIsolation( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ) ++{ ++ ++ ++} ++ ++VOID ++EXhalbtc8703b1ant_PSDScan( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ) ++{ ++ ++ ++} ++ ++VOID ++EXhalbtc8703b1ant_DisplayAntDetection( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ ++} ++ ++#endif ++ ++#else // #if (RTL8723B_SUPPORT == 1) ++VOID ++EXhalbtc8703b1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8703b1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8703b1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ){} ++VOID ++EXhalbtc8703b1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8703b1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8703b1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8703b1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8703b1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8703b1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8703b1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8703b1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ){} ++VOID ++EXhalbtc8703b1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8703b1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8703b1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ){} ++VOID ++EXhalbtc8703b1ant_ScoreBoardStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ){} ++VOID ++EXhalbtc8703b1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8703b1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8703b1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8703b1ant_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ){} ++VOID ++EXhalbtc8703b1ant_DisplayAntDetection( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b1Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b1Ant.h new file mode 100644 -index 000000000..703cf8e95 +index 0000000..8948461 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b1Ant.h @@ -0,0 +1,386 @@ -+//=========================================== -+// The following is for 8703B 1ANT BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1 -+ -+#define BT_INFO_8703B_1ANT_B_FTP BIT7 -+#define BT_INFO_8703B_1ANT_B_A2DP BIT6 -+#define BT_INFO_8703B_1ANT_B_HID BIT5 -+#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8703B_1ANT_B_CONNECTION BIT0 -+ -+#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2 -+ -+#define BT_8703B_1ANT_WIFI_NOISY_THRESH 30 //max: 255 -+ -+//for Antenna detection -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50 -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70 -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55 -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35 -+#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 //retry timer if ant det is fail, unit: second -+#define BT_8703B_1ANT_ANTDET_ENABLE 0 -+#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0 -+ -+#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000 -+ -+typedef enum _BT_8703B_1ANT_SIGNAL_STATE{ -+ BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0, -+ BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0, -+ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1, -+ BT_8703B_1ANT_SIG_STA_MAX -+}BT_8703B_1ANT_SIGNAL_STATE,*PBT_8703B_1ANT_SIGNAL_STATE; -+ -+typedef enum _BT_8703B_1ANT_PATH_CTRL_OWNER{ -+ BT_8703B_1ANT_PCO_BTSIDE = 0x0, -+ BT_8703B_1ANT_PCO_WLSIDE = 0x1, -+ BT_8703B_1ANT_PCO_MAX -+}BT_8703B_1ANT_PATH_CTRL_OWNER,*PBT_8703B_1ANT_PATH_CTRL_OWNER; -+ -+typedef enum _BT_8703B_1ANT_GNT_CTRL_TYPE{ -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1, -+ BT_8703B_1ANT_GNT_TYPE_MAX -+}BT_8703B_1ANT_GNT_CTRL_TYPE,*PBT_8703B_1ANT_GNT_CTRL_TYPE; -+ -+typedef enum _BT_8703B_1ANT_GNT_CTRL_BLOCK{ -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0, -+ BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1, -+ BT_8703B_1ANT_GNT_BLOCK_BB = 0x2, -+ BT_8703B_1ANT_GNT_BLOCK_MAX -+}BT_8703B_1ANT_GNT_CTRL_BLOCK,*PBT_8703B_1ANT_GNT_CTRL_BLOCK; -+ -+typedef enum _BT_8703B_1ANT_LTE_COEX_TABLE_TYPE{ -+ BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0, -+ BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1, -+ BT_8703B_1ANT_CTT_MAX -+}BT_8703B_1ANT_LTE_COEX_TABLE_TYPE,*PBT_8703B_1ANT_LTE_COEX_TABLE_TYPE; -+ -+typedef enum _BT_8703B_1ANT_LTE_BREAK_TABLE_TYPE{ -+ BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0, -+ BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1, -+ BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2, -+ BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3, -+ BT_8703B_1ANT_LBTT_MAX -+}BT_8703B_1ANT_LTE_BREAK_TABLE_TYPE,*PBT_8703B_1ANT_LTE_BREAK_TABLE_TYPE; -+ -+typedef enum _BT_INFO_SRC_8703B_1ANT{ -+ BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8703B_1ANT_MAX -+}BT_INFO_SRC_8703B_1ANT,*PBT_INFO_SRC_8703B_1ANT; -+ -+typedef enum _BT_8703B_1ANT_BT_STATUS{ -+ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8703B_1ANT_BT_STATUS_MAX -+}BT_8703B_1ANT_BT_STATUS,*PBT_8703B_1ANT_BT_STATUS; -+ -+typedef enum _BT_8703B_1ANT_WIFI_STATUS{ -+ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, -+ BT_8703B_1ANT_WIFI_STATUS_MAX -+}BT_8703B_1ANT_WIFI_STATUS,*PBT_8703B_1ANT_WIFI_STATUS; -+ -+typedef enum _BT_8703B_1ANT_COEX_ALGO{ -+ BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8703B_1ANT_COEX_ALGO_SCO = 0x1, -+ BT_8703B_1ANT_COEX_ALGO_HID = 0x2, -+ BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8703B_1ANT_COEX_ALGO_MAX = 0xb, -+}BT_8703B_1ANT_COEX_ALGO,*PBT_8703B_1ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8703B_1ANT{ -+ // hw setting -+ u1Byte preAntPosType; -+ u1Byte curAntPosType; -+ // fw mechanism -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ // sw mechanism -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt -+ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt -+ u2Byte backupRetryLimit; -+ u1Byte backupAmpduMaxTime; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ u1Byte preArfrType; -+ u1Byte curArfrType; -+ u1Byte preRetryLimitType; -+ u1Byte curRetryLimitType; -+ u1Byte preAmpduTimeType; -+ u1Byte curAmpduTimeType; -+ u4Byte nArpCnt; -+ -+ u1Byte errorCondition; -+} COEX_DM_8703B_1ANT, *PCOEX_DM_8703B_1ANT; -+ -+typedef struct _COEX_STA_8703B_1ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ BOOLEAN bBtHiPriLinkExist; -+ u1Byte nNumOfProfile; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte specialPktPeriodCnt; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ s1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8703B_1ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8703B_1ANT_MAX]; -+ BOOLEAN bBtWhckTest; -+ BOOLEAN bC2hBtInquiryPage; -+ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue -+ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ u4Byte popEventCnt; -+ u1Byte nScanAPNum; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ BOOLEAN bCCKLock; -+ BOOLEAN bPreCCKLock; -+ BOOLEAN bCCKEverLock; -+ u1Byte nCoexTableType; -+ -+ BOOLEAN bForceLpsOn; -+ u4Byte wrongProfileNotification; -+ -+ BOOLEAN bConCurrentRxModeOn; -+ -+ u2Byte nScoreBoard; -+}COEX_STA_8703B_1ANT, *PCOEX_STA_8703B_1ANT; -+ -+#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 //MAX:1024 -+#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 //MAX:3 -+#define BT_8703B_1ANT_ANTDET_BUF_LEN 16 -+ -+typedef struct _PSDSCAN_STA_8703B_1ANT{ -+ -+u4Byte nAntDet_BTLEChannel; //BT LE Channel ex:2412 -+u4Byte nAntDet_BTTxTime; -+u4Byte nAntDet_PrePSDScanPeakVal; -+BOOLEAN nAntDet_IsAntDetAvailable; -+u4Byte nAntDet_PSDScanPeakVal; -+BOOLEAN nAntDet_IsBTReplyAvailable; -+u4Byte nAntDet_PSDScanPeakFreq; -+ -+u1Byte nAntDet_Result; -+u1Byte nAntDet_PeakVal[BT_8703B_1ANT_ANTDET_BUF_LEN]; -+u1Byte nAntDet_PeakFreq[BT_8703B_1ANT_ANTDET_BUF_LEN]; -+u4Byte bAntDet_TryCount; -+u4Byte bAntDet_FailCount; -+u4Byte nAntDet_IntevalCount; -+u4Byte nAntDet_ThresOffset; -+ -+u4Byte nRealCentFreq; -+s4Byte nRealOffset; -+u4Byte nRealSpan; -+ -+u4Byte nPSDBandWidth; //unit: Hz -+u4Byte nPSDPoint; //128/256/512/1024 -+u4Byte nPSDReport[1024]; //unit:dB (20logx), 0~255 -+u4Byte nPSDReport_MaxHold[1024]; //unit:dB (20logx), 0~255 -+u4Byte nPSDStartPoint; -+u4Byte nPSDStopPoint; -+u4Byte nPSDMaxValuePoint; -+u4Byte nPSDMaxValue; -+u4Byte nPSDStartBase; -+u4Byte nPSDAvgNum; // 1/8/16/32 -+u4Byte nPSDGenCount; -+BOOLEAN bIsPSDRunning; -+BOOLEAN bIsPSDShowMaxOnly; -+} PSDSCAN_STA_8703B_1ANT, *PPSDSCAN_STA_8703B_1ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8703b1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8703b1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8703b1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8703b1ant_ScoreBoardStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8703b1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b1ant_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+VOID -+EXhalbtc8703b1ant_AntennaIsolation( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+ -+VOID -+EXhalbtc8703b1ant_PSDScan( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+VOID -+EXhalbtc8703b1ant_DisplayAntDetection( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8703B 1ANT BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1 ++ ++#define BT_INFO_8703B_1ANT_B_FTP BIT7 ++#define BT_INFO_8703B_1ANT_B_A2DP BIT6 ++#define BT_INFO_8703B_1ANT_B_HID BIT5 ++#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8703B_1ANT_B_CONNECTION BIT0 ++ ++#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2 ++ ++#define BT_8703B_1ANT_WIFI_NOISY_THRESH 30 //max: 255 ++ ++//for Antenna detection ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50 ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70 ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55 ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35 ++#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 //retry timer if ant det is fail, unit: second ++#define BT_8703B_1ANT_ANTDET_ENABLE 0 ++#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0 ++ ++#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000 ++ ++typedef enum _BT_8703B_1ANT_SIGNAL_STATE{ ++ BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0, ++ BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0, ++ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1, ++ BT_8703B_1ANT_SIG_STA_MAX ++}BT_8703B_1ANT_SIGNAL_STATE,*PBT_8703B_1ANT_SIGNAL_STATE; ++ ++typedef enum _BT_8703B_1ANT_PATH_CTRL_OWNER{ ++ BT_8703B_1ANT_PCO_BTSIDE = 0x0, ++ BT_8703B_1ANT_PCO_WLSIDE = 0x1, ++ BT_8703B_1ANT_PCO_MAX ++}BT_8703B_1ANT_PATH_CTRL_OWNER,*PBT_8703B_1ANT_PATH_CTRL_OWNER; ++ ++typedef enum _BT_8703B_1ANT_GNT_CTRL_TYPE{ ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1, ++ BT_8703B_1ANT_GNT_TYPE_MAX ++}BT_8703B_1ANT_GNT_CTRL_TYPE,*PBT_8703B_1ANT_GNT_CTRL_TYPE; ++ ++typedef enum _BT_8703B_1ANT_GNT_CTRL_BLOCK{ ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0, ++ BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1, ++ BT_8703B_1ANT_GNT_BLOCK_BB = 0x2, ++ BT_8703B_1ANT_GNT_BLOCK_MAX ++}BT_8703B_1ANT_GNT_CTRL_BLOCK,*PBT_8703B_1ANT_GNT_CTRL_BLOCK; ++ ++typedef enum _BT_8703B_1ANT_LTE_COEX_TABLE_TYPE{ ++ BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0, ++ BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1, ++ BT_8703B_1ANT_CTT_MAX ++}BT_8703B_1ANT_LTE_COEX_TABLE_TYPE,*PBT_8703B_1ANT_LTE_COEX_TABLE_TYPE; ++ ++typedef enum _BT_8703B_1ANT_LTE_BREAK_TABLE_TYPE{ ++ BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0, ++ BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1, ++ BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2, ++ BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3, ++ BT_8703B_1ANT_LBTT_MAX ++}BT_8703B_1ANT_LTE_BREAK_TABLE_TYPE,*PBT_8703B_1ANT_LTE_BREAK_TABLE_TYPE; ++ ++typedef enum _BT_INFO_SRC_8703B_1ANT{ ++ BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8703B_1ANT_MAX ++}BT_INFO_SRC_8703B_1ANT,*PBT_INFO_SRC_8703B_1ANT; ++ ++typedef enum _BT_8703B_1ANT_BT_STATUS{ ++ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8703B_1ANT_BT_STATUS_MAX ++}BT_8703B_1ANT_BT_STATUS,*PBT_8703B_1ANT_BT_STATUS; ++ ++typedef enum _BT_8703B_1ANT_WIFI_STATUS{ ++ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8703B_1ANT_WIFI_STATUS_MAX ++}BT_8703B_1ANT_WIFI_STATUS,*PBT_8703B_1ANT_WIFI_STATUS; ++ ++typedef enum _BT_8703B_1ANT_COEX_ALGO{ ++ BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8703B_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8703B_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8703B_1ANT_COEX_ALGO_MAX = 0xb, ++}BT_8703B_1ANT_COEX_ALGO,*PBT_8703B_1ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8703B_1ANT{ ++ // hw setting ++ u1Byte preAntPosType; ++ u1Byte curAntPosType; ++ // fw mechanism ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ // sw mechanism ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt ++ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt ++ u2Byte backupRetryLimit; ++ u1Byte backupAmpduMaxTime; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ u1Byte preArfrType; ++ u1Byte curArfrType; ++ u1Byte preRetryLimitType; ++ u1Byte curRetryLimitType; ++ u1Byte preAmpduTimeType; ++ u1Byte curAmpduTimeType; ++ u4Byte nArpCnt; ++ ++ u1Byte errorCondition; ++} COEX_DM_8703B_1ANT, *PCOEX_DM_8703B_1ANT; ++ ++typedef struct _COEX_STA_8703B_1ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ BOOLEAN bBtHiPriLinkExist; ++ u1Byte nNumOfProfile; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte specialPktPeriodCnt; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ s1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8703B_1ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8703B_1ANT_MAX]; ++ BOOLEAN bBtWhckTest; ++ BOOLEAN bC2hBtInquiryPage; ++ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue ++ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ u4Byte popEventCnt; ++ u1Byte nScanAPNum; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ BOOLEAN bCCKLock; ++ BOOLEAN bPreCCKLock; ++ BOOLEAN bCCKEverLock; ++ u1Byte nCoexTableType; ++ ++ BOOLEAN bForceLpsOn; ++ u4Byte wrongProfileNotification; ++ ++ BOOLEAN bConCurrentRxModeOn; ++ ++ u2Byte nScoreBoard; ++}COEX_STA_8703B_1ANT, *PCOEX_STA_8703B_1ANT; ++ ++#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 //MAX:1024 ++#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 //MAX:3 ++#define BT_8703B_1ANT_ANTDET_BUF_LEN 16 ++ ++typedef struct _PSDSCAN_STA_8703B_1ANT{ ++ ++u4Byte nAntDet_BTLEChannel; //BT LE Channel ex:2412 ++u4Byte nAntDet_BTTxTime; ++u4Byte nAntDet_PrePSDScanPeakVal; ++BOOLEAN nAntDet_IsAntDetAvailable; ++u4Byte nAntDet_PSDScanPeakVal; ++BOOLEAN nAntDet_IsBTReplyAvailable; ++u4Byte nAntDet_PSDScanPeakFreq; ++ ++u1Byte nAntDet_Result; ++u1Byte nAntDet_PeakVal[BT_8703B_1ANT_ANTDET_BUF_LEN]; ++u1Byte nAntDet_PeakFreq[BT_8703B_1ANT_ANTDET_BUF_LEN]; ++u4Byte bAntDet_TryCount; ++u4Byte bAntDet_FailCount; ++u4Byte nAntDet_IntevalCount; ++u4Byte nAntDet_ThresOffset; ++ ++u4Byte nRealCentFreq; ++s4Byte nRealOffset; ++u4Byte nRealSpan; ++ ++u4Byte nPSDBandWidth; //unit: Hz ++u4Byte nPSDPoint; //128/256/512/1024 ++u4Byte nPSDReport[1024]; //unit:dB (20logx), 0~255 ++u4Byte nPSDReport_MaxHold[1024]; //unit:dB (20logx), 0~255 ++u4Byte nPSDStartPoint; ++u4Byte nPSDStopPoint; ++u4Byte nPSDMaxValuePoint; ++u4Byte nPSDMaxValue; ++u4Byte nPSDStartBase; ++u4Byte nPSDAvgNum; // 1/8/16/32 ++u4Byte nPSDGenCount; ++BOOLEAN bIsPSDRunning; ++BOOLEAN bIsPSDShowMaxOnly; ++} PSDSCAN_STA_8703B_1ANT, *PPSDSCAN_STA_8703B_1ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8703b1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8703b1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8703b1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8703b1ant_ScoreBoardStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8703b1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b1ant_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++VOID ++EXhalbtc8703b1ant_AntennaIsolation( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++ ++VOID ++EXhalbtc8703b1ant_PSDScan( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++VOID ++EXhalbtc8703b1ant_DisplayAntDetection( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b2Ant.c new file mode 100644 -index 000000000..81e6b9c60 +index 0000000..d5c5c47 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b2Ant.c @@ -0,0 +1,4864 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8703B Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8703b2Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8703B_2ANT GLCoexDm8703b2Ant; -+static PCOEX_DM_8703B_2ANT pCoexDm=&GLCoexDm8703b2Ant; -+static COEX_STA_8703B_2ANT GLCoexSta8703b2Ant; -+static PCOEX_STA_8703B_2ANT pCoexSta=&GLCoexSta8703b2Ant; -+ -+const char *const GLBtInfoSrc8703b2Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8703b2Ant=20140903; -+u4Byte GLCoexVer8703b2Ant=0x43; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8703b2ant_ -+//============================================================ -+u1Byte -+halbtc8703b2ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8703b2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8703b2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+} -+ -+VOID -+halbtc8703b2ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) ) -+ { -+ pBtLinkInfo->bSlaveRole = TRUE; -+ } -+ else -+ { -+ pBtLinkInfo->bSlaveRole = FALSE; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8703b2ant_MonitorWiFiCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u2Byte u2Tmp[3]; -+ s4Byte wifiRssi=0; -+ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; -+ static u1Byte nCCKLockCounter = 0; -+ -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->nCRCOK_CCK = 0; -+ pCoexSta->nCRCOK_11g = 0; -+ pCoexSta->nCRCOK_11n = 0; -+ pCoexSta->nCRCOK_11nAgg = 0; -+ -+ pCoexSta->nCRCErr_CCK = 0; -+ pCoexSta->nCRCErr_11g = 0; -+ pCoexSta->nCRCErr_11n = 0; -+ pCoexSta->nCRCErr_11nAgg = 0; -+ } -+ else -+ { -+ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); -+ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); -+ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); -+ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); -+ -+ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); -+ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); -+ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); -+ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); -+ } -+ -+ //reset counter -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); -+} -+ -+VOID -+halbtc8703b2ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+BOOLEAN -+halbtc8703b2ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ -+ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) -+ { -+ return TRUE; -+ } -+ -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8703b2ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1) // profile from bt patch -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+#else // profile from bt stack -+ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; -+ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; -+ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; -+ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; -+ -+ //for win-8 stack HID report error -+ if(!pStackInfo->bHidExist) -+ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack -+ // when stack HID report error, here we use the info from bt fw. -+ if(!pStackInfo->bBtLinkExist) -+ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+#endif -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8703b2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8703B_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+#if 0 -+ if(pStackInfo->numOfHid >= 2) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ else -+#endif -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8703b2ant_SetFwDacSwingLevel( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte dacSwingLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ // There are several type of dacswing -+ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 -+ H2C_Parameter[0] = dacSwingLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b2ant_SetFwDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = decBtPwrLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", -+ decBtPwrLvl, H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b2ant_DecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", -+ (bForceExec? "force to":""), decBtPwrLvl)); -+ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) -+ return; -+ } -+ halbtc8703b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); -+ -+ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; -+} -+ -+VOID -+halbtc8703b2ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b2ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8703b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8703b2ant_FwDacSwingLvl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte fwDacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", -+ (bForceExec? "force to":""), fwDacSwingLvl)); -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) -+ return; -+ } -+ -+ halbtc8703b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); -+ -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+} -+ -+VOID -+halbtc8703b2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8703b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8703b2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!")) ); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ //return; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8703b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8703b2ant_SetDacSwingReg( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte level -+ ) -+{ -+ u1Byte val=(u1Byte)level; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val); -+} -+ -+VOID -+halbtc8703b2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ if(bSwDacSwingOn) -+ { -+ halbtc8703b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); -+ } -+ else -+ { -+ halbtc8703b2ant_SetDacSwingReg(pBtCoexist, 0x18); -+ } -+} -+ -+ -+VOID -+halbtc8703b2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8703b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8703b2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1); -+ } -+} -+ -+VOID -+halbtc8703b2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8703b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8703b2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ //=================BB AGC Gain Table -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001); -+ } -+ -+ -+ //=================RF Gain -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); -+ -+ // set rssiAdjustVal for wifi module. -+ if(bAgcTableEn) -+ { -+ rssiAdjustVal = 8; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+VOID -+halbtc8703b2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8703b2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8703b2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8703b2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8703b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8703b2ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexSta->nCoexTableType = type; -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 7: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 8: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 9: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 10: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 11: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 12: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 13: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 14: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 15: -+ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8703b2ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b2ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8703b2ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8703b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8703b2ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8703b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8703b2ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ -+ -+ if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) ) -+ { -+ byte5 = byte5 | 0x1; -+ } -+ -+ H2C_Parameter[0] = byte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = byte5; -+ -+ pCoexDm->psTdmaPara[0] = byte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = byte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+VOID -+halbtc8703b2ant_SwMechanism1( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bShrinkRxLPF, -+ IN BOOLEAN bLowPenaltyRA, -+ IN BOOLEAN bLimitedDIG, -+ IN BOOLEAN bBTLNAConstrain -+ ) -+{ -+ /* -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 -+ { -+ if (bShrinkRxLPF) -+ bShrinkRxLPF = FALSE; -+ } -+ */ -+ -+ //halbtc8703b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); -+ halbtc8703b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8703b2ant_SwMechanism2( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAGCTableShift, -+ IN BOOLEAN bADCBackOff, -+ IN BOOLEAN bSWDACSwing, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ //halbtc8703b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); -+ //halbtc8703b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); -+ //halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); -+} -+ -+VOID -+halbtc8703b2ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte fwVer=0, u4Tmp=0; -+ BOOLEAN bPgExtSwitch=FALSE; -+ BOOLEAN bUseExtSwitch=FALSE; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver -+ -+ if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) -+ bUseExtSwitch = TRUE; -+ -+ if(bInitHwCfg) -+ { -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); -+ -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to High to avoid A2DP click */ -+ H2C_Parameter[0] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ } -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off -+ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. -+ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ //tell firmware "no antenna inverse" -+ H2C_Parameter[0] = 0; -+ } -+ else -+ { -+ //tell firmware "antenna inverse" -+ H2C_Parameter[0] = 1; -+ } -+ -+ if (bUseExtSwitch) -+ { -+ //ext switch type -+ H2C_Parameter[1] = 1; -+ } -+ else -+ { -+ //int switch type -+ H2C_Parameter[1] = 0; -+ } -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ else -+ { -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to "Control by PTA"*/ -+ H2C_Parameter[0] = 0; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); -+ } -+ } -+ -+ // ext switch setting -+ if(bUseExtSwitch) -+ { -+ if (bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &=~BIT23; -+ u4Tmp |= BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT -+ switch(antPosType) -+ { -+ case BTC_ANT_WIFI_AT_MAIN: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi -+ break; -+ case BTC_ANT_WIFI_AT_AUX: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi -+ break; -+ } -+ } -+ else // internal switch -+ { -+ if (bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp |= BIT23; -+ u4Tmp &=~BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux -+ switch(antPosType) -+ { -+ case BTC_ANT_WIFI_AT_MAIN: -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT -+ break; -+ case BTC_ANT_WIFI_AT_AUX: -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT -+ break; -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bTurnOnByCnt=FALSE; -+ u1Byte psTdmaTypeByCnt=0; -+ u1Byte wifiRssiState1, btRssiState; -+ -+ -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn) -+ { -+ type = type +100; //for WiFi RSSI low or BT RSSI low -+ pCoexDm->bIsSwitchTo1dot5Ant = TRUE; -+ } -+ else -+ { -+ pCoexDm->bIsSwitchTo1dot5Ant = FALSE; -+ } -+ -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ case 1: -+ default: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 2: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); -+ break; -+ case 3: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); -+ break; -+ case 4: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); -+ break; -+ case 5: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); -+ break; -+ case 6: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); -+ break; -+ case 7: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); -+ break; -+ case 8: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); -+ break; -+ case 9: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 10: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); -+ break; -+ case 11: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); -+ break; -+ case 12: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90); -+ break; -+ case 13: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); -+ break; -+ case 14: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); -+ break; -+ case 15: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); -+ break; -+ case 16: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90); -+ break; -+ case 17: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); -+ break; -+ case 18: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ break; -+ case 19: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); -+ break; -+ case 20: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); -+ break; -+ case 21: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); -+ break; -+ case 71: -+ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 101: -+ case 105: -+ case 171: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a, 0x03, 0x70, 0x50); -+ break; -+ case 102: -+ case 106: -+ case 110: -+ case 114: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d, 0x03, 0x70, 0x50); -+ break; -+ case 103: -+ case 107: -+ case 111: -+ case 115: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50); -+ break; -+ case 104: -+ case 108: -+ case 112: -+ case 116: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50); -+ break; -+ case 109: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 113: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90); -+ break; -+ case 121: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); -+ break; -+ case 22: -+ case 122: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11); -+ break; -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(type) -+ { -+ case 0: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ case 1: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); -+ break; -+ default: -+ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8703b2ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8703b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+ -+VOID -+halbtc8703b2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8703b2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); -+ -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8703b2ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bLowPwrDisable=TRUE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ if(bScan || bLink || bRoam) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n")); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ } -+ else if(bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n")); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n")); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+/* -+ pCoexDm->bNeedRecover0x948 = TRUE; -+ pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ -+ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE); -+*/ -+} -+ -+ -+VOID -+halbtc8703b2ant_ActionWiFiLinkProcess( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa, u1Tmpb; -+ -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+} -+ -+BOOLEAN -+halbtc8703b2ant_ActionWifiIdleProcess( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ //wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ -+ // define the office environment -+ if(BTC_RSSI_HIGH(wifiRssiState1) && -+ (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE)) -+ { -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n")); -+ -+ halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ return TRUE; -+ } -+ else -+ { -+ halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ return FALSE; -+ } -+ -+ -+} -+ -+ -+ -+BOOLEAN -+halbtc8703b2ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; -+ BOOLEAN bAsus8703b=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if(BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else if(BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bBtHsOn) -+ return FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+#if 0 -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8703B, &bAsus8703b); -+ if(!bAsus8703b) -+ bCommon = FALSE; -+ else -+ bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist); -+#else -+ bCommon = FALSE; -+#endif -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ //bCommon = FALSE; -+ bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist); -+ } -+ } -+ } -+ -+ return bCommon; -+} -+VOID -+halbtc8703b2ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bScoHid, -+ IN BOOLEAN bTxPause, -+ IN u1Byte maxInterval -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ { -+ if(bScoHid) -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ else -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ } -+ } -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); -+ if(maxInterval == 1) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 2) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 3) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+} -+ -+// SCO only or SCO+PAN(HS) -+VOID -+halbtc8703b2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else //for SCO quality & wifi performance balance at 11n mode -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); -+ } -+ } -+} -+ -+ -+VOID -+halbtc8703b2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9); -+ } -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ } -+ else -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8703b2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ -+ // define the office environment -+ if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ //DbgPrint(" AP#>10(%d)\n", apNum); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); -+ } -+ return; -+ -+ } -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ } -+ else -+ { -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState,wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ } -+ else -+ { -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ } -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+ -+//PAN(HS) only -+VOID -+halbtc8703b2ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8703b2ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ else -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); -+ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); -+ } -+ else -+ { -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ } -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); -+ } -+ else -+ { -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8703b2ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState,wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ else -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ //btRssiState = halbtc8703b2ant_BtRssiState(2, 29, 0); -+ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8703b2ant_BtRssiState(3, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); -+ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_LEGACY == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { // only 802.11N mode we have to dec bt power to 4 degree -+ if(BTC_RSSI_HIGH(btRssiState)) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ // need to check ap Number of Not -+ if(apNum < 10) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8703b2ant_ActionBtWhckTest( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8703b2ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+} -+ -+VOID -+halbtc8703b2ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; -+ u1Byte btInfoOriginal=0, btRetryCnt=0; -+ u1Byte algorithm=0; -+ u4Byte numOfWifiLink=0; -+ u4Byte wifiLinkStatus=0; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bMiracastPlusBt=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ if(pCoexSta->bBtWhckTest) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); -+ halbtc8703b2ant_ActionBtWhckTest(pBtCoexist); -+ return; -+ } -+ -+ algorithm = halbtc8703b2ant_ActionAlgorithm(pBtCoexist); -+ if(pCoexSta->bC2hBtInquiryPage && (BT_8703B_2ANT_COEX_ALGO_PANHS!=algorithm)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); -+ halbtc8703b2ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else -+ { -+ /* -+ if(pCoexDm->bNeedRecover0x948) -+ { -+ pCoexDm->bNeedRecover0x948 = FALSE; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948); -+ } -+ */ -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n")); -+ halbtc8703b2ant_ActionWiFiLinkProcess(pBtCoexist); -+ return; -+ } -+ -+ //for P2P -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); -+ -+ if(pBtLinkInfo->bBtLinkExist) -+ { -+ bMiracastPlusBt = TRUE; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ halbtc8703b2ant_ActionWifiMultiPort(pBtCoexist); -+ -+ return; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ } -+ -+ pCoexDm->curAlgorithm = algorithm; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); -+ -+ if(halbtc8703b2ant_IsCommonAction(pBtCoexist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", -+ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8703B_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); -+ halbtc8703b2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); -+ halbtc8703b2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); -+ halbtc8703b2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); -+ halbtc8703b2ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); -+ halbtc8703b2ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); -+ halbtc8703b2ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); -+ halbtc8703b2ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); -+ halbtc8703b2ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); -+ halbtc8703b2ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8703B_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); -+ halbtc8703b2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); -+ halbtc8703b2ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8703b2ant_WifiOffHwCfg( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bIsInMpMode = FALSE; -+ u1Byte H2C_Parameter[2] ={0}; -+ u4Byte fwVer=0; -+ -+ // set wlan_act to low -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to HIGH */ -+ H2C_Parameter[0] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); -+ if(!bIsInMpMode) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi -+} -+ -+VOID -+halbtc8703b2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0, fwVer; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ //Antenna config -+ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); -+ pCoexSta->disVerInfoCnt = 0; -+ -+ // PTA parameter -+ halbtc8703b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ // Enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8703b2ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8703b2ant_ -+//============================================================ -+VOID -+EXhalbtc8703b2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u2Byte u2Tmp=0x0; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); -+ -+ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. -+ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ else -+ { -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ // set to S1 -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ } -+} -+ -+VOID -+EXhalbtc8703b2ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ -+ -+ // -+ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) -+ // Local setting bit define -+ // BIT0: "0" for no antenna inverse; "1" for antenna inverse -+ // BIT1: "0" for internal switch; "1" for external switch -+ // BIT2: "0" for one antenna; "1" for two antenna -+ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ u1Tmp |= 0x1; // antenna inverse -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); -+ } -+ else -+ { -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ u1Tmp |= 0x1; // antenna inverse -+ } -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_PCI) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); -+ } -+ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8703b2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8703b2ant_InitHwConfig(pBtCoexist, TRUE); -+} -+ -+VOID -+EXhalbtc8703b2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8703b2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8703b2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ u4Byte faOfdm, faCck; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi-100, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ -+ if (pStackInfo->bProfileNotified) -+ { -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ -+ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8703b2Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ // Sw mechanism -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ } -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ -+ if (pCoexDm->bIsSwitchTo1dot5Ant) -+ psTdmaCase = psTdmaCase + 100; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, -+ (pCoexDm->bCurPsTdmaOn? "On":"Off"), -+ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ -+ pCoexSta->nCoexTableType); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ -+ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \ -+ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25); -+ CL_PRINTF(cliBuf); -+ -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \ -+ u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \ -+ u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3); -+ CL_PRINTF(cliBuf); -+ -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \ -+ ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ -+ u4Tmp[0]&0xff, u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); -+ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ -+ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ -+ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; -+ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ -+ u4Tmp[0]&0xffff, faOfdm, faCck); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1) -+ //halbtc8703b2ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8703b2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ halbtc8703b2ant_WifiOffHwCfg(pBtCoexist); -+ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ halbtc8703b2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8703b2ant_InitCoexDm(pBtCoexist); -+ halbtc8703b2ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8703b2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8703b2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa, u1Tmpb; -+ -+ -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+} -+ -+VOID -+EXhalbtc8703b2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8703b2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ u1Byte apNum=0; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ if(apNum < 10) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+} -+ -+VOID -+EXhalbtc8703b2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8703b2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ static BOOLEAN bPreScoExist=FALSE; -+ u4Byte raMask=0x0; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8703B_2ANT_MAX) -+ rspSource = BT_INFO_SRC_8703B_2ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); -+ return; -+ } -+ -+ // if 0xff, it means BT is under WHCK test -+ if (btInfo == 0xff) -+ pCoexSta->bBtWhckTest = TRUE; -+ else -+ pCoexSta->bBtWhckTest = FALSE; -+ -+ if(BT_INFO_SRC_8703B_2ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ if (pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n")); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); -+ } -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if( (pCoexSta->btInfoExt & BIT1) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if( (pCoexSta->btInfoExt & BIT3) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8703b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8703B_2ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8703B_2ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8703B_2ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8703B_2ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8703B_2ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ -+ if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE)) -+ { -+ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) -+ { -+ pCoexSta->bHidExist = TRUE; -+ btInfo = btInfo | 0x20; -+ } -+ } -+ } -+ -+ halbtc8703b2ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8703B_2ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8703B_2ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8703B_2ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8703B_2ANT_B_ACL_BUSY) -+ { -+ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8703B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8703B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bBtBusy = TRUE; -+ bLimitedDig = TRUE; -+ } -+ else -+ { -+ bBtBusy = FALSE; -+ bLimitedDig = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ pCoexDm->bLimitedDig = bLimitedDig; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); -+ -+ halbtc8703b2ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8703b2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8703b2ant_WifiOffHwCfg(pBtCoexist); -+ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. -+ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 -+ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8703b2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8703b2ant_InitCoexDm(pBtCoexist); -+ halbtc8703b2ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8703b2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ //static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(pCoexSta->disVerInfoCnt <= 5) -+ { -+ pCoexSta->disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ -+ if (pCoexSta->disVerInfoCnt == 3) -+ { -+ //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n")); -+ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); -+ } -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0) -+ halbtc8703b2ant_QueryBtInfo(pBtCoexist); -+ halbtc8703b2ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ halbtc8703b2ant_MonitorBtCtr(pBtCoexist); -+ halbtc8703b2ant_MonitorWiFiCtr(pBtCoexist); -+ -+ if( halbtc8703b2ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust) -+ { -+ halbtc8703b2ant_RunCoexistMechanism(pBtCoexist); -+ } -+#endif -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8703B Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8703b2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8703B_2ANT GLCoexDm8703b2Ant; ++static PCOEX_DM_8703B_2ANT pCoexDm=&GLCoexDm8703b2Ant; ++static COEX_STA_8703B_2ANT GLCoexSta8703b2Ant; ++static PCOEX_STA_8703B_2ANT pCoexSta=&GLCoexSta8703b2Ant; ++ ++const char *const GLBtInfoSrc8703b2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8703b2Ant=20140903; ++u4Byte GLCoexVer8703b2Ant=0x43; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8703b2ant_ ++//============================================================ ++u1Byte ++halbtc8703b2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8703b2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8703b2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++VOID ++halbtc8703b2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) ) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8703b2ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); ++ } ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); ++} ++ ++VOID ++halbtc8703b2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++BOOLEAN ++halbtc8703b2ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ ++ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) ++ { ++ return TRUE; ++ } ++ ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8703b2ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1) // profile from bt patch ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++#else // profile from bt stack ++ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; ++ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; ++ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; ++ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; ++ ++ //for win-8 stack HID report error ++ if(!pStackInfo->bHidExist) ++ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack ++ // when stack HID report error, here we use the info from bt fw. ++ if(!pStackInfo->bBtLinkExist) ++ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++#endif ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8703b2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8703B_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++#if 0 ++ if(pStackInfo->numOfHid >= 2) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ else ++#endif ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8703b2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = decBtPwrLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", ++ decBtPwrLvl, H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", ++ (bForceExec? "force to":""), decBtPwrLvl)); ++ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) ++ return; ++ } ++ halbtc8703b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); ++ ++ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; ++} ++ ++VOID ++halbtc8703b2ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8703b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8703b2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8703b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8703b2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8703b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8703b2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!")) ); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ //return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8703b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8703b2ant_SetDacSwingReg( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte level ++ ) ++{ ++ u1Byte val=(u1Byte)level; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val); ++} ++ ++VOID ++halbtc8703b2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ halbtc8703b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); ++ } ++ else ++ { ++ halbtc8703b2ant_SetDacSwingReg(pBtCoexist, 0x18); ++ } ++} ++ ++ ++VOID ++halbtc8703b2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8703b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8703b2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1); ++ } ++} ++ ++VOID ++halbtc8703b2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8703b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8703b2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ //=================BB AGC Gain Table ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001); ++ } ++ ++ ++ //=================RF Gain ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); ++ ++ // set rssiAdjustVal for wifi module. ++ if(bAgcTableEn) ++ { ++ rssiAdjustVal = 8; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++VOID ++halbtc8703b2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8703b2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8703b2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8703b2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8703b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8703b2ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8703b2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8703b2ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8703b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8703b2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8703b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8703b2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ ++ ++ if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) ) ++ { ++ byte5 = byte5 | 0x1; ++ } ++ ++ H2C_Parameter[0] = byte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = byte5; ++ ++ pCoexDm->psTdmaPara[0] = byte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = byte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_SwMechanism1( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bShrinkRxLPF, ++ IN BOOLEAN bLowPenaltyRA, ++ IN BOOLEAN bLimitedDIG, ++ IN BOOLEAN bBTLNAConstrain ++ ) ++{ ++ /* ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 ++ { ++ if (bShrinkRxLPF) ++ bShrinkRxLPF = FALSE; ++ } ++ */ ++ ++ //halbtc8703b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); ++ halbtc8703b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8703b2ant_SwMechanism2( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAGCTableShift, ++ IN BOOLEAN bADCBackOff, ++ IN BOOLEAN bSWDACSwing, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ //halbtc8703b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); ++ //halbtc8703b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); ++ //halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); ++} ++ ++VOID ++halbtc8703b2ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte fwVer=0, u4Tmp=0; ++ BOOLEAN bPgExtSwitch=FALSE; ++ BOOLEAN bUseExtSwitch=FALSE; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver ++ ++ if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) ++ bUseExtSwitch = TRUE; ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); ++ ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to High to avoid A2DP click */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ //tell firmware "no antenna inverse" ++ H2C_Parameter[0] = 0; ++ } ++ else ++ { ++ //tell firmware "antenna inverse" ++ H2C_Parameter[0] = 1; ++ } ++ ++ if (bUseExtSwitch) ++ { ++ //ext switch type ++ H2C_Parameter[1] = 1; ++ } ++ else ++ { ++ //int switch type ++ H2C_Parameter[1] = 0; ++ } ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ else ++ { ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to "Control by PTA"*/ ++ H2C_Parameter[0] = 0; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); ++ } ++ } ++ ++ // ext switch setting ++ if(bUseExtSwitch) ++ { ++ if (bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &=~BIT23; ++ u4Tmp |= BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi ++ break; ++ } ++ } ++ else // internal switch ++ { ++ if (bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp |= BIT23; ++ u4Tmp &=~BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT ++ break; ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0; ++ u1Byte wifiRssiState1, btRssiState; ++ ++ ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn) ++ { ++ type = type +100; //for WiFi RSSI low or BT RSSI low ++ pCoexDm->bIsSwitchTo1dot5Ant = TRUE; ++ } ++ else ++ { ++ pCoexDm->bIsSwitchTo1dot5Ant = FALSE; ++ } ++ ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ case 1: ++ default: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 2: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 3: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 4: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); ++ break; ++ case 5: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 6: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 7: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 8: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 9: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 10: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 11: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 12: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90); ++ break; ++ case 13: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 14: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 15: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 16: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 17: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 71: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 101: ++ case 105: ++ case 171: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a, 0x03, 0x70, 0x50); ++ break; ++ case 102: ++ case 106: ++ case 110: ++ case 114: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d, 0x03, 0x70, 0x50); ++ break; ++ case 103: ++ case 107: ++ case 111: ++ case 115: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50); ++ break; ++ case 104: ++ case 108: ++ case 112: ++ case 116: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50); ++ break; ++ case 109: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 113: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90); ++ break; ++ case 121: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 22: ++ case 122: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ case 0: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8703b2ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8703b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++VOID ++halbtc8703b2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8703b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8703b2ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bLowPwrDisable=TRUE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n")); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n")); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n")); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++/* ++ pCoexDm->bNeedRecover0x948 = TRUE; ++ pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ ++ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE); ++*/ ++} ++ ++ ++VOID ++halbtc8703b2ant_ActionWiFiLinkProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++} ++ ++BOOLEAN ++halbtc8703b2ant_ActionWifiIdleProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if(BTC_RSSI_HIGH(wifiRssiState1) && ++ (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE)) ++ { ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n")); ++ ++ halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ return TRUE; ++ } ++ else ++ { ++ halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ return FALSE; ++ } ++ ++ ++} ++ ++ ++ ++BOOLEAN ++halbtc8703b2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; ++ BOOLEAN bAsus8703b=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if(BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else if(BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bBtHsOn) ++ return FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++#if 0 ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8703B, &bAsus8703b); ++ if(!bAsus8703b) ++ bCommon = FALSE; ++ else ++ bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist); ++#else ++ bCommon = FALSE; ++#endif ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ //bCommon = FALSE; ++ bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist); ++ } ++ } ++ } ++ ++ return bCommon; ++} ++VOID ++halbtc8703b2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8703b2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else //for SCO quality & wifi performance balance at 11n mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8703b2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9); ++ } ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8703b2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ //DbgPrint(" AP#>10(%d)\n", apNum); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ return; ++ ++ } ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ else ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++ ++//PAN(HS) only ++VOID ++halbtc8703b2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8703b2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ else ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); ++ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); ++ } ++ else ++ { ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ } ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); ++ } ++ else ++ { ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8703b2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ else ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //btRssiState = halbtc8703b2ant_BtRssiState(2, 29, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(3, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { // only 802.11N mode we have to dec bt power to 4 degree ++ if(BTC_RSSI_HIGH(btRssiState)) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ // need to check ap Number of Not ++ if(apNum < 10) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionBtWhckTest( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8703b2ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++} ++ ++VOID ++halbtc8703b2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ u4Byte numOfWifiLink=0; ++ u4Byte wifiLinkStatus=0; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if(pCoexSta->bBtWhckTest) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); ++ halbtc8703b2ant_ActionBtWhckTest(pBtCoexist); ++ return; ++ } ++ ++ algorithm = halbtc8703b2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bC2hBtInquiryPage && (BT_8703B_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8703b2ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else ++ { ++ /* ++ if(pCoexDm->bNeedRecover0x948) ++ { ++ pCoexDm->bNeedRecover0x948 = FALSE; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948); ++ } ++ */ ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n")); ++ halbtc8703b2ant_ActionWiFiLinkProcess(pBtCoexist); ++ return; ++ } ++ ++ //for P2P ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8703b2ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ ++ if(halbtc8703b2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8703B_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8703b2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8703b2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8703b2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); ++ halbtc8703b2ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8703b2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8703b2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8703b2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8703b2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8703b2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8703b2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8703b2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8703b2ant_WifiOffHwCfg( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bIsInMpMode = FALSE; ++ u1Byte H2C_Parameter[2] ={0}; ++ u4Byte fwVer=0; ++ ++ // set wlan_act to low ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to HIGH */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); ++ if(!bIsInMpMode) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi ++} ++ ++VOID ++halbtc8703b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0, fwVer; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ //Antenna config ++ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); ++ pCoexSta->disVerInfoCnt = 0; ++ ++ // PTA parameter ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8703b2ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8703b2ant_ ++//============================================================ ++VOID ++EXhalbtc8703b2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u2Byte u2Tmp=0x0; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); ++ ++ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ // set to S1 ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ ++ ++ // ++ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) ++ // Local setting bit define ++ // BIT0: "0" for no antenna inverse; "1" for antenna inverse ++ // BIT1: "0" for internal switch; "1" for external switch ++ // BIT2: "0" for one antenna; "1" for two antenna ++ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ u1Tmp |= 0x1; // antenna inverse ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ u1Tmp |= 0x1; // antenna inverse ++ } ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_PCI) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8703b2ant_InitHwConfig(pBtCoexist, TRUE); ++} ++ ++VOID ++EXhalbtc8703b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8703b2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8703b2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi-100, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ if (pStackInfo->bProfileNotified) ++ { ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ ++ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8703b2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ // Sw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ } ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ ++ if (pCoexDm->bIsSwitchTo1dot5Ant) ++ psTdmaCase = psTdmaCase + 100; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, ++ (pCoexDm->bCurPsTdmaOn? "On":"Off"), ++ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ ++ pCoexSta->nCoexTableType); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \ ++ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25); ++ CL_PRINTF(cliBuf); ++ ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \ ++ u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \ ++ u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3); ++ CL_PRINTF(cliBuf); ++ ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \ ++ ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ ++ u4Tmp[0]&0xff, u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ ++ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ ++ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; ++ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ ++ u4Tmp[0]&0xffff, faOfdm, faCck); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1) ++ //halbtc8703b2ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8703b2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ halbtc8703b2ant_WifiOffHwCfg(pBtCoexist); ++ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ halbtc8703b2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8703b2ant_InitCoexDm(pBtCoexist); ++ halbtc8703b2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++} ++ ++VOID ++EXhalbtc8703b2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ u1Byte apNum=0; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ if(apNum < 10) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8703b2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ static BOOLEAN bPreScoExist=FALSE; ++ u4Byte raMask=0x0; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8703B_2ANT_MAX) ++ rspSource = BT_INFO_SRC_8703B_2ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); ++ return; ++ } ++ ++ // if 0xff, it means BT is under WHCK test ++ if (btInfo == 0xff) ++ pCoexSta->bBtWhckTest = TRUE; ++ else ++ pCoexSta->bBtWhckTest = FALSE; ++ ++ if(BT_INFO_SRC_8703B_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ if (pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if( (pCoexSta->btInfoExt & BIT1) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if( (pCoexSta->btInfoExt & BIT3) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8703b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8703B_2ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ ++ if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE)) ++ { ++ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ { ++ pCoexSta->bHidExist = TRUE; ++ btInfo = btInfo | 0x20; ++ } ++ } ++ } ++ ++ halbtc8703b2ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8703B_2ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8703B_2ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8703B_2ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8703B_2ANT_B_ACL_BUSY) ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8703B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bBtBusy = TRUE; ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ pCoexDm->bLimitedDig = bLimitedDig; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ ++ halbtc8703b2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8703b2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8703b2ant_WifiOffHwCfg(pBtCoexist); ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 ++ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8703b2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8703b2ant_InitCoexDm(pBtCoexist); ++ halbtc8703b2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ //static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(pCoexSta->disVerInfoCnt <= 5) ++ { ++ pCoexSta->disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ ++ if (pCoexSta->disVerInfoCnt == 3) ++ { ++ //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n")); ++ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); ++ } ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0) ++ halbtc8703b2ant_QueryBtInfo(pBtCoexist); ++ halbtc8703b2ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8703b2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8703b2ant_MonitorWiFiCtr(pBtCoexist); ++ ++ if( halbtc8703b2ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust) ++ { ++ halbtc8703b2ant_RunCoexistMechanism(pBtCoexist); ++ } ++#endif ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b2Ant.h new file mode 100644 -index 000000000..ab9449758 +index 0000000..361c443 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8703b2Ant.h @@ -0,0 +1,228 @@ -+//=========================================== -+// The following is for 8703B 2Ant BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8703B_2ANT 1 -+ -+ -+#define BT_INFO_8703B_2ANT_B_FTP BIT7 -+#define BT_INFO_8703B_2ANT_B_A2DP BIT6 -+#define BT_INFO_8703B_2ANT_B_HID BIT5 -+#define BT_INFO_8703B_2ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8703B_2ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8703B_2ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8703B_2ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8703B_2ANT_B_CONNECTION BIT0 -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT 2 -+ -+ -+#define BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation -+#define BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation -+ -+typedef enum _BT_INFO_SRC_8703B_2ANT{ -+ BT_INFO_SRC_8703B_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8703B_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8703B_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8703B_2ANT_MAX -+}BT_INFO_SRC_8703B_2ANT,*PBT_INFO_SRC_8703B_2ANT; -+ -+typedef enum _BT_8703B_2ANT_BT_STATUS{ -+ BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8703B_2ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8703B_2ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8703B_2ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8703B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8703B_2ANT_BT_STATUS_MAX -+}BT_8703B_2ANT_BT_STATUS,*PBT_8703B_2ANT_BT_STATUS; -+ -+typedef enum _BT_8703B_2ANT_COEX_ALGO{ -+ BT_8703B_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8703B_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8703B_2ANT_COEX_ALGO_HID = 0x2, -+ BT_8703B_2ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8703B_2ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8703B_2ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8703B_2ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8703B_2ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8703B_2ANT_COEX_ALGO_MAX = 0xb, -+}BT_8703B_2ANT_COEX_ALGO,*PBT_8703B_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8703B_2ANT{ -+ // fw mechanism -+ u1Byte preBtDecPwrLvl; -+ u1Byte curBtDecPwrLvl; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bResetTdmaAdjust; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ BOOLEAN bNeedRecover0x948; -+ u4Byte backup0x948; -+ -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ BOOLEAN bIsSwitchTo1dot5Ant; -+} COEX_DM_8703B_2ANT, *PCOEX_DM_8703B_2ANT; -+ -+typedef struct _COEX_STA_8703B_2ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8703B_2ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8703B_2ANT_MAX]; -+ BOOLEAN bBtWhckTest; -+ BOOLEAN bC2hBtInquiryPage; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ u1Byte nCoexTableType; -+ BOOLEAN bForceLpsOn; -+ -+ u1Byte disVerInfoCnt; -+}COEX_STA_8703B_2ANT, *PCOEX_STA_8703B_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8703b2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b2ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8703b2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8703b2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8703b2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8703b2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8703b2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8703B 2Ant BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8703B_2ANT 1 ++ ++ ++#define BT_INFO_8703B_2ANT_B_FTP BIT7 ++#define BT_INFO_8703B_2ANT_B_A2DP BIT6 ++#define BT_INFO_8703B_2ANT_B_HID BIT5 ++#define BT_INFO_8703B_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8703B_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8703B_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8703B_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8703B_2ANT_B_CONNECTION BIT0 ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT 2 ++ ++ ++#define BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++#define BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++ ++typedef enum _BT_INFO_SRC_8703B_2ANT{ ++ BT_INFO_SRC_8703B_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8703B_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8703B_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8703B_2ANT_MAX ++}BT_INFO_SRC_8703B_2ANT,*PBT_INFO_SRC_8703B_2ANT; ++ ++typedef enum _BT_8703B_2ANT_BT_STATUS{ ++ BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8703B_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8703B_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8703B_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8703B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8703B_2ANT_BT_STATUS_MAX ++}BT_8703B_2ANT_BT_STATUS,*PBT_8703B_2ANT_BT_STATUS; ++ ++typedef enum _BT_8703B_2ANT_COEX_ALGO{ ++ BT_8703B_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8703B_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8703B_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8703B_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8703B_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8703B_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8703B_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8703B_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8703B_2ANT_COEX_ALGO_MAX = 0xb, ++}BT_8703B_2ANT_COEX_ALGO,*PBT_8703B_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8703B_2ANT{ ++ // fw mechanism ++ u1Byte preBtDecPwrLvl; ++ u1Byte curBtDecPwrLvl; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ BOOLEAN bNeedRecover0x948; ++ u4Byte backup0x948; ++ ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ BOOLEAN bIsSwitchTo1dot5Ant; ++} COEX_DM_8703B_2ANT, *PCOEX_DM_8703B_2ANT; ++ ++typedef struct _COEX_STA_8703B_2ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8703B_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8703B_2ANT_MAX]; ++ BOOLEAN bBtWhckTest; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ u1Byte nCoexTableType; ++ BOOLEAN bForceLpsOn; ++ ++ u1Byte disVerInfoCnt; ++}COEX_STA_8703B_2ANT, *PCOEX_STA_8703B_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8703b2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8703b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8703b2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8703b2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a1Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a1Ant.c new file mode 100644 -index 000000000..5883a3743 +index 0000000..db5b42e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a1Ant.c @@ -0,0 +1,1544 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8723A Co-exist mechanism -+// -+// History -+// 2012/08/22 Cosa first check in. -+// 2012/11/14 Cosa Revise for 8723A 1Ant out sourcing. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8723a1Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8723A_1ANT GLCoexDm8723a1Ant; -+static PCOEX_DM_8723A_1ANT pCoexDm=&GLCoexDm8723a1Ant; -+static COEX_STA_8723A_1ANT GLCoexSta8723a1Ant; -+static PCOEX_STA_8723A_1ANT pCoexSta=&GLCoexSta8723a1Ant; -+ -+const char *const GLBtInfoSrc8723a1Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8723a1ant_ -+//============================================================ -+VOID -+halbtc8723a1ant_Reg0x550Bit3( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSet -+ ) -+{ -+ u1Byte u1tmp=0; -+ -+ u1tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x550); -+ if(bSet) -+ { -+ u1tmp |= BIT3; -+ } -+ else -+ { -+ u1tmp &= ~BIT3; -+ } -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x550, u1tmp); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set 0x550[3]=%d\n", (bSet? 1:0))); -+} -+ -+VOID -+halbtc8723a1ant_NotifyFwScan( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte scanType -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(BTC_SCAN_START == scanType) -+ H2C_Parameter[0] = 0x1; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Notify FW for wifi scan, write 0x3b=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3b, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a1ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x38=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x38, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a1ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8723a1ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8723a1ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8723a1ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte tmpU1; -+ -+ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); -+ tmpU1 |= BIT0; -+ if(bLowPenaltyRa) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); -+ tmpU1 &= ~BIT2; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); -+ tmpU1 |= BIT2; -+ } -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); -+} -+ -+VOID -+halbtc8723a1ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ return; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8723a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8723a1ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8723a1ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8723a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8723a1ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x25=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x25, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a1ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8723a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8723a1ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ // byte1[1:0] != 0 means enable pstdma -+ // for 2Ant bt coexist, if byte1 != 0 means enable pstdma -+ if(byte1) -+ { -+ if(bApEnable) -+ { -+ if(type != 5 && type != 12) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ } -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3a, 5, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a1ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ if(pCoexDm->bCurPsTdmaOn) -+ { -+ switch(pCoexDm->curPsTdma) -+ { -+ case 1: -+ default: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x0, 0x40); -+ break; -+ case 2: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x0, 0x40); -+ break; -+ case 3: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x3f, 0x3, 0x10, 0x40); -+ break; -+ case 4: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x15, 0x3, 0x10, 0x0); -+ break; -+ case 5: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0x15, 0x3, 0x35, 0xc0); -+ break; -+ -+ case 8: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 9: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40); -+ break; -+ case 10: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40); -+ break; -+ case 11: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x0, 0x40); -+ break; -+ case 12: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0xa, 0x3, 0x15, 0xc0); -+ break; -+ -+ case 18: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ -+ case 20: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x2a, 0x2a, 0x0, 0x0); -+ break; -+ case 21: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x20, 0x3, 0x10, 0x40); -+ break; -+ case 22: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x2, 0x40); -+ break; -+ case 23: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x2, 0x40); -+ break; -+ case 24: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x2, 0x40); -+ break; -+ case 25: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40); -+ break; -+ case 26: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 27: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40); -+ break; -+ case 28: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x3, 0x2f, 0x2f, 0x0, 0x0); -+ break; -+ -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(pCoexDm->curPsTdma) -+ { -+ case 8: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x8, 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 0: -+ default: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0); -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x210); -+ break; -+ case 9: -+ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0); -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x110); -+ break; -+ -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+ -+VOID -+halbtc8723a1ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ // sw all off -+ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ // hw all off -+ halbtc8723a1ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+} -+ -+VOID -+halbtc8723a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+} -+ -+VOID -+halbtc8723a1ant_BtEnableAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+} -+ -+VOID -+halbtc8723a1ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8723a1ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ halbtc8723a1ant_BtEnableAction(pBtCoexist); -+ } -+ else -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ } -+ } -+} -+ -+VOID -+halbtc8723a1ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ u1Byte btState; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ btState = pCoexDm->btStatus; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], TdmaDurationAdjust()\n")); -+ if(pCoexDm->psTdmaGlobalCnt != pCoexDm->psTdmaMonitorCnt) -+ { -+ pCoexDm->psTdmaMonitorCnt = 0; -+ pCoexDm->psTdmaGlobalCnt = 0; -+ } -+ if(pCoexDm->psTdmaMonitorCnt == 0) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], first run BT A2DP + WiFi busy state!!\n")); -+ if(btState == BT_STATE_8723A_1ANT_ACL_ONLY_BUSY) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ pCoexDm->psTdmaDuAdjType = 22; -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], retryCount = %d\n", retryCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT TxRx counter H+L <= 1200\n")); -+ if(btState != BT_STATE_8723A_1ANT_ACL_ONLY_BUSY) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], NOT ACL only busy!\n")); -+ if(BTC_WIFI_BW_HT40 != wifiBw) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 20MHz\n")); -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 22) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ pCoexDm->psTdmaDuAdjType = 23; -+ } -+ else if(pCoexDm->curPsTdma == 23) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); -+ pCoexDm->psTdmaDuAdjType = 24; -+ } -+ else if(pCoexDm->curPsTdma == 24) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); -+ pCoexDm->psTdmaDuAdjType = 25; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 25) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); -+ pCoexDm->psTdmaDuAdjType = 24; -+ } -+ else if(pCoexDm->curPsTdma == 24) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ pCoexDm->psTdmaDuAdjType = 23; -+ } -+ else if(pCoexDm->curPsTdma == 23) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ pCoexDm->psTdmaDuAdjType = 22; -+ } -+ } -+ // error handle, if not in the following state, -+ // set psTdma again. -+ if( (pCoexDm->psTdmaDuAdjType != 22) && -+ (pCoexDm->psTdmaDuAdjType != 23) && -+ (pCoexDm->psTdmaDuAdjType != 24) && -+ (pCoexDm->psTdmaDuAdjType != 25) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ pCoexDm->psTdmaDuAdjType = 23; -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 40MHz\n")); -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 23) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); -+ pCoexDm->psTdmaDuAdjType = 24; -+ } -+ else if(pCoexDm->curPsTdma == 24) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); -+ pCoexDm->psTdmaDuAdjType = 25; -+ } -+ else if(pCoexDm->curPsTdma == 25) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 27); -+ pCoexDm->psTdmaDuAdjType = 27; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 27) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); -+ pCoexDm->psTdmaDuAdjType = 25; -+ } -+ else if(pCoexDm->curPsTdma == 25) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); -+ pCoexDm->psTdmaDuAdjType = 24; -+ } -+ else if(pCoexDm->curPsTdma == 24) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ pCoexDm->psTdmaDuAdjType = 23; -+ } -+ } -+ // error handle, if not in the following state, -+ // set psTdma again. -+ if( (pCoexDm->psTdmaDuAdjType != 23) && -+ (pCoexDm->psTdmaDuAdjType != 24) && -+ (pCoexDm->psTdmaDuAdjType != 25) && -+ (pCoexDm->psTdmaDuAdjType != 27) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); -+ pCoexDm->psTdmaDuAdjType = 24; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ACL only busy\n")); -+ if (result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ } -+ -+ // error handle, if not in the following state, -+ // set psTdma again. -+ if( (pCoexDm->psTdmaDuAdjType != 1) && -+ (pCoexDm->psTdmaDuAdjType != 2) && -+ (pCoexDm->psTdmaDuAdjType != 9) && -+ (pCoexDm->psTdmaDuAdjType != 11) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+ pCoexDm->psTdmaMonitorCnt++; -+} -+ -+ -+VOID -+halbtc8723a1ant_CoexForWifiConnect( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bWifiBusy=FALSE; -+ u1Byte btState, btInfoOriginal=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ btState = pCoexDm->btStatus; -+ btInfoOriginal = pCoexSta->btInfoC2h[BT_INFO_SRC_8723A_1ANT_BT_RSP][0]; -+ -+ if(bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi connected!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if( !bWifiBusy && -+ ((BT_STATE_8723A_1ANT_NO_CONNECTION == btState) || -+ (BT_STATE_8723A_1ANT_CONNECT_IDLE == btState)) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], [Wifi is idle] or [Bt is non connected idle or Bt is connected idle]!!\n")); -+ -+ if(BT_STATE_8723A_1ANT_NO_CONNECTION == btState) -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+ else if(BT_STATE_8723A_1ANT_CONNECT_IDLE == btState) -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); -+ } -+ else -+ { -+ if( (BT_STATE_8723A_1ANT_SCO_ONLY_BUSY == btState) || -+ (BT_STATE_8723A_1ANT_ACL_SCO_BUSY == btState) || -+ (BT_STATE_8723A_1ANT_HID_BUSY == btState) || -+ (BT_STATE_8723A_1ANT_HID_SCO_BUSY == btState) ) -+ { -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0x60); -+ } -+ else -+ { -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); -+ } -+ switch(btState) -+ { -+ case BT_STATE_8723A_1ANT_NO_CONNECTION: -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ break; -+ case BT_STATE_8723A_1ANT_CONNECT_IDLE: -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ break; -+ case BT_STATE_8723A_1ANT_INQ_OR_PAG: -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ break; -+ case BT_STATE_8723A_1ANT_SCO_ONLY_BUSY: -+ case BT_STATE_8723A_1ANT_ACL_SCO_BUSY: -+ case BT_STATE_8723A_1ANT_HID_BUSY: -+ case BT_STATE_8723A_1ANT_HID_SCO_BUSY: -+ halbtc8723a1ant_TdmaDurationAdjust(pBtCoexist); -+ break; -+ case BT_STATE_8723A_1ANT_ACL_ONLY_BUSY: -+ if (btInfoOriginal&BT_INFO_8723A_1ANT_B_A2DP) -+ { -+ halbtc8723a1ant_TdmaDurationAdjust(pBtCoexist); -+ } -+ else if(btInfoOriginal&BT_INFO_8723A_1ANT_B_FTP) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ } -+ else if( (btInfoOriginal&BT_INFO_8723A_1ANT_B_A2DP) && -+ (btInfoOriginal&BT_INFO_8723A_1ANT_B_FTP) ) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ } -+ else -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ } -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], error!!!, undefined case in halbtc8723a1ant_CoexForWifiConnect()!!\n")); -+ break; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is disconnected!!\n")); -+ } -+ -+ pCoexDm->psTdmaGlobalCnt++; -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8723a1ant_ -+//============================================================ -+VOID -+wa_halbtc8723a1ant_MonitorC2h( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte tmp1b=0x0; -+ u4Byte curC2hTotalCnt=0x0; -+ static u4Byte preC2hTotalCnt=0x0, sameCntPollingTime=0x0; -+ -+ curC2hTotalCnt+=pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_BT_RSP]; -+ -+ if(curC2hTotalCnt == preC2hTotalCnt) -+ { -+ sameCntPollingTime++; -+ } -+ else -+ { -+ preC2hTotalCnt = curC2hTotalCnt; -+ sameCntPollingTime = 0; -+ } -+ -+ if(sameCntPollingTime >= 2) -+ { -+ tmp1b = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x1af); -+ if(tmp1b != 0x0) -+ { -+ pCoexSta->c2hHangDetectCnt++; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x1af, 0x0); -+ } -+ } -+} -+ -+//============================================================ -+// extern function start with EXhalbtc8723a1ant_ -+//============================================================ -+VOID -+EXhalbtc8723a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); -+ -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); -+ -+ // enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // coex table -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); // 1-Ant coex -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffff); // wifi break table -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); //coex table -+ -+ // antenna switch control parameter -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0xaaaaaaaa); -+ -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x210); //set antenna at wifi side if ANTSW is software control -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x870, 0x300); //SPDT(connected with TRSW) control by hardware PTA -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x874, 0x22804000); //ANTSW keep by GNT_BT -+ -+ // coexistence parameters -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); // enable RTK mode PTA -+} -+ -+VOID -+EXhalbtc8723a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8723a1ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8723a1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723A_1ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ if(pStackInfo->bProfileNotified) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723a1Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "write 0x1af=0x0 num", \ -+ pCoexSta->c2hHangDetectCnt); -+ CL_PRINTF(cliBuf); -+ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(!pBtCoexist->bManualControl) -+ { -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ -+ pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ } -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x783); -+ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x796); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ -+ u1Tmp[0], u1Tmp[1], u1Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x484); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); -+ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xdac); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hp rx[31:16]/tx[15:0])", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8723a1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ halbtc8723a1ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ //halbtc8723a1ant_InitCoexDm(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8723a1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ } -+} -+ -+VOID -+EXhalbtc8723a1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE; -+ -+ halbtc8723a1ant_NotifyFwScan(pBtCoexist, type); -+ -+ if(pBtCoexist->btInfo.bBtDisabled) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+ } -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ //set 0x550[3]=1 before PsTdma -+ halbtc8723a1ant_Reg0x550Bit3(pBtCoexist, TRUE); -+ } -+ -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); -+ } -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723a1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE; -+ -+ if(pBtCoexist->btInfo.bBtDisabled) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+ } -+ else -+ { -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ //set 0x550[3]=1 before PsTdma -+ halbtc8723a1ant_Reg0x550Bit3(pBtCoexist, TRUE); -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); // extend wifi slot -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); -+ } -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723a1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8723a1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ if(pBtCoexist->btInfo.bBtDisabled) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+ } -+ else -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 18); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723a1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtHsOn=FALSE, bBtBusy=FALSE, bForceLps=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = BT_INFO_SRC_8723A_1ANT_BT_RSP; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 0) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(BT_INFO_SRC_8723A_1ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = -+ pCoexSta->btInfoC2h[rspSource][1]; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][2]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][3]; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8723A_1ANT_B_INQ_PAGE) -+ { -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ } -+ else -+ { -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ } -+ btInfo &= ~BIT2; -+ if(!(btInfo & BIT0)) -+ { -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_NO_CONNECTION; -+ bForceLps = FALSE; -+ } -+ else -+ { -+ bForceLps = TRUE; -+ if(btInfo == 0x1) -+ { -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_CONNECT_IDLE; -+ } -+ else if(btInfo == 0x9) -+ { -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_ACL_ONLY_BUSY; -+ bBtBusy = TRUE; -+ } -+ else if(btInfo == 0x13) -+ { -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_SCO_ONLY_BUSY; -+ bBtBusy = TRUE; -+ } -+ else if(btInfo == 0x1b) -+ { -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_ACL_SCO_BUSY; -+ bBtBusy = TRUE; -+ } -+ else if(btInfo == 0x29) -+ { -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_HID_BUSY; -+ bBtBusy = TRUE; -+ } -+ else if(btInfo == 0x3b) -+ { -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_HID_SCO_BUSY; -+ bBtBusy = TRUE; -+ } -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bBtBusy); -+ if(bForceLps) -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ else -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ -+ if( (BT_STATE_8723A_1ANT_NO_CONNECTION == pCoexDm->btStatus) || -+ (BT_STATE_8723A_1ANT_CONNECT_IDLE == pCoexDm->btStatus) ) -+ { -+ if(pCoexSta->bC2hBtInquiryPage) -+ pCoexDm->btStatus = BT_STATE_8723A_1ANT_INQ_OR_PAG; -+ } -+} -+ -+VOID -+EXhalbtc8723a1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ -+ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, FORCE_EXEC, FALSE); -+ halbtc8723a1ant_RfShrink(pBtCoexist, FORCE_EXEC, FALSE); -+ -+ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ EXhalbtc8723a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8723a1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE, bWifiConnected=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Periodical!!\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ // work around for c2h hang -+ wa_halbtc8723a1ant_MonitorC2h(pBtCoexist); -+ -+ halbtc8723a1ant_QueryBtInfo(pBtCoexist); -+ halbtc8723a1ant_MonitorBtCtr(pBtCoexist); -+ halbtc8723a1ant_MonitorBtEnableDisable(pBtCoexist); -+ -+ -+ if(bScan) -+ return; -+ if(bLink) -+ return; -+ -+ if(bWifiConnected) -+ { -+ if(pBtCoexist->btInfo.bBtDisabled) -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+ -+ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ else -+ { -+ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); -+ } -+ } -+ else -+ { -+ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8723A Co-exist mechanism ++// ++// History ++// 2012/08/22 Cosa first check in. ++// 2012/11/14 Cosa Revise for 8723A 1Ant out sourcing. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8723a1Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8723A_1ANT GLCoexDm8723a1Ant; ++static PCOEX_DM_8723A_1ANT pCoexDm=&GLCoexDm8723a1Ant; ++static COEX_STA_8723A_1ANT GLCoexSta8723a1Ant; ++static PCOEX_STA_8723A_1ANT pCoexSta=&GLCoexSta8723a1Ant; ++ ++const char *const GLBtInfoSrc8723a1Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8723a1ant_ ++//============================================================ ++VOID ++halbtc8723a1ant_Reg0x550Bit3( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSet ++ ) ++{ ++ u1Byte u1tmp=0; ++ ++ u1tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x550); ++ if(bSet) ++ { ++ u1tmp |= BIT3; ++ } ++ else ++ { ++ u1tmp &= ~BIT3; ++ } ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x550, u1tmp); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set 0x550[3]=%d\n", (bSet? 1:0))); ++} ++ ++VOID ++halbtc8723a1ant_NotifyFwScan( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte scanType ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(BTC_SCAN_START == scanType) ++ H2C_Parameter[0] = 0x1; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Notify FW for wifi scan, write 0x3b=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3b, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x38=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x38, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8723a1ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8723a1ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8723a1ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ tmpU1 |= BIT0; ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8723a1ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8723a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8723a1ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8723a1ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8723a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8723a1ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x25=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x25, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8723a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8723a1ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ // byte1[1:0] != 0 means enable pstdma ++ // for 2Ant bt coexist, if byte1 != 0 means enable pstdma ++ if(byte1) ++ { ++ if(bApEnable) ++ { ++ if(type != 5 && type != 12) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ } ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3a, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(pCoexDm->bCurPsTdmaOn) ++ { ++ switch(pCoexDm->curPsTdma) ++ { ++ case 1: ++ default: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x0, 0x40); ++ break; ++ case 2: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x0, 0x40); ++ break; ++ case 3: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x3f, 0x3, 0x10, 0x40); ++ break; ++ case 4: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 5: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0x15, 0x3, 0x35, 0xc0); ++ break; ++ ++ case 8: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 10: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x0, 0x40); ++ break; ++ case 12: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0xa, 0x3, 0x15, 0xc0); ++ break; ++ ++ case 18: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ ++ case 20: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x2a, 0x2a, 0x0, 0x0); ++ break; ++ case 21: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x20, 0x3, 0x10, 0x40); ++ break; ++ case 22: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x2, 0x40); ++ break; ++ case 23: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x2, 0x40); ++ break; ++ case 24: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x2, 0x40); ++ break; ++ case 25: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40); ++ break; ++ case 26: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 27: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40); ++ break; ++ case 28: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x3, 0x2f, 0x2f, 0x0, 0x0); ++ break; ++ ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(pCoexDm->curPsTdma) ++ { ++ case 8: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x8, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x210); ++ break; ++ case 9: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x110); ++ break; ++ ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++ ++VOID ++halbtc8723a1ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // sw all off ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ // hw all off ++ halbtc8723a1ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++} ++ ++VOID ++halbtc8723a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++} ++ ++VOID ++halbtc8723a1ant_BtEnableAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++} ++ ++VOID ++halbtc8723a1ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8723a1ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ halbtc8723a1ant_BtEnableAction(pBtCoexist); ++ } ++ else ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++VOID ++halbtc8723a1ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ u1Byte btState; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ btState = pCoexDm->btStatus; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], TdmaDurationAdjust()\n")); ++ if(pCoexDm->psTdmaGlobalCnt != pCoexDm->psTdmaMonitorCnt) ++ { ++ pCoexDm->psTdmaMonitorCnt = 0; ++ pCoexDm->psTdmaGlobalCnt = 0; ++ } ++ if(pCoexDm->psTdmaMonitorCnt == 0) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], first run BT A2DP + WiFi busy state!!\n")); ++ if(btState == BT_STATE_8723A_1ANT_ACL_ONLY_BUSY) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ pCoexDm->psTdmaDuAdjType = 22; ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], retryCount = %d\n", retryCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT TxRx counter H+L <= 1200\n")); ++ if(btState != BT_STATE_8723A_1ANT_ACL_ONLY_BUSY) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], NOT ACL only busy!\n")); ++ if(BTC_WIFI_BW_HT40 != wifiBw) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 20MHz\n")); ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 22) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ else if(pCoexDm->curPsTdma == 23) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); ++ pCoexDm->psTdmaDuAdjType = 25; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 25) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ else if(pCoexDm->curPsTdma == 23) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ pCoexDm->psTdmaDuAdjType = 22; ++ } ++ } ++ // error handle, if not in the following state, ++ // set psTdma again. ++ if( (pCoexDm->psTdmaDuAdjType != 22) && ++ (pCoexDm->psTdmaDuAdjType != 23) && ++ (pCoexDm->psTdmaDuAdjType != 24) && ++ (pCoexDm->psTdmaDuAdjType != 25) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 40MHz\n")); ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 23) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); ++ pCoexDm->psTdmaDuAdjType = 25; ++ } ++ else if(pCoexDm->curPsTdma == 25) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 27); ++ pCoexDm->psTdmaDuAdjType = 27; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 27) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); ++ pCoexDm->psTdmaDuAdjType = 25; ++ } ++ else if(pCoexDm->curPsTdma == 25) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ } ++ // error handle, if not in the following state, ++ // set psTdma again. ++ if( (pCoexDm->psTdmaDuAdjType != 23) && ++ (pCoexDm->psTdmaDuAdjType != 24) && ++ (pCoexDm->psTdmaDuAdjType != 25) && ++ (pCoexDm->psTdmaDuAdjType != 27) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ACL only busy\n")); ++ if (result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ } ++ ++ // error handle, if not in the following state, ++ // set psTdma again. ++ if( (pCoexDm->psTdmaDuAdjType != 1) && ++ (pCoexDm->psTdmaDuAdjType != 2) && ++ (pCoexDm->psTdmaDuAdjType != 9) && ++ (pCoexDm->psTdmaDuAdjType != 11) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++ pCoexDm->psTdmaMonitorCnt++; ++} ++ ++ ++VOID ++halbtc8723a1ant_CoexForWifiConnect( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bWifiBusy=FALSE; ++ u1Byte btState, btInfoOriginal=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ btState = pCoexDm->btStatus; ++ btInfoOriginal = pCoexSta->btInfoC2h[BT_INFO_SRC_8723A_1ANT_BT_RSP][0]; ++ ++ if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi connected!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if( !bWifiBusy && ++ ((BT_STATE_8723A_1ANT_NO_CONNECTION == btState) || ++ (BT_STATE_8723A_1ANT_CONNECT_IDLE == btState)) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], [Wifi is idle] or [Bt is non connected idle or Bt is connected idle]!!\n")); ++ ++ if(BT_STATE_8723A_1ANT_NO_CONNECTION == btState) ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ else if(BT_STATE_8723A_1ANT_CONNECT_IDLE == btState) ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); ++ } ++ else ++ { ++ if( (BT_STATE_8723A_1ANT_SCO_ONLY_BUSY == btState) || ++ (BT_STATE_8723A_1ANT_ACL_SCO_BUSY == btState) || ++ (BT_STATE_8723A_1ANT_HID_BUSY == btState) || ++ (BT_STATE_8723A_1ANT_HID_SCO_BUSY == btState) ) ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0x60); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); ++ } ++ switch(btState) ++ { ++ case BT_STATE_8723A_1ANT_NO_CONNECTION: ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ break; ++ case BT_STATE_8723A_1ANT_CONNECT_IDLE: ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ break; ++ case BT_STATE_8723A_1ANT_INQ_OR_PAG: ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ break; ++ case BT_STATE_8723A_1ANT_SCO_ONLY_BUSY: ++ case BT_STATE_8723A_1ANT_ACL_SCO_BUSY: ++ case BT_STATE_8723A_1ANT_HID_BUSY: ++ case BT_STATE_8723A_1ANT_HID_SCO_BUSY: ++ halbtc8723a1ant_TdmaDurationAdjust(pBtCoexist); ++ break; ++ case BT_STATE_8723A_1ANT_ACL_ONLY_BUSY: ++ if (btInfoOriginal&BT_INFO_8723A_1ANT_B_A2DP) ++ { ++ halbtc8723a1ant_TdmaDurationAdjust(pBtCoexist); ++ } ++ else if(btInfoOriginal&BT_INFO_8723A_1ANT_B_FTP) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ else if( (btInfoOriginal&BT_INFO_8723A_1ANT_B_A2DP) && ++ (btInfoOriginal&BT_INFO_8723A_1ANT_B_FTP) ) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], error!!!, undefined case in halbtc8723a1ant_CoexForWifiConnect()!!\n")); ++ break; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is disconnected!!\n")); ++ } ++ ++ pCoexDm->psTdmaGlobalCnt++; ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8723a1ant_ ++//============================================================ ++VOID ++wa_halbtc8723a1ant_MonitorC2h( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte tmp1b=0x0; ++ u4Byte curC2hTotalCnt=0x0; ++ static u4Byte preC2hTotalCnt=0x0, sameCntPollingTime=0x0; ++ ++ curC2hTotalCnt+=pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_BT_RSP]; ++ ++ if(curC2hTotalCnt == preC2hTotalCnt) ++ { ++ sameCntPollingTime++; ++ } ++ else ++ { ++ preC2hTotalCnt = curC2hTotalCnt; ++ sameCntPollingTime = 0; ++ } ++ ++ if(sameCntPollingTime >= 2) ++ { ++ tmp1b = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x1af); ++ if(tmp1b != 0x0) ++ { ++ pCoexSta->c2hHangDetectCnt++; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x1af, 0x0); ++ } ++ } ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8723a1ant_ ++//============================================================ ++VOID ++EXhalbtc8723a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++ ++ // enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // coex table ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); // 1-Ant coex ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffff); // wifi break table ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); //coex table ++ ++ // antenna switch control parameter ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0xaaaaaaaa); ++ ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x210); //set antenna at wifi side if ANTSW is software control ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x870, 0x300); //SPDT(connected with TRSW) control by hardware PTA ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x874, 0x22804000); //ANTSW keep by GNT_BT ++ ++ // coexistence parameters ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); // enable RTK mode PTA ++} ++ ++VOID ++EXhalbtc8723a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8723a1ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723A_1ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723a1Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "write 0x1af=0x0 num", \ ++ pCoexSta->c2hHangDetectCnt); ++ CL_PRINTF(cliBuf); ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ ++ pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x783); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x796); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ ++ u1Tmp[0], u1Tmp[1], u1Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x484); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xdac); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hp rx[31:16]/tx[15:0])", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8723a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8723a1ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8723a1ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE; ++ ++ halbtc8723a1ant_NotifyFwScan(pBtCoexist, type); ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ //set 0x550[3]=1 before PsTdma ++ halbtc8723a1ant_Reg0x550Bit3(pBtCoexist, TRUE); ++ } ++ ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); ++ } ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE; ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ } ++ else ++ { ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ //set 0x550[3]=1 before PsTdma ++ halbtc8723a1ant_Reg0x550Bit3(pBtCoexist, TRUE); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); // extend wifi slot ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); ++ } ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 18); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtHsOn=FALSE, bBtBusy=FALSE, bForceLps=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = BT_INFO_SRC_8723A_1ANT_BT_RSP; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 0) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8723A_1ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = ++ pCoexSta->btInfoC2h[rspSource][1]; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][2]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][3]; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8723A_1ANT_B_INQ_PAGE) ++ { ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ } ++ else ++ { ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ } ++ btInfo &= ~BIT2; ++ if(!(btInfo & BIT0)) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_NO_CONNECTION; ++ bForceLps = FALSE; ++ } ++ else ++ { ++ bForceLps = TRUE; ++ if(btInfo == 0x1) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_CONNECT_IDLE; ++ } ++ else if(btInfo == 0x9) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_ACL_ONLY_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x13) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_SCO_ONLY_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x1b) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_ACL_SCO_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x29) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_HID_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x3b) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_HID_SCO_BUSY; ++ bBtBusy = TRUE; ++ } ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bBtBusy); ++ if(bForceLps) ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ else ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ ++ if( (BT_STATE_8723A_1ANT_NO_CONNECTION == pCoexDm->btStatus) || ++ (BT_STATE_8723A_1ANT_CONNECT_IDLE == pCoexDm->btStatus) ) ++ { ++ if(pCoexSta->bC2hBtInquiryPage) ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_INQ_OR_PAG; ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, FORCE_EXEC, FALSE); ++ ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8723a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8723a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE, bWifiConnected=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Periodical!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ // work around for c2h hang ++ wa_halbtc8723a1ant_MonitorC2h(pBtCoexist); ++ ++ halbtc8723a1ant_QueryBtInfo(pBtCoexist); ++ halbtc8723a1ant_MonitorBtCtr(pBtCoexist); ++ halbtc8723a1ant_MonitorBtEnableDisable(pBtCoexist); ++ ++ ++ if(bScan) ++ return; ++ if(bLink) ++ return; ++ ++ if(bWifiConnected) ++ { ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ else ++ { ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); ++ } ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a1Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a1Ant.h new file mode 100644 -index 000000000..6d4e1b450 +index 0000000..e8c2fd0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a1Ant.h @@ -0,0 +1,171 @@ -+//=========================================== -+// The following is for 8723A 1Ant BT Co-exist definition -+//=========================================== -+#define BT_INFO_8723A_1ANT_B_FTP BIT7 -+#define BT_INFO_8723A_1ANT_B_A2DP BIT6 -+#define BT_INFO_8723A_1ANT_B_HID BIT5 -+#define BT_INFO_8723A_1ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8723A_1ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8723A_1ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8723A_1ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8723A_1ANT_B_CONNECTION BIT0 -+ -+typedef enum _BT_STATE_8723A_1ANT{ -+ BT_STATE_8723A_1ANT_DISABLED = 0, -+ BT_STATE_8723A_1ANT_NO_CONNECTION = 1, -+ BT_STATE_8723A_1ANT_CONNECT_IDLE = 2, -+ BT_STATE_8723A_1ANT_INQ_OR_PAG = 3, -+ BT_STATE_8723A_1ANT_ACL_ONLY_BUSY = 4, -+ BT_STATE_8723A_1ANT_SCO_ONLY_BUSY = 5, -+ BT_STATE_8723A_1ANT_ACL_SCO_BUSY = 6, -+ BT_STATE_8723A_1ANT_HID_BUSY = 7, -+ BT_STATE_8723A_1ANT_HID_SCO_BUSY = 8, -+ BT_STATE_8723A_1ANT_MAX -+}BT_STATE_8723A_1ANT, *PBT_STATE_8723A_1ANT; -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8723A_1ANT 2 -+ -+typedef enum _BT_INFO_SRC_8723A_1ANT{ -+ BT_INFO_SRC_8723A_1ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8723A_1ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8723A_1ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8723A_1ANT_MAX -+}BT_INFO_SRC_8723A_1ANT,*PBT_INFO_SRC_8723A_1ANT; -+ -+typedef enum _BT_8723A_1ANT_BT_STATUS{ -+ BT_8723A_1ANT_BT_STATUS_IDLE = 0x0, -+ BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8723A_1ANT_BT_STATUS_NON_IDLE = 0x2, -+ BT_8723A_1ANT_BT_STATUS_MAX -+}BT_8723A_1ANT_BT_STATUS,*PBT_8723A_1ANT_BT_STATUS; -+ -+typedef enum _BT_8723A_1ANT_COEX_ALGO{ -+ BT_8723A_1ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8723A_1ANT_COEX_ALGO_SCO = 0x1, -+ BT_8723A_1ANT_COEX_ALGO_HID = 0x2, -+ BT_8723A_1ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8723A_1ANT_COEX_ALGO_PANEDR = 0x4, -+ BT_8723A_1ANT_COEX_ALGO_PANHS = 0x5, -+ BT_8723A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x6, -+ BT_8723A_1ANT_COEX_ALGO_PANEDR_HID = 0x7, -+ BT_8723A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8, -+ BT_8723A_1ANT_COEX_ALGO_HID_A2DP = 0x9, -+ BT_8723A_1ANT_COEX_ALGO_MAX -+}BT_8723A_1ANT_COEX_ALGO,*PBT_8723A_1ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8723A_1ANT{ -+ // fw mechanism -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ u4Byte psTdmaMonitorCnt; -+ u4Byte psTdmaGlobalCnt; -+ BOOLEAN bResetTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+} COEX_DM_8723A_1ANT, *PCOEX_DM_8723A_1ANT; -+ -+typedef struct _COEX_STA_8723A_1ANT{ -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ u1Byte preBtRssiState; -+ u1Byte preBtRssiState1; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8723A_1ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_MAX]; -+ BOOLEAN bC2hBtInquiryPage; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ //BOOLEAN bHoldForStackOperation; -+ //u1Byte bHoldPeriodCnt; -+ // this is for c2h hang work-around -+ u4Byte c2hHangDetectCnt; -+}COEX_STA_8723A_1ANT, *PCOEX_STA_8723A_1ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8723a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8723a1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8723A 1Ant BT Co-exist definition ++//=========================================== ++#define BT_INFO_8723A_1ANT_B_FTP BIT7 ++#define BT_INFO_8723A_1ANT_B_A2DP BIT6 ++#define BT_INFO_8723A_1ANT_B_HID BIT5 ++#define BT_INFO_8723A_1ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8723A_1ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8723A_1ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8723A_1ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8723A_1ANT_B_CONNECTION BIT0 ++ ++typedef enum _BT_STATE_8723A_1ANT{ ++ BT_STATE_8723A_1ANT_DISABLED = 0, ++ BT_STATE_8723A_1ANT_NO_CONNECTION = 1, ++ BT_STATE_8723A_1ANT_CONNECT_IDLE = 2, ++ BT_STATE_8723A_1ANT_INQ_OR_PAG = 3, ++ BT_STATE_8723A_1ANT_ACL_ONLY_BUSY = 4, ++ BT_STATE_8723A_1ANT_SCO_ONLY_BUSY = 5, ++ BT_STATE_8723A_1ANT_ACL_SCO_BUSY = 6, ++ BT_STATE_8723A_1ANT_HID_BUSY = 7, ++ BT_STATE_8723A_1ANT_HID_SCO_BUSY = 8, ++ BT_STATE_8723A_1ANT_MAX ++}BT_STATE_8723A_1ANT, *PBT_STATE_8723A_1ANT; ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723A_1ANT 2 ++ ++typedef enum _BT_INFO_SRC_8723A_1ANT{ ++ BT_INFO_SRC_8723A_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723A_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723A_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723A_1ANT_MAX ++}BT_INFO_SRC_8723A_1ANT,*PBT_INFO_SRC_8723A_1ANT; ++ ++typedef enum _BT_8723A_1ANT_BT_STATUS{ ++ BT_8723A_1ANT_BT_STATUS_IDLE = 0x0, ++ BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723A_1ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8723A_1ANT_BT_STATUS_MAX ++}BT_8723A_1ANT_BT_STATUS,*PBT_8723A_1ANT_BT_STATUS; ++ ++typedef enum _BT_8723A_1ANT_COEX_ALGO{ ++ BT_8723A_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723A_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723A_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8723A_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723A_1ANT_COEX_ALGO_PANEDR = 0x4, ++ BT_8723A_1ANT_COEX_ALGO_PANHS = 0x5, ++ BT_8723A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x6, ++ BT_8723A_1ANT_COEX_ALGO_PANEDR_HID = 0x7, ++ BT_8723A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8, ++ BT_8723A_1ANT_COEX_ALGO_HID_A2DP = 0x9, ++ BT_8723A_1ANT_COEX_ALGO_MAX ++}BT_8723A_1ANT_COEX_ALGO,*PBT_8723A_1ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8723A_1ANT{ ++ // fw mechanism ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ u4Byte psTdmaMonitorCnt; ++ u4Byte psTdmaGlobalCnt; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++} COEX_DM_8723A_1ANT, *PCOEX_DM_8723A_1ANT; ++ ++typedef struct _COEX_STA_8723A_1ANT{ ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ u1Byte preBtRssiState; ++ u1Byte preBtRssiState1; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8723A_1ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ //BOOLEAN bHoldForStackOperation; ++ //u1Byte bHoldPeriodCnt; ++ // this is for c2h hang work-around ++ u4Byte c2hHangDetectCnt; ++}COEX_STA_8723A_1ANT, *PCOEX_STA_8723A_1ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8723a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8723a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a2Ant.c new file mode 100644 -index 000000000..1becd5c01 +index 0000000..f32bd9f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a2Ant.c @@ -0,0 +1,3746 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8723A Co-exist mechanism -+// -+// History -+// 2012/08/22 Cosa first check in. -+// 2012/11/14 Cosa Revise for 8723A 2Ant out sourcing. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8723a2Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8723A_2ANT GLCoexDm8723a2Ant; -+static PCOEX_DM_8723A_2ANT pCoexDm=&GLCoexDm8723a2Ant; -+static COEX_STA_8723A_2ANT GLCoexSta8723a2Ant; -+static PCOEX_STA_8723A_2ANT pCoexSta=&GLCoexSta8723a2Ant; -+ -+const char *const GLBtInfoSrc8723a2Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8723a2ant_ -+//============================================================ -+BOOLEAN -+halbtc8723a2ant_IsWifiIdle( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bWifiConnected) -+ return FALSE; -+ if(bScan) -+ return FALSE; -+ if(bLink) -+ return FALSE; -+ if(bRoam) -+ return FALSE; -+ -+ return TRUE; -+} -+ -+BOOLEAN -+halbtc8723a2ant_IsWifiConnectedIdle( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bScan=FALSE, bLink=FALSE, bRoam=FALSE, bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(bScan) -+ return FALSE; -+ if(bLink) -+ return FALSE; -+ if(bRoam) -+ return FALSE; -+ if(bWifiConnected && !bWifiBusy) -+ return TRUE; -+ else -+ return FALSE; -+} -+ -+u1Byte -+halbtc8723a2ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8723a2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8723a2ant_IndicateWifiChnlBwInfo( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x19=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x19, 3, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a2ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x38=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x38, 1, H2C_Parameter); -+} -+u1Byte -+halbtc8723a2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ BOOLEAN bBtHsOn=FALSE, bBtBusy=FALSE, bLimitedDig=FALSE; -+ u1Byte algorithm=BT_8723A_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ //====================== -+ // here we get BT status first -+ //====================== -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_IDLE; -+ -+ if((pStackInfo->bScoExist) ||(bBtHsOn) ||(pStackInfo->bHidExist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO or HID or HS exists, set BT non-idle !!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; -+ } -+ else -+ { -+ // A2dp profile -+ if( (pBtCoexist->stackInfo.numOfLink == 1) && -+ (pStackInfo->bA2dpExist) ) -+ { -+ if( (pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 100) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP, low priority tx+rx < 100, set BT connected-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP, low priority tx+rx >= 100, set BT non-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; -+ } -+ } -+ // Pan profile -+ if( (pBtCoexist->stackInfo.numOfLink == 1) && -+ (pStackInfo->bPanExist) ) -+ { -+ if((pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 600) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, low priority tx+rx < 600, set BT connected-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; -+ } -+ else -+ { -+ if(pCoexSta->lowPriorityTx) -+ { -+ if((pCoexSta->lowPriorityRx /pCoexSta->lowPriorityTx)>9 ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, low priority rx/tx > 9, set BT connected-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; -+ } -+ } -+ } -+ if(BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, set BT non-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; -+ } -+ } -+ // Pan+A2dp profile -+ if( (pBtCoexist->stackInfo.numOfLink == 2) && -+ (pStackInfo->bA2dpExist) && -+ (pStackInfo->bPanExist) ) -+ { -+ if((pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 600) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, low priority tx+rx < 600, set BT connected-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; -+ } -+ else -+ { -+ if(pCoexSta->lowPriorityTx) -+ { -+ if((pCoexSta->lowPriorityRx /pCoexSta->lowPriorityTx)>9 ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, low priority rx/tx > 9, set BT connected-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; -+ } -+ } -+ } -+ if(BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, set BT non-idle!!!\n")); -+ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; -+ } -+ } -+ } -+ if(BT_8723A_2ANT_BT_STATUS_IDLE != pCoexDm->btStatus) -+ { -+ bBtBusy = TRUE; -+ bLimitedDig = TRUE; -+ } -+ else -+ { -+ bBtBusy = FALSE; -+ bLimitedDig = FALSE; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); -+ //====================== -+ -+ if(!pStackInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pStackInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pStackInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; -+ } -+ else if(pStackInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pStackInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ if(pStackInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; -+ } -+ else if(pStackInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; -+ } -+ else if(pStackInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; -+ } -+ else if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+BOOLEAN -+halbtc8723a2ant_NeedToDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bRet=FALSE; -+ BOOLEAN bBtHsOn=FALSE, bWifiConnected=FALSE; -+ s4Byte btHsRssi=0; -+ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; -+ -+ btRssiState = halbtc8723a2ant_BtRssiState(2, 42, 0); -+ -+ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn)) -+ return FALSE; -+ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected)) -+ return FALSE; -+ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi)) -+ return FALSE; -+ if(BTC_RSSI_LOW(btRssiState)) -+ return FALSE; -+ -+ if(bWifiConnected) -+ { -+ if(bBtHsOn) -+ { -+ if(btHsRssi > 37) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for HS mode!!\n")); -+ bRet = TRUE; -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for Wifi is connected!!\n")); -+ bRet = TRUE; -+ } -+ } -+ -+ return bRet; -+} -+ -+VOID -+halbtc8723a2ant_SetFwDacSwingLevel( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte dacSwingLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ // There are several type of dacswing -+ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 -+ H2C_Parameter[0] = dacSwingLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x29=0x%x\n", H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x29, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a2ant_SetFwDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bDecBtPwr -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bDecBtPwr) -+ { -+ H2C_Parameter[0] |= BIT1; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power : %s, FW write 0x21=0x%x\n", -+ (bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x21, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a2ant_DecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDecBtPwr -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power = %s\n", -+ (bForceExec? "force to":""), ((bDecBtPwr)? "ON":"OFF"))); -+ pCoexDm->bCurDecBtPwr = bDecBtPwr; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr) -+ return; -+ } -+ halbtc8723a2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr); -+ -+ pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr; -+} -+ -+VOID -+halbtc8723a2ant_FwDacSwingLvl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte fwDacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", -+ (bForceExec? "force to":""), fwDacSwingLvl)); -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) -+ return; -+ } -+ -+ halbtc8723a2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); -+ -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+} -+ -+VOID -+halbtc8723a2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8723a2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8723a2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8723a2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte tmpU1; -+ -+ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); -+ tmpU1 |= BIT0; -+ if(bLowPenaltyRa) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); -+ tmpU1 &= ~BIT2; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); -+ tmpU1 |= BIT2; -+ } -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); -+} -+ -+VOID -+halbtc8723a2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ return; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8723a2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8723a2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ if(bSwDacSwingOn) -+ { -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, swDacSwingLvl); -+ } -+ else -+ { -+ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); -+ } -+} -+ -+ -+VOID -+halbtc8723a2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8723a2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8723a2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); -+ } -+} -+ -+VOID -+halbtc8723a2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8723a2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8723a2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4e1c0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4d1d0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4c1e0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4b1f0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4a200001); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x90000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x51000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x12000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x00355); -+ -+ rssiAdjustVal = 6; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x641c0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x631d0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x621e0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x611f0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x60200001); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x32000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x71000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xb0000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xfc000); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30355); -+ } -+ -+ // set rssiAdjustVal for wifi module. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+ -+VOID -+halbtc8723a2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8723a2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8723a2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8723a2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8723a2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8723a2ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x25=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x25, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a2ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8723a2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8723a2ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ -+ H2C_Parameter[0] = byte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = byte5; -+ -+ pCoexDm->psTdmaPara[0] = byte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = byte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3a, 5, H2C_Parameter); -+} -+ -+VOID -+halbtc8723a2ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ u4Byte btTxRxCnt=0; -+ -+ btTxRxCnt = pCoexSta->highPriorityTx+pCoexSta->highPriorityRx+ -+ pCoexSta->lowPriorityTx+pCoexSta->lowPriorityRx; -+ -+ if(btTxRxCnt > 3000) -+ { -+ pCoexDm->bCurPsTdmaOn = TRUE; -+ pCoexDm->curPsTdma = 8; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], turn ON PS TDMA, type=%d for BT tx/rx counters=%d(>3000)\n", -+ pCoexDm->curPsTdma, btTxRxCnt)); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ } -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ if(pCoexDm->bCurPsTdmaOn) -+ { -+ switch(pCoexDm->curPsTdma) -+ { -+ case 1: -+ default: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); -+ break; -+ case 2: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x98); -+ break; -+ case 3: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x98); -+ break; -+ case 4: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x5, 0x5, 0xe1, 0x80); -+ break; -+ case 5: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x98); -+ break; -+ case 6: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x98); -+ break; -+ case 7: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x98); -+ break; -+ case 8: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x5, 0x5, 0x60, 0x80); -+ break; -+ case 9: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); -+ break; -+ case 10: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x98); -+ break; -+ case 11: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x98); -+ break; -+ case 12: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x98); -+ break; -+ case 13: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x98); -+ break; -+ case 14: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x98); -+ break; -+ case 15: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x98); -+ break; -+ case 16: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x98); -+ break; -+ case 17: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x80); -+ break; -+ case 18: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x98); -+ break; -+ case 19: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x98); -+ break; -+ case 20: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x98); -+ break; -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(pCoexDm->curPsTdma) -+ { -+ case 0: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); -+ break; -+ case 1: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ break; -+ default: -+ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); -+ break; -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+ -+VOID -+halbtc8723a2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ // sw all off -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ -+ // hw all off -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+} -+ -+VOID -+halbtc8723a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ halbtc8723a2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0xffff, 0x3); -+ halbtc8723a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, FALSE); -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ -+ halbtc8723a2ant_AgcTable(pBtCoexist, FORCE_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, FORCE_EXEC, FALSE); -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, FORCE_EXEC, FALSE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, FORCE_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, FORCE_EXEC, FALSE, 0xc0); -+} -+ -+VOID -+halbtc8723a2ant_BtInquiryPage( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bLowPwrDisable=TRUE; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+} -+ -+VOID -+halbtc8723a2ant_BtEnableAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE; -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+} -+ -+VOID -+halbtc8723a2ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8723a2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ halbtc8723a2ant_BtEnableAction(pBtCoexist); -+ } -+ } -+} -+ -+BOOLEAN -+halbtc8723a2ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE; -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ if(!pStackInfo->bBtLinkExist) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ } -+ else -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && -+ BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + Bt idle!!\n")); -+ -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ -+ bCommon = TRUE; -+ } -+ else if(!halbtc8723a2ant_IsWifiIdle(pBtCoexist) && -+ (BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + BT idle!!\n")); -+ -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ -+ bCommon = TRUE; -+ } -+ else if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && -+ (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + Bt connected idle!!\n")); -+ -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ -+ bCommon = TRUE; -+ } -+ else if(!halbtc8723a2ant_IsWifiIdle(pBtCoexist) && -+ (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + Bt connected idle!!\n")); -+ -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ -+ bCommon = TRUE; -+ } -+ else if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && -+ (BT_8723A_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + BT non-idle!!\n")); -+ -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ -+ bCommon = TRUE; -+ } -+ else if(halbtc8723a2ant_IsWifiConnectedIdle(pBtCoexist) && -+ (BT_8723A_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected-idle + BT non-idle!!\n")); -+ -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + BT non-idle!!\n")); -+ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); -+ -+ bCommon = FALSE; -+ } -+ -+ return bCommon; -+} -+VOID -+halbtc8723a2ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bScoHid, -+ IN BOOLEAN bTxPause, -+ IN u1Byte maxInterval -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); -+ -+ if(pCoexDm->bResetTdmaAdjust) -+ { -+ pCoexDm->bResetTdmaAdjust = FALSE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ { -+ if(bScoHid) -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ else -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ } -+ } -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); -+ if(maxInterval == 1) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 2) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 3) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+} -+ -+// SCO only or SCO+PAN(HS) -+VOID -+halbtc8723a2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1; -+ u4Byte wifiBw; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+ -+VOID -+halbtc8723a2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1; -+ u4Byte wifiBw; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8723a2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ else -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ else -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+VOID -+halbtc8723a2ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+ -+//PAN(HS) only -+VOID -+halbtc8723a2ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState; -+ u4Byte wifiBw; -+ -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8723a2ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ } -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+VOID -+halbtc8723a2ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1; -+ u4Byte wifiBw; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ } -+ else -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8723a2ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ } -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+VOID -+halbtc8723a2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 1); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 1); -+ } -+ } -+ -+ // sw mechanism -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); -+ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); -+ -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 1); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 1); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ else -+ { -+ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); -+ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); -+ } -+ } -+} -+ -+VOID -+halbtc8723a2ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ u1Byte btInfoOriginal=0, btRetryCnt=0; -+ u1Byte algorithm=0; -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Manual control!!!\n")); -+ return; -+ } -+ -+ if(pStackInfo->bProfileNotified) -+ { -+ if(pCoexSta->bHoldForStackOperation) -+ { -+ // if bt inquiry/page/pair, do not execute. -+ return; -+ } -+ -+ algorithm = halbtc8723a2ant_ActionAlgorithm(pBtCoexist); -+ if(pCoexSta->bHoldPeriodCnt && (BT_8723A_2ANT_COEX_ALGO_PANHS!=algorithm)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex],Hold BT inquiry/page scan setting (cnt = %d)!!\n", -+ pCoexSta->bHoldPeriodCnt)); -+ if(pCoexSta->bHoldPeriodCnt >= 6) -+ { -+ pCoexSta->bHoldPeriodCnt = 0; -+ // next time the coexist parameters should be reset again. -+ } -+ else -+ pCoexSta->bHoldPeriodCnt++; -+ return; -+ } -+ -+ pCoexDm->curAlgorithm = algorithm; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); -+ if(halbtc8723a2ant_IsCommonAction(pBtCoexist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); -+ pCoexDm->bResetTdmaAdjust = TRUE; -+ } -+ else -+ { -+ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", -+ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); -+ pCoexDm->bResetTdmaAdjust = TRUE; -+ } -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8723A_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); -+ halbtc8723a2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); -+ halbtc8723a2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); -+ halbtc8723a2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); -+ halbtc8723a2ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); -+ halbtc8723a2ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); -+ halbtc8723a2ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); -+ halbtc8723a2ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); -+ halbtc8723a2ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8723A_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); -+ halbtc8723a2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); -+ halbtc8723a2ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+ } -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8723a2ant_ -+//============================================================ -+VOID -+wa_halbtc8723a2ant_MonitorC2h( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte tmp1b=0x0; -+ u4Byte curC2hTotalCnt=0x0; -+ static u4Byte preC2hTotalCnt=0x0, sameCntPollingTime=0x0; -+ -+ curC2hTotalCnt+=pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_BT_RSP]; -+ -+ if(curC2hTotalCnt == preC2hTotalCnt) -+ { -+ sameCntPollingTime++; -+ } -+ else -+ { -+ preC2hTotalCnt = curC2hTotalCnt; -+ sameCntPollingTime = 0; -+ } -+ -+ if(sameCntPollingTime >= 2) -+ { -+ tmp1b = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x1af); -+ if(tmp1b != 0x0) -+ { -+ pCoexSta->c2hHangDetectCnt++; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x1af, 0x0); -+ } -+ } -+} -+ -+//============================================================ -+// extern function start with EXhalbtc8723a2ant_ -+//============================================================ -+VOID -+EXhalbtc8723a2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8723a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ u4Byte u4Tmp=0; -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ // Enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); -+} -+ -+VOID -+EXhalbtc8723a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8723a2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8723a2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ if(pStackInfo->bProfileNotified) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723a2Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "write 0x1af=0x0 num", \ -+ pCoexSta->c2hHangDetectCnt); -+ CL_PRINTF(cliBuf); -+ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(!pBtCoexist->bManualControl) -+ { -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ -+ pCoexDm->bCurDecBtPwr, pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ } -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x783); -+ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x796); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ -+ u1Tmp[0], u1Tmp[1], u1Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x484); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); -+ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xdac); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hp rx[31:16]/tx[15:0])", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8723a2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ halbtc8723a2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ //halbtc8723a2ant_InitCoexDm(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8723a2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8723a2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8723a2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8723a2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, type); -+} -+ -+VOID -+EXhalbtc8723a2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8723a2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = BT_INFO_SRC_8723A_2ANT_BT_RSP; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 0) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(BT_INFO_SRC_8723A_2ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = -+ pCoexSta->btInfoC2h[rspSource][1]; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][2]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][3]; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8723A_2ANT_B_INQ_PAGE) -+ { -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ } -+ else -+ { -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8723a2ant_StackOperationNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_STACK_OP_INQ_PAGE_PAIR_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], StackOP Inquiry/page/pair start notify\n")); -+ pCoexSta->bHoldForStackOperation = TRUE; -+ pCoexSta->bHoldPeriodCnt = 1; -+ halbtc8723a2ant_BtInquiryPage(pBtCoexist); -+ } -+ else if(BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], StackOP Inquiry/page/pair finish notify\n")); -+ pCoexSta->bHoldForStackOperation = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8723a2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ EXhalbtc8723a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8723a2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); -+ -+ // work around for c2h hang -+ wa_halbtc8723a2ant_MonitorC2h(pBtCoexist); -+ -+ halbtc8723a2ant_QueryBtInfo(pBtCoexist); -+ halbtc8723a2ant_MonitorBtCtr(pBtCoexist); -+ halbtc8723a2ant_MonitorBtEnableDisable(pBtCoexist); -+ -+ halbtc8723a2ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8723A Co-exist mechanism ++// ++// History ++// 2012/08/22 Cosa first check in. ++// 2012/11/14 Cosa Revise for 8723A 2Ant out sourcing. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8723a2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8723A_2ANT GLCoexDm8723a2Ant; ++static PCOEX_DM_8723A_2ANT pCoexDm=&GLCoexDm8723a2Ant; ++static COEX_STA_8723A_2ANT GLCoexSta8723a2Ant; ++static PCOEX_STA_8723A_2ANT pCoexSta=&GLCoexSta8723a2Ant; ++ ++const char *const GLBtInfoSrc8723a2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8723a2ant_ ++//============================================================ ++BOOLEAN ++halbtc8723a2ant_IsWifiIdle( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bWifiConnected) ++ return FALSE; ++ if(bScan) ++ return FALSE; ++ if(bLink) ++ return FALSE; ++ if(bRoam) ++ return FALSE; ++ ++ return TRUE; ++} ++ ++BOOLEAN ++halbtc8723a2ant_IsWifiConnectedIdle( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bScan=FALSE, bLink=FALSE, bRoam=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(bScan) ++ return FALSE; ++ if(bLink) ++ return FALSE; ++ if(bRoam) ++ return FALSE; ++ if(bWifiConnected && !bWifiBusy) ++ return TRUE; ++ else ++ return FALSE; ++} ++ ++u1Byte ++halbtc8723a2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8723a2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8723a2ant_IndicateWifiChnlBwInfo( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x19=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x19, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x38=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x38, 1, H2C_Parameter); ++} ++u1Byte ++halbtc8723a2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bBtHsOn=FALSE, bBtBusy=FALSE, bLimitedDig=FALSE; ++ u1Byte algorithm=BT_8723A_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ //====================== ++ // here we get BT status first ++ //====================== ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_IDLE; ++ ++ if((pStackInfo->bScoExist) ||(bBtHsOn) ||(pStackInfo->bHidExist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO or HID or HS exists, set BT non-idle !!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ else ++ { ++ // A2dp profile ++ if( (pBtCoexist->stackInfo.numOfLink == 1) && ++ (pStackInfo->bA2dpExist) ) ++ { ++ if( (pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 100) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP, low priority tx+rx < 100, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP, low priority tx+rx >= 100, set BT non-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ } ++ // Pan profile ++ if( (pBtCoexist->stackInfo.numOfLink == 1) && ++ (pStackInfo->bPanExist) ) ++ { ++ if((pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 600) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, low priority tx+rx < 600, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ else ++ { ++ if(pCoexSta->lowPriorityTx) ++ { ++ if((pCoexSta->lowPriorityRx /pCoexSta->lowPriorityTx)>9 ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, low priority rx/tx > 9, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ } ++ } ++ if(BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, set BT non-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ } ++ // Pan+A2dp profile ++ if( (pBtCoexist->stackInfo.numOfLink == 2) && ++ (pStackInfo->bA2dpExist) && ++ (pStackInfo->bPanExist) ) ++ { ++ if((pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 600) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, low priority tx+rx < 600, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ else ++ { ++ if(pCoexSta->lowPriorityTx) ++ { ++ if((pCoexSta->lowPriorityRx /pCoexSta->lowPriorityTx)>9 ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, low priority rx/tx > 9, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ } ++ } ++ if(BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, set BT non-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ } ++ } ++ if(BT_8723A_2ANT_BT_STATUS_IDLE != pCoexDm->btStatus) ++ { ++ bBtBusy = TRUE; ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ //====================== ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pStackInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++BOOLEAN ++halbtc8723a2ant_NeedToDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bRet=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bWifiConnected=FALSE; ++ s4Byte btHsRssi=0; ++ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; ++ ++ btRssiState = halbtc8723a2ant_BtRssiState(2, 42, 0); ++ ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn)) ++ return FALSE; ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected)) ++ return FALSE; ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi)) ++ return FALSE; ++ if(BTC_RSSI_LOW(btRssiState)) ++ return FALSE; ++ ++ if(bWifiConnected) ++ { ++ if(bBtHsOn) ++ { ++ if(btHsRssi > 37) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for HS mode!!\n")); ++ bRet = TRUE; ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for Wifi is connected!!\n")); ++ bRet = TRUE; ++ } ++ } ++ ++ return bRet; ++} ++ ++VOID ++halbtc8723a2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x29=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x29, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bDecBtPwr ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bDecBtPwr) ++ { ++ H2C_Parameter[0] |= BIT1; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power : %s, FW write 0x21=0x%x\n", ++ (bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x21, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDecBtPwr ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power = %s\n", ++ (bForceExec? "force to":""), ((bDecBtPwr)? "ON":"OFF"))); ++ pCoexDm->bCurDecBtPwr = bDecBtPwr; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr) ++ return; ++ } ++ halbtc8723a2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr); ++ ++ pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr; ++} ++ ++VOID ++halbtc8723a2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8723a2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8723a2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8723a2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8723a2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ tmpU1 |= BIT0; ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8723a2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8723a2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8723a2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, swDacSwingLvl); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); ++ } ++} ++ ++ ++VOID ++halbtc8723a2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8723a2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8723a2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); ++ } ++} ++ ++VOID ++halbtc8723a2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8723a2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8723a2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4e1c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4d1d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4c1e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4b1f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4a200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x90000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x51000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x12000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x00355); ++ ++ rssiAdjustVal = 6; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x641c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x631d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x621e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x611f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x60200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x32000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x71000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xb0000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xfc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30355); ++ } ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++ ++VOID ++halbtc8723a2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8723a2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8723a2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8723a2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8723a2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8723a2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x25=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x25, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8723a2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8723a2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ ++ H2C_Parameter[0] = byte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = byte5; ++ ++ pCoexDm->psTdmaPara[0] = byte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = byte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3a, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ u4Byte btTxRxCnt=0; ++ ++ btTxRxCnt = pCoexSta->highPriorityTx+pCoexSta->highPriorityRx+ ++ pCoexSta->lowPriorityTx+pCoexSta->lowPriorityRx; ++ ++ if(btTxRxCnt > 3000) ++ { ++ pCoexDm->bCurPsTdmaOn = TRUE; ++ pCoexDm->curPsTdma = 8; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], turn ON PS TDMA, type=%d for BT tx/rx counters=%d(>3000)\n", ++ pCoexDm->curPsTdma, btTxRxCnt)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ } ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(pCoexDm->bCurPsTdmaOn) ++ { ++ switch(pCoexDm->curPsTdma) ++ { ++ case 1: ++ default: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); ++ break; ++ case 2: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x98); ++ break; ++ case 3: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x98); ++ break; ++ case 4: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x5, 0x5, 0xe1, 0x80); ++ break; ++ case 5: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x98); ++ break; ++ case 6: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x98); ++ break; ++ case 7: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x98); ++ break; ++ case 8: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x5, 0x5, 0x60, 0x80); ++ break; ++ case 9: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); ++ break; ++ case 10: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x98); ++ break; ++ case 11: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x98); ++ break; ++ case 12: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x98); ++ break; ++ case 13: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x98); ++ break; ++ case 14: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x98); ++ break; ++ case 15: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x98); ++ break; ++ case 16: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x98); ++ break; ++ case 17: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x80); ++ break; ++ case 18: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x98); ++ break; ++ case 19: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x98); ++ break; ++ case 20: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x98); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(pCoexDm->curPsTdma) ++ { ++ case 0: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); ++ break; ++ case 1: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ break; ++ default: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++ ++VOID ++halbtc8723a2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ // sw all off ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ // hw all off ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++} ++ ++VOID ++halbtc8723a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8723a2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0xffff, 0x3); ++ halbtc8723a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, FORCE_EXEC, FALSE, 0xc0); ++} ++ ++VOID ++halbtc8723a2ant_BtInquiryPage( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bLowPwrDisable=TRUE; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++} ++ ++VOID ++halbtc8723a2ant_BtEnableAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE; ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++} ++ ++VOID ++halbtc8723a2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8723a2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ halbtc8723a2ant_BtEnableAction(pBtCoexist); ++ } ++ } ++} ++ ++BOOLEAN ++halbtc8723a2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE; ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ } ++ else ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + Bt idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(!halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + BT idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + Bt connected idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(!halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + Bt connected idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + BT non-idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(halbtc8723a2ant_IsWifiConnectedIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected-idle + BT non-idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + BT non-idle!!\n")); ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ ++ bCommon = FALSE; ++ } ++ ++ return bCommon; ++} ++VOID ++halbtc8723a2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(pCoexDm->bResetTdmaAdjust) ++ { ++ pCoexDm->bResetTdmaAdjust = FALSE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8723a2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8723a2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8723a2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++ ++//PAN(HS) only ++VOID ++halbtc8723a2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8723a2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8723a2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Manual control!!!\n")); ++ return; ++ } ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ if(pCoexSta->bHoldForStackOperation) ++ { ++ // if bt inquiry/page/pair, do not execute. ++ return; ++ } ++ ++ algorithm = halbtc8723a2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bHoldPeriodCnt && (BT_8723A_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex],Hold BT inquiry/page scan setting (cnt = %d)!!\n", ++ pCoexSta->bHoldPeriodCnt)); ++ if(pCoexSta->bHoldPeriodCnt >= 6) ++ { ++ pCoexSta->bHoldPeriodCnt = 0; ++ // next time the coexist parameters should be reset again. ++ } ++ else ++ pCoexSta->bHoldPeriodCnt++; ++ return; ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ if(halbtc8723a2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bResetTdmaAdjust = TRUE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bResetTdmaAdjust = TRUE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8723A_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8723a2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8723a2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8723a2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8723a2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8723a2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8723a2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8723a2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8723a2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8723a2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8723a2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++ } ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8723a2ant_ ++//============================================================ ++VOID ++wa_halbtc8723a2ant_MonitorC2h( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte tmp1b=0x0; ++ u4Byte curC2hTotalCnt=0x0; ++ static u4Byte preC2hTotalCnt=0x0, sameCntPollingTime=0x0; ++ ++ curC2hTotalCnt+=pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_BT_RSP]; ++ ++ if(curC2hTotalCnt == preC2hTotalCnt) ++ { ++ sameCntPollingTime++; ++ } ++ else ++ { ++ preC2hTotalCnt = curC2hTotalCnt; ++ sameCntPollingTime = 0; ++ } ++ ++ if(sameCntPollingTime >= 2) ++ { ++ tmp1b = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x1af); ++ if(tmp1b != 0x0) ++ { ++ pCoexSta->c2hHangDetectCnt++; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x1af, 0x0); ++ } ++ } ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8723a2ant_ ++//============================================================ ++VOID ++EXhalbtc8723a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8723a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u4Byte u4Tmp=0; ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++} ++ ++VOID ++EXhalbtc8723a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8723a2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723a2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "write 0x1af=0x0 num", \ ++ pCoexSta->c2hHangDetectCnt); ++ CL_PRINTF(cliBuf); ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->bCurDecBtPwr, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x783); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x796); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ ++ u1Tmp[0], u1Tmp[1], u1Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x484); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xdac); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hp rx[31:16]/tx[15:0])", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8723a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8723a2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8723a2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, type); ++} ++ ++VOID ++EXhalbtc8723a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = BT_INFO_SRC_8723A_2ANT_BT_RSP; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 0) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8723A_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = ++ pCoexSta->btInfoC2h[rspSource][1]; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][2]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][3]; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8723A_2ANT_B_INQ_PAGE) ++ { ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ } ++ else ++ { ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_StackOperationNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_STACK_OP_INQ_PAGE_PAIR_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], StackOP Inquiry/page/pair start notify\n")); ++ pCoexSta->bHoldForStackOperation = TRUE; ++ pCoexSta->bHoldPeriodCnt = 1; ++ halbtc8723a2ant_BtInquiryPage(pBtCoexist); ++ } ++ else if(BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], StackOP Inquiry/page/pair finish notify\n")); ++ pCoexSta->bHoldForStackOperation = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8723a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8723a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); ++ ++ // work around for c2h hang ++ wa_halbtc8723a2ant_MonitorC2h(pBtCoexist); ++ ++ halbtc8723a2ant_QueryBtInfo(pBtCoexist); ++ halbtc8723a2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8723a2ant_MonitorBtEnableDisable(pBtCoexist); ++ ++ halbtc8723a2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a2Ant.h new file mode 100644 -index 000000000..d5d5488c2 +index 0000000..f0cc8b5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723a2Ant.h @@ -0,0 +1,184 @@ -+//=========================================== -+// The following is for 8723A 2Ant BT Co-exist definition -+//=========================================== -+#define BT_INFO_8723A_2ANT_B_FTP BIT7 -+#define BT_INFO_8723A_2ANT_B_A2DP BIT6 -+#define BT_INFO_8723A_2ANT_B_HID BIT5 -+#define BT_INFO_8723A_2ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8723A_2ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8723A_2ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8723A_2ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8723A_2ANT_B_CONNECTION BIT0 -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT 2 -+ -+typedef enum _BT_INFO_SRC_8723A_2ANT{ -+ BT_INFO_SRC_8723A_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8723A_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8723A_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8723A_2ANT_MAX -+}BT_INFO_SRC_8723A_2ANT,*PBT_INFO_SRC_8723A_2ANT; -+ -+typedef enum _BT_8723A_2ANT_BT_STATUS{ -+ BT_8723A_2ANT_BT_STATUS_IDLE = 0x0, -+ BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8723A_2ANT_BT_STATUS_NON_IDLE = 0x2, -+ BT_8723A_2ANT_BT_STATUS_MAX -+}BT_8723A_2ANT_BT_STATUS,*PBT_8723A_2ANT_BT_STATUS; -+ -+typedef enum _BT_8723A_2ANT_COEX_ALGO{ -+ BT_8723A_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8723A_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8723A_2ANT_COEX_ALGO_HID = 0x2, -+ BT_8723A_2ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8723A_2ANT_COEX_ALGO_PANEDR = 0x4, -+ BT_8723A_2ANT_COEX_ALGO_PANHS = 0x5, -+ BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x6, -+ BT_8723A_2ANT_COEX_ALGO_PANEDR_HID = 0x7, -+ BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8, -+ BT_8723A_2ANT_COEX_ALGO_HID_A2DP = 0x9, -+ BT_8723A_2ANT_COEX_ALGO_MAX -+}BT_8723A_2ANT_COEX_ALGO,*PBT_8723A_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8723A_2ANT{ -+ // fw mechanism -+ BOOLEAN bPreDecBtPwr; -+ BOOLEAN bCurDecBtPwr; -+ //BOOLEAN bPreBtLnaConstrain; -+ //BOOLEAN bCurBtLnaConstrain; -+ //u1Byte bPreBtPsdMode; -+ //u1Byte bCurBtPsdMode; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bResetTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ //BOOLEAN bPreBtAutoReport; -+ //BOOLEAN bCurBtAutoReport; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+} COEX_DM_8723A_2ANT, *PCOEX_DM_8723A_2ANT; -+ -+typedef struct _COEX_STA_8723A_2ANT{ -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ u1Byte preBtRssiState; -+ u1Byte preBtRssiState1; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8723A_2ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_MAX]; -+ BOOLEAN bC2hBtInquiryPage; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ BOOLEAN bHoldForStackOperation; -+ u1Byte bHoldPeriodCnt; -+ // this is for c2h hang work-around -+ u4Byte c2hHangDetectCnt; -+}COEX_STA_8723A_2ANT, *PCOEX_STA_8723A_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8723a2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8723a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723a2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8723a2ant_StackOperationNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723a2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8723A 2Ant BT Co-exist definition ++//=========================================== ++#define BT_INFO_8723A_2ANT_B_FTP BIT7 ++#define BT_INFO_8723A_2ANT_B_A2DP BIT6 ++#define BT_INFO_8723A_2ANT_B_HID BIT5 ++#define BT_INFO_8723A_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8723A_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8723A_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8723A_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8723A_2ANT_B_CONNECTION BIT0 ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT 2 ++ ++typedef enum _BT_INFO_SRC_8723A_2ANT{ ++ BT_INFO_SRC_8723A_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723A_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723A_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723A_2ANT_MAX ++}BT_INFO_SRC_8723A_2ANT,*PBT_INFO_SRC_8723A_2ANT; ++ ++typedef enum _BT_8723A_2ANT_BT_STATUS{ ++ BT_8723A_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723A_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8723A_2ANT_BT_STATUS_MAX ++}BT_8723A_2ANT_BT_STATUS,*PBT_8723A_2ANT_BT_STATUS; ++ ++typedef enum _BT_8723A_2ANT_COEX_ALGO{ ++ BT_8723A_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723A_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723A_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8723A_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723A_2ANT_COEX_ALGO_PANEDR = 0x4, ++ BT_8723A_2ANT_COEX_ALGO_PANHS = 0x5, ++ BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x6, ++ BT_8723A_2ANT_COEX_ALGO_PANEDR_HID = 0x7, ++ BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8, ++ BT_8723A_2ANT_COEX_ALGO_HID_A2DP = 0x9, ++ BT_8723A_2ANT_COEX_ALGO_MAX ++}BT_8723A_2ANT_COEX_ALGO,*PBT_8723A_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8723A_2ANT{ ++ // fw mechanism ++ BOOLEAN bPreDecBtPwr; ++ BOOLEAN bCurDecBtPwr; ++ //BOOLEAN bPreBtLnaConstrain; ++ //BOOLEAN bCurBtLnaConstrain; ++ //u1Byte bPreBtPsdMode; ++ //u1Byte bCurBtPsdMode; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ //BOOLEAN bPreBtAutoReport; ++ //BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++} COEX_DM_8723A_2ANT, *PCOEX_DM_8723A_2ANT; ++ ++typedef struct _COEX_STA_8723A_2ANT{ ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ u1Byte preBtRssiState; ++ u1Byte preBtRssiState1; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8723A_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ BOOLEAN bHoldForStackOperation; ++ u1Byte bHoldPeriodCnt; ++ // this is for c2h hang work-around ++ u4Byte c2hHangDetectCnt; ++}COEX_STA_8723A_2ANT, *PCOEX_STA_8723A_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8723a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8723a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8723a2ant_StackOperationNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b1Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b1Ant.c new file mode 100644 -index 000000000..fbbdfb0cd +index 0000000..265ef13 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b1Ant.c @@ -0,0 +1,5638 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8723B Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8723b1Ant.tmh" -+#endif -+ -+//#include -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8723B_1ANT GLCoexDm8723b1Ant; -+static PCOEX_DM_8723B_1ANT pCoexDm=&GLCoexDm8723b1Ant; -+static COEX_STA_8723B_1ANT GLCoexSta8723b1Ant; -+static PCOEX_STA_8723B_1ANT pCoexSta=&GLCoexSta8723b1Ant; -+static PSDSCAN_STA_8723B_1ANT GLPsdScan8723b1Ant; -+static PPSDSCAN_STA_8723B_1ANT pPsdScan = &GLPsdScan8723b1Ant; -+ -+ -+const char *const GLBtInfoSrc8723b1Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8723b1Ant=20150119; -+u4Byte GLCoexVer8723b1Ant=0x58; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8723b1ant_ -+//============================================================ -+u1Byte -+halbtc8723b1ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8723b1ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8723b1ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+VOID -+halbtc8723b1ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+VOID -+halbtc8723b1ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+VOID -+halbtc8723b1ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8723b1ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType -+ ) -+{ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ halbtc8723b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); -+ break; -+ case 1: // disable cck 1/2 -+ halbtc8723b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ halbtc8723b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); -+ break; -+ default: -+ break; -+ } -+ -+ halbtc8723b1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8723b1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8723b1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+} -+ -+VOID -+halbtc8723b1ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+VOID -+halbtc8723b1ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b1ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp, u1Tmp1; -+ s4Byte wifiRssi; -+ static u4Byte NumOfBtCounterChk = 0; -+ -+ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS -+ //if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) -+ -+ if (pCoexSta->bUnderIps) -+ { -+ //pCoexSta->highPriorityTx = 65535; -+ //pCoexSta->highPriorityRx = 65535; -+ //pCoexSta->lowPriorityTx = 65535; -+ //pCoexSta->lowPriorityRx = 65535; -+ //return; -+ } -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ if( (pCoexSta->lowPriorityTx > 1050) && (!pCoexSta->bC2hBtInquiryPage)) -+ pCoexSta->popEventCnt++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", -+ regHPRx, regHPTx, regLPRx, regLPTx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+ -+ // This part is for wifi FW and driver to update BT's status as disabled. -+ // The flow is as the following -+ // 1. disable BT -+ // 2. if all BT Tx/Rx counter=0, after 6 sec we query bt info -+ // 3. Because BT will not rsp from mailbox, so wifi fw will know BT is disabled -+ // 4. FW will rsp c2h for BT that driver will know BT is disabled. -+ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) -+ { -+ NumOfBtCounterChk++; -+ if (NumOfBtCounterChk == 3) -+{ -+ halbtc8723b1ant_QueryBtInfo(pBtCoexist); -+ } -+ } -+ else -+ { -+ NumOfBtCounterChk = 0; -+ } -+ } -+ -+ -+VOID -+halbtc8723b1ant_MonitorWiFiCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u2Byte u2Tmp[3]; -+ s4Byte wifiRssi=0; -+ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; -+ static u1Byte nCCKLockCounter = 0; -+ u4Byte TotalCnt; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->nCRCOK_CCK = 0; -+ pCoexSta->nCRCOK_11g = 0; -+ pCoexSta->nCRCOK_11n = 0; -+ pCoexSta->nCRCOK_11nAgg = 0; -+ -+ pCoexSta->nCRCErr_CCK = 0; -+ pCoexSta->nCRCErr_11g = 0; -+ pCoexSta->nCRCErr_11n = 0; -+ pCoexSta->nCRCErr_11nAgg = 0; -+ } -+ else -+ { -+ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); -+ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); -+ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); -+ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); -+ -+ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); -+ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); -+ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); -+ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); -+ } -+ -+ -+ //reset counter -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); -+ -+ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) -+ { -+ TotalCnt = pCoexSta->nCRCOK_CCK + pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + -+ pCoexSta->nCRCOK_11nAgg; -+ -+ if ( (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_ACL_BUSY) || -+ (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY) || -+ (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_SCO_BUSY) ) -+ { -+ if (pCoexSta->nCRCOK_CCK >(TotalCnt -pCoexSta->nCRCOK_CCK)) -+ { -+ if (nCCKLockCounter < 3) -+ nCCKLockCounter++; -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ if (!pCoexSta->bPreCCKLock) -+ { -+ -+ if (nCCKLockCounter >= 3) -+ pCoexSta->bCCKLock = TRUE; -+ else -+ pCoexSta->bCCKLock = FALSE; -+ } -+ else -+ { -+ if (nCCKLockCounter == 0) -+ pCoexSta->bCCKLock = FALSE; -+ else -+ pCoexSta->bCCKLock = TRUE; -+ } -+ -+ if (pCoexSta->bCCKLock) -+ pCoexSta->bCCKEverLock = TRUE; -+ -+ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; -+ -+ -+} -+ -+BOOLEAN -+halbtc8723b1ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ -+ -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8723b1ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ pBtLinkInfo->bBtHiPriLinkExist = pCoexSta->bBtHiPriLinkExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+ -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8723b1ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8723B_1ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8723b1ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b1ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8723b1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8723b1ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!") )); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b1ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8723b1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8723b1ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8723b1ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8723b1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8723b1ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+#if BT_8723B_1ANT_ANTDET_ENABLE -+#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE -+ if (pBoardInfo->btdmAntNumByAntDet == 2) -+ { -+ if (type == 3) -+ type = 14; -+ else if (type == 4) -+ type = 13; -+ else if (type == 5) -+ type = 8; -+ } -+#endif -+#endif -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); -+ -+ pCoexSta->nCoexTableType = type; -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 4: -+ if ( pCoexSta->bCCKEverLock) -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); -+ else -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); -+ break; -+ case 5: -+ if ( pCoexSta->bCCKEverLock) -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaa5a5a, 0xaaaa5a5a, 0xffffff, 0x3); -+ else -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 7: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 8: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 9: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 10: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 11: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 12: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 13: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 14: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 15: -+ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8723b1ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b1ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8723b1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8723b1ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8723b1ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8723b1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8723b1ant_SwMechanism( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRA -+ ) -+{ -+ halbtc8723b1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8723b1ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte fwVer=0, u4Tmp=0, cntBtCalChk=0; -+ BOOLEAN bPgExtSwitch=FALSE; -+ BOOLEAN bUseExtSwitch=FALSE; -+ BOOLEAN bIsInMpMode = FALSE; -+ u1Byte H2C_Parameter[2] ={0}, u1Tmp = 0; -+ -+ pCoexDm->curAntPosType = antPosType; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver -+ -+ if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) -+ bUseExtSwitch = TRUE; -+ -+#if BT_8723B_1ANT_ANTDET_ENABLE -+#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE -+ if (antPosType == BTC_ANT_PATH_PTA) -+ { -+ if ((pBoardInfo->btdmAntDetFinish) && (pBoardInfo->btdmAntNumByAntDet == 2)) -+ { -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ antPosType = BTC_ANT_PATH_WIFI; -+ else -+ antPosType = BTC_ANT_PATH_BT; -+ } -+ } -+#endif -+#endif -+ -+ if(bInitHwCfg) -+ { -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi TRx Mask on -+ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. -+ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT TRx Mask on -+ -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to HIGH */ -+ H2C_Parameter[0] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ // set grant_bt to high -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ } -+ //set wlan_act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT -+ -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); -+ } -+ else if(bWifiOff) -+ { -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to HIGH */ -+ H2C_Parameter[0] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ // set grant_bt to high -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ } -+ //set wlan_act to always low -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); -+ if(!bIsInMpMode) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi -+ -+ // 0x4c[24:23]=00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac=0xf002 -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &= ~BIT23; -+ u4Tmp &= ~BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ else -+ { -+ /* Use H2C to set GNT_BT to LOW */ -+ if(fwVer >= 0x180000) -+ { -+ if (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765) != 0) -+ { -+ H2C_Parameter[0] = 0; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ } -+ else -+ { -+ // BT calibration check -+ while(cntBtCalChk <= 20) -+ { -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d); -+ cntBtCalChk++; -+ if(u1Tmp & BIT0) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", cntBtCalChk)); -+ delay_ms(50); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", cntBtCalChk)); -+ break; -+ } -+ } -+ -+ // set grant_bt to PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); -+ } -+ -+ if (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) != 0xc) -+ { -+ //set wlan_act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+ } -+ -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi -+ } -+ -+ if(bUseExtSwitch) -+ { -+ if(bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &=~BIT23; -+ u4Tmp |= BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ //tell firmware "no antenna inverse" -+ H2C_Parameter[0] = 0; -+ H2C_Parameter[1] = 1; //ext switch type -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ else -+ { -+ //tell firmware "antenna inverse" -+ H2C_Parameter[0] = 1; -+ H2C_Parameter[1] = 1; //ext switch type -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ } -+ -+ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType)) -+ { -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_PATH_WIFI: -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); -+ break; -+ case BTC_ANT_PATH_BT: -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); -+ break; -+ default: -+ case BTC_ANT_PATH_PTA: -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); -+ break; -+ } -+ } -+ } -+ else -+ { -+ if(bInitHwCfg) -+ { -+ // 0x4c[23]=1, 0x4c[24]=0 Antenna control by 0x64 -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp |= BIT23; -+ u4Tmp &=~BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ -+ //Fix Ext switch Main->S1, Aux->S0 -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ -+ //tell firmware "no antenna inverse" -+ H2C_Parameter[0] = 0; -+ H2C_Parameter[1] = 0; //internal switch type -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ else -+ { -+ -+ //tell firmware "antenna inverse" -+ H2C_Parameter[0] = 1; -+ H2C_Parameter[1] = 0; //internal switch type -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ } -+ -+ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType)) -+ { -+ // internal switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_PATH_WIFI: -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ else -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); -+ break; -+ case BTC_ANT_PATH_BT: -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); -+ else -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ break; -+ default: -+ case BTC_ANT_PATH_PTA: -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x200); -+ else -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x80); -+ break; -+ } -+ } -+ } -+ -+ pCoexDm->preAntPosType = pCoexDm->curAntPosType; -+} -+ -+VOID -+halbtc8723b1ant_SetAntPathDCut( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAntennaAux, //For 1-Ant--> 1: Antenna at S0, 0: Antenna at S1. Set 0 for 2-Ant -+ IN BOOLEAN bExtSwitch, // 1: Ext Switch (SPDT) exist on module, 0: no Ext Switch (SPDT) exist on module -+ IN BOOLEAN bTwoAntenna, // 1: 2-Antenna, 0:1-Antenna -+ IN u1Byte antennaPos, //Set Antenna Pos, For 1-Ant: BTC_ANT_PATH_WIFI, BTC_ANT_PATH_BT, BTC_ANT_PATH_PTA, For 2-Ant:BTC_ANT_WIFI_AT_MAIN, BTC_ANT_WIFI_AT_Aux -+ IN u1Byte wifiState //BTC_WIFI_STAT_INIT, BTC_WIFI_STAT_IQK, BTC_WIFI_STAT_NORMAL_OFF, BTC_WIFI_STAT_MP_OFF, BTC_WIFI_STAT_NORMAL, BTC_WIFI_STAT_ANT_DIV -+ ) -+{ -+ u1Byte dataLen=5; -+ u1Byte buf[6] = {0}; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set BT Ant, bAntennaAux/bExtSwitch/bTwoAntenna/antennaPos/wifiState=%d/%d/%d/%d/%d\n", -+ bAntennaAux, bExtSwitch, bTwoAntenna, antennaPos, wifiState)); -+ -+ buf[0] = dataLen; -+ -+ if(bAntennaAux) -+ buf[1] = 0x1; -+ -+ if(bExtSwitch) -+ buf[2] = 0x1; -+ -+ if(bTwoAntenna) -+ buf[3] = 0x1; -+ -+ buf[4] = antennaPos; -+ -+ buf[5] = wifiState; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_8723B_ANT, (PVOID)&buf[0]); -+} -+ -+VOID -+halbtc8723b1ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ if(byte1&BIT4 && !(byte1&BIT5)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+ -+VOID -+halbtc8723b1ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; -+ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; -+ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; -+ s1Byte nWiFiDurationAdjust = 0x0; -+ static BOOLEAN bPreWifiBusy=FALSE; -+ -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+#if BT_8723B_1ANT_ANTDET_ENABLE -+#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE -+ if (pBoardInfo->btdmAntNumByAntDet == 2) -+ { -+ if (bTurnOn) -+ type = type +100; //for WiFi RSSI low or BT RSSI low -+ else -+ type = 1; //always translate to TDMA(off,1) for TDMA-off case -+ } -+ -+#endif -+#endif -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if (bWifiBusy != bPreWifiBusy) -+ { -+ bForceExec = TRUE; -+ bPreWifiBusy = bWifiBusy; -+ } -+ -+ if (pCoexDm->bCurPsTdmaOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ -+ if (pCoexSta->nScanAPNum <= 5) -+ { -+ nWiFiDurationAdjust = 5; -+ -+ if (pCoexSta->nA2DPBitPool >= 35) -+ nWiFiDurationAdjust = -10; -+ else if (pCoexSta->nA2DPBitPool >= 45) -+ nWiFiDurationAdjust = -15; -+ } -+ else if (pCoexSta->nScanAPNum >= 40) -+ { -+ nWiFiDurationAdjust = -15; -+ -+ if (pCoexSta->nA2DPBitPool < 35) -+ nWiFiDurationAdjust = -5; -+ else if (pCoexSta->nA2DPBitPool < 45) -+ nWiFiDurationAdjust = -10; -+ } -+ else if (pCoexSta->nScanAPNum >= 20) -+ { -+ nWiFiDurationAdjust = -10; -+ -+ if (pCoexSta->nA2DPBitPool >= 45) -+ nWiFiDurationAdjust = -15; -+ } -+ else -+ { -+ nWiFiDurationAdjust = 0; -+ -+ if (pCoexSta->nA2DPBitPool >= 35) -+ nWiFiDurationAdjust = -10; -+ else if (pCoexSta->nA2DPBitPool >= 45) -+ nWiFiDurationAdjust = -15; -+ } -+ -+ if ((type == 1) || (type == 2) || (type == 9) || (type == 11) || (type == 101) -+ || (type == 102) || (type == 109) || (type == 101)) -+ { -+ if (!pCoexSta->bForceLpsOn) //Native power save TDMA, only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot -+ } -+ else -+ { -+ psTdmaByte0Val = 0x51; //null-pkt -+ psTdmaByte3Val = 0x10; //tx-pause at BT-slot -+ psTdmaByte4Val = 0x50; // 0x778 = d/1 toggle, dynamic slot -+ } -+ } -+ else if ((type == 3) || (type == 13) || (type == 14) || (type == 103) || (type == 113) || (type == 114)) -+ { -+ psTdmaByte0Val = 0x51; //null-pkt -+ psTdmaByte3Val = 0x10; //tx-pause at BT-slot -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot -+#if 0 -+ if (!bWifiBusy) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+#endif -+ } -+ else //native power save case -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ psTdmaByte4Val = 0x11; // 0x778 = d/1 toggle, no dynamic slot -+ //psTdmaByte4Va is not defne for 0x778 = d/1, 1/1 case -+ } -+ -+ //if (pBtLinkInfo->bSlaveRole == TRUE) -+ if ((pBtLinkInfo->bSlaveRole == TRUE) && (pBtLinkInfo->bA2dpExist)) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ -+ if (type > 100) -+ { -+ psTdmaByte0Val = psTdmaByte0Val | 0x82; //set antenna control by SW -+ psTdmaByte3Val = psTdmaByte3Val | 0x60; //set antenna no toggle, control by antenna diversity -+ } -+ -+ -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ default: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); -+ break; -+ case 1: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 2: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 3: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 4: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); -+ break; -+ case 5: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 6: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 7: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); -+ break; -+ case 8: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 9: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 10: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); -+ break; -+ case 11: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 12: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); -+ break; -+ case 13: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 14: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 15: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); -+ break; -+ case 16: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); -+ break; -+ case 18: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 20: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 21: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); -+ break; -+ case 22: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 23: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); -+ break; -+ case 24: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); -+ break; -+ case 25: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 26: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 27: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); -+ break; -+ case 28: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); -+ break; -+ case 29: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); -+ break; -+ case 30: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); -+ break; -+ case 31: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); -+ break; -+ case 32: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 33: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, 0x10); -+ break; -+ case 34: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 35: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 36: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); -+ break; -+ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving -+ /* here softap mode screen off will cost 70-80mA for phone */ -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); -+ break; -+ -+ //for 1-Ant translate to 2-Ant -+ case 101: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 102: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 103: -+ //halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 105: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 106: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); -+ break; -+ case 109: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 111: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 113: -+ //halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 114: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 120: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 122: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); -+ break; -+ case 132: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 133: -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x11); -+ break; -+ -+ } -+ } -+ else -+ { -+ -+ // disable PS tdma -+ switch(type) -+ { -+ case 8: //PTA Control -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 0: -+ default: //Software control, Antenna at BT side -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 1: // 2-Ant, 0x778=3, antenna control by antenna diversity -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); -+ break; -+#if 0 -+ case 9: //Software control, Antenna at WiFi side -+ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_WIFI, BTC_WIFI_STAT_NORMAL); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); -+ break; -+#endif -+ } -+ } -+ rssiAdjustVal =0; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", -+ pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67))); -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+BOOLEAN -+halbtc8723b1ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected && -+ BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); -+ -+ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ -+ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); -+ -+ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ -+ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); -+ -+ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if (bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ } -+ -+ bCommon = FALSE; -+ } -+ -+ return bCommon; -+} -+ -+ -+VOID -+halbtc8723b1ant_TdmaDurationAdjustForAcl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0, btInfoExt; -+ static BOOLEAN bPreWifiBusy=FALSE; -+ BOOLEAN bWifiBusy = FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); -+ -+ if(BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) -+ bWifiBusy = TRUE; -+ else -+ bWifiBusy = FALSE; -+ -+ if( (BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || -+ (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || -+ (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) -+ { -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 3 && -+ pCoexDm->curPsTdma != 9 ) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ return; -+ } -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) -+ retryCount++; -+ -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ if(result == -1) -+ { -+/* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else */ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ else if(result == 1) -+ { -+/* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else */ if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ } -+ else //no change -+ { -+ /* Bryant Modify -+ if(bWifiBusy != bPreWifiBusy) //if busy / idle change -+ { -+ bPreWifiBusy = bWifiBusy; -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); -+ } -+ */ -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 9 && -+ pCoexDm->curPsTdma != 11 ) -+ { -+ // recover to previous adjust type -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ } -+} -+ -+VOID -+halbtc8723b1ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8723b1ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8723b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8723b1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8723b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiOnly( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+} -+ -+VOID -+halbtc8723b1ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ -+ bPreBtDisabled = bBtDisabled; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ if(bBtDisabled) -+ { -+ halbtc8723b1ant_ActionWifiOnly(pBtCoexist); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ } -+ } -+} -+ -+//============================================= -+// -+// Software Coex Mechanism start -+// -+//============================================= -+ -+// SCO only or SCO+PAN(HS) -+ -+/* -+VOID -+halbtc8723b1ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+ -+VOID -+halbtc8723b1ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8723b1ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8723b1ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8723b1ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(HS) only -+VOID -+halbtc8723b1ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8723b1ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8723b1ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8723b1ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+VOID -+halbtc8723b1ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+*/ -+ -+//============================================= -+// -+// Non-Software Coex Mechanism start -+// -+//============================================= -+VOID -+halbtc8723b1ant_ActionBtWhckTest( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8723b1ant_ActionHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8723b1ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ if ( (!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask) ) -+ { -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) -+ { -+ // SCO/HID/A2DP busy -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ if (pCoexSta->bC2hBtRemoteNameReq) -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); -+ else -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if ( (pBtLinkInfo->bPanExist) || (bWifiBusy) ) -+ { -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ if (pCoexSta->bC2hBtRemoteNameReq) -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); -+ else -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionBtScoHidOnlyBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ // tdma and coex table -+ -+ if(pBtLinkInfo->bScoExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else //HID -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiConnectedBtAclBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ u1Byte btRssiState; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ btRssiState = halbtc8723b1ant_BtRssiState(2, 28, 0); -+ -+ if ( (pCoexSta->lowPriorityRx >= 950) && (!pCoexSta->bUnderIps) ) -+ { -+ pBtLinkInfo->bSlaveRole = TRUE; -+ } -+ else -+ { -+ pBtLinkInfo->bSlaveRole = FALSE; -+ } -+ -+ if(pBtLinkInfo->bHidOnly) //HID -+ { -+ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ return; -+ } -+ else if(pBtLinkInfo->bA2dpOnly) //A2DP -+ { -+ if(BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ halbtc8723b1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ } -+ } -+ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || -+ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ //BT no-profile busy (0x9) -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiNotConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // power save state -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiNotConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiNotConnectedAssoAuth( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bPanExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); -+ } -+ else -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiConnectedSpecialPacket( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiBusy = FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ //no special packet process for both WiFi and BT very busy -+ if ((bWifiBusy) && ((pBtLinkInfo->bPanExist) || (pCoexSta->nNumOfProfile >= 2))) -+ return; -+ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist)) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8723b1ant_ActionWifiConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiBusy=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; -+ u4Byte wifiBw; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ if(bUnder4way) -+ { -+ halbtc8723b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ if(bScan || bLink || bRoam) -+ { -+ if(bScan) -+ halbtc8723b1ant_ActionWifiConnectedScan(pBtCoexist); -+ else -+ halbtc8723b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ // power save state -+ if(!bApEnable && BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) -+ { -+ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP -+ { -+ if(!bWifiBusy) -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else //busy -+ { -+ if (pCoexSta->nScanAPNum >= BT_8723B_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA -+ { -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ } -+ } -+ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ else -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(!bWifiBusy) -+ { -+ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8723b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ else -+ { -+ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8723b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else -+ { -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+} -+ -+VOID -+halbtc8723b1ant_RunSwCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte algorithm=0; -+ -+ algorithm = halbtc8723b1ant_ActionAlgorithm(pBtCoexist); -+ pCoexDm->curAlgorithm = algorithm; -+ -+ if(halbtc8723b1ant_IsCommonAction(pBtCoexist)) -+ { -+ -+ } -+ else -+ { -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8723B_1ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); -+ //halbtc8723b1ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); -+ //halbtc8723b1ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); -+ //halbtc8723b1ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); -+ //halbtc8723b1ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); -+ //halbtc8723b1ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); -+ //halbtc8723b1ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); -+ //halbtc8723b1ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); -+ //halbtc8723b1ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); -+ //halbtc8723b1ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8723B_1ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); -+ //halbtc8723b1ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); -+ //halbtc8723b1ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8723b1ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiBusy = FALSE; -+ BOOLEAN bIncreaseScanDevNum=FALSE; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ BOOLEAN bMiracastPlusBt=FALSE; -+ u1Byte aggBufSize=5; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0, wifiBw; -+ u1Byte iotPeer=BTC_IOT_PEER_UNKNOWN; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ if(pCoexSta->bBtWhckTest) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); -+ halbtc8723b1ant_ActionBtWhckTest(pBtCoexist); -+ return; -+ } -+ -+ if( (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bIncreaseScanDevNum = TRUE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); -+ -+ if(pBtLinkInfo->bBtLinkExist) -+ { -+ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ bMiracastPlusBt = TRUE; -+ } -+ else -+ { -+ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ bMiracastPlusBt = FALSE; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ -+ if (( (pBtLinkInfo->bA2dpExist) || (bWifiBusy) ) && (pCoexSta->bC2hBtInquiryPage) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); -+ } -+ else -+ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); -+ -+ return; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) -+ { -+ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_IOT_PEER, &iotPeer); -+ -+ if(BTC_IOT_PEER_CISCO != iotPeer) -+ { -+ if(pBtLinkInfo->bScoExist)//if (pBtLinkInfo->bBtHiPriLinkExist) -+ //halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); -+ else -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); -+ //halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ } -+ else -+ { -+ if(pBtLinkInfo->bScoExist) -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); -+ else -+ { -+ if (BTC_WIFI_BW_HT40==wifiBw) -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x10); -+ else -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ } -+ } -+ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); -+ halbtc8723b1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message -+ } -+ else -+ { -+ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); -+ -+ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+ halbtc8723b1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8723b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ -+ if(!bWifiConnected) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ if (bScan) -+ halbtc8723b1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ else -+ halbtc8723b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else -+ halbtc8723b1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else // wifi LPS/Busy -+ { -+ halbtc8723b1ant_ActionWifiConnected(pBtCoexist); -+ } -+} -+ -+u4Byte -+halbtc8723b1ant_PSD_Log2Base( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val -+ -+ ) -+{ -+ u1Byte i,j; -+ u4Byte tmp, tmp2, val_integerdB=0, tindex, shiftcount=0; -+ u4Byte result,val_fractiondB=0,Table_fraction[21]= {0,432, 332, 274, 232, 200, -+ 174, 151,132,115,100,86,74,62,51,42, -+ 32,23,15,7,0}; -+ -+ if (val == 0) -+ return 0; -+ -+ tmp = val; -+ -+ while(1) -+ { -+ if (tmp == 1) -+ break; -+ else -+ { -+ tmp = (tmp >> 1); -+ shiftcount++; -+ } -+ } -+ -+ -+ val_integerdB = shiftcount+1; -+ -+ tmp2=1; -+ for (j=1; j<= val_integerdB;j++) -+ tmp2 = tmp2*2; -+ -+ tmp = (val*100) /tmp2; -+ tindex = tmp/5; -+ -+ if (tindex > 20) -+ tindex = 20; -+ -+ val_fractiondB = Table_fraction[tindex]; -+ -+ result = val_integerdB*100 - val_fractiondB; -+ -+ return (result); -+ -+ -+} -+ -+VOID -+halbtc8723b1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ -+ // sw all off -+ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ //halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ //halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ pCoexSta->popEventCnt = 0; -+} -+ -+VOID -+halbtc8723b1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0;//, fwVer; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0, u1Tmpa=0, u1Tmpb=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); -+ -+ pPsdScan->nAntDet_IsAntDetAvailable = FALSE; -+ -+ //0xf0[15:12] --> Chip Cut information -+ pCoexSta->nCutVersion = (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xf1) & 0xf0) >> 4; -+ -+#if 0//move to BTC_MEDIA_CONNECT -+ if(bBackUp) -+ { -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+#endif -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x550, 0x8, 0x1); //enable TBTT nterrupt -+ -+ // 0x790[5:0]=0x5 -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, 0x5); -+ -+ // Enable counter statistics -+ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); -+ -+ -+ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi -+ -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ -+ //Antenna config -+ if(bWifiOnly) -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FORCE_EXEC, TRUE, FALSE); -+ else -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, TRUE, FALSE); -+ -+#if 0 -+ if(bWifiOnly) -+ { -+ halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_WIFI, BTC_WIFI_STAT_INIT); -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ } -+ else -+ halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_INIT); -+#endif -+ -+ -+ -+ // PTA parameter -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+} -+ -+ -+ -+ -+ -+VOID -+halbtc8723b1ant_MechanismSwitch( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwitchTo2Antenna -+ ) -+{ -+ -+ if (bSwitchTo2Antenna) // 1-Ant -> 2-Ant -+ { -+ //un-lock TRx Mask setup for 8723b f-cut -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x1); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x1); -+ //WiFi TRx Mask on -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ //BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c45); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c45); -+ -+ //BT TRx Mask on -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x1); -+ -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, FALSE); -+ } -+ else -+ { -+ //WiFi TRx Mask on -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); -+ -+ //lock TRx Mask setup for 8723b f-cut -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x0); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x0); -+ -+ //BT TRx Mask on -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); -+ -+ //BT TRx Mask ock 0x2c[0], 0x30[0] = 0 -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c44); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c44); -+ -+ -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ } -+ -+} -+ -+ -+ -+ -+VOID -+halbtc8723b1ant_PSD_ShowAntennaDetectResult( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n============[Antenna Detection info] ============\n"); -+ CL_PRINTF(cliBuf); -+ -+ if (pPsdScan->nAntDet_Result == 1) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)", "Ant Det Result", "2-Antenna (Bad-Isolation)", -+ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION); -+ else if (pPsdScan->nAntDet_Result == 2) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)", "Ant Det Result", "2-Antenna (Good-Isolation)", -+ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION+pPsdScan->nAntDet_ThresOffset, BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)", "Ant Det Result", "1-Antenna", -+ BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT, BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION+pPsdScan->nAntDet_ThresOffset); -+ -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ", "Antenna Detection Finish", -+ (pBoardInfo->btdmAntDetFinish? "Yes":"No")); -+ CL_PRINTF(cliBuf); -+ -+ switch(pPsdScan->nAntDet_Result) -+ { -+ case 0: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is not available)"); -+ break; -+ case 1: // 2-Ant bad-isolation -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is available)"); -+ break; -+ case 2: // 2-Ant good-isolation -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is available)"); -+ break; -+ case 3: // 1-Ant -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is available)"); -+ break; -+ case 4: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Uncertainty result)"); -+ break; -+ case 5: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)"); -+ break; -+ case 6: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(WiFi is Scanning)"); -+ break; -+ case 7: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is not idle)"); -+ break; -+ case 8: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Abort by WiFi Scanning)"); -+ break; -+ case 9: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Antenna Init is not ready)"); -+ break; -+ case 10: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is Inquiry or page)"); -+ break; -+ case 11: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is Disabled)"); -+ break; -+} -+ CL_PRINTF(cliBuf); -+ -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Ant Detect Total Count",pPsdScan->bAntDet_TryCount); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Ant Detect Fail Count",pPsdScan->bAntDet_FailCount); -+ CL_PRINTF(cliBuf); -+ -+ if ( (!pBoardInfo->btdmAntDetFinish) && (pPsdScan->nAntDet_Result != 5) ) -+ return; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",(pPsdScan->nAntDet_Result? "ok":"fail")); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time", pPsdScan->nAntDet_BTTxTime); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch", pPsdScan->nAntDet_BTLEChannel); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "WiFi PSD Cent-Ch/Offset/Span", -+ pPsdScan->nRealCentFreq, pPsdScan->nRealOffset, pPsdScan->nRealSpan); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB", "PSD Pre-Scan Peak Value", pPsdScan->nAntDet_PrePSDScanPeakVal/100); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)", "PSD Pre-Scan result", -+ (pPsdScan->nAntDet_Result != 5? "ok":"fail"), BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset); -+ CL_PRINTF(cliBuf); -+ -+ if (pPsdScan->nAntDet_Result == 5) -+ return; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB", "PSD Scan Peak Value", pPsdScan->nAntDet_PeakVal); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz", "PSD Scan Peak Freq", pPsdScan->nAntDet_PeakFreq); -+ CL_PRINTF(cliBuf); -+ -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package", -+ (pBoardInfo->bTfbgaPackage)? "Yes":"No"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "PSD Threshold Offset", pPsdScan->nAntDet_ThresOffset); -+ CL_PRINTF(cliBuf); -+ -+} -+ -+VOID -+halbtc8723b1ant_PSD_ShowData( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u4Byte nDeltaFreqPerPoint; -+ u4Byte freq,freq1,freq2,n=0,i=0, j=0, m=0, PsdRep1, PsdRep2; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n\n============[PSD info] (%d)============\n", -+ pPsdScan->nPSDGenCount); -+ CL_PRINTF(cliBuf); -+ -+ if (pPsdScan->nPSDGenCount == 0) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n No Data !!\n"); -+ CL_PRINTF(cliBuf); -+ return; -+ } -+ -+ if (pPsdScan->nPSDPoint == 0) -+ nDeltaFreqPerPoint = 0; -+ else -+ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; -+ -+ //if (pPsdScan->bIsPSDShowMaxOnly) -+ if (0) -+ { -+ PsdRep1 = pPsdScan->nPSDMaxValue/100; -+ PsdRep2 = pPsdScan->nPSDMaxValue - PsdRep1 * 100; -+ -+ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + pPsdScan->nPSDMaxValuePoint * nDeltaFreqPerPoint); -+ freq1 = freq/1000000; -+ freq2 = freq/1000 - freq1 * 1000; -+ -+ if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.0%d MHz", -+ freq1, freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.%d MHz", -+ freq1, freq2); -+ -+ if (PsdRep2 < 10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.0%d dB, (%d) \n", -+ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.%d dB, (%d)\n", -+ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); -+ -+ CL_PRINTF(cliBuf); -+ } -+ else -+ { -+ m = pPsdScan->nPSDStartPoint; -+ n = pPsdScan->nPSDStartPoint; -+ i = 1; -+ j = 1; -+ -+ while(1) -+ { -+ do -+ { -+ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + m * nDeltaFreqPerPoint); -+ freq1 = freq/1000000; -+ freq2 = freq/1000 - freq1 * 1000; -+ -+ if (i ==1) -+ { -+ if (freq2 == 0) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.000", freq1); -+ else if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.0%2d", freq1,freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.%3d", freq1,freq2); -+ } -+ else if ( (i%8 == 0) || (m == pPsdScan->nPSDStopPoint) ) -+ { -+ if (freq2 == 0) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000\n", freq1); -+ else if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d\n", freq1,freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d\n", freq1,freq2); -+ } -+ else -+ { -+ if (freq2 == 0) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000", freq1); -+ else if (freq2 < 100) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d", freq1,freq2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d", freq1,freq2); -+ } -+ -+ i++; -+ m++; -+ CL_PRINTF(cliBuf); -+ -+ }while( (i <= 8) && (m <= pPsdScan->nPSDStopPoint)); -+ -+ -+ do -+ { -+ PsdRep1 = pPsdScan->nPSDReport_MaxHold[n]/100; -+ PsdRep2 = pPsdScan->nPSDReport_MaxHold[n] - PsdRep1 * 100; -+ -+ if (j ==1) -+ { -+ if (PsdRep2 <10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.0%d", PsdRep1,PsdRep2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.%d", PsdRep1,PsdRep2); -+ } -+ else if ( (j%8 == 0) || (n == pPsdScan->nPSDStopPoint) ) -+ { -+ if (PsdRep2 <10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d\n", PsdRep1,PsdRep2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d\n", PsdRep1,PsdRep2); -+ } -+ else -+ { -+ if (PsdRep2 <10) -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d", PsdRep1,PsdRep2); -+ else -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d", PsdRep1,PsdRep2); -+ } -+ -+ j++; -+ n++; -+ CL_PRINTF(cliBuf); -+ -+ } while( (j <= 8) && (n <= pPsdScan->nPSDStopPoint)); -+ -+ if ( (m > pPsdScan->nPSDStopPoint) || (n > pPsdScan->nPSDStopPoint) ) -+ break; -+ else -+ { -+ i = 1; -+ j = 1; -+ } -+ -+ } -+ } -+ -+ -+} -+ -+VOID -+halbtc8723b1ant_PSD_MaxHoldData( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte GenCount -+ ) -+{ -+ u4Byte i=0, i_max=0, val_max=0, j; -+ -+ if (GenCount== 1) -+ { -+ memcpy(pPsdScan->nPSDReport_MaxHold, pPsdScan->nPSDReport, BT_8723B_1ANT_ANTDET_PSD_POINTS*sizeof(u4Byte)); -+ -+ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); -+ } -+ -+ pPsdScan->nPSDMaxValuePoint = 0; -+ pPsdScan->nPSDMaxValue = 0; -+ -+ } -+ else -+ { -+ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) -+ { -+ if (pPsdScan->nPSDReport[i] > pPsdScan->nPSDReport_MaxHold[i]) -+ pPsdScan->nPSDReport_MaxHold[i] = pPsdScan->nPSDReport[i]; -+ -+ //search Max Value -+ if (i ==pPsdScan->nPSDStartPoint ) -+ { -+ i_max = i; -+ val_max = pPsdScan->nPSDReport_MaxHold[i]; -+ } -+ else -+ { -+ if (pPsdScan->nPSDReport_MaxHold[i] > val_max) -+ { -+ i_max = i; -+ val_max = pPsdScan->nPSDReport_MaxHold[i]; -+ } -+ } -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); -+ -+ } -+ -+ pPsdScan->nPSDMaxValuePoint = i_max; -+ pPsdScan->nPSDMaxValue = val_max; -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i_Max = %d, PSDReport_Max = %d dB\n", pPsdScan->nPSDMaxValuePoint -+ // ,pPsdScan->nPSDMaxValue)); -+ } -+ -+ -+} -+ -+u4Byte -+halbtc8723b1ant_PSD_GetData( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte nPoint -+ ) -+{ -+ //reg 0x808[9:0]: FFT data x -+ //reg 0x808[22]: 0-->1 to get 1 FFT data y -+ //reg 0x8b4[15:0]: FFT data y report -+ -+ u4Byte val = 0, psd_report =0; -+ -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); -+ -+ val &= 0xffbffc00; -+ val |= nPoint; -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); -+ -+ val |= 0x00400000; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); -+ -+ -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x8b4); -+ -+ psd_report = val & 0x0000ffff; -+ -+ return psd_report; -+} -+ -+ -+VOID -+halbtc8723b1ant_PSD_SweepPoint( -+IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN s4Byte offset, -+ IN u4Byte span, -+ IN u4Byte points, -+ IN u4Byte avgnum -+ ) -+{ -+ u4Byte i,val,n,k=0; -+ u4Byte nPoints=0, psd_report=0; -+ u4Byte nStartP=0, nStopP=0, nDeltaFreqPerPoint=156250; -+ u4Byte nPSDCenterFreq=20*10^6, freq,freq1,freq2; -+ BOOLEAN outloop = FALSE; -+ u1Byte flag = 0; -+ u4Byte tmp, PsdRep1, PsdRep2; -+ u4Byte WiFi_OriginalChannel = 1; -+ -+ pPsdScan->bIsPSDRunning = TRUE; -+ -+ do -+ { -+ switch(flag) -+ { -+ case 0: //Get PSD parameters -+ default: -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), centFreq=0x%x, offset=0x%x, span=0x%x\n", -+ // centFreq, offset, span)); -+ -+ pPsdScan->nPSDBandWidth = 40*1000000; -+ pPsdScan->nPSDPoint = points; -+ pPsdScan->nPSDStartBase = points/2; -+ pPsdScan->nPSDAvgNum = avgnum; -+ pPsdScan->nRealCentFreq = centFreq; -+ pPsdScan->nRealOffset = offset; -+ pPsdScan->nRealSpan = span; -+ -+ -+ nPoints = pPsdScan->nPSDPoint; -+ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; -+ -+ //PSD point setup -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); -+ val &= 0xffff0fff; -+ -+ switch(pPsdScan->nPSDPoint) -+ { -+ case 128: -+ val |= 0x0; -+ break; -+ case 256: -+ default: -+ val |=0x00004000; -+ break; -+ case 512: -+ val |= 0x00008000; -+ break; -+ case 1024: -+ val |= 0x0000c000; -+ break; -+ } -+ -+ switch(pPsdScan->nPSDAvgNum) -+ { -+ case 1: -+ val |= 0x0; -+ break; -+ case 8: -+ val |=0x00001000; -+ break; -+ case 16: -+ val |= 0x00002000; -+ break; -+ case 32: -+ default: -+ val |= 0x00003000; -+ break; -+ } -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD BW= %d, DeltaFreq=%d\n" -+ // , pPsdScan->nPSDBandWidth, nDeltaFreqPerPoint)); -+ flag = 1; -+ break; -+ case 1: //calculate the PSD point index from freq/offset/span -+ nPSDCenterFreq = pPsdScan->nPSDBandWidth /2 +offset*(1000000); -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD Center Freq = %d\n", (centFreq + offset))); -+ -+ nStartP = pPsdScan->nPSDStartBase + (nPSDCenterFreq - span *(1000000)/2) /nDeltaFreqPerPoint; -+ pPsdScan->nPSDStartPoint = nStartP - pPsdScan->nPSDStartBase; -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Start PSD Poin Matrix Index = %d\n", pPsdScan->nPSDStartPoint)); -+ -+ nStopP = pPsdScan->nPSDStartBase + (nPSDCenterFreq + span *(1000000)/2) /nDeltaFreqPerPoint; -+ pPsdScan->nPSDStopPoint = nStopP - pPsdScan->nPSDStartBase-1; -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Stop PSD Poin Matrix Index = %d\n",pPsdScan->nPSDStopPoint)); -+ -+ flag = 2; -+ break; -+ case 2: //set RF channel/BW/Mode -+ -+ //set 3-wire off -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); -+ val |= 0x00300000; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); -+ -+ //CCK off -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); -+ val &= 0xfeffffff; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); -+ -+ //store WiFi original channel -+ WiFi_OriginalChannel = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff); -+ -+ //Set RF channel -+ if (centFreq == 2484) -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, 0xe); -+ else -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, (centFreq-2412)/5 + 1); //WiFi TRx Mask on -+ -+ //Set RF mode = Rx, RF Gain = 0x8a0 -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x0, 0xfffff, 0x308a0); -+ -+ //Set RF Rx filter corner -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x3e4); -+ -+ //Set TRx mask off -+ //un-lock TRx Mask setup -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x1); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x1); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ flag = 3; -+ break; -+ case 3: -+ memset(pPsdScan->nPSDReport,0, pPsdScan->nPSDPoint*sizeof(u4Byte)); -+ nStartP = pPsdScan->nPSDStartPoint + pPsdScan->nPSDStartBase; -+ nStopP = pPsdScan->nPSDStopPoint + pPsdScan->nPSDStartBase + 1; -+ -+ i = nStartP; -+ -+ while (i < nStopP) -+ { -+ if (i >= nPoints) -+ { -+ psd_report = halbtc8723b1ant_PSD_GetData(pBtCoexist,i-nPoints); -+ } -+ else -+ { -+ psd_report = halbtc8723b1ant_PSD_GetData(pBtCoexist,i); -+ } -+ -+ if (psd_report == 0) -+ tmp = 0; -+ else -+ //tmp = 20*log10((double)psd_report); -+ //20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 -+ tmp = 6 * halbtc8723b1ant_PSD_Log2Base(pBtCoexist, psd_report); -+ -+ n = i-pPsdScan->nPSDStartBase; -+ pPsdScan->nPSDReport[n] = tmp; -+ PsdRep1 = pPsdScan->nPSDReport[n] /100; -+ PsdRep2 = pPsdScan->nPSDReport[n] - PsdRep1 * 100; -+ -+ freq = ((centFreq-20) * 1000000 + n * nDeltaFreqPerPoint); -+ freq1 = freq/1000000; -+ freq2 = freq/1000 - freq1 * 1000; -+/* -+ if (freq2 < 100) -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.0%d MHz)", n, freq1, freq2)); -+ else -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.%d MHz)", n, freq1, freq2)); -+ -+ if (PsdRep2 < 10) -+ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.0%d dB)\n",psd_report, PsdRep1, PsdRep2)); -+ else -+ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.%d dB)\n",psd_report, PsdRep1,PsdRep2)); -+*/ -+ i++; -+ -+ k=0; -+ -+ //Add Delay between PSD point -+ while(1) -+ { -+ if (k++ > 20000) -+ break; -+ } -+ -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint()==============\n")); -+ } -+ -+ flag = 100; -+ break; -+ case 99: //error -+ -+ outloop = TRUE; -+ break; -+ case 100: //recovery -+ -+ //set 3-wire on -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); -+ val &=0xffcfffff; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); -+ -+ //CCK on -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); -+ val |= 0x01000000; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); -+ -+ //PSD off -+ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); -+ val &=0xffbfffff; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x808,val); -+ -+ //TRx Mask on -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); -+ -+ //lock TRx Mask setup -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x0); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x0); -+ -+ //Set RF Rx filter corner -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x0); -+ -+ //restore WiFi original channel -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, WiFi_OriginalChannel); -+ -+ outloop = TRUE; -+ break; -+ -+ } -+ -+ }while (!outloop); -+ -+ -+ -+ pPsdScan->bIsPSDRunning = FALSE; -+ -+ -+} -+ -+VOID -+halbtc8723b1ant_PSD_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte BTTxTime, -+ IN u4Byte BTLEChannel -+ ) -+{ -+ u4Byte realseconds = 0, i=0, j=0; -+ u4Byte WLPSD_CentFreq = 2484, WLPSD_Span = 2, WLPSD_SweepCount = 50; -+ s4Byte WLPSD_Offset = -4; -+ u1Byte BTLECh[13] = {3,6,8,11,13,16,18,21,23,26,28,31,33}; -+ -+ u1Byte H2C_Parameter[3] ={0},u1Tmpa,u1Tmpb; -+ -+ u1Byte state=0; -+ BOOLEAN outloop = FALSE, BTResp = FALSE, bScan ,bRoam; -+ u4Byte freq,freq1,freq2,PsdRep1, PsdRep2, nDeltaFreqPerPoint,u4Tmp; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ memset(pPsdScan->nAntDet_PeakVal, 0, 16*sizeof(UCHAR)); -+ memset(pPsdScan->nAntDet_PeakFreq, 0, 16*sizeof(UCHAR)); -+ -+ if (pBoardInfo->bTfbgaPackage) //for TFBGA -+ pPsdScan->nAntDet_ThresOffset = 5; -+ else -+ pPsdScan->nAntDet_ThresOffset = 0; -+ -+ do -+ { -+ switch(state) -+ { -+ case 0: -+ if (BTLEChannel == 39) -+ WLPSD_CentFreq = 2484; -+ else -+ { -+ for (i=1; i<=13; i++) -+ { -+ if (BTLECh[i-1] == BTLEChannel) -+ { -+ WLPSD_CentFreq = 2412 + (i-1) * 5; -+ break; -+ } -+ } -+ -+ if (i == 14) -+ { -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ", BTLEChannel)); -+ outloop = TRUE; -+ break; -+ } -+ } -+ -+ WLPSD_SweepCount = BTTxTime * 238 /100; //BTTxTime/0.42 -+ -+ if (WLPSD_SweepCount % 5 != 0) -+ WLPSD_SweepCount = (WLPSD_SweepCount/5 + 1) * 5; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d, BT_LECh = %d\n", BTTxTime, BTLEChannel)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), WLPSD_CentFreq=%d, WLPSD_Offset = %d, WLPSD_Span = %d, WLPSD_SweepCount = %d\n", -+ WLPSD_CentFreq, WLPSD_Offset, WLPSD_Span,WLPSD_SweepCount)); -+ -+ state = 1; -+ break; -+ case 1: //stop coex DM & set antenna path -+ //Stop Coex DM -+ pBtCoexist->bStopCoexDm = TRUE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n")); -+ -+ //set native power save -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ //Set TDMA off, -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ -+ //Set coex table -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n")); -+ } -+ -+ //Set Antenna path, switch WiFi to un-certain antenna port -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, FALSE); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n")); -+ -+ //Set AFH mask on at WiFi channel 2472MHz +/- 10MHz -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = 0xd; -+ H2C_Parameter[2] = 0x14; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n", -+ H2C_Parameter[1],H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x778=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+ -+ state =2; -+ break; -+ case 2: //Pre-sweep background psd -+ for (pPsdScan->nPSDGenCount=1; pPsdScan->nPSDGenCount<=3; pPsdScan->nPSDGenCount++) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), PSDGenCount = %d\n ", pPsdScan->nPSDGenCount)); -+ halbtc8723b1ant_PSD_SweepPoint(pBtCoexist, WLPSD_CentFreq, WLPSD_Offset, WLPSD_Span, BT_8723B_1ANT_ANTDET_PSD_POINTS, BT_8723B_1ANT_ANTDET_PSD_AVGNUM); -+ halbtc8723b1ant_PSD_MaxHoldData(pBtCoexist, pPsdScan->nPSDGenCount); -+ } -+ -+ pPsdScan->nAntDet_PrePSDScanPeakVal = pPsdScan->nPSDMaxValue; -+ -+ if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset)*100) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n", -+ pPsdScan->nPSDMaxValue/100, BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset)); -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pBoardInfo->btdmAntNumByAntDet = 1; -+ pPsdScan->nAntDet_Result = 5; -+ state = 99; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n", -+ pPsdScan->nPSDMaxValue/100, BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset)); -+ state = 3; -+ } -+ break; -+ case 3: -+ BTResp = pBtCoexist->fBtcSetBtAntDetection(pBtCoexist, (u1Byte)(BTTxTime&0xff), (u1Byte)(BTLEChannel&0xff)); -+ -+ for (pPsdScan->nPSDGenCount=1; pPsdScan->nPSDGenCount<=WLPSD_SweepCount; pPsdScan->nPSDGenCount++) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), PSDGenCount = %d\n ", pPsdScan->nPSDGenCount)); -+ halbtc8723b1ant_PSD_SweepPoint(pBtCoexist, WLPSD_CentFreq, WLPSD_Offset, WLPSD_Span, BT_8723B_1ANT_ANTDET_PSD_POINTS, BT_8723B_1ANT_ANTDET_PSD_AVGNUM); -+ halbtc8723b1ant_PSD_MaxHoldData(pBtCoexist, pPsdScan->nPSDGenCount); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if (bScan ||bRoam) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pBoardInfo->btdmAntNumByAntDet = 1; -+ pPsdScan->nAntDet_Result = 8; -+ state = 99; -+ break; -+ } -+ } -+ -+ pPsdScan->nAntDet_PSDScanPeakVal = pPsdScan->nPSDMaxValue; -+ pPsdScan->nAntDet_PSDScanPeakFreq = pPsdScan->nPSDMaxValuePoint; -+ state = 4; -+ break; -+ case 4: -+ -+ if (pPsdScan->nPSDPoint == 0) -+ nDeltaFreqPerPoint = 0; -+ else -+ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; -+ -+ PsdRep1 = pPsdScan->nPSDMaxValue/100; -+ PsdRep2 = pPsdScan->nPSDMaxValue - PsdRep1 * 100; -+ -+ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + pPsdScan->nPSDMaxValuePoint * nDeltaFreqPerPoint); -+ freq1 = freq/1000000; -+ freq2 = freq/1000 - freq1 * 1000; -+ -+ if (freq2 < 100) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz", freq1, freq2)); -+ CL_SPRINTF(pPsdScan->nAntDet_PeakFreq, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.0%d", freq1,freq2); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz", freq1, freq2)); -+ CL_SPRINTF(pPsdScan->nAntDet_PeakFreq, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.%d", freq1,freq2); -+ } -+ -+ if (PsdRep2 < 10) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, (", Value = %d.0%d dB\n", PsdRep1, PsdRep2)); -+ CL_SPRINTF(pPsdScan->nAntDet_PeakVal, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.0%d", PsdRep1,PsdRep2); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, (", Value = %d.%d dB\n",PsdRep1, PsdRep2)); -+ CL_SPRINTF(pPsdScan->nAntDet_PeakVal, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.%d", PsdRep1,PsdRep2); -+ } -+ -+ pPsdScan->nAntDet_IsBTReplyAvailable = TRUE; -+ -+ if (BTResp == FALSE) -+ { -+ pPsdScan->nAntDet_IsBTReplyAvailable = FALSE; -+ pPsdScan->nAntDet_Result = 0; -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pBoardInfo->btdmAntNumByAntDet = 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail \n ")); -+ } -+ else if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)*100) -+ { -+ pPsdScan->nAntDet_Result = 1; -+ pBoardInfo->btdmAntDetFinish = TRUE; -+ pBoardInfo->btdmAntNumByAntDet = 2; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!! \n")); -+ } -+ else if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION+pPsdScan->nAntDet_ThresOffset)*100) -+ { -+ pPsdScan->nAntDet_Result = 2; -+ pBoardInfo->btdmAntDetFinish = TRUE; -+ pBoardInfo->btdmAntNumByAntDet = 2; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!! \n")); -+ } -+ else if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT)*100) -+ { -+ pPsdScan->nAntDet_Result = 3; -+ pBoardInfo->btdmAntDetFinish = TRUE; -+ pBoardInfo->btdmAntNumByAntDet = 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n")); -+ } -+ else -+ { -+ pPsdScan->nAntDet_Result = 4; -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pBoardInfo->btdmAntNumByAntDet = 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n")); -+ } -+ -+ state = 99; -+ break; -+ case 99: //restore setup -+ -+ //Set AFH mask off at WiFi channel 2472MHz +/- 10MHz -+ H2C_Parameter[0] = 0x0; -+ H2C_Parameter[1] = 0x0; -+ H2C_Parameter[2] = 0x0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n", -+ H2C_Parameter[1],H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+ -+ //Set Antenna Path -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!")); -+ -+ //Resume Coex DM -+ pBtCoexist->bStopCoexDm = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!")); -+ -+ //stimulate coex running -+ halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!")); -+ -+ outloop = TRUE; -+ break; -+ } -+ -+ }while(!outloop); -+ -+ -+ -+ } -+ -+VOID -+halbtc8723b1ant_PSD_AntennaDetectionCheck( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u4Byte AntDetCount = 0, AntDetFailCount = 0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+ BOOLEAN bScan, bRoam; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ -+ pPsdScan->nAntDet_BTTxTime = 20; //0.42ms*50 = 20ms -+ pPsdScan->nAntDet_BTLEChannel = 39; -+ -+ AntDetCount++; -+ -+ pPsdScan->bAntDet_TryCount = AntDetCount; -+ -+ if (bScan ||bRoam) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 6; -+ } -+ else if(pBtCoexist->btInfo.bBtDisabled) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 11; -+ } -+ else if (pCoexSta->nNumOfProfile >= 1) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 7; -+ } -+ else if (!pPsdScan->nAntDet_IsAntDetAvailable) //Antenna initial setup is not ready -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 9; -+ } -+ else if (pCoexSta->bC2hBtInquiryPage) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 10; -+ } -+ else -+ { -+ halbtc8723b1ant_PSD_AntennaDetection(pBtCoexist, pPsdScan->nAntDet_BTTxTime, pPsdScan->nAntDet_BTLEChannel); -+ } -+ -+ if (!pBoardInfo->btdmAntDetFinish) -+ AntDetFailCount++; -+ -+ pPsdScan->bAntDet_FailCount = AntDetFailCount; -+ -+} -+ -+ -+//============================================================ -+// work around function start with wa_halbtc8723b1ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8723b1ant_ -+//============================================================ -+VOID -+EXhalbtc8723b1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u1Byte u1Tmp=0x0; -+ u2Byte u2Tmp=0x0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx Execute 8723b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n")); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("Ant Det Finish = %s, Ant Det Number = %d\n", -+ (pBoardInfo->btdmAntDetFinish? "Yes":"No"), pBoardInfo->btdmAntNumByAntDet)); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); -+ -+ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. -+ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); -+ -+ // set GRAN_BT = 1 -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ // set WLAN_ACT = 0 -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // -+ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) -+ // Local setting bit define -+ // BIT0: "0" for no antenna inverse; "1" for antenna inverse -+ // BIT1: "0" for internal switch; "1" for external switch -+ // BIT2: "0" for one antenna; "1" for two antenna -+ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ -+ u1Tmp |= 0x1; // antenna inverse -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); -+ -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ else -+ { -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ // set to S1 -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ u1Tmp |= 0x1; // antenna inverse -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_PCI) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); -+ } -+ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8723b1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8723b1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); -+ pBtCoexist->bStopCoexDm = FALSE; -+} -+ -+VOID -+EXhalbtc8723b1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ pBtCoexist->bStopCoexDm = FALSE; -+ -+ halbtc8723b1ant_InitCoexDm(pBtCoexist); -+ -+ halbtc8723b1ant_QueryBtInfo(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8723b1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u2Byte u2Tmp[4]; -+ u4Byte u4Tmp[4]; -+ u4Byte faOfdm, faCck; -+ u4Byte fwVer=0, btPatchVer=0; -+ static u1Byte PopReportIn10s = 0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ if(pBtCoexist->bStopCoexDm) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ if (pPsdScan->bAntDet_TryCount == 0) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Mech/ Pos", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); -+ CL_PRINTF(cliBuf); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)", "Ant PG Num/ Mech(Ant_Det)/ Pos", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNumByAntDet, pBoardInfo->btdmAntPos, -+ pPsdScan->bAntDet_TryCount, pPsdScan->bAntDet_FailCount, pPsdScan->nAntDet_Result); -+ CL_PRINTF(cliBuf); -+ -+ if (pBoardInfo->btdmAntDetFinish) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "Ant Det PSD Value", pPsdScan->nAntDet_PeakVal); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c", "Version Coex/ Fw/ Patch/ Cut", \ -+ GLCoexVerDate8723b1Ant, GLCoexVer8723b1Ant, fwVer, btPatchVer, btPatchVer, pCoexSta->nCutVersion+65); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "WifibHiPri/ Ccklock/ CckEverLock", \ -+ (pCoexSta->bWiFiIsHighPriTask? "Yes":"No"), -+ (pCoexSta->bCCKLock? "Yes":"No"), -+ (pCoexSta->bCCKEverLock? "Yes":"No")); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ PopReportIn10s++; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt, pCoexSta->popEventCnt); -+ CL_PRINTF(cliBuf); -+ -+ if (PopReportIn10s >= 5) -+ { -+ pCoexSta->popEventCnt = 0; -+ PopReportIn10s = 0; -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d / %d / %d", "SCO/HID/PAN/A2DP/NameReq/WHQL", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist, pCoexSta->bC2hBtRemoteNameReq, pCoexSta->bBtWhckTest ); -+ CL_PRINTF(cliBuf); -+ -+ if (pStackInfo->bProfileNotified) -+ { -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ -+ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d", "A2DP Rate/Bitpool", \ -+ (btInfoExt&BIT0)? "BR":"EDR", pCoexSta->nA2DPBitPool); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b1Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ } -+ -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "SM[LowPenaltyRA]", \ -+ pCoexDm->bCurLowPenaltyRa); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ -+ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), -+ pBtCoexist->btInfo.aggBufSize); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ -+ pBtCoexist->btInfo.raMask); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ } -+ -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ if (pBoardInfo->btdmAntNumByAntDet == 2) -+ { -+ if (pCoexDm->bCurPsTdmaOn) -+ psTdmaCase = psTdmaCase +100; //for WiFi RSSI low or BT RSSI low -+ else -+ psTdmaCase = 1; //always translate to TDMA(off,1) for TDMA-off case -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, -+ (pCoexDm->bCurPsTdmaOn? "On":"Off"), -+ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); -+ -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ -+ pCoexSta->nCoexTableType); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "IgnWlanAct", \ -+ pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ /* -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ -+ pCoexDm->errorCondition); -+ CL_PRINTF(cliBuf); -+ */ -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ -+ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ -+ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/0x6cc/0x880[29:25]", \ -+ u1Tmp[0], u4Tmp[0], (u4Tmp[1]&0x3e000000) >> 25); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x764); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x764 / 0x76e", \ -+ u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), (u4Tmp[1] & 0xffff), u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \ -+ u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \ -+ ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ -+ u4Tmp[0]&0xff, u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); -+ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ -+ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ -+ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; -+ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ -+ u4Tmp[0]&0xffff, faOfdm, faCck); -+ CL_PRINTF(cliBuf); -+ -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 1) -+ //halbtc8723b1ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8723b1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp=0; -+ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ -+ halbtc8723b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8723b1ant_InitCoexDm(pBtCoexist); -+ halbtc8723b1ant_QueryBtInfo(pBtCoexist); -+ -+ pCoexSta->bUnderIps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ u1Byte u1Tmpa, u1Tmpb; -+ u4Byte u4Tmp; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm ) -+ return; -+ -+ if(BTC_SCAN_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ pPsdScan->nAntDet_IsAntDetAvailable = TRUE; -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); -+ } -+ -+ if(pBtCoexist->btInfo.bBtDisabled) -+ return; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ halbtc8723b1ant_QueryBtInfo(pBtCoexist); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8723b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_SCAN_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8723b1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ } -+ else // wifi is connected -+ { -+ halbtc8723b1ant_ActionWifiConnectedScan(pBtCoexist); -+ } -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8723b1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8723b1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ pPsdScan->nAntDet_IsAntDetAvailable = TRUE; -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ pCoexDm->nArpCnt = 0; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ //pCoexDm->nArpCnt = 0; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8723b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ halbtc8723b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8723b1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8723b1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ BOOLEAN bWifiUnderBMode = FALSE; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ pPsdScan->nAntDet_IsAntDetAvailable = TRUE; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ -+ //Set CCK Tx/Rx high Pri except 11b mode -+ if (bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx -+ } -+ -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ pCoexDm->nArpCnt = 0; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx -+ -+ pCoexSta->bCCKEverLock = FALSE; -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ //H2C_Parameter[0] = 0x1; -+ H2C_Parameter[0] = 0x0; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+} -+ -+VOID -+EXhalbtc8723b1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE, bUnder4way=FALSE; -+ u1Byte aggBufSize=5; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ BTC_PACKET_ARP == type ) -+ { -+ if (BTC_PACKET_ARP == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); -+ -+ pCoexDm->nArpCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); -+ -+ if((pCoexDm->nArpCnt >= 10) && (!bUnder4way)) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); -+ } -+ -+ pCoexSta->specialPktPeriodCnt = 0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8723b1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) -+ { -+ halbtc8723b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bBtBusy=FALSE; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8723B_1ANT_MAX) -+ rspSource = BT_INFO_SRC_8723B_1ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ // if 0xff, it means BT is under WHCK test -+ if (btInfo == 0xff) -+ pCoexSta->bBtWhckTest = TRUE; -+ else -+ pCoexSta->bBtWhckTest = FALSE; -+ -+ if(BT_INFO_SRC_8723B_1ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ if (pCoexSta->btRetryCnt >= 1) -+ pCoexSta->popEventCnt++; -+ -+ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) -+ pCoexSta->bC2hBtRemoteNameReq = TRUE; -+ else -+ pCoexSta->bC2hBtRemoteNameReq = FALSE; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2-90; -+ //pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ if (pCoexSta->btInfoC2h[rspSource][1] == 0x49) -+ { -+ pCoexSta->nA2DPBitPool = -+ pCoexSta->btInfoC2h[rspSource][6]; -+ } -+ else -+ pCoexSta->nA2DPBitPool = 0; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ -+#if BT_8723B_1ANT_ANTDET_ENABLE -+#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE -+ if ((pBoardInfo->btdmAntDetFinish) && (pBoardInfo->btdmAntNumByAntDet == 2)) -+ { -+ if(pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x1\n")); -+ -+ //BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c45); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c45); -+ -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x1); -+ } -+ } -+ else -+#endif -+#endif -+ -+ { -+ if(!pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); -+ -+ //BT TRx Mask lock 0x2c[0], 0x30[0] = 0 -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c44); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c44); -+ } -+ } -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if(pCoexSta->btInfoExt & BIT1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if(pCoexSta->btInfoExt & BIT3) -+ { -+ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+#if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8723b1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8723B_1ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ pCoexSta->nNumOfProfile = 0; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8723B_1ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ -+ pCoexSta->bBtHiPriLinkExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8723B_1ANT_B_FTP) -+ { -+ pCoexSta->bPanExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8723B_1ANT_B_A2DP) -+ { -+ pCoexSta->bA2dpExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8723B_1ANT_B_HID) -+ { -+ pCoexSta->bHidExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8723B_1ANT_B_SCO_ESCO) -+ { -+ pCoexSta->bScoExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ } -+ else -+ pCoexSta->bScoExist = FALSE; -+ -+ if ((pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) &&( pCoexSta->bScoExist == FALSE)) -+ { -+ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) -+ { -+ pCoexSta->bHidExist = TRUE; -+ pCoexSta->wrongProfileNotification++; -+ pCoexSta->nNumOfProfile++; -+ btInfo = btInfo | 0x28; -+ } -+ } -+ -+ //Add Hi-Pri Tx/Rx counter to avoid false detection -+ if (((pCoexSta->bHidExist) || (pCoexSta->bScoExist)) && (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) -+ && (!pCoexSta->bC2hBtInquiryPage)) -+ pCoexSta->bBtHiPriLinkExist = TRUE; -+ -+ if((btInfo&BT_INFO_8723B_1ANT_B_ACL_BUSY) && (pCoexSta->nNumOfProfile == 0)) -+ { -+ if (pCoexSta->lowPriorityTx + pCoexSta->lowPriorityRx >= 160) -+ { -+ pCoexSta->bPanExist = TRUE; -+ pCoexSta->nNumOfProfile++; -+ pCoexSta->wrongProfileNotification++; -+ btInfo = btInfo | 0x88; -+ } -+ } -+ } -+ -+ halbtc8723b1ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) -+ -+ if(!(btInfo&BT_INFO_8723B_1ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8723B_1ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8723B_1ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8723B_1ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8723B_1ANT_B_ACL_BUSY) -+ { -+ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ bBtBusy = TRUE; -+ else -+ bBtBusy = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8723b1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); -+ -+ if(BTC_RF_ON == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); -+ pBtCoexist->bStopCoexDm = FALSE; -+ } -+ else if(BTC_RF_OFF == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); -+ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); -+ -+ halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ pBtCoexist->bStopCoexDm = TRUE; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ u1Tmpc = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb, u1Tmpc)); -+ -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); -+ -+ halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+} -+ -+VOID -+EXhalbtc8723b1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ -+ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ pBtCoexist->bStopCoexDm = FALSE; -+ halbtc8723b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8723b1ant_InitCoexDm(pBtCoexist); -+ halbtc8723b1ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8723b1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); -+ -+ halbtc8723b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); -+ halbtc8723b1ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8723b1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8723b1Ant, GLCoexVer8723b1Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 0) -+ halbtc8723b1ant_QueryBtInfo(pBtCoexist); -+ halbtc8723b1ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ halbtc8723b1ant_MonitorBtCtr(pBtCoexist); -+ halbtc8723b1ant_MonitorWiFiCtr(pBtCoexist); -+#if BT_8723B_1ANT_ANTDET_ENABLE -+ halbtc8723b1ant_MonitorBtEnableDisable(pBtCoexist); -+#endif -+ -+ if ( (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx < 50) && (pBtLinkInfo->bHidExist == TRUE)) -+ { -+ pBtLinkInfo->bHidExist = FALSE; -+ } -+ -+ if( halbtc8723b1ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust ) -+ { -+ halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); -+ } -+ -+ pCoexSta->specialPktPeriodCnt++; -+ -+ // sample to set bt to execute Ant detection -+ //pBtCoexist->fBtcSetBtAntDetection(pBtCoexist, 20, 14); -+/* -+ if (pPsdScan->bIsAntDetEnable) -+ { -+ if (pPsdScan->nPSDGenCount > pPsdScan->realseconds) -+ pPsdScan->nPSDGenCount = 0; -+ -+ halbtc8723b1ant_AntennaDetection(pBtCoexist, pPsdScan->realcentFreq, pPsdScan->realoffset, pPsdScan->realspan, pPsdScan->realseconds); -+ pPsdScan->nPSDGenTotalCount +=2; -+ pPsdScan->nPSDGenCount += 2; -+ } -+*/ -+#endif -+} -+ -+VOID -+EXhalbtc8723b1ant_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ) -+{ -+ static u4Byte AntDetCount = 0, AntDetFailCount = 0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ BOOLEAN bScan, bRoam; -+ -+#if BT_8723B_1ANT_ANTDET_ENABLE -+ -+ if (seconds == 0) -+ { -+ pPsdScan->bAntDet_TryCount = 0; -+ pPsdScan->bAntDet_FailCount = 0; -+ AntDetCount = 0; -+ AntDetFailCount = 0; -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pBoardInfo->btdmAntNumByAntDet = 1; -+ return; -+ } -+ -+ if (!pBoardInfo->btdmAntDetFinish) -+ { -+ pPsdScan->nAntDet_IntevalCount = pPsdScan->nAntDet_IntevalCount+2; -+ -+ if (pPsdScan->nAntDet_IntevalCount >= BT_8723B_1ANT_ANTDET_RETRY_INTERVAL) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n")); -+ halbtc8723b1ant_PSD_AntennaDetectionCheck(pBtCoexist); -+ -+ if (pBoardInfo->btdmAntDetFinish) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n")); -+#if 1 -+ if (pBoardInfo->btdmAntNumByAntDet == 2) -+ halbtc8723b1ant_MechanismSwitch(pBtCoexist, TRUE); -+ else -+ halbtc8723b1ant_MechanismSwitch(pBtCoexist, FALSE); -+#endif -+ } -+ else -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n")); -+ -+ pPsdScan->nAntDet_IntevalCount = 0; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n", pPsdScan->nAntDet_IntevalCount)); -+ } -+ -+ } -+#endif -+ -+ -+/* -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ -+ pPsdScan->nAntDet_BTTxTime = seconds; //0.42ms*50 = 20ms -+ pPsdScan->nAntDet_BTLEChannel = centFreq; -+ -+ if (seconds == 0) -+ { -+ pPsdScan->bAntDet_TryCount = 0; -+ pPsdScan->bAntDet_FailCount = 0; -+ AntDetCount = 0; -+ AntDetFailCount = 0; -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pBoardInfo->btdmAntNumByAntDet = 1; -+ return; -+ } -+ else -+ { -+ AntDetCount++; -+ -+ pPsdScan->bAntDet_TryCount = AntDetCount; -+ -+ if (bScan ||bRoam) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 6; -+ } -+ else if (pCoexSta->nNumOfProfile >= 1) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 7; -+ } -+ else if (!pPsdScan->nAntDet_IsAntDetAvailable) //Antenna initial setup is not ready -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 9; -+ } -+ else if (pCoexSta->bC2hBtInquiryPage) -+ { -+ pBoardInfo->btdmAntDetFinish = FALSE; -+ pPsdScan->nAntDet_Result = 10; -+ } -+ else -+ { -+ //halbtc8723b1ant_PSD_AntennaDetection(pBtCoexist, pPsdScan->nAntDet_BTTxTime, pPsdScan->nAntDet_BTLEChannel); -+ } -+ -+ if (!pBoardInfo->btdmAntDetFinish) -+ AntDetFailCount++; -+ -+ pPsdScan->bAntDet_FailCount = AntDetFailCount; -+ } -+*/ -+} -+ -+VOID -+EXhalbtc8723b1ant_AntennaIsolation( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ) -+{ -+ -+ -+} -+ -+VOID -+EXhalbtc8723b1ant_PSDScan( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ) -+{ -+ -+ -+} -+ -+VOID -+EXhalbtc8723b1ant_DisplayAntDetection( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ -+#if BT_8723B_1ANT_ANTDET_ENABLE -+ if (pPsdScan->bAntDet_TryCount != 0) -+ { -+ halbtc8723b1ant_PSD_ShowAntennaDetectResult(pBtCoexist); -+ -+ if (pBoardInfo->btdmAntDetFinish) -+ halbtc8723b1ant_PSD_ShowData(pBtCoexist); -+ return; -+ } -+#endif -+ -+ //halbtc8723b1ant_ShowPSDData(pBtCoexist); -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8723B Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8723b1Ant.tmh" ++#endif ++ ++//#include ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8723B_1ANT GLCoexDm8723b1Ant; ++static PCOEX_DM_8723B_1ANT pCoexDm=&GLCoexDm8723b1Ant; ++static COEX_STA_8723B_1ANT GLCoexSta8723b1Ant; ++static PCOEX_STA_8723B_1ANT pCoexSta=&GLCoexSta8723b1Ant; ++static PSDSCAN_STA_8723B_1ANT GLPsdScan8723b1Ant; ++static PPSDSCAN_STA_8723B_1ANT pPsdScan = &GLPsdScan8723b1Ant; ++ ++ ++const char *const GLBtInfoSrc8723b1Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8723b1Ant=20150119; ++u4Byte GLCoexVer8723b1Ant=0x58; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8723b1ant_ ++//============================================================ ++u1Byte ++halbtc8723b1ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8723b1ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8723b1ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++VOID ++halbtc8723b1ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++VOID ++halbtc8723b1ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++VOID ++halbtc8723b1ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8723b1ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType ++ ) ++{ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ halbtc8723b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); ++ break; ++ case 1: // disable cck 1/2 ++ halbtc8723b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ halbtc8723b1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8723b1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8723b1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8723b1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++} ++ ++VOID ++halbtc8723b1ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++VOID ++halbtc8723b1ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b1ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp, u1Tmp1; ++ s4Byte wifiRssi; ++ static u4Byte NumOfBtCounterChk = 0; ++ ++ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS ++ //if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) ++ ++ if (pCoexSta->bUnderIps) ++ { ++ //pCoexSta->highPriorityTx = 65535; ++ //pCoexSta->highPriorityRx = 65535; ++ //pCoexSta->lowPriorityTx = 65535; ++ //pCoexSta->lowPriorityRx = 65535; ++ //return; ++ } ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if( (pCoexSta->lowPriorityTx > 1050) && (!pCoexSta->bC2hBtInquiryPage)) ++ pCoexSta->popEventCnt++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ regHPRx, regHPTx, regLPRx, regLPTx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++ ++ // This part is for wifi FW and driver to update BT's status as disabled. ++ // The flow is as the following ++ // 1. disable BT ++ // 2. if all BT Tx/Rx counter=0, after 6 sec we query bt info ++ // 3. Because BT will not rsp from mailbox, so wifi fw will know BT is disabled ++ // 4. FW will rsp c2h for BT that driver will know BT is disabled. ++ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) ++ { ++ NumOfBtCounterChk++; ++ if (NumOfBtCounterChk == 3) ++{ ++ halbtc8723b1ant_QueryBtInfo(pBtCoexist); ++ } ++ } ++ else ++ { ++ NumOfBtCounterChk = 0; ++ } ++ } ++ ++ ++VOID ++halbtc8723b1ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ u4Byte TotalCnt; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); ++ } ++ ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); ++ ++ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) ++ { ++ TotalCnt = pCoexSta->nCRCOK_CCK + pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + ++ pCoexSta->nCRCOK_11nAgg; ++ ++ if ( (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_ACL_BUSY) || ++ (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_SCO_BUSY) ) ++ { ++ if (pCoexSta->nCRCOK_CCK >(TotalCnt -pCoexSta->nCRCOK_CCK)) ++ { ++ if (nCCKLockCounter < 3) ++ nCCKLockCounter++; ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ if (!pCoexSta->bPreCCKLock) ++ { ++ ++ if (nCCKLockCounter >= 3) ++ pCoexSta->bCCKLock = TRUE; ++ else ++ pCoexSta->bCCKLock = FALSE; ++ } ++ else ++ { ++ if (nCCKLockCounter == 0) ++ pCoexSta->bCCKLock = FALSE; ++ else ++ pCoexSta->bCCKLock = TRUE; ++ } ++ ++ if (pCoexSta->bCCKLock) ++ pCoexSta->bCCKEverLock = TRUE; ++ ++ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; ++ ++ ++} ++ ++BOOLEAN ++halbtc8723b1ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ ++ ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8723b1ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ pBtLinkInfo->bBtHiPriLinkExist = pCoexSta->bBtHiPriLinkExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++ ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8723b1ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8723B_1ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8723b1ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b1ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8723b1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8723b1ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!") )); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b1ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8723b1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8723b1ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8723b1ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8723b1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8723b1ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if (pBoardInfo->btdmAntNumByAntDet == 2) ++ { ++ if (type == 3) ++ type = 14; ++ else if (type == 4) ++ type = 13; ++ else if (type == 5) ++ type = 8; ++ } ++#endif ++#endif ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); ++ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 4: ++ if ( pCoexSta->bCCKEverLock) ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ else ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 5: ++ if ( pCoexSta->bCCKEverLock) ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaa5a5a, 0xaaaa5a5a, 0xffffff, 0x3); ++ else ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8723b1ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b1ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8723b1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8723b1ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8723b1ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8723b1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8723b1ant_SwMechanism( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRA ++ ) ++{ ++ halbtc8723b1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8723b1ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte fwVer=0, u4Tmp=0, cntBtCalChk=0; ++ BOOLEAN bPgExtSwitch=FALSE; ++ BOOLEAN bUseExtSwitch=FALSE; ++ BOOLEAN bIsInMpMode = FALSE; ++ u1Byte H2C_Parameter[2] ={0}, u1Tmp = 0; ++ ++ pCoexDm->curAntPosType = antPosType; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver ++ ++ if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) ++ bUseExtSwitch = TRUE; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if (antPosType == BTC_ANT_PATH_PTA) ++ { ++ if ((pBoardInfo->btdmAntDetFinish) && (pBoardInfo->btdmAntNumByAntDet == 2)) ++ { ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ antPosType = BTC_ANT_PATH_WIFI; ++ else ++ antPosType = BTC_ANT_PATH_BT; ++ } ++ } ++#endif ++#endif ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi TRx Mask on ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT TRx Mask on ++ ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to HIGH */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ // set grant_bt to high ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ //set wlan_act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT ++ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); ++ } ++ else if(bWifiOff) ++ { ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to HIGH */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ // set grant_bt to high ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ //set wlan_act to always low ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); ++ if(!bIsInMpMode) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi ++ ++ // 0x4c[24:23]=00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac=0xf002 ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &= ~BIT23; ++ u4Tmp &= ~BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ else ++ { ++ /* Use H2C to set GNT_BT to LOW */ ++ if(fwVer >= 0x180000) ++ { ++ if (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765) != 0) ++ { ++ H2C_Parameter[0] = 0; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ } ++ else ++ { ++ // BT calibration check ++ while(cntBtCalChk <= 20) ++ { ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d); ++ cntBtCalChk++; ++ if(u1Tmp & BIT0) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", cntBtCalChk)); ++ delay_ms(50); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", cntBtCalChk)); ++ break; ++ } ++ } ++ ++ // set grant_bt to PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); ++ } ++ ++ if (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) != 0xc) ++ { ++ //set wlan_act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++ } ++ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi ++ } ++ ++ if(bUseExtSwitch) ++ { ++ if(bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &=~BIT23; ++ u4Tmp |= BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ //tell firmware "no antenna inverse" ++ H2C_Parameter[0] = 0; ++ H2C_Parameter[1] = 1; //ext switch type ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ else ++ { ++ //tell firmware "antenna inverse" ++ H2C_Parameter[0] = 1; ++ H2C_Parameter[1] = 1; //ext switch type ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ } ++ ++ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType)) ++ { ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_PATH_WIFI: ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); ++ break; ++ case BTC_ANT_PATH_BT: ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); ++ break; ++ } ++ } ++ } ++ else ++ { ++ if(bInitHwCfg) ++ { ++ // 0x4c[23]=1, 0x4c[24]=0 Antenna control by 0x64 ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp |= BIT23; ++ u4Tmp &=~BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ ++ //Fix Ext switch Main->S1, Aux->S0 ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ ++ //tell firmware "no antenna inverse" ++ H2C_Parameter[0] = 0; ++ H2C_Parameter[1] = 0; //internal switch type ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ else ++ { ++ ++ //tell firmware "antenna inverse" ++ H2C_Parameter[0] = 1; ++ H2C_Parameter[1] = 0; //internal switch type ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ } ++ ++ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType)) ++ { ++ // internal switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_PATH_WIFI: ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ else ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); ++ break; ++ case BTC_ANT_PATH_BT: ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); ++ else ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x200); ++ else ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x80); ++ break; ++ } ++ } ++ } ++ ++ pCoexDm->preAntPosType = pCoexDm->curAntPosType; ++} ++ ++VOID ++halbtc8723b1ant_SetAntPathDCut( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAntennaAux, //For 1-Ant--> 1: Antenna at S0, 0: Antenna at S1. Set 0 for 2-Ant ++ IN BOOLEAN bExtSwitch, // 1: Ext Switch (SPDT) exist on module, 0: no Ext Switch (SPDT) exist on module ++ IN BOOLEAN bTwoAntenna, // 1: 2-Antenna, 0:1-Antenna ++ IN u1Byte antennaPos, //Set Antenna Pos, For 1-Ant: BTC_ANT_PATH_WIFI, BTC_ANT_PATH_BT, BTC_ANT_PATH_PTA, For 2-Ant:BTC_ANT_WIFI_AT_MAIN, BTC_ANT_WIFI_AT_Aux ++ IN u1Byte wifiState //BTC_WIFI_STAT_INIT, BTC_WIFI_STAT_IQK, BTC_WIFI_STAT_NORMAL_OFF, BTC_WIFI_STAT_MP_OFF, BTC_WIFI_STAT_NORMAL, BTC_WIFI_STAT_ANT_DIV ++ ) ++{ ++ u1Byte dataLen=5; ++ u1Byte buf[6] = {0}; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set BT Ant, bAntennaAux/bExtSwitch/bTwoAntenna/antennaPos/wifiState=%d/%d/%d/%d/%d\n", ++ bAntennaAux, bExtSwitch, bTwoAntenna, antennaPos, wifiState)); ++ ++ buf[0] = dataLen; ++ ++ if(bAntennaAux) ++ buf[1] = 0x1; ++ ++ if(bExtSwitch) ++ buf[2] = 0x1; ++ ++ if(bTwoAntenna) ++ buf[3] = 0x1; ++ ++ buf[4] = antennaPos; ++ ++ buf[5] = wifiState; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_8723B_ANT, (PVOID)&buf[0]); ++} ++ ++VOID ++halbtc8723b1ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ if(byte1&BIT4 && !(byte1&BIT5)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8723b1ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; ++ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; ++ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; ++ s1Byte nWiFiDurationAdjust = 0x0; ++ static BOOLEAN bPreWifiBusy=FALSE; ++ ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if (pBoardInfo->btdmAntNumByAntDet == 2) ++ { ++ if (bTurnOn) ++ type = type +100; //for WiFi RSSI low or BT RSSI low ++ else ++ type = 1; //always translate to TDMA(off,1) for TDMA-off case ++ } ++ ++#endif ++#endif ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if (bWifiBusy != bPreWifiBusy) ++ { ++ bForceExec = TRUE; ++ bPreWifiBusy = bWifiBusy; ++ } ++ ++ if (pCoexDm->bCurPsTdmaOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ ++ if (pCoexSta->nScanAPNum <= 5) ++ { ++ nWiFiDurationAdjust = 5; ++ ++ if (pCoexSta->nA2DPBitPool >= 35) ++ nWiFiDurationAdjust = -10; ++ else if (pCoexSta->nA2DPBitPool >= 45) ++ nWiFiDurationAdjust = -15; ++ } ++ else if (pCoexSta->nScanAPNum >= 40) ++ { ++ nWiFiDurationAdjust = -15; ++ ++ if (pCoexSta->nA2DPBitPool < 35) ++ nWiFiDurationAdjust = -5; ++ else if (pCoexSta->nA2DPBitPool < 45) ++ nWiFiDurationAdjust = -10; ++ } ++ else if (pCoexSta->nScanAPNum >= 20) ++ { ++ nWiFiDurationAdjust = -10; ++ ++ if (pCoexSta->nA2DPBitPool >= 45) ++ nWiFiDurationAdjust = -15; ++ } ++ else ++ { ++ nWiFiDurationAdjust = 0; ++ ++ if (pCoexSta->nA2DPBitPool >= 35) ++ nWiFiDurationAdjust = -10; ++ else if (pCoexSta->nA2DPBitPool >= 45) ++ nWiFiDurationAdjust = -15; ++ } ++ ++ if ((type == 1) || (type == 2) || (type == 9) || (type == 11) || (type == 101) ++ || (type == 102) || (type == 109) || (type == 101)) ++ { ++ if (!pCoexSta->bForceLpsOn) //Native power save TDMA, only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot ++ } ++ else ++ { ++ psTdmaByte0Val = 0x51; //null-pkt ++ psTdmaByte3Val = 0x10; //tx-pause at BT-slot ++ psTdmaByte4Val = 0x50; // 0x778 = d/1 toggle, dynamic slot ++ } ++ } ++ else if ((type == 3) || (type == 13) || (type == 14) || (type == 103) || (type == 113) || (type == 114)) ++ { ++ psTdmaByte0Val = 0x51; //null-pkt ++ psTdmaByte3Val = 0x10; //tx-pause at BT-slot ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle, no dynamic slot ++#if 0 ++ if (!bWifiBusy) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++#endif ++ } ++ else //native power save case ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ psTdmaByte4Val = 0x11; // 0x778 = d/1 toggle, no dynamic slot ++ //psTdmaByte4Va is not defne for 0x778 = d/1, 1/1 case ++ } ++ ++ //if (pBtLinkInfo->bSlaveRole == TRUE) ++ if ((pBtLinkInfo->bSlaveRole == TRUE) && (pBtLinkInfo->bA2dpExist)) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ ++ if (type > 100) ++ { ++ psTdmaByte0Val = psTdmaByte0Val | 0x82; //set antenna control by SW ++ psTdmaByte3Val = psTdmaByte3Val | 0x60; //set antenna no toggle, control by antenna diversity ++ } ++ ++ ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ default: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); ++ break; ++ case 1: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 2: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 3: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 4: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); ++ break; ++ case 5: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 6: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 7: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 10: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 12: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 14: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 15: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 21: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 23: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 33: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x35, 0x3, psTdmaByte3Val, 0x10); ++ break; ++ case 34: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); ++ break; ++ ++ //for 1-Ant translate to 2-Ant ++ case 101: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 102: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 103: ++ //halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 105: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x15, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 106: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x20, 0x3, psTdmaByte3Val, 0x11); ++ break; ++ case 109: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 111: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 113: ++ //halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 114: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 120: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3f, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 122: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x10); ++ break; ++ case 132: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 133: ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x25, 0x03, psTdmaByte3Val, 0x11); ++ break; ++ ++ } ++ } ++ else ++ { ++ ++ // disable PS tdma ++ switch(type) ++ { ++ case 8: //PTA Control ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: //Software control, Antenna at BT side ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 1: // 2-Ant, 0x778=3, antenna control by antenna diversity ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); ++ break; ++#if 0 ++ case 9: //Software control, Antenna at WiFi side ++ halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_WIFI, BTC_WIFI_STAT_NORMAL); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); ++ break; ++#endif ++ } ++ } ++ rssiAdjustVal =0; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67))); ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++BOOLEAN ++halbtc8723b1ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected && ++ BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); ++ ++ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); ++ ++ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ ++ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); ++ ++ //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if (bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ } ++ ++ bCommon = FALSE; ++ } ++ ++ return bCommon; ++} ++ ++ ++VOID ++halbtc8723b1ant_TdmaDurationAdjustForAcl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0, btInfoExt; ++ static BOOLEAN bPreWifiBusy=FALSE; ++ BOOLEAN bWifiBusy = FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); ++ ++ if(BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) ++ bWifiBusy = TRUE; ++ else ++ bWifiBusy = FALSE; ++ ++ if( (BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || ++ (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || ++ (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) ++ { ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 3 && ++ pCoexDm->curPsTdma != 9 ) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ return; ++ } ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) ++ retryCount++; ++ ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ if(result == -1) ++ { ++/* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else */ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ else if(result == 1) ++ { ++/* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else */ if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ } ++ else //no change ++ { ++ /* Bryant Modify ++ if(bWifiBusy != bPreWifiBusy) //if busy / idle change ++ { ++ bPreWifiBusy = bWifiBusy; ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); ++ } ++ */ ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 9 && ++ pCoexDm->curPsTdma != 11 ) ++ { ++ // recover to previous adjust type ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ } ++} ++ ++VOID ++halbtc8723b1ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8723b1ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8723b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8723b1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8723b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiOnly( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++} ++ ++VOID ++halbtc8723b1ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ ++ bPreBtDisabled = bBtDisabled; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ if(bBtDisabled) ++ { ++ halbtc8723b1ant_ActionWifiOnly(pBtCoexist); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++//============================================= ++// ++// Software Coex Mechanism start ++// ++//============================================= ++ ++// SCO only or SCO+PAN(HS) ++ ++/* ++VOID ++halbtc8723b1ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++ ++VOID ++halbtc8723b1ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8723b1ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8723b1ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8723b1ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(HS) only ++VOID ++halbtc8723b1ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8723b1ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8723b1ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8723b1ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++VOID ++halbtc8723b1ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++*/ ++ ++//============================================= ++// ++// Non-Software Coex Mechanism start ++// ++//============================================= ++VOID ++halbtc8723b1ant_ActionBtWhckTest( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8723b1ant_ActionHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8723b1ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ if ( (!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask) ) ++ { ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) ++ { ++ // SCO/HID/A2DP busy ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if (pCoexSta->bC2hBtRemoteNameReq) ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); ++ else ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if ( (pBtLinkInfo->bPanExist) || (bWifiBusy) ) ++ { ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if (pCoexSta->bC2hBtRemoteNameReq) ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); ++ else ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionBtScoHidOnlyBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ // tdma and coex table ++ ++ if(pBtLinkInfo->bScoExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else //HID ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiConnectedBtAclBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ u1Byte btRssiState; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ btRssiState = halbtc8723b1ant_BtRssiState(2, 28, 0); ++ ++ if ( (pCoexSta->lowPriorityRx >= 950) && (!pCoexSta->bUnderIps) ) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ if(pBtLinkInfo->bHidOnly) //HID ++ { ++ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ return; ++ } ++ else if(pBtLinkInfo->bA2dpOnly) //A2DP ++ { ++ if(BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ halbtc8723b1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ } ++ } ++ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || ++ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ //BT no-profile busy (0x9) ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 33); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiNotConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // power save state ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiNotConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiNotConnectedAssoAuth( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bPanExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); ++ } ++ else ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiConnectedSpecialPacket( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiBusy = FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ //no special packet process for both WiFi and BT very busy ++ if ((bWifiBusy) && ((pBtLinkInfo->bPanExist) || (pCoexSta->nNumOfProfile >= 2))) ++ return; ++ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist)) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8723b1ant_ActionWifiConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiBusy=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; ++ u4Byte wifiBw; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ if(bUnder4way) ++ { ++ halbtc8723b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ if(bScan || bLink || bRoam) ++ { ++ if(bScan) ++ halbtc8723b1ant_ActionWifiConnectedScan(pBtCoexist); ++ else ++ halbtc8723b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ // power save state ++ if(!bApEnable && BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) ++ { ++ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP ++ { ++ if(!bWifiBusy) ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else //busy ++ { ++ if (pCoexSta->nScanAPNum >= BT_8723B_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA ++ { ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ } ++ } ++ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ else ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(!bWifiBusy) ++ { ++ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8723b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ else ++ { ++ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8723b1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else if( (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else ++ { ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++} ++ ++VOID ++halbtc8723b1ant_RunSwCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm=0; ++ ++ algorithm = halbtc8723b1ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ ++ if(halbtc8723b1ant_IsCommonAction(pBtCoexist)) ++ { ++ ++ } ++ else ++ { ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8723B_1ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); ++ //halbtc8723b1ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); ++ //halbtc8723b1ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); ++ //halbtc8723b1ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); ++ //halbtc8723b1ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); ++ //halbtc8723b1ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); ++ //halbtc8723b1ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); ++ //halbtc8723b1ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); ++ //halbtc8723b1ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); ++ //halbtc8723b1ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8723B_1ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); ++ //halbtc8723b1ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); ++ //halbtc8723b1ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8723b1ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiBusy = FALSE; ++ BOOLEAN bIncreaseScanDevNum=FALSE; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ u1Byte aggBufSize=5; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0, wifiBw; ++ u1Byte iotPeer=BTC_IOT_PEER_UNKNOWN; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if(pCoexSta->bBtWhckTest) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); ++ halbtc8723b1ant_ActionBtWhckTest(pBtCoexist); ++ return; ++ } ++ ++ if( (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bIncreaseScanDevNum = TRUE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ bMiracastPlusBt = FALSE; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ ++ if (( (pBtLinkInfo->bA2dpExist) || (bWifiBusy) ) && (pCoexSta->bC2hBtInquiryPage) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); ++ } ++ else ++ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) ++ { ++ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_IOT_PEER, &iotPeer); ++ ++ if(BTC_IOT_PEER_CISCO != iotPeer) ++ { ++ if(pBtLinkInfo->bScoExist)//if (pBtLinkInfo->bBtHiPriLinkExist) ++ //halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); ++ else ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); ++ //halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ } ++ else ++ { ++ if(pBtLinkInfo->bScoExist) ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); ++ else ++ { ++ if (BTC_WIFI_BW_HT40==wifiBw) ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x10); ++ else ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ } ++ } ++ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); ++ halbtc8723b1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message ++ } ++ else ++ { ++ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); ++ ++ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++ halbtc8723b1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8723b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ ++ if(!bWifiConnected) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ if (bScan) ++ halbtc8723b1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ else ++ halbtc8723b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else ++ halbtc8723b1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else // wifi LPS/Busy ++ { ++ halbtc8723b1ant_ActionWifiConnected(pBtCoexist); ++ } ++} ++ ++u4Byte ++halbtc8723b1ant_PSD_Log2Base( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val ++ ++ ) ++{ ++ u1Byte i,j; ++ u4Byte tmp, tmp2, val_integerdB=0, tindex, shiftcount=0; ++ u4Byte result,val_fractiondB=0,Table_fraction[21]= {0,432, 332, 274, 232, 200, ++ 174, 151,132,115,100,86,74,62,51,42, ++ 32,23,15,7,0}; ++ ++ if (val == 0) ++ return 0; ++ ++ tmp = val; ++ ++ while(1) ++ { ++ if (tmp == 1) ++ break; ++ else ++ { ++ tmp = (tmp >> 1); ++ shiftcount++; ++ } ++ } ++ ++ ++ val_integerdB = shiftcount+1; ++ ++ tmp2=1; ++ for (j=1; j<= val_integerdB;j++) ++ tmp2 = tmp2*2; ++ ++ tmp = (val*100) /tmp2; ++ tindex = tmp/5; ++ ++ if (tindex > 20) ++ tindex = 20; ++ ++ val_fractiondB = Table_fraction[tindex]; ++ ++ result = val_integerdB*100 - val_fractiondB; ++ ++ return (result); ++ ++ ++} ++ ++VOID ++halbtc8723b1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ ++ // sw all off ++ halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ //halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ //halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ pCoexSta->popEventCnt = 0; ++} ++ ++VOID ++halbtc8723b1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0;//, fwVer; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0, u1Tmpa=0, u1Tmpb=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); ++ ++ pPsdScan->nAntDet_IsAntDetAvailable = FALSE; ++ ++ //0xf0[15:12] --> Chip Cut information ++ pCoexSta->nCutVersion = (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xf1) & 0xf0) >> 4; ++ ++#if 0//move to BTC_MEDIA_CONNECT ++ if(bBackUp) ++ { ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++#endif ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x550, 0x8, 0x1); //enable TBTT nterrupt ++ ++ // 0x790[5:0]=0x5 ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, 0x5); ++ ++ // Enable counter statistics ++ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++ ++ ++ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi ++ ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ ++ //Antenna config ++ if(bWifiOnly) ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FORCE_EXEC, TRUE, FALSE); ++ else ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, TRUE, FALSE); ++ ++#if 0 ++ if(bWifiOnly) ++ { ++ halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_WIFI, BTC_WIFI_STAT_INIT); ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ } ++ else ++ halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_INIT); ++#endif ++ ++ ++ ++ // PTA parameter ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++} ++ ++ ++ ++ ++ ++VOID ++halbtc8723b1ant_MechanismSwitch( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwitchTo2Antenna ++ ) ++{ ++ ++ if (bSwitchTo2Antenna) // 1-Ant -> 2-Ant ++ { ++ //un-lock TRx Mask setup for 8723b f-cut ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x1); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x1); ++ //WiFi TRx Mask on ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ //BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c45); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c45); ++ ++ //BT TRx Mask on ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x1); ++ ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, FALSE); ++ } ++ else ++ { ++ //WiFi TRx Mask on ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); ++ ++ //lock TRx Mask setup for 8723b f-cut ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x0); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x0); ++ ++ //BT TRx Mask on ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); ++ ++ //BT TRx Mask ock 0x2c[0], 0x30[0] = 0 ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c44); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c44); ++ ++ ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ } ++ ++} ++ ++ ++ ++ ++VOID ++halbtc8723b1ant_PSD_ShowAntennaDetectResult( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n============[Antenna Detection info] ============\n"); ++ CL_PRINTF(cliBuf); ++ ++ if (pPsdScan->nAntDet_Result == 1) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)", "Ant Det Result", "2-Antenna (Bad-Isolation)", ++ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION); ++ else if (pPsdScan->nAntDet_Result == 2) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)", "Ant Det Result", "2-Antenna (Good-Isolation)", ++ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION+pPsdScan->nAntDet_ThresOffset, BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)", "Ant Det Result", "1-Antenna", ++ BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT, BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION+pPsdScan->nAntDet_ThresOffset); ++ ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ", "Antenna Detection Finish", ++ (pBoardInfo->btdmAntDetFinish? "Yes":"No")); ++ CL_PRINTF(cliBuf); ++ ++ switch(pPsdScan->nAntDet_Result) ++ { ++ case 0: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is not available)"); ++ break; ++ case 1: // 2-Ant bad-isolation ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is available)"); ++ break; ++ case 2: // 2-Ant good-isolation ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is available)"); ++ break; ++ case 3: // 1-Ant ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is available)"); ++ break; ++ case 4: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Uncertainty result)"); ++ break; ++ case 5: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)"); ++ break; ++ case 6: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(WiFi is Scanning)"); ++ break; ++ case 7: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is not idle)"); ++ break; ++ case 8: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Abort by WiFi Scanning)"); ++ break; ++ case 9: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(Antenna Init is not ready)"); ++ break; ++ case 10: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is Inquiry or page)"); ++ break; ++ case 11: ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "(BT is Disabled)"); ++ break; ++} ++ CL_PRINTF(cliBuf); ++ ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Ant Detect Total Count",pPsdScan->bAntDet_TryCount); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Ant Detect Fail Count",pPsdScan->bAntDet_FailCount); ++ CL_PRINTF(cliBuf); ++ ++ if ( (!pBoardInfo->btdmAntDetFinish) && (pPsdScan->nAntDet_Result != 5) ) ++ return; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",(pPsdScan->nAntDet_Result? "ok":"fail")); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time", pPsdScan->nAntDet_BTTxTime); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch", pPsdScan->nAntDet_BTLEChannel); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "WiFi PSD Cent-Ch/Offset/Span", ++ pPsdScan->nRealCentFreq, pPsdScan->nRealOffset, pPsdScan->nRealSpan); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB", "PSD Pre-Scan Peak Value", pPsdScan->nAntDet_PrePSDScanPeakVal/100); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)", "PSD Pre-Scan result", ++ (pPsdScan->nAntDet_Result != 5? "ok":"fail"), BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset); ++ CL_PRINTF(cliBuf); ++ ++ if (pPsdScan->nAntDet_Result == 5) ++ return; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB", "PSD Scan Peak Value", pPsdScan->nAntDet_PeakVal); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz", "PSD Scan Peak Freq", pPsdScan->nAntDet_PeakFreq); ++ CL_PRINTF(cliBuf); ++ ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package", ++ (pBoardInfo->bTfbgaPackage)? "Yes":"No"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "PSD Threshold Offset", pPsdScan->nAntDet_ThresOffset); ++ CL_PRINTF(cliBuf); ++ ++} ++ ++VOID ++halbtc8723b1ant_PSD_ShowData( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u4Byte nDeltaFreqPerPoint; ++ u4Byte freq,freq1,freq2,n=0,i=0, j=0, m=0, PsdRep1, PsdRep2; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n\n============[PSD info] (%d)============\n", ++ pPsdScan->nPSDGenCount); ++ CL_PRINTF(cliBuf); ++ ++ if (pPsdScan->nPSDGenCount == 0) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n No Data !!\n"); ++ CL_PRINTF(cliBuf); ++ return; ++ } ++ ++ if (pPsdScan->nPSDPoint == 0) ++ nDeltaFreqPerPoint = 0; ++ else ++ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; ++ ++ //if (pPsdScan->bIsPSDShowMaxOnly) ++ if (0) ++ { ++ PsdRep1 = pPsdScan->nPSDMaxValue/100; ++ PsdRep2 = pPsdScan->nPSDMaxValue - PsdRep1 * 100; ++ ++ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + pPsdScan->nPSDMaxValuePoint * nDeltaFreqPerPoint); ++ freq1 = freq/1000000; ++ freq2 = freq/1000 - freq1 * 1000; ++ ++ if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.0%d MHz", ++ freq1, freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq = %d.%d MHz", ++ freq1, freq2); ++ ++ if (PsdRep2 < 10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.0%d dB, (%d) \n", ++ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, ", Value = %d.%d dB, (%d)\n", ++ PsdRep1, PsdRep2, pPsdScan->nPSDMaxValue); ++ ++ CL_PRINTF(cliBuf); ++ } ++ else ++ { ++ m = pPsdScan->nPSDStartPoint; ++ n = pPsdScan->nPSDStartPoint; ++ i = 1; ++ j = 1; ++ ++ while(1) ++ { ++ do ++ { ++ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + m * nDeltaFreqPerPoint); ++ freq1 = freq/1000000; ++ freq2 = freq/1000 - freq1 * 1000; ++ ++ if (i ==1) ++ { ++ if (freq2 == 0) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.000", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.0%2d", freq1,freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Freq%6d.%3d", freq1,freq2); ++ } ++ else if ( (i%8 == 0) || (m == pPsdScan->nPSDStopPoint) ) ++ { ++ if (freq2 == 0) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000\n", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d\n", freq1,freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d\n", freq1,freq2); ++ } ++ else ++ { ++ if (freq2 == 0) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.000", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.0%2d", freq1,freq2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%6d.%3d", freq1,freq2); ++ } ++ ++ i++; ++ m++; ++ CL_PRINTF(cliBuf); ++ ++ }while( (i <= 8) && (m <= pPsdScan->nPSDStopPoint)); ++ ++ ++ do ++ { ++ PsdRep1 = pPsdScan->nPSDReport_MaxHold[n]/100; ++ PsdRep2 = pPsdScan->nPSDReport_MaxHold[n] - PsdRep1 * 100; ++ ++ if (j ==1) ++ { ++ if (PsdRep2 <10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.0%d", PsdRep1,PsdRep2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n Val %7d.%d", PsdRep1,PsdRep2); ++ } ++ else if ( (j%8 == 0) || (n == pPsdScan->nPSDStopPoint) ) ++ { ++ if (PsdRep2 <10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d\n", PsdRep1,PsdRep2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d\n", PsdRep1,PsdRep2); ++ } ++ else ++ { ++ if (PsdRep2 <10) ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.0%d", PsdRep1,PsdRep2); ++ else ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "%7d.%d", PsdRep1,PsdRep2); ++ } ++ ++ j++; ++ n++; ++ CL_PRINTF(cliBuf); ++ ++ } while( (j <= 8) && (n <= pPsdScan->nPSDStopPoint)); ++ ++ if ( (m > pPsdScan->nPSDStopPoint) || (n > pPsdScan->nPSDStopPoint) ) ++ break; ++ else ++ { ++ i = 1; ++ j = 1; ++ } ++ ++ } ++ } ++ ++ ++} ++ ++VOID ++halbtc8723b1ant_PSD_MaxHoldData( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte GenCount ++ ) ++{ ++ u4Byte i=0, i_max=0, val_max=0, j; ++ ++ if (GenCount== 1) ++ { ++ memcpy(pPsdScan->nPSDReport_MaxHold, pPsdScan->nPSDReport, BT_8723B_1ANT_ANTDET_PSD_POINTS*sizeof(u4Byte)); ++ ++ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); ++ } ++ ++ pPsdScan->nPSDMaxValuePoint = 0; ++ pPsdScan->nPSDMaxValue = 0; ++ ++ } ++ else ++ { ++ for (i= pPsdScan->nPSDStartPoint; i<=pPsdScan->nPSDStopPoint; i++) ++ { ++ if (pPsdScan->nPSDReport[i] > pPsdScan->nPSDReport_MaxHold[i]) ++ pPsdScan->nPSDReport_MaxHold[i] = pPsdScan->nPSDReport[i]; ++ ++ //search Max Value ++ if (i ==pPsdScan->nPSDStartPoint ) ++ { ++ i_max = i; ++ val_max = pPsdScan->nPSDReport_MaxHold[i]; ++ } ++ else ++ { ++ if (pPsdScan->nPSDReport_MaxHold[i] > val_max) ++ { ++ i_max = i; ++ val_max = pPsdScan->nPSDReport_MaxHold[i]; ++ } ++ } ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i = %d, PSDReport = %d dB\n", i, pPsdScan->nPSDReport_MaxHold[i])); ++ ++ } ++ ++ pPsdScan->nPSDMaxValuePoint = i_max; ++ pPsdScan->nPSDMaxValue = val_max; ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Max_Hold i_Max = %d, PSDReport_Max = %d dB\n", pPsdScan->nPSDMaxValuePoint ++ // ,pPsdScan->nPSDMaxValue)); ++ } ++ ++ ++} ++ ++u4Byte ++halbtc8723b1ant_PSD_GetData( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte nPoint ++ ) ++{ ++ //reg 0x808[9:0]: FFT data x ++ //reg 0x808[22]: 0-->1 to get 1 FFT data y ++ //reg 0x8b4[15:0]: FFT data y report ++ ++ u4Byte val = 0, psd_report =0; ++ ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); ++ ++ val &= 0xffbffc00; ++ val |= nPoint; ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); ++ ++ val |= 0x00400000; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); ++ ++ ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x8b4); ++ ++ psd_report = val & 0x0000ffff; ++ ++ return psd_report; ++} ++ ++ ++VOID ++halbtc8723b1ant_PSD_SweepPoint( ++IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN s4Byte offset, ++ IN u4Byte span, ++ IN u4Byte points, ++ IN u4Byte avgnum ++ ) ++{ ++ u4Byte i,val,n,k=0; ++ u4Byte nPoints=0, psd_report=0; ++ u4Byte nStartP=0, nStopP=0, nDeltaFreqPerPoint=156250; ++ u4Byte nPSDCenterFreq=20*10^6, freq,freq1,freq2; ++ BOOLEAN outloop = FALSE; ++ u1Byte flag = 0; ++ u4Byte tmp, PsdRep1, PsdRep2; ++ u4Byte WiFi_OriginalChannel = 1; ++ ++ pPsdScan->bIsPSDRunning = TRUE; ++ ++ do ++ { ++ switch(flag) ++ { ++ case 0: //Get PSD parameters ++ default: ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), centFreq=0x%x, offset=0x%x, span=0x%x\n", ++ // centFreq, offset, span)); ++ ++ pPsdScan->nPSDBandWidth = 40*1000000; ++ pPsdScan->nPSDPoint = points; ++ pPsdScan->nPSDStartBase = points/2; ++ pPsdScan->nPSDAvgNum = avgnum; ++ pPsdScan->nRealCentFreq = centFreq; ++ pPsdScan->nRealOffset = offset; ++ pPsdScan->nRealSpan = span; ++ ++ ++ nPoints = pPsdScan->nPSDPoint; ++ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; ++ ++ //PSD point setup ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); ++ val &= 0xffff0fff; ++ ++ switch(pPsdScan->nPSDPoint) ++ { ++ case 128: ++ val |= 0x0; ++ break; ++ case 256: ++ default: ++ val |=0x00004000; ++ break; ++ case 512: ++ val |= 0x00008000; ++ break; ++ case 1024: ++ val |= 0x0000c000; ++ break; ++ } ++ ++ switch(pPsdScan->nPSDAvgNum) ++ { ++ case 1: ++ val |= 0x0; ++ break; ++ case 8: ++ val |=0x00001000; ++ break; ++ case 16: ++ val |= 0x00002000; ++ break; ++ case 32: ++ default: ++ val |= 0x00003000; ++ break; ++ } ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x808, val); ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD BW= %d, DeltaFreq=%d\n" ++ // , pPsdScan->nPSDBandWidth, nDeltaFreqPerPoint)); ++ flag = 1; ++ break; ++ case 1: //calculate the PSD point index from freq/offset/span ++ nPSDCenterFreq = pPsdScan->nPSDBandWidth /2 +offset*(1000000); ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), PSD Center Freq = %d\n", (centFreq + offset))); ++ ++ nStartP = pPsdScan->nPSDStartBase + (nPSDCenterFreq - span *(1000000)/2) /nDeltaFreqPerPoint; ++ pPsdScan->nPSDStartPoint = nStartP - pPsdScan->nPSDStartBase; ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Start PSD Poin Matrix Index = %d\n", pPsdScan->nPSDStartPoint)); ++ ++ nStopP = pPsdScan->nPSDStartBase + (nPSDCenterFreq + span *(1000000)/2) /nDeltaFreqPerPoint; ++ pPsdScan->nPSDStopPoint = nStopP - pPsdScan->nPSDStartBase-1; ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), Stop PSD Poin Matrix Index = %d\n",pPsdScan->nPSDStopPoint)); ++ ++ flag = 2; ++ break; ++ case 2: //set RF channel/BW/Mode ++ ++ //set 3-wire off ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); ++ val |= 0x00300000; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); ++ ++ //CCK off ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); ++ val &= 0xfeffffff; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); ++ ++ //store WiFi original channel ++ WiFi_OriginalChannel = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff); ++ ++ //Set RF channel ++ if (centFreq == 2484) ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, 0xe); ++ else ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, (centFreq-2412)/5 + 1); //WiFi TRx Mask on ++ ++ //Set RF mode = Rx, RF Gain = 0x8a0 ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x0, 0xfffff, 0x308a0); ++ ++ //Set RF Rx filter corner ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x3e4); ++ ++ //Set TRx mask off ++ //un-lock TRx Mask setup ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x1); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x1); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ flag = 3; ++ break; ++ case 3: ++ memset(pPsdScan->nPSDReport,0, pPsdScan->nPSDPoint*sizeof(u4Byte)); ++ nStartP = pPsdScan->nPSDStartPoint + pPsdScan->nPSDStartBase; ++ nStopP = pPsdScan->nPSDStopPoint + pPsdScan->nPSDStartBase + 1; ++ ++ i = nStartP; ++ ++ while (i < nStopP) ++ { ++ if (i >= nPoints) ++ { ++ psd_report = halbtc8723b1ant_PSD_GetData(pBtCoexist,i-nPoints); ++ } ++ else ++ { ++ psd_report = halbtc8723b1ant_PSD_GetData(pBtCoexist,i); ++ } ++ ++ if (psd_report == 0) ++ tmp = 0; ++ else ++ //tmp = 20*log10((double)psd_report); ++ //20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 ++ tmp = 6 * halbtc8723b1ant_PSD_Log2Base(pBtCoexist, psd_report); ++ ++ n = i-pPsdScan->nPSDStartBase; ++ pPsdScan->nPSDReport[n] = tmp; ++ PsdRep1 = pPsdScan->nPSDReport[n] /100; ++ PsdRep2 = pPsdScan->nPSDReport[n] - PsdRep1 * 100; ++ ++ freq = ((centFreq-20) * 1000000 + n * nDeltaFreqPerPoint); ++ freq1 = freq/1000000; ++ freq2 = freq/1000 - freq1 * 1000; ++/* ++ if (freq2 < 100) ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.0%d MHz)", n, freq1, freq2)); ++ else ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint(), i = %d (%d.%d MHz)", n, freq1, freq2)); ++ ++ if (PsdRep2 < 10) ++ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.0%d dB)\n",psd_report, PsdRep1, PsdRep2)); ++ else ++ RT_TRACE(COMP_COEX, DBG_LOUD, (", PSDReport = %d (%d.%d dB)\n",psd_report, PsdRep1,PsdRep2)); ++*/ ++ i++; ++ ++ k=0; ++ ++ //Add Delay between PSD point ++ while(1) ++ { ++ if (k++ > 20000) ++ break; ++ } ++ ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx SweepPSDPoint()==============\n")); ++ } ++ ++ flag = 100; ++ break; ++ case 99: //error ++ ++ outloop = TRUE; ++ break; ++ case 100: //recovery ++ ++ //set 3-wire on ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x88c); ++ val &=0xffcfffff; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x88c,val); ++ ++ //CCK on ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x800); ++ val |= 0x01000000; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x800,val); ++ ++ //PSD off ++ val = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x808); ++ val &=0xffbfffff; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist,0x808,val); ++ ++ //TRx Mask on ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); ++ ++ //lock TRx Mask setup ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdd, 0x80, 0x0); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xdf, 0x1, 0x0); ++ ++ //Set RF Rx filter corner ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0x0); ++ ++ //restore WiFi original channel ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x18, 0x3ff, WiFi_OriginalChannel); ++ ++ outloop = TRUE; ++ break; ++ ++ } ++ ++ }while (!outloop); ++ ++ ++ ++ pPsdScan->bIsPSDRunning = FALSE; ++ ++ ++} ++ ++VOID ++halbtc8723b1ant_PSD_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte BTTxTime, ++ IN u4Byte BTLEChannel ++ ) ++{ ++ u4Byte realseconds = 0, i=0, j=0; ++ u4Byte WLPSD_CentFreq = 2484, WLPSD_Span = 2, WLPSD_SweepCount = 50; ++ s4Byte WLPSD_Offset = -4; ++ u1Byte BTLECh[13] = {3,6,8,11,13,16,18,21,23,26,28,31,33}; ++ ++ u1Byte H2C_Parameter[3] ={0},u1Tmpa,u1Tmpb; ++ ++ u1Byte state=0; ++ BOOLEAN outloop = FALSE, BTResp = FALSE, bScan ,bRoam; ++ u4Byte freq,freq1,freq2,PsdRep1, PsdRep2, nDeltaFreqPerPoint,u4Tmp; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ memset(pPsdScan->nAntDet_PeakVal, 0, 16*sizeof(UCHAR)); ++ memset(pPsdScan->nAntDet_PeakFreq, 0, 16*sizeof(UCHAR)); ++ ++ if (pBoardInfo->bTfbgaPackage) //for TFBGA ++ pPsdScan->nAntDet_ThresOffset = 5; ++ else ++ pPsdScan->nAntDet_ThresOffset = 0; ++ ++ do ++ { ++ switch(state) ++ { ++ case 0: ++ if (BTLEChannel == 39) ++ WLPSD_CentFreq = 2484; ++ else ++ { ++ for (i=1; i<=13; i++) ++ { ++ if (BTLECh[i-1] == BTLEChannel) ++ { ++ WLPSD_CentFreq = 2412 + (i-1) * 5; ++ break; ++ } ++ } ++ ++ if (i == 14) ++ { ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ", BTLEChannel)); ++ outloop = TRUE; ++ break; ++ } ++ } ++ ++ WLPSD_SweepCount = BTTxTime * 238 /100; //BTTxTime/0.42 ++ ++ if (WLPSD_SweepCount % 5 != 0) ++ WLPSD_SweepCount = (WLPSD_SweepCount/5 + 1) * 5; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d, BT_LECh = %d\n", BTTxTime, BTLEChannel)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), WLPSD_CentFreq=%d, WLPSD_Offset = %d, WLPSD_Span = %d, WLPSD_SweepCount = %d\n", ++ WLPSD_CentFreq, WLPSD_Offset, WLPSD_Span,WLPSD_SweepCount)); ++ ++ state = 1; ++ break; ++ case 1: //stop coex DM & set antenna path ++ //Stop Coex DM ++ pBtCoexist->bStopCoexDm = TRUE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n")); ++ ++ //set native power save ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ //Set TDMA off, ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ ++ //Set coex table ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n")); ++ } ++ ++ //Set Antenna path, switch WiFi to un-certain antenna port ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, FALSE); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n")); ++ ++ //Set AFH mask on at WiFi channel 2472MHz +/- 10MHz ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = 0xd; ++ H2C_Parameter[2] = 0x14; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n", ++ H2C_Parameter[1],H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x778=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++ ++ state =2; ++ break; ++ case 2: //Pre-sweep background psd ++ for (pPsdScan->nPSDGenCount=1; pPsdScan->nPSDGenCount<=3; pPsdScan->nPSDGenCount++) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), PSDGenCount = %d\n ", pPsdScan->nPSDGenCount)); ++ halbtc8723b1ant_PSD_SweepPoint(pBtCoexist, WLPSD_CentFreq, WLPSD_Offset, WLPSD_Span, BT_8723B_1ANT_ANTDET_PSD_POINTS, BT_8723B_1ANT_ANTDET_PSD_AVGNUM); ++ halbtc8723b1ant_PSD_MaxHoldData(pBtCoexist, pPsdScan->nPSDGenCount); ++ } ++ ++ pPsdScan->nAntDet_PrePSDScanPeakVal = pPsdScan->nPSDMaxValue; ++ ++ if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset)*100) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n", ++ pPsdScan->nPSDMaxValue/100, BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset)); ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pBoardInfo->btdmAntNumByAntDet = 1; ++ pPsdScan->nAntDet_Result = 5; ++ state = 99; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n", ++ pPsdScan->nPSDMaxValue/100, BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND+pPsdScan->nAntDet_ThresOffset)); ++ state = 3; ++ } ++ break; ++ case 3: ++ BTResp = pBtCoexist->fBtcSetBtAntDetection(pBtCoexist, (u1Byte)(BTTxTime&0xff), (u1Byte)(BTLEChannel&0xff)); ++ ++ for (pPsdScan->nPSDGenCount=1; pPsdScan->nPSDGenCount<=WLPSD_SweepCount; pPsdScan->nPSDGenCount++) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), PSDGenCount = %d\n ", pPsdScan->nPSDGenCount)); ++ halbtc8723b1ant_PSD_SweepPoint(pBtCoexist, WLPSD_CentFreq, WLPSD_Offset, WLPSD_Span, BT_8723B_1ANT_ANTDET_PSD_POINTS, BT_8723B_1ANT_ANTDET_PSD_AVGNUM); ++ halbtc8723b1ant_PSD_MaxHoldData(pBtCoexist, pPsdScan->nPSDGenCount); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if (bScan ||bRoam) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pBoardInfo->btdmAntNumByAntDet = 1; ++ pPsdScan->nAntDet_Result = 8; ++ state = 99; ++ break; ++ } ++ } ++ ++ pPsdScan->nAntDet_PSDScanPeakVal = pPsdScan->nPSDMaxValue; ++ pPsdScan->nAntDet_PSDScanPeakFreq = pPsdScan->nPSDMaxValuePoint; ++ state = 4; ++ break; ++ case 4: ++ ++ if (pPsdScan->nPSDPoint == 0) ++ nDeltaFreqPerPoint = 0; ++ else ++ nDeltaFreqPerPoint = pPsdScan->nPSDBandWidth/pPsdScan->nPSDPoint; ++ ++ PsdRep1 = pPsdScan->nPSDMaxValue/100; ++ PsdRep2 = pPsdScan->nPSDMaxValue - PsdRep1 * 100; ++ ++ freq = ((pPsdScan->nRealCentFreq-20) * 1000000 + pPsdScan->nPSDMaxValuePoint * nDeltaFreqPerPoint); ++ freq1 = freq/1000000; ++ freq2 = freq/1000 - freq1 * 1000; ++ ++ if (freq2 < 100) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz", freq1, freq2)); ++ CL_SPRINTF(pPsdScan->nAntDet_PeakFreq, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.0%d", freq1,freq2); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz", freq1, freq2)); ++ CL_SPRINTF(pPsdScan->nAntDet_PeakFreq, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.%d", freq1,freq2); ++ } ++ ++ if (PsdRep2 < 10) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, (", Value = %d.0%d dB\n", PsdRep1, PsdRep2)); ++ CL_SPRINTF(pPsdScan->nAntDet_PeakVal, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.0%d", PsdRep1,PsdRep2); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, (", Value = %d.%d dB\n",PsdRep1, PsdRep2)); ++ CL_SPRINTF(pPsdScan->nAntDet_PeakVal, BT_8723B_1ANT_ANTDET_BUF_LEN, "%d.%d", PsdRep1,PsdRep2); ++ } ++ ++ pPsdScan->nAntDet_IsBTReplyAvailable = TRUE; ++ ++ if (BTResp == FALSE) ++ { ++ pPsdScan->nAntDet_IsBTReplyAvailable = FALSE; ++ pPsdScan->nAntDet_Result = 0; ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pBoardInfo->btdmAntNumByAntDet = 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail \n ")); ++ } ++ else if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)*100) ++ { ++ pPsdScan->nAntDet_Result = 1; ++ pBoardInfo->btdmAntDetFinish = TRUE; ++ pBoardInfo->btdmAntNumByAntDet = 2; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!! \n")); ++ } ++ else if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION+pPsdScan->nAntDet_ThresOffset)*100) ++ { ++ pPsdScan->nAntDet_Result = 2; ++ pBoardInfo->btdmAntDetFinish = TRUE; ++ pBoardInfo->btdmAntNumByAntDet = 2; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!! \n")); ++ } ++ else if (pPsdScan->nPSDMaxValue > (BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT)*100) ++ { ++ pPsdScan->nAntDet_Result = 3; ++ pBoardInfo->btdmAntDetFinish = TRUE; ++ pBoardInfo->btdmAntNumByAntDet = 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n")); ++ } ++ else ++ { ++ pPsdScan->nAntDet_Result = 4; ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pBoardInfo->btdmAntNumByAntDet = 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n")); ++ } ++ ++ state = 99; ++ break; ++ case 99: //restore setup ++ ++ //Set AFH mask off at WiFi channel 2472MHz +/- 10MHz ++ H2C_Parameter[0] = 0x0; ++ H2C_Parameter[1] = 0x0; ++ H2C_Parameter[2] = 0x0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n", ++ H2C_Parameter[1],H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++ ++ //Set Antenna Path ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!")); ++ ++ //Resume Coex DM ++ pBtCoexist->bStopCoexDm = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!")); ++ ++ //stimulate coex running ++ halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!")); ++ ++ outloop = TRUE; ++ break; ++ } ++ ++ }while(!outloop); ++ ++ ++ ++ } ++ ++VOID ++halbtc8723b1ant_PSD_AntennaDetectionCheck( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u4Byte AntDetCount = 0, AntDetFailCount = 0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++ BOOLEAN bScan, bRoam; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ ++ pPsdScan->nAntDet_BTTxTime = 20; //0.42ms*50 = 20ms ++ pPsdScan->nAntDet_BTLEChannel = 39; ++ ++ AntDetCount++; ++ ++ pPsdScan->bAntDet_TryCount = AntDetCount; ++ ++ if (bScan ||bRoam) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 6; ++ } ++ else if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 11; ++ } ++ else if (pCoexSta->nNumOfProfile >= 1) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 7; ++ } ++ else if (!pPsdScan->nAntDet_IsAntDetAvailable) //Antenna initial setup is not ready ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 9; ++ } ++ else if (pCoexSta->bC2hBtInquiryPage) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 10; ++ } ++ else ++ { ++ halbtc8723b1ant_PSD_AntennaDetection(pBtCoexist, pPsdScan->nAntDet_BTTxTime, pPsdScan->nAntDet_BTLEChannel); ++ } ++ ++ if (!pBoardInfo->btdmAntDetFinish) ++ AntDetFailCount++; ++ ++ pPsdScan->bAntDet_FailCount = AntDetFailCount; ++ ++} ++ ++ ++//============================================================ ++// work around function start with wa_halbtc8723b1ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8723b1ant_ ++//============================================================ ++VOID ++EXhalbtc8723b1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u1Byte u1Tmp=0x0; ++ u2Byte u2Tmp=0x0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx Execute 8723b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n")); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("Ant Det Finish = %s, Ant Det Number = %d\n", ++ (pBoardInfo->btdmAntDetFinish? "Yes":"No"), pBoardInfo->btdmAntNumByAntDet)); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); ++ ++ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); ++ ++ // set GRAN_BT = 1 ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ // set WLAN_ACT = 0 ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // ++ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) ++ // Local setting bit define ++ // BIT0: "0" for no antenna inverse; "1" for antenna inverse ++ // BIT1: "0" for internal switch; "1" for external switch ++ // BIT2: "0" for one antenna; "1" for two antenna ++ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ u1Tmp |= 0x1; // antenna inverse ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ // set to S1 ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ u1Tmp |= 0x1; // antenna inverse ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_PCI) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8723b1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8723b1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); ++ pBtCoexist->bStopCoexDm = FALSE; ++} ++ ++VOID ++EXhalbtc8723b1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ pBtCoexist->bStopCoexDm = FALSE; ++ ++ halbtc8723b1ant_InitCoexDm(pBtCoexist); ++ ++ halbtc8723b1ant_QueryBtInfo(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723b1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u2Byte u2Tmp[4]; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ static u1Byte PopReportIn10s = 0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ if(pBtCoexist->bStopCoexDm) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ if (pPsdScan->bAntDet_TryCount == 0) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Mech/ Pos", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); ++ CL_PRINTF(cliBuf); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)", "Ant PG Num/ Mech(Ant_Det)/ Pos", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNumByAntDet, pBoardInfo->btdmAntPos, ++ pPsdScan->bAntDet_TryCount, pPsdScan->bAntDet_FailCount, pPsdScan->nAntDet_Result); ++ CL_PRINTF(cliBuf); ++ ++ if (pBoardInfo->btdmAntDetFinish) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "Ant Det PSD Value", pPsdScan->nAntDet_PeakVal); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c", "Version Coex/ Fw/ Patch/ Cut", \ ++ GLCoexVerDate8723b1Ant, GLCoexVer8723b1Ant, fwVer, btPatchVer, btPatchVer, pCoexSta->nCutVersion+65); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "WifibHiPri/ Ccklock/ CckEverLock", \ ++ (pCoexSta->bWiFiIsHighPriTask? "Yes":"No"), ++ (pCoexSta->bCCKLock? "Yes":"No"), ++ (pCoexSta->bCCKEverLock? "Yes":"No")); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ PopReportIn10s++; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt, pCoexSta->popEventCnt); ++ CL_PRINTF(cliBuf); ++ ++ if (PopReportIn10s >= 5) ++ { ++ pCoexSta->popEventCnt = 0; ++ PopReportIn10s = 0; ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d / %d / %d", "SCO/HID/PAN/A2DP/NameReq/WHQL", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist, pCoexSta->bC2hBtRemoteNameReq, pCoexSta->bBtWhckTest ); ++ CL_PRINTF(cliBuf); ++ ++ if (pStackInfo->bProfileNotified) ++ { ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ ++ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d", "A2DP Rate/Bitpool", \ ++ (btInfoExt&BIT0)? "BR":"EDR", pCoexSta->nA2DPBitPool); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b1Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ } ++ ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "SM[LowPenaltyRA]", \ ++ pCoexDm->bCurLowPenaltyRa); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ ++ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), ++ pBtCoexist->btInfo.aggBufSize); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ ++ pBtCoexist->btInfo.raMask); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ } ++ ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ if (pBoardInfo->btdmAntNumByAntDet == 2) ++ { ++ if (pCoexDm->bCurPsTdmaOn) ++ psTdmaCase = psTdmaCase +100; //for WiFi RSSI low or BT RSSI low ++ else ++ psTdmaCase = 1; //always translate to TDMA(off,1) for TDMA-off case ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, ++ (pCoexDm->bCurPsTdmaOn? "On":"Off"), ++ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); ++ ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ ++ pCoexSta->nCoexTableType); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "IgnWlanAct", \ ++ pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ /* ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ ++ pCoexDm->errorCondition); ++ CL_PRINTF(cliBuf); ++ */ ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ ++ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ ++ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/0x6cc/0x880[29:25]", \ ++ u1Tmp[0], u4Tmp[0], (u4Tmp[1]&0x3e000000) >> 25); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x764); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x764 / 0x76e", \ ++ u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), (u4Tmp[1] & 0xffff), u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \ ++ u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \ ++ ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ ++ u4Tmp[0]&0xff, u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ ++ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ ++ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; ++ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ ++ u4Tmp[0]&0xffff, faOfdm, faCck); ++ CL_PRINTF(cliBuf); ++ ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 1) ++ //halbtc8723b1ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8723b1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp=0; ++ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ ++ halbtc8723b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8723b1ant_InitCoexDm(pBtCoexist); ++ halbtc8723b1ant_QueryBtInfo(pBtCoexist); ++ ++ pCoexSta->bUnderIps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ u1Byte u1Tmpa, u1Tmpb; ++ u4Byte u4Tmp; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm ) ++ return; ++ ++ if(BTC_SCAN_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ pPsdScan->nAntDet_IsAntDetAvailable = TRUE; ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); ++ } ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ return; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ halbtc8723b1ant_QueryBtInfo(pBtCoexist); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8723b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_SCAN_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8723b1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ } ++ else // wifi is connected ++ { ++ halbtc8723b1ant_ActionWifiConnectedScan(pBtCoexist); ++ } ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8723b1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8723b1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ pPsdScan->nAntDet_IsAntDetAvailable = TRUE; ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ pCoexDm->nArpCnt = 0; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ //pCoexDm->nArpCnt = 0; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8723b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ halbtc8723b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8723b1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8723b1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ BOOLEAN bWifiUnderBMode = FALSE; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ pPsdScan->nAntDet_IsAntDetAvailable = TRUE; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ ++ //Set CCK Tx/Rx high Pri except 11b mode ++ if (bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx ++ } ++ ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ pCoexDm->nArpCnt = 0; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx ++ ++ pCoexSta->bCCKEverLock = FALSE; ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ //H2C_Parameter[0] = 0x1; ++ H2C_Parameter[0] = 0x0; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8723b1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE, bUnder4way=FALSE; ++ u1Byte aggBufSize=5; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type ) ++ { ++ if (BTC_PACKET_ARP == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); ++ ++ pCoexDm->nArpCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); ++ ++ if((pCoexDm->nArpCnt >= 10) && (!bUnder4way)) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); ++ } ++ ++ pCoexSta->specialPktPeriodCnt = 0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8723b1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8723b1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) ++ { ++ halbtc8723b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bBtBusy=FALSE; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8723B_1ANT_MAX) ++ rspSource = BT_INFO_SRC_8723B_1ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ // if 0xff, it means BT is under WHCK test ++ if (btInfo == 0xff) ++ pCoexSta->bBtWhckTest = TRUE; ++ else ++ pCoexSta->bBtWhckTest = FALSE; ++ ++ if(BT_INFO_SRC_8723B_1ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ if (pCoexSta->btRetryCnt >= 1) ++ pCoexSta->popEventCnt++; ++ ++ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) ++ pCoexSta->bC2hBtRemoteNameReq = TRUE; ++ else ++ pCoexSta->bC2hBtRemoteNameReq = FALSE; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2-90; ++ //pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ if (pCoexSta->btInfoC2h[rspSource][1] == 0x49) ++ { ++ pCoexSta->nA2DPBitPool = ++ pCoexSta->btInfoC2h[rspSource][6]; ++ } ++ else ++ pCoexSta->nA2DPBitPool = 0; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if ((pBoardInfo->btdmAntDetFinish) && (pBoardInfo->btdmAntNumByAntDet == 2)) ++ { ++ if(pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x1\n")); ++ ++ //BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c45); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c45); ++ ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x1); ++ } ++ } ++ else ++#endif ++#endif ++ ++ { ++ if(!pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); ++ ++ //BT TRx Mask lock 0x2c[0], 0x30[0] = 0 ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x2c, 0x7c44); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x30, 0x7c44); ++ } ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if(pCoexSta->btInfoExt & BIT1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if(pCoexSta->btInfoExt & BIT3) ++ { ++ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8723b1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8723B_1ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ pCoexSta->nNumOfProfile = 0; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8723B_1ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ ++ pCoexSta->bBtHiPriLinkExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8723B_1ANT_B_FTP) ++ { ++ pCoexSta->bPanExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8723B_1ANT_B_A2DP) ++ { ++ pCoexSta->bA2dpExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8723B_1ANT_B_HID) ++ { ++ pCoexSta->bHidExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8723B_1ANT_B_SCO_ESCO) ++ { ++ pCoexSta->bScoExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ } ++ else ++ pCoexSta->bScoExist = FALSE; ++ ++ if ((pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) &&( pCoexSta->bScoExist == FALSE)) ++ { ++ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ { ++ pCoexSta->bHidExist = TRUE; ++ pCoexSta->wrongProfileNotification++; ++ pCoexSta->nNumOfProfile++; ++ btInfo = btInfo | 0x28; ++ } ++ } ++ ++ //Add Hi-Pri Tx/Rx counter to avoid false detection ++ if (((pCoexSta->bHidExist) || (pCoexSta->bScoExist)) && (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ && (!pCoexSta->bC2hBtInquiryPage)) ++ pCoexSta->bBtHiPriLinkExist = TRUE; ++ ++ if((btInfo&BT_INFO_8723B_1ANT_B_ACL_BUSY) && (pCoexSta->nNumOfProfile == 0)) ++ { ++ if (pCoexSta->lowPriorityTx + pCoexSta->lowPriorityRx >= 160) ++ { ++ pCoexSta->bPanExist = TRUE; ++ pCoexSta->nNumOfProfile++; ++ pCoexSta->wrongProfileNotification++; ++ btInfo = btInfo | 0x88; ++ } ++ } ++ } ++ ++ halbtc8723b1ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) ++ ++ if(!(btInfo&BT_INFO_8723B_1ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8723B_1ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8723B_1ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8723B_1ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8723B_1ANT_B_ACL_BUSY) ++ { ++ if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8723B_1ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ bBtBusy = TRUE; ++ else ++ bBtBusy = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723b1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); ++ ++ if(BTC_RF_ON == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); ++ pBtCoexist->bStopCoexDm = FALSE; ++ } ++ else if(BTC_RF_OFF == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); ++ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); ++ ++ halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ pBtCoexist->bStopCoexDm = TRUE; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ u1Tmpc = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb, u1Tmpc)); ++ ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); ++ ++ halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++} ++ ++VOID ++EXhalbtc8723b1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ ++ halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ pBtCoexist->bStopCoexDm = FALSE; ++ halbtc8723b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8723b1ant_InitCoexDm(pBtCoexist); ++ halbtc8723b1ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723b1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); ++ ++ halbtc8723b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); ++ halbtc8723b1ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723b1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8723b1Ant, GLCoexVer8723b1Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 0) ++ halbtc8723b1ant_QueryBtInfo(pBtCoexist); ++ halbtc8723b1ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8723b1ant_MonitorBtCtr(pBtCoexist); ++ halbtc8723b1ant_MonitorWiFiCtr(pBtCoexist); ++#if BT_8723B_1ANT_ANTDET_ENABLE ++ halbtc8723b1ant_MonitorBtEnableDisable(pBtCoexist); ++#endif ++ ++ if ( (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx < 50) && (pBtLinkInfo->bHidExist == TRUE)) ++ { ++ pBtLinkInfo->bHidExist = FALSE; ++ } ++ ++ if( halbtc8723b1ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust ) ++ { ++ halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); ++ } ++ ++ pCoexSta->specialPktPeriodCnt++; ++ ++ // sample to set bt to execute Ant detection ++ //pBtCoexist->fBtcSetBtAntDetection(pBtCoexist, 20, 14); ++/* ++ if (pPsdScan->bIsAntDetEnable) ++ { ++ if (pPsdScan->nPSDGenCount > pPsdScan->realseconds) ++ pPsdScan->nPSDGenCount = 0; ++ ++ halbtc8723b1ant_AntennaDetection(pBtCoexist, pPsdScan->realcentFreq, pPsdScan->realoffset, pPsdScan->realspan, pPsdScan->realseconds); ++ pPsdScan->nPSDGenTotalCount +=2; ++ pPsdScan->nPSDGenCount += 2; ++ } ++*/ ++#endif ++} ++ ++VOID ++EXhalbtc8723b1ant_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ) ++{ ++ static u4Byte AntDetCount = 0, AntDetFailCount = 0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ BOOLEAN bScan, bRoam; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++ ++ if (seconds == 0) ++ { ++ pPsdScan->bAntDet_TryCount = 0; ++ pPsdScan->bAntDet_FailCount = 0; ++ AntDetCount = 0; ++ AntDetFailCount = 0; ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pBoardInfo->btdmAntNumByAntDet = 1; ++ return; ++ } ++ ++ if (!pBoardInfo->btdmAntDetFinish) ++ { ++ pPsdScan->nAntDet_IntevalCount = pPsdScan->nAntDet_IntevalCount+2; ++ ++ if (pPsdScan->nAntDet_IntevalCount >= BT_8723B_1ANT_ANTDET_RETRY_INTERVAL) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n")); ++ halbtc8723b1ant_PSD_AntennaDetectionCheck(pBtCoexist); ++ ++ if (pBoardInfo->btdmAntDetFinish) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n")); ++#if 1 ++ if (pBoardInfo->btdmAntNumByAntDet == 2) ++ halbtc8723b1ant_MechanismSwitch(pBtCoexist, TRUE); ++ else ++ halbtc8723b1ant_MechanismSwitch(pBtCoexist, FALSE); ++#endif ++ } ++ else ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n")); ++ ++ pPsdScan->nAntDet_IntevalCount = 0; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n", pPsdScan->nAntDet_IntevalCount)); ++ } ++ ++ } ++#endif ++ ++ ++/* ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ ++ pPsdScan->nAntDet_BTTxTime = seconds; //0.42ms*50 = 20ms ++ pPsdScan->nAntDet_BTLEChannel = centFreq; ++ ++ if (seconds == 0) ++ { ++ pPsdScan->bAntDet_TryCount = 0; ++ pPsdScan->bAntDet_FailCount = 0; ++ AntDetCount = 0; ++ AntDetFailCount = 0; ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pBoardInfo->btdmAntNumByAntDet = 1; ++ return; ++ } ++ else ++ { ++ AntDetCount++; ++ ++ pPsdScan->bAntDet_TryCount = AntDetCount; ++ ++ if (bScan ||bRoam) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 6; ++ } ++ else if (pCoexSta->nNumOfProfile >= 1) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 7; ++ } ++ else if (!pPsdScan->nAntDet_IsAntDetAvailable) //Antenna initial setup is not ready ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 9; ++ } ++ else if (pCoexSta->bC2hBtInquiryPage) ++ { ++ pBoardInfo->btdmAntDetFinish = FALSE; ++ pPsdScan->nAntDet_Result = 10; ++ } ++ else ++ { ++ //halbtc8723b1ant_PSD_AntennaDetection(pBtCoexist, pPsdScan->nAntDet_BTTxTime, pPsdScan->nAntDet_BTLEChannel); ++ } ++ ++ if (!pBoardInfo->btdmAntDetFinish) ++ AntDetFailCount++; ++ ++ pPsdScan->bAntDet_FailCount = AntDetFailCount; ++ } ++*/ ++} ++ ++VOID ++EXhalbtc8723b1ant_AntennaIsolation( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ) ++{ ++ ++ ++} ++ ++VOID ++EXhalbtc8723b1ant_PSDScan( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ) ++{ ++ ++ ++} ++ ++VOID ++EXhalbtc8723b1ant_DisplayAntDetection( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++ if (pPsdScan->bAntDet_TryCount != 0) ++ { ++ halbtc8723b1ant_PSD_ShowAntennaDetectResult(pBtCoexist); ++ ++ if (pBoardInfo->btdmAntDetFinish) ++ halbtc8723b1ant_PSD_ShowData(pBtCoexist); ++ return; ++ } ++#endif ++ ++ //halbtc8723b1ant_ShowPSDData(pBtCoexist); ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b1Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b1Ant.h new file mode 100644 -index 000000000..587a527e7 +index 0000000..8e70ac6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b1Ant.h @@ -0,0 +1,337 @@ -+//=========================================== -+// The following is for 8723B 1ANT BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8723B_1ANT 1 -+ -+#define BT_INFO_8723B_1ANT_B_FTP BIT7 -+#define BT_INFO_8723B_1ANT_B_A2DP BIT6 -+#define BT_INFO_8723B_1ANT_B_HID BIT5 -+#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8723B_1ANT_B_CONNECTION BIT0 -+ -+#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2 -+ -+#define BT_8723B_1ANT_WIFI_NOISY_THRESH 50 //30 //max: 255 -+ -+//for Antenna detection -+#define BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50 -+#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70 -+#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55 -+#define BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT 35 -+#define BT_8723B_1ANT_ANTDET_RETRY_INTERVAL 10 //retry timer if ant det is fail, unit: second -+#define BT_8723B_1ANT_ANTDET_ENABLE 0 -+#define BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0 -+ -+typedef enum _BT_INFO_SRC_8723B_1ANT{ -+ BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8723B_1ANT_MAX -+}BT_INFO_SRC_8723B_1ANT,*PBT_INFO_SRC_8723B_1ANT; -+ -+typedef enum _BT_8723B_1ANT_BT_STATUS{ -+ BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8723B_1ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8723B_1ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8723B_1ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8723B_1ANT_BT_STATUS_MAX -+}BT_8723B_1ANT_BT_STATUS,*PBT_8723B_1ANT_BT_STATUS; -+ -+typedef enum _BT_8723B_1ANT_WIFI_STATUS{ -+ BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, -+ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, -+ BT_8723B_1ANT_WIFI_STATUS_MAX -+}BT_8723B_1ANT_WIFI_STATUS,*PBT_8723B_1ANT_WIFI_STATUS; -+ -+typedef enum _BT_8723B_1ANT_COEX_ALGO{ -+ BT_8723B_1ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8723B_1ANT_COEX_ALGO_SCO = 0x1, -+ BT_8723B_1ANT_COEX_ALGO_HID = 0x2, -+ BT_8723B_1ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8723B_1ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8723B_1ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8723B_1ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8723B_1ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8723B_1ANT_COEX_ALGO_MAX = 0xb, -+}BT_8723B_1ANT_COEX_ALGO,*PBT_8723B_1ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8723B_1ANT{ -+ // hw setting -+ u1Byte preAntPosType; -+ u1Byte curAntPosType; -+ // fw mechanism -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ // sw mechanism -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt -+ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt -+ u2Byte backupRetryLimit; -+ u1Byte backupAmpduMaxTime; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ u1Byte preArfrType; -+ u1Byte curArfrType; -+ u1Byte preRetryLimitType; -+ u1Byte curRetryLimitType; -+ u1Byte preAmpduTimeType; -+ u1Byte curAmpduTimeType; -+ u4Byte nArpCnt; -+ -+ u1Byte errorCondition; -+} COEX_DM_8723B_1ANT, *PCOEX_DM_8723B_1ANT; -+ -+typedef struct _COEX_STA_8723B_1ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ BOOLEAN bBtHiPriLinkExist; -+ u1Byte nNumOfProfile; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte specialPktPeriodCnt; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ s1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8723B_1ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723B_1ANT_MAX]; -+ BOOLEAN bBtWhckTest; -+ BOOLEAN bC2hBtInquiryPage; -+ BOOLEAN bC2hBtRemoteNameReq; -+ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ u4Byte popEventCnt; -+ u1Byte nScanAPNum; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ BOOLEAN bCCKLock; -+ BOOLEAN bPreCCKLock; -+ BOOLEAN bCCKEverLock; -+ u1Byte nCoexTableType; -+ -+ BOOLEAN bForceLpsOn; -+ u4Byte wrongProfileNotification; -+ -+ u1Byte nA2DPBitPool; -+ u1Byte nCutVersion; -+}COEX_STA_8723B_1ANT, *PCOEX_STA_8723B_1ANT; -+ -+#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 //MAX:1024 -+#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 //MAX:3 -+#define BT_8723B_1ANT_ANTDET_BUF_LEN 16 -+ -+typedef struct _PSDSCAN_STA_8723B_1ANT{ -+ -+u4Byte nAntDet_BTLEChannel; //BT LE Channel ex:2412 -+u4Byte nAntDet_BTTxTime; -+u4Byte nAntDet_PrePSDScanPeakVal; -+BOOLEAN nAntDet_IsAntDetAvailable; -+u4Byte nAntDet_PSDScanPeakVal; -+BOOLEAN nAntDet_IsBTReplyAvailable; -+u4Byte nAntDet_PSDScanPeakFreq; -+ -+u1Byte nAntDet_Result; -+u1Byte nAntDet_PeakVal[BT_8723B_1ANT_ANTDET_BUF_LEN]; -+u1Byte nAntDet_PeakFreq[BT_8723B_1ANT_ANTDET_BUF_LEN]; -+u4Byte bAntDet_TryCount; -+u4Byte bAntDet_FailCount; -+u4Byte nAntDet_IntevalCount; -+u4Byte nAntDet_ThresOffset; -+ -+u4Byte nRealCentFreq; -+s4Byte nRealOffset; -+u4Byte nRealSpan; -+ -+u4Byte nPSDBandWidth; //unit: Hz -+u4Byte nPSDPoint; //128/256/512/1024 -+u4Byte nPSDReport[1024]; //unit:dB (20logx), 0~255 -+u4Byte nPSDReport_MaxHold[1024]; //unit:dB (20logx), 0~255 -+u4Byte nPSDStartPoint; -+u4Byte nPSDStopPoint; -+u4Byte nPSDMaxValuePoint; -+u4Byte nPSDMaxValue; -+u4Byte nPSDStartBase; -+u4Byte nPSDAvgNum; // 1/8/16/32 -+u4Byte nPSDGenCount; -+BOOLEAN bIsPSDRunning; -+BOOLEAN bIsPSDShowMaxOnly; -+} PSDSCAN_STA_8723B_1ANT, *PPSDSCAN_STA_8723B_1ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8723b1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8723b1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8723b1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8723b1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b1ant_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+VOID -+EXhalbtc8723b1ant_AntennaIsolation( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+ -+VOID -+EXhalbtc8723b1ant_PSDScan( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+VOID -+EXhalbtc8723b1ant_DisplayAntDetection( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8723B 1ANT BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8723B_1ANT 1 ++ ++#define BT_INFO_8723B_1ANT_B_FTP BIT7 ++#define BT_INFO_8723B_1ANT_B_A2DP BIT6 ++#define BT_INFO_8723B_1ANT_B_HID BIT5 ++#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8723B_1ANT_B_CONNECTION BIT0 ++ ++#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2 ++ ++#define BT_8723B_1ANT_WIFI_NOISY_THRESH 50 //30 //max: 255 ++ ++//for Antenna detection ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50 ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70 ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55 ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT 35 ++#define BT_8723B_1ANT_ANTDET_RETRY_INTERVAL 10 //retry timer if ant det is fail, unit: second ++#define BT_8723B_1ANT_ANTDET_ENABLE 0 ++#define BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0 ++ ++typedef enum _BT_INFO_SRC_8723B_1ANT{ ++ BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723B_1ANT_MAX ++}BT_INFO_SRC_8723B_1ANT,*PBT_INFO_SRC_8723B_1ANT; ++ ++typedef enum _BT_8723B_1ANT_BT_STATUS{ ++ BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723B_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8723B_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8723B_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8723B_1ANT_BT_STATUS_MAX ++}BT_8723B_1ANT_BT_STATUS,*PBT_8723B_1ANT_BT_STATUS; ++ ++typedef enum _BT_8723B_1ANT_WIFI_STATUS{ ++ BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8723B_1ANT_WIFI_STATUS_MAX ++}BT_8723B_1ANT_WIFI_STATUS,*PBT_8723B_1ANT_WIFI_STATUS; ++ ++typedef enum _BT_8723B_1ANT_COEX_ALGO{ ++ BT_8723B_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723B_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723B_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8723B_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8723B_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8723B_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8723B_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8723B_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8723B_1ANT_COEX_ALGO_MAX = 0xb, ++}BT_8723B_1ANT_COEX_ALGO,*PBT_8723B_1ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8723B_1ANT{ ++ // hw setting ++ u1Byte preAntPosType; ++ u1Byte curAntPosType; ++ // fw mechanism ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ // sw mechanism ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt ++ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt ++ u2Byte backupRetryLimit; ++ u1Byte backupAmpduMaxTime; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ u1Byte preArfrType; ++ u1Byte curArfrType; ++ u1Byte preRetryLimitType; ++ u1Byte curRetryLimitType; ++ u1Byte preAmpduTimeType; ++ u1Byte curAmpduTimeType; ++ u4Byte nArpCnt; ++ ++ u1Byte errorCondition; ++} COEX_DM_8723B_1ANT, *PCOEX_DM_8723B_1ANT; ++ ++typedef struct _COEX_STA_8723B_1ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ BOOLEAN bBtHiPriLinkExist; ++ u1Byte nNumOfProfile; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte specialPktPeriodCnt; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ s1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8723B_1ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723B_1ANT_MAX]; ++ BOOLEAN bBtWhckTest; ++ BOOLEAN bC2hBtInquiryPage; ++ BOOLEAN bC2hBtRemoteNameReq; ++ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ u4Byte popEventCnt; ++ u1Byte nScanAPNum; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ BOOLEAN bCCKLock; ++ BOOLEAN bPreCCKLock; ++ BOOLEAN bCCKEverLock; ++ u1Byte nCoexTableType; ++ ++ BOOLEAN bForceLpsOn; ++ u4Byte wrongProfileNotification; ++ ++ u1Byte nA2DPBitPool; ++ u1Byte nCutVersion; ++}COEX_STA_8723B_1ANT, *PCOEX_STA_8723B_1ANT; ++ ++#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 //MAX:1024 ++#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 //MAX:3 ++#define BT_8723B_1ANT_ANTDET_BUF_LEN 16 ++ ++typedef struct _PSDSCAN_STA_8723B_1ANT{ ++ ++u4Byte nAntDet_BTLEChannel; //BT LE Channel ex:2412 ++u4Byte nAntDet_BTTxTime; ++u4Byte nAntDet_PrePSDScanPeakVal; ++BOOLEAN nAntDet_IsAntDetAvailable; ++u4Byte nAntDet_PSDScanPeakVal; ++BOOLEAN nAntDet_IsBTReplyAvailable; ++u4Byte nAntDet_PSDScanPeakFreq; ++ ++u1Byte nAntDet_Result; ++u1Byte nAntDet_PeakVal[BT_8723B_1ANT_ANTDET_BUF_LEN]; ++u1Byte nAntDet_PeakFreq[BT_8723B_1ANT_ANTDET_BUF_LEN]; ++u4Byte bAntDet_TryCount; ++u4Byte bAntDet_FailCount; ++u4Byte nAntDet_IntevalCount; ++u4Byte nAntDet_ThresOffset; ++ ++u4Byte nRealCentFreq; ++s4Byte nRealOffset; ++u4Byte nRealSpan; ++ ++u4Byte nPSDBandWidth; //unit: Hz ++u4Byte nPSDPoint; //128/256/512/1024 ++u4Byte nPSDReport[1024]; //unit:dB (20logx), 0~255 ++u4Byte nPSDReport_MaxHold[1024]; //unit:dB (20logx), 0~255 ++u4Byte nPSDStartPoint; ++u4Byte nPSDStopPoint; ++u4Byte nPSDMaxValuePoint; ++u4Byte nPSDMaxValue; ++u4Byte nPSDStartBase; ++u4Byte nPSDAvgNum; // 1/8/16/32 ++u4Byte nPSDGenCount; ++BOOLEAN bIsPSDRunning; ++BOOLEAN bIsPSDShowMaxOnly; ++} PSDSCAN_STA_8723B_1ANT, *PPSDSCAN_STA_8723B_1ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8723b1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8723b1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8723b1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8723b1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b1ant_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++VOID ++EXhalbtc8723b1ant_AntennaIsolation( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++ ++VOID ++EXhalbtc8723b1ant_PSDScan( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++VOID ++EXhalbtc8723b1ant_DisplayAntDetection( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b2Ant.c new file mode 100644 -index 000000000..c5e47a1e1 +index 0000000..6273bcc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b2Ant.c @@ -0,0 +1,4933 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8723B Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8723b2Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8723B_2ANT GLCoexDm8723b2Ant; -+static PCOEX_DM_8723B_2ANT pCoexDm=&GLCoexDm8723b2Ant; -+static COEX_STA_8723B_2ANT GLCoexSta8723b2Ant; -+static PCOEX_STA_8723B_2ANT pCoexSta=&GLCoexSta8723b2Ant; -+ -+const char *const GLBtInfoSrc8723b2Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8723b2Ant=20150119; -+u4Byte GLCoexVer8723b2Ant=0x44; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8723b2ant_ -+//============================================================ -+u1Byte -+halbtc8723b2ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8723b2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8723b2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ -+ bPreBtDisabled = bBtDisabled; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ if(bBtDisabled) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ } -+ } -+} -+ -+ -+VOID -+halbtc8723b2ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+} -+ -+VOID -+halbtc8723b2ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ if( (pCoexSta->lowPriorityTx > 1050) && (!pCoexSta->bC2hBtInquiryPage)) -+ pCoexSta->popEventCnt++; -+ -+ if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) ) -+ { -+ pBtLinkInfo->bSlaveRole = TRUE; -+ } -+ else -+ { -+ pBtLinkInfo->bSlaveRole = FALSE; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8723b2ant_MonitorWiFiCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u2Byte u2Tmp[3]; -+ s4Byte wifiRssi=0; -+ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; -+ static u1Byte nCCKLockCounter = 0; -+ -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->nCRCOK_CCK = 0; -+ pCoexSta->nCRCOK_11g = 0; -+ pCoexSta->nCRCOK_11n = 0; -+ pCoexSta->nCRCOK_11nAgg = 0; -+ -+ pCoexSta->nCRCErr_CCK = 0; -+ pCoexSta->nCRCErr_11g = 0; -+ pCoexSta->nCRCErr_11n = 0; -+ pCoexSta->nCRCErr_11nAgg = 0; -+ } -+ else -+ { -+ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); -+ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); -+ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); -+ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); -+ -+ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); -+ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); -+ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); -+ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); -+ } -+ -+ //reset counter -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); -+} -+ -+VOID -+halbtc8723b2ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+BOOLEAN -+halbtc8723b2ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ -+ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) -+ { -+ return TRUE; -+ } -+ -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8723b2ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) // profile from bt patch -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+#else // profile from bt stack -+ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; -+ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; -+ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; -+ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; -+ -+ //for win-8 stack HID report error -+ if(!pStackInfo->bHidExist) -+ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack -+ // when stack HID report error, here we use the info from bt fw. -+ if(!pStackInfo->bBtLinkExist) -+ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+#endif -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8723b2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8723B_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+#if 0 -+ if(pStackInfo->numOfHid >= 2) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ else -+#endif -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8723b2ant_SetFwDacSwingLevel( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte dacSwingLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ // There are several type of dacswing -+ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 -+ H2C_Parameter[0] = dacSwingLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b2ant_SetFwDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = decBtPwrLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", -+ decBtPwrLvl, H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b2ant_DecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", -+ (bForceExec? "force to":""), decBtPwrLvl)); -+ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) -+ return; -+ } -+ halbtc8723b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); -+ -+ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; -+} -+ -+VOID -+halbtc8723b2ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b2ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8723b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8723b2ant_FwDacSwingLvl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte fwDacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", -+ (bForceExec? "force to":""), fwDacSwingLvl)); -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) -+ return; -+ } -+ -+ halbtc8723b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); -+ -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+} -+ -+VOID -+halbtc8723b2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8723b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8723b2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!")) ); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ //return; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8723b2ant_SetDacSwingReg( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte level -+ ) -+{ -+ u1Byte val=(u1Byte)level; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val); -+} -+ -+VOID -+halbtc8723b2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ if(bSwDacSwingOn) -+ { -+ halbtc8723b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); -+ } -+ else -+ { -+ halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18); -+ } -+} -+ -+ -+VOID -+halbtc8723b2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8723b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8723b2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1); -+ } -+} -+ -+VOID -+halbtc8723b2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8723b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8723b2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ //=================BB AGC Gain Table -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001); -+ } -+ -+ -+ //=================RF Gain -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); -+ -+ // set rssiAdjustVal for wifi module. -+ if(bAgcTableEn) -+ { -+ rssiAdjustVal = 8; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+VOID -+halbtc8723b2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8723b2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8723b2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8723b2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8723b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8723b2ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexSta->nCoexTableType = type; -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 7: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 8: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 9: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 10: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 11: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 12: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 13: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 14: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 15: -+ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8723b2ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b2ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8723b2ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8723b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8723b2ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8723b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8723b2ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ -+ -+ if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) ) -+ { -+ byte5 = byte5 | 0x1; -+ } -+ -+ H2C_Parameter[0] = byte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = byte5; -+ -+ pCoexDm->psTdmaPara[0] = byte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = byte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+VOID -+halbtc8723b2ant_SwMechanism1( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bShrinkRxLPF, -+ IN BOOLEAN bLowPenaltyRA, -+ IN BOOLEAN bLimitedDIG, -+ IN BOOLEAN bBTLNAConstrain -+ ) -+{ -+ /* -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 -+ { -+ if (bShrinkRxLPF) -+ bShrinkRxLPF = FALSE; -+ } -+ */ -+ -+ //halbtc8723b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); -+ halbtc8723b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8723b2ant_SwMechanism2( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAGCTableShift, -+ IN BOOLEAN bADCBackOff, -+ IN BOOLEAN bSWDACSwing, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ //halbtc8723b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); -+ //halbtc8723b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); -+ //halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); -+} -+ -+VOID -+halbtc8723b2ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte fwVer=0, u4Tmp=0; -+ BOOLEAN bPgExtSwitch=FALSE; -+ BOOLEAN bUseExtSwitch=FALSE; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver -+ -+ if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) -+ bUseExtSwitch = TRUE; -+ -+ if(bInitHwCfg) -+ { -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); -+ -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to High to avoid A2DP click */ -+ H2C_Parameter[0] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ } -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off -+ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. -+ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ //tell firmware "no antenna inverse" -+ H2C_Parameter[0] = 0; -+ } -+ else -+ { -+ //tell firmware "antenna inverse" -+ H2C_Parameter[0] = 1; -+ } -+ -+ if (bUseExtSwitch) -+ { -+ //ext switch type -+ H2C_Parameter[1] = 1; -+ } -+ else -+ { -+ //int switch type -+ H2C_Parameter[1] = 0; -+ } -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ else -+ { -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to "Control by PTA"*/ -+ H2C_Parameter[0] = 0; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); -+ } -+ } -+ -+ // ext switch setting -+ if(bUseExtSwitch) -+ { -+ if (bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &=~BIT23; -+ u4Tmp |= BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT -+ switch(antPosType) -+ { -+ case BTC_ANT_WIFI_AT_MAIN: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi -+ break; -+ case BTC_ANT_WIFI_AT_AUX: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi -+ break; -+ } -+ } -+ else // internal switch -+ { -+ if (bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp |= BIT23; -+ u4Tmp &=~BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ } -+ -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux -+ switch(antPosType) -+ { -+ case BTC_ANT_WIFI_AT_MAIN: -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT -+ break; -+ case BTC_ANT_WIFI_AT_AUX: -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT -+ break; -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bTurnOnByCnt=FALSE; -+ u1Byte psTdmaTypeByCnt=0; -+ u1Byte wifiRssiState1, btRssiState; -+ s1Byte nWiFiDurationAdjust = 0x0; -+ u1Byte psTdmaByte4Modify = 0x0; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn) -+ { -+ type = type +100; //for WiFi RSSI low or BT RSSI low -+ pCoexDm->bIsSwitchTo1dot5Ant = TRUE; -+ } -+ else -+ { -+ pCoexDm->bIsSwitchTo1dot5Ant = FALSE; -+ } -+ -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ -+ if (pCoexSta->nScanAPNum <= 5) -+ { -+ if (pCoexSta->nA2DPBitPool >= 45) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nA2DPBitPool >= 35) -+ nWiFiDurationAdjust = -10; -+ else -+ nWiFiDurationAdjust = 5; -+ } -+ else if (pCoexSta->nScanAPNum <= 20) -+ { -+ if (pCoexSta->nA2DPBitPool >= 45) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nA2DPBitPool >= 35) -+ nWiFiDurationAdjust = -10; -+ else -+ nWiFiDurationAdjust = 0; -+ } -+ else if (pCoexSta->nScanAPNum <= 40) -+ { -+ if (pCoexSta->nA2DPBitPool >= 45) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nA2DPBitPool >= 35) -+ nWiFiDurationAdjust = -10; -+ else -+ nWiFiDurationAdjust = -5; -+ } -+ else -+ { -+ if (pCoexSta->nA2DPBitPool >= 45) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nA2DPBitPool >= 35) -+ nWiFiDurationAdjust = -10; -+ else -+ nWiFiDurationAdjust = -10; -+ } -+ -+ if ( (pBtLinkInfo->bSlaveRole == TRUE) && (pBtLinkInfo->bA2dpExist) ) -+ psTdmaByte4Modify = 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ -+ -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ case 1: -+ default: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 2: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 3: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 4: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 5: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 6: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 7: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 8: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 9: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 10: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 11: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 12: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 13: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 14: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 15: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 16: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 17: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); -+ break; -+ case 18: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ break; -+ case 19: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); -+ break; -+ case 20: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); -+ break; -+ case 21: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); -+ break; -+ case 71: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90); -+ break; -+ case 101: -+ case 105: -+ case 171: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a+nWiFiDurationAdjust, 0x03, 0x70, 0x50|psTdmaByte4Modify); -+ break; -+ case 102: -+ case 106: -+ case 110: -+ case 114: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d+nWiFiDurationAdjust, 0x03, 0x70, 0x50|psTdmaByte4Modify); -+ break; -+ case 103: -+ case 107: -+ case 111: -+ case 115: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50|psTdmaByte4Modify); -+ break; -+ case 104: -+ case 108: -+ case 112: -+ case 116: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50|psTdmaByte4Modify); -+ break; -+ case 109: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90|psTdmaByte4Modify); -+ break; -+ case 113: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 121: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90|psTdmaByte4Modify); -+ break; -+ case 22: -+ case 122: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11); -+ break; -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(type) -+ { -+ case 0: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ case 1: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); -+ break; -+ default: -+ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8723b2ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8723b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+ -+VOID -+halbtc8723b2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8723b2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); -+ -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ pCoexSta->popEventCnt = 0; -+ -+} -+ -+VOID -+halbtc8723b2ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bLowPwrDisable=TRUE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ if(bScan || bLink || bRoam) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n")); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ } -+ else if(bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n")); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n")); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+/* -+ pCoexDm->bNeedRecover0x948 = TRUE; -+ pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ -+ halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE); -+*/ -+} -+ -+ -+VOID -+halbtc8723b2ant_ActionWiFiLinkProcess( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa, u1Tmpb; -+ -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+} -+ -+BOOLEAN -+halbtc8723b2ant_ActionWifiIdleProcess( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ //wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ -+ // define the office environment -+ if(BTC_RSSI_HIGH(wifiRssiState1) && -+ (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE)) -+ { -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n")); -+ -+ halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ return TRUE; -+ } -+ else -+ { -+ halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ return FALSE; -+ } -+ -+ -+} -+ -+ -+ -+BOOLEAN -+halbtc8723b2ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; -+ BOOLEAN bAsus8723b=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if(BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else if(BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bBtHsOn) -+ return FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8723B, &bAsus8723b); -+ if(!bAsus8723b) -+ bCommon = FALSE; -+ else -+ bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ //bCommon = FALSE; -+ bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist); -+ } -+ } -+ } -+ -+ return bCommon; -+} -+VOID -+halbtc8723b2ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bScoHid, -+ IN BOOLEAN bTxPause, -+ IN u1Byte maxInterval -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ { -+ if(bScoHid) -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ else -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ } -+ } -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ -+ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) -+ retryCount++; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); -+ if(maxInterval == 1) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 2) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 3) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+} -+ -+// SCO only or SCO+PAN(HS) -+VOID -+halbtc8723b2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else //for SCO quality & wifi performance balance at 11n mode -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); -+ } -+ } -+} -+ -+ -+VOID -+halbtc8723b2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9); -+ } -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ } -+ else -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8723b2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ -+ // define the office environment -+ if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ //DbgPrint(" AP#>10(%d)\n", apNum); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); -+ } -+ return; -+ -+ } -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ } -+ else -+ { -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState,wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ } -+ else -+ { -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ } -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+ -+//PAN(HS) only -+VOID -+halbtc8723b2ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8723b2ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ else -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); -+ //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); -+ } -+ else -+ { -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ } -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); -+ } -+ else -+ { -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8723b2ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState,wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ else -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ //btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0); -+ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8723b2ant_BtRssiState(3, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); -+ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_LEGACY == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { // only 802.11N mode we have to dec bt power to 4 degree -+ if(BTC_RSSI_HIGH(btRssiState)) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ // need to check ap Number of Not -+ if(apNum < 10) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8723b2ant_ActionBtWhckTest( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8723b2ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+} -+ -+VOID -+halbtc8723b2ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; -+ u1Byte btInfoOriginal=0, btRetryCnt=0; -+ u1Byte algorithm=0; -+ u4Byte numOfWifiLink=0; -+ u4Byte wifiLinkStatus=0; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bMiracastPlusBt=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ if(pCoexSta->bBtWhckTest) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); -+ halbtc8723b2ant_ActionBtWhckTest(pBtCoexist); -+ return; -+ } -+ -+ algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist); -+ if(pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS!=algorithm)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); -+ halbtc8723b2ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else -+ { -+ /* -+ if(pCoexDm->bNeedRecover0x948) -+ { -+ pCoexDm->bNeedRecover0x948 = FALSE; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948); -+ } -+ */ -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n")); -+ halbtc8723b2ant_ActionWiFiLinkProcess(pBtCoexist); -+ return; -+ } -+ -+ //for P2P -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); -+ -+ if(pBtLinkInfo->bBtLinkExist) -+ { -+ bMiracastPlusBt = TRUE; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ halbtc8723b2ant_ActionWifiMultiPort(pBtCoexist); -+ -+ return; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ } -+ -+ pCoexDm->curAlgorithm = algorithm; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); -+ -+ if(halbtc8723b2ant_IsCommonAction(pBtCoexist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", -+ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8723B_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); -+ halbtc8723b2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); -+ halbtc8723b2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); -+ halbtc8723b2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); -+ halbtc8723b2ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); -+ halbtc8723b2ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); -+ halbtc8723b2ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); -+ halbtc8723b2ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); -+ halbtc8723b2ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); -+ halbtc8723b2ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8723B_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); -+ halbtc8723b2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); -+ halbtc8723b2ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8723b2ant_WifiOffHwCfg( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bIsInMpMode = FALSE; -+ u1Byte H2C_Parameter[2] ={0}; -+ u4Byte fwVer=0; -+ -+ // set wlan_act to low -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to HIGH */ -+ H2C_Parameter[0] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); -+ if(!bIsInMpMode) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi -+} -+ -+VOID -+halbtc8723b2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0, fwVer; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ //0xf0[15:12] --> Chip Cut information -+ pCoexSta->nCutVersion = (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xf1) & 0xf0) >> 4; -+ -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ //Antenna config -+ halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); -+ pCoexSta->disVerInfoCnt = 0; -+ -+ // PTA parameter -+ halbtc8723b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ // Enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8723b2ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8723b2ant_ -+//============================================================ -+VOID -+EXhalbtc8723b2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u2Byte u2Tmp=0x0; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); -+ -+ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. -+ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ else -+ { -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ // set to S1 -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723b2ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ -+ -+ // -+ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) -+ // Local setting bit define -+ // BIT0: "0" for no antenna inverse; "1" for antenna inverse -+ // BIT1: "0" for internal switch; "1" for external switch -+ // BIT2: "0" for one antenna; "1" for two antenna -+ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ u1Tmp |= 0x1; // antenna inverse -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); -+ } -+ else -+ { -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ u1Tmp |= 0x1; // antenna inverse -+ } -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_PCI) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); -+ } -+ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8723b2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8723b2ant_InitHwConfig(pBtCoexist, TRUE); -+} -+ -+VOID -+EXhalbtc8723b2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8723b2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8723b2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ u4Byte faOfdm, faCck; -+ u4Byte fwVer=0, btPatchVer=0; -+ static u1Byte PopReportIn10s = 0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c", "Version Coex/ Fw/ Patch/ Cut", \ -+ GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer, pCoexSta->nCutVersion+65); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ PopReportIn10s++; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi-100, pCoexSta->btRetryCnt, pCoexSta->popEventCnt); -+ CL_PRINTF(cliBuf); -+ -+ if (PopReportIn10s >= 5) -+ { -+ pCoexSta->popEventCnt = 0; -+ PopReportIn10s = 0; -+ } -+ -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d / %d / %d", "SCO/HID/PAN/A2DP/NameReq/WHQL", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist, pCoexSta->bC2hBtRemoteNameReq, pCoexSta->bBtWhckTest ); -+ CL_PRINTF(cliBuf); -+ -+ if (pStackInfo->bProfileNotified) -+ { -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ -+ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "A2DP Rate/Bitpool", \ -+ (btInfoExt&BIT0)? "BR":"EDR", pCoexSta->nA2DPBitPool); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b2Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ // Sw mechanism -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ } -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ -+ if (pCoexDm->bIsSwitchTo1dot5Ant) -+ psTdmaCase = psTdmaCase + 100; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, -+ (pCoexDm->bCurPsTdmaOn? "On":"Off"), -+ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ -+ pCoexSta->nCoexTableType); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ -+ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \ -+ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25); -+ CL_PRINTF(cliBuf); -+ -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \ -+ u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \ -+ u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3); -+ CL_PRINTF(cliBuf); -+ -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \ -+ ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ -+ u4Tmp[0]&0xff, u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); -+ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ -+ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ -+ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; -+ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ -+ u4Tmp[0]&0xffff, faOfdm, faCck); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) -+ //halbtc8723b2ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8723b2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ halbtc8723b2ant_WifiOffHwCfg(pBtCoexist); -+ halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ halbtc8723b2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8723b2ant_InitCoexDm(pBtCoexist); -+ halbtc8723b2ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8723b2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8723b2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa, u1Tmpb; -+ -+ -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", -+ u4Tmp, u1Tmpa, u1Tmpb)); -+} -+ -+VOID -+EXhalbtc8723b2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8723b2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ u1Byte apNum=0; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ if(apNum < 10) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+} -+ -+VOID -+EXhalbtc8723b2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8723b2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ static BOOLEAN bPreScoExist=FALSE; -+ u4Byte raMask=0x0; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8723B_2ANT_MAX) -+ rspSource = BT_INFO_SRC_8723B_2ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); -+ return; -+ } -+ -+ // if 0xff, it means BT is under WHCK test -+ if (btInfo == 0xff) -+ pCoexSta->bBtWhckTest = TRUE; -+ else -+ pCoexSta->bBtWhckTest = FALSE; -+ -+ if(BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ if (pCoexSta->btRetryCnt >= 1) -+ pCoexSta->popEventCnt++; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) -+ pCoexSta->bC2hBtRemoteNameReq = TRUE; -+ else -+ pCoexSta->bC2hBtRemoteNameReq = FALSE; -+ -+ if (pCoexSta->btInfoC2h[rspSource][1] == 0x49) -+ { -+ pCoexSta->nA2DPBitPool = -+ pCoexSta->btInfoC2h[rspSource][6]; -+ } -+ else -+ pCoexSta->nA2DPBitPool = 0; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ if (pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n")); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); -+ } -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if( (pCoexSta->btInfoExt & BIT1) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if( (pCoexSta->btInfoExt & BIT3) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8723b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8723B_2ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8723B_2ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8723B_2ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8723B_2ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ -+ if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE)) -+ { -+ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) -+ { -+ pCoexSta->bHidExist = TRUE; -+ btInfo = btInfo | 0x28; -+ } -+ } -+ } -+ -+ halbtc8723b2ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8723B_2ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8723B_2ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8723B_2ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8723B_2ANT_B_ACL_BUSY) -+ { -+ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8723B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bBtBusy = TRUE; -+ bLimitedDig = TRUE; -+ } -+ else -+ { -+ bBtBusy = FALSE; -+ bLimitedDig = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ pCoexDm->bLimitedDig = bLimitedDig; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); -+ -+ halbtc8723b2ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8723b2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8723b2ant_WifiOffHwCfg(pBtCoexist); -+ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. -+ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 -+ halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8723b2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8723b2ant_InitCoexDm(pBtCoexist); -+ halbtc8723b2ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8723b2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ //static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(pCoexSta->disVerInfoCnt <= 5) -+ { -+ pCoexSta->disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ -+ if (pCoexSta->disVerInfoCnt == 3) -+ { -+ //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n")); -+ halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); -+ } -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0) -+ halbtc8723b2ant_QueryBtInfo(pBtCoexist); -+ halbtc8723b2ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ halbtc8723b2ant_MonitorBtCtr(pBtCoexist); -+ halbtc8723b2ant_MonitorWiFiCtr(pBtCoexist); -+ -+ //for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist -+ if ( (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx < 50) && (pBtLinkInfo->bHidExist == TRUE)) -+ { -+ pBtLinkInfo->bHidExist = FALSE; -+ } -+ -+ if( halbtc8723b2ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust) -+ { -+ halbtc8723b2ant_RunCoexistMechanism(pBtCoexist); -+ } -+#endif -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8723B Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8723b2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8723B_2ANT GLCoexDm8723b2Ant; ++static PCOEX_DM_8723B_2ANT pCoexDm=&GLCoexDm8723b2Ant; ++static COEX_STA_8723B_2ANT GLCoexSta8723b2Ant; ++static PCOEX_STA_8723B_2ANT pCoexSta=&GLCoexSta8723b2Ant; ++ ++const char *const GLBtInfoSrc8723b2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8723b2Ant=20150119; ++u4Byte GLCoexVer8723b2Ant=0x44; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8723b2ant_ ++//============================================================ ++u1Byte ++halbtc8723b2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8723b2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8723b2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ ++ bPreBtDisabled = bBtDisabled; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ if(bBtDisabled) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8723b2ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++VOID ++halbtc8723b2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if( (pCoexSta->lowPriorityTx > 1050) && (!pCoexSta->bC2hBtInquiryPage)) ++ pCoexSta->popEventCnt++; ++ ++ if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) ) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8723b2ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); ++ } ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); ++} ++ ++VOID ++halbtc8723b2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++BOOLEAN ++halbtc8723b2ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ ++ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) ++ { ++ return TRUE; ++ } ++ ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8723b2ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) // profile from bt patch ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++#else // profile from bt stack ++ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; ++ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; ++ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; ++ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; ++ ++ //for win-8 stack HID report error ++ if(!pStackInfo->bHidExist) ++ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack ++ // when stack HID report error, here we use the info from bt fw. ++ if(!pStackInfo->bBtLinkExist) ++ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++#endif ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8723b2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8723B_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++#if 0 ++ if(pStackInfo->numOfHid >= 2) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ else ++#endif ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8723b2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = decBtPwrLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", ++ decBtPwrLvl, H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", ++ (bForceExec? "force to":""), decBtPwrLvl)); ++ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) ++ return; ++ } ++ halbtc8723b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); ++ ++ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; ++} ++ ++VOID ++halbtc8723b2ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b2ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8723b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8723b2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8723b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8723b2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8723b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8723b2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!")) ); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ //return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8723b2ant_SetDacSwingReg( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte level ++ ) ++{ ++ u1Byte val=(u1Byte)level; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val); ++} ++ ++VOID ++halbtc8723b2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ halbtc8723b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); ++ } ++ else ++ { ++ halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18); ++ } ++} ++ ++ ++VOID ++halbtc8723b2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8723b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8723b2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1); ++ } ++} ++ ++VOID ++halbtc8723b2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8723b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8723b2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ //=================BB AGC Gain Table ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001); ++ } ++ ++ ++ //=================RF Gain ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); ++ ++ // set rssiAdjustVal for wifi module. ++ if(bAgcTableEn) ++ { ++ rssiAdjustVal = 8; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++VOID ++halbtc8723b2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8723b2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8723b2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8723b2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8723b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8723b2ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8723b2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b2ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8723b2ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8723b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8723b2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8723b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8723b2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ ++ ++ if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) ) ++ { ++ byte5 = byte5 | 0x1; ++ } ++ ++ H2C_Parameter[0] = byte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = byte5; ++ ++ pCoexDm->psTdmaPara[0] = byte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = byte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8723b2ant_SwMechanism1( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bShrinkRxLPF, ++ IN BOOLEAN bLowPenaltyRA, ++ IN BOOLEAN bLimitedDIG, ++ IN BOOLEAN bBTLNAConstrain ++ ) ++{ ++ /* ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 ++ { ++ if (bShrinkRxLPF) ++ bShrinkRxLPF = FALSE; ++ } ++ */ ++ ++ //halbtc8723b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); ++ halbtc8723b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8723b2ant_SwMechanism2( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAGCTableShift, ++ IN BOOLEAN bADCBackOff, ++ IN BOOLEAN bSWDACSwing, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ //halbtc8723b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); ++ //halbtc8723b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); ++ //halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); ++} ++ ++VOID ++halbtc8723b2ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte fwVer=0, u4Tmp=0; ++ BOOLEAN bPgExtSwitch=FALSE; ++ BOOLEAN bUseExtSwitch=FALSE; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver ++ ++ if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) ++ bUseExtSwitch = TRUE; ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); ++ ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to High to avoid A2DP click */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ //tell firmware "no antenna inverse" ++ H2C_Parameter[0] = 0; ++ } ++ else ++ { ++ //tell firmware "antenna inverse" ++ H2C_Parameter[0] = 1; ++ } ++ ++ if (bUseExtSwitch) ++ { ++ //ext switch type ++ H2C_Parameter[1] = 1; ++ } ++ else ++ { ++ //int switch type ++ H2C_Parameter[1] = 0; ++ } ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ else ++ { ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to "Control by PTA"*/ ++ H2C_Parameter[0] = 0; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); ++ } ++ } ++ ++ // ext switch setting ++ if(bUseExtSwitch) ++ { ++ if (bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &=~BIT23; ++ u4Tmp |= BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi ++ break; ++ } ++ } ++ else // internal switch ++ { ++ if (bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp |= BIT23; ++ u4Tmp &=~BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT ++ break; ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0; ++ u1Byte wifiRssiState1, btRssiState; ++ s1Byte nWiFiDurationAdjust = 0x0; ++ u1Byte psTdmaByte4Modify = 0x0; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn) ++ { ++ type = type +100; //for WiFi RSSI low or BT RSSI low ++ pCoexDm->bIsSwitchTo1dot5Ant = TRUE; ++ } ++ else ++ { ++ pCoexDm->bIsSwitchTo1dot5Ant = FALSE; ++ } ++ ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ ++ if (pCoexSta->nScanAPNum <= 5) ++ { ++ if (pCoexSta->nA2DPBitPool >= 45) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nA2DPBitPool >= 35) ++ nWiFiDurationAdjust = -10; ++ else ++ nWiFiDurationAdjust = 5; ++ } ++ else if (pCoexSta->nScanAPNum <= 20) ++ { ++ if (pCoexSta->nA2DPBitPool >= 45) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nA2DPBitPool >= 35) ++ nWiFiDurationAdjust = -10; ++ else ++ nWiFiDurationAdjust = 0; ++ } ++ else if (pCoexSta->nScanAPNum <= 40) ++ { ++ if (pCoexSta->nA2DPBitPool >= 45) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nA2DPBitPool >= 35) ++ nWiFiDurationAdjust = -10; ++ else ++ nWiFiDurationAdjust = -5; ++ } ++ else ++ { ++ if (pCoexSta->nA2DPBitPool >= 45) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nA2DPBitPool >= 35) ++ nWiFiDurationAdjust = -10; ++ else ++ nWiFiDurationAdjust = -10; ++ } ++ ++ if ( (pBtLinkInfo->bSlaveRole == TRUE) && (pBtLinkInfo->bA2dpExist) ) ++ psTdmaByte4Modify = 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ ++ ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ case 1: ++ default: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 2: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 3: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 4: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 5: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 6: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 7: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 8: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 9: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 10: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 11: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 12: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 13: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 14: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 15: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 16: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 17: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 71: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90); ++ break; ++ case 101: ++ case 105: ++ case 171: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a+nWiFiDurationAdjust, 0x03, 0x70, 0x50|psTdmaByte4Modify); ++ break; ++ case 102: ++ case 106: ++ case 110: ++ case 114: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d+nWiFiDurationAdjust, 0x03, 0x70, 0x50|psTdmaByte4Modify); ++ break; ++ case 103: ++ case 107: ++ case 111: ++ case 115: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50|psTdmaByte4Modify); ++ break; ++ case 104: ++ case 108: ++ case 112: ++ case 116: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50|psTdmaByte4Modify); ++ break; ++ case 109: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90|psTdmaByte4Modify); ++ break; ++ case 113: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 121: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90|psTdmaByte4Modify); ++ break; ++ case 22: ++ case 122: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ case 0: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8723b2ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8723b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++VOID ++halbtc8723b2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8723b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); ++ ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ pCoexSta->popEventCnt = 0; ++ ++} ++ ++VOID ++halbtc8723b2ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bLowPwrDisable=TRUE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n")); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n")); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n")); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++/* ++ pCoexDm->bNeedRecover0x948 = TRUE; ++ pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ ++ halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE); ++*/ ++} ++ ++ ++VOID ++halbtc8723b2ant_ActionWiFiLinkProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++} ++ ++BOOLEAN ++halbtc8723b2ant_ActionWifiIdleProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if(BTC_RSSI_HIGH(wifiRssiState1) && ++ (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE)) ++ { ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n")); ++ ++ halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ return TRUE; ++ } ++ else ++ { ++ halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ return FALSE; ++ } ++ ++ ++} ++ ++ ++ ++BOOLEAN ++halbtc8723b2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; ++ BOOLEAN bAsus8723b=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if(BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else if(BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bBtHsOn) ++ return FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8723B, &bAsus8723b); ++ if(!bAsus8723b) ++ bCommon = FALSE; ++ else ++ bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ //bCommon = FALSE; ++ bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist); ++ } ++ } ++ } ++ ++ return bCommon; ++} ++VOID ++halbtc8723b2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ ++ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) ++ retryCount++; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8723b2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else //for SCO quality & wifi performance balance at 11n mode ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8723b2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9); ++ } ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8723b2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ //DbgPrint(" AP#>10(%d)\n", apNum); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ return; ++ ++ } ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ else ++ { ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ else ++ { ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++ ++//PAN(HS) only ++VOID ++halbtc8723b2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8723b2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ else ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); ++ //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); ++ } ++ else ++ { ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ } ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); ++ } ++ else ++ { ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8723b2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ else ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0); ++ wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8723b2ant_BtRssiState(3, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); ++ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { // only 802.11N mode we have to dec bt power to 4 degree ++ if(BTC_RSSI_HIGH(btRssiState)) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ // need to check ap Number of Not ++ if(apNum < 10) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8723b2ant_ActionBtWhckTest( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8723b2ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++} ++ ++VOID ++halbtc8723b2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ u4Byte numOfWifiLink=0; ++ u4Byte wifiLinkStatus=0; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if(pCoexSta->bBtWhckTest) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); ++ halbtc8723b2ant_ActionBtWhckTest(pBtCoexist); ++ return; ++ } ++ ++ algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8723b2ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else ++ { ++ /* ++ if(pCoexDm->bNeedRecover0x948) ++ { ++ pCoexDm->bNeedRecover0x948 = FALSE; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948); ++ } ++ */ ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n")); ++ halbtc8723b2ant_ActionWiFiLinkProcess(pBtCoexist); ++ return; ++ } ++ ++ //for P2P ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8723b2ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ ++ if(halbtc8723b2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8723B_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8723b2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8723b2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8723b2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); ++ halbtc8723b2ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8723b2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8723b2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8723b2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8723b2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8723b2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8723b2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8723b2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8723b2ant_WifiOffHwCfg( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bIsInMpMode = FALSE; ++ u1Byte H2C_Parameter[2] ={0}; ++ u4Byte fwVer=0; ++ ++ // set wlan_act to low ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to HIGH */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); ++ if(!bIsInMpMode) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi ++} ++ ++VOID ++halbtc8723b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0, fwVer; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ //0xf0[15:12] --> Chip Cut information ++ pCoexSta->nCutVersion = (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xf1) & 0xf0) >> 4; ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ //Antenna config ++ halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); ++ pCoexSta->disVerInfoCnt = 0; ++ ++ // PTA parameter ++ halbtc8723b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8723b2ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8723b2ant_ ++//============================================================ ++VOID ++EXhalbtc8723b2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u2Byte u2Tmp=0x0; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); ++ ++ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ // set to S1 ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723b2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ ++ ++ // ++ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) ++ // Local setting bit define ++ // BIT0: "0" for no antenna inverse; "1" for antenna inverse ++ // BIT1: "0" for internal switch; "1" for external switch ++ // BIT2: "0" for one antenna; "1" for two antenna ++ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ u1Tmp |= 0x1; // antenna inverse ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ u1Tmp |= 0x1; // antenna inverse ++ } ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_PCI) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8723b2ant_InitHwConfig(pBtCoexist, TRUE); ++} ++ ++VOID ++EXhalbtc8723b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8723b2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723b2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ static u1Byte PopReportIn10s = 0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c", "Version Coex/ Fw/ Patch/ Cut", \ ++ GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer, pCoexSta->nCutVersion+65); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ PopReportIn10s++; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi-100, pCoexSta->btRetryCnt, pCoexSta->popEventCnt); ++ CL_PRINTF(cliBuf); ++ ++ if (PopReportIn10s >= 5) ++ { ++ pCoexSta->popEventCnt = 0; ++ PopReportIn10s = 0; ++ } ++ ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d / %d / %d", "SCO/HID/PAN/A2DP/NameReq/WHQL", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist, pCoexSta->bC2hBtRemoteNameReq, pCoexSta->bBtWhckTest ); ++ CL_PRINTF(cliBuf); ++ ++ if (pStackInfo->bProfileNotified) ++ { ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ ++ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "A2DP Rate/Bitpool", \ ++ (btInfoExt&BIT0)? "BR":"EDR", pCoexSta->nA2DPBitPool); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ // Sw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ } ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ ++ if (pCoexDm->bIsSwitchTo1dot5Ant) ++ psTdmaCase = psTdmaCase + 100; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, ++ (pCoexDm->bCurPsTdmaOn? "On":"Off"), ++ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ ++ pCoexSta->nCoexTableType); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \ ++ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25); ++ CL_PRINTF(cliBuf); ++ ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \ ++ u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \ ++ u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3); ++ CL_PRINTF(cliBuf); ++ ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \ ++ ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ ++ u4Tmp[0]&0xff, u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ ++ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ ++ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; ++ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ ++ u4Tmp[0]&0xffff, faOfdm, faCck); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) ++ //halbtc8723b2ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8723b2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ halbtc8723b2ant_WifiOffHwCfg(pBtCoexist); ++ halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ halbtc8723b2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8723b2ant_InitCoexDm(pBtCoexist); ++ halbtc8723b2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723b2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8723b2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++} ++ ++VOID ++EXhalbtc8723b2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723b2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ u1Byte apNum=0; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ if(apNum < 10) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8723b2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723b2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ static BOOLEAN bPreScoExist=FALSE; ++ u4Byte raMask=0x0; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8723B_2ANT_MAX) ++ rspSource = BT_INFO_SRC_8723B_2ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); ++ return; ++ } ++ ++ // if 0xff, it means BT is under WHCK test ++ if (btInfo == 0xff) ++ pCoexSta->bBtWhckTest = TRUE; ++ else ++ pCoexSta->bBtWhckTest = FALSE; ++ ++ if(BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ if (pCoexSta->btRetryCnt >= 1) ++ pCoexSta->popEventCnt++; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) ++ pCoexSta->bC2hBtRemoteNameReq = TRUE; ++ else ++ pCoexSta->bC2hBtRemoteNameReq = FALSE; ++ ++ if (pCoexSta->btInfoC2h[rspSource][1] == 0x49) ++ { ++ pCoexSta->nA2DPBitPool = ++ pCoexSta->btInfoC2h[rspSource][6]; ++ } ++ else ++ pCoexSta->nA2DPBitPool = 0; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ if (pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if( (pCoexSta->btInfoExt & BIT1) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if( (pCoexSta->btInfoExt & BIT3) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8723b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8723B_2ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8723B_2ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8723B_2ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8723B_2ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ ++ if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE)) ++ { ++ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ { ++ pCoexSta->bHidExist = TRUE; ++ btInfo = btInfo | 0x28; ++ } ++ } ++ } ++ ++ halbtc8723b2ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8723B_2ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8723B_2ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8723B_2ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8723B_2ANT_B_ACL_BUSY) ++ { ++ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8723B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bBtBusy = TRUE; ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ pCoexDm->bLimitedDig = bLimitedDig; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ ++ halbtc8723b2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723b2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8723b2ant_WifiOffHwCfg(pBtCoexist); ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 ++ halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8723b2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8723b2ant_InitCoexDm(pBtCoexist); ++ halbtc8723b2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723b2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ //static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(pCoexSta->disVerInfoCnt <= 5) ++ { ++ pCoexSta->disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ ++ if (pCoexSta->disVerInfoCnt == 3) ++ { ++ //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n")); ++ halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); ++ } ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0) ++ halbtc8723b2ant_QueryBtInfo(pBtCoexist); ++ halbtc8723b2ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8723b2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8723b2ant_MonitorWiFiCtr(pBtCoexist); ++ ++ //for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist ++ if ( (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx < 50) && (pBtLinkInfo->bHidExist == TRUE)) ++ { ++ pBtLinkInfo->bHidExist = FALSE; ++ } ++ ++ if( halbtc8723b2ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust) ++ { ++ halbtc8723b2ant_RunCoexistMechanism(pBtCoexist); ++ } ++#endif ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b2Ant.h new file mode 100644 -index 000000000..6ebde9fd0 +index 0000000..de7a9bd --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8723b2Ant.h @@ -0,0 +1,234 @@ -+//=========================================== -+// The following is for 8723B 2Ant BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1 -+ -+ -+#define BT_INFO_8723B_2ANT_B_FTP BIT7 -+#define BT_INFO_8723B_2ANT_B_A2DP BIT6 -+#define BT_INFO_8723B_2ANT_B_HID BIT5 -+#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8723B_2ANT_B_CONNECTION BIT0 -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2 -+ -+ -+#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation -+#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation -+ -+typedef enum _BT_INFO_SRC_8723B_2ANT{ -+ BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8723B_2ANT_MAX -+}BT_INFO_SRC_8723B_2ANT,*PBT_INFO_SRC_8723B_2ANT; -+ -+typedef enum _BT_8723B_2ANT_BT_STATUS{ -+ BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8723B_2ANT_BT_STATUS_MAX -+}BT_8723B_2ANT_BT_STATUS,*PBT_8723B_2ANT_BT_STATUS; -+ -+typedef enum _BT_8723B_2ANT_COEX_ALGO{ -+ BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8723B_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8723B_2ANT_COEX_ALGO_HID = 0x2, -+ BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8723B_2ANT_COEX_ALGO_MAX = 0xb, -+}BT_8723B_2ANT_COEX_ALGO,*PBT_8723B_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8723B_2ANT{ -+ // fw mechanism -+ u1Byte preBtDecPwrLvl; -+ u1Byte curBtDecPwrLvl; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bResetTdmaAdjust; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ BOOLEAN bNeedRecover0x948; -+ u4Byte backup0x948; -+ -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ BOOLEAN bIsSwitchTo1dot5Ant; -+} COEX_DM_8723B_2ANT, *PCOEX_DM_8723B_2ANT; -+ -+typedef struct _COEX_STA_8723B_2ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8723B_2ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723B_2ANT_MAX]; -+ BOOLEAN bBtWhckTest; -+ BOOLEAN bC2hBtInquiryPage; -+ BOOLEAN bC2hBtRemoteNameReq; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ u4Byte popEventCnt; -+ u1Byte nScanAPNum; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ u1Byte nCoexTableType; -+ BOOLEAN bForceLpsOn; -+ -+ u1Byte disVerInfoCnt; -+ -+ u1Byte nA2DPBitPool; -+ u1Byte nCutVersion; -+}COEX_STA_8723B_2ANT, *PCOEX_STA_8723B_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8723b2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b2ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8723b2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8723b2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8723b2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8723b2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8723b2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8723B 2Ant BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1 ++ ++ ++#define BT_INFO_8723B_2ANT_B_FTP BIT7 ++#define BT_INFO_8723B_2ANT_B_A2DP BIT6 ++#define BT_INFO_8723B_2ANT_B_HID BIT5 ++#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8723B_2ANT_B_CONNECTION BIT0 ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2 ++ ++ ++#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++ ++typedef enum _BT_INFO_SRC_8723B_2ANT{ ++ BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723B_2ANT_MAX ++}BT_INFO_SRC_8723B_2ANT,*PBT_INFO_SRC_8723B_2ANT; ++ ++typedef enum _BT_8723B_2ANT_BT_STATUS{ ++ BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8723B_2ANT_BT_STATUS_MAX ++}BT_8723B_2ANT_BT_STATUS,*PBT_8723B_2ANT_BT_STATUS; ++ ++typedef enum _BT_8723B_2ANT_COEX_ALGO{ ++ BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723B_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723B_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8723B_2ANT_COEX_ALGO_MAX = 0xb, ++}BT_8723B_2ANT_COEX_ALGO,*PBT_8723B_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8723B_2ANT{ ++ // fw mechanism ++ u1Byte preBtDecPwrLvl; ++ u1Byte curBtDecPwrLvl; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ BOOLEAN bNeedRecover0x948; ++ u4Byte backup0x948; ++ ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ BOOLEAN bIsSwitchTo1dot5Ant; ++} COEX_DM_8723B_2ANT, *PCOEX_DM_8723B_2ANT; ++ ++typedef struct _COEX_STA_8723B_2ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8723B_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723B_2ANT_MAX]; ++ BOOLEAN bBtWhckTest; ++ BOOLEAN bC2hBtInquiryPage; ++ BOOLEAN bC2hBtRemoteNameReq; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ u4Byte popEventCnt; ++ u1Byte nScanAPNum; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ u1Byte nCoexTableType; ++ BOOLEAN bForceLpsOn; ++ ++ u1Byte disVerInfoCnt; ++ ++ u1Byte nA2DPBitPool; ++ u1Byte nCutVersion; ++}COEX_STA_8723B_2ANT, *PCOEX_STA_8723B_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8723b2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8723b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723b2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8723b2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8723b2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723b2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a1Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a1Ant.c new file mode 100644 -index 000000000..0b60291e3 +index 0000000..b911f31 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a1Ant.c @@ -0,0 +1,3717 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8812A Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8812a1Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8812A_1ANT GLCoexDm8812a1Ant; -+static PCOEX_DM_8812A_1ANT pCoexDm=&GLCoexDm8812a1Ant; -+static COEX_STA_8812A_1ANT GLCoexSta8812a1Ant; -+static PCOEX_STA_8812A_1ANT pCoexSta=&GLCoexSta8812a1Ant; -+ -+const char *const GLBtInfoSrc8812a1Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8812a1Ant=20140708; -+u4Byte GLCoexVer8812a1Ant=0x52; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8812a1ant_ -+//============================================================ -+u1Byte -+halbtc8812a1ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8812a1ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8812a1ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+//to check 0x430/0x434 is correct?? -+VOID -+halbtc8812a1ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+//to check 0x42a ?? -+VOID -+halbtc8812a1ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+//to check 0x456?? -+VOID -+halbtc8812a1ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8812a1ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType -+ ) -+{ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ halbtc8812a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); -+ break; -+ case 1: // disable cck 1/2 -+ halbtc8812a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ halbtc8812a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); -+ break; -+ default: -+ break; -+ } -+ -+ halbtc8812a1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8812a1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8812a1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+} -+ -+VOID -+halbtc8812a1ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+VOID -+halbtc8812a1ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte dataLen=3; -+ u1Byte buf[5] = {0}; -+ -+ if(!pBtCoexist->btInfo.bBtDisabled) -+ { -+ if(!pCoexSta->btInfoQueryCnt || -+ (pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8812A_1ANT_BT_RSP]-pCoexSta->btInfoQueryCnt)>2) -+ { -+ buf[0] = dataLen; -+ buf[1] = 0x1; // polling enable, 1=enable, 0=disable -+ buf[2] = 0x2; // polling time in seconds -+ buf[3] = 0x1; // auto report enable, 1=enable, 0=disable -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_INFO, (PVOID)&buf[0]); -+ } -+ } -+ pCoexSta->btInfoQueryCnt++; -+} -+ -+VOID -+halbtc8812a1ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp, u1Tmp1; -+ s4Byte wifiRssi; -+ static u1Byte NumOfBtCounterChk = 0; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ if( (pCoexSta->lowPriorityTx > 1150) && (!pCoexSta->bC2hBtInquiryPage)) -+ pCoexSta->popEventCnt++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", -+ regHPRx, regHPTx, regLPRx, regLPTx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+ -+ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) -+ { -+ NumOfBtCounterChk++; -+ if (NumOfBtCounterChk >= 3) -+ { -+ halbtc8812a1ant_QueryBtInfo(pBtCoexist); -+ NumOfBtCounterChk = 0; -+ } -+ } -+} -+ -+//to check registers -+VOID -+halbtc8812a1ant_MonitorWiFiCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u2Byte u2Tmp[3]; -+ s4Byte wifiRssi=0; -+ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; -+ static u1Byte nCCKLockCounter = 0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->nCRCOK_CCK = 0; -+ pCoexSta->nCRCOK_11g = 0; -+ pCoexSta->nCRCOK_11n = 0; -+ pCoexSta->nCRCOK_11nAgg = 0; -+ -+ pCoexSta->nCRCErr_CCK = 0; -+ pCoexSta->nCRCErr_11g = 0; -+ pCoexSta->nCRCErr_11n = 0; -+ pCoexSta->nCRCErr_11nAgg = 0; -+ } -+ else -+ { -+ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf04); -+ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf14); -+ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf10); -+ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf40); -+ -+ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf06); -+ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf16); -+ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf12); -+ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf42); -+ } -+ -+ -+ //reset counter -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xb58, 0x1, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xb58, 0x1, 0x0); -+ -+ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) -+ { -+ if ( (pCoexDm->btStatus == BT_8812A_1ANT_BT_STATUS_ACL_BUSY) || -+ (pCoexDm->btStatus == BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY) || -+ (pCoexDm->btStatus == BT_8812A_1ANT_BT_STATUS_SCO_BUSY) ) -+ { -+ if (pCoexSta->nCRCOK_CCK >(pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + -+ pCoexSta->nCRCOK_11nAgg) ) -+ { -+ if (nCCKLockCounter < 5) -+ nCCKLockCounter++; -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ } -+ else -+ { -+ if (nCCKLockCounter > 0) -+ nCCKLockCounter--; -+ } -+ -+ if (!pCoexSta->bPreCCKLock) -+ { -+ -+ if (nCCKLockCounter >= 5) -+ pCoexSta->bCCKLock = TRUE; -+ else -+ pCoexSta->bCCKLock = FALSE; -+ } -+ else -+ { -+ if (nCCKLockCounter == 0) -+ pCoexSta->bCCKLock = FALSE; -+ else -+ pCoexSta->bCCKLock = TRUE; -+ } -+ -+ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; -+ -+ -+} -+ -+BOOLEAN -+halbtc8812a1ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8812a1ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+ -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8812a1ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8812A_1ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8812a1ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8812a1ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8812a1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+//to check -+VOID -+halbtc8812a1ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte tmpU1; -+ -+ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); -+ tmpU1 |= BIT0; -+ if(bLowPenaltyRa) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); -+ tmpU1 &= ~BIT2; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); -+ tmpU1 |= BIT2; -+ } -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); -+} -+ -+VOID -+halbtc8812a1ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8812a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8812a1ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8812a1ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8812a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8812a1ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); -+ -+ pCoexSta->nCoexTableType = type; -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaa5a5a5a, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 7: -+ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8812a1ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte dataLen=3; -+ u1Byte buf[5] = {0}; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Ignore Wlan_Act\n", -+ (bEnable? "Enable":"Disable"))); -+ -+ buf[0] = dataLen; -+ buf[1] = 0x1; // OP_Code -+ buf[2] = 0x1; // OP_Code_Length -+ if(bEnable) -+ buf[3] = 0x1; // OP_Code_Content -+ else -+ buf[3] = 0x0; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+} -+ -+VOID -+halbtc8812a1ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8812a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8812a1ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8812a1ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8812a1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8812a1ant_SwMechanism( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRA -+ ) -+{ -+ halbtc8812a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+//to check bForceExec -+VOID -+halbtc8812a1ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ u1Byte u1Tmp=0; -+ -+ pCoexDm->curAntPosType = antPosType; -+ -+ if(bInitHwCfg) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb3, 0x77); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x900, 0x00000400); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76d, 0x1); -+ } -+ else if(bWifiOff) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb3, 0x77); -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); -+ u1Tmp &= ~BIT3; -+ u1Tmp |= BIT2; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); -+ } -+ -+ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType)) -+ { -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_PATH_WIFI: -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); -+ u1Tmp |= BIT3; -+ u1Tmp &= ~BIT2; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); -+ break; -+ case BTC_ANT_PATH_BT: -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); -+ u1Tmp &= ~BIT3; -+ u1Tmp |= BIT2; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); -+ break; -+ default: -+ case BTC_ANT_PATH_PTA: -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); -+ u1Tmp |= BIT3; -+ u1Tmp &= ~BIT2; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); -+ break; -+ } -+ } -+ -+ pCoexDm->preAntPosType = pCoexDm->curAntPosType; -+} -+ -+VOID -+halbtc8812a1ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ if(byte1&BIT4 && !(byte1&BIT5)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+ -+VOID -+halbtc8812a1ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; -+ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; -+ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; -+ s1Byte nWiFiDurationAdjust = 0x0; -+ static BOOLEAN bPreWifiBusy=FALSE; -+ -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if (bWifiBusy != bPreWifiBusy) -+ { -+ bForceExec = TRUE; -+ bPreWifiBusy = bWifiBusy; -+ } -+ -+ if (pCoexDm->bCurPsTdmaOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ -+ if (pCoexSta->nScanAPNum <= 5) -+ nWiFiDurationAdjust = 2; -+ else if (pCoexSta->nScanAPNum >= 40) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nScanAPNum >= 20) -+ nWiFiDurationAdjust = -10; -+ -+ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle -+ } -+ -+ if ( (type == 3) || (type == 13) || (type == 14) ) -+ { -+ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile -+ -+ if (!bWifiBusy) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ } -+ -+ if (pBtLinkInfo->bSlaveRole == TRUE) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ default: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); -+ break; -+ case 1: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 2: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 3: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); -+ break; -+ case 4: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); -+ break; -+ case 5: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x11); -+ break; -+ case 6: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x11); -+ break; -+ case 7: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); -+ break; -+ case 8: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 9: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 10: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); -+ break; -+ case 11: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); -+ break; -+ case 12: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); -+ break; -+ case 13: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); -+ break; -+ case 14: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, psTdmaByte4Val); -+ break; -+ case 15: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); -+ break; -+ case 16: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); -+ break; -+ case 18: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 20: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x3f, 0x03, 0x11, 0x10); -+ break; -+ case 21: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); -+ break; -+ case 22: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x10); -+ break; -+ case 23: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); -+ break; -+ case 24: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); -+ break; -+ case 25: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 26: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ break; -+ case 27: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); -+ break; -+ case 28: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); -+ break; -+ case 29: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); -+ break; -+ case 30: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); -+ break; -+ case 31: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); -+ break; -+ case 32: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); -+ break; -+ case 33: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); -+ break; -+ case 34: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 35: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 36: -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); -+ break; -+ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving -+ /* here softap mode screen off will cost 70-80mA for phone */ -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); -+ break; -+ } -+ } -+ else -+ { -+ -+ // disable PS tdma -+ switch(type) -+ { -+ case 8: //PTA Control -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 0: -+ default: //Software control, Antenna at BT side -+ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ break; -+ } -+ } -+ rssiAdjustVal =0; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); -+ -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+BOOLEAN -+halbtc8812a1ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected && -+ BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); -+ -+ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ -+ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); -+ -+ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ -+ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); -+ -+ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if (bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ } -+ -+ bCommon = FALSE; -+ } -+ -+ return bCommon; -+} -+ -+ -+VOID -+halbtc8812a1ant_TdmaDurationAdjustForAcl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0, btInfoExt; -+ static BOOLEAN bPreWifiBusy=FALSE; -+ BOOLEAN bWifiBusy = FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); -+ -+ if(BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) -+ bWifiBusy = TRUE; -+ else -+ bWifiBusy = FALSE; -+ -+ if( (BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || -+ (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || -+ (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) -+ { -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 3 && -+ pCoexDm->curPsTdma != 9 ) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ return; -+ } -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if ( (pCoexSta->lowPriorityTx) > 1150 || (pCoexSta->lowPriorityRx) > 1250 ) -+ retryCount++; -+ -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ if(result == -1) -+ { -+ if( (BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ else if(result == 1) -+ { -+ if( (BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ } -+ else //no change -+ { -+ /* Bryant Modify -+ if(bWifiBusy != bPreWifiBusy) //if busy / idle change -+ { -+ bPreWifiBusy = bWifiBusy; -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); -+ } -+ */ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 9 && -+ pCoexDm->curPsTdma != 11 ) -+ { -+ // recover to previous adjust type -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ } -+} -+ -+VOID -+halbtc8812a1ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8812a1ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8812a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8812a1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8812a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiOnly( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+} -+ -+VOID -+halbtc8812a1ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ halbtc8812a1ant_ActionWifiOnly(pBtCoexist); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ } -+ } -+} -+ -+//============================================= -+// -+// Software Coex Mechanism start -+// -+//============================================= -+ -+// SCO only or SCO+PAN(HS) -+ -+/* -+VOID -+halbtc8812a1ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+ -+VOID -+halbtc8812a1ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8812a1ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8812a1ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8812a1ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(HS) only -+VOID -+halbtc8812a1ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8812a1ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8812a1ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8812a1ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+VOID -+halbtc8812a1ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+*/ -+ -+//============================================= -+// -+// Non-Software Coex Mechanism start -+// -+//============================================= -+VOID -+halbtc8812a1ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8812a1ant_ActionHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8812a1ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ if((!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask)) -+ { -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) -+ { -+ // SCO/HID/A2DP busy -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if ((pBtLinkInfo->bPanExist) || (bWifiBusy)) -+ { -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionBtScoHidOnlyBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ // tdma and coex table -+ -+ if(pBtLinkInfo->bScoExist) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else //HID -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiConnectedBtAclBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ u1Byte btRssiState; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ btRssiState = halbtc8812a1ant_BtRssiState(2, 28, 0); -+ -+ if ( (pCoexSta->lowPriorityRx >= 950) && (!pCoexSta->bUnderIps) ) -+ { -+ pBtLinkInfo->bSlaveRole = TRUE; -+ } -+ else -+ { -+ pBtLinkInfo->bSlaveRole = FALSE; -+ } -+ -+ if(pBtLinkInfo->bHidOnly) //HID -+ { -+ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ return; -+ } -+ else if(pBtLinkInfo->bA2dpOnly) //A2DP -+ { -+ if(BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ halbtc8812a1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ } -+ } -+ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || -+ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ //BT no-profile busy (0x9) -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiNotConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // power save state -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiNotConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiNotConnectedAssoAuth( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bPanExist) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); -+ } -+ else -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //Bryant Add -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiConnectedSpecialPacket( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8812a1ant_ActionWifiConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiBusy=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; -+ u4Byte wifiBw; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ if(bUnder4way) -+ { -+ halbtc8812a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ if(bScan || bLink || bRoam) -+ { -+ if(bScan) -+ halbtc8812a1ant_ActionWifiConnectedScan(pBtCoexist); -+ else -+ halbtc8812a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ // power save state -+ if(!bApEnable && BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) -+ { -+ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP -+ { -+ if(!bWifiBusy) -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else //busy -+ { -+ if (pCoexSta->nScanAPNum >= BT_8812A_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA -+ { -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ } -+ } -+ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ else -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(!bWifiBusy) -+ { -+ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8812a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ else -+ { -+ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8812a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else -+ { -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); -+ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+} -+ -+VOID -+halbtc8812a1ant_RunSwCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte algorithm=0; -+ -+ algorithm = halbtc8812a1ant_ActionAlgorithm(pBtCoexist); -+ pCoexDm->curAlgorithm = algorithm; -+ -+ if(halbtc8812a1ant_IsCommonAction(pBtCoexist)) -+ { -+ -+ } -+ else -+ { -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8812A_1ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); -+ //halbtc8812a1ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); -+ //halbtc8812a1ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); -+ //halbtc8812a1ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); -+ //halbtc8812a1ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); -+ //halbtc8812a1ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); -+ //halbtc8812a1ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); -+ //halbtc8812a1ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); -+ //halbtc8812a1ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); -+ //halbtc8812a1ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8812A_1ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); -+ //halbtc8812a1ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); -+ //halbtc8812a1ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8812a1ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bIncreaseScanDevNum=FALSE; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ BOOLEAN bMiracastPlusBt=FALSE; -+ u1Byte aggBufSize=5; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0, wifiBw; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ if( (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bIncreaseScanDevNum = TRUE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); -+ -+ if(pBtLinkInfo->bBtLinkExist) -+ { -+ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ bMiracastPlusBt = TRUE; -+ } -+ else -+ { -+ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ bMiracastPlusBt = FALSE; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ -+ if ( (pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); -+ } -+ else -+ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); -+ -+ return; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) -+ { -+ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); -+ -+ if(pBtLinkInfo->bScoExist) -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); -+ else -+ { -+ if (BTC_WIFI_BW_HT40==wifiBw) -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x10); -+ else -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ } -+ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); -+ halbtc8812a1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message -+ } -+ else -+ { -+ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); -+ -+ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+ halbtc8812a1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); -+ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8812a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ -+ if(!bWifiConnected) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ if (bScan) -+ halbtc8812a1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ else -+ halbtc8812a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else -+ halbtc8812a1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else // wifi LPS/Busy -+ { -+ halbtc8812a1ant_ActionWifiConnected(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8812a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ -+ // sw all off -+ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ //halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ //halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ pCoexSta->popEventCnt = 0; -+} -+ -+VOID -+halbtc8812a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ u4Byte u4Tmp=0; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); -+ -+ //ant sw control to BT -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, TRUE, FALSE); -+ -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ // PTA parameter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffff); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, 0x55555555); -+ -+ // coex parameters -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); -+ -+ // enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // enable PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); -+ -+ // bt clock related -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4); -+ u1Tmp |= BIT7; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4, u1Tmp); -+ -+ // bt clock related -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); -+ u1Tmp |= BIT1; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8812a1ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8812a1ant_ -+//============================================================ -+VOID -+EXhalbtc8812a1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8812a1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8812a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8812a1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); -+ pBtCoexist->bStopCoexDm = FALSE; -+} -+ -+VOID -+EXhalbtc8812a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ pBtCoexist->bStopCoexDm = FALSE; -+ -+ halbtc8812a1ant_InitCoexDm(pBtCoexist); -+ -+ halbtc8812a1ant_QueryBtInfo(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8812a1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ if(pBtCoexist->bStopCoexDm) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8812a1Ant, GLCoexVer8812a1Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8812a1Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ if(!pBtCoexist->bManualControl) -+ { -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ -+ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), -+ pBtCoexist->btInfo.aggBufSize); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ -+ pBtCoexist->btInfo.raMask); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ -+ pCoexDm->errorCondition); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ -+ pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ } -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb3); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x900); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xcb3/0xcb7/0x900", \ -+ u1Tmp[0], u1Tmp[1], u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ -+ u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+ -+VOID -+EXhalbtc8812a1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp=0; -+ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ -+ halbtc8812a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8812a1ant_InitCoexDm(pBtCoexist); -+ halbtc8812a1ant_QueryBtInfo(pBtCoexist); -+ -+ pCoexSta->bUnderIps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8812a1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8812a1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ u1Byte u1Tmpa, u1Tmpb; -+ u4Byte u4Tmp; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm ) -+ return; -+ -+ if(BTC_SCAN_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); -+ } -+ -+ if(pBtCoexist->btInfo.bBtDisabled) -+ return; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ halbtc8812a1ant_QueryBtInfo(pBtCoexist); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8812a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_SCAN_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8812a1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ } -+ else // wifi is connected -+ { -+ halbtc8812a1ant_ActionWifiConnectedScan(pBtCoexist); -+ } -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8812a1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8812a1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8812a1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ pCoexDm->nArpCnt = 0; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ //pCoexDm->nArpCnt = 0; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8812a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ halbtc8812a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8812a1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8812a1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+//to check registers... -+VOID -+EXhalbtc8812a1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte dataLen=5; -+ u1Byte buf[6] = {0}; -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ BOOLEAN bWifiUnderBMode = FALSE; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+#if 0 -+ //Set CCK Tx/Rx high Pri except 11b mode -+ if (bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx -+ } -+#endif -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ pCoexDm->nArpCnt = 0; -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ //H2C_Parameter[0] = 0x1; -+ H2C_Parameter[0] = 0x0; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ buf[0] = dataLen; -+ buf[1] = 0x5; // OP_Code -+ buf[2] = 0x3; // OP_Code_Length -+ buf[3] = H2C_Parameter[0]; // OP_Code_Content -+ buf[4] = H2C_Parameter[1]; -+ buf[5] = H2C_Parameter[2]; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+} -+ -+VOID -+EXhalbtc8812a1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ BTC_PACKET_ARP == type ) -+ { -+ if(BTC_PACKET_ARP == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); -+ -+ pCoexDm->nArpCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); -+ -+ if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); -+ } -+ -+ pCoexSta->specialPktPeriodCnt = 0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8812a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) -+ { -+ halbtc8812a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8812a1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bBtBusy=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8812A_1ANT_MAX) -+ rspSource = BT_INFO_SRC_8812A_1ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(BT_INFO_SRC_8812A_1ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ if (pCoexSta->btRetryCnt >= 1) -+ pCoexSta->popEventCnt++; -+ -+ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) -+ pCoexSta->bC2hBtPage = TRUE; -+ else -+ pCoexSta->bC2hBtPage = FALSE; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2-90; -+ //pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ if(!pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); -+ } -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if(pCoexSta->btInfoExt & BIT1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if(pCoexSta->btInfoExt & BIT3) -+ { -+ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8812a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+#if(BT_AUTO_REPORT_ONLY_8812A_1ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8812a1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8812A_1ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8812A_1ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8812A_1ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8812A_1ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8812A_1ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8812A_1ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ } -+ -+ halbtc8812a1ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) -+ -+ if(!(btInfo&BT_INFO_8812A_1ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8812A_1ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8812A_1ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8812A_1ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8812A_1ANT_B_ACL_BUSY) -+ { -+ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ bBtBusy = TRUE; -+ else -+ bBtBusy = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ halbtc8812a1ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8812a1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp; -+ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); -+ -+ if(BTC_RF_ON == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); -+ pBtCoexist->bStopCoexDm = FALSE; -+ } -+ else if(BTC_RF_OFF == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); -+ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ -+ halbtc8812a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ pBtCoexist->bStopCoexDm = TRUE; -+ } -+} -+ -+VOID -+EXhalbtc8812a1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ -+ halbtc8812a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+} -+ -+VOID -+EXhalbtc8812a1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); -+ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ pBtCoexist->bStopCoexDm = FALSE; -+ halbtc8812a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8812a1ant_InitCoexDm(pBtCoexist); -+ halbtc8812a1ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8812a1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); -+ -+ halbtc8812a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8812a1ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8812a1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8812a1Ant, GLCoexVer8812a1Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8812A_1ANT == 0) -+ halbtc8812a1ant_QueryBtInfo(pBtCoexist); -+ halbtc8812a1ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ halbtc8812a1ant_MonitorBtCtr(pBtCoexist); -+ halbtc8812a1ant_MonitorWiFiCtr(pBtCoexist); -+ -+ if( halbtc8812a1ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust ) -+ { -+ halbtc8812a1ant_RunCoexistMechanism(pBtCoexist); -+ } -+ -+ pCoexSta->specialPktPeriodCnt++; -+#endif -+} -+ -+VOID -+EXhalbtc8812a1ant_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ) -+{ -+ switch(opCode) -+ { -+ case BTC_DBG_SET_COEX_NORMAL: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set CoexMode to Normal\n")); -+ pBtCoexist->bManualControl = FALSE; -+ halbtc8812a1ant_InitCoexDm(pBtCoexist); -+ break; -+ case BTC_DBG_SET_COEX_WIFI_ONLY: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set CoexMode to Wifi Only\n")); -+ pBtCoexist->bManualControl = TRUE; -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+ break; -+ case BTC_DBG_SET_COEX_BT_ONLY: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set CoexMode to BT only\n")); -+ pBtCoexist->bManualControl = TRUE; -+ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ break; -+ case BTC_DBG_SET_COEX_DEC_BT_PWR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power\n")); -+ { -+ u1Byte dataLen=4; -+ u1Byte buf[6] = {0}; -+ u1Byte decBtPwr=0, pwrLevel=0; -+ if(opLen == 2) -+ { -+ decBtPwr = pData[0]; -+ pwrLevel = pData[1]; -+ -+ buf[0] = dataLen; -+ buf[1] = 0x3; // OP_Code -+ buf[2] = 0x2; // OP_Code_Length -+ -+ buf[3] = decBtPwr; // OP_Code_Content -+ buf[4] = pwrLevel; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power=%d, pwrLevel=%d\n", decBtPwr, pwrLevel)); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+ } -+ } -+ break; -+ -+ case BTC_DBG_SET_COEX_BT_AFH_MAP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map\n")); -+ { -+ u1Byte dataLen=5; -+ u1Byte buf[6] = {0}; -+ if(opLen == 3) -+ { -+ buf[0] = dataLen; -+ buf[1] = 0x5; // OP_Code -+ buf[2] = 0x3; // OP_Code_Length -+ -+ buf[3] = pData[0]; // OP_Code_Content -+ buf[4] = pData[1]; -+ buf[5] = pData[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map = %02x %02x %02x\n", -+ pData[0], pData[1], pData[2])); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+ } -+ } -+ break; -+ -+ case BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active\n")); -+ { -+ u1Byte dataLen=3; -+ u1Byte buf[6] = {0}; -+ if(opLen == 1) -+ { -+ buf[0] = dataLen; -+ buf[1] = 0x1; // OP_Code -+ buf[2] = 0x1; // OP_Code_Length -+ -+ buf[3] = pData[0]; // OP_Code_Content -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active = 0x%x\n", -+ pData[0])); -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+ } -+ } -+ break; -+ default: -+ break; -+ } -+} -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8812A Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8812a1Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8812A_1ANT GLCoexDm8812a1Ant; ++static PCOEX_DM_8812A_1ANT pCoexDm=&GLCoexDm8812a1Ant; ++static COEX_STA_8812A_1ANT GLCoexSta8812a1Ant; ++static PCOEX_STA_8812A_1ANT pCoexSta=&GLCoexSta8812a1Ant; ++ ++const char *const GLBtInfoSrc8812a1Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8812a1Ant=20140708; ++u4Byte GLCoexVer8812a1Ant=0x52; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8812a1ant_ ++//============================================================ ++u1Byte ++halbtc8812a1ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8812a1ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8812a1ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++//to check 0x430/0x434 is correct?? ++VOID ++halbtc8812a1ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++//to check 0x42a ?? ++VOID ++halbtc8812a1ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++//to check 0x456?? ++VOID ++halbtc8812a1ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8812a1ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType ++ ) ++{ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ halbtc8812a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); ++ break; ++ case 1: // disable cck 1/2 ++ halbtc8812a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ halbtc8812a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8812a1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8812a1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8812a1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++} ++ ++VOID ++halbtc8812a1ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++VOID ++halbtc8812a1ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte dataLen=3; ++ u1Byte buf[5] = {0}; ++ ++ if(!pBtCoexist->btInfo.bBtDisabled) ++ { ++ if(!pCoexSta->btInfoQueryCnt || ++ (pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8812A_1ANT_BT_RSP]-pCoexSta->btInfoQueryCnt)>2) ++ { ++ buf[0] = dataLen; ++ buf[1] = 0x1; // polling enable, 1=enable, 0=disable ++ buf[2] = 0x2; // polling time in seconds ++ buf[3] = 0x1; // auto report enable, 1=enable, 0=disable ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_INFO, (PVOID)&buf[0]); ++ } ++ } ++ pCoexSta->btInfoQueryCnt++; ++} ++ ++VOID ++halbtc8812a1ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp, u1Tmp1; ++ s4Byte wifiRssi; ++ static u1Byte NumOfBtCounterChk = 0; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if( (pCoexSta->lowPriorityTx > 1150) && (!pCoexSta->bC2hBtInquiryPage)) ++ pCoexSta->popEventCnt++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ regHPRx, regHPTx, regLPRx, regLPTx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++ ++ if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) ++ { ++ NumOfBtCounterChk++; ++ if (NumOfBtCounterChk >= 3) ++ { ++ halbtc8812a1ant_QueryBtInfo(pBtCoexist); ++ NumOfBtCounterChk = 0; ++ } ++ } ++} ++ ++//to check registers ++VOID ++halbtc8812a1ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf04); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf14); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf10); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf40); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf06); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf16); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf12); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf42); ++ } ++ ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xb58, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xb58, 0x1, 0x0); ++ ++ if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) ++ { ++ if ( (pCoexDm->btStatus == BT_8812A_1ANT_BT_STATUS_ACL_BUSY) || ++ (pCoexDm->btStatus == BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (pCoexDm->btStatus == BT_8812A_1ANT_BT_STATUS_SCO_BUSY) ) ++ { ++ if (pCoexSta->nCRCOK_CCK >(pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + ++ pCoexSta->nCRCOK_11nAgg) ) ++ { ++ if (nCCKLockCounter < 5) ++ nCCKLockCounter++; ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ } ++ else ++ { ++ if (nCCKLockCounter > 0) ++ nCCKLockCounter--; ++ } ++ ++ if (!pCoexSta->bPreCCKLock) ++ { ++ ++ if (nCCKLockCounter >= 5) ++ pCoexSta->bCCKLock = TRUE; ++ else ++ pCoexSta->bCCKLock = FALSE; ++ } ++ else ++ { ++ if (nCCKLockCounter == 0) ++ pCoexSta->bCCKLock = FALSE; ++ else ++ pCoexSta->bCCKLock = TRUE; ++ } ++ ++ pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; ++ ++ ++} ++ ++BOOLEAN ++halbtc8812a1ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8812a1ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++ ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8812a1ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8812A_1ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8812a1ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8812a1ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8812a1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++//to check ++VOID ++halbtc8812a1ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ tmpU1 |= BIT0; ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8812a1ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8812a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8812a1ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8812a1ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8812a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8812a1ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); ++ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaa5a5a5a, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8812a1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8812a1ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte dataLen=3; ++ u1Byte buf[5] = {0}; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Ignore Wlan_Act\n", ++ (bEnable? "Enable":"Disable"))); ++ ++ buf[0] = dataLen; ++ buf[1] = 0x1; // OP_Code ++ buf[2] = 0x1; // OP_Code_Length ++ if(bEnable) ++ buf[3] = 0x1; // OP_Code_Content ++ else ++ buf[3] = 0x0; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++} ++ ++VOID ++halbtc8812a1ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8812a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8812a1ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8812a1ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8812a1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8812a1ant_SwMechanism( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRA ++ ) ++{ ++ halbtc8812a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++//to check bForceExec ++VOID ++halbtc8812a1ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ pCoexDm->curAntPosType = antPosType; ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb3, 0x77); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x900, 0x00000400); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76d, 0x1); ++ } ++ else if(bWifiOff) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb3, 0x77); ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); ++ u1Tmp &= ~BIT3; ++ u1Tmp |= BIT2; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); ++ } ++ ++ if(bForceExec || (pCoexDm->curAntPosType != pCoexDm->preAntPosType)) ++ { ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_PATH_WIFI: ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); ++ u1Tmp |= BIT3; ++ u1Tmp &= ~BIT2; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); ++ break; ++ case BTC_ANT_PATH_BT: ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); ++ u1Tmp &= ~BIT3; ++ u1Tmp |= BIT2; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); ++ u1Tmp |= BIT3; ++ u1Tmp &= ~BIT2; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); ++ break; ++ } ++ } ++ ++ pCoexDm->preAntPosType = pCoexDm->curAntPosType; ++} ++ ++VOID ++halbtc8812a1ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ if(byte1&BIT4 && !(byte1&BIT5)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8812a1ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; ++ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; ++ u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; ++ s1Byte nWiFiDurationAdjust = 0x0; ++ static BOOLEAN bPreWifiBusy=FALSE; ++ ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if (bWifiBusy != bPreWifiBusy) ++ { ++ bForceExec = TRUE; ++ bPreWifiBusy = bWifiBusy; ++ } ++ ++ if (pCoexDm->bCurPsTdmaOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ ++ if (pCoexSta->nScanAPNum <= 5) ++ nWiFiDurationAdjust = 2; ++ else if (pCoexSta->nScanAPNum >= 40) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nScanAPNum >= 20) ++ nWiFiDurationAdjust = -10; ++ ++ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle ++ } ++ ++ if ( (type == 3) || (type == 13) || (type == 14) ) ++ { ++ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile ++ ++ if (!bWifiBusy) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ } ++ ++ if (pBtLinkInfo->bSlaveRole == TRUE) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ default: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); ++ break; ++ case 1: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 2: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 3: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); ++ break; ++ case 4: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); ++ break; ++ case 5: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x11); ++ break; ++ case 6: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x11); ++ break; ++ case 7: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 10: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); ++ break; ++ case 12: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); ++ break; ++ case 14: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, psTdmaByte4Val); ++ break; ++ case 15: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x3f, 0x03, 0x11, 0x10); ++ break; ++ case 21: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x10); ++ break; ++ case 23: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); ++ break; ++ case 33: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); ++ break; ++ case 34: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); ++ break; ++ } ++ } ++ else ++ { ++ ++ // disable PS tdma ++ switch(type) ++ { ++ case 8: //PTA Control ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: //Software control, Antenna at BT side ++ halbtc8812a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ break; ++ } ++ } ++ rssiAdjustVal =0; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); ++ ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++BOOLEAN ++halbtc8812a1ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected && ++ BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); ++ ++ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); ++ ++ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ ++ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); ++ ++ //halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if (bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ } ++ ++ bCommon = FALSE; ++ } ++ ++ return bCommon; ++} ++ ++ ++VOID ++halbtc8812a1ant_TdmaDurationAdjustForAcl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0, btInfoExt; ++ static BOOLEAN bPreWifiBusy=FALSE; ++ BOOLEAN bWifiBusy = FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); ++ ++ if(BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifiStatus) ++ bWifiBusy = TRUE; ++ else ++ bWifiBusy = FALSE; ++ ++ if( (BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || ++ (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || ++ (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) ++ { ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 3 && ++ pCoexDm->curPsTdma != 9 ) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ return; ++ } ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if ( (pCoexSta->lowPriorityTx) > 1150 || (pCoexSta->lowPriorityRx) > 1250 ) ++ retryCount++; ++ ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ if(result == -1) ++ { ++ if( (BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ else if(result == 1) ++ { ++ if( (BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ } ++ else //no change ++ { ++ /* Bryant Modify ++ if(bWifiBusy != bPreWifiBusy) //if busy / idle change ++ { ++ bPreWifiBusy = bWifiBusy; ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, pCoexDm->curPsTdma); ++ } ++ */ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 9 && ++ pCoexDm->curPsTdma != 11 ) ++ { ++ // recover to previous adjust type ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ } ++} ++ ++VOID ++halbtc8812a1ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8812a1ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8812a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8812a1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8812a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiOnly( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++} ++ ++VOID ++halbtc8812a1ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ halbtc8812a1ant_ActionWifiOnly(pBtCoexist); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++//============================================= ++// ++// Software Coex Mechanism start ++// ++//============================================= ++ ++// SCO only or SCO+PAN(HS) ++ ++/* ++VOID ++halbtc8812a1ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++ ++VOID ++halbtc8812a1ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8812a1ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8812a1ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8812a1ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(HS) only ++VOID ++halbtc8812a1ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8812a1ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8812a1ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8812a1ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++VOID ++halbtc8812a1ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++*/ ++ ++//============================================= ++// ++// Non-Software Coex Mechanism start ++// ++//============================================= ++VOID ++halbtc8812a1ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8812a1ant_ActionHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8812a1ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ if((!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask)) ++ { ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) ++ { ++ // SCO/HID/A2DP busy ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if ((pBtLinkInfo->bPanExist) || (bWifiBusy)) ++ { ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionBtScoHidOnlyBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ // tdma and coex table ++ ++ if(pBtLinkInfo->bScoExist) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else //HID ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiConnectedBtAclBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ u1Byte btRssiState; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ btRssiState = halbtc8812a1ant_BtRssiState(2, 28, 0); ++ ++ if ( (pCoexSta->lowPriorityRx >= 950) && (!pCoexSta->bUnderIps) ) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ if(pBtLinkInfo->bHidOnly) //HID ++ { ++ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ return; ++ } ++ else if(pBtLinkInfo->bA2dpOnly) //A2DP ++ { ++ if(BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ halbtc8812a1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ } ++ } ++ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || ++ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ //BT no-profile busy (0x9) ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiNotConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // power save state ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiNotConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiNotConnectedAssoAuth( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bPanExist) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); ++ } ++ else ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //Bryant Add ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiConnectedSpecialPacket( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8812a1ant_ActionWifiConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiBusy=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; ++ u4Byte wifiBw; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ if(bUnder4way) ++ { ++ halbtc8812a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ if(bScan || bLink || bRoam) ++ { ++ if(bScan) ++ halbtc8812a1ant_ActionWifiConnectedScan(pBtCoexist); ++ else ++ halbtc8812a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ // power save state ++ if(!bApEnable && BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) ++ { ++ if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP ++ { ++ if(!bWifiBusy) ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else //busy ++ { ++ if (pCoexSta->nScanAPNum >= BT_8812A_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA ++ { ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ } ++ } ++ else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ else ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(!bWifiBusy) ++ { ++ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8812a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ else ++ { ++ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8812a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else if( (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8812a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else ++ { ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, FALSE, FALSE); ++ if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++} ++ ++VOID ++halbtc8812a1ant_RunSwCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm=0; ++ ++ algorithm = halbtc8812a1ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ ++ if(halbtc8812a1ant_IsCommonAction(pBtCoexist)) ++ { ++ ++ } ++ else ++ { ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8812A_1ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); ++ //halbtc8812a1ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); ++ //halbtc8812a1ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); ++ //halbtc8812a1ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); ++ //halbtc8812a1ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); ++ //halbtc8812a1ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); ++ //halbtc8812a1ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); ++ //halbtc8812a1ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); ++ //halbtc8812a1ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); ++ //halbtc8812a1ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); ++ //halbtc8812a1ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); ++ //halbtc8812a1ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8812a1ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bIncreaseScanDevNum=FALSE; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ u1Byte aggBufSize=5; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0, wifiBw; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if( (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bIncreaseScanDevNum = TRUE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ bMiracastPlusBt = FALSE; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ ++ if ( (pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); ++ } ++ else ++ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) ++ { ++ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ if(pBtLinkInfo->bScoExist) ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); ++ else ++ { ++ if (BTC_WIFI_BW_HT40==wifiBw) ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x10); ++ else ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ } ++ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, TRUE); ++ halbtc8812a1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message ++ } ++ else ++ { ++ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); ++ ++ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++ halbtc8812a1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], BT Is Inquirying \n") ); ++ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8812a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ ++ if(!bWifiConnected) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ if (bScan) ++ halbtc8812a1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ else ++ halbtc8812a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else ++ halbtc8812a1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else // wifi LPS/Busy ++ { ++ halbtc8812a1ant_ActionWifiConnected(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8812a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ ++ // sw all off ++ halbtc8812a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ //halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ //halbtc8812a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ pCoexSta->popEventCnt = 0; ++} ++ ++VOID ++halbtc8812a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u4Byte u4Tmp=0; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); ++ ++ //ant sw control to BT ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, TRUE, FALSE); ++ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ // PTA parameter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffff); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, 0x55555555); ++ ++ // coex parameters ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); ++ ++ // enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // enable PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++ ++ // bt clock related ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4); ++ u1Tmp |= BIT7; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4, u1Tmp); ++ ++ // bt clock related ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); ++ u1Tmp |= BIT1; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8812a1ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8812a1ant_ ++//============================================================ ++VOID ++EXhalbtc8812a1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8812a1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8812a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8812a1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); ++ pBtCoexist->bStopCoexDm = FALSE; ++} ++ ++VOID ++EXhalbtc8812a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ pBtCoexist->bStopCoexDm = FALSE; ++ ++ halbtc8812a1ant_InitCoexDm(pBtCoexist); ++ ++ halbtc8812a1ant_QueryBtInfo(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8812a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ if(pBtCoexist->bStopCoexDm) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8812a1Ant, GLCoexVer8812a1Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8812a1Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ ++ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), ++ pBtCoexist->btInfo.aggBufSize); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ ++ pBtCoexist->btInfo.raMask); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ ++ pCoexDm->errorCondition); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ ++ pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb3); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x900); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xcb3/0xcb7/0x900", \ ++ u1Tmp[0], u1Tmp[1], u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++ ++VOID ++EXhalbtc8812a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp=0; ++ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ ++ halbtc8812a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8812a1ant_InitCoexDm(pBtCoexist); ++ halbtc8812a1ant_QueryBtInfo(pBtCoexist); ++ ++ pCoexSta->bUnderIps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8812a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8812a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ u1Byte u1Tmpa, u1Tmpb; ++ u4Byte u4Tmp; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm ) ++ return; ++ ++ if(BTC_SCAN_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); ++ } ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ return; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ halbtc8812a1ant_QueryBtInfo(pBtCoexist); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8812a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_SCAN_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8812a1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ } ++ else // wifi is connected ++ { ++ halbtc8812a1ant_ActionWifiConnectedScan(pBtCoexist); ++ } ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8812a1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8812a1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8812a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ pCoexDm->nArpCnt = 0; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ //pCoexDm->nArpCnt = 0; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8812a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ halbtc8812a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8812a1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8812a1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++//to check registers... ++VOID ++EXhalbtc8812a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte dataLen=5; ++ u1Byte buf[6] = {0}; ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ BOOLEAN bWifiUnderBMode = FALSE; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, FALSE, FALSE); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++#if 0 ++ //Set CCK Tx/Rx high Pri except 11b mode ++ if (bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx ++ } ++#endif ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ pCoexDm->nArpCnt = 0; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ //H2C_Parameter[0] = 0x1; ++ H2C_Parameter[0] = 0x0; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ buf[0] = dataLen; ++ buf[1] = 0x5; // OP_Code ++ buf[2] = 0x3; // OP_Code_Length ++ buf[3] = H2C_Parameter[0]; // OP_Code_Content ++ buf[4] = H2C_Parameter[1]; ++ buf[5] = H2C_Parameter[2]; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++} ++ ++VOID ++EXhalbtc8812a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type ) ++ { ++ if(BTC_PACKET_ARP == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); ++ ++ pCoexDm->nArpCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); ++ ++ if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); ++ } ++ ++ pCoexSta->specialPktPeriodCnt = 0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8812a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8812a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8812a1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8812a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8812a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) ++ { ++ halbtc8812a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8812a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bBtBusy=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8812A_1ANT_MAX) ++ rspSource = BT_INFO_SRC_8812A_1ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8812A_1ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ if (pCoexSta->btRetryCnt >= 1) ++ pCoexSta->popEventCnt++; ++ ++ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) ++ pCoexSta->bC2hBtPage = TRUE; ++ else ++ pCoexSta->bC2hBtPage = FALSE; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2-90; ++ //pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ if(!pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if(pCoexSta->btInfoExt & BIT1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if(pCoexSta->btInfoExt & BIT3) ++ { ++ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8812a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8812A_1ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8812a1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8812A_1ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8812A_1ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8812A_1ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8812A_1ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8812A_1ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8812A_1ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ } ++ ++ halbtc8812a1ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) ++ ++ if(!(btInfo&BT_INFO_8812A_1ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8812A_1ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8812A_1ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8812A_1ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8812A_1ANT_B_ACL_BUSY) ++ { ++ if(BT_8812A_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8812A_1ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ bBtBusy = TRUE; ++ else ++ bBtBusy = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ halbtc8812a1ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8812a1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa,u1Tmpb, u1Tmpc; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF Status notify\n")); ++ ++ if(BTC_RF_ON == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned ON!!\n")); ++ pBtCoexist->bStopCoexDm = FALSE; ++ } ++ else if(BTC_RF_OFF == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RF is turned OFF!!\n")); ++ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ ++ halbtc8812a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ pBtCoexist->bStopCoexDm = TRUE; ++ } ++} ++ ++VOID ++EXhalbtc8812a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ ++ halbtc8812a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++} ++ ++VOID ++EXhalbtc8812a1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8812a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FORCE_EXEC, FALSE, TRUE); ++ halbtc8812a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ pBtCoexist->bStopCoexDm = FALSE; ++ halbtc8812a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8812a1ant_InitCoexDm(pBtCoexist); ++ halbtc8812a1ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8812a1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], *****************Coex DM Reset*****************\n")); ++ ++ halbtc8812a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8812a1ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8812a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8812a1Ant, GLCoexVer8812a1Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8812A_1ANT == 0) ++ halbtc8812a1ant_QueryBtInfo(pBtCoexist); ++ halbtc8812a1ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8812a1ant_MonitorBtCtr(pBtCoexist); ++ halbtc8812a1ant_MonitorWiFiCtr(pBtCoexist); ++ ++ if( halbtc8812a1ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust ) ++ { ++ halbtc8812a1ant_RunCoexistMechanism(pBtCoexist); ++ } ++ ++ pCoexSta->specialPktPeriodCnt++; ++#endif ++} ++ ++VOID ++EXhalbtc8812a1ant_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ) ++{ ++ switch(opCode) ++ { ++ case BTC_DBG_SET_COEX_NORMAL: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set CoexMode to Normal\n")); ++ pBtCoexist->bManualControl = FALSE; ++ halbtc8812a1ant_InitCoexDm(pBtCoexist); ++ break; ++ case BTC_DBG_SET_COEX_WIFI_ONLY: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set CoexMode to Wifi Only\n")); ++ pBtCoexist->bManualControl = TRUE; ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ break; ++ case BTC_DBG_SET_COEX_BT_ONLY: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set CoexMode to BT only\n")); ++ pBtCoexist->bManualControl = TRUE; ++ halbtc8812a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ break; ++ case BTC_DBG_SET_COEX_DEC_BT_PWR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power\n")); ++ { ++ u1Byte dataLen=4; ++ u1Byte buf[6] = {0}; ++ u1Byte decBtPwr=0, pwrLevel=0; ++ if(opLen == 2) ++ { ++ decBtPwr = pData[0]; ++ pwrLevel = pData[1]; ++ ++ buf[0] = dataLen; ++ buf[1] = 0x3; // OP_Code ++ buf[2] = 0x2; // OP_Code_Length ++ ++ buf[3] = decBtPwr; // OP_Code_Content ++ buf[4] = pwrLevel; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power=%d, pwrLevel=%d\n", decBtPwr, pwrLevel)); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_AFH_MAP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map\n")); ++ { ++ u1Byte dataLen=5; ++ u1Byte buf[6] = {0}; ++ if(opLen == 3) ++ { ++ buf[0] = dataLen; ++ buf[1] = 0x5; // OP_Code ++ buf[2] = 0x3; // OP_Code_Length ++ ++ buf[3] = pData[0]; // OP_Code_Content ++ buf[4] = pData[1]; ++ buf[5] = pData[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map = %02x %02x %02x\n", ++ pData[0], pData[1], pData[2])); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active\n")); ++ { ++ u1Byte dataLen=3; ++ u1Byte buf[6] = {0}; ++ if(opLen == 1) ++ { ++ buf[0] = dataLen; ++ buf[1] = 0x1; // OP_Code ++ buf[2] = 0x1; // OP_Code_Length ++ ++ buf[3] = pData[0]; // OP_Code_Content ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active = 0x%x\n", ++ pData[0])); ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++ } ++ } ++ break; ++ default: ++ break; ++ } ++} ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a1Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a1Ant.h new file mode 100644 -index 000000000..edc060f42 +index 0000000..c4ec1a4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a1Ant.h @@ -0,0 +1,258 @@ -+//=========================================== -+// The following is for 8812A 1ANT BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8812A_1ANT 1 -+ -+#define BT_INFO_8812A_1ANT_B_FTP BIT7 -+#define BT_INFO_8812A_1ANT_B_A2DP BIT6 -+#define BT_INFO_8812A_1ANT_B_HID BIT5 -+#define BT_INFO_8812A_1ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8812A_1ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8812A_1ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8812A_1ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8812A_1ANT_B_CONNECTION BIT0 -+ -+#define BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT 2 -+ -+#define BT_8812A_1ANT_WIFI_NOISY_THRESH 30 //max: 255 -+ -+typedef enum _BT_INFO_SRC_8812A_1ANT{ -+ BT_INFO_SRC_8812A_1ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8812A_1ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8812A_1ANT_MAX -+}BT_INFO_SRC_8812A_1ANT,*PBT_INFO_SRC_8812A_1ANT; -+ -+typedef enum _BT_8812A_1ANT_BT_STATUS{ -+ BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8812A_1ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8812A_1ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8812A_1ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8812A_1ANT_BT_STATUS_MAX -+}BT_8812A_1ANT_BT_STATUS,*PBT_8812A_1ANT_BT_STATUS; -+ -+typedef enum _BT_8812A_1ANT_WIFI_STATUS{ -+ BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, -+ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, -+ BT_8812A_1ANT_WIFI_STATUS_MAX -+}BT_8812A_1ANT_WIFI_STATUS,*PBT_8812A_1ANT_WIFI_STATUS; -+ -+typedef enum _BT_8812A_1ANT_COEX_ALGO{ -+ BT_8812A_1ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8812A_1ANT_COEX_ALGO_SCO = 0x1, -+ BT_8812A_1ANT_COEX_ALGO_HID = 0x2, -+ BT_8812A_1ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8812A_1ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8812A_1ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8812A_1ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8812A_1ANT_COEX_ALGO_MAX = 0xb, -+}BT_8812A_1ANT_COEX_ALGO,*PBT_8812A_1ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8812A_1ANT{ -+ // hw setting -+ u1Byte preAntPosType; -+ u1Byte curAntPosType; -+ // fw mechanism -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ // sw mechanism -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt -+ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt -+ u2Byte backupRetryLimit; -+ u1Byte backupAmpduMaxTime; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ u1Byte preArfrType; -+ u1Byte curArfrType; -+ u1Byte preRetryLimitType; -+ u1Byte curRetryLimitType; -+ u1Byte preAmpduTimeType; -+ u1Byte curAmpduTimeType; -+ u4Byte nArpCnt; -+ -+ u1Byte errorCondition; -+} COEX_DM_8812A_1ANT, *PCOEX_DM_8812A_1ANT; -+ -+typedef struct _COEX_STA_8812A_1ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte specialPktPeriodCnt; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ s1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8812A_1ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8812A_1ANT_MAX]; -+ u4Byte btInfoQueryCnt; -+ BOOLEAN bC2hBtInquiryPage; -+ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue -+ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ u4Byte popEventCnt; -+ u1Byte nScanAPNum; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ BOOLEAN bCCKLock; -+ BOOLEAN bPreCCKLock; -+ u1Byte nCoexTableType; -+ -+ BOOLEAN bForceLpsOn; -+}COEX_STA_8812A_1ANT, *PCOEX_STA_8812A_1ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8812a1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a1ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8812a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8812a1ant_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8812a1ant_CoexDmReset( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a1ant_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ); -+VOID -+EXhalbtc8812a1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8812A 1ANT BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8812A_1ANT 1 ++ ++#define BT_INFO_8812A_1ANT_B_FTP BIT7 ++#define BT_INFO_8812A_1ANT_B_A2DP BIT6 ++#define BT_INFO_8812A_1ANT_B_HID BIT5 ++#define BT_INFO_8812A_1ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8812A_1ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8812A_1ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8812A_1ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8812A_1ANT_B_CONNECTION BIT0 ++ ++#define BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT 2 ++ ++#define BT_8812A_1ANT_WIFI_NOISY_THRESH 30 //max: 255 ++ ++typedef enum _BT_INFO_SRC_8812A_1ANT{ ++ BT_INFO_SRC_8812A_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8812A_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8812A_1ANT_MAX ++}BT_INFO_SRC_8812A_1ANT,*PBT_INFO_SRC_8812A_1ANT; ++ ++typedef enum _BT_8812A_1ANT_BT_STATUS{ ++ BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8812A_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8812A_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8812A_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8812A_1ANT_BT_STATUS_MAX ++}BT_8812A_1ANT_BT_STATUS,*PBT_8812A_1ANT_BT_STATUS; ++ ++typedef enum _BT_8812A_1ANT_WIFI_STATUS{ ++ BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8812A_1ANT_WIFI_STATUS_MAX ++}BT_8812A_1ANT_WIFI_STATUS,*PBT_8812A_1ANT_WIFI_STATUS; ++ ++typedef enum _BT_8812A_1ANT_COEX_ALGO{ ++ BT_8812A_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8812A_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8812A_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8812A_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8812A_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8812A_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8812A_1ANT_COEX_ALGO_MAX = 0xb, ++}BT_8812A_1ANT_COEX_ALGO,*PBT_8812A_1ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8812A_1ANT{ ++ // hw setting ++ u1Byte preAntPosType; ++ u1Byte curAntPosType; ++ // fw mechanism ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ // sw mechanism ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt ++ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt ++ u2Byte backupRetryLimit; ++ u1Byte backupAmpduMaxTime; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ u1Byte preArfrType; ++ u1Byte curArfrType; ++ u1Byte preRetryLimitType; ++ u1Byte curRetryLimitType; ++ u1Byte preAmpduTimeType; ++ u1Byte curAmpduTimeType; ++ u4Byte nArpCnt; ++ ++ u1Byte errorCondition; ++} COEX_DM_8812A_1ANT, *PCOEX_DM_8812A_1ANT; ++ ++typedef struct _COEX_STA_8812A_1ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte specialPktPeriodCnt; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ s1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8812A_1ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8812A_1ANT_MAX]; ++ u4Byte btInfoQueryCnt; ++ BOOLEAN bC2hBtInquiryPage; ++ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue ++ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ u4Byte popEventCnt; ++ u1Byte nScanAPNum; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ BOOLEAN bCCKLock; ++ BOOLEAN bPreCCKLock; ++ u1Byte nCoexTableType; ++ ++ BOOLEAN bForceLpsOn; ++}COEX_STA_8812A_1ANT, *PCOEX_STA_8812A_1ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8812a1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a1ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8812a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8812a1ant_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8812a1ant_CoexDmReset( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a1ant_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ); ++VOID ++EXhalbtc8812a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a2Ant.c new file mode 100644 -index 000000000..3a6d44f4a +index 0000000..34ebffb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a2Ant.c @@ -0,0 +1,5434 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8812A Co-exist mechanism -+// -+// History -+// 2012/08/22 Cosa first check in. -+// 2012/11/14 Cosa Revise for 8812A 2Ant out sourcing. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8812a2Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8812A_2ANT GLCoexDm8812a2Ant; -+static PCOEX_DM_8812A_2ANT pCoexDm=&GLCoexDm8812a2Ant; -+static COEX_STA_8812A_2ANT GLCoexSta8812a2Ant; -+static PCOEX_STA_8812A_2ANT pCoexSta=&GLCoexSta8812a2Ant; -+ -+const char *const GLBtInfoSrc8812a2Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8812a2Ant=20150408; -+u4Byte GLCoexVer8812a2Ant=0x39; -+//improve 8761ATV D-cut BT off/on fail issue -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8812a2ant_ -+//============================================================ -+u1Byte -+halbtc8812a2ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8812a2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8812a2ant_SetEnablePTA( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnablePTA -+ ) -+{ -+ if(bEnablePTA) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PTA is enable!\n")); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PTA is disable!\n")); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x00); -+ -+ } -+} -+ -+VOID -+halbtc8812a2ant_EnablePTA( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE (COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Enable PTA %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurEnablePTA = bEnable; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bPreEnablePTA = %d, bCurEnablePTA = %d!!\n", -+ pCoexDm->bPreEnablePTA, pCoexDm->bCurEnablePTA)); -+ -+ if(pCoexDm->bPreEnablePTA == pCoexDm->bCurEnablePTA) -+ return; -+ } -+ halbtc8812a2ant_SetEnablePTA(pBtCoexist, bEnable); -+ -+ -+ pCoexDm->bPreEnablePTA = pCoexDm->bCurEnablePTA; -+} -+ -+VOID -+halbtc8812a2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ // only 8812a need to consider if core stack is installed. -+ if(!pStackInfo->hciVersion) -+ { -+ bBtActive = FALSE; -+ } -+/* -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+*/ -+ -+ if((pCoexSta->prebtInfoC2hCnt_BT_RSP == pCoexSta->btInfoC2hCnt[1]) && -+ (pCoexSta->prebtInfoC2hCnt_BT_SEND == pCoexSta->btInfoC2hCnt[2])) -+ { -+ bBtActive = FALSE; -+ } -+ -+ pCoexSta->prebtInfoC2hCnt_BT_RSP = pCoexSta->btInfoC2hCnt[1]; -+ pCoexSta->prebtInfoC2hCnt_BT_SEND = pCoexSta->btInfoC2hCnt[2]; -+ -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt is detected as disabled %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(pCoexSta->preBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (pCoexSta->preBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ pCoexSta->preBtDisabled = bBtDisabled; -+ -+ if(!bBtDisabled) -+ { -+ // enable PTA -+// halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, TRUE); -+ } -+ else -+ { -+ // disable PTA -+// halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, FALSE); -+ } -+ } -+} -+ -+u4Byte -+halbtc8812a2ant_DecideRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte raMaskType -+ ) -+{ -+ u4Byte disRaMask=0x0; -+ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ disRaMask = 0x0; -+ break; -+ case 1: // disable cck 1/2 -+ disRaMask = 0x00000003; -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ disRaMask = 0x0001f1f7; -+ break; -+ default: -+ break; -+ } -+ -+ return disRaMask; -+} -+ -+VOID -+halbtc8812a2ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+VOID -+halbtc8812a2ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+VOID -+halbtc8812a2ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+VOID -+halbtc8812a2ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8812a2ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType -+ ) -+{ -+ u4Byte disRaMask=0x0; -+ -+ pCoexDm->curRaMaskType = raMaskType; -+ disRaMask = halbtc8812a2ant_DecideRaMask(pBtCoexist, raMaskType); -+ halbtc8812a2ant_UpdateRaMask(pBtCoexist, bForceExec, disRaMask); -+ -+ halbtc8812a2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8812a2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8812a2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+} -+ -+VOID -+halbtc8812a2ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+VOID -+halbtc8812a2ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8812a2ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte dataLen=3; -+ u1Byte buf[5] = {0}; -+//8812a watch btifo to check BT enable/disable -+// if(!pBtCoexist->btInfo.bBtDisabled) -+ { -+ if(!pCoexSta->btInfoQueryCnt || -+ (pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8812A_2ANT_BT_RSP]-pCoexSta->btInfoQueryCnt)>2) -+ { -+ buf[0] = dataLen; -+ buf[1] = 0x1; // polling enable, 1=enable, 0=disable -+ buf[2] = 0x2; // polling time in seconds -+ buf[3] = 0x1; // auto report enable, 1=enable, 0=disable -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_INFO, (PVOID)&buf[0]); -+ } -+ } -+ pCoexSta->btInfoQueryCnt++; -+} -+ -+BOOLEAN -+halbtc8812a2ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8812a2ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+#if 1//(BT_AUTO_REPORT_ONLY_8812A_2ANT == 1) // profile from bt patch -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ pBtLinkInfo->bAclBusy = pCoexSta->bAclBusy; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+#else // profile from bt stack -+ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; -+ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; -+ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; -+ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; -+ -+ //for win-8 stack HID report error -+ if(!pStackInfo->bHidExist) -+ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack -+ // when stack HID report error, here we use the info from bt fw. -+ if(!pStackInfo->bBtLinkExist) -+ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+#endif -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8812a2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8812A_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 0) -+ { -+ if(pBtLinkInfo->bAclBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ACL Busy only\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ else if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(pStackInfo->numOfHid >= 2) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8812a2ant_SetFwDacSwingLevel( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte dacSwingLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ // There are several type of dacswing -+ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 -+ H2C_Parameter[0] = dacSwingLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8812a2ant_SetFwDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ u1Byte dataLen=4; -+ u1Byte buf[6] = {0}; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d\n", -+ decBtPwrLvl)); -+ -+ buf[0] = dataLen; -+ buf[1] = 0x3; // OP_Code -+ buf[2] = 0x2; // OP_Code_Length -+ if(decBtPwrLvl) -+ buf[3] = 0x1; // OP_Code_Content -+ else -+ buf[3] = 0x0; -+ buf[4] = decBtPwrLvl;// pwrLevel -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+} -+ -+VOID -+halbtc8812a2ant_DecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", -+ (bForceExec? "force to":""), decBtPwrLvl)); -+ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) -+ return; -+ } -+ halbtc8812a2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); -+ -+ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; -+} -+ -+VOID -+halbtc8812a2ant_FwDacSwingLvl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte fwDacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", -+ (bForceExec? "force to":""), fwDacSwingLvl)); -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) -+ return; -+ } -+ -+ halbtc8812a2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); -+ -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+} -+ -+VOID -+halbtc8812a2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8812a2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8812a2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte tmpU1; -+ -+ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); -+ tmpU1 |= BIT0; -+ if(bLowPenaltyRa) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); -+ tmpU1 &= ~BIT2; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); -+ tmpU1 |= BIT2; -+ } -+ -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); -+} -+ -+VOID -+halbtc8812a2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ return; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8812a2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8812a2ant_SetDacSwingReg( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte level -+ ) -+{ -+ u1Byte val=(u1Byte)level; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val); -+} -+ -+VOID -+halbtc8812a2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ if(bSwDacSwingOn) -+ { -+ halbtc8812a2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); -+ } -+ else -+ { -+ halbtc8812a2ant_SetDacSwingReg(pBtCoexist, 0x18); -+ } -+} -+ -+ -+VOID -+halbtc8812a2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8812a2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8812a2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1); -+ } -+} -+ -+VOID -+halbtc8812a2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8812a2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8812a2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28F4B); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x10AB2); -+ rssiAdjustVal = 8; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x2884B); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x104B2); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); -+ -+ // set rssiAdjustVal for wifi module. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+VOID -+halbtc8812a2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8812a2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8812a2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8812a2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8812a2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8812a2ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ switch(type) -+ { -+ case 0: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0xdfffdfff, 0x5fdb5fdb, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5ddd5ddd, 0x5fdb5fdb, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 7: -+ if(pCoexSta->nScanAPNum <= 5) -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xfafafafa, 0xffffff, 0x3); -+ else -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 8: -+ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5f5f5f5f, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8812a2ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte dataLen=3; -+ u1Byte buf[5] = {0}; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Ignore Wlan_Act\n", -+ (bEnable? "Enable":"Disable"))); -+ -+ buf[0] = dataLen; -+ buf[1] = 0x1; // OP_Code -+ buf[2] = 0x1; // OP_Code_Length -+ if(bEnable) -+ buf[3] = 0x1; // OP_Code_Content -+ else -+ buf[3] = 0x0; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+} -+ -+VOID -+halbtc8812a2ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8812a2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8812a2ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ if(byte1&BIT4 && !(byte1&BIT5)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+VOID -+halbtc8812a2ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8812a2ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8812a2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8812a2ant_SwMechanism1( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bShrinkRxLPF, -+ IN BOOLEAN bLowPenaltyRA, -+ IN BOOLEAN bLimitedDIG, -+ IN BOOLEAN bBTLNAConstrain -+ ) -+{ -+ /* -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 -+ { -+ if (bShrinkRxLPF) -+ bShrinkRxLPF = FALSE; -+ } -+ */ -+ -+ halbtc8812a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); -+ //halbtc8812a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8812a2ant_SwMechanism2( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAGCTableShift, -+ IN BOOLEAN bADCBackOff, -+ IN BOOLEAN bSWDACSwing, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ //halbtc8812a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); -+ halbtc8812a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); -+ halbtc8812a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); -+} -+ -+VOID -+halbtc8812a2ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ u1Byte u1Tmp=0; -+ -+ if(bInitHwCfg) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x900, 0x00000400); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76d, 0x1); -+ } -+ else if(bWifiOff) -+ { -+ -+ } -+ -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_WIFI_AT_CPL_MAIN: -+ break; -+ case BTC_ANT_WIFI_AT_CPL_AUX: -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); -+ u1Tmp &= ~BIT3; -+ u1Tmp |= BIT2; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8812a2ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bTurnOnByCnt=FALSE; -+ u1Byte psTdmaTypeByCnt=0; -+ s1Byte nWiFiDurationAdjust = 0x0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if(!bForceExec) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", -+ pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", -+ pCoexDm->prePsTdma, pCoexDm->curPsTdma)); -+ -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ -+ if (pCoexSta->nScanAPNum >= 40) -+ nWiFiDurationAdjust = -15; -+ else if (pCoexSta->nScanAPNum >= 20) -+ nWiFiDurationAdjust = -10; -+ -+/* -+ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 -+ { -+ psTdmaByte0Val = 0x61; //no null-pkt -+ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot -+ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle -+ } -+ -+ -+ if ( (type == 3) || (type == 13) || (type == 14) ) -+ { -+ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile -+ -+ if (!bWifiBusy) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ } -+ -+ if (pBtLinkInfo->bSlaveRole == TRUE) -+ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) -+ -+*/ -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ case 1: -+ default: //d1,wb -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x11, 0x10); -+ break; -+ case 2: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x11, 0x10); -+ break; -+ case 3: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x11, 0x10); -+ break; -+ case 4: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x11, 0x10); -+ break; -+ case 5: //d1,pb,TXpause -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x3c, 0x03, 0x90, 0x10); -+ break; -+ case 6: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x32, 0x03, 0x90, 0x10); -+ break; -+ case 7: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x28, 0x03, 0x90, 0x10); -+ break; -+ case 8: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x1e, 0x03, 0x90, 0x10); -+ break; -+ case 9: //d1,bb -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x31, 0x10); -+ break; -+ case 10: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x31, 0x10); -+ break; -+ case 11: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x31, 0x10); -+ break; -+ case 12: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x31, 0x10); -+ break; -+ case 13: //d1,bb,TXpause -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x30, 0x10); -+ break; -+ case 14: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x30, 0x10); -+ break; -+ case 15: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x30, 0x10); -+ break; -+ case 16: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x30, 0x10); -+ break; -+ case 17: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); -+ break; -+ case 18: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ break; -+ case 19: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); -+ break; -+ case 20: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); -+ break; -+ case 21: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x70, 0x90); -+ break; -+ case 22: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x61, 0x1a, 0x1a, 0x21, 0x10); -+ break; -+ case 23: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x03, 0x31, 0x10); -+ break; -+ -+ case 71: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ break; -+ -+ // following cases is for wifi rssi low, started from 81 -+ case 80: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3c, 0x3, 0x90, 0x50); -+ break; -+ case 81: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3a+nWiFiDurationAdjust, 0x3, 0x90, 0x50); -+ break; -+ case 82: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x30+nWiFiDurationAdjust, 0x03, 0x90, 0x50); -+ break; -+ case 83: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x21, 0x03, 0x90, 0x50); -+ break; -+ case 84: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x15, 0x3, 0x90, 0x50); -+ break; -+ case 85: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x1d, 0x1d, 0x80, 0x50); -+ break; -+ case 86: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x15, 0x15, 0x80, 0x50); -+ break; -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(type) -+ { -+ case 0: //ANT2PTA, 0x778=0x1 -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 1: //ANT2BT, 0x778=3 -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); -+ delay_ms(5); -+ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, FALSE, FALSE); -+ break; -+ default: -+ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ break; -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8812a2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8812a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); -+ -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8812a2ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8812a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8812a2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8812a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+BOOLEAN -+halbtc8812a2ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ BOOLEAN bBtHsOn=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); -+ halbtc8812a2ant_ActionBtInquiry(pBtCoexist); -+ return TRUE; -+ } -+ -+ if(pBtLinkInfo->bScoExist || pBtLinkInfo->bHidExist) -+ { -+ halbtc8812a2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 0, 0, 0); -+ } -+ else -+ { -+ halbtc8812a2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ } -+ -+ if(!bWifiConnected) -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); -+ -+ if( (BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) || -+ (BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if(BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else if(BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ if(bBtHsOn) -+ return FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ bCommon = FALSE; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 17); -+ -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ bCommon = TRUE; -+ } -+ } -+ } -+ -+ return bCommon; -+} -+ -+VOID -+halbtc8812a2ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bScoHid, -+ IN BOOLEAN bTxPause, -+ IN u1Byte maxInterval -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); -+ -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ { -+ if(bScoHid) -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ else -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ } -+ } -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); -+ if(maxInterval == 1) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 2) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 3) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+} -+ -+//================== -+// pstdma for wifi rssi low -+//================== -+VOID -+halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow( -+ IN PBTC_COEXIST pBtCoexist//, -+ //IN u1Byte wifiStatus -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0, btInfoExt; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow()\n")); -+#if 0 -+ if( (BT_8812A_2ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || -+ (BT_8812A_2ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || -+ (BT_8812A_2ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) -+ { -+ if( pCoexDm->curPsTdma != 81 && -+ pCoexDm->curPsTdma != 82 && -+ pCoexDm->curPsTdma != 83 && -+ pCoexDm->curPsTdma != 84 ) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ return; -+ } -+#endif -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ -+ retryCount = pCoexSta->btRetryCnt; -+ btInfoExt = pCoexSta->btInfoExt; -+ -+ if(!pCoexDm->bAutoTdmaAdjustLowRssi) -+ { -+ pCoexDm->bAutoTdmaAdjustLowRssi = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjustForWifiRssiLow()!!\n")); -+ -+ if(BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(btInfoExt)) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+ else -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+// retryCount = pCoexSta->btRetryCnt; -+// btInfoExt = pCoexSta->btInfoExt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) -+ retryCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ if(result == -1) -+ { -+/* -+ if( (BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); -+ pCoexDm->psTdmaDuAdjType = 84; -+ } -+*/ -+ if(pCoexDm->curPsTdma == 80) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ } -+ else if(pCoexDm->curPsTdma == 81) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ } -+ else if(pCoexDm->curPsTdma == 82) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+ else if(pCoexDm->curPsTdma == 83) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); -+ pCoexDm->psTdmaDuAdjType = 84; -+ } -+ } -+ else if(result == 1) -+ { -+/* -+ if( (BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+*/ -+ if(pCoexDm->curPsTdma == 84) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); -+ pCoexDm->psTdmaDuAdjType = 83; -+ } -+ else if(pCoexDm->curPsTdma == 83) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); -+ pCoexDm->psTdmaDuAdjType = 82; -+ } -+ else if(pCoexDm->curPsTdma == 82) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); -+ pCoexDm->psTdmaDuAdjType = 81; -+ } -+ else if((pCoexDm->curPsTdma == 81)&&((pCoexSta->nScanAPNum <= 5))) -+ { -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); -+ pCoexDm->psTdmaDuAdjType = 81; -+ } -+ } -+ -+ if( pCoexDm->curPsTdma != 80 && -+ pCoexDm->curPsTdma != 81 && -+ pCoexDm->curPsTdma != 82 && -+ pCoexDm->curPsTdma != 83 && -+ pCoexDm->curPsTdma != 84 ) -+ { -+ // recover to previous adjust type -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_GetBtRssiThreshold( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte pThres0, -+ IN pu1Byte pThres1 -+ ) -+{ -+ u1Byte antType, btThreshold=0; -+ -+// pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &antType); -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ antType = pBoardInfo->antType; -+ -+ -+ switch(antType) -+ { -+ case BTC_ANT_TYPE_0: -+ *pThres0 = 100; -+ *pThres1 = 100; -+ break; -+ case BTC_ANT_TYPE_1: -+ *pThres0 = 34; -+ *pThres1 = 42; -+ break; -+ case BTC_ANT_TYPE_2: -+ *pThres0 = 34; -+ *pThres1 = 42; -+ break; -+ case BTC_ANT_TYPE_3: -+ *pThres0 = 34; -+ *pThres1 = 42; -+ break; -+ case BTC_ANT_TYPE_4: -+ *pThres0 = 34; -+ *pThres1 = 42; -+ break; -+ default: -+ break; -+ } -+} -+ -+ -+ -+VOID -+halbtc8812a2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ else -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ -+ // pstdma -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ else -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionScoHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ -+ // pstdma -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ else -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte anttype=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ anttype = pBoardInfo->antType; -+ -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+// btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ -+ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT -+ { -+ // power save state & pstdma & coex table -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation -+ { -+ // power save state & pstdma & coex table -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ } -+ } -+ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ } -+ else //ANTTYPE = 4 for test -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ -+ -+ // power save state -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8812a2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte anttype=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ anttype = pBoardInfo->antType; -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+// btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+// anttype = 4; -+ -+ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT -+ { -+ -+ if((pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ -+ // power save state & pstdma & coex table -+/* -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+*/ -+ } -+ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); //shielding room -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ -+ } -+ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ } -+ else //ANTTYPE = 4 for test -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // decrease BT power -+/* -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A) // BT HIGH RSSI & shielding room -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2); -+ else -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ else -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 85); -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//PAN(HS) only -+VOID -+halbtc8812a2ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ -+ // pstdma -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8812a2ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ else -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ else -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); -+ } -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+// btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ else -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ else -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 85); -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ else -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8812a2ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+// btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ else -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ else -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); -+ } -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ else -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionHidA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0; -+ -+ halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+// btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ // power save state -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ else -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // pstdma -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ else -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ else -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiBw; -+ u1Byte btThresh0=0, btThresh1=0, anttype=0; -+ BOOLEAN bApEnable=FALSE; -+ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ anttype = pBoardInfo->antType; -+ -+ -+// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); -+// btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); -+ -+ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); -+ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); -+ -+ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ } -+ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ } -+ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ } -+ } -+ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ } -+ else //ANTTYPE = 4 for test -+ { -+ // power save state & pstdma & coex table -+ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & shielding room -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) -+ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //WIFI RSSI || BT RSSI == low -+ { -+ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); -+ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ } -+ -+ // decrease BT power -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+/* -+ // decrease BT power -+ if(BTC_RSSI_LOW(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A) // BT HIGH RSSI & shielding room -+ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+*/ -+ // limited Rx -+ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ // fw dac swing level -+ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if(BTC_RSSI_HIGH(wifiRssiState)) -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8812a2ant_CoexUnder5G( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8812a2ant_CoexAllOff(pBtCoexist); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Under 5G, force set BT to ignore Wlan active!!\n")); -+ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); -+} -+//==================================================== -+VOID -+halbtc8812a2ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; -+ u1Byte btInfoOriginal=0, btRetryCnt=0; -+ u1Byte algorithm=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ if(bWifiUnder5G) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n")); -+ halbtc8812a2ant_CoexUnder5G(pBtCoexist); -+ return; -+ } -+ -+ -+ algorithm = halbtc8812a2ant_ActionAlgorithm(pBtCoexist); -+ if(pCoexSta->bC2hBtInquiryPage && (BT_8812A_2ANT_COEX_ALGO_PANHS!=algorithm)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); -+ halbtc8812a2ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ -+ pCoexDm->curAlgorithm = algorithm; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); -+ -+ if(halbtc8812a2ant_IsCommonAction(pBtCoexist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ } -+ else -+ { -+ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", -+ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; -+ } -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8812A_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); -+ halbtc8812a2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_SCO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO+HID.\n")); -+ halbtc8812a2ant_ActionScoHid(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); -+ halbtc8812a2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); -+ halbtc8812a2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); -+ halbtc8812a2ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); -+ halbtc8812a2ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); -+ halbtc8812a2ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); -+ halbtc8812a2ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); -+ halbtc8812a2ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); -+ halbtc8812a2ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN(HS).\n")); -+ halbtc8812a2ant_ActionHidA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); -+ halbtc8812a2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); -+ halbtc8812a2ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+ -+} -+ -+VOID -+halbtc8812a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp -+ ) -+{ -+ u4Byte u4Tmp=0; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ if(bBackUp) -+ { -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+ -+ //ant sw control to BT -+ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, TRUE, FALSE); -+ -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ // PTA parameter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffff); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, 0x55555555); -+ -+ // coex parameters -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); -+ -+ // enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ // disable PTA to avoid BT insn't on -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x00); -+ -+ // bt clock related -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4); -+ u1Tmp |= BIT7; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4, u1Tmp); -+ -+ // bt clock related -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); -+ u1Tmp |= BIT1; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8812a2ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8812a2ant_ -+//============================================================ -+VOID -+EXhalbtc8812a2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8812a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8812a2ant_InitHwConfig(pBtCoexist, TRUE); -+} -+ -+VOID -+EXhalbtc8812a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8812a2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8812a2ant_BTOffOnNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte BTstatus -+ ) -+{ -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BToff/on notify\n")); -+ DBG_871X("%s, BTstatus:%d", __func__, BTstatus); -+ -+ if(BTC_BT_OFF == BTstatus) -+ { -+ //PTA off -+ pBtCoexist->btInfo.bBtDisabled = TRUE; -+ halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, FALSE); -+ -+ } -+ else -+ { -+ //PTA on -+ pBtCoexist->btInfo.bBtDisabled = FALSE; -+ halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, TRUE); -+ } -+ -+} -+ -+ -+ -+VOID -+EXhalbtc8812a2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u2Byte u2Tmp[4]; -+ u4Byte u4Tmp[4]; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Antenna type:", \ -+ pBoardInfo->antType); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8812a2Ant, GLCoexVer8812a2Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8812a2Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ -+ pBtCoexist->btInfo.raMask); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d/%d)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust, pCoexDm->bAutoTdmaAdjustLowRssi); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ -+ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ -+ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ -+ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", "0x778 (W_Act)/ 0x6cc (CoTab Sel)", \ -+ u1Tmp[0], u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x8db(ADC)/0xc5b[29:25](DAC)", \ -+ ((u1Tmp[0]&0x60)>>5), ((u1Tmp[1]&0x3e)>>1)); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb3); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb3/ 0xcb7", \ -+ u1Tmp[0], u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \ -+ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa0a); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(DIG)/0xa0a(CCK-TH)", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xf48/ 0xa5b (FA cnt-- OFDM : CCK)", \ -+ u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1] ); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8812A_2ANT == 1) -+ halbtc8812a2ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8812a2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnder5G=FALSE; -+ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ halbtc8812a2ant_CoexAllOff(pBtCoexist); -+ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, FALSE, TRUE); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS notify, force set BT to ignore Wlan active!!\n")); -+ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ if(!bWifiUnder5G) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS notify, force set BT NOT to ignore Wlan active!!\n")); -+ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8812a2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8812a2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); -+ } -+} -+ -+VOID -+EXhalbtc8812a2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8812a2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte dataLen=5; -+ u1Byte buf[6] = {0}; -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ buf[0] = dataLen; -+ buf[1] = 0x5; // OP_Code -+ buf[2] = 0x3; // OP_Code_Length -+ buf[3] = H2C_Parameter[0]; // OP_Code_Content -+ buf[4] = H2C_Parameter[1]; -+ buf[5] = H2C_Parameter[2]; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+} -+ -+VOID -+EXhalbtc8812a2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+ -+} -+ -+VOID -+EXhalbtc8812a2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiUnder5G=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8812A_2ANT_MAX) -+ rspSource = BT_INFO_SRC_8812A_2ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(BT_INFO_SRC_8812A_2ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if( (pCoexSta->btInfoExt & BIT1) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if( (pCoexSta->btInfoExt&BIT3) && !bWifiUnder5G) -+ { -+ // BT already ignored WlanAct -+ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) -+ { -+ if(!pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ -+ if(pCoexSta->bUnderIps) -+ { -+ // work around for 8812a combo hw bug => when IPS, wlanAct is always high. -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS, set BT to ignore Wlan active!!\n")); -+ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+ } -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8812A_2ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8812A_2ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ pCoexSta->bAclBusy = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8812A_2ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8812A_2ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8812A_2ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8812A_2ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ if(btInfo & BT_INFO_8812A_2ANT_B_ACL_BUSY) -+ pCoexSta->bAclBusy = TRUE; -+ else -+ pCoexSta->bAclBusy = FALSE; -+ -+ } -+ -+ halbtc8812a2ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ if(!(btInfo&BT_INFO_8812A_2ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8812A_2ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8812A_2ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8812A_2ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8812A_2ANT_B_ACL_BUSY) -+ { -+ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8812A_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bBtBusy = TRUE; -+ if(!bWifiUnder5G) -+ bLimitedDig = TRUE; -+ } -+ else -+ { -+ bBtBusy = FALSE; -+ bLimitedDig = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ pCoexDm->bLimitedDig = bLimitedDig; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); -+ -+ halbtc8812a2ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8812a2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte u1Tmp=0; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, FALSE, TRUE); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify, force set BT to ignore Wlan active!!\n")); -+ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ -+ // 0x522=0xff, pause tx -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x522, 0xff); -+ // 0x40[7:6]=2'b01, modify BT mode. -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0xc0, 0x2); -+ //PTA off. -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x0); -+ -+} -+ -+VOID -+EXhalbtc8812a2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8812a2Ant, GLCoexVer8812a2Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8812A_2ANT == 0) -+ halbtc8812a2ant_QueryBtInfo(pBtCoexist); -+ halbtc8812a2ant_MonitorBtCtr(pBtCoexist); -+// halbtc8812a2ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ if( halbtc8812a2ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust || -+ pCoexDm->bAutoTdmaAdjustLowRssi) -+ { -+ halbtc8812a2ant_RunCoexistMechanism(pBtCoexist); -+ } -+#endif -+} -+ -+VOID -+EXhalbtc8812a2ant_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ) -+{ -+ switch(opCode) -+ { -+ case BTC_DBG_SET_COEX_DEC_BT_PWR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power\n")); -+ { -+ u1Byte dataLen=4; -+ u1Byte buf[6] = {0}; -+ u1Byte decBtPwr=0, pwrLevel=0; -+ if(opLen == 2) -+ { -+ decBtPwr = pData[0]; -+ pwrLevel = pData[1]; -+ -+ buf[0] = dataLen; -+ buf[1] = 0x3; // OP_Code -+ buf[2] = 0x2; // OP_Code_Length -+ -+ buf[3] = decBtPwr; // OP_Code_Content -+ buf[4] = pwrLevel; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power=%d, pwrLevel=%d\n", decBtPwr, pwrLevel)); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+ } -+ } -+ break; -+ -+ case BTC_DBG_SET_COEX_BT_AFH_MAP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map\n")); -+ { -+ u1Byte dataLen=5; -+ u1Byte buf[6] = {0}; -+ if(opLen == 3) -+ { -+ buf[0] = dataLen; -+ buf[1] = 0x5; // OP_Code -+ buf[2] = 0x3; // OP_Code_Length -+ -+ buf[3] = pData[0]; // OP_Code_Content -+ buf[4] = pData[1]; -+ buf[5] = pData[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map = %02x %02x %02x\n", -+ pData[0], pData[1], pData[2])); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+ } -+ } -+ break; -+ -+ case BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active\n")); -+ { -+ u1Byte dataLen=3; -+ u1Byte buf[6] = {0}; -+ if(opLen == 1) -+ { -+ buf[0] = dataLen; -+ buf[1] = 0x1; // OP_Code -+ buf[2] = 0x1; // OP_Code_Length -+ -+ buf[3] = pData[0]; // OP_Code_Content -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active = 0x%x\n", -+ pData[0])); -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); -+ } -+ } -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8812A Co-exist mechanism ++// ++// History ++// 2012/08/22 Cosa first check in. ++// 2012/11/14 Cosa Revise for 8812A 2Ant out sourcing. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8812a2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8812A_2ANT GLCoexDm8812a2Ant; ++static PCOEX_DM_8812A_2ANT pCoexDm=&GLCoexDm8812a2Ant; ++static COEX_STA_8812A_2ANT GLCoexSta8812a2Ant; ++static PCOEX_STA_8812A_2ANT pCoexSta=&GLCoexSta8812a2Ant; ++ ++const char *const GLBtInfoSrc8812a2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8812a2Ant=20150408; ++u4Byte GLCoexVer8812a2Ant=0x39; ++//improve 8761ATV D-cut BT off/on fail issue ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8812a2ant_ ++//============================================================ ++u1Byte ++halbtc8812a2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8812a2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8812a2ant_SetEnablePTA( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnablePTA ++ ) ++{ ++ if(bEnablePTA) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PTA is enable!\n")); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PTA is disable!\n")); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x00); ++ ++ } ++} ++ ++VOID ++halbtc8812a2ant_EnablePTA( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE (COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Enable PTA %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurEnablePTA = bEnable; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bPreEnablePTA = %d, bCurEnablePTA = %d!!\n", ++ pCoexDm->bPreEnablePTA, pCoexDm->bCurEnablePTA)); ++ ++ if(pCoexDm->bPreEnablePTA == pCoexDm->bCurEnablePTA) ++ return; ++ } ++ halbtc8812a2ant_SetEnablePTA(pBtCoexist, bEnable); ++ ++ ++ pCoexDm->bPreEnablePTA = pCoexDm->bCurEnablePTA; ++} ++ ++VOID ++halbtc8812a2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ // only 8812a need to consider if core stack is installed. ++ if(!pStackInfo->hciVersion) ++ { ++ bBtActive = FALSE; ++ } ++/* ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++*/ ++ ++ if((pCoexSta->prebtInfoC2hCnt_BT_RSP == pCoexSta->btInfoC2hCnt[1]) && ++ (pCoexSta->prebtInfoC2hCnt_BT_SEND == pCoexSta->btInfoC2hCnt[2])) ++ { ++ bBtActive = FALSE; ++ } ++ ++ pCoexSta->prebtInfoC2hCnt_BT_RSP = pCoexSta->btInfoC2hCnt[1]; ++ pCoexSta->prebtInfoC2hCnt_BT_SEND = pCoexSta->btInfoC2hCnt[2]; ++ ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt is detected as disabled %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(pCoexSta->preBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (pCoexSta->preBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ pCoexSta->preBtDisabled = bBtDisabled; ++ ++ if(!bBtDisabled) ++ { ++ // enable PTA ++// halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, TRUE); ++ } ++ else ++ { ++ // disable PTA ++// halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, FALSE); ++ } ++ } ++} ++ ++u4Byte ++halbtc8812a2ant_DecideRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte raMaskType ++ ) ++{ ++ u4Byte disRaMask=0x0; ++ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ disRaMask = 0x0; ++ break; ++ case 1: // disable cck 1/2 ++ disRaMask = 0x00000003; ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ disRaMask = 0x0001f1f7; ++ break; ++ default: ++ break; ++ } ++ ++ return disRaMask; ++} ++ ++VOID ++halbtc8812a2ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++VOID ++halbtc8812a2ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++VOID ++halbtc8812a2ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++VOID ++halbtc8812a2ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8812a2ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType ++ ) ++{ ++ u4Byte disRaMask=0x0; ++ ++ pCoexDm->curRaMaskType = raMaskType; ++ disRaMask = halbtc8812a2ant_DecideRaMask(pBtCoexist, raMaskType); ++ halbtc8812a2ant_UpdateRaMask(pBtCoexist, bForceExec, disRaMask); ++ ++ halbtc8812a2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8812a2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8812a2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++} ++ ++VOID ++halbtc8812a2ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++VOID ++halbtc8812a2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8812a2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte dataLen=3; ++ u1Byte buf[5] = {0}; ++//8812a watch btifo to check BT enable/disable ++// if(!pBtCoexist->btInfo.bBtDisabled) ++ { ++ if(!pCoexSta->btInfoQueryCnt || ++ (pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8812A_2ANT_BT_RSP]-pCoexSta->btInfoQueryCnt)>2) ++ { ++ buf[0] = dataLen; ++ buf[1] = 0x1; // polling enable, 1=enable, 0=disable ++ buf[2] = 0x2; // polling time in seconds ++ buf[3] = 0x1; // auto report enable, 1=enable, 0=disable ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_INFO, (PVOID)&buf[0]); ++ } ++ } ++ pCoexSta->btInfoQueryCnt++; ++} ++ ++BOOLEAN ++halbtc8812a2ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8812a2ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++#if 1//(BT_AUTO_REPORT_ONLY_8812A_2ANT == 1) // profile from bt patch ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ pBtLinkInfo->bAclBusy = pCoexSta->bAclBusy; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++#else // profile from bt stack ++ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; ++ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; ++ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; ++ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; ++ ++ //for win-8 stack HID report error ++ if(!pStackInfo->bHidExist) ++ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack ++ // when stack HID report error, here we use the info from bt fw. ++ if(!pStackInfo->bBtLinkExist) ++ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++#endif ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8812a2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8812A_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 0) ++ { ++ if(pBtLinkInfo->bAclBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ACL Busy only\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ else if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(pStackInfo->numOfHid >= 2) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8812a2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8812a2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ u1Byte dataLen=4; ++ u1Byte buf[6] = {0}; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d\n", ++ decBtPwrLvl)); ++ ++ buf[0] = dataLen; ++ buf[1] = 0x3; // OP_Code ++ buf[2] = 0x2; // OP_Code_Length ++ if(decBtPwrLvl) ++ buf[3] = 0x1; // OP_Code_Content ++ else ++ buf[3] = 0x0; ++ buf[4] = decBtPwrLvl;// pwrLevel ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++} ++ ++VOID ++halbtc8812a2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", ++ (bForceExec? "force to":""), decBtPwrLvl)); ++ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) ++ return; ++ } ++ halbtc8812a2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); ++ ++ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; ++} ++ ++VOID ++halbtc8812a2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8812a2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8812a2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8812a2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8812a2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ tmpU1 |= BIT0; ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8812a2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8812a2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8812a2ant_SetDacSwingReg( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte level ++ ) ++{ ++ u1Byte val=(u1Byte)level; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val); ++} ++ ++VOID ++halbtc8812a2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ halbtc8812a2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); ++ } ++ else ++ { ++ halbtc8812a2ant_SetDacSwingReg(pBtCoexist, 0x18); ++ } ++} ++ ++ ++VOID ++halbtc8812a2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8812a2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8812a2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1); ++ } ++} ++ ++VOID ++halbtc8812a2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8812a2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8812a2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28F4B); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x10AB2); ++ rssiAdjustVal = 8; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x2884B); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x104B2); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++VOID ++halbtc8812a2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8812a2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8812a2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8812a2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8812a2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8812a2ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ switch(type) ++ { ++ case 0: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0xdfffdfff, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5ddd5ddd, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ if(pCoexSta->nScanAPNum <= 5) ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xfafafafa, 0xffffff, 0x3); ++ else ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8812a2ant_CoexTable(pBtCoexist, bForceExec, 0x5f5f5f5f, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8812a2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte dataLen=3; ++ u1Byte buf[5] = {0}; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Ignore Wlan_Act\n", ++ (bEnable? "Enable":"Disable"))); ++ ++ buf[0] = dataLen; ++ buf[1] = 0x1; // OP_Code ++ buf[2] = 0x1; // OP_Code_Length ++ if(bEnable) ++ buf[3] = 0x1; // OP_Code_Content ++ else ++ buf[3] = 0x0; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++} ++ ++VOID ++halbtc8812a2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8812a2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8812a2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ if(byte1&BIT4 && !(byte1&BIT5)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8812a2ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8812a2ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8812a2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8812a2ant_SwMechanism1( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bShrinkRxLPF, ++ IN BOOLEAN bLowPenaltyRA, ++ IN BOOLEAN bLimitedDIG, ++ IN BOOLEAN bBTLNAConstrain ++ ) ++{ ++ /* ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 ++ { ++ if (bShrinkRxLPF) ++ bShrinkRxLPF = FALSE; ++ } ++ */ ++ ++ halbtc8812a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); ++ //halbtc8812a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8812a2ant_SwMechanism2( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAGCTableShift, ++ IN BOOLEAN bADCBackOff, ++ IN BOOLEAN bSWDACSwing, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ //halbtc8812a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); ++ halbtc8812a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); ++ halbtc8812a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); ++} ++ ++VOID ++halbtc8812a2ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x900, 0x00000400); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76d, 0x1); ++ } ++ else if(bWifiOff) ++ { ++ ++ } ++ ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_CPL_MAIN: ++ break; ++ case BTC_ANT_WIFI_AT_CPL_AUX: ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); ++ u1Tmp &= ~BIT3; ++ u1Tmp |= BIT2; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb7, u1Tmp); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8812a2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0; ++ s1Byte nWiFiDurationAdjust = 0x0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if(!bForceExec) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", ++ pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", ++ pCoexDm->prePsTdma, pCoexDm->curPsTdma)); ++ ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ ++ if (pCoexSta->nScanAPNum >= 40) ++ nWiFiDurationAdjust = -15; ++ else if (pCoexSta->nScanAPNum >= 20) ++ nWiFiDurationAdjust = -10; ++ ++/* ++ if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 ++ { ++ psTdmaByte0Val = 0x61; //no null-pkt ++ psTdmaByte3Val = 0x11; // no tx-pause at BT-slot ++ psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle ++ } ++ ++ ++ if ( (type == 3) || (type == 13) || (type == 14) ) ++ { ++ psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile ++ ++ if (!bWifiBusy) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ } ++ ++ if (pBtLinkInfo->bSlaveRole == TRUE) ++ psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) ++ ++*/ ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ case 1: ++ default: //d1,wb ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x11, 0x10); ++ break; ++ case 2: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x11, 0x10); ++ break; ++ case 3: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x11, 0x10); ++ break; ++ case 4: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x11, 0x10); ++ break; ++ case 5: //d1,pb,TXpause ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x3c, 0x03, 0x90, 0x10); ++ break; ++ case 6: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x32, 0x03, 0x90, 0x10); ++ break; ++ case 7: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x28, 0x03, 0x90, 0x10); ++ break; ++ case 8: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x63, 0x1e, 0x03, 0x90, 0x10); ++ break; ++ case 9: //d1,bb ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x31, 0x10); ++ break; ++ case 10: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x31, 0x10); ++ break; ++ case 11: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x31, 0x10); ++ break; ++ case 12: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x31, 0x10); ++ break; ++ case 13: //d1,bb,TXpause ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x30, 0x10); ++ break; ++ case 14: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x32, 0x03, 0x30, 0x10); ++ break; ++ case 15: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x28, 0x03, 0x30, 0x10); ++ break; ++ case 16: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0x30, 0x10); ++ break; ++ case 17: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); ++ break; ++ case 18: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x70, 0x90); ++ break; ++ case 22: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x61, 0x1a, 0x1a, 0x21, 0x10); ++ break; ++ case 23: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x03, 0x31, 0x10); ++ break; ++ ++ case 71: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ ++ // following cases is for wifi rssi low, started from 81 ++ case 80: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3c, 0x3, 0x90, 0x50); ++ break; ++ case 81: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x3a+nWiFiDurationAdjust, 0x3, 0x90, 0x50); ++ break; ++ case 82: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x30+nWiFiDurationAdjust, 0x03, 0x90, 0x50); ++ break; ++ case 83: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x21, 0x03, 0x90, 0x50); ++ break; ++ case 84: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x15, 0x3, 0x90, 0x50); ++ break; ++ case 85: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x1d, 0x1d, 0x80, 0x50); ++ break; ++ case 86: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x53, 0x15, 0x15, 0x80, 0x50); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ case 0: //ANT2PTA, 0x778=0x1 ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 1: //ANT2BT, 0x778=3 ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); ++ delay_ms(5); ++ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, FALSE, FALSE); ++ break; ++ default: ++ halbtc8812a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8812a2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8812a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); ++ ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8812a2ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8812a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8812a2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8812a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++BOOLEAN ++halbtc8812a2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ BOOLEAN bBtHsOn=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8812a2ant_ActionBtInquiry(pBtCoexist); ++ return TRUE; ++ } ++ ++ if(pBtLinkInfo->bScoExist || pBtLinkInfo->bHidExist) ++ { ++ halbtc8812a2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 0, 0, 0); ++ } ++ else ++ { ++ halbtc8812a2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ } ++ ++ if(!bWifiConnected) ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); ++ ++ if( (BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) || ++ (BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if(BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else if(BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ if(bBtHsOn) ++ return FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ bCommon = FALSE; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 17); ++ ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ bCommon = TRUE; ++ } ++ } ++ } ++ ++ return bCommon; ++} ++ ++VOID ++halbtc8812a2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++//================== ++// pstdma for wifi rssi low ++//================== ++VOID ++halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow( ++ IN PBTC_COEXIST pBtCoexist//, ++ //IN u1Byte wifiStatus ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0, btInfoExt; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow()\n")); ++#if 0 ++ if( (BT_8812A_2ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || ++ (BT_8812A_2ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || ++ (BT_8812A_2ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) ++ { ++ if( pCoexDm->curPsTdma != 81 && ++ pCoexDm->curPsTdma != 82 && ++ pCoexDm->curPsTdma != 83 && ++ pCoexDm->curPsTdma != 84 ) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ return; ++ } ++#endif ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ ++ retryCount = pCoexSta->btRetryCnt; ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(!pCoexDm->bAutoTdmaAdjustLowRssi) ++ { ++ pCoexDm->bAutoTdmaAdjustLowRssi = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjustForWifiRssiLow()!!\n")); ++ ++ if(BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(btInfoExt)) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++ else ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++// retryCount = pCoexSta->btRetryCnt; ++// btInfoExt = pCoexSta->btInfoExt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 ) ++ retryCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ if(result == -1) ++ { ++/* ++ if( (BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); ++ pCoexDm->psTdmaDuAdjType = 84; ++ } ++*/ ++ if(pCoexDm->curPsTdma == 80) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ } ++ else if(pCoexDm->curPsTdma == 81) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ } ++ else if(pCoexDm->curPsTdma == 82) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++ else if(pCoexDm->curPsTdma == 83) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 84); ++ pCoexDm->psTdmaDuAdjType = 84; ++ } ++ } ++ else if(result == 1) ++ { ++/* ++ if( (BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 81) ||(pCoexDm->curPsTdma == 82)) ) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++*/ ++ if(pCoexDm->curPsTdma == 84) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 83); ++ pCoexDm->psTdmaDuAdjType = 83; ++ } ++ else if(pCoexDm->curPsTdma == 83) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 82); ++ pCoexDm->psTdmaDuAdjType = 82; ++ } ++ else if(pCoexDm->curPsTdma == 82) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); ++ pCoexDm->psTdmaDuAdjType = 81; ++ } ++ else if((pCoexDm->curPsTdma == 81)&&((pCoexSta->nScanAPNum <= 5))) ++ { ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 81); ++ pCoexDm->psTdmaDuAdjType = 81; ++ } ++ } ++ ++ if( pCoexDm->curPsTdma != 80 && ++ pCoexDm->curPsTdma != 81 && ++ pCoexDm->curPsTdma != 82 && ++ pCoexDm->curPsTdma != 83 && ++ pCoexDm->curPsTdma != 84 ) ++ { ++ // recover to previous adjust type ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_GetBtRssiThreshold( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte pThres0, ++ IN pu1Byte pThres1 ++ ) ++{ ++ u1Byte antType, btThreshold=0; ++ ++// pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_ANT_TYPE, &antType); ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ antType = pBoardInfo->antType; ++ ++ ++ switch(antType) ++ { ++ case BTC_ANT_TYPE_0: ++ *pThres0 = 100; ++ *pThres1 = 100; ++ break; ++ case BTC_ANT_TYPE_1: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_2: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_3: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_4: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++ ++VOID ++halbtc8812a2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ ++ // pstdma ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ else ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionScoHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ ++ // pstdma ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ else ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte anttype=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ anttype = pBoardInfo->antType; ++ ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++// btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ ++ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT ++ { ++ // power save state & pstdma & coex table ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation ++ { ++ // power save state & pstdma & coex table ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 9); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ } ++ } ++ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ } ++ else //ANTTYPE = 4 for test ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ ++ ++ // power save state ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8812a2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte anttype=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ anttype = pBoardInfo->antType; ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++// btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++// anttype = 4; ++ ++ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT ++ { ++ ++ if((pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ ++ // power save state & pstdma & coex table ++/* ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++*/ ++ } ++ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); //shielding room ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ ++ } ++ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ } ++ else //ANTTYPE = 4 for test ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // decrease BT power ++/* ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A) // BT HIGH RSSI & shielding room ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2); ++ else ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ else ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 85); ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//PAN(HS) only ++VOID ++halbtc8812a2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ ++ // pstdma ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8812a2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ else ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); ++ } ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++// btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ else ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 85); ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ else ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8812a2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++// btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ if((bApEnable == TRUE) || (BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)))) ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ else ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ halbtc8812a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 86); ++ } ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ else ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionHidA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0; ++ ++ halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++// btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ // power save state ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // pstdma ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ else ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ else if(BTC_RSSI_LOW(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState))) ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ else ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH, btRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw; ++ u1Byte btThresh0=0, btThresh1=0, anttype=0; ++ BOOLEAN bApEnable=FALSE; ++ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ anttype = pBoardInfo->antType; ++ ++ ++// halbtc8812a2ant_GetBtRssiThreshold(pBtCoexist, &btThresh0, &btThresh1); ++// btRssiState = halbtc8812a2ant_BtRssiState(3, btThresh0, btThresh1); ++ ++ wifiRssiState = halbtc8812a2ant_WifiRssiState(pBtCoexist, 0, 2, 34, 0); ++ btRssiState = halbtc8812a2ant_BtRssiState(3, 34, 42); ++ ++ if(anttype == 0)//ANTTYPE = 0 92E 2ant with SPDT ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ } ++ else if(anttype == 1) //92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ } ++ else if(anttype == 2)//ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, TRUE, 83); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ } ++ else if(anttype == 3) //ANTTYPE = 3, 92E 3ant with good ant. isolation ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ } ++ else //ANTTYPE = 4 for test ++ { ++ // power save state & pstdma & coex table ++ if(BTC_RSSI_HIGH(wifiRssiState) && (!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & shielding room ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else if (BTC_RSSI_HIGH(wifiRssiState)&&(!BTC_RSSI_LOW(btRssiState)) && (pCoexSta->nScanAPNum > NOISY_AP_NUM_THRESH_8812A)) ++ { //WIFI RSSI = high & BT RSSI = high & noisy enviroment ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //WIFI RSSI || BT RSSI == low ++ { ++ halbtc8812a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ halbtc8812a2ant_TdmaDurationAdjustForWifiRssiLow(pBtCoexist); ++ halbtc8812a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ } ++ ++ // decrease BT power ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++/* ++ // decrease BT power ++ if(BTC_RSSI_LOW(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if (pCoexSta->nScanAPNum < NOISY_AP_NUM_THRESH_8812A) // BT HIGH RSSI & shielding room ++ halbtc8812a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++*/ ++ // limited Rx ++ halbtc8812a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ // fw dac swing level ++ halbtc8812a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if(BTC_RSSI_HIGH(wifiRssiState)) ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8812a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8812a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8812a2ant_CoexUnder5G( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8812a2ant_CoexAllOff(pBtCoexist); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Under 5G, force set BT to ignore Wlan active!!\n")); ++ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); ++} ++//==================================================== ++VOID ++halbtc8812a2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ if(bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n")); ++ halbtc8812a2ant_CoexUnder5G(pBtCoexist); ++ return; ++ } ++ ++ ++ algorithm = halbtc8812a2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bC2hBtInquiryPage && (BT_8812A_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8812a2ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ ++ if(halbtc8812a2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->bAutoTdmaAdjustLowRssi = FALSE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8812A_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8812a2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_SCO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO+HID.\n")); ++ halbtc8812a2ant_ActionScoHid(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8812a2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8812a2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); ++ halbtc8812a2ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8812a2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8812a2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8812a2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8812a2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8812a2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN(HS).\n")); ++ halbtc8812a2ant_ActionHidA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8812a2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8812a2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++ ++} ++ ++VOID ++halbtc8812a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp ++ ) ++{ ++ u4Byte u4Tmp=0; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ if(bBackUp) ++ { ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++ ++ //ant sw control to BT ++ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, TRUE, FALSE); ++ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ // PTA parameter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffff); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, 0x55555555); ++ ++ // coex parameters ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); ++ ++ // enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // disable PTA to avoid BT insn't on ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x00); ++ ++ // bt clock related ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4); ++ u1Tmp |= BIT7; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4, u1Tmp); ++ ++ // bt clock related ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); ++ u1Tmp |= BIT1; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8812a2ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8812a2ant_ ++//============================================================ ++VOID ++EXhalbtc8812a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8812a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8812a2ant_InitHwConfig(pBtCoexist, TRUE); ++} ++ ++VOID ++EXhalbtc8812a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8812a2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8812a2ant_BTOffOnNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte BTstatus ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BToff/on notify\n")); ++ DBG_871X("%s, BTstatus:%d", __func__, BTstatus); ++ ++ if(BTC_BT_OFF == BTstatus) ++ { ++ //PTA off ++ pBtCoexist->btInfo.bBtDisabled = TRUE; ++ halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, FALSE); ++ ++ } ++ else ++ { ++ //PTA on ++ pBtCoexist->btInfo.bBtDisabled = FALSE; ++ halbtc8812a2ant_EnablePTA(pBtCoexist,FORCE_EXEC, TRUE); ++ } ++ ++} ++ ++ ++ ++VOID ++EXhalbtc8812a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u2Byte u2Tmp[4]; ++ u4Byte u4Tmp[4]; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Antenna type:", \ ++ pBoardInfo->antType); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8812a2Ant, GLCoexVer8812a2Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8812a2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ ++ pBtCoexist->btInfo.raMask); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d/%d)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust, pCoexDm->bAutoTdmaAdjustLowRssi); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ ++ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ ++ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", "0x778 (W_Act)/ 0x6cc (CoTab Sel)", \ ++ u1Tmp[0], u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x8db(ADC)/0xc5b[29:25](DAC)", \ ++ ((u1Tmp[0]&0x60)>>5), ((u1Tmp[1]&0x3e)>>1)); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb3); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xcb7); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb3/ 0xcb7", \ ++ u1Tmp[0], u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \ ++ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa0a); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(DIG)/0xa0a(CCK-TH)", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xf48/ 0xa5b (FA cnt-- OFDM : CCK)", \ ++ u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1] ); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8812A_2ANT == 1) ++ halbtc8812a2ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8812a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnder5G=FALSE; ++ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ halbtc8812a2ant_CoexAllOff(pBtCoexist); ++ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, FALSE, TRUE); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS notify, force set BT to ignore Wlan active!!\n")); ++ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ if(!bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS notify, force set BT NOT to ignore Wlan active!!\n")); ++ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8812a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8812a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); ++ } ++} ++ ++VOID ++EXhalbtc8812a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8812a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte dataLen=5; ++ u1Byte buf[6] = {0}; ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ buf[0] = dataLen; ++ buf[1] = 0x5; // OP_Code ++ buf[2] = 0x3; // OP_Code_Length ++ buf[3] = H2C_Parameter[0]; // OP_Code_Content ++ buf[4] = H2C_Parameter[1]; ++ buf[5] = H2C_Parameter[2]; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++} ++ ++VOID ++EXhalbtc8812a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++ ++} ++ ++VOID ++EXhalbtc8812a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiUnder5G=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8812A_2ANT_MAX) ++ rspSource = BT_INFO_SRC_8812A_2ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8812A_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if( (pCoexSta->btInfoExt & BIT1) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if( (pCoexSta->btInfoExt&BIT3) && !bWifiUnder5G) ++ { ++ // BT already ignored WlanAct ++ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) ++ { ++ if(!pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ ++ if(pCoexSta->bUnderIps) ++ { ++ // work around for 8812a combo hw bug => when IPS, wlanAct is always high. ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS, set BT to ignore Wlan active!!\n")); ++ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++ } ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8812A_2ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8812A_2ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ pCoexSta->bAclBusy = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8812A_2ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8812A_2ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8812A_2ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8812A_2ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ if(btInfo & BT_INFO_8812A_2ANT_B_ACL_BUSY) ++ pCoexSta->bAclBusy = TRUE; ++ else ++ pCoexSta->bAclBusy = FALSE; ++ ++ } ++ ++ halbtc8812a2ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ if(!(btInfo&BT_INFO_8812A_2ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8812A_2ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8812A_2ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8812A_2ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8812A_2ANT_B_ACL_BUSY) ++ { ++ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8812A_2ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8812A_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bBtBusy = TRUE; ++ if(!bWifiUnder5G) ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ pCoexDm->bLimitedDig = bLimitedDig; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ ++ halbtc8812a2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8812a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8812a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_CPL_AUX, FALSE, TRUE); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify, force set BT to ignore Wlan active!!\n")); ++ halbtc8812a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ ++ // 0x522=0xff, pause tx ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x522, 0xff); ++ // 0x40[7:6]=2'b01, modify BT mode. ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0xc0, 0x2); ++ //PTA off. ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x0); ++ ++} ++ ++VOID ++EXhalbtc8812a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8812a2Ant, GLCoexVer8812a2Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8812A_2ANT == 0) ++ halbtc8812a2ant_QueryBtInfo(pBtCoexist); ++ halbtc8812a2ant_MonitorBtCtr(pBtCoexist); ++// halbtc8812a2ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ if( halbtc8812a2ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust || ++ pCoexDm->bAutoTdmaAdjustLowRssi) ++ { ++ halbtc8812a2ant_RunCoexistMechanism(pBtCoexist); ++ } ++#endif ++} ++ ++VOID ++EXhalbtc8812a2ant_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ) ++{ ++ switch(opCode) ++ { ++ case BTC_DBG_SET_COEX_DEC_BT_PWR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power\n")); ++ { ++ u1Byte dataLen=4; ++ u1Byte buf[6] = {0}; ++ u1Byte decBtPwr=0, pwrLevel=0; ++ if(opLen == 2) ++ { ++ decBtPwr = pData[0]; ++ pwrLevel = pData[1]; ++ ++ buf[0] = dataLen; ++ buf[1] = 0x3; // OP_Code ++ buf[2] = 0x2; // OP_Code_Length ++ ++ buf[3] = decBtPwr; // OP_Code_Content ++ buf[4] = pwrLevel; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set Dec BT power=%d, pwrLevel=%d\n", decBtPwr, pwrLevel)); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_AFH_MAP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map\n")); ++ { ++ u1Byte dataLen=5; ++ u1Byte buf[6] = {0}; ++ if(opLen == 3) ++ { ++ buf[0] = dataLen; ++ buf[1] = 0x5; // OP_Code ++ buf[2] = 0x3; // OP_Code_Length ++ ++ buf[3] = pData[0]; // OP_Code_Content ++ buf[4] = pData[1]; ++ buf[5] = pData[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT AFH Map = %02x %02x %02x\n", ++ pData[0], pData[1], pData[2])); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active\n")); ++ { ++ u1Byte dataLen=3; ++ u1Byte buf[6] = {0}; ++ if(opLen == 1) ++ { ++ buf[0] = dataLen; ++ buf[1] = 0x1; // OP_Code ++ buf[2] = 0x1; // OP_Code_Length ++ ++ buf[3] = pData[0]; // OP_Code_Content ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set BT Ignore Wlan Active = 0x%x\n", ++ pData[0])); ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_BT_COEX, (PVOID)&buf[0]); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a2Ant.h new file mode 100644 -index 000000000..36815437f +index 0000000..ac86e98 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8812a2Ant.h @@ -0,0 +1,249 @@ -+//=========================================== -+// The following is for 8812A 2Ant BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8812A_2ANT 0 -+ -+#define BT_INFO_8812A_2ANT_B_FTP BIT7 -+#define BT_INFO_8812A_2ANT_B_A2DP BIT6 -+#define BT_INFO_8812A_2ANT_B_HID BIT5 -+#define BT_INFO_8812A_2ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8812A_2ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8812A_2ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8812A_2ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8812A_2ANT_B_CONNECTION BIT0 -+ -+#define BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT 2 -+#define NOISY_AP_NUM_THRESH_8812A 50 -+ -+ -+typedef enum _BT_INFO_SRC_8812A_2ANT{ -+ BT_INFO_SRC_8812A_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8812A_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8812A_2ANT_MAX -+}BT_INFO_SRC_8812A_2ANT,*PBT_INFO_SRC_8812A_2ANT; -+ -+typedef enum _BT_8812A_2ANT_BT_STATUS{ -+ BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8812A_2ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8812A_2ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8812A_2ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8812A_2ANT_BT_STATUS_MAX -+}BT_8812A_2ANT_BT_STATUS,*PBT_8812A_2ANT_BT_STATUS; -+ -+typedef enum _BT_8812A_2ANT_COEX_ALGO{ -+ BT_8812A_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8812A_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8812A_2ANT_COEX_ALGO_SCO_HID = 0x2, -+ BT_8812A_2ANT_COEX_ALGO_HID = 0x3, -+ BT_8812A_2ANT_COEX_ALGO_A2DP = 0x4, -+ BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS = 0x5, -+ BT_8812A_2ANT_COEX_ALGO_PANEDR = 0x6, -+ BT_8812A_2ANT_COEX_ALGO_PANHS = 0x7, -+ BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8, -+ BT_8812A_2ANT_COEX_ALGO_PANEDR_HID = 0x9, -+ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa, -+ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS = 0xb, -+ BT_8812A_2ANT_COEX_ALGO_HID_A2DP = 0xc, -+ BT_8812A_2ANT_COEX_ALGO_MAX = 0xd -+}BT_8812A_2ANT_COEX_ALGO,*PBT_8812A_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8812A_2ANT{ -+ // fw mechanism -+ u1Byte preBtDecPwrLvl; -+ u1Byte curBtDecPwrLvl; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bAutoTdmaAdjustLowRssi; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ BOOLEAN bPreEnablePTA; -+ BOOLEAN bCurEnablePTA; -+ -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt -+ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt -+ u2Byte backupRetryLimit; -+ u1Byte backupAmpduMaxTime; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ u1Byte curRaMaskType; -+ u1Byte preArfrType; -+ u1Byte curArfrType; -+ u1Byte preRetryLimitType; -+ u1Byte curRetryLimitType; -+ u1Byte preAmpduTimeType; -+ u1Byte curAmpduTimeType; -+} COEX_DM_8812A_2ANT, *PCOEX_DM_8812A_2ANT; -+ -+typedef struct _COEX_STA_8812A_2ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ BOOLEAN bAclBusy; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ u1Byte preBtRssiState; -+ u1Byte preBtDisabled; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8812A_2ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8812A_2ANT_MAX]; -+ u4Byte prebtInfoC2hCnt_BT_RSP; -+ u4Byte prebtInfoC2hCnt_BT_SEND; -+ u4Byte btInfoQueryCnt; -+ BOOLEAN bC2hBtInquiryPage; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ u1Byte nScanAPNum; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ u1Byte nCoexTableType; -+ BOOLEAN bForceLpsOn; -+ -+ u1Byte disVerInfoCnt; -+ -+}COEX_STA_8812A_2ANT, *PCOEX_STA_8812A_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8812a2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8812a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8812a2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8812a2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8812a2ant_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ); -+VOID -+EXhalbtc8812a2ant_BTOffOnNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte BTstatus -+ ); -+ ++//=========================================== ++// The following is for 8812A 2Ant BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8812A_2ANT 0 ++ ++#define BT_INFO_8812A_2ANT_B_FTP BIT7 ++#define BT_INFO_8812A_2ANT_B_A2DP BIT6 ++#define BT_INFO_8812A_2ANT_B_HID BIT5 ++#define BT_INFO_8812A_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8812A_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8812A_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8812A_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8812A_2ANT_B_CONNECTION BIT0 ++ ++#define BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT 2 ++#define NOISY_AP_NUM_THRESH_8812A 50 ++ ++ ++typedef enum _BT_INFO_SRC_8812A_2ANT{ ++ BT_INFO_SRC_8812A_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8812A_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8812A_2ANT_MAX ++}BT_INFO_SRC_8812A_2ANT,*PBT_INFO_SRC_8812A_2ANT; ++ ++typedef enum _BT_8812A_2ANT_BT_STATUS{ ++ BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8812A_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8812A_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8812A_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8812A_2ANT_BT_STATUS_MAX ++}BT_8812A_2ANT_BT_STATUS,*PBT_8812A_2ANT_BT_STATUS; ++ ++typedef enum _BT_8812A_2ANT_COEX_ALGO{ ++ BT_8812A_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8812A_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8812A_2ANT_COEX_ALGO_SCO_HID = 0x2, ++ BT_8812A_2ANT_COEX_ALGO_HID = 0x3, ++ BT_8812A_2ANT_COEX_ALGO_A2DP = 0x4, ++ BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS = 0x5, ++ BT_8812A_2ANT_COEX_ALGO_PANEDR = 0x6, ++ BT_8812A_2ANT_COEX_ALGO_PANHS = 0x7, ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8, ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_HID = 0x9, ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa, ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS = 0xb, ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP = 0xc, ++ BT_8812A_2ANT_COEX_ALGO_MAX = 0xd ++}BT_8812A_2ANT_COEX_ALGO,*PBT_8812A_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8812A_2ANT{ ++ // fw mechanism ++ u1Byte preBtDecPwrLvl; ++ u1Byte curBtDecPwrLvl; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bAutoTdmaAdjustLowRssi; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ BOOLEAN bPreEnablePTA; ++ BOOLEAN bCurEnablePTA; ++ ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt ++ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt ++ u2Byte backupRetryLimit; ++ u1Byte backupAmpduMaxTime; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ u1Byte curRaMaskType; ++ u1Byte preArfrType; ++ u1Byte curArfrType; ++ u1Byte preRetryLimitType; ++ u1Byte curRetryLimitType; ++ u1Byte preAmpduTimeType; ++ u1Byte curAmpduTimeType; ++} COEX_DM_8812A_2ANT, *PCOEX_DM_8812A_2ANT; ++ ++typedef struct _COEX_STA_8812A_2ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ BOOLEAN bAclBusy; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ u1Byte preBtRssiState; ++ u1Byte preBtDisabled; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8812A_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8812A_2ANT_MAX]; ++ u4Byte prebtInfoC2hCnt_BT_RSP; ++ u4Byte prebtInfoC2hCnt_BT_SEND; ++ u4Byte btInfoQueryCnt; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ u1Byte nScanAPNum; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ u1Byte nCoexTableType; ++ BOOLEAN bForceLpsOn; ++ ++ u1Byte disVerInfoCnt; ++ ++}COEX_STA_8812A_2ANT, *PCOEX_STA_8812A_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8812a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8812a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8812a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8812a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8812a2ant_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ); ++VOID ++EXhalbtc8812a2ant_BTOffOnNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte BTstatus ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a1Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a1Ant.c new file mode 100644 -index 000000000..05af4a59c +index 0000000..c840c77 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a1Ant.c @@ -0,0 +1,3433 @@ -+//============================================================ -+// Description: -+// -+// This file is for 8821A_1ANT Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8821a1Ant.tmh" -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8821A_1ANT GLCoexDm8821a1Ant; -+static PCOEX_DM_8821A_1ANT pCoexDm=&GLCoexDm8821a1Ant; -+static COEX_STA_8821A_1ANT GLCoexSta8821a1Ant; -+static PCOEX_STA_8821A_1ANT pCoexSta=&GLCoexSta8821a1Ant; -+ -+const char *const GLBtInfoSrc8821a1Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8821a1Ant=20140306; -+u4Byte GLCoexVer8821a1Ant=0x4b; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8821a1ant_ -+//============================================================ -+u1Byte -+halbtc8821a1ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8821a1ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8821a1ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+VOID -+halbtc8821a1ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+VOID -+halbtc8821a1ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+VOID -+halbtc8821a1ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8821a1ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType -+ ) -+{ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ halbtc8821a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); -+ break; -+ case 1: // disable cck 1/2 -+ halbtc8821a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ halbtc8821a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); -+ break; -+ default: -+ break; -+ } -+ -+ halbtc8821a1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8821a1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8821a1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+} -+ -+VOID -+halbtc8821a1ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+VOID -+halbtc8821a1ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp, u1Tmp1; -+ s4Byte wifiRssi; -+#if 0 -+ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS -+ if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) -+ { -+ pCoexSta->highPriorityTx = 65535; -+ pCoexSta->highPriorityRx = 65535; -+ pCoexSta->lowPriorityTx = 65535; -+ pCoexSta->lowPriorityRx = 65535; -+ return; -+ } -+#endif -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8821a1ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+BOOLEAN -+halbtc8821a1ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8821a1ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+ -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8821a1ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8821A_1ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8821a1ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a1ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8821a1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8821a1ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!") )); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a1ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8821a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8821a1ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8821a1ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8821a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8821a1ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaa5a5a, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); -+ break; -+ case 7: -+ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8821a1ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a1ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8821a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8821a1ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ u1Byte realByte1=byte1, realByte5=byte5; -+ BOOLEAN bApEnable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ -+ if(bApEnable) -+ { -+ if(byte1&BIT4 && !(byte1&BIT5)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); -+ realByte1 &= ~BIT4; -+ realByte1 |= BIT5; -+ -+ realByte5 |= BIT5; -+ realByte5 &= ~BIT6; -+ } -+ } -+ -+ H2C_Parameter[0] = realByte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = realByte5; -+ -+ pCoexDm->psTdmaPara[0] = realByte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = realByte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a1ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8821a1ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8821a1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8821a1ant_SwMechanism( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRA -+ ) -+{ -+ halbtc8821a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8821a1ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte fwVer=0, u4Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ if(bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &=~BIT23; -+ u4Tmp |= BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ -+ //0x765 = 0x18 -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x3); -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ //tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix -+ H2C_Parameter[0] = 1; -+ H2C_Parameter[1] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ -+ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x1); //Main Ant to BT for IPS case 0x4c[23]=1 -+ } -+ else -+ { -+ //tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix -+ H2C_Parameter[0] = 0; -+ H2C_Parameter[1] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ -+ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //Aux Ant to BT for IPS case 0x4c[23]=1 -+ } -+ } -+ else if(bWifiOff) -+ { -+ // 0x4c[24:23]=00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac=0xf002 -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &= ~BIT23; -+ u4Tmp &= ~BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ -+ //0x765 = 0x18 -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x3); -+ } -+ else -+ { -+ //0x765 = 0x0 -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x0); -+ } -+ -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_PATH_WIFI: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); -+ break; -+ case BTC_ANT_PATH_BT: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); -+ break; -+ default: -+ case BTC_ANT_PATH_PTA: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x66); -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); -+ else -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); -+ break; -+ } -+} -+ -+VOID -+halbtc8821a1ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ BOOLEAN bTurnOnByCnt=FALSE; -+ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; -+ //u4Byte fwVer=0; -+ -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if (pCoexDm->bCurPsTdmaOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ default: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, 0x50); -+ break; -+ case 1: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x3a, 0x03, 0x10, 0x50); -+ rssiAdjustVal = 11; -+ break; -+ case 2: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x2b, 0x03, 0x10, 0x50); -+ rssiAdjustVal = 14; -+ break; -+ case 3: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, 0x52); -+ break; -+ case 4: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); -+ rssiAdjustVal = 17; -+ break; -+ case 5: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x10); -+ break; -+ case 6: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x13); -+ break; -+ case 7: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); -+ break; -+ case 8: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ break; -+ case 9: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x50); -+ rssiAdjustVal = 18; -+ break; -+ case 10: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); -+ break; -+ case 11: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x15, 0x03, 0x10, 0x50); -+ rssiAdjustVal = 20; -+ break; -+ case 12: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); -+ break; -+ case 13: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, 0x50); -+ break; -+ case 14: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x52); -+ break; -+ case 15: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); -+ break; -+ case 16: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); -+ rssiAdjustVal = 18; -+ break; -+ case 18: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); -+ rssiAdjustVal = 14; -+ break; -+ case 20: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x03, 0x11, 0x10); -+ break; -+ case 21: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); -+ break; -+ case 22: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x10); -+ break; -+ case 23: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); -+ rssiAdjustVal = 22; -+ break; -+ case 24: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); -+ rssiAdjustVal = 22; -+ break; -+ case 25: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ rssiAdjustVal = 22; -+ break; -+ case 26: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); -+ rssiAdjustVal = 22; -+ break; -+ case 27: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); -+ rssiAdjustVal = 22; -+ break; -+ case 28: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); -+ break; -+ case 29: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); -+ break; -+ case 30: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); -+ break; -+ case 31: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); -+ break; -+ case 32: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); -+ break; -+ case 33: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); -+ break; -+ case 34: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 35: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); -+ break; -+ case 36: -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); -+ break; -+ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving -+ /* here softap mode screen off will cost 70-80mA for phone */ -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); -+ break; -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(type) -+ { -+ case 8: //PTA Control -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FALSE, FALSE); -+ break; -+ case 0: -+ default: //Software control, Antenna at BT side -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); -+ break; -+ case 9: //Software control, Antenna at WiFi side -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); -+ break; -+ case 10: // under 5G -+ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); -+ break; -+ } -+ } -+ rssiAdjustVal =0; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8821a1ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // sw all off -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ // hw all off -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+BOOLEAN -+halbtc8821a1ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected && -+ BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if (bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ } -+ -+ bCommon = FALSE; -+ } -+ -+ return bCommon; -+} -+ -+ -+VOID -+halbtc8821a1ant_TdmaDurationAdjustForAcl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0, btInfoExt; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); -+ -+ if( (BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || -+ (BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || -+ (BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) -+ { -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 3 && -+ pCoexDm->curPsTdma != 9 ) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ return; -+ } -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ btInfoExt = pCoexSta->btInfoExt; -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ if(result == -1) -+ { -+ if( (BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ else if(result == 1) -+ { -+ if( (BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && -+ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ } -+ else //no change -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", -+ pCoexDm->curPsTdma)); -+ } -+ -+ if( pCoexDm->curPsTdma != 1 && -+ pCoexDm->curPsTdma != 2 && -+ pCoexDm->curPsTdma != 9 && -+ pCoexDm->curPsTdma != 11 ) -+ { -+ // recover to previous adjust type -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ } -+} -+ -+VOID -+halbtc8821a1ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8821a1ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8821a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8821a1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8821a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8821a1ant_CoexUnder5G( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); -+ -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 10); -+ -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ -+ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 5); -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiOnly( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); -+} -+ -+VOID -+halbtc8821a1ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ halbtc8821a1ant_ActionWifiOnly(pBtCoexist); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ } -+ } -+} -+ -+//============================================= -+// -+// Software Coex Mechanism start -+// -+//============================================= -+ -+// SCO only or SCO+PAN(HS) -+VOID -+halbtc8821a1ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+VOID -+halbtc8821a1ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8821a1ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8821a1ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8821a1ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(HS) only -+VOID -+halbtc8821a1ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8821a1ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+} -+ -+VOID -+halbtc8821a1ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8821a1ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+VOID -+halbtc8821a1ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); -+} -+ -+//============================================= -+// -+// Non-Software Coex Mechanism start -+// -+//============================================= -+VOID -+halbtc8821a1ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8821a1ant_ActionHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+} -+ -+VOID -+halbtc8821a1ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ if((!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask)) -+ { -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) -+ { -+ // SCO/HID/A2DP busy -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if ((pBtLinkInfo->bPanExist) || (bWifiBusy)) -+ { -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+} -+ -+VOID -+halbtc8821a1ant_ActionBtScoHidOnlyBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ // tdma and coex table -+ -+ if(pBtLinkInfo->bScoExist) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else //HID -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); -+ } -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiConnectedBtAclBusy( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte wifiStatus -+ ) -+{ -+ u1Byte btRssiState; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ btRssiState = halbtc8821a1ant_BtRssiState(2, 28, 0); -+ -+ if(pBtLinkInfo->bHidOnly) //HID -+ { -+ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ return; -+ } -+ else if(pBtLinkInfo->bA2dpOnly) //A2DP -+ { -+ if(BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) -+ { -+ //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ } -+ else //for low BT RSSI -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ } -+ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP -+ { -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else //for low BT RSSI -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); -+ } -+ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || -+ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiNotConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // power save state -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiNotConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ -+ //Bryant Add -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiNotConnectedAssoAuth( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) ) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if( (pBtLinkInfo->bA2dpExist) || (pBtLinkInfo->bPanExist) ) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiConnectedScan( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ if (pBtLinkInfo->bA2dpExist) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ } -+ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN); -+ } -+ else -+ { -+ //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); -+ -+ //Bryant Add -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiConnectedSpecialPacket( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); -+ } -+ else -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+} -+ -+VOID -+halbtc8821a1ant_ActionWifiConnected( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiBusy=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; -+ u4Byte wifiBw; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ if(bUnder4way) -+ { -+ halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ if(bScan || bLink || bRoam) -+ { -+ if(bScan) -+ halbtc8821a1ant_ActionWifiConnectedScan(pBtCoexist); -+ else -+ halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ // power save state -+ if(!bApEnable && BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) -+ { -+ if(!bWifiBusy && pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ else -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ // tdma and coex table -+ if(!bWifiBusy) -+ { -+ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8821a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE); -+ } -+ else -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ } -+ else -+ { -+ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) -+ { -+ halbtc8821a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY); -+ } -+ else -+ { -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ } -+} -+ -+VOID -+halbtc8821a1ant_RunSwCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte algorithm=0; -+ -+ algorithm = halbtc8821a1ant_ActionAlgorithm(pBtCoexist); -+ pCoexDm->curAlgorithm = algorithm; -+ -+ if(halbtc8821a1ant_IsCommonAction(pBtCoexist)) -+ { -+ -+ } -+ else -+ { -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8821A_1ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); -+ halbtc8821a1ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); -+ halbtc8821a1ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); -+ halbtc8821a1ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); -+ halbtc8821a1ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); -+ halbtc8821a1ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); -+ halbtc8821a1ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); -+ halbtc8821a1ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); -+ halbtc8821a1ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); -+ halbtc8821a1ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8821A_1ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); -+ halbtc8821a1ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); -+ //halbtc8821a1ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8821a1ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bIncreaseScanDevNum=FALSE; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bWifiUnder5G=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ if(pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ if(bWifiUnder5G) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for 5G <===\n")); -+ halbtc8821a1ant_CoexUnder5G(pBtCoexist); -+ return; -+ } -+ -+ if( (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bIncreaseScanDevNum = TRUE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ if(!pBtLinkInfo->bScoExist && !pBtLinkInfo->bHidExist) -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ } -+ else -+ { -+ if(bWifiConnected) -+ { -+ wifiRssiState = halbtc8821a1ant_WifiRssiState(pBtCoexist, 1, 2, 30, 0); -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 1, 1); -+ } -+ else -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 1, 1); -+ } -+ } -+ else -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ } -+ -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ { -+ bBtCtrlAggBufSize = TRUE; -+ aggBufSize = 0x3; -+ } -+ else if(pBtLinkInfo->bHidExist) -+ { -+ bBtCtrlAggBufSize = TRUE; -+ aggBufSize = 0x5; -+ } -+ else if(pBtLinkInfo->bA2dpExist || pBtLinkInfo->bPanExist) -+ { -+ bBtCtrlAggBufSize = TRUE; -+ aggBufSize = 0x8; -+ } -+ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ -+ halbtc8821a1ant_RunSwCoexistMechanism(pBtCoexist); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8821a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ -+ if(!bWifiConnected) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ if (bScan) -+ halbtc8821a1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ else -+ halbtc8821a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else -+ halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else // wifi LPS/Busy -+ { -+ halbtc8821a1ant_ActionWifiConnected(pBtCoexist); -+ } -+} -+ -+VOID -+halbtc8821a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ // sw all off -+ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); -+ -+ //halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+} -+ -+VOID -+halbtc8821a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ BOOLEAN bWifiUnder5G=FALSE; -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); -+ -+ if(bWifiOnly) -+ return; -+ -+ if(bBackUp) -+ { -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ } -+ -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ -+ //Antenna config -+ if(bWifiUnder5G) -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE); -+ else -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, TRUE, FALSE); -+ -+ // PTA parameter -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ // Enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8821a1ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8821a1ant_ -+//============================================================ -+VOID -+EXhalbtc8821a1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8821a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8821a1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); -+} -+ -+VOID -+EXhalbtc8821a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ pBtCoexist->bStopCoexDm = FALSE; -+ -+ halbtc8821a1ant_InitCoexDm(pBtCoexist); -+ -+ halbtc8821a1ant_QueryBtInfo(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8821a1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u2Byte u2Tmp[4]; -+ u4Byte u4Tmp[4]; -+ u4Byte faOfdm, faCck; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ if(pBtCoexist->bStopCoexDm) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Ant Mech/ Ant Pos:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8821a1Ant, GLCoexVer8821a1Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821a1Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ if(!pBtCoexist->bManualControl) -+ { -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "SM[LowPenaltyRA]", \ -+ pCoexDm->bCurLowPenaltyRa); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ -+ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), -+ pBtCoexist->btInfo.aggBufSize); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ -+ pBtCoexist->btInfo.raMask); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ -+ pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ -+ pCoexDm->errorCondition); -+ CL_PRINTF(cliBuf); -+ } -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ -+ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ -+ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc58); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/ 0xc58[29:25]", \ -+ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8db[6:5]", \ -+ ((u1Tmp[0]&0x60)>>5)); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x975); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xcb4[29:28]/0xcb4[7:0]/0x974[9:8]", \ -+ (u4Tmp[0]&0x30000000)>>28, u4Tmp[0]&0xff, u1Tmp[0]& 0x3); -+ CL_PRINTF(cliBuf); -+ -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/0x4c[24:23]/0x64[0]", \ -+ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[1]&0x1); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ -+ u4Tmp[0]&0xff); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5d); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "OFDM-FA/ CCK-FA", \ -+ u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1] ); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8821A_1ANT == 1) -+ halbtc8821a1ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8821a1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u4Byte u4Tmp=0; -+ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ -+ halbtc8821a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8821a1ant_InitCoexDm(pBtCoexist); -+ halbtc8821a1ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8821a1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) -+ return; -+ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8821a1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm ) -+ return; -+ -+ if(BTC_SCAN_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ -+ halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ } -+ -+ if(pBtCoexist->btInfo.bBtDisabled) -+ return; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ halbtc8821a1ant_QueryBtInfo(pBtCoexist); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8821a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_SCAN_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8821a1ant_ActionWifiNotConnectedScan(pBtCoexist); -+ } -+ else // wifi is connected -+ { -+ halbtc8821a1ant_ActionWifiConnectedScan(pBtCoexist); -+ } -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8821a1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8821a1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ pCoexDm->nArpCnt = 0; -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ pCoexDm->nArpCnt = 0; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8821a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ halbtc8821a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(!bWifiConnected) // non-connected scan -+ { -+ halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); -+ } -+ else -+ { -+ halbtc8821a1ant_ActionWifiConnected(pBtCoexist); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8821a1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ pCoexDm->nArpCnt = 0; -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ //H2C_Parameter[0] = 0x1; -+ H2C_Parameter[0] = 0x0; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+} -+ -+VOID -+EXhalbtc8821a1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bBtHsOn=FALSE; -+ u4Byte wifiLinkStatus=0; -+ u4Byte numOfWifiLink=0; -+ BOOLEAN bBtCtrlAggBufSize=FALSE; -+ u1Byte aggBufSize=5; -+ -+ if(pBtCoexist->bManualControl || -+ pBtCoexist->bStopCoexDm || -+ pBtCoexist->btInfo.bBtDisabled ) -+ return; -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ BTC_PACKET_ARP == type ) -+ { -+ pCoexSta->bWiFiIsHighPriTask = TRUE; -+ -+ if(BTC_PACKET_ARP == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); -+ } -+ } -+ else -+ { -+ pCoexSta->bWiFiIsHighPriTask = FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); -+ } -+ -+ pCoexSta->specialPktPeriodCnt = 0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ if(numOfWifiLink >= 2) -+ { -+ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); -+ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); -+ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ if(pCoexSta->bC2hBtInquiryPage) -+ { -+ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else if(bBtHsOn) -+ { -+ halbtc8821a1ant_ActionHs(pBtCoexist); -+ return; -+ } -+ -+ if( BTC_PACKET_DHCP == type || -+ BTC_PACKET_EAPOL == type || -+ BTC_PACKET_ARP == type ) -+ { -+ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet(%d) notify\n", type)); -+ if(BTC_PACKET_ARP == type) -+ { -+ pCoexDm->nArpCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); -+ if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) -+ return; -+ } -+ -+ halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8821a1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bBtBusy=FALSE; -+ BOOLEAN bWifiUnder5G=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8821A_1ANT_MAX) -+ rspSource = BT_INFO_SRC_8821A_1ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(BT_INFO_SRC_8821A_1ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) -+ pCoexSta->bC2hBtPage = TRUE; -+ else -+ pCoexSta->bC2hBtPage = FALSE; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ if(!pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); -+ } -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if(pCoexSta->btInfoExt & BIT1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(bWifiConnected) -+ { -+ EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ if( (pCoexSta->btInfoExt & BIT3) && !bWifiUnder5G) -+ { -+ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ } -+#if(BT_AUTO_REPORT_ONLY_8821A_1ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8821a1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8821A_1ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8821A_1ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8821A_1ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8821A_1ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8821A_1ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8821A_1ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ } -+ -+ halbtc8821a1ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) -+ -+ if(!(btInfo&BT_INFO_8821A_1ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8821A_1ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8821A_1ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8821A_1ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8821A_1ANT_B_ACL_BUSY) -+ { -+ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ bBtBusy = TRUE; -+ else -+ bBtBusy = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ halbtc8821a1ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8821a1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); -+ -+ halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+} -+ -+VOID -+EXhalbtc8821a1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ -+ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); -+ //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); -+ -+ pBtCoexist->bStopCoexDm = TRUE; -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ pBtCoexist->bStopCoexDm = FALSE; -+ halbtc8821a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); -+ halbtc8821a1ant_InitCoexDm(pBtCoexist); -+ halbtc8821a1ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8821a1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8821a1Ant, GLCoexVer8821a1Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8821A_1ANT == 0) -+ halbtc8821a1ant_QueryBtInfo(pBtCoexist); -+ halbtc8821a1ant_MonitorBtCtr(pBtCoexist); -+ halbtc8821a1ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ if( halbtc8821a1ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust ) -+ { -+ //if(pCoexSta->specialPktPeriodCnt > 2) -+ //{ -+ halbtc8821a1ant_RunCoexistMechanism(pBtCoexist); -+ //} -+ } -+ -+ pCoexSta->specialPktPeriodCnt++; -+#endif -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for 8821A_1ANT Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8821a1Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8821A_1ANT GLCoexDm8821a1Ant; ++static PCOEX_DM_8821A_1ANT pCoexDm=&GLCoexDm8821a1Ant; ++static COEX_STA_8821A_1ANT GLCoexSta8821a1Ant; ++static PCOEX_STA_8821A_1ANT pCoexSta=&GLCoexSta8821a1Ant; ++ ++const char *const GLBtInfoSrc8821a1Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8821a1Ant=20140306; ++u4Byte GLCoexVer8821a1Ant=0x4b; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8821a1ant_ ++//============================================================ ++u1Byte ++halbtc8821a1ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8821a1ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8821a1ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++VOID ++halbtc8821a1ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++VOID ++halbtc8821a1ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++VOID ++halbtc8821a1ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8821a1ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType ++ ) ++{ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ halbtc8821a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); ++ break; ++ case 1: // disable cck 1/2 ++ halbtc8821a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ halbtc8821a1ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8821a1ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8821a1ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8821a1ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++} ++ ++VOID ++halbtc8821a1ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++VOID ++halbtc8821a1ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp, u4Tmp1; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp, u1Tmp1; ++ s4Byte wifiRssi; ++#if 0 ++ //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS ++ if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) ++ { ++ pCoexSta->highPriorityTx = 65535; ++ pCoexSta->highPriorityRx = 65535; ++ pCoexSta->lowPriorityTx = 65535; ++ pCoexSta->lowPriorityRx = 65535; ++ return; ++ } ++#endif ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8821a1ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++BOOLEAN ++halbtc8821a1ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8821a1ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++ ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8821a1ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8821A_1ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO only\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID only\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP only\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(HS) only\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = PAN(EDR) only\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(HS)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + PAN(EDR)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(HS)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + PAN(EDR)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = A2DP + PAN(EDR)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8821a1ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a1ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8821a1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8821a1ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!") )); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a1ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8821a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8821a1ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8821a1ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8821a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8821a1ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8821a1ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a1ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8821a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8821a1ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ if(bApEnable) ++ { ++ if(byte1&BIT4 && !(byte1&BIT5)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a1ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8821a1ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8821a1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8821a1ant_SwMechanism( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRA ++ ) ++{ ++ halbtc8821a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8821a1ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte fwVer=0, u4Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ if(bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &=~BIT23; ++ u4Tmp |= BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ ++ //0x765 = 0x18 ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x3); ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ //tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix ++ H2C_Parameter[0] = 1; ++ H2C_Parameter[1] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ ++ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x1); //Main Ant to BT for IPS case 0x4c[23]=1 ++ } ++ else ++ { ++ //tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix ++ H2C_Parameter[0] = 0; ++ H2C_Parameter[1] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ ++ //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //Aux Ant to BT for IPS case 0x4c[23]=1 ++ } ++ } ++ else if(bWifiOff) ++ { ++ // 0x4c[24:23]=00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac=0xf002 ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &= ~BIT23; ++ u4Tmp &= ~BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ ++ //0x765 = 0x18 ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x3); ++ } ++ else ++ { ++ //0x765 = 0x0 ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x0); ++ } ++ ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_PATH_WIFI: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); ++ break; ++ case BTC_ANT_PATH_BT: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x66); ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); ++ break; ++ } ++} ++ ++VOID ++halbtc8821a1ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; ++ //u4Byte fwVer=0; ++ ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if (pCoexDm->bCurPsTdmaOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(off, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ default: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, 0x50); ++ break; ++ case 1: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x3a, 0x03, 0x10, 0x50); ++ rssiAdjustVal = 11; ++ break; ++ case 2: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x2b, 0x03, 0x10, 0x50); ++ rssiAdjustVal = 14; ++ break; ++ case 3: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, 0x52); ++ break; ++ case 4: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); ++ rssiAdjustVal = 17; ++ break; ++ case 5: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x10); ++ break; ++ case 6: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x13); ++ break; ++ case 7: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x50); ++ rssiAdjustVal = 18; ++ break; ++ case 10: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x15, 0x03, 0x10, 0x50); ++ rssiAdjustVal = 20; ++ break; ++ case 12: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, 0x50); ++ break; ++ case 14: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x52); ++ break; ++ case 15: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); ++ rssiAdjustVal = 18; ++ break; ++ case 18: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); ++ rssiAdjustVal = 14; ++ break; ++ case 20: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x03, 0x11, 0x10); ++ break; ++ case 21: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x10); ++ break; ++ case 23: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); ++ rssiAdjustVal = 22; ++ break; ++ case 24: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); ++ rssiAdjustVal = 22; ++ break; ++ case 25: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ rssiAdjustVal = 22; ++ break; ++ case 26: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); ++ rssiAdjustVal = 22; ++ break; ++ case 27: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); ++ rssiAdjustVal = 22; ++ break; ++ case 28: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); ++ break; ++ case 33: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); ++ break; ++ case 34: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x63, 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ case 8: //PTA Control ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FALSE, FALSE); ++ break; ++ case 0: ++ default: //Software control, Antenna at BT side ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); ++ break; ++ case 9: //Software control, Antenna at WiFi side ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, FALSE, FALSE); ++ break; ++ case 10: // under 5G ++ halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE); ++ break; ++ } ++ } ++ rssiAdjustVal =0; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8821a1ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // sw all off ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ // hw all off ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++BOOLEAN ++halbtc8821a1ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected && ++ BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if (bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ } ++ ++ bCommon = FALSE; ++ } ++ ++ return bCommon; ++} ++ ++ ++VOID ++halbtc8821a1ant_TdmaDurationAdjustForAcl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0, btInfoExt; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); ++ ++ if( (BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || ++ (BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || ++ (BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) ++ { ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 3 && ++ pCoexDm->curPsTdma != 9 ) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ return; ++ } ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ btInfoExt = pCoexSta->btInfoExt; ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ if(result == -1) ++ { ++ if( (BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ else if(result == 1) ++ { ++ if( (BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(btInfoExt)) && ++ ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ } ++ else //no change ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ********** TDMA(on, %d) **********\n", ++ pCoexDm->curPsTdma)); ++ } ++ ++ if( pCoexDm->curPsTdma != 1 && ++ pCoexDm->curPsTdma != 2 && ++ pCoexDm->curPsTdma != 9 && ++ pCoexDm->curPsTdma != 11 ) ++ { ++ // recover to previous adjust type ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ } ++} ++ ++VOID ++halbtc8821a1ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8821a1ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8821a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8821a1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8821a1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8821a1ant_CoexUnder5G( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); ++ ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 10); ++ ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 5); ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiOnly( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++} ++ ++VOID ++halbtc8821a1ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ halbtc8821a1ant_ActionWifiOnly(pBtCoexist); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++//============================================= ++// ++// Software Coex Mechanism start ++// ++//============================================= ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8821a1ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++VOID ++halbtc8821a1ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8821a1ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8821a1ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8821a1ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(HS) only ++VOID ++halbtc8821a1ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8821a1ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++} ++ ++VOID ++halbtc8821a1ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8821a1ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++VOID ++halbtc8821a1ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_SwMechanism(pBtCoexist, TRUE); ++} ++ ++//============================================= ++// ++// Non-Software Coex Mechanism start ++// ++//============================================= ++VOID ++halbtc8821a1ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8821a1ant_ActionHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++} ++ ++VOID ++halbtc8821a1ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ if((!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask)) ++ { ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) ++ { ++ // SCO/HID/A2DP busy ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if ((pBtLinkInfo->bPanExist) || (bWifiBusy)) ++ { ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++} ++ ++VOID ++halbtc8821a1ant_ActionBtScoHidOnlyBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ // tdma and coex table ++ ++ if(pBtLinkInfo->bScoExist) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else //HID ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiConnectedBtAclBusy( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte wifiStatus ++ ) ++{ ++ u1Byte btRssiState; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ btRssiState = halbtc8821a1ant_BtRssiState(2, 28, 0); ++ ++ if(pBtLinkInfo->bHidOnly) //HID ++ { ++ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ return; ++ } ++ else if(pBtLinkInfo->bA2dpOnly) //A2DP ++ { ++ if(BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) ++ { ++ //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ } ++ else //for low BT RSSI ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ } ++ else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP ++ { ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else //for low BT RSSI ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); ++ } ++ else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || ++ (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiNotConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // power save state ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiNotConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ ++ //Bryant Add ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiNotConnectedAssoAuth( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) ) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if( (pBtLinkInfo->bA2dpExist) || (pBtLinkInfo->bPanExist) ) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiConnectedScan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ if (pBtLinkInfo->bA2dpExist) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ } ++ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } ++ else ++ { ++ //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); ++ ++ //Bryant Add ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiConnectedSpecialPacket( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); ++ } ++ else ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++VOID ++halbtc8821a1ant_ActionWifiConnected( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiBusy=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; ++ u4Byte wifiBw; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect()===>\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ if(bUnder4way) ++ { ++ halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ if(bScan || bLink || bRoam) ++ { ++ if(bScan) ++ halbtc8821a1ant_ActionWifiConnectedScan(pBtCoexist); ++ else ++ halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ // power save state ++ if(!bApEnable && BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) ++ { ++ if(!bWifiBusy && pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ else ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ // tdma and coex table ++ if(!bWifiBusy) ++ { ++ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8821a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } ++ else ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ } ++ else ++ { ++ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ++ { ++ halbtc8821a1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } ++ else ++ { ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ } ++} ++ ++VOID ++halbtc8821a1ant_RunSwCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm=0; ++ ++ algorithm = halbtc8821a1ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ ++ if(halbtc8821a1ant_IsCommonAction(pBtCoexist)) ++ { ++ ++ } ++ else ++ { ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8821A_1ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = SCO.\n")); ++ halbtc8821a1ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID.\n")); ++ halbtc8821a1ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP.\n")); ++ halbtc8821a1ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); ++ halbtc8821a1ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR).\n")); ++ halbtc8821a1ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HS mode.\n")); ++ halbtc8821a1ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); ++ halbtc8821a1ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); ++ halbtc8821a1ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); ++ halbtc8821a1ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = HID+A2DP.\n")); ++ halbtc8821a1ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action algorithm = coexist All Off!!\n")); ++ //halbtc8821a1ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8821a1ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bIncreaseScanDevNum=FALSE; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bWifiUnder5G=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ if(bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for 5G <===\n")); ++ halbtc8821a1ant_CoexUnder5G(pBtCoexist); ++ return; ++ } ++ ++ if( (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bIncreaseScanDevNum = TRUE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ if(!pBtLinkInfo->bScoExist && !pBtLinkInfo->bHidExist) ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ } ++ else ++ { ++ if(bWifiConnected) ++ { ++ wifiRssiState = halbtc8821a1ant_WifiRssiState(pBtCoexist, 1, 2, 30, 0); ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 1, 1); ++ } ++ else ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 1, 1); ++ } ++ } ++ else ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ } ++ ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ { ++ bBtCtrlAggBufSize = TRUE; ++ aggBufSize = 0x3; ++ } ++ else if(pBtLinkInfo->bHidExist) ++ { ++ bBtCtrlAggBufSize = TRUE; ++ aggBufSize = 0x5; ++ } ++ else if(pBtLinkInfo->bA2dpExist || pBtLinkInfo->bPanExist) ++ { ++ bBtCtrlAggBufSize = TRUE; ++ aggBufSize = 0x8; ++ } ++ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ ++ halbtc8821a1ant_RunSwCoexistMechanism(pBtCoexist); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8821a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ ++ if(!bWifiConnected) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is non connected-idle !!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ if (bScan) ++ halbtc8821a1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ else ++ halbtc8821a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else ++ halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else // wifi LPS/Busy ++ { ++ halbtc8821a1ant_ActionWifiConnected(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8821a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ // sw all off ++ halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); ++ ++ //halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++} ++ ++VOID ++halbtc8821a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ BOOLEAN bWifiUnder5G=FALSE; ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); ++ ++ if(bWifiOnly) ++ return; ++ ++ if(bBackUp) ++ { ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ } ++ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ ++ //Antenna config ++ if(bWifiUnder5G) ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE); ++ else ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, TRUE, FALSE); ++ ++ // PTA parameter ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8821a1ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8821a1ant_ ++//============================================================ ++VOID ++EXhalbtc8821a1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8821a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8821a1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); ++} ++ ++VOID ++EXhalbtc8821a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ pBtCoexist->bStopCoexDm = FALSE; ++ ++ halbtc8821a1ant_InitCoexDm(pBtCoexist); ++ ++ halbtc8821a1ant_QueryBtInfo(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8821a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u2Byte u2Tmp[4]; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ if(pBtCoexist->bStopCoexDm) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Ant Mech/ Ant Pos:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8821a1Ant, GLCoexVer8821a1Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821a1Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "SM[LowPenaltyRA]", \ ++ pCoexDm->bCurLowPenaltyRa); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ ++ (pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"), ++ pBtCoexist->btInfo.aggBufSize); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ ++ pBtCoexist->btInfo.raMask); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ ++ pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ ++ pCoexDm->errorCondition); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \ ++ pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \ ++ u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc58); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/ 0xc58[29:25]", \ ++ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8db[6:5]", \ ++ ((u1Tmp[0]&0x60)>>5)); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x975); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xcb4[29:28]/0xcb4[7:0]/0x974[9:8]", \ ++ (u4Tmp[0]&0x30000000)>>28, u4Tmp[0]&0xff, u1Tmp[0]& 0x3); ++ CL_PRINTF(cliBuf); ++ ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/0x4c[24:23]/0x64[0]", \ ++ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[1]&0x1); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]&0xff); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5d); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "OFDM-FA/ CCK-FA", \ ++ u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1] ); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8821A_1ANT == 1) ++ halbtc8821a1ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8821a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp=0; ++ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ ++ halbtc8821a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8821a1ant_InitCoexDm(pBtCoexist); ++ halbtc8821a1ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8821a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm) ++ return; ++ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8821a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm ) ++ return; ++ ++ if(BTC_SCAN_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ ++ halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ return; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ halbtc8821a1ant_QueryBtInfo(pBtCoexist); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8821a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_SCAN_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8821a1ant_ActionWifiNotConnectedScan(pBtCoexist); ++ } ++ else // wifi is connected ++ { ++ halbtc8821a1ant_ActionWifiConnectedScan(pBtCoexist); ++ } ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8821a1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8821a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ pCoexDm->nArpCnt = 0; ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ pCoexDm->nArpCnt = 0; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8821a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ halbtc8821a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); ++ } ++ else ++ { ++ halbtc8821a1ant_ActionWifiConnected(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8821a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ pCoexDm->nArpCnt = 0; ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ //H2C_Parameter[0] = 0x1; ++ H2C_Parameter[0] = 0x0; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8821a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE; ++ u4Byte wifiLinkStatus=0; ++ u4Byte numOfWifiLink=0; ++ BOOLEAN bBtCtrlAggBufSize=FALSE; ++ u1Byte aggBufSize=5; ++ ++ if(pBtCoexist->bManualControl || ++ pBtCoexist->bStopCoexDm || ++ pBtCoexist->btInfo.bBtDisabled ) ++ return; ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type ) ++ { ++ pCoexSta->bWiFiIsHighPriTask = TRUE; ++ ++ if(BTC_PACKET_ARP == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet ARP notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); ++ } ++ } ++ else ++ { ++ pCoexSta->bWiFiIsHighPriTask = FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet [Type = %d] notify\n", type)); ++ } ++ ++ pCoexSta->specialPktPeriodCnt = 0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ if(numOfWifiLink >= 2) ++ { ++ halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); ++ halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ if(pCoexSta->bC2hBtInquiryPage) ++ { ++ halbtc8821a1ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else if(bBtHsOn) ++ { ++ halbtc8821a1ant_ActionHs(pBtCoexist); ++ return; ++ } ++ ++ if( BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type ) ++ { ++ //RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], special Packet(%d) notify\n", type)); ++ if(BTC_PACKET_ARP == type) ++ { ++ pCoexDm->nArpCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); ++ if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) ++ return; ++ } ++ ++ halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8821a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bBtBusy=FALSE; ++ BOOLEAN bWifiUnder5G=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8821A_1ANT_MAX) ++ rspSource = BT_INFO_SRC_8821A_1ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8821A_1ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ if (pCoexSta->btInfoC2h[rspSource][2]&0x20) ++ pCoexSta->bC2hBtPage = TRUE; ++ else ++ pCoexSta->bC2hBtPage = FALSE; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ if(!pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if(pCoexSta->btInfoExt & BIT1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if( (pCoexSta->btInfoExt & BIT3) && !bWifiUnder5G) ++ { ++ if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8821A_1ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8821a1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8821A_1ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8821A_1ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8821A_1ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8821A_1ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8821A_1ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8821A_1ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ } ++ ++ halbtc8821a1ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) ++ ++ if(!(btInfo&BT_INFO_8821A_1ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8821A_1ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8821A_1ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8821A_1ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8821A_1ANT_B_ACL_BUSY) ++ { ++ if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ bBtBusy = TRUE; ++ else ++ bBtBusy = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ halbtc8821a1ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8821a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); ++ ++ halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++} ++ ++VOID ++EXhalbtc8821a1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ ++ halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); ++ //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); ++ ++ pBtCoexist->bStopCoexDm = TRUE; ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ pBtCoexist->bStopCoexDm = FALSE; ++ halbtc8821a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); ++ halbtc8821a1ant_InitCoexDm(pBtCoexist); ++ halbtc8821a1ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8821a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8821a1Ant, GLCoexVer8821a1Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8821A_1ANT == 0) ++ halbtc8821a1ant_QueryBtInfo(pBtCoexist); ++ halbtc8821a1ant_MonitorBtCtr(pBtCoexist); ++ halbtc8821a1ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ if( halbtc8821a1ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust ) ++ { ++ //if(pCoexSta->specialPktPeriodCnt > 2) ++ //{ ++ halbtc8821a1ant_RunCoexistMechanism(pBtCoexist); ++ //} ++ } ++ ++ pCoexSta->specialPktPeriodCnt++; ++#endif ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a1Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a1Ant.h new file mode 100644 -index 000000000..d554afbae +index 0000000..4c7469e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a1Ant.h @@ -0,0 +1,213 @@ -+//=========================================== -+// The following is for 8821A 1ANT BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1 -+ -+#define BT_INFO_8821A_1ANT_B_FTP BIT7 -+#define BT_INFO_8821A_1ANT_B_A2DP BIT6 -+#define BT_INFO_8821A_1ANT_B_HID BIT5 -+#define BT_INFO_8821A_1ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8821A_1ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8821A_1ANT_B_CONNECTION BIT0 -+ -+#define BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT 2 -+ -+typedef enum _BT_INFO_SRC_8821A_1ANT{ -+ BT_INFO_SRC_8821A_1ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8821A_1ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8821A_1ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8821A_1ANT_MAX -+}BT_INFO_SRC_8821A_1ANT,*PBT_INFO_SRC_8821A_1ANT; -+ -+typedef enum _BT_8821A_1ANT_BT_STATUS{ -+ BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8821A_1ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8821A_1ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8821A_1ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8821A_1ANT_BT_STATUS_MAX -+}BT_8821A_1ANT_BT_STATUS,*PBT_8821A_1ANT_BT_STATUS; -+ -+typedef enum _BT_8821A_1ANT_WIFI_STATUS{ -+ BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, -+ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, -+ BT_8821A_1ANT_WIFI_STATUS_MAX -+}BT_8821A_1ANT_WIFI_STATUS,*PBT_8821A_1ANT_WIFI_STATUS; -+ -+typedef enum _BT_8821A_1ANT_COEX_ALGO{ -+ BT_8821A_1ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8821A_1ANT_COEX_ALGO_SCO = 0x1, -+ BT_8821A_1ANT_COEX_ALGO_HID = 0x2, -+ BT_8821A_1ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8821A_1ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8821A_1ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8821A_1ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8821A_1ANT_COEX_ALGO_MAX = 0xb, -+}BT_8821A_1ANT_COEX_ALGO,*PBT_8821A_1ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8821A_1ANT{ -+ // fw mechanism -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+ -+ // sw mechanism -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ -+ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt -+ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt -+ u2Byte backupRetryLimit; -+ u1Byte backupAmpduMaxTime; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ u1Byte preArfrType; -+ u1Byte curArfrType; -+ u1Byte preRetryLimitType; -+ u1Byte curRetryLimitType; -+ u1Byte preAmpduTimeType; -+ u1Byte curAmpduTimeType; -+ u4Byte nArpCnt; -+ -+ u1Byte errorCondition; -+} COEX_DM_8821A_1ANT, *PCOEX_DM_8821A_1ANT; -+ -+typedef struct _COEX_STA_8821A_1ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte specialPktPeriodCnt; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8821A_1ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_1ANT_MAX]; -+ BOOLEAN bC2hBtInquiryPage; -+ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue -+ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+}COEX_STA_8821A_1ANT, *PCOEX_STA_8821A_1ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8821a1ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a1ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8821a1ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a1ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a1ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a1ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a1ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a1ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a1ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a1ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8821a1ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a1ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8821a1ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a1ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8821A 1ANT BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1 ++ ++#define BT_INFO_8821A_1ANT_B_FTP BIT7 ++#define BT_INFO_8821A_1ANT_B_A2DP BIT6 ++#define BT_INFO_8821A_1ANT_B_HID BIT5 ++#define BT_INFO_8821A_1ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8821A_1ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8821A_1ANT_B_CONNECTION BIT0 ++ ++#define BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT0))? TRUE:FALSE) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT 2 ++ ++typedef enum _BT_INFO_SRC_8821A_1ANT{ ++ BT_INFO_SRC_8821A_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8821A_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8821A_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8821A_1ANT_MAX ++}BT_INFO_SRC_8821A_1ANT,*PBT_INFO_SRC_8821A_1ANT; ++ ++typedef enum _BT_8821A_1ANT_BT_STATUS{ ++ BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8821A_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8821A_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8821A_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8821A_1ANT_BT_STATUS_MAX ++}BT_8821A_1ANT_BT_STATUS,*PBT_8821A_1ANT_BT_STATUS; ++ ++typedef enum _BT_8821A_1ANT_WIFI_STATUS{ ++ BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT = 0x3, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8821A_1ANT_WIFI_STATUS_MAX ++}BT_8821A_1ANT_WIFI_STATUS,*PBT_8821A_1ANT_WIFI_STATUS; ++ ++typedef enum _BT_8821A_1ANT_COEX_ALGO{ ++ BT_8821A_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8821A_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8821A_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8821A_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8821A_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8821A_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8821A_1ANT_COEX_ALGO_MAX = 0xb, ++}BT_8821A_1ANT_COEX_ALGO,*PBT_8821A_1ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8821A_1ANT{ ++ // fw mechanism ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ // sw mechanism ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ ++ u4Byte backupArfrCnt1; // Auto Rate Fallback Retry cnt ++ u4Byte backupArfrCnt2; // Auto Rate Fallback Retry cnt ++ u2Byte backupRetryLimit; ++ u1Byte backupAmpduMaxTime; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ u1Byte preArfrType; ++ u1Byte curArfrType; ++ u1Byte preRetryLimitType; ++ u1Byte curRetryLimitType; ++ u1Byte preAmpduTimeType; ++ u1Byte curAmpduTimeType; ++ u4Byte nArpCnt; ++ ++ u1Byte errorCondition; ++} COEX_DM_8821A_1ANT, *PCOEX_DM_8821A_1ANT; ++ ++typedef struct _COEX_STA_8821A_1ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte specialPktPeriodCnt; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8821A_1ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_1ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ BOOLEAN bC2hBtPage; //Add for win8.1 page out issue ++ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++}COEX_STA_8821A_1ANT, *PCOEX_STA_8821A_1ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8821a1ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8821a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8821a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a1ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8821a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a2Ant.c new file mode 100644 -index 000000000..fbbc9cca4 +index 0000000..f107bb8 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a2Ant.c @@ -0,0 +1,4858 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8821A Co-exist mechanism -+// -+// History -+// 2012/11/15 Cosa first check in. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtc8821a2Ant.tmh" -+#endif -+ -+#if (RTL8821A_SUPPORT == 1) -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8821A_2ANT GLCoexDm8821a2Ant; -+static PCOEX_DM_8821A_2ANT pCoexDm=&GLCoexDm8821a2Ant; -+static COEX_STA_8821A_2ANT GLCoexSta8821a2Ant; -+static PCOEX_STA_8821A_2ANT pCoexSta=&GLCoexSta8821a2Ant; -+ -+const char *const GLBtInfoSrc8821a2Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8821a2Ant=20150921; -+u4Byte GLCoexVer8821a2Ant=0x58; -+//modify 20140903v43 a2dpandhid tdmaonoff a2dp glitch _ tdma off 778=3(case1)->778=1(case0) -+//and to improve tp while a2dphid case23->case25 , case123->case125 for asus spec -+//and modify for asus bt WHQL test _ tdma off_ 778=3->1_ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8821a2ant_ -+//============================================================ -+u1Byte -+halbtc8821a2ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8821a2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8821a2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+} -+ -+VOID -+halbtc8821a2ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) ) -+ { -+ pBtLinkInfo->bSlaveRole = TRUE; -+ } -+ else -+ { -+ pBtLinkInfo->bSlaveRole = FALSE; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); -+} -+ -+VOID -+halbtc8821a2ant_MonitorWiFiCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte u4Tmp; -+ u2Byte u2Tmp[3]; -+ s4Byte wifiRssi=0; -+ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; -+ static u1Byte nCCKLockCounter = 0; -+ -+ -+ if (pCoexSta->bUnderIps) -+ { -+ pCoexSta->nCRCOK_CCK = 0; -+ pCoexSta->nCRCOK_11g = 0; -+ pCoexSta->nCRCOK_11n = 0; -+ pCoexSta->nCRCOK_11nAgg = 0; -+ -+ pCoexSta->nCRCErr_CCK = 0; -+ pCoexSta->nCRCErr_11g = 0; -+ pCoexSta->nCRCErr_11n = 0; -+ pCoexSta->nCRCErr_11nAgg = 0; -+ } -+ else -+ { -+ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); -+ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); -+ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); -+ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); -+ -+ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); -+ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); -+ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); -+ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); -+ } -+ -+ //reset counter -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); -+} -+ -+VOID -+halbtc8821a2ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+BOOLEAN -+halbtc8821a2ant_IsWifiStatusChanged( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; -+ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; -+ BOOLEAN bWifiConnected=FALSE; -+ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; -+ -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); -+ -+ if(bWifiConnected) -+ { -+ if(bWifiBusy != bPreWifiBusy) -+ { -+ bPreWifiBusy = bWifiBusy; -+ return TRUE; -+ } -+ if(bUnder4way != bPreUnder4way) -+ { -+ bPreUnder4way = bUnder4way; -+ return TRUE; -+ } -+ if(bBtHsOn != bPreBtHsOn) -+ { -+ bPreBtHsOn = bBtHsOn; -+ return TRUE; -+ } -+ -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist,3, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ -+ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) -+ { -+ return TRUE; -+ } -+ -+ } -+ -+ return FALSE; -+} -+ -+VOID -+halbtc8821a2ant_UpdateBtLinkInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ -+#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 1) // profile from bt patch -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; -+ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; -+ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; -+ -+ // work around for HS mode. -+ if(bBtHsOn) -+ { -+ pBtLinkInfo->bPanExist = TRUE; -+ pBtLinkInfo->bBtLinkExist = TRUE; -+ } -+#else // profile from bt stack -+ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; -+ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; -+ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; -+ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; -+ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; -+ -+ //for win-8 stack HID report error -+ if(!pStackInfo->bHidExist) -+ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack -+ // when stack HID report error, here we use the info from bt fw. -+ if(!pStackInfo->bBtLinkExist) -+ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+#endif -+ // check if Sco only -+ if( pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bScoOnly = TRUE; -+ else -+ pBtLinkInfo->bScoOnly = FALSE; -+ -+ // check if A2dp only -+ if( !pBtLinkInfo->bScoExist && -+ pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bA2dpOnly = TRUE; -+ else -+ pBtLinkInfo->bA2dpOnly = FALSE; -+ -+ // check if Pan only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ pBtLinkInfo->bPanExist && -+ !pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bPanOnly = TRUE; -+ else -+ pBtLinkInfo->bPanOnly = FALSE; -+ -+ // check if Hid only -+ if( !pBtLinkInfo->bScoExist && -+ !pBtLinkInfo->bA2dpExist && -+ !pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bHidExist ) -+ pBtLinkInfo->bHidOnly = TRUE; -+ else -+ pBtLinkInfo->bHidOnly = FALSE; -+} -+ -+u1Byte -+halbtc8821a2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8821A_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(!pBtLinkInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pBtLinkInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pBtLinkInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_HID; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if(pBtLinkInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ else if(pBtLinkInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+#if 0 -+ if(pStackInfo->numOfHid >= 2) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ else -+#endif -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> SCO\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ else if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS) ==> SCO\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR) ==> SCO\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ } -+ else if( pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ } -+ } -+ else -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pBtLinkInfo->bScoExist) -+ { -+ if( pBtLinkInfo->bHidExist && -+ pBtLinkInfo->bPanExist && -+ pBtLinkInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+VOID -+halbtc8821a2ant_SetFwDacSwingLevel( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte dacSwingLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ // There are several type of dacswing -+ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 -+ H2C_Parameter[0] = dacSwingLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a2ant_SetFwDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = decBtPwrLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", -+ decBtPwrLvl, H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a2ant_DecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte decBtPwrLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", -+ (bForceExec? "force to":""), decBtPwrLvl)); -+ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) -+ return; -+ } -+ halbtc8821a2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); -+ -+ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; -+} -+ -+VOID -+halbtc8821a2ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a2ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ halbtc8821a2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8821a2ant_FwDacSwingLvl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte fwDacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", -+ (bForceExec? "force to":""), fwDacSwingLvl)); -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) -+ return; -+ } -+ -+ halbtc8821a2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); -+ -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+} -+ -+VOID -+halbtc8821a2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8821a2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8821a2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf5; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xa0; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xa0; //MCS5 or OFDM36 -+ //H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ //H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ //H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!")) ); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ //return; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8821a2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8821a2ant_SetDacSwingReg( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte level -+ ) -+{ -+ u1Byte val=(u1Byte)level; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val); -+} -+ -+VOID -+halbtc8821a2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ if(bSwDacSwingOn) -+ { -+ halbtc8821a2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); -+ } -+ else -+ { -+ halbtc8821a2ant_SetDacSwingReg(pBtCoexist, 0x18); -+ } -+} -+ -+ -+VOID -+halbtc8821a2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8821a2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8821a2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1); -+ } -+} -+ -+VOID -+halbtc8821a2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8821a2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8821a2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ //=================BB AGC Gain Table -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001); -+ } -+ -+ -+ //=================RF Gain -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); -+ -+ // set rssiAdjustVal for wifi module. -+ if(bAgcTableEn) -+ { -+ rssiAdjustVal = 8; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+VOID -+halbtc8821a2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8821a2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8821a2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8821a2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8821a2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8821a2ant_CoexTableWithType( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexSta->nCoexTableType = type; -+ -+ switch(type) -+ { -+ case 0: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ break; -+ case 1: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3); -+ break; -+ case 2: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 3: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 4: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); -+ break; -+ case 5: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); -+ break; -+ case 6: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); -+ break; -+ case 7: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 8: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 9: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 10: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 11: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 12: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 13: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 14: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); -+ break; -+ case 15: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); -+ break; -+ case 16: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); -+ break; -+ case 17: -+ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0xfafafafa, 0xfafafafa, 0xffffff, 0x3); -+ break; -+ default: -+ break; -+ } -+} -+ -+VOID -+halbtc8821a2ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a2ant_SetLpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ u1Byte lps=lpsVal; -+ u1Byte rpwm=rpwmVal; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+VOID -+halbtc8821a2ant_LpsRpwm( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bForceExecPwrCmd=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", -+ (bForceExec? "force to":""), lpsVal, rpwmVal)); -+ pCoexDm->curLps = lpsVal; -+ pCoexDm->curRpwm = rpwmVal; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preLps == pCoexDm->curLps) && -+ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) -+ { -+ return; -+ } -+ } -+ halbtc8821a2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); -+ -+ pCoexDm->preLps = pCoexDm->curLps; -+ pCoexDm->preRpwm = pCoexDm->curRpwm; -+} -+ -+VOID -+halbtc8821a2ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ halbtc8821a2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8821a2ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[5] ={0}; -+ -+ H2C_Parameter[0] = byte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = byte5; -+ -+ pCoexDm->psTdmaPara[0] = byte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = byte5; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -+} -+ -+VOID -+halbtc8821a2ant_SwMechanism1( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bShrinkRxLPF, -+ IN BOOLEAN bLowPenaltyRA, -+ IN BOOLEAN bLimitedDIG, -+ IN BOOLEAN bBTLNAConstrain -+ ) -+{ -+ /* -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 -+ { -+ if (bShrinkRxLPF) -+ bShrinkRxLPF = FALSE; -+ } -+ */ -+ -+ //halbtc8821a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); -+ halbtc8821a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+} -+ -+VOID -+halbtc8821a2ant_SwMechanism2( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAGCTableShift, -+ IN BOOLEAN bADCBackOff, -+ IN BOOLEAN bSWDACSwing, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ //halbtc8821a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); -+ //halbtc8821a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); -+ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); -+} -+ -+VOID -+halbtc8821a2ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ if(bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &=~BIT23; -+ u4Tmp |= BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x974, 0x3ff); -+ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ //tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix -+ H2C_Parameter[0] = 1; -+ H2C_Parameter[1] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ else -+ { -+ //tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix -+ H2C_Parameter[0] = 0; -+ H2C_Parameter[1] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ } -+ -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_WIFI_AT_MAIN: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); -+ break; -+ case BTC_ANT_WIFI_AT_AUX: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); -+ break; -+ } -+} -+ -+VOID -+halbtc8821a2ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bTurnOnByCnt=FALSE; -+ u1Byte psTdmaTypeByCnt=0; -+ u1Byte wifiRssiState1, btRssiState; -+ -+ -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn) -+ { -+ type = type +100; //for WiFi RSSI low or BT RSSI low -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ case 1: -+ default: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 2: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); -+ break; -+ case 3: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); -+ break; -+ case 4: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); -+ break; -+ case 5: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); -+ break; -+ case 6: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); -+ break; -+ case 7: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); -+ break; -+ case 8: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); -+ break; -+ case 9: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 10: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); -+ break; -+ case 11: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); -+ break; -+ case 12: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90); -+ break; -+ case 13: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); -+ break; -+ case 14: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); -+ break; -+ case 15: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); -+ break; -+ case 16: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90); -+ break; -+ case 17: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); -+ break; -+ case 18: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ break; -+ case 19: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); -+ break; -+ case 20: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); -+ break; -+ case 21: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); -+ break; -+ case 23: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0xf0, 0x14); -+ break; -+ case 24: -+ case 124: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3c, 0x03, 0x70, 0x50); -+ break; -+ //case25/case125 : for lenovo bt pan tp degrade<30% while wifi downlink -+ case 25: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x14, 0x03, 0xf1, 0x90); -+ break; -+ case 26: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x30, 0x03, 0xf1, 0x90); -+ break; -+ case 71: -+ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 101: -+ case 105: -+ case 171: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a, 0x03, 0x70, 0x50); -+ break; -+ case 102: -+ case 106: -+ case 110: -+ case 114: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d, 0x03, 0x70, 0x50); -+ break; -+ case 103: -+ case 107: -+ case 111: -+ case 115: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50); -+ break; -+ case 104: -+ case 108: -+ case 112: -+ case 116: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50); -+ break; -+ case 109: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); -+ break; -+ case 113: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90); -+ break; -+ case 121: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); -+ break; -+ case 22: -+ case 122: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11); -+ break; -+ case 123: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x54); -+ break; -+ //case25/case125 : for lenovo bt pan tp degrade<30% while wifi downlink -+ case 125: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x14, 0x03, 0x70, 0x50); -+ break; -+ case 126: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x30, 0x03, 0x70, 0x50); -+ break; -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(type) -+ { -+ case 0: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ case 1: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); -+ break; -+ default: -+ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8821a2ant_PsTdmaCheckForPowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bNewPsState -+ ) -+{ -+ u1Byte lpsMode=0x0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); -+ -+ if(lpsMode) // already under LPS state -+ { -+ if(bNewPsState) -+ { -+ // keep state under LPS, do nothing. -+ } -+ else -+ { -+ // will leave LPS state, turn off psTdma first -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ } -+ else // NO PS state -+ { -+ if(bNewPsState) -+ { -+ // will enter LPS state, turn off psTdma first -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ else -+ { -+ // keep state under NO PS state, do nothing. -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_PowerSaveState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte psType, -+ IN u1Byte lpsVal, -+ IN u1Byte rpwmVal -+ ) -+{ -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ switch(psType) -+ { -+ case BTC_PS_WIFI_NATIVE: -+ // recover to original 32k low power setting -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ case BTC_PS_LPS_ON: -+ halbtc8821a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); -+ halbtc8821a2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); -+ // when coex force to enter LPS, do not enter 32k low power. -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ // power save must executed before psTdma. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); -+ pCoexSta->bForceLpsOn = TRUE; -+ break; -+ case BTC_PS_LPS_OFF: -+ halbtc8821a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); -+ pCoexSta->bForceLpsOn = FALSE; -+ break; -+ default: -+ break; -+ } -+} -+ -+ -+VOID -+halbtc8821a2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8821a2ant_CoexUnder5G( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a2ant_CoexAllOff(pBtCoexist); -+ -+ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); -+} -+ -+VOID -+halbtc8821a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); -+ -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8821a2ant_ActionBtInquiry( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ BOOLEAN bWifiConnected=FALSE; -+ BOOLEAN bLowPwrDisable=TRUE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ if(bScan || bLink || bRoam) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n")); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ } -+ else if(bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n")); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n")); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+} -+ -+ -+VOID -+halbtc8821a2ant_ActionWiFiLinkProcess( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte u1Tmpa, u1Tmpb; -+ -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ -+ -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x765=0x%x, 0x76e=0x%x\n", u1Tmpa, u1Tmpb)); -+} -+ -+BOOLEAN -+halbtc8821a2ant_ActionWifiIdleProcess( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ //wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ -+ // define the office environment -+ if(BTC_RSSI_HIGH(wifiRssiState1) && -+ (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE)) -+ { -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n")); -+ -+ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ return TRUE; -+ } -+ -+ // -+ else if (pCoexSta->bPanExist== TRUE) -+ { -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT PAN exist!!\n")); -+ -+ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ return TRUE; -+ } -+ -+ else -+ { -+ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); -+ return FALSE; -+ } -+ -+ -+} -+ -+ -+ -+BOOLEAN -+halbtc8821a2ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ if(BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else if(BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bBtHsOn) -+ return FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); -+ bCommon = FALSE; -+ //bCommon = halbtc8821a2ant_ActionWifiIdleProcess(pBtCoexist); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); -+ //bCommon = FALSE; -+ bCommon = halbtc8821a2ant_ActionWifiIdleProcess(pBtCoexist); -+ } -+ } -+ } -+ -+ return bCommon; -+} -+VOID -+halbtc8821a2ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bScoHid, -+ IN BOOLEAN bTxPause, -+ IN u1Byte maxInterval -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); -+ -+ if(!pCoexDm->bAutoTdmaAdjust) -+ { -+ pCoexDm->bAutoTdmaAdjust = TRUE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ { -+ if(bScoHid) -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ else -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ } -+ } -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); -+ if(maxInterval == 1) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 2) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 3) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+} -+ -+// SCO only or SCO+PAN(HS) -+VOID -+halbtc8821a2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else //for SCO quality & wifi performance balance at 11n mode -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); -+ else -+ { -+ if(pBtLinkInfo->bScoOnly) -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 17); -+ else -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); -+ } -+ } -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18); -+ } -+ } -+} -+ -+ -+VOID -+halbtc8821a2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8821a2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ -+ // define the office environment -+ if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ //DbgPrint(" AP#>10(%d)\n", apNum); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ //halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); -+ } -+ return; -+ -+ } -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ } -+ else -+ { -+ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ } -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState,wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 26); -+ } -+ else -+ { -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 26); -+ } -+ -+ // sw mechanism -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+ -+//PAN(HS) only -+VOID -+halbtc8821a2ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8821a2ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ else -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ else -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); -+ //halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); -+ } -+ else -+ { -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ //halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ } -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); -+ } -+ else -+ { -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ //halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8821a2ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState,wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ else -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else -+ { -+ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, wifiRssiState1, btRssiState; -+ u4Byte wifiBw; -+ u1Byte apNum=0; -+ -+ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ //btRssiState = halbtc8821a2ant_BtRssiState(2, 29, 0); -+ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); -+ btRssiState = halbtc8821a2ant_BtRssiState(3, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ -+ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); -+ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_LEGACY == wifiBw) -+ { -+ if(BTC_RSSI_HIGH(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ else -+ { // only 802.11N mode we have to dec bt power to 4 degree -+ if(BTC_RSSI_HIGH(btRssiState)) -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ // need to check ap Number of Not -+ if(apNum < 10) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ } -+ else if(BTC_RSSI_MEDIUM(btRssiState)) -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); -+ else -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ } -+ -+ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ } -+ else -+ { -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ } -+ else -+ { -+ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ } -+ -+ // sw mechanism -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821a2ant_ActionBtWhckTest( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+} -+ -+VOID -+halbtc8821a2ant_ActionWifiMultiPort( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); -+ -+ // sw all off -+ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); -+ -+ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); -+ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+} -+ -+VOID -+halbtc8821a2ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; -+ u1Byte btInfoOriginal=0, btRetryCnt=0; -+ u1Byte algorithm=0; -+ u4Byte numOfWifiLink=0; -+ u4Byte wifiLinkStatus=0; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ BOOLEAN bMiracastPlusBt=FALSE; -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ if(bWifiUnder5G) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n")); -+ halbtc8821a2ant_CoexUnder5G(pBtCoexist); -+ return; -+ } -+ -+ if(pCoexSta->bUnderIps) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); -+ return; -+ } -+ -+ if(pCoexSta->bBtWhckTest) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); -+ halbtc8821a2ant_ActionBtWhckTest(pBtCoexist); -+ return; -+ } -+ -+ algorithm = halbtc8821a2ant_ActionAlgorithm(pBtCoexist); -+ if(pCoexSta->bC2hBtInquiryPage && (BT_8821A_2ANT_COEX_ALGO_PANHS!=algorithm)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); -+ halbtc8821a2ant_ActionBtInquiry(pBtCoexist); -+ return; -+ } -+ else -+ { -+ -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if(bScan || bLink || bRoam) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n")); -+ halbtc8821a2ant_ActionWiFiLinkProcess(pBtCoexist); -+ return; -+ } -+ -+ //for P2P -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); -+ numOfWifiLink = wifiLinkStatus>>16; -+ -+ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); -+ -+ if(pBtLinkInfo->bBtLinkExist) -+ { -+ bMiracastPlusBt = TRUE; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ halbtc8821a2ant_ActionWifiMultiPort(pBtCoexist); -+ -+ return; -+ } -+ else -+ { -+ bMiracastPlusBt = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); -+ } -+ -+ pCoexDm->curAlgorithm = algorithm; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); -+ -+ if(halbtc8821a2ant_IsCommonAction(pBtCoexist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ else -+ { -+ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", -+ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); -+ pCoexDm->bAutoTdmaAdjust = FALSE; -+ } -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8821A_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); -+ halbtc8821a2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); -+ halbtc8821a2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); -+ halbtc8821a2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); -+ halbtc8821a2ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); -+ halbtc8821a2ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); -+ halbtc8821a2ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); -+ halbtc8821a2ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); -+ halbtc8821a2ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); -+ halbtc8821a2ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8821A_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); -+ halbtc8821a2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); -+ halbtc8821a2ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+} -+ -+VOID -+halbtc8821a2ant_WifiOffHwCfg( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bIsInMpMode = FALSE; -+ u1Byte H2C_Parameter[2] ={0}; -+ u4Byte fwVer=0; -+ -+ // set wlan_act to low -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ if(fwVer >= 0x180000) -+ { -+ /* Use H2C to set GNT_BT to HIGH */ -+ H2C_Parameter[0] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); -+ } -+} -+ -+VOID -+halbtc8821a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bBackUp -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0, fwVer; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = -+ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ -+ //Antenna config -+ halbtc8821a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); -+ pCoexSta->disVerInfoCnt = 0; -+ -+ // PTA parameter -+ halbtc8821a2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); -+ -+ // Enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); -+} -+ -+//============================================================ -+// work around function start with wa_halbtc8821a2ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8821a2ant_ -+//============================================================ -+VOID -+EXhalbtc8821a2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ -+} -+ -+VOID -+EXhalbtc8821a2ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ -+ -+ // -+ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) -+ // Local setting bit define -+ // BIT0: "0" for no antenna inverse; "1" for antenna inverse -+ // BIT1: "0" for internal switch; "1" for external switch -+ // BIT2: "0" for one antenna; "1" for two antenna -+ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 -+ if(pBtCoexist->chipInterface == BTC_INTF_USB) -+ { -+ // fixed at S0 for USB interface -+ u1Tmp |= 0x1; // antenna inverse -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); -+ } -+ else -+ { -+ // for PCIE and SDIO interface, we check efuse 0xc3[6] -+ if(pBoardInfo->singleAntPath == 0) -+ { -+ } -+ else if(pBoardInfo->singleAntPath == 1) -+ { -+ // set to S0 -+ u1Tmp |= 0x1; // antenna inverse -+ } -+ -+ if(pBtCoexist->chipInterface == BTC_INTF_PCI) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); -+ } -+ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) -+ { -+ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); -+ } -+ } -+} -+ -+VOID -+EXhalbtc8821a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ halbtc8821a2ant_InitHwConfig(pBtCoexist, TRUE); -+} -+ -+VOID -+EXhalbtc8821a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8821a2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8821a2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ u4Byte faOfdm, faCck; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8821a2Ant, GLCoexVer8821a2Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": -+ ( (BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), -+ pCoexSta->btRssi-100, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ -+ if (pStackInfo->bProfileNotified) -+ { -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ else -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ -+ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821a2Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ -+ pCoexSta->nCoexTableType); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ -+ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/0x880[29:25]/0xc58[29:25]", \ -+ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25, ((u1Tmp[1]&0x3e)>>1)); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x764); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x764/ 0x765/ 0x76e", \ -+ (u4Tmp[0]&0xff), (u4Tmp[0]&0xff00)>>8, u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", \ -+ u4Tmp[0]&0xff, ((u4Tmp[0]&0x30000000)>>28)); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \ -+ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ -+ u4Tmp[0]&0xff, u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); -+ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ -+ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ -+ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; -+ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ -+ u4Tmp[0]&0xffff, faOfdm, faCck); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ -+ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 1) -+ //halbtc8821a2ant_MonitorBtCtr(pBtCoexist); -+#endif -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8821a2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ halbtc8821a2ant_WifiOffHwCfg(pBtCoexist); -+ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ halbtc8821a2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ halbtc8821a2ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8821a2ant_InitCoexDm(pBtCoexist); -+ halbtc8821a2ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8821a2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8821a2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte u1Tmpa, u1Tmpb; -+ -+ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); -+ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); -+ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x765=0x%x, 0x76e=0x%x\n", u1Tmpa, u1Tmpb)); -+} -+ -+VOID -+EXhalbtc8821a2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8821a2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ u1Byte apNum=0; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ { -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); -+ if(apNum < 10) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ } -+ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+} -+ -+VOID -+EXhalbtc8821a2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8821a2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; -+ BOOLEAN bWifiConnected=FALSE, bWifiUnder5G=FALSE; -+ static BOOLEAN bPreScoExist=FALSE; -+ u4Byte raMask=0x0; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8821A_2ANT_MAX) -+ rspSource = BT_INFO_SRC_8821A_2ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); -+ return; -+ } -+ -+ // if 0xff, it means BT is under WHCK test -+ if (btInfo == 0xff) -+ pCoexSta->bBtWhckTest = TRUE; -+ else -+ pCoexSta->bBtWhckTest = FALSE; -+ -+ if(BT_INFO_SRC_8821A_2ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); -+ if(pCoexSta->bBtTxRxMask) -+ { -+ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n")); -+ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); -+ } -+ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if( (pCoexSta->btInfoExt & BIT1) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); -+ if(bWifiConnected) -+ { -+ EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ -+ -+ if(!pBtCoexist->bManualControl && !bWifiUnder5G) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info = 0x%x!!\n", pCoexSta->btInfoExt)); -+ if( (pCoexSta->btInfoExt&BIT3) ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3=1, bWifiConnected=%d\n", bWifiConnected)); -+ if(bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3=0, bWifiConnected=%d\n", bWifiConnected)); -+ // BT already NOT ignore Wlan active, do nothing here. -+ if(!bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT to ignore Wlan active!!\n")); -+ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+ } -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 0) -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8821a2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+#endif -+ } -+ -+ // check BIT2 first ==> check if bt is under inquiry or page scan -+ if(btInfo & BT_INFO_8821A_2ANT_B_INQ_PAGE) -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ else -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ -+ // set link exist status -+ if(!(btInfo&BT_INFO_8821A_2ANT_B_CONNECTION)) -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ } -+ else // connection exists -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ if(btInfo & BT_INFO_8821A_2ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ if(btInfo & BT_INFO_8821A_2ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ if(btInfo & BT_INFO_8821A_2ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ if(btInfo & BT_INFO_8821A_2ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ -+ if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE)) -+ { -+ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) -+ pCoexSta->bHidExist = TRUE; -+ } -+ } -+ -+ halbtc8821a2ant_UpdateBtLinkInfo(pBtCoexist); -+ -+ if(!(btInfo&BT_INFO_8821A_2ANT_B_CONNECTION)) -+ { -+ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); -+ } -+ else if(btInfo == BT_INFO_8821A_2ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); -+ } -+ else if((btInfo&BT_INFO_8821A_2ANT_B_SCO_ESCO) || -+ (btInfo&BT_INFO_8821A_2ANT_B_SCO_BUSY)) -+ { -+ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_SCO_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); -+ } -+ else if(btInfo&BT_INFO_8821A_2ANT_B_ACL_BUSY) -+ { -+ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_ACL_BUSY; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); -+ } -+ else -+ { -+ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_MAX; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); -+ } -+ -+ if( (BT_8821A_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || -+ (BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) -+ { -+ bBtBusy = TRUE; -+ bLimitedDig = TRUE; -+ } -+ else -+ { -+ bBtBusy = FALSE; -+ bLimitedDig = FALSE; -+ } -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ pCoexDm->bLimitedDig = bLimitedDig; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); -+ -+ halbtc8821a2ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8821a2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8821a2ant_WifiOffHwCfg(pBtCoexist); -+ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. -+ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 -+ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ -+ EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8821a2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ halbtc8821a2ant_InitHwConfig(pBtCoexist, FALSE); -+ halbtc8821a2ant_InitCoexDm(pBtCoexist); -+ halbtc8821a2ant_QueryBtInfo(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8821a2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ //static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(pCoexSta->disVerInfoCnt <= 5) -+ { -+ pCoexSta->disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8821a2Ant, GLCoexVer8821a2Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ -+ if (pCoexSta->disVerInfoCnt == 3) -+ { -+ //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n")); -+ halbtc8821a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); -+ } -+ } -+ -+#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 0) -+ halbtc8821a2ant_QueryBtInfo(pBtCoexist); -+ halbtc8821a2ant_MonitorBtEnableDisable(pBtCoexist); -+#else -+ halbtc8821a2ant_MonitorBtCtr(pBtCoexist); -+ halbtc8821a2ant_MonitorWiFiCtr(pBtCoexist); -+ -+ if( halbtc8821a2ant_IsWifiStatusChanged(pBtCoexist) || -+ pCoexDm->bAutoTdmaAdjust) -+ { -+ halbtc8821a2ant_RunCoexistMechanism(pBtCoexist); -+ } -+#endif -+} -+ -+ -+#endif -+ -+#else // #if (RTL8821A_SUPPORT == 1) -+VOID -+EXhalbtc8821a2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8821a2ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8821a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ){} -+VOID -+EXhalbtc8821a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8821a2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8821a2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8821a2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8821a2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8821a2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8821a2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ){} -+VOID -+EXhalbtc8821a2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ){} -+VOID -+EXhalbtc8821a2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8821a2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ){} -+VOID -+EXhalbtc8821a2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ){} -+VOID -+EXhalbtc8821a2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ){} ++//============================================================ ++// Description: ++// ++// This file is for RTL8821A Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8821a2Ant.tmh" ++#endif ++ ++#if (RTL8821A_SUPPORT == 1) ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8821A_2ANT GLCoexDm8821a2Ant; ++static PCOEX_DM_8821A_2ANT pCoexDm=&GLCoexDm8821a2Ant; ++static COEX_STA_8821A_2ANT GLCoexSta8821a2Ant; ++static PCOEX_STA_8821A_2ANT pCoexSta=&GLCoexSta8821a2Ant; ++ ++const char *const GLBtInfoSrc8821a2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8821a2Ant=20150921; ++u4Byte GLCoexVer8821a2Ant=0x58; ++//modify 20140903v43 a2dpandhid tdmaonoff a2dp glitch _ tdma off 778=3(case1)->778=1(case0) ++//and to improve tp while a2dphid case23->case25 , case123->case125 for asus spec ++//and modify for asus bt WHQL test _ tdma off_ 778=3->1_ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8821a2ant_ ++//============================================================ ++u1Byte ++halbtc8821a2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8821a2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8821a2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++VOID ++halbtc8821a2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) ) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8821a2ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); ++ } ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); ++} ++ ++VOID ++halbtc8821a2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++BOOLEAN ++halbtc8821a2ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist,3, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ ++ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) ++ { ++ return TRUE; ++ } ++ ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8821a2ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 1) // profile from bt patch ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++#else // profile from bt stack ++ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; ++ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; ++ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; ++ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; ++ ++ //for win-8 stack HID report error ++ if(!pStackInfo->bHidExist) ++ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack ++ // when stack HID report error, here we use the info from bt fw. ++ if(!pStackInfo->bBtLinkExist) ++ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++#endif ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8821a2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8821A_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++#if 0 ++ if(pStackInfo->numOfHid >= 2) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ else ++#endif ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> SCO\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS) ==> SCO\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR) ==> SCO\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8821a2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = decBtPwrLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", ++ decBtPwrLvl, H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", ++ (bForceExec? "force to":""), decBtPwrLvl)); ++ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) ++ return; ++ } ++ halbtc8821a2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); ++ ++ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; ++} ++ ++VOID ++halbtc8821a2ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a2ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8821a2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8821a2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8821a2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8821a2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8821a2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8821a2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf5; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xa0; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xa0; //MCS5 or OFDM36 ++ //H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ //H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ //H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!")) ); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ //return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8821a2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8821a2ant_SetDacSwingReg( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte level ++ ) ++{ ++ u1Byte val=(u1Byte)level; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val); ++} ++ ++VOID ++halbtc8821a2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ halbtc8821a2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); ++ } ++ else ++ { ++ halbtc8821a2ant_SetDacSwingReg(pBtCoexist, 0x18); ++ } ++} ++ ++ ++VOID ++halbtc8821a2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8821a2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8821a2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1); ++ } ++} ++ ++VOID ++halbtc8821a2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8821a2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8821a2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ //=================BB AGC Gain Table ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001); ++ } ++ ++ ++ //=================RF Gain ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); ++ ++ // set rssiAdjustVal for wifi module. ++ if(bAgcTableEn) ++ { ++ rssiAdjustVal = 8; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++VOID ++halbtc8821a2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8821a2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8821a2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8821a2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8821a2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8821a2ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 16: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 17: ++ halbtc8821a2ant_CoexTable(pBtCoexist, bForceExec, 0xfafafafa, 0xfafafafa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8821a2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a2ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8821a2ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8821a2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8821a2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8821a2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8821a2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ ++ H2C_Parameter[0] = byte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = byte5; ++ ++ pCoexDm->psTdmaPara[0] = byte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = byte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8821a2ant_SwMechanism1( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bShrinkRxLPF, ++ IN BOOLEAN bLowPenaltyRA, ++ IN BOOLEAN bLimitedDIG, ++ IN BOOLEAN bBTLNAConstrain ++ ) ++{ ++ /* ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 ++ { ++ if (bShrinkRxLPF) ++ bShrinkRxLPF = FALSE; ++ } ++ */ ++ ++ //halbtc8821a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); ++ halbtc8821a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8821a2ant_SwMechanism2( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAGCTableShift, ++ IN BOOLEAN bADCBackOff, ++ IN BOOLEAN bSWDACSwing, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ //halbtc8821a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); ++ //halbtc8821a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); ++ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); ++} ++ ++VOID ++halbtc8821a2ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ if(bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &=~BIT23; ++ u4Tmp |= BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x974, 0x3ff); ++ //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ //tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix ++ H2C_Parameter[0] = 1; ++ H2C_Parameter[1] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ else ++ { ++ //tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix ++ H2C_Parameter[0] = 0; ++ H2C_Parameter[1] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ } ++ ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); ++ break; ++ } ++} ++ ++VOID ++halbtc8821a2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0; ++ u1Byte wifiRssiState1, btRssiState; ++ ++ ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn) ++ { ++ type = type +100; //for WiFi RSSI low or BT RSSI low ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ case 1: ++ default: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 2: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 3: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 4: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); ++ break; ++ case 5: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 6: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 7: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 8: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 9: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 10: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 11: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 12: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90); ++ break; ++ case 13: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 14: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 15: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 16: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 17: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 23: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1e, 0x03, 0xf0, 0x14); ++ break; ++ case 24: ++ case 124: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3c, 0x03, 0x70, 0x50); ++ break; ++ //case25/case125 : for lenovo bt pan tp degrade<30% while wifi downlink ++ case 25: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x14, 0x03, 0xf1, 0x90); ++ break; ++ case 26: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x30, 0x03, 0xf1, 0x90); ++ break; ++ case 71: ++ //halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 101: ++ case 105: ++ case 171: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a, 0x03, 0x70, 0x50); ++ break; ++ case 102: ++ case 106: ++ case 110: ++ case 114: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d, 0x03, 0x70, 0x50); ++ break; ++ case 103: ++ case 107: ++ case 111: ++ case 115: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50); ++ break; ++ case 104: ++ case 108: ++ case 112: ++ case 116: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50); ++ break; ++ case 109: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 113: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90); ++ break; ++ case 121: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 22: ++ case 122: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11); ++ break; ++ case 123: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x54); ++ break; ++ //case25/case125 : for lenovo bt pan tp degrade<30% while wifi downlink ++ case 125: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x14, 0x03, 0x70, 0x50); ++ break; ++ case 126: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x30, 0x03, 0x70, 0x50); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ case 0: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8821a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8821a2ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8821a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8821a2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8821a2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++VOID ++halbtc8821a2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8821a2ant_CoexUnder5G( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a2ant_CoexAllOff(pBtCoexist); ++ ++ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); ++} ++ ++VOID ++halbtc8821a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); ++ ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8821a2ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bLowPwrDisable=TRUE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n")); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n")); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n")); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++} ++ ++ ++VOID ++halbtc8821a2ant_ActionWiFiLinkProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ ++ ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x765=0x%x, 0x76e=0x%x\n", u1Tmpa, u1Tmpb)); ++} ++ ++BOOLEAN ++halbtc8821a2ant_ActionWifiIdleProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if(BTC_RSSI_HIGH(wifiRssiState1) && ++ (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE)) ++ { ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n")); ++ ++ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ return TRUE; ++ } ++ ++ // ++ else if (pCoexSta->bPanExist== TRUE) ++ { ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT PAN exist!!\n")); ++ ++ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ return TRUE; ++ } ++ ++ else ++ { ++ halbtc8821a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ return FALSE; ++ } ++ ++ ++} ++ ++ ++ ++BOOLEAN ++halbtc8821a2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if(BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else if(BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bBtHsOn) ++ return FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++ bCommon = FALSE; ++ //bCommon = halbtc8821a2ant_ActionWifiIdleProcess(pBtCoexist); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ //bCommon = FALSE; ++ bCommon = halbtc8821a2ant_ActionWifiIdleProcess(pBtCoexist); ++ } ++ } ++ } ++ ++ return bCommon; ++} ++VOID ++halbtc8821a2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8821a2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else //for SCO quality & wifi performance balance at 11n mode ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ else ++ { ++ if(pBtLinkInfo->bScoOnly) ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 17); ++ else ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); ++ } ++ } ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8821a2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8821a2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ //DbgPrint(" AP#>10(%d)\n", apNum); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ //halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6); ++ } ++ return; ++ ++ } ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ } ++ else ++ { ++ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 26); ++ } ++ else ++ { ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 26); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++ ++//PAN(HS) only ++VOID ++halbtc8821a2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8821a2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ else ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); ++ //halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); ++ } ++ else ++ { ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ } ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); ++ } ++ else ++ { ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8821a2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(2, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ else ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8821a2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //btRssiState = halbtc8821a2ant_BtRssiState(2, 29, 0); ++ wifiRssiState1 = halbtc8821a2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8821a2ant_BtRssiState(3, BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); ++ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { // only 802.11N mode we have to dec bt power to 4 degree ++ if(BTC_RSSI_HIGH(btRssiState)) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ // need to check ap Number of Not ++ if(apNum < 10) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ } ++ else ++ { ++ //halbtc8821a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821a2ant_ActionBtWhckTest( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8821a2ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8821a2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821a2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++} ++ ++VOID ++halbtc8821a2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ u4Byte numOfWifiLink=0; ++ u4Byte wifiLinkStatus=0; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ if(bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n")); ++ halbtc8821a2ant_CoexUnder5G(pBtCoexist); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if(pCoexSta->bBtWhckTest) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); ++ halbtc8821a2ant_ActionBtWhckTest(pBtCoexist); ++ return; ++ } ++ ++ algorithm = halbtc8821a2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bC2hBtInquiryPage && (BT_8821A_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8821a2ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else ++ { ++ ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n")); ++ halbtc8821a2ant_ActionWiFiLinkProcess(pBtCoexist); ++ return; ++ } ++ ++ //for P2P ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8821a2ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ ++ if(halbtc8821a2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8821A_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8821a2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8821a2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8821a2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); ++ halbtc8821a2ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8821a2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8821a2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8821a2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8821a2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8821a2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8821a2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8821a2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8821a2ant_WifiOffHwCfg( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bIsInMpMode = FALSE; ++ u1Byte H2C_Parameter[2] ={0}; ++ u4Byte fwVer=0; ++ ++ // set wlan_act to low ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to HIGH */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++} ++ ++VOID ++halbtc8821a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0, fwVer; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ //Antenna config ++ halbtc8821a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); ++ pCoexSta->disVerInfoCnt = 0; ++ ++ // PTA parameter ++ halbtc8821a2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8821a2ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8821a2ant_ ++//============================================================ ++VOID ++EXhalbtc8821a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ ++} ++ ++VOID ++EXhalbtc8821a2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ ++ ++ // ++ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) ++ // Local setting bit define ++ // BIT0: "0" for no antenna inverse; "1" for antenna inverse ++ // BIT1: "0" for internal switch; "1" for external switch ++ // BIT2: "0" for one antenna; "1" for two antenna ++ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ u1Tmp |= 0x1; // antenna inverse ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ u1Tmp |= 0x1; // antenna inverse ++ } ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_PCI) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8821a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8821a2ant_InitHwConfig(pBtCoexist, TRUE); ++} ++ ++VOID ++EXhalbtc8821a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8821a2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8821a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8821a2Ant, GLCoexVer8821a2Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi-100, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ if (pStackInfo->bProfileNotified) ++ { ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ ++ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821a2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ ++ pCoexSta->nCoexTableType); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/0x880[29:25]/0xc58[29:25]", \ ++ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25, ((u1Tmp[1]&0x3e)>>1)); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x764); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x764/ 0x765/ 0x76e", \ ++ (u4Tmp[0]&0xff), (u4Tmp[0]&0xff00)>>8, u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", \ ++ u4Tmp[0]&0xff, ((u4Tmp[0]&0x30000000)>>28)); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \ ++ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ ++ u4Tmp[0]&0xff, u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ ++ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ ++ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; ++ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ ++ u4Tmp[0]&0xffff, faOfdm, faCck); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 1) ++ //halbtc8821a2ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8821a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ halbtc8821a2ant_WifiOffHwCfg(pBtCoexist); ++ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ halbtc8821a2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ halbtc8821a2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8821a2ant_InitCoexDm(pBtCoexist); ++ halbtc8821a2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8821a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8821a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x765=0x%x, 0x76e=0x%x\n", u1Tmpa, u1Tmpb)); ++} ++ ++VOID ++EXhalbtc8821a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8821a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ u1Byte apNum=0; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ if(apNum < 10) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8821a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8821a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE, bWifiUnder5G=FALSE; ++ static BOOLEAN bPreScoExist=FALSE; ++ u4Byte raMask=0x0; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8821A_2ANT_MAX) ++ rspSource = BT_INFO_SRC_8821A_2ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); ++ return; ++ } ++ ++ // if 0xff, it means BT is under WHCK test ++ if (btInfo == 0xff) ++ pCoexSta->bBtWhckTest = TRUE; ++ else ++ pCoexSta->bBtWhckTest = FALSE; ++ ++ if(BT_INFO_SRC_8821A_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ if(pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if( (pCoexSta->btInfoExt & BIT1) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ if(bWifiConnected) ++ { ++ EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ ++ if(!pBtCoexist->bManualControl && !bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info = 0x%x!!\n", pCoexSta->btInfoExt)); ++ if( (pCoexSta->btInfoExt&BIT3) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3=1, bWifiConnected=%d\n", bWifiConnected)); ++ if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3=0, bWifiConnected=%d\n", bWifiConnected)); ++ // BT already NOT ignore Wlan active, do nothing here. ++ if(!bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT to ignore Wlan active!!\n")); ++ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++ } ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8821a2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8821A_2ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8821A_2ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8821A_2ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8821A_2ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8821A_2ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8821A_2ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ ++ if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE)) ++ { ++ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ pCoexSta->bHidExist = TRUE; ++ } ++ } ++ ++ halbtc8821a2ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ if(!(btInfo&BT_INFO_8821A_2ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8821A_2ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8821A_2ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8821A_2ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8821A_2ANT_B_ACL_BUSY) ++ { ++ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8821A_2ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8821A_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bBtBusy = TRUE; ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ pCoexDm->bLimitedDig = bLimitedDig; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ ++ halbtc8821a2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8821a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8821a2ant_WifiOffHwCfg(pBtCoexist); ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 ++ halbtc8821a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8821a2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ halbtc8821a2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8821a2ant_InitCoexDm(pBtCoexist); ++ halbtc8821a2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8821a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ //static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(pCoexSta->disVerInfoCnt <= 5) ++ { ++ pCoexSta->disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8821a2Ant, GLCoexVer8821a2Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ ++ if (pCoexSta->disVerInfoCnt == 3) ++ { ++ //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n")); ++ halbtc8821a2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); ++ } ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8821A_2ANT == 0) ++ halbtc8821a2ant_QueryBtInfo(pBtCoexist); ++ halbtc8821a2ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8821a2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8821a2ant_MonitorWiFiCtr(pBtCoexist); ++ ++ if( halbtc8821a2ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust) ++ { ++ halbtc8821a2ant_RunCoexistMechanism(pBtCoexist); ++ } ++#endif ++} ++ ++ ++#endif ++ ++#else // #if (RTL8821A_SUPPORT == 1) ++VOID ++EXhalbtc8821a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8821a2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8821a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ){} ++VOID ++EXhalbtc8821a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8821a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8821a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8821a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8821a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8821a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8821a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ){} ++VOID ++EXhalbtc8821a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ){} ++VOID ++EXhalbtc8821a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8821a2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ){} ++VOID ++EXhalbtc8821a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ){} ++VOID ++EXhalbtc8821a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ){} +#endif // #if (RTL8821A_SUPPORT == 1) \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a2Ant.h new file mode 100644 -index 000000000..dd6b23e71 +index 0000000..6b465e3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821a2Ant.h @@ -0,0 +1,226 @@ -+//=========================================== -+// The following is for 8821A 2Ant BT Co-exist definition -+//=========================================== -+#define BT_AUTO_REPORT_ONLY_8821A_2ANT 1 -+ -+ -+#define BT_INFO_8821A_2ANT_B_FTP BIT7 -+#define BT_INFO_8821A_2ANT_B_A2DP BIT6 -+#define BT_INFO_8821A_2ANT_B_HID BIT5 -+#define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8821A_2ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8821A_2ANT_B_CONNECTION BIT0 -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT 2 -+ -+ -+#define BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation -+#define BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation -+ -+typedef enum _BT_INFO_SRC_8821A_2ANT{ -+ BT_INFO_SRC_8821A_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8821A_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8821A_2ANT_MAX -+}BT_INFO_SRC_8821A_2ANT,*PBT_INFO_SRC_8821A_2ANT; -+ -+typedef enum _BT_8821A_2ANT_BT_STATUS{ -+ BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8821A_2ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8821A_2ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8821A_2ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8821A_2ANT_BT_STATUS_MAX -+}BT_8821A_2ANT_BT_STATUS,*PBT_8821A_2ANT_BT_STATUS; -+ -+typedef enum _BT_8821A_2ANT_COEX_ALGO{ -+ BT_8821A_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8821A_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8821A_2ANT_COEX_ALGO_HID = 0x2, -+ BT_8821A_2ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8821A_2ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8821A_2ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8821A_2ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8821A_2ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8821A_2ANT_COEX_ALGO_MAX = 0xb, -+}BT_8821A_2ANT_COEX_ALGO,*PBT_8821A_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8821A_2ANT{ -+ // fw mechanism -+ u1Byte preBtDecPwrLvl; -+ u1Byte curBtDecPwrLvl; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[5]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bResetTdmaAdjust; -+ BOOLEAN bAutoTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+ -+ BOOLEAN bNeedRecover0x948; -+ u4Byte backup0x948; -+ -+ u1Byte preLps; -+ u1Byte curLps; -+ u1Byte preRpwm; -+ u1Byte curRpwm; -+} COEX_DM_8821A_2ANT, *PCOEX_DM_8821A_2ANT; -+ -+typedef struct _COEX_STA_8821A_2ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8821A_2ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_2ANT_MAX]; -+ BOOLEAN bBtWhckTest; -+ BOOLEAN bC2hBtInquiryPage; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+ -+ u4Byte nCRCOK_CCK; -+ u4Byte nCRCOK_11g; -+ u4Byte nCRCOK_11n; -+ u4Byte nCRCOK_11nAgg; -+ -+ u4Byte nCRCErr_CCK; -+ u4Byte nCRCErr_11g; -+ u4Byte nCRCErr_11n; -+ u4Byte nCRCErr_11nAgg; -+ -+ u1Byte nCoexTableType; -+ BOOLEAN bForceLpsOn; -+ -+ u1Byte disVerInfoCnt; -+}COEX_STA_8821A_2ANT, *PCOEX_STA_8821A_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8821a2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a2ant_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8821a2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821a2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8821a2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8821a2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821a2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8821A 2Ant BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8821A_2ANT 1 ++ ++ ++#define BT_INFO_8821A_2ANT_B_FTP BIT7 ++#define BT_INFO_8821A_2ANT_B_A2DP BIT6 ++#define BT_INFO_8821A_2ANT_B_HID BIT5 ++#define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8821A_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8821A_2ANT_B_CONNECTION BIT0 ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT 2 ++ ++ ++#define BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++#define BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++ ++typedef enum _BT_INFO_SRC_8821A_2ANT{ ++ BT_INFO_SRC_8821A_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8821A_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8821A_2ANT_MAX ++}BT_INFO_SRC_8821A_2ANT,*PBT_INFO_SRC_8821A_2ANT; ++ ++typedef enum _BT_8821A_2ANT_BT_STATUS{ ++ BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8821A_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8821A_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8821A_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8821A_2ANT_BT_STATUS_MAX ++}BT_8821A_2ANT_BT_STATUS,*PBT_8821A_2ANT_BT_STATUS; ++ ++typedef enum _BT_8821A_2ANT_COEX_ALGO{ ++ BT_8821A_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8821A_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8821A_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8821A_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8821A_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8821A_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8821A_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8821A_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8821A_2ANT_COEX_ALGO_MAX = 0xb, ++}BT_8821A_2ANT_COEX_ALGO,*PBT_8821A_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8821A_2ANT{ ++ // fw mechanism ++ u1Byte preBtDecPwrLvl; ++ u1Byte curBtDecPwrLvl; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ BOOLEAN bNeedRecover0x948; ++ u4Byte backup0x948; ++ ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++} COEX_DM_8821A_2ANT, *PCOEX_DM_8821A_2ANT; ++ ++typedef struct _COEX_STA_8821A_2ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8821A_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_2ANT_MAX]; ++ BOOLEAN bBtWhckTest; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ u1Byte nCoexTableType; ++ BOOLEAN bForceLpsOn; ++ ++ u1Byte disVerInfoCnt; ++}COEX_STA_8821A_2ANT, *PCOEX_STA_8821A_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8821a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8821a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8821a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8821a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821aCsr2Ant.c b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821aCsr2Ant.c new file mode 100644 -index 000000000..c3c1bdb58 +index 0000000..bd60df4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821aCsr2Ant.c @@ -0,0 +1,4343 @@ -+//============================================================ -+// Description: -+// -+// This file is for RTL8821A_CSR_CSR Co-exist mechanism -+// -+// History -+// 2012/08/22 Cosa first check in. -+// 2012/11/14 Cosa Revise for 8821A_CSR 2Ant out sourcing. -+// -+//============================================================ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "Mp_Precomp.h" -+ -+#if WPP_SOFTWARE_TRACE -+#include "HalBtcCsr8821a2Ant.tmh" -+#endif -+ -+#define _BTCOEX_CSR 1 -+ -+#ifndef rtw_warn_on -+ #define rtw_warn_on(condition) do {} while (0) -+#endif -+ -+#if(BT_30_SUPPORT == 1) -+//============================================================ -+// Global variables, these are static variables -+//============================================================ -+static COEX_DM_8821A_CSR_2ANT GLCoexDm8821aCsr2Ant; -+static PCOEX_DM_8821A_CSR_2ANT pCoexDm=&GLCoexDm8821aCsr2Ant; -+static COEX_STA_8821A_CSR_2ANT GLCoexSta8821aCsr2Ant; -+static PCOEX_STA_8821A_CSR_2ANT pCoexSta=&GLCoexSta8821aCsr2Ant; -+ -+const char *const GLBtInfoSrc8821aCsr2Ant[]={ -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+u4Byte GLCoexVerDate8821aCsr2Ant=20140901; -+u4Byte GLCoexVer8821aCsr2Ant=0x51; -+ -+//============================================================ -+// local function proto type if needed -+//============================================================ -+//============================================================ -+// local function start with halbtc8821aCsr2ant_ -+//============================================================ -+u1Byte -+halbtc8821aCsr2ant_BtRssiState( -+ u1Byte levelNum, -+ u1Byte rssiThresh, -+ u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte btRssi=0; -+ u1Byte btRssiState=pCoexSta->preBtRssiState; -+ -+ btRssi = pCoexSta->btRssi; -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); -+ return pCoexSta->preBtRssiState; -+ } -+ -+ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) -+ { -+ btRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(btRssi < rssiThresh) -+ { -+ btRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(btRssi < rssiThresh1) -+ { -+ btRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ btRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preBtRssiState = btRssiState; -+ -+ return btRssiState; -+} -+ -+u1Byte -+halbtc8821aCsr2ant_WifiRssiState( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte index, -+ IN u1Byte levelNum, -+ IN u1Byte rssiThresh, -+ IN u1Byte rssiThresh1 -+ ) -+{ -+ s4Byte wifiRssi=0; -+ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ -+ if(levelNum == 2) -+ { -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ else if(levelNum == 3) -+ { -+ if(rssiThresh > rssiThresh1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); -+ return pCoexSta->preWifiRssiState[index]; -+ } -+ -+ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) -+ { -+ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; -+ } -+ } -+ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || -+ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) -+ { -+ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) -+ { -+ wifiRssiState = BTC_RSSI_STATE_HIGH; -+ } -+ else if(wifiRssi < rssiThresh) -+ { -+ wifiRssiState = BTC_RSSI_STATE_LOW; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; -+ } -+ } -+ else -+ { -+ if(wifiRssi < rssiThresh1) -+ { -+ wifiRssiState = BTC_RSSI_STATE_MEDIUM; -+ } -+ else -+ { -+ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ } -+ -+ pCoexSta->preWifiRssiState[index] = wifiRssiState; -+ -+ return wifiRssiState; -+} -+ -+VOID -+halbtc8821aCsr2ant_MonitorBtEnableDisable( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static BOOLEAN bPreBtDisabled=FALSE; -+ static u4Byte btDisableCnt=0; -+ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; -+ -+ // This function check if bt is disabled -+ -+ if( pCoexSta->highPriorityTx == 0 && -+ pCoexSta->highPriorityRx == 0 && -+ pCoexSta->lowPriorityTx == 0 && -+ pCoexSta->lowPriorityRx == 0) -+ { -+ bBtActive = FALSE; -+ } -+ if( pCoexSta->highPriorityTx == 0xffff && -+ pCoexSta->highPriorityRx == 0xffff && -+ pCoexSta->lowPriorityTx == 0xffff && -+ pCoexSta->lowPriorityRx == 0xffff) -+ { -+ bBtActive = FALSE; -+ } -+ if(bBtActive) -+ { -+ btDisableCnt = 0; -+ bBtDisabled = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); -+ } -+ else -+ { -+ btDisableCnt++; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", -+ btDisableCnt)); -+ if(btDisableCnt >= 2) -+ { -+ bBtDisabled = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); -+ } -+ } -+ if(bPreBtDisabled != bBtDisabled) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", -+ (bPreBtDisabled ? "disabled":"enabled"), -+ (bBtDisabled ? "disabled":"enabled"))); -+ bPreBtDisabled = bBtDisabled; -+ if(!bBtDisabled) -+ { -+ } -+ else -+ { -+ } -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_MonitorBtCtr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u4Byte regHPTxRx, regLPTxRx, u4Tmp; -+ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; -+ u1Byte u1Tmp; -+ -+ regHPTxRx = 0x770; -+ regLPTxRx = 0x774; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); -+ regHPTx = u4Tmp & bMaskLWord; -+ regHPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); -+ regLPTx = u4Tmp & bMaskLWord; -+ regLPRx = (u4Tmp & bMaskHWord)>>16; -+ -+ pCoexSta->highPriorityTx = regHPTx; -+ pCoexSta->highPriorityRx = regHPRx; -+ pCoexSta->lowPriorityTx = regLPTx; -+ pCoexSta->lowPriorityRx = regLPRx; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", -+ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); -+ -+ // reset counter -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x5d); -+} -+ -+VOID -+halbtc8821aCsr2ant_UpdateRaMask( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte disRateMask -+ ) -+{ -+ pCoexDm->curRaMask = disRateMask; -+ -+ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) -+ { -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); -+ } -+ pCoexDm->preRaMask = pCoexDm->curRaMask; -+} -+ -+VOID -+halbtc8821aCsr2ant_AutoRateFallbackRetry( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bWifiUnderBMode=FALSE; -+ -+ pCoexDm->curArfrType = type; -+ -+ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) -+ { -+ switch(pCoexDm->curArfrType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); -+ break; -+ case 1: -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ if(bWifiUnderBMode) -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); -+ } -+ else -+ { -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preArfrType = pCoexDm->curArfrType; -+} -+ -+VOID -+halbtc8821aCsr2ant_RetryLimit( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curRetryLimitType = type; -+ -+ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) -+ { -+ switch(pCoexDm->curRetryLimitType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); -+ break; -+ case 1: // retry limit=8 -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; -+} -+ -+VOID -+halbtc8821aCsr2ant_AmpduMaxTime( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduTimeType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) -+ { -+ switch(pCoexDm->curAmpduTimeType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); -+ break; -+ case 1: // AMPDU timw = 0x38 * 32us -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); -+ break; -+ case 2: -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x17); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; -+} -+ -+VOID -+halbtc8821aCsr2Ant_AmpduMaxNum( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte type -+ ) -+{ -+ pCoexDm->curAmpduNumType = type; -+ -+ if( bForceExec || (pCoexDm->preAmpduNumType != pCoexDm->curAmpduNumType)) -+ { -+ switch(pCoexDm->curAmpduNumType) -+ { -+ case 0: // normal mode -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, pCoexDm->backupAmpduMaxNum); -+ break; -+ case 1: -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x0808); -+ break; -+ case 2: -+ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x1f1f); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pCoexDm->preAmpduNumType = pCoexDm->curAmpduNumType; -+ -+} -+ -+VOID -+halbtc8821aCsr2ant_LimitedTx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte raMaskType, -+ IN u1Byte arfrType, -+ IN u1Byte retryLimitType, -+ IN u1Byte ampduTimeType, -+ IN u1Byte ampduNumType -+ ) -+{ -+ switch(raMaskType) -+ { -+ case 0: // normal mode -+ halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); -+ break; -+ case 1: // disable cck 1/2 -+ halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); -+ break; -+ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 -+ halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); -+ break; -+ default: -+ break; -+ } -+ -+ halbtc8821aCsr2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); -+ halbtc8821aCsr2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); -+ halbtc8821aCsr2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); -+ halbtc8821aCsr2Ant_AmpduMaxNum(pBtCoexist, bForceExec, ampduNumType); -+} -+ -+ -+ -+VOID -+halbtc8821aCsr2ant_LimitedRx( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRejApAggPkt, -+ IN BOOLEAN bBtCtrlAggBufSize, -+ IN u1Byte aggBufSize -+ ) -+{ -+ BOOLEAN bRejectRxAgg=bRejApAggPkt; -+ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; -+ u1Byte rxAggSize=aggBufSize; -+ -+ //============================================ -+ // Rx Aggregation related setting -+ //============================================ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); -+ // decide BT control aggregation buf size or not -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); -+ // aggregation buf size, only work when BT control Rx aggregation size. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); -+ // real update aggregation setting -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+} -+ -+VOID -+halbtc8821aCsr2ant_QueryBtInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ pCoexSta->bC2hBtInfoReqSent = TRUE; -+ -+ H2C_Parameter[0] |= BIT0; // trigger -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", -+ H2C_Parameter[0])); -+ -+ rtw_warn_on(_BTCOEX_CSR); -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); -+} -+ -+u1Byte -+halbtc8821aCsr2ant_ActionAlgorithm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ BOOLEAN bBtHsOn=FALSE; -+ u1Byte algorithm=BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED; -+ u1Byte numOfDiffProfile=0; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ //sync StackInfo with BT firmware and stack -+ pStackInfo->bHidExist = pCoexSta->bHidExist; -+ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; -+ pStackInfo->bScoExist = pCoexSta->bScoExist; -+ pStackInfo->bPanExist = pCoexSta->bPanExist; -+ pStackInfo->bA2dpExist = pCoexSta->bA2dpExist; -+ -+ if(!pStackInfo->bBtLinkExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); -+ return algorithm; -+ } -+ -+ if(pStackInfo->bScoExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bHidExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bPanExist) -+ numOfDiffProfile++; -+ if(pStackInfo->bA2dpExist) -+ numOfDiffProfile++; -+ -+ if(numOfDiffProfile == 1) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ if(pStackInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID; -+ } -+ else if(pStackInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP; -+ } -+ else if(pStackInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 2) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ if(pStackInfo->bHidExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pStackInfo->bA2dpExist) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if(pStackInfo->bPanExist) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(pStackInfo->numOfHid >= 2) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ } -+ else if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile == 3) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bA2dpExist ) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ else if( pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ else -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } -+ else if(numOfDiffProfile >= 3) -+ { -+ if(pStackInfo->bScoExist) -+ { -+ if( pStackInfo->bHidExist && -+ pStackInfo->bPanExist && -+ pStackInfo->bA2dpExist ) -+ { -+ if(bBtHsOn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); -+ -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); -+ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+BOOLEAN -+halbtc8821aCsr2ant_NeedToDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bRet=FALSE; -+ BOOLEAN bBtHsOn=FALSE, bWifiConnected=FALSE; -+ s4Byte btHsRssi=0; -+ u1Byte btRssiState; -+ -+ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn)) -+ return FALSE; -+ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected)) -+ return FALSE; -+ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi)) -+ return FALSE; -+ -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ if(bWifiConnected) -+ { -+ if(bBtHsOn) -+ { -+ if(btHsRssi > 37) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for HS mode!!\n")); -+ bRet = TRUE; -+ } -+ } -+ else -+ { -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for Wifi is connected!!\n")); -+ bRet = TRUE; -+ } -+ } -+ } -+ -+ return bRet; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetFwDacSwingLevel( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte dacSwingLvl -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ // There are several type of dacswing -+ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 -+ H2C_Parameter[0] = dacSwingLvl; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821aCsr2ant_SetFwDecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bDecBtPwr -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bDecBtPwr) -+ { -+ H2C_Parameter[0] |= BIT1; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power : %s, FW write 0x62=0x%x\n", -+ (bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0])); -+ -+ rtw_warn_on(_BTCOEX_CSR); -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821aCsr2ant_DecBtPwr( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDecBtPwr -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power = %s\n", -+ (bForceExec? "force to":""), ((bDecBtPwr)? "ON":"OFF"))); -+ pCoexDm->bCurDecBtPwr = bDecBtPwr; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr) -+ return; -+ } -+ -+ /* TODO: may CSR consider to decrease BT power? */ -+ //halbtc8821aCsr2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr); -+ -+ pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetBtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ H2C_Parameter[0] = 0; -+ -+ if(bEnableAutoReport) -+ { -+ H2C_Parameter[0] |= BIT0; -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", -+ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); -+ -+ rtw_warn_on(_BTCOEX_CSR); -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821aCsr2ant_BtAutoReport( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnableAutoReport -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", -+ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); -+ pCoexDm->bCurBtAutoReport = bEnableAutoReport; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) -+ return; -+ } -+ //halbtc8821aCsr2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); -+ -+ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; -+} -+ -+VOID -+halbtc8821aCsr2ant_FwDacSwingLvl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u1Byte fwDacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", -+ (bForceExec? "force to":""), fwDacSwingLvl)); -+ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) -+ return; -+ } -+ -+ halbtc8821aCsr2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); -+ -+ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetSwRfRxLpfCorner( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ if(bRxRfShrinkOn) -+ { -+ //Shrink RF Rx LPF corner -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); -+ } -+ else -+ { -+ //Resume RF Rx LPF corner -+ // After initialized, we can use pCoexDm->btRf0x1eBackup -+ if(pBtCoexist->bInitilized) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); -+ } -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_RfShrink( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bRxRfShrinkOn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", -+ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); -+ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) -+ return; -+ } -+ halbtc8821aCsr2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); -+ -+ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty -+ -+ if(bLowPenaltyRa) -+ { -+ H2C_Parameter[1] |= BIT0; -+ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 -+ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 -+ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 -+ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", -+ (bLowPenaltyRa? "ON!!":"OFF!!") )); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8821aCsr2ant_LowPenaltyRa( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bLowPenaltyRa -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", -+ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); -+ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) -+ return; -+ } -+ halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); -+ -+ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetDacSwingReg( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte level -+ ) -+{ -+ u1Byte val=(u1Byte)level; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val); -+} -+ -+VOID -+halbtc8821aCsr2ant_SetSwFullTimeDacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bSwDacSwingOn, -+ IN u4Byte swDacSwingLvl -+ ) -+{ -+ if(bSwDacSwingOn) -+ { -+ halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, 0x18); -+ } -+} -+ -+ -+VOID -+halbtc8821aCsr2ant_DacSwing( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bDacSwingOn, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", -+ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); -+ pCoexDm->bCurDacSwingOn = bDacSwingOn; -+ pCoexDm->curDacSwingLvl = dacSwingLvl; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && -+ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) -+ return; -+ } -+ delay_ms(30); -+ halbtc8821aCsr2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); -+ -+ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; -+ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetAdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ if(bAdcBackOff) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1); -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_AdcBackOff( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAdcBackOff -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", -+ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); -+ pCoexDm->bCurAdcBackOff = bAdcBackOff; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) -+ return; -+ } -+ halbtc8821aCsr2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); -+ -+ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetAgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ u1Byte rssiAdjustVal=0; -+ -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); -+ if(bAgcTableEn) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28F4B); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x10AB2); -+ rssiAdjustVal = 8; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x2884B); -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x104B2); -+ } -+ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); -+ -+ // set rssiAdjustVal for wifi module. -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); -+} -+ -+VOID -+halbtc8821aCsr2ant_AgcTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bAgcTableEn -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", -+ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); -+ pCoexDm->bCurAgcTableEn = bAgcTableEn; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) -+ return; -+ } -+ halbtc8821aCsr2ant_SetAgcTable(pBtCoexist, bAgcTableEn); -+ -+ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetCoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); -+} -+ -+VOID -+halbtc8821aCsr2ant_CoexTable( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN u4Byte val0x6c0, -+ IN u4Byte val0x6c4, -+ IN u4Byte val0x6c8, -+ IN u1Byte val0x6cc -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", -+ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); -+ pCoexDm->curVal0x6c0 = val0x6c0; -+ pCoexDm->curVal0x6c4 = val0x6c4; -+ pCoexDm->curVal0x6c8 = val0x6c8; -+ pCoexDm->curVal0x6cc = val0x6cc; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && -+ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && -+ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && -+ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) -+ return; -+ } -+ halbtc8821aCsr2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); -+ -+ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; -+ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; -+ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; -+ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetFwIgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bEnable -+ ) -+{ -+ u1Byte H2C_Parameter[1] ={0}; -+ -+ if(bEnable) -+ { -+ H2C_Parameter[0] |= BIT0; // function enable -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", -+ H2C_Parameter[0])); -+ -+ rtw_warn_on(_BTCOEX_CSR); -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); -+} -+ -+VOID -+halbtc8821aCsr2ant_IgnoreWlanAct( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bEnable -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", -+ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); -+ pCoexDm->bCurIgnoreWlanAct = bEnable; -+ -+ if(!bForceExec) -+ { -+ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) -+ return; -+ } -+ //halbtc8821aCsr2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); -+ -+ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; -+} -+ -+VOID -+halbtc8821aCsr2ant_SetFwPstdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3, -+ IN u1Byte byte4, -+ IN u1Byte byte5 -+ ) -+{ -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ H2C_Parameter[0] = byte1; -+ H2C_Parameter[1] = byte2; -+ H2C_Parameter[2] = byte3; -+ H2C_Parameter[3] = byte4; -+ H2C_Parameter[4] = byte5; -+ H2C_Parameter[5] = 0x01; -+ -+ pCoexDm->psTdmaPara[0] = byte1; -+ pCoexDm->psTdmaPara[1] = byte2; -+ pCoexDm->psTdmaPara[2] = byte3; -+ pCoexDm->psTdmaPara[3] = byte4; -+ pCoexDm->psTdmaPara[4] = byte5; -+ pCoexDm->psTdmaPara[5] = 0x01; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(6bytes)=0x%x%08x%02x\n", -+ H2C_Parameter[0], -+ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4], H2C_Parameter[5])); -+ -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 6, H2C_Parameter); -+} -+ -+VOID -+halbtc8821aCsr2ant_SwMechanism1( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bShrinkRxLPF, -+ IN BOOLEAN bLowPenaltyRA, -+ IN BOOLEAN bLimitedDIG, -+ IN BOOLEAN bBTLNAConstrain -+ ) -+{ -+ u4Byte wifiBw; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 -+ { -+ if (bShrinkRxLPF) -+ bShrinkRxLPF = FALSE; -+ } -+ -+ halbtc8821aCsr2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); -+ halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); -+ -+ //no limited DIG -+ //halbtc8821aCsr2ant_SetBtLnaConstrain(pBtCoexist, NORMAL_EXEC, bBTLNAConstrain); -+} -+ -+VOID -+halbtc8821aCsr2ant_SwMechanism2( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bAGCTableShift, -+ IN BOOLEAN bADCBackOff, -+ IN BOOLEAN bSWDACSwing, -+ IN u4Byte dacSwingLvl -+ ) -+{ -+ //halbtc8821aCsr2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); -+ halbtc8821aCsr2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); -+ halbtc8821aCsr2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); -+} -+ -+VOID -+halbtc8821aCsr2ant_SetAntPath( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte antPosType, -+ IN BOOLEAN bInitHwCfg, -+ IN BOOLEAN bWifiOff -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ if(bInitHwCfg) -+ { -+ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT -+ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp &=~BIT23; -+ u4Tmp |= BIT24; -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); -+ -+ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x974, 0x3ff); -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); -+ -+ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) -+ { -+ //tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix -+ H2C_Parameter[0] = 1; -+ H2C_Parameter[1] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ else -+ { -+ //tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix -+ H2C_Parameter[0] = 0; -+ H2C_Parameter[1] = 1; -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); -+ } -+ } -+ -+ // ext switch setting -+ switch(antPosType) -+ { -+ case BTC_ANT_WIFI_AT_MAIN: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); -+ break; -+ case BTC_ANT_WIFI_AT_AUX: -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); -+ break; -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_PsTdma( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bForceExec, -+ IN BOOLEAN bTurnOn, -+ IN u1Byte type -+ ) -+{ -+ BOOLEAN bTurnOnByCnt=FALSE; -+ u1Byte psTdmaTypeByCnt=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", -+ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); -+ pCoexDm->bCurPsTdmaOn = bTurnOn; -+ pCoexDm->curPsTdma = type; -+ -+ if(!bForceExec) -+ { -+ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && -+ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) -+ return; -+ } -+ if(bTurnOn) -+ { -+ switch(type) -+ { -+ case 1: -+ default: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ break; -+ case 2: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); -+ break; -+ case 3: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); -+ break; -+ case 4: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); -+ break; -+ case 5: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); -+ break; -+ case 6: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); -+ break; -+ case 7: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); -+ break; -+ case 8: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); -+ break; -+ case 9: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ break; -+ case 10: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); -+ break; -+ case 11: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); -+ break; -+ case 12: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ break; -+ case 13: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); -+ break; -+ case 14: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); -+ break; -+ case 15: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); -+ break; -+ case 16: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); -+ break; -+ case 17: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); -+ break; -+ case 18: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); -+ break; -+ case 19: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); -+ break; -+ case 20: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); -+ break; -+ case 21: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); -+ break; -+ case 22: //ad2dp master -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x11, 0x11, 0x21, 0x10); -+ break; -+ case 23: //a2dp slave -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x12, 0x12, 0x20, 0x10); -+ break; -+ case 71: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); -+ break; -+ } -+ } -+ else -+ { -+ // disable PS tdma -+ switch(type) -+ { -+ case 0: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ case 1: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); -+ break; -+ default: -+ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); -+ break; -+ } -+ } -+ -+ // update pre state -+ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; -+ pCoexDm->prePsTdma = pCoexDm->curPsTdma; -+} -+ -+VOID -+halbtc8821aCsr2ant_CoexAllOff( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // fw all off -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ // sw all off -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ -+ // hw all off -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); -+} -+ -+VOID -+halbtc8821aCsr2ant_CoexUnder5G( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); -+ -+ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); -+} -+ -+VOID -+halbtc8821aCsr2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ // force to reset coex mechanism -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); -+ -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, FALSE); -+ -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+} -+ -+VOID -+halbtc8821aCsr2ant_BtInquiryPage( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bLowPwrDisable=TRUE; -+ -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+} -+BOOLEAN -+halbtc8821aCsr2ant_IsCommonAction( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; -+ BOOLEAN bLowPwrDisable=FALSE; -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ -+ if(!bWifiConnected && -+ BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT IPS!!\n")); -+ -+ -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT IPS!!\n")); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT IPS!!\n")); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT LPS!!\n")); -+ -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); -+ -+ bCommon = TRUE; -+ } -+ else if(bWifiConnected && -+ (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT LPS!!\n")); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT LPS!!\n")); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); -+ -+ bCommon = TRUE; -+ } -+ else if(!bWifiConnected && -+ (BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) -+ { -+ bLowPwrDisable = FALSE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT Busy!!\n")); -+ -+ //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); -+ -+ bCommon = TRUE; -+ } -+ else -+ { -+ bLowPwrDisable = TRUE; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); -+ -+ if(bWifiBusy) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT Busy!!\n")); -+ bCommon = FALSE; -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT Busy!!\n")); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ bCommon = TRUE; -+ } -+ -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE); -+ } -+ -+ if (bCommon == TRUE) -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); -+ -+ return bCommon; -+} -+VOID -+halbtc8821aCsr2ant_TdmaDurationAdjust( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bScoHid, -+ IN BOOLEAN bTxPause, -+ IN u1Byte maxInterval -+ ) -+{ -+ static s4Byte up,dn,m,n,WaitCount; -+ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration -+ u1Byte retryCount=0; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); -+ -+ if(pCoexDm->bResetTdmaAdjust) -+ { -+ pCoexDm->bResetTdmaAdjust = FALSE; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); -+ { -+ if(bScoHid) -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ else -+ { -+ if(bTxPause) -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ } -+ else -+ { -+ if(maxInterval == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(maxInterval == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(maxInterval == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ } -+ } -+ } -+ //============ -+ up = 0; -+ dn = 0; -+ m = 1; -+ n= 3; -+ result = 0; -+ WaitCount = 0; -+ } -+ else -+ { -+ //accquire the BT TRx retry count from BT_Info byte2 -+ retryCount = pCoexSta->btRetryCnt; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", -+ up, dn, m, n, WaitCount)); -+ result = 0; -+ WaitCount++; -+ -+ if(retryCount == 0) // no retry in the last 2-second duration -+ { -+ up++; -+ dn--; -+ -+ if (dn <= 0) -+ dn = 0; -+ -+ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration -+ { -+ WaitCount = 0; -+ n = 3; -+ up = 0; -+ dn = 0; -+ result = 1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); -+ } -+ } -+ else if (retryCount <= 3) // <=3 retry in the last 2-second duration -+ { -+ up--; -+ dn++; -+ -+ if (up <= 0) -+ up = 0; -+ -+ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount <= 2) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); -+ } -+ } -+ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration -+ { -+ if (WaitCount == 1) -+ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ -+ else -+ m = 1; -+ -+ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. -+ m = 20; -+ -+ n = 3*m; -+ up = 0; -+ dn = 0; -+ WaitCount = 0; -+ result = -1; -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); -+ } -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); -+ if(maxInterval == 1) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ pCoexDm->psTdmaDuAdjType = 5; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ pCoexDm->psTdmaDuAdjType = 13; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 71) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ pCoexDm->psTdmaDuAdjType = 1; -+ } -+ else if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); -+ pCoexDm->psTdmaDuAdjType = 71; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ pCoexDm->psTdmaDuAdjType = 9; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 2) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); -+ pCoexDm->psTdmaDuAdjType = 6; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ pCoexDm->psTdmaDuAdjType = 14; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); -+ pCoexDm->psTdmaDuAdjType = 2; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ pCoexDm->psTdmaDuAdjType = 10; -+ } -+ } -+ } -+ } -+ else if(maxInterval == 3) -+ { -+ if(bTxPause) -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); -+ pCoexDm->psTdmaDuAdjType = 8; -+ } -+ else if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); -+ pCoexDm->psTdmaDuAdjType = 16; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); -+ pCoexDm->psTdmaDuAdjType = 7; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); -+ pCoexDm->psTdmaDuAdjType = 15; -+ } -+ } -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); -+ if(pCoexDm->curPsTdma == 5) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 6) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 7) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 8) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ if(pCoexDm->curPsTdma == 13) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 14) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 15) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 16) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ if(result == -1) -+ { -+ if(pCoexDm->curPsTdma == 1) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); -+ pCoexDm->psTdmaDuAdjType = 4; -+ } -+ else if(pCoexDm->curPsTdma == 9) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); -+ pCoexDm->psTdmaDuAdjType = 12; -+ } -+ } -+ else if (result == 1) -+ { -+ if(pCoexDm->curPsTdma == 4) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 3) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 2) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); -+ pCoexDm->psTdmaDuAdjType = 3; -+ } -+ else if(pCoexDm->curPsTdma == 12) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 11) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ else if(pCoexDm->curPsTdma == 10) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); -+ pCoexDm->psTdmaDuAdjType = 11; -+ } -+ } -+ } -+ } -+ } -+ -+ // if current PsTdma not match with the recorded one (when scan, dhcp...), -+ // then we have to adjust it back to the previous record one. -+ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) -+ { -+ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", -+ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ -+ if( !bScan && !bLink && !bRoam) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); -+ } -+ } -+ -+ // when halbtc8821aCsr2ant_TdmaDurationAdjust() is called, fw dac swing is included in the function. -+ //if(pCoexDm->psTdmaDuAdjType == 71) -+ // halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xc); //Skip because A2DP get worse at HT40 -+ //else -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x6); -+} -+ -+// SCO only or SCO+PAN(HS) -+VOID -+halbtc8821aCsr2ant_ActionSco( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState,btRssiState; -+ u4Byte wifiBw; -+ -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffffff, 0x3); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); -+ -+ halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); -+ -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 1, 0, 2, 0); -+ -+ if(pCoexSta->bSlave == FALSE) -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x4); -+ else -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x2); -+ -+/* -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3); -+ } -+ else //for SCO quality & wifi performance balance at 11n mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3); -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ -+ // fw mechanism -+ //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+*/ -+} -+ -+ -+VOID -+halbtc8821aCsr2ant_ActionHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3); -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) -+VOID -+halbtc8821aCsr2ant_ActionA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); -+ -+ if(pCoexSta->bSlave == FALSE) -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 1); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x0c); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); -+ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 2); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18); -+ } -+ -+/* -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ //fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust() -+ //halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+*/ -+} -+ -+VOID -+halbtc8821aCsr2ant_ActionA2dpPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2,35, 0); -+ -+ //fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust() -+ //halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_ActionPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+ -+//PAN(HS) only -+VOID -+halbtc8821aCsr2ant_ActionPanHs( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ } -+ -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+//PAN(EDR)+A2DP -+VOID -+halbtc8821aCsr2ant_ActionPanEdrA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ }; -+ } -+ else -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_ActionPanEdrHid( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState; -+ u4Byte wifiBw; -+ -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+// HID+A2DP+PAN(EDR) -+VOID -+halbtc8821aCsr2ant_ActionHidA2dpPanEdr( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_ActionHidA2dp( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ u1Byte wifiRssiState, btRssiState, btInfoExt; -+ u4Byte wifiBw; -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); -+ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); -+ -+ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); -+ else -+ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ -+ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode -+ { -+//Allen halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); -+ } -+ else //for HID quality & wifi performance balance at 11n mode -+ { -+//Allen halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); -+ -+ } -+ -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+ else -+ { -+ // fw mechanism -+ if( (btRssiState == BTC_RSSI_STATE_HIGH) || -+ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+// halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ -+ } -+ else //a2dp edr rate -+ { -+//Allen halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ } -+ else -+ { -+ if(btInfoExt&BIT0) //a2dp basic rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ else //a2dp edr rate -+ { -+ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); -+ } -+ } -+ -+ // sw mechanism -+ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || -+ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); -+ } -+ else -+ { -+ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); -+ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); -+ } -+ } -+} -+ -+VOID -+halbtc8821aCsr2ant_RunCoexistMechanism( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ BOOLEAN bWifiUnder5G=FALSE; -+ u1Byte btInfoOriginal=0, btRetryCnt=0; -+ u1Byte algorithm=0; -+ -+ if(pBtCoexist->bManualControl) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Manual control!!!\n")); -+ return; -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ -+ if(bWifiUnder5G) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n")); -+ halbtc8821aCsr2ant_CoexUnder5G(pBtCoexist); -+ return; -+ } -+ -+ //if(pStackInfo->bProfileNotified) -+ { -+ algorithm = halbtc8821aCsr2ant_ActionAlgorithm(pBtCoexist); -+ if(pCoexSta->bC2hBtInquiryPage && (BT_8821A_CSR_2ANT_COEX_ALGO_PANHS!=algorithm)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); -+ halbtc8821aCsr2ant_BtInquiryPage(pBtCoexist); -+ return; -+ } -+ -+ pCoexDm->curAlgorithm = algorithm; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); -+ -+ if(halbtc8821aCsr2ant_IsCommonAction(pBtCoexist)) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); -+ pCoexDm->bResetTdmaAdjust = TRUE; -+ } -+ else -+ { -+ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", -+ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); -+ pCoexDm->bResetTdmaAdjust = TRUE; -+ } -+ switch(pCoexDm->curAlgorithm) -+ { -+ case BT_8821A_CSR_2ANT_COEX_ALGO_SCO: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); -+ halbtc8821aCsr2ant_ActionSco(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); -+ halbtc8821aCsr2ant_ActionHid(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); -+ halbtc8821aCsr2ant_ActionA2dp(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); -+ halbtc8821aCsr2ant_ActionA2dpPanHs(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); -+ halbtc8821aCsr2ant_ActionPanEdr(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_PANHS: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); -+ halbtc8821aCsr2ant_ActionPanHs(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); -+ halbtc8821aCsr2ant_ActionPanEdrA2dp(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); -+ halbtc8821aCsr2ant_ActionPanEdrHid(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); -+ halbtc8821aCsr2ant_ActionHidA2dpPanEdr(pBtCoexist); -+ break; -+ case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); -+ halbtc8821aCsr2ant_ActionHidA2dp(pBtCoexist); -+ break; -+ default: -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); -+ halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); -+ break; -+ } -+ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; -+ } -+ } -+} -+ -+ -+ -+//============================================================ -+// work around function start with wa_halbtc8821aCsr2ant_ -+//============================================================ -+//============================================================ -+// extern function start with EXhalbtc8821aCsr2ant_ -+//============================================================ -+VOID -+EXhalbtc8821aCsr2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ u4Byte u4Tmp=0; -+ u2Byte u2Tmp=0; -+ u1Byte u1Tmp=0; -+ u1Byte H2C_Parameter[2] ={0}; -+ -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); -+ -+ if(bWifiOnly) -+ return; -+ -+ //if(bBackUp) -+ { -+ // backup rf 0x1e value -+ pCoexDm->btRf0x1eBackup = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); -+ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); -+ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); -+ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); -+ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); -+ pCoexDm->backupAmpduMaxNum = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x4ca); -+ } -+ -+ #if 0 /* REMOVE */ -+ // 0x790[5:0]=0x5 -+ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); -+ u1Tmp &= 0xc0; -+ u1Tmp |= 0x5; -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); -+ #endif -+ -+ //Antenna config -+ halbtc8821aCsr2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); -+ -+ // PTA parameter -+ halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); -+ -+ // Enable counter statistics -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA -+ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); -+ -+ #if 0 /* REMOVE */ -+ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); -+ #endif -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); -+ -+ halbtc8821aCsr2ant_InitCoexDm(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ pu1Byte cliBuf=pBtCoexist->cliBuf; -+ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; -+ u4Byte u4Tmp[4]; -+ u4Byte fwVer=0, btPatchVer=0; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); -+ CL_PRINTF(cliBuf); -+ -+ if(pBtCoexist->bManualControl) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); -+ CL_PRINTF(cliBuf); -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ -+ GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ -+ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], -+ pCoexDm->wifiChnlInfo[2]); -+ CL_PRINTF(cliBuf); -+ -+ // wifi status -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); -+ CL_PRINTF(cliBuf); -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ -+ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), -+ pCoexSta->btRssi, pCoexSta->btRetryCnt); -+ CL_PRINTF(cliBuf); -+ -+ if(pStackInfo->bProfileNotified) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ -+ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); -+ } -+ -+ btInfoExt = pCoexSta->btInfoExt; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ -+ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); -+ CL_PRINTF(cliBuf); -+ -+ for(i=0; ibtInfoC2hCnt[i]) -+ { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821aCsr2Ant[i], \ -+ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], -+ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], -+ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], -+ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ -+ // Sw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ -+ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ -+ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); -+ CL_PRINTF(cliBuf); -+ -+ // Fw mechanism -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); -+ CL_PRINTF(cliBuf); -+ -+ if(!pBtCoexist->bManualControl) -+ { -+ psTdmaCase = pCoexDm->curPsTdma; -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ -+ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], -+ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], -+ pCoexDm->psTdmaPara[4], psTdmaCase); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ -+ pCoexDm->bCurDecBtPwr, pCoexDm->bCurIgnoreWlanAct); -+ CL_PRINTF(cliBuf); -+ } -+ -+ // Hw setting -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ -+ pCoexDm->btRf0x1eBackup); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", "0x778 (W_Act)/ 0x6cc (CoTab Sel)", \ -+ u1Tmp[0], u1Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x8db(ADC)/0xc5b[29:25](DAC)", \ -+ ((u1Tmp[0]&0x60)>>5), ((u1Tmp[1]&0x3e)>>1)); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", \ -+ u4Tmp[0]&0xff, ((u4Tmp[0]&0x30000000)>>28)); -+ CL_PRINTF(cliBuf); -+ -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \ -+ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa0a); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(DIG)/0xa0a(CCK-TH)", \ -+ u4Tmp[0], u1Tmp[0]); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48); -+ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); -+ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "OFDM-FA/ CCK-FA", \ -+ u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1] ); -+ CL_PRINTF(cliBuf); -+ -+ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); -+ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); -+ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8", \ -+ u4Tmp[0], u4Tmp[1], u4Tmp[2]); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hi-pri Rx/Tx)", \ -+ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri Rx/Tx)", \ -+ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+VOID -+EXhalbtc8821aCsr2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_IPS_ENTER == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); -+ pCoexSta->bUnderIps = TRUE; -+ halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); -+ } -+ else if(BTC_IPS_LEAVE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); -+ pCoexSta->bUnderIps = FALSE; -+ //halbtc8821aCsr2ant_InitCoexDm(pBtCoexist); -+ } -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_LPS_ENABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); -+ pCoexSta->bUnderLps = TRUE; -+ } -+ else if(BTC_LPS_DISABLE == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); -+ pCoexSta->bUnderLps = FALSE; -+ } -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_SCAN_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); -+ } -+ else if(BTC_SCAN_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(BTC_ASSOCIATE_START == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); -+ } -+ else if(BTC_ASSOCIATE_FINISH == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ u1Byte H2C_Parameter[3] ={0}; -+ u4Byte wifiBw; -+ u1Byte wifiCentralChnl; -+ -+ if(BTC_MEDIA_CONNECT == type) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); -+ } -+ -+ // only 2.4G we need to inform bt the chnl mask -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); -+ if( (BTC_MEDIA_CONNECT == type) && -+ (wifiCentralChnl <= 14) ) -+ { -+ H2C_Parameter[0] = 0x1; -+ H2C_Parameter[1] = wifiCentralChnl; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ if(BTC_WIFI_BW_HT40 == wifiBw) -+ H2C_Parameter[2] = 0x30; -+ else -+ H2C_Parameter[2] = 0x20; -+ } -+ -+ #if 0 /* REMOVE */ -+ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; -+ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; -+ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; -+ -+ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", -+ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); -+ -+ rtw_warn_on(_BTCOEX_CSR); -+ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); -+ #endif -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ) -+{ -+ if(type == BTC_PACKET_DHCP) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); -+ } -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ) -+{ -+ u1Byte btInfo=0; -+ u1Byte i, rspSource=0; -+ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; -+ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiUnder5G=FALSE; -+ -+ pCoexSta->bC2hBtInfoReqSent = FALSE; -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); -+ -+ rspSource = tmpBuf[0]&0xf; -+ if(rspSource >= BT_INFO_SRC_8821A_CSR_2ANT_MAX) -+ rspSource = BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW; -+ pCoexSta->btInfoC2hCnt[rspSource]++; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); -+ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; -+ if(i == 1) -+ btInfo = tmpBuf[i]; -+ if(i == length-1) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); -+ } -+ else -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); -+ } -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); -+ if(BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW != rspSource) -+ { -+ pCoexSta->btRetryCnt = // [3:0] -+ pCoexSta->btInfoC2h[rspSource][2]&0xf; -+ -+ pCoexSta->btRssi = -+ pCoexSta->btInfoC2h[rspSource][3]*2+10; -+ -+ pCoexSta->btInfoExt = -+ pCoexSta->btInfoC2h[rspSource][4]; -+ -+ #if 0 /* REMOVE */ -+ // Here we need to resend some wifi info to BT -+ // because bt is reset and loss of the info. -+ if( (pCoexSta->btInfoExt & BIT1) ) -+ { -+ -+ if(bWifiConnected) -+ { -+ EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); -+ } -+ else -+ { -+ EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+ } -+ } -+ #endif -+ -+ #if 0 /* REMOVE */ -+ if(!pBtCoexist->bManualControl && !bWifiUnder5G) -+ { -+ if( (pCoexSta->btInfoExt&BIT3) ) -+ { -+ if(bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); -+ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); -+ } -+ } -+ else -+ { -+ // BT already NOT ignore Wlan active, do nothing here. -+ if(!bWifiConnected) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT to ignore Wlan active!!\n")); -+ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+ } -+ } -+ #endif -+ -+ #if 0 /* REMOVE */ -+ if( (pCoexSta->btInfoExt & BIT4) ) -+ { -+ // BT auto report already enabled, do nothing -+ } -+ else -+ { -+ halbtc8821aCsr2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+ #endif -+ } -+ -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); -+ -+ if(btInfo == BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists but no busy -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE; -+ } -+ else if(btInfo & BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists and some link is busy -+ { -+ pCoexSta->bBtLinkExist = TRUE; -+ -+ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_FTP) -+ pCoexSta->bPanExist = TRUE; -+ else -+ pCoexSta->bPanExist = FALSE; -+ -+ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_A2DP) -+ pCoexSta->bA2dpExist = TRUE; -+ else -+ pCoexSta->bA2dpExist = FALSE; -+ -+ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_HID) -+ pCoexSta->bHidExist = TRUE; -+ else -+ pCoexSta->bHidExist = FALSE; -+ -+ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO) -+ pCoexSta->bScoExist = TRUE; -+ else -+ pCoexSta->bScoExist = FALSE; -+ -+ if (pCoexSta->btInfoExt & 0x80) -+ pCoexSta->bSlave = TRUE; //Slave -+ else -+ pCoexSta->bSlave = FALSE; //Master -+ -+ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; -+ } -+ else -+ { -+ pCoexSta->bBtLinkExist = FALSE; -+ pCoexSta->bPanExist = FALSE; -+ pCoexSta->bA2dpExist = FALSE; -+ pCoexSta->bSlave = FALSE; -+ pCoexSta->bHidExist = FALSE; -+ pCoexSta->bScoExist = FALSE; -+ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_IDLE; -+ } -+ -+ if(bBtHsOn) -+ { -+ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; -+ } -+ -+ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE) -+ { -+ pCoexSta->bC2hBtInquiryPage = TRUE; -+ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; -+ } -+ else -+ { -+ pCoexSta->bC2hBtInquiryPage = FALSE; -+ } -+ -+ -+ if(BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) -+ { -+ bBtBusy = TRUE; -+ } -+ else -+ { -+ bBtBusy = FALSE; -+ } -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); -+ -+ if(BT_8821A_CSR_2ANT_BT_STATUS_IDLE != pCoexDm->btStatus) -+ { -+ bLimitedDig = TRUE; -+ } -+ else -+ { -+ bLimitedDig = FALSE; -+ } -+ pCoexDm->bLimitedDig = bLimitedDig; -+ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); -+ -+ halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist); -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); -+ -+ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ) -+{ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); -+ -+ if(BTC_WIFI_PNP_SLEEP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); -+ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); -+ } -+ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) -+ { -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); -+ } -+} -+ -+VOID -+EXhalbtc8821aCsr2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ) -+{ -+ static u1Byte disVerInfoCnt=0; -+ u4Byte fwVer=0, btPatchVer=0; -+ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; -+ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; -+ -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); -+ -+ if(disVerInfoCnt <= 5) -+ { -+ disVerInfoCnt += 1; -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", -+ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", -+ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); -+ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", -+ GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer)); -+ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); -+ } -+ -+ //halbtc8821aCsr2ant_QueryBtInfo(pBtCoexist); -+ //halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist); -+ halbtc8821aCsr2ant_MonitorBtCtr(pBtCoexist); -+ halbtc8821aCsr2ant_MonitorBtEnableDisable(pBtCoexist); -+} -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for RTL8821A_CSR_CSR Co-exist mechanism ++// ++// History ++// 2012/08/22 Cosa first check in. ++// 2012/11/14 Cosa Revise for 8821A_CSR 2Ant out sourcing. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtcCsr8821a2Ant.tmh" ++#endif ++ ++#define _BTCOEX_CSR 1 ++ ++#ifndef rtw_warn_on ++ #define rtw_warn_on(condition) do {} while (0) ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8821A_CSR_2ANT GLCoexDm8821aCsr2Ant; ++static PCOEX_DM_8821A_CSR_2ANT pCoexDm=&GLCoexDm8821aCsr2Ant; ++static COEX_STA_8821A_CSR_2ANT GLCoexSta8821aCsr2Ant; ++static PCOEX_STA_8821A_CSR_2ANT pCoexSta=&GLCoexSta8821aCsr2Ant; ++ ++const char *const GLBtInfoSrc8821aCsr2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8821aCsr2Ant=20140901; ++u4Byte GLCoexVer8821aCsr2Ant=0x51; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8821aCsr2ant_ ++//============================================================ ++u1Byte ++halbtc8821aCsr2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8821aCsr2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8821aCsr2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ } ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x5d); ++} ++ ++VOID ++halbtc8821aCsr2ant_UpdateRaMask( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte disRateMask ++ ) ++{ ++ pCoexDm->curRaMask = disRateMask; ++ ++ if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); ++ } ++ pCoexDm->preRaMask = pCoexDm->curRaMask; ++} ++ ++VOID ++halbtc8821aCsr2ant_AutoRateFallbackRetry( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiUnderBMode=FALSE; ++ ++ pCoexDm->curArfrType = type; ++ ++ if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) ++ { ++ switch(pCoexDm->curArfrType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); ++ break; ++ case 1: ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ if(bWifiUnderBMode) ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preArfrType = pCoexDm->curArfrType; ++} ++ ++VOID ++halbtc8821aCsr2ant_RetryLimit( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curRetryLimitType = type; ++ ++ if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) ++ { ++ switch(pCoexDm->curRetryLimitType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); ++ break; ++ case 1: // retry limit=8 ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; ++} ++ ++VOID ++halbtc8821aCsr2ant_AmpduMaxTime( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduTimeType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) ++ { ++ switch(pCoexDm->curAmpduTimeType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); ++ break; ++ case 1: // AMPDU timw = 0x38 * 32us ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); ++ break; ++ case 2: ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x17); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; ++} ++ ++VOID ++halbtc8821aCsr2Ant_AmpduMaxNum( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexDm->curAmpduNumType = type; ++ ++ if( bForceExec || (pCoexDm->preAmpduNumType != pCoexDm->curAmpduNumType)) ++ { ++ switch(pCoexDm->curAmpduNumType) ++ { ++ case 0: // normal mode ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, pCoexDm->backupAmpduMaxNum); ++ break; ++ case 1: ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x0808); ++ break; ++ case 2: ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x1f1f); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pCoexDm->preAmpduNumType = pCoexDm->curAmpduNumType; ++ ++} ++ ++VOID ++halbtc8821aCsr2ant_LimitedTx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte raMaskType, ++ IN u1Byte arfrType, ++ IN u1Byte retryLimitType, ++ IN u1Byte ampduTimeType, ++ IN u1Byte ampduNumType ++ ) ++{ ++ switch(raMaskType) ++ { ++ case 0: // normal mode ++ halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); ++ break; ++ case 1: // disable cck 1/2 ++ halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); ++ break; ++ case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 ++ halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8821aCsr2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); ++ halbtc8821aCsr2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); ++ halbtc8821aCsr2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); ++ halbtc8821aCsr2Ant_AmpduMaxNum(pBtCoexist, bForceExec, ampduNumType); ++} ++ ++ ++ ++VOID ++halbtc8821aCsr2ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++VOID ++halbtc8821aCsr2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ rtw_warn_on(_BTCOEX_CSR); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++u1Byte ++halbtc8821aCsr2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ //sync StackInfo with BT firmware and stack ++ pStackInfo->bHidExist = pCoexSta->bHidExist; ++ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pStackInfo->bScoExist = pCoexSta->bScoExist; ++ pStackInfo->bPanExist = pCoexSta->bPanExist; ++ pStackInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pStackInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(pStackInfo->numOfHid >= 2) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++BOOLEAN ++halbtc8821aCsr2ant_NeedToDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bRet=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bWifiConnected=FALSE; ++ s4Byte btHsRssi=0; ++ u1Byte btRssiState; ++ ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn)) ++ return FALSE; ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected)) ++ return FALSE; ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi)) ++ return FALSE; ++ ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ if(bWifiConnected) ++ { ++ if(bBtHsOn) ++ { ++ if(btHsRssi > 37) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for HS mode!!\n")); ++ bRet = TRUE; ++ } ++ } ++ else ++ { ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for Wifi is connected!!\n")); ++ bRet = TRUE; ++ } ++ } ++ } ++ ++ return bRet; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821aCsr2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bDecBtPwr ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bDecBtPwr) ++ { ++ H2C_Parameter[0] |= BIT1; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power : %s, FW write 0x62=0x%x\n", ++ (bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0])); ++ ++ rtw_warn_on(_BTCOEX_CSR); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821aCsr2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDecBtPwr ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power = %s\n", ++ (bForceExec? "force to":""), ((bDecBtPwr)? "ON":"OFF"))); ++ pCoexDm->bCurDecBtPwr = bDecBtPwr; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr) ++ return; ++ } ++ ++ /* TODO: may CSR consider to decrease BT power? */ ++ //halbtc8821aCsr2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr); ++ ++ pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ rtw_warn_on(_BTCOEX_CSR); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821aCsr2ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ //halbtc8821aCsr2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8821aCsr2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8821aCsr2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8821aCsr2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!") )); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8821aCsr2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetDacSwingReg( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte level ++ ) ++{ ++ u1Byte val=(u1Byte)level; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val); ++} ++ ++VOID ++halbtc8821aCsr2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, 0x18); ++ } ++} ++ ++ ++VOID ++halbtc8821aCsr2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8821aCsr2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1); ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8821aCsr2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28F4B); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x10AB2); ++ rssiAdjustVal = 8; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x2884B); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x104B2); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++VOID ++halbtc8821aCsr2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8821aCsr2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8821aCsr2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8821aCsr2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ rtw_warn_on(_BTCOEX_CSR); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8821aCsr2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ //halbtc8821aCsr2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8821aCsr2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = byte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = byte5; ++ H2C_Parameter[5] = 0x01; ++ ++ pCoexDm->psTdmaPara[0] = byte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = byte5; ++ pCoexDm->psTdmaPara[5] = 0x01; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(6bytes)=0x%x%08x%02x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4], H2C_Parameter[5])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8821aCsr2ant_SwMechanism1( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bShrinkRxLPF, ++ IN BOOLEAN bLowPenaltyRA, ++ IN BOOLEAN bLimitedDIG, ++ IN BOOLEAN bBTLNAConstrain ++ ) ++{ ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 ++ { ++ if (bShrinkRxLPF) ++ bShrinkRxLPF = FALSE; ++ } ++ ++ halbtc8821aCsr2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); ++ halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++ ++ //no limited DIG ++ //halbtc8821aCsr2ant_SetBtLnaConstrain(pBtCoexist, NORMAL_EXEC, bBTLNAConstrain); ++} ++ ++VOID ++halbtc8821aCsr2ant_SwMechanism2( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAGCTableShift, ++ IN BOOLEAN bADCBackOff, ++ IN BOOLEAN bSWDACSwing, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ //halbtc8821aCsr2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); ++ halbtc8821aCsr2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); ++ halbtc8821aCsr2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); ++} ++ ++VOID ++halbtc8821aCsr2ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ if(bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &=~BIT23; ++ u4Tmp |= BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x974, 0x3ff); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ //tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix ++ H2C_Parameter[0] = 1; ++ H2C_Parameter[1] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ else ++ { ++ //tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix ++ H2C_Parameter[0] = 0; ++ H2C_Parameter[1] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ } ++ ++ // ext switch setting ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); ++ break; ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ case 1: ++ default: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ case 2: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ break; ++ case 3: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 4: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); ++ break; ++ case 5: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ break; ++ case 6: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ break; ++ case 7: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 8: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 9: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ case 10: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ break; ++ case 11: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); ++ break; ++ case 12: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 13: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ break; ++ case 14: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ break; ++ case 15: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); ++ break; ++ case 16: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); ++ break; ++ case 17: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 22: //ad2dp master ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x11, 0x11, 0x21, 0x10); ++ break; ++ case 23: //a2dp slave ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x12, 0x12, 0x20, 0x10); ++ break; ++ case 71: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ case 0: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8821aCsr2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ // sw all off ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); ++} ++ ++VOID ++halbtc8821aCsr2ant_CoexUnder5G( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); ++ ++ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); ++} ++ ++VOID ++halbtc8821aCsr2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, FALSE); ++ ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8821aCsr2ant_BtInquiryPage( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bLowPwrDisable=TRUE; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++} ++BOOLEAN ++halbtc8821aCsr2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected && ++ BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT IPS!!\n")); ++ ++ ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT IPS!!\n")); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT IPS!!\n")); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT LPS!!\n")); ++ ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ bCommon = TRUE; ++ } ++ else if(bWifiConnected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT LPS!!\n")); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT LPS!!\n")); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ bCommon = TRUE; ++ } ++ else if(!bWifiConnected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT Busy!!\n")); ++ ++ //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT Busy!!\n")); ++ bCommon = FALSE; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT Busy!!\n")); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ bCommon = TRUE; ++ } ++ ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE); ++ } ++ ++ if (bCommon == TRUE) ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); ++ ++ return bCommon; ++} ++VOID ++halbtc8821aCsr2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(pCoexDm->bResetTdmaAdjust) ++ { ++ pCoexDm->bResetTdmaAdjust = FALSE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++ ++ // when halbtc8821aCsr2ant_TdmaDurationAdjust() is called, fw dac swing is included in the function. ++ //if(pCoexDm->psTdmaDuAdjType == 71) ++ // halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xc); //Skip because A2DP get worse at HT40 ++ //else ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x6); ++} ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8821aCsr2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,btRssiState; ++ u4Byte wifiBw; ++ ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 1, 0, 2, 0); ++ ++ if(pCoexSta->bSlave == FALSE) ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x4); ++ else ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x2); ++ ++/* ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3); ++ } ++ else //for SCO quality & wifi performance balance at 11n mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ ++ // fw mechanism ++ //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++*/ ++} ++ ++ ++VOID ++halbtc8821aCsr2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8821aCsr2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); ++ ++ if(pCoexSta->bSlave == FALSE) ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 1); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x0c); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 2); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18); ++ } ++ ++/* ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ //fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust() ++ //halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++*/ ++} ++ ++VOID ++halbtc8821aCsr2ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2,35, 0); ++ ++ //fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust() ++ //halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++ ++//PAN(HS) only ++VOID ++halbtc8821aCsr2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8821aCsr2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ }; ++ } ++ else ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8821aCsr2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); ++ ++ if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++//Allen halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++//Allen halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); ++ ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ // fw mechanism ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++// halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ ++ } ++ else //a2dp edr rate ++ { ++//Allen halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8821aCsr2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bWifiUnder5G=FALSE; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Manual control!!!\n")); ++ return; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ ++ if(bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n")); ++ halbtc8821aCsr2ant_CoexUnder5G(pBtCoexist); ++ return; ++ } ++ ++ //if(pStackInfo->bProfileNotified) ++ { ++ algorithm = halbtc8821aCsr2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bC2hBtInquiryPage && (BT_8821A_CSR_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8821aCsr2ant_BtInquiryPage(pBtCoexist); ++ return; ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ ++ if(halbtc8821aCsr2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bResetTdmaAdjust = TRUE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bResetTdmaAdjust = TRUE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8821A_CSR_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8821aCsr2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8821aCsr2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8821aCsr2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); ++ halbtc8821aCsr2ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8821aCsr2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8821aCsr2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8821aCsr2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8821aCsr2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8821aCsr2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8821aCsr2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++ } ++} ++ ++ ++ ++//============================================================ ++// work around function start with wa_halbtc8821aCsr2ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8821aCsr2ant_ ++//============================================================ ++VOID ++EXhalbtc8821aCsr2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ if(bWifiOnly) ++ return; ++ ++ //if(bBackUp) ++ { ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); ++ pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); ++ pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); ++ pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); ++ pCoexDm->backupAmpduMaxNum = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x4ca); ++ } ++ ++ #if 0 /* REMOVE */ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ #endif ++ ++ //Antenna config ++ halbtc8821aCsr2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); ++ ++ // PTA parameter ++ halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ ++ #if 0 /* REMOVE */ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++ #endif ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8821aCsr2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821aCsr2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->bCurDecBtPwr, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", "0x778 (W_Act)/ 0x6cc (CoTab Sel)", \ ++ u1Tmp[0], u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x8db(ADC)/0xc5b[29:25](DAC)", \ ++ ((u1Tmp[0]&0x60)>>5), ((u1Tmp[1]&0x3e)>>1)); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", \ ++ u4Tmp[0]&0xff, ((u4Tmp[0]&0x30000000)>>28)); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \ ++ u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa0a); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(DIG)/0xa0a(CCK-TH)", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "OFDM-FA/ CCK-FA", \ ++ u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1] ); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hi-pri Rx/Tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri Rx/Tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8821aCsr2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ //halbtc8821aCsr2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ #if 0 /* REMOVE */ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ rtw_warn_on(_BTCOEX_CSR); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++ #endif ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiUnder5G=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8821A_CSR_2ANT_MAX) ++ rspSource = BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ #if 0 /* REMOVE */ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if( (pCoexSta->btInfoExt & BIT1) ) ++ { ++ ++ if(bWifiConnected) ++ { ++ EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ #endif ++ ++ #if 0 /* REMOVE */ ++ if(!pBtCoexist->bManualControl && !bWifiUnder5G) ++ { ++ if( (pCoexSta->btInfoExt&BIT3) ) ++ { ++ if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ if(!bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT to ignore Wlan active!!\n")); ++ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++ } ++ } ++ #endif ++ ++ #if 0 /* REMOVE */ ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8821aCsr2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++ #endif ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(btInfo == BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ else if(btInfo & BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists and some link is busy ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ ++ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ ++ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ ++ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ ++ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ ++ if (pCoexSta->btInfoExt & 0x80) ++ pCoexSta->bSlave = TRUE; //Slave ++ else ++ pCoexSta->bSlave = FALSE; //Master ++ ++ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; ++ } ++ else ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bSlave = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_IDLE; ++ } ++ ++ if(bBtHsOn) ++ { ++ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; ++ } ++ ++ if(btInfo & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE) ++ { ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; ++ } ++ else ++ { ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ } ++ ++ ++ if(BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ++ { ++ bBtBusy = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ if(BT_8821A_CSR_2ANT_BT_STATUS_IDLE != pCoexDm->btStatus) ++ { ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bLimitedDig = FALSE; ++ } ++ pCoexDm->bLimitedDig = bLimitedDig; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ ++ halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ } ++} ++ ++VOID ++EXhalbtc8821aCsr2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(disVerInfoCnt <= 5) ++ { ++ disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ } ++ ++ //halbtc8821aCsr2ant_QueryBtInfo(pBtCoexist); ++ //halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist); ++ halbtc8821aCsr2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8821aCsr2ant_MonitorBtEnableDisable(pBtCoexist); ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821aCsr2Ant.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821aCsr2Ant.h new file mode 100644 -index 000000000..457b5cbb6 +index 0000000..aeebf82 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtc8821aCsr2Ant.h @@ -0,0 +1,207 @@ -+//=========================================== -+// The following is for 8821A_CSR 2Ant BT Co-exist definition -+//=========================================== -+#define BT_INFO_8821A_CSR_2ANT_B_FTP BIT7 -+#define BT_INFO_8821A_CSR_2ANT_B_A2DP BIT6 -+#define BT_INFO_8821A_CSR_2ANT_B_HID BIT5 -+#define BT_INFO_8821A_CSR_2ANT_B_SCO_BUSY BIT4 -+#define BT_INFO_8821A_CSR_2ANT_B_ACL_BUSY BIT3 -+#define BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE BIT2 -+#define BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO BIT1 -+#define BT_INFO_8821A_CSR_2ANT_B_CONNECTION BIT0 -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT 2 -+ -+typedef enum _BT_INFO_SRC_8821A_CSR_2ANT{ -+ BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8821A_CSR_2ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8821A_CSR_2ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8821A_CSR_2ANT_MAX -+}BT_INFO_SRC_8821A_CSR_2ANT,*PBT_INFO_SRC_8821A_CSR_2ANT; -+ -+typedef enum _BT_8821A_CSR_2ANT_BT_STATUS{ -+ BT_8821A_CSR_2ANT_BT_STATUS_IDLE = 0x0, -+ BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE = 0x2, -+ BT_8821A_CSR_2ANT_BT_STATUS_MAX -+}BT_8821A_CSR_2ANT_BT_STATUS,*PBT_8821A_CSR_2ANT_BT_STATUS; -+ -+typedef enum _BT_8821A_CSR_2ANT_COEX_ALGO{ -+ BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8821A_CSR_2ANT_COEX_ALGO_SCO = 0x1, -+ BT_8821A_CSR_2ANT_COEX_ALGO_HID = 0x2, -+ BT_8821A_CSR_2ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8821A_CSR_2ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8821A_CSR_2ANT_COEX_ALGO_MAX = 0xb, -+}BT_8821A_CSR_2ANT_COEX_ALGO,*PBT_8821A_CSR_2ANT_COEX_ALGO; -+ -+typedef struct _COEX_DM_8821A_CSR_2ANT{ -+ // fw mechanism -+ BOOLEAN bPreDecBtPwr; -+ BOOLEAN bCurDecBtPwr; -+ u1Byte preFwDacSwingLvl; -+ u1Byte curFwDacSwingLvl; -+ BOOLEAN bCurIgnoreWlanAct; -+ BOOLEAN bPreIgnoreWlanAct; -+ u1Byte prePsTdma; -+ u1Byte curPsTdma; -+ u1Byte psTdmaPara[6]; -+ u1Byte psTdmaDuAdjType; -+ BOOLEAN bResetTdmaAdjust; -+ BOOLEAN bPrePsTdmaOn; -+ BOOLEAN bCurPsTdmaOn; -+ BOOLEAN bPreBtAutoReport; -+ BOOLEAN bCurBtAutoReport; -+ -+ // sw mechanism -+ BOOLEAN bPreRfRxLpfShrink; -+ BOOLEAN bCurRfRxLpfShrink; -+ u4Byte btRf0x1eBackup; -+ BOOLEAN bPreLowPenaltyRa; -+ BOOLEAN bCurLowPenaltyRa; -+ BOOLEAN bPreDacSwingOn; -+ u4Byte preDacSwingLvl; -+ BOOLEAN bCurDacSwingOn; -+ u4Byte curDacSwingLvl; -+ BOOLEAN bPreAdcBackOff; -+ BOOLEAN bCurAdcBackOff; -+ BOOLEAN bPreAgcTableEn; -+ BOOLEAN bCurAgcTableEn; -+ u4Byte preVal0x6c0; -+ u4Byte curVal0x6c0; -+ u4Byte preVal0x6c4; -+ u4Byte curVal0x6c4; -+ u4Byte preVal0x6c8; -+ u4Byte curVal0x6c8; -+ u1Byte preVal0x6cc; -+ u1Byte curVal0x6cc; -+ BOOLEAN bLimitedDig; -+ -+ u4Byte preRaMask; -+ u4Byte curRaMask; -+ -+ u1Byte curAmpduNumType; -+ u1Byte preAmpduNumType; -+ u2Byte backupAmpduMaxNum; -+ -+ u1Byte curAmpduTimeType; -+ u1Byte preAmpduTimeType; -+ u1Byte backupAmpduMaxTime; -+ -+ u1Byte curArfrType; -+ u1Byte preArfrType; -+ u4Byte backupArfrCnt1; -+ u4Byte backupArfrCnt2; -+ -+ u1Byte curRetryLimitType; -+ u1Byte preRetryLimitType; -+ u2Byte backupRetryLimit; -+ -+ // algorithm related -+ u1Byte preAlgorithm; -+ u1Byte curAlgorithm; -+ u1Byte btStatus; -+ u1Byte wifiChnlInfo[3]; -+} COEX_DM_8821A_CSR_2ANT, *PCOEX_DM_8821A_CSR_2ANT; -+ -+typedef struct _COEX_STA_8821A_CSR_2ANT{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bSlave; -+ BOOLEAN bHidExist; -+ BOOLEAN bPanExist; -+ -+ BOOLEAN bUnderLps; -+ BOOLEAN bUnderIps; -+ u4Byte highPriorityTx; -+ u4Byte highPriorityRx; -+ u4Byte lowPriorityTx; -+ u4Byte lowPriorityRx; -+ u1Byte btRssi; -+ u1Byte preBtRssiState; -+ u1Byte preWifiRssiState[4]; -+ BOOLEAN bC2hBtInfoReqSent; -+ u1Byte btInfoC2h[BT_INFO_SRC_8821A_CSR_2ANT_MAX][10]; -+ u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_CSR_2ANT_MAX]; -+ BOOLEAN bC2hBtInquiryPage; -+ u1Byte btRetryCnt; -+ u1Byte btInfoExt; -+}COEX_STA_8821A_CSR_2ANT, *PCOEX_STA_8821A_CSR_2ANT; -+ -+//=========================================== -+// The following is interface which will notify coex module. -+//=========================================== -+VOID -+EXhalbtc8821aCsr2ant_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821aCsr2ant_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtc8821aCsr2ant_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821aCsr2ant_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821aCsr2ant_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821aCsr2ant_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821aCsr2ant_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821aCsr2ant_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821aCsr2ant_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtc8821aCsr2ant_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtc8821aCsr2ant_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821aCsr2ant_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtc8821aCsr2ant_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtc8821aCsr2ant_DisplayCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ ++//=========================================== ++// The following is for 8821A_CSR 2Ant BT Co-exist definition ++//=========================================== ++#define BT_INFO_8821A_CSR_2ANT_B_FTP BIT7 ++#define BT_INFO_8821A_CSR_2ANT_B_A2DP BIT6 ++#define BT_INFO_8821A_CSR_2ANT_B_HID BIT5 ++#define BT_INFO_8821A_CSR_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8821A_CSR_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8821A_CSR_2ANT_B_CONNECTION BIT0 ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT 2 ++ ++typedef enum _BT_INFO_SRC_8821A_CSR_2ANT{ ++ BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8821A_CSR_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8821A_CSR_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8821A_CSR_2ANT_MAX ++}BT_INFO_SRC_8821A_CSR_2ANT,*PBT_INFO_SRC_8821A_CSR_2ANT; ++ ++typedef enum _BT_8821A_CSR_2ANT_BT_STATUS{ ++ BT_8821A_CSR_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8821A_CSR_2ANT_BT_STATUS_MAX ++}BT_8821A_CSR_2ANT_BT_STATUS,*PBT_8821A_CSR_2ANT_BT_STATUS; ++ ++typedef enum _BT_8821A_CSR_2ANT_COEX_ALGO{ ++ BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8821A_CSR_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8821A_CSR_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8821A_CSR_2ANT_COEX_ALGO_MAX = 0xb, ++}BT_8821A_CSR_2ANT_COEX_ALGO,*PBT_8821A_CSR_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8821A_CSR_2ANT{ ++ // fw mechanism ++ BOOLEAN bPreDecBtPwr; ++ BOOLEAN bCurDecBtPwr; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[6]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ u4Byte preRaMask; ++ u4Byte curRaMask; ++ ++ u1Byte curAmpduNumType; ++ u1Byte preAmpduNumType; ++ u2Byte backupAmpduMaxNum; ++ ++ u1Byte curAmpduTimeType; ++ u1Byte preAmpduTimeType; ++ u1Byte backupAmpduMaxTime; ++ ++ u1Byte curArfrType; ++ u1Byte preArfrType; ++ u4Byte backupArfrCnt1; ++ u4Byte backupArfrCnt2; ++ ++ u1Byte curRetryLimitType; ++ u1Byte preRetryLimitType; ++ u2Byte backupRetryLimit; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++} COEX_DM_8821A_CSR_2ANT, *PCOEX_DM_8821A_CSR_2ANT; ++ ++typedef struct _COEX_STA_8821A_CSR_2ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bSlave; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8821A_CSR_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_CSR_2ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++}COEX_STA_8821A_CSR_2ANT, *PCOEX_STA_8821A_CSR_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8821aCsr2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821aCsr2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8821aCsr2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821aCsr2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821aCsr2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821aCsr2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821aCsr2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821aCsr2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821aCsr2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8821aCsr2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8821aCsr2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821aCsr2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8821aCsr2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8821aCsr2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtcOutSrc.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtcOutSrc.h new file mode 100644 -index 000000000..1027bf4ff +index 0000000..6dbdcec --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/HalBtcOutSrc.h @@ -0,0 +1,747 @@ -+#ifndef __HALBTC_OUT_SRC_H__ -+#define __HALBTC_OUT_SRC_H__ -+ -+#define NORMAL_EXEC FALSE -+#define FORCE_EXEC TRUE -+ -+#define BTC_RF_OFF 0x0 -+#define BTC_RF_ON 0x1 -+ -+#define BTC_RF_A 0x0 -+#define BTC_RF_B 0x1 -+#define BTC_RF_C 0x2 -+#define BTC_RF_D 0x3 -+ -+#define BTC_SMSP SINGLEMAC_SINGLEPHY -+#define BTC_DMDP DUALMAC_DUALPHY -+#define BTC_DMSP DUALMAC_SINGLEPHY -+#define BTC_MP_UNKNOWN 0xff -+ -+#define BT_COEX_ANT_TYPE_PG 0 -+#define BT_COEX_ANT_TYPE_ANTDIV 1 -+#define BT_COEX_ANT_TYPE_DETECTED 2 -+ -+#define BTC_MIMO_PS_STATIC 0 // 1ss -+#define BTC_MIMO_PS_DYNAMIC 1 // 2ss -+ -+#define BTC_RATE_DISABLE 0 -+#define BTC_RATE_ENABLE 1 -+ -+// single Antenna definition -+#define BTC_ANT_PATH_WIFI 0 -+#define BTC_ANT_PATH_BT 1 -+#define BTC_ANT_PATH_PTA 2 -+// dual Antenna definition -+#define BTC_ANT_WIFI_AT_MAIN 0 -+#define BTC_ANT_WIFI_AT_AUX 1 -+// coupler Antenna definition -+#define BTC_ANT_WIFI_AT_CPL_MAIN 0 -+#define BTC_ANT_WIFI_AT_CPL_AUX 1 -+ -+typedef enum _BTC_POWERSAVE_TYPE{ -+ BTC_PS_WIFI_NATIVE = 0, // wifi original power save behavior -+ BTC_PS_LPS_ON = 1, -+ BTC_PS_LPS_OFF = 2, -+ BTC_PS_MAX -+} BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; -+ -+typedef enum _BTC_BT_REG_TYPE{ -+ BTC_BT_REG_RF = 0, -+ BTC_BT_REG_MODEM = 1, -+ BTC_BT_REG_BLUEWIZE = 2, -+ BTC_BT_REG_VENDOR = 3, -+ BTC_BT_REG_LE = 4, -+ BTC_BT_REG_MAX -+} BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; -+ -+typedef enum _BTC_CHIP_INTERFACE{ -+ BTC_INTF_UNKNOWN = 0, -+ BTC_INTF_PCI = 1, -+ BTC_INTF_USB = 2, -+ BTC_INTF_SDIO = 3, -+ BTC_INTF_MAX -+} BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; -+ -+typedef enum _BTC_CHIP_TYPE{ -+ BTC_CHIP_UNDEF = 0, -+ BTC_CHIP_CSR_BC4 = 1, -+ BTC_CHIP_CSR_BC8 = 2, -+ BTC_CHIP_RTL8723A = 3, -+ BTC_CHIP_RTL8821 = 4, -+ BTC_CHIP_RTL8723B = 5, -+ BTC_CHIP_MAX -+} BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; -+ -+// following is for wifi link status -+#define WIFI_STA_CONNECTED BIT0 -+#define WIFI_AP_CONNECTED BIT1 -+#define WIFI_HS_CONNECTED BIT2 -+#define WIFI_P2P_GO_CONNECTED BIT3 -+#define WIFI_P2P_GC_CONNECTED BIT4 -+ -+// following is for command line utility -+#define CL_SPRINTF rsprintf -+#define CL_PRINTF DCMD_Printf -+ -+ -+typedef struct _BTC_BOARD_INFO{ -+ // The following is some board information -+ u1Byte btChipType; -+ u1Byte pgAntNum; // pg ant number -+ u1Byte btdmAntNum; // ant number for btdm -+ u1Byte btdmAntNumByAntDet; // ant number for btdm after antenna detection -+ u1Byte btdmAntPos; //Bryant Add to indicate Antenna Position for (pgAntNum = 2) && (btdmAntNum =1) (DPDT+1Ant case) -+ u1Byte singleAntPath; // current used for 8723b only, 1=>s0, 0=>s1 -+ u1Byte bTfbgaPackage; //for Antenna detect threshold -+ u1Byte btdmAntDetFinish; -+ u1Byte antType; -+} BTC_BOARD_INFO, *PBTC_BOARD_INFO; -+ -+typedef enum _BTC_DBG_OPCODE{ -+ BTC_DBG_SET_COEX_NORMAL = 0x0, -+ BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, -+ BTC_DBG_SET_COEX_BT_ONLY = 0x2, -+ BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, -+ BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, -+ BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, -+ BTC_DBG_MAX -+}BTC_DBG_OPCODE,*PBTC_DBG_OPCODE; -+ -+typedef enum _BTC_RSSI_STATE{ -+ BTC_RSSI_STATE_HIGH = 0x0, -+ BTC_RSSI_STATE_MEDIUM = 0x1, -+ BTC_RSSI_STATE_LOW = 0x2, -+ BTC_RSSI_STATE_STAY_HIGH = 0x3, -+ BTC_RSSI_STATE_STAY_MEDIUM = 0x4, -+ BTC_RSSI_STATE_STAY_LOW = 0x5, -+ BTC_RSSI_MAX -+}BTC_RSSI_STATE,*PBTC_RSSI_STATE; -+#define BTC_RSSI_HIGH(_rssi_) ((_rssi_==BTC_RSSI_STATE_HIGH||_rssi_==BTC_RSSI_STATE_STAY_HIGH)? TRUE:FALSE) -+#define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_==BTC_RSSI_STATE_MEDIUM||_rssi_==BTC_RSSI_STATE_STAY_MEDIUM)? TRUE:FALSE) -+#define BTC_RSSI_LOW(_rssi_) ((_rssi_==BTC_RSSI_STATE_LOW||_rssi_==BTC_RSSI_STATE_STAY_LOW)? TRUE:FALSE) -+ -+typedef enum _BTC_WIFI_ROLE{ -+ BTC_ROLE_STATION = 0x0, -+ BTC_ROLE_AP = 0x1, -+ BTC_ROLE_IBSS = 0x2, -+ BTC_ROLE_HS_MODE = 0x3, -+ BTC_ROLE_MAX -+}BTC_WIFI_ROLE,*PBTC_WIFI_ROLE; -+ -+typedef enum _BTC_WIRELESS_FREQ{ -+ BTC_FREQ_2_4G = 0x0, -+ BTC_FREQ_5G = 0x1, -+ BTC_FREQ_MAX -+}BTC_WIRELESS_FREQ,*PBTC_WIRELESS_FREQ; -+ -+typedef enum _BTC_WIFI_BW_MODE{ -+ BTC_WIFI_BW_LEGACY = 0x0, -+ BTC_WIFI_BW_HT20 = 0x1, -+ BTC_WIFI_BW_HT40 = 0x2, -+ BTC_WIFI_BW_HT80 = 0x3, -+ BTC_WIFI_BW_HT160 = 0x4, -+ BTC_WIFI_BW_MAX -+}BTC_WIFI_BW_MODE,*PBTC_WIFI_BW_MODE; -+ -+typedef enum _BTC_WIFI_TRAFFIC_DIR{ -+ BTC_WIFI_TRAFFIC_TX = 0x0, -+ BTC_WIFI_TRAFFIC_RX = 0x1, -+ BTC_WIFI_TRAFFIC_MAX -+}BTC_WIFI_TRAFFIC_DIR,*PBTC_WIFI_TRAFFIC_DIR; -+ -+typedef enum _BTC_WIFI_PNP{ -+ BTC_WIFI_PNP_WAKE_UP = 0x0, -+ BTC_WIFI_PNP_SLEEP = 0x1, -+ BTC_WIFI_PNP_MAX -+}BTC_WIFI_PNP,*PBTC_WIFI_PNP; -+ -+typedef enum _BTC_IOT_PEER -+{ -+ BTC_IOT_PEER_UNKNOWN = 0, -+ BTC_IOT_PEER_REALTEK = 1, -+ BTC_IOT_PEER_REALTEK_92SE = 2, -+ BTC_IOT_PEER_BROADCOM = 3, -+ BTC_IOT_PEER_RALINK = 4, -+ BTC_IOT_PEER_ATHEROS = 5, -+ BTC_IOT_PEER_CISCO = 6, -+ BTC_IOT_PEER_MERU = 7, -+ BTC_IOT_PEER_MARVELL = 8, -+ BTC_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 -+ BTC_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP -+ BTC_IOT_PEER_AIRGO = 11, -+ BTC_IOT_PEER_INTEL = 12, -+ BTC_IOT_PEER_RTK_APCLIENT = 13, -+ BTC_IOT_PEER_REALTEK_81XX = 14, -+ BTC_IOT_PEER_REALTEK_WOW = 15, -+ BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, -+ BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, -+ BTC_IOT_PEER_MAX, -+}BTC_IOT_PEER, *PBTC_IOT_PEER; -+ -+//for 8723b-d cut large current issue -+typedef enum _BT_WIFI_COEX_STATE{ -+ BTC_WIFI_STAT_INIT, -+ BTC_WIFI_STAT_IQK, -+ BTC_WIFI_STAT_NORMAL_OFF, -+ BTC_WIFI_STAT_MP_OFF, -+ BTC_WIFI_STAT_NORMAL, -+ BTC_WIFI_STAT_ANT_DIV, -+ BTC_WIFI_STAT_MAX -+}BT_WIFI_COEX_STATE,*PBT_WIFI_COEX_STATE; -+ -+typedef enum _BT_ANT_TYPE{ -+ BTC_ANT_TYPE_0, -+ BTC_ANT_TYPE_1, -+ BTC_ANT_TYPE_2, -+ BTC_ANT_TYPE_3, -+ BTC_ANT_TYPE_4, -+ BTC_ANT_TYPE_MAX -+}BT_ANT_TYPE,*PBT_ANT_TYPE; -+ -+// defined for BFP_BTC_GET -+typedef enum _BTC_GET_TYPE{ -+ // type BOOLEAN -+ BTC_GET_BL_HS_OPERATION, -+ BTC_GET_BL_HS_CONNECTING, -+ BTC_GET_BL_WIFI_CONNECTED, -+ BTC_GET_BL_WIFI_BUSY, -+ BTC_GET_BL_WIFI_SCAN, -+ BTC_GET_BL_WIFI_LINK, -+ BTC_GET_BL_WIFI_ROAM, -+ BTC_GET_BL_WIFI_4_WAY_PROGRESS, -+ BTC_GET_BL_WIFI_UNDER_5G, -+ BTC_GET_BL_WIFI_AP_MODE_ENABLE, -+ BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, -+ BTC_GET_BL_WIFI_UNDER_B_MODE, -+ BTC_GET_BL_EXT_SWITCH, -+ BTC_GET_BL_WIFI_IS_IN_MP_MODE, -+ BTC_GET_BL_IS_ASUS_8723B, -+ -+ // type s4Byte -+ BTC_GET_S4_WIFI_RSSI, -+ BTC_GET_S4_HS_RSSI, -+ -+ // type u4Byte -+ BTC_GET_U4_WIFI_BW, -+ BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, -+ BTC_GET_U4_WIFI_FW_VER, -+ BTC_GET_U4_WIFI_LINK_STATUS, -+ BTC_GET_U4_BT_PATCH_VER, -+ -+ // type u1Byte -+ BTC_GET_U1_WIFI_DOT11_CHNL, -+ BTC_GET_U1_WIFI_CENTRAL_CHNL, -+ BTC_GET_U1_WIFI_HS_CHNL, -+ BTC_GET_U1_MAC_PHY_MODE, -+ BTC_GET_U1_AP_NUM, -+ BTC_GET_U1_ANT_TYPE, -+ BTC_GET_U1_IOT_PEER, -+ -+ //===== for 1Ant ====== -+ BTC_GET_U1_LPS_MODE, -+ -+ BTC_GET_MAX -+}BTC_GET_TYPE,*PBTC_GET_TYPE; -+ -+// defined for BFP_BTC_SET -+typedef enum _BTC_SET_TYPE{ -+ // type BOOLEAN -+ BTC_SET_BL_BT_DISABLE, -+ BTC_SET_BL_BT_TRAFFIC_BUSY, -+ BTC_SET_BL_BT_LIMITED_DIG, -+ BTC_SET_BL_FORCE_TO_ROAM, -+ BTC_SET_BL_TO_REJ_AP_AGG_PKT, -+ BTC_SET_BL_BT_CTRL_AGG_SIZE, -+ BTC_SET_BL_INC_SCAN_DEV_NUM, -+ BTC_SET_BL_BT_TX_RX_MASK, -+ BTC_SET_BL_MIRACAST_PLUS_BT, -+ -+ // type u1Byte -+ BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, -+ BTC_SET_U1_AGG_BUF_SIZE, -+ -+ // type trigger some action -+ BTC_SET_ACT_GET_BT_RSSI, -+ BTC_SET_ACT_AGGREGATE_CTRL, -+ //===== for 1Ant ====== -+ // type BOOLEAN -+ -+ // type u1Byte -+ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, -+ BTC_SET_U1_LPS_VAL, -+ BTC_SET_U1_RPWM_VAL, -+ // type trigger some action -+ BTC_SET_ACT_LEAVE_LPS, -+ BTC_SET_ACT_ENTER_LPS, -+ BTC_SET_ACT_NORMAL_LPS, -+ BTC_SET_ACT_DISABLE_LOW_POWER, -+ BTC_SET_ACT_UPDATE_RAMASK, -+ BTC_SET_ACT_SEND_MIMO_PS, -+ // BT Coex related -+ BTC_SET_ACT_CTRL_BT_INFO, -+ BTC_SET_ACT_CTRL_BT_COEX, -+ BTC_SET_ACT_CTRL_8723B_ANT, -+ //================= -+ BTC_SET_MAX -+}BTC_SET_TYPE,*PBTC_SET_TYPE; -+ -+typedef enum _BTC_DBG_DISP_TYPE{ -+ BTC_DBG_DISP_COEX_STATISTICS = 0x0, -+ BTC_DBG_DISP_BT_LINK_INFO = 0x1, -+ BTC_DBG_DISP_WIFI_STATUS = 0x2, -+ BTC_DBG_DISP_MAX -+}BTC_DBG_DISP_TYPE,*PBTC_DBG_DISP_TYPE; -+ -+typedef enum _BTC_NOTIFY_TYPE_IPS{ -+ BTC_IPS_LEAVE = 0x0, -+ BTC_IPS_ENTER = 0x1, -+ BTC_IPS_MAX -+}BTC_NOTIFY_TYPE_IPS,*PBTC_NOTIFY_TYPE_IPS; -+typedef enum _BTC_NOTIFY_TYPE_LPS{ -+ BTC_LPS_DISABLE = 0x0, -+ BTC_LPS_ENABLE = 0x1, -+ BTC_LPS_MAX -+}BTC_NOTIFY_TYPE_LPS,*PBTC_NOTIFY_TYPE_LPS; -+typedef enum _BTC_NOTIFY_TYPE_SCAN{ -+ BTC_SCAN_FINISH = 0x0, -+ BTC_SCAN_START = 0x1, -+ BTC_SCAN_MAX -+}BTC_NOTIFY_TYPE_SCAN,*PBTC_NOTIFY_TYPE_SCAN; -+typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE{ -+ BTC_ASSOCIATE_FINISH = 0x0, -+ BTC_ASSOCIATE_START = 0x1, -+ BTC_ASSOCIATE_MAX -+}BTC_NOTIFY_TYPE_ASSOCIATE,*PBTC_NOTIFY_TYPE_ASSOCIATE; -+typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS{ -+ BTC_MEDIA_DISCONNECT = 0x0, -+ BTC_MEDIA_CONNECT = 0x1, -+ BTC_MEDIA_MAX -+}BTC_NOTIFY_TYPE_MEDIA_STATUS,*PBTC_NOTIFY_TYPE_MEDIA_STATUS; -+typedef enum _BTC_NOTIFY_TYPE_SPECIAL_PACKET{ -+ BTC_PACKET_UNKNOWN = 0x0, -+ BTC_PACKET_DHCP = 0x1, -+ BTC_PACKET_ARP = 0x2, -+ BTC_PACKET_EAPOL = 0x3, -+ BTC_PACKET_MAX -+}BTC_NOTIFY_TYPE_SPECIAL_PACKET,*PBTC_NOTIFY_TYPE_SPECIAL_PACKET; -+typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION{ -+ BTC_STACK_OP_NONE = 0x0, -+ BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, -+ BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, -+ BTC_STACK_OP_MAX -+}BTC_NOTIFY_TYPE_STACK_OPERATION,*PBTC_NOTIFY_TYPE_STACK_OPERATION; -+ -+//Bryant Add -+typedef enum _BTC_ANTENNA_POS{ -+ BTC_ANTENNA_AT_MAIN_PORT = 0x1, -+ BTC_ANTENNA_AT_AUX_PORT = 0x2, -+}BTC_ANTENNA_POS,*PBTC_ANTENNA_POS; -+ -+//Bryant Add -+typedef enum _BTC_BT_OFFON{ -+ BTC_BT_OFF = 0x0, -+ BTC_BT_ON = 0x1, -+}BTC_BTOFFON,*PBTC_BT_OFFON; -+ -+typedef u1Byte -+(*BFP_BTC_R1)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr -+ ); -+typedef u2Byte -+(*BFP_BTC_R2)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr -+ ); -+typedef u4Byte -+(*BFP_BTC_R4)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr -+ ); -+typedef VOID -+(*BFP_BTC_W1)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u1Byte Data -+ ); -+typedef VOID -+(*BFP_BTC_W1_BIT_MASK)( -+ IN PVOID pBtcContext, -+ IN u4Byte regAddr, -+ IN u1Byte bitMask, -+ IN u1Byte data1b -+ ); -+typedef VOID -+(*BFP_BTC_W2)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u2Byte Data -+ ); -+typedef VOID -+(*BFP_BTC_W4)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u4Byte Data -+ ); -+typedef VOID -+(*BFP_BTC_LOCAL_REG_W1)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u1Byte Data -+ ); -+typedef VOID -+(*BFP_BTC_SET_BB_REG)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ); -+typedef u4Byte -+(*BFP_BTC_GET_BB_REG)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ); -+typedef VOID -+(*BFP_BTC_SET_RF_REG)( -+ IN PVOID pBtcContext, -+ IN u1Byte eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ); -+typedef u4Byte -+(*BFP_BTC_GET_RF_REG)( -+ IN PVOID pBtcContext, -+ IN u1Byte eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ); -+typedef VOID -+(*BFP_BTC_FILL_H2C)( -+ IN PVOID pBtcContext, -+ IN u1Byte elementId, -+ IN u4Byte cmdLen, -+ IN pu1Byte pCmdBuffer -+ ); -+ -+typedef BOOLEAN -+(*BFP_BTC_GET)( -+ IN PVOID pBtCoexist, -+ IN u1Byte getType, -+ OUT PVOID pOutBuf -+ ); -+ -+typedef BOOLEAN -+(*BFP_BTC_SET)( -+ IN PVOID pBtCoexist, -+ IN u1Byte setType, -+ OUT PVOID pInBuf -+ ); -+typedef u2Byte -+(*BFP_BTC_SET_BT_REG)( -+ IN PVOID pBtcContext, -+ IN u1Byte regType, -+ IN u4Byte offset, -+ IN u4Byte value -+ ); -+typedef BOOLEAN -+(*BFP_BTC_SET_BT_ANT_DETECTION)( -+ IN PVOID pBtcContext, -+ IN u1Byte txTime, -+ IN u1Byte btChnl -+ ); -+typedef u2Byte -+(*BFP_BTC_GET_BT_REG)( -+ IN PVOID pBtcContext, -+ IN u1Byte regType, -+ IN u4Byte offset, -+ IN pu4Byte data -+ ); -+typedef VOID -+(*BFP_BTC_DISP_DBG_MSG)( -+ IN PVOID pBtCoexist, -+ IN u1Byte dispType -+ ); -+ -+typedef struct _BTC_BT_INFO{ -+ BOOLEAN bBtDisabled; -+ u1Byte rssiAdjustForAgcTableOn; -+ u1Byte rssiAdjustFor1AntCoexType; -+ BOOLEAN bPreBtCtrlAggBufSize; -+ BOOLEAN bBtCtrlAggBufSize; -+ BOOLEAN bPreRejectAggPkt; -+ BOOLEAN bRejectAggPkt; -+ BOOLEAN bIncreaseScanDevNum; -+ BOOLEAN bBtTxRxMask; -+ u1Byte preAggBufSize; -+ u1Byte aggBufSize; -+ BOOLEAN bBtBusy; -+ BOOLEAN bLimitedDig; -+ u2Byte btHciVer; -+ u2Byte btRealFwVer; -+ u1Byte btFwVer; -+ u4Byte getBtFwVerCnt; -+ BOOLEAN bMiracastPlusBt; -+ -+ BOOLEAN bBtDisableLowPwr; -+ -+ BOOLEAN bBtCtrlLps; -+ BOOLEAN bBtLpsOn; -+ BOOLEAN bForceToRoam; // for 1Ant solution -+ u1Byte lpsVal; -+ u1Byte rpwmVal; -+ u4Byte raMask; -+} BTC_BT_INFO, *PBTC_BT_INFO; -+ -+typedef struct _BTC_STACK_INFO{ -+ BOOLEAN bProfileNotified; -+ u2Byte hciVersion; // stack hci version -+ u1Byte numOfLink; -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bAclExist; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bHidExist; -+ u1Byte numOfHid; -+ BOOLEAN bPanExist; -+ BOOLEAN bUnknownAclExist; -+ s1Byte minBtRssi; -+} BTC_STACK_INFO, *PBTC_STACK_INFO; -+ -+typedef struct _BTC_BT_LINK_INFO{ -+ BOOLEAN bBtLinkExist; -+ BOOLEAN bBtHiPriLinkExist; -+ BOOLEAN bScoExist; -+ BOOLEAN bScoOnly; -+ BOOLEAN bA2dpExist; -+ BOOLEAN bA2dpOnly; -+ BOOLEAN bHidExist; -+ BOOLEAN bHidOnly; -+ BOOLEAN bPanExist; -+ BOOLEAN bPanOnly; -+ BOOLEAN bSlaveRole; -+ BOOLEAN bAclBusy; -+} BTC_BT_LINK_INFO, *PBTC_BT_LINK_INFO; -+ -+typedef struct _BTC_STATISTICS{ -+ u4Byte cntBind; -+ u4Byte cntPowerOn; -+ u4Byte cntPreLoadFirmware; -+ u4Byte cntInitHwConfig; -+ u4Byte cntInitCoexDm; -+ u4Byte cntIpsNotify; -+ u4Byte cntLpsNotify; -+ u4Byte cntScanNotify; -+ u4Byte cntConnectNotify; -+ u4Byte cntMediaStatusNotify; -+ u4Byte cntSpecialPacketNotify; -+ u4Byte cntBtInfoNotify; -+ u4Byte cntRfStatusNotify; -+ u4Byte cntPeriodical; -+ u4Byte cntCoexDmSwitch; -+ u4Byte cntStackOperationNotify; -+ u4Byte cntDbgCtrl; -+} BTC_STATISTICS, *PBTC_STATISTICS; -+ -+typedef struct _BTC_COEXIST{ -+ BOOLEAN bBinded; // make sure only one adapter can bind the data context -+ PVOID Adapter; // default adapter -+ BTC_BOARD_INFO boardInfo; -+ BTC_BT_INFO btInfo; // some bt info referenced by non-bt module -+ BTC_STACK_INFO stackInfo; -+ BTC_BT_LINK_INFO btLinkInfo; -+ BTC_CHIP_INTERFACE chipInterface; -+ -+ BOOLEAN bInitilized; -+ BOOLEAN bStopCoexDm; -+ BOOLEAN bManualControl; -+ pu1Byte cliBuf; -+ BTC_STATISTICS statistics; -+ u1Byte pwrModeVal[10]; -+ -+ // function pointers -+ // io related -+ BFP_BTC_R1 fBtcRead1Byte; -+ BFP_BTC_W1 fBtcWrite1Byte; -+ BFP_BTC_W1_BIT_MASK fBtcWrite1ByteBitMask; -+ BFP_BTC_R2 fBtcRead2Byte; -+ BFP_BTC_W2 fBtcWrite2Byte; -+ BFP_BTC_R4 fBtcRead4Byte; -+ BFP_BTC_W4 fBtcWrite4Byte; -+ BFP_BTC_LOCAL_REG_W1 fBtcWriteLocalReg1Byte; -+ // read/write bb related -+ BFP_BTC_SET_BB_REG fBtcSetBbReg; -+ BFP_BTC_GET_BB_REG fBtcGetBbReg; -+ -+ // read/write rf related -+ BFP_BTC_SET_RF_REG fBtcSetRfReg; -+ BFP_BTC_GET_RF_REG fBtcGetRfReg; -+ -+ // fill h2c related -+ BFP_BTC_FILL_H2C fBtcFillH2c; -+ // other -+ BFP_BTC_DISP_DBG_MSG fBtcDispDbgMsg; -+ // normal get/set related -+ BFP_BTC_GET fBtcGet; -+ BFP_BTC_SET fBtcSet; -+ -+ BFP_BTC_GET_BT_REG fBtcGetBtReg; -+ BFP_BTC_SET_BT_REG fBtcSetBtReg; -+ -+ BFP_BTC_SET_BT_ANT_DETECTION fBtcSetBtAntDetection; -+} BTC_COEXIST, *PBTC_COEXIST; -+ -+extern BTC_COEXIST GLBtCoexist; -+ -+BOOLEAN -+EXhalbtcoutsrc_InitlizeVariables( -+ IN PVOID Adapter -+ ); -+VOID -+EXhalbtcoutsrc_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtcoutsrc_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte action -+ ); -+VOID -+EXhalbtcoutsrc_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN RT_MEDIA_STATUS mediaStatus -+ ); -+VOID -+EXhalbtcoutsrc_SpecialPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pktType -+ ); -+VOID -+EXhalbtcoutsrc_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtcoutsrc_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_StackOperationNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtcoutsrc_ScoreBoardStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtcoutsrc_CoexDmSwitch( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ); -+VOID -+EXhalbtcoutsrc_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+VOID -+EXhalbtcoutsrc_StackUpdateProfileInfo( -+ VOID -+ ); -+VOID -+EXhalbtcoutsrc_SetHciVersion( -+ IN u2Byte hciVersion -+ ); -+VOID -+EXhalbtcoutsrc_SetBtPatchVersion( -+ IN u2Byte btHciVersion, -+ IN u2Byte btPatchVersion -+ ); -+VOID -+EXhalbtcoutsrc_UpdateMinBtRssi( -+ IN s1Byte btRssi -+ ); -+#if 0 -+VOID -+EXhalbtcoutsrc_SetBtExist( -+ IN BOOLEAN bBtExist -+ ); -+#endif -+VOID -+EXhalbtcoutsrc_SetChipType( -+ IN u1Byte chipType -+ ); -+VOID -+EXhalbtcoutsrc_SetAntNum( -+ IN u1Byte type, -+ IN u1Byte antNum -+ ); -+VOID -+EXhalbtcoutsrc_SetSingleAntPath( -+ IN u1Byte singleAntPath -+ ); -+VOID -+EXhalbtcoutsrc_DisplayBtCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_DisplayAntDetection( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ -+#endif ++#ifndef __HALBTC_OUT_SRC_H__ ++#define __HALBTC_OUT_SRC_H__ ++ ++#define NORMAL_EXEC FALSE ++#define FORCE_EXEC TRUE ++ ++#define BTC_RF_OFF 0x0 ++#define BTC_RF_ON 0x1 ++ ++#define BTC_RF_A 0x0 ++#define BTC_RF_B 0x1 ++#define BTC_RF_C 0x2 ++#define BTC_RF_D 0x3 ++ ++#define BTC_SMSP SINGLEMAC_SINGLEPHY ++#define BTC_DMDP DUALMAC_DUALPHY ++#define BTC_DMSP DUALMAC_SINGLEPHY ++#define BTC_MP_UNKNOWN 0xff ++ ++#define BT_COEX_ANT_TYPE_PG 0 ++#define BT_COEX_ANT_TYPE_ANTDIV 1 ++#define BT_COEX_ANT_TYPE_DETECTED 2 ++ ++#define BTC_MIMO_PS_STATIC 0 // 1ss ++#define BTC_MIMO_PS_DYNAMIC 1 // 2ss ++ ++#define BTC_RATE_DISABLE 0 ++#define BTC_RATE_ENABLE 1 ++ ++// single Antenna definition ++#define BTC_ANT_PATH_WIFI 0 ++#define BTC_ANT_PATH_BT 1 ++#define BTC_ANT_PATH_PTA 2 ++// dual Antenna definition ++#define BTC_ANT_WIFI_AT_MAIN 0 ++#define BTC_ANT_WIFI_AT_AUX 1 ++// coupler Antenna definition ++#define BTC_ANT_WIFI_AT_CPL_MAIN 0 ++#define BTC_ANT_WIFI_AT_CPL_AUX 1 ++ ++typedef enum _BTC_POWERSAVE_TYPE{ ++ BTC_PS_WIFI_NATIVE = 0, // wifi original power save behavior ++ BTC_PS_LPS_ON = 1, ++ BTC_PS_LPS_OFF = 2, ++ BTC_PS_MAX ++} BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; ++ ++typedef enum _BTC_BT_REG_TYPE{ ++ BTC_BT_REG_RF = 0, ++ BTC_BT_REG_MODEM = 1, ++ BTC_BT_REG_BLUEWIZE = 2, ++ BTC_BT_REG_VENDOR = 3, ++ BTC_BT_REG_LE = 4, ++ BTC_BT_REG_MAX ++} BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; ++ ++typedef enum _BTC_CHIP_INTERFACE{ ++ BTC_INTF_UNKNOWN = 0, ++ BTC_INTF_PCI = 1, ++ BTC_INTF_USB = 2, ++ BTC_INTF_SDIO = 3, ++ BTC_INTF_MAX ++} BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; ++ ++typedef enum _BTC_CHIP_TYPE{ ++ BTC_CHIP_UNDEF = 0, ++ BTC_CHIP_CSR_BC4 = 1, ++ BTC_CHIP_CSR_BC8 = 2, ++ BTC_CHIP_RTL8723A = 3, ++ BTC_CHIP_RTL8821 = 4, ++ BTC_CHIP_RTL8723B = 5, ++ BTC_CHIP_MAX ++} BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; ++ ++// following is for wifi link status ++#define WIFI_STA_CONNECTED BIT0 ++#define WIFI_AP_CONNECTED BIT1 ++#define WIFI_HS_CONNECTED BIT2 ++#define WIFI_P2P_GO_CONNECTED BIT3 ++#define WIFI_P2P_GC_CONNECTED BIT4 ++ ++// following is for command line utility ++#define CL_SPRINTF rsprintf ++#define CL_PRINTF DCMD_Printf ++ ++ ++typedef struct _BTC_BOARD_INFO{ ++ // The following is some board information ++ u1Byte btChipType; ++ u1Byte pgAntNum; // pg ant number ++ u1Byte btdmAntNum; // ant number for btdm ++ u1Byte btdmAntNumByAntDet; // ant number for btdm after antenna detection ++ u1Byte btdmAntPos; //Bryant Add to indicate Antenna Position for (pgAntNum = 2) && (btdmAntNum =1) (DPDT+1Ant case) ++ u1Byte singleAntPath; // current used for 8723b only, 1=>s0, 0=>s1 ++ u1Byte bTfbgaPackage; //for Antenna detect threshold ++ u1Byte btdmAntDetFinish; ++ u1Byte antType; ++} BTC_BOARD_INFO, *PBTC_BOARD_INFO; ++ ++typedef enum _BTC_DBG_OPCODE{ ++ BTC_DBG_SET_COEX_NORMAL = 0x0, ++ BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, ++ BTC_DBG_SET_COEX_BT_ONLY = 0x2, ++ BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, ++ BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, ++ BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, ++ BTC_DBG_MAX ++}BTC_DBG_OPCODE,*PBTC_DBG_OPCODE; ++ ++typedef enum _BTC_RSSI_STATE{ ++ BTC_RSSI_STATE_HIGH = 0x0, ++ BTC_RSSI_STATE_MEDIUM = 0x1, ++ BTC_RSSI_STATE_LOW = 0x2, ++ BTC_RSSI_STATE_STAY_HIGH = 0x3, ++ BTC_RSSI_STATE_STAY_MEDIUM = 0x4, ++ BTC_RSSI_STATE_STAY_LOW = 0x5, ++ BTC_RSSI_MAX ++}BTC_RSSI_STATE,*PBTC_RSSI_STATE; ++#define BTC_RSSI_HIGH(_rssi_) ((_rssi_==BTC_RSSI_STATE_HIGH||_rssi_==BTC_RSSI_STATE_STAY_HIGH)? TRUE:FALSE) ++#define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_==BTC_RSSI_STATE_MEDIUM||_rssi_==BTC_RSSI_STATE_STAY_MEDIUM)? TRUE:FALSE) ++#define BTC_RSSI_LOW(_rssi_) ((_rssi_==BTC_RSSI_STATE_LOW||_rssi_==BTC_RSSI_STATE_STAY_LOW)? TRUE:FALSE) ++ ++typedef enum _BTC_WIFI_ROLE{ ++ BTC_ROLE_STATION = 0x0, ++ BTC_ROLE_AP = 0x1, ++ BTC_ROLE_IBSS = 0x2, ++ BTC_ROLE_HS_MODE = 0x3, ++ BTC_ROLE_MAX ++}BTC_WIFI_ROLE,*PBTC_WIFI_ROLE; ++ ++typedef enum _BTC_WIRELESS_FREQ{ ++ BTC_FREQ_2_4G = 0x0, ++ BTC_FREQ_5G = 0x1, ++ BTC_FREQ_MAX ++}BTC_WIRELESS_FREQ,*PBTC_WIRELESS_FREQ; ++ ++typedef enum _BTC_WIFI_BW_MODE{ ++ BTC_WIFI_BW_LEGACY = 0x0, ++ BTC_WIFI_BW_HT20 = 0x1, ++ BTC_WIFI_BW_HT40 = 0x2, ++ BTC_WIFI_BW_HT80 = 0x3, ++ BTC_WIFI_BW_HT160 = 0x4, ++ BTC_WIFI_BW_MAX ++}BTC_WIFI_BW_MODE,*PBTC_WIFI_BW_MODE; ++ ++typedef enum _BTC_WIFI_TRAFFIC_DIR{ ++ BTC_WIFI_TRAFFIC_TX = 0x0, ++ BTC_WIFI_TRAFFIC_RX = 0x1, ++ BTC_WIFI_TRAFFIC_MAX ++}BTC_WIFI_TRAFFIC_DIR,*PBTC_WIFI_TRAFFIC_DIR; ++ ++typedef enum _BTC_WIFI_PNP{ ++ BTC_WIFI_PNP_WAKE_UP = 0x0, ++ BTC_WIFI_PNP_SLEEP = 0x1, ++ BTC_WIFI_PNP_MAX ++}BTC_WIFI_PNP,*PBTC_WIFI_PNP; ++ ++typedef enum _BTC_IOT_PEER ++{ ++ BTC_IOT_PEER_UNKNOWN = 0, ++ BTC_IOT_PEER_REALTEK = 1, ++ BTC_IOT_PEER_REALTEK_92SE = 2, ++ BTC_IOT_PEER_BROADCOM = 3, ++ BTC_IOT_PEER_RALINK = 4, ++ BTC_IOT_PEER_ATHEROS = 5, ++ BTC_IOT_PEER_CISCO = 6, ++ BTC_IOT_PEER_MERU = 7, ++ BTC_IOT_PEER_MARVELL = 8, ++ BTC_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 ++ BTC_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP ++ BTC_IOT_PEER_AIRGO = 11, ++ BTC_IOT_PEER_INTEL = 12, ++ BTC_IOT_PEER_RTK_APCLIENT = 13, ++ BTC_IOT_PEER_REALTEK_81XX = 14, ++ BTC_IOT_PEER_REALTEK_WOW = 15, ++ BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, ++ BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, ++ BTC_IOT_PEER_MAX, ++}BTC_IOT_PEER, *PBTC_IOT_PEER; ++ ++//for 8723b-d cut large current issue ++typedef enum _BT_WIFI_COEX_STATE{ ++ BTC_WIFI_STAT_INIT, ++ BTC_WIFI_STAT_IQK, ++ BTC_WIFI_STAT_NORMAL_OFF, ++ BTC_WIFI_STAT_MP_OFF, ++ BTC_WIFI_STAT_NORMAL, ++ BTC_WIFI_STAT_ANT_DIV, ++ BTC_WIFI_STAT_MAX ++}BT_WIFI_COEX_STATE,*PBT_WIFI_COEX_STATE; ++ ++typedef enum _BT_ANT_TYPE{ ++ BTC_ANT_TYPE_0, ++ BTC_ANT_TYPE_1, ++ BTC_ANT_TYPE_2, ++ BTC_ANT_TYPE_3, ++ BTC_ANT_TYPE_4, ++ BTC_ANT_TYPE_MAX ++}BT_ANT_TYPE,*PBT_ANT_TYPE; ++ ++// defined for BFP_BTC_GET ++typedef enum _BTC_GET_TYPE{ ++ // type BOOLEAN ++ BTC_GET_BL_HS_OPERATION, ++ BTC_GET_BL_HS_CONNECTING, ++ BTC_GET_BL_WIFI_CONNECTED, ++ BTC_GET_BL_WIFI_BUSY, ++ BTC_GET_BL_WIFI_SCAN, ++ BTC_GET_BL_WIFI_LINK, ++ BTC_GET_BL_WIFI_ROAM, ++ BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ BTC_GET_BL_WIFI_UNDER_5G, ++ BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ BTC_GET_BL_EXT_SWITCH, ++ BTC_GET_BL_WIFI_IS_IN_MP_MODE, ++ BTC_GET_BL_IS_ASUS_8723B, ++ ++ // type s4Byte ++ BTC_GET_S4_WIFI_RSSI, ++ BTC_GET_S4_HS_RSSI, ++ ++ // type u4Byte ++ BTC_GET_U4_WIFI_BW, ++ BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, ++ BTC_GET_U4_WIFI_FW_VER, ++ BTC_GET_U4_WIFI_LINK_STATUS, ++ BTC_GET_U4_BT_PATCH_VER, ++ ++ // type u1Byte ++ BTC_GET_U1_WIFI_DOT11_CHNL, ++ BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ BTC_GET_U1_WIFI_HS_CHNL, ++ BTC_GET_U1_MAC_PHY_MODE, ++ BTC_GET_U1_AP_NUM, ++ BTC_GET_U1_ANT_TYPE, ++ BTC_GET_U1_IOT_PEER, ++ ++ //===== for 1Ant ====== ++ BTC_GET_U1_LPS_MODE, ++ ++ BTC_GET_MAX ++}BTC_GET_TYPE,*PBTC_GET_TYPE; ++ ++// defined for BFP_BTC_SET ++typedef enum _BTC_SET_TYPE{ ++ // type BOOLEAN ++ BTC_SET_BL_BT_DISABLE, ++ BTC_SET_BL_BT_TRAFFIC_BUSY, ++ BTC_SET_BL_BT_LIMITED_DIG, ++ BTC_SET_BL_FORCE_TO_ROAM, ++ BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ BTC_SET_BL_INC_SCAN_DEV_NUM, ++ BTC_SET_BL_BT_TX_RX_MASK, ++ BTC_SET_BL_MIRACAST_PLUS_BT, ++ ++ // type u1Byte ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, ++ BTC_SET_U1_AGG_BUF_SIZE, ++ ++ // type trigger some action ++ BTC_SET_ACT_GET_BT_RSSI, ++ BTC_SET_ACT_AGGREGATE_CTRL, ++ //===== for 1Ant ====== ++ // type BOOLEAN ++ ++ // type u1Byte ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, ++ BTC_SET_U1_LPS_VAL, ++ BTC_SET_U1_RPWM_VAL, ++ // type trigger some action ++ BTC_SET_ACT_LEAVE_LPS, ++ BTC_SET_ACT_ENTER_LPS, ++ BTC_SET_ACT_NORMAL_LPS, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ BTC_SET_ACT_UPDATE_RAMASK, ++ BTC_SET_ACT_SEND_MIMO_PS, ++ // BT Coex related ++ BTC_SET_ACT_CTRL_BT_INFO, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ BTC_SET_ACT_CTRL_8723B_ANT, ++ //================= ++ BTC_SET_MAX ++}BTC_SET_TYPE,*PBTC_SET_TYPE; ++ ++typedef enum _BTC_DBG_DISP_TYPE{ ++ BTC_DBG_DISP_COEX_STATISTICS = 0x0, ++ BTC_DBG_DISP_BT_LINK_INFO = 0x1, ++ BTC_DBG_DISP_WIFI_STATUS = 0x2, ++ BTC_DBG_DISP_MAX ++}BTC_DBG_DISP_TYPE,*PBTC_DBG_DISP_TYPE; ++ ++typedef enum _BTC_NOTIFY_TYPE_IPS{ ++ BTC_IPS_LEAVE = 0x0, ++ BTC_IPS_ENTER = 0x1, ++ BTC_IPS_MAX ++}BTC_NOTIFY_TYPE_IPS,*PBTC_NOTIFY_TYPE_IPS; ++typedef enum _BTC_NOTIFY_TYPE_LPS{ ++ BTC_LPS_DISABLE = 0x0, ++ BTC_LPS_ENABLE = 0x1, ++ BTC_LPS_MAX ++}BTC_NOTIFY_TYPE_LPS,*PBTC_NOTIFY_TYPE_LPS; ++typedef enum _BTC_NOTIFY_TYPE_SCAN{ ++ BTC_SCAN_FINISH = 0x0, ++ BTC_SCAN_START = 0x1, ++ BTC_SCAN_MAX ++}BTC_NOTIFY_TYPE_SCAN,*PBTC_NOTIFY_TYPE_SCAN; ++typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE{ ++ BTC_ASSOCIATE_FINISH = 0x0, ++ BTC_ASSOCIATE_START = 0x1, ++ BTC_ASSOCIATE_MAX ++}BTC_NOTIFY_TYPE_ASSOCIATE,*PBTC_NOTIFY_TYPE_ASSOCIATE; ++typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS{ ++ BTC_MEDIA_DISCONNECT = 0x0, ++ BTC_MEDIA_CONNECT = 0x1, ++ BTC_MEDIA_MAX ++}BTC_NOTIFY_TYPE_MEDIA_STATUS,*PBTC_NOTIFY_TYPE_MEDIA_STATUS; ++typedef enum _BTC_NOTIFY_TYPE_SPECIAL_PACKET{ ++ BTC_PACKET_UNKNOWN = 0x0, ++ BTC_PACKET_DHCP = 0x1, ++ BTC_PACKET_ARP = 0x2, ++ BTC_PACKET_EAPOL = 0x3, ++ BTC_PACKET_MAX ++}BTC_NOTIFY_TYPE_SPECIAL_PACKET,*PBTC_NOTIFY_TYPE_SPECIAL_PACKET; ++typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION{ ++ BTC_STACK_OP_NONE = 0x0, ++ BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, ++ BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, ++ BTC_STACK_OP_MAX ++}BTC_NOTIFY_TYPE_STACK_OPERATION,*PBTC_NOTIFY_TYPE_STACK_OPERATION; ++ ++//Bryant Add ++typedef enum _BTC_ANTENNA_POS{ ++ BTC_ANTENNA_AT_MAIN_PORT = 0x1, ++ BTC_ANTENNA_AT_AUX_PORT = 0x2, ++}BTC_ANTENNA_POS,*PBTC_ANTENNA_POS; ++ ++//Bryant Add ++typedef enum _BTC_BT_OFFON{ ++ BTC_BT_OFF = 0x0, ++ BTC_BT_ON = 0x1, ++}BTC_BTOFFON,*PBTC_BT_OFFON; ++ ++typedef u1Byte ++(*BFP_BTC_R1)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr ++ ); ++typedef u2Byte ++(*BFP_BTC_R2)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr ++ ); ++typedef u4Byte ++(*BFP_BTC_R4)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr ++ ); ++typedef VOID ++(*BFP_BTC_W1)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_W1_BIT_MASK)( ++ IN PVOID pBtcContext, ++ IN u4Byte regAddr, ++ IN u1Byte bitMask, ++ IN u1Byte data1b ++ ); ++typedef VOID ++(*BFP_BTC_W2)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u2Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_W4)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u4Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_LOCAL_REG_W1)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_SET_BB_REG)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++typedef u4Byte ++(*BFP_BTC_GET_BB_REG)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++typedef VOID ++(*BFP_BTC_SET_RF_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++typedef u4Byte ++(*BFP_BTC_GET_RF_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++typedef VOID ++(*BFP_BTC_FILL_H2C)( ++ IN PVOID pBtcContext, ++ IN u1Byte elementId, ++ IN u4Byte cmdLen, ++ IN pu1Byte pCmdBuffer ++ ); ++ ++typedef BOOLEAN ++(*BFP_BTC_GET)( ++ IN PVOID pBtCoexist, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ); ++ ++typedef BOOLEAN ++(*BFP_BTC_SET)( ++ IN PVOID pBtCoexist, ++ IN u1Byte setType, ++ OUT PVOID pInBuf ++ ); ++typedef u2Byte ++(*BFP_BTC_SET_BT_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte regType, ++ IN u4Byte offset, ++ IN u4Byte value ++ ); ++typedef BOOLEAN ++(*BFP_BTC_SET_BT_ANT_DETECTION)( ++ IN PVOID pBtcContext, ++ IN u1Byte txTime, ++ IN u1Byte btChnl ++ ); ++typedef u2Byte ++(*BFP_BTC_GET_BT_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte regType, ++ IN u4Byte offset, ++ IN pu4Byte data ++ ); ++typedef VOID ++(*BFP_BTC_DISP_DBG_MSG)( ++ IN PVOID pBtCoexist, ++ IN u1Byte dispType ++ ); ++ ++typedef struct _BTC_BT_INFO{ ++ BOOLEAN bBtDisabled; ++ u1Byte rssiAdjustForAgcTableOn; ++ u1Byte rssiAdjustFor1AntCoexType; ++ BOOLEAN bPreBtCtrlAggBufSize; ++ BOOLEAN bBtCtrlAggBufSize; ++ BOOLEAN bPreRejectAggPkt; ++ BOOLEAN bRejectAggPkt; ++ BOOLEAN bIncreaseScanDevNum; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preAggBufSize; ++ u1Byte aggBufSize; ++ BOOLEAN bBtBusy; ++ BOOLEAN bLimitedDig; ++ u2Byte btHciVer; ++ u2Byte btRealFwVer; ++ u1Byte btFwVer; ++ u4Byte getBtFwVerCnt; ++ BOOLEAN bMiracastPlusBt; ++ ++ BOOLEAN bBtDisableLowPwr; ++ ++ BOOLEAN bBtCtrlLps; ++ BOOLEAN bBtLpsOn; ++ BOOLEAN bForceToRoam; // for 1Ant solution ++ u1Byte lpsVal; ++ u1Byte rpwmVal; ++ u4Byte raMask; ++} BTC_BT_INFO, *PBTC_BT_INFO; ++ ++typedef struct _BTC_STACK_INFO{ ++ BOOLEAN bProfileNotified; ++ u2Byte hciVersion; // stack hci version ++ u1Byte numOfLink; ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bAclExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ u1Byte numOfHid; ++ BOOLEAN bPanExist; ++ BOOLEAN bUnknownAclExist; ++ s1Byte minBtRssi; ++} BTC_STACK_INFO, *PBTC_STACK_INFO; ++ ++typedef struct _BTC_BT_LINK_INFO{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bBtHiPriLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bScoOnly; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bA2dpOnly; ++ BOOLEAN bHidExist; ++ BOOLEAN bHidOnly; ++ BOOLEAN bPanExist; ++ BOOLEAN bPanOnly; ++ BOOLEAN bSlaveRole; ++ BOOLEAN bAclBusy; ++} BTC_BT_LINK_INFO, *PBTC_BT_LINK_INFO; ++ ++typedef struct _BTC_STATISTICS{ ++ u4Byte cntBind; ++ u4Byte cntPowerOn; ++ u4Byte cntPreLoadFirmware; ++ u4Byte cntInitHwConfig; ++ u4Byte cntInitCoexDm; ++ u4Byte cntIpsNotify; ++ u4Byte cntLpsNotify; ++ u4Byte cntScanNotify; ++ u4Byte cntConnectNotify; ++ u4Byte cntMediaStatusNotify; ++ u4Byte cntSpecialPacketNotify; ++ u4Byte cntBtInfoNotify; ++ u4Byte cntRfStatusNotify; ++ u4Byte cntPeriodical; ++ u4Byte cntCoexDmSwitch; ++ u4Byte cntStackOperationNotify; ++ u4Byte cntDbgCtrl; ++} BTC_STATISTICS, *PBTC_STATISTICS; ++ ++typedef struct _BTC_COEXIST{ ++ BOOLEAN bBinded; // make sure only one adapter can bind the data context ++ PVOID Adapter; // default adapter ++ BTC_BOARD_INFO boardInfo; ++ BTC_BT_INFO btInfo; // some bt info referenced by non-bt module ++ BTC_STACK_INFO stackInfo; ++ BTC_BT_LINK_INFO btLinkInfo; ++ BTC_CHIP_INTERFACE chipInterface; ++ ++ BOOLEAN bInitilized; ++ BOOLEAN bStopCoexDm; ++ BOOLEAN bManualControl; ++ pu1Byte cliBuf; ++ BTC_STATISTICS statistics; ++ u1Byte pwrModeVal[10]; ++ ++ // function pointers ++ // io related ++ BFP_BTC_R1 fBtcRead1Byte; ++ BFP_BTC_W1 fBtcWrite1Byte; ++ BFP_BTC_W1_BIT_MASK fBtcWrite1ByteBitMask; ++ BFP_BTC_R2 fBtcRead2Byte; ++ BFP_BTC_W2 fBtcWrite2Byte; ++ BFP_BTC_R4 fBtcRead4Byte; ++ BFP_BTC_W4 fBtcWrite4Byte; ++ BFP_BTC_LOCAL_REG_W1 fBtcWriteLocalReg1Byte; ++ // read/write bb related ++ BFP_BTC_SET_BB_REG fBtcSetBbReg; ++ BFP_BTC_GET_BB_REG fBtcGetBbReg; ++ ++ // read/write rf related ++ BFP_BTC_SET_RF_REG fBtcSetRfReg; ++ BFP_BTC_GET_RF_REG fBtcGetRfReg; ++ ++ // fill h2c related ++ BFP_BTC_FILL_H2C fBtcFillH2c; ++ // other ++ BFP_BTC_DISP_DBG_MSG fBtcDispDbgMsg; ++ // normal get/set related ++ BFP_BTC_GET fBtcGet; ++ BFP_BTC_SET fBtcSet; ++ ++ BFP_BTC_GET_BT_REG fBtcGetBtReg; ++ BFP_BTC_SET_BT_REG fBtcSetBtReg; ++ ++ BFP_BTC_SET_BT_ANT_DETECTION fBtcSetBtAntDetection; ++} BTC_COEXIST, *PBTC_COEXIST; ++ ++extern BTC_COEXIST GLBtCoexist; ++ ++BOOLEAN ++EXhalbtcoutsrc_InitlizeVariables( ++ IN PVOID Adapter ++ ); ++VOID ++EXhalbtcoutsrc_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtcoutsrc_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte action ++ ); ++VOID ++EXhalbtcoutsrc_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN RT_MEDIA_STATUS mediaStatus ++ ); ++VOID ++EXhalbtcoutsrc_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pktType ++ ); ++VOID ++EXhalbtcoutsrc_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtcoutsrc_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_StackOperationNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtcoutsrc_ScoreBoardStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtcoutsrc_CoexDmSwitch( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ); ++VOID ++EXhalbtcoutsrc_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++VOID ++EXhalbtcoutsrc_StackUpdateProfileInfo( ++ VOID ++ ); ++VOID ++EXhalbtcoutsrc_SetHciVersion( ++ IN u2Byte hciVersion ++ ); ++VOID ++EXhalbtcoutsrc_SetBtPatchVersion( ++ IN u2Byte btHciVersion, ++ IN u2Byte btPatchVersion ++ ); ++VOID ++EXhalbtcoutsrc_UpdateMinBtRssi( ++ IN s1Byte btRssi ++ ); ++#if 0 ++VOID ++EXhalbtcoutsrc_SetBtExist( ++ IN BOOLEAN bBtExist ++ ); ++#endif ++VOID ++EXhalbtcoutsrc_SetChipType( ++ IN u1Byte chipType ++ ); ++VOID ++EXhalbtcoutsrc_SetAntNum( ++ IN u1Byte type, ++ IN u1Byte antNum ++ ); ++VOID ++EXhalbtcoutsrc_SetSingleAntPath( ++ IN u1Byte singleAntPath ++ ); ++VOID ++EXhalbtcoutsrc_DisplayBtCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_DisplayAntDetection( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/btc/Mp_Precomp.h b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/Mp_Precomp.h new file mode 100644 -index 000000000..62abb5e28 +index 0000000..62abb5e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/btc/Mp_Precomp.h @@ -0,0 +1,89 @@ @@ -157163,94 +157180,562 @@ index 000000000..62abb5e28 +#endif // __MP_PRECOMP_H__ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/efuse_mask.h b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/efuse_mask.h new file mode 100644 -index 000000000..86041d443 +index 0000000..9611e48 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/efuse_mask.h @@ -0,0 +1,80 @@ -+ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ -+ #if defined(CONFIG_RTL8188E) -+ #include "rtl8188e/HalEfuseMask8188E_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8812A) -+ #include "rtl8812a/HalEfuseMask8812A_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8821A) -+ #include "rtl8812a/HalEfuseMask8821A_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192E) -+ #include "rtl8192e/HalEfuseMask8192E_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723B) -+ #include "rtl8723b/HalEfuseMask8723B_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8814A) -+ #include "rtl8814a/HalEfuseMask8814A_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8703B) -+ #include "rtl8703b/HalEfuseMask8703B_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8188F) -+ #include "rtl8188f/HalEfuseMask8188F_USB.h" -+ #endif -+ -+#elif DEV_BUS_TYPE == RT_PCI_INTERFACE -+ -+ #if defined(CONFIG_RTL8188E) -+ #include "rtl8188e/HalEfuseMask8188E_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8812A) -+ #include "rtl8812a/HalEfuseMask8812A_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8821A) -+ #include "rtl8812a/HalEfuseMask8821A_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192E) -+ #include "rtl8192e/HalEfuseMask8192E_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723B) -+ #include "rtl8723b/HalEfuseMask8723B_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8814A) -+ #include "rtl8814a/HalEfuseMask8814A_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8703B) -+ #include "rtl8703b/HalEfuseMask8703B_PCIE.h" -+ #endif -+ -+#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ -+ #if defined(CONFIG_RTL8188E) -+ #include "rtl8188e/HalEfuseMask8188E_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8703B) -+ #include "rtl8703b/HalEfuseMask8703B_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8188F) -+ #include "rtl8188f/HalEfuseMask8188F_SDIO.h" -+ #endif -+ ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ ++ #if defined(CONFIG_RTL8188E) ++ #include "rtl8188e/HalEfuseMask8188E_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8812A) ++ #include "rtl8812a/HalEfuseMask8812A_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8821A) ++ #include "rtl8812a/HalEfuseMask8821A_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8192E) ++ #include "rtl8192e/HalEfuseMask8192E_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8723B) ++ #include "rtl8723b/HalEfuseMask8723B_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8814A) ++ #include "rtl8814a/HalEfuseMask8814A_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8703B) ++ #include "rtl8703b/HalEfuseMask8703B_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8188F) ++ #include "rtl8188f/HalEfuseMask8188F_USB.h" ++ #endif ++ ++#elif DEV_BUS_TYPE == RT_PCI_INTERFACE ++ ++ #if defined(CONFIG_RTL8188E) ++ #include "rtl8188e/HalEfuseMask8188E_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8812A) ++ #include "rtl8812a/HalEfuseMask8812A_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8821A) ++ #include "rtl8812a/HalEfuseMask8821A_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8192E) ++ #include "rtl8192e/HalEfuseMask8192E_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8723B) ++ #include "rtl8723b/HalEfuseMask8723B_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8814A) ++ #include "rtl8814a/HalEfuseMask8814A_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8703B) ++ #include "rtl8703b/HalEfuseMask8703B_PCIE.h" ++ #endif ++ ++#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE ++ ++ #if defined(CONFIG_RTL8188E) ++ #include "rtl8188e/HalEfuseMask8188E_SDIO.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8703B) ++ #include "rtl8703b/HalEfuseMask8703B_SDIO.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8188F) ++ #include "rtl8188f/HalEfuseMask8188F_SDIO.h" ++ #endif ++ +#endif \ No newline at end of file +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c +new file mode 100644 +index 0000000..8bd3d2a +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c +@@ -0,0 +1,103 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++//#include "Mp_Precomp.h" ++//#include "../odm_precomp.h" ++ ++#include ++ ++#include "HalEfuseMask8188E_PCIE.h" ++ ++ ++ ++/****************************************************************************** ++* MPCIE.TXT ++******************************************************************************/ ++ ++u1Byte Array_MP_8188E_MPCIE[] = { ++ 0xFF, ++ 0xF3, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x0F, ++ 0xF1, ++ 0xFF, ++ 0xFF, ++ 0x70, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ ++}; ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8188E_MPCIE(VOID) ++{ ++ return sizeof(Array_MP_8188E_MPCIE)/sizeof(u1Byte); ++} ++ ++VOID ++EFUSE_GetMaskArray_MP_8188E_MPCIE( ++ IN OUT pu1Byte Array ++ ) ++{ ++ u2Byte len = EFUSE_GetArrayLen_MP_8188E_MPCIE(), i = 0; ++ ++ for (i = 0; i < len; ++i) ++ Array[i] = Array_MP_8188E_MPCIE[i]; ++} ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8188E_MPCIE( ++ IN u2Byte Offset ++ ) ++{ ++ int r = Offset/16; ++ int c = (Offset%16) / 2; ++ int result = 0; ++ ++ if (c < 4) // Upper double word ++ result = (Array_MP_8188E_MPCIE[r] & (0x10 << c)); ++ else ++ result = (Array_MP_8188E_MPCIE[r] & (0x01 << (c-4))); ++ ++ return (result > 0) ? 0 : 1; ++} ++ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h +new file mode 100644 +index 0000000..f1c8f7d +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h +@@ -0,0 +1,41 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++ ++ ++/****************************************************************************** ++* MPCIE.TXT ++******************************************************************************/ ++ ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8188E_MPCIE(VOID); ++ ++VOID ++EFUSE_GetMaskArray_MP_8188E_MPCIE( ++ IN OUT pu1Byte Array ++); ++ ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8188E_MPCIE( // TC: Test Chip, MP: MP Chip ++ IN u2Byte Offset ++); ++ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c +new file mode 100644 +index 0000000..cc7fcd9 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c +@@ -0,0 +1,103 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++//#include "Mp_Precomp.h" ++//#include "../odm_precomp.h" ++ ++#include ++ ++#include "HalEfuseMask8188E_SDIO.h" ++ ++ ++ ++/****************************************************************************** ++* MSDIO.TXT ++******************************************************************************/ ++ ++u1Byte Array_MP_8188E_MSDIO[] = { ++ 0xFF, ++ 0xF3, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x0F, ++ 0xF1, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ ++}; ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8188E_MSDIO(VOID) ++{ ++ return sizeof(Array_MP_8188E_MSDIO)/sizeof(u1Byte); ++} ++ ++VOID ++EFUSE_GetMaskArray_MP_8188E_MSDIO( ++ IN OUT pu1Byte Array ++ ) ++{ ++ u2Byte len = EFUSE_GetArrayLen_MP_8188E_MSDIO(), i = 0; ++ ++ for (i = 0; i < len; ++i) ++ Array[i] = Array_MP_8188E_MSDIO[i]; ++} ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8188E_MSDIO( ++ IN u2Byte Offset ++ ) ++{ ++ int r = Offset/16; ++ int c = (Offset%16) / 2; ++ int result = 0; ++ ++ if (c < 4) // Upper double word ++ result = (Array_MP_8188E_MSDIO[r] & (0x10 << c)); ++ else ++ result = (Array_MP_8188E_MSDIO[r] & (0x01 << (c-4))); ++ ++ return (result > 0) ? 0 : 1; ++} ++ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h +new file mode 100644 +index 0000000..20c9c87 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h +@@ -0,0 +1,41 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++ ++ ++/****************************************************************************** ++* MSDIO.TXT ++******************************************************************************/ ++ ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8188E_MSDIO(VOID); ++ ++VOID ++EFUSE_GetMaskArray_MP_8188E_MSDIO( ++ IN OUT pu1Byte Array ++); ++ ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8188E_MSDIO( // TC: Test Chip, MP: MP Chip ++ IN u2Byte Offset ++); ++ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c +new file mode 100644 +index 0000000..11ddeb5 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c +@@ -0,0 +1,102 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++//#include "Mp_Precomp.h" ++//#include "../odm_precomp.h" ++ ++#include ++ ++#include "HalEfuseMask8188E_USB.h" ++ ++ ++/****************************************************************************** ++* MUSB.TXT ++******************************************************************************/ ++ ++u1Byte Array_MP_8188E_MUSB[] = { ++ 0xFF, ++ 0xF3, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x0F, ++ 0xF1, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0x00, ++ 0x00, ++ 0xEF, ++ 0xF7, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ ++}; ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8188E_MUSB(VOID) ++{ ++ return sizeof(Array_MP_8188E_MUSB)/sizeof(u1Byte); ++} ++ ++VOID ++EFUSE_GetMaskArray_MP_8188E_MUSB( ++ IN OUT pu1Byte Array ++ ) ++{ ++ u2Byte len = EFUSE_GetArrayLen_MP_8188E_MUSB(), i = 0; ++ ++ for (i = 0; i < len; ++i) ++ Array[i] = Array_MP_8188E_MUSB[i]; ++} ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8188E_MUSB( ++ IN u2Byte Offset ++ ) ++{ ++ int r = Offset/16; ++ int c = (Offset%16) / 2; ++ int result = 0; ++ ++ if (c < 4) // Upper double word ++ result = (Array_MP_8188E_MUSB[r] & (0x10 << c)); ++ else ++ result = (Array_MP_8188E_MUSB[r] & (0x01 << (c-4))); ++ ++ return (result > 0) ? 0 : 1; ++} ++ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h +new file mode 100644 +index 0000000..c0aa415 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h +@@ -0,0 +1,42 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++ ++ ++/****************************************************************************** ++* MUSB.TXT ++******************************************************************************/ ++ ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8188E_MUSB(VOID); ++ ++VOID ++EFUSE_GetMaskArray_MP_8188E_MUSB( ++ IN OUT pu1Byte Array ++); ++ ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8188E_MUSB( // TC: Test Chip, MP: MP Chip ++ IN u2Byte Offset ++); ++ ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_SDIO.c b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_SDIO.c new file mode 100644 -index 000000000..4840acb6a +index 0000000..4840acb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_SDIO.c @@ -0,0 +1,103 @@ @@ -157359,7 +157844,7 @@ index 000000000..4840acb6a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_SDIO.h b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_SDIO.h new file mode 100644 -index 000000000..3fa4e3e7e +index 0000000..3fa4e3e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_SDIO.h @@ -0,0 +1,41 @@ @@ -157406,7 +157891,7 @@ index 000000000..3fa4e3e7e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_USB.c b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_USB.c new file mode 100644 -index 000000000..9912f5d12 +index 0000000..9912f5d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_USB.c @@ -0,0 +1,102 @@ @@ -157514,7 +157999,7 @@ index 000000000..9912f5d12 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_USB.h b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_USB.h new file mode 100644 -index 000000000..e4890cad0 +index 0000000..e4890ca --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/efuse/rtl8188f/HalEfuseMask8188F_USB.h @@ -0,0 +1,42 @@ @@ -157562,7 +158047,7 @@ index 000000000..e4890cad0 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/hal_btcoex.c b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_btcoex.c new file mode 100644 -index 000000000..c473acfe5 +index 0000000..c473acf --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_btcoex.c @@ -0,0 +1,3692 @@ @@ -161260,7 +161745,7 @@ index 000000000..c473acfe5 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com.c b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com.c new file mode 100644 -index 000000000..e94a048f3 +index 0000000..e94a048 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com.c @@ -0,0 +1,8005 @@ @@ -169271,7 +169756,7 @@ index 000000000..e94a048f3 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com_c2h.h b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com_c2h.h new file mode 100644 -index 000000000..78a1ace68 +index 0000000..78a1ace --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com_c2h.h @@ -0,0 +1,45 @@ @@ -169322,7 +169807,7 @@ index 000000000..78a1ace68 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com_phycfg.c b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com_phycfg.c new file mode 100644 -index 000000000..4f72935f2 +index 0000000..4f72935 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_com_phycfg.c @@ -0,0 +1,4440 @@ @@ -173768,238 +174253,238 @@ index 000000000..4f72935f2 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/hal_dm.c b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_dm.c new file mode 100644 -index 000000000..1c38cd4e1 +index 0000000..4547dbe --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_dm.c @@ -0,0 +1,193 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2014 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#include -+#include -+ -+// A mapping from HalData to ODM. -+ODM_BOARD_TYPE_E boardType(u8 InterfaceSel) -+{ -+ ODM_BOARD_TYPE_E board = ODM_BOARD_DEFAULT; -+ -+#ifdef CONFIG_PCI_HCI -+ INTERFACE_SELECT_PCIE pcie = (INTERFACE_SELECT_PCIE)InterfaceSel; -+ switch (pcie) -+ { -+ case INTF_SEL0_SOLO_MINICARD: -+ board |= ODM_BOARD_MINICARD; -+ break; -+ case INTF_SEL1_BT_COMBO_MINICARD: -+ board |= ODM_BOARD_BT; -+ board |= ODM_BOARD_MINICARD; -+ break; -+ default: -+ board = ODM_BOARD_DEFAULT; -+ break; -+ } -+ -+#elif defined(CONFIG_USB_HCI) -+ INTERFACE_SELECT_USB usb = (INTERFACE_SELECT_USB)InterfaceSel; -+ switch (usb) -+ { -+ case INTF_SEL1_USB_High_Power: -+ board |= ODM_BOARD_EXT_LNA; -+ board |= ODM_BOARD_EXT_PA; -+ break; -+ case INTF_SEL2_MINICARD: -+ board |= ODM_BOARD_MINICARD; -+ break; -+ case INTF_SEL4_USB_Combo: -+ board |= ODM_BOARD_BT; -+ break; -+ case INTF_SEL5_USB_Combo_MF: -+ board |= ODM_BOARD_BT; -+ break; -+ case INTF_SEL0_USB: -+ case INTF_SEL3_USB_Solo: -+ default: -+ board = ODM_BOARD_DEFAULT; -+ break; -+ } -+ -+#endif -+ //DBG_871X("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); -+ -+ return board; -+} -+ -+void Init_ODM_ComInfo(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ int i; -+ -+ _rtw_memset(pDM_Odm,0,sizeof(*pDM_Odm)); -+ -+ pDM_Odm->Adapter = adapter; -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE); -+ -+ if (rtw_get_intf_type(adapter) == RTW_GSPI) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); -+ else -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, rtw_get_intf_type(adapter)); -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID)); -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID); -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec); -+ -+ -+ if (pHalData->rf_type == RF_1T1R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); -+ else if (pHalData->rf_type == RF_1T2R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); -+ else if (pHalData->rf_type == RF_2T2R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); -+ else if (pHalData->rf_type == RF_2T2R_GREEN) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R_GREEN); -+ else if (pHalData->rf_type == RF_2T3R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T3R); -+ else if (pHalData->rf_type == RF_2T4R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T4R); -+ else if (pHalData->rf_type == RF_3T3R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T3R); -+ else if (pHalData->rf_type == RF_3T4R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T4R); -+ else if (pHalData->rf_type == RF_4T4R) -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_4T4R); -+ else -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_XTXR); -+ -+ -+{ -+ //1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= -+ u8 odm_board_type = ODM_BOARD_DEFAULT; -+ -+ if (pHalData->ExternalLNA_2G != 0) { -+ odm_board_type |= ODM_BOARD_EXT_LNA; -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1); -+ } -+ if (pHalData->ExternalLNA_5G != 0) { -+ odm_board_type |= ODM_BOARD_EXT_LNA_5G; -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1); -+ } -+ if (pHalData->ExternalPA_2G != 0) { -+ odm_board_type |= ODM_BOARD_EXT_PA; -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1); -+ } -+ if (pHalData->ExternalPA_5G != 0) { -+ odm_board_type |= ODM_BOARD_EXT_PA_5G; -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1); -+ } -+ if (pHalData->EEPROMBluetoothCoexist) -+ odm_board_type |= ODM_BOARD_BT; -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type); -+ //1 ============== End of BoardType ============== -+} -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA); -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA); -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA); -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA); -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType); -+ -+ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0); -+ -+ /* Pointer reference */ -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate)); -+ -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &( pHalData->CurrentChannel)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb)); -+ -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving)); -+ /*Add by Yuchen for phydm beamforming*/ -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_TP, &(dvobj->traffic_stat.cur_tx_tp)); -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_TP, &(dvobj->traffic_stat.cur_rx_tp)); -+#ifdef CONFIG_USB_HCI -+ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed)); -+#endif -+ for(i=0; i ++#include ++ ++// A mapping from HalData to ODM. ++ODM_BOARD_TYPE_E boardType(u8 InterfaceSel) ++{ ++ ODM_BOARD_TYPE_E board = ODM_BOARD_DEFAULT; ++ ++#ifdef CONFIG_PCI_HCI ++ INTERFACE_SELECT_PCIE pcie = (INTERFACE_SELECT_PCIE)InterfaceSel; ++ switch (pcie) ++ { ++ case INTF_SEL0_SOLO_MINICARD: ++ board |= ODM_BOARD_MINICARD; ++ break; ++ case INTF_SEL1_BT_COMBO_MINICARD: ++ board |= ODM_BOARD_BT; ++ board |= ODM_BOARD_MINICARD; ++ break; ++ default: ++ board = ODM_BOARD_DEFAULT; ++ break; ++ } ++ ++#elif defined(CONFIG_USB_HCI) ++ INTERFACE_SELECT_USB usb = (INTERFACE_SELECT_USB)InterfaceSel; ++ switch (usb) ++ { ++ case INTF_SEL1_USB_High_Power: ++ board |= ODM_BOARD_EXT_LNA; ++ board |= ODM_BOARD_EXT_PA; ++ break; ++ case INTF_SEL2_MINICARD: ++ board |= ODM_BOARD_MINICARD; ++ break; ++ case INTF_SEL4_USB_Combo: ++ board |= ODM_BOARD_BT; ++ break; ++ case INTF_SEL5_USB_Combo_MF: ++ board |= ODM_BOARD_BT; ++ break; ++ case INTF_SEL0_USB: ++ case INTF_SEL3_USB_Solo: ++ default: ++ board = ODM_BOARD_DEFAULT; ++ break; ++ } ++ ++#endif ++ //DBG_871X("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); ++ ++ return board; ++} ++ ++void Init_ODM_ComInfo(_adapter *adapter) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); ++ int i; ++ ++ _rtw_memset(pDM_Odm,0,sizeof(*pDM_Odm)); ++ ++ pDM_Odm->Adapter = adapter; ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE); ++ ++ if (rtw_get_intf_type(adapter) == RTW_GSPI) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); ++ else ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, rtw_get_intf_type(adapter)); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID)); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec); ++ ++ ++ if (pHalData->rf_type == RF_1T1R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); ++ else if (pHalData->rf_type == RF_1T2R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); ++ else if (pHalData->rf_type == RF_2T2R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); ++ else if (pHalData->rf_type == RF_2T2R_GREEN) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R_GREEN); ++ else if (pHalData->rf_type == RF_2T3R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T3R); ++ else if (pHalData->rf_type == RF_2T4R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T4R); ++ else if (pHalData->rf_type == RF_3T3R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T3R); ++ else if (pHalData->rf_type == RF_3T4R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T4R); ++ else if (pHalData->rf_type == RF_4T4R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_4T4R); ++ else ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_XTXR); ++ ++ ++{ ++ //1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= ++ u8 odm_board_type = ODM_BOARD_DEFAULT; ++ ++ if (pHalData->ExternalLNA_2G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_LNA; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1); ++ } ++ if (pHalData->ExternalLNA_5G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_LNA_5G; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1); ++ } ++ if (pHalData->ExternalPA_2G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_PA; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1); ++ } ++ if (pHalData->ExternalPA_5G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_PA_5G; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1); ++ } ++ if (pHalData->EEPROMBluetoothCoexist) ++ odm_board_type |= ODM_BOARD_BT; ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type); ++ //1 ============== End of BoardType ============== ++} ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0); ++ ++ /* Pointer reference */ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate)); ++ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &( pHalData->CurrentChannel)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb)); ++ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving)); ++ /*Add by Yuchen for phydm beamforming*/ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_TP, &(dvobj->traffic_stat.cur_tx_tp)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_TP, &(dvobj->traffic_stat.cur_rx_tp)); ++#ifdef CONFIG_USB_HCI ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed)); ++#endif ++ for(i=0; i -+#endif -+#ifdef CONFIG_RTL8723B -+#include -+#endif -+#ifdef CONFIG_RTL8192E -+#include -+#endif -+#ifdef CONFIG_RTL8814A -+#include -+#endif -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+#include -+#endif -+#ifdef CONFIG_RTL8703B -+#include -+#endif -+#ifdef CONFIG_RTL8188F -+#include -+#endif -+ -+ -+u8 MgntQuery_NssTxRate(u16 Rate) -+{ -+ u8 NssNum = RF_TX_NUM_NONIMPLEMENT; -+ -+ if ((Rate >= MGN_MCS8 && Rate <= MGN_MCS15) || -+ (Rate >= MGN_VHT2SS_MCS0 && Rate <= MGN_VHT2SS_MCS9)) -+ NssNum = RF_2TX; -+ else if ((Rate >= MGN_MCS16 && Rate <= MGN_MCS23) || -+ (Rate >= MGN_VHT3SS_MCS0 && Rate <= MGN_VHT3SS_MCS9)) -+ NssNum = RF_3TX; -+ else if ((Rate >= MGN_MCS24 && Rate <= MGN_MCS31) || -+ (Rate >= MGN_VHT4SS_MCS0 && Rate <= MGN_VHT4SS_MCS9)) -+ NssNum = RF_4TX; -+ else -+ NssNum = RF_1TX; -+ -+ return NssNum; -+} -+ -+void hal_mpt_SwitchRfSetting(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u8 ChannelToSw = pMptCtx->MptChannelToSw; -+ ULONG ulRateIdx = pMptCtx->MptRateIndex; -+ ULONG ulbandwidth = pMptCtx->MptBandWidth; -+ -+ /* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis.*/ -+ if (IS_HARDWARE_TYPE_8188ES(pAdapter) && (1 <= ChannelToSw && ChannelToSw <= 11) && -+ (ulRateIdx == MPT_RATE_MCS0 || ulRateIdx == MPT_RATE_1M || ulRateIdx == MPT_RATE_6M)) { -+ pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0); -+ pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0); -+ -+ if ((PlatformEFIORead4Byte(pAdapter, 0xF4)&BIT29) == BIT29) { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xB); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xB); -+ } else { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xD); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xD); -+ } -+ } else if (IS_HARDWARE_TYPE_8188EE(pAdapter)) { /* <20140903, VincentL> Asked by RF Eason and Edlu*/ -+ -+ if (ChannelToSw == 3 && ulbandwidth == MPT_BW_40MHZ) { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ -+ } else { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ -+ } -+ -+ } else if (IS_HARDWARE_TYPE_8188E(pAdapter)) { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_A); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_B); -+ } -+} -+ -+s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+ -+ -+ if (!netif_running(padapter->pnetdev)) { -+ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); -+ return _FAIL; -+ } -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { -+ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); -+ return _FAIL; -+ } -+ if (enable) -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; -+ else -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; -+ -+ return _SUCCESS; -+} -+ -+void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+ -+ -+ *enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl; -+} -+ -+ -+void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) -+{ -+ u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; -+ u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; -+ u8 i; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); -+ u1Byte u1Channel = pHalData->CurrentChannel; -+ ULONG ulRateIdx = pMptCtx->MptRateIndex; -+ u1Byte DataRate = 0xFF; -+ -+ DataRate = MptToMgntRate(ulRateIdx); -+ -+ if (u1Channel == 14 && IS_CCK_RATE(DataRate)) -+ pHalData->bCCKinCH14 = TRUE; -+ else -+ pHalData->bCCKinCH14 = FALSE; -+ -+ if (IS_HARDWARE_TYPE_8703B(Adapter)) { -+ if ((u1Channel == 14) && IS_CCK_RATE(DataRate)) { -+ /* Channel 14 in CCK, need to set 0xA26~0xA29 to 0 for 8703B */ -+ PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); -+ PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); -+ -+ RT_TRACE(_module_mp_, DBG_LOUD, ("MPT_CCKTxPowerAdjust 8703B CCK in Channel %u\n", u1Channel)); -+ } else { -+ /* Normal setting for 8703B, just recover to the default setting. */ -+ /* This hardcore values reference from the parameter which BB team gave. */ -+ for (i = 0 ; i < 2 ; ++i) -+ PHY_SetBBReg(Adapter, pHalData->RegForRecover[i].offset, bMaskDWord, pHalData->RegForRecover[i].value); -+ -+ RT_TRACE(_module_mp_, DBG_LOUD, ("MPT_CCKTxPowerAdjust 8703B in Channel %u restore to default setting\n", u1Channel)); -+ } -+ } else if (IS_HARDWARE_TYPE_8188F(Adapter)) { -+ /* No difference between CCK in CH14 and others, no need to change TX filter */ -+ } else { -+ -+ /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ -+ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); -+ -+ if (!pHalData->bCCKinCH14) { -+ /* Readback the current bb cck swing value and compare with the table to */ -+ /* get the current swing index */ -+ for (i = 0; i < CCK_TABLE_SIZE; i++) { -+ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && -+ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) { -+ CCKSwingIndex = i; -+ RT_TRACE(_module_mp_, DBG_LOUD, ("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", -+ (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); -+ break; -+ } -+ } -+ -+ /*Write 0xa22 0xa23*/ -+ TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + -+ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8); -+ -+ -+ /*Write 0xa24 ~ 0xa27*/ -+ TempVal2 = 0; -+ TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + -+ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + -+ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16) + -+ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); -+ -+ /*Write 0xa28 0xa29*/ -+ TempVal3 = 0; -+ TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + -+ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8); -+ } else { -+ for (i = 0; i < CCK_TABLE_SIZE; i++) { -+ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && -+ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) { -+ CCKSwingIndex = i; -+ RT_TRACE(_module_mp_, DBG_LOUD, ("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", -+ (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); -+ break; -+ } -+ } -+ -+ /*Write 0xa22 0xa23*/ -+ TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + -+ (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8); -+ -+ /*Write 0xa24 ~ 0xa27*/ -+ TempVal2 = 0; -+ TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + -+ (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + -+ (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16) + -+ (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); -+ -+ /*Write 0xa28 0xa29*/ -+ TempVal3 = 0; -+ TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + -+ (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8); -+ } -+ -+ write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); -+ write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); -+ write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); -+ -+ } -+ -+} -+ -+void hal_mpt_SetChannel(PADAPTER pAdapter) -+{ -+ u8 eRFPath; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+ struct mp_priv *pmp = &pAdapter->mppriv; -+ u8 channel = pmp->channel; -+ u8 bandwidth = pmp->bandwidth; -+ u8 rate = pmp->rateidx; -+ -+ hal_mpt_SwitchRfSetting(pAdapter); -+ -+ SelectChannel(pAdapter, channel); -+ -+ pHalData->bSwChnl = _TRUE; -+ pHalData->bSetChnlBW = _TRUE; -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); -+ -+ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); -+ -+} -+ -+/* -+ * Notice -+ * Switch bandwitdth may change center frequency(channel) -+ */ -+void hal_mpt_SetBandwidth(PADAPTER pAdapter) -+{ -+ struct mp_priv *pmp = &pAdapter->mppriv; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ u8 channel = pmp->channel; -+ u8 bandwidth = pmp->bandwidth; -+ -+ SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); -+ pHalData->bSwChnl = _TRUE; -+ pHalData->bSetChnlBW = _TRUE; -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); -+ -+ hal_mpt_SwitchRfSetting(pAdapter); -+} -+ -+void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower) -+{ -+ RT_TRACE(_module_mp_, DBG_LOUD, ("===>mpt_SetTxPower_Old(): Case = %d\n", Rate)); -+ switch (Rate) { -+ case MPT_CCK: -+ { -+ u4Byte TxAGC = 0, pwr = 0; -+ u1Byte rf; -+ -+ pwr = pTxPower[ODM_RF_PATH_A]; -+ if (pwr < 0x3f) { -+ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); -+ PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[ODM_RF_PATH_A]); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); -+ } -+ pwr = pTxPower[ODM_RF_PATH_B]; -+ if (pwr < 0x3f) { -+ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, pTxPower[ODM_RF_PATH_B]); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); -+ } -+ -+ } break; -+ -+ case MPT_OFDM_AND_HT: -+ { -+ u4Byte TxAGC = 0; -+ u1Byte pwr = 0, rf; -+ -+ pwr = pTxPower[0]; -+ if (pwr < 0x3f) { -+ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); -+ DBG_871X("HT Tx-rf(A) Power = 0x%x\n", TxAGC); -+ -+ PHY_SetBBReg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); -+ } -+ TxAGC = 0; -+ pwr = pTxPower[1]; -+ if (pwr < 0x3f) { -+ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); -+ DBG_871X("HT Tx-rf(B) Power = 0x%x\n", TxAGC); -+ -+ PHY_SetBBReg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); -+ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); -+ } -+ } break; -+ -+ default: -+ break; -+ } -+ DBG_871X("<===mpt_SetTxPower_Old()\n"); -+} -+ -+ -+ -+void -+mpt_SetTxPower( -+ PADAPTER pAdapter, -+ MPT_TXPWR_DEF Rate, -+ pu1Byte pTxPower -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ u1Byte path = 0 , i = 0, MaxRate = MGN_6M; -+ u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_B; -+ -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ EndPath = ODM_RF_PATH_D; -+ -+ switch (Rate) { -+ case MPT_CCK: -+ { -+ u1Byte rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; -+ -+ for (path = StartPath; path <= EndPath; path++) -+ for (i = 0; i < sizeof(rate); ++i) -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } -+ break; -+ -+ case MPT_OFDM: -+ { -+ u1Byte rate[] = { -+ MGN_6M, MGN_9M, MGN_12M, MGN_18M, -+ MGN_24M, MGN_36M, MGN_48M, MGN_54M, -+ }; -+ -+ for (path = StartPath; path <= EndPath; path++) -+ for (i = 0; i < sizeof(rate); ++i) -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } break; -+ -+ case MPT_HT: -+ { -+ u1Byte rate[] = { -+ MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, -+ MGN_MCS5, MGN_MCS6, MGN_MCS7, MGN_MCS8, MGN_MCS9, -+ MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, -+ MGN_MCS15, MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, -+ MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23, MGN_MCS24, -+ MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, -+ MGN_MCS30, MGN_MCS31, -+ }; -+ if (pHalData->rf_type == RF_3T3R) -+ MaxRate = MGN_MCS23; -+ else if (pHalData->rf_type == RF_2T2R) -+ MaxRate = MGN_MCS15; -+ else -+ MaxRate = MGN_MCS7; -+ -+ for (path = StartPath; path <= EndPath; path++) { -+ for (i = 0; i < sizeof(rate); ++i) { -+ if (rate[i] > MaxRate) -+ break; -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } -+ } -+ } break; -+ -+ case MPT_VHT: -+ { -+ u1Byte rate[] = { -+ MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, -+ MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9, -+ MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, -+ MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, -+ MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4, -+ MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, -+ MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4, -+ MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9, -+ }; -+ -+ if (pHalData->rf_type == RF_3T3R) -+ MaxRate = MGN_VHT3SS_MCS9; -+ else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R) -+ MaxRate = MGN_VHT2SS_MCS9; -+ else -+ MaxRate = MGN_VHT1SS_MCS9; -+ -+ for (path = StartPath; path <= EndPath; path++) { -+ for (i = 0; i < sizeof(rate); ++i) { -+ if (rate[i] > MaxRate) -+ break; -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } -+ } -+ } break; -+ -+ default: -+ DBG_871X("<===mpt_SetTxPower: Illegal channel!!\n"); -+ break; -+ } -+ -+} -+ -+ -+void hal_mpt_SetTxPower(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+ -+ if (pHalData->rf_chip < RF_TYPE_MAX) { -+ if (IS_HARDWARE_TYPE_8188E(pAdapter) || -+ IS_HARDWARE_TYPE_8723B(pAdapter) || -+ IS_HARDWARE_TYPE_8192E(pAdapter) || -+ IS_HARDWARE_TYPE_8703B(pAdapter) || -+ IS_HARDWARE_TYPE_8188F(pAdapter)) { -+ u8 path = (pHalData->AntennaTxPath == ANTENNA_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B); -+ -+ DBG_8192C("===> MPT_ProSetTxPower: Old\n"); -+ -+ RT_TRACE(_module_mp_, DBG_LOUD, ("===> MPT_ProSetTxPower[Old]:\n")); -+ mpt_SetTxPower_Old(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); -+ mpt_SetTxPower_Old(pAdapter, MPT_OFDM_AND_HT, pMptCtx->TxPwrLevel); -+ -+ } else { -+ DBG_871X("===> MPT_ProSetTxPower: Jaguar\n"); -+ mpt_SetTxPower(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); -+ mpt_SetTxPower(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel); -+ mpt_SetTxPower(pAdapter, MPT_HT, pMptCtx->TxPwrLevel); -+ mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel); -+ -+ } -+ } else -+ DBG_8192C("RFChipID < RF_TYPE_MAX, the RF chip is not supported - %d\n", pHalData->rf_chip); -+ -+ ODM_ClearTxPowerTrackingState(pDM_Odm); -+ -+} -+ -+ -+void hal_mpt_SetDataRate(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u32 DataRate; -+ -+ DataRate = MptToMgntRate(pAdapter->mppriv.rateidx); -+ -+ hal_mpt_SwitchRfSetting(pAdapter); -+ -+ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); -+#ifdef CONFIG_RTL8723B -+ if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) { -+ if (IS_CCK_RATE(DataRate)) { -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0x6); -+ else -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0x6); -+ } else { -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); -+ else -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); -+ } -+ } -+ -+ if ((IS_HARDWARE_TYPE_8723BS(pAdapter) && -+ ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)))) { -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); -+ else -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); -+ } -+#endif -+} -+ -+ -+#define RF_PATH_AB 22 -+ -+#ifdef CONFIG_RTL8814A -+VOID mpt_ToggleIG_8814A(PADAPTER pAdapter) -+{ -+ u1Byte Path = 0; -+ u4Byte IGReg = rA_IGI_Jaguar, IGvalue = 0; -+ -+ for (Path; Path <= ODM_RF_PATH_D; Path++) { -+ switch (Path) { -+ case ODM_RF_PATH_B: -+ IGReg = rB_IGI_Jaguar; -+ break; -+ case ODM_RF_PATH_C: -+ IGReg = rC_IGI_Jaguar2; -+ break; -+ case ODM_RF_PATH_D: -+ IGReg = rD_IGI_Jaguar2; -+ break; -+ default: -+ IGReg = rA_IGI_Jaguar; -+ break; -+ } -+ -+ IGvalue = PHY_QueryBBReg(pAdapter, IGReg, bMaskByte0); -+ PHY_SetBBReg(pAdapter, IGReg, bMaskByte0, IGvalue+2); -+ PHY_SetBBReg(pAdapter, IGReg, bMaskByte0, IGvalue); -+ } -+} -+ -+VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) -+{ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; -+ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ -+ R_ANTENNA_SELECT_CCK *p_cck_txrx; -+ -+ u8 ForcedDataRate = HwRateToMRate(pAdapter->mppriv.rateidx); -+ u8 HtStbcCap = pAdapter->registrypriv.stbc_cap; -+ /*/PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);*/ -+ /*/PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo);*/ -+ -+ u32 ulAntennaTx = pHalData->AntennaTxPath; -+ u32 ulAntennaRx = pHalData->AntennaRxPath; -+ u8 NssforRate = MgntQuery_NssTxRate(ForcedDataRate); -+ -+ if (NssforRate == RF_2TX) { -+ DBG_871X("===> SetAntenna 2T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_BC: -+ pMptCtx->MptRfPath = ODM_RF_PATH_BC; -+ /*pHalData->ValidTxPath = 0x06; linux no use */ -+ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x106); /*/ 0x940[15:4]=12'b0000_0100_0011*/ -+ break; -+ -+ case ANTENNA_CD: -+ pMptCtx->MptRfPath = ODM_RF_PATH_CD; -+ /*pHalData->ValidTxPath = 0x0C;*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x40c); /*/ 0x940[15:4]=12'b0000_0100_0011*/ -+ break; -+ case ANTENNA_AB: default: -+ pMptCtx->MptRfPath = ODM_RF_PATH_AB; -+ /*pHalData->ValidTxPath = 0x03;*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x043); /*/ 0x940[15:4]=12'b0000_0100_0011*/ -+ break; -+ } -+ -+ } else if (NssforRate == RF_3TX) { -+ DBG_871X("===> SetAntenna 3T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_BCD: -+ pMptCtx->MptRfPath = ODM_RF_PATH_BCD; -+ /*pHalData->ValidTxPath = 0x0e;*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x90e); /*/ 0x940[27:16]=12'b0010_0100_0111*/ -+ break; -+ -+ case ANTENNA_ABC: default: -+ pMptCtx->MptRfPath = ODM_RF_PATH_ABC; -+ /*pHalData->ValidTxPath = 0x0d;*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x247); /*/ 0x940[27:16]=12'b0010_0100_0111*/ -+ break; -+ } -+ -+ } else { /*/if(NssforRate == RF_1TX)*/ -+ DBG_871X("===> SetAntenna 1T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); -+ switch (ulAntennaTx) { -+ case ANTENNA_B: -+ pMptCtx->MptRfPath = ODM_RF_PATH_B; -+ /*pHalData->ValidTxPath = 0x02;*/ -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); /*/ 0xa07[7:4] = 4'b0100*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x002); /*/ 0x93C[31:20]=12'b0000_0000_0010*/ -+ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x2); /* 0x80C[7:4] = 4'b0010*/ -+ break; -+ -+ case ANTENNA_C: -+ pMptCtx->MptRfPath = ODM_RF_PATH_C; -+ /*pHalData->ValidTxPath = 0x04;*/ -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x2); /*/ 0xa07[7:4] = 4'b0010*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x004); /*/ 0x93C[31:20]=12'b0000_0000_0100*/ -+ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x4); /*/ 0x80C[7:4] = 4'b0100*/ -+ break; -+ -+ case ANTENNA_D: -+ pMptCtx->MptRfPath = ODM_RF_PATH_D; -+ /*pHalData->ValidTxPath = 0x08;*/ -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x1); /*/ 0xa07[7:4] = 4'b0001*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x008); /*/ 0x93C[31:20]=12'b0000_0000_1000*/ -+ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x8); /*/ 0x80C[7:4] = 4'b1000*/ -+ break; -+ -+ case ANTENNA_A: default: -+ pMptCtx->MptRfPath = ODM_RF_PATH_A; -+ /*pHalData->ValidTxPath = 0x01;*/ -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x8); /*/ 0xa07[7:4] = 4'b1000*/ -+ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x001); /*/ 0x93C[31:20]=12'b0000_0000_0001*/ -+ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x1); /*/ 0x80C[7:4] = 4'b0001*/ -+ break; -+ } -+ } -+ -+ switch (ulAntennaRx) { -+ case ANTENNA_A: -+ /*pHalData->ValidRxPath = 0x01;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x0); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_B: -+ /*pHalData->ValidRxPath = 0x02;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x1); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_C: -+ /*pHalData->ValidRxPath = 0x04;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x44); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x2); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_D: -+ /*pHalData->ValidRxPath = 0x08;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x88); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x3); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_BC: -+ /*pHalData->ValidRxPath = 0x06;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x66); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_CD: -+ /*pHalData->ValidRxPath = 0x0C;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xcc); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0xB); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_BCD: -+ /*pHalData->ValidRxPath = 0x0e;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xee); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, Rx mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); -+ break; -+ -+ case ANTENNA_ABCD: -+ /*pHalData->ValidRxPath = 0x0f;*/ -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xff); -+ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ -+ /*/ CCA related PD_delay_th*/ -+ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); -+ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); -+ break; -+ -+ default: -+ RT_TRACE(_module_mp_, _drv_warning_, ("Unknown Rx antenna.\n")); -+ break; -+ } -+ -+ PHY_Set_SecCCATH_by_RXANT_8814A(pAdapter, ulAntennaRx); -+ -+ mpt_ToggleIG_8814A(pAdapter); -+ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); -+} -+ -+VOID -+mpt_SetSingleTone_8814A( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN bSingleTone, -+ IN BOOLEAN bEnPMacTx) -+{ -+ -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_A; -+ static u4Byte regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; -+ -+ if (bSingleTone) { -+ regIG0 = PHY_QueryBBReg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ -+ regIG1 = PHY_QueryBBReg(pAdapter, rB_TxScale_Jaguar, bMaskDWord); /*/ 0xE1C[31:21]*/ -+ regIG2 = PHY_QueryBBReg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord); /*/ 0x181C[31:21]*/ -+ regIG3 = PHY_QueryBBReg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord); /*/ 0x1A1C[31:21]*/ -+ -+ switch (pMptCtx->MptRfPath) { -+ case ODM_RF_PATH_A: case ODM_RF_PATH_B: -+ case ODM_RF_PATH_C: case ODM_RF_PATH_D: -+ StartPath = pMptCtx->MptRfPath; -+ EndPath = pMptCtx->MptRfPath; -+ break; -+ case ODM_RF_PATH_AB: -+ EndPath = ODM_RF_PATH_B; -+ break; -+ case ODM_RF_PATH_BC: -+ StartPath = ODM_RF_PATH_B; -+ EndPath = ODM_RF_PATH_C; -+ break; -+ case ODM_RF_PATH_ABC: -+ EndPath = ODM_RF_PATH_C; -+ break; -+ case ODM_RF_PATH_BCD: -+ StartPath = ODM_RF_PATH_B; -+ EndPath = ODM_RF_PATH_D; -+ break; -+ case ODM_RF_PATH_ABCD: -+ EndPath = ODM_RF_PATH_D; -+ break; -+ } -+ -+ if (bEnPMacTx == FALSE) { -+ hal_mpt_SetOFDMContinuousTx(pAdapter, _TRUE); -+ issue_nulldata(pAdapter, NULL, 1, 3, 500); -+ } -+ -+ PHY_SetBBReg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ -+ -+ for (StartPath; StartPath <= EndPath; StartPath++) { -+ PHY_SetRFReg(pAdapter, StartPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ -+ PHY_SetRFReg(pAdapter, StartPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ -+ -+ PHY_SetRFReg(pAdapter, StartPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ } -+ -+ PHY_SetBBReg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ -+ PHY_SetBBReg(pAdapter, rB_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xE1C[31:21]*/ -+ PHY_SetBBReg(pAdapter, rC_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x181C[31:21]*/ -+ PHY_SetBBReg(pAdapter, rD_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x1A1C[31:21]*/ -+ -+ } else { -+ -+ switch (pMptCtx->MptRfPath) { -+ case ODM_RF_PATH_A: case ODM_RF_PATH_B: -+ case ODM_RF_PATH_C: case ODM_RF_PATH_D: -+ StartPath = pMptCtx->MptRfPath; -+ EndPath = pMptCtx->MptRfPath; -+ break; -+ case ODM_RF_PATH_AB: -+ EndPath = ODM_RF_PATH_B; -+ break; -+ case ODM_RF_PATH_BC: -+ StartPath = ODM_RF_PATH_B; -+ EndPath = ODM_RF_PATH_C; -+ break; -+ case ODM_RF_PATH_ABC: -+ EndPath = ODM_RF_PATH_C; -+ break; -+ case ODM_RF_PATH_BCD: -+ StartPath = ODM_RF_PATH_B; -+ EndPath = ODM_RF_PATH_D; -+ break; -+ case ODM_RF_PATH_ABCD: -+ EndPath = ODM_RF_PATH_D; -+ break; -+ } -+ -+ for (StartPath; StartPath <= EndPath; StartPath++) -+ PHY_SetRFReg(pAdapter, StartPath, LNA_Low_Gain_3, BIT1, 0x0); /*// RF LO disabled*/ -+ -+ -+ PHY_SetBBReg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ -+ -+ if (bEnPMacTx == FALSE) -+ hal_mpt_SetOFDMContinuousTx(pAdapter, _FALSE); -+ -+ PHY_SetBBReg(pAdapter, rA_TxScale_Jaguar, bMaskDWord, regIG0); /* 0xC1C[31:21]*/ -+ PHY_SetBBReg(pAdapter, rB_TxScale_Jaguar, bMaskDWord, regIG1); /* 0xE1C[31:21]*/ -+ PHY_SetBBReg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord, regIG2); /* 0x181C[31:21]*/ -+ PHY_SetBBReg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ -+ } -+} -+ -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+void mpt_SetRFPath_8812A(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; -+ u32 ulAntennaTx, ulAntennaRx; -+ -+ ulAntennaTx = pHalData->AntennaTxPath; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_A: -+ pMptCtx->MptRfPath = ODM_RF_PATH_A; -+ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); -+ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) -+ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); -+ break; -+ case ANTENNA_B: -+ pMptCtx->MptRfPath = ODM_RF_PATH_B; -+ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); -+ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) -+ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); -+ break; -+ case ANTENNA_AB: -+ pMptCtx->MptRfPath = ODM_RF_PATH_AB; -+ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); -+ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) -+ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); -+ break; -+ default: -+ pMptCtx->MptRfPath = ODM_RF_PATH_AB; -+ DBG_871X("Unknown Tx antenna.\n"); -+ break; -+ } -+ -+ switch (ulAntennaRx) { -+ u32 reg0xC50 = 0; -+ case ANTENNA_A: -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); -+ -+ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ -+ reg0xC50 = PHY_QueryBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0); -+ PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50+2); -+ PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50); -+ break; -+ case ANTENNA_B: -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby mode */ -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); -+ -+ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ -+ reg0xC50 = PHY_QueryBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0); -+ PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50+2); -+ PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50); -+ break; -+ case ANTENNA_AB: -+ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ -+ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); -+ break; -+ default: -+ DBG_871X("Unknown Rx antenna.\n"); -+ break; -+ } -+ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); -+} -+#endif -+ -+ -+#ifdef CONFIG_RTL8723B -+void mpt_SetRFPath_8723B(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u32 ulAntennaTx, ulAntennaRx; -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ ulAntennaTx = pHalData->AntennaTxPath; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ if (pHalData->rf_chip >= RF_TYPE_MAX) { -+ DBG_8192C("This RF chip ID is not supported\n"); -+ return; -+ } -+ -+ switch (pAdapter->mppriv.antenna_tx) { -+ u8 p = 0, i = 0; -+ case ANTENNA_A: /*/ Actually path S1 (Wi-Fi)*/ -+ { -+ pMptCtx->MptRfPath = ODM_RF_PATH_A; -+ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x0); -+ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ -+ -+ /*/<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ -+ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); -+ else -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); -+ -+ -+ for (i = 0; i < 3; ++i) { -+ u4Byte offset = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][0]; -+ u4Byte data = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][1]; -+ -+ if (offset != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_8192C("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ -+ } -+ for (i = 0; i < 2; ++i) { -+ u4Byte offset = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][0]; -+ u4Byte data = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][1]; -+ -+ if (offset != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_8192C("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ case ANTENNA_B: /*/ Actually path S0 (BT)*/ -+ { -+ u4Byte offset; -+ u4Byte data; -+ -+ pMptCtx->MptRfPath = ODM_RF_PATH_B; -+ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x5); -+ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/ -+ -+ /* <20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ -+ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); -+ else -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); -+ -+ for (i = 0; i < 3; ++i) { -+ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ -+ offset = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][0]; -+ data = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_B][i][1]; -+ if (pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_B][i][0] != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_8192C("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ -+ for (i = 0; i < 2; ++i) { -+ offset = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][0]; -+ data = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_B][i][1]; -+ -+ if (pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_B][i][0] != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_8192C("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ default: -+ pMptCtx->MptRfPath = RF_PATH_AB; -+ RT_TRACE(_module_mp_, _drv_notice_, ("Unknown Tx antenna.\n")); -+ break; -+ } -+ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); -+} -+#endif -+ -+#ifdef CONFIG_RTL8703B -+void mpt_SetRFPath_8703B(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u4Byte ulAntennaTx, ulAntennaRx; -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ ulAntennaTx = pHalData->AntennaTxPath; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ if (pHalData->rf_chip >= RF_TYPE_MAX) { -+ DBG_871X("This RF chip ID is not supported\n"); -+ return; -+ } -+ -+ switch (pAdapter->mppriv.antenna_tx) { -+ u1Byte p = 0, i = 0; -+ -+ case ANTENNA_A: /* Actually path S1 (Wi-Fi) */ -+ { -+ pMptCtx->MptRfPath = ODM_RF_PATH_A; -+ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x0); -+ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ -+ -+ for (i = 0; i < 3; ++i) { -+ u4Byte offset = pRFCalibrateInfo->TxIQC_8703B[i][0]; -+ u4Byte data = pRFCalibrateInfo->TxIQC_8703B[i][1]; -+ -+ if (offset != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_871X("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ -+ } -+ for (i = 0; i < 2; ++i) { -+ u4Byte offset = pRFCalibrateInfo->RxIQC_8703B[i][0]; -+ u4Byte data = pRFCalibrateInfo->RxIQC_8703B[i][1]; -+ -+ if (offset != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_871X("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ case ANTENNA_B: /* Actually path S0 (BT)*/ -+ { -+ pMptCtx->MptRfPath = ODM_RF_PATH_B; -+ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x5); -+ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ -+ -+ for (i = 0; i < 3; ++i) { -+ u4Byte offset = pRFCalibrateInfo->TxIQC_8703B[i][0]; -+ u4Byte data = pRFCalibrateInfo->TxIQC_8703B[i][1]; -+ -+ if (pRFCalibrateInfo->TxIQC_8703B[i][0] != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_871X("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ for (i = 0; i < 2; ++i) { -+ u4Byte offset = pRFCalibrateInfo->RxIQC_8703B[i][0]; -+ u4Byte data = pRFCalibrateInfo->RxIQC_8703B[i][1]; -+ -+ if (pRFCalibrateInfo->RxIQC_8703B[i][0] != 0) { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); -+ DBG_871X("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ default: -+ pMptCtx->MptRfPath = RF_PATH_AB; -+ RT_TRACE(_module_mp_, _drv_notice_, ("Unknown Tx antenna.\n")); -+ break; -+ } -+ -+ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); -+} -+#endif -+ -+ -+VOID mpt_SetRFPath_819X(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u4Byte ulAntennaTx, ulAntennaRx; -+ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ -+ R_ANTENNA_SELECT_CCK *p_cck_txrx; -+ u1Byte r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; -+ u1Byte chgTx = 0, chgRx = 0; -+ u4Byte r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; -+ -+ ulAntennaTx = pHalData->AntennaTxPath; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; -+ p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; -+ -+ p_ofdm_tx->r_ant_ht1 = 0x1; -+ p_ofdm_tx->r_ant_ht2 = 0x2;/*Second TX RF path is A*/ -+ p_ofdm_tx->r_ant_non_ht = 0x3;/*/ 0x1+0x2=0x3 */ -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_A: -+ p_ofdm_tx->r_tx_antenna = 0x1; -+ r_ofdm_tx_en_val = 0x1; -+ p_ofdm_tx->r_ant_l = 0x1; -+ p_ofdm_tx->r_ant_ht_s1 = 0x1; -+ p_ofdm_tx->r_ant_non_ht_s1 = 0x1; -+ p_cck_txrx->r_ccktx_enable = 0x8; -+ chgTx = 1; -+ /*/ From SD3 Willis suggestion !!! Set RF A=TX and B as standby*/ -+ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ -+ { -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); -+ r_ofdm_tx_en_val = 0x3; -+ /*/ Power save*/ -+ /*/cosa r_ant_select_ofdm_val = 0x11111111;*/ -+ /*/ We need to close RFB by SW control*/ -+ if (pHalData->rf_type == RF_2T2R) { -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); -+ } -+ } -+ pMptCtx->MptRfPath = ODM_RF_PATH_A; -+ break; -+ case ANTENNA_B: -+ p_ofdm_tx->r_tx_antenna = 0x2; -+ r_ofdm_tx_en_val = 0x2; -+ p_ofdm_tx->r_ant_l = 0x2; -+ p_ofdm_tx->r_ant_ht_s1 = 0x2; -+ p_ofdm_tx->r_ant_non_ht_s1 = 0x2; -+ p_cck_txrx->r_ccktx_enable = 0x4; -+ chgTx = 1; -+ /*/ From SD3 Willis suggestion !!! Set RF A as standby*/ -+ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ -+ { -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); -+ -+ /*/ 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table.*/ -+ /*/ 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control*/ -+ if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) { -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); -+ /*/PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); -+ } -+ } -+ pMptCtx->MptRfPath = ODM_RF_PATH_B; -+ break; -+ case ANTENNA_AB:/*/ For 8192S*/ -+ p_ofdm_tx->r_tx_antenna = 0x3; -+ r_ofdm_tx_en_val = 0x3; -+ p_ofdm_tx->r_ant_l = 0x3; -+ p_ofdm_tx->r_ant_ht_s1 = 0x3; -+ p_ofdm_tx->r_ant_non_ht_s1 = 0x3; -+ p_cck_txrx->r_ccktx_enable = 0xC; -+ chgTx = 1; -+ /*/ From SD3Willis suggestion !!! Set RF B as standby*/ -+ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ -+ { -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); -+ /* Disable Power save*/ -+ /*cosa r_ant_select_ofdm_val = 0x3321333;*/ -+ /* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control*/ -+ if (pHalData->rf_type == RF_2T2R) { -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); -+ /*/PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); -+ } -+ } -+ pMptCtx->MptRfPath = ODM_RF_PATH_AB; -+ break; -+ default: -+ break; -+ } -+ -+ -+ -+/*// r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D -+// r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D -+// r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */ -+ switch (ulAntennaRx) { -+ case ANTENNA_A: -+ r_rx_antenna_ofdm = 0x1; /* A*/ -+ p_cck_txrx->r_cckrx_enable = 0x0; /* default: A*/ -+ p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A*/ -+ chgRx = 1; -+ break; -+ case ANTENNA_B: -+ r_rx_antenna_ofdm = 0x2; /*/ B*/ -+ p_cck_txrx->r_cckrx_enable = 0x1; /*/ default: B*/ -+ p_cck_txrx->r_cckrx_enable_2 = 0x1; /*/ option: B*/ -+ chgRx = 1; -+ break; -+ case ANTENNA_AB:/*/ For 8192S and 8192E/U...*/ -+ r_rx_antenna_ofdm = 0x3;/*/ AB*/ -+ p_cck_txrx->r_cckrx_enable = 0x0;/*/ default:A*/ -+ p_cck_txrx->r_cckrx_enable_2 = 0x1;/*/ option:B*/ -+ chgRx = 1; -+ break; -+ default: -+ break; -+ } -+ -+ -+ if (chgTx && chgRx) { -+ switch (pHalData->rf_chip) { -+ case RF_8225: -+ case RF_8256: -+ case RF_6052: -+ /*/r_ant_sel_cck_val = r_ant_select_cck_val;*/ -+ PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /*/OFDM Tx*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /*/OFDM Tx*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) { -+ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ } -+ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);/*/r_ant_sel_cck_val); /CCK TxRx*/ -+ break; -+ -+ default: -+ DBG_871X("Unsupported RFChipID for switching antenna.\n"); -+ break; -+ } -+ } -+} /* MPT_ProSetRFPath */ -+ -+ -+void hal_mpt_SetAntenna(PADAPTER pAdapter) -+ -+{ -+ DBG_871X("Do %s\n", __func__); -+#ifdef CONFIG_RTL8814A -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { -+ mpt_SetRFPath_8814A(pAdapter); -+ return; -+ } -+#endif -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { -+ mpt_SetRFPath_8812A(pAdapter); -+ return; -+ } -+#endif -+#ifdef CONFIG_RTL8723B -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ mpt_SetRFPath_8723B(pAdapter); -+ return; -+ } -+#endif -+#ifdef CONFIG_RTL8703B -+ if (IS_HARDWARE_TYPE_8703B(pAdapter)) { -+ mpt_SetRFPath_8703B(pAdapter); -+ return; -+ } -+#endif -+ -+/* else if (IS_HARDWARE_TYPE_8821B(pAdapter)) -+ mpt_SetRFPath_8821B(pAdapter); -+ Prepare for 8822B -+ else if (IS_HARDWARE_TYPE_8822B(Context)) -+ mpt_SetRFPath_8822B(Context); -+*/ -+ mpt_SetRFPath_819X(pAdapter); -+ DBG_871X("mpt_SetRFPath_819X Do %s\n", __func__); -+ -+} -+ -+ -+s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ if (!netif_running(pAdapter->pnetdev)) { -+ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); -+ return _FAIL; -+ } -+ -+ -+ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { -+ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); -+ return _FAIL; -+ } -+ -+ -+ target_ther &= 0xff; -+ if (target_ther < 0x07) -+ target_ther = 0x07; -+ else if (target_ther > 0x1d) -+ target_ther = 0x1d; -+ -+ pHalData->EEPROMThermalMeter = target_ther; -+ -+ return _SUCCESS; -+} -+ -+ -+void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter) -+{ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); -+ -+} -+ -+ -+u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter) -+ -+{ -+ u32 ThermalValue = 0; -+ -+ ThermalValue = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, 0x42, 0xfc00); /*0x42: RF Reg[15:10]*/ -+ return (u8)ThermalValue; -+ -+} -+ -+ -+void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value) -+{ -+#if 0 -+ fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); -+ rtw_msleep_os(1000); -+ fw_cmd_data(pAdapter, value, 1); -+ *value &= 0xFF; -+#else -+ hal_mpt_TriggerRFThermalMeter(pAdapter); -+ rtw_msleep_os(1000); -+ *value = hal_mpt_ReadRFThermalMeter(pAdapter); -+#endif -+ -+} -+ -+ -+void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; -+ -+ if (bStart) {/*/ Start Single Carrier.*/ -+ RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleCarrierTx: test start\n")); -+ /*/ Start Single Carrier.*/ -+ /*/ 1. if OFDM block on?*/ -+ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1); /*set OFDM block on*/ -+ -+ /*/ 2. set CCK test mode off, set to CCK normal mode*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); -+ -+ /*/ 3. turn on scramble setting*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); -+ -+ /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) -+ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_SingleCarrier); -+ else -+#endif -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleCarrier); -+ -+ } else { -+ /*/ Stop Single Carrier.*/ -+ /*/ Stop Single Carrier.*/ -+ /*/ Turn off all test modes.*/ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) -+ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); -+ else -+#endif -+ -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); -+ -+ rtw_msleep_os(10); -+ /*/BB Reset*/ -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ } -+} -+ -+ -+void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u4Byte ulAntennaTx = pHalData->AntennaTxPath; -+ static u4Byte regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; -+ u8 rfPath; -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_B: -+ rfPath = ODM_RF_PATH_B; -+ break; -+ case ANTENNA_C: -+ rfPath = ODM_RF_PATH_C; -+ break; -+ case ANTENNA_D: -+ rfPath = ODM_RF_PATH_D; -+ break; -+ case ANTENNA_A: -+ default: -+ rfPath = ODM_RF_PATH_A; -+ break; -+ } -+ -+ pAdapter->mppriv.MptCtx.bSingleTone = bStart; -+ if (bStart) { -+ /*/ Start Single Tone.*/ -+ /*/ <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu)*/ -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { -+ regRF = PHY_QueryRFReg(pAdapter, rfPath, LNA_Low_Gain_3, bRFRegOffsetMask); -+ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); -+ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { /*/ USB need to do RF LO disable first, PCIE isn't required to follow this order.*/ -+ /*/Set MAC REG 88C: Prevent SingleTone Fail*/ -+ PHY_SetMacReg(pAdapter, 0x88C, 0xF00000, 0xF); -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO disabled*/ -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ -+ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x56, 0xF, 0x1); /*/ RF LO enabled*/ -+ } else { -+ /*/ S0/S1 both use PATH A to configure*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x76, 0xF, 0x1); /*/ RF LO enabled*/ -+ } -+ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */ -+ } -+ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { -+ /*Set BB REG 88C: Prevent SingleTone Fail*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF); -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x2); -+ -+ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ u1Byte p = ODM_RF_PATH_A; -+ -+ regRF = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask); -+ regBB0 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord); -+ regBB1 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord); -+ regBB2 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, bMaskDWord); -+ regBB3 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, bMaskDWord); -+ -+ PHY_SetBBReg(pAdapter, rOFDMCCKEN_Jaguar, BIT29|BIT28, 0x0); /*/ Disable CCK and OFDM*/ -+ -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_AB) { -+ for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { -+ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ -+ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ -+ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ } -+ } else { -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ } -+ -+ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ -+ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ -+ -+ if (pHalData->ExternalPA_5G) { -+ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/ -+ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/ -+ } else if (pHalData->ExternalPA_2G) { -+ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/ -+ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/ -+ } -+#endif -+ } -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ mpt_SetSingleTone_8814A(pAdapter, TRUE, FALSE); -+#endif -+ else /*/ Turn On SingleTone and turn off the other test modes.*/ -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleTone); -+ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ } else {/*/ Stop Single Ton e.*/ -+ -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, regRF); -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); -+ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x3);/*/ Tx mode*/ -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x0);/*/ RF LO disabled */ -+ /*/ RESTORE MAC REG 88C: Enable RF Functions*/ -+ PHY_SetMacReg(pAdapter, 0x88C, 0xF00000, 0x0); -+ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { -+ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x56, 0xF, 0x0); /*/ RF LO disabled*/ -+ } else { -+ /*/ S0/S1 both use PATH A to configure*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x76, 0xF, 0x0); /*/ RF LO disabled*/ -+ } -+ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { -+ -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */ -+ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */ -+ } -+ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x3); /*Tx mode*/ -+ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x0); /*RF LO disabled*/ -+ /*Set BB REG 88C: Prevent SingleTone Fail*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xc); -+ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ u1Byte p = ODM_RF_PATH_A; -+ -+ PHY_SetBBReg(pAdapter, rOFDMCCKEN_Jaguar, BIT29|BIT28, 0x3); /*/ Disable CCK and OFDM*/ -+ -+ if (pMptCtx->MptRfPath == ODM_RF_PATH_AB) { -+ for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { -+ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); -+ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x0); /*/ RF LO disabled*/ -+ } -+ } else { -+ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); -+ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x0); /*/ RF LO disabled*/ -+ } -+ -+ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, regBB0); -+ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, regBB1); -+ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, bMaskDWord, regBB2); -+ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, bMaskDWord, regBB3); -+#endif -+ } -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ mpt_SetSingleTone_8814A(pAdapter, FALSE, FALSE); -+ -+ else/*/ Turn off all test modes.*/ -+ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); -+#endif -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ -+ } -+} -+ -+ -+void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) -+{ -+ u8 Rate; -+ pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; -+ -+ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); -+ if (bStart) {/* Start Carrier Suppression.*/ -+ RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test start\n")); -+ if (Rate <= MPT_RATE_11M) { -+ /*/ 1. if CCK block on?*/ -+ if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) -+ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ -+ -+ /*/Turn Off All Test Mode*/ -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) -+ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF);/* rSingleTone_ContTx_Jaguar*/ -+ else -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); -+ -+ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /*/turn off scramble setting*/ -+ -+ /*/Set CCK Tx Test Rate*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /*/Set FTxRate to 1Mbps*/ -+ } -+ -+ /*Set for dynamic set Power index*/ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ } else {/* Stop Carrier Suppression.*/ -+ RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); -+ -+ if (Rate <= MPT_RATE_11M) { -+ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ -+ -+ /*BB Reset*/ -+ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ } -+ /*Stop for dynamic set Power index*/ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ } -+ DBG_871X("\n MPT_ProSetCarrierSupp() is finished.\n"); -+} -+ -+void hal_mpt_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) -+{ -+ u32 cckrate; -+ -+ if (bStart) { -+ RT_TRACE(_module_mp_, _drv_alert_, -+ ("SetCCKContinuousTx: test start\n")); -+ -+ /*/ 1. if CCK block on?*/ -+ if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) -+ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ -+ -+ /*/Turn Off All Test Mode*/ -+ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) -+ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF);/*rSingleTone_ContTx_Jaguar*/ -+ else -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); -+ -+ /*/Set CCK Tx Test Rate*/ -+ -+ cckrate = pAdapter->mppriv.rateidx; -+ -+ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); -+ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /*/turn on scramble setting*/ -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* rCCK0_RxHP 0xa15[1:0] = 11 force cck rxiq = 0*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /*/ 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); -+ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 1); -+ } -+ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ } else { -+ RT_TRACE(_module_mp_, _drv_info_, -+ ("SetCCKContinuousTx: test stop\n")); -+ -+ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*/normal mode*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /*/turn on scramble setting*/ -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /* && !IS_HARDWARE_TYPE_8822B(pAdapter) */) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0);/* rCCK0_RxHP 0xa15[1:0] = 2b00*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /*/ 0xc08[16] = 0*/ -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); -+ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 0); -+ } -+ -+ /*/BB Reset*/ -+ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ } -+ -+ pAdapter->mppriv.MptCtx.bCckContTx = bStart; -+ pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; -+} -+ -+void hal_mpt_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ if (bStart) { -+ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));/*/ 1. if OFDM block on?*/ -+ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1);/*/set OFDM block on*/ -+ -+ /*/ 2. set CCK test mode off, set to CCK normal mode*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); -+ -+ /*/ 3. turn on scramble setting*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /*&& !IS_HARDWARE_TYPE_8822B(pAdapter)*/) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* rCCK0_RxHP 0xa15[1:0] = 2b'11*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ -+ } -+ -+ /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) -+ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ContinuousTx);/*rSingleTone_ContTx_Jaguar*/ -+ else -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ContinuousTx); -+ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ } else { -+ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test stop\n")); -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) -+ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); -+ else -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); -+ /*/Delay 10 ms*/ -+ rtw_msleep_os(10); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /*&&! IS_HARDWARE_TYPE_8822B(pAdapter)*/) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0);/*/ 0xa15[1:0] = 0*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0);/*/ 0xc08[16] = 0*/ -+ } -+ -+ /*/BB Reset*/ -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ } -+ -+ pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; -+ pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; -+} -+ -+void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart) -+{ -+ u8 Rate; -+ RT_TRACE(_module_mp_, _drv_info_, -+ ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); -+ -+ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); -+ pAdapter->mppriv.MptCtx.bStartContTx = bStart; -+ -+ if (Rate <= MPT_RATE_11M) -+ hal_mpt_SetCCKContinuousTx(pAdapter, bStart); -+ else if (Rate >= MPT_RATE_6M) -+ hal_mpt_SetOFDMContinuousTx(pAdapter, bStart); -+} -+ -+#ifdef CONFIG_MP_VHT_HW_TX_MODE -+static VOID mpt_StopCckContTx( -+ PADAPTER pAdapter -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u1Byte u1bReg; -+ -+ pMptCtx->bCckContTx = FALSE; -+ pMptCtx->bOfdmContTx = FALSE; -+ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 2b00*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); -+ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 0); -+ } -+ -+ /*BB Reset*/ -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ -+} /* mpt_StopCckContTx */ -+ -+ -+static VOID mpt_StopOfdmContTx( -+ PADAPTER pAdapter -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u1Byte u1bReg; -+ u4Byte data; -+ -+ pMptCtx->bCckContTx = FALSE; -+ pMptCtx->bOfdmContTx = FALSE; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) -+ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); -+ else -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); -+ -+ rtw_mdelay_os(10); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 0*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ -+ } -+ -+ /*BB Reset*/ -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+} /* mpt_StopOfdmContTx */ -+ -+ -+static VOID mpt_StartCckContTx( -+ PADAPTER pAdapter -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ u4Byte cckrate; -+ -+ /* 1. if CCK block on */ -+ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn)) -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 1);/*set CCK block on*/ -+ -+ /*Turn Off All Test Mode*/ -+ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) -+ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); -+ else -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); -+ -+ cckrate = pAdapter->mppriv.rateidx; -+ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); -+ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*transmit mode*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 11 force cck rxiq = 0*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); -+ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 1); -+ } -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ pMptCtx->bCckContTx = TRUE; -+ pMptCtx->bOfdmContTx = FALSE; -+ -+} /* mpt_StartCckContTx */ -+ -+ -+static VOID mpt_StartOfdmContTx( -+ PADAPTER pAdapter -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -+ -+ /* 1. if OFDM block on?*/ -+ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) -+ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1);/*set OFDM block on*/ -+ -+ /* 2. set CCK test mode off, set to CCK normal mode*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); -+ -+ /* 3. turn on scramble setting*/ -+ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { -+ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 2b'11*/ -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ -+ } -+ -+ /* 4. Turn On Continue Tx and turn off the other test modes.*/ -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) -+ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ContinuousTx); -+ else -+ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ContinuousTx); -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ pMptCtx->bCckContTx = FALSE; -+ pMptCtx->bOfdmContTx = TRUE; -+} /* mpt_StartOfdmContTx */ -+ -+ -+VOID mpt_ProSetPMacTx(PADAPTER Adapter) -+{ -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); -+ RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; -+ u32 u4bTmp; -+ -+ DbgPrint("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound); -+ DbgPrint("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount, PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern); -+#if 0 -+ PRINT_DATA("LSIG ", PMacTxInfo.LSIG, 3); -+ PRINT_DATA("HT_SIG", PMacTxInfo.HT_SIG, 6); -+ PRINT_DATA("VHT_SIG_A", PMacTxInfo.VHT_SIG_A, 6); -+ PRINT_DATA("VHT_SIG_B", PMacTxInfo.VHT_SIG_B, 4); -+ DbgPrint("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC); -+ PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4); -+ -+ PRINT_DATA("Src Address", Adapter->mac_addr, 6); -+ PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, 6); -+#endif -+ -+ if (PMacTxInfo.bEnPMacTx == FALSE) { -+ if (PMacTxInfo.Mode == CONTINUOUS_TX) { -+ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) -+ mpt_StopCckContTx(Adapter); -+ else -+ mpt_StopOfdmContTx(Adapter); -+ } else if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { -+ u4bTmp = PHY_QueryBBReg(Adapter, 0xf50, bMaskLWord); -+ PHY_SetBBReg(Adapter, 0xb1c, bMaskLWord, u4bTmp+50); -+ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ -+ } else -+ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ -+ -+ if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { -+ /* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) -+ mpt_StopCckContTx(Adapter); -+ else -+ mpt_StopOfdmContTx(Adapter); -+ -+ mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE); -+ } -+ -+ return; -+ } -+ -+ if (PMacTxInfo.Mode == CONTINUOUS_TX) { -+ PMacTxInfo.PacketCount = 1; -+ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) -+ mpt_StartCckContTx(Adapter); -+ else -+ mpt_StartOfdmContTx(Adapter); -+ } else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { -+ /* Continuous TX -> HW TX -> RF Setting */ -+ PMacTxInfo.PacketCount = 1; -+ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) -+ mpt_StartCckContTx(Adapter); -+ else -+ mpt_StartOfdmContTx(Adapter); -+ } else if (PMacTxInfo.Mode == PACKETS_TX) { -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) -+ PMacTxInfo.PacketCount = 0xffff; -+ } -+ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { -+ /* 0xb1c[0:15] TX packet count 0xb1C[31:16] SFD*/ -+ u4bTmp = PMacTxInfo.PacketCount|(PMacTxInfo.SFD << 16); -+ PHY_SetBBReg(Adapter, 0xb1c, bMaskDWord, u4bTmp); -+ /* 0xb40 7:0 SIGNAL 15:8 SERVICE 31:16 LENGTH*/ -+ u4bTmp = PMacTxInfo.SignalField|(PMacTxInfo.ServiceField << 8)|(PMacTxInfo.LENGTH << 16); -+ PHY_SetBBReg(Adapter, 0xb40, bMaskDWord, u4bTmp); -+ u4bTmp = PMacTxInfo.CRC16[0] | (PMacTxInfo.CRC16[1] << 8); -+ PHY_SetBBReg(Adapter, 0xb44, bMaskLWord, u4bTmp); -+ -+ if (PMacTxInfo.bSPreamble) -+ PHY_SetBBReg(Adapter, 0xb0c, BIT27, 0); -+ else -+ PHY_SetBBReg(Adapter, 0xb0c, BIT27, 1); -+ } else { -+ PHY_SetBBReg(Adapter, 0xb18, 0xfffff, PMacTxInfo.PacketCount); -+ -+ u4bTmp = PMacTxInfo.LSIG[0]|((PMacTxInfo.LSIG[1]) << 8)|((PMacTxInfo.LSIG[2]) << 16)|((PMacTxInfo.PacketPattern) << 24); -+ PHY_SetBBReg(Adapter, 0xb08, bMaskDWord, u4bTmp); /* Set 0xb08[23:0] = LSIG, 0xb08[31:24] = Data init octet*/ -+ -+ if (PMacTxInfo.PacketPattern == 0x12) -+ u4bTmp = 0x3000000; -+ else -+ u4bTmp = 0; -+ } -+ -+ if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) { -+ u4bTmp |= PMacTxInfo.HT_SIG[0]|((PMacTxInfo.HT_SIG[1]) << 8)|((PMacTxInfo.HT_SIG[2]) << 16); -+ PHY_SetBBReg(Adapter, 0xb0c, bMaskDWord, u4bTmp); -+ u4bTmp = PMacTxInfo.HT_SIG[3]|((PMacTxInfo.HT_SIG[4]) << 8)|((PMacTxInfo.HT_SIG[5]) << 16); -+ PHY_SetBBReg(Adapter, 0xb10, 0xffffff, u4bTmp); -+ } else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { -+ u4bTmp |= PMacTxInfo.VHT_SIG_A[0]|((PMacTxInfo.VHT_SIG_A[1]) << 8)|((PMacTxInfo.VHT_SIG_A[2]) << 16); -+ PHY_SetBBReg(Adapter, 0xb0c, bMaskDWord, u4bTmp); -+ u4bTmp = PMacTxInfo.VHT_SIG_A[3]|((PMacTxInfo.VHT_SIG_A[4]) << 8)|((PMacTxInfo.VHT_SIG_A[5]) << 16); -+ PHY_SetBBReg(Adapter, 0xb10, 0xffffff, u4bTmp); -+ -+ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_SIG_B, 4); -+ PHY_SetBBReg(Adapter, 0xb14, bMaskDWord, u4bTmp); -+ } -+ -+ if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { -+ u4bTmp = (PMacTxInfo.VHT_SIG_B_CRC << 24)|PMacTxInfo.PacketPeriod; /* for TX interval */ -+ PHY_SetBBReg(Adapter, 0xb20, bMaskDWord, u4bTmp); -+ -+ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_Delimiter, 4); -+ PHY_SetBBReg(Adapter, 0xb24, bMaskDWord, u4bTmp); -+ -+ /* 0xb28 - 0xb34 24 byte Probe Request MAC Header*/ -+ /*& Duration & Frame control*/ -+ PHY_SetBBReg(Adapter, 0xb28, bMaskDWord, 0x00000040); -+ -+ /* Address1 [0:3]*/ -+ u4bTmp = PMacTxInfo.MacAddress[0]|(PMacTxInfo.MacAddress[1] << 8)|(PMacTxInfo.MacAddress[2] << 16)|(PMacTxInfo.MacAddress[3] << 24); -+ PHY_SetBBReg(Adapter, 0xb2C, bMaskDWord, u4bTmp); -+ -+ /* Address3 [3:0]*/ -+ PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp); -+ -+ /* Address2[0:1] & Address1 [5:4]*/ -+ u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8)|(Adapter->mac_addr[0] << 16)|(Adapter->mac_addr[1] << 24); -+ PHY_SetBBReg(Adapter, 0xb30, bMaskDWord, u4bTmp); -+ -+ /* Address2 [5:2]*/ -+ u4bTmp = Adapter->mac_addr[2]|(Adapter->mac_addr[3] << 8)|(Adapter->mac_addr[4] << 16)|(Adapter->mac_addr[5] << 24); -+ PHY_SetBBReg(Adapter, 0xb34, bMaskDWord, u4bTmp); -+ -+ /* Sequence Control & Address3 [5:4]*/ -+ /*u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8) ;*/ -+ /*PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp);*/ -+ } else { -+ PHY_SetBBReg(Adapter, 0xb20, bMaskDWord, PMacTxInfo.PacketPeriod); /* for TX interval*/ -+ /* & Duration & Frame control */ -+ PHY_SetBBReg(Adapter, 0xb24, bMaskDWord, 0x00000040); -+ -+ /* 0xb24 - 0xb38 24 byte Probe Request MAC Header*/ -+ /* Address1 [0:3]*/ -+ u4bTmp = PMacTxInfo.MacAddress[0]|(PMacTxInfo.MacAddress[1] << 8)|(PMacTxInfo.MacAddress[2] << 16)|(PMacTxInfo.MacAddress[3] << 24); -+ PHY_SetBBReg(Adapter, 0xb28, bMaskDWord, u4bTmp); -+ -+ /* Address3 [3:0]*/ -+ PHY_SetBBReg(Adapter, 0xb34, bMaskDWord, u4bTmp); -+ -+ /* Address2[0:1] & Address1 [5:4]*/ -+ u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8)|(Adapter->mac_addr[0] << 16)|(Adapter->mac_addr[1] << 24); -+ PHY_SetBBReg(Adapter, 0xb2c, bMaskDWord, u4bTmp); -+ -+ /* Address2 [5:2] */ -+ u4bTmp = Adapter->mac_addr[2]|(Adapter->mac_addr[3] << 8)|(Adapter->mac_addr[4] << 16)|(Adapter->mac_addr[5] << 24); -+ PHY_SetBBReg(Adapter, 0xb30, bMaskDWord, u4bTmp); -+ -+ /* Sequence Control & Address3 [5:4]*/ -+ u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8); -+ PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp); -+ } -+ -+ PHY_SetBBReg(Adapter, 0xb48, bMaskByte3, PMacTxInfo.TX_RATE_HEX); -+ -+ /* 0xb4c 3:0 TXSC 5:4 BW 7:6 m_STBC 8 NDP_Sound*/ -+ u4bTmp = (PMacTxInfo.TX_SC)|((PMacTxInfo.BandWidth) << 4)|((PMacTxInfo.m_STBC - 1) << 6)|((PMacTxInfo.NDP_sound) << 8); -+ PHY_SetBBReg(Adapter, 0xb4c, 0x1ff, u4bTmp); -+ -+ if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8822B(Adapter)) { -+ u4Byte offset = 0xb44; -+ -+ if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) -+ PHY_SetBBReg(Adapter, offset, 0xc0000000, 0); -+ else if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) -+ PHY_SetBBReg(Adapter, offset, 0xc0000000, 1); -+ else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) -+ PHY_SetBBReg(Adapter, offset, 0xc0000000, 2); -+ } -+ -+ PHY_SetBBReg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ -+/* //PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); //TX Stop*/ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { -+ PHY_SetBBReg(Adapter, 0xb04, 0xf, 8); /*TX CCK ON*/ -+ PHY_SetBBReg(Adapter, 0xA84, BIT31, 0); -+ } else -+ PHY_SetBBReg(Adapter, 0xb04, 0xf, 4); /* TX Ofdm ON */ -+ -+ if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) -+ mpt_SetSingleTone_8814A(Adapter, TRUE, TRUE); -+ -+} -+#endif /* CONFIG_MP_VHT_HW_TX_MODE */ -+ -+#endif /* CONFIG_MP_INCLUDE*/ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HAL_MP_C_ ++#ifdef CONFIG_MP_INCLUDED ++ ++#ifdef CONFIG_RTL8188E ++#include ++#endif ++#ifdef CONFIG_RTL8723B ++#include ++#endif ++#ifdef CONFIG_RTL8192E ++#include ++#endif ++#ifdef CONFIG_RTL8814A ++#include ++#endif ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++#include ++#endif ++#ifdef CONFIG_RTL8703B ++#include ++#endif ++#ifdef CONFIG_RTL8188F ++#include ++#endif ++ ++ ++u8 MgntQuery_NssTxRate(u16 Rate) ++{ ++ u8 NssNum = RF_TX_NUM_NONIMPLEMENT; ++ ++ if ((Rate >= MGN_MCS8 && Rate <= MGN_MCS15) || ++ (Rate >= MGN_VHT2SS_MCS0 && Rate <= MGN_VHT2SS_MCS9)) ++ NssNum = RF_2TX; ++ else if ((Rate >= MGN_MCS16 && Rate <= MGN_MCS23) || ++ (Rate >= MGN_VHT3SS_MCS0 && Rate <= MGN_VHT3SS_MCS9)) ++ NssNum = RF_3TX; ++ else if ((Rate >= MGN_MCS24 && Rate <= MGN_MCS31) || ++ (Rate >= MGN_VHT4SS_MCS0 && Rate <= MGN_VHT4SS_MCS9)) ++ NssNum = RF_4TX; ++ else ++ NssNum = RF_1TX; ++ ++ return NssNum; ++} ++ ++void hal_mpt_SwitchRfSetting(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u8 ChannelToSw = pMptCtx->MptChannelToSw; ++ ULONG ulRateIdx = pMptCtx->MptRateIndex; ++ ULONG ulbandwidth = pMptCtx->MptBandWidth; ++ ++ /* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis.*/ ++ if (IS_HARDWARE_TYPE_8188ES(pAdapter) && (1 <= ChannelToSw && ChannelToSw <= 11) && ++ (ulRateIdx == MPT_RATE_MCS0 || ulRateIdx == MPT_RATE_1M || ulRateIdx == MPT_RATE_6M)) { ++ pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0); ++ pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0); ++ ++ if ((PlatformEFIORead4Byte(pAdapter, 0xF4)&BIT29) == BIT29) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xB); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xB); ++ } else { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xD); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xD); ++ } ++ } else if (IS_HARDWARE_TYPE_8188EE(pAdapter)) { /* <20140903, VincentL> Asked by RF Eason and Edlu*/ ++ ++ if (ChannelToSw == 3 && ulbandwidth == MPT_BW_40MHZ) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ ++ } else { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ ++ } ++ ++ } else if (IS_HARDWARE_TYPE_8188E(pAdapter)) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_A); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_B); ++ } ++} ++ ++s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ ++ if (!netif_running(padapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); ++ return _FAIL; ++ } ++ if (enable) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; ++ else ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; ++ ++ return _SUCCESS; ++} ++ ++void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ ++ *enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl; ++} ++ ++ ++void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) ++{ ++ u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; ++ u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; ++ u8 i; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ u1Byte u1Channel = pHalData->CurrentChannel; ++ ULONG ulRateIdx = pMptCtx->MptRateIndex; ++ u1Byte DataRate = 0xFF; ++ ++ DataRate = MptToMgntRate(ulRateIdx); ++ ++ if (u1Channel == 14 && IS_CCK_RATE(DataRate)) ++ pHalData->bCCKinCH14 = TRUE; ++ else ++ pHalData->bCCKinCH14 = FALSE; ++ ++ if (IS_HARDWARE_TYPE_8703B(Adapter)) { ++ if ((u1Channel == 14) && IS_CCK_RATE(DataRate)) { ++ /* Channel 14 in CCK, need to set 0xA26~0xA29 to 0 for 8703B */ ++ PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); ++ PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); ++ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("MPT_CCKTxPowerAdjust 8703B CCK in Channel %u\n", u1Channel)); ++ } else { ++ /* Normal setting for 8703B, just recover to the default setting. */ ++ /* This hardcore values reference from the parameter which BB team gave. */ ++ for (i = 0 ; i < 2 ; ++i) ++ PHY_SetBBReg(Adapter, pHalData->RegForRecover[i].offset, bMaskDWord, pHalData->RegForRecover[i].value); ++ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("MPT_CCKTxPowerAdjust 8703B in Channel %u restore to default setting\n", u1Channel)); ++ } ++ } else if (IS_HARDWARE_TYPE_8188F(Adapter)) { ++ /* No difference between CCK in CH14 and others, no need to change TX filter */ ++ } else { ++ ++ /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ ++ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); ++ ++ if (!pHalData->bCCKinCH14) { ++ /* Readback the current bb cck swing value and compare with the table to */ ++ /* get the current swing index */ ++ for (i = 0; i < CCK_TABLE_SIZE; i++) { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) { ++ CCKSwingIndex = i; ++ RT_TRACE(_module_mp_, DBG_LOUD, ("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++ (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ /*Write 0xa22 0xa23*/ ++ TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8); ++ ++ ++ /*Write 0xa24 ~ 0xa27*/ ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16) + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); ++ ++ /*Write 0xa28 0xa29*/ ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8); ++ } else { ++ for (i = 0; i < CCK_TABLE_SIZE; i++) { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) { ++ CCKSwingIndex = i; ++ RT_TRACE(_module_mp_, DBG_LOUD, ("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++ (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ /*Write 0xa22 0xa23*/ ++ TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8); ++ ++ /*Write 0xa24 ~ 0xa27*/ ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16) + ++ (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); ++ ++ /*Write 0xa28 0xa29*/ ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8); ++ } ++ ++ write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); ++ write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); ++ write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); ++ ++ } ++ ++} ++ ++void hal_mpt_SetChannel(PADAPTER pAdapter) ++{ ++ u8 eRFPath; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ u8 channel = pmp->channel; ++ u8 bandwidth = pmp->bandwidth; ++ u8 rate = pmp->rateidx; ++ ++ hal_mpt_SwitchRfSetting(pAdapter); ++ ++ SelectChannel(pAdapter, channel); ++ ++ pHalData->bSwChnl = _TRUE; ++ pHalData->bSetChnlBW = _TRUE; ++ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); ++ ++ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); ++ ++} ++ ++/* ++ * Notice ++ * Switch bandwitdth may change center frequency(channel) ++ */ ++void hal_mpt_SetBandwidth(PADAPTER pAdapter) ++{ ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ u8 channel = pmp->channel; ++ u8 bandwidth = pmp->bandwidth; ++ ++ SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); ++ pHalData->bSwChnl = _TRUE; ++ pHalData->bSetChnlBW = _TRUE; ++ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); ++ ++ hal_mpt_SwitchRfSetting(pAdapter); ++} ++ ++void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower) ++{ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("===>mpt_SetTxPower_Old(): Case = %d\n", Rate)); ++ switch (Rate) { ++ case MPT_CCK: ++ { ++ u4Byte TxAGC = 0, pwr = 0; ++ u1Byte rf; ++ ++ pwr = pTxPower[ODM_RF_PATH_A]; ++ if (pwr < 0x3f) { ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[ODM_RF_PATH_A]); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); ++ } ++ pwr = pTxPower[ODM_RF_PATH_B]; ++ if (pwr < 0x3f) { ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, pTxPower[ODM_RF_PATH_B]); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); ++ } ++ ++ } break; ++ ++ case MPT_OFDM_AND_HT: ++ { ++ u4Byte TxAGC = 0; ++ u1Byte pwr = 0, rf; ++ ++ pwr = pTxPower[0]; ++ if (pwr < 0x3f) { ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ DBG_871X("HT Tx-rf(A) Power = 0x%x\n", TxAGC); ++ ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ } ++ TxAGC = 0; ++ pwr = pTxPower[1]; ++ if (pwr < 0x3f) { ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ DBG_871X("HT Tx-rf(B) Power = 0x%x\n", TxAGC); ++ ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ } ++ } break; ++ ++ default: ++ break; ++ } ++ DBG_871X("<===mpt_SetTxPower_Old()\n"); ++} ++ ++ ++ ++void ++mpt_SetTxPower( ++ PADAPTER pAdapter, ++ MPT_TXPWR_DEF Rate, ++ pu1Byte pTxPower ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ u1Byte path = 0 , i = 0, MaxRate = MGN_6M; ++ u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_B; ++ ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ EndPath = ODM_RF_PATH_D; ++ ++ switch (Rate) { ++ case MPT_CCK: ++ { ++ u1Byte rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; ++ ++ for (path = StartPath; path <= EndPath; path++) ++ for (i = 0; i < sizeof(rate); ++i) ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } ++ break; ++ ++ case MPT_OFDM: ++ { ++ u1Byte rate[] = { ++ MGN_6M, MGN_9M, MGN_12M, MGN_18M, ++ MGN_24M, MGN_36M, MGN_48M, MGN_54M, ++ }; ++ ++ for (path = StartPath; path <= EndPath; path++) ++ for (i = 0; i < sizeof(rate); ++i) ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } break; ++ ++ case MPT_HT: ++ { ++ u1Byte rate[] = { ++ MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, ++ MGN_MCS5, MGN_MCS6, MGN_MCS7, MGN_MCS8, MGN_MCS9, ++ MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, ++ MGN_MCS15, MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, ++ MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23, MGN_MCS24, ++ MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, ++ MGN_MCS30, MGN_MCS31, ++ }; ++ if (pHalData->rf_type == RF_3T3R) ++ MaxRate = MGN_MCS23; ++ else if (pHalData->rf_type == RF_2T2R) ++ MaxRate = MGN_MCS15; ++ else ++ MaxRate = MGN_MCS7; ++ ++ for (path = StartPath; path <= EndPath; path++) { ++ for (i = 0; i < sizeof(rate); ++i) { ++ if (rate[i] > MaxRate) ++ break; ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } ++ } ++ } break; ++ ++ case MPT_VHT: ++ { ++ u1Byte rate[] = { ++ MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, ++ MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9, ++ MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, ++ MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, ++ MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4, ++ MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, ++ MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4, ++ MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9, ++ }; ++ ++ if (pHalData->rf_type == RF_3T3R) ++ MaxRate = MGN_VHT3SS_MCS9; ++ else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R) ++ MaxRate = MGN_VHT2SS_MCS9; ++ else ++ MaxRate = MGN_VHT1SS_MCS9; ++ ++ for (path = StartPath; path <= EndPath; path++) { ++ for (i = 0; i < sizeof(rate); ++i) { ++ if (rate[i] > MaxRate) ++ break; ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } ++ } ++ } break; ++ ++ default: ++ DBG_871X("<===mpt_SetTxPower: Illegal channel!!\n"); ++ break; ++ } ++ ++} ++ ++ ++void hal_mpt_SetTxPower(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ ++ if (pHalData->rf_chip < RF_TYPE_MAX) { ++ if (IS_HARDWARE_TYPE_8188E(pAdapter) || ++ IS_HARDWARE_TYPE_8723B(pAdapter) || ++ IS_HARDWARE_TYPE_8192E(pAdapter) || ++ IS_HARDWARE_TYPE_8703B(pAdapter) || ++ IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ u8 path = (pHalData->AntennaTxPath == ANTENNA_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B); ++ ++ DBG_8192C("===> MPT_ProSetTxPower: Old\n"); ++ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("===> MPT_ProSetTxPower[Old]:\n")); ++ mpt_SetTxPower_Old(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower_Old(pAdapter, MPT_OFDM_AND_HT, pMptCtx->TxPwrLevel); ++ ++ } else { ++ DBG_871X("===> MPT_ProSetTxPower: Jaguar\n"); ++ mpt_SetTxPower(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower(pAdapter, MPT_HT, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel); ++ ++ } ++ } else ++ DBG_8192C("RFChipID < RF_TYPE_MAX, the RF chip is not supported - %d\n", pHalData->rf_chip); ++ ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++ ++} ++ ++ ++void hal_mpt_SetDataRate(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u32 DataRate; ++ ++ DataRate = MptToMgntRate(pAdapter->mppriv.rateidx); ++ ++ hal_mpt_SwitchRfSetting(pAdapter); ++ ++ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); ++#ifdef CONFIG_RTL8723B ++ if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ if (IS_CCK_RATE(DataRate)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0x6); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0x6); ++ } else { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); ++ } ++ } ++ ++ if ((IS_HARDWARE_TYPE_8723BS(pAdapter) && ++ ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)))) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); ++ } ++#endif ++} ++ ++ ++#define RF_PATH_AB 22 ++ ++#ifdef CONFIG_RTL8814A ++VOID mpt_ToggleIG_8814A(PADAPTER pAdapter) ++{ ++ u1Byte Path = 0; ++ u4Byte IGReg = rA_IGI_Jaguar, IGvalue = 0; ++ ++ for (Path; Path <= ODM_RF_PATH_D; Path++) { ++ switch (Path) { ++ case ODM_RF_PATH_B: ++ IGReg = rB_IGI_Jaguar; ++ break; ++ case ODM_RF_PATH_C: ++ IGReg = rC_IGI_Jaguar2; ++ break; ++ case ODM_RF_PATH_D: ++ IGReg = rD_IGI_Jaguar2; ++ break; ++ default: ++ IGReg = rA_IGI_Jaguar; ++ break; ++ } ++ ++ IGvalue = PHY_QueryBBReg(pAdapter, IGReg, bMaskByte0); ++ PHY_SetBBReg(pAdapter, IGReg, bMaskByte0, IGvalue+2); ++ PHY_SetBBReg(pAdapter, IGReg, bMaskByte0, IGvalue); ++ } ++} ++ ++VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ ++ R_ANTENNA_SELECT_CCK *p_cck_txrx; ++ ++ u8 ForcedDataRate = HwRateToMRate(pAdapter->mppriv.rateidx); ++ u8 HtStbcCap = pAdapter->registrypriv.stbc_cap; ++ /*/PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);*/ ++ /*/PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo);*/ ++ ++ u32 ulAntennaTx = pHalData->AntennaTxPath; ++ u32 ulAntennaRx = pHalData->AntennaRxPath; ++ u8 NssforRate = MgntQuery_NssTxRate(ForcedDataRate); ++ ++ if (NssforRate == RF_2TX) { ++ DBG_871X("===> SetAntenna 2T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_BC: ++ pMptCtx->MptRfPath = ODM_RF_PATH_BC; ++ /*pHalData->ValidTxPath = 0x06; linux no use */ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x106); /*/ 0x940[15:4]=12'b0000_0100_0011*/ ++ break; ++ ++ case ANTENNA_CD: ++ pMptCtx->MptRfPath = ODM_RF_PATH_CD; ++ /*pHalData->ValidTxPath = 0x0C;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x40c); /*/ 0x940[15:4]=12'b0000_0100_0011*/ ++ break; ++ case ANTENNA_AB: default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ /*pHalData->ValidTxPath = 0x03;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x043); /*/ 0x940[15:4]=12'b0000_0100_0011*/ ++ break; ++ } ++ ++ } else if (NssforRate == RF_3TX) { ++ DBG_871X("===> SetAntenna 3T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_BCD: ++ pMptCtx->MptRfPath = ODM_RF_PATH_BCD; ++ /*pHalData->ValidTxPath = 0x0e;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x90e); /*/ 0x940[27:16]=12'b0010_0100_0111*/ ++ break; ++ ++ case ANTENNA_ABC: default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_ABC; ++ /*pHalData->ValidTxPath = 0x0d;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x247); /*/ 0x940[27:16]=12'b0010_0100_0111*/ ++ break; ++ } ++ ++ } else { /*/if(NssforRate == RF_1TX)*/ ++ DBG_871X("===> SetAntenna 1T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); ++ switch (ulAntennaTx) { ++ case ANTENNA_B: ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ /*pHalData->ValidTxPath = 0x02;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); /*/ 0xa07[7:4] = 4'b0100*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x002); /*/ 0x93C[31:20]=12'b0000_0000_0010*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x2); /* 0x80C[7:4] = 4'b0010*/ ++ break; ++ ++ case ANTENNA_C: ++ pMptCtx->MptRfPath = ODM_RF_PATH_C; ++ /*pHalData->ValidTxPath = 0x04;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x2); /*/ 0xa07[7:4] = 4'b0010*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x004); /*/ 0x93C[31:20]=12'b0000_0000_0100*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x4); /*/ 0x80C[7:4] = 4'b0100*/ ++ break; ++ ++ case ANTENNA_D: ++ pMptCtx->MptRfPath = ODM_RF_PATH_D; ++ /*pHalData->ValidTxPath = 0x08;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x1); /*/ 0xa07[7:4] = 4'b0001*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x008); /*/ 0x93C[31:20]=12'b0000_0000_1000*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x8); /*/ 0x80C[7:4] = 4'b1000*/ ++ break; ++ ++ case ANTENNA_A: default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ /*pHalData->ValidTxPath = 0x01;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x8); /*/ 0xa07[7:4] = 4'b1000*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x001); /*/ 0x93C[31:20]=12'b0000_0000_0001*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x1); /*/ 0x80C[7:4] = 4'b0001*/ ++ break; ++ } ++ } ++ ++ switch (ulAntennaRx) { ++ case ANTENNA_A: ++ /*pHalData->ValidRxPath = 0x01;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x0); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_B: ++ /*pHalData->ValidRxPath = 0x02;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x1); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_C: ++ /*pHalData->ValidRxPath = 0x04;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x44); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x2); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_D: ++ /*pHalData->ValidRxPath = 0x08;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x88); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x3); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_BC: ++ /*pHalData->ValidRxPath = 0x06;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x66); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_CD: ++ /*pHalData->ValidRxPath = 0x0C;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xcc); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0xB); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_BCD: ++ /*pHalData->ValidRxPath = 0x0e;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xee); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, Rx mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); ++ break; ++ ++ case ANTENNA_ABCD: ++ /*pHalData->ValidRxPath = 0x0f;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xff); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); ++ break; ++ ++ default: ++ RT_TRACE(_module_mp_, _drv_warning_, ("Unknown Rx antenna.\n")); ++ break; ++ } ++ ++ PHY_Set_SecCCATH_by_RXANT_8814A(pAdapter, ulAntennaRx); ++ ++ mpt_ToggleIG_8814A(pAdapter); ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++ ++VOID ++mpt_SetSingleTone_8814A( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bSingleTone, ++ IN BOOLEAN bEnPMacTx) ++{ ++ ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_A; ++ static u4Byte regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; ++ ++ if (bSingleTone) { ++ regIG0 = PHY_QueryBBReg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ ++ regIG1 = PHY_QueryBBReg(pAdapter, rB_TxScale_Jaguar, bMaskDWord); /*/ 0xE1C[31:21]*/ ++ regIG2 = PHY_QueryBBReg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord); /*/ 0x181C[31:21]*/ ++ regIG3 = PHY_QueryBBReg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord); /*/ 0x1A1C[31:21]*/ ++ ++ switch (pMptCtx->MptRfPath) { ++ case ODM_RF_PATH_A: case ODM_RF_PATH_B: ++ case ODM_RF_PATH_C: case ODM_RF_PATH_D: ++ StartPath = pMptCtx->MptRfPath; ++ EndPath = pMptCtx->MptRfPath; ++ break; ++ case ODM_RF_PATH_AB: ++ EndPath = ODM_RF_PATH_B; ++ break; ++ case ODM_RF_PATH_BC: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_ABC: ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_BCD: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_D; ++ break; ++ case ODM_RF_PATH_ABCD: ++ EndPath = ODM_RF_PATH_D; ++ break; ++ } ++ ++ if (bEnPMacTx == FALSE) { ++ hal_mpt_SetOFDMContinuousTx(pAdapter, _TRUE); ++ issue_nulldata(pAdapter, NULL, 1, 3, 500); ++ } ++ ++ PHY_SetBBReg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ ++ ++ for (StartPath; StartPath <= EndPath; StartPath++) { ++ PHY_SetRFReg(pAdapter, StartPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ ++ PHY_SetRFReg(pAdapter, StartPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ ++ ++ PHY_SetRFReg(pAdapter, StartPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ } ++ ++ PHY_SetBBReg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rB_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xE1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rC_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x181C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rD_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x1A1C[31:21]*/ ++ ++ } else { ++ ++ switch (pMptCtx->MptRfPath) { ++ case ODM_RF_PATH_A: case ODM_RF_PATH_B: ++ case ODM_RF_PATH_C: case ODM_RF_PATH_D: ++ StartPath = pMptCtx->MptRfPath; ++ EndPath = pMptCtx->MptRfPath; ++ break; ++ case ODM_RF_PATH_AB: ++ EndPath = ODM_RF_PATH_B; ++ break; ++ case ODM_RF_PATH_BC: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_ABC: ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_BCD: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_D; ++ break; ++ case ODM_RF_PATH_ABCD: ++ EndPath = ODM_RF_PATH_D; ++ break; ++ } ++ ++ for (StartPath; StartPath <= EndPath; StartPath++) ++ PHY_SetRFReg(pAdapter, StartPath, LNA_Low_Gain_3, BIT1, 0x0); /*// RF LO disabled*/ ++ ++ ++ PHY_SetBBReg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ ++ ++ if (bEnPMacTx == FALSE) ++ hal_mpt_SetOFDMContinuousTx(pAdapter, _FALSE); ++ ++ PHY_SetBBReg(pAdapter, rA_TxScale_Jaguar, bMaskDWord, regIG0); /* 0xC1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rB_TxScale_Jaguar, bMaskDWord, regIG1); /* 0xE1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord, regIG2); /* 0x181C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ ++ } ++} ++ ++#endif ++ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++void mpt_SetRFPath_8812A(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ u32 ulAntennaTx, ulAntennaRx; ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_A: ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); ++ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) ++ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); ++ break; ++ case ANTENNA_B: ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); ++ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) ++ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); ++ break; ++ case ANTENNA_AB: ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); ++ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) ++ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); ++ break; ++ default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ DBG_871X("Unknown Tx antenna.\n"); ++ break; ++ } ++ ++ switch (ulAntennaRx) { ++ u32 reg0xC50 = 0; ++ case ANTENNA_A: ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); ++ ++ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ ++ reg0xC50 = PHY_QueryBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0); ++ PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50+2); ++ PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50); ++ break; ++ case ANTENNA_B: ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby mode */ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); ++ ++ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ ++ reg0xC50 = PHY_QueryBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0); ++ PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50+2); ++ PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50); ++ break; ++ case ANTENNA_AB: ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); ++ break; ++ default: ++ DBG_871X("Unknown Rx antenna.\n"); ++ break; ++ } ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++#endif ++ ++ ++#ifdef CONFIG_RTL8723B ++void mpt_SetRFPath_8723B(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u32 ulAntennaTx, ulAntennaRx; ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ if (pHalData->rf_chip >= RF_TYPE_MAX) { ++ DBG_8192C("This RF chip ID is not supported\n"); ++ return; ++ } ++ ++ switch (pAdapter->mppriv.antenna_tx) { ++ u8 p = 0, i = 0; ++ case ANTENNA_A: /*/ Actually path S1 (Wi-Fi)*/ ++ { ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x0); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ ++ ++ /*/<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ ++ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); ++ ++ ++ for (i = 0; i < 3; ++i) { ++ u4Byte offset = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ u4Byte data = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ ++ } ++ for (i = 0; i < 2; ++i) { ++ u4Byte offset = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ u4Byte data = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ case ANTENNA_B: /*/ Actually path S0 (BT)*/ ++ { ++ u4Byte offset; ++ u4Byte data; ++ ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x5); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/ ++ ++ /* <20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ ++ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); ++ ++ for (i = 0; i < 3; ++i) { ++ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ ++ offset = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ data = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_B][i][1]; ++ if (pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_B][i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ ++ for (i = 0; i < 2; ++i) { ++ offset = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ data = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_B][i][1]; ++ ++ if (pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_B][i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ default: ++ pMptCtx->MptRfPath = RF_PATH_AB; ++ RT_TRACE(_module_mp_, _drv_notice_, ("Unknown Tx antenna.\n")); ++ break; ++ } ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++#endif ++ ++#ifdef CONFIG_RTL8703B ++void mpt_SetRFPath_8703B(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u4Byte ulAntennaTx, ulAntennaRx; ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ if (pHalData->rf_chip >= RF_TYPE_MAX) { ++ DBG_871X("This RF chip ID is not supported\n"); ++ return; ++ } ++ ++ switch (pAdapter->mppriv.antenna_tx) { ++ u1Byte p = 0, i = 0; ++ ++ case ANTENNA_A: /* Actually path S1 (Wi-Fi) */ ++ { ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x0); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ ++ ++ for (i = 0; i < 3; ++i) { ++ u4Byte offset = pRFCalibrateInfo->TxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->TxIQC_8703B[i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ ++ } ++ for (i = 0; i < 2; ++i) { ++ u4Byte offset = pRFCalibrateInfo->RxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->RxIQC_8703B[i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ case ANTENNA_B: /* Actually path S0 (BT)*/ ++ { ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x5); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ ++ ++ for (i = 0; i < 3; ++i) { ++ u4Byte offset = pRFCalibrateInfo->TxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->TxIQC_8703B[i][1]; ++ ++ if (pRFCalibrateInfo->TxIQC_8703B[i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ for (i = 0; i < 2; ++i) { ++ u4Byte offset = pRFCalibrateInfo->RxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->RxIQC_8703B[i][1]; ++ ++ if (pRFCalibrateInfo->RxIQC_8703B[i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ default: ++ pMptCtx->MptRfPath = RF_PATH_AB; ++ RT_TRACE(_module_mp_, _drv_notice_, ("Unknown Tx antenna.\n")); ++ break; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++#endif ++ ++ ++VOID mpt_SetRFPath_819X(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u4Byte ulAntennaTx, ulAntennaRx; ++ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ ++ R_ANTENNA_SELECT_CCK *p_cck_txrx; ++ u1Byte r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; ++ u1Byte chgTx = 0, chgRx = 0; ++ u4Byte r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; ++ p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; ++ ++ p_ofdm_tx->r_ant_ht1 = 0x1; ++ p_ofdm_tx->r_ant_ht2 = 0x2;/*Second TX RF path is A*/ ++ p_ofdm_tx->r_ant_non_ht = 0x3;/*/ 0x1+0x2=0x3 */ ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_A: ++ p_ofdm_tx->r_tx_antenna = 0x1; ++ r_ofdm_tx_en_val = 0x1; ++ p_ofdm_tx->r_ant_l = 0x1; ++ p_ofdm_tx->r_ant_ht_s1 = 0x1; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x1; ++ p_cck_txrx->r_ccktx_enable = 0x8; ++ chgTx = 1; ++ /*/ From SD3 Willis suggestion !!! Set RF A=TX and B as standby*/ ++ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); ++ r_ofdm_tx_en_val = 0x3; ++ /*/ Power save*/ ++ /*/cosa r_ant_select_ofdm_val = 0x11111111;*/ ++ /*/ We need to close RFB by SW control*/ ++ if (pHalData->rf_type == RF_2T2R) { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); ++ } ++ } ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ p_ofdm_tx->r_tx_antenna = 0x2; ++ r_ofdm_tx_en_val = 0x2; ++ p_ofdm_tx->r_ant_l = 0x2; ++ p_ofdm_tx->r_ant_ht_s1 = 0x2; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x2; ++ p_cck_txrx->r_ccktx_enable = 0x4; ++ chgTx = 1; ++ /*/ From SD3 Willis suggestion !!! Set RF A as standby*/ ++ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++ ++ /*/ 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table.*/ ++ /*/ 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control*/ ++ if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++ /*/PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ break; ++ case ANTENNA_AB:/*/ For 8192S*/ ++ p_ofdm_tx->r_tx_antenna = 0x3; ++ r_ofdm_tx_en_val = 0x3; ++ p_ofdm_tx->r_ant_l = 0x3; ++ p_ofdm_tx->r_ant_ht_s1 = 0x3; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x3; ++ p_cck_txrx->r_ccktx_enable = 0xC; ++ chgTx = 1; ++ /*/ From SD3Willis suggestion !!! Set RF B as standby*/ ++ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++ /* Disable Power save*/ ++ /*cosa r_ant_select_ofdm_val = 0x3321333;*/ ++ /* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control*/ ++ if (pHalData->rf_type == RF_2T2R) { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++ /*/PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ break; ++ default: ++ break; ++ } ++ ++ ++ ++/*// r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D ++// r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D ++// r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */ ++ switch (ulAntennaRx) { ++ case ANTENNA_A: ++ r_rx_antenna_ofdm = 0x1; /* A*/ ++ p_cck_txrx->r_cckrx_enable = 0x0; /* default: A*/ ++ p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A*/ ++ chgRx = 1; ++ break; ++ case ANTENNA_B: ++ r_rx_antenna_ofdm = 0x2; /*/ B*/ ++ p_cck_txrx->r_cckrx_enable = 0x1; /*/ default: B*/ ++ p_cck_txrx->r_cckrx_enable_2 = 0x1; /*/ option: B*/ ++ chgRx = 1; ++ break; ++ case ANTENNA_AB:/*/ For 8192S and 8192E/U...*/ ++ r_rx_antenna_ofdm = 0x3;/*/ AB*/ ++ p_cck_txrx->r_cckrx_enable = 0x0;/*/ default:A*/ ++ p_cck_txrx->r_cckrx_enable_2 = 0x1;/*/ option:B*/ ++ chgRx = 1; ++ break; ++ default: ++ break; ++ } ++ ++ ++ if (chgTx && chgRx) { ++ switch (pHalData->rf_chip) { ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ /*/r_ant_sel_cck_val = r_ant_select_cck_val;*/ ++ PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /*/OFDM Tx*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /*/OFDM Tx*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ if (IS_HARDWARE_TYPE_8192E(pAdapter)) { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ } ++ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);/*/r_ant_sel_cck_val); /CCK TxRx*/ ++ break; ++ ++ default: ++ DBG_871X("Unsupported RFChipID for switching antenna.\n"); ++ break; ++ } ++ } ++} /* MPT_ProSetRFPath */ ++ ++ ++void hal_mpt_SetAntenna(PADAPTER pAdapter) ++ ++{ ++ DBG_871X("Do %s\n", __func__); ++#ifdef CONFIG_RTL8814A ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { ++ mpt_SetRFPath_8814A(pAdapter); ++ return; ++ } ++#endif ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { ++ mpt_SetRFPath_8812A(pAdapter); ++ return; ++ } ++#endif ++#ifdef CONFIG_RTL8723B ++ if (IS_HARDWARE_TYPE_8723B(pAdapter)) { ++ mpt_SetRFPath_8723B(pAdapter); ++ return; ++ } ++#endif ++#ifdef CONFIG_RTL8703B ++ if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++ mpt_SetRFPath_8703B(pAdapter); ++ return; ++ } ++#endif ++ ++/* else if (IS_HARDWARE_TYPE_8821B(pAdapter)) ++ mpt_SetRFPath_8821B(pAdapter); ++ Prepare for 8822B ++ else if (IS_HARDWARE_TYPE_8822B(Context)) ++ mpt_SetRFPath_8822B(Context); ++*/ ++ mpt_SetRFPath_819X(pAdapter); ++ DBG_871X("mpt_SetRFPath_819X Do %s\n", __func__); ++ ++} ++ ++ ++s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if (!netif_running(pAdapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ ++ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); ++ return _FAIL; ++ } ++ ++ ++ target_ther &= 0xff; ++ if (target_ther < 0x07) ++ target_ther = 0x07; ++ else if (target_ther > 0x1d) ++ target_ther = 0x1d; ++ ++ pHalData->EEPROMThermalMeter = target_ther; ++ ++ return _SUCCESS; ++} ++ ++ ++void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter) ++{ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); ++ ++} ++ ++ ++u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter) ++ ++{ ++ u32 ThermalValue = 0; ++ ++ ThermalValue = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, 0x42, 0xfc00); /*0x42: RF Reg[15:10]*/ ++ return (u8)ThermalValue; ++ ++} ++ ++ ++void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value) ++{ ++#if 0 ++ fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); ++ rtw_msleep_os(1000); ++ fw_cmd_data(pAdapter, value, 1); ++ *value &= 0xFF; ++#else ++ hal_mpt_TriggerRFThermalMeter(pAdapter); ++ rtw_msleep_os(1000); ++ *value = hal_mpt_ReadRFThermalMeter(pAdapter); ++#endif ++ ++} ++ ++ ++void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; ++ ++ if (bStart) {/*/ Start Single Carrier.*/ ++ RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleCarrierTx: test start\n")); ++ /*/ Start Single Carrier.*/ ++ /*/ 1. if OFDM block on?*/ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1); /*set OFDM block on*/ ++ ++ /*/ 2. set CCK test mode off, set to CCK normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); ++ ++ /*/ 3. turn on scramble setting*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); ++ ++ /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_SingleCarrier); ++ else ++#endif ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleCarrier); ++ ++ } else { ++ /*/ Stop Single Carrier.*/ ++ /*/ Stop Single Carrier.*/ ++ /*/ Turn off all test modes.*/ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++#endif ++ ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ rtw_msleep_os(10); ++ /*/BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++} ++ ++ ++void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u4Byte ulAntennaTx = pHalData->AntennaTxPath; ++ static u4Byte regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; ++ u8 rfPath; ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_B: ++ rfPath = ODM_RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = ODM_RF_PATH_C; ++ break; ++ case ANTENNA_D: ++ rfPath = ODM_RF_PATH_D; ++ break; ++ case ANTENNA_A: ++ default: ++ rfPath = ODM_RF_PATH_A; ++ break; ++ } ++ ++ pAdapter->mppriv.MptCtx.bSingleTone = bStart; ++ if (bStart) { ++ /*/ Start Single Tone.*/ ++ /*/ <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu)*/ ++ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { ++ regRF = PHY_QueryRFReg(pAdapter, rfPath, LNA_Low_Gain_3, bRFRegOffsetMask); ++ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); ++ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { /*/ USB need to do RF LO disable first, PCIE isn't required to follow this order.*/ ++ /*/Set MAC REG 88C: Prevent SingleTone Fail*/ ++ PHY_SetMacReg(pAdapter, 0x88C, 0xF00000, 0xF); ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO disabled*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ ++ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x56, 0xF, 0x1); /*/ RF LO enabled*/ ++ } else { ++ /*/ S0/S1 both use PATH A to configure*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x76, 0xF, 0x1); /*/ RF LO enabled*/ ++ } ++ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */ ++ } ++ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ /*Set BB REG 88C: Prevent SingleTone Fail*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF); ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x2); ++ ++ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++ u1Byte p = ODM_RF_PATH_A; ++ ++ regRF = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask); ++ regBB0 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord); ++ regBB1 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord); ++ regBB2 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, bMaskDWord); ++ regBB3 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, bMaskDWord); ++ ++ PHY_SetBBReg(pAdapter, rOFDMCCKEN_Jaguar, BIT29|BIT28, 0x0); /*/ Disable CCK and OFDM*/ ++ ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_AB) { ++ for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ ++ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ } ++ } else { ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ } ++ ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ ++ ++ if (pHalData->ExternalPA_5G) { ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/ ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/ ++ } else if (pHalData->ExternalPA_2G) { ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/ ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/ ++ } ++#endif ++ } ++#ifdef CONFIG_RTL8814A ++ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ mpt_SetSingleTone_8814A(pAdapter, TRUE, FALSE); ++#endif ++ else /*/ Turn On SingleTone and turn off the other test modes.*/ ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleTone); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else {/*/ Stop Single Ton e.*/ ++ ++ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, regRF); ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); ++ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x3);/*/ Tx mode*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x0);/*/ RF LO disabled */ ++ /*/ RESTORE MAC REG 88C: Enable RF Functions*/ ++ PHY_SetMacReg(pAdapter, 0x88C, 0xF00000, 0x0); ++ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x56, 0xF, 0x0); /*/ RF LO disabled*/ ++ } else { ++ /*/ S0/S1 both use PATH A to configure*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x76, 0xF, 0x0); /*/ RF LO disabled*/ ++ } ++ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++ ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */ ++ } ++ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x3); /*Tx mode*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x0); /*RF LO disabled*/ ++ /*Set BB REG 88C: Prevent SingleTone Fail*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xc); ++ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++ u1Byte p = ODM_RF_PATH_A; ++ ++ PHY_SetBBReg(pAdapter, rOFDMCCKEN_Jaguar, BIT29|BIT28, 0x3); /*/ Disable CCK and OFDM*/ ++ ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_AB) { ++ for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); ++ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x0); /*/ RF LO disabled*/ ++ } ++ } else { ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); ++ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x0); /*/ RF LO disabled*/ ++ } ++ ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, regBB0); ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, regBB1); ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, bMaskDWord, regBB2); ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, bMaskDWord, regBB3); ++#endif ++ } ++#ifdef CONFIG_RTL8814A ++ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ mpt_SetSingleTone_8814A(pAdapter, FALSE, FALSE); ++ ++ else/*/ Turn off all test modes.*/ ++ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++#endif ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ ++ } ++} ++ ++ ++void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u8 Rate; ++ pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; ++ ++ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); ++ if (bStart) {/* Start Carrier Suppression.*/ ++ RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test start\n")); ++ if (Rate <= MPT_RATE_11M) { ++ /*/ 1. if CCK block on?*/ ++ if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ ++ ++ /*/Turn Off All Test Mode*/ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF);/* rSingleTone_ContTx_Jaguar*/ ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /*/turn off scramble setting*/ ++ ++ /*/Set CCK Tx Test Rate*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /*/Set FTxRate to 1Mbps*/ ++ } ++ ++ /*Set for dynamic set Power index*/ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else {/* Stop Carrier Suppression.*/ ++ RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); ++ ++ if (Rate <= MPT_RATE_11M) { ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ ++ ++ /*BB Reset*/ ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ /*Stop for dynamic set Power index*/ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ } ++ DBG_871X("\n MPT_ProSetCarrierSupp() is finished.\n"); ++} ++ ++void hal_mpt_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u32 cckrate; ++ ++ if (bStart) { ++ RT_TRACE(_module_mp_, _drv_alert_, ++ ("SetCCKContinuousTx: test start\n")); ++ ++ /*/ 1. if CCK block on?*/ ++ if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ ++ ++ /*/Turn Off All Test Mode*/ ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF);/*rSingleTone_ContTx_Jaguar*/ ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ /*/Set CCK Tx Test Rate*/ ++ ++ cckrate = pAdapter->mppriv.rateidx; ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /*/turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* rCCK0_RxHP 0xa15[1:0] = 11 force cck rxiq = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /*/ 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 1); ++ } ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetCCKContinuousTx: test stop\n")); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*/normal mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /*/turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /* && !IS_HARDWARE_TYPE_8822B(pAdapter) */) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0);/* rCCK0_RxHP 0xa15[1:0] = 2b00*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /*/ 0xc08[16] = 0*/ ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 0); ++ } ++ ++ /*/BB Reset*/ ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = bStart; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; ++} ++ ++void hal_mpt_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if (bStart) { ++ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));/*/ 1. if OFDM block on?*/ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1);/*/set OFDM block on*/ ++ ++ /*/ 2. set CCK test mode off, set to CCK normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); ++ ++ /*/ 3. turn on scramble setting*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /*&& !IS_HARDWARE_TYPE_8822B(pAdapter)*/) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* rCCK0_RxHP 0xa15[1:0] = 2b'11*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ ++ } ++ ++ /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ContinuousTx);/*rSingleTone_ContTx_Jaguar*/ ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ContinuousTx); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else { ++ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test stop\n")); ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ /*/Delay 10 ms*/ ++ rtw_msleep_os(10); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /*&&! IS_HARDWARE_TYPE_8822B(pAdapter)*/) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0);/*/ 0xa15[1:0] = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0);/*/ 0xc08[16] = 0*/ ++ } ++ ++ /*/BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; ++} ++ ++void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u8 Rate; ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); ++ ++ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); ++ pAdapter->mppriv.MptCtx.bStartContTx = bStart; ++ ++ if (Rate <= MPT_RATE_11M) ++ hal_mpt_SetCCKContinuousTx(pAdapter, bStart); ++ else if (Rate >= MPT_RATE_6M) ++ hal_mpt_SetOFDMContinuousTx(pAdapter, bStart); ++} ++ ++#ifdef CONFIG_MP_VHT_HW_TX_MODE ++static VOID mpt_StopCckContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u1Byte u1bReg; ++ ++ pMptCtx->bCckContTx = FALSE; ++ pMptCtx->bOfdmContTx = FALSE; ++ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 2b00*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 0); ++ } ++ ++ /*BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ ++} /* mpt_StopCckContTx */ ++ ++ ++static VOID mpt_StopOfdmContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u1Byte u1bReg; ++ u4Byte data; ++ ++ pMptCtx->bCckContTx = FALSE; ++ pMptCtx->bOfdmContTx = FALSE; ++ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ rtw_mdelay_os(10); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ ++ } ++ ++ /*BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++} /* mpt_StopOfdmContTx */ ++ ++ ++static VOID mpt_StartCckContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u4Byte cckrate; ++ ++ /* 1. if CCK block on */ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 1);/*set CCK block on*/ ++ ++ /*Turn Off All Test Mode*/ ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ cckrate = pAdapter->mppriv.rateidx; ++ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); ++ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*transmit mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 11 force cck rxiq = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 1); ++ } ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ pMptCtx->bCckContTx = TRUE; ++ pMptCtx->bOfdmContTx = FALSE; ++ ++} /* mpt_StartCckContTx */ ++ ++ ++static VOID mpt_StartOfdmContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ ++ /* 1. if OFDM block on?*/ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1);/*set OFDM block on*/ ++ ++ /* 2. set CCK test mode off, set to CCK normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); ++ ++ /* 3. turn on scramble setting*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 2b'11*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ ++ } ++ ++ /* 4. Turn On Continue Tx and turn off the other test modes.*/ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ContinuousTx); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ContinuousTx); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ pMptCtx->bCckContTx = FALSE; ++ pMptCtx->bOfdmContTx = TRUE; ++} /* mpt_StartOfdmContTx */ ++ ++ ++VOID mpt_ProSetPMacTx(PADAPTER Adapter) ++{ ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; ++ u32 u4bTmp; ++ ++ DbgPrint("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound); ++ DbgPrint("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount, PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern); ++#if 0 ++ PRINT_DATA("LSIG ", PMacTxInfo.LSIG, 3); ++ PRINT_DATA("HT_SIG", PMacTxInfo.HT_SIG, 6); ++ PRINT_DATA("VHT_SIG_A", PMacTxInfo.VHT_SIG_A, 6); ++ PRINT_DATA("VHT_SIG_B", PMacTxInfo.VHT_SIG_B, 4); ++ DbgPrint("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC); ++ PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4); ++ ++ PRINT_DATA("Src Address", Adapter->mac_addr, 6); ++ PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, 6); ++#endif ++ ++ if (PMacTxInfo.bEnPMacTx == FALSE) { ++ if (PMacTxInfo.Mode == CONTINUOUS_TX) { ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StopCckContTx(Adapter); ++ else ++ mpt_StopOfdmContTx(Adapter); ++ } else if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp = PHY_QueryBBReg(Adapter, 0xf50, bMaskLWord); ++ PHY_SetBBReg(Adapter, 0xb1c, bMaskLWord, u4bTmp+50); ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ ++ } else ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ ++ ++ if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { ++ /* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StopCckContTx(Adapter); ++ else ++ mpt_StopOfdmContTx(Adapter); ++ ++ mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE); ++ } ++ ++ return; ++ } ++ ++ if (PMacTxInfo.Mode == CONTINUOUS_TX) { ++ PMacTxInfo.PacketCount = 1; ++ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StartCckContTx(Adapter); ++ else ++ mpt_StartOfdmContTx(Adapter); ++ } else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { ++ /* Continuous TX -> HW TX -> RF Setting */ ++ PMacTxInfo.PacketCount = 1; ++ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StartCckContTx(Adapter); ++ else ++ mpt_StartOfdmContTx(Adapter); ++ } else if (PMacTxInfo.Mode == PACKETS_TX) { ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) ++ PMacTxInfo.PacketCount = 0xffff; ++ } ++ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { ++ /* 0xb1c[0:15] TX packet count 0xb1C[31:16] SFD*/ ++ u4bTmp = PMacTxInfo.PacketCount|(PMacTxInfo.SFD << 16); ++ PHY_SetBBReg(Adapter, 0xb1c, bMaskDWord, u4bTmp); ++ /* 0xb40 7:0 SIGNAL 15:8 SERVICE 31:16 LENGTH*/ ++ u4bTmp = PMacTxInfo.SignalField|(PMacTxInfo.ServiceField << 8)|(PMacTxInfo.LENGTH << 16); ++ PHY_SetBBReg(Adapter, 0xb40, bMaskDWord, u4bTmp); ++ u4bTmp = PMacTxInfo.CRC16[0] | (PMacTxInfo.CRC16[1] << 8); ++ PHY_SetBBReg(Adapter, 0xb44, bMaskLWord, u4bTmp); ++ ++ if (PMacTxInfo.bSPreamble) ++ PHY_SetBBReg(Adapter, 0xb0c, BIT27, 0); ++ else ++ PHY_SetBBReg(Adapter, 0xb0c, BIT27, 1); ++ } else { ++ PHY_SetBBReg(Adapter, 0xb18, 0xfffff, PMacTxInfo.PacketCount); ++ ++ u4bTmp = PMacTxInfo.LSIG[0]|((PMacTxInfo.LSIG[1]) << 8)|((PMacTxInfo.LSIG[2]) << 16)|((PMacTxInfo.PacketPattern) << 24); ++ PHY_SetBBReg(Adapter, 0xb08, bMaskDWord, u4bTmp); /* Set 0xb08[23:0] = LSIG, 0xb08[31:24] = Data init octet*/ ++ ++ if (PMacTxInfo.PacketPattern == 0x12) ++ u4bTmp = 0x3000000; ++ else ++ u4bTmp = 0; ++ } ++ ++ if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp |= PMacTxInfo.HT_SIG[0]|((PMacTxInfo.HT_SIG[1]) << 8)|((PMacTxInfo.HT_SIG[2]) << 16); ++ PHY_SetBBReg(Adapter, 0xb0c, bMaskDWord, u4bTmp); ++ u4bTmp = PMacTxInfo.HT_SIG[3]|((PMacTxInfo.HT_SIG[4]) << 8)|((PMacTxInfo.HT_SIG[5]) << 16); ++ PHY_SetBBReg(Adapter, 0xb10, 0xffffff, u4bTmp); ++ } else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp |= PMacTxInfo.VHT_SIG_A[0]|((PMacTxInfo.VHT_SIG_A[1]) << 8)|((PMacTxInfo.VHT_SIG_A[2]) << 16); ++ PHY_SetBBReg(Adapter, 0xb0c, bMaskDWord, u4bTmp); ++ u4bTmp = PMacTxInfo.VHT_SIG_A[3]|((PMacTxInfo.VHT_SIG_A[4]) << 8)|((PMacTxInfo.VHT_SIG_A[5]) << 16); ++ PHY_SetBBReg(Adapter, 0xb10, 0xffffff, u4bTmp); ++ ++ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_SIG_B, 4); ++ PHY_SetBBReg(Adapter, 0xb14, bMaskDWord, u4bTmp); ++ } ++ ++ if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp = (PMacTxInfo.VHT_SIG_B_CRC << 24)|PMacTxInfo.PacketPeriod; /* for TX interval */ ++ PHY_SetBBReg(Adapter, 0xb20, bMaskDWord, u4bTmp); ++ ++ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_Delimiter, 4); ++ PHY_SetBBReg(Adapter, 0xb24, bMaskDWord, u4bTmp); ++ ++ /* 0xb28 - 0xb34 24 byte Probe Request MAC Header*/ ++ /*& Duration & Frame control*/ ++ PHY_SetBBReg(Adapter, 0xb28, bMaskDWord, 0x00000040); ++ ++ /* Address1 [0:3]*/ ++ u4bTmp = PMacTxInfo.MacAddress[0]|(PMacTxInfo.MacAddress[1] << 8)|(PMacTxInfo.MacAddress[2] << 16)|(PMacTxInfo.MacAddress[3] << 24); ++ PHY_SetBBReg(Adapter, 0xb2C, bMaskDWord, u4bTmp); ++ ++ /* Address3 [3:0]*/ ++ PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp); ++ ++ /* Address2[0:1] & Address1 [5:4]*/ ++ u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8)|(Adapter->mac_addr[0] << 16)|(Adapter->mac_addr[1] << 24); ++ PHY_SetBBReg(Adapter, 0xb30, bMaskDWord, u4bTmp); ++ ++ /* Address2 [5:2]*/ ++ u4bTmp = Adapter->mac_addr[2]|(Adapter->mac_addr[3] << 8)|(Adapter->mac_addr[4] << 16)|(Adapter->mac_addr[5] << 24); ++ PHY_SetBBReg(Adapter, 0xb34, bMaskDWord, u4bTmp); ++ ++ /* Sequence Control & Address3 [5:4]*/ ++ /*u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8) ;*/ ++ /*PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp);*/ ++ } else { ++ PHY_SetBBReg(Adapter, 0xb20, bMaskDWord, PMacTxInfo.PacketPeriod); /* for TX interval*/ ++ /* & Duration & Frame control */ ++ PHY_SetBBReg(Adapter, 0xb24, bMaskDWord, 0x00000040); ++ ++ /* 0xb24 - 0xb38 24 byte Probe Request MAC Header*/ ++ /* Address1 [0:3]*/ ++ u4bTmp = PMacTxInfo.MacAddress[0]|(PMacTxInfo.MacAddress[1] << 8)|(PMacTxInfo.MacAddress[2] << 16)|(PMacTxInfo.MacAddress[3] << 24); ++ PHY_SetBBReg(Adapter, 0xb28, bMaskDWord, u4bTmp); ++ ++ /* Address3 [3:0]*/ ++ PHY_SetBBReg(Adapter, 0xb34, bMaskDWord, u4bTmp); ++ ++ /* Address2[0:1] & Address1 [5:4]*/ ++ u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8)|(Adapter->mac_addr[0] << 16)|(Adapter->mac_addr[1] << 24); ++ PHY_SetBBReg(Adapter, 0xb2c, bMaskDWord, u4bTmp); ++ ++ /* Address2 [5:2] */ ++ u4bTmp = Adapter->mac_addr[2]|(Adapter->mac_addr[3] << 8)|(Adapter->mac_addr[4] << 16)|(Adapter->mac_addr[5] << 24); ++ PHY_SetBBReg(Adapter, 0xb30, bMaskDWord, u4bTmp); ++ ++ /* Sequence Control & Address3 [5:4]*/ ++ u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8); ++ PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp); ++ } ++ ++ PHY_SetBBReg(Adapter, 0xb48, bMaskByte3, PMacTxInfo.TX_RATE_HEX); ++ ++ /* 0xb4c 3:0 TXSC 5:4 BW 7:6 m_STBC 8 NDP_Sound*/ ++ u4bTmp = (PMacTxInfo.TX_SC)|((PMacTxInfo.BandWidth) << 4)|((PMacTxInfo.m_STBC - 1) << 6)|((PMacTxInfo.NDP_sound) << 8); ++ PHY_SetBBReg(Adapter, 0xb4c, 0x1ff, u4bTmp); ++ ++ if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8822B(Adapter)) { ++ u4Byte offset = 0xb44; ++ ++ if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) ++ PHY_SetBBReg(Adapter, offset, 0xc0000000, 0); ++ else if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) ++ PHY_SetBBReg(Adapter, offset, 0xc0000000, 1); ++ else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) ++ PHY_SetBBReg(Adapter, offset, 0xc0000000, 2); ++ } ++ ++ PHY_SetBBReg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ ++/* //PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); //TX Stop*/ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 8); /*TX CCK ON*/ ++ PHY_SetBBReg(Adapter, 0xA84, BIT31, 0); ++ } else ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 4); /* TX Ofdm ON */ ++ ++ if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) ++ mpt_SetSingleTone_8814A(Adapter, TRUE, TRUE); ++ ++} ++#endif /* CONFIG_MP_VHT_HW_TX_MODE */ ++ ++#endif /* CONFIG_MP_INCLUDE*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/hal_phy.c b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_phy.c new file mode 100644 -index 000000000..feb619edb +index 0000000..feb619e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/hal_phy.c @@ -0,0 +1,285 @@ @@ -177673,48500 +178158,72340 @@ index 000000000..feb619edb + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/led/hal_sdio_led.c b/drivers/net/wireless/realtek/rtl8189fs/hal/led/hal_sdio_led.c new file mode 100644 -index 000000000..a29257033 +index 0000000..2f6d49c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/led/hal_sdio_led.c @@ -0,0 +1,2418 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#include -+#include -+ -+// -+// Description: -+// Implementation of LED blinking behavior. -+// It toggle off LED and schedule corresponding timer if necessary. -+// -+void -+SwLedBlink( -+ PLED_SDIO pLed -+ ) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ // Change LED according to BlinkingLedState specified. -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ { -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); -+ } -+ else -+ { -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); -+ } -+ -+ // Determine if we shall change LED state again. -+ pLed->BlinkTimes--; -+ switch(pLed->CurrLedState) -+ { -+ -+ case LED_BLINK_NORMAL: -+ if(pLed->BlinkTimes == 0) -+ { -+ bStopBlinking = _TRUE; -+ } -+ break; -+ -+ case LED_BLINK_StartToBlink: -+ if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ if( check_fwstate(pmlmepriv, _FW_LINKED) && -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ else if(pLed->BlinkTimes == 0) -+ { -+ bStopBlinking = _TRUE; -+ } -+ break; -+ -+ case LED_BLINK_WPS: -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ break; -+ -+ -+ default: -+ bStopBlinking = _TRUE; -+ break; -+ -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) -+ { -+ SwLedOn(padapter, pLed); -+ } -+ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) && pLed->bLedOn == _TRUE) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ -+ pLed->BlinkTimes = 0; -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ // Assign LED state to toggle. -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ // Schedule a timer to toggle LED state. -+ switch( pLed->CurrLedState ) -+ { -+ case LED_BLINK_NORMAL: -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ break; -+ -+ case LED_BLINK_SLOWLY: -+ case LED_BLINK_StartToBlink: -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ break; -+ -+ case LED_BLINK_WPS: -+ { -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); -+ else -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); -+ } -+ break; -+ -+ default: -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ break; -+ } -+ } -+} -+ -+void -+SwLedBlink1( -+ PLED_SDIO pLed -+ ) -+{ -+ _adapter *padapter = pLed->padapter; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ PLED_SDIO pLed1 = &(ledpriv->SwLed1); -+ u8 bStopBlinking = _FALSE; -+ -+ if(pHalData->CustomerID == RT_CID_819x_CAMEO) -+ pLed = &(ledpriv->SwLed1); -+ -+ // Change LED according to BlinkingLedState specified. -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ { -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); -+ } -+ else -+ { -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); -+ } -+ -+ -+ if(pHalData->CustomerID == RT_CID_DEFAULT) -+ { -+ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) -+ { -+ if(!pLed1->bSWLedCtrl) -+ { -+ SwLedOn(padapter, pLed1); -+ pLed1->bSWLedCtrl = _TRUE; -+ } -+ else if(!pLed1->bLedOn) -+ SwLedOn(padapter, pLed1); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); -+ } -+ else -+ { -+ if(!pLed1->bSWLedCtrl) -+ { -+ SwLedOff(padapter, pLed1); -+ pLed1->bSWLedCtrl = _TRUE; -+ } -+ else if(pLed1->bLedOn) -+ SwLedOff(padapter, pLed1); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); -+ } -+ } -+ -+ switch(pLed->CurrLedState) -+ { -+ case LED_BLINK_SLOWLY: -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_NORMAL: -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) -+ { -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) -+ { -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) -+ { -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) -+ { -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->BlinkTimes = 0; -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_WPS: -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_WPS_STOP: //WPS success -+ if(pLed->BlinkingLedState == RTW_LED_ON) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ bStopBlinking = _FALSE; -+ } -+ else -+ { -+ bStopBlinking = _TRUE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+void -+SwLedBlink2( -+ PLED_SDIO pLed -+ ) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ // Change LED according to BlinkingLedState specified. -+ if( pLed->BlinkingLedState == RTW_LED_ON) -+ { -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); -+ } -+ else -+ { -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); -+ } -+ -+ switch(pLed->CurrLedState) -+ { -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) -+ { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); -+ -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) -+ { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); -+ -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+void -+SwLedBlink3( -+ PLED_SDIO pLed -+ ) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ // Change LED according to BlinkingLedState specified. -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ { -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); -+ } -+ else -+ { -+ if(pLed->CurrLedState != LED_BLINK_WPS_STOP) -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); -+ } -+ -+ switch(pLed->CurrLedState) -+ { -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) -+ { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if( !pLed->bLedOn ) -+ SwLedOn(padapter, pLed); -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if( pLed->bLedOn ) -+ SwLedOff(padapter, pLed); -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) -+ { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ if( !pLed->bLedOn ) -+ SwLedOn(padapter, pLed); -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ -+ if( pLed->bLedOn ) -+ SwLedOff(padapter, pLed); -+ -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_WPS: -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_WPS_STOP: //WPS success -+ if(pLed->BlinkingLedState == RTW_LED_ON) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ bStopBlinking = _FALSE; -+ } -+ else -+ { -+ bStopBlinking = _TRUE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ break; -+ -+ -+ default: -+ break; -+ } -+ -+} -+ -+ -+void -+SwLedBlink4( -+ PLED_SDIO pLed -+ ) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ PLED_SDIO pLed1 = &(ledpriv->SwLed1); -+ u8 bStopBlinking = _FALSE; -+ -+ // Change LED according to BlinkingLedState specified. -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ { -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); -+ } -+ else -+ { -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); -+ } -+ -+ if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) -+ { -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ SwLedOff(padapter, pLed1); -+ } -+ -+ switch(pLed->CurrLedState) -+ { -+ case LED_BLINK_SLOWLY: -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_StartToBlink: -+ if( pLed->bLedOn ) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } -+ else -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _FALSE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_WPS: -+ if( pLed->bLedOn ) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } -+ else -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ case LED_BLINK_WPS_STOP: //WPS authentication fail -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ break; -+ -+ case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap -+ pLed->BlinkTimes--; -+ if(pLed->BlinkTimes == 0) -+ { -+ if(pLed->bLedOn) -+ { -+ pLed->BlinkTimes = 1; -+ } -+ else -+ { -+ bStopBlinking = _TRUE; -+ } -+ } -+ -+ if(bStopBlinking) -+ { -+ pLed->BlinkTimes = 10; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); -+ -+ -+} -+ -+void -+SwLedBlink5( -+ PLED_SDIO pLed -+ ) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ // Change LED according to BlinkingLedState specified. -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ { -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); -+ } -+ else -+ { -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); -+ } -+ -+ switch(pLed->CurrLedState) -+ { -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if(pLed->bLedOn) -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if(!pLed->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if( pLed->BlinkTimes == 0 ) -+ { -+ bStopBlinking = _TRUE; -+ } -+ -+ if(bStopBlinking) -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if(pLed->bLedOn) -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if(!pLed->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ { -+ SwLedOff(padapter, pLed); -+ } -+ else -+ { -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); -+ -+ -+} -+ -+void -+SwLedBlink6( -+ PLED_SDIO pLed -+ ) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ // Change LED according to BlinkingLedState specified. -+ if( pLed->BlinkingLedState == RTW_LED_ON ) -+ { -+ SwLedOn(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); -+ } -+ else -+ { -+ SwLedOff(padapter, pLed); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); -+} -+ -+// -+// Description: -+// Handler function of LED Blinking. -+// We dispatch acture LED blink action according to LedStrategy. -+// -+void BlinkHandler(PLED_SDIO pLed) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ -+ //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); -+ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { -+ DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" -+ , __func__ -+ , rtw_is_drv_stopped(padapter)?"True":"False" -+ , rtw_is_surprise_removed(padapter)?"True":"False"); -+ -+ return; -+ } -+ -+ switch(ledpriv->LedStrategy) -+ { -+ case SW_LED_MODE0: -+ SwLedBlink(pLed); -+ break; -+ -+ case SW_LED_MODE1: -+ SwLedBlink1(pLed); -+ break; -+ -+ case SW_LED_MODE2: -+ SwLedBlink2(pLed); -+ break; -+ -+ case SW_LED_MODE3: -+ SwLedBlink3(pLed); -+ break; -+ -+ case SW_LED_MODE4: -+ SwLedBlink4(pLed); -+ break; -+ -+ case SW_LED_MODE5: -+ SwLedBlink5(pLed); -+ break; -+ -+ case SW_LED_MODE6: -+ SwLedBlink6(pLed); -+ break; -+ -+ default: -+ //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); -+ //SwLedBlink(pLed); -+ break; -+ } -+} -+ -+// -+// Description: -+// Callback function of LED BlinkTimer, -+// it just schedules to corresponding BlinkWorkItem/led_blink_hdl -+// -+void BlinkTimerCallback(void *data) -+{ -+ PLED_SDIO pLed = (PLED_SDIO)data; -+ _adapter *padapter = pLed->padapter; -+ -+ //DBG_871X("%s\n", __FUNCTION__); -+ -+ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { -+ /*DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" -+ , __func__ -+ , rtw_is_drv_stopped(padapter)?"True":"False" -+ , rtw_is_surprise_removed(padapter)?"True":"False" );*/ -+ return; -+ } -+ -+ #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD -+ rtw_led_blink_cmd(padapter, pLed); -+ #else -+ _set_workitem(&(pLed->BlinkWorkItem)); -+ #endif -+} -+ -+// -+// Description: -+// Callback function of LED BlinkWorkItem. -+// We dispatch acture LED blink action according to LedStrategy. -+// -+void BlinkWorkItemCallback(_workitem *work) -+{ -+ PLED_SDIO pLed = container_of(work, LED_SDIO, BlinkWorkItem); -+ BlinkHandler(pLed); -+} -+ -+static void -+SwLedControlMode0( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ PLED_SDIO pLed = &(ledpriv->SwLed1); -+ -+ // Decide led state -+ switch(LedAction) -+ { -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if( pLed->bLedBlinkInProgress == _FALSE ) -+ { -+ pLed->bLedBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ pLed->BlinkTimes = 2; -+ -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ case LED_CTL_START_TO_LINK: -+ if( pLed->bLedBlinkInProgress == _FALSE ) -+ { -+ pLed->bLedBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_StartToBlink; -+ pLed->BlinkTimes = 24; -+ -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } -+ else -+ { -+ pLed->CurrLedState = LED_BLINK_StartToBlink; -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ pLed->CurrLedState = RTW_LED_ON; -+ if( pLed->bLedBlinkInProgress == _FALSE ) -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_NO_LINK: -+ pLed->CurrLedState = RTW_LED_OFF; -+ if( pLed->bLedBlinkInProgress == _FALSE ) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ if(pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ SwLedOff(padapter, pLed); -+ break; -+ -+ case LED_CTL_START_WPS: -+ if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) -+ { -+ pLed->bLedBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_WPS; -+ pLed->BlinkTimes = 20; -+ -+ if( pLed->bLedOn ) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); -+ } -+ else -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); -+ } -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: -+ if(pLed->bLedBlinkInProgress) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ break; -+ -+ -+ default: -+ break; -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); -+ -+} -+ -+ //ALPHA, added by chiyoko, 20090106 -+static void -+SwLedControlMode1( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ if(pHalData->CustomerID == RT_CID_819x_CAMEO) -+ pLed = &(ledpriv->SwLed1); -+ -+ switch(LedAction) -+ { -+ case LED_CTL_POWER_ON: -+ case LED_CTL_START_TO_LINK: -+ case LED_CTL_NO_LINK: -+ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ if( pLed->bLedLinkBlinkInProgress == _TRUE ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ if( pLed->bLedLinkBlinkInProgress == _FALSE ) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_SITE_SURVEY: -+ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) -+ ; -+ else if(pLed->bLedScanBlinkInProgress ==_FALSE) -+ { -+ if(IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedLinkBlinkInProgress == _TRUE ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if(pLed->bLedBlinkInProgress ==_FALSE) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedLinkBlinkInProgress == _TRUE ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_START_WPS: //wait until xinpin finish -+ case LED_CTL_START_WPS_BOTTON: -+ if(pLed->bLedWPSBlinkInProgress ==_FALSE) -+ { -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedLinkBlinkInProgress == _TRUE ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedScanBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_WPS; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ -+ case LED_CTL_STOP_WPS: -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedLinkBlinkInProgress == _TRUE ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedScanBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedWPSBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ } -+ else -+ { -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ } -+ -+ pLed->CurrLedState = LED_BLINK_WPS_STOP; -+ if(pLed->bLedOn) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ } -+ else -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: -+ if(pLed->bLedWPSBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if( pLed->bLedNoLinkBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedLinkBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedWPSBlinkInProgress ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedScanBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); -+} -+ -+ //Arcadyan/Sitecom , added by chiyoko, 20090216 -+static void -+SwLedControlMode2( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ -+ switch(LedAction) -+ { -+ case LED_CTL_SITE_SURVEY: -+ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) -+ ; -+ else if(pLed->bLedScanBlinkInProgress ==_FALSE) -+ { -+ if(IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if( pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedScanBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_START_WPS: //wait until xinpin finish -+ case LED_CTL_START_WPS_BOTTON: -+ if(pLed->bLedWPSBlinkInProgress ==_FALSE) -+ { -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedScanBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ if(adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ else -+ { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+ break; -+ -+ case LED_CTL_START_TO_LINK: -+ case LED_CTL_NO_LINK: -+ if(!IS_LED_BLINKING(pLed)) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if( pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedScanBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedWPSBlinkInProgress ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+} -+ -+ //COREGA, added by chiyoko, 20090316 -+ static void -+ SwLedControlMode3( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ -+ switch(LedAction) -+ { -+ case LED_CTL_SITE_SURVEY: -+ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) -+ ; -+ else if(pLed->bLedScanBlinkInProgress ==_FALSE) -+ { -+ if(IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ if(IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if( pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedScanBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_START_WPS: //wait until xinpin finish -+ case LED_CTL_START_WPS_BOTTON: -+ if(pLed->bLedWPSBlinkInProgress ==_FALSE) -+ { -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedScanBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_WPS; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: -+ if(pLed->bLedWPSBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ else -+ { -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ } -+ -+ pLed->CurrLedState = LED_BLINK_WPS_STOP; -+ if(pLed->bLedOn) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ } -+ else -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: -+ if(pLed->bLedWPSBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_START_TO_LINK: -+ case LED_CTL_NO_LINK: -+ if(!IS_LED_BLINKING(pLed)) -+ { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if( pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedScanBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedWPSBlinkInProgress ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -+} -+ -+ -+ //Edimax-Belkin, added by chiyoko, 20090413 -+static void -+SwLedControlMode4( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ PLED_SDIO pLed1 = &(ledpriv->SwLed1); -+ -+ switch(LedAction) -+ { -+ case LED_CTL_START_TO_LINK: -+ if(pLed1->bLedWPSBlinkInProgress) -+ { -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ -+ if(pLed1->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ -+ if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedStartToLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_StartToBlink; -+ if( pLed->bLedOn ) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } -+ else -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ case LED_CTL_NO_LINK: -+ //LED1 settings -+ if(LedAction == LED_CTL_LINK) -+ { -+ if(pLed1->bLedWPSBlinkInProgress) -+ { -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ -+ if(pLed1->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ } -+ -+ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_SITE_SURVEY: -+ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) -+ ; -+ else if(pLed->bLedScanBlinkInProgress ==_FALSE) -+ { -+ if(IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if(pLed->bLedBlinkInProgress ==_FALSE) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ { -+ return; -+ } -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_START_WPS: //wait until xinpin finish -+ case LED_CTL_START_WPS_BOTTON: -+ if(pLed1->bLedWPSBlinkInProgress) -+ { -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ -+ if(pLed1->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ -+ if(pLed->bLedWPSBlinkInProgress ==_FALSE) -+ { -+ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if(pLed->bLedScanBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_WPS; -+ if( pLed->bLedOn ) -+ { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } -+ else -+ { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: //WPS connect success -+ if(pLed->bLedWPSBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail -+ if(pLed->bLedWPSBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ -+ //LED1 settings -+ if(pLed1->bLedWPSBlinkInProgress) -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ else -+ pLed1->bLedWPSBlinkInProgress = _TRUE; -+ -+ pLed1->CurrLedState = LED_BLINK_WPS_STOP; -+ if( pLed1->bLedOn ) -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed1->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap -+ if(pLed->bLedWPSBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ -+ //LED1 settings -+ if(pLed1->bLedWPSBlinkInProgress) -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ else -+ pLed1->bLedWPSBlinkInProgress = _TRUE; -+ -+ pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; -+ pLed1->BlinkTimes = 10; -+ if( pLed1->bLedOn ) -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed1->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ -+ if( pLed->bLedNoLinkBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedLinkBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedWPSBlinkInProgress ) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedScanBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if( pLed->bLedStartToLinkBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedStartToLinkBlinkInProgress = _FALSE; -+ } -+ -+ if( pLed1->bLedWPSBlinkInProgress ) -+ { -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed1->BlinkingLedState = LED_UNKNOWN; -+ SwLedOff(padapter, pLed); -+ SwLedOff(padapter, pLed1); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); -+} -+ -+ -+ -+ //Sercomm-Belkin, added by chiyoko, 20090415 -+static void -+SwLedControlMode5( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ -+ if(pHalData->CustomerID == RT_CID_819x_CAMEO) -+ pLed = &(ledpriv->SwLed1); -+ -+ switch(LedAction) -+ { -+ case LED_CTL_POWER_ON: -+ case LED_CTL_NO_LINK: -+ case LED_CTL_LINK: //solid blue -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_SITE_SURVEY: -+ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) -+ ; -+ else if(pLed->bLedScanBlinkInProgress ==_FALSE) -+ { -+ if(pLed->bLedBlinkInProgress ==_TRUE) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if(pLed->bLedBlinkInProgress ==_FALSE) -+ { -+ if(pLed->CurrLedState == LED_BLINK_SCAN) -+ { -+ return; -+ } -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if( pLed->bLedOn ) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ -+ if( pLed->bLedBlinkInProgress) -+ { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); -+} -+ -+ //WNC-Corega, added by chiyoko, 20090902 -+static void -+SwLedControlMode6( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed0 = &(ledpriv->SwLed0); -+ -+ switch(LedAction) -+ { -+ case LED_CTL_POWER_ON: -+ case LED_CTL_LINK: -+ case LED_CTL_NO_LINK: -+ _cancel_timer_ex(&(pLed0->BlinkTimer)); -+ pLed0->CurrLedState = RTW_LED_ON; -+ pLed0->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed0->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ SwLedOff(padapter, pLed0); -+ break; -+ -+ default: -+ break; -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed0->CurrLedState)); -+} -+ -+void -+LedControlSDIO( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+ ) -+{ -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ -+ #if(MP_DRIVER == 1) -+ if (padapter->registrypriv.mp_mode == 1) -+ return; -+#endif -+ -+ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { -+ /*DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" -+ , __func__ -+ , rtw_is_drv_stopped(padapter)?"True":"False" -+ , rtw_is_surprise_removed(padapter)?"True":"False");*/ -+ return; -+ } -+ -+ if( ledpriv->bRegUseLed == _FALSE) -+ return; -+ -+ //if(priv->bInHctTest) -+ // return; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ // Only do led action for PRIMARY_ADAPTER -+ if (padapter->adapter_type != PRIMARY_ADAPTER) -+ return; -+#endif -+ -+ if( (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && -+ adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) && -+ (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || -+ LedAction == LED_CTL_SITE_SURVEY || -+ LedAction == LED_CTL_LINK || -+ LedAction == LED_CTL_NO_LINK || -+ LedAction == LED_CTL_POWER_ON) ) -+ { -+ return; -+ } -+ -+ switch(ledpriv->LedStrategy) -+ { -+ case SW_LED_MODE0: -+ SwLedControlMode0(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE1: -+ SwLedControlMode1(padapter, LedAction); -+ break; -+ case SW_LED_MODE2: -+ SwLedControlMode2(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE3: -+ SwLedControlMode3(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE4: -+ SwLedControlMode4(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE5: -+ SwLedControlMode5(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE6: -+ SwLedControlMode6(padapter, LedAction); -+ break; -+ -+ default: -+ break; -+ } -+ -+ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); -+} -+ -+// -+// Description: -+// Reset status of LED_871x object. -+// -+void ResetLedStatus(PLED_SDIO pLed) { -+ -+ pLed->CurrLedState = RTW_LED_OFF; // Current LED state. -+ pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. -+ -+ pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ -+ pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. -+ pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. -+ -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ pLed->bLedStartToLinkBlinkInProgress = _FALSE; -+ pLed->bLedScanBlinkInProgress = _FALSE; -+} -+ -+ // -+// Description: -+// Initialize an LED_871x object. -+// -+void -+InitLed( -+ _adapter *padapter, -+ PLED_SDIO pLed, -+ LED_PIN LedPin -+ ) -+{ -+ pLed->padapter = padapter; -+ pLed->LedPin = LedPin; -+ -+ ResetLedStatus(pLed); -+ -+ _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); -+ -+ _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); -+} -+ -+ -+// -+// Description: -+// DeInitialize an LED_871x object. -+// -+void -+DeInitLed( -+ PLED_SDIO pLed -+ ) -+{ -+ _cancel_workitem_sync(&(pLed->BlinkWorkItem)); -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ ResetLedStatus(pLed); -+} -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++#include ++ ++// ++// Description: ++// Implementation of LED blinking behavior. ++// It toggle off LED and schedule corresponding timer if necessary. ++// ++void ++SwLedBlink( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ // Determine if we shall change LED state again. ++ pLed->BlinkTimes--; ++ switch(pLed->CurrLedState) ++ { ++ ++ case LED_BLINK_NORMAL: ++ if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ else if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ ++ default: ++ bStopBlinking = _TRUE; ++ break; ++ ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) ++ { ++ SwLedOn(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) && pLed->bLedOn == _TRUE) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ // Assign LED state to toggle. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ // Schedule a timer to toggle LED state. ++ switch( pLed->CurrLedState ) ++ { ++ case LED_BLINK_NORMAL: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_SLOWLY: ++ case LED_BLINK_StartToBlink: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS: ++ { ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ else ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ break; ++ ++ default: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ } ++ } ++} ++ ++void ++SwLedBlink1( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_SDIO pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ if(pHalData->CustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ ++ if(pHalData->CustomerID == RT_CID_DEFAULT) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOn(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(!pLed1->bLedOn) ++ SwLedOn(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); ++ } ++ else ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOff(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(pLed1->bLedOn) ++ SwLedOff(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); ++ } ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_NORMAL: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ bStopBlinking = _FALSE; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++void ++SwLedBlink2( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++void ++SwLedBlink3( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ if(pLed->CurrLedState != LED_BLINK_WPS_STOP) ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ bStopBlinking = _FALSE; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++} ++ ++ ++void ++SwLedBlink4( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_SDIO pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) ++ { ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed1); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _FALSE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS authentication fail ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap ++ pLed->BlinkTimes--; ++ if(pLed->BlinkTimes == 0) ++ { ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkTimes = 1; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ } ++ ++ if(bStopBlinking) ++ { ++ pLed->BlinkTimes = 10; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++void ++SwLedBlink5( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++void ++SwLedBlink6( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); ++} ++ ++// ++// Description: ++// Handler function of LED Blinking. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++void BlinkHandler(PLED_SDIO pLed) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); ++ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { ++ DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False"); ++ ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ SwLedBlink(pLed); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedBlink1(pLed); ++ break; ++ ++ case SW_LED_MODE2: ++ SwLedBlink2(pLed); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedBlink3(pLed); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedBlink4(pLed); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedBlink5(pLed); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedBlink6(pLed); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); ++ //SwLedBlink(pLed); ++ break; ++ } ++} ++ ++// ++// Description: ++// Callback function of LED BlinkTimer, ++// it just schedules to corresponding BlinkWorkItem/led_blink_hdl ++// ++void BlinkTimerCallback(void *data) ++{ ++ PLED_SDIO pLed = (PLED_SDIO)data; ++ _adapter *padapter = pLed->padapter; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { ++ /*DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False" );*/ ++ return; ++ } ++ ++ #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD ++ rtw_led_blink_cmd(padapter, pLed); ++ #else ++ _set_workitem(&(pLed->BlinkWorkItem)); ++ #endif ++} ++ ++// ++// Description: ++// Callback function of LED BlinkWorkItem. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++void BlinkWorkItemCallback(_workitem *work) ++{ ++ PLED_SDIO pLed = container_of(work, LED_SDIO, BlinkWorkItem); ++ BlinkHandler(pLed); ++} ++ ++static void ++SwLedControlMode0( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_SDIO pLed = &(ledpriv->SwLed1); ++ ++ // Decide led state ++ switch(LedAction) ++ { ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ pLed->BlinkTimes = 2; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ pLed->BlinkTimes = 24; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_NO_LINK: ++ pLed->CurrLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ if(pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ SwLedOff(padapter, pLed); ++ break; ++ ++ case LED_CTL_START_WPS: ++ if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_WPS; ++ pLed->BlinkTimes = 20; ++ ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedBlinkInProgress) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++ ++} ++ ++ //ALPHA, added by chiyoko, 20090106 ++static void ++SwLedControlMode1( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ ++ if(pHalData->CustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if( pLed->bLedLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //Arcadyan/Sitecom , added by chiyoko, 20090216 ++static void ++SwLedControlMode2( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ if(adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ //COREGA, added by chiyoko, 20090316 ++ static void ++ SwLedControlMode3( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ ++ //Edimax-Belkin, added by chiyoko, 20090413 ++static void ++SwLedControlMode4( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ PLED_SDIO pLed1 = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_START_TO_LINK: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedStartToLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ //LED1 settings ++ if(LedAction == LED_CTL_LINK) ++ { ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ } ++ ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: //WPS connect success ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed1->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; ++ pLed1->BlinkTimes = 10; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed1->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedStartToLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ } ++ ++ if( pLed1->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed1->BlinkingLedState = LED_UNKNOWN; ++ SwLedOff(padapter, pLed); ++ SwLedOff(padapter, pLed1); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ ++ ++ //Sercomm-Belkin, added by chiyoko, 20090415 ++static void ++SwLedControlMode5( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ ++ if(pHalData->CustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_NO_LINK: ++ case LED_CTL_LINK: //solid blue ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN) ++ { ++ return; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //WNC-Corega, added by chiyoko, 20090902 ++static void ++SwLedControlMode6( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed0 = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ _cancel_timer_ex(&(pLed0->BlinkTimer)); ++ pLed0->CurrLedState = RTW_LED_ON; ++ pLed0->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed0->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ SwLedOff(padapter, pLed0); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed0->CurrLedState)); ++} ++ ++void ++LedControlSDIO( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++ ) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ #if(MP_DRIVER == 1) ++ if (padapter->registrypriv.mp_mode == 1) ++ return; ++#endif ++ ++ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { ++ /*DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False");*/ ++ return; ++ } ++ ++ if( ledpriv->bRegUseLed == _FALSE) ++ return; ++ ++ //if(priv->bInHctTest) ++ // return; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ // Only do led action for PRIMARY_ADAPTER ++ if (padapter->adapter_type != PRIMARY_ADAPTER) ++ return; ++#endif ++ ++ if( (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && ++ adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) && ++ (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || ++ LedAction == LED_CTL_SITE_SURVEY || ++ LedAction == LED_CTL_LINK || ++ LedAction == LED_CTL_NO_LINK || ++ LedAction == LED_CTL_POWER_ON) ) ++ { ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ SwLedControlMode0(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedControlMode1(padapter, LedAction); ++ break; ++ case SW_LED_MODE2: ++ SwLedControlMode2(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedControlMode3(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedControlMode4(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedControlMode5(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedControlMode6(padapter, LedAction); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); ++} ++ ++// ++// Description: ++// Reset status of LED_871x object. ++// ++void ResetLedStatus(PLED_SDIO pLed) { ++ ++ pLed->CurrLedState = RTW_LED_OFF; // Current LED state. ++ pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. ++ ++ pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ ++ pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. ++ pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. ++ ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ pLed->bLedScanBlinkInProgress = _FALSE; ++} ++ ++ // ++// Description: ++// Initialize an LED_871x object. ++// ++void ++InitLed( ++ _adapter *padapter, ++ PLED_SDIO pLed, ++ LED_PIN LedPin ++ ) ++{ ++ pLed->padapter = padapter; ++ pLed->LedPin = LedPin; ++ ++ ResetLedStatus(pLed); ++ ++ _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); ++ ++ _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); ++} ++ ++ ++// ++// Description: ++// DeInitialize an LED_871x object. ++// ++void ++DeInitLed( ++ PLED_SDIO pLed ++ ) ++{ ++ _cancel_workitem_sync(&(pLed->BlinkWorkItem)); ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ ResetLedStatus(pLed); ++} ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halhwimg.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halhwimg.h new file mode 100644 -index 000000000..4c5c88160 +index 0000000..108f715 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halhwimg.h @@ -0,0 +1,123 @@ -+#pragma once -+#ifndef __INC_HW_IMG_H -+#define __INC_HW_IMG_H -+ -+// -+// 2011/03/15 MH Add for different IC HW image file selection. code size consideration. -+// -+#if RT_PLATFORM == PLATFORM_LINUX -+ -+ #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ // For 92C -+ #define RTL8192CE_HWIMG_SUPPORT 1 -+ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192CU_HWIMG_SUPPORT 0 -+ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 -+ -+ // For 92D -+ #define RTL8192DE_HWIMG_SUPPORT 1 -+ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192DU_HWIMG_SUPPORT 0 -+ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 -+ -+ // For 8723 -+ #define RTL8723E_HWIMG_SUPPORT 1 -+ #define RTL8723U_HWIMG_SUPPORT 0 -+ #define RTL8723S_HWIMG_SUPPORT 0 -+ -+ //For 88E -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ -+ #elif (DEV_BUS_TYPE == RT_USB_INTERFACE) -+ // For 92C -+ #define RTL8192CE_HWIMG_SUPPORT 0 -+ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192CU_HWIMG_SUPPORT 1 -+ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 -+ -+ //For 92D -+ #define RTL8192DE_HWIMG_SUPPORT 0 -+ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192DU_HWIMG_SUPPORT 1 -+ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 -+ -+ // For 8723 -+ #define RTL8723E_HWIMG_SUPPORT 0 -+ #define RTL8723U_HWIMG_SUPPORT 1 -+ #define RTL8723S_HWIMG_SUPPORT 0 -+ -+ //For 88E -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ -+ #elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE) -+ // For 92C -+ #define RTL8192CE_HWIMG_SUPPORT 0 -+ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192CU_HWIMG_SUPPORT 1 -+ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 -+ -+ //For 92D -+ #define RTL8192DE_HWIMG_SUPPORT 0 -+ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192DU_HWIMG_SUPPORT 1 -+ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 -+ -+ // For 8723 -+ #define RTL8723E_HWIMG_SUPPORT 0 -+ #define RTL8723U_HWIMG_SUPPORT 0 -+ #define RTL8723S_HWIMG_SUPPORT 1 -+ -+ //For 88E -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ #endif -+ -+#else // PLATFORM_WINDOWS & MacOSX -+ -+//For 92C -+#define RTL8192CE_HWIMG_SUPPORT 1 -+#define RTL8192CE_TEST_HWIMG_SUPPORT 1 -+#define RTL8192CU_HWIMG_SUPPORT 1 -+#define RTL8192CU_TEST_HWIMG_SUPPORT 1 -+ -+// For 92D -+#define RTL8192DE_HWIMG_SUPPORT 1 -+#define RTL8192DE_TEST_HWIMG_SUPPORT 1 -+#define RTL8192DU_HWIMG_SUPPORT 1 -+#define RTL8192DU_TEST_HWIMG_SUPPORT 1 -+ -+ #if defined(UNDER_CE) -+ // For 8723 -+ #define RTL8723E_HWIMG_SUPPORT 0 -+ #define RTL8723U_HWIMG_SUPPORT 0 -+ #define RTL8723S_HWIMG_SUPPORT 1 -+ -+ // For 88E -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ -+ #else -+ -+ // For 8723 -+ #define RTL8723E_HWIMG_SUPPORT 1 -+ //#define RTL_8723E_TEST_HWIMG_SUPPORT 1 -+ #define RTL8723U_HWIMG_SUPPORT 1 -+ //#define RTL_8723U_TEST_HWIMG_SUPPORT 1 -+ #define RTL8723S_HWIMG_SUPPORT 1 -+ //#define RTL_8723S_TEST_HWIMG_SUPPORT 1 -+ -+ //For 88E -+ #define RTL8188EE_HWIMG_SUPPORT 1 -+ #define RTL8188EU_HWIMG_SUPPORT 1 -+ #define RTL8188ES_HWIMG_SUPPORT 1 -+ #endif -+ -+#endif -+ -+#endif //__INC_HW_IMG_H ++#pragma once ++#ifndef __INC_HW_IMG_H ++#define __INC_HW_IMG_H ++ ++// ++// 2011/03/15 MH Add for different IC HW image file selection. code size consideration. ++// ++#if RT_PLATFORM == PLATFORM_LINUX ++ ++ #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ // For 92C ++ #define RTL8192CE_HWIMG_SUPPORT 1 ++ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192CU_HWIMG_SUPPORT 0 ++ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 92D ++ #define RTL8192DE_HWIMG_SUPPORT 1 ++ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192DU_HWIMG_SUPPORT 0 ++ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 1 ++ #define RTL8723U_HWIMG_SUPPORT 0 ++ #define RTL8723S_HWIMG_SUPPORT 0 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ ++ #elif (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ // For 92C ++ #define RTL8192CE_HWIMG_SUPPORT 0 ++ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192CU_HWIMG_SUPPORT 1 ++ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 ++ ++ //For 92D ++ #define RTL8192DE_HWIMG_SUPPORT 0 ++ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192DU_HWIMG_SUPPORT 1 ++ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 0 ++ #define RTL8723U_HWIMG_SUPPORT 1 ++ #define RTL8723S_HWIMG_SUPPORT 0 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ ++ #elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE) ++ // For 92C ++ #define RTL8192CE_HWIMG_SUPPORT 0 ++ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192CU_HWIMG_SUPPORT 1 ++ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 ++ ++ //For 92D ++ #define RTL8192DE_HWIMG_SUPPORT 0 ++ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192DU_HWIMG_SUPPORT 1 ++ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 0 ++ #define RTL8723U_HWIMG_SUPPORT 0 ++ #define RTL8723S_HWIMG_SUPPORT 1 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ #endif ++ ++#else // PLATFORM_WINDOWS & MacOSX ++ ++//For 92C ++#define RTL8192CE_HWIMG_SUPPORT 1 ++#define RTL8192CE_TEST_HWIMG_SUPPORT 1 ++#define RTL8192CU_HWIMG_SUPPORT 1 ++#define RTL8192CU_TEST_HWIMG_SUPPORT 1 ++ ++// For 92D ++#define RTL8192DE_HWIMG_SUPPORT 1 ++#define RTL8192DE_TEST_HWIMG_SUPPORT 1 ++#define RTL8192DU_HWIMG_SUPPORT 1 ++#define RTL8192DU_TEST_HWIMG_SUPPORT 1 ++ ++ #if defined(UNDER_CE) ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 0 ++ #define RTL8723U_HWIMG_SUPPORT 0 ++ #define RTL8723S_HWIMG_SUPPORT 1 ++ ++ // For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ ++ #else ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 1 ++ //#define RTL_8723E_TEST_HWIMG_SUPPORT 1 ++ #define RTL8723U_HWIMG_SUPPORT 1 ++ //#define RTL_8723U_TEST_HWIMG_SUPPORT 1 ++ #define RTL8723S_HWIMG_SUPPORT 1 ++ //#define RTL_8723S_TEST_HWIMG_SUPPORT 1 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 1 ++ #define RTL8188EU_HWIMG_SUPPORT 1 ++ #define RTL8188ES_HWIMG_SUPPORT 1 ++ #endif ++ ++#endif ++ ++#endif //__INC_HW_IMG_H diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ap.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ap.c new file mode 100644 -index 000000000..142fef12e +index 0000000..f9d6071 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ap.c @@ -0,0 +1,2504 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ #include "mp_precomp.h" -+ #include "phydm_precomp.h" -+ -+#ifndef index_mapping_NUM_88E -+ #define index_mapping_NUM_88E 15 -+#endif -+ -+//#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ -+ do {\ -+ for(_offset = 0; _offset < _size; _offset++)\ -+ {\ -+ if(_deltaThermal < thermalThreshold[_direction][_offset])\ -+ {\ -+ if(_offset != 0)\ -+ _offset--;\ -+ break;\ -+ }\ -+ } \ -+ if(_offset >= _size)\ -+ _offset = _size-1;\ -+ } while(0) -+ -+ -+void ConfigureTxpowerTrack( -+ IN PVOID pDM_VOID, -+ OUT PTXPWRTRACK_CFG pConfig -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if RTL8812A_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ //if (IS_HARDWARE_TYPE_8812(pDM_Odm->Adapter)) -+ if(pDM_Odm->SupportICType==ODM_RTL8812) -+ ConfigureTxpowerTrack_8812A(pConfig); -+ //else -+#endif -+#endif -+ -+#if RTL8814A_SUPPORT -+ if(pDM_Odm->SupportICType== ODM_RTL8814A) -+ ConfigureTxpowerTrack_8814A(pConfig); -+#endif -+ -+ -+#if RTL8188E_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8188E) -+ ConfigureTxpowerTrack_8188E(pConfig); -+#endif -+} -+ -+#if (RTL8192E_SUPPORT==1) -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter_92E( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte ThermalValue = 0, delta, delta_IQK, delta_LCK, channel, is_decrease, rf_mimo_mode; -+ u1Byte ThermalValue_AVG_count = 0; -+ u1Byte OFDM_min_index = 10; //OFDM BB Swing should be less than +2.5dB, which is required by Arthur -+ s1Byte OFDM_index[2], index ; -+ u4Byte ThermalValue_AVG = 0, Reg0x18; -+ u4Byte i = 0, j = 0, rf; -+ s4Byte value32, CCK_index = 0, ele_A, ele_D, ele_C, X, Y; -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ -+ rf_mimo_mode = pDM_Odm->RFType; -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode)); -+ -+#ifdef MP_TEST -+ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { -+ channel = priv->pshare->working_channel; -+ if (priv->pshare->mp_txpwr_tracking == FALSE) -+ return; -+ } else -+#endif -+ { -+ channel = (priv->pmib->dot11RFEntry.dot11channel); -+ } -+ -+ ThermalValue = (unsigned char)ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00); //0x42: RF Reg[15:10] 88E -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); -+ -+ -+ switch (rf_mimo_mode) { -+ case MIMO_1T1R: -+ rf = 1; -+ break; -+ case MIMO_2T2R: -+ rf = 2; -+ break; -+ default: -+ rf = 2; -+ break; -+ } -+ -+ //Query OFDM path A default setting Bit[31:21] -+ ele_D = PHY_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskOFDM_D); -+ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { -+ if (ele_D == (OFDMSwingTable_92E[i] >> 22)) { -+ OFDM_index[0] = (unsigned char)i; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0])); -+ break; -+ } -+ } -+ -+ //Query OFDM path B default setting -+ if (rf_mimo_mode == MIMO_2T2R) { -+ ele_D = PHY_QueryBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskOFDM_D); -+ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { -+ if (ele_D == (OFDMSwingTable_92E[i] >> 22)) { -+ OFDM_index[1] = (unsigned char)i; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1])); -+ break; -+ } -+ } -+ } -+ -+ /* calculate average thermal meter */ -+ { -+ priv->pshare->ThermalValue_AVG_88XX[priv->pshare->ThermalValue_AVG_index_88XX] = ThermalValue; -+ priv->pshare->ThermalValue_AVG_index_88XX++; -+ if (priv->pshare->ThermalValue_AVG_index_88XX == AVG_THERMAL_NUM_88XX) -+ priv->pshare->ThermalValue_AVG_index_88XX = 0; -+ -+ for (i = 0; i < AVG_THERMAL_NUM_88XX; i++) { -+ if (priv->pshare->ThermalValue_AVG_88XX[i]) { -+ ThermalValue_AVG += priv->pshare->ThermalValue_AVG_88XX[i]; -+ ThermalValue_AVG_count++; -+ } -+ } -+ -+ if (ThermalValue_AVG_count) { -+ ThermalValue = (unsigned char)(ThermalValue_AVG / ThermalValue_AVG_count); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); -+ } -+ } -+ -+ /* Initialize */ -+ if (!priv->pshare->ThermalValue) { -+ priv->pshare->ThermalValue = priv->pmib->dot11RFEntry.ther; -+ priv->pshare->ThermalValue_IQK = ThermalValue; -+ priv->pshare->ThermalValue_LCK = ThermalValue; -+ } -+ -+ if (ThermalValue != priv->pshare->ThermalValue) { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** START POWER TRACKING ********\n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); -+ -+ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); -+ delta_IQK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_IQK); -+ delta_LCK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_LCK); -+ is_decrease = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 1 : 0); -+ -+#ifdef _TRACKING_TABLE_FILE -+ if (priv->pshare->rf_ft_var.pwr_track_file) { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Diff: (%s)%d ==> get index from table : %d)\n", (is_decrease?"-":"+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); -+ -+ if (is_decrease) { -+ for (i = 0; i < rf; i++) { -+ OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); -+ OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); -+ CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); -+ CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1))); -+ } -+ } else { -+ for (i = 0; i < rf; i++) { -+ OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); -+ OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ? OFDM_min_index : OFDM_index[i]); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); -+ CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); -+ CCK_index = ((CCK_index < 0 )? 0 : CCK_index); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1))); -+ } -+ } -+ } -+#endif //CFG_TRACKING_TABLE_FILE -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDMSwingTable_92E[(unsigned int)OFDM_index[0]] = %x \n",OFDMSwingTable_92E[(unsigned int)OFDM_index[0]])); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDMSwingTable_92E[(unsigned int)OFDM_index[1]] = %x \n",OFDMSwingTable_92E[(unsigned int)OFDM_index[1]])); -+ -+ //Adujst OFDM Ant_A according to IQK result -+ ele_D = (OFDMSwingTable_92E[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22; -+ X = priv->pshare->RegE94; -+ Y = priv->pshare->RegE9C; -+ -+ if (X != 0) { -+ if ((X & 0x00000200) != 0) -+ X = X | 0xFFFFFC00; -+ ele_A = ((X * ele_D) >> 8) & 0x000003FF; -+ -+ //new element C = element D x Y -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ ele_C = ((Y * ele_D) >> 8) & 0x000003FF; -+ -+ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 -+ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; -+ PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, value32); -+ -+ value32 = (ele_C&0x000003C0)>>6; -+ PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, value32); -+ -+ value32 = ((X * ele_D)>>7)&0x01; -+ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), value32); -+ } else { -+ PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index[0]]); -+ PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); -+ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), 0x00); -+ } -+ -+ set_CCK_swing_index(priv, CCK_index); -+ -+ if (rf == 2) { -+ ele_D = (OFDMSwingTable_92E[(unsigned int)OFDM_index[1]] & 0xFFC00000) >> 22; -+ X = priv->pshare->RegEB4; -+ Y = priv->pshare->RegEBC; -+ -+ if (X != 0) { -+ if ((X & 0x00000200) != 0) //consider minus -+ X = X | 0xFFFFFC00; -+ ele_A = ((X * ele_D) >> 8) & 0x000003FF; -+ -+ //new element C = element D x Y -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ ele_C = ((Y * ele_D) >> 8) & 0x00003FF; -+ -+ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 -+ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; -+ PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); -+ -+ value32 = (ele_C & 0x000003C0) >> 6; -+ PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, value32); -+ -+ value32 = ((X * ele_D) >> 7) & 0x01; -+ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), value32); -+ } else { -+ PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index[1]]); -+ PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); -+ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), 0x00); -+ } -+ -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc80 = 0x%x \n", PHY_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord))); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc88 = 0x%x \n", PHY_QueryBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord))); -+ -+ if (delta_IQK > 3) { -+ priv->pshare->ThermalValue_IQK = ThermalValue; -+#ifdef MP_TEST -+ if (!(priv->pshare->rf_ft_var.mp_specific && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET)))) -+#endif -+ PHY_IQCalibrate_8192E(pDM_Odm,false); -+ } -+ -+ if (delta_LCK > 8) { -+ RTL_W8(0x522, 0xff); -+ Reg0x18 = PHY_QueryRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, 1); -+ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 1); -+ PHY_SetRFReg(priv, RF_PATH_A, 0x18, BIT(15), 1); -+ delay_ms(1); -+ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 0); -+ PHY_SetRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, Reg0x18); -+ RTL_W8(0x522, 0x0); -+ priv->pshare->ThermalValue_LCK = ThermalValue; -+ } -+ } -+ -+ //update thermal meter value -+ priv->pshare->ThermalValue = ThermalValue; -+ for (i = 0 ; i < rf ; i++) -+ priv->pshare->OFDM_index[i] = OFDM_index[i]; -+ priv->pshare->CCK_index = CCK_index; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__)); -+} -+#endif -+ -+#if (RTL8814A_SUPPORT ==1) -+ -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, channel, is_increase; -+ u1Byte ThermalValue_AVG_count = 0, p = 0, i = 0; -+ u4Byte ThermalValue_AVG = 0, Reg0x18; -+ u4Byte BBSwingReg[4] = {rA_TxScale_Jaguar,rB_TxScale_Jaguar,rC_TxScale_Jaguar2,rD_TxScale_Jaguar2}; -+ s4Byte ele_D; -+ u4Byte BBswingIdx; -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ TXPWRTRACK_CFG c; -+ BOOLEAN bTSSIenable = FALSE; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. -+ pu1Byte deltaSwingTableIdx_TUP_A = NULL, deltaSwingTableIdx_TDOWN_A = NULL; -+ pu1Byte deltaSwingTableIdx_TUP_B = NULL, deltaSwingTableIdx_TDOWN_B = NULL; -+ //for 8814 add by Yu Chen -+ pu1Byte deltaSwingTableIdx_TUP_C = NULL, deltaSwingTableIdx_TDOWN_C = NULL; -+ pu1Byte deltaSwingTableIdx_TUP_D = NULL, deltaSwingTableIdx_TDOWN_D = NULL; -+ -+#ifdef MP_TEST -+ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { -+ channel = priv->pshare->working_channel; -+ if (priv->pshare->mp_txpwr_tracking == FALSE) -+ return; -+ } else -+#endif -+ { -+ channel = (priv->pmib->dot11RFEntry.dot11channel); -+ } -+ -+ ConfigureTxpowerTrack(pDM_Odm, &c); -+ pRFCalibrateInfo->DefaultOfdmIndex = priv->pshare->OFDM_index0[ODM_RF_PATH_A]; -+ -+ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, -+ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); -+ -+ if(pDM_Odm->SupportICType & ODM_RTL8814A) // for 8814 path C & D -+ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_C, (pu1Byte*)&deltaSwingTableIdx_TDOWN_C, -+ (pu1Byte*)&deltaSwingTableIdx_TUP_D, (pu1Byte*)&deltaSwingTableIdx_TDOWN_D); -+ -+ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue, priv->pmib->dot11RFEntry.ther)); -+ -+ /* Initialize */ -+ if (!pDM_Odm->RFCalibrateInfo.ThermalValue) { -+ pDM_Odm->RFCalibrateInfo.ThermalValue = priv->pmib->dot11RFEntry.ther; -+ } -+ -+ if (!pDM_Odm->RFCalibrateInfo.ThermalValue_LCK) { -+ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = priv->pmib->dot11RFEntry.ther; -+ } -+ -+ if (!pDM_Odm->RFCalibrateInfo.ThermalValue_IQK) { -+ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = priv->pmib->dot11RFEntry.ther; -+ } -+ -+ bTSSIenable = (BOOLEAN)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, rRF_TxGainOffset, BIT7); // check TSSI enable -+ -+ //4 Query OFDM BB swing default setting Bit[31:21] -+ for(p = ODM_RF_PATH_A ; p < c.RfPathCount ; p++) -+ { -+ ele_D = ODM_GetBBReg(pDM_Odm, BBSwingReg[p], 0xffe00000); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("0x%x:0x%x ([31:21] = 0x%x)\n", BBSwingReg[p], ODM_GetBBReg(pDM_Odm, BBSwingReg[p], bMaskDWord), ele_D)); -+ -+ for (BBswingIdx = 0; BBswingIdx < TXSCALE_TABLE_SIZE; BBswingIdx++) {//4 -+ if (ele_D == TxScalingTable_Jaguar[BBswingIdx]) { -+ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = (u1Byte)BBswingIdx; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("OFDM_index[%d]=%d\n",p, pDM_Odm->RFCalibrateInfo.OFDM_index[p])); -+ break; -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("KfreeOffset[%d]=%d\n",p, pRFCalibrateInfo->KfreeOffset[p])); -+ -+ } -+ -+ /* calculate average thermal meter */ -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; -+ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; -+ -+ for(i = 0; i < c.AverageThermalNum; i++) -+ { -+ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) -+ { -+ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; -+ ThermalValue_AVG_count++; -+ } -+ } -+ -+ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times -+ { -+ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", ThermalValue, priv->pmib->dot11RFEntry.ther)); -+ } -+ -+ //4 Calculate delta, delta_LCK, delta_IQK. -+ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); -+ delta_LCK = RTL_ABS(ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue_LCK); -+ delta_IQK = RTL_ABS(ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue_IQK); -+ is_increase = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 0 : 1); -+ -+ //4 if necessary, do LCK. -+ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { -+ if (delta_LCK > c.Threshold_IQK) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); -+ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; -+ if (c.PHY_LCCalibrate) -+ (*c.PHY_LCCalibrate)(pDM_Odm); -+ } -+ } -+ -+ if (delta_IQK > c.Threshold_IQK) -+ { -+ panic_printk("%s(%d)\n", __FUNCTION__, __LINE__); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= Threshold_IQK(%d)\n", delta_IQK, c.Threshold_IQK)); -+ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; -+ if(c.DoIQK) -+ (*c.DoIQK)(pDM_Odm, TRUE, 0, 0); -+ } -+ -+ if(!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ -+ return; -+ -+ //4 Do Power Tracking -+ -+ if(bTSSIenable == TRUE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter PURE TSSI MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TSSI_MODE, p, 0); -+ } -+ else if (ThermalValue != pDM_Odm->RFCalibrateInfo.ThermalValue) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("\n******** START POWER TRACKING ********\n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue, priv->pmib->dot11RFEntry.ther)); -+ -+#ifdef _TRACKING_TABLE_FILE -+ if (priv->pshare->rf_ft_var.pwr_track_file) -+ { -+ if (is_increase) // thermal is higher than base -+ { -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ switch(p) -+ { -+ case ODM_RF_PATH_B: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_C: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_D: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ } -+ } -+ } -+ else // thermal is lower than base -+ { -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ switch(p) -+ { -+ case ODM_RF_PATH_B: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_C: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_D: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ } -+ } -+ } -+ -+ if (is_increase) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> increse power ---> \n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power --->\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); -+ } -+ } -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** END:%s() ********\n", __FUNCTION__)); -+ //update thermal meter value -+ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; -+ -+ } -+} -+ -+#elif(ODM_IC_11AC_SERIES_SUPPORT) -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ unsigned char ThermalValue = 0, delta, delta_LCK, channel, is_decrease; -+ unsigned char ThermalValue_AVG_count = 0; -+ unsigned int ThermalValue_AVG = 0, Reg0x18; -+ unsigned int BBSwingReg[4]={0xc1c,0xe1c,0x181c,0x1a1c}; -+ int ele_D, value32; -+ char OFDM_index[2], index; -+ unsigned int i = 0, j = 0, rf_path, max_rf_path =2 ,rf; -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ unsigned char OFDM_min_index = 7; //OFDM BB Swing should be less than +2.5dB, which is required by Arthur and Mimic -+ -+#ifdef MP_TEST -+ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { -+ channel = priv->pshare->working_channel; -+ if (priv->pshare->mp_txpwr_tracking == FALSE) -+ return; -+ } else -+#endif -+ { -+ channel = (priv->pmib->dot11RFEntry.dot11channel); -+ } -+ -+#if RTL8881A_SUPPORT -+ if (pDM_Odm->SupportICType == ODM_RTL8881A) { -+ max_rf_path = 1; -+ if ((get_bonding_type_8881A() == BOND_8881AM ||get_bonding_type_8881A() == BOND_8881AN) -+ && priv->pshare->rf_ft_var.use_intpa8881A && (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G)) -+ OFDM_min_index = 6; // intPA - upper bond set to +3 dB (base: -2 dB)ot11RFEntry.phyBandSelect == PHY_BAND_2G)) -+ else -+ OFDM_min_index = 10; //OFDM BB Swing should be less than +1dB, which is required by Arthur and Mimic -+ } -+#endif -+ -+ -+ ThermalValue = (unsigned char)PHY_QueryRFReg(priv, RF_PATH_A, 0x42, 0xfc00, 1); //0x42: RF Reg[15:10] 88E -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); -+ -+ -+ //4 Query OFDM BB swing default setting Bit[31:21] -+ for(rf_path = 0 ; rf_path < max_rf_path ; rf_path++){ -+ ele_D = PHY_QueryBBReg(priv, BBSwingReg[rf_path], 0xffe00000); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0x%x:0x%x ([31:21] = 0x%x)\n",BBSwingReg[rf_path], PHY_QueryBBReg(priv, BBSwingReg[rf_path], bMaskDWord),ele_D)); -+ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {//4 -+ if (ele_D == OFDMSwingTable_8812[i]) { -+ OFDM_index[rf_path] = (unsigned char)i; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[%d]=%d\n",rf_path, OFDM_index[rf_path])); -+ break; -+ } -+ } -+ } -+#if 0 -+ //Query OFDM path A default setting Bit[31:21] -+ ele_D = PHY_QueryBBReg(priv, 0xc1c, 0xffe00000); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0xc1c:0x%x ([31:21] = 0x%x)\n", PHY_QueryBBReg(priv, 0xc1c, bMaskDWord),ele_D)); -+ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {//4 -+ if (ele_D == OFDMSwingTable_8812[i]) { -+ OFDM_index[0] = (unsigned char)i; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[0]=%d\n", OFDM_index[0])); -+ break; -+ } -+ } -+ //Query OFDM path B default setting -+ if (rf == 2) { -+ ele_D = PHY_QueryBBReg(priv, 0xe1c, 0xffe00000); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0xe1c:0x%x ([32:21] = 0x%x)\n", PHY_QueryBBReg(priv, 0xe1c, bMaskDWord),ele_D)); -+ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) { -+ if (ele_D == OFDMSwingTable_8812[i]) { -+ OFDM_index[1] = (unsigned char)i; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[1]=%d\n", OFDM_index[1])); -+ break; -+ } -+ } -+ } -+#endif -+ /* Initialize */ -+ if (!priv->pshare->ThermalValue) { -+ priv->pshare->ThermalValue = priv->pmib->dot11RFEntry.ther; -+ priv->pshare->ThermalValue_LCK = ThermalValue; -+ } -+ -+ /* calculate average thermal meter */ -+ { -+ priv->pshare->ThermalValue_AVG_8812[priv->pshare->ThermalValue_AVG_index_8812] = ThermalValue; -+ priv->pshare->ThermalValue_AVG_index_8812++; -+ if (priv->pshare->ThermalValue_AVG_index_8812 == AVG_THERMAL_NUM_8812) -+ priv->pshare->ThermalValue_AVG_index_8812 = 0; -+ -+ for (i = 0; i < AVG_THERMAL_NUM_8812; i++) { -+ if (priv->pshare->ThermalValue_AVG_8812[i]) { -+ ThermalValue_AVG += priv->pshare->ThermalValue_AVG_8812[i]; -+ ThermalValue_AVG_count++; -+ } -+ } -+ -+ if (ThermalValue_AVG_count) { -+ ThermalValue = (unsigned char)(ThermalValue_AVG / ThermalValue_AVG_count); -+ //printk("AVG Thermal Meter = 0x%x \n", ThermalValue); -+ } -+ } -+ -+ -+ //4 If necessary, do power tracking -+ -+ if(!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ -+ return; -+ -+ if (ThermalValue != priv->pshare->ThermalValue) { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** START POWER TRACKING ********\n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); -+ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); -+ delta_LCK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_LCK); -+ is_decrease = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 1 : 0); -+ //if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) -+ { -+#ifdef _TRACKING_TABLE_FILE -+ if (priv->pshare->rf_ft_var.pwr_track_file) { -+ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Diff: (%s)%d ==> get index from table : %d)\n", (is_decrease?"-":"+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); -+ if (is_decrease) { -+ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); -+ OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); -+#if 0// RTL8881A_SUPPORT -+ if (pDM_Odm->SupportICType == ODM_RTL8881A){ -+ if(priv->pshare->rf_ft_var.pwrtrk_TxAGC_enable){ -+ if(priv->pshare->AddTxAGC){//TxAGC has been added -+ AddTxPower88XX_AC(priv,0); -+ priv->pshare->AddTxAGC = 0; -+ priv->pshare->AddTxAGC_index = 0; -+ } -+ } -+ } -+#endif -+ } else { -+ -+ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] - get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); -+#if 0// RTL8881A_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8881A){ -+ if(priv->pshare->rf_ft_var.pwrtrk_TxAGC_enable){ -+ if(OFDM_index[i] < OFDM_min_index){ -+ priv->pshare->AddTxAGC_index = (OFDM_min_index - OFDM_index[i])/2; // Calculate Remnant TxAGC Value, 2 index for 1 TxAGC -+ AddTxPower88XX_AC(priv,priv->pshare->AddTxAGC_index); -+ priv->pshare->AddTxAGC = 1; //AddTxAGC Flag = 1 -+ OFDM_index[i] = OFDM_min_index; -+ } -+ else{ -+ if(priv->pshare->AddTxAGC){// TxAGC been added -+ priv->pshare->AddTxAGC = 0; -+ priv->pshare->AddTxAGC_index = 0; -+ AddTxPower88XX_AC(priv,0); //minus the added TPI -+ } -+ } -+ } -+ } -+#else -+ OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ? OFDM_min_index : OFDM_index[rf_path]); -+#endif -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); -+ } -+ } -+ } -+#endif -+ //4 Set new BB swing index -+ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { -+ PHY_SetBBReg(priv, BBSwingReg[rf_path], 0xffe00000, OFDMSwingTable_8812[(unsigned int)OFDM_index[rf_path]]); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n",BBSwingReg[rf_path], PHY_QueryBBReg(priv, BBSwingReg[rf_path], 0xffe00000), OFDM_index[rf_path])); -+ } -+ -+ } -+ if (delta_LCK > 8) { -+ RTL_W8(0x522, 0xff); -+ Reg0x18 = PHY_QueryRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, 1); -+ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 1); -+ PHY_SetRFReg(priv, RF_PATH_A, 0x18, BIT(15), 1); -+ delay_ms(200); // frequency deviation -+ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 0); -+ PHY_SetRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, Reg0x18); -+ #ifdef CONFIG_RTL_8812_SUPPORT -+ if (GET_CHIP_VER(priv)== VERSION_8812E) -+ UpdateBBRFVal8812(priv, priv->pmib->dot11RFEntry.dot11channel); -+ #endif -+ RTL_W8(0x522, 0x0); -+ priv->pshare->ThermalValue_LCK = ThermalValue; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** END:%s() ********\n", __FUNCTION__)); -+ -+ //update thermal meter value -+ priv->pshare->ThermalValue = ThermalValue; -+ for (rf_path = 0; rf_path < max_rf_path; rf_path++) -+ priv->pshare->OFDM_index[rf_path] = OFDM_index[rf_path]; -+ } -+} -+ -+#endif -+ -+ -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+#if (RTL8814A_SUPPORT == 1) //use this function to do power tracking after 8814 by YuChen -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) { -+ ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2(pDM_Odm); -+ return; -+ } -+#elif ODM_IC_11AC_SERIES_SUPPORT -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { -+ ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries(pDM_Odm); -+ return; -+ } -+#endif -+ -+#if (RTL8192E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType==ODM_RTL8192E) { -+ ODM_TXPowerTrackingCallback_ThermalMeter_92E(pDM_Odm); -+ return; -+ } -+#endif -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+#endif -+ -+ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; -+ u1Byte ThermalValue_AVG_count = 0; -+ u4Byte ThermalValue_AVG = 0; -+// s4Byte ele_A=0, ele_D, TempCCk, X, value32; -+// s4Byte Y, ele_C=0; -+// s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index; -+// s1Byte deltaPowerIndex = 0; -+ u4Byte i = 0;//, j = 0; -+ BOOLEAN is2T = FALSE; -+// BOOLEAN bInteralPA = FALSE; -+ -+ u1Byte OFDM_max_index = 34, rf = (is2T) ? 2 : 1; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur -+ u1Byte Indexforchannel = 0;/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/ -+ enum _POWER_DEC_INC { POWER_DEC, POWER_INC }; -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ #endif -+ -+ TXPWRTRACK_CFG c; -+ -+ -+ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. -+ s1Byte deltaSwingTableIdx[2][index_mapping_NUM_88E] = { -+ // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} -+ {0,0,2,3,4,4,5,6,7,7,8,9,10,10,11}, {0,0,1,2,3,4,4,4,4,5,7,8,9,9,10} -+ }; -+ u1Byte thermalThreshold[2][index_mapping_NUM_88E]={ -+ // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} -+ {0,2,4,6,8,10,12,14,16,18,20,22,24,26,27}, {0,2,4,6,8,10,12,14,16,18,20,22,25,25,25} -+ }; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+#endif -+ -+ //4 2. Initilization ( 7 steps in total ) -+ -+ ConfigureTxpowerTrack(pDM_Odm, &c); -+ -+ pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug -+ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; -+ -+#if (MP_DRIVER == 1) -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. -+ // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. -+ pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(MP_TEST) -+ if ((OPMODE & WIFI_MP_STATE) || pDM_Odm->priv->pshare->rf_ft_var.mp_specific) { -+ if(pDM_Odm->priv->pshare->mp_txpwr_tracking == FALSE) -+ return; -+ } -+#endif -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>odm_TXPowerTrackingCallback_ThermalMeter_8188E, pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase: %d \n", pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase)); -+/* -+ if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { -+ ODM_SetRFReg(pDM_Odm, RF_PATH_A, c.ThermalRegAddr, BIT17 | BIT16, 0x3); -+ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; -+ return; -+ } -+*/ -+ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if( ! ThermalValue || ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) -+#else -+ if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) -+#endif -+ return; -+ -+ //4 3. Initialize ThermalValues of RFCalibrateInfo -+ -+ if( ! pDM_Odm->RFCalibrateInfo.ThermalValue) -+ { -+ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; -+ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; -+ } -+ -+ if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); -+ } -+ -+ //4 4. Calculate average thermal meter -+ -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; -+ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; -+ -+ for(i = 0; i < c.AverageThermalNum; i++) -+ { -+ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) -+ { -+ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; -+ ThermalValue_AVG_count++; -+ } -+ } -+ -+ if(ThermalValue_AVG_count) -+ { -+ // Give the new thermo value a weighting -+ ThermalValue_AVG += (ThermalValue*4); -+ -+ ThermalValue = (u1Byte)(ThermalValue_AVG / (ThermalValue_AVG_count+4)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); -+ } -+ -+ //4 5. Calculate delta, delta_LCK, delta_IQK. -+ -+ delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); -+ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); -+ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); -+ -+ //4 6. If necessary, do LCK. -+ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { -+ /*if((delta_LCK > pHalData->Delta_LCK) && (pHalData->Delta_LCK != 0))*/ -+ if (delta_LCK >= c.Threshold_IQK) { -+ /*Delta temperature is equal to or larger than 20 centigrade.*/ -+ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; -+ (*c.PHY_LCCalibrate)(pDM_Odm); -+ } -+ } -+ -+ //3 7. If necessary, move the index of swing table to adjust Tx power. -+ -+ if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) -+ { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); -+#else -+ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); -+#endif -+ -+ -+ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(ThermalValue > pHalData->EEPROMThermalMeter) { -+#else -+ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { -+#endif -+ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta); -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = deltaSwingTableIdx[POWER_INC][offset]; -+ -+ } else { -+ -+ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta); -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = (-1)*deltaSwingTableIdx[POWER_DEC][offset]; -+ } -+ -+ if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast) -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; -+ else -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast; -+ -+ for(i = 0; i < rf; i++) -+ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = pRFCalibrateInfo->BbSwingIdxOfdmBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; -+ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; -+ -+ pRFCalibrateInfo->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; -+ pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A] = pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A]; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'OFDM' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A], pRFCalibrateInfo->BbSwingIdxOfdmBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); -+ -+ //4 7.1 Handle boundary conditions of index. -+ -+ -+ for(i = 0; i < rf; i++) -+ { -+ if(pDM_Odm->RFCalibrateInfo.OFDM_index[i] > OFDM_max_index) -+ { -+ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = OFDM_max_index; -+ } -+ else if (pDM_Odm->RFCalibrateInfo.OFDM_index[i] < 0) -+ { -+ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = 0; -+ } -+ } -+ -+ if(pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) -+ pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; -+ else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) -+ pDM_Odm->RFCalibrateInfo.CCK_index = 0; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("The thermal meter is unchanged or TxPowerTracking OFF: ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d)\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A], pRFCalibrateInfo->BbSwingIdxOfdmBase)); -+ -+ if (pDM_Odm->RFCalibrateInfo.PowerIndexOffset != 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) -+ { -+ //4 7.2 Configure the Swing Table to adjust Tx Power. -+ -+ pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. -+ // -+ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital -+ // to increase TX power. Otherwise, EVM will be bad. -+ // -+ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. -+ if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) -+ { -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ // ("Temperature Increasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ // pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); -+ } -+ else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature -+ { -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ // ("Temperature Decreasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ // pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); -+ } -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (ThermalValue > pHalData->EEPROMThermalMeter) -+#else -+ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) -+#endif -+ { -+// ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TXAGC, 0, 0); -+ } -+ else -+ { -+ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, RF_PATH_A, Indexforchannel); -+ if(is2T) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, RF_PATH_B, Indexforchannel); -+ } -+ -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; -+ pRFCalibrateInfo->BbSwingIdxOfdmBase = pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A]; -+ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; -+ -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ // if((delta_IQK > pHalData->Delta_IQK) && (pHalData->Delta_IQK != 0)) -+ if ((delta_IQK >= 8)) // Delta temperature is equal to or larger than 20 centigrade. -+ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n")); -+ -+ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ -+VOID -+phy_PathAStandBy( -+ IN PADAPTER pAdapter -+ ) -+{ -+ RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); -+ -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x0); -+ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x808000); -+} -+ -+//1 7. IQK -+//#define MAX_TOLERANCE 5 -+//#define IQK_DELAY_TIME 1 //ms -+ -+u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -+phy_PathA_IQK_8192C( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN configPathB -+ ) -+{ -+ -+ u4Byte regEAC, regE94, regE9C, regEA4; -+ u1Byte result = 0x00; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); -+ -+ //path-A IQK setting -+ RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); -+ if(pAdapter->interfaceIndex == 0) -+ { -+ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); -+ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); -+ } -+ else -+ { -+ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22); -+ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22); -+ } -+ -+ PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); -+ -+ PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : -+ IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); -+ -+ //path-B IQK setting -+ if(configPathB) -+ { -+ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); -+ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); -+ PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); -+ PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); -+ } -+ -+ //LO calibration setting -+ RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); -+ PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); -+ -+ //One shot, path A LOK & IQK -+ RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); -+ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); -+ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); -+ -+ // delay x ms -+ RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); -+ PlatformStallExecution(IQK_DELAY_TIME*1000); -+ -+ // Check failed -+ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); -+ regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); -+ regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); -+ regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); -+ -+ if(!(regEAC & BIT28) && -+ (((regE94 & 0x03FF0000)>>16) != 0x142) && -+ (((regE9C & 0x03FF0000)>>16) != 0x42) ) -+ result |= 0x01; -+ else //if Tx not OK, ignore Rx -+ return result; -+ -+ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK -+ (((regEA4 & 0x03FF0000)>>16) != 0x132) && -+ (((regEAC & 0x03FF0000)>>16) != 0x36)) -+ result |= 0x02; -+ else -+ RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); -+ -+ return result; -+ -+ -+} -+ -+u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -+phy_PathB_IQK_8192C( -+ IN PADAPTER pAdapter -+ ) -+{ -+ u4Byte regEAC, regEB4, regEBC, regEC4, regECC; -+ u1Byte result = 0x00; -+ RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); -+ -+ //One shot, path B LOK & IQK -+ RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); -+ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); -+ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); -+ -+ // delay x ms -+ RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); -+ PlatformStallExecution(IQK_DELAY_TIME*1000); -+ -+ // Check failed -+ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); -+ regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); -+ regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); -+ regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); -+ regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); -+ RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); -+ -+ if(!(regEAC & BIT31) && -+ (((regEB4 & 0x03FF0000)>>16) != 0x142) && -+ (((regEBC & 0x03FF0000)>>16) != 0x42)) -+ result |= 0x01; -+ else -+ return result; -+ -+ if(!(regEAC & BIT30) && -+ (((regEC4 & 0x03FF0000)>>16) != 0x132) && -+ (((regECC & 0x03FF0000)>>16) != 0x36)) -+ result |= 0x02; -+ else -+ RTPRINT(FINIT, INIT_IQK, ("Path B Rx IQK fail!!\n")); -+ -+ -+ return result; -+ -+} -+ -+VOID -+phy_PathAFillIQKMatrix( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN bIQKOK, -+ IN s4Byte result[][8], -+ IN u1Byte final_candidate, -+ IN BOOLEAN bTxOnly -+ ) -+{ -+ u4Byte Oldval_0, X, TX0_A, reg; -+ s4Byte Y, TX0_C; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ RTPRINT(FINIT, INIT_IQK, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); -+ -+ if(final_candidate == 0xFF) -+ return; -+ -+ else if(bIQKOK) -+ { -+ Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; -+ -+ X = result[final_candidate][0]; -+ if ((X & 0x00000200) != 0) -+ X = X | 0xFFFFFC00; -+ TX0_A = (X * Oldval_0) >> 8; -+ RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); -+ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); -+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0>>7) & 0x1)); -+ -+ Y = result[final_candidate][1]; -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ -+ //path B IQK result + 3 -+ if(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType == BAND_ON_5G) -+ Y += 3; -+ -+ TX0_C = (Y * Oldval_0) >> 8; -+ RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); -+ PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); -+ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); -+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0>>7) & 0x1)); -+ -+ if(bTxOnly) -+ { -+ RTPRINT(FINIT, INIT_IQK, ("phy_PathAFillIQKMatrix only Tx OK\n")); -+ return; -+ } -+ -+ reg = result[final_candidate][2]; -+ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); -+ -+ reg = result[final_candidate][3] & 0x3F; -+ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); -+ -+ reg = (result[final_candidate][3] >> 6) & 0xF; -+ PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg); -+ } -+} -+ -+VOID -+phy_PathBFillIQKMatrix( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN bIQKOK, -+ IN s4Byte result[][8], -+ IN u1Byte final_candidate, -+ IN BOOLEAN bTxOnly //do Tx only -+ ) -+{ -+ u4Byte Oldval_1, X, TX1_A, reg; -+ s4Byte Y, TX1_C; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ RTPRINT(FINIT, INIT_IQK, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); -+ -+ if(final_candidate == 0xFF) -+ return; -+ -+ else if(bIQKOK) -+ { -+ Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; -+ -+ X = result[final_candidate][4]; -+ if ((X & 0x00000200) != 0) -+ X = X | 0xFFFFFC00; -+ TX1_A = (X * Oldval_1) >> 8; -+ RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); -+ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); -+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1>>7) & 0x1)); -+ -+ Y = result[final_candidate][5]; -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ if(pHalData->CurrentBandType == BAND_ON_5G) -+ Y += 3; //temp modify for preformance -+ TX1_C = (Y * Oldval_1) >> 8; -+ RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); -+ PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); -+ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); -+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1>>7) & 0x1)); -+ -+ if(bTxOnly) -+ return; -+ -+ reg = result[final_candidate][6]; -+ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); -+ -+ reg = result[final_candidate][7] & 0x3F; -+ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); -+ -+ reg = (result[final_candidate][7] >> 6) & 0xF; -+ PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); -+ } -+} -+ -+ -+BOOLEAN -+phy_SimularityCompare_92C( -+ IN PADAPTER pAdapter, -+ IN s4Byte result[][8], -+ IN u1Byte c1, -+ IN u1Byte c2 -+ ) -+{ -+ u4Byte i, j, diff, SimularityBitMap, bound = 0; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B -+ BOOLEAN bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); -+ -+ if(is2T) -+ bound = 8; -+ else -+ bound = 4; -+ -+ SimularityBitMap = 0; -+ -+ for( i = 0; i < bound; i++ ) -+ { -+ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); -+ if (diff > MAX_TOLERANCE) -+ { -+ if((i == 2 || i == 6) && !SimularityBitMap) -+ { -+ if(result[c1][i]+result[c1][i+1] == 0) -+ final_candidate[(i/4)] = c2; -+ else if (result[c2][i]+result[c2][i+1] == 0) -+ final_candidate[(i/4)] = c1; -+ else -+ SimularityBitMap = SimularityBitMap|(1< do IQK again -+*/ -+BOOLEAN -+phy_SimularityCompare( -+ IN PADAPTER pAdapter, -+ IN s4Byte result[][8], -+ IN u1Byte c1, -+ IN u1Byte c2 -+ ) -+{ -+ return phy_SimularityCompare_92C(pAdapter, result, c1, c2); -+ -+} -+ -+VOID -+phy_IQCalibrate_8192C( -+ IN PADAPTER pAdapter, -+ IN s4Byte result[][8], -+ IN u1Byte t, -+ IN BOOLEAN is2T -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u4Byte i; -+ u1Byte PathAOK, PathBOK; -+ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { -+ rFPGA0_XCD_SwitchControl, rBlue_Tooth, -+ rRx_Wait_CCA, rTx_CCK_RFON, -+ rTx_CCK_BBON, rTx_OFDM_RFON, -+ rTx_OFDM_BBON, rTx_To_Rx, -+ rTx_To_Tx, rRx_CCK, -+ rRx_OFDM, rRx_Wait_RIFS, -+ rRx_TO_Rx, rStandby, -+ rSleep, rPMPD_ANAEN }; -+ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { -+ REG_TXPAUSE, REG_BCN_CTRL, -+ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; -+ -+ //since 92C & 92D have the different define in IQK_BB_REG -+ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { -+ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, -+ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, -+ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, -+ rFPGA0_XB_RFInterfaceOE, /*rFPGA0_RFMOD*/ rCCK0_AFESetting -+ }; -+ -+ u4Byte IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = { //for normal -+ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, -+ rFPGA0_XB_RFInterfaceOE, rOFDM0_TRMuxPar, -+ rFPGA0_XCD_RFInterfaceSW, rOFDM0_TRxPathEnable, -+ /*rFPGA0_RFMOD*/ rCCK0_AFESetting, rFPGA0_AnalogParameter4, -+ rOFDM0_XAAGCCore1, rOFDM0_XBAGCCore1 -+ }; -+#if MP_DRIVER -+ const u4Byte retryCount = 9; -+#else -+ const u4Byte retryCount = 2; -+#endif -+ //Neil Chen--2011--05--19-- -+ //3 Path Div -+ u1Byte rfPathSwitch=0x0; -+ -+ // Note: IQ calibration must be performed after loading -+ // PHY_REG.txt , and radio_a, radio_b.txt -+ -+ u4Byte bbvalue; -+ -+ if(t==0) -+ { -+ //bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); -+ // RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C()==>0x%08x\n",bbvalue)); -+ -+ RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); -+ -+ // Save ADDA parameters, turn Path A ADDA on -+ phy_SaveADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); -+ phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); -+ phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); -+ } -+ -+ phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); -+ -+ if(t==0) -+ { -+ pHalData->bRfPiEnable = (u1Byte)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); -+ } -+ -+ if(!pHalData->bRfPiEnable){ -+ // Switch BB to PI mode to do IQ Calibration. -+ phy_PIModeSwitch(pAdapter, TRUE); -+ } -+ -+ //MAC settings -+ phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); -+ -+ //PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00); -+ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskDWord, (0x0f000000 | (PHY_QueryBBReg(pAdapter, rCCK0_AFESetting, bMaskDWord))) ); -+ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); -+ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); -+ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); -+ { -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); -+ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); -+ } -+ -+ if(is2T) -+ { -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); -+ } -+ -+ { -+ //Page B init -+ PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); -+ -+ if(is2T) -+ { -+ PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); -+ } -+ } -+ // IQ calibration setting -+ RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x808000); -+ PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); -+ PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); -+ -+ for(i = 0 ; i < retryCount ; i++){ -+ PathAOK = phy_PathA_IQK_8192C(pAdapter, is2T); -+ if(PathAOK == 0x03){ -+ RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n")); -+ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; -+ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; -+ result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; -+ result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; -+ break; -+ } -+ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK -+ { -+ RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); -+ -+ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; -+ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; -+ } -+ } -+ -+ if(0x00 == PathAOK){ -+ RTPRINT(FINIT, INIT_IQK, ("Path A IQK failed!!\n")); -+ } -+ -+ if(is2T){ -+ phy_PathAStandBy(pAdapter); -+ -+ // Turn Path B ADDA on -+ phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); -+ -+ for(i = 0 ; i < retryCount ; i++){ -+ PathBOK = phy_PathB_IQK_8192C(pAdapter); -+ if(PathBOK == 0x03){ -+ RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n")); -+ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; -+ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; -+ result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; -+ result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; -+ break; -+ } -+ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK -+ { -+ RTPRINT(FINIT, INIT_IQK, ("Path B Only Tx IQK Success!!\n")); -+ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; -+ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; -+ } -+ } -+ -+ if(0x00 == PathBOK){ -+ RTPRINT(FINIT, INIT_IQK, ("Path B IQK failed!!\n")); -+ } -+ } -+ -+ //Back to BB mode, load original value -+ RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); -+ -+ if(t!=0) -+ { -+ if(!pHalData->bRfPiEnable){ -+ // Switch back BB to SI mode after finish IQ Calibration. -+ phy_PIModeSwitch(pAdapter, FALSE); -+ } -+ -+ // Reload ADDA power saving parameters -+ phy_ReloadADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); -+ -+ // Reload MAC parameters -+ phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); -+ -+ // Reload BB parameters -+ phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); -+ -+ /*Restore RX initial gain*/ -+ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); -+ if (is2T) -+ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); -+ //load 0xe30 IQC default value -+ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); -+ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); -+ -+ } -+ RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C() <==\n")); -+ -+} -+ -+ -+VOID -+phy_LCCalibrate92C( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN is2T -+ ) -+{ -+ u1Byte tmpReg; -+ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; -+// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ //Check continuous TX and Packet TX -+ tmpReg = PlatformEFIORead1Byte(pAdapter, 0xd03); -+ -+ if((tmpReg&0x70) != 0) //Deal with contisuous TX case -+ PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX -+ else // Deal with Packet TX case -+ PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0xFF); // block all queues -+ -+ if((tmpReg&0x70) != 0) -+ { -+ //1. Read original RF mode -+ //Path-A -+ RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); -+ -+ //Path-B -+ if(is2T) -+ RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); -+ -+ //2. Set RF mode = standby mode -+ //Path-A -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); -+ -+ //Path-B -+ if(is2T) -+ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); -+ } -+ -+ //3. Read RF reg18 -+ LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); -+ -+ //4. Set LC calibration begin bit15 -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); -+ -+ delay_ms(100); -+ -+ -+ //Restore original situation -+ if((tmpReg&0x70) != 0) //Deal with contisuous TX case -+ { -+ //Path-A -+ PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg); -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); -+ -+ //Path-B -+ if(is2T) -+ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); -+ } -+ else // Deal with Packet TX case -+ { -+ PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0x00); -+ } -+} -+ -+ -+VOID -+phy_LCCalibrate( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN is2T -+ ) -+{ -+ phy_LCCalibrate92C(pAdapter, is2T); -+} -+ -+ -+ -+//Analog Pre-distortion calibration -+#define APK_BB_REG_NUM 8 -+#define APK_CURVE_REG_NUM 4 -+#define PATH_NUM 2 -+ -+VOID -+phy_APCalibrate_8192C( -+ IN PADAPTER pAdapter, -+ IN s1Byte delta, -+ IN BOOLEAN is2T -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ u4Byte regD[PATH_NUM]; -+ u4Byte tmpReg, index, offset, i, apkbound; -+ u1Byte path, pathbound = PATH_NUM; -+ u4Byte BB_backup[APK_BB_REG_NUM]; -+ u4Byte BB_REG[APK_BB_REG_NUM] = { -+ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, -+ rFPGA0_RFMOD, rOFDM0_TRMuxPar, -+ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, -+ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; -+ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { -+ 0x00000020, 0x00a05430, 0x02040000, -+ 0x000800e4, 0x00204000 }; -+ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { -+ 0x00000020, 0x00a05430, 0x02040000, -+ 0x000800e4, 0x22204000 }; -+ -+ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; -+ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { -+ rFPGA0_XCD_SwitchControl, rBlue_Tooth, -+ rRx_Wait_CCA, rTx_CCK_RFON, -+ rTx_CCK_BBON, rTx_OFDM_RFON, -+ rTx_OFDM_BBON, rTx_To_Rx, -+ rTx_To_Tx, rRx_CCK, -+ rRx_OFDM, rRx_Wait_RIFS, -+ rRx_TO_Rx, rStandby, -+ rSleep, rPMPD_ANAEN }; -+ -+ u4Byte MAC_backup[IQK_MAC_REG_NUM]; -+ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { -+ REG_TXPAUSE, REG_BCN_CTRL, -+ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; -+ -+ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { -+ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, -+ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} -+ }; -+ -+ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { -+ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings -+ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} -+ }; -+ -+ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { -+ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, -+ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} -+ }; -+ -+ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { -+ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings -+ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} -+ }; -+#if 0 -+ u4Byte APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { -+ {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, -+ {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} -+ }; -+#endif -+ u4Byte AFE_on_off[PATH_NUM] = { -+ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on -+ -+ u4Byte APK_offset[PATH_NUM] = { -+ rConfig_AntA, rConfig_AntB}; -+ -+ u4Byte APK_normal_offset[PATH_NUM] = { -+ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; -+ -+ u4Byte APK_value[PATH_NUM] = { -+ 0x92fc0000, 0x12fc0000}; -+ -+ u4Byte APK_normal_value[PATH_NUM] = { -+ 0x92680000, 0x12680000}; -+ -+ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { -+ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, -+ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, -+ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, -+ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, -+ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} -+ }; -+ -+ u4Byte APK_normal_setting_value_1[13] = { -+ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, -+ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, -+ 0x12680000, 0x00880000, 0x00880000 -+ }; -+ -+ u4Byte APK_normal_setting_value_2[16] = { -+ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, -+ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, -+ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, -+ 0x00050006 -+ }; -+ -+ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a -+// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; -+ -+ s4Byte BB_offset, delta_V, delta_offset; -+ -+#if MP_DRIVER == 1 -+ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); -+ -+ pMptCtx->APK_bound[0] = 45; -+ pMptCtx->APK_bound[1] = 52; -+#endif -+ -+ RTPRINT(FINIT, INIT_IQK, ("==>phy_APCalibrate_8192C() delta %d\n", delta)); -+ RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); -+ if(!is2T) -+ pathbound = 1; -+ -+ //2 FOR NORMAL CHIP SETTINGS -+ -+// Temporarily do not allow normal driver to do the following settings because these offset -+// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal -+// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the -+// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. -+#if MP_DRIVER != 1 -+ return; -+#endif -+ //settings adjust for normal chip -+ for(index = 0; index < PATH_NUM; index ++) -+ { -+ APK_offset[index] = APK_normal_offset[index]; -+ APK_value[index] = APK_normal_value[index]; -+ AFE_on_off[index] = 0x6fdb25a4; -+ } -+ -+ for(index = 0; index < APK_BB_REG_NUM; index ++) -+ { -+ for(path = 0; path < pathbound; path++) -+ { -+ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; -+ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; -+ } -+ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; -+ } -+ -+ apkbound = 6; -+ -+ //save BB default value -+ for(index = 0; index < APK_BB_REG_NUM ; index++) -+ { -+ if(index == 0) //skip -+ continue; -+ BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); -+ } -+ -+ //save MAC default value -+ phy_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); -+ -+ //save AFE default value -+ phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -+ -+ for(path = 0; path < pathbound; path++) -+ { -+ -+ -+ if(path == RF_PATH_A) -+ { -+ //path A APK -+ //load APK setting -+ //path-A -+ offset = rPdp_AntA; -+ for(index = 0; index < 11; index ++) -+ { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); -+ -+ offset += 0x04; -+ } -+ -+ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); -+ -+ offset = rConfig_AntA; -+ for(; index < 13; index ++) -+ { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); -+ -+ offset += 0x04; -+ } -+ -+ //page-B1 -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x400000); -+ -+ //path A -+ offset = rPdp_AntA; -+ for(index = 0; index < 16; index++) -+ { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); -+ -+ offset += 0x04; -+ } -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); -+ } -+ else if(path == RF_PATH_B) -+ { -+ //path B APK -+ //load APK setting -+ //path-B -+ offset = rPdp_AntB; -+ for(index = 0; index < 10; index ++) -+ { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); -+ -+ offset += 0x04; -+ } -+ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); -+ -+ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); -+ -+ offset = rConfig_AntA; -+ index = 11; -+ for(; index < 13; index ++) //offset 0xb68, 0xb6c -+ { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); -+ -+ offset += 0x04; -+ } -+ -+ //page-B1 -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x400000); -+ -+ //path B -+ offset = 0xb60; -+ for(index = 0; index < 16; index++) -+ { -+ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); -+ -+ offset += 0x04; -+ } -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); -+ } -+ -+ //save RF default value -+ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask); -+ -+ //Path A AFE all on, path B AFE All off or vise versa -+ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) -+ PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord))); -+ -+ //BB to AP mode -+ if(path == 0) -+ { -+ for(index = 0; index < APK_BB_REG_NUM ; index++) -+ { -+ -+ if(index == 0) //skip -+ continue; -+ else if (index < 5) -+ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); -+ else if (BB_REG[index] == 0x870) -+ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); -+ else -+ PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); -+ } -+ -+ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); -+ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); -+ } -+ else //path B -+ { -+ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); -+ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); -+ -+ } -+ -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); -+ -+ //MAC settings -+ phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); -+ -+ if(path == RF_PATH_A) //Path B to standby mode -+ { -+ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000); -+ } -+ else //Path A to standby mode -+ { -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000); -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103); -+ } -+ -+ delta_offset = ((delta+14)/2); -+ if(delta_offset < 0) -+ delta_offset = 0; -+ else if (delta_offset > 12) -+ delta_offset = 12; -+ -+ //AP calibration -+ for(index = 0; index < APK_BB_REG_NUM; index++) -+ { -+ if(index != 1) //only DO PA11+PAD01001, AP RF setting -+ continue; -+ -+ tmpReg = APK_RF_init_value[path][index]; -+#if 1 -+ if(!pHalData->bAPKThermalMeterIgnore) -+ { -+ BB_offset = (tmpReg & 0xF0000) >> 16; -+ -+ if(!(tmpReg & BIT15)) //sign bit 0 -+ { -+ BB_offset = -BB_offset; -+ } -+ -+ delta_V = APK_delta_mapping[index][delta_offset]; -+ -+ BB_offset += delta_V; -+ -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); -+ -+ if(BB_offset < 0) -+ { -+ tmpReg = tmpReg & (~BIT15); -+ BB_offset = -BB_offset; -+ } -+ else -+ { -+ tmpReg = tmpReg | BIT15; -+ } -+ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); -+ } -+#endif -+ -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) -+ PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x894ae); -+ else -+#endif -+ PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x8992e); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask))); -+ PHY_SetRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask))); -+ PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask))); -+ -+ // PA11+PAD01111, one shot -+ i = 0; -+ do -+ { -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x800000); -+ { -+ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); -+ delay_ms(3); -+ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); -+ -+ delay_ms(20); -+ } -+ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); -+ -+ if(path == RF_PATH_A) -+ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000); -+ else -+ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000); -+ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xbd8[25:21] %x\n", tmpReg)); -+ -+ -+ i++; -+ } -+ while(tmpReg > apkbound && i < 4); -+ -+ APK_result[path][index] = tmpReg; -+ } -+ } -+ -+ //reload MAC default value -+ phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); -+ -+ //reload BB default value -+ for(index = 0; index < APK_BB_REG_NUM ; index++) -+ { -+ -+ if(index == 0) //skip -+ continue; -+ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); -+ } -+ -+ //reload AFE default value -+ phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -+ -+ //reload RF path default value -+ for(path = 0; path < pathbound; path++) -+ { -+ PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]); -+ if(path == RF_PATH_B) -+ { -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); -+ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101); -+ } -+ -+ //note no index == 0 -+ if (APK_result[path][1] > 6) -+ APK_result[path][1] = 6; -+ RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); -+ } -+ -+ RTPRINT(FINIT, INIT_IQK, ("\n")); -+ -+ -+ for(path = 0; path < pathbound; path++) -+ { -+ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, -+ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); -+ if(path == RF_PATH_A) -+ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, -+ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); -+ else -+ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, -+ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); -+ -+ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); -+ } -+ -+ pHalData->bAPKdone = TRUE; -+ -+ RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n")); -+} -+ -+ -+VOID -+PHY_IQCalibrate_8192C( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN bReCovery -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ s4Byte result[4][8]; //last is final result -+ u1Byte i, final_candidate, Indexforchannel; -+ BOOLEAN bPathAOK, bPathBOK; -+ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; -+ BOOLEAN is12simular, is13simular, is23simular; -+ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; -+ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { -+ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, -+ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, -+ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, -+ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, -+ rOFDM0_RxIQExtAnta}; -+ -+ if (ODM_CheckPowerStatus(pAdapter) == FALSE) -+ return; -+ -+#if MP_DRIVER == 1 -+ bStartContTx = pAdapter->MptCtx.bStartContTx; -+ bSingleTone = pAdapter->MptCtx.bSingleTone; -+ bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; -+#endif -+ -+ //ignore IQK when continuous Tx -+ if(bStartContTx || bSingleTone || bCarrierSuppression) -+ return; -+ -+#ifdef DISABLE_BB_RF -+ return; -+#endif -+ if(pAdapter->bSlaveOfDMSP) -+ return; -+ -+ if (bReCovery) -+ { -+ phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); -+ return; -+ -+ } -+ -+ RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n")); -+ -+ for(i = 0; i < 8; i++) -+ { -+ result[0][i] = 0; -+ result[1][i] = 0; -+ result[2][i] = 0; -+ result[3][i] = 0; -+ } -+ final_candidate = 0xff; -+ bPathAOK = FALSE; -+ bPathBOK = FALSE; -+ is12simular = FALSE; -+ is23simular = FALSE; -+ is13simular = FALSE; -+ -+ AcquireCCKAndRWPageAControl(pAdapter); -+ /*RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate\n"));*/ -+ for (i=0; i<3; i++) -+ { -+ /*For 88C 1T1R*/ -+ phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); -+ -+ if(i == 1) -+ { -+ is12simular = phy_SimularityCompare(pAdapter, result, 0, 1); -+ if(is12simular) -+ { -+ final_candidate = 0; -+ break; -+ } -+ } -+ -+ if(i == 2) -+ { -+ is13simular = phy_SimularityCompare(pAdapter, result, 0, 2); -+ if(is13simular) -+ { -+ final_candidate = 0; -+ break; -+ } -+ -+ is23simular = phy_SimularityCompare(pAdapter, result, 1, 2); -+ if(is23simular) -+ final_candidate = 1; -+ else -+ { -+ for(i = 0; i < 8; i++) -+ RegTmp += result[3][i]; -+ -+ if(RegTmp != 0) -+ final_candidate = 3; -+ else -+ final_candidate = 0xFF; -+ } -+ } -+ } -+// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); -+ ReleaseCCKAndRWPageAControl(pAdapter); -+ -+ for (i=0; i<4; i++) -+ { -+ RegE94 = result[i][0]; -+ RegE9C = result[i][1]; -+ RegEA4 = result[i][2]; -+ RegEAC = result[i][3]; -+ RegEB4 = result[i][4]; -+ RegEBC = result[i][5]; -+ RegEC4 = result[i][6]; -+ RegECC = result[i][7]; -+ RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); -+ } -+ -+ if(final_candidate != 0xff) -+ { -+ pHalData->RegE94 = RegE94 = result[final_candidate][0]; -+ pHalData->RegE9C = RegE9C = result[final_candidate][1]; -+ RegEA4 = result[final_candidate][2]; -+ RegEAC = result[final_candidate][3]; -+ pHalData->RegEB4 = RegEB4 = result[final_candidate][4]; -+ pHalData->RegEBC = RegEBC = result[final_candidate][5]; -+ RegEC4 = result[final_candidate][6]; -+ RegECC = result[final_candidate][7]; -+ RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate)); -+ RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); -+ bPathAOK = bPathBOK = TRUE; -+ } -+ else -+ { -+ RegE94 = RegEB4 = pHalData->RegE94 = pHalData->RegEB4 = 0x100; //X default value -+ RegE9C = RegEBC = pHalData->RegE9C = pHalData->RegEBC = 0x0; //Y default value -+ } -+ -+ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) -+ { -+ if(pHalData->CurrentBandType == BAND_ON_5G) -+ phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); -+ else -+ phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); -+ -+ } -+ -+ if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) -+ { -+ if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) -+ { -+ if(pHalData->CurrentBandType == BAND_ON_5G) -+ phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); -+ else -+ phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); -+ } -+ } -+ -+ phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); -+ -+} -+ -+ -+VOID -+PHY_LCCalibrate_8192C( -+ IN PADAPTER pAdapter -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; -+ PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; -+ PMGNT_INFO pMgntInfoBuddyAdapter; -+ u4Byte timeout = 2000, timecount = 0; -+ PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; -+ -+#if MP_DRIVER == 1 -+ bStartContTx = pAdapter->MptCtx.bStartContTx; -+ bSingleTone = pAdapter->MptCtx.bSingleTone; -+ bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; -+#endif -+ -+#ifdef DISABLE_BB_RF -+ return; -+#endif -+ -+ //ignore LCK when continuous Tx -+ if(bStartContTx || bSingleTone || bCarrierSuppression) -+ return; -+ -+ if(BuddyAdapter != NULL && -+ ((pAdapter->interfaceIndex == 0 && pHalData->CurrentBandType == BAND_ON_2_4G) || -+ (pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType == BAND_ON_5G))) -+ { -+ pMgntInfoBuddyAdapter=&BuddyAdapter->MgntInfo; -+ while(pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout) -+ { -+ delay_ms(50); -+ timecount += 50; -+ } -+ } -+ -+ while(pMgntInfo->bScanInProgress && timecount < timeout) -+ { -+ delay_ms(50); -+ timecount += 50; -+ } -+ -+ pHalData->bLCKInProgress = TRUE; -+ -+ RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType, timecount)); -+ -+ //if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) -+ if(IS_2T2R(pHalData->VersionID)) -+ { -+ phy_LCCalibrate(pAdapter, TRUE); -+ } -+ else{ -+ // For 88C 1T1R -+ phy_LCCalibrate(pAdapter, FALSE); -+ } -+ -+ pHalData->bLCKInProgress = FALSE; -+ -+ RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex)); -+ -+ -+} -+ -+VOID -+PHY_APCalibrate_8192C( -+ IN PADAPTER pAdapter, -+ IN s1Byte delta -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ //default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 -+ return; -+ -+#ifdef DISABLE_BB_RF -+ return; -+#endif -+ -+#if FOR_BRAZIL_PRETEST != 1 -+ if(pHalData->bAPKdone) -+#endif -+ return; -+ -+ if(IS_92C_SERIAL( pHalData->VersionID)){ -+ phy_APCalibrate_8192C(pAdapter, delta, TRUE); -+ } -+ else{ -+ // For 88C 1T1R -+ phy_APCalibrate_8192C(pAdapter, delta, FALSE); -+ } -+} -+ -+ -+#endif -+ -+ -+//3============================================================ -+//3 IQ Calibration -+//3============================================================ -+ -+VOID -+ODM_ResetIQKResult( -+ IN PVOID pDM_VOID -+) -+{ -+ return; -+} -+#if 1//!(DM_ODM_SUPPORT_TYPE & ODM_AP) -+u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) -+{ -+ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = -+ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; -+ u1Byte place = chnl; -+ -+ -+ if(chnl > 14) -+ { -+ for(place = 14; placeAdapter; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (*pDM_Odm->pIsFcsModeEnable) -+ return; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) -+ return; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) -+ return; -+#endif -+#endif -+ -+#if (RTL8821A_SUPPORT == 1) -+ if (pDM_Odm->bLinked) { -+ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { -+ pDM_Odm->preChannel = *pDM_Odm->pChannel; -+ pDM_Odm->LinkedInterval = 0; -+ } -+ -+ if (pDM_Odm->LinkedInterval < 3) -+ pDM_Odm->LinkedInterval++; -+ -+ if (pDM_Odm->LinkedInterval == 2) { -+ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ -+ /*Open it verified by James 20130715*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PHY_IQCalibrate_8821A(pDM_Odm, FALSE); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHY_IQCalibrate(Adapter, FALSE); -+#else -+ PHY_IQCalibrate_8821A(Adapter, FALSE); -+#endif -+ } -+ } else -+ pDM_Odm->LinkedInterval = 0; -+#endif -+} -+ -+void phydm_rf_init(IN PVOID pDM_VOID) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ odm_TXPowerTrackingInit(pDM_Odm); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ ODM_ClearTxPowerTrackingState(pDM_Odm); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ PHY_IQCalibrate_8814A_Init(pDM_Odm); -+#endif -+#endif -+ -+} -+ -+void phydm_rf_watchdog(IN PVOID pDM_VOID) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ ODM_TXPowerTrackingCheck(pDM_Odm); -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ odm_IQCalibrate(pDM_Odm); -+#endif -+} ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #include "mp_precomp.h" ++ #include "phydm_precomp.h" ++ ++#ifndef index_mapping_NUM_88E ++ #define index_mapping_NUM_88E 15 ++#endif ++ ++//#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ ++ do {\ ++ for(_offset = 0; _offset < _size; _offset++)\ ++ {\ ++ if(_deltaThermal < thermalThreshold[_direction][_offset])\ ++ {\ ++ if(_offset != 0)\ ++ _offset--;\ ++ break;\ ++ }\ ++ } \ ++ if(_offset >= _size)\ ++ _offset = _size-1;\ ++ } while(0) ++ ++ ++void ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if RTL8812A_SUPPORT ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //if (IS_HARDWARE_TYPE_8812(pDM_Odm->Adapter)) ++ if(pDM_Odm->SupportICType==ODM_RTL8812) ++ ConfigureTxpowerTrack_8812A(pConfig); ++ //else ++#endif ++#endif ++ ++#if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType== ODM_RTL8814A) ++ ConfigureTxpowerTrack_8814A(pConfig); ++#endif ++ ++ ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ ConfigureTxpowerTrack_8188E(pConfig); ++#endif ++} ++ ++#if (RTL8192E_SUPPORT==1) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_92E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte ThermalValue = 0, delta, delta_IQK, delta_LCK, channel, is_decrease, rf_mimo_mode; ++ u1Byte ThermalValue_AVG_count = 0; ++ u1Byte OFDM_min_index = 10; //OFDM BB Swing should be less than +2.5dB, which is required by Arthur ++ s1Byte OFDM_index[2], index ; ++ u4Byte ThermalValue_AVG = 0, Reg0x18; ++ u4Byte i = 0, j = 0, rf; ++ s4Byte value32, CCK_index = 0, ele_A, ele_D, ele_C, X, Y; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ rf_mimo_mode = pDM_Odm->RFType; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode)); ++ ++#ifdef MP_TEST ++ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { ++ channel = priv->pshare->working_channel; ++ if (priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } else ++#endif ++ { ++ channel = (priv->pmib->dot11RFEntry.dot11channel); ++ } ++ ++ ThermalValue = (unsigned char)ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00); //0x42: RF Reg[15:10] 88E ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ ++ switch (rf_mimo_mode) { ++ case MIMO_1T1R: ++ rf = 1; ++ break; ++ case MIMO_2T2R: ++ rf = 2; ++ break; ++ default: ++ rf = 2; ++ break; ++ } ++ ++ //Query OFDM path A default setting Bit[31:21] ++ ele_D = PHY_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskOFDM_D); ++ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { ++ if (ele_D == (OFDMSwingTable_92E[i] >> 22)) { ++ OFDM_index[0] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0])); ++ break; ++ } ++ } ++ ++ //Query OFDM path B default setting ++ if (rf_mimo_mode == MIMO_2T2R) { ++ ele_D = PHY_QueryBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskOFDM_D); ++ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { ++ if (ele_D == (OFDMSwingTable_92E[i] >> 22)) { ++ OFDM_index[1] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1])); ++ break; ++ } ++ } ++ } ++ ++ /* calculate average thermal meter */ ++ { ++ priv->pshare->ThermalValue_AVG_88XX[priv->pshare->ThermalValue_AVG_index_88XX] = ThermalValue; ++ priv->pshare->ThermalValue_AVG_index_88XX++; ++ if (priv->pshare->ThermalValue_AVG_index_88XX == AVG_THERMAL_NUM_88XX) ++ priv->pshare->ThermalValue_AVG_index_88XX = 0; ++ ++ for (i = 0; i < AVG_THERMAL_NUM_88XX; i++) { ++ if (priv->pshare->ThermalValue_AVG_88XX[i]) { ++ ThermalValue_AVG += priv->pshare->ThermalValue_AVG_88XX[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if (ThermalValue_AVG_count) { ++ ThermalValue = (unsigned char)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); ++ } ++ } ++ ++ /* Initialize */ ++ if (!priv->pshare->ThermalValue) { ++ priv->pshare->ThermalValue = priv->pmib->dot11RFEntry.ther; ++ priv->pshare->ThermalValue_IQK = ThermalValue; ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ ++ if (ThermalValue != priv->pshare->ThermalValue) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** START POWER TRACKING ********\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); ++ delta_IQK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_IQK); ++ delta_LCK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_LCK); ++ is_decrease = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 1 : 0); ++ ++#ifdef _TRACKING_TABLE_FILE ++ if (priv->pshare->rf_ft_var.pwr_track_file) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Diff: (%s)%d ==> get index from table : %d)\n", (is_decrease?"-":"+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); ++ ++ if (is_decrease) { ++ for (i = 0; i < rf; i++) { ++ OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); ++ OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); ++ CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); ++ CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1))); ++ } ++ } else { ++ for (i = 0; i < rf; i++) { ++ OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); ++ OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ? OFDM_min_index : OFDM_index[i]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); ++ CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); ++ CCK_index = ((CCK_index < 0 )? 0 : CCK_index); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1))); ++ } ++ } ++ } ++#endif //CFG_TRACKING_TABLE_FILE ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDMSwingTable_92E[(unsigned int)OFDM_index[0]] = %x \n",OFDMSwingTable_92E[(unsigned int)OFDM_index[0]])); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDMSwingTable_92E[(unsigned int)OFDM_index[1]] = %x \n",OFDMSwingTable_92E[(unsigned int)OFDM_index[1]])); ++ ++ //Adujst OFDM Ant_A according to IQK result ++ ele_D = (OFDMSwingTable_92E[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22; ++ X = priv->pshare->RegE94; ++ Y = priv->pshare->RegE9C; ++ ++ if (X != 0) { ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D) >> 8) & 0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D) >> 8) & 0x000003FF; ++ ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; ++ PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D)>>7)&0x01; ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), value32); ++ } else { ++ PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index[0]]); ++ PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), 0x00); ++ } ++ ++ set_CCK_swing_index(priv, CCK_index); ++ ++ if (rf == 2) { ++ ele_D = (OFDMSwingTable_92E[(unsigned int)OFDM_index[1]] & 0xFFC00000) >> 22; ++ X = priv->pshare->RegEB4; ++ Y = priv->pshare->RegEBC; ++ ++ if (X != 0) { ++ if ((X & 0x00000200) != 0) //consider minus ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D) >> 8) & 0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D) >> 8) & 0x00003FF; ++ ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; ++ PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C & 0x000003C0) >> 6; ++ PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D) >> 7) & 0x01; ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), value32); ++ } else { ++ PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index[1]]); ++ PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), 0x00); ++ } ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc80 = 0x%x \n", PHY_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc88 = 0x%x \n", PHY_QueryBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord))); ++ ++ if (delta_IQK > 3) { ++ priv->pshare->ThermalValue_IQK = ThermalValue; ++#ifdef MP_TEST ++ if (!(priv->pshare->rf_ft_var.mp_specific && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET)))) ++#endif ++ PHY_IQCalibrate_8192E(pDM_Odm,false); ++ } ++ ++ if (delta_LCK > 8) { ++ RTL_W8(0x522, 0xff); ++ Reg0x18 = PHY_QueryRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, BIT(15), 1); ++ delay_ms(1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 0); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, Reg0x18); ++ RTL_W8(0x522, 0x0); ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ } ++ ++ //update thermal meter value ++ priv->pshare->ThermalValue = ThermalValue; ++ for (i = 0 ; i < rf ; i++) ++ priv->pshare->OFDM_index[i] = OFDM_index[i]; ++ priv->pshare->CCK_index = CCK_index; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__)); ++} ++#endif ++ ++#if (RTL8814A_SUPPORT ==1) ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, channel, is_increase; ++ u1Byte ThermalValue_AVG_count = 0, p = 0, i = 0; ++ u4Byte ThermalValue_AVG = 0, Reg0x18; ++ u4Byte BBSwingReg[4] = {rA_TxScale_Jaguar,rB_TxScale_Jaguar,rC_TxScale_Jaguar2,rD_TxScale_Jaguar2}; ++ s4Byte ele_D; ++ u4Byte BBswingIdx; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ TXPWRTRACK_CFG c; ++ BOOLEAN bTSSIenable = FALSE; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ pu1Byte deltaSwingTableIdx_TUP_A = NULL, deltaSwingTableIdx_TDOWN_A = NULL; ++ pu1Byte deltaSwingTableIdx_TUP_B = NULL, deltaSwingTableIdx_TDOWN_B = NULL; ++ //for 8814 add by Yu Chen ++ pu1Byte deltaSwingTableIdx_TUP_C = NULL, deltaSwingTableIdx_TDOWN_C = NULL; ++ pu1Byte deltaSwingTableIdx_TUP_D = NULL, deltaSwingTableIdx_TDOWN_D = NULL; ++ ++#ifdef MP_TEST ++ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { ++ channel = priv->pshare->working_channel; ++ if (priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } else ++#endif ++ { ++ channel = (priv->pmib->dot11RFEntry.dot11channel); ++ } ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ pRFCalibrateInfo->DefaultOfdmIndex = priv->pshare->OFDM_index0[ODM_RF_PATH_A]; ++ ++ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); ++ ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) // for 8814 path C & D ++ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_C, (pu1Byte*)&deltaSwingTableIdx_TDOWN_C, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_D, (pu1Byte*)&deltaSwingTableIdx_TDOWN_D); ++ ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ /* Initialize */ ++ if (!pDM_Odm->RFCalibrateInfo.ThermalValue) { ++ pDM_Odm->RFCalibrateInfo.ThermalValue = priv->pmib->dot11RFEntry.ther; ++ } ++ ++ if (!pDM_Odm->RFCalibrateInfo.ThermalValue_LCK) { ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = priv->pmib->dot11RFEntry.ther; ++ } ++ ++ if (!pDM_Odm->RFCalibrateInfo.ThermalValue_IQK) { ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = priv->pmib->dot11RFEntry.ther; ++ } ++ ++ bTSSIenable = (BOOLEAN)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, rRF_TxGainOffset, BIT7); // check TSSI enable ++ ++ //4 Query OFDM BB swing default setting Bit[31:21] ++ for(p = ODM_RF_PATH_A ; p < c.RfPathCount ; p++) ++ { ++ ele_D = ODM_GetBBReg(pDM_Odm, BBSwingReg[p], 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("0x%x:0x%x ([31:21] = 0x%x)\n", BBSwingReg[p], ODM_GetBBReg(pDM_Odm, BBSwingReg[p], bMaskDWord), ele_D)); ++ ++ for (BBswingIdx = 0; BBswingIdx < TXSCALE_TABLE_SIZE; BBswingIdx++) {//4 ++ if (ele_D == TxScalingTable_Jaguar[BBswingIdx]) { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = (u1Byte)BBswingIdx; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("OFDM_index[%d]=%d\n",p, pDM_Odm->RFCalibrateInfo.OFDM_index[p])); ++ break; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("KfreeOffset[%d]=%d\n",p, pRFCalibrateInfo->KfreeOffset[p])); ++ ++ } ++ ++ /* calculate average thermal meter */ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times ++ { ++ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ } ++ ++ //4 Calculate delta, delta_LCK, delta_IQK. ++ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); ++ delta_LCK = RTL_ABS(ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue_LCK); ++ delta_IQK = RTL_ABS(ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue_IQK); ++ is_increase = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 0 : 1); ++ ++ //4 if necessary, do LCK. ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ if (delta_LCK > c.Threshold_IQK) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ if (c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ ++ if (delta_IQK > c.Threshold_IQK) ++ { ++ panic_printk("%s(%d)\n", __FUNCTION__, __LINE__); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= Threshold_IQK(%d)\n", delta_IQK, c.Threshold_IQK)); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; ++ if(c.DoIQK) ++ (*c.DoIQK)(pDM_Odm, TRUE, 0, 0); ++ } ++ ++ if(!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ ++ return; ++ ++ //4 Do Power Tracking ++ ++ if(bTSSIenable == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter PURE TSSI MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TSSI_MODE, p, 0); ++ } ++ else if (ThermalValue != pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n******** START POWER TRACKING ********\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++#ifdef _TRACKING_TABLE_FILE ++ if (priv->pshare->rf_ft_var.pwr_track_file) ++ { ++ if (is_increase) // thermal is higher than base ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } ++ else // thermal is lower than base ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } ++ ++ if (is_increase) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> increse power ---> \n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power --->\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ } ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** END:%s() ********\n", __FUNCTION__)); ++ //update thermal meter value ++ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; ++ ++ } ++} ++ ++#elif(ODM_IC_11AC_SERIES_SUPPORT) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ unsigned char ThermalValue = 0, delta, delta_LCK, channel, is_decrease; ++ unsigned char ThermalValue_AVG_count = 0; ++ unsigned int ThermalValue_AVG = 0, Reg0x18; ++ unsigned int BBSwingReg[4]={0xc1c,0xe1c,0x181c,0x1a1c}; ++ int ele_D, value32; ++ char OFDM_index[2], index; ++ unsigned int i = 0, j = 0, rf_path, max_rf_path =2 ,rf; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ unsigned char OFDM_min_index = 7; //OFDM BB Swing should be less than +2.5dB, which is required by Arthur and Mimic ++ ++#ifdef MP_TEST ++ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { ++ channel = priv->pshare->working_channel; ++ if (priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } else ++#endif ++ { ++ channel = (priv->pmib->dot11RFEntry.dot11channel); ++ } ++ ++#if RTL8881A_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8881A) { ++ max_rf_path = 1; ++ if ((get_bonding_type_8881A() == BOND_8881AM ||get_bonding_type_8881A() == BOND_8881AN) ++ && priv->pshare->rf_ft_var.use_intpa8881A && (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G)) ++ OFDM_min_index = 6; // intPA - upper bond set to +3 dB (base: -2 dB)ot11RFEntry.phyBandSelect == PHY_BAND_2G)) ++ else ++ OFDM_min_index = 10; //OFDM BB Swing should be less than +1dB, which is required by Arthur and Mimic ++ } ++#endif ++ ++ ++ ThermalValue = (unsigned char)PHY_QueryRFReg(priv, RF_PATH_A, 0x42, 0xfc00, 1); //0x42: RF Reg[15:10] 88E ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ ++ //4 Query OFDM BB swing default setting Bit[31:21] ++ for(rf_path = 0 ; rf_path < max_rf_path ; rf_path++){ ++ ele_D = PHY_QueryBBReg(priv, BBSwingReg[rf_path], 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0x%x:0x%x ([31:21] = 0x%x)\n",BBSwingReg[rf_path], PHY_QueryBBReg(priv, BBSwingReg[rf_path], bMaskDWord),ele_D)); ++ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {//4 ++ if (ele_D == OFDMSwingTable_8812[i]) { ++ OFDM_index[rf_path] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[%d]=%d\n",rf_path, OFDM_index[rf_path])); ++ break; ++ } ++ } ++ } ++#if 0 ++ //Query OFDM path A default setting Bit[31:21] ++ ele_D = PHY_QueryBBReg(priv, 0xc1c, 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0xc1c:0x%x ([31:21] = 0x%x)\n", PHY_QueryBBReg(priv, 0xc1c, bMaskDWord),ele_D)); ++ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {//4 ++ if (ele_D == OFDMSwingTable_8812[i]) { ++ OFDM_index[0] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[0]=%d\n", OFDM_index[0])); ++ break; ++ } ++ } ++ //Query OFDM path B default setting ++ if (rf == 2) { ++ ele_D = PHY_QueryBBReg(priv, 0xe1c, 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0xe1c:0x%x ([32:21] = 0x%x)\n", PHY_QueryBBReg(priv, 0xe1c, bMaskDWord),ele_D)); ++ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) { ++ if (ele_D == OFDMSwingTable_8812[i]) { ++ OFDM_index[1] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[1]=%d\n", OFDM_index[1])); ++ break; ++ } ++ } ++ } ++#endif ++ /* Initialize */ ++ if (!priv->pshare->ThermalValue) { ++ priv->pshare->ThermalValue = priv->pmib->dot11RFEntry.ther; ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ ++ /* calculate average thermal meter */ ++ { ++ priv->pshare->ThermalValue_AVG_8812[priv->pshare->ThermalValue_AVG_index_8812] = ThermalValue; ++ priv->pshare->ThermalValue_AVG_index_8812++; ++ if (priv->pshare->ThermalValue_AVG_index_8812 == AVG_THERMAL_NUM_8812) ++ priv->pshare->ThermalValue_AVG_index_8812 = 0; ++ ++ for (i = 0; i < AVG_THERMAL_NUM_8812; i++) { ++ if (priv->pshare->ThermalValue_AVG_8812[i]) { ++ ThermalValue_AVG += priv->pshare->ThermalValue_AVG_8812[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if (ThermalValue_AVG_count) { ++ ThermalValue = (unsigned char)(ThermalValue_AVG / ThermalValue_AVG_count); ++ //printk("AVG Thermal Meter = 0x%x \n", ThermalValue); ++ } ++ } ++ ++ ++ //4 If necessary, do power tracking ++ ++ if(!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ ++ return; ++ ++ if (ThermalValue != priv->pshare->ThermalValue) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** START POWER TRACKING ********\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); ++ delta_LCK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_LCK); ++ is_decrease = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 1 : 0); ++ //if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ { ++#ifdef _TRACKING_TABLE_FILE ++ if (priv->pshare->rf_ft_var.pwr_track_file) { ++ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Diff: (%s)%d ==> get index from table : %d)\n", (is_decrease?"-":"+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); ++ if (is_decrease) { ++ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); ++ OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); ++#if 0// RTL8881A_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8881A){ ++ if(priv->pshare->rf_ft_var.pwrtrk_TxAGC_enable){ ++ if(priv->pshare->AddTxAGC){//TxAGC has been added ++ AddTxPower88XX_AC(priv,0); ++ priv->pshare->AddTxAGC = 0; ++ priv->pshare->AddTxAGC_index = 0; ++ } ++ } ++ } ++#endif ++ } else { ++ ++ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] - get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); ++#if 0// RTL8881A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8881A){ ++ if(priv->pshare->rf_ft_var.pwrtrk_TxAGC_enable){ ++ if(OFDM_index[i] < OFDM_min_index){ ++ priv->pshare->AddTxAGC_index = (OFDM_min_index - OFDM_index[i])/2; // Calculate Remnant TxAGC Value, 2 index for 1 TxAGC ++ AddTxPower88XX_AC(priv,priv->pshare->AddTxAGC_index); ++ priv->pshare->AddTxAGC = 1; //AddTxAGC Flag = 1 ++ OFDM_index[i] = OFDM_min_index; ++ } ++ else{ ++ if(priv->pshare->AddTxAGC){// TxAGC been added ++ priv->pshare->AddTxAGC = 0; ++ priv->pshare->AddTxAGC_index = 0; ++ AddTxPower88XX_AC(priv,0); //minus the added TPI ++ } ++ } ++ } ++ } ++#else ++ OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ? OFDM_min_index : OFDM_index[rf_path]); ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); ++ } ++ } ++ } ++#endif ++ //4 Set new BB swing index ++ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { ++ PHY_SetBBReg(priv, BBSwingReg[rf_path], 0xffe00000, OFDMSwingTable_8812[(unsigned int)OFDM_index[rf_path]]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n",BBSwingReg[rf_path], PHY_QueryBBReg(priv, BBSwingReg[rf_path], 0xffe00000), OFDM_index[rf_path])); ++ } ++ ++ } ++ if (delta_LCK > 8) { ++ RTL_W8(0x522, 0xff); ++ Reg0x18 = PHY_QueryRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, BIT(15), 1); ++ delay_ms(200); // frequency deviation ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 0); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, Reg0x18); ++ #ifdef CONFIG_RTL_8812_SUPPORT ++ if (GET_CHIP_VER(priv)== VERSION_8812E) ++ UpdateBBRFVal8812(priv, priv->pmib->dot11RFEntry.dot11channel); ++ #endif ++ RTL_W8(0x522, 0x0); ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** END:%s() ********\n", __FUNCTION__)); ++ ++ //update thermal meter value ++ priv->pshare->ThermalValue = ThermalValue; ++ for (rf_path = 0; rf_path < max_rf_path; rf_path++) ++ priv->pshare->OFDM_index[rf_path] = OFDM_index[rf_path]; ++ } ++} ++ ++#endif ++ ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if (RTL8814A_SUPPORT == 1) //use this function to do power tracking after 8814 by YuChen ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) { ++ ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2(pDM_Odm); ++ return; ++ } ++#elif ODM_IC_11AC_SERIES_SUPPORT ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries(pDM_Odm); ++ return; ++ } ++#endif ++ ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType==ODM_RTL8192E) { ++ ODM_TXPowerTrackingCallback_ThermalMeter_92E(pDM_Odm); ++ return; ++ } ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++#endif ++ ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; ++ u1Byte ThermalValue_AVG_count = 0; ++ u4Byte ThermalValue_AVG = 0; ++// s4Byte ele_A=0, ele_D, TempCCk, X, value32; ++// s4Byte Y, ele_C=0; ++// s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index; ++// s1Byte deltaPowerIndex = 0; ++ u4Byte i = 0;//, j = 0; ++ BOOLEAN is2T = FALSE; ++// BOOLEAN bInteralPA = FALSE; ++ ++ u1Byte OFDM_max_index = 34, rf = (is2T) ? 2 : 1; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++ u1Byte Indexforchannel = 0;/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/ ++ enum _POWER_DEC_INC { POWER_DEC, POWER_INC }; ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ TXPWRTRACK_CFG c; ++ ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ s1Byte deltaSwingTableIdx[2][index_mapping_NUM_88E] = { ++ // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} ++ {0,0,2,3,4,4,5,6,7,7,8,9,10,10,11}, {0,0,1,2,3,4,4,4,4,5,7,8,9,9,10} ++ }; ++ u1Byte thermalThreshold[2][index_mapping_NUM_88E]={ ++ // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} ++ {0,2,4,6,8,10,12,14,16,18,20,22,24,26,27}, {0,2,4,6,8,10,12,14,16,18,20,22,25,25,25} ++ }; ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++#endif ++ ++ //4 2. Initilization ( 7 steps in total ) ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ ++ pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; ++ ++#if (MP_DRIVER == 1) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. ++ // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. ++ pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(MP_TEST) ++ if ((OPMODE & WIFI_MP_STATE) || pDM_Odm->priv->pshare->rf_ft_var.mp_specific) { ++ if(pDM_Odm->priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>odm_TXPowerTrackingCallback_ThermalMeter_8188E, pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase: %d \n", pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase)); ++/* ++ if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, c.ThermalRegAddr, BIT17 | BIT16, 0x3); ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; ++ return; ++ } ++*/ ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if( ! ThermalValue || ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++#else ++ if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++#endif ++ return; ++ ++ //4 3. Initialize ThermalValues of RFCalibrateInfo ++ ++ if( ! pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; ++ } ++ ++ if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); ++ } ++ ++ //4 4. Calculate average thermal meter ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) ++ { ++ // Give the new thermo value a weighting ++ ThermalValue_AVG += (ThermalValue*4); ++ ++ ThermalValue = (u1Byte)(ThermalValue_AVG / (ThermalValue_AVG_count+4)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); ++ } ++ ++ //4 5. Calculate delta, delta_LCK, delta_IQK. ++ ++ delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); ++ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); ++ ++ //4 6. If necessary, do LCK. ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ /*if((delta_LCK > pHalData->Delta_LCK) && (pHalData->Delta_LCK != 0))*/ ++ if (delta_LCK >= c.Threshold_IQK) { ++ /*Delta temperature is equal to or larger than 20 centigrade.*/ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ ++ //3 7. If necessary, move the index of swing table to adjust Tx power. ++ ++ if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++#else ++ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); ++#endif ++ ++ ++ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(ThermalValue > pHalData->EEPROMThermalMeter) { ++#else ++ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { ++#endif ++ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = deltaSwingTableIdx[POWER_INC][offset]; ++ ++ } else { ++ ++ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = (-1)*deltaSwingTableIdx[POWER_DEC][offset]; ++ } ++ ++ if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast) ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; ++ else ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast; ++ ++ for(i = 0; i < rf; i++) ++ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = pRFCalibrateInfo->BbSwingIdxOfdmBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; ++ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; ++ ++ pRFCalibrateInfo->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; ++ pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A] = pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A]; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'OFDM' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A], pRFCalibrateInfo->BbSwingIdxOfdmBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); ++ ++ //4 7.1 Handle boundary conditions of index. ++ ++ ++ for(i = 0; i < rf; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.OFDM_index[i] > OFDM_max_index) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = OFDM_max_index; ++ } ++ else if (pDM_Odm->RFCalibrateInfo.OFDM_index[i] < 0) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = 0; ++ } ++ } ++ ++ if(pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) ++ pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; ++ else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) ++ pDM_Odm->RFCalibrateInfo.CCK_index = 0; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The thermal meter is unchanged or TxPowerTracking OFF: ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d)\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A], pRFCalibrateInfo->BbSwingIdxOfdmBase)); ++ ++ if (pDM_Odm->RFCalibrateInfo.PowerIndexOffset != 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++ { ++ //4 7.2 Configure the Swing Table to adjust Tx Power. ++ ++ pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. ++ // ++ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital ++ // to increase TX power. Otherwise, EVM will be bad. ++ // ++ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. ++ if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ // ("Temperature Increasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ // pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++ else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ // ("Temperature Decreasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ // pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (ThermalValue > pHalData->EEPROMThermalMeter) ++#else ++ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) ++#endif ++ { ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TXAGC, 0, 0); ++ } ++ else ++ { ++ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, RF_PATH_A, Indexforchannel); ++ if(is2T) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, RF_PATH_B, Indexforchannel); ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; ++ pRFCalibrateInfo->BbSwingIdxOfdmBase = pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A]; ++ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; ++ ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ // if((delta_IQK > pHalData->Delta_IQK) && (pHalData->Delta_IQK != 0)) ++ if ((delta_IQK >= 8)) // Delta temperature is equal to or larger than 20 centigrade. ++ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n")); ++ ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++} ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ ++VOID ++phy_PathAStandBy( ++ IN PADAPTER pAdapter ++ ) ++{ ++ RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x0); ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x808000); ++} ++ ++//1 7. IQK ++//#define MAX_TOLERANCE 5 ++//#define IQK_DELAY_TIME 1 //ms ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_IQK_8192C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN configPathB ++ ) ++{ ++ ++ u4Byte regEAC, regE94, regE9C, regEA4; ++ u1Byte result = 0x00; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); ++ ++ //path-A IQK setting ++ RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); ++ if(pAdapter->interfaceIndex == 0) ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22); ++ } ++ ++ PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); ++ ++ PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : ++ IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); ++ ++ //path-B IQK setting ++ if(configPathB) ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); ++ PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); ++ } ++ ++ //LO calibration setting ++ RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); ++ ++ //One shot, path A LOK & IQK ++ RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); ++ PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); ++ ++ return result; ++ ++ ++} ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_IQK_8192C( ++ IN PADAPTER pAdapter ++ ) ++{ ++ u4Byte regEAC, regEB4, regEBC, regEC4, regECC; ++ u1Byte result = 0x00; ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); ++ ++ //One shot, path B LOK & IQK ++ RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); ++ ++ // delay x ms ++ RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); ++ PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); ++ regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); ++ regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); ++ regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); ++ ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else ++ return result; ++ ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RTPRINT(FINIT, INIT_IQK, ("Path B Rx IQK fail!!\n")); ++ ++ ++ return result; ++ ++} ++ ++VOID ++phy_PathAFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u4Byte Oldval_0, X, TX0_A, reg; ++ s4Byte Y, TX0_C; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ //path B IQK result + 3 ++ if(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType == BAND_ON_5G) ++ Y += 3; ++ ++ TX0_C = (Y * Oldval_0) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0>>7) & 0x1)); ++ ++ if(bTxOnly) ++ { ++ RTPRINT(FINIT, INIT_IQK, ("phy_PathAFillIQKMatrix only Tx OK\n")); ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][3] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg); ++ } ++} ++ ++VOID ++phy_PathBFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u4Byte Oldval_1, X, TX1_A, reg; ++ s4Byte Y, TX1_C; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ if(pHalData->CurrentBandType == BAND_ON_5G) ++ Y += 3; //temp modify for preformance ++ TX1_C = (Y * Oldval_1) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1>>7) & 0x1)); ++ ++ if(bTxOnly) ++ return; ++ ++ reg = result[final_candidate][6]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][7] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ } ++} ++ ++ ++BOOLEAN ++phy_SimularityCompare_92C( ++ IN PADAPTER pAdapter, ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ u4Byte i, j, diff, SimularityBitMap, bound = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); ++ if (diff > MAX_TOLERANCE) ++ { ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1< do IQK again ++*/ ++BOOLEAN ++phy_SimularityCompare( ++ IN PADAPTER pAdapter, ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ return phy_SimularityCompare_92C(pAdapter, result, c1, c2); ++ ++} ++ ++VOID ++phy_IQCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN s4Byte result[][8], ++ IN u1Byte t, ++ IN BOOLEAN is2T ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u4Byte i; ++ u1Byte PathAOK, PathBOK; ++ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ //since 92C & 92D have the different define in IQK_BB_REG ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, /*rFPGA0_RFMOD*/ rCCK0_AFESetting ++ }; ++ ++ u4Byte IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = { //for normal ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rOFDM0_TRxPathEnable, ++ /*rFPGA0_RFMOD*/ rCCK0_AFESetting, rFPGA0_AnalogParameter4, ++ rOFDM0_XAAGCCore1, rOFDM0_XBAGCCore1 ++ }; ++#if MP_DRIVER ++ const u4Byte retryCount = 9; ++#else ++ const u4Byte retryCount = 2; ++#endif ++ //Neil Chen--2011--05--19-- ++ //3 Path Div ++ u1Byte rfPathSwitch=0x0; ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ u4Byte bbvalue; ++ ++ if(t==0) ++ { ++ //bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); ++ // RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C()==>0x%08x\n",bbvalue)); ++ ++ RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++ phy_SaveADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); ++ phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); ++ phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); ++ } ++ ++ phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); ++ ++ if(t==0) ++ { ++ pHalData->bRfPiEnable = (u1Byte)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pHalData->bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++ phy_PIModeSwitch(pAdapter, TRUE); ++ } ++ ++ //MAC settings ++ phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); ++ ++ //PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00); ++ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskDWord, (0x0f000000 | (PHY_QueryBBReg(pAdapter, rCCK0_AFESetting, bMaskDWord))) ); ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ } ++ ++ if(is2T) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); ++ } ++ ++ { ++ //Page B init ++ PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); ++ ++ if(is2T) ++ { ++ PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); ++ } ++ } ++ // IQ calibration setting ++ RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x808000); ++ PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathAOK = phy_PathA_IQK_8192C(pAdapter, is2T); ++ if(PathAOK == 0x03){ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n")); ++ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); ++ ++ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathAOK){ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK failed!!\n")); ++ } ++ ++ if(is2T){ ++ phy_PathAStandBy(pAdapter); ++ ++ // Turn Path B ADDA on ++ phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathBOK = phy_PathB_IQK_8192C(pAdapter); ++ if(PathBOK == 0x03){ ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n")); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK ++ { ++ RTPRINT(FINIT, INIT_IQK, ("Path B Only Tx IQK Success!!\n")); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathBOK){ ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQK failed!!\n")); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ ++ if(t!=0) ++ { ++ if(!pHalData->bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++ phy_PIModeSwitch(pAdapter, FALSE); ++ } ++ ++ // Reload ADDA power saving parameters ++ phy_ReloadADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); ++ ++ // Reload BB parameters ++ phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); ++ ++ /*Restore RX initial gain*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); ++ if (is2T) ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); ++ //load 0xe30 IQC default value ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C() <==\n")); ++ ++} ++ ++ ++VOID ++phy_LCCalibrate92C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++ u1Byte tmpReg; ++ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ //Check continuous TX and Packet TX ++ tmpReg = PlatformEFIORead1Byte(pAdapter, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++ RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++ LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); ++ ++ //4. Set LC calibration begin bit15 ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); ++ ++ delay_ms(100); ++ ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0x00); ++ } ++} ++ ++ ++VOID ++phy_LCCalibrate( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++ phy_LCCalibrate92C(pAdapter, is2T); ++} ++ ++ ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++VOID ++phy_APCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN s1Byte delta, ++ IN BOOLEAN is2T ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ u4Byte regD[PATH_NUM]; ++ u4Byte tmpReg, index, offset, i, apkbound; ++ u1Byte path, pathbound = PATH_NUM; ++ u4Byte BB_backup[APK_BB_REG_NUM]; ++ u4Byte BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++#if 0 ++ u4Byte APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, ++ {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} ++ }; ++#endif ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u4Byte APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u4Byte APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u4Byte APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u4Byte APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u4Byte APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u4Byte APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ s4Byte BB_offset, delta_V, delta_offset; ++ ++#if MP_DRIVER == 1 ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++#endif ++ ++ RTPRINT(FINIT, INIT_IQK, ("==>phy_APCalibrate_8192C() delta %d\n", delta)); ++ RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if MP_DRIVER != 1 ++ return; ++#endif ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++ phy_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ++ ++ if(path == RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ } ++ else if(path == RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++ ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ } ++ ++ //save RF default value ++ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask); ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); ++ } ++ ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ++ } ++ ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); ++ ++ //MAC settings ++ phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); ++ ++ if(path == RF_PATH_A) //Path B to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pHalData->bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x894ae); ++ else ++#endif ++ PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x8992e); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask))); ++ PHY_SetRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask))); ++ PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask))); ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x800000); ++ { ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ delay_ms(3); ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ ++ delay_ms(20); ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ ++ if(path == RF_PATH_A) ++ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000); ++ else ++ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++ phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++ phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]); ++ if(path == RF_PATH_B) ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ RTPRINT(FINIT, INIT_IQK, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == RF_PATH_A) ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++ ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++ } ++ ++ pHalData->bAPKdone = TRUE; ++ ++ RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n")); ++} ++ ++ ++VOID ++PHY_IQCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bReCovery ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ s4Byte result[4][8]; //last is final result ++ u1Byte i, final_candidate, Indexforchannel; ++ BOOLEAN bPathAOK, bPathBOK; ++ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++ ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pAdapter->MptCtx.bStartContTx; ++ bSingleTone = pAdapter->MptCtx.bSingleTone; ++ bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; ++#endif ++ ++ //ignore IQK when continuous Tx ++ if(bStartContTx || bSingleTone || bCarrierSuppression) ++ return; ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ if(pAdapter->bSlaveOfDMSP) ++ return; ++ ++ if (bReCovery) ++ { ++ phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); ++ return; ++ ++ } ++ ++ RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n")); ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = FALSE; ++ bPathBOK = FALSE; ++ is12simular = FALSE; ++ is23simular = FALSE; ++ is13simular = FALSE; ++ ++ AcquireCCKAndRWPageAControl(pAdapter); ++ /*RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate\n"));*/ ++ for (i=0; i<3; i++) ++ { ++ /*For 88C 1T1R*/ ++ phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); ++ ++ if(i == 1) ++ { ++ is12simular = phy_SimularityCompare(pAdapter, result, 0, 1); ++ if(is12simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++ is13simular = phy_SimularityCompare(pAdapter, result, 0, 2); ++ if(is13simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ ++ is23simular = phy_SimularityCompare(pAdapter, result, 1, 2); ++ if(is23simular) ++ final_candidate = 1; ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); ++ ReleaseCCKAndRWPageAControl(pAdapter); ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pHalData->RegE94 = RegE94 = result[final_candidate][0]; ++ pHalData->RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pHalData->RegEB4 = RegEB4 = result[final_candidate][4]; ++ pHalData->RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate)); ++ RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ bPathAOK = bPathBOK = TRUE; ++ } ++ else ++ { ++ RegE94 = RegEB4 = pHalData->RegE94 = pHalData->RegEB4 = 0x100; //X default value ++ RegE9C = RegEBC = pHalData->RegE9C = pHalData->RegEBC = 0x0; //Y default value ++ } ++ ++ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) ++ { ++ if(pHalData->CurrentBandType == BAND_ON_5G) ++ phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++ else ++ phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++ ++ } ++ ++ if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) ++ { ++ if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) ++ { ++ if(pHalData->CurrentBandType == BAND_ON_5G) ++ phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ else ++ phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ } ++ } ++ ++ phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); ++ ++} ++ ++ ++VOID ++PHY_LCCalibrate_8192C( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; ++ PMGNT_INFO pMgntInfoBuddyAdapter; ++ u4Byte timeout = 2000, timecount = 0; ++ PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pAdapter->MptCtx.bStartContTx; ++ bSingleTone = pAdapter->MptCtx.bSingleTone; ++ bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; ++#endif ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++ //ignore LCK when continuous Tx ++ if(bStartContTx || bSingleTone || bCarrierSuppression) ++ return; ++ ++ if(BuddyAdapter != NULL && ++ ((pAdapter->interfaceIndex == 0 && pHalData->CurrentBandType == BAND_ON_2_4G) || ++ (pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType == BAND_ON_5G))) ++ { ++ pMgntInfoBuddyAdapter=&BuddyAdapter->MgntInfo; ++ while(pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout) ++ { ++ delay_ms(50); ++ timecount += 50; ++ } ++ } ++ ++ while(pMgntInfo->bScanInProgress && timecount < timeout) ++ { ++ delay_ms(50); ++ timecount += 50; ++ } ++ ++ pHalData->bLCKInProgress = TRUE; ++ ++ RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType, timecount)); ++ ++ //if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) ++ if(IS_2T2R(pHalData->VersionID)) ++ { ++ phy_LCCalibrate(pAdapter, TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ phy_LCCalibrate(pAdapter, FALSE); ++ } ++ ++ pHalData->bLCKInProgress = FALSE; ++ ++ RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex)); ++ ++ ++} ++ ++VOID ++PHY_APCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN s1Byte delta ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ //default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 ++ return; ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++#if FOR_BRAZIL_PRETEST != 1 ++ if(pHalData->bAPKdone) ++#endif ++ return; ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_APCalibrate_8192C(pAdapter, delta, TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ phy_APCalibrate_8192C(pAdapter, delta, FALSE); ++ } ++} ++ ++ ++#endif ++ ++ ++//3============================================================ ++//3 IQ Calibration ++//3============================================================ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++) ++{ ++ return; ++} ++#if 1//!(DM_ODM_SUPPORT_TYPE & ODM_AP) ++u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; ++ u1Byte place = chnl; ++ ++ ++ if(chnl > 14) ++ { ++ for(place = 14; placeAdapter; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (*pDM_Odm->pIsFcsModeEnable) ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) ++ return; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) ++ return; ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->bLinked) { ++ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { ++ pDM_Odm->preChannel = *pDM_Odm->pChannel; ++ pDM_Odm->LinkedInterval = 0; ++ } ++ ++ if (pDM_Odm->LinkedInterval < 3) ++ pDM_Odm->LinkedInterval++; ++ ++ if (pDM_Odm->LinkedInterval == 2) { ++ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ ++ /*Open it verified by James 20130715*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PHY_IQCalibrate_8821A(pDM_Odm, FALSE); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHY_IQCalibrate(Adapter, FALSE); ++#else ++ PHY_IQCalibrate_8821A(Adapter, FALSE); ++#endif ++ } ++ } else ++ pDM_Odm->LinkedInterval = 0; ++#endif ++} ++ ++void phydm_rf_init(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ odm_TXPowerTrackingInit(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ PHY_IQCalibrate_8814A_Init(pDM_Odm); ++#endif ++#endif ++ ++} ++ ++void phydm_rf_watchdog(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_TXPowerTrackingCheck(pDM_Odm); ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ odm_IQCalibrate(pDM_Odm); ++#endif ++} diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ap.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ap.h new file mode 100644 -index 000000000..4cacdb54a +index 0000000..3fdbc72 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ap.h @@ -0,0 +1,162 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ #ifndef __HAL_PHY_RF_H__ -+ #define __HAL_PHY_RF_H__ -+ -+#include "phydm_powertracking_ap.h" -+#if (RTL8814A_SUPPORT == 1) -+#include "rtl8814a/phydm_iqk_8814a.h" -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+#include "rtl8822b/phydm_iqk_8822b.h" -+#endif -+ -+ -+typedef enum _PWRTRACK_CONTROL_METHOD { -+ BBSWING, -+ TXAGC, -+ MIX_MODE, -+ TSSI_MODE -+} PWRTRACK_METHOD; -+ -+typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte); -+typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); -+typedef VOID (*FuncLCK)(PVOID); -+ //refine by YuChen for 8814A -+typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); -+typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); -+ -+typedef struct _TXPWRTRACK_CFG { -+ u1Byte SwingTableSize_CCK; -+ u1Byte SwingTableSize_OFDM; -+ u1Byte Threshold_IQK; -+ u1Byte Threshold_DPK; -+ u1Byte AverageThermalNum; -+ u1Byte RfPathCount; -+ u4Byte ThermalRegAddr; -+ FuncSetPwr ODM_TxPwrTrackSetPwr; -+ FuncIQK DoIQK; -+ FuncLCK PHY_LCCalibrate; -+ FuncSwing GetDeltaSwingTable; -+ FuncSwing8814only GetDeltaSwingTable8814only; -+} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; -+ -+VOID -+ConfigureTxpowerTrack( -+ IN PVOID pDM_VOID, -+ OUT PTXPWRTRACK_CFG pConfig -+ ); -+ -+ -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ); -+ -+#if (RTL8192E_SUPPORT==1) -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter_92E( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ); -+#endif -+ -+#if (RTL8814A_SUPPORT == 1) -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ); -+ -+#elif ODM_IC_11AC_SERIES_SUPPORT -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ); -+#endif -+ -+#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M ) -+ -+ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#define MAX_TOLERANCE 5 -+#define IQK_DELAY_TIME 1 //ms -+ -+ // -+// BB/MAC/RF other monitor API -+// -+ -+void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, -+ IN BOOLEAN bEnableMonitorMode ); -+ -+// -+// IQ calibrate -+// -+void -+PHY_IQCalibrate_8192C( IN PADAPTER pAdapter, -+ IN BOOLEAN bReCovery); -+ -+// -+// LC calibrate -+// -+void -+PHY_LCCalibrate_8192C( IN PADAPTER pAdapter); -+ -+// -+// AP calibrate -+// -+void -+PHY_APCalibrate_8192C( IN PADAPTER pAdapter, -+ IN s1Byte delta); -+#endif -+ -+#define ODM_TARGET_CHNL_NUM_2G_5G 59 -+ -+ -+VOID -+ODM_ResetIQKResult( -+ IN PVOID pDM_VOID -+); -+u1Byte -+ODM_GetRightChnlPlaceforIQK( -+ IN u1Byte chnl -+); -+ -+void phydm_rf_init(IN PVOID pDM_VOID); -+void phydm_rf_watchdog(IN PVOID pDM_VOID); -+ -+#endif // #ifndef __HAL_PHY_RF_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #ifndef __HAL_PHY_RF_H__ ++ #define __HAL_PHY_RF_H__ ++ ++#include "phydm_powertracking_ap.h" ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++#if (RTL8822B_SUPPORT == 1) ++#include "rtl8822b/phydm_iqk_8822b.h" ++#endif ++ ++ ++typedef enum _PWRTRACK_CONTROL_METHOD { ++ BBSWING, ++ TXAGC, ++ MIX_MODE, ++ TSSI_MODE ++} PWRTRACK_METHOD; ++ ++typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte); ++typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); ++typedef VOID (*FuncLCK)(PVOID); ++ //refine by YuChen for 8814A ++typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++ ++typedef struct _TXPWRTRACK_CFG { ++ u1Byte SwingTableSize_CCK; ++ u1Byte SwingTableSize_OFDM; ++ u1Byte Threshold_IQK; ++ u1Byte Threshold_DPK; ++ u1Byte AverageThermalNum; ++ u1Byte RfPathCount; ++ u4Byte ThermalRegAddr; ++ FuncSetPwr ODM_TxPwrTrackSetPwr; ++ FuncIQK DoIQK; ++ FuncLCK PHY_LCCalibrate; ++ FuncSwing GetDeltaSwingTable; ++ FuncSwing8814only GetDeltaSwingTable8814only; ++} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; ++ ++VOID ++ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ); ++ ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++#if (RTL8192E_SUPPORT==1) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_92E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++#endif ++ ++#if (RTL8814A_SUPPORT == 1) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++#elif ODM_IC_11AC_SERIES_SUPPORT ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++#endif ++ ++#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M ) ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++ // ++// BB/MAC/RF other monitor API ++// ++ ++void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++// ++// IQ calibrate ++// ++void ++PHY_IQCalibrate_8192C( IN PADAPTER pAdapter, ++ IN BOOLEAN bReCovery); ++ ++// ++// LC calibrate ++// ++void ++PHY_LCCalibrate_8192C( IN PADAPTER pAdapter); ++ ++// ++// AP calibrate ++// ++void ++PHY_APCalibrate_8192C( IN PADAPTER pAdapter, ++ IN s1Byte delta); ++#endif ++ ++#define ODM_TARGET_CHNL_NUM_2G_5G 59 ++ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++); ++u1Byte ++ODM_GetRightChnlPlaceforIQK( ++ IN u1Byte chnl ++); ++ ++void phydm_rf_init(IN PVOID pDM_VOID); ++void phydm_rf_watchdog(IN PVOID pDM_VOID); ++ ++#endif // #ifndef __HAL_PHY_RF_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ce.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ce.c new file mode 100644 -index 000000000..8afa89706 +index 0000000..adad98e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ce.c @@ -0,0 +1,711 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+ -+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ -+ do {\ -+ for(_offset = 0; _offset < _size; _offset++)\ -+ {\ -+ if(_deltaThermal < thermalThreshold[_direction][_offset])\ -+ {\ -+ if(_offset != 0)\ -+ _offset--;\ -+ break;\ -+ }\ -+ } \ -+ if(_offset >= _size)\ -+ _offset = _size-1;\ -+ } while(0) -+ -+void ConfigureTxpowerTrack( -+ IN PVOID pDM_VOID, -+ OUT PTXPWRTRACK_CFG pConfig -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+#if RTL8192E_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8192E) -+ ConfigureTxpowerTrack_8192E(pConfig); -+#endif -+#if RTL8821A_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8821) -+ ConfigureTxpowerTrack_8821A(pConfig); -+#endif -+#if RTL8812A_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8812) -+ ConfigureTxpowerTrack_8812A(pConfig); -+#endif -+#if RTL8188E_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8188E) -+ ConfigureTxpowerTrack_8188E(pConfig); -+#endif -+ -+#if RTL8723B_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8723B) -+ ConfigureTxpowerTrack_8723B(pConfig); -+#endif -+ -+#if RTL8814A_SUPPORT -+ if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ ConfigureTxpowerTrack_8814A(pConfig); -+#endif -+ -+#if RTL8703B_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8703B) -+ ConfigureTxpowerTrack_8703B(pConfig); -+#endif -+ -+#if RTL8188F_SUPPORT -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ ConfigureTxpowerTrack_8188F(pConfig); -+#endif -+} -+ -+//====================================================================== -+// <20121113, Kordan> This function should be called when TxAGC changed. -+// Otherwise the previous compensation is gone, because we record the -+// delta of temperature between two TxPowerTracking watch dogs. -+// -+// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still -+// need to call this function. -+//====================================================================== -+VOID -+ODM_ClearTxPowerTrackingState( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); -+ u1Byte p = 0; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; -+ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; -+ pDM_Odm->RFCalibrateInfo.CCK_index = 0; -+ -+ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) -+ { -+ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ -+ pRFCalibrateInfo->PowerIndexOffset[p] = 0; -+ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; -+ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; -+ pRFCalibrateInfo->PowerIndexOffset[p] = 0; -+ -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; /* Initial Mix mode power tracking*/ -+ pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0; -+ pRFCalibrateInfo->KfreeOffset[p] = 0; -+ } -+ -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; /*Initial at Modify Tx Scaling Mode*/ -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathB = FALSE; /*Initial at Modify Tx Scaling Mode*/ -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathC = FALSE; /*Initial at Modify Tx Scaling Mode*/ -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathD = FALSE; /*Initial at Modify Tx Scaling Mode*/ -+ pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; -+ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; -+ -+ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo -+ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo -+} -+ -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PDM_ODM_T pDM_Odm -+#else -+ IN PADAPTER Adapter -+#endif -+ ) -+{ -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+ #endif -+#endif -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; -+ s1Byte diff_DPK[4] = {0}; -+ u1Byte ThermalValue_AVG_count = 0; -+ u4Byte ThermalValue_AVG = 0; -+ -+ u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur -+ u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel) -+ BOOLEAN bTSSIenable = FALSE; -+ -+ TXPWRTRACK_CFG c; -+ -+ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. -+ pu1Byte deltaSwingTableIdx_TUP_A; -+ pu1Byte deltaSwingTableIdx_TDOWN_A; -+ pu1Byte deltaSwingTableIdx_TUP_B; -+ pu1Byte deltaSwingTableIdx_TDOWN_B; -+ /*for 8814 add by Yu Chen*/ -+ pu1Byte deltaSwingTableIdx_TUP_C; -+ pu1Byte deltaSwingTableIdx_TDOWN_C; -+ pu1Byte deltaSwingTableIdx_TUP_D; -+ pu1Byte deltaSwingTableIdx_TDOWN_D; -+ -+ //4 2. Initilization ( 7 steps in total ) -+ -+ ConfigureTxpowerTrack(pDM_Odm, &c); -+ -+ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, -+ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) /*for 8814 path C & D*/ -+ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte *)&deltaSwingTableIdx_TUP_C, (pu1Byte *)&deltaSwingTableIdx_TDOWN_C, -+ (pu1Byte *)&deltaSwingTableIdx_TUP_D, (pu1Byte *)&deltaSwingTableIdx_TDOWN_D); -+ -+ -+ pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug -+ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; -+ -+#if (MP_DRIVER == 1) -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (pDM_Odm->mp_mode == TRUE) -+#endif -+ // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. -+ pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("===>ODM_TXPowerTrackingCallback_ThermalMeter Start\n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n", -+ pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("pDM_Odm->RFCalibrateInfo.TxPowerTrackControl %d, pHalData->EEPROMThermalMeter %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, pHalData->EEPROMThermalMeter)); -+ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E -+ if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl || pHalData->EEPROMThermalMeter == 0 || -+ pHalData->EEPROMThermalMeter == 0xFF) -+ return; -+ -+ -+ //4 3. Initialize ThermalValues of RFCalibrateInfo -+ -+ if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); -+ } -+ -+ //4 4. Calculate average thermal meter -+ -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; -+ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum -+ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; -+ -+ for(i = 0; i < c.AverageThermalNum; i++) -+ { -+ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) -+ { -+ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; -+ ThermalValue_AVG_count++; -+ } -+ } -+ -+ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times -+ { -+ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ } -+ -+ //4 5. Calculate delta, delta_LCK, delta_IQK. -+ -+ //"delta" here is used to determine whether thermal value changes or not. -+ delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); -+ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); -+ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); -+ -+ if (pDM_Odm->RFCalibrateInfo.ThermalValue_IQK == 0xff) { /*no PG, use thermal value for IQK*/ -+ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; -+ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n")); -+ } -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pDM_Odm->RFCalibrateInfo.DpkThermal[p]; -+ -+ /*4 6. If necessary, do LCK.*/ -+ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { -+ -+ if (pDM_Odm->RFCalibrateInfo.ThermalValue_LCK == 0xff) { -+ /*no PG , do LCK at initial status*/ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n")); -+ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; -+ if (c.PHY_LCCalibrate) -+ (*c.PHY_LCCalibrate)(pDM_Odm); -+ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK)); -+ /*DBG_871X("(delta, delta_LCK, delta_IQK) = (%d, %d, %d), %d\n", delta, delta_LCK, delta_IQK, c.Threshold_IQK);*/ -+ -+ /* 4 6. If necessary, do LCK.*/ -+ -+ if (delta_LCK >= c.Threshold_IQK) { -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); -+ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; -+ if (c.PHY_LCCalibrate) -+ (*c.PHY_LCCalibrate)(pDM_Odm); -+ } -+ } -+ //3 7. If necessary, move the index of swing table to adjust Tx power. -+ -+ if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) -+ { -+ //"delta" here is used to record the absolute value of differrence. -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); -+#else -+ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); -+#endif -+ if (delta >= TXPWR_TRACK_TABLE_SIZE) -+ delta = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(ThermalValue > pHalData->EEPROMThermalMeter) { -+#else -+ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { -+#endif -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p]; /* recording power index offset */ -+ switch (p) { -+ case ODM_RF_PATH_B: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); -+ -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A])); -+ -+ -+ break; -+ -+ case ODM_RF_PATH_C: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); -+ -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_D: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); -+ -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); -+ -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ } -+ } -+ } else { -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p]; /* recording poer index offset */ -+ switch (p) { -+ case ODM_RF_PATH_B: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_C: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_D: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; /* Record delta swing for mix mode power tracking */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ } -+ } -+ } -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p)); -+ if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]) /* If Thermal value changes but lookup table value still the same */ -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; -+ else -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]; /* Power Index Diff between 2 times Power Tracking */ -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p])); -+ -+ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; -+ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; -+ -+ pRFCalibrateInfo->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; -+ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pDM_Odm->RFCalibrateInfo.OFDM_index[p]; -+ -+ -+ -+ /* *************Print BB Swing Base and Index Offset************* */ -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); -+ -+ //4 7.1 Handle boundary conditions of index. -+ -+ if(pDM_Odm->RFCalibrateInfo.OFDM_index[p] > c.SwingTableSize_OFDM-1) -+ { -+ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = c.SwingTableSize_OFDM-1; -+ } -+ else if (pDM_Odm->RFCalibrateInfo.OFDM_index[p] < OFDM_min_index) -+ { -+ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = OFDM_min_index; -+ } -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("\n\n========================================================================================================\n")); -+ if(pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) -+ pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; -+ else if (pDM_Odm->RFCalibrateInfo.CCK_index <= 0) -+ pDM_Odm->RFCalibrateInfo.CCK_index = 0; -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d\n", -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", -+ pDM_Odm->RFCalibrateInfo.CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); /*Print Swing base & current*/ -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n", -+ pDM_Odm->RFCalibrateInfo.OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p])); -+ } -+ -+ if ((pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A] != 0 || -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B] != 0 || -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_C] != 0 || -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_D] != 0) && -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) -+ { -+ //4 7.2 Configure the Swing Table to adjust Tx Power. -+ -+ pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. -+ // -+ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital -+ // to increase TX power. Otherwise, EVM will be bad. -+ // -+ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. -+ if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) -+ { -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); -+ } -+ } -+ else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature -+ { -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); -+ } -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (ThermalValue > pHalData->EEPROMThermalMeter) -+#else -+ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) -+#endif -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || -+ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || -+ pDM_Odm->SupportICType == ODM_RTL8822B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); -+ } -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || -+ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || -+ pDM_Odm->SupportICType == ODM_RTL8822B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); -+ } -+ -+ } -+ -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; /*Record last time Power Tracking result as base.*/ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p]; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("pDM_Odm->RFCalibrateInfo.ThermalValue = %d ThermalValue= %d\n", pDM_Odm->RFCalibrateInfo.ThermalValue, ThermalValue)); -+ -+ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; /*Record last Power Tracking Thermal Value*/ -+ -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ if (!IS_HARDWARE_TYPE_8723B(Adapter) && !IS_HARDWARE_TYPE_8192E(Adapter) && !IS_HARDWARE_TYPE_8703B(Adapter)) { -+ /* Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ -+ if (delta_IQK >= c.Threshold_IQK) { -+ if (!pDM_Odm->RFCalibrateInfo.bIQKInProgress) -+ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); -+ } -+ } -+ if (!(pDM_Odm->SupportICType & ODM_RTL8814A)) { -+ if (pDM_Odm->RFCalibrateInfo.DpkThermal[ODM_RF_PATH_A] != 0) { -+ if (diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK) { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK)); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) { -+ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK); -+ -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } -+ } -+ if (pDM_Odm->RFCalibrateInfo.DpkThermal[ODM_RF_PATH_B] != 0) { -+ if (diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK) { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK)); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) { -+ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK); -+ -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } -+ } -+ } -+ -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===ODM_TXPowerTrackingCallback_ThermalMeter End\n")); -+ -+ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; -+} -+ -+ -+//3============================================================ -+//3 IQ Calibration -+//3============================================================ -+ -+VOID -+ODM_ResetIQKResult( -+ IN PVOID pDM_VOID -+) -+{ -+ return; -+ -+} -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) -+{ -+ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = -+ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; -+ u1Byte place = chnl; -+ -+ -+ if(chnl > 14) -+ { -+ for(place = 14; placeAdapter; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (*pDM_Odm->pIsFcsModeEnable) -+ return; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) -+ return; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) -+ return; -+#endif -+#endif -+ -+#if (RTL8821A_SUPPORT == 1) -+ if (pDM_Odm->bLinked) { -+ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { -+ pDM_Odm->preChannel = *pDM_Odm->pChannel; -+ pDM_Odm->LinkedInterval = 0; -+ } -+ -+ if (pDM_Odm->LinkedInterval < 3) -+ pDM_Odm->LinkedInterval++; -+ -+ if (pDM_Odm->LinkedInterval == 2) { -+ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ -+ /*Open it verified by James 20130715*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ /*Change channel will do IQK , cancel duplicate doIQK by YiWei*/ -+ /*PHY_IQCalibrate_8821A(pDM_Odm, FALSE);*/ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHY_IQCalibrate(Adapter, FALSE); -+#else -+ PHY_IQCalibrate_8821A(Adapter, FALSE); -+#endif -+ } -+ } else -+ pDM_Odm->LinkedInterval = 0; -+#endif -+} -+ -+void phydm_rf_init(IN PVOID pDM_VOID) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ odm_TXPowerTrackingInit(pDM_Odm); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ ODM_ClearTxPowerTrackingState(pDM_Odm); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ PHY_IQCalibrate_8814A_Init(pDM_Odm); -+#endif -+#endif -+ -+} -+ -+void phydm_rf_watchdog(IN PVOID pDM_VOID) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ ODM_TXPowerTrackingCheck(pDM_Odm); -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ odm_IQCalibrate(pDM_Odm); -+#endif -+} ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ ++ do {\ ++ for(_offset = 0; _offset < _size; _offset++)\ ++ {\ ++ if(_deltaThermal < thermalThreshold[_direction][_offset])\ ++ {\ ++ if(_offset != 0)\ ++ _offset--;\ ++ break;\ ++ }\ ++ } \ ++ if(_offset >= _size)\ ++ _offset = _size-1;\ ++ } while(0) ++ ++void ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++#if RTL8192E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ ConfigureTxpowerTrack_8192E(pConfig); ++#endif ++#if RTL8821A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8821) ++ ConfigureTxpowerTrack_8821A(pConfig); ++#endif ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8812) ++ ConfigureTxpowerTrack_8812A(pConfig); ++#endif ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ ConfigureTxpowerTrack_8188E(pConfig); ++#endif ++ ++#if RTL8723B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ ConfigureTxpowerTrack_8723B(pConfig); ++#endif ++ ++#if RTL8814A_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ ConfigureTxpowerTrack_8814A(pConfig); ++#endif ++ ++#if RTL8703B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8703B) ++ ConfigureTxpowerTrack_8703B(pConfig); ++#endif ++ ++#if RTL8188F_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ ConfigureTxpowerTrack_8188F(pConfig); ++#endif ++} ++ ++//====================================================================== ++// <20121113, Kordan> This function should be called when TxAGC changed. ++// Otherwise the previous compensation is gone, because we record the ++// delta of temperature between two TxPowerTracking watch dogs. ++// ++// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still ++// need to call this function. ++//====================================================================== ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ u1Byte p = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; ++ pDM_Odm->RFCalibrateInfo.CCK_index = 0; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; /* Initial Mix mode power tracking*/ ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathB = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathC = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathD = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo ++} ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; ++ s1Byte diff_DPK[4] = {0}; ++ u1Byte ThermalValue_AVG_count = 0; ++ u4Byte ThermalValue_AVG = 0; ++ ++ u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++ u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel) ++ BOOLEAN bTSSIenable = FALSE; ++ ++ TXPWRTRACK_CFG c; ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ pu1Byte deltaSwingTableIdx_TUP_A; ++ pu1Byte deltaSwingTableIdx_TDOWN_A; ++ pu1Byte deltaSwingTableIdx_TUP_B; ++ pu1Byte deltaSwingTableIdx_TDOWN_B; ++ /*for 8814 add by Yu Chen*/ ++ pu1Byte deltaSwingTableIdx_TUP_C; ++ pu1Byte deltaSwingTableIdx_TDOWN_C; ++ pu1Byte deltaSwingTableIdx_TUP_D; ++ pu1Byte deltaSwingTableIdx_TDOWN_D; ++ ++ //4 2. Initilization ( 7 steps in total ) ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ ++ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) /*for 8814 path C & D*/ ++ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte *)&deltaSwingTableIdx_TUP_C, (pu1Byte *)&deltaSwingTableIdx_TDOWN_C, ++ (pu1Byte *)&deltaSwingTableIdx_TUP_D, (pu1Byte *)&deltaSwingTableIdx_TDOWN_D); ++ ++ ++ pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; ++ ++#if (MP_DRIVER == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pDM_Odm->mp_mode == TRUE) ++#endif ++ // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. ++ pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("===>ODM_TXPowerTrackingCallback_ThermalMeter Start\n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n", ++ pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pDM_Odm->RFCalibrateInfo.TxPowerTrackControl %d, pHalData->EEPROMThermalMeter %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, pHalData->EEPROMThermalMeter)); ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++ if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl || pHalData->EEPROMThermalMeter == 0 || ++ pHalData->EEPROMThermalMeter == 0xFF) ++ return; ++ ++ ++ //4 3. Initialize ThermalValues of RFCalibrateInfo ++ ++ if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); ++ } ++ ++ //4 4. Calculate average thermal meter ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times ++ { ++ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ } ++ ++ //4 5. Calculate delta, delta_LCK, delta_IQK. ++ ++ //"delta" here is used to determine whether thermal value changes or not. ++ delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); ++ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); ++ ++ if (pDM_Odm->RFCalibrateInfo.ThermalValue_IQK == 0xff) { /*no PG, use thermal value for IQK*/ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; ++ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n")); ++ } ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pDM_Odm->RFCalibrateInfo.DpkThermal[p]; ++ ++ /*4 6. If necessary, do LCK.*/ ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ ++ if (pDM_Odm->RFCalibrateInfo.ThermalValue_LCK == 0xff) { ++ /*no PG , do LCK at initial status*/ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n")); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ if (c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK)); ++ /*DBG_871X("(delta, delta_LCK, delta_IQK) = (%d, %d, %d), %d\n", delta, delta_LCK, delta_IQK, c.Threshold_IQK);*/ ++ ++ /* 4 6. If necessary, do LCK.*/ ++ ++ if (delta_LCK >= c.Threshold_IQK) { ++ /* Delta temperature is equal to or larger than 20 centigrade.*/ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ if (c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ //3 7. If necessary, move the index of swing table to adjust Tx power. ++ ++ if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++ { ++ //"delta" here is used to record the absolute value of differrence. ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++#else ++ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); ++#endif ++ if (delta >= TXPWR_TRACK_TABLE_SIZE) ++ delta = TXPWR_TRACK_TABLE_SIZE - 1; ++ ++ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(ThermalValue > pHalData->EEPROMThermalMeter) { ++#else ++ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { ++#endif ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p]; /* recording power index offset */ ++ switch (p) { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A])); ++ ++ ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } else { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p]; /* recording poer index offset */ ++ switch (p) { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p)); ++ if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]) /* If Thermal value changes but lookup table value still the same */ ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; ++ else ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]; /* Power Index Diff between 2 times Power Tracking */ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p])); ++ ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; ++ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; ++ ++ pRFCalibrateInfo->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pDM_Odm->RFCalibrateInfo.OFDM_index[p]; ++ ++ ++ ++ /* *************Print BB Swing Base and Index Offset************* */ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); ++ ++ //4 7.1 Handle boundary conditions of index. ++ ++ if(pDM_Odm->RFCalibrateInfo.OFDM_index[p] > c.SwingTableSize_OFDM-1) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = c.SwingTableSize_OFDM-1; ++ } ++ else if (pDM_Odm->RFCalibrateInfo.OFDM_index[p] < OFDM_min_index) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = OFDM_min_index; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n========================================================================================================\n")); ++ if(pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) ++ pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; ++ else if (pDM_Odm->RFCalibrateInfo.CCK_index <= 0) ++ pDM_Odm->RFCalibrateInfo.CCK_index = 0; ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d\n", ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", ++ pDM_Odm->RFCalibrateInfo.CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); /*Print Swing base & current*/ ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n", ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p])); ++ } ++ ++ if ((pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A] != 0 || ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B] != 0 || ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_C] != 0 || ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_D] != 0) && ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) ++ { ++ //4 7.2 Configure the Swing Table to adjust Tx Power. ++ ++ pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. ++ // ++ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital ++ // to increase TX power. Otherwise, EVM will be bad. ++ // ++ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. ++ if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++ } ++ else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (ThermalValue > pHalData->EEPROMThermalMeter) ++#else ++ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || ++ pDM_Odm->SupportICType == ODM_RTL8822B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || ++ pDM_Odm->SupportICType == ODM_RTL8822B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; /*Record last time Power Tracking result as base.*/ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p]; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pDM_Odm->RFCalibrateInfo.ThermalValue = %d ThermalValue= %d\n", pDM_Odm->RFCalibrateInfo.ThermalValue, ThermalValue)); ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; /*Record last Power Tracking Thermal Value*/ ++ ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if (!IS_HARDWARE_TYPE_8723B(Adapter) && !IS_HARDWARE_TYPE_8192E(Adapter) && !IS_HARDWARE_TYPE_8703B(Adapter)) { ++ /* Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ ++ if (delta_IQK >= c.Threshold_IQK) { ++ if (!pDM_Odm->RFCalibrateInfo.bIQKInProgress) ++ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); ++ } ++ } ++ if (!(pDM_Odm->SupportICType & ODM_RTL8814A)) { ++ if (pDM_Odm->RFCalibrateInfo.DpkThermal[ODM_RF_PATH_A] != 0) { ++ if (diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK); ++ ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ if (pDM_Odm->RFCalibrateInfo.DpkThermal[ODM_RF_PATH_B] != 0) { ++ if (diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK); ++ ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ } ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===ODM_TXPowerTrackingCallback_ThermalMeter End\n")); ++ ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++} ++ ++ ++//3============================================================ ++//3 IQ Calibration ++//3============================================================ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++) ++{ ++ return; ++ ++} ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; ++ u1Byte place = chnl; ++ ++ ++ if(chnl > 14) ++ { ++ for(place = 14; placeAdapter; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (*pDM_Odm->pIsFcsModeEnable) ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) ++ return; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) ++ return; ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->bLinked) { ++ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { ++ pDM_Odm->preChannel = *pDM_Odm->pChannel; ++ pDM_Odm->LinkedInterval = 0; ++ } ++ ++ if (pDM_Odm->LinkedInterval < 3) ++ pDM_Odm->LinkedInterval++; ++ ++ if (pDM_Odm->LinkedInterval == 2) { ++ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ ++ /*Open it verified by James 20130715*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ /*Change channel will do IQK , cancel duplicate doIQK by YiWei*/ ++ /*PHY_IQCalibrate_8821A(pDM_Odm, FALSE);*/ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHY_IQCalibrate(Adapter, FALSE); ++#else ++ PHY_IQCalibrate_8821A(Adapter, FALSE); ++#endif ++ } ++ } else ++ pDM_Odm->LinkedInterval = 0; ++#endif ++} ++ ++void phydm_rf_init(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ odm_TXPowerTrackingInit(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ PHY_IQCalibrate_8814A_Init(pDM_Odm); ++#endif ++#endif ++ ++} ++ ++void phydm_rf_watchdog(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_TXPowerTrackingCheck(pDM_Odm); ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ odm_IQCalibrate(pDM_Odm); ++#endif ++} diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ce.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ce.h new file mode 100644 -index 000000000..2e5f22355 +index 0000000..78333d6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_ce.h @@ -0,0 +1,106 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ #ifndef __HAL_PHY_RF_H__ -+ #define __HAL_PHY_RF_H__ -+ -+/*#include "phydm_kfree.h"*/ -+#if (RTL8814A_SUPPORT == 1) -+#include "rtl8814a/phydm_iqk_8814a.h" -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+#include "rtl8822b/phydm_iqk_8822b.h" -+#endif -+#include "phydm_powertracking_ce.h" -+ -+ -+typedef enum _SPUR_CAL_METHOD { -+ PLL_RESET, -+ AFE_PHASE_SEL -+} SPUR_CAL_METHOD; -+ -+typedef enum _PWRTRACK_CONTROL_METHOD { -+ BBSWING, -+ TXAGC, -+ MIX_MODE, -+ TSSI_MODE -+} PWRTRACK_METHOD; -+ -+typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte); -+typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); -+typedef VOID (*FuncLCK)(PVOID); -+typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); -+typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); -+ -+typedef struct _TXPWRTRACK_CFG { -+ u1Byte SwingTableSize_CCK; -+ u1Byte SwingTableSize_OFDM; -+ u1Byte Threshold_IQK; -+ u1Byte Threshold_DPK; -+ u1Byte AverageThermalNum; -+ u1Byte RfPathCount; -+ u4Byte ThermalRegAddr; -+ FuncSetPwr ODM_TxPwrTrackSetPwr; -+ FuncIQK DoIQK; -+ FuncLCK PHY_LCCalibrate; -+ FuncSwing GetDeltaSwingTable; -+ FuncSwing8814only GetDeltaSwingTable8814only; -+} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; -+ -+void ConfigureTxpowerTrack( -+ IN PVOID pDM_VOID, -+ OUT PTXPWRTRACK_CFG pConfig -+ ); -+ -+ -+VOID -+ODM_ClearTxPowerTrackingState( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PVOID pDM_VOID -+#else -+ IN PADAPTER Adapter -+#endif -+ ); -+ -+ -+ -+#define ODM_TARGET_CHNL_NUM_2G_5G 59 -+ -+ -+VOID -+ODM_ResetIQKResult( -+ IN PVOID pDM_VOID -+); -+u1Byte -+ODM_GetRightChnlPlaceforIQK( -+ IN u1Byte chnl -+); -+ -+void phydm_rf_init( IN PVOID pDM_VOID); -+void phydm_rf_watchdog( IN PVOID pDM_VOID); -+ -+#endif // #ifndef __HAL_PHY_RF_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #ifndef __HAL_PHY_RF_H__ ++ #define __HAL_PHY_RF_H__ ++ ++/*#include "phydm_kfree.h"*/ ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++#if (RTL8822B_SUPPORT == 1) ++#include "rtl8822b/phydm_iqk_8822b.h" ++#endif ++#include "phydm_powertracking_ce.h" ++ ++ ++typedef enum _SPUR_CAL_METHOD { ++ PLL_RESET, ++ AFE_PHASE_SEL ++} SPUR_CAL_METHOD; ++ ++typedef enum _PWRTRACK_CONTROL_METHOD { ++ BBSWING, ++ TXAGC, ++ MIX_MODE, ++ TSSI_MODE ++} PWRTRACK_METHOD; ++ ++typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte); ++typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); ++typedef VOID (*FuncLCK)(PVOID); ++typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++ ++typedef struct _TXPWRTRACK_CFG { ++ u1Byte SwingTableSize_CCK; ++ u1Byte SwingTableSize_OFDM; ++ u1Byte Threshold_IQK; ++ u1Byte Threshold_DPK; ++ u1Byte AverageThermalNum; ++ u1Byte RfPathCount; ++ u4Byte ThermalRegAddr; ++ FuncSetPwr ODM_TxPwrTrackSetPwr; ++ FuncIQK DoIQK; ++ FuncLCK PHY_LCCalibrate; ++ FuncSwing GetDeltaSwingTable; ++ FuncSwing8814only GetDeltaSwingTable8814only; ++} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; ++ ++void ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ); ++ ++ ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++ ++ ++#define ODM_TARGET_CHNL_NUM_2G_5G 59 ++ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++); ++u1Byte ++ODM_GetRightChnlPlaceforIQK( ++ IN u1Byte chnl ++); ++ ++void phydm_rf_init( IN PVOID pDM_VOID); ++void phydm_rf_watchdog( IN PVOID pDM_VOID); ++ ++#endif // #ifndef __HAL_PHY_RF_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_win.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_win.c new file mode 100644 -index 000000000..41087bf36 +index 0000000..32f3985 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_win.c @@ -0,0 +1,716 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ #include "mp_precomp.h" -+ #include "phydm_precomp.h" -+ -+//#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ -+ do {\ -+ for(_offset = 0; _offset < _size; _offset++)\ -+ {\ -+ if(_deltaThermal < thermalThreshold[_direction][_offset])\ -+ {\ -+ if(_offset != 0)\ -+ _offset--;\ -+ break;\ -+ }\ -+ } \ -+ if(_offset >= _size)\ -+ _offset = _size-1;\ -+ } while(0) -+ -+ -+void ConfigureTxpowerTrack( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PTXPWRTRACK_CFG pConfig -+ ) -+{ -+#if RTL8192E_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8192E) -+ ConfigureTxpowerTrack_8192E(pConfig); -+#endif -+#if RTL8821A_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8821) -+ ConfigureTxpowerTrack_8821A(pConfig); -+#endif -+#if RTL8812A_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8812) -+ ConfigureTxpowerTrack_8812A(pConfig); -+#endif -+#if RTL8188E_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8188E) -+ ConfigureTxpowerTrack_8188E(pConfig); -+#endif -+ -+#if RTL8188F_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8188F) -+ ConfigureTxpowerTrack_8188F(pConfig); -+#endif -+ -+#if RTL8723B_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8723B) -+ ConfigureTxpowerTrack_8723B(pConfig); -+#endif -+ -+#if RTL8814A_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8814A) -+ ConfigureTxpowerTrack_8814A(pConfig); -+#endif -+ -+#if RTL8821B_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8821B) -+ ConfigureTxpowerTrack_8821B(pConfig); -+#endif -+ -+#if RTL8703B_SUPPORT -+ if(pDM_Odm->SupportICType==ODM_RTL8703B) -+ ConfigureTxpowerTrack_8703B(pConfig); -+#endif -+ -+} -+ -+//====================================================================== -+// <20121113, Kordan> This function should be called when TxAGC changed. -+// Otherwise the previous compensation is gone, because we record the -+// delta of temperature between two TxPowerTracking watch dogs. -+// -+// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still -+// need to call this function. -+//====================================================================== -+VOID -+ODM_ClearTxPowerTrackingState( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); -+ u1Byte p = 0; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; -+ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; -+ pRFCalibrateInfo->CCK_index = 0; -+ -+ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) -+ { -+ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ -+ pRFCalibrateInfo->PowerIndexOffset[p] = 0; -+ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; -+ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; -+ -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; // Initial Mix mode power tracking -+ pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0; -+ pRFCalibrateInfo->KfreeOffset[p] = 0; -+ } -+ -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA= FALSE; //Initial at Modify Tx Scaling Mode -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathB= FALSE; //Initial at Modify Tx Scaling Mode -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathC= FALSE; //Initial at Modify Tx Scaling Mode -+ pRFCalibrateInfo->Modify_TxAGC_Flag_PathD= FALSE; //Initial at Modify Tx Scaling Mode -+ pRFCalibrateInfo->Remnant_CCKSwingIdx= 0; -+ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; -+ -+ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo -+ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo -+ -+} -+ -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PDM_ODM_T pDM_Odm -+#else -+ IN PADAPTER Adapter -+#endif -+ ) -+{ -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+#endif -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0, pathName = 0; -+ s1Byte diff_DPK[4] = {0}; -+ u1Byte ThermalValue_AVG_count = 0; -+ u4Byte ThermalValue_AVG = 0; -+ -+ u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur -+ u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel) -+ BOOLEAN bTSSIenable = FALSE; -+ -+ TXPWRTRACK_CFG c; -+ -+ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. -+ pu1Byte deltaSwingTableIdx_TUP_A, deltaSwingTableIdx_TDOWN_A; -+ pu1Byte deltaSwingTableIdx_TUP_B, deltaSwingTableIdx_TDOWN_B; -+ //for 8814 add by Yu Chen -+ pu1Byte deltaSwingTableIdx_TUP_C = NULL, deltaSwingTableIdx_TDOWN_C = NULL; -+ pu1Byte deltaSwingTableIdx_TUP_D= NULL, deltaSwingTableIdx_TDOWN_D = NULL; -+ -+ //4 2. Initilization ( 7 steps in total ) -+ -+ ConfigureTxpowerTrack(pDM_Odm, &c); -+ -+ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, -+ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); -+ -+ if(pDM_Odm->SupportICType & ODM_RTL8814A) // for 8814 path C & D -+ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_C, (pu1Byte*)&deltaSwingTableIdx_TDOWN_C, -+ (pu1Byte*)&deltaSwingTableIdx_TUP_D, (pu1Byte*)&deltaSwingTableIdx_TDOWN_D); -+ -+ -+ pRFCalibrateInfo->TXPowerTrackingCallbackCnt++; //cosa add for debug -+ pRFCalibrateInfo->bTXPowerTrackingInit = TRUE; -+ -+#if (MP_DRIVER == 1) -+ /*pRFCalibrateInfo->TxPowerTrackControl = pHalData->TxPowerTrackControl; -+ We should keep updating the control variable according to HalData. -+ RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */ -+ pRFCalibrateInfo->RegA24 = 0x090e1317; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("===>ODM_TXPowerTrackingCallback_ThermalMeter, \ -+ \n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n", -+ pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("pRFCalibrateInfo->TxPowerTrackControl %d, pHalData->EEPROMThermalMeter %d\n", pRFCalibrateInfo->TxPowerTrackControl, pHalData->EEPROMThermalMeter)); -+ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E -+ -+ -+ if( ! pRFCalibrateInfo->TxPowerTrackControl ) -+ return; -+ -+ -+ //4 3. Initialize ThermalValues of RFCalibrateInfo -+ -+ if(pRFCalibrateInfo->bReloadtxpowerindex) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); -+ } -+ -+ //4 4. Calculate average thermal meter -+ -+ pRFCalibrateInfo->ThermalValue_AVG[pRFCalibrateInfo->ThermalValue_AVG_index] = ThermalValue; -+ pRFCalibrateInfo->ThermalValue_AVG_index++; -+ if(pRFCalibrateInfo->ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum -+ pRFCalibrateInfo->ThermalValue_AVG_index = 0; -+ -+ for(i = 0; i < c.AverageThermalNum; i++) -+ { -+ if(pRFCalibrateInfo->ThermalValue_AVG[i]) -+ { -+ ThermalValue_AVG += pRFCalibrateInfo->ThermalValue_AVG[i]; -+ ThermalValue_AVG_count++; -+ } -+ } -+ -+ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times -+ { -+ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ } -+ -+ //4 5. Calculate delta, delta_LCK, delta_IQK. -+ -+ //"delta" here is used to determine whether thermal value changes or not. -+ delta = (ThermalValue > pRFCalibrateInfo->ThermalValue)?(ThermalValue - pRFCalibrateInfo->ThermalValue):(pRFCalibrateInfo->ThermalValue - ThermalValue); -+ delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue); -+ delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue); -+ -+ if(pRFCalibrateInfo->ThermalValue_IQK == 0xff) //no PG, use thermal value for IQK -+ { -+ pRFCalibrateInfo->ThermalValue_IQK = ThermalValue; -+ delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n")); -+ } -+ -+ for(p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pRFCalibrateInfo->DpkThermal[p]; -+ } -+ -+ //4 6. If necessary, do LCK. -+ -+ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { -+ /*no PG , do LCK at initial status*/ -+ if (pRFCalibrateInfo->ThermalValue_LCK == 0xff) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n")); -+ pRFCalibrateInfo->ThermalValue_LCK = ThermalValue; -+ if(c.PHY_LCCalibrate) -+ (*c.PHY_LCCalibrate)(pDM_Odm); -+ delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK)); -+ -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ if (delta_LCK >= c.Threshold_IQK) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); -+ pRFCalibrateInfo->ThermalValue_LCK = ThermalValue; -+ if(c.PHY_LCCalibrate) -+ (*c.PHY_LCCalibrate)(pDM_Odm); -+ } -+ } -+ -+ //3 7. If necessary, move the index of swing table to adjust Tx power. -+ -+ if (delta > 0 && pRFCalibrateInfo->TxPowerTrackControl) -+ { -+ //"delta" here is used to record the absolute value of differrence. -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); -+#else -+ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); -+#endif -+ if (delta >= TXPWR_TRACK_TABLE_SIZE) -+ delta = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(ThermalValue > pHalData->EEPROMThermalMeter) { -+#else -+ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { -+#endif -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; //recording poer index offset -+ switch(p) -+ { -+ case ODM_RF_PATH_B: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); -+ -+ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_C: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); -+ -+ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_D: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); -+ -+ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); -+ -+ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ } -+ -+ } -+ -+ } -+ else { -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; //recording poer index offset -+ switch(p) -+ { -+ case ODM_RF_PATH_B: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); -+ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_C: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); -+ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ case ODM_RF_PATH_D: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); -+ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); -+ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; -+ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; // Record delta swing for mix mode power tracking -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); -+ break; -+ } -+ -+ } -+ -+ } -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p)); -+ -+ if(pRFCalibrateInfo->DeltaPowerIndex[p] == pRFCalibrateInfo->DeltaPowerIndexLast[p]) // If Thermal value changes but lookup table value still the same -+ pRFCalibrateInfo->PowerIndexOffset[p] = 0; -+ else -+ pRFCalibrateInfo->PowerIndexOffset[p] = pRFCalibrateInfo->DeltaPowerIndex[p] - pRFCalibrateInfo->DeltaPowerIndexLast[p]; // Power Index Diff between 2 times Power Tracking -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pRFCalibrateInfo->PowerIndexOffset[p], pRFCalibrateInfo->DeltaPowerIndex[p], pRFCalibrateInfo->DeltaPowerIndexLast[p])); -+ -+ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pRFCalibrateInfo->PowerIndexOffset[p]; -+ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pRFCalibrateInfo->PowerIndexOffset[p]; -+ -+ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->CCK_index; -+ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->OFDM_index[p]; -+ -+ // *************Print BB Swing Base and Index Offset************* -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->PowerIndexOffset[p])); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pRFCalibrateInfo->PowerIndexOffset[p])); -+ -+ //4 7.1 Handle boundary conditions of index. -+ -+ if(pRFCalibrateInfo->OFDM_index[p] > c.SwingTableSize_OFDM-1) -+ { -+ pRFCalibrateInfo->OFDM_index[p] = c.SwingTableSize_OFDM-1; -+ } -+ else if (pRFCalibrateInfo->OFDM_index[p] <= OFDM_min_index) -+ { -+ pRFCalibrateInfo->OFDM_index[p] = OFDM_min_index; -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("\n\n========================================================================================================\n")); -+ if(pRFCalibrateInfo->CCK_index > c.SwingTableSize_CCK-1) -+ pRFCalibrateInfo->CCK_index = c.SwingTableSize_CCK-1; -+ else if (pRFCalibrateInfo->CCK_index <= 0) -+ pRFCalibrateInfo->CCK_index = 0; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pRFCalibrateInfo->ThermalValue: %d\n", -+ pRFCalibrateInfo->TxPowerTrackControl, ThermalValue, pRFCalibrateInfo->ThermalValue)); -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ pRFCalibrateInfo->PowerIndexOffset[p] = 0; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", -+ pRFCalibrateInfo->CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); //Print Swing base & current -+ -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n", -+ pRFCalibrateInfo->OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p])); -+ } -+ -+ if ((pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A] != 0 || -+ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_B] != 0 || -+ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_C] != 0 || -+ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_D] != 0) && -+ pRFCalibrateInfo->TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) -+ { -+ //4 7.2 Configure the Swing Table to adjust Tx Power. -+ -+ pRFCalibrateInfo->bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. -+ // -+ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital -+ // to increase TX power. Otherwise, EVM will be bad. -+ // -+ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. -+ if (ThermalValue > pRFCalibrateInfo->ThermalValue) -+ { -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue)); -+ } -+ } -+ -+ else if (ThermalValue < pRFCalibrateInfo->ThermalValue)// Low temperature -+ { -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue)); -+ } -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (ThermalValue > pHalData->EEPROMThermalMeter) -+#else -+ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) -+#endif -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E ||pDM_Odm->SupportICType == ODM_RTL8821 || -+ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); -+ } -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || -+ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); -+ } -+ -+ } -+ -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; // Record last time Power Tracking result as base. -+ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) -+ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p]; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, -+ ("pRFCalibrateInfo->ThermalValue = %d ThermalValue= %d\n", pRFCalibrateInfo->ThermalValue, ThermalValue)); -+ -+ pRFCalibrateInfo->ThermalValue = ThermalValue; //Record last Power Tracking Thermal Value -+ -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ if(!IS_HARDWARE_TYPE_8723B(Adapter)) -+ { -+ // Delta temperature is equal to or larger than 20 centigrade (When threshold is 8). -+ if ((delta_IQK >= c.Threshold_IQK)) { -+ if ( ! pRFCalibrateInfo->bIQKInProgress) -+ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); -+ } -+ } -+ if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_A] != 0) { -+ if ((diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK)) { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK)); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) { -+ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } -+ } -+ if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_B] != 0) { -+ if ((diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK)) { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK)); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) { -+ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } else { -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); -+ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); -+ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); -+ } -+ } -+ -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===ODM_TXPowerTrackingCallback_ThermalMeter\n")); -+ -+ pRFCalibrateInfo->TXPowercount = 0; -+} -+ -+ -+ -+//3============================================================ -+//3 IQ Calibration -+//3============================================================ -+ -+VOID -+ODM_ResetIQKResult( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ return; -+} -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) -+{ -+ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = -+ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; -+ u1Byte place = chnl; -+ -+ -+ if(chnl > 14) -+ { -+ for(place = 14; placeAdapter; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (*pDM_Odm->pIsFcsModeEnable) -+ return; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) -+ return; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) -+ return; -+#endif -+#endif -+ -+#if (RTL8821A_SUPPORT == 1) -+ if (pDM_Odm->bLinked) { -+ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { -+ pDM_Odm->preChannel = *pDM_Odm->pChannel; -+ pDM_Odm->LinkedInterval = 0; -+ } -+ -+ if (pDM_Odm->LinkedInterval < 3) -+ pDM_Odm->LinkedInterval++; -+ -+ if (pDM_Odm->LinkedInterval == 2) { -+ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ -+ /*Open it verified by James 20130715*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PHY_IQCalibrate_8821A(pDM_Odm, FALSE); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHY_IQCalibrate(Adapter, FALSE); -+#else -+ PHY_IQCalibrate_8821A(Adapter, FALSE); -+#endif -+ } -+ } else -+ pDM_Odm->LinkedInterval = 0; -+#endif -+} -+ -+void phydm_rf_init(IN PDM_ODM_T pDM_Odm) -+{ -+ -+ odm_TXPowerTrackingInit(pDM_Odm); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ ODM_ClearTxPowerTrackingState(pDM_Odm); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ PHY_IQCalibrate_8814A_Init(pDM_Odm); -+#endif -+#endif -+ -+} -+ -+void phydm_rf_watchdog(IN PDM_ODM_T pDM_Odm) -+{ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ ODM_TXPowerTrackingCheck(pDM_Odm); -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ odm_IQCalibrate(pDM_Odm); -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #include "mp_precomp.h" ++ #include "phydm_precomp.h" ++ ++//#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ ++ do {\ ++ for(_offset = 0; _offset < _size; _offset++)\ ++ {\ ++ if(_deltaThermal < thermalThreshold[_direction][_offset])\ ++ {\ ++ if(_offset != 0)\ ++ _offset--;\ ++ break;\ ++ }\ ++ } \ ++ if(_offset >= _size)\ ++ _offset = _size-1;\ ++ } while(0) ++ ++ ++void ConfigureTxpowerTrack( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PTXPWRTRACK_CFG pConfig ++ ) ++{ ++#if RTL8192E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ ConfigureTxpowerTrack_8192E(pConfig); ++#endif ++#if RTL8821A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8821) ++ ConfigureTxpowerTrack_8821A(pConfig); ++#endif ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8812) ++ ConfigureTxpowerTrack_8812A(pConfig); ++#endif ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ ConfigureTxpowerTrack_8188E(pConfig); ++#endif ++ ++#if RTL8188F_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188F) ++ ConfigureTxpowerTrack_8188F(pConfig); ++#endif ++ ++#if RTL8723B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ ConfigureTxpowerTrack_8723B(pConfig); ++#endif ++ ++#if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8814A) ++ ConfigureTxpowerTrack_8814A(pConfig); ++#endif ++ ++#if RTL8821B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8821B) ++ ConfigureTxpowerTrack_8821B(pConfig); ++#endif ++ ++#if RTL8703B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8703B) ++ ConfigureTxpowerTrack_8703B(pConfig); ++#endif ++ ++} ++ ++//====================================================================== ++// <20121113, Kordan> This function should be called when TxAGC changed. ++// Otherwise the previous compensation is gone, because we record the ++// delta of temperature between two TxPowerTracking watch dogs. ++// ++// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still ++// need to call this function. ++//====================================================================== ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ u1Byte p = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->CCK_index = 0; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; // Initial Mix mode power tracking ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathB= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathC= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathD= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Remnant_CCKSwingIdx= 0; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo ++ ++} ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0, pathName = 0; ++ s1Byte diff_DPK[4] = {0}; ++ u1Byte ThermalValue_AVG_count = 0; ++ u4Byte ThermalValue_AVG = 0; ++ ++ u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++ u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel) ++ BOOLEAN bTSSIenable = FALSE; ++ ++ TXPWRTRACK_CFG c; ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ pu1Byte deltaSwingTableIdx_TUP_A, deltaSwingTableIdx_TDOWN_A; ++ pu1Byte deltaSwingTableIdx_TUP_B, deltaSwingTableIdx_TDOWN_B; ++ //for 8814 add by Yu Chen ++ pu1Byte deltaSwingTableIdx_TUP_C = NULL, deltaSwingTableIdx_TDOWN_C = NULL; ++ pu1Byte deltaSwingTableIdx_TUP_D= NULL, deltaSwingTableIdx_TDOWN_D = NULL; ++ ++ //4 2. Initilization ( 7 steps in total ) ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ ++ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); ++ ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) // for 8814 path C & D ++ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_C, (pu1Byte*)&deltaSwingTableIdx_TDOWN_C, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_D, (pu1Byte*)&deltaSwingTableIdx_TDOWN_D); ++ ++ ++ pRFCalibrateInfo->TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pRFCalibrateInfo->bTXPowerTrackingInit = TRUE; ++ ++#if (MP_DRIVER == 1) ++ /*pRFCalibrateInfo->TxPowerTrackControl = pHalData->TxPowerTrackControl; ++ We should keep updating the control variable according to HalData. ++ RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */ ++ pRFCalibrateInfo->RegA24 = 0x090e1317; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("===>ODM_TXPowerTrackingCallback_ThermalMeter, \ ++ \n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n", ++ pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pRFCalibrateInfo->TxPowerTrackControl %d, pHalData->EEPROMThermalMeter %d\n", pRFCalibrateInfo->TxPowerTrackControl, pHalData->EEPROMThermalMeter)); ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++ ++ ++ if( ! pRFCalibrateInfo->TxPowerTrackControl ) ++ return; ++ ++ ++ //4 3. Initialize ThermalValues of RFCalibrateInfo ++ ++ if(pRFCalibrateInfo->bReloadtxpowerindex) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); ++ } ++ ++ //4 4. Calculate average thermal meter ++ ++ pRFCalibrateInfo->ThermalValue_AVG[pRFCalibrateInfo->ThermalValue_AVG_index] = ThermalValue; ++ pRFCalibrateInfo->ThermalValue_AVG_index++; ++ if(pRFCalibrateInfo->ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum ++ pRFCalibrateInfo->ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pRFCalibrateInfo->ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pRFCalibrateInfo->ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times ++ { ++ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ } ++ ++ //4 5. Calculate delta, delta_LCK, delta_IQK. ++ ++ //"delta" here is used to determine whether thermal value changes or not. ++ delta = (ThermalValue > pRFCalibrateInfo->ThermalValue)?(ThermalValue - pRFCalibrateInfo->ThermalValue):(pRFCalibrateInfo->ThermalValue - ThermalValue); ++ delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue); ++ ++ if(pRFCalibrateInfo->ThermalValue_IQK == 0xff) //no PG, use thermal value for IQK ++ { ++ pRFCalibrateInfo->ThermalValue_IQK = ThermalValue; ++ delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n")); ++ } ++ ++ for(p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pRFCalibrateInfo->DpkThermal[p]; ++ } ++ ++ //4 6. If necessary, do LCK. ++ ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ /*no PG , do LCK at initial status*/ ++ if (pRFCalibrateInfo->ThermalValue_LCK == 0xff) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n")); ++ pRFCalibrateInfo->ThermalValue_LCK = ThermalValue; ++ if(c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK)); ++ ++ /* Delta temperature is equal to or larger than 20 centigrade.*/ ++ if (delta_LCK >= c.Threshold_IQK) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); ++ pRFCalibrateInfo->ThermalValue_LCK = ThermalValue; ++ if(c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ ++ //3 7. If necessary, move the index of swing table to adjust Tx power. ++ ++ if (delta > 0 && pRFCalibrateInfo->TxPowerTrackControl) ++ { ++ //"delta" here is used to record the absolute value of differrence. ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++#else ++ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); ++#endif ++ if (delta >= TXPWR_TRACK_TABLE_SIZE) ++ delta = TXPWR_TRACK_TABLE_SIZE - 1; ++ ++ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(ThermalValue > pHalData->EEPROMThermalMeter) { ++#else ++ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { ++#endif ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; //recording poer index offset ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ ++ } ++ ++ } ++ else { ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; //recording poer index offset ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ ++ } ++ ++ } ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p)); ++ ++ if(pRFCalibrateInfo->DeltaPowerIndex[p] == pRFCalibrateInfo->DeltaPowerIndexLast[p]) // If Thermal value changes but lookup table value still the same ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ else ++ pRFCalibrateInfo->PowerIndexOffset[p] = pRFCalibrateInfo->DeltaPowerIndex[p] - pRFCalibrateInfo->DeltaPowerIndexLast[p]; // Power Index Diff between 2 times Power Tracking ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pRFCalibrateInfo->PowerIndexOffset[p], pRFCalibrateInfo->DeltaPowerIndex[p], pRFCalibrateInfo->DeltaPowerIndexLast[p])); ++ ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pRFCalibrateInfo->PowerIndexOffset[p]; ++ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pRFCalibrateInfo->PowerIndexOffset[p]; ++ ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->CCK_index; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->OFDM_index[p]; ++ ++ // *************Print BB Swing Base and Index Offset************* ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->PowerIndexOffset[p])); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pRFCalibrateInfo->PowerIndexOffset[p])); ++ ++ //4 7.1 Handle boundary conditions of index. ++ ++ if(pRFCalibrateInfo->OFDM_index[p] > c.SwingTableSize_OFDM-1) ++ { ++ pRFCalibrateInfo->OFDM_index[p] = c.SwingTableSize_OFDM-1; ++ } ++ else if (pRFCalibrateInfo->OFDM_index[p] <= OFDM_min_index) ++ { ++ pRFCalibrateInfo->OFDM_index[p] = OFDM_min_index; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n========================================================================================================\n")); ++ if(pRFCalibrateInfo->CCK_index > c.SwingTableSize_CCK-1) ++ pRFCalibrateInfo->CCK_index = c.SwingTableSize_CCK-1; ++ else if (pRFCalibrateInfo->CCK_index <= 0) ++ pRFCalibrateInfo->CCK_index = 0; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pRFCalibrateInfo->ThermalValue: %d\n", ++ pRFCalibrateInfo->TxPowerTrackControl, ThermalValue, pRFCalibrateInfo->ThermalValue)); ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", ++ pRFCalibrateInfo->CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); //Print Swing base & current ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n", ++ pRFCalibrateInfo->OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p])); ++ } ++ ++ if ((pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A] != 0 || ++ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_B] != 0 || ++ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_C] != 0 || ++ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_D] != 0) && ++ pRFCalibrateInfo->TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) ++ { ++ //4 7.2 Configure the Swing Table to adjust Tx Power. ++ ++ pRFCalibrateInfo->bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. ++ // ++ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital ++ // to increase TX power. Otherwise, EVM will be bad. ++ // ++ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. ++ if (ThermalValue > pRFCalibrateInfo->ThermalValue) ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue)); ++ } ++ } ++ ++ else if (ThermalValue < pRFCalibrateInfo->ThermalValue)// Low temperature ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue)); ++ } ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (ThermalValue > pHalData->EEPROMThermalMeter) ++#else ++ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E ||pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; // Record last time Power Tracking result as base. ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p]; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pRFCalibrateInfo->ThermalValue = %d ThermalValue= %d\n", pRFCalibrateInfo->ThermalValue, ThermalValue)); ++ ++ pRFCalibrateInfo->ThermalValue = ThermalValue; //Record last Power Tracking Thermal Value ++ ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(!IS_HARDWARE_TYPE_8723B(Adapter)) ++ { ++ // Delta temperature is equal to or larger than 20 centigrade (When threshold is 8). ++ if ((delta_IQK >= c.Threshold_IQK)) { ++ if ( ! pRFCalibrateInfo->bIQKInProgress) ++ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); ++ } ++ } ++ if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_A] != 0) { ++ if ((diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK)) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_B] != 0) { ++ if ((diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK)) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===ODM_TXPowerTrackingCallback_ThermalMeter\n")); ++ ++ pRFCalibrateInfo->TXPowercount = 0; ++} ++ ++ ++ ++//3============================================================ ++//3 IQ Calibration ++//3============================================================ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ return; ++} ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; ++ u1Byte place = chnl; ++ ++ ++ if(chnl > 14) ++ { ++ for(place = 14; placeAdapter; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (*pDM_Odm->pIsFcsModeEnable) ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) ++ return; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) ++ return; ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->bLinked) { ++ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { ++ pDM_Odm->preChannel = *pDM_Odm->pChannel; ++ pDM_Odm->LinkedInterval = 0; ++ } ++ ++ if (pDM_Odm->LinkedInterval < 3) ++ pDM_Odm->LinkedInterval++; ++ ++ if (pDM_Odm->LinkedInterval == 2) { ++ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ ++ /*Open it verified by James 20130715*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PHY_IQCalibrate_8821A(pDM_Odm, FALSE); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHY_IQCalibrate(Adapter, FALSE); ++#else ++ PHY_IQCalibrate_8821A(Adapter, FALSE); ++#endif ++ } ++ } else ++ pDM_Odm->LinkedInterval = 0; ++#endif ++} ++ ++void phydm_rf_init(IN PDM_ODM_T pDM_Odm) ++{ ++ ++ odm_TXPowerTrackingInit(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ PHY_IQCalibrate_8814A_Init(pDM_Odm); ++#endif ++#endif ++ ++} ++ ++void phydm_rf_watchdog(IN PDM_ODM_T pDM_Odm) ++{ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_TXPowerTrackingCheck(pDM_Odm); ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ odm_IQCalibrate(pDM_Odm); ++#endif +} \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_win.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_win.h new file mode 100644 -index 000000000..aa20db1b7 +index 0000000..4010421 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/halphyrf_win.h @@ -0,0 +1,108 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ #ifndef __HAL_PHY_RF_H__ -+ #define __HAL_PHY_RF_H__ -+ -+#include "phydm_kfree.h" -+#if (RTL8814A_SUPPORT == 1) -+#include "rtl8814a/phydm_iqk_8814a.h" -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+#include "rtl8822b/phydm_iqk_8822b.h" -+#endif -+#include "phydm_powertracking_win.h" -+ -+typedef enum _SPUR_CAL_METHOD { -+ PLL_RESET, -+ AFE_PHASE_SEL -+} SPUR_CAL_METHOD; -+ -+typedef enum _PWRTRACK_CONTROL_METHOD { -+ BBSWING, -+ TXAGC, -+ MIX_MODE, -+ TSSI_MODE -+} PWRTRACK_METHOD; -+ -+typedef VOID (*FuncSetPwr)(PDM_ODM_T, PWRTRACK_METHOD, u1Byte, u1Byte); -+typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); -+typedef VOID (*FuncLCK)(PDM_ODM_T); -+ //refine by YuChen for 8814A -+typedef VOID (*FuncSwing)(PDM_ODM_T, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); -+typedef VOID (*FuncSwing8814only)(PDM_ODM_T, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); -+ -+typedef struct _TXPWRTRACK_CFG { -+ u1Byte SwingTableSize_CCK; -+ u1Byte SwingTableSize_OFDM; -+ u1Byte Threshold_IQK; -+ u1Byte Threshold_DPK; -+ u1Byte AverageThermalNum; -+ u1Byte RfPathCount; -+ u4Byte ThermalRegAddr; -+ FuncSetPwr ODM_TxPwrTrackSetPwr; -+ FuncIQK DoIQK; -+ FuncLCK PHY_LCCalibrate; -+ FuncSwing GetDeltaSwingTable; -+ FuncSwing8814only GetDeltaSwingTable8814only; -+} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; -+ -+VOID -+ConfigureTxpowerTrack( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PTXPWRTRACK_CFG pConfig -+ ); -+ -+ -+VOID -+ODM_ClearTxPowerTrackingState( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+ODM_TXPowerTrackingCallback_ThermalMeter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ IN PDM_ODM_T pDM_Odm -+#else -+ IN PADAPTER Adapter -+#endif -+ ); -+ -+ -+ -+#define ODM_TARGET_CHNL_NUM_2G_5G 59 -+ -+ -+VOID -+ODM_ResetIQKResult( -+ IN PDM_ODM_T pDM_Odm -+); -+u1Byte -+ODM_GetRightChnlPlaceforIQK( -+ IN u1Byte chnl -+); -+ -+VOID odm_IQCalibrate(IN PDM_ODM_T pDM_Odm); -+VOID phydm_rf_init( IN PDM_ODM_T pDM_Odm); -+VOID phydm_rf_watchdog( IN PDM_ODM_T pDM_Odm); -+ -+#endif // #ifndef __HAL_PHY_RF_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #ifndef __HAL_PHY_RF_H__ ++ #define __HAL_PHY_RF_H__ ++ ++#include "phydm_kfree.h" ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++#if (RTL8822B_SUPPORT == 1) ++#include "rtl8822b/phydm_iqk_8822b.h" ++#endif ++#include "phydm_powertracking_win.h" ++ ++typedef enum _SPUR_CAL_METHOD { ++ PLL_RESET, ++ AFE_PHASE_SEL ++} SPUR_CAL_METHOD; ++ ++typedef enum _PWRTRACK_CONTROL_METHOD { ++ BBSWING, ++ TXAGC, ++ MIX_MODE, ++ TSSI_MODE ++} PWRTRACK_METHOD; ++ ++typedef VOID (*FuncSetPwr)(PDM_ODM_T, PWRTRACK_METHOD, u1Byte, u1Byte); ++typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); ++typedef VOID (*FuncLCK)(PDM_ODM_T); ++ //refine by YuChen for 8814A ++typedef VOID (*FuncSwing)(PDM_ODM_T, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++typedef VOID (*FuncSwing8814only)(PDM_ODM_T, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++ ++typedef struct _TXPWRTRACK_CFG { ++ u1Byte SwingTableSize_CCK; ++ u1Byte SwingTableSize_OFDM; ++ u1Byte Threshold_IQK; ++ u1Byte Threshold_DPK; ++ u1Byte AverageThermalNum; ++ u1Byte RfPathCount; ++ u4Byte ThermalRegAddr; ++ FuncSetPwr ODM_TxPwrTrackSetPwr; ++ FuncIQK DoIQK; ++ FuncLCK PHY_LCCalibrate; ++ FuncSwing GetDeltaSwingTable; ++ FuncSwing8814only GetDeltaSwingTable8814only; ++} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; ++ ++VOID ++ConfigureTxpowerTrack( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PTXPWRTRACK_CFG pConfig ++ ); ++ ++ ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++ ++ ++#define ODM_TARGET_CHNL_NUM_2G_5G 59 ++ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PDM_ODM_T pDM_Odm ++); ++u1Byte ++ODM_GetRightChnlPlaceforIQK( ++ IN u1Byte chnl ++); ++ ++VOID odm_IQCalibrate(IN PDM_ODM_T pDM_Odm); ++VOID phydm_rf_init( IN PDM_ODM_T pDM_Odm); ++VOID phydm_rf_watchdog( IN PDM_ODM_T pDM_Odm); ++ ++#endif // #ifndef __HAL_PHY_RF_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/mp_precomp.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/mp_precomp.h new file mode 100644 -index 000000000..2e950cb2e +index 0000000..2ae8110 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/mp_precomp.h @@ -0,0 +1,20 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm.c new file mode 100644 -index 000000000..e668d3edd +index 0000000..ecace00 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm.c @@ -0,0 +1,2159 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+const u2Byte dB_Invert_Table[12][8] = { -+ { 1, 1, 1, 2, 2, 2, 2, 3}, -+ { 3, 3, 4, 4, 4, 5, 6, 6}, -+ { 7, 8, 9, 10, 11, 13, 14, 16}, -+ { 18, 20, 22, 25, 28, 32, 35, 40}, -+ { 45, 50, 56, 63, 71, 79, 89, 100}, -+ { 112, 126, 141, 158, 178, 200, 224, 251}, -+ { 282, 316, 355, 398, 447, 501, 562, 631}, -+ { 708, 794, 891, 1000, 1122, 1259, 1413, 1585}, -+ { 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, -+ { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000}, -+ { 11220, 12589, 14125, 15849, 17783, 19953, 22387, 25119}, -+ { 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} -+}; -+ -+ -+//============================================================ -+// Local Function predefine. -+//============================================================ -+ -+/* START------------COMMON INFO RELATED--------------- */ -+ -+VOID -+odm_GlobalAdapterCheck( -+ IN VOID -+ ); -+ -+//move to odm_PowerTacking.h by YuChen -+ -+ -+ -+VOID -+odm_UpdatePowerTrainingState( -+ IN PDM_ODM_T pDM_Odm -+); -+ -+//============================================================ -+//3 Export Interface -+//============================================================ -+ -+/*Y = 10*log(X)*/ -+s4Byte -+ODM_PWdB_Conversion( -+ IN s4Byte X, -+ IN u4Byte TotalBit, -+ IN u4Byte DecimalBit -+ ) -+{ -+ s4Byte Y, integer = 0, decimal = 0; -+ u4Byte i; -+ -+ if(X == 0) -+ X = 1; // log2(x), x can't be 0 -+ -+ for(i = (TotalBit-1); i > 0; i--) -+ { -+ if(X & BIT(i)) -+ { -+ integer = i; -+ if(i > 0) -+ decimal = (X & BIT(i-1))?2:0; //decimal is 0.5dB*3=1.5dB~=2dB -+ break; -+ } -+ } -+ -+ Y = 3*(integer-DecimalBit)+decimal; //10*log(x)=3*log2(x), -+ -+ return Y; -+} -+ -+s4Byte -+ODM_SignConversion( -+ IN s4Byte value, -+ IN u4Byte TotalBit -+ ) -+{ -+ if(value&BIT(TotalBit-1)) -+ value -= BIT(TotalBit); -+ return value; -+} -+ -+VOID -+ODM_InitMpDriverStatus( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ // Decide when compile time -+ #if(MP_DRIVER == 1) -+ pDM_Odm->mp_mode = TRUE; -+ #else -+ pDM_Odm->mp_mode = FALSE; -+ #endif -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ // Update information every period -+ pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; -+ -+#else -+ -+ // MP mode is always false at AP side -+ pDM_Odm->mp_mode = FALSE; -+ -+#endif -+} -+ -+VOID -+ODM_UpdateMpDriverStatus( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ // Do nothing. -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ // Update information erery period -+ pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; -+ -+#else -+ -+ // Do nothing. -+ -+#endif -+} -+ -+VOID -+PHYDM_InitTRXAntennaSetting( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+#if (RTL8814A_SUPPORT == 1) -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8814A)) { -+ u1Byte RxAnt = 0, TxAnt = 0; -+ -+ RxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH, pDM_Odm), ODM_BIT(BB_RX_PATH, pDM_Odm)); -+ TxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_TX_PATH, pDM_Odm), ODM_BIT(BB_TX_PATH, pDM_Odm)); -+ pDM_Odm->TXAntStatus = (TxAnt & 0xf); -+ pDM_Odm->RXAntStatus = (RxAnt & 0xf); -+ } -+#endif -+} -+ -+VOID -+phydm_Init_cck_setting( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u4Byte value_824,value_82c; -+ -+ pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm)); -+ -+ #if (RTL8192E_SUPPORT == 1) -+ if(pDM_Odm->SupportICType & (ODM_RTL8192E)) -+ { -+ /* 0x824[9] = 0x82C[9] = 0xA80[7] these regiaters settinh should be equal or CCK RSSI report may inaccurate */ -+ value_824 = ODM_GetBBReg(pDM_Odm, 0x824, BIT9); -+ value_82c = ODM_GetBBReg(pDM_Odm, 0x82c, BIT9); -+ -+ if(value_824 != value_82c) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x82c , BIT9, value_824); -+ } -+ ODM_SetBBReg(pDM_Odm, 0xa80 , BIT7, value_824); -+ pDM_Odm->cck_agc_report_type = (BOOLEAN)value_824; -+ } -+ #endif -+ -+ #if (RTL8703B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & (ODM_RTL8703B)) { -+ -+ pDM_Odm->cck_agc_report_type = ODM_GetBBReg(pDM_Odm, 0x950, BIT11) ? 1 : 0; /*1: 4bit LNA , 0: 3bit LNA */ -+ -+ if (pDM_Odm->cck_agc_report_type != 1) { -+ DbgPrint("[Warning] 8703B CCK should be 4bit LNA, ie. 0x950[11] = 1\n"); -+ /**/ -+ } -+ } -+ #endif -+ -+} -+ -+u1Byte DummyHubUsbMode = 1;/* USB 2.0 */ -+void phydm_hook_dummy_member( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ if (pDM_Odm->HubUsbMode == NULL) -+ pDM_Odm->HubUsbMode = &DummyHubUsbMode; -+} -+ -+ -+VOID -+odm_CommonInfoSelfInit( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ phydm_Init_cck_setting(pDM_Odm); -+ pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm)); -+#if (DM_ODM_SUPPORT_TYPE != ODM_CE) -+ pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp; -+#endif -+ -+ PHYDM_InitDebugSetting(pDM_Odm); -+ ODM_InitMpDriverStatus(pDM_Odm); -+ PHYDM_InitTRXAntennaSetting(pDM_Odm); -+ -+ pDM_Odm->TxRate = 0xFF; -+ -+ pDM_Odm->number_linked_client = 0; -+ pDM_Odm->pre_number_linked_client = 0; -+ pDM_Odm->number_active_client = 0; -+ pDM_Odm->pre_number_active_client = 0; -+ phydm_hook_dummy_member(pDM_Odm); -+ -+} -+ -+VOID -+odm_CommonInfoSelfUpdate( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ u1Byte EntryCnt = 0, num_active_client = 0; -+ u4Byte i, OneEntry_MACID = 0, ma_rx_tp = 0; -+ PSTA_INFO_T pEntry; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ -+ pEntry = pDM_Odm->pODM_StaInfo[0]; -+ if(pMgntInfo->mAssoc) -+ { -+ pEntry->bUsed=TRUE; -+ for (i=0; i<6; i++) -+ pEntry->MacAddr[i] = pMgntInfo->Bssid[i]; -+ } -+ else -+ { -+ pEntry->bUsed=FALSE; -+ for (i=0; i<6; i++) -+ pEntry->MacAddr[i] = 0; -+ } -+ -+ //STA mode is linked to AP -+ if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter)) -+ pDM_Odm->bsta_state = TRUE; -+ else -+ pDM_Odm->bsta_state = FALSE; -+#endif -+ -+/* THis variable cannot be used because it is wrong*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) -+ { -+ if (*(pDM_Odm->pSecChOffset) == 1) -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; -+ else if (*(pDM_Odm->pSecChOffset) == 2) -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; -+ } else if (*(pDM_Odm->pBandWidth) == ODM_BW80M) { -+ if (*(pDM_Odm->pSecChOffset) == 1) -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 6; -+ else if (*(pDM_Odm->pSecChOffset) == 2) -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 6; -+ } else -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); -+#else -+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { -+ if (*(pDM_Odm->pSecChOffset) == 1) -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; -+ else if (*(pDM_Odm->pSecChOffset) == 2) -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; -+ } else -+ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); -+#endif -+ -+ for (i=0; ipODM_StaInfo[i]; -+ if(IS_STA_VALID(pEntry)) -+ { -+ EntryCnt++; -+ if(EntryCnt==1) -+ { -+ OneEntry_MACID=i; -+ } -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ ma_rx_tp = (pEntry->rx_byte_cnt_LowMAW)<<3; /* low moving average RX TP ( bit /sec)*/ -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("ClientTP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp)); -+ -+ if (ma_rx_tp > ACTIVE_TP_THRESHOLD) -+ num_active_client++; -+ #endif -+ } -+ } -+ -+ if(EntryCnt == 1) -+ { -+ pDM_Odm->bOneEntryOnly = TRUE; -+ pDM_Odm->OneEntry_MACID=OneEntry_MACID; -+ } -+ else -+ pDM_Odm->bOneEntryOnly = FALSE; -+ -+ pDM_Odm->pre_number_linked_client = pDM_Odm->number_linked_client; -+ pDM_Odm->pre_number_active_client = pDM_Odm->number_active_client; -+ -+ pDM_Odm->number_linked_client = EntryCnt; -+ pDM_Odm->number_active_client = num_active_client; -+ -+ /* Update MP driver status*/ -+ ODM_UpdateMpDriverStatus(pDM_Odm); -+} -+ -+VOID -+odm_CommonInfoSelfReset( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0; -+#endif -+} -+ -+PVOID -+PhyDM_Get_Structure( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte Structure_Type -+) -+ -+{ -+ PVOID pStruct = NULL; -+#if RTL8195A_SUPPORT -+ switch (Structure_Type){ -+ case PHYDM_FALSEALMCNT: -+ pStruct = &FalseAlmCnt; -+ break; -+ -+ case PHYDM_CFOTRACK: -+ pStruct = &DM_CfoTrack; -+ break; -+ -+ case PHYDM_ADAPTIVITY: -+ pStruct = &(pDM_Odm->Adaptivity); -+ break; -+ -+ default: -+ break; -+ } -+ -+#else -+ switch (Structure_Type){ -+ case PHYDM_FALSEALMCNT: -+ pStruct = &(pDM_Odm->FalseAlmCnt); -+ break; -+ -+ case PHYDM_CFOTRACK: -+ pStruct = &(pDM_Odm->DM_CfoTrack); -+ break; -+ -+ case PHYDM_ADAPTIVITY: -+ pStruct = &(pDM_Odm->Adaptivity); -+ break; -+ -+ default: -+ break; -+ } -+ -+#endif -+ return pStruct; -+} -+ -+VOID -+odm_HWSetting( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (RTL8821A_SUPPORT == 1) -+ if(pDM_Odm->SupportICType & ODM_RTL8821) -+ odm_HWSetting_8821A(pDM_Odm); -+#endif -+ -+} -+ -+// -+// 2011/09/21 MH Add to describe different team necessary resource allocate?? -+// -+VOID -+ODM_DMInit( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ odm_CommonInfoSelfInit(pDM_Odm); -+ odm_DIGInit(pDM_Odm); -+ Phydm_NHMCounterStatisticsInit(pDM_Odm); -+ Phydm_AdaptivityInit(pDM_Odm); -+ phydm_ra_info_init(pDM_Odm); -+ odm_RateAdaptiveMaskInit(pDM_Odm); -+ odm_RA_ParaAdjust_init(pDM_Odm); -+ ODM_CfoTrackingInit(pDM_Odm); -+ ODM_EdcaTurboInit(pDM_Odm); -+ odm_RSSIMonitorInit(pDM_Odm); -+ phydm_rf_init(pDM_Odm); -+ odm_TXPowerTrackingInit(pDM_Odm); -+ odm_AntennaDiversityInit(pDM_Odm); -+ odm_AutoChannelSelectInit(pDM_Odm); -+ odm_PathDiversityInit(pDM_Odm); -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ phydm_Beamforming_Init(pDM_Odm); -+#endif -+ -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ odm_DynamicBBPowerSavingInit(pDM_Odm); -+ odm_DynamicTxPowerInit(pDM_Odm); -+ -+#if (RTL8188E_SUPPORT == 1) -+ if(pDM_Odm->SupportICType==ODM_RTL8188E) -+ { -+ odm_PrimaryCCA_Init(pDM_Odm); -+ ODM_RAInfo_Init_all(pDM_Odm); -+ } -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ -+ #if (RTL8723B_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ odm_SwAntDetectInit(pDM_Odm); -+ #endif -+ -+ #if (RTL8192E_SUPPORT == 1) -+ if(pDM_Odm->SupportICType==ODM_RTL8192E) -+ odm_PrimaryCCA_Check_Init(pDM_Odm); -+ #endif -+ -+#endif -+ -+ } -+ -+} -+ -+VOID -+ODM_DMReset( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ ODM_AntDivReset(pDM_Odm); -+} -+ -+ -+VOID -+phydm_support_ablity_debug( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte pre_support_ability; -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ -+ pre_support_ability = pDM_Odm->SupportAbility ; -+ PHYDM_SNPRINTF((output+used, out_len-used,"\n%s\n", "================================")); -+ if(dm_value[0] == 100) -+ { -+ PHYDM_SNPRINTF((output+used, out_len-used, "[Supportablity] PhyDM Selection\n")); -+ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); -+ PHYDM_SNPRINTF((output+used, out_len-used, "00. (( %s ))DIG \n", ((pDM_Odm->SupportAbility & ODM_BB_DIG)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "01. (( %s ))RA_MASK \n", ((pDM_Odm->SupportAbility & ODM_BB_RA_MASK)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "02. (( %s ))DYNAMIC_TXPWR \n", ((pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "03. (( %s ))FA_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_FA_CNT)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "04. (( %s ))RSSI_MONITOR \n", ((pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "05. (( %s ))CCK_PD \n", ((pDM_Odm->SupportAbility & ODM_BB_CCK_PD)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "06. (( %s ))ANT_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "07. (( %s ))PWR_SAVE \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "08. (( %s ))PWR_TRAIN \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "09. (( %s ))RATE_ADAPTIVE \n", ((pDM_Odm->SupportAbility & ODM_BB_RATE_ADAPTIVE)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "10. (( %s ))PATH_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)?("V"):(".")))); -+ PHYDM_SNPRINTF((output+used, out_len-used, "11. (( %s ))PSD \n", ((pDM_Odm->SupportAbility & ODM_BB_PSD)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "12. (( %s ))RXHP \n", ((pDM_Odm->SupportAbility & ODM_BB_RXHP)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "13. (( %s ))ADAPTIVITY \n", ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "14. (( %s ))CFO_TRACKING \n", ((pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "15. (( %s ))NHM_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "16. (( %s ))PRIMARY_CCA \n", ((pDM_Odm->SupportAbility & ODM_BB_PRIMARY_CCA)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "20. (( %s ))EDCA_TURBO \n", ((pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "21. (( %s ))EARLY_MODE \n", ((pDM_Odm->SupportAbility & ODM_MAC_EARLY_MODE)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "24. (( %s ))TX_PWR_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "25. (( %s ))RX_GAIN_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_RX_GAIN_TRACK)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used, "26. (( %s ))RF_CALIBRATION \n", ((pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)?("V"):(".")) )); -+ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); -+ } -+ /* -+ else if(dm_value[0] == 101) -+ { -+ pDM_Odm->SupportAbility = 0 ; -+ DbgPrint("Disable all SupportAbility components \n"); -+ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "Disable all SupportAbility components")); -+ } -+ */ -+ else -+ { -+ -+ if(dm_value[1] == 1) //enable -+ { -+ pDM_Odm->SupportAbility |= BIT(dm_value[0]) ; -+ if(BIT(dm_value[0]) & ODM_BB_PATH_DIV) -+ { -+ odm_PathDiversityInit(pDM_Odm); -+ } -+ } -+ else if(dm_value[1] == 2) //disable -+ { -+ pDM_Odm->SupportAbility &= ~(BIT(dm_value[0])) ; -+ } -+ else -+ { -+ //DbgPrint("\n[Warning!!!] 1:enable, 2:disable \n\n"); -+ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "[Warning!!!] 1:enable, 2:disable")); -+ } -+ } -+ PHYDM_SNPRINTF((output+used, out_len-used,"pre-SupportAbility = 0x%x\n", pre_support_ability )); -+ PHYDM_SNPRINTF((output+used, out_len-used,"Curr-SupportAbility = 0x%x\n", pDM_Odm->SupportAbility )); -+ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+// -+//tmp modify for LC Only -+// -+VOID -+ODM_DMWatchdog_LPS( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ odm_CommonInfoSelfUpdate(pDM_Odm); -+ odm_FalseAlarmCounterStatistics(pDM_Odm); -+ odm_RSSIMonitorCheck(pDM_Odm); -+ odm_DIGbyRSSI_LPS(pDM_Odm); -+ odm_CCKPacketDetectionThresh(pDM_Odm); -+ odm_CommonInfoSelfReset(pDM_Odm); -+ -+ if(*(pDM_Odm->pbPowerSaving)==TRUE) -+ return; -+} -+#endif -+// -+// 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. -+// You can not add any dummy function here, be care, you can only use DM structure -+// to perform any new ODM_DM. -+// -+VOID -+ODM_DMWatchdog( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ odm_CommonInfoSelfUpdate(pDM_Odm); -+ phydm_BasicDbgMessage(pDM_Odm); -+ odm_HWSetting(pDM_Odm); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ { -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ if( (priv->auto_channel != 0) && (priv->auto_channel != 2) )//if ACS running, do not do FA/CCA counter read -+ return; -+ } -+#endif -+ odm_FalseAlarmCounterStatistics(pDM_Odm); -+ phydm_NoisyDetection(pDM_Odm); -+ -+ odm_RSSIMonitorCheck(pDM_Odm); -+ -+ if(*(pDM_Odm->pbPowerSaving) == TRUE) -+ { -+ odm_DIGbyRSSI_LPS(pDM_Odm); -+ { -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n")); -+ return; -+ } -+ -+ Phydm_CheckAdaptivity(pDM_Odm); -+ odm_UpdatePowerTrainingState(pDM_Odm); -+ odm_DIG(pDM_Odm); -+ { -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue); -+ } -+ odm_CCKPacketDetectionThresh(pDM_Odm); -+ phydm_ra_dynamic_retry_limit(pDM_Odm); -+ phydm_ra_dynamic_retry_count(pDM_Odm); -+ odm_RefreshRateAdaptiveMask(pDM_Odm); -+ odm_RefreshBasicRateMask(pDM_Odm); -+ odm_DynamicBBPowerSaving(pDM_Odm); -+ odm_EdcaTurboCheck(pDM_Odm); -+ odm_PathDiversity(pDM_Odm); -+ ODM_CfoTracking(pDM_Odm); -+ odm_DynamicTxPower(pDM_Odm); -+ odm_AntennaDiversity(pDM_Odm); -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ phydm_Beamforming_Watchdog(pDM_Odm); -+#endif -+ -+ phydm_rf_watchdog(pDM_Odm); -+ -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ -+#if (RTL8188E_SUPPORT == 1) -+ if(pDM_Odm->SupportICType==ODM_RTL8188E) -+ odm_DynamicPrimaryCCA(pDM_Odm); -+#endif -+ -+#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ -+ #if (RTL8192E_SUPPORT == 1) -+ if(pDM_Odm->SupportICType==ODM_RTL8192E) -+ odm_DynamicPrimaryCCA_Check(pDM_Odm); -+ #endif -+#endif -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ odm_dtc(pDM_Odm); -+#endif -+ -+ odm_CommonInfoSelfReset(pDM_Odm); -+ -+} -+ -+ -+// -+// Init /.. Fixed HW value. Only init time. -+// -+VOID -+ODM_CmnInfoInit( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_CMNINFO_E CmnInfo, -+ IN u4Byte Value -+ ) -+{ -+ // -+ // This section is used for init value -+ // -+ switch (CmnInfo) -+ { -+ // -+ // Fixed ODM value. -+ // -+ case ODM_CMNINFO_ABILITY: -+ pDM_Odm->SupportAbility = (u4Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_RF_TYPE: -+ pDM_Odm->RFType = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_PLATFORM: -+ pDM_Odm->SupportPlatform = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_INTERFACE: -+ pDM_Odm->SupportInterface = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_MP_TEST_CHIP: -+ pDM_Odm->bIsMPChip= (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_IC_TYPE: -+ pDM_Odm->SupportICType = Value; -+ break; -+ -+ case ODM_CMNINFO_CUT_VER: -+ pDM_Odm->CutVersion = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_FAB_VER: -+ pDM_Odm->FabVersion = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_RFE_TYPE: -+ pDM_Odm->RFEType = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_RF_ANTENNA_TYPE: -+ pDM_Odm->AntDivType= (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_BOARD_TYPE: -+ pDM_Odm->BoardType = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_PACKAGE_TYPE: -+ pDM_Odm->PackageType = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_EXT_LNA: -+ pDM_Odm->ExtLNA = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_5G_EXT_LNA: -+ pDM_Odm->ExtLNA5G = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_EXT_PA: -+ pDM_Odm->ExtPA = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_5G_EXT_PA: -+ pDM_Odm->ExtPA5G = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_GPA: -+ pDM_Odm->TypeGPA = (u2Byte)Value; -+ break; -+ case ODM_CMNINFO_APA: -+ pDM_Odm->TypeAPA = (u2Byte)Value; -+ break; -+ case ODM_CMNINFO_GLNA: -+ pDM_Odm->TypeGLNA = (u2Byte)Value; -+ break; -+ case ODM_CMNINFO_ALNA: -+ pDM_Odm->TypeALNA = (u2Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_EXT_TRSW: -+ pDM_Odm->ExtTRSW = (u1Byte)Value; -+ break; -+ case ODM_CMNINFO_EXT_LNA_GAIN: -+ pDM_Odm->ExtLNAGain = (u1Byte)Value; -+ break; -+ case ODM_CMNINFO_PATCH_ID: -+ pDM_Odm->PatchID = (u1Byte)Value; -+ break; -+ case ODM_CMNINFO_BINHCT_TEST: -+ pDM_Odm->bInHctTest = (BOOLEAN)Value; -+ break; -+ case ODM_CMNINFO_BWIFI_TEST: -+ pDM_Odm->bWIFITest = (BOOLEAN)Value; -+ break; -+ case ODM_CMNINFO_SMART_CONCURRENT: -+ pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value; -+ break; -+ case ODM_CMNINFO_DOMAIN_CODE_2G: -+ pDM_Odm->odm_Regulation2_4G = (u1Byte)Value; -+ break; -+ case ODM_CMNINFO_DOMAIN_CODE_5G: -+ pDM_Odm->odm_Regulation5G = (u1Byte)Value; -+ break; -+ case ODM_CMNINFO_CONFIG_BB_RF: -+ pDM_Odm->ConfigBBRF = (BOOLEAN)Value; -+ break; -+ case ODM_CMNINFO_IQKFWOFFLOAD: -+ pDM_Odm->IQKFWOffload = (u1Byte)Value; -+ break; -+ //To remove the compiler warning, must add an empty default statement to handle the other values. -+ default: -+ //do nothing -+ break; -+ -+ } -+ -+} -+ -+ -+VOID -+ODM_CmnInfoHook( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_CMNINFO_E CmnInfo, -+ IN PVOID pValue -+ ) -+{ -+ // -+ // Hook call by reference pointer. -+ // -+ switch (CmnInfo) -+ { -+ // -+ // Dynamic call by reference pointer. -+ // -+ case ODM_CMNINFO_MAC_PHY_MODE: -+ pDM_Odm->pMacPhyMode = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_TX_UNI: -+ pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_RX_UNI: -+ pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_WM_MODE: -+ pDM_Odm->pWirelessMode = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_BAND: -+ pDM_Odm->pBandType = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_SEC_CHNL_OFFSET: -+ pDM_Odm->pSecChOffset = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_SEC_MODE: -+ pDM_Odm->pSecurity = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_BW: -+ pDM_Odm->pBandWidth = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_CHNL: -+ pDM_Odm->pChannel = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_DMSP_GET_VALUE: -+ pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_BUDDY_ADAPTOR: -+ pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue; -+ break; -+ -+ case ODM_CMNINFO_DMSP_IS_MASTER: -+ pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_SCAN: -+ pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_POWER_SAVING: -+ pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_ONE_PATH_CCA: -+ pDM_Odm->pOnePathCCA = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_DRV_STOP: -+ pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_PNP_IN: -+ pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_INIT_ON: -+ pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_ANT_TEST: -+ pDM_Odm->pAntennaTest = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_NET_CLOSED: -+ pDM_Odm->pbNet_closed = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_FORCED_RATE: -+ pDM_Odm->pForcedDataRate = (pu2Byte)pValue; -+ break; -+ -+ case ODM_CMNINFO_FORCED_IGI_LB: -+ pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_P2P_LINK: -+ pDM_Odm->DM_DigTable.bP2PInProcess = (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_IS1ANTENNA: -+ pDM_Odm->pIs1Antenna = (BOOLEAN *)pValue; -+ break; -+ -+ case ODM_CMNINFO_RFDEFAULTPATH: -+ pDM_Odm->pRFDefaultPath= (u1Byte *)pValue; -+ break; -+ -+ case ODM_CMNINFO_FCS_MODE: -+ pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue; -+ break; -+ /*add by YuChen for beamforming PhyDM*/ -+ case ODM_CMNINFO_HUBUSBMODE: -+ pDM_Odm->HubUsbMode = (u1Byte *)pValue; -+ break; -+ case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS: -+ pDM_Odm->pbFwDwRsvdPageInProgress = (BOOLEAN *)pValue; -+ break; -+ case ODM_CMNINFO_TX_TP: -+ pDM_Odm->pCurrentTxTP = (u4Byte *)pValue; -+ break; -+ case ODM_CMNINFO_RX_TP: -+ pDM_Odm->pCurrentRxTP = (u4Byte *)pValue; -+ break; -+ case ODM_CMNINFO_SOUNDING_SEQ: -+ pDM_Odm->pSoundingSeq = (u1Byte *)pValue; -+ break; -+ //case ODM_CMNINFO_RTSTA_AID: -+ // pDM_Odm->pAidMap = (u1Byte *)pValue; -+ // break; -+ -+ //case ODM_CMNINFO_BT_COEXIST: -+ // pDM_Odm->BTCoexist = (BOOLEAN *)pValue; -+ -+ //case ODM_CMNINFO_STA_STATUS: -+ //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue; -+ //break; -+ -+ //case ODM_CMNINFO_PHY_STATUS: -+ // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue; -+ // break; -+ -+ //case ODM_CMNINFO_MAC_STATUS: -+ // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue; -+ // break; -+ //To remove the compiler warning, must add an empty default statement to handle the other values. -+ default: -+ //do nothing -+ break; -+ -+ } -+ -+} -+ -+ -+VOID -+ODM_CmnInfoPtrArrayHook( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_CMNINFO_E CmnInfo, -+ IN u2Byte Index, -+ IN PVOID pValue -+ ) -+{ -+ // -+ // Hook call by reference pointer. -+ // -+ switch (CmnInfo) -+ { -+ // -+ // Dynamic call by reference pointer. -+ // -+ case ODM_CMNINFO_STA_STATUS: -+ pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue; -+ -+ if (IS_STA_VALID(pDM_Odm->pODM_StaInfo[Index])) -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->AssociatedMacId] = Index; /*AssociatedMacId are unique bttween different Adapter*/ -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->aid] = Index; -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->mac_id] = Index; -+ #endif -+ -+ break; -+ //To remove the compiler warning, must add an empty default statement to handle the other values. -+ default: -+ //do nothing -+ break; -+ } -+ -+} -+ -+ -+// -+// Update Band/CHannel/.. The values are dynamic but non-per-packet. -+// -+VOID -+ODM_CmnInfoUpdate( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte CmnInfo, -+ IN u8Byte Value -+ ) -+{ -+ // -+ // This init variable may be changed in run time. -+ // -+ switch (CmnInfo) -+ { -+ case ODM_CMNINFO_LINK_IN_PROGRESS: -+ pDM_Odm->bLinkInProcess = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_ABILITY: -+ pDM_Odm->SupportAbility = (u4Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_RF_TYPE: -+ pDM_Odm->RFType = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_WIFI_DIRECT: -+ pDM_Odm->bWIFI_Direct = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_WIFI_DISPLAY: -+ pDM_Odm->bWIFI_Display = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_LINK: -+ pDM_Odm->bLinked = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_STATION_STATE: -+ pDM_Odm->bsta_state = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_RSSI_MIN: -+ pDM_Odm->RSSI_Min= (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_DBG_COMP: -+ pDM_Odm->DebugComponents = Value; -+ break; -+ -+ case ODM_CMNINFO_DBG_LEVEL: -+ pDM_Odm->DebugLevel = (u4Byte)Value; -+ break; -+ case ODM_CMNINFO_RA_THRESHOLD_HIGH: -+ pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_RA_THRESHOLD_LOW: -+ pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; -+ break; -+#if defined(BT_30_SUPPORT) && (BT_30_SUPPORT == 1) -+ // The following is for BT HS mode and BT coexist mechanism. -+ case ODM_CMNINFO_BT_ENABLED: -+ pDM_Odm->bBtEnabled = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_BT_HS_CONNECT_PROCESS: -+ pDM_Odm->bBtConnectProcess = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_BT_HS_RSSI: -+ pDM_Odm->btHsRssi = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_BT_OPERATION: -+ pDM_Odm->bBtHsOperation = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_BT_LIMITED_DIG: -+ pDM_Odm->bBtLimitedDig = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_BT_DIG: -+ pDM_Odm->btHsDigVal = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_BT_BUSY: -+ pDM_Odm->bBtBusy = (BOOLEAN)Value; -+ break; -+ -+ case ODM_CMNINFO_BT_DISABLE_EDCA: -+ pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value; -+ break; -+#endif -+ -+#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 -+#ifdef UNIVERSAL_REPEATER -+ case ODM_CMNINFO_VXD_LINK: -+ pDM_Odm->VXD_bLinked= (BOOLEAN)Value; -+ break; -+#endif -+#endif -+ -+ case ODM_CMNINFO_AP_TOTAL_NUM: -+ pDM_Odm->APTotalNum = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_POWER_TRAINING: -+ pDM_Odm->bDisablePowerTraining = (BOOLEAN)Value; -+ break; -+ -+/* -+ case ODM_CMNINFO_OP_MODE: -+ pDM_Odm->OPMode = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_WM_MODE: -+ pDM_Odm->WirelessMode = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_BAND: -+ pDM_Odm->BandType = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_SEC_CHNL_OFFSET: -+ pDM_Odm->SecChOffset = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_SEC_MODE: -+ pDM_Odm->Security = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_BW: -+ pDM_Odm->BandWidth = (u1Byte)Value; -+ break; -+ -+ case ODM_CMNINFO_CHNL: -+ pDM_Odm->Channel = (u1Byte)Value; -+ break; -+*/ -+ default: -+ //do nothing -+ break; -+ } -+ -+ -+} -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ) -+{ -+ -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+#if USE_WORKITEM -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ ODM_InitializeWorkItem( pDM_Odm, -+ &pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem, -+ (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback, -+ (PVOID)pAdapter, -+ "AntennaSwitchWorkitem"); -+ #endif -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ ODM_InitializeWorkItem(pDM_Odm, -+ &pDM_Odm->dm_sat_table.hl_smart_antenna_workitem, -+ (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback, -+ (PVOID)pAdapter, -+ "hl_smart_ant_workitem"); -+ -+ ODM_InitializeWorkItem(pDM_Odm, -+ &pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem, -+ (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback, -+ (PVOID)pAdapter, -+ "hl_smart_ant_decision_workitem"); -+ #endif -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->PathDivSwitchWorkitem), -+ (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback, -+ (PVOID)pAdapter, -+ "SWAS_WorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->CCKPathDiversityWorkitem), -+ (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback, -+ (PVOID)pAdapter, -+ "CCKTXPathDiversityWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->MPT_DIGWorkitem), -+ (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback, -+ (PVOID)pAdapter, -+ "MPT_DIGWorkitem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->RaRptWorkitem), -+ (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback, -+ (PVOID)pAdapter, -+ "RaRptWorkitem"); -+ -+#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->FastAntTrainingWorkitem), -+ (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback, -+ (PVOID)pAdapter, -+ "FastAntTrainingWorkitem"); -+#endif -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem), -+ (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback, -+ (PVOID)pAdapter, -+ "PSDRXHP_WorkItem"); -+ -+#endif /*#if USE_WORKITEM*/ -+ -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_EnterWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_EnterWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_LeaveWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_LeaveWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_FwNdpaWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_FwNdpaWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_ClkWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_ClkWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_RateWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_RateWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_StatusWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_StatusWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_ResetTxPathWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_ResetTxPathWorkItem"); -+ -+ ODM_InitializeWorkItem( -+ pDM_Odm, -+ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem), -+ (RT_WORKITEM_CALL_BACK)halComTxbf_GetTxRateWorkItemCallback, -+ (PVOID)pAdapter, -+ "Txbf_GetTxRateWorkItem"); -+#endif -+} -+ -+VOID -+ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ) -+{ -+#if USE_WORKITEM -+ -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ ODM_FreeWorkItem(&(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem)); -+#endif -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_workitem)); -+ ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem)); -+#endif -+ -+ ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem)); -+ ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem)); -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem)); -+#endif -+ ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem)); -+ ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem)); -+ ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem)); -+ /*ODM_FreeWorkItem((&pDM_Odm->sbdcnt_workitem));*/ -+#endif -+ -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem)); -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem)); -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem)); -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem)); -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem)); -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem)); -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem)); -+ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem)); -+#endif -+ -+} -+#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+ -+/* -+VOID -+odm_FindMinimumRSSI( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ u4Byte i; -+ u1Byte RSSI_Min = 0xFF; -+ -+ for(i=0; ipODM_StaInfo[i] != NULL) -+ if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) ) -+ { -+ if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min) -+ { -+ RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave; -+ } -+ } -+ } -+ -+ pDM_Odm->RSSI_Min = RSSI_Min; -+ -+} -+ -+VOID -+odm_IsLinked( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ u4Byte i; -+ BOOLEAN Linked = FALSE; -+ -+ for(i=0; ipODM_StaInfo[i]) ) -+ { -+ Linked = TRUE; -+ break; -+ } -+ -+ } -+ -+ pDM_Odm->bLinked = Linked; -+} -+*/ -+ -+VOID -+ODM_InitAllTimers( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#ifdef MP_TEST -+ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, -+ (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); -+#endif -+#elif(DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, -+ (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, -+ (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, -+ (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, -+ (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, -+ (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer, -+ (RT_TIMER_CALL_BACK)phydm_sbd_callback, NULL, "SbdTimer"); -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer, -+ (RT_TIMER_CALL_BACK)halComTxbf_FwNdpaTimerCallback, NULL, "Txbf_FwNdpaTimer"); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer, -+ (RT_TIMER_CALL_BACK)Beamforming_SWTimerCallback, NULL, "BeamformingTimer"); -+#endif -+#endif -+} -+ -+VOID -+ODM_CancelAllTimers( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ // -+ // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in -+ // win7 platform. -+ // -+ HAL_ADAPTER_STS_CHK(pDM_Odm) -+#endif -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#ifdef MP_TEST -+ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); -+#endif -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer); -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer); -+#endif -+#endif -+ -+} -+ -+ -+VOID -+ODM_ReleaseAllTimers( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #ifdef MP_TEST -+ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); -+ #endif -+#elif(DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer); -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if (BEAMFORMING_SUPPORT == 1) -+ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer); -+#endif -+#endif -+} -+ -+ -+//3============================================================ -+//3 Tx Power Tracking -+//3============================================================ -+ -+ -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+VOID -+ODM_InitAllThreads( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ #ifdef TPT_THREAD -+ kTPT_task_init(pDM_Odm->priv); -+ #endif -+} -+ -+VOID -+ODM_StopAllThreads( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ #ifdef TPT_THREAD -+ kTPT_task_stop(pDM_Odm->priv); -+ #endif -+} -+#endif -+ -+ -+#if( DM_ODM_SUPPORT_TYPE == ODM_WIN) -+// -+// 2011/07/26 MH Add an API for testing IQK fail case. -+// -+BOOLEAN -+ODM_CheckPowerStatus( -+ IN PADAPTER Adapter) -+{ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ RT_RF_POWER_STATE rtState; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ -+ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. -+ if (pMgntInfo->init_adpt_in_progress == TRUE) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter\n")); -+ return TRUE; -+ } -+ -+ // -+ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. -+ // -+ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); -+ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", -+ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); -+ return FALSE; -+ } -+ return TRUE; -+} -+#elif( DM_ODM_SUPPORT_TYPE == ODM_AP) -+BOOLEAN -+ODM_CheckPowerStatus( -+ IN PADAPTER Adapter) -+{ -+ /* -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ RT_RF_POWER_STATE rtState; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ -+ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. -+ if (pMgntInfo->init_adpt_in_progress == TRUE) -+ { -+ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); -+ return TRUE; -+ } -+ -+ // -+ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. -+ // -+ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); -+ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) -+ { -+ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", -+ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); -+ return FALSE; -+ } -+ */ -+ return TRUE; -+} -+#endif -+ -+// need to ODM CE Platform -+//move to here for ANT detection mechanism using -+ -+#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) -+u4Byte -+GetPSDData( -+ IN PDM_ODM_T pDM_Odm, -+ unsigned int point, -+ u1Byte initial_gain_psd) -+{ -+ //unsigned int val, rfval; -+ //int psd_report; -+ u4Byte psd_report; -+ -+ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ //Debug Message -+ //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); -+ //DbgPrint("Reg908 = 0x%x\n",val); -+ //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); -+ //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); -+ //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); -+ //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", -+ //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); -+ -+ //Set DCO frequency index, offset=(40MHz/SamplePts)*point -+ ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); -+ -+ //Start PSD calculation, Reg808[22]=0->1 -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); -+ //Need to wait for HW PSD report -+ ODM_StallExecution(1000); -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); -+ //Read PSD report, Reg8B4[15:0] -+ psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; -+ -+#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX)) -+ psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); -+#else -+ psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c); -+#endif -+ -+ return psd_report; -+ -+} -+#endif -+ -+u4Byte -+odm_ConvertTo_dB( -+ u4Byte Value) -+{ -+ u1Byte i; -+ u1Byte j; -+ u4Byte dB; -+ -+ Value = Value & 0xFFFF; -+ -+ for (i = 0; i < 12; i++) -+ { -+ if (Value <= dB_Invert_Table[i][7]) -+ { -+ break; -+ } -+ } -+ -+ if (i >= 12) -+ { -+ return (96); // maximum 96 dB -+ } -+ -+ for (j = 0; j < 8; j++) -+ { -+ if (Value <= dB_Invert_Table[i][j]) -+ { -+ break; -+ } -+ } -+ -+ dB = (i << 3) + j + 1; -+ -+ return (dB); -+} -+ -+u4Byte -+odm_ConvertTo_linear( -+ u4Byte Value) -+{ -+ u1Byte i; -+ u1Byte j; -+ u4Byte linear; -+ -+ /* 1dB~96dB */ -+ -+ Value = Value & 0xFF; -+ -+ i = (u1Byte)((Value - 1) >> 3); -+ j = (u1Byte)(Value - 1) - (i << 3); -+ -+ linear = dB_Invert_Table[i][j]; -+ -+ return (linear); -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+ODM_UpdateInitRateWorkItemCallback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER Adapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ u1Byte p = 0; -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+ ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) //DOn't know how to include &c -+ { -+ ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); -+ } -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) //DOn't know how to include &c -+ { -+ ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); -+ } -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); -+ } -+} -+#endif -+ -+// -+// ODM multi-port consideration, added by Roger, 2013.10.01. -+// -+VOID -+ODM_AsocEntry_Init( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter); -+ PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc; -+ u1Byte TotalAssocEntryNum = 0; -+ u1Byte index = 0; -+ -+ -+ ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]); -+ pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum; -+ -+ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); -+ TotalAssocEntryNum +=1; -+ -+ while(pLoopAdapter) -+ { -+ for (index = 0; index MgntInfo.AsocEntry[index]); -+ pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index; -+ } -+ -+ TotalAssocEntryNum+= index; -+ if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter))) -+ pLoopAdapter->RASupport = TRUE; -+ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); -+ } -+#endif -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ -+void odm_dtc(PDM_ODM_T pDM_Odm) -+{ -+#ifdef CONFIG_DM_RESP_TXAGC -+ #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */ -+ #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */ -+ -+ /* RSSI vs TX power step mapping: decade TX power */ -+ static const u8 dtc_table_down[]={ -+ DTC_BASE, -+ (DTC_BASE+5), -+ (DTC_BASE+10), -+ (DTC_BASE+15), -+ (DTC_BASE+20), -+ (DTC_BASE+25) -+ }; -+ -+ /* RSSI vs TX power step mapping: increase TX power */ -+ static const u8 dtc_table_up[]={ -+ DTC_DWN_BASE, -+ (DTC_DWN_BASE-5), -+ (DTC_DWN_BASE-10), -+ (DTC_DWN_BASE-15), -+ (DTC_DWN_BASE-15), -+ (DTC_DWN_BASE-20), -+ (DTC_DWN_BASE-20), -+ (DTC_DWN_BASE-25), -+ (DTC_DWN_BASE-25), -+ (DTC_DWN_BASE-30), -+ (DTC_DWN_BASE-35) -+ }; -+ -+ u8 i; -+ u8 dtc_steps=0; -+ u8 sign; -+ u8 resp_txagc=0; -+ -+ #if 0 -+ /* As DIG is disabled, DTC is also disable */ -+ if(!(pDM_Odm->SupportAbility & ODM_XXXXXX)) -+ return; -+ #endif -+ -+ if (DTC_BASE < pDM_Odm->RSSI_Min) { -+ /* need to decade the CTS TX power */ -+ sign = 1; -+ for (i=0;i= pDM_Odm->RSSI_Min) || (dtc_steps >= 6)) -+ break; -+ else -+ dtc_steps++; -+ } -+ } -+#if 0 -+ else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min) -+ { -+ /* needs to increase the CTS TX power */ -+ sign = 0; -+ dtc_steps = 1; -+ for (i=0;iRSSI_Min) || (dtc_steps>=10)) -+ break; -+ else -+ dtc_steps++; -+ } -+ } -+#endif -+ else -+ { -+ sign = 0; -+ dtc_steps = 0; -+ } -+ -+ resp_txagc = dtc_steps | (sign << 4); -+ resp_txagc = resp_txagc | (resp_txagc << 5); -+ ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc); -+ -+ DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n", -+ __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps); -+#endif /* CONFIG_RESP_TXAGC_ADJUST */ -+} -+ -+#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ -+ -+VOID -+odm_UpdatePowerTrainingState( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT); -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ u4Byte score = 0; -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n")); -+ pDM_Odm->bChangeState = FALSE; -+ -+ // Debug command -+ if(pDM_Odm->ForcePowerTrainingState) -+ { -+ if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining) -+ { -+ pDM_Odm->bChangeState = TRUE; -+ pDM_Odm->bDisablePowerTraining = TRUE; -+ } -+ else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining) -+ { -+ pDM_Odm->bChangeState = TRUE; -+ pDM_Odm->bDisablePowerTraining = FALSE; -+ } -+ -+ pDM_Odm->PT_score = 0; -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n", -+ pDM_Odm->ForcePowerTrainingState)); -+ return; -+ } -+ -+ if(!pDM_Odm->bLinked) -+ return; -+ -+ // First connect -+ if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE)) -+ { -+ pDM_Odm->PT_score = 0; -+ pDM_Odm->bChangeState = TRUE; -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n")); -+ return; -+ } -+ -+ // Compute score -+ if(pDM_Odm->NHM_cnt_0 >= 215) -+ score = 2; -+ else if(pDM_Odm->NHM_cnt_0 >= 190) -+ score = 1; // unknow state -+ else -+ { -+ u4Byte RX_Pkt_Cnt; -+ -+ RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK); -+ -+ if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt)) -+ { -+ if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all) -+ score = 0; -+ else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all) -+ score = 1; -+ else -+ score = 2; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n", -+ RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all)); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n", -+ (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK))); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n", -+ pDM_Odm->NHM_cnt_0, score)); -+ -+ // smoothing -+ pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2); -+ score = (pDM_Odm->PT_score + 32) >> 6; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n", -+ pDM_Odm->PT_score, score)); -+ -+ // Mode decision -+ if(score == 2) -+ { -+ if(pDM_Odm->bDisablePowerTraining) -+ { -+ pDM_Odm->bChangeState = TRUE; -+ pDM_Odm->bDisablePowerTraining = FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n")); -+ } -+ else if(score == 0) -+ { -+ if(!pDM_Odm->bDisablePowerTraining) -+ { -+ pDM_Odm->bChangeState = TRUE; -+ pDM_Odm->bDisablePowerTraining = TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n")); -+ } -+ -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; -+#endif -+} -+ -+ -+ -+/*===========================================================*/ -+/* The following is for compile only*/ -+/*===========================================================*/ -+/*#define TARGET_CHNL_NUM_2G_5G 59*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+u1Byte GetRightChnlPlaceforIQK(u1Byte chnl) -+{ -+ u1Byte channel_all[TARGET_CHNL_NUM_2G_5G] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, -+ 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165}; -+ u1Byte place = chnl; -+ -+ -+ if (chnl > 14) { -+ for (place = 14; place < sizeof(channel_all); place++) { -+ if (channel_all[place] == chnl) -+ return place-13; -+ } -+ } -+ -+ return 0; -+} -+ -+VOID -+FillH2CCmd92C( -+ IN PADAPTER Adapter, -+ IN u1Byte ElementID, -+ IN u4Byte CmdLen, -+ IN pu1Byte pCmdBuffer -+) -+{} -+VOID -+PHY_SetTxPowerLevel8192C( -+ IN PADAPTER Adapter, -+ IN u1Byte channel -+ ) -+{ -+} -+#endif -+/*===========================================================*/ -+ -+VOID -+phydm_NoisyDetection( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ u4Byte Total_FA_Cnt, Total_CCA_Cnt; -+ u4Byte Score = 0, i, Score_Smooth; -+ -+ Total_CCA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_CCA_all; -+ Total_FA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_all; -+ -+/* -+ if( Total_FA_Cnt*16>=Total_CCA_Cnt*14 ) // 87.5 -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*12 ) // 75 -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*10 ) // 56.25 -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*8 ) // 50 -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*7 ) // 43.75 -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*6 ) // 37.5 -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*5 ) // 31.25% -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*4 ) // 25% -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*3 ) // 18.75% -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*2 ) // 12.5% -+ -+ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*1 ) // 6.25% -+*/ -+ for(i=0;i<=16;i++) -+ { -+ if( Total_FA_Cnt*16>=Total_CCA_Cnt*(16-i) ) -+ { -+ Score = 16-i; -+ break; -+ } -+ } -+ -+ // NoisyDecision_Smooth = NoisyDecision_Smooth>>1 + (Score<<3)>>1; -+ pDM_Odm->NoisyDecision_Smooth = (pDM_Odm->NoisyDecision_Smooth>>1) + (Score<<2); -+ -+ // Round the NoisyDecision_Smooth: +"3" comes from (2^3)/2-1 -+ Score_Smooth = (Total_CCA_Cnt>=300)?((pDM_Odm->NoisyDecision_Smooth+3)>>3):0; -+ -+ pDM_Odm->NoisyDecision = (Score_Smooth>=3)?1:0; -+/* -+ switch(Score_Smooth) -+ { -+ case 0: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=0%%\n")); -+ break; -+ case 1: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=6.25%%\n")); -+ break; -+ case 2: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=12.5%%\n")); -+ break; -+ case 3: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=18.75%%\n")); -+ break; -+ case 4: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=25%%\n")); -+ break; -+ case 5: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=31.25%%\n")); -+ break; -+ case 6: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=37.5%%\n")); -+ break; -+ case 7: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=43.75%%\n")); -+ break; -+ case 8: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=50%%\n")); -+ break; -+ case 9: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=56.25%%\n")); -+ break; -+ case 10: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=62.5%%\n")); -+ break; -+ case 11: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=68.75%%\n")); -+ break; -+ case 12: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=75%%\n")); -+ break; -+ case 13: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=81.25%%\n")); -+ break; -+ case 14: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=87.5%%\n")); -+ break; -+ case 15: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=93.75%%\n")); -+ break; -+ case 16: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=100%%\n")); -+ break; -+ default: -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("[NoisyDetection] Unknown Value!! Need Check!!\n")); -+ } -+*/ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, -+ ("[NoisyDetection] Total_CCA_Cnt=%d, Total_FA_Cnt=%d, NoisyDecision_Smooth=%d, Score=%d, Score_Smooth=%d, pDM_Odm->NoisyDecision=%d\n", -+ Total_CCA_Cnt, Total_FA_Cnt, pDM_Odm->NoisyDecision_Smooth, Score, Score_Smooth, pDM_Odm->NoisyDecision)); -+ -+} -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++const u2Byte dB_Invert_Table[12][8] = { ++ { 1, 1, 1, 2, 2, 2, 2, 3}, ++ { 3, 3, 4, 4, 4, 5, 6, 6}, ++ { 7, 8, 9, 10, 11, 13, 14, 16}, ++ { 18, 20, 22, 25, 28, 32, 35, 40}, ++ { 45, 50, 56, 63, 71, 79, 89, 100}, ++ { 112, 126, 141, 158, 178, 200, 224, 251}, ++ { 282, 316, 355, 398, 447, 501, 562, 631}, ++ { 708, 794, 891, 1000, 1122, 1259, 1413, 1585}, ++ { 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, ++ { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000}, ++ { 11220, 12589, 14125, 15849, 17783, 19953, 22387, 25119}, ++ { 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} ++}; ++ ++ ++//============================================================ ++// Local Function predefine. ++//============================================================ ++ ++/* START------------COMMON INFO RELATED--------------- */ ++ ++VOID ++odm_GlobalAdapterCheck( ++ IN VOID ++ ); ++ ++//move to odm_PowerTacking.h by YuChen ++ ++ ++ ++VOID ++odm_UpdatePowerTrainingState( ++ IN PDM_ODM_T pDM_Odm ++); ++ ++//============================================================ ++//3 Export Interface ++//============================================================ ++ ++/*Y = 10*log(X)*/ ++s4Byte ++ODM_PWdB_Conversion( ++ IN s4Byte X, ++ IN u4Byte TotalBit, ++ IN u4Byte DecimalBit ++ ) ++{ ++ s4Byte Y, integer = 0, decimal = 0; ++ u4Byte i; ++ ++ if(X == 0) ++ X = 1; // log2(x), x can't be 0 ++ ++ for(i = (TotalBit-1); i > 0; i--) ++ { ++ if(X & BIT(i)) ++ { ++ integer = i; ++ if(i > 0) ++ decimal = (X & BIT(i-1))?2:0; //decimal is 0.5dB*3=1.5dB~=2dB ++ break; ++ } ++ } ++ ++ Y = 3*(integer-DecimalBit)+decimal; //10*log(x)=3*log2(x), ++ ++ return Y; ++} ++ ++s4Byte ++ODM_SignConversion( ++ IN s4Byte value, ++ IN u4Byte TotalBit ++ ) ++{ ++ if(value&BIT(TotalBit-1)) ++ value -= BIT(TotalBit); ++ return value; ++} ++ ++VOID ++ODM_InitMpDriverStatus( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ // Decide when compile time ++ #if(MP_DRIVER == 1) ++ pDM_Odm->mp_mode = TRUE; ++ #else ++ pDM_Odm->mp_mode = FALSE; ++ #endif ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ // Update information every period ++ pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; ++ ++#else ++ ++ // MP mode is always false at AP side ++ pDM_Odm->mp_mode = FALSE; ++ ++#endif ++} ++ ++VOID ++ODM_UpdateMpDriverStatus( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ // Do nothing. ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ // Update information erery period ++ pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; ++ ++#else ++ ++ // Do nothing. ++ ++#endif ++} ++ ++VOID ++PHYDM_InitTRXAntennaSetting( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if (RTL8814A_SUPPORT == 1) ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A)) { ++ u1Byte RxAnt = 0, TxAnt = 0; ++ ++ RxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH, pDM_Odm), ODM_BIT(BB_RX_PATH, pDM_Odm)); ++ TxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_TX_PATH, pDM_Odm), ODM_BIT(BB_TX_PATH, pDM_Odm)); ++ pDM_Odm->TXAntStatus = (TxAnt & 0xf); ++ pDM_Odm->RXAntStatus = (RxAnt & 0xf); ++ } ++#endif ++} ++ ++VOID ++phydm_Init_cck_setting( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte value_824,value_82c; ++ ++ pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm)); ++ ++ #if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & (ODM_RTL8192E)) ++ { ++ /* 0x824[9] = 0x82C[9] = 0xA80[7] these regiaters settinh should be equal or CCK RSSI report may inaccurate */ ++ value_824 = ODM_GetBBReg(pDM_Odm, 0x824, BIT9); ++ value_82c = ODM_GetBBReg(pDM_Odm, 0x82c, BIT9); ++ ++ if(value_824 != value_82c) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x82c , BIT9, value_824); ++ } ++ ODM_SetBBReg(pDM_Odm, 0xa80 , BIT7, value_824); ++ pDM_Odm->cck_agc_report_type = (BOOLEAN)value_824; ++ } ++ #endif ++ ++ #if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & (ODM_RTL8703B)) { ++ ++ pDM_Odm->cck_agc_report_type = ODM_GetBBReg(pDM_Odm, 0x950, BIT11) ? 1 : 0; /*1: 4bit LNA , 0: 3bit LNA */ ++ ++ if (pDM_Odm->cck_agc_report_type != 1) { ++ DbgPrint("[Warning] 8703B CCK should be 4bit LNA, ie. 0x950[11] = 1\n"); ++ /**/ ++ } ++ } ++ #endif ++ ++} ++ ++u1Byte DummyHubUsbMode = 1;/* USB 2.0 */ ++void phydm_hook_dummy_member( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ if (pDM_Odm->HubUsbMode == NULL) ++ pDM_Odm->HubUsbMode = &DummyHubUsbMode; ++} ++ ++ ++VOID ++odm_CommonInfoSelfInit( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ phydm_Init_cck_setting(pDM_Odm); ++ pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm)); ++#if (DM_ODM_SUPPORT_TYPE != ODM_CE) ++ pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp; ++#endif ++ ++ PHYDM_InitDebugSetting(pDM_Odm); ++ ODM_InitMpDriverStatus(pDM_Odm); ++ PHYDM_InitTRXAntennaSetting(pDM_Odm); ++ ++ pDM_Odm->TxRate = 0xFF; ++ ++ pDM_Odm->number_linked_client = 0; ++ pDM_Odm->pre_number_linked_client = 0; ++ pDM_Odm->number_active_client = 0; ++ pDM_Odm->pre_number_active_client = 0; ++ phydm_hook_dummy_member(pDM_Odm); ++ ++} ++ ++VOID ++odm_CommonInfoSelfUpdate( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u1Byte EntryCnt = 0, num_active_client = 0; ++ u4Byte i, OneEntry_MACID = 0, ma_rx_tp = 0; ++ PSTA_INFO_T pEntry; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[0]; ++ if(pMgntInfo->mAssoc) ++ { ++ pEntry->bUsed=TRUE; ++ for (i=0; i<6; i++) ++ pEntry->MacAddr[i] = pMgntInfo->Bssid[i]; ++ } ++ else ++ { ++ pEntry->bUsed=FALSE; ++ for (i=0; i<6; i++) ++ pEntry->MacAddr[i] = 0; ++ } ++ ++ //STA mode is linked to AP ++ if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter)) ++ pDM_Odm->bsta_state = TRUE; ++ else ++ pDM_Odm->bsta_state = FALSE; ++#endif ++ ++/* THis variable cannot be used because it is wrong*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ { ++ if (*(pDM_Odm->pSecChOffset) == 1) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; ++ else if (*(pDM_Odm->pSecChOffset) == 2) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; ++ } else if (*(pDM_Odm->pBandWidth) == ODM_BW80M) { ++ if (*(pDM_Odm->pSecChOffset) == 1) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 6; ++ else if (*(pDM_Odm->pSecChOffset) == 2) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 6; ++ } else ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); ++#else ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { ++ if (*(pDM_Odm->pSecChOffset) == 1) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; ++ else if (*(pDM_Odm->pSecChOffset) == 2) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; ++ } else ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); ++#endif ++ ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ EntryCnt++; ++ if(EntryCnt==1) ++ { ++ OneEntry_MACID=i; ++ } ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ma_rx_tp = (pEntry->rx_byte_cnt_LowMAW)<<3; /* low moving average RX TP ( bit /sec)*/ ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("ClientTP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp)); ++ ++ if (ma_rx_tp > ACTIVE_TP_THRESHOLD) ++ num_active_client++; ++ #endif ++ } ++ } ++ ++ if(EntryCnt == 1) ++ { ++ pDM_Odm->bOneEntryOnly = TRUE; ++ pDM_Odm->OneEntry_MACID=OneEntry_MACID; ++ } ++ else ++ pDM_Odm->bOneEntryOnly = FALSE; ++ ++ pDM_Odm->pre_number_linked_client = pDM_Odm->number_linked_client; ++ pDM_Odm->pre_number_active_client = pDM_Odm->number_active_client; ++ ++ pDM_Odm->number_linked_client = EntryCnt; ++ pDM_Odm->number_active_client = num_active_client; ++ ++ /* Update MP driver status*/ ++ ODM_UpdateMpDriverStatus(pDM_Odm); ++} ++ ++VOID ++odm_CommonInfoSelfReset( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0; ++#endif ++} ++ ++PVOID ++PhyDM_Get_Structure( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte Structure_Type ++) ++ ++{ ++ PVOID pStruct = NULL; ++#if RTL8195A_SUPPORT ++ switch (Structure_Type){ ++ case PHYDM_FALSEALMCNT: ++ pStruct = &FalseAlmCnt; ++ break; ++ ++ case PHYDM_CFOTRACK: ++ pStruct = &DM_CfoTrack; ++ break; ++ ++ case PHYDM_ADAPTIVITY: ++ pStruct = &(pDM_Odm->Adaptivity); ++ break; ++ ++ default: ++ break; ++ } ++ ++#else ++ switch (Structure_Type){ ++ case PHYDM_FALSEALMCNT: ++ pStruct = &(pDM_Odm->FalseAlmCnt); ++ break; ++ ++ case PHYDM_CFOTRACK: ++ pStruct = &(pDM_Odm->DM_CfoTrack); ++ break; ++ ++ case PHYDM_ADAPTIVITY: ++ pStruct = &(pDM_Odm->Adaptivity); ++ break; ++ ++ default: ++ break; ++ } ++ ++#endif ++ return pStruct; ++} ++ ++VOID ++odm_HWSetting( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (RTL8821A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & ODM_RTL8821) ++ odm_HWSetting_8821A(pDM_Odm); ++#endif ++ ++} ++ ++// ++// 2011/09/21 MH Add to describe different team necessary resource allocate?? ++// ++VOID ++ODM_DMInit( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ odm_CommonInfoSelfInit(pDM_Odm); ++ odm_DIGInit(pDM_Odm); ++ Phydm_NHMCounterStatisticsInit(pDM_Odm); ++ Phydm_AdaptivityInit(pDM_Odm); ++ phydm_ra_info_init(pDM_Odm); ++ odm_RateAdaptiveMaskInit(pDM_Odm); ++ odm_RA_ParaAdjust_init(pDM_Odm); ++ ODM_CfoTrackingInit(pDM_Odm); ++ ODM_EdcaTurboInit(pDM_Odm); ++ odm_RSSIMonitorInit(pDM_Odm); ++ phydm_rf_init(pDM_Odm); ++ odm_TXPowerTrackingInit(pDM_Odm); ++ odm_AntennaDiversityInit(pDM_Odm); ++ odm_AutoChannelSelectInit(pDM_Odm); ++ odm_PathDiversityInit(pDM_Odm); ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ phydm_Beamforming_Init(pDM_Odm); ++#endif ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ odm_DynamicBBPowerSavingInit(pDM_Odm); ++ odm_DynamicTxPowerInit(pDM_Odm); ++ ++#if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ { ++ odm_PrimaryCCA_Init(pDM_Odm); ++ ODM_RAInfo_Init_all(pDM_Odm); ++ } ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ #if (RTL8723B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ odm_SwAntDetectInit(pDM_Odm); ++ #endif ++ ++ #if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ odm_PrimaryCCA_Check_Init(pDM_Odm); ++ #endif ++ ++#endif ++ ++ } ++ ++} ++ ++VOID ++ODM_DMReset( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ ODM_AntDivReset(pDM_Odm); ++} ++ ++ ++VOID ++phydm_support_ablity_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte pre_support_ability; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ pre_support_ability = pDM_Odm->SupportAbility ; ++ PHYDM_SNPRINTF((output+used, out_len-used,"\n%s\n", "================================")); ++ if(dm_value[0] == 100) ++ { ++ PHYDM_SNPRINTF((output+used, out_len-used, "[Supportablity] PhyDM Selection\n")); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); ++ PHYDM_SNPRINTF((output+used, out_len-used, "00. (( %s ))DIG \n", ((pDM_Odm->SupportAbility & ODM_BB_DIG)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "01. (( %s ))RA_MASK \n", ((pDM_Odm->SupportAbility & ODM_BB_RA_MASK)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "02. (( %s ))DYNAMIC_TXPWR \n", ((pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "03. (( %s ))FA_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_FA_CNT)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "04. (( %s ))RSSI_MONITOR \n", ((pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "05. (( %s ))CCK_PD \n", ((pDM_Odm->SupportAbility & ODM_BB_CCK_PD)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "06. (( %s ))ANT_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "07. (( %s ))PWR_SAVE \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "08. (( %s ))PWR_TRAIN \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "09. (( %s ))RATE_ADAPTIVE \n", ((pDM_Odm->SupportAbility & ODM_BB_RATE_ADAPTIVE)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "10. (( %s ))PATH_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)?("V"):(".")))); ++ PHYDM_SNPRINTF((output+used, out_len-used, "11. (( %s ))PSD \n", ((pDM_Odm->SupportAbility & ODM_BB_PSD)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "12. (( %s ))RXHP \n", ((pDM_Odm->SupportAbility & ODM_BB_RXHP)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "13. (( %s ))ADAPTIVITY \n", ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "14. (( %s ))CFO_TRACKING \n", ((pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "15. (( %s ))NHM_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "16. (( %s ))PRIMARY_CCA \n", ((pDM_Odm->SupportAbility & ODM_BB_PRIMARY_CCA)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "20. (( %s ))EDCA_TURBO \n", ((pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "21. (( %s ))EARLY_MODE \n", ((pDM_Odm->SupportAbility & ODM_MAC_EARLY_MODE)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "24. (( %s ))TX_PWR_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "25. (( %s ))RX_GAIN_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_RX_GAIN_TRACK)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "26. (( %s ))RF_CALIBRATION \n", ((pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); ++ } ++ /* ++ else if(dm_value[0] == 101) ++ { ++ pDM_Odm->SupportAbility = 0 ; ++ DbgPrint("Disable all SupportAbility components \n"); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "Disable all SupportAbility components")); ++ } ++ */ ++ else ++ { ++ ++ if(dm_value[1] == 1) //enable ++ { ++ pDM_Odm->SupportAbility |= BIT(dm_value[0]) ; ++ if(BIT(dm_value[0]) & ODM_BB_PATH_DIV) ++ { ++ odm_PathDiversityInit(pDM_Odm); ++ } ++ } ++ else if(dm_value[1] == 2) //disable ++ { ++ pDM_Odm->SupportAbility &= ~(BIT(dm_value[0])) ; ++ } ++ else ++ { ++ //DbgPrint("\n[Warning!!!] 1:enable, 2:disable \n\n"); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "[Warning!!!] 1:enable, 2:disable")); ++ } ++ } ++ PHYDM_SNPRINTF((output+used, out_len-used,"pre-SupportAbility = 0x%x\n", pre_support_ability )); ++ PHYDM_SNPRINTF((output+used, out_len-used,"Curr-SupportAbility = 0x%x\n", pDM_Odm->SupportAbility )); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); ++} ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++// ++//tmp modify for LC Only ++// ++VOID ++ODM_DMWatchdog_LPS( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ odm_CommonInfoSelfUpdate(pDM_Odm); ++ odm_FalseAlarmCounterStatistics(pDM_Odm); ++ odm_RSSIMonitorCheck(pDM_Odm); ++ odm_DIGbyRSSI_LPS(pDM_Odm); ++ odm_CCKPacketDetectionThresh(pDM_Odm); ++ odm_CommonInfoSelfReset(pDM_Odm); ++ ++ if(*(pDM_Odm->pbPowerSaving)==TRUE) ++ return; ++} ++#endif ++// ++// 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. ++// You can not add any dummy function here, be care, you can only use DM structure ++// to perform any new ODM_DM. ++// ++VOID ++ODM_DMWatchdog( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ odm_CommonInfoSelfUpdate(pDM_Odm); ++ phydm_BasicDbgMessage(pDM_Odm); ++ odm_HWSetting(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ { ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ if( (priv->auto_channel != 0) && (priv->auto_channel != 2) )//if ACS running, do not do FA/CCA counter read ++ return; ++ } ++#endif ++ odm_FalseAlarmCounterStatistics(pDM_Odm); ++ phydm_NoisyDetection(pDM_Odm); ++ ++ odm_RSSIMonitorCheck(pDM_Odm); ++ ++ if(*(pDM_Odm->pbPowerSaving) == TRUE) ++ { ++ odm_DIGbyRSSI_LPS(pDM_Odm); ++ { ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n")); ++ return; ++ } ++ ++ Phydm_CheckAdaptivity(pDM_Odm); ++ odm_UpdatePowerTrainingState(pDM_Odm); ++ odm_DIG(pDM_Odm); ++ { ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue); ++ } ++ odm_CCKPacketDetectionThresh(pDM_Odm); ++ phydm_ra_dynamic_retry_limit(pDM_Odm); ++ phydm_ra_dynamic_retry_count(pDM_Odm); ++ odm_RefreshRateAdaptiveMask(pDM_Odm); ++ odm_RefreshBasicRateMask(pDM_Odm); ++ odm_DynamicBBPowerSaving(pDM_Odm); ++ odm_EdcaTurboCheck(pDM_Odm); ++ odm_PathDiversity(pDM_Odm); ++ ODM_CfoTracking(pDM_Odm); ++ odm_DynamicTxPower(pDM_Odm); ++ odm_AntennaDiversity(pDM_Odm); ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ phydm_Beamforming_Watchdog(pDM_Odm); ++#endif ++ ++ phydm_rf_watchdog(pDM_Odm); ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ ++#if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ odm_DynamicPrimaryCCA(pDM_Odm); ++#endif ++ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ #if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ odm_DynamicPrimaryCCA_Check(pDM_Odm); ++ #endif ++#endif ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ odm_dtc(pDM_Odm); ++#endif ++ ++ odm_CommonInfoSelfReset(pDM_Odm); ++ ++} ++ ++ ++// ++// Init /.. Fixed HW value. Only init time. ++// ++VOID ++ODM_CmnInfoInit( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u4Byte Value ++ ) ++{ ++ // ++ // This section is used for init value ++ // ++ switch (CmnInfo) ++ { ++ // ++ // Fixed ODM value. ++ // ++ case ODM_CMNINFO_ABILITY: ++ pDM_Odm->SupportAbility = (u4Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RF_TYPE: ++ pDM_Odm->RFType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_PLATFORM: ++ pDM_Odm->SupportPlatform = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_INTERFACE: ++ pDM_Odm->SupportInterface = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_MP_TEST_CHIP: ++ pDM_Odm->bIsMPChip= (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_IC_TYPE: ++ pDM_Odm->SupportICType = Value; ++ break; ++ ++ case ODM_CMNINFO_CUT_VER: ++ pDM_Odm->CutVersion = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_FAB_VER: ++ pDM_Odm->FabVersion = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RFE_TYPE: ++ pDM_Odm->RFEType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RF_ANTENNA_TYPE: ++ pDM_Odm->AntDivType= (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BOARD_TYPE: ++ pDM_Odm->BoardType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_PACKAGE_TYPE: ++ pDM_Odm->PackageType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_EXT_LNA: ++ pDM_Odm->ExtLNA = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_5G_EXT_LNA: ++ pDM_Odm->ExtLNA5G = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_EXT_PA: ++ pDM_Odm->ExtPA = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_5G_EXT_PA: ++ pDM_Odm->ExtPA5G = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_GPA: ++ pDM_Odm->TypeGPA = (u2Byte)Value; ++ break; ++ case ODM_CMNINFO_APA: ++ pDM_Odm->TypeAPA = (u2Byte)Value; ++ break; ++ case ODM_CMNINFO_GLNA: ++ pDM_Odm->TypeGLNA = (u2Byte)Value; ++ break; ++ case ODM_CMNINFO_ALNA: ++ pDM_Odm->TypeALNA = (u2Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_EXT_TRSW: ++ pDM_Odm->ExtTRSW = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_EXT_LNA_GAIN: ++ pDM_Odm->ExtLNAGain = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_PATCH_ID: ++ pDM_Odm->PatchID = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_BINHCT_TEST: ++ pDM_Odm->bInHctTest = (BOOLEAN)Value; ++ break; ++ case ODM_CMNINFO_BWIFI_TEST: ++ pDM_Odm->bWIFITest = (BOOLEAN)Value; ++ break; ++ case ODM_CMNINFO_SMART_CONCURRENT: ++ pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value; ++ break; ++ case ODM_CMNINFO_DOMAIN_CODE_2G: ++ pDM_Odm->odm_Regulation2_4G = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_DOMAIN_CODE_5G: ++ pDM_Odm->odm_Regulation5G = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_CONFIG_BB_RF: ++ pDM_Odm->ConfigBBRF = (BOOLEAN)Value; ++ break; ++ case ODM_CMNINFO_IQKFWOFFLOAD: ++ pDM_Odm->IQKFWOffload = (u1Byte)Value; ++ break; ++ //To remove the compiler warning, must add an empty default statement to handle the other values. ++ default: ++ //do nothing ++ break; ++ ++ } ++ ++} ++ ++ ++VOID ++ODM_CmnInfoHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN PVOID pValue ++ ) ++{ ++ // ++ // Hook call by reference pointer. ++ // ++ switch (CmnInfo) ++ { ++ // ++ // Dynamic call by reference pointer. ++ // ++ case ODM_CMNINFO_MAC_PHY_MODE: ++ pDM_Odm->pMacPhyMode = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_TX_UNI: ++ pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_RX_UNI: ++ pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_WM_MODE: ++ pDM_Odm->pWirelessMode = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_BAND: ++ pDM_Odm->pBandType = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_SEC_CHNL_OFFSET: ++ pDM_Odm->pSecChOffset = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_SEC_MODE: ++ pDM_Odm->pSecurity = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_BW: ++ pDM_Odm->pBandWidth = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_CHNL: ++ pDM_Odm->pChannel = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_DMSP_GET_VALUE: ++ pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_BUDDY_ADAPTOR: ++ pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue; ++ break; ++ ++ case ODM_CMNINFO_DMSP_IS_MASTER: ++ pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_SCAN: ++ pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_POWER_SAVING: ++ pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_ONE_PATH_CCA: ++ pDM_Odm->pOnePathCCA = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_DRV_STOP: ++ pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_PNP_IN: ++ pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_INIT_ON: ++ pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_ANT_TEST: ++ pDM_Odm->pAntennaTest = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_NET_CLOSED: ++ pDM_Odm->pbNet_closed = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_FORCED_RATE: ++ pDM_Odm->pForcedDataRate = (pu2Byte)pValue; ++ break; ++ ++ case ODM_CMNINFO_FORCED_IGI_LB: ++ pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_P2P_LINK: ++ pDM_Odm->DM_DigTable.bP2PInProcess = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_IS1ANTENNA: ++ pDM_Odm->pIs1Antenna = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_RFDEFAULTPATH: ++ pDM_Odm->pRFDefaultPath= (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_FCS_MODE: ++ pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue; ++ break; ++ /*add by YuChen for beamforming PhyDM*/ ++ case ODM_CMNINFO_HUBUSBMODE: ++ pDM_Odm->HubUsbMode = (u1Byte *)pValue; ++ break; ++ case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS: ++ pDM_Odm->pbFwDwRsvdPageInProgress = (BOOLEAN *)pValue; ++ break; ++ case ODM_CMNINFO_TX_TP: ++ pDM_Odm->pCurrentTxTP = (u4Byte *)pValue; ++ break; ++ case ODM_CMNINFO_RX_TP: ++ pDM_Odm->pCurrentRxTP = (u4Byte *)pValue; ++ break; ++ case ODM_CMNINFO_SOUNDING_SEQ: ++ pDM_Odm->pSoundingSeq = (u1Byte *)pValue; ++ break; ++ //case ODM_CMNINFO_RTSTA_AID: ++ // pDM_Odm->pAidMap = (u1Byte *)pValue; ++ // break; ++ ++ //case ODM_CMNINFO_BT_COEXIST: ++ // pDM_Odm->BTCoexist = (BOOLEAN *)pValue; ++ ++ //case ODM_CMNINFO_STA_STATUS: ++ //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue; ++ //break; ++ ++ //case ODM_CMNINFO_PHY_STATUS: ++ // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue; ++ // break; ++ ++ //case ODM_CMNINFO_MAC_STATUS: ++ // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue; ++ // break; ++ //To remove the compiler warning, must add an empty default statement to handle the other values. ++ default: ++ //do nothing ++ break; ++ ++ } ++ ++} ++ ++ ++VOID ++ODM_CmnInfoPtrArrayHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u2Byte Index, ++ IN PVOID pValue ++ ) ++{ ++ // ++ // Hook call by reference pointer. ++ // ++ switch (CmnInfo) ++ { ++ // ++ // Dynamic call by reference pointer. ++ // ++ case ODM_CMNINFO_STA_STATUS: ++ pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue; ++ ++ if (IS_STA_VALID(pDM_Odm->pODM_StaInfo[Index])) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->AssociatedMacId] = Index; /*AssociatedMacId are unique bttween different Adapter*/ ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->aid] = Index; ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->mac_id] = Index; ++ #endif ++ ++ break; ++ //To remove the compiler warning, must add an empty default statement to handle the other values. ++ default: ++ //do nothing ++ break; ++ } ++ ++} ++ ++ ++// ++// Update Band/CHannel/.. The values are dynamic but non-per-packet. ++// ++VOID ++ODM_CmnInfoUpdate( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte CmnInfo, ++ IN u8Byte Value ++ ) ++{ ++ // ++ // This init variable may be changed in run time. ++ // ++ switch (CmnInfo) ++ { ++ case ODM_CMNINFO_LINK_IN_PROGRESS: ++ pDM_Odm->bLinkInProcess = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_ABILITY: ++ pDM_Odm->SupportAbility = (u4Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RF_TYPE: ++ pDM_Odm->RFType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_WIFI_DIRECT: ++ pDM_Odm->bWIFI_Direct = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_WIFI_DISPLAY: ++ pDM_Odm->bWIFI_Display = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_LINK: ++ pDM_Odm->bLinked = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_STATION_STATE: ++ pDM_Odm->bsta_state = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_RSSI_MIN: ++ pDM_Odm->RSSI_Min= (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_DBG_COMP: ++ pDM_Odm->DebugComponents = Value; ++ break; ++ ++ case ODM_CMNINFO_DBG_LEVEL: ++ pDM_Odm->DebugLevel = (u4Byte)Value; ++ break; ++ case ODM_CMNINFO_RA_THRESHOLD_HIGH: ++ pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RA_THRESHOLD_LOW: ++ pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; ++ break; ++#if defined(BT_30_SUPPORT) && (BT_30_SUPPORT == 1) ++ // The following is for BT HS mode and BT coexist mechanism. ++ case ODM_CMNINFO_BT_ENABLED: ++ pDM_Odm->bBtEnabled = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_HS_CONNECT_PROCESS: ++ pDM_Odm->bBtConnectProcess = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_HS_RSSI: ++ pDM_Odm->btHsRssi = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_OPERATION: ++ pDM_Odm->bBtHsOperation = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_LIMITED_DIG: ++ pDM_Odm->bBtLimitedDig = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_DIG: ++ pDM_Odm->btHsDigVal = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_BUSY: ++ pDM_Odm->bBtBusy = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_DISABLE_EDCA: ++ pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value; ++ break; ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 ++#ifdef UNIVERSAL_REPEATER ++ case ODM_CMNINFO_VXD_LINK: ++ pDM_Odm->VXD_bLinked= (BOOLEAN)Value; ++ break; ++#endif ++#endif ++ ++ case ODM_CMNINFO_AP_TOTAL_NUM: ++ pDM_Odm->APTotalNum = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_POWER_TRAINING: ++ pDM_Odm->bDisablePowerTraining = (BOOLEAN)Value; ++ break; ++ ++/* ++ case ODM_CMNINFO_OP_MODE: ++ pDM_Odm->OPMode = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_WM_MODE: ++ pDM_Odm->WirelessMode = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BAND: ++ pDM_Odm->BandType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_SEC_CHNL_OFFSET: ++ pDM_Odm->SecChOffset = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_SEC_MODE: ++ pDM_Odm->Security = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BW: ++ pDM_Odm->BandWidth = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_CHNL: ++ pDM_Odm->Channel = (u1Byte)Value; ++ break; ++*/ ++ default: ++ //do nothing ++ break; ++ } ++ ++ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ) ++{ ++ ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++#if USE_WORKITEM ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_InitializeWorkItem( pDM_Odm, ++ &pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem, ++ (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback, ++ (PVOID)pAdapter, ++ "AntennaSwitchWorkitem"); ++ #endif ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ODM_InitializeWorkItem(pDM_Odm, ++ &pDM_Odm->dm_sat_table.hl_smart_antenna_workitem, ++ (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback, ++ (PVOID)pAdapter, ++ "hl_smart_ant_workitem"); ++ ++ ODM_InitializeWorkItem(pDM_Odm, ++ &pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem, ++ (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback, ++ (PVOID)pAdapter, ++ "hl_smart_ant_decision_workitem"); ++ #endif ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->PathDivSwitchWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback, ++ (PVOID)pAdapter, ++ "SWAS_WorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->CCKPathDiversityWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback, ++ (PVOID)pAdapter, ++ "CCKTXPathDiversityWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->MPT_DIGWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback, ++ (PVOID)pAdapter, ++ "MPT_DIGWorkitem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->RaRptWorkitem), ++ (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback, ++ (PVOID)pAdapter, ++ "RaRptWorkitem"); ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->FastAntTrainingWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback, ++ (PVOID)pAdapter, ++ "FastAntTrainingWorkitem"); ++#endif ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback, ++ (PVOID)pAdapter, ++ "PSDRXHP_WorkItem"); ++ ++#endif /*#if USE_WORKITEM*/ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_EnterWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_EnterWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_LeaveWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_LeaveWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_FwNdpaWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_FwNdpaWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_ClkWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_ClkWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_RateWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_RateWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_StatusWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_StatusWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_ResetTxPathWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_ResetTxPathWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_GetTxRateWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_GetTxRateWorkItem"); ++#endif ++} ++ ++VOID ++ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ) ++{ ++#if USE_WORKITEM ++ ++#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_FreeWorkItem(&(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem)); ++#endif ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_workitem)); ++ ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem)); ++#endif ++ ++ ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem)); ++ ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem)); ++#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) ++ ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem)); ++#endif ++ ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem)); ++ ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem)); ++ ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem)); ++ /*ODM_FreeWorkItem((&pDM_Odm->sbdcnt_workitem));*/ ++#endif ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem)); ++#endif ++ ++} ++#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++ ++/* ++VOID ++odm_FindMinimumRSSI( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte i; ++ u1Byte RSSI_Min = 0xFF; ++ ++ for(i=0; ipODM_StaInfo[i] != NULL) ++ if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) ) ++ { ++ if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min) ++ { ++ RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave; ++ } ++ } ++ } ++ ++ pDM_Odm->RSSI_Min = RSSI_Min; ++ ++} ++ ++VOID ++odm_IsLinked( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte i; ++ BOOLEAN Linked = FALSE; ++ ++ for(i=0; ipODM_StaInfo[i]) ) ++ { ++ Linked = TRUE; ++ break; ++ } ++ ++ } ++ ++ pDM_Odm->bLinked = Linked; ++} ++*/ ++ ++VOID ++ODM_InitAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#ifdef MP_TEST ++ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, ++ (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); ++#endif ++#elif(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, ++ (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, ++ (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, ++ (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, ++ (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, ++ (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer, ++ (RT_TIMER_CALL_BACK)phydm_sbd_callback, NULL, "SbdTimer"); ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer, ++ (RT_TIMER_CALL_BACK)halComTxbf_FwNdpaTimerCallback, NULL, "Txbf_FwNdpaTimer"); ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer, ++ (RT_TIMER_CALL_BACK)Beamforming_SWTimerCallback, NULL, "BeamformingTimer"); ++#endif ++#endif ++} ++ ++VOID ++ODM_CancelAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ // ++ // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in ++ // win7 platform. ++ // ++ HAL_ADAPTER_STS_CHK(pDM_Odm) ++#endif ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#ifdef MP_TEST ++ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++#endif ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer); ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer); ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer); ++#endif ++#endif ++ ++} ++ ++ ++VOID ++ODM_ReleaseAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #ifdef MP_TEST ++ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++ #endif ++#elif(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer); ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer); ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer); ++#endif ++#endif ++} ++ ++ ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++VOID ++ODM_InitAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ #ifdef TPT_THREAD ++ kTPT_task_init(pDM_Odm->priv); ++ #endif ++} ++ ++VOID ++ODM_StopAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ #ifdef TPT_THREAD ++ kTPT_task_stop(pDM_Odm->priv); ++ #endif ++} ++#endif ++ ++ ++#if( DM_ODM_SUPPORT_TYPE == ODM_WIN) ++// ++// 2011/07/26 MH Add an API for testing IQK fail case. ++// ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter\n")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", ++ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++ return TRUE; ++} ++#elif( DM_ODM_SUPPORT_TYPE == ODM_AP) ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++ /* ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", ++ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++ */ ++ return TRUE; ++} ++#endif ++ ++// need to ODM CE Platform ++//move to here for ANT detection mechanism using ++ ++#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) ++u4Byte ++GetPSDData( ++ IN PDM_ODM_T pDM_Odm, ++ unsigned int point, ++ u1Byte initial_gain_psd) ++{ ++ //unsigned int val, rfval; ++ //int psd_report; ++ u4Byte psd_report; ++ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //Debug Message ++ //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); ++ //DbgPrint("Reg908 = 0x%x\n",val); ++ //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); ++ //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); ++ //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); ++ //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", ++ //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); ++ ++ //Set DCO frequency index, offset=(40MHz/SamplePts)*point ++ ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); ++ ++ //Start PSD calculation, Reg808[22]=0->1 ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); ++ //Need to wait for HW PSD report ++ ODM_StallExecution(1000); ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); ++ //Read PSD report, Reg8B4[15:0] ++ psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; ++ ++#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX)) ++ psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); ++#else ++ psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c); ++#endif ++ ++ return psd_report; ++ ++} ++#endif ++ ++u4Byte ++odm_ConvertTo_dB( ++ u4Byte Value) ++{ ++ u1Byte i; ++ u1Byte j; ++ u4Byte dB; ++ ++ Value = Value & 0xFFFF; ++ ++ for (i = 0; i < 12; i++) ++ { ++ if (Value <= dB_Invert_Table[i][7]) ++ { ++ break; ++ } ++ } ++ ++ if (i >= 12) ++ { ++ return (96); // maximum 96 dB ++ } ++ ++ for (j = 0; j < 8; j++) ++ { ++ if (Value <= dB_Invert_Table[i][j]) ++ { ++ break; ++ } ++ } ++ ++ dB = (i << 3) + j + 1; ++ ++ return (dB); ++} ++ ++u4Byte ++odm_ConvertTo_linear( ++ u4Byte Value) ++{ ++ u1Byte i; ++ u1Byte j; ++ u4Byte linear; ++ ++ /* 1dB~96dB */ ++ ++ Value = Value & 0xFF; ++ ++ i = (u1Byte)((Value - 1) >> 3); ++ j = (u1Byte)(Value - 1) - (i << 3); ++ ++ linear = dB_Invert_Table[i][j]; ++ ++ return (linear); ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_UpdateInitRateWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ u1Byte p = 0; ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) //DOn't know how to include &c ++ { ++ ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); ++ } ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) //DOn't know how to include &c ++ { ++ ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); ++ } ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++ } ++} ++#endif ++ ++// ++// ODM multi-port consideration, added by Roger, 2013.10.01. ++// ++VOID ++ODM_AsocEntry_Init( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter); ++ PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc; ++ u1Byte TotalAssocEntryNum = 0; ++ u1Byte index = 0; ++ ++ ++ ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]); ++ pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum; ++ ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ TotalAssocEntryNum +=1; ++ ++ while(pLoopAdapter) ++ { ++ for (index = 0; index MgntInfo.AsocEntry[index]); ++ pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index; ++ } ++ ++ TotalAssocEntryNum+= index; ++ if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter))) ++ pLoopAdapter->RASupport = TRUE; ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ } ++#endif ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ ++void odm_dtc(PDM_ODM_T pDM_Odm) ++{ ++#ifdef CONFIG_DM_RESP_TXAGC ++ #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */ ++ #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */ ++ ++ /* RSSI vs TX power step mapping: decade TX power */ ++ static const u8 dtc_table_down[]={ ++ DTC_BASE, ++ (DTC_BASE+5), ++ (DTC_BASE+10), ++ (DTC_BASE+15), ++ (DTC_BASE+20), ++ (DTC_BASE+25) ++ }; ++ ++ /* RSSI vs TX power step mapping: increase TX power */ ++ static const u8 dtc_table_up[]={ ++ DTC_DWN_BASE, ++ (DTC_DWN_BASE-5), ++ (DTC_DWN_BASE-10), ++ (DTC_DWN_BASE-15), ++ (DTC_DWN_BASE-15), ++ (DTC_DWN_BASE-20), ++ (DTC_DWN_BASE-20), ++ (DTC_DWN_BASE-25), ++ (DTC_DWN_BASE-25), ++ (DTC_DWN_BASE-30), ++ (DTC_DWN_BASE-35) ++ }; ++ ++ u8 i; ++ u8 dtc_steps=0; ++ u8 sign; ++ u8 resp_txagc=0; ++ ++ #if 0 ++ /* As DIG is disabled, DTC is also disable */ ++ if(!(pDM_Odm->SupportAbility & ODM_XXXXXX)) ++ return; ++ #endif ++ ++ if (DTC_BASE < pDM_Odm->RSSI_Min) { ++ /* need to decade the CTS TX power */ ++ sign = 1; ++ for (i=0;i= pDM_Odm->RSSI_Min) || (dtc_steps >= 6)) ++ break; ++ else ++ dtc_steps++; ++ } ++ } ++#if 0 ++ else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min) ++ { ++ /* needs to increase the CTS TX power */ ++ sign = 0; ++ dtc_steps = 1; ++ for (i=0;iRSSI_Min) || (dtc_steps>=10)) ++ break; ++ else ++ dtc_steps++; ++ } ++ } ++#endif ++ else ++ { ++ sign = 0; ++ dtc_steps = 0; ++ } ++ ++ resp_txagc = dtc_steps | (sign << 4); ++ resp_txagc = resp_txagc | (resp_txagc << 5); ++ ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc); ++ ++ DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n", ++ __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps); ++#endif /* CONFIG_RESP_TXAGC_ADJUST */ ++} ++ ++#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ ++ ++VOID ++odm_UpdatePowerTrainingState( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT); ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ u4Byte score = 0; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n")); ++ pDM_Odm->bChangeState = FALSE; ++ ++ // Debug command ++ if(pDM_Odm->ForcePowerTrainingState) ++ { ++ if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = TRUE; ++ } ++ else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = FALSE; ++ } ++ ++ pDM_Odm->PT_score = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n", ++ pDM_Odm->ForcePowerTrainingState)); ++ return; ++ } ++ ++ if(!pDM_Odm->bLinked) ++ return; ++ ++ // First connect ++ if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE)) ++ { ++ pDM_Odm->PT_score = 0; ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n")); ++ return; ++ } ++ ++ // Compute score ++ if(pDM_Odm->NHM_cnt_0 >= 215) ++ score = 2; ++ else if(pDM_Odm->NHM_cnt_0 >= 190) ++ score = 1; // unknow state ++ else ++ { ++ u4Byte RX_Pkt_Cnt; ++ ++ RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK); ++ ++ if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt)) ++ { ++ if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all) ++ score = 0; ++ else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all) ++ score = 1; ++ else ++ score = 2; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n", ++ RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all)); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n", ++ (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n", ++ pDM_Odm->NHM_cnt_0, score)); ++ ++ // smoothing ++ pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2); ++ score = (pDM_Odm->PT_score + 32) >> 6; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n", ++ pDM_Odm->PT_score, score)); ++ ++ // Mode decision ++ if(score == 2) ++ { ++ if(pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n")); ++ } ++ else if(score == 0) ++ { ++ if(!pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n")); ++ } ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++#endif ++} ++ ++ ++ ++/*===========================================================*/ ++/* The following is for compile only*/ ++/*===========================================================*/ ++/*#define TARGET_CHNL_NUM_2G_5G 59*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++u1Byte GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[TARGET_CHNL_NUM_2G_5G] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, ++ 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165}; ++ u1Byte place = chnl; ++ ++ ++ if (chnl > 14) { ++ for (place = 14; place < sizeof(channel_all); place++) { ++ if (channel_all[place] == chnl) ++ return place-13; ++ } ++ } ++ ++ return 0; ++} ++ ++VOID ++FillH2CCmd92C( ++ IN PADAPTER Adapter, ++ IN u1Byte ElementID, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++) ++{} ++VOID ++PHY_SetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ IN u1Byte channel ++ ) ++{ ++} ++#endif ++/*===========================================================*/ ++ ++VOID ++phydm_NoisyDetection( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte Total_FA_Cnt, Total_CCA_Cnt; ++ u4Byte Score = 0, i, Score_Smooth; ++ ++ Total_CCA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_CCA_all; ++ Total_FA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_all; ++ ++/* ++ if( Total_FA_Cnt*16>=Total_CCA_Cnt*14 ) // 87.5 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*12 ) // 75 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*10 ) // 56.25 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*8 ) // 50 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*7 ) // 43.75 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*6 ) // 37.5 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*5 ) // 31.25% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*4 ) // 25% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*3 ) // 18.75% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*2 ) // 12.5% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*1 ) // 6.25% ++*/ ++ for(i=0;i<=16;i++) ++ { ++ if( Total_FA_Cnt*16>=Total_CCA_Cnt*(16-i) ) ++ { ++ Score = 16-i; ++ break; ++ } ++ } ++ ++ // NoisyDecision_Smooth = NoisyDecision_Smooth>>1 + (Score<<3)>>1; ++ pDM_Odm->NoisyDecision_Smooth = (pDM_Odm->NoisyDecision_Smooth>>1) + (Score<<2); ++ ++ // Round the NoisyDecision_Smooth: +"3" comes from (2^3)/2-1 ++ Score_Smooth = (Total_CCA_Cnt>=300)?((pDM_Odm->NoisyDecision_Smooth+3)>>3):0; ++ ++ pDM_Odm->NoisyDecision = (Score_Smooth>=3)?1:0; ++/* ++ switch(Score_Smooth) ++ { ++ case 0: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=0%%\n")); ++ break; ++ case 1: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=6.25%%\n")); ++ break; ++ case 2: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=12.5%%\n")); ++ break; ++ case 3: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=18.75%%\n")); ++ break; ++ case 4: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=25%%\n")); ++ break; ++ case 5: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=31.25%%\n")); ++ break; ++ case 6: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=37.5%%\n")); ++ break; ++ case 7: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=43.75%%\n")); ++ break; ++ case 8: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=50%%\n")); ++ break; ++ case 9: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=56.25%%\n")); ++ break; ++ case 10: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=62.5%%\n")); ++ break; ++ case 11: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=68.75%%\n")); ++ break; ++ case 12: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=75%%\n")); ++ break; ++ case 13: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=81.25%%\n")); ++ break; ++ case 14: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=87.5%%\n")); ++ break; ++ case 15: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=93.75%%\n")); ++ break; ++ case 16: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=100%%\n")); ++ break; ++ default: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Unknown Value!! Need Check!!\n")); ++ } ++*/ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_CCA_Cnt=%d, Total_FA_Cnt=%d, NoisyDecision_Smooth=%d, Score=%d, Score_Smooth=%d, pDM_Odm->NoisyDecision=%d\n", ++ Total_CCA_Cnt, Total_FA_Cnt, pDM_Odm->NoisyDecision_Smooth, Score, Score_Smooth, pDM_Odm->NoisyDecision)); ++ ++} ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm.h new file mode 100644 -index 000000000..0d13d8e96 +index 0000000..0e8b88e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm.h @@ -0,0 +1,1448 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ -+#ifndef __HALDMOUTSRC_H__ -+#define __HALDMOUTSRC_H__ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "phydm_pre_define.h" -+#include "phydm_dig.h" -+#include "phydm_edcaturbocheck.h" -+#include "phydm_pathdiv.h" -+#include "phydm_antdiv.h" -+#include "phydm_antdect.h" -+#include "phydm_dynamicbbpowersaving.h" -+#include "phydm_rainfo.h" -+#include "phydm_dynamictxpower.h" -+#include "phydm_cfotracking.h" -+#include "phydm_acs.h" -+#include "phydm_adaptivity.h" -+ -+ -+#if (RTL8814A_SUPPORT == 1) -+#include "rtl8814a/phydm_iqk_8814a.h" -+#endif -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#include "halphyrf_ap.h" -+#include "phydm_powertracking_ap.h" -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+#include "phydm_beamforming.h" -+#include "phydm_noisemonitor.h" -+#include "halphyrf_ce.h" -+#include "phydm_powertracking_ce.h" -+#endif -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+#include "phydm_beamforming.h" -+#include "phydm_rxhp.h" -+#include "halphyrf_win.h" -+#include "phydm_powertracking_win.h" -+#endif -+ -+//============================================================ -+// Definition -+//============================================================ -+// -+// 2011/09/22 MH Define all team supprt ability. -+// -+ -+// -+// 2011/09/22 MH Define for all teams. Please Define the constan in your precomp header. -+// -+//#define DM_ODM_SUPPORT_AP 0 -+//#define DM_ODM_SUPPORT_ADSL 0 -+//#define DM_ODM_SUPPORT_CE 0 -+//#define DM_ODM_SUPPORT_MP 1 -+ -+// -+// 2011/09/28 MH Define ODM SW team support flag. -+// -+ -+//For SW AntDiv, PathDiv, 8192C AntDiv joint use -+#define TP_MODE 0 -+#define RSSI_MODE 1 -+ -+#define TRAFFIC_LOW 0 -+#define TRAFFIC_HIGH 1 -+#define TRAFFIC_ULTRA_LOW 2 -+#define TRAFFIC_MID 3 -+ -+ -+#define NONE 0 -+ -+ -+ -+ -+//8723A High Power IGI Setting -+#define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND 0x22 -+#define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND 0x28 -+#define DM_DIG_HIGH_PWR_THRESHOLD 0x3a -+#define DM_DIG_LOW_PWR_THRESHOLD 0x14 -+ -+ -+//============================================================ -+// structure and define -+//============================================================ -+ -+// -+// 2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement. -+// We need to remove to other position??? -+// -+#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+typedef struct rtl8192cd_priv { -+ u1Byte temp; -+ -+}rtl8192cd_priv, *prtl8192cd_priv; -+#endif -+ -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+typedef struct _ADAPTER{ -+ u1Byte temp; -+ #ifdef AP_BUILD_WORKAROUND -+ HAL_DATA_TYPE* temp2; -+ prtl8192cd_priv priv; -+ #endif -+}ADAPTER, *PADAPTER; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+typedef struct _WLAN_STA{ -+ u1Byte temp; -+} WLAN_STA, *PRT_WLAN_STA; -+ -+#endif -+ -+typedef struct _Dynamic_Primary_CCA{ -+ u1Byte PriCCA_flag; -+ u1Byte intf_flag; -+ u1Byte intf_type; -+ u1Byte DupRTS_flag; -+ u1Byte Monitor_flag; -+ u1Byte CH_offset; -+ u1Byte MF_state; -+}Pri_CCA_T, *pPri_CCA_T; -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ -+#ifdef ADSL_AP_BUILD_WORKAROUND -+#define MAX_TOLERANCE 5 -+#define IQK_DELAY_TIME 1 //ms -+#endif -+#if 0//defined in 8192cd.h -+// -+// Indicate different AP vendor for IOT issue. -+// -+typedef enum _HT_IOT_PEER -+{ -+ HT_IOT_PEER_UNKNOWN = 0, -+ HT_IOT_PEER_REALTEK = 1, -+ HT_IOT_PEER_REALTEK_92SE = 2, -+ HT_IOT_PEER_BROADCOM = 3, -+ HT_IOT_PEER_RALINK = 4, -+ HT_IOT_PEER_ATHEROS = 5, -+ HT_IOT_PEER_CISCO = 6, -+ HT_IOT_PEER_MERU = 7, -+ HT_IOT_PEER_MARVELL = 8, -+ HT_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 -+ HT_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP -+ HT_IOT_PEER_AIRGO = 11, -+ HT_IOT_PEER_INTEL = 12, -+ HT_IOT_PEER_RTK_APCLIENT = 13, -+ HT_IOT_PEER_REALTEK_81XX = 14, -+ HT_IOT_PEER_REALTEK_WOW = 15, -+ HT_IOT_PEER_MAX = 16 -+}HT_IOT_PEER_E, *PHTIOT_PEER_E; -+#endif -+#endif//#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#define DM_Type_ByFW 0 -+#define DM_Type_ByDriver 1 -+ -+// -+// Declare for common info -+// -+ -+#define IQK_THRESHOLD 8 -+#define DPK_THRESHOLD 4 -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+__PACK typedef struct _ODM_Phy_Status_Info_ -+{ -+ u1Byte RxPWDBAll; -+ u1Byte SignalQuality; /* in 0-100 index. */ -+ u1Byte RxMIMOSignalStrength[4]; /* in 0~100 index */ -+ s1Byte RxMIMOSignalQuality[4]; /* EVM */ -+ s1Byte RxSNR[4]; /* per-path's SNR */ -+#if (RTL8822B_SUPPORT == 1) -+ u1Byte RxCount; /* RX path counter---*/ -+#endif -+ u1Byte BandWidth; -+ -+} __WLAN_ATTRIB_PACK__ ODM_PHY_INFO_T, *PODM_PHY_INFO_T; -+ -+typedef struct _ODM_Phy_Status_Info_Append_ -+{ -+ u1Byte MAC_CRC32; -+ -+}ODM_PHY_INFO_Append_T,*PODM_PHY_INFO_Append_T; -+ -+#else -+ -+typedef struct _ODM_Phy_Status_Info_ -+{ -+ // -+ // Be care, if you want to add any element please insert between -+ // RxPWDBAll & SignalStrength. -+ // -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ u4Byte RxPWDBAll; -+#else -+ u1Byte RxPWDBAll; -+#endif -+ u1Byte SignalQuality; /* in 0-100 index. */ -+ s1Byte RxMIMOSignalQuality[4]; /* per-path's EVM */ -+ u1Byte RxMIMOEVMdbm[4]; /* per-path's EVM dbm */ -+ u1Byte RxMIMOSignalStrength[4]; /* in 0~100 index */ -+ s2Byte Cfo_short[4]; /* per-path's Cfo_short */ -+ s2Byte Cfo_tail[4]; /* per-path's Cfo_tail */ -+ s1Byte RxPower; /* in dBm Translate from PWdB */ -+ s1Byte RecvSignalPower; /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */ -+ u1Byte BTRxRSSIPercentage; -+ u1Byte SignalStrength; /* in 0-100 index. */ -+ s1Byte RxPwr[4]; /* per-path's pwdb */ -+ s1Byte RxSNR[4]; /* per-path's SNR */ -+#if (RTL8822B_SUPPORT == 1) -+ u1Byte RxCount:2; /* RX path counter---*/ -+ u1Byte BandWidth:2; -+ u1Byte rxsc:4; /* sub-channel---*/ -+#else -+ u1Byte BandWidth; -+#endif -+ u1Byte btCoexPwrAdjust; -+#if (RTL8822B_SUPPORT == 1) -+ u1Byte channel; /* channel number---*/ -+ BOOLEAN bMuPacket; /* is MU packet or not---*/ -+ BOOLEAN bBeamformed; /* BF packet---*/ -+#endif -+}ODM_PHY_INFO_T,*PODM_PHY_INFO_T; -+#endif -+ -+typedef struct _ODM_Per_Pkt_Info_ -+{ -+ //u1Byte Rate; -+ u1Byte DataRate; -+ u1Byte StationID; -+ BOOLEAN bPacketMatchBSSID; -+ BOOLEAN bPacketToSelf; -+ BOOLEAN bPacketBeacon; -+ BOOLEAN bToSelf; -+}ODM_PACKET_INFO_T,*PODM_PACKET_INFO_T; -+ -+ -+typedef struct _ODM_Phy_Dbg_Info_ -+{ -+ //ODM Write,debug info -+ s1Byte RxSNRdB[4]; -+ u4Byte NumQryPhyStatus; -+ u4Byte NumQryPhyStatusCCK; -+ u4Byte NumQryPhyStatusOFDM; -+#if (RTL8822B_SUPPORT == 1) -+ u4Byte NumQryMuPkt; -+ u4Byte NumQryBfPkt; -+#endif -+ u1Byte NumQryBeaconPkt; -+ //Others -+ s4Byte RxEVM[4]; -+ -+}ODM_PHY_DBG_INFO_T; -+ -+ -+typedef struct _ODM_Mac_Status_Info_ -+{ -+ u1Byte test; -+ -+}ODM_MAC_INFO; -+ -+// -+// 2011/20/20 MH For MP driver RT_WLAN_STA = STA_INFO_T -+// Please declare below ODM relative info in your STA info structure. -+// -+#if 1 -+typedef struct _ODM_STA_INFO{ -+ // Driver Write -+ BOOLEAN bUsed; // record the sta status link or not? -+ //u1Byte WirelessMode; // -+ u1Byte IOTPeer; // Enum value. HT_IOT_PEER_E -+ -+ // ODM Write -+ //1 PHY_STATUS_INFO -+ u1Byte RSSI_Path[4]; // -+ u1Byte RSSI_Ave; -+ u1Byte RXEVM[4]; -+ u1Byte RXSNR[4]; -+ -+ // ODM Write -+ //1 TX_INFO (may changed by IC) -+ //TX_INFO_T pTxInfo; // Define in IC folder. Move lower layer. -+#if 0 -+ u1Byte ANTSEL_A; //in Jagar: 4bit; others: 2bit -+ u1Byte ANTSEL_B; //in Jagar: 4bit; others: 2bit -+ u1Byte ANTSEL_C; //only in Jagar: 4bit -+ u1Byte ANTSEL_D; //only in Jagar: 4bit -+ u1Byte TX_ANTL; //not in Jagar: 2bit -+ u1Byte TX_ANT_HT; //not in Jagar: 2bit -+ u1Byte TX_ANT_CCK; //not in Jagar: 2bit -+ u1Byte TXAGC_A; //not in Jagar: 4bit -+ u1Byte TXAGC_B; //not in Jagar: 4bit -+ u1Byte TXPWR_OFFSET; //only in Jagar: 3bit -+ u1Byte TX_ANT; //only in Jagar: 4bit for TX_ANTL/TX_ANTHT/TX_ANT_CCK -+#endif -+ -+ // -+ // Please use compile flag to disabe the strcutrue for other IC except 88E. -+ // Move To lower layer. -+ // -+ // ODM Write Wilson will handle this part(said by Luke.Lee) -+ //TX_RPT_T pTxRpt; // Define in IC folder. Move lower layer. -+#if 0 -+ //1 For 88E RA (don't redefine the naming) -+ u1Byte rate_id; -+ u1Byte rate_SGI; -+ u1Byte rssi_sta_ra; -+ u1Byte SGI_enable; -+ u1Byte Decision_rate; -+ u1Byte Pre_rate; -+ u1Byte Active; -+ -+ // Driver write Wilson handle. -+ //1 TX_RPT (don't redefine the naming) -+ u2Byte RTY[4]; // ??? -+ u2Byte TOTAL; // ??? -+ u2Byte DROP; // ??? -+ // -+ // Please use compile flag to disabe the strcutrue for other IC except 88E. -+ // -+#endif -+ -+}ODM_STA_INFO_T, *PODM_STA_INFO_T; -+#endif -+ -+// -+// 2011/10/20 MH Define Common info enum for all team. -+// -+typedef enum _ODM_Common_Info_Definition -+{ -+//-------------REMOVED CASE-----------// -+ //ODM_CMNINFO_CCK_HP, -+ //ODM_CMNINFO_RFPATH_ENABLE, // Define as ODM write??? -+ //ODM_CMNINFO_BT_COEXIST, // ODM_BT_COEXIST_E -+ //ODM_CMNINFO_OP_MODE, // ODM_OPERATION_MODE_E -+//-------------REMOVED CASE-----------// -+ -+ // -+ // Fixed value: -+ // -+ -+ //-----------HOOK BEFORE REG INIT-----------// -+ ODM_CMNINFO_PLATFORM = 0, -+ ODM_CMNINFO_ABILITY, // ODM_ABILITY_E -+ ODM_CMNINFO_INTERFACE, // ODM_INTERFACE_E -+ ODM_CMNINFO_MP_TEST_CHIP, -+ ODM_CMNINFO_IC_TYPE, // ODM_IC_TYPE_E -+ ODM_CMNINFO_CUT_VER, // ODM_CUT_VERSION_E -+ ODM_CMNINFO_FAB_VER, // ODM_FAB_E -+ ODM_CMNINFO_RF_TYPE, // ODM_RF_PATH_E or ODM_RF_TYPE_E? -+ ODM_CMNINFO_RFE_TYPE, -+ ODM_CMNINFO_BOARD_TYPE, // ODM_BOARD_TYPE_E -+ ODM_CMNINFO_PACKAGE_TYPE, -+ ODM_CMNINFO_EXT_LNA, // TRUE -+ ODM_CMNINFO_5G_EXT_LNA, -+ ODM_CMNINFO_EXT_PA, -+ ODM_CMNINFO_5G_EXT_PA, -+ ODM_CMNINFO_GPA, -+ ODM_CMNINFO_APA, -+ ODM_CMNINFO_GLNA, -+ ODM_CMNINFO_ALNA, -+ ODM_CMNINFO_EXT_TRSW, -+ ODM_CMNINFO_EXT_LNA_GAIN, -+ ODM_CMNINFO_PATCH_ID, //CUSTOMER ID -+ ODM_CMNINFO_BINHCT_TEST, -+ ODM_CMNINFO_BWIFI_TEST, -+ ODM_CMNINFO_SMART_CONCURRENT, -+ ODM_CMNINFO_CONFIG_BB_RF, -+ ODM_CMNINFO_DOMAIN_CODE_2G, -+ ODM_CMNINFO_DOMAIN_CODE_5G, -+ ODM_CMNINFO_IQKFWOFFLOAD, -+ ODM_CMNINFO_HUBUSBMODE, -+ ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS, -+ ODM_CMNINFO_TX_TP, -+ ODM_CMNINFO_RX_TP, -+ ODM_CMNINFO_SOUNDING_SEQ, -+ //-----------HOOK BEFORE REG INIT-----------// -+ -+ -+ // -+ // Dynamic value: -+ // -+//--------- POINTER REFERENCE-----------// -+ ODM_CMNINFO_MAC_PHY_MODE, // ODM_MAC_PHY_MODE_E -+ ODM_CMNINFO_TX_UNI, -+ ODM_CMNINFO_RX_UNI, -+ ODM_CMNINFO_WM_MODE, // ODM_WIRELESS_MODE_E -+ ODM_CMNINFO_BAND, // ODM_BAND_TYPE_E -+ ODM_CMNINFO_SEC_CHNL_OFFSET, // ODM_SEC_CHNL_OFFSET_E -+ ODM_CMNINFO_SEC_MODE, // ODM_SECURITY_E -+ ODM_CMNINFO_BW, // ODM_BW_E -+ ODM_CMNINFO_CHNL, -+ ODM_CMNINFO_FORCED_RATE, -+ -+ ODM_CMNINFO_DMSP_GET_VALUE, -+ ODM_CMNINFO_BUDDY_ADAPTOR, -+ ODM_CMNINFO_DMSP_IS_MASTER, -+ ODM_CMNINFO_SCAN, -+ ODM_CMNINFO_POWER_SAVING, -+ ODM_CMNINFO_ONE_PATH_CCA, // ODM_CCA_PATH_E -+ ODM_CMNINFO_DRV_STOP, -+ ODM_CMNINFO_PNP_IN, -+ ODM_CMNINFO_INIT_ON, -+ ODM_CMNINFO_ANT_TEST, -+ ODM_CMNINFO_NET_CLOSED, -+ //ODM_CMNINFO_RTSTA_AID, // For win driver only? -+ ODM_CMNINFO_FORCED_IGI_LB, -+ ODM_CMNINFO_P2P_LINK, -+ ODM_CMNINFO_FCS_MODE, -+ ODM_CMNINFO_IS1ANTENNA, -+ ODM_CMNINFO_RFDEFAULTPATH, -+//--------- POINTER REFERENCE-----------// -+ -+//------------CALL BY VALUE-------------// -+ ODM_CMNINFO_WIFI_DIRECT, -+ ODM_CMNINFO_WIFI_DISPLAY, -+ ODM_CMNINFO_LINK_IN_PROGRESS, -+ ODM_CMNINFO_LINK, -+ ODM_CMNINFO_STATION_STATE, -+ ODM_CMNINFO_RSSI_MIN, -+ ODM_CMNINFO_DBG_COMP, // u8Byte -+ ODM_CMNINFO_DBG_LEVEL, // u4Byte -+ ODM_CMNINFO_RA_THRESHOLD_HIGH, // u1Byte -+ ODM_CMNINFO_RA_THRESHOLD_LOW, // u1Byte -+ ODM_CMNINFO_RF_ANTENNA_TYPE, // u1Byte -+ ODM_CMNINFO_BT_ENABLED, -+ ODM_CMNINFO_BT_HS_CONNECT_PROCESS, -+ ODM_CMNINFO_BT_HS_RSSI, -+ ODM_CMNINFO_BT_OPERATION, -+ ODM_CMNINFO_BT_LIMITED_DIG, //Need to Limited Dig or not -+ ODM_CMNINFO_BT_DIG, -+ ODM_CMNINFO_BT_BUSY, //Check Bt is using or not//neil -+ ODM_CMNINFO_BT_DISABLE_EDCA, -+#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 -+#ifdef UNIVERSAL_REPEATER -+ ODM_CMNINFO_VXD_LINK, -+#endif -+#endif -+ ODM_CMNINFO_AP_TOTAL_NUM, -+ ODM_CMNINFO_POWER_TRAINING, -+//------------CALL BY VALUE-------------// -+ -+ // -+ // Dynamic ptr array hook itms. -+ // -+ ODM_CMNINFO_STA_STATUS, -+ ODM_CMNINFO_PHY_STATUS, -+ ODM_CMNINFO_MAC_STATUS, -+ -+ ODM_CMNINFO_MAX, -+ -+ -+}ODM_CMNINFO_E; -+ -+// -+// 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY -+// -+typedef enum _ODM_Support_Ability_Definition -+{ -+ // -+ // BB ODM section BIT 0-19 -+ // -+ ODM_BB_DIG = BIT0, -+ ODM_BB_RA_MASK = BIT1, -+ ODM_BB_DYNAMIC_TXPWR = BIT2, -+ ODM_BB_FA_CNT = BIT3, -+ ODM_BB_RSSI_MONITOR = BIT4, -+ ODM_BB_CCK_PD = BIT5, -+ ODM_BB_ANT_DIV = BIT6, -+ ODM_BB_PWR_SAVE = BIT7, -+ ODM_BB_PWR_TRAIN = BIT8, -+ ODM_BB_RATE_ADAPTIVE = BIT9, -+ ODM_BB_PATH_DIV = BIT10, -+ ODM_BB_PSD = BIT11, -+ ODM_BB_RXHP = BIT12, -+ ODM_BB_ADAPTIVITY = BIT13, -+ ODM_BB_CFO_TRACKING = BIT14, -+ ODM_BB_NHM_CNT = BIT15, -+ ODM_BB_PRIMARY_CCA = BIT16, -+ ODM_BB_TXBF = BIT17, -+ -+ // -+ // MAC DM section BIT 20-23 -+ // -+ ODM_MAC_EDCA_TURBO = BIT20, -+ ODM_MAC_EARLY_MODE = BIT21, -+ -+ // -+ // RF ODM section BIT 24-31 -+ // -+ ODM_RF_TX_PWR_TRACK = BIT24, -+ ODM_RF_RX_GAIN_TRACK = BIT25, -+ ODM_RF_CALIBRATION = BIT26, -+ -+}ODM_ABILITY_E; -+ -+//Move some non-DM enum,define, struc. form phydm.h to phydm_types.h by Dino -+ -+// ODM_CMNINFO_ONE_PATH_CCA -+typedef enum tag_CCA_Path -+{ -+ ODM_CCA_2R = 0, -+ ODM_CCA_1R_A = 1, -+ ODM_CCA_1R_B = 2, -+}ODM_CCA_PATH_E; -+ -+//move RAInfo to Phydm_RaInfo.h -+ -+//Remove struct PATHDIV_PARA to odm_PathDiv.h -+ -+//Remove struct to odm_PowerTracking.h by YuChen -+// -+// ODM Dynamic common info value definition -+// -+//Move AntDiv form phydm.h to Phydm_AntDiv.h by Dino -+ -+//move PathDiv to Phydm_PathDiv.h -+ -+typedef enum _BASEBAND_CONFIG_PHY_REG_PG_VALUE_TYPE{ -+ PHY_REG_PG_RELATIVE_VALUE = 0, -+ PHY_REG_PG_EXACT_VALUE = 1 -+} PHY_REG_PG_TYPE; -+ -+// -+// 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration. -+// -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (RT_PLATFORM != PLATFORM_LINUX) -+typedef -+#endif -+ -+struct DM_Out_Source_Dynamic_Mechanism_Structure -+#else// for AP,ADSL,CE Team -+typedef struct DM_Out_Source_Dynamic_Mechanism_Structure -+#endif -+{ -+ //RT_TIMER FastAntTrainingTimer; -+ // -+ // Add for different team use temporarily -+ // -+ PADAPTER Adapter; // For CE/NIC team -+ prtl8192cd_priv priv; // For AP/ADSL team -+ // WHen you use Adapter or priv pointer, you must make sure the pointer is ready. -+ BOOLEAN odm_ready; -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ rtl8192cd_priv fake_priv; -+#endif -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ // ADSL_AP_BUILD_WORKAROUND -+ ADAPTER fake_adapter; -+#endif -+ -+ PHY_REG_PG_TYPE PhyRegPgValueType; -+ u1Byte PhyRegPgVersion; -+ -+ u8Byte DebugComponents; -+ u4Byte DebugLevel; -+ -+ u4Byte NumQryPhyStatusAll; //CCK + OFDM -+ u4Byte LastNumQryPhyStatusAll; -+ u4Byte RxPWDBAve; -+ BOOLEAN MPDIG_2G; //off MPDIG -+ u1Byte Times_2G; -+ -+//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// -+ BOOLEAN bCckHighPower; -+ u1Byte RFPathRxEnable; // ODM_CMNINFO_RFPATH_ENABLE -+ u1Byte ControlChannel; -+//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// -+ -+//--------REMOVED COMMON INFO----------// -+ //u1Byte PseudoMacPhyMode; -+ //BOOLEAN *BTCoexist; -+ //BOOLEAN PseudoBtCoexist; -+ //u1Byte OPMode; -+ //BOOLEAN bAPMode; -+ //BOOLEAN bClientMode; -+ //BOOLEAN bAdHocMode; -+ //BOOLEAN bSlaveOfDMSP; -+//--------REMOVED COMMON INFO----------// -+ -+ -+//1 COMMON INFORMATION -+ -+ // -+ // Init Value -+ // -+//-----------HOOK BEFORE REG INIT-----------// -+ // ODM Platform info AP/ADSL/CE/MP = 1/2/3/4 -+ u1Byte SupportPlatform; -+ // ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K -+ u4Byte SupportAbility; -+ // ODM PCIE/USB/SDIO = 1/2/3 -+ u1Byte SupportInterface; -+ // ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... -+ u4Byte SupportICType; -+ // Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... -+ u1Byte CutVersion; -+ // Fab Version TSMC/UMC = 0/1 -+ u1Byte FabVersion; -+ // RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... -+ u1Byte RFType; -+ u1Byte RFEType; -+ // Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... -+ u1Byte BoardType; -+ u1Byte PackageType; -+ u2Byte TypeGLNA; -+ u2Byte TypeGPA; -+ u2Byte TypeALNA; -+ u2Byte TypeAPA; -+ // with external LNA NO/Yes = 0/1 -+ u1Byte ExtLNA; // 2G -+ u1Byte ExtLNA5G; //5G -+ // with external PA NO/Yes = 0/1 -+ u1Byte ExtPA; // 2G -+ u1Byte ExtPA5G; //5G -+ // with external TRSW NO/Yes = 0/1 -+ u1Byte ExtTRSW; -+ u1Byte ExtLNAGain; // 2G -+ u1Byte PatchID; //Customer ID -+ BOOLEAN bInHctTest; -+ BOOLEAN bWIFITest; -+ -+ BOOLEAN bDualMacSmartConcurrent; -+ u4Byte BK_SupportAbility; -+ u1Byte AntDivType; -+ BOOLEAN ConfigBBRF; -+ u1Byte odm_Regulation2_4G; -+ u1Byte odm_Regulation5G; -+ u1Byte IQKFWOffload; -+//-----------HOOK BEFORE REG INIT-----------// -+ -+ // -+ // Dynamic Value -+ // -+//--------- POINTER REFERENCE-----------// -+ -+ u1Byte u1Byte_temp; -+ BOOLEAN BOOLEAN_temp; -+ PADAPTER PADAPTER_temp; -+ -+ // MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2 -+ u1Byte *pMacPhyMode; -+ //TX Unicast byte count -+ u8Byte *pNumTxBytesUnicast; -+ //RX Unicast byte count -+ u8Byte *pNumRxBytesUnicast; -+ // Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3 -+ u1Byte *pWirelessMode; //ODM_WIRELESS_MODE_E -+ // Frequence band 2.4G/5G = 0/1 -+ u1Byte *pBandType; -+ // Secondary channel offset don't_care/below/above = 0/1/2 -+ u1Byte *pSecChOffset; -+ // Security mode Open/WEP/AES/TKIP = 0/1/2/3 -+ u1Byte *pSecurity; -+ // BW info 20M/40M/80M = 0/1/2 -+ u1Byte *pBandWidth; -+ // Central channel location Ch1/Ch2/.... -+ u1Byte *pChannel; //central channel number -+ BOOLEAN DPK_Done; -+ // Common info for 92D DMSP -+ -+ BOOLEAN *pbGetValueFromOtherMac; -+ PADAPTER *pBuddyAdapter; -+ BOOLEAN *pbMasterOfDMSP; //MAC0: master, MAC1: slave -+ // Common info for Status -+ BOOLEAN *pbScanInProcess; -+ BOOLEAN *pbPowerSaving; -+ // CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E. -+ u1Byte *pOnePathCCA; -+ //pMgntInfo->AntennaTest -+ u1Byte *pAntennaTest; -+ BOOLEAN *pbNet_closed; -+ //u1Byte *pAidMap; -+ u1Byte *pu1ForcedIgiLb; -+ BOOLEAN *pIsFcsModeEnable; -+/*--------- For 8723B IQK-----------*/ -+ BOOLEAN *pIs1Antenna; -+ u1Byte *pRFDefaultPath; -+ // 0:S1, 1:S0 -+ -+//--------- POINTER REFERENCE-----------// -+ pu2Byte pForcedDataRate; -+ pu1Byte HubUsbMode; -+ BOOLEAN *pbFwDwRsvdPageInProgress; -+ u4Byte *pCurrentTxTP; -+ u4Byte *pCurrentRxTP; -+ u1Byte *pSoundingSeq; -+//------------CALL BY VALUE-------------// -+ BOOLEAN bLinkInProcess; -+ BOOLEAN bWIFI_Direct; -+ BOOLEAN bWIFI_Display; -+ BOOLEAN bLinked; -+ BOOLEAN bsta_state; -+#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 -+#ifdef UNIVERSAL_REPEATER -+ BOOLEAN VXD_bLinked; -+#endif -+#endif // for repeater mode add by YuChen 2014.06.23 -+ u1Byte RSSI_Min; -+ u1Byte InterfaceIndex; /*Add for 92D dual MAC: 0--Mac0 1--Mac1*/ -+ BOOLEAN bIsMPChip; -+ BOOLEAN bOneEntryOnly; -+ BOOLEAN mp_mode; -+ u4Byte OneEntry_MACID; -+ u1Byte pre_number_linked_client; -+ u1Byte number_linked_client; -+ u1Byte pre_number_active_client; -+ u1Byte number_active_client; -+ // Common info for BTDM -+ BOOLEAN bBtEnabled; // BT is enabled -+ BOOLEAN bBtConnectProcess; // BT HS is under connection progress. -+ u1Byte btHsRssi; // BT HS mode wifi rssi value. -+ BOOLEAN bBtHsOperation; // BT HS mode is under progress -+ u1Byte btHsDigVal; // use BT rssi to decide the DIG value -+ BOOLEAN bBtDisableEdcaTurbo; // Under some condition, don't enable the EDCA Turbo -+ BOOLEAN bBtBusy; // BT is busy. -+ BOOLEAN bBtLimitedDig; // BT is busy. -+ BOOLEAN bDisablePhyApi; -+//------------CALL BY VALUE-------------// -+ u1Byte RSSI_A; -+ u1Byte RSSI_B; -+ u1Byte RSSI_C; -+ u1Byte RSSI_D; -+ u8Byte RSSI_TRSW; -+ u8Byte RSSI_TRSW_H; -+ u8Byte RSSI_TRSW_L; -+ u8Byte RSSI_TRSW_iso; -+ u1Byte TXAntStatus; -+ u1Byte RXAntStatus; -+ u1Byte cck_lna_idx; -+ u1Byte cck_vga_idx; -+ u1Byte ofdm_agc_idx[4]; -+ -+ u1Byte RxRate; -+ BOOLEAN bNoisyState; -+ u1Byte TxRate; -+ u1Byte LinkedInterval; -+ u1Byte preChannel; -+ u4Byte TxagcOffsetValueA; -+ BOOLEAN IsTxagcOffsetPositiveA; -+ u4Byte TxagcOffsetValueB; -+ BOOLEAN IsTxagcOffsetPositiveB; -+ u4Byte tx_tp; -+ u4Byte rx_tp; -+ u4Byte total_tp; -+ u8Byte curTxOkCnt; -+ u8Byte curRxOkCnt; -+ u8Byte lastTxOkCnt; -+ u8Byte lastRxOkCnt; -+ u4Byte BbSwingOffsetA; -+ BOOLEAN IsBbSwingOffsetPositiveA; -+ u4Byte BbSwingOffsetB; -+ BOOLEAN IsBbSwingOffsetPositiveB; -+ u1Byte antdiv_rssi; -+ u1Byte fat_comb_a; -+ u1Byte fat_comb_b; -+ u1Byte antdiv_intvl; -+ u1Byte AntType; -+ u1Byte pre_AntType; -+ u1Byte antdiv_period; -+ u1Byte antdiv_select; -+ u1Byte path_select; -+ u1Byte antdiv_evm_en; -+ u1Byte bdc_holdstate; -+ u1Byte NdpaPeriod; -+ BOOLEAN H2C_RARpt_connect; -+ BOOLEAN cck_agc_report_type; -+ -+ u1Byte dm_dig_max_TH; -+ u1Byte dm_dig_min_TH; -+ u1Byte print_agc; -+ u1Byte TrafficLoad; -+ u1Byte pre_TrafficLoad; -+ -+ -+ //For Adaptivtiy -+ u2Byte NHM_cnt_0; -+ u2Byte NHM_cnt_1; -+ s1Byte TH_L2H_default; -+ s1Byte TH_EDCCA_HL_diff_default; -+ s1Byte TH_L2H_ini; -+ s1Byte TH_EDCCA_HL_diff; -+ s1Byte TH_L2H_ini_mode2; -+ s1Byte TH_EDCCA_HL_diff_mode2; -+ BOOLEAN Carrier_Sense_enable; -+ u1Byte Adaptivity_IGI_upper; -+ BOOLEAN adaptivity_flag; -+ u1Byte DCbackoff; -+ BOOLEAN Adaptivity_enable; -+ u1Byte APTotalNum; -+ BOOLEAN EDCCA_enable; -+ ADAPTIVITY_STATISTICS Adaptivity; -+ //For Adaptivtiy -+ u1Byte LastUSBHub; -+ u1Byte TxBfDataRate; -+ -+ u1Byte c2h_cmd_start; -+ u1Byte fw_debug_trace[60]; -+ u1Byte pre_c2h_seq; -+ BOOLEAN fw_buff_is_enpty; -+ u4Byte data_frame_num; -+ -+ /*for noise detection*/ -+ BOOLEAN NoisyDecision; /*b_noisy*/ -+ BOOLEAN pre_b_noisy; -+ u4Byte NoisyDecision_Smooth; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ ODM_NOISE_MONITOR noise_level;//[ODM_MAX_CHANNEL_NUM]; -+#endif -+ // -+ //2 Define STA info. -+ // _ODM_STA_INFO -+ // 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? -+ PSTA_INFO_T pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM]; -+ u2Byte platform2phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM]; /* platform_macid_table[platform_macid] = phydm_macid */ -+ -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ u2Byte CurrminRptTime; -+ ODM_RA_INFO_T RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; //Use MacID as array index. STA MacID=0, VWiFi Client MacID={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119 -+#endif -+ // -+ // 2012/02/14 MH Add to share 88E ra with other SW team. -+ // We need to colelct all support abilit to a proper area. -+ // -+ BOOLEAN RaSupport88E; -+ -+ // Define ........... -+ -+ // Latest packet phy info (ODM write) -+ ODM_PHY_DBG_INFO_T PhyDbgInfo; -+ //PHY_INFO_88E PhyInfo; -+ -+ // Latest packet phy info (ODM write) -+ ODM_MAC_INFO *pMacInfo; -+ //MAC_INFO_88E MacInfo; -+ -+ // Different Team independt structure?? -+ -+ // -+ //TX_RTP_CMN TX_retrpo; -+ //TX_RTP_88E TX_retrpo; -+ //TX_RTP_8195 TX_retrpo; -+ -+ // -+ //ODM Structure -+ // -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ BDC_T DM_BdcTable; -+ #endif -+ -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ SAT_T dm_sat_table; -+ #endif -+ -+#endif -+ FAT_T DM_FatTable; -+ DIG_T DM_DigTable; -+ -+ PS_T DM_PSTable; -+ Pri_CCA_T DM_PriCCA; -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ RXHP_T DM_RXHP_Table; -+#endif -+ RA_T DM_RA_Table; -+ FALSE_ALARM_STATISTICS FalseAlmCnt; -+ FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter; -+ SWAT_T DM_SWAT_Table; -+ CFO_TRACKING DM_CfoTrack; -+ ACS DM_ACS; -+ -+ -+#if (RTL8814A_SUPPORT == 1) -+ IQK_INFO IQK_info; -+#endif /* (RTL8814A_SUPPORT==1) */ -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ //Path Div Struct -+ PATHDIV_PARA pathIQK; -+#endif -+#if(defined(CONFIG_PATH_DIVERSITY)) -+ PATHDIV_T DM_PathDiv; -+#endif -+ -+ EDCA_T DM_EDCA_Table; -+ u4Byte WMMEDCA_BE; -+ -+ // Copy from SD4 structure -+ // -+ // ================================================== -+ // -+ -+ //common -+ //u1Byte DM_Type; -+ //u1Byte PSD_Report_RXHP[80]; // Add By Gary -+ //u1Byte PSD_func_flag; // Add By Gary -+ //for DIG -+ //u1Byte bDMInitialGainEnable; -+ //u1Byte binitialized; // for dm_initial_gain_Multi_STA use. -+ -+ BOOLEAN *pbDriverStopped; -+ BOOLEAN *pbDriverIsGoingToPnpSetPowerSleep; -+ BOOLEAN *pinit_adpt_in_progress; -+ -+ //PSD -+ BOOLEAN bUserAssignLevel; -+ RT_TIMER PSDTimer; -+ u1Byte RSSI_BT; //come from BT -+ BOOLEAN bPSDinProcess; -+ BOOLEAN bPSDactive; -+ BOOLEAN bDMInitialGainEnable; -+ -+ //MPT DIG -+ RT_TIMER MPT_DIGTimer; -+ -+ //for rate adaptive, in fact, 88c/92c fw will handle this -+ u1Byte bUseRAMask; -+ -+ ODM_RATE_ADAPTIVE RateAdaptive; -+//#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if(defined(CONFIG_ANT_DETECTION)) -+ ANT_DETECTED_INFO AntDetectedInfo; // Antenna detected information for RSSI tool -+#endif -+ ODM_RF_CAL_T RFCalibrateInfo; -+ -+ -+ // -+ // Dynamic ATC switch -+ // -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ // -+ // Power Training -+ // -+ u1Byte ForcePowerTrainingState; -+ BOOLEAN bChangeState; -+ u4Byte PT_score; -+ u8Byte OFDM_RX_Cnt; -+ u8Byte CCK_RX_Cnt; -+#endif -+ BOOLEAN bDisablePowerTraining; -+ -+ // -+ // ODM system resource. -+ // -+ -+ // ODM relative time. -+ RT_TIMER PathDivSwitchTimer; -+ //2011.09.27 add for Path Diversity -+ RT_TIMER CCKPathDiversityTimer; -+ RT_TIMER FastAntTrainingTimer; -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ RT_TIMER EVM_FastAntTrainingTimer; -+#endif -+ RT_TIMER sbdcnt_timer; -+ -+ // ODM relative workitem. -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if USE_WORKITEM -+ RT_WORK_ITEM PathDivSwitchWorkitem; -+ RT_WORK_ITEM CCKPathDiversityWorkitem; -+ RT_WORK_ITEM FastAntTrainingWorkitem; -+ RT_WORK_ITEM MPT_DIGWorkitem; -+ RT_WORK_ITEM RaRptWorkitem; -+ RT_WORK_ITEM sbdcnt_workitem; -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if (BEAMFORMING_SUPPORT == 1) -+ RT_BEAMFORMING_INFO BeamformingInfo; -+#endif -+#endif -+ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+#if (RT_PLATFORM != PLATFORM_LINUX) -+} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure -+#else -+}; -+#endif -+ -+#else// for AP,ADSL,CE Team -+} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure -+#endif -+ -+ -+typedef enum _PHYDM_STRUCTURE_TYPE{ -+ PHYDM_FALSEALMCNT, -+ PHYDM_CFOTRACK, -+ PHYDM_ADAPTIVITY, -+ PHYDM_ROMINFO, -+ -+}PHYDM_STRUCTURE_TYPE; -+ -+ -+ -+ typedef enum _ODM_RF_CONTENT{ -+ odm_radioa_txt = 0x1000, -+ odm_radiob_txt = 0x1001, -+ odm_radioc_txt = 0x1002, -+ odm_radiod_txt = 0x1003 -+} ODM_RF_CONTENT; -+ -+typedef enum _ODM_BB_Config_Type{ -+ CONFIG_BB_PHY_REG, -+ CONFIG_BB_AGC_TAB, -+ CONFIG_BB_AGC_TAB_2G, -+ CONFIG_BB_AGC_TAB_5G, -+ CONFIG_BB_PHY_REG_PG, -+ CONFIG_BB_PHY_REG_MP, -+ CONFIG_BB_AGC_TAB_DIFF, -+} ODM_BB_Config_Type, *PODM_BB_Config_Type; -+ -+typedef enum _ODM_RF_Config_Type{ -+ CONFIG_RF_RADIO, -+ CONFIG_RF_TXPWR_LMT, -+} ODM_RF_Config_Type, *PODM_RF_Config_Type; -+ -+typedef enum _ODM_FW_Config_Type{ -+ CONFIG_FW_NIC, -+ CONFIG_FW_NIC_2, -+ CONFIG_FW_AP, -+ CONFIG_FW_AP_2, -+ CONFIG_FW_MP, -+ CONFIG_FW_WoWLAN, -+ CONFIG_FW_WoWLAN_2, -+ CONFIG_FW_AP_WoWLAN, -+ CONFIG_FW_BT, -+} ODM_FW_Config_Type; -+ -+// Status code -+#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) -+typedef enum _RT_STATUS{ -+ RT_STATUS_SUCCESS, -+ RT_STATUS_FAILURE, -+ RT_STATUS_PENDING, -+ RT_STATUS_RESOURCE, -+ RT_STATUS_INVALID_CONTEXT, -+ RT_STATUS_INVALID_PARAMETER, -+ RT_STATUS_NOT_SUPPORT, -+ RT_STATUS_OS_API_FAILED, -+}RT_STATUS,*PRT_STATUS; -+#endif // end of RT_STATUS definition -+ -+#ifdef REMOVE_PACK -+#pragma pack() -+#endif -+ -+//#include "odm_function.h" -+ -+//3=========================================================== -+//3 DIG -+//3=========================================================== -+ -+//Remove DIG by Yuchen -+ -+//3=========================================================== -+//3 AGC RX High Power Mode -+//3=========================================================== -+#define LNA_Low_Gain_1 0x64 -+#define LNA_Low_Gain_2 0x5A -+#define LNA_Low_Gain_3 0x58 -+ -+#define FA_RXHP_TH1 5000 -+#define FA_RXHP_TH2 1500 -+#define FA_RXHP_TH3 800 -+#define FA_RXHP_TH4 600 -+#define FA_RXHP_TH5 500 -+ -+//3=========================================================== -+//3 EDCA -+//3=========================================================== -+ -+//3=========================================================== -+//3 Dynamic Tx Power -+//3=========================================================== -+//Dynamic Tx Power Control Threshold -+ -+//Remove By YuChen -+ -+//3=========================================================== -+//3 Tx Power Tracking -+//3=========================================================== -+ -+ -+ -+//3=========================================================== -+//3 Rate Adaptive -+//3=========================================================== -+//Remove to odm_RaInfo.h by RS_James -+ -+//3=========================================================== -+//3 BB Power Save -+//3=========================================================== -+ -+typedef enum tag_1R_CCA_Type_Definition -+{ -+ CCA_1R =0, -+ CCA_2R = 1, -+ CCA_MAX = 2, -+}DM_1R_CCA_E; -+ -+typedef enum tag_RF_Type_Definition -+{ -+ RF_Save =0, -+ RF_Normal = 1, -+ RF_MAX = 2, -+}DM_RF_E; -+ -+ -+// -+// Extern Global Variables. -+// -+//PowerTracking move to odm_powerTrakcing.h by YuChen -+// -+// check Sta pointer valid or not -+// -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+#define IS_STA_VALID(pSta) (pSta && pSta->expire_to) -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#define IS_STA_VALID(pSta) (pSta && pSta->bUsed) -+#else -+#define IS_STA_VALID(pSta) (pSta) -+#endif -+ -+//Remove DIG by yuchen -+ -+//Remove BB power saving by Yuchen -+ -+//remove PT by yuchen -+ -+//ODM_RAStateCheck() Remove by RS_James -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP|ODM_ADSL)) -+//============================================================ -+// function prototype -+//============================================================ -+//#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh -+//void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, -+// IN INT32 DM_Type, -+// IN INT32 DM_Value); -+ -+//Remove DIG by yuchen -+ -+ -+BOOLEAN -+ODM_CheckPowerStatus( -+ IN PADAPTER Adapter -+ ); -+ -+ -+//Remove ODM_RateAdaptiveStateApInit() by RS_James -+ -+//Remove Edca by YuChen -+ -+#endif -+ -+ -+ -+u4Byte odm_ConvertTo_dB(u4Byte Value); -+ -+u4Byte odm_ConvertTo_linear(u4Byte Value); -+ -+#if((DM_ODM_SUPPORT_TYPE==ODM_WIN)||(DM_ODM_SUPPORT_TYPE==ODM_CE)) -+ -+u4Byte -+GetPSDData( -+ PDM_ODM_T pDM_Odm, -+ unsigned int point, -+ u1Byte initial_gain_psd); -+ -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+VOID -+ODM_DMWatchdog_LPS( -+ IN PDM_ODM_T pDM_Odm -+); -+#endif -+ -+ -+s4Byte -+ODM_PWdB_Conversion( -+ IN s4Byte X, -+ IN u4Byte TotalBit, -+ IN u4Byte DecimalBit -+ ); -+ -+s4Byte -+ODM_SignConversion( -+ IN s4Byte value, -+ IN u4Byte TotalBit -+ ); -+ -+VOID -+ODM_DMInit( -+ IN PDM_ODM_T pDM_Odm -+); -+ -+VOID -+ODM_DMReset( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+phydm_support_ablity_debug( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+ ); -+ -+VOID -+ODM_DMWatchdog( -+ IN PDM_ODM_T pDM_Odm // For common use in the future -+ ); -+ -+VOID -+ODM_CmnInfoInit( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_CMNINFO_E CmnInfo, -+ IN u4Byte Value -+ ); -+ -+VOID -+ODM_CmnInfoHook( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_CMNINFO_E CmnInfo, -+ IN PVOID pValue -+ ); -+ -+VOID -+ODM_CmnInfoPtrArrayHook( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_CMNINFO_E CmnInfo, -+ IN u2Byte Index, -+ IN PVOID pValue -+ ); -+ -+VOID -+ODM_CmnInfoUpdate( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte CmnInfo, -+ IN u8Byte Value -+ ); -+ -+#if(DM_ODM_SUPPORT_TYPE==ODM_AP) -+VOID -+ODM_InitAllThreads( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+ODM_StopAllThreads( -+ IN PDM_ODM_T pDM_Odm -+ ); -+#endif -+ -+VOID -+ODM_InitAllTimers( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+ODM_CancelAllTimers( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+ODM_ReleaseAllTimers( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+ -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ); -+VOID ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ); -+ -+ -+ -+u8Byte -+PlatformDivision64( -+ IN u8Byte x, -+ IN u8Byte y -+); -+ -+//==================================================== -+//3 PathDiV End -+//==================================================== -+ -+ -+#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh -+//void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, -+// IN INT32 DM_Type, -+// IN INT32 DM_Value); -+// -+// PathDiveristy Remove by RS_James -+ -+typedef enum tag_DIG_Connect_Definition -+{ -+ DIG_STA_DISCONNECT = 0, -+ DIG_STA_CONNECT = 1, -+ DIG_STA_BEFORE_CONNECT = 2, -+ DIG_MultiSTA_DISCONNECT = 3, -+ DIG_MultiSTA_CONNECT = 4, -+ DIG_CONNECT_MAX -+}DM_DIG_CONNECT_E; -+ -+ -+// -+// 2012/01/12 MH Check afapter status. Temp fix BSOD. -+// -+#define HAL_ADAPTER_STS_CHK(pDM_Odm)\ -+ if (pDM_Odm->Adapter == NULL)\ -+ {\ -+ return;\ -+ }\ -+ -+ -+// -+// For new definition in MP temporarily fro power tracking, -+// -+/* -+#define odm_TXPowerTrackingDirectCall(_Adapter) \ -+ IS_HARDWARE_TYPE_8192D(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92D(_Adapter) : \ -+ IS_HARDWARE_TYPE_8192C(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92C(_Adapter) : \ -+ IS_HARDWARE_TYPE_8723A(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_8723A(_Adapter) :\ -+ ODM_TXPowerTrackingCallback_ThermalMeter(_Adapter) -+*/ -+ -+ -+#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+ODM_AsocEntry_Init( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+//Remove ODM_DynamicARFBSelect() by RS_James -+ -+PVOID -+PhyDM_Get_Structure( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte Structure_Type -+); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ||(DM_ODM_SUPPORT_TYPE == ODM_CE) -+/*===========================================================*/ -+/* The following is for compile only*/ -+/*===========================================================*/ -+ -+#define IS_HARDWARE_TYPE_8723A(_Adapter) FALSE -+#define IS_HARDWARE_TYPE_8723AE(_Adapter) FALSE -+#define IS_HARDWARE_TYPE_8192C(_Adapter) FALSE -+#define IS_HARDWARE_TYPE_8192D(_Adapter) FALSE -+#define RF_T_METER_92D 0x42 -+ -+ -+#define SET_TX_DESC_ANTSEL_A_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 0, 1, __Value) -+#define SET_TX_DESC_TX_ANTL_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 4, 2, __Value) -+#define SET_TX_DESC_TX_ANT_HT_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 6, 2, __Value) -+#define SET_TX_DESC_TX_ANT_CCK_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 2, 2, __Value) -+ -+#define GET_RX_STATUS_DESC_RX_MCS(__pRxStatusDesc) LE_BITS_TO_1BYTE( __pRxStatusDesc+12, 0, 6) -+ -+#define RX_HAL_IS_CCK_RATE_92C(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE1M ||\ -+ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE2M ||\ -+ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE5_5M ||\ -+ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE11M) -+ -+#define H2C_92C_PSD_RESULT 16 -+ -+#define rConfig_ram64x16 0xb2c -+ -+#define TARGET_CHNL_NUM_2G_5G 59 -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+FillH2CCmd92C( -+ IN PADAPTER Adapter, -+ IN u1Byte ElementID, -+ IN u4Byte CmdLen, -+ IN pu1Byte pCmdBuffer -+); -+VOID -+PHY_SetTxPowerLevel8192C( -+ IN PADAPTER Adapter, -+ IN u1Byte channel -+ ); -+u1Byte GetRightChnlPlaceforIQK(u1Byte chnl); -+ -+#endif -+ -+//=========================================================== -+#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void odm_dtc(PDM_ODM_T pDM_Odm); -+#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ -+ -+ -+VOID phydm_NoisyDetection(IN PDM_ODM_T pDM_Odm ); -+ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __HALDMOUTSRC_H__ ++#define __HALDMOUTSRC_H__ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "phydm_pre_define.h" ++#include "phydm_dig.h" ++#include "phydm_edcaturbocheck.h" ++#include "phydm_pathdiv.h" ++#include "phydm_antdiv.h" ++#include "phydm_antdect.h" ++#include "phydm_dynamicbbpowersaving.h" ++#include "phydm_rainfo.h" ++#include "phydm_dynamictxpower.h" ++#include "phydm_cfotracking.h" ++#include "phydm_acs.h" ++#include "phydm_adaptivity.h" ++ ++ ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#include "halphyrf_ap.h" ++#include "phydm_powertracking_ap.h" ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++#include "phydm_beamforming.h" ++#include "phydm_noisemonitor.h" ++#include "halphyrf_ce.h" ++#include "phydm_powertracking_ce.h" ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++#include "phydm_beamforming.h" ++#include "phydm_rxhp.h" ++#include "halphyrf_win.h" ++#include "phydm_powertracking_win.h" ++#endif ++ ++//============================================================ ++// Definition ++//============================================================ ++// ++// 2011/09/22 MH Define all team supprt ability. ++// ++ ++// ++// 2011/09/22 MH Define for all teams. Please Define the constan in your precomp header. ++// ++//#define DM_ODM_SUPPORT_AP 0 ++//#define DM_ODM_SUPPORT_ADSL 0 ++//#define DM_ODM_SUPPORT_CE 0 ++//#define DM_ODM_SUPPORT_MP 1 ++ ++// ++// 2011/09/28 MH Define ODM SW team support flag. ++// ++ ++//For SW AntDiv, PathDiv, 8192C AntDiv joint use ++#define TP_MODE 0 ++#define RSSI_MODE 1 ++ ++#define TRAFFIC_LOW 0 ++#define TRAFFIC_HIGH 1 ++#define TRAFFIC_ULTRA_LOW 2 ++#define TRAFFIC_MID 3 ++ ++ ++#define NONE 0 ++ ++ ++ ++ ++//8723A High Power IGI Setting ++#define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND 0x22 ++#define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND 0x28 ++#define DM_DIG_HIGH_PWR_THRESHOLD 0x3a ++#define DM_DIG_LOW_PWR_THRESHOLD 0x14 ++ ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++// ++// 2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement. ++// We need to remove to other position??? ++// ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++typedef struct rtl8192cd_priv { ++ u1Byte temp; ++ ++}rtl8192cd_priv, *prtl8192cd_priv; ++#endif ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++typedef struct _ADAPTER{ ++ u1Byte temp; ++ #ifdef AP_BUILD_WORKAROUND ++ HAL_DATA_TYPE* temp2; ++ prtl8192cd_priv priv; ++ #endif ++}ADAPTER, *PADAPTER; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++typedef struct _WLAN_STA{ ++ u1Byte temp; ++} WLAN_STA, *PRT_WLAN_STA; ++ ++#endif ++ ++typedef struct _Dynamic_Primary_CCA{ ++ u1Byte PriCCA_flag; ++ u1Byte intf_flag; ++ u1Byte intf_type; ++ u1Byte DupRTS_flag; ++ u1Byte Monitor_flag; ++ u1Byte CH_offset; ++ u1Byte MF_state; ++}Pri_CCA_T, *pPri_CCA_T; ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ ++#ifdef ADSL_AP_BUILD_WORKAROUND ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++#endif ++#if 0//defined in 8192cd.h ++// ++// Indicate different AP vendor for IOT issue. ++// ++typedef enum _HT_IOT_PEER ++{ ++ HT_IOT_PEER_UNKNOWN = 0, ++ HT_IOT_PEER_REALTEK = 1, ++ HT_IOT_PEER_REALTEK_92SE = 2, ++ HT_IOT_PEER_BROADCOM = 3, ++ HT_IOT_PEER_RALINK = 4, ++ HT_IOT_PEER_ATHEROS = 5, ++ HT_IOT_PEER_CISCO = 6, ++ HT_IOT_PEER_MERU = 7, ++ HT_IOT_PEER_MARVELL = 8, ++ HT_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 ++ HT_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP ++ HT_IOT_PEER_AIRGO = 11, ++ HT_IOT_PEER_INTEL = 12, ++ HT_IOT_PEER_RTK_APCLIENT = 13, ++ HT_IOT_PEER_REALTEK_81XX = 14, ++ HT_IOT_PEER_REALTEK_WOW = 15, ++ HT_IOT_PEER_MAX = 16 ++}HT_IOT_PEER_E, *PHTIOT_PEER_E; ++#endif ++#endif//#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#define DM_Type_ByFW 0 ++#define DM_Type_ByDriver 1 ++ ++// ++// Declare for common info ++// ++ ++#define IQK_THRESHOLD 8 ++#define DPK_THRESHOLD 4 ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++__PACK typedef struct _ODM_Phy_Status_Info_ ++{ ++ u1Byte RxPWDBAll; ++ u1Byte SignalQuality; /* in 0-100 index. */ ++ u1Byte RxMIMOSignalStrength[4]; /* in 0~100 index */ ++ s1Byte RxMIMOSignalQuality[4]; /* EVM */ ++ s1Byte RxSNR[4]; /* per-path's SNR */ ++#if (RTL8822B_SUPPORT == 1) ++ u1Byte RxCount; /* RX path counter---*/ ++#endif ++ u1Byte BandWidth; ++ ++} __WLAN_ATTRIB_PACK__ ODM_PHY_INFO_T, *PODM_PHY_INFO_T; ++ ++typedef struct _ODM_Phy_Status_Info_Append_ ++{ ++ u1Byte MAC_CRC32; ++ ++}ODM_PHY_INFO_Append_T,*PODM_PHY_INFO_Append_T; ++ ++#else ++ ++typedef struct _ODM_Phy_Status_Info_ ++{ ++ // ++ // Be care, if you want to add any element please insert between ++ // RxPWDBAll & SignalStrength. ++ // ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ u4Byte RxPWDBAll; ++#else ++ u1Byte RxPWDBAll; ++#endif ++ u1Byte SignalQuality; /* in 0-100 index. */ ++ s1Byte RxMIMOSignalQuality[4]; /* per-path's EVM */ ++ u1Byte RxMIMOEVMdbm[4]; /* per-path's EVM dbm */ ++ u1Byte RxMIMOSignalStrength[4]; /* in 0~100 index */ ++ s2Byte Cfo_short[4]; /* per-path's Cfo_short */ ++ s2Byte Cfo_tail[4]; /* per-path's Cfo_tail */ ++ s1Byte RxPower; /* in dBm Translate from PWdB */ ++ s1Byte RecvSignalPower; /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */ ++ u1Byte BTRxRSSIPercentage; ++ u1Byte SignalStrength; /* in 0-100 index. */ ++ s1Byte RxPwr[4]; /* per-path's pwdb */ ++ s1Byte RxSNR[4]; /* per-path's SNR */ ++#if (RTL8822B_SUPPORT == 1) ++ u1Byte RxCount:2; /* RX path counter---*/ ++ u1Byte BandWidth:2; ++ u1Byte rxsc:4; /* sub-channel---*/ ++#else ++ u1Byte BandWidth; ++#endif ++ u1Byte btCoexPwrAdjust; ++#if (RTL8822B_SUPPORT == 1) ++ u1Byte channel; /* channel number---*/ ++ BOOLEAN bMuPacket; /* is MU packet or not---*/ ++ BOOLEAN bBeamformed; /* BF packet---*/ ++#endif ++}ODM_PHY_INFO_T,*PODM_PHY_INFO_T; ++#endif ++ ++typedef struct _ODM_Per_Pkt_Info_ ++{ ++ //u1Byte Rate; ++ u1Byte DataRate; ++ u1Byte StationID; ++ BOOLEAN bPacketMatchBSSID; ++ BOOLEAN bPacketToSelf; ++ BOOLEAN bPacketBeacon; ++ BOOLEAN bToSelf; ++}ODM_PACKET_INFO_T,*PODM_PACKET_INFO_T; ++ ++ ++typedef struct _ODM_Phy_Dbg_Info_ ++{ ++ //ODM Write,debug info ++ s1Byte RxSNRdB[4]; ++ u4Byte NumQryPhyStatus; ++ u4Byte NumQryPhyStatusCCK; ++ u4Byte NumQryPhyStatusOFDM; ++#if (RTL8822B_SUPPORT == 1) ++ u4Byte NumQryMuPkt; ++ u4Byte NumQryBfPkt; ++#endif ++ u1Byte NumQryBeaconPkt; ++ //Others ++ s4Byte RxEVM[4]; ++ ++}ODM_PHY_DBG_INFO_T; ++ ++ ++typedef struct _ODM_Mac_Status_Info_ ++{ ++ u1Byte test; ++ ++}ODM_MAC_INFO; ++ ++// ++// 2011/20/20 MH For MP driver RT_WLAN_STA = STA_INFO_T ++// Please declare below ODM relative info in your STA info structure. ++// ++#if 1 ++typedef struct _ODM_STA_INFO{ ++ // Driver Write ++ BOOLEAN bUsed; // record the sta status link or not? ++ //u1Byte WirelessMode; // ++ u1Byte IOTPeer; // Enum value. HT_IOT_PEER_E ++ ++ // ODM Write ++ //1 PHY_STATUS_INFO ++ u1Byte RSSI_Path[4]; // ++ u1Byte RSSI_Ave; ++ u1Byte RXEVM[4]; ++ u1Byte RXSNR[4]; ++ ++ // ODM Write ++ //1 TX_INFO (may changed by IC) ++ //TX_INFO_T pTxInfo; // Define in IC folder. Move lower layer. ++#if 0 ++ u1Byte ANTSEL_A; //in Jagar: 4bit; others: 2bit ++ u1Byte ANTSEL_B; //in Jagar: 4bit; others: 2bit ++ u1Byte ANTSEL_C; //only in Jagar: 4bit ++ u1Byte ANTSEL_D; //only in Jagar: 4bit ++ u1Byte TX_ANTL; //not in Jagar: 2bit ++ u1Byte TX_ANT_HT; //not in Jagar: 2bit ++ u1Byte TX_ANT_CCK; //not in Jagar: 2bit ++ u1Byte TXAGC_A; //not in Jagar: 4bit ++ u1Byte TXAGC_B; //not in Jagar: 4bit ++ u1Byte TXPWR_OFFSET; //only in Jagar: 3bit ++ u1Byte TX_ANT; //only in Jagar: 4bit for TX_ANTL/TX_ANTHT/TX_ANT_CCK ++#endif ++ ++ // ++ // Please use compile flag to disabe the strcutrue for other IC except 88E. ++ // Move To lower layer. ++ // ++ // ODM Write Wilson will handle this part(said by Luke.Lee) ++ //TX_RPT_T pTxRpt; // Define in IC folder. Move lower layer. ++#if 0 ++ //1 For 88E RA (don't redefine the naming) ++ u1Byte rate_id; ++ u1Byte rate_SGI; ++ u1Byte rssi_sta_ra; ++ u1Byte SGI_enable; ++ u1Byte Decision_rate; ++ u1Byte Pre_rate; ++ u1Byte Active; ++ ++ // Driver write Wilson handle. ++ //1 TX_RPT (don't redefine the naming) ++ u2Byte RTY[4]; // ??? ++ u2Byte TOTAL; // ??? ++ u2Byte DROP; // ??? ++ // ++ // Please use compile flag to disabe the strcutrue for other IC except 88E. ++ // ++#endif ++ ++}ODM_STA_INFO_T, *PODM_STA_INFO_T; ++#endif ++ ++// ++// 2011/10/20 MH Define Common info enum for all team. ++// ++typedef enum _ODM_Common_Info_Definition ++{ ++//-------------REMOVED CASE-----------// ++ //ODM_CMNINFO_CCK_HP, ++ //ODM_CMNINFO_RFPATH_ENABLE, // Define as ODM write??? ++ //ODM_CMNINFO_BT_COEXIST, // ODM_BT_COEXIST_E ++ //ODM_CMNINFO_OP_MODE, // ODM_OPERATION_MODE_E ++//-------------REMOVED CASE-----------// ++ ++ // ++ // Fixed value: ++ // ++ ++ //-----------HOOK BEFORE REG INIT-----------// ++ ODM_CMNINFO_PLATFORM = 0, ++ ODM_CMNINFO_ABILITY, // ODM_ABILITY_E ++ ODM_CMNINFO_INTERFACE, // ODM_INTERFACE_E ++ ODM_CMNINFO_MP_TEST_CHIP, ++ ODM_CMNINFO_IC_TYPE, // ODM_IC_TYPE_E ++ ODM_CMNINFO_CUT_VER, // ODM_CUT_VERSION_E ++ ODM_CMNINFO_FAB_VER, // ODM_FAB_E ++ ODM_CMNINFO_RF_TYPE, // ODM_RF_PATH_E or ODM_RF_TYPE_E? ++ ODM_CMNINFO_RFE_TYPE, ++ ODM_CMNINFO_BOARD_TYPE, // ODM_BOARD_TYPE_E ++ ODM_CMNINFO_PACKAGE_TYPE, ++ ODM_CMNINFO_EXT_LNA, // TRUE ++ ODM_CMNINFO_5G_EXT_LNA, ++ ODM_CMNINFO_EXT_PA, ++ ODM_CMNINFO_5G_EXT_PA, ++ ODM_CMNINFO_GPA, ++ ODM_CMNINFO_APA, ++ ODM_CMNINFO_GLNA, ++ ODM_CMNINFO_ALNA, ++ ODM_CMNINFO_EXT_TRSW, ++ ODM_CMNINFO_EXT_LNA_GAIN, ++ ODM_CMNINFO_PATCH_ID, //CUSTOMER ID ++ ODM_CMNINFO_BINHCT_TEST, ++ ODM_CMNINFO_BWIFI_TEST, ++ ODM_CMNINFO_SMART_CONCURRENT, ++ ODM_CMNINFO_CONFIG_BB_RF, ++ ODM_CMNINFO_DOMAIN_CODE_2G, ++ ODM_CMNINFO_DOMAIN_CODE_5G, ++ ODM_CMNINFO_IQKFWOFFLOAD, ++ ODM_CMNINFO_HUBUSBMODE, ++ ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS, ++ ODM_CMNINFO_TX_TP, ++ ODM_CMNINFO_RX_TP, ++ ODM_CMNINFO_SOUNDING_SEQ, ++ //-----------HOOK BEFORE REG INIT-----------// ++ ++ ++ // ++ // Dynamic value: ++ // ++//--------- POINTER REFERENCE-----------// ++ ODM_CMNINFO_MAC_PHY_MODE, // ODM_MAC_PHY_MODE_E ++ ODM_CMNINFO_TX_UNI, ++ ODM_CMNINFO_RX_UNI, ++ ODM_CMNINFO_WM_MODE, // ODM_WIRELESS_MODE_E ++ ODM_CMNINFO_BAND, // ODM_BAND_TYPE_E ++ ODM_CMNINFO_SEC_CHNL_OFFSET, // ODM_SEC_CHNL_OFFSET_E ++ ODM_CMNINFO_SEC_MODE, // ODM_SECURITY_E ++ ODM_CMNINFO_BW, // ODM_BW_E ++ ODM_CMNINFO_CHNL, ++ ODM_CMNINFO_FORCED_RATE, ++ ++ ODM_CMNINFO_DMSP_GET_VALUE, ++ ODM_CMNINFO_BUDDY_ADAPTOR, ++ ODM_CMNINFO_DMSP_IS_MASTER, ++ ODM_CMNINFO_SCAN, ++ ODM_CMNINFO_POWER_SAVING, ++ ODM_CMNINFO_ONE_PATH_CCA, // ODM_CCA_PATH_E ++ ODM_CMNINFO_DRV_STOP, ++ ODM_CMNINFO_PNP_IN, ++ ODM_CMNINFO_INIT_ON, ++ ODM_CMNINFO_ANT_TEST, ++ ODM_CMNINFO_NET_CLOSED, ++ //ODM_CMNINFO_RTSTA_AID, // For win driver only? ++ ODM_CMNINFO_FORCED_IGI_LB, ++ ODM_CMNINFO_P2P_LINK, ++ ODM_CMNINFO_FCS_MODE, ++ ODM_CMNINFO_IS1ANTENNA, ++ ODM_CMNINFO_RFDEFAULTPATH, ++//--------- POINTER REFERENCE-----------// ++ ++//------------CALL BY VALUE-------------// ++ ODM_CMNINFO_WIFI_DIRECT, ++ ODM_CMNINFO_WIFI_DISPLAY, ++ ODM_CMNINFO_LINK_IN_PROGRESS, ++ ODM_CMNINFO_LINK, ++ ODM_CMNINFO_STATION_STATE, ++ ODM_CMNINFO_RSSI_MIN, ++ ODM_CMNINFO_DBG_COMP, // u8Byte ++ ODM_CMNINFO_DBG_LEVEL, // u4Byte ++ ODM_CMNINFO_RA_THRESHOLD_HIGH, // u1Byte ++ ODM_CMNINFO_RA_THRESHOLD_LOW, // u1Byte ++ ODM_CMNINFO_RF_ANTENNA_TYPE, // u1Byte ++ ODM_CMNINFO_BT_ENABLED, ++ ODM_CMNINFO_BT_HS_CONNECT_PROCESS, ++ ODM_CMNINFO_BT_HS_RSSI, ++ ODM_CMNINFO_BT_OPERATION, ++ ODM_CMNINFO_BT_LIMITED_DIG, //Need to Limited Dig or not ++ ODM_CMNINFO_BT_DIG, ++ ODM_CMNINFO_BT_BUSY, //Check Bt is using or not//neil ++ ODM_CMNINFO_BT_DISABLE_EDCA, ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 ++#ifdef UNIVERSAL_REPEATER ++ ODM_CMNINFO_VXD_LINK, ++#endif ++#endif ++ ODM_CMNINFO_AP_TOTAL_NUM, ++ ODM_CMNINFO_POWER_TRAINING, ++//------------CALL BY VALUE-------------// ++ ++ // ++ // Dynamic ptr array hook itms. ++ // ++ ODM_CMNINFO_STA_STATUS, ++ ODM_CMNINFO_PHY_STATUS, ++ ODM_CMNINFO_MAC_STATUS, ++ ++ ODM_CMNINFO_MAX, ++ ++ ++}ODM_CMNINFO_E; ++ ++// ++// 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY ++// ++typedef enum _ODM_Support_Ability_Definition ++{ ++ // ++ // BB ODM section BIT 0-19 ++ // ++ ODM_BB_DIG = BIT0, ++ ODM_BB_RA_MASK = BIT1, ++ ODM_BB_DYNAMIC_TXPWR = BIT2, ++ ODM_BB_FA_CNT = BIT3, ++ ODM_BB_RSSI_MONITOR = BIT4, ++ ODM_BB_CCK_PD = BIT5, ++ ODM_BB_ANT_DIV = BIT6, ++ ODM_BB_PWR_SAVE = BIT7, ++ ODM_BB_PWR_TRAIN = BIT8, ++ ODM_BB_RATE_ADAPTIVE = BIT9, ++ ODM_BB_PATH_DIV = BIT10, ++ ODM_BB_PSD = BIT11, ++ ODM_BB_RXHP = BIT12, ++ ODM_BB_ADAPTIVITY = BIT13, ++ ODM_BB_CFO_TRACKING = BIT14, ++ ODM_BB_NHM_CNT = BIT15, ++ ODM_BB_PRIMARY_CCA = BIT16, ++ ODM_BB_TXBF = BIT17, ++ ++ // ++ // MAC DM section BIT 20-23 ++ // ++ ODM_MAC_EDCA_TURBO = BIT20, ++ ODM_MAC_EARLY_MODE = BIT21, ++ ++ // ++ // RF ODM section BIT 24-31 ++ // ++ ODM_RF_TX_PWR_TRACK = BIT24, ++ ODM_RF_RX_GAIN_TRACK = BIT25, ++ ODM_RF_CALIBRATION = BIT26, ++ ++}ODM_ABILITY_E; ++ ++//Move some non-DM enum,define, struc. form phydm.h to phydm_types.h by Dino ++ ++// ODM_CMNINFO_ONE_PATH_CCA ++typedef enum tag_CCA_Path ++{ ++ ODM_CCA_2R = 0, ++ ODM_CCA_1R_A = 1, ++ ODM_CCA_1R_B = 2, ++}ODM_CCA_PATH_E; ++ ++//move RAInfo to Phydm_RaInfo.h ++ ++//Remove struct PATHDIV_PARA to odm_PathDiv.h ++ ++//Remove struct to odm_PowerTracking.h by YuChen ++// ++// ODM Dynamic common info value definition ++// ++//Move AntDiv form phydm.h to Phydm_AntDiv.h by Dino ++ ++//move PathDiv to Phydm_PathDiv.h ++ ++typedef enum _BASEBAND_CONFIG_PHY_REG_PG_VALUE_TYPE{ ++ PHY_REG_PG_RELATIVE_VALUE = 0, ++ PHY_REG_PG_EXACT_VALUE = 1 ++} PHY_REG_PG_TYPE; ++ ++// ++// 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration. ++// ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RT_PLATFORM != PLATFORM_LINUX) ++typedef ++#endif ++ ++struct DM_Out_Source_Dynamic_Mechanism_Structure ++#else// for AP,ADSL,CE Team ++typedef struct DM_Out_Source_Dynamic_Mechanism_Structure ++#endif ++{ ++ //RT_TIMER FastAntTrainingTimer; ++ // ++ // Add for different team use temporarily ++ // ++ PADAPTER Adapter; // For CE/NIC team ++ prtl8192cd_priv priv; // For AP/ADSL team ++ // WHen you use Adapter or priv pointer, you must make sure the pointer is ready. ++ BOOLEAN odm_ready; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ rtl8192cd_priv fake_priv; ++#endif ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ // ADSL_AP_BUILD_WORKAROUND ++ ADAPTER fake_adapter; ++#endif ++ ++ PHY_REG_PG_TYPE PhyRegPgValueType; ++ u1Byte PhyRegPgVersion; ++ ++ u8Byte DebugComponents; ++ u4Byte DebugLevel; ++ ++ u4Byte NumQryPhyStatusAll; //CCK + OFDM ++ u4Byte LastNumQryPhyStatusAll; ++ u4Byte RxPWDBAve; ++ BOOLEAN MPDIG_2G; //off MPDIG ++ u1Byte Times_2G; ++ ++//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// ++ BOOLEAN bCckHighPower; ++ u1Byte RFPathRxEnable; // ODM_CMNINFO_RFPATH_ENABLE ++ u1Byte ControlChannel; ++//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// ++ ++//--------REMOVED COMMON INFO----------// ++ //u1Byte PseudoMacPhyMode; ++ //BOOLEAN *BTCoexist; ++ //BOOLEAN PseudoBtCoexist; ++ //u1Byte OPMode; ++ //BOOLEAN bAPMode; ++ //BOOLEAN bClientMode; ++ //BOOLEAN bAdHocMode; ++ //BOOLEAN bSlaveOfDMSP; ++//--------REMOVED COMMON INFO----------// ++ ++ ++//1 COMMON INFORMATION ++ ++ // ++ // Init Value ++ // ++//-----------HOOK BEFORE REG INIT-----------// ++ // ODM Platform info AP/ADSL/CE/MP = 1/2/3/4 ++ u1Byte SupportPlatform; ++ // ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K ++ u4Byte SupportAbility; ++ // ODM PCIE/USB/SDIO = 1/2/3 ++ u1Byte SupportInterface; ++ // ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... ++ u4Byte SupportICType; ++ // Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... ++ u1Byte CutVersion; ++ // Fab Version TSMC/UMC = 0/1 ++ u1Byte FabVersion; ++ // RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... ++ u1Byte RFType; ++ u1Byte RFEType; ++ // Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... ++ u1Byte BoardType; ++ u1Byte PackageType; ++ u2Byte TypeGLNA; ++ u2Byte TypeGPA; ++ u2Byte TypeALNA; ++ u2Byte TypeAPA; ++ // with external LNA NO/Yes = 0/1 ++ u1Byte ExtLNA; // 2G ++ u1Byte ExtLNA5G; //5G ++ // with external PA NO/Yes = 0/1 ++ u1Byte ExtPA; // 2G ++ u1Byte ExtPA5G; //5G ++ // with external TRSW NO/Yes = 0/1 ++ u1Byte ExtTRSW; ++ u1Byte ExtLNAGain; // 2G ++ u1Byte PatchID; //Customer ID ++ BOOLEAN bInHctTest; ++ BOOLEAN bWIFITest; ++ ++ BOOLEAN bDualMacSmartConcurrent; ++ u4Byte BK_SupportAbility; ++ u1Byte AntDivType; ++ BOOLEAN ConfigBBRF; ++ u1Byte odm_Regulation2_4G; ++ u1Byte odm_Regulation5G; ++ u1Byte IQKFWOffload; ++//-----------HOOK BEFORE REG INIT-----------// ++ ++ // ++ // Dynamic Value ++ // ++//--------- POINTER REFERENCE-----------// ++ ++ u1Byte u1Byte_temp; ++ BOOLEAN BOOLEAN_temp; ++ PADAPTER PADAPTER_temp; ++ ++ // MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2 ++ u1Byte *pMacPhyMode; ++ //TX Unicast byte count ++ u8Byte *pNumTxBytesUnicast; ++ //RX Unicast byte count ++ u8Byte *pNumRxBytesUnicast; ++ // Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3 ++ u1Byte *pWirelessMode; //ODM_WIRELESS_MODE_E ++ // Frequence band 2.4G/5G = 0/1 ++ u1Byte *pBandType; ++ // Secondary channel offset don't_care/below/above = 0/1/2 ++ u1Byte *pSecChOffset; ++ // Security mode Open/WEP/AES/TKIP = 0/1/2/3 ++ u1Byte *pSecurity; ++ // BW info 20M/40M/80M = 0/1/2 ++ u1Byte *pBandWidth; ++ // Central channel location Ch1/Ch2/.... ++ u1Byte *pChannel; //central channel number ++ BOOLEAN DPK_Done; ++ // Common info for 92D DMSP ++ ++ BOOLEAN *pbGetValueFromOtherMac; ++ PADAPTER *pBuddyAdapter; ++ BOOLEAN *pbMasterOfDMSP; //MAC0: master, MAC1: slave ++ // Common info for Status ++ BOOLEAN *pbScanInProcess; ++ BOOLEAN *pbPowerSaving; ++ // CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E. ++ u1Byte *pOnePathCCA; ++ //pMgntInfo->AntennaTest ++ u1Byte *pAntennaTest; ++ BOOLEAN *pbNet_closed; ++ //u1Byte *pAidMap; ++ u1Byte *pu1ForcedIgiLb; ++ BOOLEAN *pIsFcsModeEnable; ++/*--------- For 8723B IQK-----------*/ ++ BOOLEAN *pIs1Antenna; ++ u1Byte *pRFDefaultPath; ++ // 0:S1, 1:S0 ++ ++//--------- POINTER REFERENCE-----------// ++ pu2Byte pForcedDataRate; ++ pu1Byte HubUsbMode; ++ BOOLEAN *pbFwDwRsvdPageInProgress; ++ u4Byte *pCurrentTxTP; ++ u4Byte *pCurrentRxTP; ++ u1Byte *pSoundingSeq; ++//------------CALL BY VALUE-------------// ++ BOOLEAN bLinkInProcess; ++ BOOLEAN bWIFI_Direct; ++ BOOLEAN bWIFI_Display; ++ BOOLEAN bLinked; ++ BOOLEAN bsta_state; ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 ++#ifdef UNIVERSAL_REPEATER ++ BOOLEAN VXD_bLinked; ++#endif ++#endif // for repeater mode add by YuChen 2014.06.23 ++ u1Byte RSSI_Min; ++ u1Byte InterfaceIndex; /*Add for 92D dual MAC: 0--Mac0 1--Mac1*/ ++ BOOLEAN bIsMPChip; ++ BOOLEAN bOneEntryOnly; ++ BOOLEAN mp_mode; ++ u4Byte OneEntry_MACID; ++ u1Byte pre_number_linked_client; ++ u1Byte number_linked_client; ++ u1Byte pre_number_active_client; ++ u1Byte number_active_client; ++ // Common info for BTDM ++ BOOLEAN bBtEnabled; // BT is enabled ++ BOOLEAN bBtConnectProcess; // BT HS is under connection progress. ++ u1Byte btHsRssi; // BT HS mode wifi rssi value. ++ BOOLEAN bBtHsOperation; // BT HS mode is under progress ++ u1Byte btHsDigVal; // use BT rssi to decide the DIG value ++ BOOLEAN bBtDisableEdcaTurbo; // Under some condition, don't enable the EDCA Turbo ++ BOOLEAN bBtBusy; // BT is busy. ++ BOOLEAN bBtLimitedDig; // BT is busy. ++ BOOLEAN bDisablePhyApi; ++//------------CALL BY VALUE-------------// ++ u1Byte RSSI_A; ++ u1Byte RSSI_B; ++ u1Byte RSSI_C; ++ u1Byte RSSI_D; ++ u8Byte RSSI_TRSW; ++ u8Byte RSSI_TRSW_H; ++ u8Byte RSSI_TRSW_L; ++ u8Byte RSSI_TRSW_iso; ++ u1Byte TXAntStatus; ++ u1Byte RXAntStatus; ++ u1Byte cck_lna_idx; ++ u1Byte cck_vga_idx; ++ u1Byte ofdm_agc_idx[4]; ++ ++ u1Byte RxRate; ++ BOOLEAN bNoisyState; ++ u1Byte TxRate; ++ u1Byte LinkedInterval; ++ u1Byte preChannel; ++ u4Byte TxagcOffsetValueA; ++ BOOLEAN IsTxagcOffsetPositiveA; ++ u4Byte TxagcOffsetValueB; ++ BOOLEAN IsTxagcOffsetPositiveB; ++ u4Byte tx_tp; ++ u4Byte rx_tp; ++ u4Byte total_tp; ++ u8Byte curTxOkCnt; ++ u8Byte curRxOkCnt; ++ u8Byte lastTxOkCnt; ++ u8Byte lastRxOkCnt; ++ u4Byte BbSwingOffsetA; ++ BOOLEAN IsBbSwingOffsetPositiveA; ++ u4Byte BbSwingOffsetB; ++ BOOLEAN IsBbSwingOffsetPositiveB; ++ u1Byte antdiv_rssi; ++ u1Byte fat_comb_a; ++ u1Byte fat_comb_b; ++ u1Byte antdiv_intvl; ++ u1Byte AntType; ++ u1Byte pre_AntType; ++ u1Byte antdiv_period; ++ u1Byte antdiv_select; ++ u1Byte path_select; ++ u1Byte antdiv_evm_en; ++ u1Byte bdc_holdstate; ++ u1Byte NdpaPeriod; ++ BOOLEAN H2C_RARpt_connect; ++ BOOLEAN cck_agc_report_type; ++ ++ u1Byte dm_dig_max_TH; ++ u1Byte dm_dig_min_TH; ++ u1Byte print_agc; ++ u1Byte TrafficLoad; ++ u1Byte pre_TrafficLoad; ++ ++ ++ //For Adaptivtiy ++ u2Byte NHM_cnt_0; ++ u2Byte NHM_cnt_1; ++ s1Byte TH_L2H_default; ++ s1Byte TH_EDCCA_HL_diff_default; ++ s1Byte TH_L2H_ini; ++ s1Byte TH_EDCCA_HL_diff; ++ s1Byte TH_L2H_ini_mode2; ++ s1Byte TH_EDCCA_HL_diff_mode2; ++ BOOLEAN Carrier_Sense_enable; ++ u1Byte Adaptivity_IGI_upper; ++ BOOLEAN adaptivity_flag; ++ u1Byte DCbackoff; ++ BOOLEAN Adaptivity_enable; ++ u1Byte APTotalNum; ++ BOOLEAN EDCCA_enable; ++ ADAPTIVITY_STATISTICS Adaptivity; ++ //For Adaptivtiy ++ u1Byte LastUSBHub; ++ u1Byte TxBfDataRate; ++ ++ u1Byte c2h_cmd_start; ++ u1Byte fw_debug_trace[60]; ++ u1Byte pre_c2h_seq; ++ BOOLEAN fw_buff_is_enpty; ++ u4Byte data_frame_num; ++ ++ /*for noise detection*/ ++ BOOLEAN NoisyDecision; /*b_noisy*/ ++ BOOLEAN pre_b_noisy; ++ u4Byte NoisyDecision_Smooth; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ODM_NOISE_MONITOR noise_level;//[ODM_MAX_CHANNEL_NUM]; ++#endif ++ // ++ //2 Define STA info. ++ // _ODM_STA_INFO ++ // 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? ++ PSTA_INFO_T pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM]; ++ u2Byte platform2phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM]; /* platform_macid_table[platform_macid] = phydm_macid */ ++ ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ u2Byte CurrminRptTime; ++ ODM_RA_INFO_T RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; //Use MacID as array index. STA MacID=0, VWiFi Client MacID={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119 ++#endif ++ // ++ // 2012/02/14 MH Add to share 88E ra with other SW team. ++ // We need to colelct all support abilit to a proper area. ++ // ++ BOOLEAN RaSupport88E; ++ ++ // Define ........... ++ ++ // Latest packet phy info (ODM write) ++ ODM_PHY_DBG_INFO_T PhyDbgInfo; ++ //PHY_INFO_88E PhyInfo; ++ ++ // Latest packet phy info (ODM write) ++ ODM_MAC_INFO *pMacInfo; ++ //MAC_INFO_88E MacInfo; ++ ++ // Different Team independt structure?? ++ ++ // ++ //TX_RTP_CMN TX_retrpo; ++ //TX_RTP_88E TX_retrpo; ++ //TX_RTP_8195 TX_retrpo; ++ ++ // ++ //ODM Structure ++ // ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ BDC_T DM_BdcTable; ++ #endif ++ ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ SAT_T dm_sat_table; ++ #endif ++ ++#endif ++ FAT_T DM_FatTable; ++ DIG_T DM_DigTable; ++ ++ PS_T DM_PSTable; ++ Pri_CCA_T DM_PriCCA; ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ RXHP_T DM_RXHP_Table; ++#endif ++ RA_T DM_RA_Table; ++ FALSE_ALARM_STATISTICS FalseAlmCnt; ++ FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter; ++ SWAT_T DM_SWAT_Table; ++ CFO_TRACKING DM_CfoTrack; ++ ACS DM_ACS; ++ ++ ++#if (RTL8814A_SUPPORT == 1) ++ IQK_INFO IQK_info; ++#endif /* (RTL8814A_SUPPORT==1) */ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ //Path Div Struct ++ PATHDIV_PARA pathIQK; ++#endif ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PATHDIV_T DM_PathDiv; ++#endif ++ ++ EDCA_T DM_EDCA_Table; ++ u4Byte WMMEDCA_BE; ++ ++ // Copy from SD4 structure ++ // ++ // ================================================== ++ // ++ ++ //common ++ //u1Byte DM_Type; ++ //u1Byte PSD_Report_RXHP[80]; // Add By Gary ++ //u1Byte PSD_func_flag; // Add By Gary ++ //for DIG ++ //u1Byte bDMInitialGainEnable; ++ //u1Byte binitialized; // for dm_initial_gain_Multi_STA use. ++ ++ BOOLEAN *pbDriverStopped; ++ BOOLEAN *pbDriverIsGoingToPnpSetPowerSleep; ++ BOOLEAN *pinit_adpt_in_progress; ++ ++ //PSD ++ BOOLEAN bUserAssignLevel; ++ RT_TIMER PSDTimer; ++ u1Byte RSSI_BT; //come from BT ++ BOOLEAN bPSDinProcess; ++ BOOLEAN bPSDactive; ++ BOOLEAN bDMInitialGainEnable; ++ ++ //MPT DIG ++ RT_TIMER MPT_DIGTimer; ++ ++ //for rate adaptive, in fact, 88c/92c fw will handle this ++ u1Byte bUseRAMask; ++ ++ ODM_RATE_ADAPTIVE RateAdaptive; ++//#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if(defined(CONFIG_ANT_DETECTION)) ++ ANT_DETECTED_INFO AntDetectedInfo; // Antenna detected information for RSSI tool ++#endif ++ ODM_RF_CAL_T RFCalibrateInfo; ++ ++ ++ // ++ // Dynamic ATC switch ++ // ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ // ++ // Power Training ++ // ++ u1Byte ForcePowerTrainingState; ++ BOOLEAN bChangeState; ++ u4Byte PT_score; ++ u8Byte OFDM_RX_Cnt; ++ u8Byte CCK_RX_Cnt; ++#endif ++ BOOLEAN bDisablePowerTraining; ++ ++ // ++ // ODM system resource. ++ // ++ ++ // ODM relative time. ++ RT_TIMER PathDivSwitchTimer; ++ //2011.09.27 add for Path Diversity ++ RT_TIMER CCKPathDiversityTimer; ++ RT_TIMER FastAntTrainingTimer; ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++ RT_TIMER EVM_FastAntTrainingTimer; ++#endif ++ RT_TIMER sbdcnt_timer; ++ ++ // ODM relative workitem. ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if USE_WORKITEM ++ RT_WORK_ITEM PathDivSwitchWorkitem; ++ RT_WORK_ITEM CCKPathDiversityWorkitem; ++ RT_WORK_ITEM FastAntTrainingWorkitem; ++ RT_WORK_ITEM MPT_DIGWorkitem; ++ RT_WORK_ITEM RaRptWorkitem; ++ RT_WORK_ITEM sbdcnt_workitem; ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ RT_BEAMFORMING_INFO BeamformingInfo; ++#endif ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++#if (RT_PLATFORM != PLATFORM_LINUX) ++} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure ++#else ++}; ++#endif ++ ++#else// for AP,ADSL,CE Team ++} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure ++#endif ++ ++ ++typedef enum _PHYDM_STRUCTURE_TYPE{ ++ PHYDM_FALSEALMCNT, ++ PHYDM_CFOTRACK, ++ PHYDM_ADAPTIVITY, ++ PHYDM_ROMINFO, ++ ++}PHYDM_STRUCTURE_TYPE; ++ ++ ++ ++ typedef enum _ODM_RF_CONTENT{ ++ odm_radioa_txt = 0x1000, ++ odm_radiob_txt = 0x1001, ++ odm_radioc_txt = 0x1002, ++ odm_radiod_txt = 0x1003 ++} ODM_RF_CONTENT; ++ ++typedef enum _ODM_BB_Config_Type{ ++ CONFIG_BB_PHY_REG, ++ CONFIG_BB_AGC_TAB, ++ CONFIG_BB_AGC_TAB_2G, ++ CONFIG_BB_AGC_TAB_5G, ++ CONFIG_BB_PHY_REG_PG, ++ CONFIG_BB_PHY_REG_MP, ++ CONFIG_BB_AGC_TAB_DIFF, ++} ODM_BB_Config_Type, *PODM_BB_Config_Type; ++ ++typedef enum _ODM_RF_Config_Type{ ++ CONFIG_RF_RADIO, ++ CONFIG_RF_TXPWR_LMT, ++} ODM_RF_Config_Type, *PODM_RF_Config_Type; ++ ++typedef enum _ODM_FW_Config_Type{ ++ CONFIG_FW_NIC, ++ CONFIG_FW_NIC_2, ++ CONFIG_FW_AP, ++ CONFIG_FW_AP_2, ++ CONFIG_FW_MP, ++ CONFIG_FW_WoWLAN, ++ CONFIG_FW_WoWLAN_2, ++ CONFIG_FW_AP_WoWLAN, ++ CONFIG_FW_BT, ++} ODM_FW_Config_Type; ++ ++// Status code ++#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) ++typedef enum _RT_STATUS{ ++ RT_STATUS_SUCCESS, ++ RT_STATUS_FAILURE, ++ RT_STATUS_PENDING, ++ RT_STATUS_RESOURCE, ++ RT_STATUS_INVALID_CONTEXT, ++ RT_STATUS_INVALID_PARAMETER, ++ RT_STATUS_NOT_SUPPORT, ++ RT_STATUS_OS_API_FAILED, ++}RT_STATUS,*PRT_STATUS; ++#endif // end of RT_STATUS definition ++ ++#ifdef REMOVE_PACK ++#pragma pack() ++#endif ++ ++//#include "odm_function.h" ++ ++//3=========================================================== ++//3 DIG ++//3=========================================================== ++ ++//Remove DIG by Yuchen ++ ++//3=========================================================== ++//3 AGC RX High Power Mode ++//3=========================================================== ++#define LNA_Low_Gain_1 0x64 ++#define LNA_Low_Gain_2 0x5A ++#define LNA_Low_Gain_3 0x58 ++ ++#define FA_RXHP_TH1 5000 ++#define FA_RXHP_TH2 1500 ++#define FA_RXHP_TH3 800 ++#define FA_RXHP_TH4 600 ++#define FA_RXHP_TH5 500 ++ ++//3=========================================================== ++//3 EDCA ++//3=========================================================== ++ ++//3=========================================================== ++//3 Dynamic Tx Power ++//3=========================================================== ++//Dynamic Tx Power Control Threshold ++ ++//Remove By YuChen ++ ++//3=========================================================== ++//3 Tx Power Tracking ++//3=========================================================== ++ ++ ++ ++//3=========================================================== ++//3 Rate Adaptive ++//3=========================================================== ++//Remove to odm_RaInfo.h by RS_James ++ ++//3=========================================================== ++//3 BB Power Save ++//3=========================================================== ++ ++typedef enum tag_1R_CCA_Type_Definition ++{ ++ CCA_1R =0, ++ CCA_2R = 1, ++ CCA_MAX = 2, ++}DM_1R_CCA_E; ++ ++typedef enum tag_RF_Type_Definition ++{ ++ RF_Save =0, ++ RF_Normal = 1, ++ RF_MAX = 2, ++}DM_RF_E; ++ ++ ++// ++// Extern Global Variables. ++// ++//PowerTracking move to odm_powerTrakcing.h by YuChen ++// ++// check Sta pointer valid or not ++// ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#define IS_STA_VALID(pSta) (pSta && pSta->expire_to) ++#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#define IS_STA_VALID(pSta) (pSta && pSta->bUsed) ++#else ++#define IS_STA_VALID(pSta) (pSta) ++#endif ++ ++//Remove DIG by yuchen ++ ++//Remove BB power saving by Yuchen ++ ++//remove PT by yuchen ++ ++//ODM_RAStateCheck() Remove by RS_James ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP|ODM_ADSL)) ++//============================================================ ++// function prototype ++//============================================================ ++//#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh ++//void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, ++// IN INT32 DM_Type, ++// IN INT32 DM_Value); ++ ++//Remove DIG by yuchen ++ ++ ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter ++ ); ++ ++ ++//Remove ODM_RateAdaptiveStateApInit() by RS_James ++ ++//Remove Edca by YuChen ++ ++#endif ++ ++ ++ ++u4Byte odm_ConvertTo_dB(u4Byte Value); ++ ++u4Byte odm_ConvertTo_linear(u4Byte Value); ++ ++#if((DM_ODM_SUPPORT_TYPE==ODM_WIN)||(DM_ODM_SUPPORT_TYPE==ODM_CE)) ++ ++u4Byte ++GetPSDData( ++ PDM_ODM_T pDM_Odm, ++ unsigned int point, ++ u1Byte initial_gain_psd); ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++VOID ++ODM_DMWatchdog_LPS( ++ IN PDM_ODM_T pDM_Odm ++); ++#endif ++ ++ ++s4Byte ++ODM_PWdB_Conversion( ++ IN s4Byte X, ++ IN u4Byte TotalBit, ++ IN u4Byte DecimalBit ++ ); ++ ++s4Byte ++ODM_SignConversion( ++ IN s4Byte value, ++ IN u4Byte TotalBit ++ ); ++ ++VOID ++ODM_DMInit( ++ IN PDM_ODM_T pDM_Odm ++); ++ ++VOID ++ODM_DMReset( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++phydm_support_ablity_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ); ++ ++VOID ++ODM_DMWatchdog( ++ IN PDM_ODM_T pDM_Odm // For common use in the future ++ ); ++ ++VOID ++ODM_CmnInfoInit( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u4Byte Value ++ ); ++ ++VOID ++ODM_CmnInfoHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN PVOID pValue ++ ); ++ ++VOID ++ODM_CmnInfoPtrArrayHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u2Byte Index, ++ IN PVOID pValue ++ ); ++ ++VOID ++ODM_CmnInfoUpdate( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte CmnInfo, ++ IN u8Byte Value ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_AP) ++VOID ++ODM_InitAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_StopAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ); ++#endif ++ ++VOID ++ODM_InitAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_CancelAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_ReleaseAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ); ++VOID ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ); ++ ++ ++ ++u8Byte ++PlatformDivision64( ++ IN u8Byte x, ++ IN u8Byte y ++); ++ ++//==================================================== ++//3 PathDiV End ++//==================================================== ++ ++ ++#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh ++//void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, ++// IN INT32 DM_Type, ++// IN INT32 DM_Value); ++// ++// PathDiveristy Remove by RS_James ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++// ++// 2012/01/12 MH Check afapter status. Temp fix BSOD. ++// ++#define HAL_ADAPTER_STS_CHK(pDM_Odm)\ ++ if (pDM_Odm->Adapter == NULL)\ ++ {\ ++ return;\ ++ }\ ++ ++ ++// ++// For new definition in MP temporarily fro power tracking, ++// ++/* ++#define odm_TXPowerTrackingDirectCall(_Adapter) \ ++ IS_HARDWARE_TYPE_8192D(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92D(_Adapter) : \ ++ IS_HARDWARE_TYPE_8192C(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92C(_Adapter) : \ ++ IS_HARDWARE_TYPE_8723A(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_8723A(_Adapter) :\ ++ ODM_TXPowerTrackingCallback_ThermalMeter(_Adapter) ++*/ ++ ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++ODM_AsocEntry_Init( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++//Remove ODM_DynamicARFBSelect() by RS_James ++ ++PVOID ++PhyDM_Get_Structure( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte Structure_Type ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ||(DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*===========================================================*/ ++/* The following is for compile only*/ ++/*===========================================================*/ ++ ++#define IS_HARDWARE_TYPE_8723A(_Adapter) FALSE ++#define IS_HARDWARE_TYPE_8723AE(_Adapter) FALSE ++#define IS_HARDWARE_TYPE_8192C(_Adapter) FALSE ++#define IS_HARDWARE_TYPE_8192D(_Adapter) FALSE ++#define RF_T_METER_92D 0x42 ++ ++ ++#define SET_TX_DESC_ANTSEL_A_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 0, 1, __Value) ++#define SET_TX_DESC_TX_ANTL_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 4, 2, __Value) ++#define SET_TX_DESC_TX_ANT_HT_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 6, 2, __Value) ++#define SET_TX_DESC_TX_ANT_CCK_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 2, 2, __Value) ++ ++#define GET_RX_STATUS_DESC_RX_MCS(__pRxStatusDesc) LE_BITS_TO_1BYTE( __pRxStatusDesc+12, 0, 6) ++ ++#define RX_HAL_IS_CCK_RATE_92C(pDesc)\ ++ (GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE1M ||\ ++ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE2M ||\ ++ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE5_5M ||\ ++ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE11M) ++ ++#define H2C_92C_PSD_RESULT 16 ++ ++#define rConfig_ram64x16 0xb2c ++ ++#define TARGET_CHNL_NUM_2G_5G 59 ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++FillH2CCmd92C( ++ IN PADAPTER Adapter, ++ IN u1Byte ElementID, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++); ++VOID ++PHY_SetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ IN u1Byte channel ++ ); ++u1Byte GetRightChnlPlaceforIQK(u1Byte chnl); ++ ++#endif ++ ++//=========================================================== ++#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++void odm_dtc(PDM_ODM_T pDM_Odm); ++#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ ++ ++ ++VOID phydm_NoisyDetection(IN PDM_ODM_T pDM_Odm ); ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_acs.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_acs.c new file mode 100644 -index 000000000..e18047e75 +index 0000000..4b607ce --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_acs.c @@ -0,0 +1,1306 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+ -+u1Byte -+ODM_GetAutoChannelSelectResult( -+ IN PVOID pDM_VOID, -+ IN u1Byte Band -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PACS pACS = &pDM_Odm->DM_ACS; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(Band == ODM_BAND_2_4G) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_2G(%d)\n", pACS->CleanChannel_2G)); -+ return (u1Byte)pACS->CleanChannel_2G; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_5G(%d)\n", pACS->CleanChannel_5G)); -+ return (u1Byte)pACS->CleanChannel_5G; -+ } -+#else -+ return (u1Byte)pACS->CleanChannel_2G; -+#endif -+ -+} -+ -+VOID -+odm_AutoChannelSelectSetting( -+ IN PVOID pDM_VOID, -+ IN BOOLEAN IsEnable -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte period = 0x2710;// 40ms in default -+ u2Byte NHMType = 0x7; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSetting()=========> \n")); -+ -+ if(IsEnable) -+ {//20 ms -+ period = 0x1388; -+ NHMType = 0x1; -+ } -+ -+ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ { -+ //PHY parameters initialize for ac series -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); //0x990[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms -+ //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, NHMType); //0x994[9:8]=3 enable CCX -+ } -+ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ //PHY parameters initialize for n series -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); //0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms -+ //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, NHMType); //0x890[9:8]=3 enable CCX -+ } -+#endif -+} -+ -+VOID -+odm_AutoChannelSelectInit( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PACS pACS = &pDM_Odm->DM_ACS; -+ u1Byte i; -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) -+ return; -+ -+ if(pACS->bForceACSResult) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectInit()=========> \n")); -+ -+ pACS->CleanChannel_2G = 1; -+ pACS->CleanChannel_5G = 36; -+ -+ for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i) -+ { -+ pACS->Channel_Info_2G[0][i] = 0; -+ pACS->Channel_Info_2G[1][i] = 0; -+ } -+ -+ if(pDM_Odm->SupportICType & (ODM_IC_11AC_SERIES|ODM_RTL8192D)) -+ { -+ for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i) -+ { -+ pACS->Channel_Info_5G[0][i] = 0; -+ pACS->Channel_Info_5G[1][i] = 0; -+ } -+ } -+#endif -+} -+ -+VOID -+odm_AutoChannelSelectReset( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PACS pACS = &pDM_Odm->DM_ACS; -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) -+ return; -+ -+ if(pACS->bForceACSResult) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectReset()=========> \n")); -+ -+ odm_AutoChannelSelectSetting(pDM_Odm,TRUE);// for 20ms measurement -+ Phydm_NHMCounterStatisticsReset(pDM_Odm); -+#endif -+} -+ -+VOID -+odm_AutoChannelSelect( -+ IN PVOID pDM_VOID, -+ IN u1Byte Channel -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PACS pACS = &pDM_Odm->DM_ACS; -+ u1Byte ChannelIDX = 0, SearchIDX = 0; -+ u2Byte MaxScore=0; -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Return: SupportAbility ODM_BB_NHM_CNT is disabled\n")); -+ return; -+ } -+ -+ if(pACS->bForceACSResult) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Force 2G clean channel = %d, 5G clean channel = %d\n", -+ pACS->CleanChannel_2G, pACS->CleanChannel_5G)); -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel = %d=========> \n", Channel)); -+ -+ Phydm_GetNHMCounterStatistics(pDM_Odm); -+ odm_AutoChannelSelectSetting(pDM_Odm,FALSE); -+ -+ if(Channel >=1 && Channel <=14) -+ { -+ ChannelIDX = Channel - 1; -+ pACS->Channel_Info_2G[1][ChannelIDX]++; -+ -+ if(pACS->Channel_Info_2G[1][ChannelIDX] >= 2) -+ pACS->Channel_Info_2G[0][ChannelIDX] = (pACS->Channel_Info_2G[0][ChannelIDX] >> 1) + -+ (pACS->Channel_Info_2G[0][ChannelIDX] >> 2) + (pDM_Odm->NHM_cnt_0>>2); -+ else -+ pACS->Channel_Info_2G[0][ChannelIDX] = pDM_Odm->NHM_cnt_0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): NHM_cnt_0 = %d \n", pDM_Odm->NHM_cnt_0)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel_Info[0][%d] = %d, Channel_Info[1][%d] = %d\n", ChannelIDX, pACS->Channel_Info_2G[0][ChannelIDX], ChannelIDX, pACS->Channel_Info_2G[1][ChannelIDX])); -+ -+ for(SearchIDX = 0; SearchIDX < ODM_MAX_CHANNEL_2G; SearchIDX++) -+ { -+ if(pACS->Channel_Info_2G[1][SearchIDX] != 0) -+ { -+ if(pACS->Channel_Info_2G[0][SearchIDX] >= MaxScore) -+ { -+ MaxScore = pACS->Channel_Info_2G[0][SearchIDX]; -+ pACS->CleanChannel_2G = SearchIDX+1; -+ } -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("(1)odm_AutoChannelSelect(): 2G: CleanChannel_2G = %d, MaxScore = %d \n", -+ pACS->CleanChannel_2G, MaxScore)); -+ -+ } -+ else if(Channel >= 36) -+ { -+ // Need to do -+ pACS->CleanChannel_5G = Channel; -+ } -+#endif -+} -+ -+#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) -+ -+VOID -+phydm_AutoChannelSelectSettingAP( -+ IN PVOID pDM_VOID, -+ IN u4Byte setting, // 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING -+ IN u4Byte acs_step -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ PACS pACS = &pDM_Odm->DM_ACS; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSettingAP()=========> \n")); -+ -+ //3 Store Default Setting -+ if(setting == STORE_DEFAULT_NHM_SETTING) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("STORE_DEFAULT_NHM_SETTING\n")); -+ -+ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) // store Reg0x990, Reg0x994, Reg0x998, Reg0x99C, Reg0x9a0 -+ { -+ pACS->Reg0x990 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC); // Reg0x990 -+ pACS->Reg0x994 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC); // Reg0x994 -+ pACS->Reg0x998 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC); // Reg0x998 -+ pACS->Reg0x99C = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC); // Reg0x99c -+ pACS->Reg0x9A0 = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC); // Reg0x9a0, u1Byte -+ } -+ else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ pACS->Reg0x890 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N); // Reg0x890 -+ pACS->Reg0x894 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N); // Reg0x894 -+ pACS->Reg0x898 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N); // Reg0x898 -+ pACS->Reg0x89C = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N); // Reg0x89c -+ pACS->Reg0xE28 = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N); // Reg0xe28, u1Byte -+ } -+ } -+ -+ //3 Restore Default Setting -+ else if(setting == RESTORE_DEFAULT_NHM_SETTING) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("RESTORE_DEFAULT_NHM_SETTING\n")); -+ -+ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) // store Reg0x990, Reg0x994, Reg0x998, Reg0x99C, Reg0x9a0 -+ { -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC, pACS->Reg0x990); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, pACS->Reg0x994); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, pACS->Reg0x998); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, pACS->Reg0x99C); -+ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC, pACS->Reg0x9A0); -+ } -+ else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, pACS->Reg0x890); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N, pACS->Reg0x894); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, pACS->Reg0x898); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, pACS->Reg0x89C); -+ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N, pACS->Reg0xE28); -+ } -+ } -+ -+ //3 ACS Setting -+ else if(setting == ACS_NHM_SETTING) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("ACS_NHM_SETTING\n")); -+ u2Byte period; -+ period = 0x61a8; -+ pACS->ACS_Step = acs_step; -+ -+ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ { -+ //4 Set NHM period, 0x990[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); -+ //4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC,BIT8|BIT9|BIT10, 3); -+ -+ if(pACS->ACS_Step == 0) -+ { -+ //4 Set IGI -+ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); -+ if (get_rf_mimo_mode(priv) != MIMO_1T1R) -+ ODM_SetBBReg(pDM_Odm,0xe50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); -+ -+ //4 Set ACS NHM threshold -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x82786e64); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff8c); -+ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC, 0xff); -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC+2, 0xffff); -+ -+ } -+ else if(pACS->ACS_Step == 1) -+ { -+ //4 Set IGI -+ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); -+ if (get_rf_mimo_mode(priv) != MIMO_1T1R) -+ ODM_SetBBReg(pDM_Odm,0xe50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); -+ -+ //4 Set ACS NHM threshold -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x5a50463c); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff64); -+ -+ } -+ -+ } -+ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ //4 Set NHM period, 0x894[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); -+ //4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N,BIT8|BIT9|BIT10, 3); -+ -+ if(pACS->ACS_Step == 0) -+ { -+ //4 Set IGI -+ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); -+ if (get_rf_mimo_mode(priv) != MIMO_1T1R) -+ ODM_SetBBReg(pDM_Odm,0xc58,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); -+ -+ //4 Set ACS NHM threshold -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x82786e64); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff8c); -+ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N, 0xff); -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N+2, 0xffff); -+ -+ } -+ else if(pACS->ACS_Step == 1) -+ { -+ //4 Set IGI -+ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); -+ if (get_rf_mimo_mode(priv) != MIMO_1T1R) -+ ODM_SetBBReg(pDM_Odm,0xc58,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); -+ -+ //4 Set ACS NHM threshold -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x5a50463c); -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff64); -+ -+ } -+ } -+ } -+ -+} -+ -+VOID -+phydm_GetNHMStatisticsAP( -+ IN PVOID pDM_VOID, -+ IN u4Byte idx, // @ 2G, Real channel number = idx+1 -+ IN u4Byte acs_step -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ PACS pACS = &pDM_Odm->DM_ACS; -+ u4Byte value32 = 0; -+ u1Byte i; -+ -+ pACS->ACS_Step = acs_step; -+ -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ //4 Check if NHM result is ready -+ for (i=0; i<20; i++) { -+ -+ ODM_delay_ms(1); -+ if ( ODM_GetBBReg(pDM_Odm,rFPGA0_PSDReport,BIT17) ) -+ break; -+ } -+ -+ //4 Get NHM Statistics -+ if ( pACS->ACS_Step==1 ) { -+ -+ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT7_TO_CNT4_11N); -+ -+ pACS->NHM_Cnt[idx][9] = (value32 & bMaskByte1) >> 8; -+ pACS->NHM_Cnt[idx][8] = (value32 & bMaskByte0); -+ -+ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11N); // ODM_REG_NHM_CNT3_TO_CNT0_11N -+ -+ pACS->NHM_Cnt[idx][7] = (value32 & bMaskByte3) >> 24; -+ pACS->NHM_Cnt[idx][6] = (value32 & bMaskByte2) >> 16; -+ pACS->NHM_Cnt[idx][5] = (value32 & bMaskByte1) >> 8; -+ -+ } else if (pACS->ACS_Step==2) { -+ -+ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11N); // ODM_REG_NHM_CNT3_TO_CNT0_11N -+ -+ pACS->NHM_Cnt[idx][4] = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11N); -+ pACS->NHM_Cnt[idx][3] = (value32 & bMaskByte3) >> 24; -+ pACS->NHM_Cnt[idx][2] = (value32 & bMaskByte2) >> 16; -+ pACS->NHM_Cnt[idx][1] = (value32 & bMaskByte1) >> 8; -+ pACS->NHM_Cnt[idx][0] = (value32 & bMaskByte0); -+ } -+ } -+ else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ { -+ //4 Check if NHM result is ready -+ for (i=0; i<20; i++) { -+ -+ ODM_delay_ms(1); -+ if (ODM_GetBBReg(pDM_Odm,ODM_REG_NHM_DUR_READY_11AC,BIT17)) -+ break; -+ } -+ -+ if ( pACS->ACS_Step==1 ) { -+ -+ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT7_TO_CNT4_11AC); -+ -+ pACS->NHM_Cnt[idx][9] = (value32 & bMaskByte1) >> 8; -+ pACS->NHM_Cnt[idx][8] = (value32 & bMaskByte0); -+ -+ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11AC); // ODM_REG_NHM_CNT3_TO_CNT0_11AC -+ -+ pACS->NHM_Cnt[idx][7] = (value32 & bMaskByte3) >> 24; -+ pACS->NHM_Cnt[idx][6] = (value32 & bMaskByte2) >> 16; -+ pACS->NHM_Cnt[idx][5] = (value32 & bMaskByte1) >> 8; -+ -+ } else if (pACS->ACS_Step==2) { -+ -+ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11AC); // ODM_REG_NHM_CNT3_TO_CNT0_11AC -+ -+ pACS->NHM_Cnt[idx][4] = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); -+ pACS->NHM_Cnt[idx][3] = (value32 & bMaskByte3) >> 24; -+ pACS->NHM_Cnt[idx][2] = (value32 & bMaskByte2) >> 16; -+ pACS->NHM_Cnt[idx][1] = (value32 & bMaskByte1) >> 8; -+ pACS->NHM_Cnt[idx][0] = (value32 & bMaskByte0); -+ } -+ } -+ -+} -+ -+ -+//#define ACS_DEBUG_INFO //acs debug default off -+/* -+int phydm_AutoChannelSelectAP( -+ IN PVOID pDM_VOID, -+ IN u4Byte ACS_Type, // 0: RXCount_Type, 1:NHM_Type -+ IN u4Byte available_chnl_num // amount of all channels -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PACS pACS = &pDM_Odm->DM_ACS; -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ -+ static u4Byte score2G[MAX_2G_CHANNEL_NUM], score5G[MAX_5G_CHANNEL_NUM]; -+ u4Byte score[MAX_BSS_NUM], use_nhm = 0; -+ u4Byte minScore=0xffffffff; -+ u4Byte tmpScore, tmpIdx=0; -+ u4Byte traffic_check = 0; -+ u4Byte fa_count_weighting = 1; -+ int i, j, idx=0, idx_2G_end=-1, idx_5G_begin=-1, minChan=0; -+ struct bss_desc *pBss=NULL; -+ -+#ifdef _DEBUG_RTL8192CD_ -+ char tmpbuf[400]; -+ int len=0; -+#endif -+ -+ memset(score2G, '\0', sizeof(score2G)); -+ memset(score5G, '\0', sizeof(score5G)); -+ -+ for (i=0; iavailable_chnl_num; i++) { -+ if (priv->available_chnl[i] <= 14) -+ idx_2G_end = i; -+ else -+ break; -+ } -+ -+ for (i=0; iavailable_chnl_num; i++) { -+ if (priv->available_chnl[i] > 14) { -+ idx_5G_begin = i; -+ break; -+ } -+ } -+ -+// DELETE -+#ifndef CONFIG_RTL_NEW_AUTOCH -+ for (i=0; isite_survey->count; i++) { -+ pBss = &priv->site_survey->bss[i]; -+ for (idx=0; idxavailable_chnl_num; idx++) { -+ if (pBss->channel == priv->available_chnl[idx]) { -+ if (pBss->channel <= 14) -+ setChannelScore(idx, score2G, 0, MAX_2G_CHANNEL_NUM-1); -+ else -+ score5G[idx - idx_5G_begin] += 5; -+ break; -+ } -+ } -+ } -+#endif -+ -+ if (idx_2G_end >= 0) -+ for (i=0; i<=idx_2G_end; i++) -+ score[i] = score2G[i]; -+ if (idx_5G_begin >= 0) -+ for (i=idx_5G_begin; iavailable_chnl_num; i++) -+ score[i] = score5G[i - idx_5G_begin]; -+ -+#ifdef CONFIG_RTL_NEW_AUTOCH -+ { -+ u4Byte y, ch_begin=0, ch_end= priv->available_chnl_num; -+ -+ u4Byte do_ap_check = 1, ap_ratio = 0; -+ -+ if (idx_2G_end >= 0) -+ ch_end = idx_2G_end+1; -+ if (idx_5G_begin >= 0) -+ ch_begin = idx_5G_begin; -+ -+#ifdef ACS_DEBUG_INFO//for debug -+ printk("\n"); -+ for (y=ch_begin; yavailable_chnl[y], -+ priv->chnl_ss_mac_rx_count[y], -+ priv->chnl_ss_mac_rx_count_40M[y], -+ priv->chnl_ss_fa_count[y], -+ score[y]); -+ printk("\n"); -+#endif -+ -+#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_WLAN_HAL_8192EE) -+ if( pDM_Odm->SupportICType&(ODM_RTL8188E|ODM_RTL8192E)&& priv->pmib->dot11RFEntry.acs_type ) -+ { -+ u4Byte tmp_score[MAX_BSS_NUM]; -+ memcpy(tmp_score, score, sizeof(score)); -+ if (find_clean_channel(priv, ch_begin, ch_end, tmp_score)) { -+ //memcpy(score, tmp_score, sizeof(score)); -+#ifdef _DEBUG_RTL8192CD_ -+ printk("!! Found clean channel, select minimum FA channel\n"); -+#endif -+ goto USE_CLN_CH; -+ } -+#ifdef _DEBUG_RTL8192CD_ -+ printk("!! Not found clean channel, use NHM algorithm\n"); -+#endif -+ use_nhm = 1; -+USE_CLN_CH: -+ for (y=ch_begin; ynhm_cnt[y][i]; -+ for (j=0; jL, score: %d\n", -+ y+1, priv->nhm_cnt[y][9], priv->nhm_cnt[y][8], priv->nhm_cnt[y][7], -+ priv->nhm_cnt[y][6], priv->nhm_cnt[y][5], priv->nhm_cnt[y][4], -+ priv->nhm_cnt[y][3], priv->nhm_cnt[y][2], priv->nhm_cnt[y][1], -+ priv->nhm_cnt[y][0], score[y]); -+#endif -+ } -+ -+ if (!use_nhm) -+ memcpy(score, tmp_score, sizeof(score)); -+ -+ goto choose_ch; -+ } -+#endif -+ -+ // For each channel, weighting behind channels with MAC RX counter -+ //For each channel, weighting the channel with FA counter -+ -+ for (y=ch_begin; ychnl_ss_mac_rx_count[y]; -+ if (priv->chnl_ss_mac_rx_count[y] > 30) -+ do_ap_check = 0; -+ if( priv->chnl_ss_mac_rx_count[y] > MAC_RX_COUNT_THRESHOLD ) -+ traffic_check = 1; -+ -+#ifdef RTK_5G_SUPPORT -+ if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) -+#endif -+ { -+ if ((int)(y-4) >= (int)ch_begin) -+ score[y-4] += 2 * priv->chnl_ss_mac_rx_count[y]; -+ if ((int)(y-3) >= (int)ch_begin) -+ score[y-3] += 8 * priv->chnl_ss_mac_rx_count[y]; -+ if ((int)(y-2) >= (int)ch_begin) -+ score[y-2] += 8 * priv->chnl_ss_mac_rx_count[y]; -+ if ((int)(y-1) >= (int)ch_begin) -+ score[y-1] += 10 * priv->chnl_ss_mac_rx_count[y]; -+ if ((int)(y+1) < (int)ch_end) -+ score[y+1] += 10 * priv->chnl_ss_mac_rx_count[y]; -+ if ((int)(y+2) < (int)ch_end) -+ score[y+2] += 8 * priv->chnl_ss_mac_rx_count[y]; -+ if ((int)(y+3) < (int)ch_end) -+ score[y+3] += 8 * priv->chnl_ss_mac_rx_count[y]; -+ if ((int)(y+4) < (int)ch_end) -+ score[y+4] += 2 * priv->chnl_ss_mac_rx_count[y]; -+ } -+ -+ //this is for CH_LOAD caculation -+ if( priv->chnl_ss_cca_count[y] > priv->chnl_ss_fa_count[y]) -+ priv->chnl_ss_cca_count[y]-= priv->chnl_ss_fa_count[y]; -+ else -+ priv->chnl_ss_cca_count[y] = 0; -+ } -+ -+#ifdef ACS_DEBUG_INFO//for debug -+ printk("\n"); -+ for (y=ch_begin; yavailable_chnl[y], score[y]); -+ printk("\n"); -+#endif -+ -+ for (y=ch_begin; ychnl_ss_mac_rx_count_40M[y]) { -+ score[y] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if (priv->chnl_ss_mac_rx_count_40M[y] > 30) -+ do_ap_check = 0; -+ if( priv->chnl_ss_mac_rx_count_40M[y] > MAC_RX_COUNT_THRESHOLD ) -+ traffic_check = 1; -+ -+#ifdef RTK_5G_SUPPORT -+ if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) -+#endif -+ { -+ if ((int)(y-6) >= (int)ch_begin) -+ score[y-6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y-5) >= (int)ch_begin) -+ score[y-5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y-4) >= (int)ch_begin) -+ score[y-4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y-3) >= (int)ch_begin) -+ score[y-3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y-2) >= (int)ch_begin) -+ score[y-2] += (5 * priv->chnl_ss_mac_rx_count_40M[y])/2; -+ if ((int)(y-1) >= (int)ch_begin) -+ score[y-1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y+1) < (int)ch_end) -+ score[y+1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y+2) < (int)ch_end) -+ score[y+2] += (5 * priv->chnl_ss_mac_rx_count_40M[y])/2; -+ if ((int)(y+3) < (int)ch_end) -+ score[y+3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y+4) < (int)ch_end) -+ score[y+4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y+5) < (int)ch_end) -+ score[y+5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; -+ if ((int)(y+6) < (int)ch_end) -+ score[y+6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; -+ } -+ } -+ } -+ -+#ifdef ACS_DEBUG_INFO//for debug -+ printk("\n"); -+ for (y=ch_begin; yavailable_chnl[y], score[y]); -+ printk("\n"); -+ printk("4. do_ap_check=%d traffic_check=%d\n", do_ap_check, traffic_check); -+ printk("\n"); -+#endif -+ -+ if( traffic_check == 0) -+ fa_count_weighting = 5; -+ else -+ fa_count_weighting = 1; -+ -+ for (y=ch_begin; ychnl_ss_fa_count[y]; -+ } -+ -+#ifdef ACS_DEBUG_INFO//for debug -+ printk("\n"); -+ for (y=ch_begin; yavailable_chnl[y], score[y]); -+ printk("\n"); -+#endif -+ -+ if (do_ap_check) { -+ for (i=0; isite_survey->count; i++) { -+ pBss = &priv->site_survey->bss[i]; -+ for (y=ch_begin; ychannel == priv->available_chnl[y]) { -+ if (pBss->channel <= 14) { -+#ifdef ACS_DEBUG_INFO//for debug -+ printk("\n"); -+ printk("chnl[%d] has ap rssi=%d bw[0x%02x]\n", -+ pBss->channel, pBss->rssi, pBss->t_stamp[1]); -+ printk("\n"); -+#endif -+ if (pBss->rssi > 60) -+ ap_ratio = 4; -+ else if (pBss->rssi > 35) -+ ap_ratio = 2; -+ else -+ ap_ratio = 1; -+ -+ if ((pBss->t_stamp[1] & 0x6) == 0) { -+ score[y] += 50 * ap_ratio; -+ if ((int)(y-4) >= (int)ch_begin) -+ score[y-4] += 10 * ap_ratio; -+ if ((int)(y-3) >= (int)ch_begin) -+ score[y-3] += 20 * ap_ratio; -+ if ((int)(y-2) >= (int)ch_begin) -+ score[y-2] += 30 * ap_ratio; -+ if ((int)(y-1) >= (int)ch_begin) -+ score[y-1] += 40 * ap_ratio; -+ if ((int)(y+1) < (int)ch_end) -+ score[y+1] += 40 * ap_ratio; -+ if ((int)(y+2) < (int)ch_end) -+ score[y+2] += 30 * ap_ratio; -+ if ((int)(y+3) < (int)ch_end) -+ score[y+3] += 20 * ap_ratio; -+ if ((int)(y+4) < (int)ch_end) -+ score[y+4] += 10 * ap_ratio; -+ } -+ else if ((pBss->t_stamp[1] & 0x4) == 0) { -+ score[y] += 50 * ap_ratio; -+ if ((int)(y-3) >= (int)ch_begin) -+ score[y-3] += 20 * ap_ratio; -+ if ((int)(y-2) >= (int)ch_begin) -+ score[y-2] += 30 * ap_ratio; -+ if ((int)(y-1) >= (int)ch_begin) -+ score[y-1] += 40 * ap_ratio; -+ if ((int)(y+1) < (int)ch_end) -+ score[y+1] += 50 * ap_ratio; -+ if ((int)(y+2) < (int)ch_end) -+ score[y+2] += 50 * ap_ratio; -+ if ((int)(y+3) < (int)ch_end) -+ score[y+3] += 50 * ap_ratio; -+ if ((int)(y+4) < (int)ch_end) -+ score[y+4] += 50 * ap_ratio; -+ if ((int)(y+5) < (int)ch_end) -+ score[y+5] += 40 * ap_ratio; -+ if ((int)(y+6) < (int)ch_end) -+ score[y+6] += 30 * ap_ratio; -+ if ((int)(y+7) < (int)ch_end) -+ score[y+7] += 20 * ap_ratio; -+ } -+ else { -+ score[y] += 50 * ap_ratio; -+ if ((int)(y-7) >= (int)ch_begin) -+ score[y-7] += 20 * ap_ratio; -+ if ((int)(y-6) >= (int)ch_begin) -+ score[y-6] += 30 * ap_ratio; -+ if ((int)(y-5) >= (int)ch_begin) -+ score[y-5] += 40 * ap_ratio; -+ if ((int)(y-4) >= (int)ch_begin) -+ score[y-4] += 50 * ap_ratio; -+ if ((int)(y-3) >= (int)ch_begin) -+ score[y-3] += 50 * ap_ratio; -+ if ((int)(y-2) >= (int)ch_begin) -+ score[y-2] += 50 * ap_ratio; -+ if ((int)(y-1) >= (int)ch_begin) -+ score[y-1] += 50 * ap_ratio; -+ if ((int)(y+1) < (int)ch_end) -+ score[y+1] += 40 * ap_ratio; -+ if ((int)(y+2) < (int)ch_end) -+ score[y+2] += 30 * ap_ratio; -+ if ((int)(y+3) < (int)ch_end) -+ score[y+3] += 20 * ap_ratio; -+ } -+ } -+ else { -+ if ((pBss->t_stamp[1] & 0x6) == 0) { -+ score[y] += 500; -+ } -+ else if ((pBss->t_stamp[1] & 0x4) == 0) { -+ score[y] += 500; -+ if ((int)(y+1) < (int)ch_end) -+ score[y+1] += 500; -+ } -+ else { -+ score[y] += 500; -+ if ((int)(y-1) >= (int)ch_begin) -+ score[y-1] += 500; -+ } -+ } -+ break; -+ } -+ } -+ } -+ } -+ -+#ifdef ACS_DEBUG_INFO//for debug -+ printk("\n"); -+ for (y=ch_begin; yavailable_chnl[y],score[y]); -+ printk("\n"); -+#endif -+ -+#ifdef SS_CH_LOAD_PROC -+ -+ // caculate noise level -- suggested by wilson -+ for (y=ch_begin; ychnl_ss_fa_count[y]>1000) { -+ fa_lv = 100; -+ } else if (priv->chnl_ss_fa_count[y]>500) { -+ fa_lv = 34 * (priv->chnl_ss_fa_count[y]-500) / 500 + 66; -+ } else if (priv->chnl_ss_fa_count[y]>200) { -+ fa_lv = 33 * (priv->chnl_ss_fa_count[y] - 200) / 300 + 33; -+ } else if (priv->chnl_ss_fa_count[y]>100) { -+ fa_lv = 18 * (priv->chnl_ss_fa_count[y] - 100) / 100 + 15; -+ } else { -+ fa_lv = 15 * priv->chnl_ss_fa_count[y] / 100; -+ } -+ if (priv->chnl_ss_cca_count[y]>400) { -+ cca_lv = 100; -+ } else if (priv->chnl_ss_cca_count[y]>200) { -+ cca_lv = 34 * (priv->chnl_ss_cca_count[y] - 200) / 200 + 66; -+ } else if (priv->chnl_ss_cca_count[y]>80) { -+ cca_lv = 33 * (priv->chnl_ss_cca_count[y] - 80) / 120 + 33; -+ } else if (priv->chnl_ss_cca_count[y]>40) { -+ cca_lv = 18 * (priv->chnl_ss_cca_count[y] - 40) / 40 + 15; -+ } else { -+ cca_lv = 15 * priv->chnl_ss_cca_count[y] / 40; -+ } -+ -+ priv->chnl_ss_load[y] = (((fa_lv > cca_lv)? fa_lv : cca_lv)*75+((score[y]>100)?100:score[y])*25)/100; -+ -+ DEBUG_INFO("ch:%d f=%d (%d), c=%d (%d), fl=%d, cl=%d, sc=%d, cu=%d\n", -+ priv->available_chnl[y], -+ priv->chnl_ss_fa_count[y], fa_thd, -+ priv->chnl_ss_cca_count[y], cca_thd, -+ fa_lv, -+ cca_lv, -+ score[y], -+ priv->chnl_ss_load[y]); -+ -+ } -+#endif -+ } -+#endif -+ -+choose_ch: -+ -+#ifdef DFS -+ // heavy weighted DFS channel -+ if (idx_5G_begin >= 0){ -+ for (i=idx_5G_begin; iavailable_chnl_num; i++) { -+ if (!priv->pmib->dot11DFSEntry.disable_DFS && is_DFS_channel(priv->available_chnl[i]) -+ && (score[i]!= 0xffffffff)){ -+ score[i] += 1600; -+ } -+ } -+ } -+#endif -+ -+ -+//prevent Auto Channel selecting wrong channel in 40M mode----------------- -+ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) -+ && priv->pshare->is_40m_bw) { -+#if 0 -+ if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 1) { -+ //Upper Primary Channel, cannot select the two lowest channels -+ if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { -+ score[0] = 0xffffffff; -+ score[1] = 0xffffffff; -+ score[2] = 0xffffffff; -+ score[3] = 0xffffffff; -+ score[4] = 0xffffffff; -+ -+ score[13] = 0xffffffff; -+ score[12] = 0xffffffff; -+ score[11] = 0xffffffff; -+ } -+ -+// if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { -+// score[idx_5G_begin] = 0xffffffff; -+// score[idx_5G_begin + 1] = 0xffffffff; -+// } -+ } -+ else if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 2) { -+ //Lower Primary Channel, cannot select the two highest channels -+ if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { -+ score[0] = 0xffffffff; -+ score[1] = 0xffffffff; -+ score[2] = 0xffffffff; -+ -+ score[13] = 0xffffffff; -+ score[12] = 0xffffffff; -+ score[11] = 0xffffffff; -+ score[10] = 0xffffffff; -+ score[9] = 0xffffffff; -+ } -+ -+// if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { -+// score[priv->available_chnl_num - 2] = 0xffffffff; -+// score[priv->available_chnl_num - 1] = 0xffffffff; -+// } -+ } -+#endif -+ for (i=0; i<=idx_2G_end; ++i) -+ if (priv->available_chnl[i] == 14) -+ score[i] = 0xffffffff; // mask chan14 -+ -+#ifdef RTK_5G_SUPPORT -+ if (idx_5G_begin >= 0) { -+ for (i=idx_5G_begin; iavailable_chnl_num; i++) { -+ int ch = priv->available_chnl[i]; -+ if(priv->available_chnl[i] > 144) -+ --ch; -+ if((ch%4) || ch==140 || ch == 164 ) //mask ch 140, ch 165, ch 184... -+ score[i] = 0xffffffff; -+ } -+ } -+#endif -+ -+ -+ } -+ -+ if (priv->pmib->dot11RFEntry.disable_ch1213) { -+ for (i=0; i<=idx_2G_end; ++i) { -+ int ch = priv->available_chnl[i]; -+ if ((ch == 12) || (ch == 13)) -+ score[i] = 0xffffffff; -+ } -+ } -+ -+ if (((priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_GLOBAL) || -+ (priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_WORLD_WIDE)) && -+ (idx_2G_end >= 11) && (idx_2G_end < 14)) { -+ score[13] = 0xffffffff; // mask chan14 -+ score[12] = 0xffffffff; // mask chan13 -+ score[11] = 0xffffffff; // mask chan12 -+ } -+ -+//------------------------------------------------------------------ -+ -+#ifdef _DEBUG_RTL8192CD_ -+ for (i=0; iavailable_chnl_num; i++) { -+ len += sprintf(tmpbuf+len, "ch%d:%u ", priv->available_chnl[i], score[i]); -+ } -+ strcat(tmpbuf, "\n"); -+ panic_printk("%s", tmpbuf); -+ -+#endif -+ -+ if ( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) -+ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) -+ { -+ for (i=0; iavailable_chnl_num; i++) { -+ if (is80MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) { -+ tmpScore = 0; -+ for (j=0; j<4; j++) { -+ if ((tmpScore != 0xffffffff) && (score[i+j] != 0xffffffff)) -+ tmpScore += score[i+j]; -+ else -+ tmpScore = 0xffffffff; -+ } -+ tmpScore = tmpScore / 4; -+ if (minScore > tmpScore) { -+ minScore = tmpScore; -+ -+ tmpScore = 0xffffffff; -+ for (j=0; j<4; j++) { -+ if (score[i+j] < tmpScore) { -+ tmpScore = score[i+j]; -+ tmpIdx = i+j; -+ } -+ } -+ -+ idx = tmpIdx; -+ } -+ i += 3; -+ } -+ } -+ if (minScore == 0xffffffff) { -+ // there is no 80M channels -+ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; -+ for (i=0; iavailable_chnl_num; i++) { -+ if (score[i] < minScore) { -+ minScore = score[i]; -+ idx = i; -+ } -+ } -+ } -+ } -+ else if( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) -+ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40)) -+ { -+ for (i=0; iavailable_chnl_num; i++) { -+ if(is40MChannel(priv->available_chnl,priv->available_chnl_num,priv->available_chnl[i])) { -+ tmpScore = 0; -+ for(j=0;j<2;j++) { -+ if ((tmpScore != 0xffffffff) && (score[i+j] != 0xffffffff)) -+ tmpScore += score[i+j]; -+ else -+ tmpScore = 0xffffffff; -+ } -+ tmpScore = tmpScore / 2; -+ if(minScore > tmpScore) { -+ minScore = tmpScore; -+ -+ tmpScore = 0xffffffff; -+ for (j=0; j<2; j++) { -+ if (score[i+j] < tmpScore) { -+ tmpScore = score[i+j]; -+ tmpIdx = i+j; -+ } -+ } -+ -+ idx = tmpIdx; -+ } -+ i += 1; -+ } -+ } -+ if (minScore == 0xffffffff) { -+ // there is no 40M channels -+ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; -+ for (i=0; iavailable_chnl_num; i++) { -+ if (score[i] < minScore) { -+ minScore = score[i]; -+ idx = i; -+ } -+ } -+ } -+ } -+ else if( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) -+ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) -+ && (priv->available_chnl_num >= 8) ) -+ { -+ u4Byte groupScore[14]; -+ -+ memset(groupScore, 0xff , sizeof(groupScore)); -+ for (i=0; iavailable_chnl_num-4; i++) { -+ if (score[i] != 0xffffffff && score[i+4] != 0xffffffff) { -+ groupScore[i] = score[i] + score[i+4]; -+ DEBUG_INFO("groupScore, ch %d,%d: %d\n", i+1, i+5, groupScore[i]); -+ if (groupScore[i] < minScore) { -+#ifdef AUTOCH_SS_SPEEDUP -+ if(priv->pmib->miscEntry.autoch_1611_enable) -+ { -+ if(priv->available_chnl[i]==1 || priv->available_chnl[i]==6 || priv->available_chnl[i]==11) -+ { -+ minScore = groupScore[i]; -+ idx = i; -+ } -+ } -+ else -+#endif -+ { -+ minScore = groupScore[i]; -+ idx = i; -+ } -+ } -+ } -+ } -+ -+ if (score[idx] < score[idx+4]) { -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; -+ } else { -+ idx = idx + 4; -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; -+ } -+ } -+ else -+ { -+ for (i=0; iavailable_chnl_num; i++) { -+ if (score[i] < minScore) { -+#ifdef AUTOCH_SS_SPEEDUP -+ if(priv->pmib->miscEntry.autoch_1611_enable) -+ { -+ if(priv->available_chnl[i]==1 || priv->available_chnl[i]==6 || priv->available_chnl[i]==11) -+ { -+ minScore = score[i]; -+ idx = i; -+ } -+ } -+ else -+#endif -+ { -+ minScore = score[i]; -+ idx = i; -+ } -+ } -+ } -+ } -+ -+ if (IS_A_CUT_8881A(priv) && -+ (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) { -+ if ((priv->available_chnl[idx] == 36) || -+ (priv->available_chnl[idx] == 52) || -+ (priv->available_chnl[idx] == 100) || -+ (priv->available_chnl[idx] == 116) || -+ (priv->available_chnl[idx] == 132) || -+ (priv->available_chnl[idx] == 149) || -+ (priv->available_chnl[idx] == 165)) -+ idx++; -+ else if ((priv->available_chnl[idx] == 48) || -+ (priv->available_chnl[idx] == 64) || -+ (priv->available_chnl[idx] == 112) || -+ (priv->available_chnl[idx] == 128) || -+ (priv->available_chnl[idx] == 144) || -+ (priv->available_chnl[idx] == 161) || -+ (priv->available_chnl[idx] == 177)) -+ idx--; -+ } -+ -+ minChan = priv->available_chnl[idx]; -+ -+ // skip channel 14 if don't support ofdm -+ if ((priv->pmib->dot11RFEntry.disable_ch14_ofdm) && -+ (minChan == 14)) { -+ score[idx] = 0xffffffff; -+ -+ minScore = 0xffffffff; -+ for (i=0; iavailable_chnl_num; i++) { -+ if (score[i] < minScore) { -+ minScore = score[i]; -+ idx = i; -+ } -+ } -+ minChan = priv->available_chnl[idx]; -+ } -+ -+#if 0 -+ //Check if selected channel available for 80M/40M BW or NOT ? -+ if(priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) -+ { -+ if(priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80) -+ { -+ if(!is80MChannel(priv->available_chnl,priv->available_chnl_num,minChan)) -+ { -+ //printk("BW=80M, selected channel = %d is unavaliable! reduce to 40M\n", minChan); -+ //priv->pmib->dot11nConfigEntry.dot11nUse40M = HT_CHANNEL_WIDTH_20_40; -+ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20_40; -+ } -+ } -+ -+ if(priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) -+ { -+ if(!is40MChannel(priv->available_chnl,priv->available_chnl_num,minChan)) -+ { -+ //printk("BW=40M, selected channel = %d is unavaliable! reduce to 20M\n", minChan); -+ //priv->pmib->dot11nConfigEntry.dot11nUse40M = HT_CHANNEL_WIDTH_20; -+ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; -+ } -+ } -+ } -+#endif -+ -+#ifdef CONFIG_RTL_NEW_AUTOCH -+ RTL_W32(RXERR_RPT, RXERR_RPT_RST); -+#endif -+ -+// auto adjust contro-sideband -+ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) -+ && (priv->pshare->is_40m_bw ==1 || priv->pshare->is_40m_bw ==2)) { -+ -+#ifdef RTK_5G_SUPPORT -+ if (priv->pmib->dot11RFEntry.phyBandSelect & PHY_BAND_5G) { -+ if( (minChan>144) ? ((minChan-1)%8) : (minChan%8)) { -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; -+ } else { -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; -+ } -+ -+ } else -+#endif -+ { -+#if 0 -+#ifdef CONFIG_RTL_NEW_AUTOCH -+ unsigned int ch_max; -+ -+ if (priv->available_chnl[idx_2G_end] >= 13) -+ ch_max = 13; -+ else -+ ch_max = priv->available_chnl[idx_2G_end]; -+ -+ if ((minChan >= 5) && (minChan <= (ch_max-5))) { -+ if (score[minChan+4] > score[minChan-4]) { // what if some channels were cancelled? -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; -+ } else { -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; -+ } -+ } else -+#endif -+ { -+ if (minChan < 5) { -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; -+ } -+ else if (minChan > 7) { -+ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; -+ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; -+ } -+ } -+#endif -+ } -+ } -+//----------------------- -+ -+#if defined(__ECOS) && defined(CONFIG_SDIO_HCI) -+ panic_printk("Auto channel choose ch:%d\n", minChan); -+#else -+#ifdef _DEBUG_RTL8192CD_ -+ panic_printk("Auto channel choose ch:%d\n", minChan); -+#endif -+#endif -+#ifdef ACS_DEBUG_INFO//for debug -+ printk("7. minChan:%d 2nd_offset:%d\n", minChan, priv->pshare->offset_2nd_chan); -+#endif -+ -+ return minChan; -+} -+*/ -+ -+#endif -+ -+VOID -+phydm_CLMInit( -+ IN PVOID pDM_VOID, -+ IN u2Byte sampleNum /*unit : 4us*/ -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_TIME_PERIOD_11AC, bMaskLWord, sampleNum); /*4us sample 1 time*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT8, 0x1); /*Enable CCX for CLM*/ -+ } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_TIME_PERIOD_11N, bMaskLWord, sampleNum); /*4us sample 1 time*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT8, 0x1); /*Enable CCX for CLM*/ -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM sampleNum = %d\n", __func__, sampleNum)); -+ -+} -+ -+VOID -+phydm_CLMtrigger( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x0); /*Trigger CLM*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x1); -+ } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x0); /*Trigger CLM*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x1); -+ } -+} -+ -+BOOLEAN -+phydm_checkCLMready( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte value32 = 0; -+ BOOLEAN ret = FALSE; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*make sure CLM calc is ready*/ -+ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_READY_11N, bMaskDWord); /*make sure CLM calc is ready*/ -+ -+ if (value32 & BIT16) -+ ret = TRUE; -+ else -+ ret = FALSE; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM ready = %d\n", __func__, ret)); -+ -+ return ret; -+} -+ -+u2Byte -+phydm_getCLMresult( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte value32 = 0; -+ u2Byte results = 0; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*read CLM calc result*/ -+ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11N, bMaskDWord); /*read CLM calc result*/ -+ -+ results = (u2Byte)(value32 & bMaskLWord); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM result = %d\n", __func__, results)); -+ -+ return results; -+/*results are number of CCA times in sampleNum*/ -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++u1Byte ++ODM_GetAutoChannelSelectResult( ++ IN PVOID pDM_VOID, ++ IN u1Byte Band ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(Band == ODM_BAND_2_4G) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_2G(%d)\n", pACS->CleanChannel_2G)); ++ return (u1Byte)pACS->CleanChannel_2G; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_5G(%d)\n", pACS->CleanChannel_5G)); ++ return (u1Byte)pACS->CleanChannel_5G; ++ } ++#else ++ return (u1Byte)pACS->CleanChannel_2G; ++#endif ++ ++} ++ ++VOID ++odm_AutoChannelSelectSetting( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN IsEnable ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte period = 0x2710;// 40ms in default ++ u2Byte NHMType = 0x7; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSetting()=========> \n")); ++ ++ if(IsEnable) ++ {//20 ms ++ period = 0x1388; ++ NHMType = 0x1; ++ } ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ //PHY parameters initialize for ac series ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); //0x990[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms ++ //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, NHMType); //0x994[9:8]=3 enable CCX ++ } ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ //PHY parameters initialize for n series ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); //0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms ++ //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, NHMType); //0x890[9:8]=3 enable CCX ++ } ++#endif ++} ++ ++VOID ++odm_AutoChannelSelectInit( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ u1Byte i; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ return; ++ ++ if(pACS->bForceACSResult) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectInit()=========> \n")); ++ ++ pACS->CleanChannel_2G = 1; ++ pACS->CleanChannel_5G = 36; ++ ++ for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i) ++ { ++ pACS->Channel_Info_2G[0][i] = 0; ++ pACS->Channel_Info_2G[1][i] = 0; ++ } ++ ++ if(pDM_Odm->SupportICType & (ODM_IC_11AC_SERIES|ODM_RTL8192D)) ++ { ++ for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i) ++ { ++ pACS->Channel_Info_5G[0][i] = 0; ++ pACS->Channel_Info_5G[1][i] = 0; ++ } ++ } ++#endif ++} ++ ++VOID ++odm_AutoChannelSelectReset( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ return; ++ ++ if(pACS->bForceACSResult) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectReset()=========> \n")); ++ ++ odm_AutoChannelSelectSetting(pDM_Odm,TRUE);// for 20ms measurement ++ Phydm_NHMCounterStatisticsReset(pDM_Odm); ++#endif ++} ++ ++VOID ++odm_AutoChannelSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte Channel ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ u1Byte ChannelIDX = 0, SearchIDX = 0; ++ u2Byte MaxScore=0; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Return: SupportAbility ODM_BB_NHM_CNT is disabled\n")); ++ return; ++ } ++ ++ if(pACS->bForceACSResult) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Force 2G clean channel = %d, 5G clean channel = %d\n", ++ pACS->CleanChannel_2G, pACS->CleanChannel_5G)); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel = %d=========> \n", Channel)); ++ ++ Phydm_GetNHMCounterStatistics(pDM_Odm); ++ odm_AutoChannelSelectSetting(pDM_Odm,FALSE); ++ ++ if(Channel >=1 && Channel <=14) ++ { ++ ChannelIDX = Channel - 1; ++ pACS->Channel_Info_2G[1][ChannelIDX]++; ++ ++ if(pACS->Channel_Info_2G[1][ChannelIDX] >= 2) ++ pACS->Channel_Info_2G[0][ChannelIDX] = (pACS->Channel_Info_2G[0][ChannelIDX] >> 1) + ++ (pACS->Channel_Info_2G[0][ChannelIDX] >> 2) + (pDM_Odm->NHM_cnt_0>>2); ++ else ++ pACS->Channel_Info_2G[0][ChannelIDX] = pDM_Odm->NHM_cnt_0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): NHM_cnt_0 = %d \n", pDM_Odm->NHM_cnt_0)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel_Info[0][%d] = %d, Channel_Info[1][%d] = %d\n", ChannelIDX, pACS->Channel_Info_2G[0][ChannelIDX], ChannelIDX, pACS->Channel_Info_2G[1][ChannelIDX])); ++ ++ for(SearchIDX = 0; SearchIDX < ODM_MAX_CHANNEL_2G; SearchIDX++) ++ { ++ if(pACS->Channel_Info_2G[1][SearchIDX] != 0) ++ { ++ if(pACS->Channel_Info_2G[0][SearchIDX] >= MaxScore) ++ { ++ MaxScore = pACS->Channel_Info_2G[0][SearchIDX]; ++ pACS->CleanChannel_2G = SearchIDX+1; ++ } ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("(1)odm_AutoChannelSelect(): 2G: CleanChannel_2G = %d, MaxScore = %d \n", ++ pACS->CleanChannel_2G, MaxScore)); ++ ++ } ++ else if(Channel >= 36) ++ { ++ // Need to do ++ pACS->CleanChannel_5G = Channel; ++ } ++#endif ++} ++ ++#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ ++VOID ++phydm_AutoChannelSelectSettingAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte setting, // 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING ++ IN u4Byte acs_step ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSettingAP()=========> \n")); ++ ++ //3 Store Default Setting ++ if(setting == STORE_DEFAULT_NHM_SETTING) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("STORE_DEFAULT_NHM_SETTING\n")); ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) // store Reg0x990, Reg0x994, Reg0x998, Reg0x99C, Reg0x9a0 ++ { ++ pACS->Reg0x990 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC); // Reg0x990 ++ pACS->Reg0x994 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC); // Reg0x994 ++ pACS->Reg0x998 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC); // Reg0x998 ++ pACS->Reg0x99C = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC); // Reg0x99c ++ pACS->Reg0x9A0 = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC); // Reg0x9a0, u1Byte ++ } ++ else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ pACS->Reg0x890 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N); // Reg0x890 ++ pACS->Reg0x894 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N); // Reg0x894 ++ pACS->Reg0x898 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N); // Reg0x898 ++ pACS->Reg0x89C = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N); // Reg0x89c ++ pACS->Reg0xE28 = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N); // Reg0xe28, u1Byte ++ } ++ } ++ ++ //3 Restore Default Setting ++ else if(setting == RESTORE_DEFAULT_NHM_SETTING) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("RESTORE_DEFAULT_NHM_SETTING\n")); ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) // store Reg0x990, Reg0x994, Reg0x998, Reg0x99C, Reg0x9a0 ++ { ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC, pACS->Reg0x990); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, pACS->Reg0x994); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, pACS->Reg0x998); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, pACS->Reg0x99C); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC, pACS->Reg0x9A0); ++ } ++ else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, pACS->Reg0x890); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N, pACS->Reg0x894); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, pACS->Reg0x898); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, pACS->Reg0x89C); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N, pACS->Reg0xE28); ++ } ++ } ++ ++ //3 ACS Setting ++ else if(setting == ACS_NHM_SETTING) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("ACS_NHM_SETTING\n")); ++ u2Byte period; ++ period = 0x61a8; ++ pACS->ACS_Step = acs_step; ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ //4 Set NHM period, 0x990[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); ++ //4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC,BIT8|BIT9|BIT10, 3); ++ ++ if(pACS->ACS_Step == 0) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xe50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x82786e64); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff8c); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC, 0xff); ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC+2, 0xffff); ++ ++ } ++ else if(pACS->ACS_Step == 1) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xe50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x5a50463c); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff64); ++ ++ } ++ ++ } ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ //4 Set NHM period, 0x894[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); ++ //4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N,BIT8|BIT9|BIT10, 3); ++ ++ if(pACS->ACS_Step == 0) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xc58,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x82786e64); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff8c); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N, 0xff); ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N+2, 0xffff); ++ ++ } ++ else if(pACS->ACS_Step == 1) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xc58,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x5a50463c); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff64); ++ ++ } ++ } ++ } ++ ++} ++ ++VOID ++phydm_GetNHMStatisticsAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte idx, // @ 2G, Real channel number = idx+1 ++ IN u4Byte acs_step ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ u4Byte value32 = 0; ++ u1Byte i; ++ ++ pACS->ACS_Step = acs_step; ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ //4 Check if NHM result is ready ++ for (i=0; i<20; i++) { ++ ++ ODM_delay_ms(1); ++ if ( ODM_GetBBReg(pDM_Odm,rFPGA0_PSDReport,BIT17) ) ++ break; ++ } ++ ++ //4 Get NHM Statistics ++ if ( pACS->ACS_Step==1 ) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT7_TO_CNT4_11N); ++ ++ pACS->NHM_Cnt[idx][9] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][8] = (value32 & bMaskByte0); ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11N); // ODM_REG_NHM_CNT3_TO_CNT0_11N ++ ++ pACS->NHM_Cnt[idx][7] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][6] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][5] = (value32 & bMaskByte1) >> 8; ++ ++ } else if (pACS->ACS_Step==2) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11N); // ODM_REG_NHM_CNT3_TO_CNT0_11N ++ ++ pACS->NHM_Cnt[idx][4] = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11N); ++ pACS->NHM_Cnt[idx][3] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][2] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][1] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][0] = (value32 & bMaskByte0); ++ } ++ } ++ else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ //4 Check if NHM result is ready ++ for (i=0; i<20; i++) { ++ ++ ODM_delay_ms(1); ++ if (ODM_GetBBReg(pDM_Odm,ODM_REG_NHM_DUR_READY_11AC,BIT17)) ++ break; ++ } ++ ++ if ( pACS->ACS_Step==1 ) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT7_TO_CNT4_11AC); ++ ++ pACS->NHM_Cnt[idx][9] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][8] = (value32 & bMaskByte0); ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11AC); // ODM_REG_NHM_CNT3_TO_CNT0_11AC ++ ++ pACS->NHM_Cnt[idx][7] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][6] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][5] = (value32 & bMaskByte1) >> 8; ++ ++ } else if (pACS->ACS_Step==2) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11AC); // ODM_REG_NHM_CNT3_TO_CNT0_11AC ++ ++ pACS->NHM_Cnt[idx][4] = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); ++ pACS->NHM_Cnt[idx][3] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][2] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][1] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][0] = (value32 & bMaskByte0); ++ } ++ } ++ ++} ++ ++ ++//#define ACS_DEBUG_INFO //acs debug default off ++/* ++int phydm_AutoChannelSelectAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte ACS_Type, // 0: RXCount_Type, 1:NHM_Type ++ IN u4Byte available_chnl_num // amount of all channels ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ static u4Byte score2G[MAX_2G_CHANNEL_NUM], score5G[MAX_5G_CHANNEL_NUM]; ++ u4Byte score[MAX_BSS_NUM], use_nhm = 0; ++ u4Byte minScore=0xffffffff; ++ u4Byte tmpScore, tmpIdx=0; ++ u4Byte traffic_check = 0; ++ u4Byte fa_count_weighting = 1; ++ int i, j, idx=0, idx_2G_end=-1, idx_5G_begin=-1, minChan=0; ++ struct bss_desc *pBss=NULL; ++ ++#ifdef _DEBUG_RTL8192CD_ ++ char tmpbuf[400]; ++ int len=0; ++#endif ++ ++ memset(score2G, '\0', sizeof(score2G)); ++ memset(score5G, '\0', sizeof(score5G)); ++ ++ for (i=0; iavailable_chnl_num; i++) { ++ if (priv->available_chnl[i] <= 14) ++ idx_2G_end = i; ++ else ++ break; ++ } ++ ++ for (i=0; iavailable_chnl_num; i++) { ++ if (priv->available_chnl[i] > 14) { ++ idx_5G_begin = i; ++ break; ++ } ++ } ++ ++// DELETE ++#ifndef CONFIG_RTL_NEW_AUTOCH ++ for (i=0; isite_survey->count; i++) { ++ pBss = &priv->site_survey->bss[i]; ++ for (idx=0; idxavailable_chnl_num; idx++) { ++ if (pBss->channel == priv->available_chnl[idx]) { ++ if (pBss->channel <= 14) ++ setChannelScore(idx, score2G, 0, MAX_2G_CHANNEL_NUM-1); ++ else ++ score5G[idx - idx_5G_begin] += 5; ++ break; ++ } ++ } ++ } ++#endif ++ ++ if (idx_2G_end >= 0) ++ for (i=0; i<=idx_2G_end; i++) ++ score[i] = score2G[i]; ++ if (idx_5G_begin >= 0) ++ for (i=idx_5G_begin; iavailable_chnl_num; i++) ++ score[i] = score5G[i - idx_5G_begin]; ++ ++#ifdef CONFIG_RTL_NEW_AUTOCH ++ { ++ u4Byte y, ch_begin=0, ch_end= priv->available_chnl_num; ++ ++ u4Byte do_ap_check = 1, ap_ratio = 0; ++ ++ if (idx_2G_end >= 0) ++ ch_end = idx_2G_end+1; ++ if (idx_5G_begin >= 0) ++ ch_begin = idx_5G_begin; ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], ++ priv->chnl_ss_mac_rx_count[y], ++ priv->chnl_ss_mac_rx_count_40M[y], ++ priv->chnl_ss_fa_count[y], ++ score[y]); ++ printk("\n"); ++#endif ++ ++#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_WLAN_HAL_8192EE) ++ if( pDM_Odm->SupportICType&(ODM_RTL8188E|ODM_RTL8192E)&& priv->pmib->dot11RFEntry.acs_type ) ++ { ++ u4Byte tmp_score[MAX_BSS_NUM]; ++ memcpy(tmp_score, score, sizeof(score)); ++ if (find_clean_channel(priv, ch_begin, ch_end, tmp_score)) { ++ //memcpy(score, tmp_score, sizeof(score)); ++#ifdef _DEBUG_RTL8192CD_ ++ printk("!! Found clean channel, select minimum FA channel\n"); ++#endif ++ goto USE_CLN_CH; ++ } ++#ifdef _DEBUG_RTL8192CD_ ++ printk("!! Not found clean channel, use NHM algorithm\n"); ++#endif ++ use_nhm = 1; ++USE_CLN_CH: ++ for (y=ch_begin; ynhm_cnt[y][i]; ++ for (j=0; jL, score: %d\n", ++ y+1, priv->nhm_cnt[y][9], priv->nhm_cnt[y][8], priv->nhm_cnt[y][7], ++ priv->nhm_cnt[y][6], priv->nhm_cnt[y][5], priv->nhm_cnt[y][4], ++ priv->nhm_cnt[y][3], priv->nhm_cnt[y][2], priv->nhm_cnt[y][1], ++ priv->nhm_cnt[y][0], score[y]); ++#endif ++ } ++ ++ if (!use_nhm) ++ memcpy(score, tmp_score, sizeof(score)); ++ ++ goto choose_ch; ++ } ++#endif ++ ++ // For each channel, weighting behind channels with MAC RX counter ++ //For each channel, weighting the channel with FA counter ++ ++ for (y=ch_begin; ychnl_ss_mac_rx_count[y]; ++ if (priv->chnl_ss_mac_rx_count[y] > 30) ++ do_ap_check = 0; ++ if( priv->chnl_ss_mac_rx_count[y] > MAC_RX_COUNT_THRESHOLD ) ++ traffic_check = 1; ++ ++#ifdef RTK_5G_SUPPORT ++ if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) ++#endif ++ { ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 2 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 10 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 10 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 2 * priv->chnl_ss_mac_rx_count[y]; ++ } ++ ++ //this is for CH_LOAD caculation ++ if( priv->chnl_ss_cca_count[y] > priv->chnl_ss_fa_count[y]) ++ priv->chnl_ss_cca_count[y]-= priv->chnl_ss_fa_count[y]; ++ else ++ priv->chnl_ss_cca_count[y] = 0; ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], score[y]); ++ printk("\n"); ++#endif ++ ++ for (y=ch_begin; ychnl_ss_mac_rx_count_40M[y]) { ++ score[y] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if (priv->chnl_ss_mac_rx_count_40M[y] > 30) ++ do_ap_check = 0; ++ if( priv->chnl_ss_mac_rx_count_40M[y] > MAC_RX_COUNT_THRESHOLD ) ++ traffic_check = 1; ++ ++#ifdef RTK_5G_SUPPORT ++ if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) ++#endif ++ { ++ if ((int)(y-6) >= (int)ch_begin) ++ score[y-6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-5) >= (int)ch_begin) ++ score[y-5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += (5 * priv->chnl_ss_mac_rx_count_40M[y])/2; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += (5 * priv->chnl_ss_mac_rx_count_40M[y])/2; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+5) < (int)ch_end) ++ score[y+5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+6) < (int)ch_end) ++ score[y+6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; ++ } ++ } ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], score[y]); ++ printk("\n"); ++ printk("4. do_ap_check=%d traffic_check=%d\n", do_ap_check, traffic_check); ++ printk("\n"); ++#endif ++ ++ if( traffic_check == 0) ++ fa_count_weighting = 5; ++ else ++ fa_count_weighting = 1; ++ ++ for (y=ch_begin; ychnl_ss_fa_count[y]; ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], score[y]); ++ printk("\n"); ++#endif ++ ++ if (do_ap_check) { ++ for (i=0; isite_survey->count; i++) { ++ pBss = &priv->site_survey->bss[i]; ++ for (y=ch_begin; ychannel == priv->available_chnl[y]) { ++ if (pBss->channel <= 14) { ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ printk("chnl[%d] has ap rssi=%d bw[0x%02x]\n", ++ pBss->channel, pBss->rssi, pBss->t_stamp[1]); ++ printk("\n"); ++#endif ++ if (pBss->rssi > 60) ++ ap_ratio = 4; ++ else if (pBss->rssi > 35) ++ ap_ratio = 2; ++ else ++ ap_ratio = 1; ++ ++ if ((pBss->t_stamp[1] & 0x6) == 0) { ++ score[y] += 50 * ap_ratio; ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 10 * ap_ratio; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 20 * ap_ratio; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 30 * ap_ratio; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 40 * ap_ratio; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 40 * ap_ratio; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 30 * ap_ratio; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 20 * ap_ratio; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 10 * ap_ratio; ++ } ++ else if ((pBss->t_stamp[1] & 0x4) == 0) { ++ score[y] += 50 * ap_ratio; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 20 * ap_ratio; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 30 * ap_ratio; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 40 * ap_ratio; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 50 * ap_ratio; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 50 * ap_ratio; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 50 * ap_ratio; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 50 * ap_ratio; ++ if ((int)(y+5) < (int)ch_end) ++ score[y+5] += 40 * ap_ratio; ++ if ((int)(y+6) < (int)ch_end) ++ score[y+6] += 30 * ap_ratio; ++ if ((int)(y+7) < (int)ch_end) ++ score[y+7] += 20 * ap_ratio; ++ } ++ else { ++ score[y] += 50 * ap_ratio; ++ if ((int)(y-7) >= (int)ch_begin) ++ score[y-7] += 20 * ap_ratio; ++ if ((int)(y-6) >= (int)ch_begin) ++ score[y-6] += 30 * ap_ratio; ++ if ((int)(y-5) >= (int)ch_begin) ++ score[y-5] += 40 * ap_ratio; ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 50 * ap_ratio; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 50 * ap_ratio; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 50 * ap_ratio; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 50 * ap_ratio; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 40 * ap_ratio; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 30 * ap_ratio; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 20 * ap_ratio; ++ } ++ } ++ else { ++ if ((pBss->t_stamp[1] & 0x6) == 0) { ++ score[y] += 500; ++ } ++ else if ((pBss->t_stamp[1] & 0x4) == 0) { ++ score[y] += 500; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 500; ++ } ++ else { ++ score[y] += 500; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 500; ++ } ++ } ++ break; ++ } ++ } ++ } ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y],score[y]); ++ printk("\n"); ++#endif ++ ++#ifdef SS_CH_LOAD_PROC ++ ++ // caculate noise level -- suggested by wilson ++ for (y=ch_begin; ychnl_ss_fa_count[y]>1000) { ++ fa_lv = 100; ++ } else if (priv->chnl_ss_fa_count[y]>500) { ++ fa_lv = 34 * (priv->chnl_ss_fa_count[y]-500) / 500 + 66; ++ } else if (priv->chnl_ss_fa_count[y]>200) { ++ fa_lv = 33 * (priv->chnl_ss_fa_count[y] - 200) / 300 + 33; ++ } else if (priv->chnl_ss_fa_count[y]>100) { ++ fa_lv = 18 * (priv->chnl_ss_fa_count[y] - 100) / 100 + 15; ++ } else { ++ fa_lv = 15 * priv->chnl_ss_fa_count[y] / 100; ++ } ++ if (priv->chnl_ss_cca_count[y]>400) { ++ cca_lv = 100; ++ } else if (priv->chnl_ss_cca_count[y]>200) { ++ cca_lv = 34 * (priv->chnl_ss_cca_count[y] - 200) / 200 + 66; ++ } else if (priv->chnl_ss_cca_count[y]>80) { ++ cca_lv = 33 * (priv->chnl_ss_cca_count[y] - 80) / 120 + 33; ++ } else if (priv->chnl_ss_cca_count[y]>40) { ++ cca_lv = 18 * (priv->chnl_ss_cca_count[y] - 40) / 40 + 15; ++ } else { ++ cca_lv = 15 * priv->chnl_ss_cca_count[y] / 40; ++ } ++ ++ priv->chnl_ss_load[y] = (((fa_lv > cca_lv)? fa_lv : cca_lv)*75+((score[y]>100)?100:score[y])*25)/100; ++ ++ DEBUG_INFO("ch:%d f=%d (%d), c=%d (%d), fl=%d, cl=%d, sc=%d, cu=%d\n", ++ priv->available_chnl[y], ++ priv->chnl_ss_fa_count[y], fa_thd, ++ priv->chnl_ss_cca_count[y], cca_thd, ++ fa_lv, ++ cca_lv, ++ score[y], ++ priv->chnl_ss_load[y]); ++ ++ } ++#endif ++ } ++#endif ++ ++choose_ch: ++ ++#ifdef DFS ++ // heavy weighted DFS channel ++ if (idx_5G_begin >= 0){ ++ for (i=idx_5G_begin; iavailable_chnl_num; i++) { ++ if (!priv->pmib->dot11DFSEntry.disable_DFS && is_DFS_channel(priv->available_chnl[i]) ++ && (score[i]!= 0xffffffff)){ ++ score[i] += 1600; ++ } ++ } ++ } ++#endif ++ ++ ++//prevent Auto Channel selecting wrong channel in 40M mode----------------- ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) ++ && priv->pshare->is_40m_bw) { ++#if 0 ++ if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 1) { ++ //Upper Primary Channel, cannot select the two lowest channels ++ if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { ++ score[0] = 0xffffffff; ++ score[1] = 0xffffffff; ++ score[2] = 0xffffffff; ++ score[3] = 0xffffffff; ++ score[4] = 0xffffffff; ++ ++ score[13] = 0xffffffff; ++ score[12] = 0xffffffff; ++ score[11] = 0xffffffff; ++ } ++ ++// if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { ++// score[idx_5G_begin] = 0xffffffff; ++// score[idx_5G_begin + 1] = 0xffffffff; ++// } ++ } ++ else if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 2) { ++ //Lower Primary Channel, cannot select the two highest channels ++ if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { ++ score[0] = 0xffffffff; ++ score[1] = 0xffffffff; ++ score[2] = 0xffffffff; ++ ++ score[13] = 0xffffffff; ++ score[12] = 0xffffffff; ++ score[11] = 0xffffffff; ++ score[10] = 0xffffffff; ++ score[9] = 0xffffffff; ++ } ++ ++// if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { ++// score[priv->available_chnl_num - 2] = 0xffffffff; ++// score[priv->available_chnl_num - 1] = 0xffffffff; ++// } ++ } ++#endif ++ for (i=0; i<=idx_2G_end; ++i) ++ if (priv->available_chnl[i] == 14) ++ score[i] = 0xffffffff; // mask chan14 ++ ++#ifdef RTK_5G_SUPPORT ++ if (idx_5G_begin >= 0) { ++ for (i=idx_5G_begin; iavailable_chnl_num; i++) { ++ int ch = priv->available_chnl[i]; ++ if(priv->available_chnl[i] > 144) ++ --ch; ++ if((ch%4) || ch==140 || ch == 164 ) //mask ch 140, ch 165, ch 184... ++ score[i] = 0xffffffff; ++ } ++ } ++#endif ++ ++ ++ } ++ ++ if (priv->pmib->dot11RFEntry.disable_ch1213) { ++ for (i=0; i<=idx_2G_end; ++i) { ++ int ch = priv->available_chnl[i]; ++ if ((ch == 12) || (ch == 13)) ++ score[i] = 0xffffffff; ++ } ++ } ++ ++ if (((priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_GLOBAL) || ++ (priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_WORLD_WIDE)) && ++ (idx_2G_end >= 11) && (idx_2G_end < 14)) { ++ score[13] = 0xffffffff; // mask chan14 ++ score[12] = 0xffffffff; // mask chan13 ++ score[11] = 0xffffffff; // mask chan12 ++ } ++ ++//------------------------------------------------------------------ ++ ++#ifdef _DEBUG_RTL8192CD_ ++ for (i=0; iavailable_chnl_num; i++) { ++ len += sprintf(tmpbuf+len, "ch%d:%u ", priv->available_chnl[i], score[i]); ++ } ++ strcat(tmpbuf, "\n"); ++ panic_printk("%s", tmpbuf); ++ ++#endif ++ ++ if ( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) ++ { ++ for (i=0; iavailable_chnl_num; i++) { ++ if (is80MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) { ++ tmpScore = 0; ++ for (j=0; j<4; j++) { ++ if ((tmpScore != 0xffffffff) && (score[i+j] != 0xffffffff)) ++ tmpScore += score[i+j]; ++ else ++ tmpScore = 0xffffffff; ++ } ++ tmpScore = tmpScore / 4; ++ if (minScore > tmpScore) { ++ minScore = tmpScore; ++ ++ tmpScore = 0xffffffff; ++ for (j=0; j<4; j++) { ++ if (score[i+j] < tmpScore) { ++ tmpScore = score[i+j]; ++ tmpIdx = i+j; ++ } ++ } ++ ++ idx = tmpIdx; ++ } ++ i += 3; ++ } ++ } ++ if (minScore == 0xffffffff) { ++ // there is no 80M channels ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ else if( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40)) ++ { ++ for (i=0; iavailable_chnl_num; i++) { ++ if(is40MChannel(priv->available_chnl,priv->available_chnl_num,priv->available_chnl[i])) { ++ tmpScore = 0; ++ for(j=0;j<2;j++) { ++ if ((tmpScore != 0xffffffff) && (score[i+j] != 0xffffffff)) ++ tmpScore += score[i+j]; ++ else ++ tmpScore = 0xffffffff; ++ } ++ tmpScore = tmpScore / 2; ++ if(minScore > tmpScore) { ++ minScore = tmpScore; ++ ++ tmpScore = 0xffffffff; ++ for (j=0; j<2; j++) { ++ if (score[i+j] < tmpScore) { ++ tmpScore = score[i+j]; ++ tmpIdx = i+j; ++ } ++ } ++ ++ idx = tmpIdx; ++ } ++ i += 1; ++ } ++ } ++ if (minScore == 0xffffffff) { ++ // there is no 40M channels ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ else if( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) ++ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) ++ && (priv->available_chnl_num >= 8) ) ++ { ++ u4Byte groupScore[14]; ++ ++ memset(groupScore, 0xff , sizeof(groupScore)); ++ for (i=0; iavailable_chnl_num-4; i++) { ++ if (score[i] != 0xffffffff && score[i+4] != 0xffffffff) { ++ groupScore[i] = score[i] + score[i+4]; ++ DEBUG_INFO("groupScore, ch %d,%d: %d\n", i+1, i+5, groupScore[i]); ++ if (groupScore[i] < minScore) { ++#ifdef AUTOCH_SS_SPEEDUP ++ if(priv->pmib->miscEntry.autoch_1611_enable) ++ { ++ if(priv->available_chnl[i]==1 || priv->available_chnl[i]==6 || priv->available_chnl[i]==11) ++ { ++ minScore = groupScore[i]; ++ idx = i; ++ } ++ } ++ else ++#endif ++ { ++ minScore = groupScore[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ ++ if (score[idx] < score[idx+4]) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } else { ++ idx = idx + 4; ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } ++ } ++ else ++ { ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++#ifdef AUTOCH_SS_SPEEDUP ++ if(priv->pmib->miscEntry.autoch_1611_enable) ++ { ++ if(priv->available_chnl[i]==1 || priv->available_chnl[i]==6 || priv->available_chnl[i]==11) ++ { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ else ++#endif ++ { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ ++ if (IS_A_CUT_8881A(priv) && ++ (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) { ++ if ((priv->available_chnl[idx] == 36) || ++ (priv->available_chnl[idx] == 52) || ++ (priv->available_chnl[idx] == 100) || ++ (priv->available_chnl[idx] == 116) || ++ (priv->available_chnl[idx] == 132) || ++ (priv->available_chnl[idx] == 149) || ++ (priv->available_chnl[idx] == 165)) ++ idx++; ++ else if ((priv->available_chnl[idx] == 48) || ++ (priv->available_chnl[idx] == 64) || ++ (priv->available_chnl[idx] == 112) || ++ (priv->available_chnl[idx] == 128) || ++ (priv->available_chnl[idx] == 144) || ++ (priv->available_chnl[idx] == 161) || ++ (priv->available_chnl[idx] == 177)) ++ idx--; ++ } ++ ++ minChan = priv->available_chnl[idx]; ++ ++ // skip channel 14 if don't support ofdm ++ if ((priv->pmib->dot11RFEntry.disable_ch14_ofdm) && ++ (minChan == 14)) { ++ score[idx] = 0xffffffff; ++ ++ minScore = 0xffffffff; ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ minChan = priv->available_chnl[idx]; ++ } ++ ++#if 0 ++ //Check if selected channel available for 80M/40M BW or NOT ? ++ if(priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ { ++ if(priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80) ++ { ++ if(!is80MChannel(priv->available_chnl,priv->available_chnl_num,minChan)) ++ { ++ //printk("BW=80M, selected channel = %d is unavaliable! reduce to 40M\n", minChan); ++ //priv->pmib->dot11nConfigEntry.dot11nUse40M = HT_CHANNEL_WIDTH_20_40; ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20_40; ++ } ++ } ++ ++ if(priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) ++ { ++ if(!is40MChannel(priv->available_chnl,priv->available_chnl_num,minChan)) ++ { ++ //printk("BW=40M, selected channel = %d is unavaliable! reduce to 20M\n", minChan); ++ //priv->pmib->dot11nConfigEntry.dot11nUse40M = HT_CHANNEL_WIDTH_20; ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; ++ } ++ } ++ } ++#endif ++ ++#ifdef CONFIG_RTL_NEW_AUTOCH ++ RTL_W32(RXERR_RPT, RXERR_RPT_RST); ++#endif ++ ++// auto adjust contro-sideband ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) ++ && (priv->pshare->is_40m_bw ==1 || priv->pshare->is_40m_bw ==2)) { ++ ++#ifdef RTK_5G_SUPPORT ++ if (priv->pmib->dot11RFEntry.phyBandSelect & PHY_BAND_5G) { ++ if( (minChan>144) ? ((minChan-1)%8) : (minChan%8)) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } else { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } ++ ++ } else ++#endif ++ { ++#if 0 ++#ifdef CONFIG_RTL_NEW_AUTOCH ++ unsigned int ch_max; ++ ++ if (priv->available_chnl[idx_2G_end] >= 13) ++ ch_max = 13; ++ else ++ ch_max = priv->available_chnl[idx_2G_end]; ++ ++ if ((minChan >= 5) && (minChan <= (ch_max-5))) { ++ if (score[minChan+4] > score[minChan-4]) { // what if some channels were cancelled? ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } else { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } ++ } else ++#endif ++ { ++ if (minChan < 5) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } ++ else if (minChan > 7) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } ++ } ++#endif ++ } ++ } ++//----------------------- ++ ++#if defined(__ECOS) && defined(CONFIG_SDIO_HCI) ++ panic_printk("Auto channel choose ch:%d\n", minChan); ++#else ++#ifdef _DEBUG_RTL8192CD_ ++ panic_printk("Auto channel choose ch:%d\n", minChan); ++#endif ++#endif ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("7. minChan:%d 2nd_offset:%d\n", minChan, priv->pshare->offset_2nd_chan); ++#endif ++ ++ return minChan; ++} ++*/ ++ ++#endif ++ ++VOID ++phydm_CLMInit( ++ IN PVOID pDM_VOID, ++ IN u2Byte sampleNum /*unit : 4us*/ ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_TIME_PERIOD_11AC, bMaskLWord, sampleNum); /*4us sample 1 time*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT8, 0x1); /*Enable CCX for CLM*/ ++ } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_TIME_PERIOD_11N, bMaskLWord, sampleNum); /*4us sample 1 time*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT8, 0x1); /*Enable CCX for CLM*/ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM sampleNum = %d\n", __func__, sampleNum)); ++ ++} ++ ++VOID ++phydm_CLMtrigger( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x0); /*Trigger CLM*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x1); ++ } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x0); /*Trigger CLM*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x1); ++ } ++} ++ ++BOOLEAN ++phydm_checkCLMready( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32 = 0; ++ BOOLEAN ret = FALSE; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*make sure CLM calc is ready*/ ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_READY_11N, bMaskDWord); /*make sure CLM calc is ready*/ ++ ++ if (value32 & BIT16) ++ ret = TRUE; ++ else ++ ret = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM ready = %d\n", __func__, ret)); ++ ++ return ret; ++} ++ ++u2Byte ++phydm_getCLMresult( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32 = 0; ++ u2Byte results = 0; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*read CLM calc result*/ ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11N, bMaskDWord); /*read CLM calc result*/ ++ ++ results = (u2Byte)(value32 & bMaskLWord); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM result = %d\n", __func__, results)); ++ ++ return results; ++/*results are number of CCA times in sampleNum*/ ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_acs.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_acs.h new file mode 100644 -index 000000000..d7eabda84 +index 0000000..d193eab --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_acs.h @@ -0,0 +1,129 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMACS_H__ -+#define __PHYDMACS_H__ -+ -+#define ACS_VERSION "1.0" -+#define CLM_VERSION "1.0" -+ -+#define ODM_MAX_CHANNEL_2G 14 -+#define ODM_MAX_CHANNEL_5G 24 -+ -+// For phydm_AutoChannelSelectSettingAP() -+#define STORE_DEFAULT_NHM_SETTING 0 -+#define RESTORE_DEFAULT_NHM_SETTING 1 -+#define ACS_NHM_SETTING 2 -+ -+typedef struct _ACS_ -+{ -+ BOOLEAN bForceACSResult; -+ u1Byte CleanChannel_2G; -+ u1Byte CleanChannel_5G; -+ u2Byte Channel_Info_2G[2][ODM_MAX_CHANNEL_2G]; //Channel_Info[1]: Channel Score, Channel_Info[2]:Channel_Scan_Times -+ u2Byte Channel_Info_5G[2][ODM_MAX_CHANNEL_5G]; -+ -+#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) -+ u1Byte ACS_Step; -+ // NHM Count 0-11 -+ u1Byte NHM_Cnt[14][11]; -+ -+ // AC-Series, for storing previous setting -+ u4Byte Reg0x990; -+ u4Byte Reg0x994; -+ u4Byte Reg0x998; -+ u4Byte Reg0x99C; -+ u1Byte Reg0x9A0; // u1Byte -+ -+ // N-Series, for storing previous setting -+ u4Byte Reg0x890; -+ u4Byte Reg0x894; -+ u4Byte Reg0x898; -+ u4Byte Reg0x89C; -+ u1Byte Reg0xE28; // u1Byte -+#endif -+ -+}ACS, *PACS; -+ -+ -+VOID -+odm_AutoChannelSelectInit( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_AutoChannelSelectReset( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_AutoChannelSelect( -+ IN PVOID pDM_VOID, -+ IN u1Byte Channel -+); -+ -+u1Byte -+ODM_GetAutoChannelSelectResult( -+ IN PVOID pDM_VOID, -+ IN u1Byte Band -+); -+ -+#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) -+ -+VOID -+phydm_AutoChannelSelectSettingAP( -+ IN PVOID pDM_VOID, -+ IN u4Byte Setting, // 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING -+ IN u4Byte acs_step -+); -+ -+VOID -+phydm_GetNHMStatisticsAP( -+ IN PVOID pDM_VOID, -+ IN u4Byte idx, // @ 2G, Real channel number = idx+1 -+ IN u4Byte acs_step -+); -+ -+#endif //#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) -+ -+ -+VOID -+phydm_CLMInit( -+ IN PVOID pDM_VOID, -+ IN u2Byte sampleNum -+); -+ -+VOID -+phydm_CLMtrigger( -+ IN PVOID pDM_VOID -+); -+ -+BOOLEAN -+phydm_checkCLMready( -+ IN PVOID pDM_VOID -+); -+ -+u2Byte -+phydm_getCLMresult( -+ IN PVOID pDM_VOID -+); -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMACS_H__ ++#define __PHYDMACS_H__ ++ ++#define ACS_VERSION "1.0" ++#define CLM_VERSION "1.0" ++ ++#define ODM_MAX_CHANNEL_2G 14 ++#define ODM_MAX_CHANNEL_5G 24 ++ ++// For phydm_AutoChannelSelectSettingAP() ++#define STORE_DEFAULT_NHM_SETTING 0 ++#define RESTORE_DEFAULT_NHM_SETTING 1 ++#define ACS_NHM_SETTING 2 ++ ++typedef struct _ACS_ ++{ ++ BOOLEAN bForceACSResult; ++ u1Byte CleanChannel_2G; ++ u1Byte CleanChannel_5G; ++ u2Byte Channel_Info_2G[2][ODM_MAX_CHANNEL_2G]; //Channel_Info[1]: Channel Score, Channel_Info[2]:Channel_Scan_Times ++ u2Byte Channel_Info_5G[2][ODM_MAX_CHANNEL_5G]; ++ ++#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ u1Byte ACS_Step; ++ // NHM Count 0-11 ++ u1Byte NHM_Cnt[14][11]; ++ ++ // AC-Series, for storing previous setting ++ u4Byte Reg0x990; ++ u4Byte Reg0x994; ++ u4Byte Reg0x998; ++ u4Byte Reg0x99C; ++ u1Byte Reg0x9A0; // u1Byte ++ ++ // N-Series, for storing previous setting ++ u4Byte Reg0x890; ++ u4Byte Reg0x894; ++ u4Byte Reg0x898; ++ u4Byte Reg0x89C; ++ u1Byte Reg0xE28; // u1Byte ++#endif ++ ++}ACS, *PACS; ++ ++ ++VOID ++odm_AutoChannelSelectInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AutoChannelSelectReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AutoChannelSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte Channel ++); ++ ++u1Byte ++ODM_GetAutoChannelSelectResult( ++ IN PVOID pDM_VOID, ++ IN u1Byte Band ++); ++ ++#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ ++VOID ++phydm_AutoChannelSelectSettingAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte Setting, // 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING ++ IN u4Byte acs_step ++); ++ ++VOID ++phydm_GetNHMStatisticsAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte idx, // @ 2G, Real channel number = idx+1 ++ IN u4Byte acs_step ++); ++ ++#endif //#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ ++ ++VOID ++phydm_CLMInit( ++ IN PVOID pDM_VOID, ++ IN u2Byte sampleNum ++); ++ ++VOID ++phydm_CLMtrigger( ++ IN PVOID pDM_VOID ++); ++ ++BOOLEAN ++phydm_checkCLMready( ++ IN PVOID pDM_VOID ++); ++ ++u2Byte ++phydm_getCLMresult( ++ IN PVOID pDM_VOID ++); ++ ++ +#endif //#ifndef __PHYDMACS_H__ \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_adaptivity.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_adaptivity.c new file mode 100644 -index 000000000..642c995a6 +index 0000000..07d1a94 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_adaptivity.c @@ -0,0 +1,896 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if WPP_SOFTWARE_TRACE -+#include "PhyDM_Adaptivity.tmh" -+#endif -+#endif -+ -+ -+VOID -+Phydm_CheckAdaptivity( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); -+ -+ if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) { -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (pDM_Odm->APTotalNum > Adaptivity->APNumTH) { -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("AP total num > %d!!, disable adaptivity\n", Adaptivity->APNumTH)); -+ } else -+#endif -+ { -+ if (Adaptivity->DynamicLinkAdaptivity == TRUE) { -+ if (pDM_Odm->bLinked && Adaptivity->bCheck == FALSE) { -+ Phydm_NHMCounterStatistics(pDM_Odm); -+ Phydm_CheckEnvironment(pDM_Odm); -+ } else if (!pDM_Odm->bLinked) -+ Adaptivity->bCheck = FALSE; -+ } else { -+ pDM_Odm->Adaptivity_enable = TRUE; -+ -+ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) -+ pDM_Odm->adaptivity_flag = FALSE; -+ else -+ pDM_Odm->adaptivity_flag = TRUE; -+ } -+ } -+ } else { -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ } -+ -+ -+ -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+BOOLEAN -+Phydm_CheckChannelPlan( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); -+ -+ if (pMgntInfo->RegEnableAdaptivity == 2) { -+ if (pDM_Odm->Carrier_Sense_enable == FALSE) { /*check domain Code for Adaptivity or CarrierSense*/ -+ if ((*pDM_Odm->pBandType == ODM_BAND_5G) && -+ !(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ return TRUE; -+ } else if ((*pDM_Odm->pBandType == ODM_BAND_2_4G) && -+ !(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ return TRUE; -+ -+ } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity neither 2G nor 5G band, return\n")); -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ return TRUE; -+ } -+ } else { -+ if ((*pDM_Odm->pBandType == ODM_BAND_5G) && -+ !(pDM_Odm->odm_Regulation5G == REGULATION_MKK || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ return TRUE; -+ } -+ -+ else if ((*pDM_Odm->pBandType == ODM_BAND_2_4G) && -+ !(pDM_Odm->odm_Regulation2_4G == REGULATION_MKK || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ return TRUE; -+ -+ } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense neither 2G nor 5G band, return\n")); -+ pDM_Odm->Adaptivity_enable = FALSE; -+ pDM_Odm->adaptivity_flag = FALSE; -+ return TRUE; -+ } -+ } -+ } -+ -+ return FALSE; -+ -+} -+#endif -+ -+VOID -+Phydm_NHMCounterStatisticsInit( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { -+ /*PHY parameters initialize for n series*/ -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N + 2, 0xC350); /*0x894[31:16]=0x0xC350 Time duration for NHM unit: us, 0xc350=200ms*/ -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff); /*0x890[31:16]=0xffff th_9, th_10*/ -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff50); /*0x898=0xffffff52 th_3, th_2, th_1, th_0*/ -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); /*0x89c=0xffffffff th_7, th_6, th_5, th_4*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /*0xe28[7:0]=0xff th_8*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10 | BIT9 | BIT8, 0x1); /*0x890[10:8]=1 ignoreCCA ignore PHYTXON enable CCX*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); /*0xc0c[7]=1 max power among all RX ants*/ -+ } -+#if (RTL8195A_SUPPORT == 0) -+ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { -+ /*PHY parameters initialize for ac series*/ -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC + 2, 0xC350); /*0x990[31:16]=0xC350 Time duration for NHM unit: us, 0xc350=200ms*/ -+ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff); /*0x994[31:16]=0xffff th_9, th_10*/ -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff50); /*0x998=0xffffff52 th_3, th_2, th_1, th_0*/ -+ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff); /*0x99c=0xffffffff th_7, th_6, th_5, th_4*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, 0xff); /*0x9a0[7:0]=0xff th_8*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8 | BIT9 | BIT10, 0x1); /*0x994[10:8]=1 ignoreCCA ignore PHYTXON enable CCX*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_9E8_11AC, BIT0, 0x1); /*0x9e8[7]=1 max power among all RX ants*/ -+ -+ } -+#endif -+} -+ -+VOID -+Phydm_NHMCounterStatistics( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) -+ return; -+ -+ /*Get NHM report*/ -+ Phydm_GetNHMCounterStatistics(pDM_Odm); -+ -+ /*Reset NHM counter*/ -+ Phydm_NHMCounterStatisticsReset(pDM_Odm); -+} -+ -+VOID -+Phydm_GetNHMCounterStatistics( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte value32 = 0; -+#if (RTL8195A_SUPPORT == 0) -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11AC, bMaskDWord); -+ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+#endif -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11N, bMaskDWord); -+ -+ pDM_Odm->NHM_cnt_0 = (u1Byte)(value32 & bMaskByte0); -+ pDM_Odm->NHM_cnt_1 = (u1Byte)((value32 & bMaskByte1) >> 8); -+ -+} -+ -+VOID -+Phydm_NHMCounterStatisticsReset( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1); -+ } -+#if (RTL8195A_SUPPORT == 0) -+ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 0); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 1); -+ } -+ -+#endif -+ -+} -+ -+VOID -+Phydm_SetEDCCAThreshold( -+ IN PVOID pDM_VOID, -+ IN s1Byte H2L, -+ IN s1Byte L2H -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskByte2|bMaskByte0, (u4Byte)((u1Byte)L2H|(u1Byte)H2L<<16)); -+#if (RTL8195A_SUPPORT == 0) -+ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, bMaskLWord, (u2Byte)((u1Byte)L2H|(u1Byte)H2L<<8)); -+#endif -+ -+} -+ -+VOID -+Phydm_SetLNA( -+ IN PVOID pDM_VOID, -+ IN PhyDM_set_LNA type -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E)) { -+ if (type == PhyDM_disable_LNA) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x37f82); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ if (pDM_Odm->RFType > ODM_1T1R) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x37f82); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); -+ } -+ } else if (type == PhyDM_enable_LNA) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*back to normal*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ if (pDM_Odm->RFType > ODM_1T1R) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x77f82); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); -+ } -+ } -+ } else if (pDM_Odm->SupportICType & ODM_RTL8723B) { -+ if (type == PhyDM_disable_LNA) { -+ /*S0*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0001f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xe6137); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ /*S1*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, 0xfffff, 0x3008d); /*select Rx mode and disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x0); -+ } else if (type == PhyDM_enable_LNA) { -+ /*S0*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0001f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xe6177); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ /*S1*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, 0xfffff, 0x300bd); /*select Rx mode and disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x0); -+ } -+ -+ } else if (pDM_Odm->SupportICType & ODM_RTL8812) { -+ if (type == PhyDM_disable_LNA) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ if (pDM_Odm->RFType > ODM_1T1R) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); -+ } -+ } else if (type == PhyDM_enable_LNA) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ if (pDM_Odm->RFType > ODM_1T1R) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); -+ } -+ } -+ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) { -+ if (type == PhyDM_disable_LNA) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0002f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xfb09b); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ } else if (type == PhyDM_enable_LNA) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0002f); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xfb0bb); /*disable LNA*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); -+ } -+ } -+} -+ -+ -+ -+VOID -+Phydm_SetTRxMux( -+ IN PVOID pDM_VOID, -+ IN PhyDM_Trx_MUX_Type txMode, -+ IN PhyDM_Trx_MUX_Type rxMode -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT3 | BIT2 | BIT1, txMode); /*set TXmod to standby mode to remove outside noise affect*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT22 | BIT21 | BIT20, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ -+ if (pDM_Odm->RFType > ODM_1T1R) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT3 | BIT2 | BIT1, txMode); /*set TXmod to standby mode to remove outside noise affect*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT22 | BIT21 | BIT20, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ -+ } -+ } -+#if (RTL8195A_SUPPORT == 0) -+ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT11 | BIT10 | BIT9 | BIT8, txMode); /*set TXmod to standby mode to remove outside noise affect*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT7 | BIT6 | BIT5 | BIT4, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ -+ if (pDM_Odm->RFType > ODM_1T1R) { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT11 | BIT10 | BIT9 | BIT8, txMode); /*set TXmod to standby mode to remove outside noise affect*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT7 | BIT6 | BIT5 | BIT4, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ -+ } -+ } -+#endif -+ -+} -+ -+VOID -+Phydm_MACEDCCAState( -+ IN PVOID pDM_VOID, -+ IN PhyDM_MACEDCCA_Type State -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if (State == PhyDM_IGNORE_EDCCA) { -+ ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 1); /*ignore EDCCA reg520[15]=1*/ -+ ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 0); /*reg524[11]=0*/ -+ } else { /*don't set MAC ignore EDCCA signal*/ -+ ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 0); /*don't ignore EDCCA reg520[15]=0*/ -+ ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); /*reg524[11]=1 */ -+ } -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("EDCCA enable State = %d\n", State)); -+ -+} -+ -+BOOLEAN -+Phydm_CalNHMcnt( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte Base = 0; -+ -+ Base = pDM_Odm->NHM_cnt_0 + pDM_Odm->NHM_cnt_1; -+ -+ if (Base != 0) { -+ pDM_Odm->NHM_cnt_0 = ((pDM_Odm->NHM_cnt_0) << 8) / Base; -+ pDM_Odm->NHM_cnt_1 = ((pDM_Odm->NHM_cnt_1) << 8) / Base; -+ } -+ if ((pDM_Odm->NHM_cnt_0 - pDM_Odm->NHM_cnt_1) >= 100) -+ return TRUE; /*clean environment*/ -+ else -+ return FALSE; /*noisy environment*/ -+ -+} -+ -+ -+VOID -+Phydm_CheckEnvironment( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); -+ BOOLEAN isCleanEnvironment = FALSE; -+ -+ if (Adaptivity->bFirstLink == TRUE) { -+ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) -+ pDM_Odm->adaptivity_flag = FALSE; -+ else -+ pDM_Odm->adaptivity_flag = TRUE; -+ -+ Adaptivity->bFirstLink = FALSE; -+ return; -+ } else { -+ if (Adaptivity->NHMWait < 3) { /*Start enter NHM after 4 NHMWait*/ -+ Adaptivity->NHMWait++; -+ Phydm_NHMCounterStatistics(pDM_Odm); -+ return; -+ } else { -+ Phydm_NHMCounterStatistics(pDM_Odm); -+ isCleanEnvironment = Phydm_CalNHMcnt(pDM_Odm); -+ if (isCleanEnvironment == TRUE) { -+ pDM_Odm->TH_L2H_ini = Adaptivity->TH_L2H_ini_backup; /*adaptivity mode*/ -+ pDM_Odm->TH_EDCCA_HL_diff = Adaptivity->TH_EDCCA_HL_diff_backup; -+ -+ pDM_Odm->Adaptivity_enable = TRUE; -+ -+ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) -+ pDM_Odm->adaptivity_flag = FALSE; -+ else -+ pDM_Odm->adaptivity_flag = TRUE; -+ } else { -+ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; /*mode2*/ -+ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; -+ -+ pDM_Odm->adaptivity_flag = FALSE; -+ pDM_Odm->Adaptivity_enable = FALSE; -+ } -+ Adaptivity->NHMWait = 0; -+ Adaptivity->bFirstLink = TRUE; -+ Adaptivity->bCheck = TRUE; -+ } -+ -+ } -+ -+ -+} -+ -+VOID -+Phydm_SearchPwdBLowerBound( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); -+ u4Byte value32 = 0; -+ u1Byte cnt, IGI = 0x45; /*IGI = 0x50 for cal EDCCA lower bound*/ -+ u1Byte txEdcca1 = 0, txEdcca0 = 0; -+ BOOLEAN bAdjust = TRUE; -+ s1Byte TH_L2H_dmc, TH_H2L_dmc, IGI_target = 0x32; -+ s1Byte Diff; -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) -+ Phydm_SetLNA(pDM_Odm, PhyDM_disable_LNA); -+ else { -+ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); -+ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_0, 0x7e); -+ } -+ -+ Diff = IGI_target - (s1Byte)IGI; -+ TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; -+ if (TH_L2H_dmc > 10) -+ TH_L2H_dmc = 10; -+ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; -+ -+ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); -+ ODM_delay_ms(5); -+ -+ while (bAdjust) { -+ for (cnt = 0; cnt < 20; cnt++) { -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11N, bMaskDWord); -+#if (RTL8195A_SUPPORT == 0) -+ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC, bMaskDWord); -+#endif -+ if (value32 & BIT30 && (pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8723B | ODM_RTL8188E))) -+ txEdcca1 = txEdcca1 + 1; -+ else if (value32 & BIT29) -+ txEdcca1 = txEdcca1 + 1; -+ else -+ txEdcca0 = txEdcca0 + 1; -+ } -+ -+ if (txEdcca1 > 1) { -+ IGI = IGI - 1; -+ TH_L2H_dmc = TH_L2H_dmc + 1; -+ if (TH_L2H_dmc > 10) -+ TH_L2H_dmc = 10; -+ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; -+ -+ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); -+ if (TH_L2H_dmc == 10) { -+ bAdjust = FALSE; -+ Adaptivity->H2L_lb = TH_H2L_dmc; -+ Adaptivity->L2H_lb = TH_L2H_dmc; -+ pDM_Odm->Adaptivity_IGI_upper = IGI; -+ } -+ -+ txEdcca1 = 0; -+ txEdcca0 = 0; -+ -+ } else { -+ bAdjust = FALSE; -+ Adaptivity->H2L_lb = TH_H2L_dmc; -+ Adaptivity->L2H_lb = TH_L2H_dmc; -+ pDM_Odm->Adaptivity_IGI_upper = IGI; -+ txEdcca1 = 0; -+ txEdcca0 = 0; -+ } -+ } -+ -+ pDM_Odm->Adaptivity_IGI_upper = pDM_Odm->Adaptivity_IGI_upper - pDM_Odm->DCbackoff; -+ Adaptivity->H2L_lb = Adaptivity->H2L_lb + pDM_Odm->DCbackoff; -+ Adaptivity->L2H_lb = Adaptivity->L2H_lb + pDM_Odm->DCbackoff; -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) -+ Phydm_SetLNA(pDM_Odm, PhyDM_enable_LNA); -+ else { -+ Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE); -+ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_0, NONE); -+ } -+ -+ Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); /*resume to no link state*/ -+} -+ -+VOID -+Phydm_AdaptivityInit( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); -+ s1Byte IGItarget = 0x32; -+#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); -+ pDM_Odm->Carrier_Sense_enable = (BOOLEAN)pMgntInfo->RegEnableCarrierSense; -+ pDM_Odm->DCbackoff = (u1Byte)pMgntInfo->RegDCbackoff; -+ Adaptivity->DynamicLinkAdaptivity = (BOOLEAN)pMgntInfo->RegDmLinkAdaptivity; -+ Adaptivity->APNumTH = (u1Byte)pMgntInfo->RegAPNumTH; -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ pDM_Odm->Carrier_Sense_enable = (pDM_Odm->Adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE; -+ pDM_Odm->DCbackoff = pDM_Odm->Adapter->registrypriv.adaptivity_dc_backoff; -+ Adaptivity->DynamicLinkAdaptivity = (pDM_Odm->Adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE; -+#endif -+ -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ -+ if (pDM_Odm->Carrier_Sense_enable == FALSE) { -+#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (pMgntInfo->RegL2HForAdaptivity != 0) -+ pDM_Odm->TH_L2H_ini = pMgntInfo->RegL2HForAdaptivity; -+ else -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (pDM_Odm->Adapter->registrypriv.adaptivity_th_l2h_ini != 0) -+ pDM_Odm->TH_L2H_ini = pDM_Odm->Adapter->registrypriv.adaptivity_th_l2h_ini; -+ else -+#endif -+ pDM_Odm->TH_L2H_ini = 0xf5; -+ } else -+ pDM_Odm->TH_L2H_ini = 0xa; -+ -+#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (pMgntInfo->RegHLDiffForAdaptivity != 0) -+ pDM_Odm->TH_EDCCA_HL_diff = pMgntInfo->RegHLDiffForAdaptivity; -+ else -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (pDM_Odm->Adapter->registrypriv.adaptivity_th_edcca_hl_diff != 0) -+ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->Adapter->registrypriv.adaptivity_th_edcca_hl_diff; -+ else -+#endif -+ pDM_Odm->TH_EDCCA_HL_diff = 7; -+ -+ Adaptivity->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; -+ Adaptivity->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff; -+ -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ -+ if (pDM_Odm->Carrier_Sense_enable) { -+ pDM_Odm->TH_L2H_ini = 0xa; -+ pDM_Odm->TH_EDCCA_HL_diff = 7; -+ } else { -+ Adaptivity->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; /*set by mib*/ -+ pDM_Odm->TH_EDCCA_HL_diff = 7; -+ } -+ -+ Adaptivity->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff; -+ if (priv->pshare->rf_ft_var.adaptivity_enable == 2) -+ Adaptivity->DynamicLinkAdaptivity = TRUE; -+ else -+ Adaptivity->DynamicLinkAdaptivity = FALSE; -+ -+#endif -+ -+ pDM_Odm->Adaptivity_IGI_upper = 0; -+ pDM_Odm->Adaptivity_enable = FALSE; /*use this flag to decide enable or disable*/ -+ -+ pDM_Odm->EDCCA_enable = TRUE; /*even no adaptivity, we still enable EDCCA*/ -+ -+ pDM_Odm->TH_L2H_ini_mode2 = 20; -+ pDM_Odm->TH_EDCCA_HL_diff_mode2 = 8; -+ -+ Adaptivity->IGI_Base = 0x32; -+ Adaptivity->IGI_target = 0x1c; -+ Adaptivity->H2L_lb = 0; -+ Adaptivity->L2H_lb = 0; -+ Adaptivity->NHMWait = 0; -+ Adaptivity->bCheck = FALSE; -+ Adaptivity->bFirstLink = TRUE; -+ Adaptivity->AdajustIGILevel = 0; -+ -+ Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); -+ -+ /*Search pwdB lower bound*/ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208); -+#if (RTL8195A_SUPPORT == 0) -+ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC, bMaskDWord, 0x209); -+#endif -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_GAIN_IDX_EDCCA) { -+ /*ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT12 | BIT11 | BIT10, 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DCNF_11N, BIT21 | BIT20, 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ -+ } -+#if (RTL8195A_SUPPORT == 0) -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_GAIN_IDX_EDCCA) { /*8814a no need to find pwdB lower bound, maybe*/ -+ /*ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DOWN_OPT, BIT30 | BIT29 | BIT28, 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT29 | BIT28, 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ -+ } -+ -+ if(!(pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))) -+ Phydm_SearchPwdBLowerBound(pDM_Odm); -+#endif -+ -+/*we need to consider PwdB upper bound for 8814 later IC*/ -+ Adaptivity->AdajustIGILevel = (u1Byte)((pDM_Odm->TH_L2H_ini + IGItarget) - PwdBUpperBound + DFIRloss); /*IGI = L2H - PwdB - DFIRloss*/ -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("TH_L2H_ini = 0x%x, TH_EDCCA_HL_diff = 0x%x, Adaptivity->AdajustIGILevel = 0x%x\n", pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, Adaptivity->AdajustIGILevel)); -+ -+} -+ -+ -+VOID -+Phydm_Adaptivity( -+ IN PVOID pDM_VOID, -+ IN u1Byte IGI -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ s1Byte TH_L2H_dmc, TH_H2L_dmc; -+ s1Byte Diff = 0, IGI_target; -+ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ BOOLEAN bFwCurrentInPSMode = FALSE; -+ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); -+ -+ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); -+ -+ /*Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.*/ -+ if (bFwCurrentInPSMode) -+ return; -+#endif -+ -+ if ((pDM_Odm->EDCCA_enable == FALSE) || (pDM_Odm->bWIFITest == TRUE)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Disable EDCCA!!!\n")); -+ return; -+ } -+ -+ if (!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity disable, enable EDCCA mode!!!\n")); -+ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; -+ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; -+ } -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ else{ -+ if (Phydm_CheckChannelPlan(pDM_Odm) || (pDM_Odm->APTotalNum > Adaptivity->APNumTH)) { -+ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; -+ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; -+ } -+ } -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("odm_Adaptivity() =====>\n")); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d\n", -+ Adaptivity->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff)); -+#if (RTL8195A_SUPPORT == 0) -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { -+ /*fix AC series when enable EDCCA hang issue*/ -+ ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 1); /*ADC_mask disable*/ -+ ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); /*ADC_mask enable*/ -+ } -+#endif -+ if (*pDM_Odm->pBandWidth == ODM_BW20M) /*CHANNEL_WIDTH_20*/ -+ IGI_target = Adaptivity->IGI_Base; -+ else if (*pDM_Odm->pBandWidth == ODM_BW40M) -+ IGI_target = Adaptivity->IGI_Base + 2; -+#if (RTL8195A_SUPPORT == 0) -+ else if (*pDM_Odm->pBandWidth == ODM_BW80M) -+ IGI_target = Adaptivity->IGI_Base + 2; -+#endif -+ else -+ IGI_target = Adaptivity->IGI_Base; -+ Adaptivity->IGI_target = (u1Byte) IGI_target; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, DynamicLinkAdaptivity = %d\n", -+ (*pDM_Odm->pBandWidth == ODM_BW80M) ? "80M" : ((*pDM_Odm->pBandWidth == ODM_BW40M) ? "40M" : "20M"), IGI_target, Adaptivity->DynamicLinkAdaptivity)); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("RSSI_min = %d, Adaptivity->AdajustIGILevel= 0x%x, adaptivity_flag = %d, Adaptivity_enable = %d\n", -+ pDM_Odm->RSSI_Min, Adaptivity->AdajustIGILevel, pDM_Odm->adaptivity_flag, pDM_Odm->Adaptivity_enable)); -+ -+ if ((Adaptivity->DynamicLinkAdaptivity == TRUE) && (!pDM_Odm->bLinked) && (pDM_Odm->Adaptivity_enable == FALSE)) { -+ Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("In DynamicLink mode(noisy) and No link, Turn off EDCCA!!\n")); -+ return; -+ } -+ -+ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { -+ if ((Adaptivity->AdajustIGILevel > IGI) && (pDM_Odm->Adaptivity_enable == TRUE)) -+ Diff = Adaptivity->AdajustIGILevel - IGI; -+ -+ TH_L2H_dmc = pDM_Odm->TH_L2H_ini - Diff + IGI_target; -+ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; -+ } -+#if (RTL8195A_SUPPORT == 0) -+ else { -+ Diff = IGI_target - (s1Byte)IGI; -+ TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; -+ if (TH_L2H_dmc > 10 && (pDM_Odm->Adaptivity_enable == TRUE)) -+ TH_L2H_dmc = 10; -+ -+ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; -+ -+ /*replace lower bound to prevent EDCCA always equal 1*/ -+ if (TH_H2L_dmc < Adaptivity->H2L_lb) -+ TH_H2L_dmc = Adaptivity->H2L_lb; -+ if (TH_L2H_dmc < Adaptivity->L2H_lb) -+ TH_L2H_dmc = Adaptivity->L2H_lb; -+ } -+#endif -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", IGI, TH_L2H_dmc, TH_H2L_dmc)); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity_IGI_upper=0x%x, H2L_lb = 0x%x, L2H_lb = 0x%x\n", pDM_Odm->Adaptivity_IGI_upper, Adaptivity->H2L_lb, Adaptivity->L2H_lb)); -+ -+ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); -+ return; -+} -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+Phydm_AdaptivityBSOD( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); -+ u1Byte count = 0; -+ u4Byte u4Value; -+ -+ /* -+ 1. turn off RF (TRX Mux in standby mode) -+ 2. H2C mac id drop -+ 3. ignore EDCCA -+ 4. wait for clear FIFO -+ 5. don't ignore EDCCA -+ 6. turn on RF (TRX Mux in TRx mdoe) -+ 7. H2C mac id resume -+ */ -+ -+ RT_TRACE(COMP_MLME, DBG_WARNING, ("MAC id drop packet!!!!!\n")); -+ -+ pAdapter->dropPktByMacIdCnt++; -+ pMgntInfo->bDropPktInProgress = TRUE; -+ -+ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_MAX_Q_PAGE_NUM, (pu1Byte)(&u4Value)); -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("Queue Reserved Page Number = 0x%08x\n", u4Value)); -+ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_AVBL_Q_PAGE_NUM, (pu1Byte)(&u4Value)); -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page Number = 0x%08x\n", u4Value)); -+ -+#if 1 -+ -+ /*Standby mode*/ -+ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); -+ ODM_Write_DIG(pDM_Odm, 0x20); -+ -+ /*H2C mac id drop*/ -+ MacIdIndicateDisconnect(pAdapter); -+ -+ /*Ignore EDCCA*/ -+ Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); -+ -+ delay_ms(50); -+ count = 5; -+ -+#else -+ -+ do { -+ -+ u8Byte diffTime, curTime, oldestTime; -+ u1Byte queueIdx -+ -+ //3 Standby mode -+ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); -+ ODM_Write_DIG(pDM_Odm, 0x20); -+ -+ //3 H2C mac id drop -+ MacIdIndicateDisconnect(pAdapter); -+ -+ //3 Ignore EDCCA -+ Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); -+ -+ count++; -+ delay_ms(10); -+ -+ // Check latest packet -+ curTime = PlatformGetCurrentTime(); -+ oldestTime = 0xFFFFFFFFFFFFFFFF; -+ -+ for (queueIdx = 0; queueIdx < MAX_TX_QUEUE; queueIdx++) { -+ if (!IS_DATA_QUEUE(queueIdx)) -+ continue; -+ -+ if (!pAdapter->bTcbBusyQEmpty[queueIdx]) { -+ RT_TRACE(COMP_MLME, DBG_WARNING, ("oldestTime = %llu\n", oldestTime)); -+ RT_TRACE(COMP_MLME, DBG_WARNING, ("Q[%d] = %llu\n", queueIdx, pAdapter->firstTcbSysTime[queueIdx])); -+ if (pAdapter->firstTcbSysTime[queueIdx] < oldestTime) -+ oldestTime = pAdapter->firstTcbSysTime[queueIdx]; -+ } -+ } -+ -+ diffTime = curTime - oldestTime; -+ -+ RT_TRACE(COMP_MLME, DBG_WARNING, ("diff s = %llu\n", (diffTime / 1000000))); -+ -+ } while (((diffTime / 1000000) >= 4) && (oldestTime != 0xFFFFFFFFFFFFFFFF)); -+#endif -+ -+ /*Resume EDCCA*/ -+ Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); -+ -+ /*Turn on TRx mode*/ -+ Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE); -+ ODM_Write_DIG(pDM_Odm, 0x20); -+ -+ /*Resume H2C macid*/ -+ MacIdRecoverMediaStatus(pAdapter); -+ -+ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_AVBL_Q_PAGE_NUM, (pu1Byte)(&u4Value)); -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page Number = 0x%08x\n", u4Value)); -+ -+ pMgntInfo->bDropPktInProgress = FALSE; -+ RT_TRACE(COMP_MLME, DBG_WARNING, ("End of MAC id drop packet, spent %dms\n", count * 10)); -+ -+} -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if WPP_SOFTWARE_TRACE ++#include "PhyDM_Adaptivity.tmh" ++#endif ++#endif ++ ++ ++VOID ++Phydm_CheckAdaptivity( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ ++ if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pDM_Odm->APTotalNum > Adaptivity->APNumTH) { ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("AP total num > %d!!, disable adaptivity\n", Adaptivity->APNumTH)); ++ } else ++#endif ++ { ++ if (Adaptivity->DynamicLinkAdaptivity == TRUE) { ++ if (pDM_Odm->bLinked && Adaptivity->bCheck == FALSE) { ++ Phydm_NHMCounterStatistics(pDM_Odm); ++ Phydm_CheckEnvironment(pDM_Odm); ++ } else if (!pDM_Odm->bLinked) ++ Adaptivity->bCheck = FALSE; ++ } else { ++ pDM_Odm->Adaptivity_enable = TRUE; ++ ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) ++ pDM_Odm->adaptivity_flag = FALSE; ++ else ++ pDM_Odm->adaptivity_flag = TRUE; ++ } ++ } ++ } else { ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ } ++ ++ ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++BOOLEAN ++Phydm_CheckChannelPlan( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ ++ if (pMgntInfo->RegEnableAdaptivity == 2) { ++ if (pDM_Odm->Carrier_Sense_enable == FALSE) { /*check domain Code for Adaptivity or CarrierSense*/ ++ if ((*pDM_Odm->pBandType == ODM_BAND_5G) && ++ !(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } else if ((*pDM_Odm->pBandType == ODM_BAND_2_4G) && ++ !(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ ++ } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity neither 2G nor 5G band, return\n")); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } ++ } else { ++ if ((*pDM_Odm->pBandType == ODM_BAND_5G) && ++ !(pDM_Odm->odm_Regulation5G == REGULATION_MKK || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } ++ ++ else if ((*pDM_Odm->pBandType == ODM_BAND_2_4G) && ++ !(pDM_Odm->odm_Regulation2_4G == REGULATION_MKK || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ ++ } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense neither 2G nor 5G band, return\n")); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } ++ } ++ } ++ ++ return FALSE; ++ ++} ++#endif ++ ++VOID ++Phydm_NHMCounterStatisticsInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ /*PHY parameters initialize for n series*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N + 2, 0xC350); /*0x894[31:16]=0x0xC350 Time duration for NHM unit: us, 0xc350=200ms*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff); /*0x890[31:16]=0xffff th_9, th_10*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff50); /*0x898=0xffffff52 th_3, th_2, th_1, th_0*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); /*0x89c=0xffffffff th_7, th_6, th_5, th_4*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /*0xe28[7:0]=0xff th_8*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10 | BIT9 | BIT8, 0x1); /*0x890[10:8]=1 ignoreCCA ignore PHYTXON enable CCX*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); /*0xc0c[7]=1 max power among all RX ants*/ ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ /*PHY parameters initialize for ac series*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC + 2, 0xC350); /*0x990[31:16]=0xC350 Time duration for NHM unit: us, 0xc350=200ms*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff); /*0x994[31:16]=0xffff th_9, th_10*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff50); /*0x998=0xffffff52 th_3, th_2, th_1, th_0*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff); /*0x99c=0xffffffff th_7, th_6, th_5, th_4*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, 0xff); /*0x9a0[7:0]=0xff th_8*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8 | BIT9 | BIT10, 0x1); /*0x994[10:8]=1 ignoreCCA ignore PHYTXON enable CCX*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_9E8_11AC, BIT0, 0x1); /*0x9e8[7]=1 max power among all RX ants*/ ++ ++ } ++#endif ++} ++ ++VOID ++Phydm_NHMCounterStatistics( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ return; ++ ++ /*Get NHM report*/ ++ Phydm_GetNHMCounterStatistics(pDM_Odm); ++ ++ /*Reset NHM counter*/ ++ Phydm_NHMCounterStatisticsReset(pDM_Odm); ++} ++ ++VOID ++Phydm_GetNHMCounterStatistics( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32 = 0; ++#if (RTL8195A_SUPPORT == 0) ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11AC, bMaskDWord); ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++#endif ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11N, bMaskDWord); ++ ++ pDM_Odm->NHM_cnt_0 = (u1Byte)(value32 & bMaskByte0); ++ pDM_Odm->NHM_cnt_1 = (u1Byte)((value32 & bMaskByte1) >> 8); ++ ++} ++ ++VOID ++Phydm_NHMCounterStatisticsReset( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1); ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 1); ++ } ++ ++#endif ++ ++} ++ ++VOID ++Phydm_SetEDCCAThreshold( ++ IN PVOID pDM_VOID, ++ IN s1Byte H2L, ++ IN s1Byte L2H ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskByte2|bMaskByte0, (u4Byte)((u1Byte)L2H|(u1Byte)H2L<<16)); ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, bMaskLWord, (u2Byte)((u1Byte)L2H|(u1Byte)H2L<<8)); ++#endif ++ ++} ++ ++VOID ++Phydm_SetLNA( ++ IN PVOID pDM_VOID, ++ IN PhyDM_set_LNA type ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E)) { ++ if (type == PhyDM_disable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x37f82); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x37f82); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } else if (type == PhyDM_enable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*back to normal*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x77f82); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } ++ } else if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ if (type == PhyDM_disable_LNA) { ++ /*S0*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0001f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xe6137); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ /*S1*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, 0xfffff, 0x3008d); /*select Rx mode and disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x0); ++ } else if (type == PhyDM_enable_LNA) { ++ /*S0*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0001f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xe6177); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ /*S1*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, 0xfffff, 0x300bd); /*select Rx mode and disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x0); ++ } ++ ++ } else if (pDM_Odm->SupportICType & ODM_RTL8812) { ++ if (type == PhyDM_disable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } else if (type == PhyDM_enable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) { ++ if (type == PhyDM_disable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0002f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xfb09b); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ } else if (type == PhyDM_enable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0002f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xfb0bb); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ } ++ } ++} ++ ++ ++ ++VOID ++Phydm_SetTRxMux( ++ IN PVOID pDM_VOID, ++ IN PhyDM_Trx_MUX_Type txMode, ++ IN PhyDM_Trx_MUX_Type rxMode ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT3 | BIT2 | BIT1, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT22 | BIT21 | BIT20, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT3 | BIT2 | BIT1, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT22 | BIT21 | BIT20, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ } ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT11 | BIT10 | BIT9 | BIT8, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT7 | BIT6 | BIT5 | BIT4, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT11 | BIT10 | BIT9 | BIT8, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT7 | BIT6 | BIT5 | BIT4, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ } ++ } ++#endif ++ ++} ++ ++VOID ++Phydm_MACEDCCAState( ++ IN PVOID pDM_VOID, ++ IN PhyDM_MACEDCCA_Type State ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (State == PhyDM_IGNORE_EDCCA) { ++ ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 1); /*ignore EDCCA reg520[15]=1*/ ++ ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 0); /*reg524[11]=0*/ ++ } else { /*don't set MAC ignore EDCCA signal*/ ++ ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 0); /*don't ignore EDCCA reg520[15]=0*/ ++ ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); /*reg524[11]=1 */ ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("EDCCA enable State = %d\n", State)); ++ ++} ++ ++BOOLEAN ++Phydm_CalNHMcnt( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte Base = 0; ++ ++ Base = pDM_Odm->NHM_cnt_0 + pDM_Odm->NHM_cnt_1; ++ ++ if (Base != 0) { ++ pDM_Odm->NHM_cnt_0 = ((pDM_Odm->NHM_cnt_0) << 8) / Base; ++ pDM_Odm->NHM_cnt_1 = ((pDM_Odm->NHM_cnt_1) << 8) / Base; ++ } ++ if ((pDM_Odm->NHM_cnt_0 - pDM_Odm->NHM_cnt_1) >= 100) ++ return TRUE; /*clean environment*/ ++ else ++ return FALSE; /*noisy environment*/ ++ ++} ++ ++ ++VOID ++Phydm_CheckEnvironment( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ BOOLEAN isCleanEnvironment = FALSE; ++ ++ if (Adaptivity->bFirstLink == TRUE) { ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) ++ pDM_Odm->adaptivity_flag = FALSE; ++ else ++ pDM_Odm->adaptivity_flag = TRUE; ++ ++ Adaptivity->bFirstLink = FALSE; ++ return; ++ } else { ++ if (Adaptivity->NHMWait < 3) { /*Start enter NHM after 4 NHMWait*/ ++ Adaptivity->NHMWait++; ++ Phydm_NHMCounterStatistics(pDM_Odm); ++ return; ++ } else { ++ Phydm_NHMCounterStatistics(pDM_Odm); ++ isCleanEnvironment = Phydm_CalNHMcnt(pDM_Odm); ++ if (isCleanEnvironment == TRUE) { ++ pDM_Odm->TH_L2H_ini = Adaptivity->TH_L2H_ini_backup; /*adaptivity mode*/ ++ pDM_Odm->TH_EDCCA_HL_diff = Adaptivity->TH_EDCCA_HL_diff_backup; ++ ++ pDM_Odm->Adaptivity_enable = TRUE; ++ ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) ++ pDM_Odm->adaptivity_flag = FALSE; ++ else ++ pDM_Odm->adaptivity_flag = TRUE; ++ } else { ++ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; /*mode2*/ ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; ++ ++ pDM_Odm->adaptivity_flag = FALSE; ++ pDM_Odm->Adaptivity_enable = FALSE; ++ } ++ Adaptivity->NHMWait = 0; ++ Adaptivity->bFirstLink = TRUE; ++ Adaptivity->bCheck = TRUE; ++ } ++ ++ } ++ ++ ++} ++ ++VOID ++Phydm_SearchPwdBLowerBound( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ u4Byte value32 = 0; ++ u1Byte cnt, IGI = 0x45; /*IGI = 0x50 for cal EDCCA lower bound*/ ++ u1Byte txEdcca1 = 0, txEdcca0 = 0; ++ BOOLEAN bAdjust = TRUE; ++ s1Byte TH_L2H_dmc, TH_H2L_dmc, IGI_target = 0x32; ++ s1Byte Diff; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) ++ Phydm_SetLNA(pDM_Odm, PhyDM_disable_LNA); ++ else { ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); ++ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_0, 0x7e); ++ } ++ ++ Diff = IGI_target - (s1Byte)IGI; ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; ++ if (TH_L2H_dmc > 10) ++ TH_L2H_dmc = 10; ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ++ ODM_delay_ms(5); ++ ++ while (bAdjust) { ++ for (cnt = 0; cnt < 20; cnt++) { ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11N, bMaskDWord); ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC, bMaskDWord); ++#endif ++ if (value32 & BIT30 && (pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8723B | ODM_RTL8188E))) ++ txEdcca1 = txEdcca1 + 1; ++ else if (value32 & BIT29) ++ txEdcca1 = txEdcca1 + 1; ++ else ++ txEdcca0 = txEdcca0 + 1; ++ } ++ ++ if (txEdcca1 > 1) { ++ IGI = IGI - 1; ++ TH_L2H_dmc = TH_L2H_dmc + 1; ++ if (TH_L2H_dmc > 10) ++ TH_L2H_dmc = 10; ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ++ if (TH_L2H_dmc == 10) { ++ bAdjust = FALSE; ++ Adaptivity->H2L_lb = TH_H2L_dmc; ++ Adaptivity->L2H_lb = TH_L2H_dmc; ++ pDM_Odm->Adaptivity_IGI_upper = IGI; ++ } ++ ++ txEdcca1 = 0; ++ txEdcca0 = 0; ++ ++ } else { ++ bAdjust = FALSE; ++ Adaptivity->H2L_lb = TH_H2L_dmc; ++ Adaptivity->L2H_lb = TH_L2H_dmc; ++ pDM_Odm->Adaptivity_IGI_upper = IGI; ++ txEdcca1 = 0; ++ txEdcca0 = 0; ++ } ++ } ++ ++ pDM_Odm->Adaptivity_IGI_upper = pDM_Odm->Adaptivity_IGI_upper - pDM_Odm->DCbackoff; ++ Adaptivity->H2L_lb = Adaptivity->H2L_lb + pDM_Odm->DCbackoff; ++ Adaptivity->L2H_lb = Adaptivity->L2H_lb + pDM_Odm->DCbackoff; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) ++ Phydm_SetLNA(pDM_Odm, PhyDM_enable_LNA); ++ else { ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE); ++ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_0, NONE); ++ } ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); /*resume to no link state*/ ++} ++ ++VOID ++Phydm_AdaptivityInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ s1Byte IGItarget = 0x32; ++#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ pDM_Odm->Carrier_Sense_enable = (BOOLEAN)pMgntInfo->RegEnableCarrierSense; ++ pDM_Odm->DCbackoff = (u1Byte)pMgntInfo->RegDCbackoff; ++ Adaptivity->DynamicLinkAdaptivity = (BOOLEAN)pMgntInfo->RegDmLinkAdaptivity; ++ Adaptivity->APNumTH = (u1Byte)pMgntInfo->RegAPNumTH; ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pDM_Odm->Carrier_Sense_enable = (pDM_Odm->Adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE; ++ pDM_Odm->DCbackoff = pDM_Odm->Adapter->registrypriv.adaptivity_dc_backoff; ++ Adaptivity->DynamicLinkAdaptivity = (pDM_Odm->Adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE; ++#endif ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ ++ if (pDM_Odm->Carrier_Sense_enable == FALSE) { ++#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pMgntInfo->RegL2HForAdaptivity != 0) ++ pDM_Odm->TH_L2H_ini = pMgntInfo->RegL2HForAdaptivity; ++ else ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pDM_Odm->Adapter->registrypriv.adaptivity_th_l2h_ini != 0) ++ pDM_Odm->TH_L2H_ini = pDM_Odm->Adapter->registrypriv.adaptivity_th_l2h_ini; ++ else ++#endif ++ pDM_Odm->TH_L2H_ini = 0xf5; ++ } else ++ pDM_Odm->TH_L2H_ini = 0xa; ++ ++#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pMgntInfo->RegHLDiffForAdaptivity != 0) ++ pDM_Odm->TH_EDCCA_HL_diff = pMgntInfo->RegHLDiffForAdaptivity; ++ else ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pDM_Odm->Adapter->registrypriv.adaptivity_th_edcca_hl_diff != 0) ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->Adapter->registrypriv.adaptivity_th_edcca_hl_diff; ++ else ++#endif ++ pDM_Odm->TH_EDCCA_HL_diff = 7; ++ ++ Adaptivity->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; ++ Adaptivity->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff; ++ ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ if (pDM_Odm->Carrier_Sense_enable) { ++ pDM_Odm->TH_L2H_ini = 0xa; ++ pDM_Odm->TH_EDCCA_HL_diff = 7; ++ } else { ++ Adaptivity->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; /*set by mib*/ ++ pDM_Odm->TH_EDCCA_HL_diff = 7; ++ } ++ ++ Adaptivity->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff; ++ if (priv->pshare->rf_ft_var.adaptivity_enable == 2) ++ Adaptivity->DynamicLinkAdaptivity = TRUE; ++ else ++ Adaptivity->DynamicLinkAdaptivity = FALSE; ++ ++#endif ++ ++ pDM_Odm->Adaptivity_IGI_upper = 0; ++ pDM_Odm->Adaptivity_enable = FALSE; /*use this flag to decide enable or disable*/ ++ ++ pDM_Odm->EDCCA_enable = TRUE; /*even no adaptivity, we still enable EDCCA*/ ++ ++ pDM_Odm->TH_L2H_ini_mode2 = 20; ++ pDM_Odm->TH_EDCCA_HL_diff_mode2 = 8; ++ ++ Adaptivity->IGI_Base = 0x32; ++ Adaptivity->IGI_target = 0x1c; ++ Adaptivity->H2L_lb = 0; ++ Adaptivity->L2H_lb = 0; ++ Adaptivity->NHMWait = 0; ++ Adaptivity->bCheck = FALSE; ++ Adaptivity->bFirstLink = TRUE; ++ Adaptivity->AdajustIGILevel = 0; ++ ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); ++ ++ /*Search pwdB lower bound*/ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208); ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC, bMaskDWord, 0x209); ++#endif ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_GAIN_IDX_EDCCA) { ++ /*ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT12 | BIT11 | BIT10, 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DCNF_11N, BIT21 | BIT20, 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ ++ } ++#if (RTL8195A_SUPPORT == 0) ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_GAIN_IDX_EDCCA) { /*8814a no need to find pwdB lower bound, maybe*/ ++ /*ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DOWN_OPT, BIT30 | BIT29 | BIT28, 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT29 | BIT28, 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ ++ } ++ ++ if(!(pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))) ++ Phydm_SearchPwdBLowerBound(pDM_Odm); ++#endif ++ ++/*we need to consider PwdB upper bound for 8814 later IC*/ ++ Adaptivity->AdajustIGILevel = (u1Byte)((pDM_Odm->TH_L2H_ini + IGItarget) - PwdBUpperBound + DFIRloss); /*IGI = L2H - PwdB - DFIRloss*/ ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("TH_L2H_ini = 0x%x, TH_EDCCA_HL_diff = 0x%x, Adaptivity->AdajustIGILevel = 0x%x\n", pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, Adaptivity->AdajustIGILevel)); ++ ++} ++ ++ ++VOID ++Phydm_Adaptivity( ++ IN PVOID pDM_VOID, ++ IN u1Byte IGI ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ s1Byte TH_L2H_dmc, TH_H2L_dmc; ++ s1Byte Diff = 0, IGI_target; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ BOOLEAN bFwCurrentInPSMode = FALSE; ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); ++ ++ /*Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.*/ ++ if (bFwCurrentInPSMode) ++ return; ++#endif ++ ++ if ((pDM_Odm->EDCCA_enable == FALSE) || (pDM_Odm->bWIFITest == TRUE)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Disable EDCCA!!!\n")); ++ return; ++ } ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity disable, enable EDCCA mode!!!\n")); ++ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; ++ } ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ else{ ++ if (Phydm_CheckChannelPlan(pDM_Odm) || (pDM_Odm->APTotalNum > Adaptivity->APNumTH)) { ++ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; ++ } ++ } ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("odm_Adaptivity() =====>\n")); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d\n", ++ Adaptivity->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff)); ++#if (RTL8195A_SUPPORT == 0) ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ /*fix AC series when enable EDCCA hang issue*/ ++ ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 1); /*ADC_mask disable*/ ++ ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); /*ADC_mask enable*/ ++ } ++#endif ++ if (*pDM_Odm->pBandWidth == ODM_BW20M) /*CHANNEL_WIDTH_20*/ ++ IGI_target = Adaptivity->IGI_Base; ++ else if (*pDM_Odm->pBandWidth == ODM_BW40M) ++ IGI_target = Adaptivity->IGI_Base + 2; ++#if (RTL8195A_SUPPORT == 0) ++ else if (*pDM_Odm->pBandWidth == ODM_BW80M) ++ IGI_target = Adaptivity->IGI_Base + 2; ++#endif ++ else ++ IGI_target = Adaptivity->IGI_Base; ++ Adaptivity->IGI_target = (u1Byte) IGI_target; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, DynamicLinkAdaptivity = %d\n", ++ (*pDM_Odm->pBandWidth == ODM_BW80M) ? "80M" : ((*pDM_Odm->pBandWidth == ODM_BW40M) ? "40M" : "20M"), IGI_target, Adaptivity->DynamicLinkAdaptivity)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("RSSI_min = %d, Adaptivity->AdajustIGILevel= 0x%x, adaptivity_flag = %d, Adaptivity_enable = %d\n", ++ pDM_Odm->RSSI_Min, Adaptivity->AdajustIGILevel, pDM_Odm->adaptivity_flag, pDM_Odm->Adaptivity_enable)); ++ ++ if ((Adaptivity->DynamicLinkAdaptivity == TRUE) && (!pDM_Odm->bLinked) && (pDM_Odm->Adaptivity_enable == FALSE)) { ++ Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("In DynamicLink mode(noisy) and No link, Turn off EDCCA!!\n")); ++ return; ++ } ++ ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { ++ if ((Adaptivity->AdajustIGILevel > IGI) && (pDM_Odm->Adaptivity_enable == TRUE)) ++ Diff = Adaptivity->AdajustIGILevel - IGI; ++ ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini - Diff + IGI_target; ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else { ++ Diff = IGI_target - (s1Byte)IGI; ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; ++ if (TH_L2H_dmc > 10 && (pDM_Odm->Adaptivity_enable == TRUE)) ++ TH_L2H_dmc = 10; ++ ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ ++ /*replace lower bound to prevent EDCCA always equal 1*/ ++ if (TH_H2L_dmc < Adaptivity->H2L_lb) ++ TH_H2L_dmc = Adaptivity->H2L_lb; ++ if (TH_L2H_dmc < Adaptivity->L2H_lb) ++ TH_L2H_dmc = Adaptivity->L2H_lb; ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", IGI, TH_L2H_dmc, TH_H2L_dmc)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity_IGI_upper=0x%x, H2L_lb = 0x%x, L2H_lb = 0x%x\n", pDM_Odm->Adaptivity_IGI_upper, Adaptivity->H2L_lb, Adaptivity->L2H_lb)); ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ++ return; ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++Phydm_AdaptivityBSOD( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ u1Byte count = 0; ++ u4Byte u4Value; ++ ++ /* ++ 1. turn off RF (TRX Mux in standby mode) ++ 2. H2C mac id drop ++ 3. ignore EDCCA ++ 4. wait for clear FIFO ++ 5. don't ignore EDCCA ++ 6. turn on RF (TRX Mux in TRx mdoe) ++ 7. H2C mac id resume ++ */ ++ ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("MAC id drop packet!!!!!\n")); ++ ++ pAdapter->dropPktByMacIdCnt++; ++ pMgntInfo->bDropPktInProgress = TRUE; ++ ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_MAX_Q_PAGE_NUM, (pu1Byte)(&u4Value)); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Queue Reserved Page Number = 0x%08x\n", u4Value)); ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_AVBL_Q_PAGE_NUM, (pu1Byte)(&u4Value)); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page Number = 0x%08x\n", u4Value)); ++ ++#if 1 ++ ++ /*Standby mode*/ ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); ++ ODM_Write_DIG(pDM_Odm, 0x20); ++ ++ /*H2C mac id drop*/ ++ MacIdIndicateDisconnect(pAdapter); ++ ++ /*Ignore EDCCA*/ ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); ++ ++ delay_ms(50); ++ count = 5; ++ ++#else ++ ++ do { ++ ++ u8Byte diffTime, curTime, oldestTime; ++ u1Byte queueIdx ++ ++ //3 Standby mode ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); ++ ODM_Write_DIG(pDM_Odm, 0x20); ++ ++ //3 H2C mac id drop ++ MacIdIndicateDisconnect(pAdapter); ++ ++ //3 Ignore EDCCA ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); ++ ++ count++; ++ delay_ms(10); ++ ++ // Check latest packet ++ curTime = PlatformGetCurrentTime(); ++ oldestTime = 0xFFFFFFFFFFFFFFFF; ++ ++ for (queueIdx = 0; queueIdx < MAX_TX_QUEUE; queueIdx++) { ++ if (!IS_DATA_QUEUE(queueIdx)) ++ continue; ++ ++ if (!pAdapter->bTcbBusyQEmpty[queueIdx]) { ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("oldestTime = %llu\n", oldestTime)); ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("Q[%d] = %llu\n", queueIdx, pAdapter->firstTcbSysTime[queueIdx])); ++ if (pAdapter->firstTcbSysTime[queueIdx] < oldestTime) ++ oldestTime = pAdapter->firstTcbSysTime[queueIdx]; ++ } ++ } ++ ++ diffTime = curTime - oldestTime; ++ ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("diff s = %llu\n", (diffTime / 1000000))); ++ ++ } while (((diffTime / 1000000) >= 4) && (oldestTime != 0xFFFFFFFFFFFFFFFF)); ++#endif ++ ++ /*Resume EDCCA*/ ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); ++ ++ /*Turn on TRx mode*/ ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE); ++ ODM_Write_DIG(pDM_Odm, 0x20); ++ ++ /*Resume H2C macid*/ ++ MacIdRecoverMediaStatus(pAdapter); ++ ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_AVBL_Q_PAGE_NUM, (pu1Byte)(&u4Value)); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page Number = 0x%08x\n", u4Value)); ++ ++ pMgntInfo->bDropPktInProgress = FALSE; ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("End of MAC id drop packet, spent %dms\n", count * 10)); ++ ++} ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_adaptivity.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_adaptivity.h new file mode 100644 -index 000000000..75f592c00 +index 0000000..ea1ab38 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_adaptivity.h @@ -0,0 +1,166 @@ -+ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMADAPTIVITY_H__ -+#define __PHYDMADAPTIVITY_H__ -+ -+#define ADAPTIVITY_VERSION "9.0" -+ -+#define PwdBUpperBound 7 -+#define DFIRloss 5 -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+typedef enum _tag_PhyDM_REGULATION_Type { -+ REGULATION_FCC = 0, -+ REGULATION_MKK = 1, -+ REGULATION_ETSI = 2, -+ REGULATION_WW = 3, -+ -+ MAX_REGULATION_NUM = 4 -+} PhyDM_REGULATION_TYPE; -+#endif -+ -+typedef enum tag_PhyDM_set_LNA { -+ PhyDM_disable_LNA = 0, -+ PhyDM_enable_LNA = 1, -+} PhyDM_set_LNA; -+ -+ -+typedef enum tag_PhyDM_TRx_MUX_Type -+{ -+ PhyDM_SHUTDOWN = 0, -+ PhyDM_STANDBY_MODE = 1, -+ PhyDM_TX_MODE = 2, -+ PhyDM_RX_MODE = 3 -+}PhyDM_Trx_MUX_Type; -+ -+typedef enum tag_PhyDM_MACEDCCA_Type -+{ -+ PhyDM_IGNORE_EDCCA = 0, -+ PhyDM_DONT_IGNORE_EDCCA = 1 -+}PhyDM_MACEDCCA_Type; -+ -+typedef struct _ADAPTIVITY_STATISTICS { -+ s1Byte TH_L2H_ini_backup; -+ s1Byte TH_EDCCA_HL_diff_backup; -+ s1Byte IGI_Base; -+ u1Byte IGI_target; -+ u1Byte NHMWait; -+ s1Byte H2L_lb; -+ s1Byte L2H_lb; -+ BOOLEAN bFirstLink; -+ BOOLEAN bCheck; -+ BOOLEAN DynamicLinkAdaptivity; -+ u1Byte APNumTH; -+ u1Byte AdajustIGILevel; -+} ADAPTIVITY_STATISTICS, *PADAPTIVITY_STATISTICS; -+ -+VOID -+Phydm_CheckAdaptivity( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+Phydm_CheckEnvironment( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+Phydm_NHMCounterStatisticsInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+Phydm_NHMCounterStatistics( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+Phydm_NHMCounterStatisticsReset( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+Phydm_GetNHMCounterStatistics( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+Phydm_MACEDCCAState( -+ IN PVOID pDM_VOID, -+ IN PhyDM_MACEDCCA_Type State -+); -+ -+VOID -+Phydm_SetEDCCAThreshold( -+ IN PVOID pDM_VOID, -+ IN s1Byte H2L, -+ IN s1Byte L2H -+); -+ -+VOID -+Phydm_SetTRxMux( -+ IN PVOID pDM_VOID, -+ IN PhyDM_Trx_MUX_Type txMode, -+ IN PhyDM_Trx_MUX_Type rxMode -+); -+ -+BOOLEAN -+Phydm_CalNHMcnt( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+Phydm_SearchPwdBLowerBound( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+Phydm_AdaptivityInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+Phydm_Adaptivity( -+ IN PVOID pDM_VOID, -+ IN u1Byte IGI -+ ); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+Phydm_DisableEDCCA( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+Phydm_DynamicEDCCA( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+Phydm_AdaptivityBSOD( -+ IN PVOID pDM_VOID -+); -+ -+#endif -+ -+ -+#endif ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMADAPTIVITY_H__ ++#define __PHYDMADAPTIVITY_H__ ++ ++#define ADAPTIVITY_VERSION "9.0" ++ ++#define PwdBUpperBound 7 ++#define DFIRloss 5 ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++typedef enum _tag_PhyDM_REGULATION_Type { ++ REGULATION_FCC = 0, ++ REGULATION_MKK = 1, ++ REGULATION_ETSI = 2, ++ REGULATION_WW = 3, ++ ++ MAX_REGULATION_NUM = 4 ++} PhyDM_REGULATION_TYPE; ++#endif ++ ++typedef enum tag_PhyDM_set_LNA { ++ PhyDM_disable_LNA = 0, ++ PhyDM_enable_LNA = 1, ++} PhyDM_set_LNA; ++ ++ ++typedef enum tag_PhyDM_TRx_MUX_Type ++{ ++ PhyDM_SHUTDOWN = 0, ++ PhyDM_STANDBY_MODE = 1, ++ PhyDM_TX_MODE = 2, ++ PhyDM_RX_MODE = 3 ++}PhyDM_Trx_MUX_Type; ++ ++typedef enum tag_PhyDM_MACEDCCA_Type ++{ ++ PhyDM_IGNORE_EDCCA = 0, ++ PhyDM_DONT_IGNORE_EDCCA = 1 ++}PhyDM_MACEDCCA_Type; ++ ++typedef struct _ADAPTIVITY_STATISTICS { ++ s1Byte TH_L2H_ini_backup; ++ s1Byte TH_EDCCA_HL_diff_backup; ++ s1Byte IGI_Base; ++ u1Byte IGI_target; ++ u1Byte NHMWait; ++ s1Byte H2L_lb; ++ s1Byte L2H_lb; ++ BOOLEAN bFirstLink; ++ BOOLEAN bCheck; ++ BOOLEAN DynamicLinkAdaptivity; ++ u1Byte APNumTH; ++ u1Byte AdajustIGILevel; ++} ADAPTIVITY_STATISTICS, *PADAPTIVITY_STATISTICS; ++ ++VOID ++Phydm_CheckAdaptivity( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_CheckEnvironment( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_NHMCounterStatisticsInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_NHMCounterStatistics( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_NHMCounterStatisticsReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_GetNHMCounterStatistics( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_MACEDCCAState( ++ IN PVOID pDM_VOID, ++ IN PhyDM_MACEDCCA_Type State ++); ++ ++VOID ++Phydm_SetEDCCAThreshold( ++ IN PVOID pDM_VOID, ++ IN s1Byte H2L, ++ IN s1Byte L2H ++); ++ ++VOID ++Phydm_SetTRxMux( ++ IN PVOID pDM_VOID, ++ IN PhyDM_Trx_MUX_Type txMode, ++ IN PhyDM_Trx_MUX_Type rxMode ++); ++ ++BOOLEAN ++Phydm_CalNHMcnt( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_SearchPwdBLowerBound( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_AdaptivityInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_Adaptivity( ++ IN PVOID pDM_VOID, ++ IN u1Byte IGI ++ ); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++Phydm_DisableEDCCA( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_DynamicEDCCA( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_AdaptivityBSOD( ++ IN PVOID pDM_VOID ++); ++ ++#endif ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdect.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdect.c new file mode 100644 -index 000000000..afa478cb4 +index 0000000..862c597 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdect.c @@ -0,0 +1,964 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) -+#if(defined(CONFIG_ANT_DETECTION)) -+ -+//IS_ANT_DETECT_SUPPORT_SINGLE_TONE(Adapter) -+//IS_ANT_DETECT_SUPPORT_RSSI(Adapter) -+//IS_ANT_DETECT_SUPPORT_PSD(Adapter) -+ -+//1 [1. Single Tone Method] =================================================== -+ -+// -+// Description: -+// Set Single/Dual Antenna default setting for products that do not do detection in advance. -+// -+// Added by Joseph, 2012.03.22 -+// -+VOID -+ODM_SingleDualAntennaDefaultSetting( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ -+ u1Byte btAntNum=BT_GetPgAntNum(pAdapter); -+ // Set default antenna A and B status -+ if(btAntNum == 2) -+ { -+ pDM_SWAT_Table->ANTA_ON=TRUE; -+ pDM_SWAT_Table->ANTB_ON=TRUE; -+ -+ } -+ else if(btAntNum == 1) -+ {// Set antenna A as default -+ pDM_SWAT_Table->ANTA_ON=TRUE; -+ pDM_SWAT_Table->ANTB_ON=FALSE; -+ -+ } -+ else -+ { -+ RT_ASSERT(FALSE, ("Incorrect antenna number!!\n")); -+ } -+} -+ -+ -+//2 8723A ANT DETECT -+// -+// Description: -+// Implement IQK single tone for RF DPK loopback and BB PSD scanning. -+// This function is cooperated with BB team Neil. -+// -+// Added by Roger, 2011.12.15 -+// -+BOOLEAN -+ODM_SingleDualAntennaDetection( -+ IN PVOID pDM_VOID, -+ IN u1Byte mode -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ u4Byte CurrentChannel,RfLoopReg; -+ u1Byte n; -+ u4Byte Reg88c, Regc08, Reg874, Regc50, Reg948, Regb2c, Reg92c, Reg930, Reg064, AFE_rRx_Wait_CCA; -+ u1Byte initial_gain = 0x5a; -+ u4Byte PSD_report_tmp; -+ u4Byte AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; -+ BOOLEAN bResult = TRUE; -+ u4Byte AFE_Backup[16]; -+ u4Byte AFE_REG_8723A[16] = { -+ rRx_Wait_CCA, rTx_CCK_RFON, -+ rTx_CCK_BBON, rTx_OFDM_RFON, -+ rTx_OFDM_BBON, rTx_To_Rx, -+ rTx_To_Tx, rRx_CCK, -+ rRx_OFDM, rRx_Wait_RIFS, -+ rRx_TO_Rx, rStandby, -+ rSleep, rPMPD_ANAEN, -+ rFPGA0_XCD_SwitchControl, rBlue_Tooth}; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============>\n")); -+ -+ -+ if (!(pDM_Odm->SupportICType & ODM_RTL8723B)) -+ return bResult; -+ -+ // Retrieve antenna detection registry info, added by Roger, 2012.11.27. -+ if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter)) -+ return bResult; -+ -+ //1 Backup Current RF/BB Settings -+ -+ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); -+ RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) { -+ Reg92c = ODM_GetBBReg(pDM_Odm, rDPDT_control, bMaskDWord); -+ Reg930 = ODM_GetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord); -+ Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); -+ Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); -+ Reg064 = ODM_GetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29); -+ ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1); -+ ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); -+ ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, 0x1); //dbg 7 -+ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3c0, 0x0);//dbg 8 -+ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x0); -+ } -+ -+ ODM_StallExecution(10); -+ -+ //Store A Path Register 88c, c08, 874, c50 -+ Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); -+ Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); -+ Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); -+ Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); -+ -+ // Store AFE Registers -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) -+ AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord); -+ -+ //Set PSD 128 pts -+ ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts -+ -+ // To SET CH1 to do -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401); //Channel 1 -+ -+ // AFE all on step -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) -+ ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016); -+ -+ // 3 wire Disable -+ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); -+ -+ //BB IQK Setting -+ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); -+ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); -+ -+ //IQK setting tone@ 4.34Mhz -+ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); -+ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); -+ -+ //Page B init -+ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); -+ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); -+ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); -+ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) { -+ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150016); -+ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150016); -+ } -+ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7f, initial_gain); -+ -+ //IQK Single tone start -+ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); -+ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); -+ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); -+ -+ ODM_StallExecution(10000); -+ -+ // PSD report of antenna A -+ PSD_report_tmp=0x0; -+ for (n=0;n<2;n++) -+ { -+ PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); -+ if(PSD_report_tmp >AntA_report) -+ AntA_report=PSD_report_tmp; -+ } -+ -+ // change to Antenna B -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) { -+ //ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2); -+ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); -+ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); -+ } -+ -+ ODM_StallExecution(10); -+ -+ // PSD report of antenna B -+ PSD_report_tmp=0x0; -+ for (n=0;n<2;n++) -+ { -+ PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); -+ if(PSD_report_tmp > AntB_report) -+ AntB_report=PSD_report_tmp; -+ } -+ -+ //Close IQK Single Tone function -+ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); -+ -+ //1 Return to antanna A -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) { -+ // external DPDT -+ ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c); -+ -+ //internal S0/S1 -+ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); -+ ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); -+ ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord, Reg930); -+ ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, Reg064); -+ } -+ -+ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); -+ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); -+ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg); -+ -+ //Reload AFE Registers -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) -+ ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA); -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8723B) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, AntA_report)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, AntB_report)); -+ -+ //2 Test Ant B based on Ant A is ON -+ if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 135) && (AntB_report <= 135)) -+ { -+ u1Byte TH1=2, TH2=6; -+ -+ if((AntA_report - AntB_report < TH1) || (AntB_report - AntA_report < TH1)) -+ { -+ pDM_SWAT_Table->ANTA_ON=TRUE; -+ pDM_SWAT_Table->ANTB_ON=TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n")); -+ } -+ else if(((AntA_report - AntB_report >= TH1) && (AntA_report - AntB_report <= TH2)) || -+ ((AntB_report - AntA_report >= TH1) && (AntB_report - AntA_report <= TH2))) -+ { -+ pDM_SWAT_Table->ANTA_ON=FALSE; -+ pDM_SWAT_Table->ANTB_ON=FALSE; -+ bResult = FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); -+ } -+ else -+ { -+ pDM_SWAT_Table->ANTA_ON = TRUE; -+ pDM_SWAT_Table->ANTB_ON=FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna\n")); -+ } -+ pDM_Odm->AntDetectedInfo.bAntDetected= TRUE; -+ pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report; -+ pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report; -+ pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report; -+ -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n")); -+ bResult = FALSE; -+ } -+ } -+ return bResult; -+ -+} -+ -+ -+ -+//1 [2. Scan AP RSSI Method] ================================================== -+ -+ -+ -+ -+BOOLEAN -+ODM_SwAntDivCheckBeforeLink( -+ IN PVOID pDM_VOID -+ ) -+{ -+ -+#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) -+ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ s1Byte Score = 0; -+ PRT_WLAN_BSS pTmpBssDesc, pTestBssDesc; -+ u1Byte power_target_L = 9, power_target_H = 16; -+ u1Byte tmp_power_diff = 0,power_diff = 0,avg_power_diff = 0,max_power_diff = 0,min_power_diff = 0xff; -+ u2Byte index, counter = 0; -+ static u1Byte ScanChannel; -+ u4Byte tmp_SWAS_NoLink_BK_Reg948; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", pDM_Odm->DM_SWAT_Table.ANTA_ON, pDM_Odm->DM_SWAT_Table.ANTB_ON)); -+ -+ //if(HP id) -+ { -+ if(pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult==TRUE && pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B RSSI-based Antenna Detection is done\n")); -+ return FALSE; -+ } -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if(pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 == 0xff) -+ pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch ); -+ } -+ } -+ -+ if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 -+ { // The ODM structure is not initialized. -+ return FALSE; -+ } -+ -+ // Retrieve antenna detection registry info, added by Roger, 2012.11.27. -+ if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter)) -+ { -+ return FALSE; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Antenna Detection: RSSI Method\n")); -+ } -+ -+ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. -+ PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); -+ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) -+ { -+ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, -+ ("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n", -+ pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState)); -+ -+ pDM_SWAT_Table->SWAS_NoLink_State = 0; -+ -+ return FALSE; -+ } -+ else -+ { -+ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State)); -+ //1 Run AntDiv mechanism "Before Link" part. -+ if(pDM_SWAT_Table->SWAS_NoLink_State == 0) -+ { -+ //1 Prepare to do Scan again to check current antenna state. -+ -+ // Set check state to next step. -+ pDM_SWAT_Table->SWAS_NoLink_State = 1; -+ -+ // Copy Current Scan list. -+ pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc; -+ PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); -+ -+ // Go back to scan function again. -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n")); -+ pMgntInfo->ScanStep=0; -+ pMgntInfo->bScanAntDetect = TRUE; -+ ScanChannel = odm_SwAntDivSelectScanChnl(Adapter); -+ -+ -+ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) -+ { -+ if(pDM_FatTable->RxIdleAnt == MAIN_ANT) -+ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); -+ else -+ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); -+ if(ScanChannel == 0) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, -+ ("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); -+ -+ if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) -+ { -+ pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ } -+ else -+ { -+ pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ } -+ return FALSE; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, -+ ("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); -+ } else if (pDM_Odm->SupportICType & (ODM_RTL8723B)) { -+ /*Switch Antenna to another one.*/ -+ -+ tmp_SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch); -+ -+ if ((pDM_SWAT_Table->CurAntenna == MAIN_ANT) && (tmp_SWAS_NoLink_BK_Reg948 == 0x200)) { -+ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); -+ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); -+ pDM_SWAT_Table->CurAntenna = AUX_ANT; -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Reg[948]= (( %x )) was in wrong state\n", tmp_SWAS_NoLink_BK_Reg948)); -+ return FALSE; -+ } -+ ODM_StallExecution(10); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Change to (( %s-ant)) for testing.\n", (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?"MAIN":"AUX")); -+ } -+ -+ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); -+ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); -+ -+ return TRUE; -+ } -+ else //pDM_SWAT_Table->SWAS_NoLink_State == 1 -+ { -+ //1 ScanComple() is called after antenna swiched. -+ //1 Check scan result and determine which antenna is going -+ //1 to be used. -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" tmpNumBssDesc= (( %d )) \n",pMgntInfo->tmpNumBssDesc));// debug for Dino -+ -+ for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++) -+ { -+ pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1 -+ pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2 -+ -+ if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n")); -+ continue; -+ } -+ -+ if(pDM_Odm->SupportICType != ODM_RTL8723B) -+ { -+ if(pTmpBssDesc->ChannelNumber == ScanChannel) -+ { -+ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n")); -+ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ -+ Score++; -+ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); -+ } -+ else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n")); -+ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ Score--; -+ } -+ else -+ { -+ if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000) -+ { -+ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n")); -+ } -+ } -+ } -+ } -+ else // 8723B -+ { -+ if(pTmpBssDesc->ChannelNumber == ScanChannel) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ChannelNumber == ScanChannel -> (( %d )) \n", pTmpBssDesc->ChannelNumber )); -+ -+ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) // Pow(Ant1) > Pow(Ant2) -+ { -+ counter++; -+ tmp_power_diff=(u1Byte)(pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower); -+ power_diff = power_diff + tmp_power_diff; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); -+ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); -+ -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d)) \n", tmp_power_diff,max_power_diff,min_power_diff)); -+ if(tmp_power_diff > max_power_diff) -+ max_power_diff=tmp_power_diff; -+ if(tmp_power_diff < min_power_diff) -+ min_power_diff=tmp_power_diff; -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("max_power_diff: (( %d)),min_power_diff: (( %d)) \n",max_power_diff,min_power_diff)); -+ -+ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); -+ } -+ else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower) // Pow(Ant1) < Pow(Ant2) -+ { -+ counter++; -+ tmp_power_diff=(u1Byte)(pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower); -+ power_diff = power_diff + tmp_power_diff; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); -+ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); -+ if(tmp_power_diff > max_power_diff) -+ max_power_diff=tmp_power_diff; -+ if(tmp_power_diff < min_power_diff) -+ min_power_diff=tmp_power_diff; -+ } -+ else // Pow(Ant1) = Pow(Ant2) -+ { -+ if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp) // Stamp(Ant1) < Stamp(Ant2) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); -+ if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000) -+ { -+ counter++; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); -+ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); -+ min_power_diff = 0; -+ } -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); -+ } -+ } -+ } -+ } -+ } -+ -+ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) -+ { -+ if(pMgntInfo->NumBssDesc!=0 && Score<0) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, -+ ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, -+ ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); -+ -+ if(pDM_FatTable->RxIdleAnt == MAIN_ANT) -+ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); -+ else -+ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); -+ } -+ -+ if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) -+ { -+ pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ } -+ else -+ { -+ pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ } -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if(counter == 0) -+ { -+ if(pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec == FALSE) -+ { -+ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = TRUE; -+ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again \n")); -+ -+ //3 [ Scan again ] -+ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); -+ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); -+ return TRUE; -+ } -+ else// Pre_Aux_FailDetec == TRUE -+ { -+ //2 [ Single Antenna ] -+ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; -+ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Still cannot find any AP ]] \n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); -+ } -+ pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter++; -+ } -+ else -+ { -+ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; -+ -+ if(counter==3) -+ { -+ avg_power_diff = ((power_diff-max_power_diff - min_power_diff)>>1)+ ((max_power_diff + min_power_diff)>>2); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); -+ } -+ else if(counter>=4) -+ { -+ avg_power_diff=(power_diff-max_power_diff - min_power_diff) / (counter - 2); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); -+ -+ } -+ else//counter==1,2 -+ { -+ avg_power_diff=power_diff/counter; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d )) \n", avg_power_diff,counter, power_diff)); -+ } -+ -+ //2 [ Retry ] -+ if( (avg_power_diff >=power_target_L) && (avg_power_diff <=power_target_H) ) -+ { -+ pDM_Odm->DM_SWAT_Table.Retry_Counter++; -+ -+ if(pDM_Odm->DM_SWAT_Table.Retry_Counter<=3) -+ { -+ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]] \n", avg_power_diff)); -+ -+ //3 [ Scan again ] -+ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); -+ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); -+ return TRUE; -+ } -+ else -+ { -+ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Still Low confidence result ]] (( Retry_Counter > 3 )) \n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); -+ } -+ -+ } -+ //2 [ Dual Antenna ] -+ else if( (pMgntInfo->NumBssDesc != 0) && (avg_power_diff < power_target_L) ) -+ { -+ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; -+ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) -+ { -+ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; -+ pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); -+ pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter++; -+ -+ // set bt coexDM from 1ant coexDM to 2ant coexDM -+ BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 2); -+ -+ //3 [ Init antenna diversity ] -+ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; -+ ODM_AntDivInit(pDM_Odm); -+ } -+ //2 [ Single Antenna ] -+ else if(avg_power_diff > power_target_H) -+ { -+ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; -+ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) -+ { -+ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; -+ pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; -+ //BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); -+ pDM_Odm->DM_SWAT_Table.Single_Ant_Counter++; -+ } -+ } -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("bResult=(( %d ))\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Dual_Ant_Counter = (( %d )), Single_Ant_Counter = (( %d )) , Retry_Counter = (( %d )) , Aux_FailDetec_Counter = (( %d ))\n\n\n", -+ pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter,pDM_Odm->DM_SWAT_Table.Single_Ant_Counter,pDM_Odm->DM_SWAT_Table.Retry_Counter,pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter)); -+ -+ //2 recover the antenna setting -+ -+ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) -+ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, (pDM_SWAT_Table->SWAS_NoLink_BK_Reg948)); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bResult=(( %d )), Recover Reg[948]= (( %x )) \n\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult, pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 )); -+ -+ -+ } -+ -+ // Check state reset to default and wait for next time. -+ pDM_SWAT_Table->SWAS_NoLink_State = 0; -+ pMgntInfo->bScanAntDetect = FALSE; -+ -+ return FALSE; -+ } -+ -+#else -+ return FALSE; -+#endif -+ -+return FALSE; -+} -+ -+ -+ -+ -+ -+ -+//1 [3. PSD Method] ========================================================== -+ -+ -+ -+ -+u4Byte -+odm_GetPSDData( -+ IN PVOID pDM_VOID, -+ IN u2Byte point, -+ IN u1Byte initial_gain) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte psd_report; -+ -+ ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); //Start PSD calculation, Reg808[22]=0->1 -+ ODM_StallExecution(150);//Wait for HW PSD report -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);//Stop PSD calculation, Reg808[22]=1->0 -+ psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;//Read PSD report, Reg8B4[15:0] -+ -+ psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report));//+(u4Byte)(initial_gain); -+ return psd_report; -+} -+ -+ -+ -+VOID -+ODM_SingleDualAntennaDetection_PSD( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte Channel_ori; -+ u1Byte initial_gain = 0x36; -+ u1Byte tone_idx; -+ u1Byte Tone_lenth_1=7, Tone_lenth_2=4; -+ u2Byte Tone_idx_1[7]={88, 104, 120, 8, 24, 40, 56}; -+ u2Byte Tone_idx_2[4]={8, 24, 40, 56}; -+ u4Byte PSD_report_Main[11]={0}, PSD_report_Aux[11]={0}; -+ //u1Byte Tone_lenth_1=4, Tone_lenth_2=2; -+ //u2Byte Tone_idx_1[4]={88, 120, 24, 56}; -+ //u2Byte Tone_idx_2[2]={ 24, 56}; -+ //u4Byte PSD_report_Main[6]={0}, PSD_report_Aux[6]={0}; -+ -+ u4Byte PSD_report_temp,MAX_PSD_report_Main=0,MAX_PSD_report_Aux=0; -+ u4Byte PSD_power_threshold; -+ u4Byte Main_psd_result=0, Aux_psd_result=0; -+ u4Byte Regc50, Reg948, Regb2c,Regc14,Reg908; -+ u4Byte i=0,test_num=8; -+ -+ -+ if(pDM_Odm->SupportICType != ODM_RTL8723B) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection_PSD()============> \n")); -+ -+ //2 [ Backup Current RF/BB Settings ] -+ -+ Channel_ori = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); -+ Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); -+ Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); -+ Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); -+ Regc14 = ODM_GetBBReg(pDM_Odm, 0xc14, bMaskDWord); -+ Reg908 = ODM_GetBBReg(pDM_Odm, 0x908, bMaskDWord); -+ -+ //2 [ Setting for doing PSD function (CH4)] -+ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); //disable whole CCK block -+ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // Turn off TX -> Pause TX Queue -+ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); // [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] -+ -+ // PHYTXON while loop -+ ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, 0x803); -+ while (ODM_GetBBReg(pDM_Odm, 0xdf4, BIT6)) -+ { -+ i++; -+ if (i > 1000000) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Wait in %s() more than %d times!\n", __FUNCTION__, i)); -+ break; -+ } -+ } -+ -+ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH4 & 40M -+ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf -+ ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pt //Set PSD 128 ptss -+ ODM_StallExecution(3000); -+ -+ -+ //2 [ Doing PSD Function in (CH4)] -+ -+ //Antenna A -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH4)\n")); -+ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); -+ ODM_StallExecution(10); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dbg\n")); -+ for (i=0;iPSD_report_Main[tone_idx] ) -+ PSD_report_Main[tone_idx]+=PSD_report_temp; -+ } -+ } -+ //Antenna B -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH4)\n")); -+ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); -+ ODM_StallExecution(10); -+ for (i=0;iPSD_report_Aux[tone_idx] ) -+ PSD_report_Aux[tone_idx]+=PSD_report_temp; -+ } -+ } -+ //2 [ Doing PSD Function in (CH8)] -+ -+ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 -+ ODM_StallExecution(3000); -+ -+ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH8 & 40M -+ -+ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf -+ ODM_StallExecution(3000); -+ -+ //Antenna A -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH8)\n")); -+ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); -+ ODM_StallExecution(10); -+ -+ for (i=0;iPSD_report_Main[tone_idx] ) -+ PSD_report_Main[Tone_lenth_1+tone_idx]+=PSD_report_temp; -+ } -+ } -+ -+ //Antenna B -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH8)\n")); -+ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); -+ ODM_StallExecution(10); -+ -+ for (i=0;iPSD_report_Aux[tone_idx] ) -+ PSD_report_Aux[Tone_lenth_1+tone_idx]+=PSD_report_temp; -+ } -+ } -+ -+ //2 [ Calculate Result ] -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nMain PSD Result: (ALL) \n")); -+ for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Main[tone_idx] )); -+ Main_psd_result+= PSD_report_Main[tone_idx]; -+ if(PSD_report_Main[tone_idx]>MAX_PSD_report_Main) -+ MAX_PSD_report_Main=PSD_report_Main[tone_idx]; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Main= (( %d ))\n", Main_psd_result)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Main = (( %d ))\n", MAX_PSD_report_Main)); -+ -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nAux PSD Result: (ALL) \n")); -+ for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Aux[tone_idx] )); -+ Aux_psd_result+= PSD_report_Aux[tone_idx]; -+ if(PSD_report_Aux[tone_idx]>MAX_PSD_report_Aux) -+ MAX_PSD_report_Aux=PSD_report_Aux[tone_idx]; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Aux= (( %d ))\n", Aux_psd_result)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Aux = (( %d ))\n\n", MAX_PSD_report_Aux)); -+ -+ //Main_psd_result=Main_psd_result-MAX_PSD_report_Main; -+ //Aux_psd_result=Aux_psd_result-MAX_PSD_report_Aux; -+ PSD_power_threshold=(Main_psd_result*7)>>3; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Main_result , Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", Main_psd_result, Aux_psd_result,PSD_power_threshold)); -+ -+ //3 [ Dual Antenna ] -+ if(Aux_psd_result >= PSD_power_threshold ) -+ { -+ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) -+ { -+ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; -+ pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); -+ -+ // set bt coexDM from 1ant coexDM to 2ant coexDM -+ //BT_SetBtCoexAntNum(pAdapter, BT_COEX_ANT_TYPE_DETECTED, 2); -+ -+ // Init antenna diversity -+ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; -+ ODM_AntDivInit(pDM_Odm); -+ } -+ //3 [ Single Antenna ] -+ else -+ { -+ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) -+ { -+ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; -+ pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); -+ } -+ -+ //2 [ Recover all parameters ] -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,Channel_ori); -+ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 -+ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, Regc50); -+ -+ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); -+ ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); -+ -+ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); //enable whole CCK block -+ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x0); //Turn on TX // Resume TX Queue -+ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, Regc14); // [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] -+ ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, Reg908); -+ -+ return; -+ -+} -+ -+#endif -+void -+odm_SwAntDetectInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if(defined(CONFIG_ANT_DETECTION)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ -+ //pDM_SWAT_Table->PreAntenna = MAIN_ANT; -+ //pDM_SWAT_Table->CurAntenna = MAIN_ANT; -+ pDM_SWAT_Table->SWAS_NoLink_State = 0; -+ pDM_SWAT_Table->Pre_Aux_FailDetec = FALSE; -+ pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = 0xff; -+#endif -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) ++#if(defined(CONFIG_ANT_DETECTION)) ++ ++//IS_ANT_DETECT_SUPPORT_SINGLE_TONE(Adapter) ++//IS_ANT_DETECT_SUPPORT_RSSI(Adapter) ++//IS_ANT_DETECT_SUPPORT_PSD(Adapter) ++ ++//1 [1. Single Tone Method] =================================================== ++ ++// ++// Description: ++// Set Single/Dual Antenna default setting for products that do not do detection in advance. ++// ++// Added by Joseph, 2012.03.22 ++// ++VOID ++ODM_SingleDualAntennaDefaultSetting( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ ++ u1Byte btAntNum=BT_GetPgAntNum(pAdapter); ++ // Set default antenna A and B status ++ if(btAntNum == 2) ++ { ++ pDM_SWAT_Table->ANTA_ON=TRUE; ++ pDM_SWAT_Table->ANTB_ON=TRUE; ++ ++ } ++ else if(btAntNum == 1) ++ {// Set antenna A as default ++ pDM_SWAT_Table->ANTA_ON=TRUE; ++ pDM_SWAT_Table->ANTB_ON=FALSE; ++ ++ } ++ else ++ { ++ RT_ASSERT(FALSE, ("Incorrect antenna number!!\n")); ++ } ++} ++ ++ ++//2 8723A ANT DETECT ++// ++// Description: ++// Implement IQK single tone for RF DPK loopback and BB PSD scanning. ++// This function is cooperated with BB team Neil. ++// ++// Added by Roger, 2011.12.15 ++// ++BOOLEAN ++ODM_SingleDualAntennaDetection( ++ IN PVOID pDM_VOID, ++ IN u1Byte mode ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ u4Byte CurrentChannel,RfLoopReg; ++ u1Byte n; ++ u4Byte Reg88c, Regc08, Reg874, Regc50, Reg948, Regb2c, Reg92c, Reg930, Reg064, AFE_rRx_Wait_CCA; ++ u1Byte initial_gain = 0x5a; ++ u4Byte PSD_report_tmp; ++ u4Byte AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; ++ BOOLEAN bResult = TRUE; ++ u4Byte AFE_Backup[16]; ++ u4Byte AFE_REG_8723A[16] = { ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN, ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth}; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============>\n")); ++ ++ ++ if (!(pDM_Odm->SupportICType & ODM_RTL8723B)) ++ return bResult; ++ ++ // Retrieve antenna detection registry info, added by Roger, 2012.11.27. ++ if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter)) ++ return bResult; ++ ++ //1 Backup Current RF/BB Settings ++ ++ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); ++ RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ Reg92c = ODM_GetBBReg(pDM_Odm, rDPDT_control, bMaskDWord); ++ Reg930 = ODM_GetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord); ++ Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); ++ Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); ++ Reg064 = ODM_GetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29); ++ ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1); ++ ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); ++ ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, 0x1); //dbg 7 ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3c0, 0x0);//dbg 8 ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x0); ++ } ++ ++ ODM_StallExecution(10); ++ ++ //Store A Path Register 88c, c08, 874, c50 ++ Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); ++ Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); ++ Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); ++ Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); ++ ++ // Store AFE Registers ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) ++ AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord); ++ ++ //Set PSD 128 pts ++ ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts ++ ++ // To SET CH1 to do ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401); //Channel 1 ++ ++ // AFE all on step ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) ++ ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016); ++ ++ // 3 wire Disable ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); ++ ++ //BB IQK Setting ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); ++ ++ //IQK setting tone@ 4.34Mhz ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ++ //Page B init ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150016); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150016); ++ } ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7f, initial_gain); ++ ++ //IQK Single tone start ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ ODM_StallExecution(10000); ++ ++ // PSD report of antenna A ++ PSD_report_tmp=0x0; ++ for (n=0;n<2;n++) ++ { ++ PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); ++ if(PSD_report_tmp >AntA_report) ++ AntA_report=PSD_report_tmp; ++ } ++ ++ // change to Antenna B ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ //ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2); ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); ++ } ++ ++ ODM_StallExecution(10); ++ ++ // PSD report of antenna B ++ PSD_report_tmp=0x0; ++ for (n=0;n<2;n++) ++ { ++ PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); ++ if(PSD_report_tmp > AntB_report) ++ AntB_report=PSD_report_tmp; ++ } ++ ++ //Close IQK Single Tone function ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //1 Return to antanna A ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ // external DPDT ++ ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c); ++ ++ //internal S0/S1 ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); ++ ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord, Reg930); ++ ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, Reg064); ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg); ++ ++ //Reload AFE Registers ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) ++ ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, AntA_report)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, AntB_report)); ++ ++ //2 Test Ant B based on Ant A is ON ++ if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 135) && (AntB_report <= 135)) ++ { ++ u1Byte TH1=2, TH2=6; ++ ++ if((AntA_report - AntB_report < TH1) || (AntB_report - AntA_report < TH1)) ++ { ++ pDM_SWAT_Table->ANTA_ON=TRUE; ++ pDM_SWAT_Table->ANTB_ON=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n")); ++ } ++ else if(((AntA_report - AntB_report >= TH1) && (AntA_report - AntB_report <= TH2)) || ++ ((AntB_report - AntA_report >= TH1) && (AntB_report - AntA_report <= TH2))) ++ { ++ pDM_SWAT_Table->ANTA_ON=FALSE; ++ pDM_SWAT_Table->ANTB_ON=FALSE; ++ bResult = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); ++ } ++ else ++ { ++ pDM_SWAT_Table->ANTA_ON = TRUE; ++ pDM_SWAT_Table->ANTB_ON=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna\n")); ++ } ++ pDM_Odm->AntDetectedInfo.bAntDetected= TRUE; ++ pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report; ++ pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report; ++ pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report; ++ ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n")); ++ bResult = FALSE; ++ } ++ } ++ return bResult; ++ ++} ++ ++ ++ ++//1 [2. Scan AP RSSI Method] ================================================== ++ ++ ++ ++ ++BOOLEAN ++ODM_SwAntDivCheckBeforeLink( ++ IN PVOID pDM_VOID ++ ) ++{ ++ ++#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ s1Byte Score = 0; ++ PRT_WLAN_BSS pTmpBssDesc, pTestBssDesc; ++ u1Byte power_target_L = 9, power_target_H = 16; ++ u1Byte tmp_power_diff = 0,power_diff = 0,avg_power_diff = 0,max_power_diff = 0,min_power_diff = 0xff; ++ u2Byte index, counter = 0; ++ static u1Byte ScanChannel; ++ u4Byte tmp_SWAS_NoLink_BK_Reg948; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", pDM_Odm->DM_SWAT_Table.ANTA_ON, pDM_Odm->DM_SWAT_Table.ANTB_ON)); ++ ++ //if(HP id) ++ { ++ if(pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult==TRUE && pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B RSSI-based Antenna Detection is done\n")); ++ return FALSE; ++ } ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 == 0xff) ++ pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch ); ++ } ++ } ++ ++ if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 ++ { // The ODM structure is not initialized. ++ return FALSE; ++ } ++ ++ // Retrieve antenna detection registry info, added by Roger, 2012.11.27. ++ if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter)) ++ { ++ return FALSE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Antenna Detection: RSSI Method\n")); ++ } ++ ++ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. ++ PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n", ++ pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState)); ++ ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ ++ return FALSE; ++ } ++ else ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State)); ++ //1 Run AntDiv mechanism "Before Link" part. ++ if(pDM_SWAT_Table->SWAS_NoLink_State == 0) ++ { ++ //1 Prepare to do Scan again to check current antenna state. ++ ++ // Set check state to next step. ++ pDM_SWAT_Table->SWAS_NoLink_State = 1; ++ ++ // Copy Current Scan list. ++ pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc; ++ PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); ++ ++ // Go back to scan function again. ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n")); ++ pMgntInfo->ScanStep=0; ++ pMgntInfo->bScanAntDetect = TRUE; ++ ScanChannel = odm_SwAntDivSelectScanChnl(Adapter); ++ ++ ++ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) ++ { ++ if(pDM_FatTable->RxIdleAnt == MAIN_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ else ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ if(ScanChannel == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); ++ ++ if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) ++ { ++ pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ else ++ { ++ pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ return FALSE; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8723B)) { ++ /*Switch Antenna to another one.*/ ++ ++ tmp_SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch); ++ ++ if ((pDM_SWAT_Table->CurAntenna == MAIN_ANT) && (tmp_SWAS_NoLink_BK_Reg948 == 0x200)) { ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); ++ pDM_SWAT_Table->CurAntenna = AUX_ANT; ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Reg[948]= (( %x )) was in wrong state\n", tmp_SWAS_NoLink_BK_Reg948)); ++ return FALSE; ++ } ++ ODM_StallExecution(10); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Change to (( %s-ant)) for testing.\n", (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?"MAIN":"AUX")); ++ } ++ ++ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ ++ return TRUE; ++ } ++ else //pDM_SWAT_Table->SWAS_NoLink_State == 1 ++ { ++ //1 ScanComple() is called after antenna swiched. ++ //1 Check scan result and determine which antenna is going ++ //1 to be used. ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" tmpNumBssDesc= (( %d )) \n",pMgntInfo->tmpNumBssDesc));// debug for Dino ++ ++ for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++) ++ { ++ pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1 ++ pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2 ++ ++ if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n")); ++ continue; ++ } ++ ++ if(pDM_Odm->SupportICType != ODM_RTL8723B) ++ { ++ if(pTmpBssDesc->ChannelNumber == ScanChannel) ++ { ++ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n")); ++ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ++ Score++; ++ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); ++ } ++ else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n")); ++ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ Score--; ++ } ++ else ++ { ++ if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000) ++ { ++ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n")); ++ } ++ } ++ } ++ } ++ else // 8723B ++ { ++ if(pTmpBssDesc->ChannelNumber == ScanChannel) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ChannelNumber == ScanChannel -> (( %d )) \n", pTmpBssDesc->ChannelNumber )); ++ ++ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) // Pow(Ant1) > Pow(Ant2) ++ { ++ counter++; ++ tmp_power_diff=(u1Byte)(pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower); ++ power_diff = power_diff + tmp_power_diff; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d)) \n", tmp_power_diff,max_power_diff,min_power_diff)); ++ if(tmp_power_diff > max_power_diff) ++ max_power_diff=tmp_power_diff; ++ if(tmp_power_diff < min_power_diff) ++ min_power_diff=tmp_power_diff; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("max_power_diff: (( %d)),min_power_diff: (( %d)) \n",max_power_diff,min_power_diff)); ++ ++ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); ++ } ++ else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower) // Pow(Ant1) < Pow(Ant2) ++ { ++ counter++; ++ tmp_power_diff=(u1Byte)(pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower); ++ power_diff = power_diff + tmp_power_diff; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); ++ if(tmp_power_diff > max_power_diff) ++ max_power_diff=tmp_power_diff; ++ if(tmp_power_diff < min_power_diff) ++ min_power_diff=tmp_power_diff; ++ } ++ else // Pow(Ant1) = Pow(Ant2) ++ { ++ if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp) // Stamp(Ant1) < Stamp(Ant2) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); ++ if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000) ++ { ++ counter++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); ++ min_power_diff = 0; ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); ++ } ++ } ++ } ++ } ++ } ++ ++ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) ++ { ++ if(pMgntInfo->NumBssDesc!=0 && Score<0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); ++ ++ if(pDM_FatTable->RxIdleAnt == MAIN_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ else ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ } ++ ++ if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) ++ { ++ pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ else ++ { ++ pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(counter == 0) ++ { ++ if(pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec == FALSE) ++ { ++ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = TRUE; ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again \n")); ++ ++ //3 [ Scan again ] ++ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ return TRUE; ++ } ++ else// Pre_Aux_FailDetec == TRUE ++ { ++ //2 [ Single Antenna ] ++ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Still cannot find any AP ]] \n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ } ++ pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter++; ++ } ++ else ++ { ++ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; ++ ++ if(counter==3) ++ { ++ avg_power_diff = ((power_diff-max_power_diff - min_power_diff)>>1)+ ((max_power_diff + min_power_diff)>>2); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); ++ } ++ else if(counter>=4) ++ { ++ avg_power_diff=(power_diff-max_power_diff - min_power_diff) / (counter - 2); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); ++ ++ } ++ else//counter==1,2 ++ { ++ avg_power_diff=power_diff/counter; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d )) \n", avg_power_diff,counter, power_diff)); ++ } ++ ++ //2 [ Retry ] ++ if( (avg_power_diff >=power_target_L) && (avg_power_diff <=power_target_H) ) ++ { ++ pDM_Odm->DM_SWAT_Table.Retry_Counter++; ++ ++ if(pDM_Odm->DM_SWAT_Table.Retry_Counter<=3) ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]] \n", avg_power_diff)); ++ ++ //3 [ Scan again ] ++ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ return TRUE; ++ } ++ else ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Still Low confidence result ]] (( Retry_Counter > 3 )) \n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ } ++ ++ } ++ //2 [ Dual Antenna ] ++ else if( (pMgntInfo->NumBssDesc != 0) && (avg_power_diff < power_target_L) ) ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); ++ pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter++; ++ ++ // set bt coexDM from 1ant coexDM to 2ant coexDM ++ BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 2); ++ ++ //3 [ Init antenna diversity ] ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ ODM_AntDivInit(pDM_Odm); ++ } ++ //2 [ Single Antenna ] ++ else if(avg_power_diff > power_target_H) ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; ++ //BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ pDM_Odm->DM_SWAT_Table.Single_Ant_Counter++; ++ } ++ } ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("bResult=(( %d ))\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Dual_Ant_Counter = (( %d )), Single_Ant_Counter = (( %d )) , Retry_Counter = (( %d )) , Aux_FailDetec_Counter = (( %d ))\n\n\n", ++ pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter,pDM_Odm->DM_SWAT_Table.Single_Ant_Counter,pDM_Odm->DM_SWAT_Table.Retry_Counter,pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter)); ++ ++ //2 recover the antenna setting ++ ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, (pDM_SWAT_Table->SWAS_NoLink_BK_Reg948)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bResult=(( %d )), Recover Reg[948]= (( %x )) \n\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult, pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 )); ++ ++ ++ } ++ ++ // Check state reset to default and wait for next time. ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pMgntInfo->bScanAntDetect = FALSE; ++ ++ return FALSE; ++ } ++ ++#else ++ return FALSE; ++#endif ++ ++return FALSE; ++} ++ ++ ++ ++ ++ ++ ++//1 [3. PSD Method] ========================================================== ++ ++ ++ ++ ++u4Byte ++odm_GetPSDData( ++ IN PVOID pDM_VOID, ++ IN u2Byte point, ++ IN u1Byte initial_gain) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte psd_report; ++ ++ ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); //Start PSD calculation, Reg808[22]=0->1 ++ ODM_StallExecution(150);//Wait for HW PSD report ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);//Stop PSD calculation, Reg808[22]=1->0 ++ psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;//Read PSD report, Reg8B4[15:0] ++ ++ psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report));//+(u4Byte)(initial_gain); ++ return psd_report; ++} ++ ++ ++ ++VOID ++ODM_SingleDualAntennaDetection_PSD( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Channel_ori; ++ u1Byte initial_gain = 0x36; ++ u1Byte tone_idx; ++ u1Byte Tone_lenth_1=7, Tone_lenth_2=4; ++ u2Byte Tone_idx_1[7]={88, 104, 120, 8, 24, 40, 56}; ++ u2Byte Tone_idx_2[4]={8, 24, 40, 56}; ++ u4Byte PSD_report_Main[11]={0}, PSD_report_Aux[11]={0}; ++ //u1Byte Tone_lenth_1=4, Tone_lenth_2=2; ++ //u2Byte Tone_idx_1[4]={88, 120, 24, 56}; ++ //u2Byte Tone_idx_2[2]={ 24, 56}; ++ //u4Byte PSD_report_Main[6]={0}, PSD_report_Aux[6]={0}; ++ ++ u4Byte PSD_report_temp,MAX_PSD_report_Main=0,MAX_PSD_report_Aux=0; ++ u4Byte PSD_power_threshold; ++ u4Byte Main_psd_result=0, Aux_psd_result=0; ++ u4Byte Regc50, Reg948, Regb2c,Regc14,Reg908; ++ u4Byte i=0,test_num=8; ++ ++ ++ if(pDM_Odm->SupportICType != ODM_RTL8723B) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection_PSD()============> \n")); ++ ++ //2 [ Backup Current RF/BB Settings ] ++ ++ Channel_ori = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); ++ Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); ++ Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); ++ Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); ++ Regc14 = ODM_GetBBReg(pDM_Odm, 0xc14, bMaskDWord); ++ Reg908 = ODM_GetBBReg(pDM_Odm, 0x908, bMaskDWord); ++ ++ //2 [ Setting for doing PSD function (CH4)] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); //disable whole CCK block ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // Turn off TX -> Pause TX Queue ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); // [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] ++ ++ // PHYTXON while loop ++ ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, 0x803); ++ while (ODM_GetBBReg(pDM_Odm, 0xdf4, BIT6)) ++ { ++ i++; ++ if (i > 1000000) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Wait in %s() more than %d times!\n", __FUNCTION__, i)); ++ break; ++ } ++ } ++ ++ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH4 & 40M ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf ++ ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pt //Set PSD 128 ptss ++ ODM_StallExecution(3000); ++ ++ ++ //2 [ Doing PSD Function in (CH4)] ++ ++ //Antenna A ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH4)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); ++ ODM_StallExecution(10); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dbg\n")); ++ for (i=0;iPSD_report_Main[tone_idx] ) ++ PSD_report_Main[tone_idx]+=PSD_report_temp; ++ } ++ } ++ //Antenna B ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH4)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); ++ ODM_StallExecution(10); ++ for (i=0;iPSD_report_Aux[tone_idx] ) ++ PSD_report_Aux[tone_idx]+=PSD_report_temp; ++ } ++ } ++ //2 [ Doing PSD Function in (CH8)] ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 ++ ODM_StallExecution(3000); ++ ++ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH8 & 40M ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf ++ ODM_StallExecution(3000); ++ ++ //Antenna A ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH8)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); ++ ODM_StallExecution(10); ++ ++ for (i=0;iPSD_report_Main[tone_idx] ) ++ PSD_report_Main[Tone_lenth_1+tone_idx]+=PSD_report_temp; ++ } ++ } ++ ++ //Antenna B ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH8)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); ++ ODM_StallExecution(10); ++ ++ for (i=0;iPSD_report_Aux[tone_idx] ) ++ PSD_report_Aux[Tone_lenth_1+tone_idx]+=PSD_report_temp; ++ } ++ } ++ ++ //2 [ Calculate Result ] ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nMain PSD Result: (ALL) \n")); ++ for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Main[tone_idx] )); ++ Main_psd_result+= PSD_report_Main[tone_idx]; ++ if(PSD_report_Main[tone_idx]>MAX_PSD_report_Main) ++ MAX_PSD_report_Main=PSD_report_Main[tone_idx]; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Main= (( %d ))\n", Main_psd_result)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Main = (( %d ))\n", MAX_PSD_report_Main)); ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nAux PSD Result: (ALL) \n")); ++ for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Aux[tone_idx] )); ++ Aux_psd_result+= PSD_report_Aux[tone_idx]; ++ if(PSD_report_Aux[tone_idx]>MAX_PSD_report_Aux) ++ MAX_PSD_report_Aux=PSD_report_Aux[tone_idx]; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Aux= (( %d ))\n", Aux_psd_result)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Aux = (( %d ))\n\n", MAX_PSD_report_Aux)); ++ ++ //Main_psd_result=Main_psd_result-MAX_PSD_report_Main; ++ //Aux_psd_result=Aux_psd_result-MAX_PSD_report_Aux; ++ PSD_power_threshold=(Main_psd_result*7)>>3; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Main_result , Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", Main_psd_result, Aux_psd_result,PSD_power_threshold)); ++ ++ //3 [ Dual Antenna ] ++ if(Aux_psd_result >= PSD_power_threshold ) ++ { ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); ++ ++ // set bt coexDM from 1ant coexDM to 2ant coexDM ++ //BT_SetBtCoexAntNum(pAdapter, BT_COEX_ANT_TYPE_DETECTED, 2); ++ ++ // Init antenna diversity ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ ODM_AntDivInit(pDM_Odm); ++ } ++ //3 [ Single Antenna ] ++ else ++ { ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ } ++ ++ //2 [ Recover all parameters ] ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,Channel_ori); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 ++ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, Regc50); ++ ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); //enable whole CCK block ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x0); //Turn on TX // Resume TX Queue ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, Regc14); // [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] ++ ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, Reg908); ++ ++ return; ++ ++} ++ ++#endif ++void ++odm_SwAntDetectInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if(defined(CONFIG_ANT_DETECTION)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ //pDM_SWAT_Table->PreAntenna = MAIN_ANT; ++ //pDM_SWAT_Table->CurAntenna = MAIN_ANT; ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pDM_SWAT_Table->Pre_Aux_FailDetec = FALSE; ++ pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = 0xff; ++#endif ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdect.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdect.h new file mode 100644 -index 000000000..8cf60e8f9 +index 0000000..419d9ea --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdect.h @@ -0,0 +1,98 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMANTDECT_H__ -+#define __PHYDMANTDECT_H__ -+ -+#define ANTDECT_VERSION "2.1" /*2015.07.29 by YuChen*/ -+ -+#if(defined(CONFIG_ANT_DETECTION)) -+//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) -+//ANT Test -+#define ANTTESTALL 0x00 /*Ant A or B will be Testing*/ -+#define ANTTESTA 0x01 /*Ant A will be Testing*/ -+#define ANTTESTB 0x02 /*Ant B will be testing*/ -+ -+#define MAX_ANTENNA_DETECTION_CNT 10 -+ -+ -+typedef struct _ANT_DETECTED_INFO{ -+ BOOLEAN bAntDetected; -+ u4Byte dBForAntA; -+ u4Byte dBForAntB; -+ u4Byte dBForAntO; -+}ANT_DETECTED_INFO, *PANT_DETECTED_INFO; -+ -+ -+typedef enum tag_SW_Antenna_Switch_Definition -+{ -+ Antenna_A = 1, -+ Antenna_B = 2, -+ Antenna_MAX = 3, -+}DM_SWAS_E; -+ -+ -+ -+//1 [1. Single Tone Method] =================================================== -+ -+ -+ -+VOID -+ODM_SingleDualAntennaDefaultSetting( -+ IN PVOID pDM_VOID -+ ); -+ -+BOOLEAN -+ODM_SingleDualAntennaDetection( -+ IN PVOID pDM_VOID, -+ IN u1Byte mode -+ ); -+ -+//1 [2. Scan AP RSSI Method] ================================================== -+ -+#define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink -+ -+BOOLEAN -+ODM_SwAntDivCheckBeforeLink( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+ -+ -+//1 [3. PSD Method] ========================================================== -+ -+ -+VOID -+ODM_SingleDualAntennaDetection_PSD( -+ IN PVOID pDM_VOID -+); -+ -+#endif -+ -+VOID -+odm_SwAntDetectInit( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+#endif -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMANTDECT_H__ ++#define __PHYDMANTDECT_H__ ++ ++#define ANTDECT_VERSION "2.1" /*2015.07.29 by YuChen*/ ++ ++#if(defined(CONFIG_ANT_DETECTION)) ++//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) ++//ANT Test ++#define ANTTESTALL 0x00 /*Ant A or B will be Testing*/ ++#define ANTTESTA 0x01 /*Ant A will be Testing*/ ++#define ANTTESTB 0x02 /*Ant B will be testing*/ ++ ++#define MAX_ANTENNA_DETECTION_CNT 10 ++ ++ ++typedef struct _ANT_DETECTED_INFO{ ++ BOOLEAN bAntDetected; ++ u4Byte dBForAntA; ++ u4Byte dBForAntB; ++ u4Byte dBForAntO; ++}ANT_DETECTED_INFO, *PANT_DETECTED_INFO; ++ ++ ++typedef enum tag_SW_Antenna_Switch_Definition ++{ ++ Antenna_A = 1, ++ Antenna_B = 2, ++ Antenna_MAX = 3, ++}DM_SWAS_E; ++ ++ ++ ++//1 [1. Single Tone Method] =================================================== ++ ++ ++ ++VOID ++ODM_SingleDualAntennaDefaultSetting( ++ IN PVOID pDM_VOID ++ ); ++ ++BOOLEAN ++ODM_SingleDualAntennaDetection( ++ IN PVOID pDM_VOID, ++ IN u1Byte mode ++ ); ++ ++//1 [2. Scan AP RSSI Method] ================================================== ++ ++#define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink ++ ++BOOLEAN ++ODM_SwAntDivCheckBeforeLink( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++ ++ ++//1 [3. PSD Method] ========================================================== ++ ++ ++VOID ++ODM_SingleDualAntennaDetection_PSD( ++ IN PVOID pDM_VOID ++); ++ ++#endif ++ ++VOID ++odm_SwAntDetectInit( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++#endif ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdiv.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdiv.c new file mode 100644 -index 000000000..0dee3fc0f +index 0000000..73f215a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdiv.c @@ -0,0 +1,4754 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+//====================================================== -+// when antenna test utility is on or some testing need to disable antenna diversity -+// call this function to disable all ODM related mechanisms which will switch antenna. -+//====================================================== -+VOID -+ODM_StopAntennaSwitchDm( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ // disable ODM antenna diversity -+ pDM_Odm->SupportAbility &= ~ODM_BB_ANT_DIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("STOP Antenna Diversity \n")); -+} -+ -+VOID -+ODM_SetAntConfig( -+ IN PVOID pDM_VOID, -+ IN u1Byte antSetting // 0=A, 1=B, 2=C, .... -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if(antSetting == 0) // ant A -+ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); -+ else if(antSetting == 1) -+ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); -+ } -+} -+ -+//====================================================== -+ -+ -+VOID -+ODM_SwAntDivRestAfterLink( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ u4Byte i; -+ -+ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { -+ -+ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; -+ pDM_SWAT_Table->RSSI_Trying = 0; -+ pDM_SWAT_Table->Double_chk_flag= 0; -+ -+ pDM_FatTable->RxIdleAnt=MAIN_ANT; -+ -+ for (i=0; iMainAnt_Sum[i] = 0; -+ pDM_FatTable->AuxAnt_Sum[i] = 0; -+ pDM_FatTable->MainAnt_Cnt[i] = 0; -+ pDM_FatTable->AuxAnt_Cnt[i] = 0; -+ } -+ -+ } -+} -+ -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+VOID -+odm_AntDiv_on_off( -+ IN PVOID pDM_VOID , -+ IN u1Byte swch -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ if(pDM_FatTable->AntDiv_OnOff != swch) -+ { -+ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) -+ return; -+ -+ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) N-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); -+ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable -+ ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable -+ } -+ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) AC-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); -+ if (pDM_Odm->SupportICType == ODM_RTL8812) { -+ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable -+ ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable -+ } else { -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, swch); //OFDM AntDiv function block enable -+ -+ if( (pDM_Odm->CutVersion >= ODM_CUT_C) && (pDM_Odm->SupportICType == ODM_RTL8821) && ( pDM_Odm->AntDivType != S0S1_SW_ANTDIV)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) CCK HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); -+ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, swch); -+ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, swch); //CCK AntDiv function block enable -+ } -+ } -+ } -+ } -+ pDM_FatTable->AntDiv_OnOff =swch; -+ -+} -+ -+VOID -+phydm_FastTraining_enable( -+ IN PVOID pDM_VOID, -+ IN u1Byte swch -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte enable; -+ -+ if (swch == FAT_ON) -+ enable=1; -+ else -+ enable=0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fast Ant Training_en = ((%d))\n", enable)); -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8188E) { -+ ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, enable); /*enable fast training*/ -+ /**/ -+ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { -+ ODM_SetBBReg(pDM_Odm, 0xB34 , BIT28, enable); /*enable fast training (path-A)*/ -+ /*ODM_SetBBReg(pDM_Odm, 0xB34 , BIT29, enable);*/ /*enable fast training (path-B)*/ -+ } else if (pDM_Odm->SupportICType == ODM_RTL8821) { -+ ODM_SetBBReg(pDM_Odm, 0x900 , BIT19, enable); /*enable fast training */ -+ /**/ -+ } -+} -+ -+VOID -+odm_Tx_By_TxDesc_or_Reg( -+ IN PVOID pDM_VOID, -+ IN u1Byte swch -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte enable; -+ -+ enable = (swch == TX_BY_DESC) ? 1 : 0; -+ -+ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) -+ { -+ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, enable); -+ } -+ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, enable); -+ } -+ } -+} -+ -+VOID -+ODM_UpdateRxIdleAnt( -+ IN PVOID pDM_VOID, -+ IN u1Byte Ant -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ u4Byte DefaultAnt, OptionalAnt,value32; -+ -+ if(pDM_FatTable->RxIdleAnt != Ant) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ -+ if(!(pDM_Odm->SupportICType & ODM_RTL8723B)) -+ pDM_FatTable->RxIdleAnt = Ant; -+ -+ if(Ant == MAIN_ANT) -+ { -+ DefaultAnt = ANT1_2G; -+ OptionalAnt = ANT2_2G; -+ } -+ else -+ { -+ DefaultAnt = ANT2_2G; -+ OptionalAnt = ANT1_2G; -+ } -+ -+ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) -+ { -+ if(pDM_Odm->SupportICType==ODM_RTL8192E) -+ { -+ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX -+ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT8|BIT7|BIT6, OptionalAnt);//Optional RX -+ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt);//Default TX -+ } -+ #if (RTL8723B_SUPPORT == 1) -+ else if (pDM_Odm->SupportICType == ODM_RTL8723B) { -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0x948, 0xFFF); -+ -+ if(value32 !=0x280) -+ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, Ant, DefaultAnt, OptionalAnt); -+ else { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n")); -+ /**/ -+ } -+ } -+ #endif -+ else { /*8188E & 8188F*/ -+ -+ #if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) { -+ phydm_update_rx_idle_antenna_8188F(pDM_Odm, DefaultAnt); -+ /**/ -+ } -+ #endif -+ -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); /*Default RX*/ -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); /*Optional RX*/ -+ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); /*Default TX*/ -+ } -+ } -+ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) -+ { -+ u2Byte value16 = ODM_Read2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2); -+ // -+ // 2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to prevnt -+ // incorrect 0xc08 bit0-15 .We still not know why it is changed. -+ // -+ value16 &= ~(BIT11|BIT10|BIT9|BIT8|BIT7|BIT6|BIT5|BIT4|BIT3); -+ value16 |= ((u2Byte)DefaultAnt <<3); -+ value16 |= ((u2Byte)OptionalAnt <<6); -+ value16 |= ((u2Byte)DefaultAnt <<9); -+ ODM_Write2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2, value16); -+ /* -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT21|BIT20|BIT19, DefaultAnt); //Default RX -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT24|BIT23|BIT22, OptionalAnt);//Optional RX -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT27|BIT26|BIT25, DefaultAnt); //Default TX -+ */ -+ } -+ -+ if(pDM_Odm->SupportICType==ODM_RTL8188E) -+ { -+ ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT7|BIT6, DefaultAnt); //PathA Resp Tx -+ } -+ else -+ { -+ ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT10|BIT9|BIT8, DefaultAnt); //PathA Resp Tx -+ } -+ -+ } -+ else// pDM_FatTable->RxIdleAnt == Ant -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Stay in Ori-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ pDM_FatTable->RxIdleAnt = Ant; -+ } -+} -+ -+VOID -+odm_UpdateTxAnt( -+ IN PVOID pDM_VOID, -+ IN u1Byte Ant, -+ IN u4Byte MacId -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ u1Byte TxAnt; -+ -+ if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) -+ { -+ TxAnt=Ant; -+ } -+ else -+ { -+ if(Ant == MAIN_ANT) -+ TxAnt = ANT1_2G; -+ else -+ TxAnt = ANT2_2G; -+ } -+ -+ pDM_FatTable->antsel_a[MacId] = TxAnt&BIT0; -+ pDM_FatTable->antsel_b[MacId] = (TxAnt&BIT1)>>1; -+ pDM_FatTable->antsel_c[MacId] = (TxAnt&BIT2)>>2; -+ -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tx from TxInfo]: MacID:(( %d )), TxAnt = (( %s ))\n", MacId,(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=(( 3'b%d%d%d ))\n",pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] )); -+ -+} -+ -+#ifdef BEAMFORMING_SUPPORT -+#if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+VOID -+odm_BDC_Init( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pBDC_T pDM_BdcTable=&pDM_Odm->DM_BdcTable; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n[ BDC Initialization......] \n")); -+ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; -+ pDM_BdcTable->BDC_Mode=BDC_MODE_NULL; -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDCcoexType_wBfer=0; -+ pDM_Odm->bdc_holdstate=0xff; -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ ODM_SetBBReg(pDM_Odm, 0xd7c , 0x0FFFFFFF, 0x1081008); -+ ODM_SetBBReg(pDM_Odm, 0xd80 , 0x0FFFFFFF, 0); -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x9b0 , 0x0FFFFFFF, 0x1081008); //0x9b0[30:0] = 01081008 -+ ODM_SetBBReg(pDM_Odm, 0x9b4 , 0x0FFFFFFF, 0); //0x9b4[31:0] = 00000000 -+ } -+ -+} -+ -+ -+VOID -+odm_CSI_on_off( -+ IN PVOID pDM_VOID, -+ IN u1Byte CSI_en -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if(CSI_en==CSI_ON) -+ { -+ if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ ODM_SetMACReg(pDM_Odm, 0xd84 , BIT11, 1); //0xd84[11]=1 -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ ODM_SetMACReg(pDM_Odm, 0x9b0 , BIT31, 1); //0x9b0[31]=1 -+ } -+ -+ } -+ else if(CSI_en==CSI_OFF) -+ { -+ if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ ODM_SetMACReg(pDM_Odm, 0xd84 , BIT11, 0); //0xd84[11]=0 -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ ODM_SetMACReg(pDM_Odm, 0x9b0 , BIT31, 0); //0x9b0[31]=0 -+ } -+ } -+} -+ -+VOID -+odm_BDCcoexType_withBferClient( -+ IN PVOID pDM_VOID, -+ IN u1Byte swch -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; -+ u1Byte BDCcoexType_wBfer; -+ -+ if(swch==DIVON_CSIOFF) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BDCcoexType: 1] {DIV,CSI} ={1,0} \n")); -+ BDCcoexType_wBfer=1; -+ -+ if(BDCcoexType_wBfer != pDM_BdcTable->BDCcoexType_wBfer) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); -+ odm_CSI_on_off(pDM_Odm,CSI_OFF); -+ pDM_BdcTable->BDCcoexType_wBfer=1; -+ } -+ } -+ else if(swch==DIVOFF_CSION) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BDCcoexType: 2] {DIV,CSI} ={0,1}\n")); -+ BDCcoexType_wBfer=2; -+ -+ if(BDCcoexType_wBfer != pDM_BdcTable->BDCcoexType_wBfer) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ odm_CSI_on_off(pDM_Odm,CSI_ON); -+ pDM_BdcTable->BDCcoexType_wBfer=2; -+ } -+ } -+} -+ -+VOID -+odm_BF_AntDiv_ModeArbitration( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; -+ u1Byte current_BDC_Mode; -+ -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n")); -+ -+ //2 Mode 1 -+ if((pDM_BdcTable->num_Txbfee_Client !=0) && (pDM_BdcTable->num_Txbfer_Client == 0)) -+ { -+ current_BDC_Mode=BDC_MODE_1; -+ -+ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) -+ { -+ pDM_BdcTable->BDC_Mode=BDC_MODE_1; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ pDM_BdcTable->BDC_RxIdleUpdate_counter=1; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode1 ))\n")); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode1 ))\n")); -+ } -+ //2 Mode 2 -+ else if((pDM_BdcTable->num_Txbfee_Client ==0) && (pDM_BdcTable->num_Txbfer_Client != 0)) -+ { -+ current_BDC_Mode=BDC_MODE_2; -+ -+ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) -+ { -+ pDM_BdcTable->BDC_Mode=BDC_MODE_2; -+ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; -+ pDM_BdcTable->BDC_Try_flag=0; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode2 ))\n")); -+ -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode2 ))\n")); -+ } -+ //2 Mode 3 -+ else if((pDM_BdcTable->num_Txbfee_Client !=0) && (pDM_BdcTable->num_Txbfer_Client != 0)) -+ { -+ current_BDC_Mode=BDC_MODE_3; -+ -+ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) -+ { -+ pDM_BdcTable->BDC_Mode=BDC_MODE_3; -+ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDC_RxIdleUpdate_counter=1; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode3 ))\n")); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode3 ))\n")); -+ } -+ //2 Mode 4 -+ else if((pDM_BdcTable->num_Txbfee_Client ==0) && (pDM_BdcTable->num_Txbfer_Client == 0)) -+ { -+ current_BDC_Mode=BDC_MODE_4; -+ -+ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) -+ { -+ pDM_BdcTable->BDC_Mode=BDC_MODE_4; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode4 ))\n")); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode4 ))\n")); -+ } -+ #endif -+ -+} -+ -+VOID -+odm_DivTrainState_setting( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pBDC_T pDM_BdcTable=&pDM_Odm->DM_BdcTable; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n*****[S T A R T ]***** [2-0. DIV_TRAIN_STATE] \n")); -+ pDM_BdcTable->BDC_Try_counter =2; -+ pDM_BdcTable->BDC_Try_flag=1; -+ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+} -+ -+VOID -+odm_BDCcoex_BFeeRxDiv_Arbitration( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; -+ BOOLEAN StopBF_flag; -+ u1Byte BDC_active_Mode; -+ -+ -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{ num_BFee, num_BFer , num_Client} = (( %d , %d , %d)) \n",pDM_BdcTable->num_Txbfee_Client,pDM_BdcTable->num_Txbfer_Client,pDM_BdcTable->num_Client)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{ num_BF_tars, num_DIV_tars } = (( %d , %d )) \n",pDM_BdcTable->num_BfTar , pDM_BdcTable->num_DivTar )); -+ -+ //2 [ MIB control ] -+ if (pDM_Odm->bdc_holdstate==2) -+ { -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); -+ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ BF STATE] \n")); -+ return; -+ } -+ else if (pDM_Odm->bdc_holdstate==1) -+ { -+ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ DIV STATE] \n")); -+ return; -+ } -+ -+ //------------------------------------------------------------ -+ -+ -+ -+ //2 Mode 2 & 3 -+ if(pDM_BdcTable->BDC_Mode==BDC_MODE_2 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) -+ { -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n{ Try_flag , Try_counter } = { %d , %d } \n",pDM_BdcTable->BDC_Try_flag,pDM_BdcTable->BDC_Try_counter)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDCcoexType = (( %d )) \n\n", pDM_BdcTable->BDCcoexType_wBfer)); -+ -+ // All Client have Bfer-Cap------------------------------- -+ if(pDM_BdcTable->num_Txbfer_Client == pDM_BdcTable->num_Client) //BFer STA Only?: yes -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BFer STA only? (( Yes ))\n")); -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); -+ return; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BFer STA only? (( No ))\n")); -+ } -+ // -+ if(pDM_BdcTable->bAll_BFSta_Idle==FALSE && pDM_BdcTable->bAll_DivSta_Idle==TRUE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("All DIV-STA are idle, but BF-STA not\n")); -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); -+ return; -+ } -+ else if(pDM_BdcTable->bAll_BFSta_Idle==TRUE && pDM_BdcTable->bAll_DivSta_Idle==FALSE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("All BF-STA are idle, but DIV-STA not\n")); -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ return; -+ } -+ -+ //Select active mode-------------------------------------- -+ if(pDM_BdcTable->num_BfTar ==0) // Selsect_1, Selsect_2 -+ { -+ if(pDM_BdcTable->num_DivTar ==0) // Selsect_3 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 1 )) \n")); -+ pDM_BdcTable->BDC_active_Mode=1; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 2 ))\n")); -+ pDM_BdcTable->BDC_active_Mode=2; -+ } -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ return; -+ } -+ else // num_BfTar > 0 -+ { -+ if(pDM_BdcTable->num_DivTar ==0) // Selsect_3 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 3 ))\n")); -+ pDM_BdcTable->BDC_active_Mode=3; -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); -+ return; -+ } -+ else // Selsect_4 -+ { -+ BDC_active_Mode=4; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 4 ))\n")); -+ -+ if(BDC_active_Mode!=pDM_BdcTable->BDC_active_Mode) -+ { -+ pDM_BdcTable->BDC_active_Mode=4; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to active mode (( 4 )) & return!!! \n")); -+ return; -+ } -+ } -+ } -+ -+#if 1 -+ if (pDM_Odm->bdc_holdstate==0xff) -+ { -+ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ DIV STATE] \n")); -+ return; -+ } -+#endif -+ -+ // Does Client number changed ? ------------------------------- -+ if(pDM_BdcTable->num_Client !=pDM_BdcTable->pre_num_Client) -+ { -+ pDM_BdcTable->BDC_Try_flag=0; -+ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ The number of client has been changed !!!] return to (( BDC_DIV_TRAIN_STATE )) \n")); -+ } -+ pDM_BdcTable->pre_num_Client=pDM_BdcTable->num_Client; -+ -+ if( pDM_BdcTable->BDC_Try_flag==0) -+ { -+ //2 DIV_TRAIN_STATE (Mode 2-0) -+ if(pDM_BdcTable->BDC_state==BDC_DIV_TRAIN_STATE) -+ { -+ odm_DivTrainState_setting( pDM_Odm); -+ } -+ //2 BFer_TRAIN_STATE (Mode 2-1) -+ else if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-1. BFer_TRAIN_STATE ]***** \n")); -+ -+ //if(pDM_BdcTable->num_BfTar==0) -+ //{ -+ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( No )), [ BDC_BFer_TRAIN_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); -+ // odm_DivTrainState_setting( pDM_Odm); -+ //} -+ //else //num_BfTar != 0 -+ //{ -+ pDM_BdcTable->BDC_Try_counter=2; -+ pDM_BdcTable->BDC_Try_flag=1; -+ pDM_BdcTable->BDC_state=BDC_DECISION_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes )), [ BDC_BFer_TRAIN_STATE ] >> [BDC_DECISION_STATE] \n")); -+ //} -+ } -+ //2 DECISION_STATE (Mode 2-2) -+ else if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-2. DECISION_STATE]***** \n")); -+ //if(pDM_BdcTable->num_BfTar==0) -+ //{ -+ // ODM_AntDiv_Printk(("BF_tars exist? : (( No )), [ DECISION_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); -+ // odm_DivTrainState_setting( pDM_Odm); -+ //} -+ //else //num_BfTar != 0 -+ //{ -+ if(pDM_BdcTable->BF_pass==FALSE || pDM_BdcTable->DIV_pass == FALSE) -+ StopBF_flag=TRUE; -+ else -+ StopBF_flag=FALSE; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes )), {BF_pass, DIV_pass, StopBF_flag } = { %d, %d, %d } \n" ,pDM_BdcTable->BF_pass,pDM_BdcTable->DIV_pass,StopBF_flag)); -+ -+ if(StopBF_flag==TRUE) //DIV_en -+ { -+ pDM_BdcTable->BDC_Hold_counter=10; //20 -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ StopBF_flag= ((TRUE)), BDC_DECISION_STATE ] >> [BDC_DIV_HOLD_STATE] \n")); -+ } -+ else //BF_en -+ { -+ pDM_BdcTable->BDC_Hold_counter=10; //20 -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); -+ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[StopBF_flag= ((FALSE)), BDC_DECISION_STATE ] >> [BDC_BF_HOLD_STATE] \n")); -+ } -+ //} -+ } -+ //2 BF-HOLD_STATE (Mode 2-3) -+ else if(pDM_BdcTable->BDC_state==BDC_BF_HOLD_STATE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-3. BF_HOLD_STATE ]*****\n")); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDC_Hold_counter = (( %d )) \n",pDM_BdcTable->BDC_Hold_counter )); -+ -+ if(pDM_BdcTable->BDC_Hold_counter==1) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); -+ odm_DivTrainState_setting( pDM_Odm); -+ } -+ else -+ { -+ pDM_BdcTable->BDC_Hold_counter--; -+ -+ //if(pDM_BdcTable->num_BfTar==0) -+ //{ -+ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( No )), [ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); -+ // odm_DivTrainState_setting( pDM_Odm); -+ //} -+ //else //num_BfTar != 0 -+ //{ -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes ))\n")); -+ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_BF_HOLD_STATE ] >> [BDC_BF_HOLD_STATE] \n")); -+ //} -+ } -+ -+ } -+ //2 DIV-HOLD_STATE (Mode 2-4) -+ else if(pDM_BdcTable->BDC_state==BDC_DIV_HOLD_STATE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-4. DIV_HOLD_STATE ]*****\n")); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDC_Hold_counter = (( %d )) \n",pDM_BdcTable->BDC_Hold_counter )); -+ -+ if(pDM_BdcTable->BDC_Hold_counter==1) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); -+ odm_DivTrainState_setting( pDM_Odm); -+ } -+ else -+ { -+ pDM_BdcTable->BDC_Hold_counter--; -+ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; -+ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_HOLD_STATE] \n")); -+ } -+ -+ } -+ -+ } -+ else if( pDM_BdcTable->BDC_Try_flag==1) -+ { -+ //2 Set Training Counter -+ if(pDM_BdcTable->BDC_Try_counter >1) -+ { -+ pDM_BdcTable->BDC_Try_counter--; -+ if(pDM_BdcTable->BDC_Try_counter ==1) -+ pDM_BdcTable->BDC_Try_flag=0; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training !!\n")); -+ //return ; -+ } -+ -+ } -+ -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n[end]\n")); -+ -+ #endif //#if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ -+ -+ -+ -+ -+} -+ -+#endif -+#endif //#ifdef BEAMFORMING_SUPPORT -+ -+ -+#if (RTL8188E_SUPPORT == 1) -+ -+ -+VOID -+odm_RX_HWAntDiv_Init_88E( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte value32; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ -+ if(pDM_Odm->mp_mode == TRUE) -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv -+ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); // 1:CG, 0:CS -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); -+ -+ //MAC Setting -+ value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); -+ ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output -+ //Pin Settings -+ ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW -+ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW -+ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 1); //Regb2c[22]=1'b0 //disable CS/CG switch -+ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only -+ //OFDM Settings -+ ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); -+ //CCK Settings -+ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples -+ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0001); //antenna mapping table -+ -+ pDM_FatTable->enable_ctrl_frame_antdiv = 1; -+} -+ -+VOID -+odm_TRX_HWAntDiv_Init_88E( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte value32; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ if(pDM_Odm->mp_mode == TRUE) -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv -+ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); //Default RX (0/1) -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV (SPDT)]\n")); -+ -+ //MAC Setting -+ value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); -+ ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output -+ //Pin Settings -+ ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW -+ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW -+ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch -+ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only -+ //OFDM Settings -+ ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); -+ //CCK Settings -+ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples -+ -+ //antenna mapping table -+ if(!pDM_Odm->bIsMPChip) //testchip -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 -+ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 -+ } -+ else //MPchip -+ ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0201); /*Reg914=3'b010, Reg915=3'b001*/ -+ -+ pDM_FatTable->enable_ctrl_frame_antdiv = 1; -+} -+ -+ -+#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+VOID -+odm_Smart_HWAntDiv_Init_88E( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte value32, i; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); -+ -+ if(pDM_Odm->mp_mode == TRUE) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType)); -+ return; -+ } -+ -+ pDM_FatTable->TrainIdx = 0; -+ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; -+ -+ pDM_Odm->fat_comb_a=5; -+ pDM_Odm->antdiv_intvl = 0x64; // 100ms -+ -+ for(i=0; i<6; i++) -+ { -+ pDM_FatTable->Bssid[i] = 0; -+ } -+ for(i=0; i< (pDM_Odm->fat_comb_a) ; i++) -+ { -+ pDM_FatTable->antSumRSSI[i] = 0; -+ pDM_FatTable->antRSSIcnt[i] = 0; -+ pDM_FatTable->antAveRSSI[i] = 0; -+ } -+ -+ //MAC Setting -+ value32 = ODM_GetMACReg(pDM_Odm, 0x4c, bMaskDWord); -+ ODM_SetMACReg(pDM_Odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output -+ value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); -+ ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); //Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match -+ //value32 = PlatformEFIORead4Byte(Adapter, 0x7B4); -+ //PlatformEFIOWrite4Byte(Adapter, 0x7b4, value32|BIT18); //append MACID in reponse packet -+ -+ //Match MAC ADDR -+ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0); -+ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); -+ -+ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW -+ ODM_SetBBReg(pDM_Odm, 0xb2c , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch -+ ODM_SetBBReg(pDM_Odm, 0xb2c , BIT31, 0); //Regb2c[31]=1'b1 //output at CS only -+ ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0); -+ -+ //antenna mapping table -+ if(pDM_Odm->fat_comb_a == 2) -+ { -+ if(!pDM_Odm->bIsMPChip) //testchip -+ { -+ ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 -+ ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 -+ } -+ else //MPchip -+ { -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 1); -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); -+ } -+ } -+ else -+ { -+ if(!pDM_Odm->bIsMPChip) //testchip -+ { -+ ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); //Reg858[10:8]=3'b000 -+ ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); //Reg858[13:11]=3'b001 -+ ODM_SetBBReg(pDM_Odm, 0x878 , BIT16, 0); -+ ODM_SetBBReg(pDM_Odm, 0x858 , BIT15|BIT14, 2); //(Reg878[0],Reg858[14:15])=3'b010 -+ ODM_SetBBReg(pDM_Odm, 0x878 , BIT19|BIT18|BIT17, 3);//Reg878[3:1]=3b'011 -+ ODM_SetBBReg(pDM_Odm, 0x878 , BIT22|BIT21|BIT20, 4);//Reg878[6:4]=3b'100 -+ ODM_SetBBReg(pDM_Odm, 0x878 , BIT25|BIT24|BIT23, 5);//Reg878[9:7]=3b'101 -+ ODM_SetBBReg(pDM_Odm, 0x878 , BIT28|BIT27|BIT26, 6);//Reg878[12:10]=3b'110 -+ ODM_SetBBReg(pDM_Odm, 0x878 , BIT31|BIT30|BIT29, 7);//Reg878[15:13]=3b'111 -+ } -+ else //MPchip -+ { -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 4); // 0: 3b'000 -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); // 1: 3b'001 -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte2, 0); // 2: 3b'010 -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte3, 1); // 3: 3b'011 -+ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte0, 3); // 4: 3b'100 -+ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte1, 5); // 5: 3b'101 -+ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte2, 6); // 6: 3b'110 -+ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte3, 255); // 7: 3b'111 -+ } -+ } -+ -+ //Default Ant Setting when no fast training -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, 0); //Default RX -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, 1); //Optional RX -+ ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, 0);//Default TX -+ -+ //Enter Traing state -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, (pDM_Odm->fat_comb_a-1)); //Reg864[2:0]=3'd6 //ant combination=reg864[2:0]+1 -+ -+ //SW Control -+ //PHY_SetBBReg(Adapter, 0x864 , BIT10, 1); -+ //PHY_SetBBReg(Adapter, 0x870 , BIT9, 1); -+ //PHY_SetBBReg(Adapter, 0x870 , BIT8, 1); -+ //PHY_SetBBReg(Adapter, 0x864 , BIT11, 1); -+ //PHY_SetBBReg(Adapter, 0x860 , BIT9, 0); -+ //PHY_SetBBReg(Adapter, 0x860 , BIT8, 0); -+} -+#endif -+ -+#endif //#if (RTL8188E_SUPPORT == 1) -+ -+ -+#if (RTL8192E_SUPPORT == 1) -+VOID -+odm_RX_HWAntDiv_Init_92E( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ if(pDM_Odm->mp_mode == TRUE) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] -+ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); -+ -+ //Pin Settings -+ ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0);//Reg870[8]=1'b0, // "antsel" is controled by HWs -+ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 1); //Regc50[8]=1'b1 //" CS/CG switching" is controled by HWs -+ -+ //Mapping table -+ ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table -+ -+ //OFDM Settings -+ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold -+ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias -+ -+ //CCK Settings -+ ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 -+ ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 0); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 -+ ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue -+ ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ //EVM enhance AntDiv method init---------------------------------------------------------------------- -+ pDM_FatTable->EVM_method_enable=0; -+ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; -+ pDM_Odm->antdiv_intvl = 0x64; -+ ODM_SetBBReg(pDM_Odm, 0x910 , 0x3f, 0xf ); -+ pDM_Odm->antdiv_evm_en=1; -+ //pDM_Odm->antdiv_period=1; -+ -+ #endif -+ -+} -+ -+VOID -+odm_TRX_HWAntDiv_Init_92E( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ if(pDM_Odm->mp_mode == TRUE) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] -+ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[ Only for DIR605, CG_TRX_HW_ANTDIV]\n")); -+ -+ //3 --RFE pin setting--------- -+ //[MAC] -+ ODM_SetMACReg(pDM_Odm, 0x38, BIT11, 1); //DBG PAD Driving control (GPIO 8) -+ ODM_SetMACReg(pDM_Odm, 0x4c, BIT23, 0); //path-A , RFE_CTRL_3 -+ ODM_SetMACReg(pDM_Odm, 0x4c, BIT29, 1); //path-A , RFE_CTRL_8 -+ //[BB] -+ ODM_SetBBReg(pDM_Odm, 0x944 , BIT3, 1); //RFE_buffer -+ ODM_SetBBReg(pDM_Odm, 0x944 , BIT8, 1); -+ ODM_SetBBReg(pDM_Odm, 0x940 , BIT7|BIT6, 0x0); // r_rfe_path_sel_ (RFE_CTRL_3) -+ ODM_SetBBReg(pDM_Odm, 0x940 , BIT17|BIT16, 0x0); // r_rfe_path_sel_ (RFE_CTRL_8) -+ ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); //RFE_buffer -+ ODM_SetBBReg(pDM_Odm, 0x92C , BIT3, 0); //rfe_inv (RFE_CTRL_3) -+ ODM_SetBBReg(pDM_Odm, 0x92C , BIT8, 1); //rfe_inv (RFE_CTRL_8) -+ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF000, 0x8); //path-A , RFE_CTRL_3 -+ ODM_SetBBReg(pDM_Odm, 0x934 , 0xF, 0x8); //path-A , RFE_CTRL_8 -+ //3 ------------------------- -+ -+ //Pin Settings -+ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT8, 0); //path-A //disable CS/CG switch -+ -+/* Let it follows PHY_REG for bit9 setting -+ if(pDM_Odm->priv->pshare->rf_ft_var.use_ext_pa || pDM_Odm->priv->pshare->rf_ft_var.use_ext_lna) -+ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT9, 1);//path-A //output at CS -+ else -+ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT9, 0); //path-A //output at CG ->normal power -+*/ -+ -+ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); //path-A //antsel antselb by HW -+ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT10, 0); //path-A //antsel2 by HW -+ -+ //Mapping table -+ ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table -+ -+ //OFDM Settings -+ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold -+ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias -+ -+ //CCK Settings -+ ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 -+ ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 0); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 -+ ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue -+ ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples -+ -+ //Timming issue -+ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ //EVM enhance AntDiv method init---------------------------------------------------------------------- -+ pDM_FatTable->EVM_method_enable=0; -+ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; -+ pDM_Odm->antdiv_intvl = 0x64; -+ ODM_SetBBReg(pDM_Odm, 0x910 , 0x3f, 0xf ); -+ pDM_Odm->antdiv_evm_en=1; -+ //pDM_Odm->antdiv_period=1; -+ #endif -+} -+ -+#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+VOID -+odm_Smart_HWAntDiv_Init_92E( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); -+} -+#endif -+ -+#endif //#if (RTL8192E_SUPPORT == 1) -+ -+ -+#if (RTL8723B_SUPPORT == 1) -+VOID -+odm_TRX_HWAntDiv_Init_8723B( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV(DPDT)]\n")); -+ -+ //Mapping Table -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); -+ -+ //OFDM HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF, 0xa0); //thershold -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF000, 0x00); //bias -+ -+ //CCK HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M -+ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples -+ -+ //BT Coexistence -+ ODM_SetBBReg(pDM_Odm, 0x864, BIT12, 0); //keep antsel_map when GNT_BT = 1 -+ ODM_SetBBReg(pDM_Odm, 0x874 , BIT23, 0); //Disable hw antsw & fast_train.antsw when GNT_BT=1 -+ -+ //Output Pin Settings -+ ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0); // -+ -+ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0); //WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL) -+ ODM_SetBBReg(pDM_Odm, 0x948 , BIT7, 0); -+ -+ ODM_SetMACReg(pDM_Odm, 0x40 , BIT3, 1); -+ ODM_SetMACReg(pDM_Odm, 0x38 , BIT11, 1); -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24|BIT23, 2); //select DPDT_P and DPDT_N as output pin -+ -+ ODM_SetBBReg(pDM_Odm, 0x944 , BIT0|BIT1, 3); //in/out -+ ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); // -+ -+ ODM_SetBBReg(pDM_Odm, 0x92C , BIT1, 0); //DPDT_P non-inverse -+ ODM_SetBBReg(pDM_Odm, 0x92C , BIT0, 1); //DPDT_N inverse -+ -+ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] -+ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] -+ -+ //Timming issue -+ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) -+ -+ //2 [--For HW Bug Setting] -+ if(pDM_Odm->AntType == ODM_AUTO_ANT) -+ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable -+ -+} -+ -+ -+ -+VOID -+odm_S0S1_SWAntDiv_Init_8723B( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv] \n")); -+ -+ //Mapping Table -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); -+ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); -+ -+ //Output Pin Settings -+ //ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); -+ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); -+ -+ pDM_FatTable->bBecomeLinked =FALSE; -+ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; -+ pDM_SWAT_Table->Double_chk_flag = 0; -+ -+ //Timming issue -+ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) -+ -+ //2 [--For HW Bug Setting] -+ ODM_SetBBReg(pDM_Odm, 0x80C , BIT21, 0); //TX Ant by Reg -+ -+} -+ -+VOID -+ODM_UpdateRxIdleAnt_8723B( -+ IN PVOID pDM_VOID, -+ IN u1Byte Ant, -+ IN u4Byte DefaultAnt, -+ IN u4Byte OptionalAnt -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u1Byte count=0; -+ u1Byte u1Temp; -+ u1Byte H2C_Parameter; -+ -+ if(!pDM_Odm->bLinked) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to no link\n")); -+ return; -+ } -+ -+#if 0 -+ // Send H2C command to FW -+ // Enable wifi calibration -+ H2C_Parameter = TRUE; -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); -+ -+ // Check if H2C command sucess or not (0x1e6) -+ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); -+ while((u1Temp != 0x1) && (count < 100)) -+ { -+ ODM_delay_us(10); -+ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); -+ count++; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: H2C command status = %d, count = %d\n", u1Temp, count)); -+ -+ if(u1Temp == 0x1) -+ { -+ // Check if BT is doing IQK (0x1e7) -+ count = 0; -+ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); -+ while((!(u1Temp & BIT0)) && (count < 100)) -+ { -+ ODM_delay_us(50); -+ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); -+ count++; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: BT IQK status = %d, count = %d\n", u1Temp, count)); -+ -+ if(u1Temp & BIT0) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); -+ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9, DefaultAnt); -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX -+ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); //Default TX -+ pDM_FatTable->RxIdleAnt = Ant; -+ -+ // Set TX AGC by S0/S1 -+ // Need to consider Linux driver -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pAdapter->HalFunc.SetTxPowerLevelHandler(pAdapter, pHalData->CurrentChannel); -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ rtw_hal_set_tx_power_level(pAdapter, pHalData->CurrentChannel); -+#endif -+ -+ // Set IQC by S0/S1 -+ ODM_SetIQCbyRFpath(pDM_Odm,DefaultAnt); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Sucess to set RX antenna\n")); -+ } -+ else -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to BT IQK\n")); -+ } -+ else -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to H2C command fail\n")); -+ -+ // Send H2C command to FW -+ // Disable wifi calibration -+ H2C_Parameter = FALSE; -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); -+#else -+ -+ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); -+ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9, DefaultAnt); -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); /*Default RX*/ -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); /*Optional RX*/ -+ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); /*Default TX*/ -+ pDM_FatTable->RxIdleAnt = Ant; -+ -+ /* Set TX AGC by S0/S1 */ -+ /* Need to consider Linux driver */ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pAdapter->HalFunc.SetTxPowerLevelHandler(pAdapter, pHalData->CurrentChannel); -+ #elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ rtw_hal_set_tx_power_level(pAdapter, pHalData->CurrentChannel); -+ #endif -+ -+ /* Set IQC by S0/S1 */ -+ ODM_SetIQCbyRFpath(pDM_Odm, DefaultAnt); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Success to set RX antenna\n")); -+ -+#endif -+} -+ -+BOOLEAN -+phydm_IsBtEnable_8723b( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte bt_state; -+ /*u4Byte reg75;*/ -+ -+ /*reg75 = ODM_GetBBReg(pDM_Odm, 0x74 , BIT8);*/ -+ /*ODM_SetBBReg(pDM_Odm, 0x74 , BIT8, 0x0);*/ -+ ODM_SetBBReg(pDM_Odm, 0xa0 , BIT24|BIT25|BIT26, 0x5); -+ bt_state = ODM_GetBBReg(pDM_Odm, 0xa0 , (BIT3|BIT2|BIT1|BIT0)); -+ /*ODM_SetBBReg(pDM_Odm, 0x74 , BIT8, reg75);*/ -+ -+ if ((bt_state == 4) || (bt_state == 7) || (bt_state == 9) || (bt_state == 13)) -+ return TRUE; -+ else -+ return FALSE; -+} -+#endif //#if (RTL8723B_SUPPORT == 1) -+ -+#if (RTL8821A_SUPPORT == 1) -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+VOID -+phydm_hl_smart_ant_type1_init_8821a( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ u4Byte value32; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A SmartAnt_Init => AntDivType=[Hong-Lin Smart Ant Type1]\n")); -+ -+ /*---------------------------------------- -+ GPIO 2-3 for Beam control -+ reg0x66[2]=0 -+ reg0x44[27:26] = 0 -+ reg0x44[23:16] //enable_output for P_GPIO[7:0] -+ reg0x44[15:8] //output_value for P_GPIO[7:0] -+ reg0x40[1:0] = 0 //GPIO function -+ ------------------------------------------*/ -+ -+ /*GPIO Setting*/ -+ ODM_SetMACReg(pDM_Odm, 0x64 , BIT18, 0); -+ ODM_SetMACReg(pDM_Odm, 0x44 , BIT27|BIT26, 0); -+ ODM_SetMACReg(pDM_Odm, 0x44 , BIT19|BIT18, 0x3); /*enable_output for P_GPIO[3:2]*/ -+ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT11|BIT10, 0);*/ /*output value*/ -+ ODM_SetMACReg(pDM_Odm, 0x40 , BIT1|BIT0, 0); /*GPIO function*/ -+ -+ /*Hong_lin smart antenna HW Setting*/ -+ pdm_sat_table->data_codeword_bit_num = 24;/*max=32*/ -+ pdm_sat_table->beam_patten_num_each_ant = 4; -+ -+ #if DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ pdm_sat_table->latch_time = 100; /*mu sec*/ -+ #elif DEV_BUS_TYPE == RT_USB_INTERFACE -+ pdm_sat_table->latch_time = 100; /*mu sec*/ -+ #endif -+ pdm_sat_table->pkt_skip_statistic_en = 0; -+ -+ pdm_sat_table->ant_num = 2;/*max=8*/ -+ -+ pdm_sat_table->fix_beam_pattern_en = 0; -+ pdm_sat_table->decision_holding_period = 0; -+ -+ /*beam training setting*/ -+ pdm_sat_table->pkt_counter = 0; -+ pdm_sat_table->per_beam_training_pkt_num = 10; -+ -+ /*set default beam*/ -+ pdm_sat_table->fast_training_beam_num = 0; -+ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; -+ phydm_set_all_ant_same_beam_num(pDM_Odm); -+ -+ pDM_FatTable->FAT_State = FAT_BEFORE_LINK_STATE; -+ -+ /*[BB] FAT Setting*/ -+ ODM_SetBBReg(pDM_Odm, 0xc08 , BIT18|BIT17|BIT16, pdm_sat_table->ant_num); -+ ODM_SetBBReg(pDM_Odm, 0xc08 , BIT31, 0); /*increase ant num every FAT period 0:+1, 1+2*/ -+ ODM_SetBBReg(pDM_Odm, 0x8c4 , BIT2|BIT1, 1); /*change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/ -+ ODM_SetBBReg(pDM_Odm, 0x8c4 , BIT0, 1); /*FAT_watchdog_en*/ -+ -+ value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); -+ ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /*Reg7B4[16]=1 enable antenna training */ -+ /*Reg7B4[17]=1 enable match MAC Addr*/ -+ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0);/*Match MAC ADDR*/ -+ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); -+ -+} -+#endif -+ -+VOID -+odm_TRX_HWAntDiv_Init_8821A( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (DPDT)] \n")); -+ -+ //Output Pin Settings -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); -+ -+ ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control -+ ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control -+ -+ ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); -+ ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); -+ -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse -+ -+ //Mapping Table -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); -+ -+ //OFDM HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias -+ -+ //CCK HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M -+ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples -+ -+ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit -+ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable -+ -+ //BT Coexistence -+ ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 -+ ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 -+ -+ //Timming issue -+ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) -+ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns -+ -+ //response TX ant by RX ant -+ ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); -+ -+} -+ -+VOID -+odm_S0S1_SWAntDiv_Init_8821A( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv]\n")); -+ -+ //Output Pin Settings -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); -+ -+ ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control -+ ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control -+ -+ ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); -+ ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); -+ -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse -+ -+ //Mapping Table -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); -+ -+ //OFDM HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias -+ -+ //CCK HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M -+ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples -+ -+ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit -+ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable -+ -+ //BT Coexistence -+ ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 -+ ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 -+ -+ //Timming issue -+ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) -+ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns -+ -+ //response TX ant by RX ant -+ ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); -+ -+ -+ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); -+ -+ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; -+ pDM_SWAT_Table->Double_chk_flag = 0; -+ pDM_SWAT_Table->CurAntenna = MAIN_ANT; -+ pDM_SWAT_Table->PreAntenna = MAIN_ANT; -+ pDM_SWAT_Table->SWAS_NoLink_State = 0; -+ -+} -+#endif //#if (RTL8821A_SUPPORT == 1) -+ -+#if (RTL8881A_SUPPORT == 1) -+VOID -+odm_RX_HWAntDiv_Init_8881A( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CGCS_RX_HW_ANTDIV] \n")); -+ -+} -+ -+VOID -+odm_TRX_HWAntDiv_Init_8881A( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); -+ -+ //Output Pin Settings -+ // [SPDT related] -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); -+ ODM_SetMACReg(pDM_Odm, 0x4C , BIT26, 0); -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT22, 0); -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT24, 1); -+ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF00, 8); // DPDT_P = ANTSEL[0] -+ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000, 8); // DPDT_N = ANTSEL[0] -+ -+ //Mapping Table -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); -+ -+ //OFDM HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias -+ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns -+ -+ //CCK HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M -+ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples -+ -+ //Timming issue -+ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) -+ -+ //2 [--For HW Bug Setting] -+ -+ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug -+} -+ -+#endif //#if (RTL8881A_SUPPORT == 1) -+ -+ -+#if (RTL8812A_SUPPORT == 1) -+VOID -+odm_TRX_HWAntDiv_Init_8812A( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8812A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); -+ -+ //3 //3 --RFE pin setting--------- -+ //[BB] -+ ODM_SetBBReg(pDM_Odm, 0x900 , BIT10|BIT9|BIT8, 0x0); //disable SW switch -+ ODM_SetBBReg(pDM_Odm, 0x900 , BIT17|BIT16, 0x0); -+ ODM_SetBBReg(pDM_Odm, 0x974 , BIT7|BIT6, 0x3); // in/out -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT26, 0); -+ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT27, 1); -+ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF000000, 8); // DPDT_P = ANTSEL[0] -+ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000000, 8); // DPDT_N = ANTSEL[0] -+ //3 ------------------------- -+ -+ //Mapping Table -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); -+ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); -+ -+ //OFDM HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold -+ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias -+ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns -+ -+ //CCK HW AntDiv Parameters -+ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M -+ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples -+ -+ //Timming issue -+ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) -+ -+ //2 [--For HW Bug Setting] -+ -+ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug -+ -+} -+ -+#endif //#if (RTL8812A_SUPPORT == 1) -+ -+#if (RTL8188F_SUPPORT == 1) -+VOID -+odm_S0S1_SWAntDiv_Init_8188F( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188F AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv]\n")); -+ -+ -+ /*GPIO Setting*/ -+ /*ODM_SetMACReg(pDM_Odm, 0x64 , BIT18, 0); */ -+ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT28|BIT27, 0);*/ -+ ODM_SetMACReg(pDM_Odm, 0x44 , BIT20|BIT19, 0x3); /*enable_output for P_GPIO[4:3]*/ -+ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT12|BIT11, 0);*/ /*output value*/ -+ /*ODM_SetMACReg(pDM_Odm, 0x40 , BIT1|BIT0, 0);*/ /*GPIO function*/ -+ -+ pDM_FatTable->bBecomeLinked = FALSE; -+ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; -+ pDM_SWAT_Table->Double_chk_flag = 0; -+} -+ -+VOID -+phydm_update_rx_idle_antenna_8188F( -+ IN PVOID pDM_VOID, -+ IN u4Byte default_ant -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte codeword; -+ -+ if (default_ant == ANT1_2G) -+ codeword = 1; /*2'b01*/ -+ else -+ codeword = 2;/*2'b10*/ -+ -+ ODM_SetMACReg(pDM_Odm, 0x44 , (BIT12|BIT11), codeword); /*GPIO[4:3] output value*/ -+} -+ -+#endif -+ -+ -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ -+VOID -+odm_EVM_FastAnt_Reset( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ pDM_FatTable->EVM_method_enable=0; -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); -+ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; -+ pDM_Odm->antdiv_period=0; -+ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 0); -+} -+ -+ -+VOID -+odm_EVM_Enhance_AntDiv( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte Main_RSSI, Aux_RSSI ; -+ u4Byte Main_CRC_utility=0,Aux_CRC_utility=0,utility_ratio=1; -+ u4Byte Main_EVM, Aux_EVM,Diff_RSSI=0,diff_EVM=0; -+ u1Byte score_EVM=0,score_CRC=0; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ u4Byte value32, i; -+ BOOLEAN Main_above1=FALSE,Aux_above1=FALSE; -+ BOOLEAN Force_antenna=FALSE; -+ PSTA_INFO_T pEntry; -+ pDM_FatTable->TargetAnt_enhance=0xFF; -+ -+ -+ if((pDM_Odm->SupportICType & ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC)) -+ { -+ if(pDM_Odm->bOneEntryOnly) -+ { -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[One Client only] \n")); -+ i = pDM_Odm->OneEntry_MACID; -+ -+ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; -+ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; -+ -+ if((Main_RSSI==0 && Aux_RSSI !=0 && Aux_RSSI>=FORCE_RSSI_DIFF) || (Main_RSSI!=0 && Aux_RSSI==0 && Main_RSSI>=FORCE_RSSI_DIFF)) -+ { -+ Diff_RSSI=FORCE_RSSI_DIFF; -+ } -+ else if(Main_RSSI!=0 && Aux_RSSI !=0) -+ { -+ Diff_RSSI = (Main_RSSI>=Aux_RSSI)?(Main_RSSI-Aux_RSSI):(Aux_RSSI-Main_RSSI); -+ } -+ -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n" , pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI)); -+ -+ if( ((Main_RSSI>=Evm_RSSI_TH_High||Aux_RSSI>=Evm_RSSI_TH_High )|| (pDM_FatTable->EVM_method_enable==1) ) -+ //&& (Diff_RSSI <= FORCE_RSSI_DIFF + 1) -+ ) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_H || EVM_method_enable==1] && ")); -+ -+ if(((Main_RSSI>=Evm_RSSI_TH_Low)||(Aux_RSSI>=Evm_RSSI_TH_Low) )) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_L ] \n")); -+ -+ //2 [ Normal state Main] -+ if(pDM_FatTable->FAT_State == NORMAL_STATE_MIAN) -+ { -+ -+ pDM_FatTable->EVM_method_enable=1; -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ pDM_Odm->antdiv_period=3; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: MIAN] \n")); -+ pDM_FatTable->MainAntEVM_Sum[i] = 0; -+ pDM_FatTable->AuxAntEVM_Sum[i] = 0; -+ pDM_FatTable->MainAntEVM_Cnt[i] = 0; -+ pDM_FatTable->AuxAntEVM_Cnt[i] = 0; -+ -+ pDM_FatTable->FAT_State = NORMAL_STATE_AUX; -+ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 1); //Accept CRC32 Error packets. -+ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); -+ -+ pDM_FatTable->CRC32_Ok_Cnt=0; -+ pDM_FatTable->CRC32_Fail_Cnt=0; -+ ODM_SetTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //m -+ } -+ //2 [ Normal state Aux ] -+ else if(pDM_FatTable->FAT_State == NORMAL_STATE_AUX) -+ { -+ pDM_FatTable->MainCRC32_Ok_Cnt=pDM_FatTable->CRC32_Ok_Cnt; -+ pDM_FatTable->MainCRC32_Fail_Cnt=pDM_FatTable->CRC32_Fail_Cnt; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: AUX] \n")); -+ pDM_FatTable->FAT_State = TRAINING_STATE; -+ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); -+ -+ pDM_FatTable->CRC32_Ok_Cnt=0; -+ pDM_FatTable->CRC32_Fail_Cnt=0; -+ ODM_SetTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //ms -+ } -+ else if(pDM_FatTable->FAT_State == TRAINING_STATE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Training state ] \n")); -+ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; -+ -+ //3 [CRC32 statistic] -+ pDM_FatTable->AuxCRC32_Ok_Cnt=pDM_FatTable->CRC32_Ok_Cnt; -+ pDM_FatTable->AuxCRC32_Fail_Cnt=pDM_FatTable->CRC32_Fail_Cnt; -+ -+ if( (pDM_FatTable->MainCRC32_Ok_Cnt >= ((pDM_FatTable->AuxCRC32_Ok_Cnt)<<1)) || (Diff_RSSI>=18)) -+ { -+ pDM_FatTable->TargetAnt_CRC32=MAIN_ANT; -+ Force_antenna=TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Main \n")); -+ } -+ else if((pDM_FatTable->AuxCRC32_Ok_Cnt >= ((pDM_FatTable->MainCRC32_Ok_Cnt)<<1)) || (Diff_RSSI>=18)) -+ { -+ pDM_FatTable->TargetAnt_CRC32=AUX_ANT; -+ Force_antenna=TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Aux \n")); -+ } -+ else -+ { -+ if(pDM_FatTable->MainCRC32_Fail_Cnt<=5) -+ pDM_FatTable->MainCRC32_Fail_Cnt=5; -+ -+ if(pDM_FatTable->AuxCRC32_Fail_Cnt<=5) -+ pDM_FatTable->AuxCRC32_Fail_Cnt=5; -+ -+ if(pDM_FatTable->MainCRC32_Ok_Cnt >pDM_FatTable->MainCRC32_Fail_Cnt ) -+ Main_above1=TRUE; -+ -+ if(pDM_FatTable->AuxCRC32_Ok_Cnt >pDM_FatTable->AuxCRC32_Fail_Cnt ) -+ Aux_above1=TRUE; -+ -+ if(Main_above1==TRUE && Aux_above1==FALSE) -+ { -+ Force_antenna=TRUE; -+ pDM_FatTable->TargetAnt_CRC32=MAIN_ANT; -+ } -+ else if(Main_above1==FALSE && Aux_above1==TRUE) -+ { -+ Force_antenna=TRUE; -+ pDM_FatTable->TargetAnt_CRC32=AUX_ANT; -+ } -+ else if(Main_above1==TRUE && Aux_above1==TRUE) -+ { -+ Main_CRC_utility=((pDM_FatTable->MainCRC32_Ok_Cnt)<<7)/pDM_FatTable->MainCRC32_Fail_Cnt; -+ Aux_CRC_utility=((pDM_FatTable->AuxCRC32_Ok_Cnt)<<7)/pDM_FatTable->AuxCRC32_Fail_Cnt; -+ pDM_FatTable->TargetAnt_CRC32 = (Main_CRC_utility==Aux_CRC_utility)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_CRC_utility>=Aux_CRC_utility)?MAIN_ANT:AUX_ANT); -+ -+ if(Main_CRC_utility!=0 && Aux_CRC_utility!=0) -+ { -+ if(Main_CRC_utility>=Aux_CRC_utility) -+ utility_ratio=(Main_CRC_utility<<1)/Aux_CRC_utility; -+ else -+ utility_ratio=(Aux_CRC_utility<<1)/Main_CRC_utility; -+ } -+ } -+ else if(Main_above1==FALSE && Aux_above1==FALSE) -+ { -+ if(pDM_FatTable->MainCRC32_Ok_Cnt==0) -+ pDM_FatTable->MainCRC32_Ok_Cnt=1; -+ if(pDM_FatTable->AuxCRC32_Ok_Cnt==0) -+ pDM_FatTable->AuxCRC32_Ok_Cnt=1; -+ -+ Main_CRC_utility=((pDM_FatTable->MainCRC32_Fail_Cnt)<<7)/pDM_FatTable->MainCRC32_Ok_Cnt; -+ Aux_CRC_utility=((pDM_FatTable->AuxCRC32_Fail_Cnt)<<7)/pDM_FatTable->AuxCRC32_Ok_Cnt; -+ pDM_FatTable->TargetAnt_CRC32 = (Main_CRC_utility==Aux_CRC_utility)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_CRC_utility<=Aux_CRC_utility)?MAIN_ANT:AUX_ANT); -+ -+ if(Main_CRC_utility!=0 && Aux_CRC_utility!=0) -+ { -+ if(Main_CRC_utility>=Aux_CRC_utility) -+ utility_ratio=(Main_CRC_utility<<1)/(Aux_CRC_utility); -+ else -+ utility_ratio=(Aux_CRC_utility<<1)/(Main_CRC_utility); -+ } -+ } -+ } -+ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 0);//NOT Accept CRC32 Error packets. -+ -+ //3 [EVM statistic] -+ Main_EVM = (pDM_FatTable->MainAntEVM_Cnt[i]!=0)?(pDM_FatTable->MainAntEVM_Sum[i]/pDM_FatTable->MainAntEVM_Cnt[i]):0; -+ Aux_EVM = (pDM_FatTable->AuxAntEVM_Cnt[i]!=0)?(pDM_FatTable->AuxAntEVM_Sum[i]/pDM_FatTable->AuxAntEVM_Cnt[i]):0; -+ pDM_FatTable->TargetAnt_EVM = (Main_EVM==Aux_EVM)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_EVM>=Aux_EVM)?MAIN_ANT:AUX_ANT); -+ -+ if((Main_EVM==0 || Aux_EVM==0)) -+ diff_EVM=0; -+ else if(Main_EVM>=Aux_EVM) -+ diff_EVM=Main_EVM-Aux_EVM; -+ else -+ diff_EVM=Aux_EVM-Main_EVM; -+ -+ //2 [ Decision state ] -+ if(pDM_FatTable->TargetAnt_EVM ==pDM_FatTable->TargetAnt_CRC32 ) -+ { -+ if( (utility_ratio<2 && Force_antenna==FALSE) && diff_EVM<=2) -+ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->pre_TargetAnt_enhance; -+ else -+ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; -+ } -+ else if(diff_EVM<=2 && (utility_ratio > 4 && Force_antenna==FALSE)) -+ { -+ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; -+ } -+ else if(diff_EVM>=20) // -+ { -+ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; -+ } -+ else if(utility_ratio>=6 && Force_antenna==FALSE) // utility_ratio>3 -+ { -+ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; -+ } -+ else -+ { -+ if(Force_antenna==TRUE) -+ score_CRC=3; -+ else if(utility_ratio>=4) //>2 -+ score_CRC=2; -+ else if(utility_ratio>=3) //>1.5 -+ score_CRC=1; -+ else -+ score_CRC=0; -+ -+ if(diff_EVM>=10) -+ score_EVM=2; -+ else if(diff_EVM>=5) -+ score_EVM=1; -+ else -+ score_EVM=0; -+ -+ if(score_CRC>score_EVM) -+ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; -+ else if(score_CRCTargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; -+ else -+ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->pre_TargetAnt_enhance; -+ } -+ pDM_FatTable->pre_TargetAnt_enhance=pDM_FatTable->TargetAnt_enhance; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MainEVM_Cnt = (( %d )) , Main_EVM= (( %d )) \n",i, pDM_FatTable->MainAntEVM_Cnt[i], Main_EVM)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : AuxEVM_Cnt = (( %d )) , Aux_EVM = (( %d )) \n" ,i, pDM_FatTable->AuxAntEVM_Cnt[i] , Aux_EVM)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** TargetAnt_EVM = (( %s ))\n", ( pDM_FatTable->TargetAnt_EVM ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("M_CRC_Ok = (( %d )) , M_CRC_Fail = (( %d )), Main_CRC_utility = (( %d )) \n" , pDM_FatTable->MainCRC32_Ok_Cnt, pDM_FatTable->MainCRC32_Fail_Cnt,Main_CRC_utility)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("A_CRC_Ok = (( %d )) , A_CRC_Fail = (( %d )), Aux_CRC_utility = (( %d )) \n" , pDM_FatTable->AuxCRC32_Ok_Cnt, pDM_FatTable->AuxCRC32_Fail_Cnt,Aux_CRC_utility)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** TargetAnt_CRC32 = (( %s ))\n", ( pDM_FatTable->TargetAnt_CRC32 ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("****** TargetAnt_enhance = (( %s ))******\n", ( pDM_FatTable->TargetAnt_enhance ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ -+ -+ } -+ } -+ else // RSSI< = Evm_RSSI_TH_Low -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ TH_L ] \n")); -+ odm_EVM_FastAnt_Reset(pDM_Odm); -+ } -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[escape from> TH_H || EVM_method_enable==1] \n")); -+ odm_EVM_FastAnt_Reset(pDM_Odm); -+ } -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[multi-Client] \n")); -+ odm_EVM_FastAnt_Reset(pDM_Odm); -+ } -+ } -+} -+ -+VOID -+odm_EVM_FastAntTrainingCallback( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_EVM_FastAntTrainingCallback****** \n")); -+ odm_HW_AntDiv(pDM_Odm); -+} -+#endif -+ -+VOID -+odm_HW_AntDiv( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte i,MinMaxRSSI=0xFF, AntDivMaxRSSI=0, MaxRSSI=0, LocalMaxRSSI; -+ u4Byte Main_RSSI, Aux_RSSI; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ u1Byte RxIdleAnt = pDM_FatTable->RxIdleAnt, TargetAnt = 7; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ PSTA_INFO_T pEntry; -+ -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; -+ u4Byte TH1=500000; -+ u4Byte TH2=10000000; -+ u4Byte MA_rx_Temp, degrade_TP_temp, improve_TP_temp; -+ u1Byte Monitor_RSSI_threshold=30; -+ -+ pDM_BdcTable->BF_pass=TRUE; -+ pDM_BdcTable->DIV_pass=TRUE; -+ pDM_BdcTable->bAll_DivSta_Idle=TRUE; -+ pDM_BdcTable->bAll_BFSta_Idle=TRUE; -+ pDM_BdcTable->num_BfTar=0 ; -+ pDM_BdcTable->num_DivTar=0; -+ pDM_BdcTable->num_Client=0; -+ #endif -+ #endif -+ -+ if(!pDM_Odm->bLinked) //bLinked==False -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); -+ -+ if(pDM_FatTable->bBecomeLinked == TRUE) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); -+ pDM_Odm->antdiv_period=0; -+ -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ return; -+ } -+ else -+ { -+ if(pDM_FatTable->bBecomeLinked ==FALSE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); -+ -+ //if(pDM_Odm->SupportICType == ODM_RTL8821 ) -+ //ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable -+ -+ //#if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ //else if(pDM_Odm->SupportICType == ODM_RTL8881A) -+ // ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable -+ //#endif -+ -+ //else if(pDM_Odm->SupportICType == ODM_RTL8723B ||pDM_Odm->SupportICType == ODM_RTL8812) -+ //ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function disable -+ -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ -+ if(pDM_Odm->SupportICType==ODM_RTL8723B && pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] // for 8723B AntDiv function patch. BB Dino 130412 -+ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] -+ } -+ -+ //2 BDC Init -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ odm_BDC_Init(pDM_Odm); -+ #endif -+ #endif -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ odm_EVM_FastAnt_Reset(pDM_Odm); -+ #endif -+ } -+ } -+ -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n AntDiv Start =>\n")); -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ if(pDM_Odm->antdiv_evm_en==1) -+ { -+ odm_EVM_Enhance_AntDiv(pDM_Odm); -+ if(pDM_FatTable->FAT_State !=NORMAL_STATE_MIAN) -+ return; -+ } -+ else -+ { -+ odm_EVM_FastAnt_Reset(pDM_Odm); -+ } -+ #endif -+ -+ //2 BDC Mode Arbitration -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if(pDM_Odm->antdiv_evm_en == 0 ||pDM_FatTable->EVM_method_enable==0) -+ { -+ odm_BF_AntDiv_ModeArbitration(pDM_Odm); -+ } -+ #endif -+ #endif -+ -+ for (i=0; ipODM_StaInfo[i]; -+ if(IS_STA_VALID(pEntry)) -+ { -+ //2 Caculate RSSI per Antenna -+ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; -+ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; -+ TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_FatTable->RxIdleAnt:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); -+ -+ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** SupportICType=[%d] \n",pDM_Odm->SupportICType)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n",i, pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n" ,i, pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI)); -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** Phy_AntSel_A=[ %d, %d, %d] \n",((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT2)>>2, -+ // ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT1) >>1, ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT0))); -+ -+ LocalMaxRSSI = (Main_RSSI>Aux_RSSI)?Main_RSSI:Aux_RSSI; -+ //2 Select MaxRSSI for DIG -+ if((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) -+ AntDivMaxRSSI = LocalMaxRSSI; -+ if(LocalMaxRSSI > MaxRSSI) -+ MaxRSSI = LocalMaxRSSI; -+ -+ //2 Select RX Idle Antenna -+ if ( (LocalMaxRSSI != 0) && (LocalMaxRSSI < MinMaxRSSI) ) -+ { -+ RxIdleAnt = TargetAnt; -+ MinMaxRSSI = LocalMaxRSSI; -+ } -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ if(pDM_Odm->antdiv_evm_en==1) -+ { -+ if(pDM_FatTable->TargetAnt_enhance!=0xFF) -+ { -+ TargetAnt=pDM_FatTable->TargetAnt_enhance; -+ RxIdleAnt = pDM_FatTable->TargetAnt_enhance; -+ } -+ } -+ #endif -+ -+ //2 Select TX Antenna -+ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) -+ { -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if(pDM_BdcTable->w_BFee_Client[i]==0) -+ #endif -+ #endif -+ { -+ odm_UpdateTxAnt(pDM_Odm, TargetAnt, i); -+ } -+ } -+ -+ //------------------------------------------------------------ -+ -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ pDM_BdcTable->num_Client++; -+ -+ if(pDM_BdcTable->BDC_Mode==BDC_MODE_2 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) -+ { -+ //2 Byte Counter -+ -+ MA_rx_Temp= (pEntry->rx_byte_cnt_LowMAW)<<3 ; // RX TP ( bit /sec) -+ -+ if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) -+ { -+ pDM_BdcTable->MA_rx_TP_DIV[i]= MA_rx_Temp ; -+ } -+ else -+ { -+ pDM_BdcTable->MA_rx_TP[i] =MA_rx_Temp ; -+ } -+ -+ if( (MA_rx_Temp < TH2) && (MA_rx_Temp > TH1) && (LocalMaxRSSI<=Monitor_RSSI_threshold)) -+ { -+ if(pDM_BdcTable->w_BFer_Client[i]==1) // Bfer_Target -+ { -+ pDM_BdcTable->num_BfTar++; -+ -+ if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE && pDM_BdcTable->BDC_Try_flag==0) -+ { -+ improve_TP_temp = (pDM_BdcTable->MA_rx_TP_DIV[i] * 9)>>3 ; //* 1.125 -+ pDM_BdcTable->BF_pass = (pDM_BdcTable->MA_rx_TP[i] > improve_TP_temp)?TRUE:FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { MA_rx_TP,improve_TP_temp , MA_rx_TP_DIV, BF_pass}={ %d, %d, %d , %d } \n" ,i,pDM_BdcTable->MA_rx_TP[i],improve_TP_temp,pDM_BdcTable->MA_rx_TP_DIV[i], pDM_BdcTable->BF_pass )); -+ } -+ } -+ else// DIV_Target -+ { -+ pDM_BdcTable->num_DivTar++; -+ -+ if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE && pDM_BdcTable->BDC_Try_flag==0) -+ { -+ degrade_TP_temp=(pDM_BdcTable->MA_rx_TP_DIV[i]*5)>>3;//* 0.625 -+ pDM_BdcTable->DIV_pass = (pDM_BdcTable->MA_rx_TP[i] >degrade_TP_temp)?TRUE:FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { MA_rx_TP, degrade_TP_temp , MA_rx_TP_DIV, DIV_pass}=\n{ %d, %d, %d , %d } \n" ,i,pDM_BdcTable->MA_rx_TP[i],degrade_TP_temp,pDM_BdcTable->MA_rx_TP_DIV[i], pDM_BdcTable->DIV_pass )); -+ } -+ } -+ } -+ -+ if(MA_rx_Temp > TH1) -+ { -+ if(pDM_BdcTable->w_BFer_Client[i]==1) // Bfer_Target -+ { -+ pDM_BdcTable->bAll_BFSta_Idle=FALSE; -+ } -+ else// DIV_Target -+ { -+ pDM_BdcTable->bAll_DivSta_Idle=FALSE; -+ } -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { BFmeeCap , BFmerCap} = { %d , %d } \n" ,i, pDM_BdcTable->w_BFee_Client[i] , pDM_BdcTable->w_BFer_Client[i])); -+ -+ if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MA_rx_TP_DIV = (( %d )) \n",i,pDM_BdcTable->MA_rx_TP_DIV[i] )); -+ -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MA_rx_TP = (( %d )) \n",i,pDM_BdcTable->MA_rx_TP[i] )); -+ } -+ -+ } -+ #endif -+ #endif -+ -+ } -+ -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if(pDM_BdcTable->BDC_Try_flag==0) -+ #endif -+ #endif -+ { -+ pDM_FatTable->MainAnt_Sum[i] = 0; -+ pDM_FatTable->AuxAnt_Sum[i] = 0; -+ pDM_FatTable->MainAnt_Cnt[i] = 0; -+ pDM_FatTable->AuxAnt_Cnt[i] = 0; -+ } -+ } -+ -+ -+ -+ //2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP ) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** RxIdleAnt = (( %s ))\n\n", ( RxIdleAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if(pDM_BdcTable->BDC_Mode==BDC_MODE_1 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** BDC_RxIdleUpdate_counter = (( %d ))\n", pDM_BdcTable->BDC_RxIdleUpdate_counter)); -+ -+ if(pDM_BdcTable->BDC_RxIdleUpdate_counter==1) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***Update RxIdle Antenna!!! \n")); -+ pDM_BdcTable->BDC_RxIdleUpdate_counter=30; -+ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); -+ } -+ else -+ { -+ pDM_BdcTable->BDC_RxIdleUpdate_counter--; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***NOT update RxIdle Antenna because of BF ( need to fix TX-ant)\n")); -+ } -+ } -+ else -+ #endif -+ #endif -+ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); -+ #else -+ -+ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); -+ -+ #endif//#if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ -+ -+ //2 BDC Main Algorithm -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if(pDM_Odm->antdiv_evm_en ==0 ||pDM_FatTable->EVM_method_enable==0) -+ { -+ odm_BDCcoex_BFeeRxDiv_Arbitration(pDM_Odm); -+ } -+ #endif -+ #endif -+ -+ if(AntDivMaxRSSI == 0) -+ pDM_DigTable->AntDiv_RSSI_max = pDM_Odm->RSSI_Min; -+ else -+ pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; -+ -+ pDM_DigTable->RSSI_max = MaxRSSI; -+} -+ -+ -+ -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ -+VOID -+odm_S0S1_SWAntDiv_Reset( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ pDM_FatTable->bBecomeLinked = FALSE; -+ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; -+ pDM_SWAT_Table->Double_chk_flag = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SWAntDiv_Reset(): pDM_FatTable->bBecomeLinked = %d\n", pDM_FatTable->bBecomeLinked)); -+} -+ -+VOID -+odm_S0S1_SwAntDiv( -+ IN PVOID pDM_VOID, -+ IN u1Byte Step -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ u4Byte i, MinMaxRSSI = 0xFF, LocalMaxRSSI, LocalMinRSSI; -+ u4Byte Main_RSSI, Aux_RSSI; -+ u1Byte HighTraffic_TrainTime_U = 0x32, HighTraffic_TrainTime_L = 0, Train_time_temp; -+ u1Byte LowTraffic_TrainTime_U = 200, LowTraffic_TrainTime_L = 0; -+ u1Byte RxIdleAnt = pDM_SWAT_Table->PreAntenna, TargetAnt, nextAnt = 0; -+ PSTA_INFO_T pEntry = NULL; -+ u4Byte value32; -+ -+ -+ if(!pDM_Odm->bLinked) //bLinked==False -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); -+ if(pDM_FatTable->bBecomeLinked == TRUE) -+ { -+ if (pDM_Odm->SupportICType == ODM_RTL8723B) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set REG 948[9:6]=0x0\n")); -+ ODM_SetBBReg(pDM_Odm, 0x948 , (BIT9|BIT8|BIT7|BIT6), 0x0); -+ } -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ return; -+ } -+ else -+ { -+ if(pDM_FatTable->bBecomeLinked ==FALSE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ value32 = ODM_GetBBReg(pDM_Odm, 0x864, BIT5|BIT4|BIT3); -+ -+ #if (RTL8723B_SUPPORT == 1) -+ if (value32 == 0x0) -+ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, MAIN_ANT, ANT1_2G, ANT2_2G); -+ else if (value32 == 0x1) -+ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, AUX_ANT, ANT2_2G, ANT1_2G); -+ #endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B: First link! Force antenna to %s\n",(value32 == 0x0?"MAIN":"AUX") )); -+ } -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[%d] { try_flag=(( %d )), Step=(( %d )), Double_chk_flag = (( %d )) }\n", -+ __LINE__,pDM_SWAT_Table->try_flag,Step,pDM_SWAT_Table->Double_chk_flag)); -+ -+ // Handling step mismatch condition. -+ // Peak step is not finished at last time. Recover the variable and check again. -+ if( Step != pDM_SWAT_Table->try_flag ) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Step != try_flag] Need to Reset After Link\n")); -+ ODM_SwAntDivRestAfterLink(pDM_Odm); -+ } -+ -+ if (pDM_SWAT_Table->try_flag == SWAW_STEP_INIT) { -+ -+ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; -+ pDM_SWAT_Table->Train_time_flag=0; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag = 0] Prepare for peek!\n\n")); -+ return; -+ -+ } else { -+ -+ //1 Normal State (Begin Trying) -+ if (pDM_SWAT_Table->try_flag == SWAW_STEP_PEEK) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), TrafficLoad = (%d))\n", pDM_Odm->curTxOkCnt, pDM_Odm->curRxOkCnt, pDM_Odm->TrafficLoad)); -+ -+ if (pDM_Odm->TrafficLoad == TRAFFIC_HIGH) -+ { -+ Train_time_temp = pDM_SWAT_Table->Train_time ; -+ -+ if(pDM_SWAT_Table->Train_time_flag==3) -+ { -+ HighTraffic_TrainTime_L=0xa; -+ -+ if(Train_time_temp<=16) -+ Train_time_temp=HighTraffic_TrainTime_L; -+ else -+ Train_time_temp-=16; -+ -+ } -+ else if(pDM_SWAT_Table->Train_time_flag==2) -+ { -+ Train_time_temp-=8; -+ HighTraffic_TrainTime_L=0xf; -+ } -+ else if(pDM_SWAT_Table->Train_time_flag==1) -+ { -+ Train_time_temp-=4; -+ HighTraffic_TrainTime_L=0x1e; -+ } -+ else if(pDM_SWAT_Table->Train_time_flag==0) -+ { -+ Train_time_temp+=8; -+ HighTraffic_TrainTime_L=0x28; -+ } -+ -+ -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Train_time_temp = ((%d))\n",Train_time_temp)); -+ -+ //-- -+ if(Train_time_temp > HighTraffic_TrainTime_U) -+ Train_time_temp=HighTraffic_TrainTime_U; -+ -+ else if(Train_time_temp < HighTraffic_TrainTime_L) -+ Train_time_temp=HighTraffic_TrainTime_L; -+ -+ pDM_SWAT_Table->Train_time = Train_time_temp; /*10ms~200ms*/ -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Train_time_flag=((%d)), Train_time=((%d))\n", pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); -+ -+ } else if ((pDM_Odm->TrafficLoad == TRAFFIC_MID) || (pDM_Odm->TrafficLoad == TRAFFIC_LOW)) { -+ -+ Train_time_temp=pDM_SWAT_Table->Train_time ; -+ -+ if(pDM_SWAT_Table->Train_time_flag==3) -+ { -+ LowTraffic_TrainTime_L=10; -+ if(Train_time_temp<50) -+ Train_time_temp=LowTraffic_TrainTime_L; -+ else -+ Train_time_temp-=50; -+ } -+ else if(pDM_SWAT_Table->Train_time_flag==2) -+ { -+ Train_time_temp-=30; -+ LowTraffic_TrainTime_L=36; -+ } -+ else if(pDM_SWAT_Table->Train_time_flag==1) -+ { -+ Train_time_temp-=10; -+ LowTraffic_TrainTime_L=40; -+ } -+ else -+ Train_time_temp+=10; -+ -+ //-- -+ if(Train_time_temp >= LowTraffic_TrainTime_U) -+ Train_time_temp=LowTraffic_TrainTime_U; -+ -+ else if(Train_time_temp <= LowTraffic_TrainTime_L) -+ Train_time_temp=LowTraffic_TrainTime_L; -+ -+ pDM_SWAT_Table->Train_time = Train_time_temp; /*10ms~200ms*/ -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Train_time_flag=((%d)) , Train_time=((%d))\n", pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); -+ -+ } else { -+ pDM_SWAT_Table->Train_time = 0xc8; /*200ms*/ -+ -+ } -+ -+ //----------------- -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Current MinMaxRSSI is ((%d))\n", pDM_FatTable->MinMaxRSSI)); -+ -+ //---reset index--- -+ if (pDM_SWAT_Table->reset_idx >= RSSI_CHECK_RESET_PERIOD) { -+ -+ pDM_FatTable->MinMaxRSSI = 0; -+ pDM_SWAT_Table->reset_idx = 0; -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reset_idx = (( %d ))\n", pDM_SWAT_Table->reset_idx)); -+ -+ pDM_SWAT_Table->reset_idx++; -+ -+ //---double check flag--- -+ if ((pDM_FatTable->MinMaxRSSI > RSSI_CHECK_THRESHOLD) && (pDM_SWAT_Table->Double_chk_flag == 0)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" MinMaxRSSI is ((%d)), and > %d\n", -+ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); -+ -+ pDM_SWAT_Table->Double_chk_flag =1; -+ pDM_SWAT_Table->try_flag = SWAW_STEP_DETERMINE; -+ pDM_SWAT_Table->RSSI_Trying = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Test the current Ant for (( %d )) ms again\n", pDM_SWAT_Table->Train_time)); -+ ODM_UpdateRxIdleAnt(pDM_Odm, pDM_FatTable->RxIdleAnt); -+ ODM_SetTimer(pDM_Odm, &(pDM_SWAT_Table->phydm_SwAntennaSwitchTimer), pDM_SWAT_Table->Train_time); /*ms*/ -+ return; -+ } -+ -+ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; -+ -+ pDM_SWAT_Table->try_flag = SWAW_STEP_DETERMINE; -+ -+ if(pDM_SWAT_Table->reset_idx<=1) -+ pDM_SWAT_Table->RSSI_Trying = 2; -+ else -+ pDM_SWAT_Table->RSSI_Trying = 1; -+ -+ odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_PEEK); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag=1] Normal State: Begin Trying!!\n")); -+ -+ } else if ((pDM_SWAT_Table->try_flag == SWAW_STEP_DETERMINE) && (pDM_SWAT_Table->Double_chk_flag == 0)) { -+ -+ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; -+ pDM_SWAT_Table->RSSI_Trying--; -+ } -+ -+ //1 Decision State -+ if ((pDM_SWAT_Table->try_flag == SWAW_STEP_DETERMINE) && (pDM_SWAT_Table->RSSI_Trying == 0)) { -+ -+ BOOLEAN bByCtrlFrame = FALSE; -+ u8Byte pkt_cnt_total = 0; -+ -+ for (i=0; ipODM_StaInfo[i]; -+ if(IS_STA_VALID(pEntry)) -+ { -+ //2 Caculate RSSI per Antenna -+ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; -+ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; -+ -+ if(pDM_FatTable->MainAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_main>=1) -+ Main_RSSI=0; -+ -+ if(pDM_FatTable->AuxAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_aux>=1) -+ Aux_RSSI=0; -+ -+ TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); -+ LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; -+ LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** CCK_counter_main = (( %d )) , CCK_counter_aux= (( %d )) \n", pDM_FatTable->CCK_counter_main, pDM_FatTable->CCK_counter_aux)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** OFDM_counter_main = (( %d )) , OFDM_counter_aux= (( %d )) \n", pDM_FatTable->OFDM_counter_main, pDM_FatTable->OFDM_counter_aux)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n", pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI )); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); -+ -+ //2 Select RX Idle Antenna -+ -+ if (LocalMaxRSSI != 0 && LocalMaxRSSI < MinMaxRSSI) -+ { -+ RxIdleAnt = TargetAnt; -+ MinMaxRSSI = LocalMaxRSSI; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** LocalMaxRSSI-LocalMinRSSI = ((%d))\n",(LocalMaxRSSI-LocalMinRSSI))); -+ -+ if((LocalMaxRSSI-LocalMinRSSI)>8) -+ { -+ if(LocalMinRSSI != 0) -+ pDM_SWAT_Table->Train_time_flag=3; -+ else -+ { -+ if (MinMaxRSSI > RSSI_CHECK_THRESHOLD) -+ pDM_SWAT_Table->Train_time_flag=0; -+ else -+ pDM_SWAT_Table->Train_time_flag=3; -+ } -+ } -+ else if((LocalMaxRSSI-LocalMinRSSI)>5) -+ pDM_SWAT_Table->Train_time_flag=2; -+ else if((LocalMaxRSSI-LocalMinRSSI)>2) -+ pDM_SWAT_Table->Train_time_flag=1; -+ else -+ pDM_SWAT_Table->Train_time_flag=0; -+ -+ } -+ -+ //2 Select TX Antenna -+ if(TargetAnt == MAIN_ANT) -+ pDM_FatTable->antsel_a[i] = ANT1_2G; -+ else -+ pDM_FatTable->antsel_a[i] = ANT2_2G; -+ -+ } -+ pDM_FatTable->MainAnt_Sum[i] = 0; -+ pDM_FatTable->AuxAnt_Sum[i] = 0; -+ pDM_FatTable->MainAnt_Cnt[i] = 0; -+ pDM_FatTable->AuxAnt_Cnt[i] = 0; -+ } -+ -+ if(pDM_SWAT_Table->bSWAntDivByCtrlFrame) -+ { -+ odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_DETERMINE); -+ bByCtrlFrame = TRUE; -+ } -+ -+ pkt_cnt_total = pDM_FatTable->CCK_counter_main + pDM_FatTable->CCK_counter_aux + -+ pDM_FatTable->OFDM_counter_main + pDM_FatTable->OFDM_counter_aux; -+ pDM_FatTable->CCK_counter_main=0; -+ pDM_FatTable->CCK_counter_aux=0; -+ pDM_FatTable->OFDM_counter_main=0; -+ pDM_FatTable->OFDM_counter_aux=0; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame packet counter = %d, Data frame packet counter = %llu\n", -+ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame, pkt_cnt_total)); -+ -+ if(MinMaxRSSI == 0xff || ((pkt_cnt_total < (pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame >> 1)) && pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 2)) -+ { -+ MinMaxRSSI = 0; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Check RSSI of control frame because MinMaxRSSI == 0xff\n")); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bByCtrlFrame = %d\n", bByCtrlFrame)); -+ -+ if(bByCtrlFrame) -+ { -+ Main_RSSI = (pDM_FatTable->MainAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->MainAnt_CtrlFrame_Sum/pDM_FatTable->MainAnt_CtrlFrame_Cnt):0; -+ Aux_RSSI = (pDM_FatTable->AuxAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->AuxAnt_CtrlFrame_Sum/pDM_FatTable->AuxAnt_CtrlFrame_Cnt):0; -+ -+ if(pDM_FatTable->MainAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_main>=1) -+ Main_RSSI=0; -+ -+ if(pDM_FatTable->AuxAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_aux>=1) -+ Aux_RSSI=0; -+ -+ if (Main_RSSI != 0 || Aux_RSSI != 0) -+ { -+ RxIdleAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); -+ LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; -+ LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; -+ -+ if((LocalMaxRSSI-LocalMinRSSI)>8) -+ pDM_SWAT_Table->Train_time_flag=3; -+ else if((LocalMaxRSSI-LocalMinRSSI)>5) -+ pDM_SWAT_Table->Train_time_flag=2; -+ else if((LocalMaxRSSI-LocalMinRSSI)>2) -+ pDM_SWAT_Table->Train_time_flag=1; -+ else -+ pDM_SWAT_Table->Train_time_flag=0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame: Main_RSSI = %d, Aux_RSSI = %d\n", Main_RSSI, Aux_RSSI)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt decided by control frame = %s\n", (RxIdleAnt == MAIN_ANT?"MAIN":"AUX"))); -+ } -+ } -+ } -+ -+ pDM_FatTable->MinMaxRSSI = MinMaxRSSI; -+ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; -+ -+ if( pDM_SWAT_Table->Double_chk_flag==1) -+ { -+ pDM_SWAT_Table->Double_chk_flag=0; -+ -+ if (pDM_FatTable->MinMaxRSSI > RSSI_CHECK_THRESHOLD) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Double check] MinMaxRSSI ((%d)) > %d again!!\n", -+ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); -+ -+ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[reset try_flag = 0] Training accomplished !!!]\n\n\n")); -+ return; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Double check] MinMaxRSSI ((%d)) <= %d !!\n", -+ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); -+ -+ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; -+ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; -+ pDM_SWAT_Table->reset_idx = RSSI_CHECK_RESET_PERIOD; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag=0] Normal State: Need to tryg again!!\n\n\n")); -+ return; -+ } -+ } -+ else -+ { -+ if (pDM_FatTable->MinMaxRSSI < RSSI_CHECK_THRESHOLD) -+ pDM_SWAT_Table->reset_idx = RSSI_CHECK_RESET_PERIOD; -+ -+ pDM_SWAT_Table->PreAntenna =RxIdleAnt; -+ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt ); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[reset try_flag = 0] Training accomplished !!!] \n\n\n")); -+ return; -+ } -+ -+ } -+ -+ } -+ -+ //1 4.Change TRX antenna -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = (( %d )), Ant: (( %s )) >>> (( %s )) \n", -+ pDM_SWAT_Table->RSSI_Trying, (pDM_FatTable->RxIdleAnt == MAIN_ANT?"MAIN":"AUX"),(nextAnt == MAIN_ANT?"MAIN":"AUX"))); -+ -+ ODM_UpdateRxIdleAnt(pDM_Odm, nextAnt); -+ -+ //1 5.Reset Statistics -+ -+ pDM_FatTable->RxIdleAnt = nextAnt; -+ -+ //1 6.Set next timer (Trying State) -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Test ((%s)) Ant for (( %d )) ms\n", (nextAnt == MAIN_ANT?"MAIN":"AUX"), pDM_SWAT_Table->Train_time)); -+ ODM_SetTimer(pDM_Odm, &(pDM_SWAT_Table->phydm_SwAntennaSwitchTimer), pDM_SWAT_Table->Train_time); /*ms*/ -+} -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+ODM_SW_AntDiv_Callback( -+ PRT_TIMER pTimer -+) -+{ -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; -+ -+ #if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ #if USE_WORKITEM -+ ODM_ScheduleWorkItem(&pDM_SWAT_Table->phydm_SwAntennaSwitchWorkitem); -+ #else -+ { -+ //DbgPrint("SW_antdiv_Callback"); -+ odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); -+ } -+ #endif -+ #else -+ ODM_ScheduleWorkItem(&pDM_SWAT_Table->phydm_SwAntennaSwitchWorkitem); -+ #endif -+} -+VOID -+ODM_SW_AntDiv_WorkitemCallback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER pAdapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ //DbgPrint("SW_antdiv_Workitem_Callback"); -+ odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); -+} -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+VOID -+ODM_SW_AntDiv_WorkitemCallback( -+ IN PVOID pContext -+) -+{ -+ PADAPTER -+ pAdapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE -+ *pHalData = GET_HAL_DATA(pAdapter); -+ -+ /*DbgPrint("SW_antdiv_Workitem_Callback");*/ -+ odm_S0S1_SwAntDiv(&pHalData->odmpriv, SWAW_STEP_DETERMINE); -+} -+ -+VOID -+ODM_SW_AntDiv_Callback(void *FunctionContext) -+{ -+ PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; -+ PADAPTER padapter = pDM_Odm->Adapter; -+ if(padapter->net_closed == _TRUE) -+ return; -+ -+ #if 0 /* Can't do I/O in timer callback*/ -+ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_DETERMINE); -+ #else -+ rtw_run_in_thread_cmd(padapter, ODM_SW_AntDiv_WorkitemCallback, padapter); -+ #endif -+} -+ -+ -+#endif -+ -+VOID -+odm_S0S1_SwAntDivByCtrlFrame( -+ IN PVOID pDM_VOID, -+ IN u1Byte Step -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ switch(Step) -+ { -+ case SWAW_STEP_PEEK: -+ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame = 0; -+ pDM_SWAT_Table->bSWAntDivByCtrlFrame = TRUE; -+ pDM_FatTable->MainAnt_CtrlFrame_Cnt = 0; -+ pDM_FatTable->AuxAnt_CtrlFrame_Cnt = 0; -+ pDM_FatTable->MainAnt_CtrlFrame_Sum = 0; -+ pDM_FatTable->AuxAnt_CtrlFrame_Sum = 0; -+ pDM_FatTable->CCK_CtrlFrame_Cnt_main = 0; -+ pDM_FatTable->CCK_CtrlFrame_Cnt_aux = 0; -+ pDM_FatTable->OFDM_CtrlFrame_Cnt_main = 0; -+ pDM_FatTable->OFDM_CtrlFrame_Cnt_aux = 0; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n")); -+ break; -+ case SWAW_STEP_DETERMINE: -+ pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SwAntDivForAPMode(): Stop peek\n")); -+ break; -+ default: -+ pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; -+ break; -+ } -+} -+ -+VOID -+odm_AntselStatisticsOfCtrlFrame( -+ IN PVOID pDM_VOID, -+ IN u1Byte antsel_tr_mux, -+ IN u4Byte RxPWDBAll -+ -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ if(antsel_tr_mux == ANT1_2G) -+ { -+ pDM_FatTable->MainAnt_CtrlFrame_Sum+=RxPWDBAll; -+ pDM_FatTable->MainAnt_CtrlFrame_Cnt++; -+ } -+ else -+ { -+ pDM_FatTable->AuxAnt_CtrlFrame_Sum+=RxPWDBAll; -+ pDM_FatTable->AuxAnt_CtrlFrame_Cnt++; -+ } -+} -+ -+VOID -+odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( -+ IN PVOID pDM_VOID, -+ IN PVOID p_phy_info_void, -+ IN PVOID p_pkt_info_void -+ //IN PODM_PHY_INFO_T pPhyInfo, -+ //IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; -+ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ BOOLEAN isCCKrate; -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) -+ return; -+ -+ if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV) -+ return; -+ -+ // In try state -+ if(!pDM_SWAT_Table->bSWAntDivByCtrlFrame) -+ return; -+ -+ // No HW error and match receiver address -+ if(!pPktinfo->bToSelf) -+ return; -+ -+ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame++; -+ isCCKrate = ((pPktinfo->DataRate >= DESC_RATE1M ) && (pPktinfo->DataRate <= DESC_RATE11M ))?TRUE :FALSE; -+ -+ if(isCCKrate) -+ { -+ pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; -+ -+ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) -+ pDM_FatTable->CCK_CtrlFrame_Cnt_main++; -+ else -+ pDM_FatTable->CCK_CtrlFrame_Cnt_aux++; -+ -+ odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]); -+ } -+ else -+ { -+ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) -+ pDM_FatTable->OFDM_CtrlFrame_Cnt_main++; -+ else -+ pDM_FatTable->OFDM_CtrlFrame_Cnt_aux++; -+ -+ odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxPWDBAll); -+ } -+} -+ -+#endif //#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) -+ -+ -+ -+ -+VOID -+odm_SetNextMACAddrTarget( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ PSTA_INFO_T pEntry; -+ u4Byte value32, i; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n")); -+ -+ if (pDM_Odm->bLinked) -+ { -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ -+ if ((pDM_FatTable->TrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM) -+ pDM_FatTable->TrainIdx = 0; -+ else -+ pDM_FatTable->TrainIdx++; -+ -+ pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; -+ -+ if (IS_STA_VALID(pEntry)) { -+ -+ /*Match MAC ADDR*/ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) -+ value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4]; -+ #else -+ value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4]; -+ #endif -+ -+ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32);/*0x7b4~0x7b5*/ -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) -+ value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0]; -+ #else -+ value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0]; -+ #endif -+ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32);/*0x7b0~0x7b3*/ -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%d\n", pDM_FatTable->TrainIdx)); -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", -+ pEntry->hwaddr[5], pEntry->hwaddr[4], pEntry->hwaddr[3], pEntry->hwaddr[2], pEntry->hwaddr[1], pEntry->hwaddr[0])); -+ #else -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", -+ pEntry->MacAddr[5], pEntry->MacAddr[4], pEntry->MacAddr[3], pEntry->MacAddr[2], pEntry->MacAddr[1], pEntry->MacAddr[0])); -+ #endif -+ -+ break; -+ } -+ } -+ } -+ -+#if 0 -+ // -+ //2012.03.26 LukeLee: This should be removed later, the MAC address is changed according to MACID in turn -+ // -+ #if( DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ { -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ -+ for (i=0; i<6; i++) -+ { -+ Bssid[i] = pMgntInfo->Bssid[i]; -+ //DbgPrint("Bssid[%d]=%x\n", i, Bssid[i]); -+ } -+ } -+ #endif -+ -+ //odm_SetNextMACAddrTarget(pDM_Odm); -+ -+ //1 Select MAC Address Filter -+ for (i=0; i<6; i++) -+ { -+ if(Bssid[i] != pDM_FatTable->Bssid[i]) -+ { -+ bMatchBSSID = FALSE; -+ break; -+ } -+ } -+ if(bMatchBSSID == FALSE) -+ { -+ //Match MAC ADDR -+ value32 = (Bssid[5]<<8)|Bssid[4]; -+ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); -+ value32 = (Bssid[3]<<24)|(Bssid[2]<<16) |(Bssid[1]<<8) |Bssid[0]; -+ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); -+ } -+ -+ return bMatchBSSID; -+#endif -+ -+} -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ -+VOID -+odm_FastAntTraining( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ u4Byte MaxRSSI_pathA=0, Pckcnt_pathA=0; -+ u1Byte i,TargetAnt_pathA=0; -+ BOOLEAN bPktFilterMacth_pathA = FALSE; -+ #if(RTL8192E_SUPPORT == 1) -+ u4Byte MaxRSSI_pathB=0, Pckcnt_pathB=0; -+ u1Byte TargetAnt_pathB=0; -+ BOOLEAN bPktFilterMacth_pathB = FALSE; -+ #endif -+ -+ -+ if(!pDM_Odm->bLinked) //bLinked==False -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); -+ -+ if(pDM_FatTable->bBecomeLinked == TRUE) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ return; -+ } -+ else -+ { -+ if(pDM_FatTable->bBecomeLinked ==FALSE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked!!!]\n")); -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ } -+ -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, ((pDM_Odm->fat_comb_a)-1)); -+ } -+ #if(RTL8192E_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT2|BIT1|BIT0, ((pDM_Odm->fat_comb_a)-1) ); //path-A // ant combination=regB38[2:0]+1 -+ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT18|BIT17|BIT16, ((pDM_Odm->fat_comb_b)-1) ); //path-B // ant combination=regB38[18:16]+1 -+ } -+ #endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n")); -+ -+ //1 TRAINING STATE -+ if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) -+ { -+ //2 Caculate RSSI per Antenna -+ -+ //3 [path-A]--------------------------- -+ for (i=0; i<(pDM_Odm->fat_comb_a); i++) // i : antenna index -+ { -+ if(pDM_FatTable->antRSSIcnt[i] == 0) -+ pDM_FatTable->antAveRSSI[i] = 0; -+ else -+ { -+ pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i]; -+ bPktFilterMacth_pathA = TRUE; -+ } -+ -+ if(pDM_FatTable->antAveRSSI[i] > MaxRSSI_pathA) -+ { -+ MaxRSSI_pathA = pDM_FatTable->antAveRSSI[i]; -+ Pckcnt_pathA = pDM_FatTable ->antRSSIcnt[i]; -+ TargetAnt_pathA = i ; -+ } -+ else if(pDM_FatTable->antAveRSSI[i] == MaxRSSI_pathA) -+ { -+ if( (pDM_FatTable->antRSSIcnt[i] ) > Pckcnt_pathA) -+ { -+ MaxRSSI_pathA = pDM_FatTable->antAveRSSI[i]; -+ Pckcnt_pathA = pDM_FatTable ->antRSSIcnt[i]; -+ TargetAnt_pathA = i ; -+ } -+ } -+ -+ ODM_RT_TRACE("*** Ant-Index : [ %d ], Counter = (( %d )), Avg RSSI = (( %d )) \n", i, pDM_FatTable->antRSSIcnt[i], pDM_FatTable->antAveRSSI[i] ); -+ } -+ -+ -+ /* -+ #if(RTL8192E_SUPPORT == 1) -+ //3 [path-B]--------------------------- -+ for (i=0; i<(pDM_Odm->fat_comb_b); i++) -+ { -+ if(pDM_FatTable->antRSSIcnt_pathB[i] == 0) -+ pDM_FatTable->antAveRSSI_pathB[i] = 0; -+ else // (antRSSIcnt[i] != 0) -+ { -+ pDM_FatTable->antAveRSSI_pathB[i] = pDM_FatTable->antSumRSSI_pathB[i] /pDM_FatTable->antRSSIcnt_pathB[i]; -+ bPktFilterMacth_pathB = TRUE; -+ } -+ if(pDM_FatTable->antAveRSSI_pathB[i] > MaxRSSI_pathB) -+ { -+ MaxRSSI_pathB = pDM_FatTable->antAveRSSI_pathB[i]; -+ Pckcnt_pathB = pDM_FatTable ->antRSSIcnt_pathB[i]; -+ TargetAnt_pathB = (u1Byte) i; -+ } -+ if(pDM_FatTable->antAveRSSI_pathB[i] == MaxRSSI_pathB) -+ { -+ if(pDM_FatTable ->antRSSIcnt_pathB > Pckcnt_pathB) -+ { -+ MaxRSSI_pathB = pDM_FatTable->antAveRSSI_pathB[i]; -+ TargetAnt_pathB = (u1Byte) i; -+ } -+ } -+ if (pDM_Odm->fat_print_rssi==1) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{Path-B}: Sum RSSI[%d] = (( %d )), cnt RSSI [%d] = (( %d )), Avg RSSI[%d] = (( %d )) \n", -+ i, pDM_FatTable->antSumRSSI_pathB[i], i, pDM_FatTable->antRSSIcnt_pathB[i], i, pDM_FatTable->antAveRSSI_pathB[i])); -+ } -+ } -+ #endif -+ */ -+ -+ //1 DECISION STATE -+ -+ //2 Select TRX Antenna -+ -+ phydm_FastTraining_enable(pDM_Odm, FAT_OFF); -+ -+ //3 [path-A]--------------------------- -+ if(bPktFilterMacth_pathA == FALSE) -+ { -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("{Path-A}: None Packet is matched\n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("{Path-A}: None Packet is matched\n")); -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ } -+ else -+ { -+ ODM_RT_TRACE("TargetAnt_pathA = (( %d )) , MaxRSSI_pathA = (( %d )) \n",TargetAnt_pathA,MaxRSSI_pathA); -+ -+ //3 [ update RX-optional ant ] Default RX is Omni, Optional RX is the best decision by FAT -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt_pathA); -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT8|BIT7|BIT6, TargetAnt_pathA);//Optional RX [pth-A] -+ } -+ //3 [ update TX ant ] -+ odm_UpdateTxAnt(pDM_Odm, TargetAnt_pathA, (pDM_FatTable->TrainIdx)); -+ -+ if(TargetAnt_pathA == 0) -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ } -+ /* -+ #if(RTL8192E_SUPPORT == 1) -+ //3 [path-B]--------------------------- -+ if(bPktFilterMacth_pathB == FALSE) -+ { -+ if (pDM_Odm->fat_print_rssi==1) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***[%d]{Path-B}: None Packet is matched\n\n\n",__LINE__)); -+ } -+ } -+ else -+ { -+ if (pDM_Odm->fat_print_rssi==1) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, -+ (" ***TargetAnt_pathB = (( %d )) *** MaxRSSI = (( %d ))***\n\n\n",TargetAnt_pathB,MaxRSSI_pathB)); -+ } -+ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT21|BIT20|BIT19, TargetAnt_pathB); //Default RX is Omni, Optional RX is the best decision by FAT -+ ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info -+ -+ pDM_FatTable->antsel_pathB[pDM_FatTable->TrainIdx] = TargetAnt_pathB; -+ } -+ #endif -+ */ -+ -+ //2 Reset Counter -+ for(i=0; i<(pDM_Odm->fat_comb_a); i++) -+ { -+ pDM_FatTable->antSumRSSI[i] = 0; -+ pDM_FatTable->antRSSIcnt[i] = 0; -+ } -+ /* -+ #if(RTL8192E_SUPPORT == 1) -+ for(i=0; i<=(pDM_Odm->fat_comb_b); i++) -+ { -+ pDM_FatTable->antSumRSSI_pathB[i] = 0; -+ pDM_FatTable->antRSSIcnt_pathB[i] = 0; -+ } -+ #endif -+ */ -+ -+ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; -+ return; -+ } -+ -+ //1 NORMAL STATE -+ if (pDM_FatTable->FAT_State == FAT_PREPARE_STATE) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Start Prepare State ]\n")); -+ -+ odm_SetNextMACAddrTarget(pDM_Odm); -+ -+ //2 Prepare Training -+ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; -+ phydm_FastTraining_enable(pDM_Odm , FAT_ON); -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); //enable HW AntDiv -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Start Training State]\n")); -+ -+ ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //ms -+ } -+ -+} -+ -+VOID -+odm_FastAntTrainingCallback( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PADAPTER padapter = pDM_Odm->Adapter; -+ if(padapter->net_closed == _TRUE) -+ return; -+ //if(*pDM_Odm->pbNet_closed == TRUE) -+ // return; -+#endif -+ -+#if USE_WORKITEM -+ ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem); -+#else -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_FastAntTrainingCallback****** \n")); -+ odm_FastAntTraining(pDM_Odm); -+#endif -+} -+ -+VOID -+odm_FastAntTrainingWorkItemCallback( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_FastAntTrainingWorkItemCallback****** \n")); -+ odm_FastAntTraining(pDM_Odm); -+} -+ -+#endif -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ -+u4Byte -+phydm_construct_hl_beam_codeword( -+ IN PVOID pDM_VOID, -+ IN u4Byte *beam_pattern_idx, -+ IN u4Byte ant_num -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte codeword = 0; -+ u4Byte data_tmp; -+ u1Byte i; -+ -+ if (ant_num < 8) { -+ for (i = 0; i < ant_num; i++) { -+ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] ));*/ -+ if (beam_pattern_idx[i] == 0) { -+ data_tmp = 0x1; -+ /**/ -+ } else if (beam_pattern_idx[i] == 1) { -+ data_tmp = 0x2; -+ /**/ -+ } else if (beam_pattern_idx[i] == 2) { -+ data_tmp = 0x4; -+ /**/ -+ } else if (beam_pattern_idx[i] == 3) { -+ data_tmp = 0x8; -+ /**/ -+ } -+ codeword |= (data_tmp<<(i*4)); -+ } -+ } -+ -+ return codeword; -+} -+ -+VOID -+phydm_update_beam_pattern( -+ IN PVOID pDM_VOID, -+ IN u4Byte codeword, -+ IN u4Byte codeword_length -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ u1Byte i; -+ BOOLEAN beam_ctrl_signal; -+ u4Byte one = 0x1; -+ u4Byte reg44_tmp_p, reg44_tmp_n, reg44_ori; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set Beam Pattern =0x%x\n", codeword)); -+ -+ reg44_ori = ODM_GetMACReg(pDM_Odm, 0x44, bMaskDWord); -+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_ori =0x%x\n", reg44_ori));*/ -+ -+ for (i = 0; i <= (codeword_length-1); i++) { -+ beam_ctrl_signal = (BOOLEAN)((codeword&BIT(i)) >> i); -+ -+ if (pDM_Odm->DebugComponents & ODM_COMP_ANT_DIV) { -+ -+ if (i == (codeword_length-1)) { -+ DbgPrint("%d ]\n", beam_ctrl_signal); -+ /**/ -+ } else if (i == 0) { -+ DbgPrint("Send codeword[1:24] ---> [ %d ", beam_ctrl_signal); -+ /**/ -+ } else if ((i % 4) == 3) { -+ DbgPrint("%d | ", beam_ctrl_signal); -+ /**/ -+ } else { -+ DbgPrint("%d ", beam_ctrl_signal); -+ /**/ -+ } -+ } -+ -+ #if 1 -+ reg44_tmp_p = reg44_ori & (~(BIT11|BIT10)); /*clean bit 10 & 11*/ -+ reg44_tmp_p |= ((1<<11) | (beam_ctrl_signal<<10)); -+ reg44_tmp_n = reg44_ori & (~(BIT11|BIT10)); -+ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/ -+ ODM_SetMACReg(pDM_Odm, 0x44 , bMaskDWord, reg44_tmp_p); -+ ODM_SetMACReg(pDM_Odm, 0x44 , bMaskDWord, reg44_tmp_n); -+ #else -+ ODM_SetMACReg(pDM_Odm, 0x44 , BIT11|BIT10, ((1<<1) | beam_ctrl_signal)); -+ ODM_SetMACReg(pDM_Odm, 0x44 , BIT11, 0); -+ #endif -+ -+ } -+} -+ -+VOID -+phydm_update_rx_idle_beam( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ u4Byte i; -+ -+ pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(pDM_Odm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set target beam_pattern codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword)); -+ -+ for (i = 0; i < (pdm_sat_table->ant_num); i++) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i, pdm_sat_table->rx_idle_beam[i])); -+ /**/ -+ } -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); -+ #else -+ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); -+ /*ODM_StallExecution(1);*/ -+ #endif -+ -+ pdm_sat_table->pre_codeword = pdm_sat_table->update_beam_codeword; -+} -+ -+VOID -+phydm_hl_smart_ant_cmd( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ u4Byte one = 0x1; -+ u4Byte codeword_length = pdm_sat_table->data_codeword_bit_num; -+ u4Byte beam_ctrl_signal, i; -+ -+ if (dm_value[0] == 1) { /*fix beam pattern*/ -+ -+ pdm_sat_table->fix_beam_pattern_en = dm_value[1]; -+ -+ if (pdm_sat_table->fix_beam_pattern_en == 1) { -+ -+ pdm_sat_table->fix_beam_pattern_codeword = dm_value[2]; -+ -+ if (pdm_sat_table->fix_beam_pattern_codeword > (one<fix_beam_pattern_codeword, codeword_length)); -+ (pdm_sat_table->fix_beam_pattern_codeword) &= 0xffffff; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Auto modify to (0x%x)\n", pdm_sat_table->fix_beam_pattern_codeword)); -+ } -+ -+ pdm_sat_table->update_beam_codeword = pdm_sat_table->fix_beam_pattern_codeword; -+ -+ /*---------------------------------------------------------*/ -+ PHYDM_SNPRINTF((output+used, out_len-used, "Fix Beam Pattern\n")); -+ for (i = 0; i <= (codeword_length-1); i++) { -+ beam_ctrl_signal = (BOOLEAN)((pdm_sat_table->update_beam_codeword&BIT(i)) >> i); -+ -+ if (i == (codeword_length-1)) { -+ PHYDM_SNPRINTF((output+used, out_len-used, "%d]\n", beam_ctrl_signal)); -+ /**/ -+ } else if (i == 0) { -+ PHYDM_SNPRINTF((output+used, out_len-used, "Send Codeword[1:24] to RFU -> [%d", beam_ctrl_signal)); -+ /**/ -+ } else if ((i % 4) == 3) { -+ PHYDM_SNPRINTF((output+used, out_len-used, "%d|", beam_ctrl_signal)); -+ /**/ -+ } else { -+ PHYDM_SNPRINTF((output+used, out_len-used, "%d", beam_ctrl_signal)); -+ /**/ -+ } -+ } -+ /*---------------------------------------------------------*/ -+ -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); -+ #else -+ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); -+ /*ODM_StallExecution(1);*/ -+ #endif -+ } else if (pdm_sat_table->fix_beam_pattern_en == 0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Smart Antenna: Enable\n")); -+ } -+ -+ } else if (dm_value[0] == 2) { /*set latch time*/ -+ -+ pdm_sat_table->latch_time = dm_value[1]; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] latch_time =0x%x\n", pdm_sat_table->latch_time)); -+ } else if (dm_value[0] == 3) { -+ -+ pdm_sat_table->fix_training_num_en = dm_value[1]; -+ -+ if (pdm_sat_table->fix_training_num_en == 1) { -+ pdm_sat_table->per_beam_training_pkt_num = dm_value[2]; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Fix per_beam_training_pkt_num = (( 0x%x ))\n", pdm_sat_table->per_beam_training_pkt_num)); -+ } else if (pdm_sat_table->fix_training_num_en == 0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] AUTO per_beam_training_pkt_num\n")); -+ /**/ -+ } -+ } -+ -+} -+ -+ -+void -+phydm_set_all_ant_same_beam_num( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ -+ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { /*2Ant for 8821A*/ -+ -+ pdm_sat_table->rx_idle_beam[0] = pdm_sat_table->fast_training_beam_num; -+ pdm_sat_table->rx_idle_beam[1] = pdm_sat_table->fast_training_beam_num; -+ } -+ -+ pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(pDM_Odm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword)); -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); -+ #else -+ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); -+ /*ODM_StallExecution(1);*/ -+ #endif -+} -+ -+VOID -+odm_FastAntTraining_hl_smart_antenna_type1( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ pFAT_T pDM_FatTable = &(pDM_Odm->DM_FatTable); -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ u4Byte codeword = 0, i, j; -+ u4Byte TargetAnt; -+ u4Byte avg_rssi_tmp; -+ u4Byte target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0}; -+ u4Byte max_beam_ant_rssi = 0; -+ u4Byte target_ant_beam[SUPPORT_RF_PATH_NUM] = {0}; -+ u4Byte beam_tmp; -+ -+ -+ if (!pDM_Odm->bLinked) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); -+ -+ if (pDM_FatTable->bBecomeLinked == TRUE) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Link -> no Link\n")); -+ pDM_FatTable->FAT_State = FAT_BEFORE_LINK_STATE; -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", pDM_FatTable->FAT_State)); -+ -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ return; -+ -+ } else { -+ if (pDM_FatTable->bBecomeLinked == FALSE) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); -+ -+ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", pDM_FatTable->FAT_State)); -+ -+ /*pdm_sat_table->fast_training_beam_num = 0;*/ -+ /*phydm_set_all_ant_same_beam_num(pDM_Odm);*/ -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_DESC); -+ -+ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ } -+ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("HL Smart Ant Training: State (( %d ))\n", pDM_FatTable->FAT_State));*/ -+ -+ /* [DECISION STATE] */ -+ /*=======================================================================================*/ -+ if (pDM_FatTable->FAT_State == FAT_DECISION_STATE) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 3. In Decision State]\n")); -+ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); -+ -+ /*compute target beam in each antenna*/ -+ for (i = 0; i < (pdm_sat_table->ant_num); i++) { -+ for (j = 0; j < (pdm_sat_table->beam_patten_num_each_ant); j++) { -+ -+ if (pdm_sat_table->pkt_rssi_cnt[i][j] == 0) { -+ avg_rssi_tmp = pdm_sat_table->pkt_rssi_pre[i][j]; -+ /**/ -+ } else { -+ avg_rssi_tmp = (pdm_sat_table->pkt_rssi_sum[i][j]) / (pdm_sat_table->pkt_rssi_cnt[i][j]); -+ pdm_sat_table->pkt_rssi_pre[i][j] = avg_rssi_tmp; -+ /**/ -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant[%d], Beam[%d]: pkt_num=(( %d )), avg_rssi=(( %d ))\n", i, j, pdm_sat_table->pkt_rssi_cnt[i][j], avg_rssi_tmp)); -+ -+ if (avg_rssi_tmp > target_ant_beam_max_rssi[i]) { -+ target_ant_beam[i] = j; -+ target_ant_beam_max_rssi[i] = avg_rssi_tmp; -+ } -+ -+ /*reset counter value*/ -+ pdm_sat_table->pkt_rssi_sum[i][j] = 0; -+ pdm_sat_table->pkt_rssi_cnt[i][j] = 0; -+ -+ } -+ pdm_sat_table->rx_idle_beam[i] = target_ant_beam[i]; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("---------> Target of Ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n", -+ i, target_ant_beam[i], target_ant_beam_max_rssi[i])); -+ -+ if (target_ant_beam_max_rssi[i] > max_beam_ant_rssi) { -+ TargetAnt = i; -+ max_beam_ant_rssi = target_ant_beam_max_rssi[i]; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Target of Ant = (( %d )) max_beam_ant_rssi = (( %d ))\n", -+ TargetAnt, max_beam_ant_rssi)); -+ } -+ } -+ -+ if (TargetAnt == 0) -+ TargetAnt = MAIN_ANT; -+ else if (TargetAnt == 1) -+ TargetAnt = AUX_ANT; -+ -+ /* [ update RX ant ]*/ -+ ODM_UpdateRxIdleAnt(pDM_Odm, (u1Byte)TargetAnt); -+ -+ /* [ update TX ant ]*/ -+ odm_UpdateTxAnt(pDM_Odm, (u1Byte)TargetAnt, (pDM_FatTable->TrainIdx)); -+ -+ /*set beam in each antenna*/ -+ phydm_update_rx_idle_beam(pDM_Odm); -+ -+ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); -+ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; -+ -+ } -+ /* [TRAINING STATE] */ -+ else if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2. In Training State]\n")); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n", -+ pdm_sat_table->fast_training_beam_num, pdm_sat_table->pre_fast_training_beam_num)); -+ -+ if (pdm_sat_table->fast_training_beam_num > pdm_sat_table->pre_fast_training_beam_num) { -+ -+ pdm_sat_table->force_update_beam_en = 0; -+ -+ } else { -+ -+ pdm_sat_table->force_update_beam_en = 1; -+ -+ pdm_sat_table->pkt_counter = 0; -+ beam_tmp = pdm_sat_table->fast_training_beam_num; -+ if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant-1)) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", pdm_sat_table->fast_training_beam_num)); -+ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); -+ pDM_FatTable->FAT_State = FAT_DECISION_STATE; -+ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); -+ -+ } else { -+ pdm_sat_table->fast_training_beam_num++; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num)); -+ phydm_set_all_ant_same_beam_num(pDM_Odm); -+ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; -+ -+ } -+ } -+ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num)); -+ } -+ /* [Prepare State] */ -+ /*=======================================================================================*/ -+ else if (pDM_FatTable->FAT_State == FAT_PREPARE_STATE) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n\n[ 1. In Prepare State]\n")); -+ -+ if (pDM_Odm->pre_TrafficLoad == (pDM_Odm->TrafficLoad)) { -+ if (pdm_sat_table->decision_holding_period != 0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Holding_period = (( %d )), return!!!\n", pdm_sat_table->decision_holding_period)); -+ pdm_sat_table->decision_holding_period--; -+ return; -+ } -+ } -+ -+ -+ /* Set training packet number*/ -+ if (pdm_sat_table->fix_training_num_en == 0) { -+ -+ switch (pDM_Odm->TrafficLoad) { -+ -+ case TRAFFIC_HIGH: -+ pdm_sat_table->per_beam_training_pkt_num = 20; -+ pdm_sat_table->decision_holding_period = 0; -+ break; -+ case TRAFFIC_MID: -+ pdm_sat_table->per_beam_training_pkt_num = 10; -+ pdm_sat_table->decision_holding_period = 1; -+ break; -+ case TRAFFIC_LOW: -+ pdm_sat_table->per_beam_training_pkt_num = 5; /*ping 60000*/ -+ pdm_sat_table->decision_holding_period = 3; -+ break; -+ case TRAFFIC_ULTRA_LOW: -+ pdm_sat_table->per_beam_training_pkt_num = 2; -+ pdm_sat_table->decision_holding_period = 5; -+ break; -+ default: -+ break; -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fix_training_num = (( %d )), per_beam_training_pkt_num = (( %d ))\n", -+ pdm_sat_table->fix_training_num_en , pdm_sat_table->per_beam_training_pkt_num)); -+ -+ /* Set training MAC Addr. of target */ -+ odm_SetNextMACAddrTarget(pDM_Odm); -+ -+ phydm_FastTraining_enable(pDM_Odm , FAT_ON); -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ pdm_sat_table->pkt_counter = 0; -+ pdm_sat_table->fast_training_beam_num = 0; -+ phydm_set_all_ant_same_beam_num(pDM_Odm); -+ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; -+ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; -+ } -+ -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+phydm_beam_switch_workitem_callback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER pAdapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ -+ #if DEV_BUS_TYPE != RT_PCI_INTERFACE -+ pdm_sat_table->pkt_skip_statistic_en = 1; -+ #endif -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en)); -+ -+ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); -+ -+ #if DEV_BUS_TYPE != RT_PCI_INTERFACE -+ /*ODM_StallExecution(pdm_sat_table->latch_time);*/ -+ pdm_sat_table->pkt_skip_statistic_en = 0; -+ #endif -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en, pdm_sat_table->latch_time)); -+} -+ -+VOID -+phydm_beam_decision_workitem_callback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER pAdapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam decision Workitem Callback\n")); -+ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); -+} -+#endif -+ -+#endif /*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ -+VOID -+ODM_AntDivInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); -+ return; -+ } -+ //--- -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n")); -+ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) -+ return; -+ } -+ else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n")); -+ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) -+ return; -+ } -+ else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n")); -+ } -+ -+#endif -+ //--- -+ -+ //2 [--General---] -+ pDM_Odm->antdiv_period=0; -+ -+ pDM_FatTable->bBecomeLinked =FALSE; -+ pDM_FatTable->AntDiv_OnOff =0xff; -+ -+ //3 - AP - -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ #ifdef BEAMFORMING_SUPPORT -+ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ odm_BDC_Init(pDM_Odm); -+ #endif -+ #endif -+ -+ //3 - WIN - -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pDM_SWAT_Table->Ant5G = MAIN_ANT; -+ pDM_SWAT_Table->Ant2G = MAIN_ANT; -+ pDM_FatTable->CCK_counter_main=0; -+ pDM_FatTable->CCK_counter_aux=0; -+ pDM_FatTable->OFDM_counter_main=0; -+ pDM_FatTable->OFDM_counter_aux=0; -+ #endif -+ -+ //2 [---Set MAIN_ANT as default antenna if Auto-Ant enable---] -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ -+ pDM_Odm->AntType = ODM_AUTO_ANT; -+ -+ pDM_FatTable->RxIdleAnt = 0xff; /*to make RX-idle-antenna will be updated absolutly*/ -+ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); -+ -+ //2 [---Set TX Antenna---] -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); -+ -+ -+ //2 [--88E---] -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ #if (RTL8188E_SUPPORT == 1) -+ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; -+ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; -+ -+ if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 88E Not Supprrt This AntDiv Type\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ -+ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) -+ odm_RX_HWAntDiv_Init_88E(pDM_Odm); -+ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) -+ odm_TRX_HWAntDiv_Init_88E(pDM_Odm); -+ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) -+ odm_Smart_HWAntDiv_Init_88E(pDM_Odm); -+ #endif -+ #endif -+ } -+ -+ //2 [--92E---] -+ #if (RTL8192E_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; -+ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; -+ -+ if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8192E Not Supprrt This AntDiv Type\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ -+ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) -+ odm_RX_HWAntDiv_Init_92E(pDM_Odm); -+ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) -+ odm_TRX_HWAntDiv_Init_92E(pDM_Odm); -+ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) -+ odm_Smart_HWAntDiv_Init_92E(pDM_Odm); -+ #endif -+ -+ } -+ #endif -+ -+ //2 [--8723B---] -+ #if (RTL8723B_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ //pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ -+ if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8723B Not Supprrt This AntDiv Type\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ -+ if( pDM_Odm->AntDivType==S0S1_SW_ANTDIV) -+ odm_S0S1_SWAntDiv_Init_8723B(pDM_Odm); -+ else if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) -+ odm_TRX_HWAntDiv_Init_8723B(pDM_Odm); -+ } -+ #endif -+ -+ //2 [--8811A 8821A---] -+ #if (RTL8821A_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ pDM_Odm->AntDivType = HL_SW_SMART_ANT_TYPE1; -+ -+ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { -+ -+ odm_TRX_HWAntDiv_Init_8821A(pDM_Odm); -+ phydm_hl_smart_ant_type1_init_8821a(pDM_Odm); -+ } else -+ #endif -+ { -+ /*pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV;*/ -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ -+ if (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV && pDM_Odm->AntDivType != S0S1_SW_ANTDIV) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Return!!!] 8821A & 8811A Not Supprrt This AntDiv Type\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) -+ odm_TRX_HWAntDiv_Init_8821A(pDM_Odm); -+ else if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) -+ odm_S0S1_SWAntDiv_Init_8821A(pDM_Odm); -+ } -+ } -+ #endif -+ -+ //2 [--8881A---] -+ #if (RTL8881A_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8881A) -+ { -+ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; -+ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ -+ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8881A Not Supprrt This AntDiv Type\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) -+ odm_RX_HWAntDiv_Init_8881A(pDM_Odm); -+ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) -+ odm_TRX_HWAntDiv_Init_8881A(pDM_Odm); -+ } -+ #endif -+ -+ //2 [--8812---] -+ #if (RTL8812A_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ -+ if( pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8812A Not Supprrt This AntDiv Type\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ odm_TRX_HWAntDiv_Init_8812A(pDM_Odm); -+ } -+ #endif -+ -+ /*[--8188F---]*/ -+ #if (RTL8188F_SUPPORT == 1) -+ else if (pDM_Odm->SupportICType == ODM_RTL8188F) { -+ -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ odm_S0S1_SWAntDiv_Init_8188F(pDM_Odm); -+ } -+ #endif -+ /* -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** SupportICType=[%lu]\n",pDM_Odm->SupportICType)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv SupportAbility=[%lu]\n",(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)>>6)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv Type=[%d]\n",pDM_Odm->AntDivType)); -+ */ -+} -+ -+VOID -+ODM_AntDiv( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ #endif -+ -+ if(*pDM_Odm->pBandType == ODM_BAND_5G ) -+ { -+ if(pDM_FatTable->idx_AntDiv_counter_5G < pDM_Odm->antdiv_period ) -+ { -+ pDM_FatTable->idx_AntDiv_counter_5G++; -+ return; -+ } -+ else -+ pDM_FatTable->idx_AntDiv_counter_5G=0; -+ } -+ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) -+ { -+ if(pDM_FatTable->idx_AntDiv_counter_2G < pDM_Odm->antdiv_period ) -+ { -+ pDM_FatTable->idx_AntDiv_counter_2G++; -+ return; -+ } -+ else -+ pDM_FatTable->idx_AntDiv_counter_2G=0; -+ } -+ -+ //---------- -+ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); -+ return; -+ } -+ -+ //---------- -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ if (pDM_FatTable->enable_ctrl_frame_antdiv) { -+ -+ if ((pDM_Odm->data_frame_num <= 10) && (pDM_Odm->bLinked)) -+ pDM_FatTable->use_ctrl_frame_antdiv = 1; -+ else -+ pDM_FatTable->use_ctrl_frame_antdiv = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n", pDM_FatTable->use_ctrl_frame_antdiv, pDM_Odm->data_frame_num)); -+ pDM_Odm->data_frame_num = 0; -+ } -+ -+ if(pAdapter->MgntInfo.AntennaTest) -+ return; -+ -+ { -+ #if (BEAMFORMING_SUPPORT == 1) -+ BEAMFORMING_CAP BeamformCap = (pDM_Odm->BeamformingInfo.BeamformCap); -+ -+ if( BeamformCap & BEAMFORMEE_CAP ) // BFmee On && Div On -> Div Off -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ AntDiv : OFF ] BFmee ==1 \n")); -+ if(pDM_FatTable->fix_ant_bfee == 0) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ pDM_FatTable->fix_ant_bfee = 1; -+ } -+ return; -+ } -+ else // BFmee Off && Div Off -> Div On -+ { -+ if((pDM_FatTable->fix_ant_bfee == 1) && pDM_Odm->bLinked) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ AntDiv : ON ] BFmee ==0\n")); -+ if((pDM_Odm->AntDivType!=S0S1_SW_ANTDIV) ) -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); -+ -+ pDM_FatTable->fix_ant_bfee = 0; -+ } -+ } -+ #endif -+ } -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ //----------just for fool proof -+ -+ if(pDM_Odm->antdiv_rssi) -+ pDM_Odm->DebugComponents |= ODM_COMP_ANT_DIV; -+ else -+ pDM_Odm->DebugComponents &= ~ODM_COMP_ANT_DIV; -+ -+ if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) -+ { -+ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G AntDiv Running ]\n")); -+ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) -+ return; -+ } -+ else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) -+ { -+ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 5G AntDiv Running ]\n")); -+ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) -+ return; -+ } -+ //else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) -+ //{ -+ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G & 5G AntDiv Running ]\n")); -+ //} -+#endif -+ -+ //---------- -+ -+ if (pDM_Odm->antdiv_select==1) -+ pDM_Odm->AntType = ODM_FIX_MAIN_ANT; -+ else if (pDM_Odm->antdiv_select==2) -+ pDM_Odm->AntType = ODM_FIX_AUX_ANT; -+ else //if (pDM_Odm->antdiv_select==0) -+ pDM_Odm->AntType = ODM_AUTO_ANT; -+ -+ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("AntType= (( %d )) , pre_AntType= (( %d )) \n",pDM_Odm->AntType,pDM_Odm->pre_AntType)); -+ -+ if(pDM_Odm->AntType != ODM_AUTO_ANT) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fix Antenna at (( %s ))\n",(pDM_Odm->AntType == ODM_FIX_MAIN_ANT)?"MAIN":"AUX")); -+ -+ if(pDM_Odm->AntType != pDM_Odm->pre_AntType) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); -+ -+ if(pDM_Odm->AntType == ODM_FIX_MAIN_ANT) -+ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); -+ else if(pDM_Odm->AntType == ODM_FIX_AUX_ANT) -+ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); -+ } -+ pDM_Odm->pre_AntType=pDM_Odm->AntType; -+ return; -+ } -+ else -+ { -+ if(pDM_Odm->AntType != pDM_Odm->pre_AntType) -+ { -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); -+ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); -+ } -+ pDM_Odm->pre_AntType=pDM_Odm->AntType; -+ } -+ -+ -+ //3 ----------------------------------------------------------------------------------------------------------- -+ //2 [--88E---] -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ #if (RTL8188E_SUPPORT == 1) -+ if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV ||pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV) -+ odm_HW_AntDiv(pDM_Odm); -+ -+ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) -+ odm_FastAntTraining(pDM_Odm); -+ #endif -+ -+ #endif -+ -+ } -+ //2 [--92E---] -+ #if (RTL8192E_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ if(pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV || pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) -+ odm_HW_AntDiv(pDM_Odm); -+ -+ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) -+ odm_FastAntTraining(pDM_Odm); -+ #endif -+ -+ } -+ #endif -+ -+ #if (RTL8723B_SUPPORT == 1) -+ //2 [--8723B---] -+ else if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if (phydm_IsBtEnable_8723b(pDM_Odm)) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BT is enable!!!] AntDiv: OFF\n")); -+ if (pDM_FatTable->bBecomeLinked == TRUE) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set REG 948[9:6]=0x0\n")); -+ if (pDM_Odm->SupportICType == ODM_RTL8723B) -+ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9|BIT8|BIT7|BIT6, 0x0); -+ -+ pDM_FatTable->bBecomeLinked = FALSE; -+ } -+ } else { -+ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { -+ -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); -+ #endif -+ } else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) -+ odm_HW_AntDiv(pDM_Odm); -+ } -+ } -+ #endif -+ -+ //2 [--8821A---] -+ #if (RTL8821A_SUPPORT == 1) -+ else if (pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { -+ -+ if (pdm_sat_table->fix_beam_pattern_en != 0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", pdm_sat_table->fix_beam_pattern_codeword)); -+ /*return;*/ -+ } else { -+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] AntDivType = HL_SW_SMART_ANT_TYPE1\n"));*/ -+ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); -+ } -+ -+ } else -+ #endif -+ { -+ if (!pDM_Odm->bBtEnabled) /*BT disabled*/ -+ { -+ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { -+ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [S0S1_SW_ANTDIV] -> [CG_TRX_HW_ANTDIV]\n")); -+ /*ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 1); */ -+ if (pDM_FatTable->bBecomeLinked == TRUE) -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); -+ } -+ -+ } else { /*BT enabled*/ -+ -+ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [CG_TRX_HW_ANTDIV] -> [S0S1_SW_ANTDIV]\n")); -+ /*ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 0);*/ -+ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); -+ } -+ } -+ -+ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { -+ -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); -+ #endif -+ } else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) -+ odm_HW_AntDiv(pDM_Odm); -+ } -+ } -+ #endif -+ -+ //2 [--8881A---] -+ #if (RTL8881A_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8881A) -+ odm_HW_AntDiv(pDM_Odm); -+ #endif -+ -+ //2 [--8812A---] -+ #if (RTL8812A_SUPPORT == 1) -+ else if(pDM_Odm->SupportICType == ODM_RTL8812) -+ odm_HW_AntDiv(pDM_Odm); -+ #endif -+ -+ #if (RTL8188F_SUPPORT == 1) -+ /* [--8188F---]*/ -+ else if (pDM_Odm->SupportICType == ODM_RTL8188F) { -+ -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); -+ #endif -+ } -+ #endif -+ -+} -+ -+ -+VOID -+odm_AntselStatistics( -+ IN PVOID pDM_VOID, -+ IN u1Byte antsel_tr_mux, -+ IN u4Byte MacId, -+ IN u4Byte utility, -+ IN u1Byte method -+ -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ if(method==RSSI_METHOD) -+ { -+ if(antsel_tr_mux == ANT1_2G) -+ { -+ pDM_FatTable->MainAnt_Sum[MacId]+=utility; -+ pDM_FatTable->MainAnt_Cnt[MacId]++; -+ } -+ else -+ { -+ pDM_FatTable->AuxAnt_Sum[MacId]+=utility; -+ pDM_FatTable->AuxAnt_Cnt[MacId]++; -+ } -+ } -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ else if(method==EVM_METHOD) -+ { -+ if(antsel_tr_mux == ANT1_2G) -+ { -+ pDM_FatTable->MainAntEVM_Sum[MacId]+=(utility<<5); -+ pDM_FatTable->MainAntEVM_Cnt[MacId]++; -+ } -+ else -+ { -+ pDM_FatTable->AuxAntEVM_Sum[MacId]+=(utility<<5); -+ pDM_FatTable->AuxAntEVM_Cnt[MacId]++; -+ } -+ } -+ else if(method==CRC32_METHOD) -+ { -+ if(utility==0) -+ pDM_FatTable->CRC32_Fail_Cnt++; -+ else -+ pDM_FatTable->CRC32_Ok_Cnt+=utility; -+ } -+ #endif -+} -+ -+ -+VOID -+ODM_Process_RSSIForAntDiv( -+ IN OUT PVOID pDM_VOID, -+ IN PVOID p_phy_info_void, -+ IN PVOID p_pkt_info_void -+ //IN PODM_PHY_INFO_T pPhyInfo, -+ //IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; -+ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; -+ u1Byte isCCKrate=0,CCKMaxRate=ODM_RATE11M; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); -+ u4Byte beam_tmp; -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ u4Byte RxPower_Ant0, RxPower_Ant1; -+ u4Byte RxEVM_Ant0, RxEVM_Ant1; -+ #else -+ u1Byte RxPower_Ant0, RxPower_Ant1; -+ u1Byte RxEVM_Ant0, RxEVM_Ant1; -+ #endif -+ -+ CCKMaxRate=ODM_RATE11M; -+ isCCKrate = (pPktinfo->DataRate <= CCKMaxRate)?TRUE:FALSE; -+ -+ if ((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8812)) && (pPktinfo->DataRate > CCKMaxRate)) -+ { -+ RxPower_Ant0 = pPhyInfo->RxMIMOSignalStrength[0]; -+ RxPower_Ant1= pPhyInfo->RxMIMOSignalStrength[1]; -+ -+ RxEVM_Ant0 =pPhyInfo->RxMIMOSignalQuality[0]; -+ RxEVM_Ant1 =pPhyInfo->RxMIMOSignalQuality[1]; -+ } -+ else -+ RxPower_Ant0=pPhyInfo->RxPWDBAll; -+ -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) -+ { -+ if ((pDM_Odm->SupportICType & ODM_HL_SMART_ANT_TYPE1_SUPPORT) && -+ (pPktinfo->bPacketToSelf) && -+ (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) -+ ) { -+ -+ if (pdm_sat_table->pkt_skip_statistic_en == 0) { -+ /* -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", -+ pPktinfo->StationID, pDM_FatTable->antsel_rx_keep_0, pDM_FatTable->hw_antsw_occur, pdm_sat_table->fast_training_beam_num, RxPower_Ant0)); -+ */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antsel_pathA = ((%d)), bPacketToSelf = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", -+ pPktinfo->StationID, pDM_FatTable->antsel_rx_keep_0, pPktinfo->bPacketToSelf, pdm_sat_table->fast_training_beam_num, RxPower_Ant0)); -+ -+ -+ pdm_sat_table->pkt_rssi_sum[pDM_FatTable->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num] += RxPower_Ant0; -+ pdm_sat_table->pkt_rssi_cnt[pDM_FatTable->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num]++; -+ pdm_sat_table->pkt_counter++; -+ -+ /*swich beam every N pkt*/ -+ if ((pdm_sat_table->pkt_counter) >= (pdm_sat_table->per_beam_training_pkt_num)) { -+ -+ pdm_sat_table->pkt_counter = 0; -+ beam_tmp = pdm_sat_table->fast_training_beam_num; -+ -+ if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant-1)) { -+ -+ pDM_FatTable->FAT_State = FAT_DECISION_STATE; -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); -+ #else -+ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_decision_workitem); -+ #endif -+ -+ -+ } else { -+ pdm_sat_table->fast_training_beam_num++; -+ phydm_set_all_ant_same_beam_num(pDM_Odm); -+ -+ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num)); -+ } -+ } -+ } -+ } -+ } else -+ #endif -+ if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) { -+ if( (pDM_Odm->SupportICType & ODM_SMART_ANT_SUPPORT) && (pPktinfo->bPacketToSelf) && (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) )//(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon)) -+ { -+ u1Byte antsel_tr_mux; -+ antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; -+ pDM_FatTable->antSumRSSI[antsel_tr_mux] += RxPower_Ant0; -+ pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; -+ } -+ } -+ else //AntDivType != CG_TRX_SMART_ANTDIV -+ { -+ if ((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pPktinfo->bPacketToSelf || pDM_FatTable->use_ctrl_frame_antdiv)) -+ { -+ if(pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID,RxPower_Ant0,RSSI_METHOD); -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ if(!isCCKrate) -+ { -+ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID,RxEVM_Ant0,EVM_METHOD); -+ } -+ #endif -+ } -+ else// SupportICType == ODM_RTL8821 and ODM_RTL8723B and ODM_RTL8812) -+ { -+ if(isCCKrate && (pDM_Odm->AntDivType == S0S1_SW_ANTDIV)) -+ { -+ pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; -+ -+ -+ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) -+ pDM_FatTable->CCK_counter_main++; -+ else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) -+ pDM_FatTable->CCK_counter_aux++; -+ -+ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0,RSSI_METHOD); -+ } -+ else -+ { -+ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) -+ pDM_FatTable->OFDM_counter_main++; -+ else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) -+ pDM_FatTable->OFDM_counter_aux++; -+ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0,RSSI_METHOD); -+ } -+ } -+ } -+ } -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("isCCKrate=%d, PWDB_ALL=%d\n",isCCKrate, pPhyInfo->RxPWDBAll)); -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n",pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+VOID -+ODM_SetTxAntByTxInfo( -+ IN PVOID pDM_VOID, -+ IN pu1Byte pDesc, -+ IN u1Byte macId -+ -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) -+ return; -+ -+ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) -+ return; -+ -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8723B) { -+#if (RTL8723B_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_8723B(pDesc, pDM_FatTable->antsel_a[macId]); -+ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8723B] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", -+ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ -+#endif -+ } else if (pDM_Odm->SupportICType == ODM_RTL8821) { -+#if (RTL8821A_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_8812(pDesc, pDM_FatTable->antsel_a[macId]); -+ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8821A] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", -+ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ -+#endif -+ } else if (pDM_Odm->SupportICType == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]); -+ SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]); -+ SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]); -+ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8188E] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", -+ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ -+#endif -+ } -+} -+#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+VOID -+ODM_SetTxAntByTxInfo( -+ struct rtl8192cd_priv *priv, -+ struct tx_desc *pdesc, -+ unsigned short aid -+) -+{ -+ pFAT_T pDM_FatTable = &priv->pshare->_dmODM.DM_FatTable; -+ u4Byte SupportICType = priv->pshare->_dmODM.SupportICType; -+ -+ if (SupportICType == ODM_RTL8881A) { -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__); */ -+ pdesc->Dword6 &= set_desc(~(BIT(18)|BIT(17)|BIT(16))); -+ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); -+ } else if (SupportICType == ODM_RTL8192E) { -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__); */ -+ pdesc->Dword6 &= set_desc(~(BIT(18)|BIT(17)|BIT(16))); -+ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); -+ } else if (SupportICType == ODM_RTL8188E) { -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8188E******\n",__FUNCTION__,__LINE__);*/ -+ pdesc->Dword2 &= set_desc(~BIT(24)); -+ pdesc->Dword2 &= set_desc(~BIT(25)); -+ pdesc->Dword7 &= set_desc(~BIT(29)); -+ -+ pdesc->Dword2 |= set_desc(pDM_FatTable->antsel_a[aid]<<24); -+ pdesc->Dword2 |= set_desc(pDM_FatTable->antsel_b[aid]<<25); -+ pdesc->Dword7 |= set_desc(pDM_FatTable->antsel_c[aid]<<29); -+ -+ -+ } else if (SupportICType == ODM_RTL8812) { -+ /*[path-A]*/ -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);*/ -+ -+ pdesc->Dword6 &= set_desc(~BIT(16)); -+ pdesc->Dword6 &= set_desc(~BIT(17)); -+ pdesc->Dword6 &= set_desc(~BIT(18)); -+ -+ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); -+ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_b[aid]<<17); -+ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_c[aid]<<18); -+ -+ } -+} -+#endif -+ -+ -+VOID -+ODM_AntDiv_Config( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("WIN Config Antenna Diversity\n")); -+ if(pDM_Odm->SupportICType==ODM_RTL8723B) -+ { -+ if((!pDM_Odm->DM_SWAT_Table.ANTA_ON || !pDM_Odm->DM_SWAT_Table.ANTB_ON)) -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ } -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CE Config Antenna Diversity\n")); -+ if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) -+ { -+ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; -+ } -+ -+ if(pDM_Odm->SupportICType==ODM_RTL8723B) -+ { -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ } -+ -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("AP Config Antenna Diversity\n")); -+ -+ //2 [ NOT_SUPPORT_ANTDIV ] -+ #if(defined(CONFIG_NOT_SUPPORT_ANTDIV)) -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n")); -+ -+ //2 [ 2G&5G_SUPPORT_ANTDIV ] -+ #elif(defined(CONFIG_2G5G_SUPPORT_ANTDIV)) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously \n")); -+ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G|ODM_ANTDIV_5G); -+ -+ if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) -+ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; -+ if(*pDM_Odm->pBandType == ODM_BAND_5G ) -+ { -+ #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) -+ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); -+ panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); -+ #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY)||defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) -+ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); -+ panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); -+ #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); -+ #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); -+ #endif -+ } -+ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) -+ { -+ #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) -+ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); -+ #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) -+ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); -+ #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); -+ #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); -+ #endif -+ } -+ -+ //2 [ 5G_SUPPORT_ANTDIV ] -+ #elif(defined(CONFIG_5G_SUPPORT_ANTDIV)) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n")); -+ panic_printk("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); -+ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_5G); -+ if(*pDM_Odm->pBandType == ODM_BAND_5G ) -+ { -+ if(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC) -+ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; -+ #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) -+ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); -+ panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); -+ #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY) ) -+ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); -+ #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); -+ #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); -+ #endif -+ } -+ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 2G AntDivType\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ } -+ -+ //2 [ 2G_SUPPORT_ANTDIV ] -+ #elif(defined(CONFIG_2G_SUPPORT_ANTDIV)) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n")); -+ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G); -+ if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) -+ { -+ if(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC) -+ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; -+ #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) -+ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); -+ #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) ) -+ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); -+ #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); -+ #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) -+ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); -+ #endif -+ } -+ else if(*pDM_Odm->pBandType == ODM_BAND_5G ) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 5G AntDivType\n")); -+ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); -+ } -+ #endif -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SupportAbility = (( %x ))\n", pDM_Odm->SupportAbility )); -+ -+} -+ -+ -+VOID -+ODM_AntDivTimers( -+ IN PVOID pDM_VOID, -+ IN u1Byte state -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if(state==INIT_ANTDIV_TIMMER) -+ { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ ODM_InitializeTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer), -+ (RT_TIMER_CALL_BACK)ODM_SW_AntDiv_Callback, NULL, "phydm_SwAntennaSwitchTimer"); -+ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, -+ (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); -+ #endif -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ ODM_InitializeTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, -+ (RT_TIMER_CALL_BACK)odm_EVM_FastAntTrainingCallback, NULL, "EVM_FastAntTrainingTimer"); -+ #endif -+ } -+ else if(state==CANCEL_ANTDIV_TIMMER) -+ { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ ODM_CancelTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer)); -+ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); -+ #endif -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ ODM_CancelTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer); -+ #endif -+ } -+ else if(state==RELEASE_ANTDIV_TIMMER) -+ { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ ODM_ReleaseTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer)); -+ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+ ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); -+ #endif -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer); -+ #endif -+ } -+ -+} -+ -+#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ -+ -+VOID -+ODM_AntDivReset( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) -+ { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_S0S1_SWAntDiv_Reset(pDM_Odm); -+ #endif -+ } -+ -+} -+ -+VOID -+odm_AntennaDiversityInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if(pDM_Odm->mp_mode == TRUE) -+ return; -+ -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ ODM_AntDiv_Config(pDM_Odm); -+ ODM_AntDivInit(pDM_Odm); -+ #endif -+} -+ -+VOID -+odm_AntennaDiversity( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if(pDM_Odm->mp_mode == TRUE) -+ return; -+ -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ ODM_AntDiv(pDM_Odm); -+ #endif -+} -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//====================================================== ++// when antenna test utility is on or some testing need to disable antenna diversity ++// call this function to disable all ODM related mechanisms which will switch antenna. ++//====================================================== ++VOID ++ODM_StopAntennaSwitchDm( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ // disable ODM antenna diversity ++ pDM_Odm->SupportAbility &= ~ODM_BB_ANT_DIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("STOP Antenna Diversity \n")); ++} ++ ++VOID ++ODM_SetAntConfig( ++ IN PVOID pDM_VOID, ++ IN u1Byte antSetting // 0=A, 1=B, 2=C, .... ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(antSetting == 0) // ant A ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ else if(antSetting == 1) ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ } ++} ++ ++//====================================================== ++ ++ ++VOID ++ODM_SwAntDivRestAfterLink( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte i; ++ ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ pDM_SWAT_Table->Double_chk_flag= 0; ++ ++ pDM_FatTable->RxIdleAnt=MAIN_ANT; ++ ++ for (i=0; iMainAnt_Sum[i] = 0; ++ pDM_FatTable->AuxAnt_Sum[i] = 0; ++ pDM_FatTable->MainAnt_Cnt[i] = 0; ++ pDM_FatTable->AuxAnt_Cnt[i] = 0; ++ } ++ ++ } ++} ++ ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++VOID ++odm_AntDiv_on_off( ++ IN PVOID pDM_VOID , ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_FatTable->AntDiv_OnOff != swch) ++ { ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) ++ return; ++ ++ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) N-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable ++ ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable ++ } ++ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) AC-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable ++ ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, swch); //OFDM AntDiv function block enable ++ ++ if( (pDM_Odm->CutVersion >= ODM_CUT_C) && (pDM_Odm->SupportICType == ODM_RTL8821) && ( pDM_Odm->AntDivType != S0S1_SW_ANTDIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) CCK HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ++ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, swch); ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, swch); //CCK AntDiv function block enable ++ } ++ } ++ } ++ } ++ pDM_FatTable->AntDiv_OnOff =swch; ++ ++} ++ ++VOID ++phydm_FastTraining_enable( ++ IN PVOID pDM_VOID, ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte enable; ++ ++ if (swch == FAT_ON) ++ enable=1; ++ else ++ enable=0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fast Ant Training_en = ((%d))\n", enable)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) { ++ ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, enable); /*enable fast training*/ ++ /**/ ++ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { ++ ODM_SetBBReg(pDM_Odm, 0xB34 , BIT28, enable); /*enable fast training (path-A)*/ ++ /*ODM_SetBBReg(pDM_Odm, 0xB34 , BIT29, enable);*/ /*enable fast training (path-B)*/ ++ } else if (pDM_Odm->SupportICType == ODM_RTL8821) { ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT19, enable); /*enable fast training */ ++ /**/ ++ } ++} ++ ++VOID ++odm_Tx_By_TxDesc_or_Reg( ++ IN PVOID pDM_VOID, ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte enable; ++ ++ enable = (swch == TX_BY_DESC) ? 1 : 0; ++ ++ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) ++ { ++ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, enable); ++ } ++ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, enable); ++ } ++ } ++} ++ ++VOID ++ODM_UpdateRxIdleAnt( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte DefaultAnt, OptionalAnt,value32; ++ ++ if(pDM_FatTable->RxIdleAnt != Ant) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ if(!(pDM_Odm->SupportICType & ODM_RTL8723B)) ++ pDM_FatTable->RxIdleAnt = Ant; ++ ++ if(Ant == MAIN_ANT) ++ { ++ DefaultAnt = ANT1_2G; ++ OptionalAnt = ANT2_2G; ++ } ++ else ++ { ++ DefaultAnt = ANT2_2G; ++ OptionalAnt = ANT1_2G; ++ } ++ ++ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ++ { ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT8|BIT7|BIT6, OptionalAnt);//Optional RX ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt);//Default TX ++ } ++ #if (RTL8723B_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0x948, 0xFFF); ++ ++ if(value32 !=0x280) ++ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, Ant, DefaultAnt, OptionalAnt); ++ else { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n")); ++ /**/ ++ } ++ } ++ #endif ++ else { /*8188E & 8188F*/ ++ ++ #if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ phydm_update_rx_idle_antenna_8188F(pDM_Odm, DefaultAnt); ++ /**/ ++ } ++ #endif ++ ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); /*Default RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); /*Optional RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); /*Default TX*/ ++ } ++ } ++ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ++ { ++ u2Byte value16 = ODM_Read2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2); ++ // ++ // 2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to prevnt ++ // incorrect 0xc08 bit0-15 .We still not know why it is changed. ++ // ++ value16 &= ~(BIT11|BIT10|BIT9|BIT8|BIT7|BIT6|BIT5|BIT4|BIT3); ++ value16 |= ((u2Byte)DefaultAnt <<3); ++ value16 |= ((u2Byte)OptionalAnt <<6); ++ value16 |= ((u2Byte)DefaultAnt <<9); ++ ODM_Write2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2, value16); ++ /* ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT21|BIT20|BIT19, DefaultAnt); //Default RX ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT24|BIT23|BIT22, OptionalAnt);//Optional RX ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT27|BIT26|BIT25, DefaultAnt); //Default TX ++ */ ++ } ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ { ++ ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT7|BIT6, DefaultAnt); //PathA Resp Tx ++ } ++ else ++ { ++ ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT10|BIT9|BIT8, DefaultAnt); //PathA Resp Tx ++ } ++ ++ } ++ else// pDM_FatTable->RxIdleAnt == Ant ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Stay in Ori-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ pDM_FatTable->RxIdleAnt = Ant; ++ } ++} ++ ++VOID ++odm_UpdateTxAnt( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant, ++ IN u4Byte MacId ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u1Byte TxAnt; ++ ++ if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) ++ { ++ TxAnt=Ant; ++ } ++ else ++ { ++ if(Ant == MAIN_ANT) ++ TxAnt = ANT1_2G; ++ else ++ TxAnt = ANT2_2G; ++ } ++ ++ pDM_FatTable->antsel_a[MacId] = TxAnt&BIT0; ++ pDM_FatTable->antsel_b[MacId] = (TxAnt&BIT1)>>1; ++ pDM_FatTable->antsel_c[MacId] = (TxAnt&BIT2)>>2; ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tx from TxInfo]: MacID:(( %d )), TxAnt = (( %s ))\n", MacId,(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=(( 3'b%d%d%d ))\n",pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] )); ++ ++} ++ ++#ifdef BEAMFORMING_SUPPORT ++#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++VOID ++odm_BDC_Init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable=&pDM_Odm->DM_BdcTable; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n[ BDC Initialization......] \n")); ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ pDM_BdcTable->BDC_Mode=BDC_MODE_NULL; ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDCcoexType_wBfer=0; ++ pDM_Odm->bdc_holdstate=0xff; ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xd7c , 0x0FFFFFFF, 0x1081008); ++ ODM_SetBBReg(pDM_Odm, 0xd80 , 0x0FFFFFFF, 0); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x9b0 , 0x0FFFFFFF, 0x1081008); //0x9b0[30:0] = 01081008 ++ ODM_SetBBReg(pDM_Odm, 0x9b4 , 0x0FFFFFFF, 0); //0x9b4[31:0] = 00000000 ++ } ++ ++} ++ ++ ++VOID ++odm_CSI_on_off( ++ IN PVOID pDM_VOID, ++ IN u1Byte CSI_en ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(CSI_en==CSI_ON) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetMACReg(pDM_Odm, 0xd84 , BIT11, 1); //0xd84[11]=1 ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ ODM_SetMACReg(pDM_Odm, 0x9b0 , BIT31, 1); //0x9b0[31]=1 ++ } ++ ++ } ++ else if(CSI_en==CSI_OFF) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetMACReg(pDM_Odm, 0xd84 , BIT11, 0); //0xd84[11]=0 ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ ODM_SetMACReg(pDM_Odm, 0x9b0 , BIT31, 0); //0x9b0[31]=0 ++ } ++ } ++} ++ ++VOID ++odm_BDCcoexType_withBferClient( ++ IN PVOID pDM_VOID, ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ u1Byte BDCcoexType_wBfer; ++ ++ if(swch==DIVON_CSIOFF) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BDCcoexType: 1] {DIV,CSI} ={1,0} \n")); ++ BDCcoexType_wBfer=1; ++ ++ if(BDCcoexType_wBfer != pDM_BdcTable->BDCcoexType_wBfer) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ odm_CSI_on_off(pDM_Odm,CSI_OFF); ++ pDM_BdcTable->BDCcoexType_wBfer=1; ++ } ++ } ++ else if(swch==DIVOFF_CSION) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BDCcoexType: 2] {DIV,CSI} ={0,1}\n")); ++ BDCcoexType_wBfer=2; ++ ++ if(BDCcoexType_wBfer != pDM_BdcTable->BDCcoexType_wBfer) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ odm_CSI_on_off(pDM_Odm,CSI_ON); ++ pDM_BdcTable->BDCcoexType_wBfer=2; ++ } ++ } ++} ++ ++VOID ++odm_BF_AntDiv_ModeArbitration( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ u1Byte current_BDC_Mode; ++ ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n")); ++ ++ //2 Mode 1 ++ if((pDM_BdcTable->num_Txbfee_Client !=0) && (pDM_BdcTable->num_Txbfer_Client == 0)) ++ { ++ current_BDC_Mode=BDC_MODE_1; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_1; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ pDM_BdcTable->BDC_RxIdleUpdate_counter=1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode1 ))\n")); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode1 ))\n")); ++ } ++ //2 Mode 2 ++ else if((pDM_BdcTable->num_Txbfee_Client ==0) && (pDM_BdcTable->num_Txbfer_Client != 0)) ++ { ++ current_BDC_Mode=BDC_MODE_2; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_2; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ pDM_BdcTable->BDC_Try_flag=0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode2 ))\n")); ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode2 ))\n")); ++ } ++ //2 Mode 3 ++ else if((pDM_BdcTable->num_Txbfee_Client !=0) && (pDM_BdcTable->num_Txbfer_Client != 0)) ++ { ++ current_BDC_Mode=BDC_MODE_3; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_3; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_RxIdleUpdate_counter=1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode3 ))\n")); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode3 ))\n")); ++ } ++ //2 Mode 4 ++ else if((pDM_BdcTable->num_Txbfee_Client ==0) && (pDM_BdcTable->num_Txbfer_Client == 0)) ++ { ++ current_BDC_Mode=BDC_MODE_4; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_4; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode4 ))\n")); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode4 ))\n")); ++ } ++ #endif ++ ++} ++ ++VOID ++odm_DivTrainState_setting( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable=&pDM_Odm->DM_BdcTable; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n*****[S T A R T ]***** [2-0. DIV_TRAIN_STATE] \n")); ++ pDM_BdcTable->BDC_Try_counter =2; ++ pDM_BdcTable->BDC_Try_flag=1; ++ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++} ++ ++VOID ++odm_BDCcoex_BFeeRxDiv_Arbitration( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ BOOLEAN StopBF_flag; ++ u1Byte BDC_active_Mode; ++ ++ ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{ num_BFee, num_BFer , num_Client} = (( %d , %d , %d)) \n",pDM_BdcTable->num_Txbfee_Client,pDM_BdcTable->num_Txbfer_Client,pDM_BdcTable->num_Client)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{ num_BF_tars, num_DIV_tars } = (( %d , %d )) \n",pDM_BdcTable->num_BfTar , pDM_BdcTable->num_DivTar )); ++ ++ //2 [ MIB control ] ++ if (pDM_Odm->bdc_holdstate==2) ++ { ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ BF STATE] \n")); ++ return; ++ } ++ else if (pDM_Odm->bdc_holdstate==1) ++ { ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ DIV STATE] \n")); ++ return; ++ } ++ ++ //------------------------------------------------------------ ++ ++ ++ ++ //2 Mode 2 & 3 ++ if(pDM_BdcTable->BDC_Mode==BDC_MODE_2 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) ++ { ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n{ Try_flag , Try_counter } = { %d , %d } \n",pDM_BdcTable->BDC_Try_flag,pDM_BdcTable->BDC_Try_counter)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDCcoexType = (( %d )) \n\n", pDM_BdcTable->BDCcoexType_wBfer)); ++ ++ // All Client have Bfer-Cap------------------------------- ++ if(pDM_BdcTable->num_Txbfer_Client == pDM_BdcTable->num_Client) //BFer STA Only?: yes ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BFer STA only? (( Yes ))\n")); ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ return; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BFer STA only? (( No ))\n")); ++ } ++ // ++ if(pDM_BdcTable->bAll_BFSta_Idle==FALSE && pDM_BdcTable->bAll_DivSta_Idle==TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("All DIV-STA are idle, but BF-STA not\n")); ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ return; ++ } ++ else if(pDM_BdcTable->bAll_BFSta_Idle==TRUE && pDM_BdcTable->bAll_DivSta_Idle==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("All BF-STA are idle, but DIV-STA not\n")); ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ return; ++ } ++ ++ //Select active mode-------------------------------------- ++ if(pDM_BdcTable->num_BfTar ==0) // Selsect_1, Selsect_2 ++ { ++ if(pDM_BdcTable->num_DivTar ==0) // Selsect_3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 1 )) \n")); ++ pDM_BdcTable->BDC_active_Mode=1; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 2 ))\n")); ++ pDM_BdcTable->BDC_active_Mode=2; ++ } ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ return; ++ } ++ else // num_BfTar > 0 ++ { ++ if(pDM_BdcTable->num_DivTar ==0) // Selsect_3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 3 ))\n")); ++ pDM_BdcTable->BDC_active_Mode=3; ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ return; ++ } ++ else // Selsect_4 ++ { ++ BDC_active_Mode=4; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 4 ))\n")); ++ ++ if(BDC_active_Mode!=pDM_BdcTable->BDC_active_Mode) ++ { ++ pDM_BdcTable->BDC_active_Mode=4; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to active mode (( 4 )) & return!!! \n")); ++ return; ++ } ++ } ++ } ++ ++#if 1 ++ if (pDM_Odm->bdc_holdstate==0xff) ++ { ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ DIV STATE] \n")); ++ return; ++ } ++#endif ++ ++ // Does Client number changed ? ------------------------------- ++ if(pDM_BdcTable->num_Client !=pDM_BdcTable->pre_num_Client) ++ { ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ The number of client has been changed !!!] return to (( BDC_DIV_TRAIN_STATE )) \n")); ++ } ++ pDM_BdcTable->pre_num_Client=pDM_BdcTable->num_Client; ++ ++ if( pDM_BdcTable->BDC_Try_flag==0) ++ { ++ //2 DIV_TRAIN_STATE (Mode 2-0) ++ if(pDM_BdcTable->BDC_state==BDC_DIV_TRAIN_STATE) ++ { ++ odm_DivTrainState_setting( pDM_Odm); ++ } ++ //2 BFer_TRAIN_STATE (Mode 2-1) ++ else if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-1. BFer_TRAIN_STATE ]***** \n")); ++ ++ //if(pDM_BdcTable->num_BfTar==0) ++ //{ ++ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( No )), [ BDC_BFer_TRAIN_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ // odm_DivTrainState_setting( pDM_Odm); ++ //} ++ //else //num_BfTar != 0 ++ //{ ++ pDM_BdcTable->BDC_Try_counter=2; ++ pDM_BdcTable->BDC_Try_flag=1; ++ pDM_BdcTable->BDC_state=BDC_DECISION_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes )), [ BDC_BFer_TRAIN_STATE ] >> [BDC_DECISION_STATE] \n")); ++ //} ++ } ++ //2 DECISION_STATE (Mode 2-2) ++ else if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-2. DECISION_STATE]***** \n")); ++ //if(pDM_BdcTable->num_BfTar==0) ++ //{ ++ // ODM_AntDiv_Printk(("BF_tars exist? : (( No )), [ DECISION_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ // odm_DivTrainState_setting( pDM_Odm); ++ //} ++ //else //num_BfTar != 0 ++ //{ ++ if(pDM_BdcTable->BF_pass==FALSE || pDM_BdcTable->DIV_pass == FALSE) ++ StopBF_flag=TRUE; ++ else ++ StopBF_flag=FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes )), {BF_pass, DIV_pass, StopBF_flag } = { %d, %d, %d } \n" ,pDM_BdcTable->BF_pass,pDM_BdcTable->DIV_pass,StopBF_flag)); ++ ++ if(StopBF_flag==TRUE) //DIV_en ++ { ++ pDM_BdcTable->BDC_Hold_counter=10; //20 ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ StopBF_flag= ((TRUE)), BDC_DECISION_STATE ] >> [BDC_DIV_HOLD_STATE] \n")); ++ } ++ else //BF_en ++ { ++ pDM_BdcTable->BDC_Hold_counter=10; //20 ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[StopBF_flag= ((FALSE)), BDC_DECISION_STATE ] >> [BDC_BF_HOLD_STATE] \n")); ++ } ++ //} ++ } ++ //2 BF-HOLD_STATE (Mode 2-3) ++ else if(pDM_BdcTable->BDC_state==BDC_BF_HOLD_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-3. BF_HOLD_STATE ]*****\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDC_Hold_counter = (( %d )) \n",pDM_BdcTable->BDC_Hold_counter )); ++ ++ if(pDM_BdcTable->BDC_Hold_counter==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ odm_DivTrainState_setting( pDM_Odm); ++ } ++ else ++ { ++ pDM_BdcTable->BDC_Hold_counter--; ++ ++ //if(pDM_BdcTable->num_BfTar==0) ++ //{ ++ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( No )), [ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ // odm_DivTrainState_setting( pDM_Odm); ++ //} ++ //else //num_BfTar != 0 ++ //{ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes ))\n")); ++ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_BF_HOLD_STATE ] >> [BDC_BF_HOLD_STATE] \n")); ++ //} ++ } ++ ++ } ++ //2 DIV-HOLD_STATE (Mode 2-4) ++ else if(pDM_BdcTable->BDC_state==BDC_DIV_HOLD_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-4. DIV_HOLD_STATE ]*****\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDC_Hold_counter = (( %d )) \n",pDM_BdcTable->BDC_Hold_counter )); ++ ++ if(pDM_BdcTable->BDC_Hold_counter==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ odm_DivTrainState_setting( pDM_Odm); ++ } ++ else ++ { ++ pDM_BdcTable->BDC_Hold_counter--; ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_HOLD_STATE] \n")); ++ } ++ ++ } ++ ++ } ++ else if( pDM_BdcTable->BDC_Try_flag==1) ++ { ++ //2 Set Training Counter ++ if(pDM_BdcTable->BDC_Try_counter >1) ++ { ++ pDM_BdcTable->BDC_Try_counter--; ++ if(pDM_BdcTable->BDC_Try_counter ==1) ++ pDM_BdcTable->BDC_Try_flag=0; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training !!\n")); ++ //return ; ++ } ++ ++ } ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n[end]\n")); ++ ++ #endif //#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ ++ ++ ++ ++ ++} ++ ++#endif ++#endif //#ifdef BEAMFORMING_SUPPORT ++ ++ ++#if (RTL8188E_SUPPORT == 1) ++ ++ ++VOID ++odm_RX_HWAntDiv_Init_88E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); // 1:CG, 0:CS ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); ++ ++ //MAC Setting ++ value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 1); //Regb2c[22]=1'b0 //disable CS/CG switch ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0001); //antenna mapping table ++ ++ pDM_FatTable->enable_ctrl_frame_antdiv = 1; ++} ++ ++VOID ++odm_TRX_HWAntDiv_Init_88E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); //Default RX (0/1) ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV (SPDT)]\n")); ++ ++ //MAC Setting ++ value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ //antenna mapping table ++ if(!pDM_Odm->bIsMPChip) //testchip ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 ++ } ++ else //MPchip ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0201); /*Reg914=3'b010, Reg915=3'b001*/ ++ ++ pDM_FatTable->enable_ctrl_frame_antdiv = 1; ++} ++ ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++VOID ++odm_Smart_HWAntDiv_Init_88E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32, i; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType)); ++ return; ++ } ++ ++ pDM_FatTable->TrainIdx = 0; ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ ++ pDM_Odm->fat_comb_a=5; ++ pDM_Odm->antdiv_intvl = 0x64; // 100ms ++ ++ for(i=0; i<6; i++) ++ { ++ pDM_FatTable->Bssid[i] = 0; ++ } ++ for(i=0; i< (pDM_Odm->fat_comb_a) ; i++) ++ { ++ pDM_FatTable->antSumRSSI[i] = 0; ++ pDM_FatTable->antRSSIcnt[i] = 0; ++ pDM_FatTable->antAveRSSI[i] = 0; ++ } ++ ++ //MAC Setting ++ value32 = ODM_GetMACReg(pDM_Odm, 0x4c, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output ++ value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); //Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match ++ //value32 = PlatformEFIORead4Byte(Adapter, 0x7B4); ++ //PlatformEFIOWrite4Byte(Adapter, 0x7b4, value32|BIT18); //append MACID in reponse packet ++ ++ //Match MAC ADDR ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0); ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); ++ ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ++ ODM_SetBBReg(pDM_Odm, 0xb2c , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch ++ ODM_SetBBReg(pDM_Odm, 0xb2c , BIT31, 0); //Regb2c[31]=1'b1 //output at CS only ++ ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0); ++ ++ //antenna mapping table ++ if(pDM_Odm->fat_comb_a == 2) ++ { ++ if(!pDM_Odm->bIsMPChip) //testchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 ++ } ++ else //MPchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 1); ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); ++ } ++ } ++ else ++ { ++ if(!pDM_Odm->bIsMPChip) //testchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); //Reg858[10:8]=3'b000 ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); //Reg858[13:11]=3'b001 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT16, 0); ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT15|BIT14, 2); //(Reg878[0],Reg858[14:15])=3'b010 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT19|BIT18|BIT17, 3);//Reg878[3:1]=3b'011 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT22|BIT21|BIT20, 4);//Reg878[6:4]=3b'100 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT25|BIT24|BIT23, 5);//Reg878[9:7]=3b'101 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT28|BIT27|BIT26, 6);//Reg878[12:10]=3b'110 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT31|BIT30|BIT29, 7);//Reg878[15:13]=3b'111 ++ } ++ else //MPchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 4); // 0: 3b'000 ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); // 1: 3b'001 ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte2, 0); // 2: 3b'010 ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte3, 1); // 3: 3b'011 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte0, 3); // 4: 3b'100 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte1, 5); // 5: 3b'101 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte2, 6); // 6: 3b'110 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte3, 255); // 7: 3b'111 ++ } ++ } ++ ++ //Default Ant Setting when no fast training ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, 0); //Default RX ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, 1); //Optional RX ++ ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, 0);//Default TX ++ ++ //Enter Traing state ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, (pDM_Odm->fat_comb_a-1)); //Reg864[2:0]=3'd6 //ant combination=reg864[2:0]+1 ++ ++ //SW Control ++ //PHY_SetBBReg(Adapter, 0x864 , BIT10, 1); ++ //PHY_SetBBReg(Adapter, 0x870 , BIT9, 1); ++ //PHY_SetBBReg(Adapter, 0x870 , BIT8, 1); ++ //PHY_SetBBReg(Adapter, 0x864 , BIT11, 1); ++ //PHY_SetBBReg(Adapter, 0x860 , BIT9, 0); ++ //PHY_SetBBReg(Adapter, 0x860 , BIT8, 0); ++} ++#endif ++ ++#endif //#if (RTL8188E_SUPPORT == 1) ++ ++ ++#if (RTL8192E_SUPPORT == 1) ++VOID ++odm_RX_HWAntDiv_Init_92E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); ++ ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0);//Reg870[8]=1'b0, // "antsel" is controled by HWs ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 1); //Regc50[8]=1'b1 //" CS/CG switching" is controled by HWs ++ ++ //Mapping table ++ ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table ++ ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias ++ ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 ++ ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 0); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 ++ ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ //EVM enhance AntDiv method init---------------------------------------------------------------------- ++ pDM_FatTable->EVM_method_enable=0; ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ pDM_Odm->antdiv_intvl = 0x64; ++ ODM_SetBBReg(pDM_Odm, 0x910 , 0x3f, 0xf ); ++ pDM_Odm->antdiv_evm_en=1; ++ //pDM_Odm->antdiv_period=1; ++ ++ #endif ++ ++} ++ ++VOID ++odm_TRX_HWAntDiv_Init_92E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[ Only for DIR605, CG_TRX_HW_ANTDIV]\n")); ++ ++ //3 --RFE pin setting--------- ++ //[MAC] ++ ODM_SetMACReg(pDM_Odm, 0x38, BIT11, 1); //DBG PAD Driving control (GPIO 8) ++ ODM_SetMACReg(pDM_Odm, 0x4c, BIT23, 0); //path-A , RFE_CTRL_3 ++ ODM_SetMACReg(pDM_Odm, 0x4c, BIT29, 1); //path-A , RFE_CTRL_8 ++ //[BB] ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT3, 1); //RFE_buffer ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT8, 1); ++ ODM_SetBBReg(pDM_Odm, 0x940 , BIT7|BIT6, 0x0); // r_rfe_path_sel_ (RFE_CTRL_3) ++ ODM_SetBBReg(pDM_Odm, 0x940 , BIT17|BIT16, 0x0); // r_rfe_path_sel_ (RFE_CTRL_8) ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); //RFE_buffer ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT3, 0); //rfe_inv (RFE_CTRL_3) ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT8, 1); //rfe_inv (RFE_CTRL_8) ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF000, 0x8); //path-A , RFE_CTRL_3 ++ ODM_SetBBReg(pDM_Odm, 0x934 , 0xF, 0x8); //path-A , RFE_CTRL_8 ++ //3 ------------------------- ++ ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT8, 0); //path-A //disable CS/CG switch ++ ++/* Let it follows PHY_REG for bit9 setting ++ if(pDM_Odm->priv->pshare->rf_ft_var.use_ext_pa || pDM_Odm->priv->pshare->rf_ft_var.use_ext_lna) ++ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT9, 1);//path-A //output at CS ++ else ++ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT9, 0); //path-A //output at CG ->normal power ++*/ ++ ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); //path-A //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT10, 0); //path-A //antsel2 by HW ++ ++ //Mapping table ++ ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table ++ ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias ++ ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 ++ ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 0); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 ++ ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ //EVM enhance AntDiv method init---------------------------------------------------------------------- ++ pDM_FatTable->EVM_method_enable=0; ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ pDM_Odm->antdiv_intvl = 0x64; ++ ODM_SetBBReg(pDM_Odm, 0x910 , 0x3f, 0xf ); ++ pDM_Odm->antdiv_evm_en=1; ++ //pDM_Odm->antdiv_period=1; ++ #endif ++} ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++VOID ++odm_Smart_HWAntDiv_Init_92E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); ++} ++#endif ++ ++#endif //#if (RTL8192E_SUPPORT == 1) ++ ++ ++#if (RTL8723B_SUPPORT == 1) ++VOID ++odm_TRX_HWAntDiv_Init_8723B( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV(DPDT)]\n")); ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF, 0xa0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF000, 0x00); //bias ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ //BT Coexistence ++ ODM_SetBBReg(pDM_Odm, 0x864, BIT12, 0); //keep antsel_map when GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x874 , BIT23, 0); //Disable hw antsw & fast_train.antsw when GNT_BT=1 ++ ++ //Output Pin Settings ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0); // ++ ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0); //WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL) ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT7, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x40 , BIT3, 1); ++ ODM_SetMACReg(pDM_Odm, 0x38 , BIT11, 1); ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24|BIT23, 2); //select DPDT_P and DPDT_N as output pin ++ ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT0|BIT1, 3); //in/out ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); // ++ ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT1, 0); //DPDT_P non-inverse ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT0, 1); //DPDT_N inverse ++ ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ if(pDM_Odm->AntType == ODM_AUTO_ANT) ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable ++ ++} ++ ++ ++ ++VOID ++odm_S0S1_SWAntDiv_Init_8723B( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv] \n")); ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); ++ ++ //Output Pin Settings ++ //ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); ++ ++ pDM_FatTable->bBecomeLinked =FALSE; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ ODM_SetBBReg(pDM_Odm, 0x80C , BIT21, 0); //TX Ant by Reg ++ ++} ++ ++VOID ++ODM_UpdateRxIdleAnt_8723B( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant, ++ IN u4Byte DefaultAnt, ++ IN u4Byte OptionalAnt ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u1Byte count=0; ++ u1Byte u1Temp; ++ u1Byte H2C_Parameter; ++ ++ if(!pDM_Odm->bLinked) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to no link\n")); ++ return; ++ } ++ ++#if 0 ++ // Send H2C command to FW ++ // Enable wifi calibration ++ H2C_Parameter = TRUE; ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); ++ ++ // Check if H2C command sucess or not (0x1e6) ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); ++ while((u1Temp != 0x1) && (count < 100)) ++ { ++ ODM_delay_us(10); ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); ++ count++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: H2C command status = %d, count = %d\n", u1Temp, count)); ++ ++ if(u1Temp == 0x1) ++ { ++ // Check if BT is doing IQK (0x1e7) ++ count = 0; ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); ++ while((!(u1Temp & BIT0)) && (count < 100)) ++ { ++ ODM_delay_us(50); ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); ++ count++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: BT IQK status = %d, count = %d\n", u1Temp, count)); ++ ++ if(u1Temp & BIT0) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9, DefaultAnt); ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); //Default TX ++ pDM_FatTable->RxIdleAnt = Ant; ++ ++ // Set TX AGC by S0/S1 ++ // Need to consider Linux driver ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pAdapter->HalFunc.SetTxPowerLevelHandler(pAdapter, pHalData->CurrentChannel); ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ rtw_hal_set_tx_power_level(pAdapter, pHalData->CurrentChannel); ++#endif ++ ++ // Set IQC by S0/S1 ++ ODM_SetIQCbyRFpath(pDM_Odm,DefaultAnt); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Sucess to set RX antenna\n")); ++ } ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to BT IQK\n")); ++ } ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to H2C command fail\n")); ++ ++ // Send H2C command to FW ++ // Disable wifi calibration ++ H2C_Parameter = FALSE; ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); ++#else ++ ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9, DefaultAnt); ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); /*Default RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); /*Optional RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); /*Default TX*/ ++ pDM_FatTable->RxIdleAnt = Ant; ++ ++ /* Set TX AGC by S0/S1 */ ++ /* Need to consider Linux driver */ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pAdapter->HalFunc.SetTxPowerLevelHandler(pAdapter, pHalData->CurrentChannel); ++ #elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ rtw_hal_set_tx_power_level(pAdapter, pHalData->CurrentChannel); ++ #endif ++ ++ /* Set IQC by S0/S1 */ ++ ODM_SetIQCbyRFpath(pDM_Odm, DefaultAnt); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Success to set RX antenna\n")); ++ ++#endif ++} ++ ++BOOLEAN ++phydm_IsBtEnable_8723b( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte bt_state; ++ /*u4Byte reg75;*/ ++ ++ /*reg75 = ODM_GetBBReg(pDM_Odm, 0x74 , BIT8);*/ ++ /*ODM_SetBBReg(pDM_Odm, 0x74 , BIT8, 0x0);*/ ++ ODM_SetBBReg(pDM_Odm, 0xa0 , BIT24|BIT25|BIT26, 0x5); ++ bt_state = ODM_GetBBReg(pDM_Odm, 0xa0 , (BIT3|BIT2|BIT1|BIT0)); ++ /*ODM_SetBBReg(pDM_Odm, 0x74 , BIT8, reg75);*/ ++ ++ if ((bt_state == 4) || (bt_state == 7) || (bt_state == 9) || (bt_state == 13)) ++ return TRUE; ++ else ++ return FALSE; ++} ++#endif //#if (RTL8723B_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++VOID ++phydm_hl_smart_ant_type1_init_8821a( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte value32; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A SmartAnt_Init => AntDivType=[Hong-Lin Smart Ant Type1]\n")); ++ ++ /*---------------------------------------- ++ GPIO 2-3 for Beam control ++ reg0x66[2]=0 ++ reg0x44[27:26] = 0 ++ reg0x44[23:16] //enable_output for P_GPIO[7:0] ++ reg0x44[15:8] //output_value for P_GPIO[7:0] ++ reg0x40[1:0] = 0 //GPIO function ++ ------------------------------------------*/ ++ ++ /*GPIO Setting*/ ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT18, 0); ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT27|BIT26, 0); ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT19|BIT18, 0x3); /*enable_output for P_GPIO[3:2]*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT11|BIT10, 0);*/ /*output value*/ ++ ODM_SetMACReg(pDM_Odm, 0x40 , BIT1|BIT0, 0); /*GPIO function*/ ++ ++ /*Hong_lin smart antenna HW Setting*/ ++ pdm_sat_table->data_codeword_bit_num = 24;/*max=32*/ ++ pdm_sat_table->beam_patten_num_each_ant = 4; ++ ++ #if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++ pdm_sat_table->latch_time = 100; /*mu sec*/ ++ #elif DEV_BUS_TYPE == RT_USB_INTERFACE ++ pdm_sat_table->latch_time = 100; /*mu sec*/ ++ #endif ++ pdm_sat_table->pkt_skip_statistic_en = 0; ++ ++ pdm_sat_table->ant_num = 2;/*max=8*/ ++ ++ pdm_sat_table->fix_beam_pattern_en = 0; ++ pdm_sat_table->decision_holding_period = 0; ++ ++ /*beam training setting*/ ++ pdm_sat_table->pkt_counter = 0; ++ pdm_sat_table->per_beam_training_pkt_num = 10; ++ ++ /*set default beam*/ ++ pdm_sat_table->fast_training_beam_num = 0; ++ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ ++ pDM_FatTable->FAT_State = FAT_BEFORE_LINK_STATE; ++ ++ /*[BB] FAT Setting*/ ++ ODM_SetBBReg(pDM_Odm, 0xc08 , BIT18|BIT17|BIT16, pdm_sat_table->ant_num); ++ ODM_SetBBReg(pDM_Odm, 0xc08 , BIT31, 0); /*increase ant num every FAT period 0:+1, 1+2*/ ++ ODM_SetBBReg(pDM_Odm, 0x8c4 , BIT2|BIT1, 1); /*change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/ ++ ODM_SetBBReg(pDM_Odm, 0x8c4 , BIT0, 1); /*FAT_watchdog_en*/ ++ ++ value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /*Reg7B4[16]=1 enable antenna training */ ++ /*Reg7B4[17]=1 enable match MAC Addr*/ ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0);/*Match MAC ADDR*/ ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); ++ ++} ++#endif ++ ++VOID ++odm_TRX_HWAntDiv_Init_8821A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (DPDT)] \n")); ++ ++ //Output Pin Settings ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control ++ ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); ++ ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable ++ ++ //BT Coexistence ++ ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //response TX ant by RX ant ++ ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); ++ ++} ++ ++VOID ++odm_S0S1_SWAntDiv_Init_8821A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv]\n")); ++ ++ //Output Pin Settings ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control ++ ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); ++ ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable ++ ++ //BT Coexistence ++ ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //response TX ant by RX ant ++ ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); ++ ++ ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++ pDM_SWAT_Table->CurAntenna = MAIN_ANT; ++ pDM_SWAT_Table->PreAntenna = MAIN_ANT; ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ ++} ++#endif //#if (RTL8821A_SUPPORT == 1) ++ ++#if (RTL8881A_SUPPORT == 1) ++VOID ++odm_RX_HWAntDiv_Init_8881A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CGCS_RX_HW_ANTDIV] \n")); ++ ++} ++ ++VOID ++odm_TRX_HWAntDiv_Init_8881A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); ++ ++ //Output Pin Settings ++ // [SPDT related] ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT26, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT22, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT24, 1); ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF00, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000, 8); // DPDT_N = ANTSEL[0] ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug ++} ++ ++#endif //#if (RTL8881A_SUPPORT == 1) ++ ++ ++#if (RTL8812A_SUPPORT == 1) ++VOID ++odm_TRX_HWAntDiv_Init_8812A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8812A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); ++ ++ //3 //3 --RFE pin setting--------- ++ //[BB] ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT10|BIT9|BIT8, 0x0); //disable SW switch ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT17|BIT16, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0x974 , BIT7|BIT6, 0x3); // in/out ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT26, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT27, 1); ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF000000, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000000, 8); // DPDT_N = ANTSEL[0] ++ //3 ------------------------- ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug ++ ++} ++ ++#endif //#if (RTL8812A_SUPPORT == 1) ++ ++#if (RTL8188F_SUPPORT == 1) ++VOID ++odm_S0S1_SWAntDiv_Init_8188F( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188F AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv]\n")); ++ ++ ++ /*GPIO Setting*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x64 , BIT18, 0); */ ++ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT28|BIT27, 0);*/ ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT20|BIT19, 0x3); /*enable_output for P_GPIO[4:3]*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT12|BIT11, 0);*/ /*output value*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x40 , BIT1|BIT0, 0);*/ /*GPIO function*/ ++ ++ pDM_FatTable->bBecomeLinked = FALSE; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++} ++ ++VOID ++phydm_update_rx_idle_antenna_8188F( ++ IN PVOID pDM_VOID, ++ IN u4Byte default_ant ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte codeword; ++ ++ if (default_ant == ANT1_2G) ++ codeword = 1; /*2'b01*/ ++ else ++ codeword = 2;/*2'b10*/ ++ ++ ODM_SetMACReg(pDM_Odm, 0x44 , (BIT12|BIT11), codeword); /*GPIO[4:3] output value*/ ++} ++ ++#endif ++ ++ ++ ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++ ++VOID ++odm_EVM_FastAnt_Reset( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ pDM_FatTable->EVM_method_enable=0; ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ pDM_Odm->antdiv_period=0; ++ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 0); ++} ++ ++ ++VOID ++odm_EVM_Enhance_AntDiv( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Main_RSSI, Aux_RSSI ; ++ u4Byte Main_CRC_utility=0,Aux_CRC_utility=0,utility_ratio=1; ++ u4Byte Main_EVM, Aux_EVM,Diff_RSSI=0,diff_EVM=0; ++ u1Byte score_EVM=0,score_CRC=0; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte value32, i; ++ BOOLEAN Main_above1=FALSE,Aux_above1=FALSE; ++ BOOLEAN Force_antenna=FALSE; ++ PSTA_INFO_T pEntry; ++ pDM_FatTable->TargetAnt_enhance=0xFF; ++ ++ ++ if((pDM_Odm->SupportICType & ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC)) ++ { ++ if(pDM_Odm->bOneEntryOnly) ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[One Client only] \n")); ++ i = pDM_Odm->OneEntry_MACID; ++ ++ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; ++ ++ if((Main_RSSI==0 && Aux_RSSI !=0 && Aux_RSSI>=FORCE_RSSI_DIFF) || (Main_RSSI!=0 && Aux_RSSI==0 && Main_RSSI>=FORCE_RSSI_DIFF)) ++ { ++ Diff_RSSI=FORCE_RSSI_DIFF; ++ } ++ else if(Main_RSSI!=0 && Aux_RSSI !=0) ++ { ++ Diff_RSSI = (Main_RSSI>=Aux_RSSI)?(Main_RSSI-Aux_RSSI):(Aux_RSSI-Main_RSSI); ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n" , pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI)); ++ ++ if( ((Main_RSSI>=Evm_RSSI_TH_High||Aux_RSSI>=Evm_RSSI_TH_High )|| (pDM_FatTable->EVM_method_enable==1) ) ++ //&& (Diff_RSSI <= FORCE_RSSI_DIFF + 1) ++ ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_H || EVM_method_enable==1] && ")); ++ ++ if(((Main_RSSI>=Evm_RSSI_TH_Low)||(Aux_RSSI>=Evm_RSSI_TH_Low) )) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_L ] \n")); ++ ++ //2 [ Normal state Main] ++ if(pDM_FatTable->FAT_State == NORMAL_STATE_MIAN) ++ { ++ ++ pDM_FatTable->EVM_method_enable=1; ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ pDM_Odm->antdiv_period=3; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: MIAN] \n")); ++ pDM_FatTable->MainAntEVM_Sum[i] = 0; ++ pDM_FatTable->AuxAntEVM_Sum[i] = 0; ++ pDM_FatTable->MainAntEVM_Cnt[i] = 0; ++ pDM_FatTable->AuxAntEVM_Cnt[i] = 0; ++ ++ pDM_FatTable->FAT_State = NORMAL_STATE_AUX; ++ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 1); //Accept CRC32 Error packets. ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ ++ pDM_FatTable->CRC32_Ok_Cnt=0; ++ pDM_FatTable->CRC32_Fail_Cnt=0; ++ ODM_SetTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //m ++ } ++ //2 [ Normal state Aux ] ++ else if(pDM_FatTable->FAT_State == NORMAL_STATE_AUX) ++ { ++ pDM_FatTable->MainCRC32_Ok_Cnt=pDM_FatTable->CRC32_Ok_Cnt; ++ pDM_FatTable->MainCRC32_Fail_Cnt=pDM_FatTable->CRC32_Fail_Cnt; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: AUX] \n")); ++ pDM_FatTable->FAT_State = TRAINING_STATE; ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ ++ pDM_FatTable->CRC32_Ok_Cnt=0; ++ pDM_FatTable->CRC32_Fail_Cnt=0; ++ ODM_SetTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //ms ++ } ++ else if(pDM_FatTable->FAT_State == TRAINING_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Training state ] \n")); ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ ++ //3 [CRC32 statistic] ++ pDM_FatTable->AuxCRC32_Ok_Cnt=pDM_FatTable->CRC32_Ok_Cnt; ++ pDM_FatTable->AuxCRC32_Fail_Cnt=pDM_FatTable->CRC32_Fail_Cnt; ++ ++ if( (pDM_FatTable->MainCRC32_Ok_Cnt >= ((pDM_FatTable->AuxCRC32_Ok_Cnt)<<1)) || (Diff_RSSI>=18)) ++ { ++ pDM_FatTable->TargetAnt_CRC32=MAIN_ANT; ++ Force_antenna=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Main \n")); ++ } ++ else if((pDM_FatTable->AuxCRC32_Ok_Cnt >= ((pDM_FatTable->MainCRC32_Ok_Cnt)<<1)) || (Diff_RSSI>=18)) ++ { ++ pDM_FatTable->TargetAnt_CRC32=AUX_ANT; ++ Force_antenna=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Aux \n")); ++ } ++ else ++ { ++ if(pDM_FatTable->MainCRC32_Fail_Cnt<=5) ++ pDM_FatTable->MainCRC32_Fail_Cnt=5; ++ ++ if(pDM_FatTable->AuxCRC32_Fail_Cnt<=5) ++ pDM_FatTable->AuxCRC32_Fail_Cnt=5; ++ ++ if(pDM_FatTable->MainCRC32_Ok_Cnt >pDM_FatTable->MainCRC32_Fail_Cnt ) ++ Main_above1=TRUE; ++ ++ if(pDM_FatTable->AuxCRC32_Ok_Cnt >pDM_FatTable->AuxCRC32_Fail_Cnt ) ++ Aux_above1=TRUE; ++ ++ if(Main_above1==TRUE && Aux_above1==FALSE) ++ { ++ Force_antenna=TRUE; ++ pDM_FatTable->TargetAnt_CRC32=MAIN_ANT; ++ } ++ else if(Main_above1==FALSE && Aux_above1==TRUE) ++ { ++ Force_antenna=TRUE; ++ pDM_FatTable->TargetAnt_CRC32=AUX_ANT; ++ } ++ else if(Main_above1==TRUE && Aux_above1==TRUE) ++ { ++ Main_CRC_utility=((pDM_FatTable->MainCRC32_Ok_Cnt)<<7)/pDM_FatTable->MainCRC32_Fail_Cnt; ++ Aux_CRC_utility=((pDM_FatTable->AuxCRC32_Ok_Cnt)<<7)/pDM_FatTable->AuxCRC32_Fail_Cnt; ++ pDM_FatTable->TargetAnt_CRC32 = (Main_CRC_utility==Aux_CRC_utility)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_CRC_utility>=Aux_CRC_utility)?MAIN_ANT:AUX_ANT); ++ ++ if(Main_CRC_utility!=0 && Aux_CRC_utility!=0) ++ { ++ if(Main_CRC_utility>=Aux_CRC_utility) ++ utility_ratio=(Main_CRC_utility<<1)/Aux_CRC_utility; ++ else ++ utility_ratio=(Aux_CRC_utility<<1)/Main_CRC_utility; ++ } ++ } ++ else if(Main_above1==FALSE && Aux_above1==FALSE) ++ { ++ if(pDM_FatTable->MainCRC32_Ok_Cnt==0) ++ pDM_FatTable->MainCRC32_Ok_Cnt=1; ++ if(pDM_FatTable->AuxCRC32_Ok_Cnt==0) ++ pDM_FatTable->AuxCRC32_Ok_Cnt=1; ++ ++ Main_CRC_utility=((pDM_FatTable->MainCRC32_Fail_Cnt)<<7)/pDM_FatTable->MainCRC32_Ok_Cnt; ++ Aux_CRC_utility=((pDM_FatTable->AuxCRC32_Fail_Cnt)<<7)/pDM_FatTable->AuxCRC32_Ok_Cnt; ++ pDM_FatTable->TargetAnt_CRC32 = (Main_CRC_utility==Aux_CRC_utility)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_CRC_utility<=Aux_CRC_utility)?MAIN_ANT:AUX_ANT); ++ ++ if(Main_CRC_utility!=0 && Aux_CRC_utility!=0) ++ { ++ if(Main_CRC_utility>=Aux_CRC_utility) ++ utility_ratio=(Main_CRC_utility<<1)/(Aux_CRC_utility); ++ else ++ utility_ratio=(Aux_CRC_utility<<1)/(Main_CRC_utility); ++ } ++ } ++ } ++ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 0);//NOT Accept CRC32 Error packets. ++ ++ //3 [EVM statistic] ++ Main_EVM = (pDM_FatTable->MainAntEVM_Cnt[i]!=0)?(pDM_FatTable->MainAntEVM_Sum[i]/pDM_FatTable->MainAntEVM_Cnt[i]):0; ++ Aux_EVM = (pDM_FatTable->AuxAntEVM_Cnt[i]!=0)?(pDM_FatTable->AuxAntEVM_Sum[i]/pDM_FatTable->AuxAntEVM_Cnt[i]):0; ++ pDM_FatTable->TargetAnt_EVM = (Main_EVM==Aux_EVM)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_EVM>=Aux_EVM)?MAIN_ANT:AUX_ANT); ++ ++ if((Main_EVM==0 || Aux_EVM==0)) ++ diff_EVM=0; ++ else if(Main_EVM>=Aux_EVM) ++ diff_EVM=Main_EVM-Aux_EVM; ++ else ++ diff_EVM=Aux_EVM-Main_EVM; ++ ++ //2 [ Decision state ] ++ if(pDM_FatTable->TargetAnt_EVM ==pDM_FatTable->TargetAnt_CRC32 ) ++ { ++ if( (utility_ratio<2 && Force_antenna==FALSE) && diff_EVM<=2) ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->pre_TargetAnt_enhance; ++ else ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; ++ } ++ else if(diff_EVM<=2 && (utility_ratio > 4 && Force_antenna==FALSE)) ++ { ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; ++ } ++ else if(diff_EVM>=20) // ++ { ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; ++ } ++ else if(utility_ratio>=6 && Force_antenna==FALSE) // utility_ratio>3 ++ { ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; ++ } ++ else ++ { ++ if(Force_antenna==TRUE) ++ score_CRC=3; ++ else if(utility_ratio>=4) //>2 ++ score_CRC=2; ++ else if(utility_ratio>=3) //>1.5 ++ score_CRC=1; ++ else ++ score_CRC=0; ++ ++ if(diff_EVM>=10) ++ score_EVM=2; ++ else if(diff_EVM>=5) ++ score_EVM=1; ++ else ++ score_EVM=0; ++ ++ if(score_CRC>score_EVM) ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; ++ else if(score_CRCTargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; ++ else ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->pre_TargetAnt_enhance; ++ } ++ pDM_FatTable->pre_TargetAnt_enhance=pDM_FatTable->TargetAnt_enhance; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MainEVM_Cnt = (( %d )) , Main_EVM= (( %d )) \n",i, pDM_FatTable->MainAntEVM_Cnt[i], Main_EVM)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : AuxEVM_Cnt = (( %d )) , Aux_EVM = (( %d )) \n" ,i, pDM_FatTable->AuxAntEVM_Cnt[i] , Aux_EVM)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** TargetAnt_EVM = (( %s ))\n", ( pDM_FatTable->TargetAnt_EVM ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("M_CRC_Ok = (( %d )) , M_CRC_Fail = (( %d )), Main_CRC_utility = (( %d )) \n" , pDM_FatTable->MainCRC32_Ok_Cnt, pDM_FatTable->MainCRC32_Fail_Cnt,Main_CRC_utility)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("A_CRC_Ok = (( %d )) , A_CRC_Fail = (( %d )), Aux_CRC_utility = (( %d )) \n" , pDM_FatTable->AuxCRC32_Ok_Cnt, pDM_FatTable->AuxCRC32_Fail_Cnt,Aux_CRC_utility)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** TargetAnt_CRC32 = (( %s ))\n", ( pDM_FatTable->TargetAnt_CRC32 ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("****** TargetAnt_enhance = (( %s ))******\n", ( pDM_FatTable->TargetAnt_enhance ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ ++ } ++ } ++ else // RSSI< = Evm_RSSI_TH_Low ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ TH_L ] \n")); ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[escape from> TH_H || EVM_method_enable==1] \n")); ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[multi-Client] \n")); ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ } ++} ++ ++VOID ++odm_EVM_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_EVM_FastAntTrainingCallback****** \n")); ++ odm_HW_AntDiv(pDM_Odm); ++} ++#endif ++ ++VOID ++odm_HW_AntDiv( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte i,MinMaxRSSI=0xFF, AntDivMaxRSSI=0, MaxRSSI=0, LocalMaxRSSI; ++ u4Byte Main_RSSI, Aux_RSSI; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u1Byte RxIdleAnt = pDM_FatTable->RxIdleAnt, TargetAnt = 7; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PSTA_INFO_T pEntry; ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ u4Byte TH1=500000; ++ u4Byte TH2=10000000; ++ u4Byte MA_rx_Temp, degrade_TP_temp, improve_TP_temp; ++ u1Byte Monitor_RSSI_threshold=30; ++ ++ pDM_BdcTable->BF_pass=TRUE; ++ pDM_BdcTable->DIV_pass=TRUE; ++ pDM_BdcTable->bAll_DivSta_Idle=TRUE; ++ pDM_BdcTable->bAll_BFSta_Idle=TRUE; ++ pDM_BdcTable->num_BfTar=0 ; ++ pDM_BdcTable->num_DivTar=0; ++ pDM_BdcTable->num_Client=0; ++ #endif ++ #endif ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ ++ if(pDM_FatTable->bBecomeLinked == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ pDM_Odm->antdiv_period=0; ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_FatTable->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); ++ ++ //if(pDM_Odm->SupportICType == ODM_RTL8821 ) ++ //ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable ++ ++ //#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ //else if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ // ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable ++ //#endif ++ ++ //else if(pDM_Odm->SupportICType == ODM_RTL8723B ||pDM_Odm->SupportICType == ODM_RTL8812) ++ //ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function disable ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723B && pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] // for 8723B AntDiv function patch. BB Dino 130412 ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] ++ } ++ ++ //2 BDC Init ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ odm_BDC_Init(pDM_Odm); ++ #endif ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ #endif ++ } ++ } ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n AntDiv Start =>\n")); ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ if(pDM_Odm->antdiv_evm_en==1) ++ { ++ odm_EVM_Enhance_AntDiv(pDM_Odm); ++ if(pDM_FatTable->FAT_State !=NORMAL_STATE_MIAN) ++ return; ++ } ++ else ++ { ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ #endif ++ ++ //2 BDC Mode Arbitration ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_Odm->antdiv_evm_en == 0 ||pDM_FatTable->EVM_method_enable==0) ++ { ++ odm_BF_AntDiv_ModeArbitration(pDM_Odm); ++ } ++ #endif ++ #endif ++ ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ //2 Caculate RSSI per Antenna ++ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; ++ TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_FatTable->RxIdleAnt:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); ++ ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** SupportICType=[%d] \n",pDM_Odm->SupportICType)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n",i, pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n" ,i, pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI)); ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** Phy_AntSel_A=[ %d, %d, %d] \n",((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT2)>>2, ++ // ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT1) >>1, ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT0))); ++ ++ LocalMaxRSSI = (Main_RSSI>Aux_RSSI)?Main_RSSI:Aux_RSSI; ++ //2 Select MaxRSSI for DIG ++ if((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) ++ AntDivMaxRSSI = LocalMaxRSSI; ++ if(LocalMaxRSSI > MaxRSSI) ++ MaxRSSI = LocalMaxRSSI; ++ ++ //2 Select RX Idle Antenna ++ if ( (LocalMaxRSSI != 0) && (LocalMaxRSSI < MinMaxRSSI) ) ++ { ++ RxIdleAnt = TargetAnt; ++ MinMaxRSSI = LocalMaxRSSI; ++ } ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ if(pDM_Odm->antdiv_evm_en==1) ++ { ++ if(pDM_FatTable->TargetAnt_enhance!=0xFF) ++ { ++ TargetAnt=pDM_FatTable->TargetAnt_enhance; ++ RxIdleAnt = pDM_FatTable->TargetAnt_enhance; ++ } ++ } ++ #endif ++ ++ //2 Select TX Antenna ++ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) ++ { ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_BdcTable->w_BFee_Client[i]==0) ++ #endif ++ #endif ++ { ++ odm_UpdateTxAnt(pDM_Odm, TargetAnt, i); ++ } ++ } ++ ++ //------------------------------------------------------------ ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ pDM_BdcTable->num_Client++; ++ ++ if(pDM_BdcTable->BDC_Mode==BDC_MODE_2 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) ++ { ++ //2 Byte Counter ++ ++ MA_rx_Temp= (pEntry->rx_byte_cnt_LowMAW)<<3 ; // RX TP ( bit /sec) ++ ++ if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) ++ { ++ pDM_BdcTable->MA_rx_TP_DIV[i]= MA_rx_Temp ; ++ } ++ else ++ { ++ pDM_BdcTable->MA_rx_TP[i] =MA_rx_Temp ; ++ } ++ ++ if( (MA_rx_Temp < TH2) && (MA_rx_Temp > TH1) && (LocalMaxRSSI<=Monitor_RSSI_threshold)) ++ { ++ if(pDM_BdcTable->w_BFer_Client[i]==1) // Bfer_Target ++ { ++ pDM_BdcTable->num_BfTar++; ++ ++ if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE && pDM_BdcTable->BDC_Try_flag==0) ++ { ++ improve_TP_temp = (pDM_BdcTable->MA_rx_TP_DIV[i] * 9)>>3 ; //* 1.125 ++ pDM_BdcTable->BF_pass = (pDM_BdcTable->MA_rx_TP[i] > improve_TP_temp)?TRUE:FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { MA_rx_TP,improve_TP_temp , MA_rx_TP_DIV, BF_pass}={ %d, %d, %d , %d } \n" ,i,pDM_BdcTable->MA_rx_TP[i],improve_TP_temp,pDM_BdcTable->MA_rx_TP_DIV[i], pDM_BdcTable->BF_pass )); ++ } ++ } ++ else// DIV_Target ++ { ++ pDM_BdcTable->num_DivTar++; ++ ++ if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE && pDM_BdcTable->BDC_Try_flag==0) ++ { ++ degrade_TP_temp=(pDM_BdcTable->MA_rx_TP_DIV[i]*5)>>3;//* 0.625 ++ pDM_BdcTable->DIV_pass = (pDM_BdcTable->MA_rx_TP[i] >degrade_TP_temp)?TRUE:FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { MA_rx_TP, degrade_TP_temp , MA_rx_TP_DIV, DIV_pass}=\n{ %d, %d, %d , %d } \n" ,i,pDM_BdcTable->MA_rx_TP[i],degrade_TP_temp,pDM_BdcTable->MA_rx_TP_DIV[i], pDM_BdcTable->DIV_pass )); ++ } ++ } ++ } ++ ++ if(MA_rx_Temp > TH1) ++ { ++ if(pDM_BdcTable->w_BFer_Client[i]==1) // Bfer_Target ++ { ++ pDM_BdcTable->bAll_BFSta_Idle=FALSE; ++ } ++ else// DIV_Target ++ { ++ pDM_BdcTable->bAll_DivSta_Idle=FALSE; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { BFmeeCap , BFmerCap} = { %d , %d } \n" ,i, pDM_BdcTable->w_BFee_Client[i] , pDM_BdcTable->w_BFer_Client[i])); ++ ++ if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MA_rx_TP_DIV = (( %d )) \n",i,pDM_BdcTable->MA_rx_TP_DIV[i] )); ++ ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MA_rx_TP = (( %d )) \n",i,pDM_BdcTable->MA_rx_TP[i] )); ++ } ++ ++ } ++ #endif ++ #endif ++ ++ } ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_BdcTable->BDC_Try_flag==0) ++ #endif ++ #endif ++ { ++ pDM_FatTable->MainAnt_Sum[i] = 0; ++ pDM_FatTable->AuxAnt_Sum[i] = 0; ++ pDM_FatTable->MainAnt_Cnt[i] = 0; ++ pDM_FatTable->AuxAnt_Cnt[i] = 0; ++ } ++ } ++ ++ ++ ++ //2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP ) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** RxIdleAnt = (( %s ))\n\n", ( RxIdleAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_BdcTable->BDC_Mode==BDC_MODE_1 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** BDC_RxIdleUpdate_counter = (( %d ))\n", pDM_BdcTable->BDC_RxIdleUpdate_counter)); ++ ++ if(pDM_BdcTable->BDC_RxIdleUpdate_counter==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***Update RxIdle Antenna!!! \n")); ++ pDM_BdcTable->BDC_RxIdleUpdate_counter=30; ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ } ++ else ++ { ++ pDM_BdcTable->BDC_RxIdleUpdate_counter--; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***NOT update RxIdle Antenna because of BF ( need to fix TX-ant)\n")); ++ } ++ } ++ else ++ #endif ++ #endif ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ #else ++ ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ ++ #endif//#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ ++ ++ //2 BDC Main Algorithm ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_Odm->antdiv_evm_en ==0 ||pDM_FatTable->EVM_method_enable==0) ++ { ++ odm_BDCcoex_BFeeRxDiv_Arbitration(pDM_Odm); ++ } ++ #endif ++ #endif ++ ++ if(AntDivMaxRSSI == 0) ++ pDM_DigTable->AntDiv_RSSI_max = pDM_Odm->RSSI_Min; ++ else ++ pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; ++ ++ pDM_DigTable->RSSI_max = MaxRSSI; ++} ++ ++ ++ ++#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ++VOID ++odm_S0S1_SWAntDiv_Reset( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ pDM_FatTable->bBecomeLinked = FALSE; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SWAntDiv_Reset(): pDM_FatTable->bBecomeLinked = %d\n", pDM_FatTable->bBecomeLinked)); ++} ++ ++VOID ++odm_S0S1_SwAntDiv( ++ IN PVOID pDM_VOID, ++ IN u1Byte Step ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte i, MinMaxRSSI = 0xFF, LocalMaxRSSI, LocalMinRSSI; ++ u4Byte Main_RSSI, Aux_RSSI; ++ u1Byte HighTraffic_TrainTime_U = 0x32, HighTraffic_TrainTime_L = 0, Train_time_temp; ++ u1Byte LowTraffic_TrainTime_U = 200, LowTraffic_TrainTime_L = 0; ++ u1Byte RxIdleAnt = pDM_SWAT_Table->PreAntenna, TargetAnt, nextAnt = 0; ++ PSTA_INFO_T pEntry = NULL; ++ u4Byte value32; ++ ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ if(pDM_FatTable->bBecomeLinked == TRUE) ++ { ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set REG 948[9:6]=0x0\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948 , (BIT9|BIT8|BIT7|BIT6), 0x0); ++ } ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_FatTable->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ value32 = ODM_GetBBReg(pDM_Odm, 0x864, BIT5|BIT4|BIT3); ++ ++ #if (RTL8723B_SUPPORT == 1) ++ if (value32 == 0x0) ++ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, MAIN_ANT, ANT1_2G, ANT2_2G); ++ else if (value32 == 0x1) ++ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, AUX_ANT, ANT2_2G, ANT1_2G); ++ #endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B: First link! Force antenna to %s\n",(value32 == 0x0?"MAIN":"AUX") )); ++ } ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[%d] { try_flag=(( %d )), Step=(( %d )), Double_chk_flag = (( %d )) }\n", ++ __LINE__,pDM_SWAT_Table->try_flag,Step,pDM_SWAT_Table->Double_chk_flag)); ++ ++ // Handling step mismatch condition. ++ // Peak step is not finished at last time. Recover the variable and check again. ++ if( Step != pDM_SWAT_Table->try_flag ) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Step != try_flag] Need to Reset After Link\n")); ++ ODM_SwAntDivRestAfterLink(pDM_Odm); ++ } ++ ++ if (pDM_SWAT_Table->try_flag == SWAW_STEP_INIT) { ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; ++ pDM_SWAT_Table->Train_time_flag=0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag = 0] Prepare for peek!\n\n")); ++ return; ++ ++ } else { ++ ++ //1 Normal State (Begin Trying) ++ if (pDM_SWAT_Table->try_flag == SWAW_STEP_PEEK) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), TrafficLoad = (%d))\n", pDM_Odm->curTxOkCnt, pDM_Odm->curRxOkCnt, pDM_Odm->TrafficLoad)); ++ ++ if (pDM_Odm->TrafficLoad == TRAFFIC_HIGH) ++ { ++ Train_time_temp = pDM_SWAT_Table->Train_time ; ++ ++ if(pDM_SWAT_Table->Train_time_flag==3) ++ { ++ HighTraffic_TrainTime_L=0xa; ++ ++ if(Train_time_temp<=16) ++ Train_time_temp=HighTraffic_TrainTime_L; ++ else ++ Train_time_temp-=16; ++ ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==2) ++ { ++ Train_time_temp-=8; ++ HighTraffic_TrainTime_L=0xf; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==1) ++ { ++ Train_time_temp-=4; ++ HighTraffic_TrainTime_L=0x1e; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==0) ++ { ++ Train_time_temp+=8; ++ HighTraffic_TrainTime_L=0x28; ++ } ++ ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Train_time_temp = ((%d))\n",Train_time_temp)); ++ ++ //-- ++ if(Train_time_temp > HighTraffic_TrainTime_U) ++ Train_time_temp=HighTraffic_TrainTime_U; ++ ++ else if(Train_time_temp < HighTraffic_TrainTime_L) ++ Train_time_temp=HighTraffic_TrainTime_L; ++ ++ pDM_SWAT_Table->Train_time = Train_time_temp; /*10ms~200ms*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Train_time_flag=((%d)), Train_time=((%d))\n", pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); ++ ++ } else if ((pDM_Odm->TrafficLoad == TRAFFIC_MID) || (pDM_Odm->TrafficLoad == TRAFFIC_LOW)) { ++ ++ Train_time_temp=pDM_SWAT_Table->Train_time ; ++ ++ if(pDM_SWAT_Table->Train_time_flag==3) ++ { ++ LowTraffic_TrainTime_L=10; ++ if(Train_time_temp<50) ++ Train_time_temp=LowTraffic_TrainTime_L; ++ else ++ Train_time_temp-=50; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==2) ++ { ++ Train_time_temp-=30; ++ LowTraffic_TrainTime_L=36; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==1) ++ { ++ Train_time_temp-=10; ++ LowTraffic_TrainTime_L=40; ++ } ++ else ++ Train_time_temp+=10; ++ ++ //-- ++ if(Train_time_temp >= LowTraffic_TrainTime_U) ++ Train_time_temp=LowTraffic_TrainTime_U; ++ ++ else if(Train_time_temp <= LowTraffic_TrainTime_L) ++ Train_time_temp=LowTraffic_TrainTime_L; ++ ++ pDM_SWAT_Table->Train_time = Train_time_temp; /*10ms~200ms*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Train_time_flag=((%d)) , Train_time=((%d))\n", pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); ++ ++ } else { ++ pDM_SWAT_Table->Train_time = 0xc8; /*200ms*/ ++ ++ } ++ ++ //----------------- ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Current MinMaxRSSI is ((%d))\n", pDM_FatTable->MinMaxRSSI)); ++ ++ //---reset index--- ++ if (pDM_SWAT_Table->reset_idx >= RSSI_CHECK_RESET_PERIOD) { ++ ++ pDM_FatTable->MinMaxRSSI = 0; ++ pDM_SWAT_Table->reset_idx = 0; ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reset_idx = (( %d ))\n", pDM_SWAT_Table->reset_idx)); ++ ++ pDM_SWAT_Table->reset_idx++; ++ ++ //---double check flag--- ++ if ((pDM_FatTable->MinMaxRSSI > RSSI_CHECK_THRESHOLD) && (pDM_SWAT_Table->Double_chk_flag == 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" MinMaxRSSI is ((%d)), and > %d\n", ++ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); ++ ++ pDM_SWAT_Table->Double_chk_flag =1; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_DETERMINE; ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Test the current Ant for (( %d )) ms again\n", pDM_SWAT_Table->Train_time)); ++ ODM_UpdateRxIdleAnt(pDM_Odm, pDM_FatTable->RxIdleAnt); ++ ODM_SetTimer(pDM_Odm, &(pDM_SWAT_Table->phydm_SwAntennaSwitchTimer), pDM_SWAT_Table->Train_time); /*ms*/ ++ return; ++ } ++ ++ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_DETERMINE; ++ ++ if(pDM_SWAT_Table->reset_idx<=1) ++ pDM_SWAT_Table->RSSI_Trying = 2; ++ else ++ pDM_SWAT_Table->RSSI_Trying = 1; ++ ++ odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_PEEK); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag=1] Normal State: Begin Trying!!\n")); ++ ++ } else if ((pDM_SWAT_Table->try_flag == SWAW_STEP_DETERMINE) && (pDM_SWAT_Table->Double_chk_flag == 0)) { ++ ++ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->RSSI_Trying--; ++ } ++ ++ //1 Decision State ++ if ((pDM_SWAT_Table->try_flag == SWAW_STEP_DETERMINE) && (pDM_SWAT_Table->RSSI_Trying == 0)) { ++ ++ BOOLEAN bByCtrlFrame = FALSE; ++ u8Byte pkt_cnt_total = 0; ++ ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ //2 Caculate RSSI per Antenna ++ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; ++ ++ if(pDM_FatTable->MainAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_main>=1) ++ Main_RSSI=0; ++ ++ if(pDM_FatTable->AuxAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_aux>=1) ++ Aux_RSSI=0; ++ ++ TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); ++ LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; ++ LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** CCK_counter_main = (( %d )) , CCK_counter_aux= (( %d )) \n", pDM_FatTable->CCK_counter_main, pDM_FatTable->CCK_counter_aux)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** OFDM_counter_main = (( %d )) , OFDM_counter_aux= (( %d )) \n", pDM_FatTable->OFDM_counter_main, pDM_FatTable->OFDM_counter_aux)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n", pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI )); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ //2 Select RX Idle Antenna ++ ++ if (LocalMaxRSSI != 0 && LocalMaxRSSI < MinMaxRSSI) ++ { ++ RxIdleAnt = TargetAnt; ++ MinMaxRSSI = LocalMaxRSSI; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** LocalMaxRSSI-LocalMinRSSI = ((%d))\n",(LocalMaxRSSI-LocalMinRSSI))); ++ ++ if((LocalMaxRSSI-LocalMinRSSI)>8) ++ { ++ if(LocalMinRSSI != 0) ++ pDM_SWAT_Table->Train_time_flag=3; ++ else ++ { ++ if (MinMaxRSSI > RSSI_CHECK_THRESHOLD) ++ pDM_SWAT_Table->Train_time_flag=0; ++ else ++ pDM_SWAT_Table->Train_time_flag=3; ++ } ++ } ++ else if((LocalMaxRSSI-LocalMinRSSI)>5) ++ pDM_SWAT_Table->Train_time_flag=2; ++ else if((LocalMaxRSSI-LocalMinRSSI)>2) ++ pDM_SWAT_Table->Train_time_flag=1; ++ else ++ pDM_SWAT_Table->Train_time_flag=0; ++ ++ } ++ ++ //2 Select TX Antenna ++ if(TargetAnt == MAIN_ANT) ++ pDM_FatTable->antsel_a[i] = ANT1_2G; ++ else ++ pDM_FatTable->antsel_a[i] = ANT2_2G; ++ ++ } ++ pDM_FatTable->MainAnt_Sum[i] = 0; ++ pDM_FatTable->AuxAnt_Sum[i] = 0; ++ pDM_FatTable->MainAnt_Cnt[i] = 0; ++ pDM_FatTable->AuxAnt_Cnt[i] = 0; ++ } ++ ++ if(pDM_SWAT_Table->bSWAntDivByCtrlFrame) ++ { ++ odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_DETERMINE); ++ bByCtrlFrame = TRUE; ++ } ++ ++ pkt_cnt_total = pDM_FatTable->CCK_counter_main + pDM_FatTable->CCK_counter_aux + ++ pDM_FatTable->OFDM_counter_main + pDM_FatTable->OFDM_counter_aux; ++ pDM_FatTable->CCK_counter_main=0; ++ pDM_FatTable->CCK_counter_aux=0; ++ pDM_FatTable->OFDM_counter_main=0; ++ pDM_FatTable->OFDM_counter_aux=0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame packet counter = %d, Data frame packet counter = %llu\n", ++ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame, pkt_cnt_total)); ++ ++ if(MinMaxRSSI == 0xff || ((pkt_cnt_total < (pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame >> 1)) && pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 2)) ++ { ++ MinMaxRSSI = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Check RSSI of control frame because MinMaxRSSI == 0xff\n")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bByCtrlFrame = %d\n", bByCtrlFrame)); ++ ++ if(bByCtrlFrame) ++ { ++ Main_RSSI = (pDM_FatTable->MainAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->MainAnt_CtrlFrame_Sum/pDM_FatTable->MainAnt_CtrlFrame_Cnt):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->AuxAnt_CtrlFrame_Sum/pDM_FatTable->AuxAnt_CtrlFrame_Cnt):0; ++ ++ if(pDM_FatTable->MainAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_main>=1) ++ Main_RSSI=0; ++ ++ if(pDM_FatTable->AuxAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_aux>=1) ++ Aux_RSSI=0; ++ ++ if (Main_RSSI != 0 || Aux_RSSI != 0) ++ { ++ RxIdleAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); ++ LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; ++ LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; ++ ++ if((LocalMaxRSSI-LocalMinRSSI)>8) ++ pDM_SWAT_Table->Train_time_flag=3; ++ else if((LocalMaxRSSI-LocalMinRSSI)>5) ++ pDM_SWAT_Table->Train_time_flag=2; ++ else if((LocalMaxRSSI-LocalMinRSSI)>2) ++ pDM_SWAT_Table->Train_time_flag=1; ++ else ++ pDM_SWAT_Table->Train_time_flag=0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame: Main_RSSI = %d, Aux_RSSI = %d\n", Main_RSSI, Aux_RSSI)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt decided by control frame = %s\n", (RxIdleAnt == MAIN_ANT?"MAIN":"AUX"))); ++ } ++ } ++ } ++ ++ pDM_FatTable->MinMaxRSSI = MinMaxRSSI; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; ++ ++ if( pDM_SWAT_Table->Double_chk_flag==1) ++ { ++ pDM_SWAT_Table->Double_chk_flag=0; ++ ++ if (pDM_FatTable->MinMaxRSSI > RSSI_CHECK_THRESHOLD) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Double check] MinMaxRSSI ((%d)) > %d again!!\n", ++ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); ++ ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[reset try_flag = 0] Training accomplished !!!]\n\n\n")); ++ return; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Double check] MinMaxRSSI ((%d)) <= %d !!\n", ++ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); ++ ++ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; ++ pDM_SWAT_Table->reset_idx = RSSI_CHECK_RESET_PERIOD; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag=0] Normal State: Need to tryg again!!\n\n\n")); ++ return; ++ } ++ } ++ else ++ { ++ if (pDM_FatTable->MinMaxRSSI < RSSI_CHECK_THRESHOLD) ++ pDM_SWAT_Table->reset_idx = RSSI_CHECK_RESET_PERIOD; ++ ++ pDM_SWAT_Table->PreAntenna =RxIdleAnt; ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt ); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[reset try_flag = 0] Training accomplished !!!] \n\n\n")); ++ return; ++ } ++ ++ } ++ ++ } ++ ++ //1 4.Change TRX antenna ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = (( %d )), Ant: (( %s )) >>> (( %s )) \n", ++ pDM_SWAT_Table->RSSI_Trying, (pDM_FatTable->RxIdleAnt == MAIN_ANT?"MAIN":"AUX"),(nextAnt == MAIN_ANT?"MAIN":"AUX"))); ++ ++ ODM_UpdateRxIdleAnt(pDM_Odm, nextAnt); ++ ++ //1 5.Reset Statistics ++ ++ pDM_FatTable->RxIdleAnt = nextAnt; ++ ++ //1 6.Set next timer (Trying State) ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Test ((%s)) Ant for (( %d )) ms\n", (nextAnt == MAIN_ANT?"MAIN":"AUX"), pDM_SWAT_Table->Train_time)); ++ ODM_SetTimer(pDM_Odm, &(pDM_SWAT_Table->phydm_SwAntennaSwitchTimer), pDM_SWAT_Table->Train_time); /*ms*/ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_SW_AntDiv_Callback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; ++ ++ #if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ #if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pDM_SWAT_Table->phydm_SwAntennaSwitchWorkitem); ++ #else ++ { ++ //DbgPrint("SW_antdiv_Callback"); ++ odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); ++ } ++ #endif ++ #else ++ ODM_ScheduleWorkItem(&pDM_SWAT_Table->phydm_SwAntennaSwitchWorkitem); ++ #endif ++} ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ //DbgPrint("SW_antdiv_Workitem_Callback"); ++ odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); ++} ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++) ++{ ++ PADAPTER ++ pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE ++ *pHalData = GET_HAL_DATA(pAdapter); ++ ++ /*DbgPrint("SW_antdiv_Workitem_Callback");*/ ++ odm_S0S1_SwAntDiv(&pHalData->odmpriv, SWAW_STEP_DETERMINE); ++} ++ ++VOID ++ODM_SW_AntDiv_Callback(void *FunctionContext) ++{ ++ PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; ++ PADAPTER padapter = pDM_Odm->Adapter; ++ if(padapter->net_closed == _TRUE) ++ return; ++ ++ #if 0 /* Can't do I/O in timer callback*/ ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_DETERMINE); ++ #else ++ rtw_run_in_thread_cmd(padapter, ODM_SW_AntDiv_WorkitemCallback, padapter); ++ #endif ++} ++ ++ ++#endif ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte Step ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ switch(Step) ++ { ++ case SWAW_STEP_PEEK: ++ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame = 0; ++ pDM_SWAT_Table->bSWAntDivByCtrlFrame = TRUE; ++ pDM_FatTable->MainAnt_CtrlFrame_Cnt = 0; ++ pDM_FatTable->AuxAnt_CtrlFrame_Cnt = 0; ++ pDM_FatTable->MainAnt_CtrlFrame_Sum = 0; ++ pDM_FatTable->AuxAnt_CtrlFrame_Sum = 0; ++ pDM_FatTable->CCK_CtrlFrame_Cnt_main = 0; ++ pDM_FatTable->CCK_CtrlFrame_Cnt_aux = 0; ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_main = 0; ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_aux = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n")); ++ break; ++ case SWAW_STEP_DETERMINE: ++ pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SwAntDivForAPMode(): Stop peek\n")); ++ break; ++ default: ++ pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; ++ break; ++ } ++} ++ ++VOID ++odm_AntselStatisticsOfCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte RxPWDBAll ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(antsel_tr_mux == ANT1_2G) ++ { ++ pDM_FatTable->MainAnt_CtrlFrame_Sum+=RxPWDBAll; ++ pDM_FatTable->MainAnt_CtrlFrame_Cnt++; ++ } ++ else ++ { ++ pDM_FatTable->AuxAnt_CtrlFrame_Sum+=RxPWDBAll; ++ pDM_FatTable->AuxAnt_CtrlFrame_Cnt++; ++ } ++} ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( ++ IN PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ //IN PODM_PHY_INFO_T pPhyInfo, ++ //IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; ++ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ BOOLEAN isCCKrate; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ return; ++ ++ if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV) ++ return; ++ ++ // In try state ++ if(!pDM_SWAT_Table->bSWAntDivByCtrlFrame) ++ return; ++ ++ // No HW error and match receiver address ++ if(!pPktinfo->bToSelf) ++ return; ++ ++ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame++; ++ isCCKrate = ((pPktinfo->DataRate >= DESC_RATE1M ) && (pPktinfo->DataRate <= DESC_RATE11M ))?TRUE :FALSE; ++ ++ if(isCCKrate) ++ { ++ pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; ++ ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->CCK_CtrlFrame_Cnt_main++; ++ else ++ pDM_FatTable->CCK_CtrlFrame_Cnt_aux++; ++ ++ odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]); ++ } ++ else ++ { ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_main++; ++ else ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_aux++; ++ ++ odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxPWDBAll); ++ } ++} ++ ++#endif //#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) ++ ++ ++ ++ ++VOID ++odm_SetNextMACAddrTarget( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ PSTA_INFO_T pEntry; ++ u4Byte value32, i; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n")); ++ ++ if (pDM_Odm->bLinked) ++ { ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ ++ if ((pDM_FatTable->TrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM) ++ pDM_FatTable->TrainIdx = 0; ++ else ++ pDM_FatTable->TrainIdx++; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; ++ ++ if (IS_STA_VALID(pEntry)) { ++ ++ /*Match MAC ADDR*/ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) ++ value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4]; ++ #else ++ value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4]; ++ #endif ++ ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32);/*0x7b4~0x7b5*/ ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) ++ value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0]; ++ #else ++ value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0]; ++ #endif ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32);/*0x7b0~0x7b3*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%d\n", pDM_FatTable->TrainIdx)); ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", ++ pEntry->hwaddr[5], pEntry->hwaddr[4], pEntry->hwaddr[3], pEntry->hwaddr[2], pEntry->hwaddr[1], pEntry->hwaddr[0])); ++ #else ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", ++ pEntry->MacAddr[5], pEntry->MacAddr[4], pEntry->MacAddr[3], pEntry->MacAddr[2], pEntry->MacAddr[1], pEntry->MacAddr[0])); ++ #endif ++ ++ break; ++ } ++ } ++ } ++ ++#if 0 ++ // ++ //2012.03.26 LukeLee: This should be removed later, the MAC address is changed according to MACID in turn ++ // ++ #if( DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ for (i=0; i<6; i++) ++ { ++ Bssid[i] = pMgntInfo->Bssid[i]; ++ //DbgPrint("Bssid[%d]=%x\n", i, Bssid[i]); ++ } ++ } ++ #endif ++ ++ //odm_SetNextMACAddrTarget(pDM_Odm); ++ ++ //1 Select MAC Address Filter ++ for (i=0; i<6; i++) ++ { ++ if(Bssid[i] != pDM_FatTable->Bssid[i]) ++ { ++ bMatchBSSID = FALSE; ++ break; ++ } ++ } ++ if(bMatchBSSID == FALSE) ++ { ++ //Match MAC ADDR ++ value32 = (Bssid[5]<<8)|Bssid[4]; ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); ++ value32 = (Bssid[3]<<24)|(Bssid[2]<<16) |(Bssid[1]<<8) |Bssid[0]; ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); ++ } ++ ++ return bMatchBSSID; ++#endif ++ ++} ++ ++#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) ++ ++VOID ++odm_FastAntTraining( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ u4Byte MaxRSSI_pathA=0, Pckcnt_pathA=0; ++ u1Byte i,TargetAnt_pathA=0; ++ BOOLEAN bPktFilterMacth_pathA = FALSE; ++ #if(RTL8192E_SUPPORT == 1) ++ u4Byte MaxRSSI_pathB=0, Pckcnt_pathB=0; ++ u1Byte TargetAnt_pathB=0; ++ BOOLEAN bPktFilterMacth_pathB = FALSE; ++ #endif ++ ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ ++ if(pDM_FatTable->bBecomeLinked == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_FatTable->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked!!!]\n")); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, ((pDM_Odm->fat_comb_a)-1)); ++ } ++ #if(RTL8192E_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT2|BIT1|BIT0, ((pDM_Odm->fat_comb_a)-1) ); //path-A // ant combination=regB38[2:0]+1 ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT18|BIT17|BIT16, ((pDM_Odm->fat_comb_b)-1) ); //path-B // ant combination=regB38[18:16]+1 ++ } ++ #endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n")); ++ ++ //1 TRAINING STATE ++ if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) ++ { ++ //2 Caculate RSSI per Antenna ++ ++ //3 [path-A]--------------------------- ++ for (i=0; i<(pDM_Odm->fat_comb_a); i++) // i : antenna index ++ { ++ if(pDM_FatTable->antRSSIcnt[i] == 0) ++ pDM_FatTable->antAveRSSI[i] = 0; ++ else ++ { ++ pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i]; ++ bPktFilterMacth_pathA = TRUE; ++ } ++ ++ if(pDM_FatTable->antAveRSSI[i] > MaxRSSI_pathA) ++ { ++ MaxRSSI_pathA = pDM_FatTable->antAveRSSI[i]; ++ Pckcnt_pathA = pDM_FatTable ->antRSSIcnt[i]; ++ TargetAnt_pathA = i ; ++ } ++ else if(pDM_FatTable->antAveRSSI[i] == MaxRSSI_pathA) ++ { ++ if( (pDM_FatTable->antRSSIcnt[i] ) > Pckcnt_pathA) ++ { ++ MaxRSSI_pathA = pDM_FatTable->antAveRSSI[i]; ++ Pckcnt_pathA = pDM_FatTable ->antRSSIcnt[i]; ++ TargetAnt_pathA = i ; ++ } ++ } ++ ++ ODM_RT_TRACE("*** Ant-Index : [ %d ], Counter = (( %d )), Avg RSSI = (( %d )) \n", i, pDM_FatTable->antRSSIcnt[i], pDM_FatTable->antAveRSSI[i] ); ++ } ++ ++ ++ /* ++ #if(RTL8192E_SUPPORT == 1) ++ //3 [path-B]--------------------------- ++ for (i=0; i<(pDM_Odm->fat_comb_b); i++) ++ { ++ if(pDM_FatTable->antRSSIcnt_pathB[i] == 0) ++ pDM_FatTable->antAveRSSI_pathB[i] = 0; ++ else // (antRSSIcnt[i] != 0) ++ { ++ pDM_FatTable->antAveRSSI_pathB[i] = pDM_FatTable->antSumRSSI_pathB[i] /pDM_FatTable->antRSSIcnt_pathB[i]; ++ bPktFilterMacth_pathB = TRUE; ++ } ++ if(pDM_FatTable->antAveRSSI_pathB[i] > MaxRSSI_pathB) ++ { ++ MaxRSSI_pathB = pDM_FatTable->antAveRSSI_pathB[i]; ++ Pckcnt_pathB = pDM_FatTable ->antRSSIcnt_pathB[i]; ++ TargetAnt_pathB = (u1Byte) i; ++ } ++ if(pDM_FatTable->antAveRSSI_pathB[i] == MaxRSSI_pathB) ++ { ++ if(pDM_FatTable ->antRSSIcnt_pathB > Pckcnt_pathB) ++ { ++ MaxRSSI_pathB = pDM_FatTable->antAveRSSI_pathB[i]; ++ TargetAnt_pathB = (u1Byte) i; ++ } ++ } ++ if (pDM_Odm->fat_print_rssi==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{Path-B}: Sum RSSI[%d] = (( %d )), cnt RSSI [%d] = (( %d )), Avg RSSI[%d] = (( %d )) \n", ++ i, pDM_FatTable->antSumRSSI_pathB[i], i, pDM_FatTable->antRSSIcnt_pathB[i], i, pDM_FatTable->antAveRSSI_pathB[i])); ++ } ++ } ++ #endif ++ */ ++ ++ //1 DECISION STATE ++ ++ //2 Select TRX Antenna ++ ++ phydm_FastTraining_enable(pDM_Odm, FAT_OFF); ++ ++ //3 [path-A]--------------------------- ++ if(bPktFilterMacth_pathA == FALSE) ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("{Path-A}: None Packet is matched\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("{Path-A}: None Packet is matched\n")); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ } ++ else ++ { ++ ODM_RT_TRACE("TargetAnt_pathA = (( %d )) , MaxRSSI_pathA = (( %d )) \n",TargetAnt_pathA,MaxRSSI_pathA); ++ ++ //3 [ update RX-optional ant ] Default RX is Omni, Optional RX is the best decision by FAT ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt_pathA); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT8|BIT7|BIT6, TargetAnt_pathA);//Optional RX [pth-A] ++ } ++ //3 [ update TX ant ] ++ odm_UpdateTxAnt(pDM_Odm, TargetAnt_pathA, (pDM_FatTable->TrainIdx)); ++ ++ if(TargetAnt_pathA == 0) ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ } ++ /* ++ #if(RTL8192E_SUPPORT == 1) ++ //3 [path-B]--------------------------- ++ if(bPktFilterMacth_pathB == FALSE) ++ { ++ if (pDM_Odm->fat_print_rssi==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***[%d]{Path-B}: None Packet is matched\n\n\n",__LINE__)); ++ } ++ } ++ else ++ { ++ if (pDM_Odm->fat_print_rssi==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ (" ***TargetAnt_pathB = (( %d )) *** MaxRSSI = (( %d ))***\n\n\n",TargetAnt_pathB,MaxRSSI_pathB)); ++ } ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT21|BIT20|BIT19, TargetAnt_pathB); //Default RX is Omni, Optional RX is the best decision by FAT ++ ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info ++ ++ pDM_FatTable->antsel_pathB[pDM_FatTable->TrainIdx] = TargetAnt_pathB; ++ } ++ #endif ++ */ ++ ++ //2 Reset Counter ++ for(i=0; i<(pDM_Odm->fat_comb_a); i++) ++ { ++ pDM_FatTable->antSumRSSI[i] = 0; ++ pDM_FatTable->antRSSIcnt[i] = 0; ++ } ++ /* ++ #if(RTL8192E_SUPPORT == 1) ++ for(i=0; i<=(pDM_Odm->fat_comb_b); i++) ++ { ++ pDM_FatTable->antSumRSSI_pathB[i] = 0; ++ pDM_FatTable->antRSSIcnt_pathB[i] = 0; ++ } ++ #endif ++ */ ++ ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ return; ++ } ++ ++ //1 NORMAL STATE ++ if (pDM_FatTable->FAT_State == FAT_PREPARE_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Start Prepare State ]\n")); ++ ++ odm_SetNextMACAddrTarget(pDM_Odm); ++ ++ //2 Prepare Training ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ phydm_FastTraining_enable(pDM_Odm , FAT_ON); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); //enable HW AntDiv ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Start Training State]\n")); ++ ++ ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //ms ++ } ++ ++} ++ ++VOID ++odm_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER padapter = pDM_Odm->Adapter; ++ if(padapter->net_closed == _TRUE) ++ return; ++ //if(*pDM_Odm->pbNet_closed == TRUE) ++ // return; ++#endif ++ ++#if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem); ++#else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_FastAntTrainingCallback****** \n")); ++ odm_FastAntTraining(pDM_Odm); ++#endif ++} ++ ++VOID ++odm_FastAntTrainingWorkItemCallback( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_FastAntTrainingWorkItemCallback****** \n")); ++ odm_FastAntTraining(pDM_Odm); ++} ++ ++#endif ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ++u4Byte ++phydm_construct_hl_beam_codeword( ++ IN PVOID pDM_VOID, ++ IN u4Byte *beam_pattern_idx, ++ IN u4Byte ant_num ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte codeword = 0; ++ u4Byte data_tmp; ++ u1Byte i; ++ ++ if (ant_num < 8) { ++ for (i = 0; i < ant_num; i++) { ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] ));*/ ++ if (beam_pattern_idx[i] == 0) { ++ data_tmp = 0x1; ++ /**/ ++ } else if (beam_pattern_idx[i] == 1) { ++ data_tmp = 0x2; ++ /**/ ++ } else if (beam_pattern_idx[i] == 2) { ++ data_tmp = 0x4; ++ /**/ ++ } else if (beam_pattern_idx[i] == 3) { ++ data_tmp = 0x8; ++ /**/ ++ } ++ codeword |= (data_tmp<<(i*4)); ++ } ++ } ++ ++ return codeword; ++} ++ ++VOID ++phydm_update_beam_pattern( ++ IN PVOID pDM_VOID, ++ IN u4Byte codeword, ++ IN u4Byte codeword_length ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u1Byte i; ++ BOOLEAN beam_ctrl_signal; ++ u4Byte one = 0x1; ++ u4Byte reg44_tmp_p, reg44_tmp_n, reg44_ori; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set Beam Pattern =0x%x\n", codeword)); ++ ++ reg44_ori = ODM_GetMACReg(pDM_Odm, 0x44, bMaskDWord); ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_ori =0x%x\n", reg44_ori));*/ ++ ++ for (i = 0; i <= (codeword_length-1); i++) { ++ beam_ctrl_signal = (BOOLEAN)((codeword&BIT(i)) >> i); ++ ++ if (pDM_Odm->DebugComponents & ODM_COMP_ANT_DIV) { ++ ++ if (i == (codeword_length-1)) { ++ DbgPrint("%d ]\n", beam_ctrl_signal); ++ /**/ ++ } else if (i == 0) { ++ DbgPrint("Send codeword[1:24] ---> [ %d ", beam_ctrl_signal); ++ /**/ ++ } else if ((i % 4) == 3) { ++ DbgPrint("%d | ", beam_ctrl_signal); ++ /**/ ++ } else { ++ DbgPrint("%d ", beam_ctrl_signal); ++ /**/ ++ } ++ } ++ ++ #if 1 ++ reg44_tmp_p = reg44_ori & (~(BIT11|BIT10)); /*clean bit 10 & 11*/ ++ reg44_tmp_p |= ((1<<11) | (beam_ctrl_signal<<10)); ++ reg44_tmp_n = reg44_ori & (~(BIT11|BIT10)); ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/ ++ ODM_SetMACReg(pDM_Odm, 0x44 , bMaskDWord, reg44_tmp_p); ++ ODM_SetMACReg(pDM_Odm, 0x44 , bMaskDWord, reg44_tmp_n); ++ #else ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT11|BIT10, ((1<<1) | beam_ctrl_signal)); ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT11, 0); ++ #endif ++ ++ } ++} ++ ++VOID ++phydm_update_rx_idle_beam( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u4Byte i; ++ ++ pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(pDM_Odm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set target beam_pattern codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword)); ++ ++ for (i = 0; i < (pdm_sat_table->ant_num); i++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i, pdm_sat_table->rx_idle_beam[i])); ++ /**/ ++ } ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); ++ /*ODM_StallExecution(1);*/ ++ #endif ++ ++ pdm_sat_table->pre_codeword = pdm_sat_table->update_beam_codeword; ++} ++ ++VOID ++phydm_hl_smart_ant_cmd( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ u4Byte one = 0x1; ++ u4Byte codeword_length = pdm_sat_table->data_codeword_bit_num; ++ u4Byte beam_ctrl_signal, i; ++ ++ if (dm_value[0] == 1) { /*fix beam pattern*/ ++ ++ pdm_sat_table->fix_beam_pattern_en = dm_value[1]; ++ ++ if (pdm_sat_table->fix_beam_pattern_en == 1) { ++ ++ pdm_sat_table->fix_beam_pattern_codeword = dm_value[2]; ++ ++ if (pdm_sat_table->fix_beam_pattern_codeword > (one<fix_beam_pattern_codeword, codeword_length)); ++ (pdm_sat_table->fix_beam_pattern_codeword) &= 0xffffff; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Auto modify to (0x%x)\n", pdm_sat_table->fix_beam_pattern_codeword)); ++ } ++ ++ pdm_sat_table->update_beam_codeword = pdm_sat_table->fix_beam_pattern_codeword; ++ ++ /*---------------------------------------------------------*/ ++ PHYDM_SNPRINTF((output+used, out_len-used, "Fix Beam Pattern\n")); ++ for (i = 0; i <= (codeword_length-1); i++) { ++ beam_ctrl_signal = (BOOLEAN)((pdm_sat_table->update_beam_codeword&BIT(i)) >> i); ++ ++ if (i == (codeword_length-1)) { ++ PHYDM_SNPRINTF((output+used, out_len-used, "%d]\n", beam_ctrl_signal)); ++ /**/ ++ } else if (i == 0) { ++ PHYDM_SNPRINTF((output+used, out_len-used, "Send Codeword[1:24] to RFU -> [%d", beam_ctrl_signal)); ++ /**/ ++ } else if ((i % 4) == 3) { ++ PHYDM_SNPRINTF((output+used, out_len-used, "%d|", beam_ctrl_signal)); ++ /**/ ++ } else { ++ PHYDM_SNPRINTF((output+used, out_len-used, "%d", beam_ctrl_signal)); ++ /**/ ++ } ++ } ++ /*---------------------------------------------------------*/ ++ ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); ++ /*ODM_StallExecution(1);*/ ++ #endif ++ } else if (pdm_sat_table->fix_beam_pattern_en == 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Smart Antenna: Enable\n")); ++ } ++ ++ } else if (dm_value[0] == 2) { /*set latch time*/ ++ ++ pdm_sat_table->latch_time = dm_value[1]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] latch_time =0x%x\n", pdm_sat_table->latch_time)); ++ } else if (dm_value[0] == 3) { ++ ++ pdm_sat_table->fix_training_num_en = dm_value[1]; ++ ++ if (pdm_sat_table->fix_training_num_en == 1) { ++ pdm_sat_table->per_beam_training_pkt_num = dm_value[2]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Fix per_beam_training_pkt_num = (( 0x%x ))\n", pdm_sat_table->per_beam_training_pkt_num)); ++ } else if (pdm_sat_table->fix_training_num_en == 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] AUTO per_beam_training_pkt_num\n")); ++ /**/ ++ } ++ } ++ ++} ++ ++ ++void ++phydm_set_all_ant_same_beam_num( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { /*2Ant for 8821A*/ ++ ++ pdm_sat_table->rx_idle_beam[0] = pdm_sat_table->fast_training_beam_num; ++ pdm_sat_table->rx_idle_beam[1] = pdm_sat_table->fast_training_beam_num; ++ } ++ ++ pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(pDM_Odm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword)); ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); ++ /*ODM_StallExecution(1);*/ ++ #endif ++} ++ ++VOID ++odm_FastAntTraining_hl_smart_antenna_type1( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ pFAT_T pDM_FatTable = &(pDM_Odm->DM_FatTable); ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ u4Byte codeword = 0, i, j; ++ u4Byte TargetAnt; ++ u4Byte avg_rssi_tmp; ++ u4Byte target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0}; ++ u4Byte max_beam_ant_rssi = 0; ++ u4Byte target_ant_beam[SUPPORT_RF_PATH_NUM] = {0}; ++ u4Byte beam_tmp; ++ ++ ++ if (!pDM_Odm->bLinked) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ ++ if (pDM_FatTable->bBecomeLinked == TRUE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Link -> no Link\n")); ++ pDM_FatTable->FAT_State = FAT_BEFORE_LINK_STATE; ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", pDM_FatTable->FAT_State)); ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ ++ } else { ++ if (pDM_FatTable->bBecomeLinked == FALSE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); ++ ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", pDM_FatTable->FAT_State)); ++ ++ /*pdm_sat_table->fast_training_beam_num = 0;*/ ++ /*phydm_set_all_ant_same_beam_num(pDM_Odm);*/ ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_DESC); ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("HL Smart Ant Training: State (( %d ))\n", pDM_FatTable->FAT_State));*/ ++ ++ /* [DECISION STATE] */ ++ /*=======================================================================================*/ ++ if (pDM_FatTable->FAT_State == FAT_DECISION_STATE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 3. In Decision State]\n")); ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ ++ /*compute target beam in each antenna*/ ++ for (i = 0; i < (pdm_sat_table->ant_num); i++) { ++ for (j = 0; j < (pdm_sat_table->beam_patten_num_each_ant); j++) { ++ ++ if (pdm_sat_table->pkt_rssi_cnt[i][j] == 0) { ++ avg_rssi_tmp = pdm_sat_table->pkt_rssi_pre[i][j]; ++ /**/ ++ } else { ++ avg_rssi_tmp = (pdm_sat_table->pkt_rssi_sum[i][j]) / (pdm_sat_table->pkt_rssi_cnt[i][j]); ++ pdm_sat_table->pkt_rssi_pre[i][j] = avg_rssi_tmp; ++ /**/ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant[%d], Beam[%d]: pkt_num=(( %d )), avg_rssi=(( %d ))\n", i, j, pdm_sat_table->pkt_rssi_cnt[i][j], avg_rssi_tmp)); ++ ++ if (avg_rssi_tmp > target_ant_beam_max_rssi[i]) { ++ target_ant_beam[i] = j; ++ target_ant_beam_max_rssi[i] = avg_rssi_tmp; ++ } ++ ++ /*reset counter value*/ ++ pdm_sat_table->pkt_rssi_sum[i][j] = 0; ++ pdm_sat_table->pkt_rssi_cnt[i][j] = 0; ++ ++ } ++ pdm_sat_table->rx_idle_beam[i] = target_ant_beam[i]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("---------> Target of Ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n", ++ i, target_ant_beam[i], target_ant_beam_max_rssi[i])); ++ ++ if (target_ant_beam_max_rssi[i] > max_beam_ant_rssi) { ++ TargetAnt = i; ++ max_beam_ant_rssi = target_ant_beam_max_rssi[i]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Target of Ant = (( %d )) max_beam_ant_rssi = (( %d ))\n", ++ TargetAnt, max_beam_ant_rssi)); ++ } ++ } ++ ++ if (TargetAnt == 0) ++ TargetAnt = MAIN_ANT; ++ else if (TargetAnt == 1) ++ TargetAnt = AUX_ANT; ++ ++ /* [ update RX ant ]*/ ++ ODM_UpdateRxIdleAnt(pDM_Odm, (u1Byte)TargetAnt); ++ ++ /* [ update TX ant ]*/ ++ odm_UpdateTxAnt(pDM_Odm, (u1Byte)TargetAnt, (pDM_FatTable->TrainIdx)); ++ ++ /*set beam in each antenna*/ ++ phydm_update_rx_idle_beam(pDM_Odm); ++ ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ ++ } ++ /* [TRAINING STATE] */ ++ else if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2. In Training State]\n")); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n", ++ pdm_sat_table->fast_training_beam_num, pdm_sat_table->pre_fast_training_beam_num)); ++ ++ if (pdm_sat_table->fast_training_beam_num > pdm_sat_table->pre_fast_training_beam_num) { ++ ++ pdm_sat_table->force_update_beam_en = 0; ++ ++ } else { ++ ++ pdm_sat_table->force_update_beam_en = 1; ++ ++ pdm_sat_table->pkt_counter = 0; ++ beam_tmp = pdm_sat_table->fast_training_beam_num; ++ if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant-1)) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", pdm_sat_table->fast_training_beam_num)); ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ pDM_FatTable->FAT_State = FAT_DECISION_STATE; ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++ ++ } else { ++ pdm_sat_table->fast_training_beam_num++; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num)); ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ ++ } ++ } ++ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num)); ++ } ++ /* [Prepare State] */ ++ /*=======================================================================================*/ ++ else if (pDM_FatTable->FAT_State == FAT_PREPARE_STATE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n\n[ 1. In Prepare State]\n")); ++ ++ if (pDM_Odm->pre_TrafficLoad == (pDM_Odm->TrafficLoad)) { ++ if (pdm_sat_table->decision_holding_period != 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Holding_period = (( %d )), return!!!\n", pdm_sat_table->decision_holding_period)); ++ pdm_sat_table->decision_holding_period--; ++ return; ++ } ++ } ++ ++ ++ /* Set training packet number*/ ++ if (pdm_sat_table->fix_training_num_en == 0) { ++ ++ switch (pDM_Odm->TrafficLoad) { ++ ++ case TRAFFIC_HIGH: ++ pdm_sat_table->per_beam_training_pkt_num = 20; ++ pdm_sat_table->decision_holding_period = 0; ++ break; ++ case TRAFFIC_MID: ++ pdm_sat_table->per_beam_training_pkt_num = 10; ++ pdm_sat_table->decision_holding_period = 1; ++ break; ++ case TRAFFIC_LOW: ++ pdm_sat_table->per_beam_training_pkt_num = 5; /*ping 60000*/ ++ pdm_sat_table->decision_holding_period = 3; ++ break; ++ case TRAFFIC_ULTRA_LOW: ++ pdm_sat_table->per_beam_training_pkt_num = 2; ++ pdm_sat_table->decision_holding_period = 5; ++ break; ++ default: ++ break; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fix_training_num = (( %d )), per_beam_training_pkt_num = (( %d ))\n", ++ pdm_sat_table->fix_training_num_en , pdm_sat_table->per_beam_training_pkt_num)); ++ ++ /* Set training MAC Addr. of target */ ++ odm_SetNextMACAddrTarget(pDM_Odm); ++ ++ phydm_FastTraining_enable(pDM_Odm , FAT_ON); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ pdm_sat_table->pkt_counter = 0; ++ pdm_sat_table->fast_training_beam_num = 0; ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ } ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++phydm_beam_switch_workitem_callback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ ++ #if DEV_BUS_TYPE != RT_PCI_INTERFACE ++ pdm_sat_table->pkt_skip_statistic_en = 1; ++ #endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en)); ++ ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ ++ #if DEV_BUS_TYPE != RT_PCI_INTERFACE ++ /*ODM_StallExecution(pdm_sat_table->latch_time);*/ ++ pdm_sat_table->pkt_skip_statistic_en = 0; ++ #endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en, pdm_sat_table->latch_time)); ++} ++ ++VOID ++phydm_beam_decision_workitem_callback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam decision Workitem Callback\n")); ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++} ++#endif ++ ++#endif /*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ ++VOID ++ODM_AntDivInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); ++ return; ++ } ++ //--- ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) ++ return; ++ } ++ else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) ++ return; ++ } ++ else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n")); ++ } ++ ++#endif ++ //--- ++ ++ //2 [--General---] ++ pDM_Odm->antdiv_period=0; ++ ++ pDM_FatTable->bBecomeLinked =FALSE; ++ pDM_FatTable->AntDiv_OnOff =0xff; ++ ++ //3 - AP - ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ odm_BDC_Init(pDM_Odm); ++ #endif ++ #endif ++ ++ //3 - WIN - ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_SWAT_Table->Ant5G = MAIN_ANT; ++ pDM_SWAT_Table->Ant2G = MAIN_ANT; ++ pDM_FatTable->CCK_counter_main=0; ++ pDM_FatTable->CCK_counter_aux=0; ++ pDM_FatTable->OFDM_counter_main=0; ++ pDM_FatTable->OFDM_counter_aux=0; ++ #endif ++ ++ //2 [---Set MAIN_ANT as default antenna if Auto-Ant enable---] ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ++ pDM_Odm->AntType = ODM_AUTO_ANT; ++ ++ pDM_FatTable->RxIdleAnt = 0xff; /*to make RX-idle-antenna will be updated absolutly*/ ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ ++ //2 [---Set TX Antenna---] ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ ++ ++ //2 [--88E---] ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ #if (RTL8188E_SUPPORT == 1) ++ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ++ if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 88E Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ ++ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ odm_RX_HWAntDiv_Init_88E(pDM_Odm); ++ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_88E(pDM_Odm); ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) ++ odm_Smart_HWAntDiv_Init_88E(pDM_Odm); ++ #endif ++ #endif ++ } ++ ++ //2 [--92E---] ++ #if (RTL8192E_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ++ if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8192E Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ ++ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ odm_RX_HWAntDiv_Init_92E(pDM_Odm); ++ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_92E(pDM_Odm); ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) ++ odm_Smart_HWAntDiv_Init_92E(pDM_Odm); ++ #endif ++ ++ } ++ #endif ++ ++ //2 [--8723B---] ++ #if (RTL8723B_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ //pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ++ if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8723B Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ ++ if( pDM_Odm->AntDivType==S0S1_SW_ANTDIV) ++ odm_S0S1_SWAntDiv_Init_8723B(pDM_Odm); ++ else if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_8723B(pDM_Odm); ++ } ++ #endif ++ ++ //2 [--8811A 8821A---] ++ #if (RTL8821A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ pDM_Odm->AntDivType = HL_SW_SMART_ANT_TYPE1; ++ ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { ++ ++ odm_TRX_HWAntDiv_Init_8821A(pDM_Odm); ++ phydm_hl_smart_ant_type1_init_8821a(pDM_Odm); ++ } else ++ #endif ++ { ++ /*pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV;*/ ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ++ if (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV && pDM_Odm->AntDivType != S0S1_SW_ANTDIV) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Return!!!] 8821A & 8811A Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_8821A(pDM_Odm); ++ else if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) ++ odm_S0S1_SWAntDiv_Init_8821A(pDM_Odm); ++ } ++ } ++ #endif ++ ++ //2 [--8881A---] ++ #if (RTL8881A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ { ++ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ++ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8881A Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ odm_RX_HWAntDiv_Init_8881A(pDM_Odm); ++ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_8881A(pDM_Odm); ++ } ++ #endif ++ ++ //2 [--8812---] ++ #if (RTL8812A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ++ if( pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8812A Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ odm_TRX_HWAntDiv_Init_8812A(pDM_Odm); ++ } ++ #endif ++ ++ /*[--8188F---]*/ ++ #if (RTL8188F_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ odm_S0S1_SWAntDiv_Init_8188F(pDM_Odm); ++ } ++ #endif ++ /* ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** SupportICType=[%lu]\n",pDM_Odm->SupportICType)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv SupportAbility=[%lu]\n",(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)>>6)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv Type=[%d]\n",pDM_Odm->AntDivType)); ++ */ ++} ++ ++VOID ++ODM_AntDiv( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ #endif ++ ++ if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ if(pDM_FatTable->idx_AntDiv_counter_5G < pDM_Odm->antdiv_period ) ++ { ++ pDM_FatTable->idx_AntDiv_counter_5G++; ++ return; ++ } ++ else ++ pDM_FatTable->idx_AntDiv_counter_5G=0; ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ if(pDM_FatTable->idx_AntDiv_counter_2G < pDM_Odm->antdiv_period ) ++ { ++ pDM_FatTable->idx_AntDiv_counter_2G++; ++ return; ++ } ++ else ++ pDM_FatTable->idx_AntDiv_counter_2G=0; ++ } ++ ++ //---------- ++ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); ++ return; ++ } ++ ++ //---------- ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ if (pDM_FatTable->enable_ctrl_frame_antdiv) { ++ ++ if ((pDM_Odm->data_frame_num <= 10) && (pDM_Odm->bLinked)) ++ pDM_FatTable->use_ctrl_frame_antdiv = 1; ++ else ++ pDM_FatTable->use_ctrl_frame_antdiv = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n", pDM_FatTable->use_ctrl_frame_antdiv, pDM_Odm->data_frame_num)); ++ pDM_Odm->data_frame_num = 0; ++ } ++ ++ if(pAdapter->MgntInfo.AntennaTest) ++ return; ++ ++ { ++ #if (BEAMFORMING_SUPPORT == 1) ++ BEAMFORMING_CAP BeamformCap = (pDM_Odm->BeamformingInfo.BeamformCap); ++ ++ if( BeamformCap & BEAMFORMEE_CAP ) // BFmee On && Div On -> Div Off ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ AntDiv : OFF ] BFmee ==1 \n")); ++ if(pDM_FatTable->fix_ant_bfee == 0) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ pDM_FatTable->fix_ant_bfee = 1; ++ } ++ return; ++ } ++ else // BFmee Off && Div Off -> Div On ++ { ++ if((pDM_FatTable->fix_ant_bfee == 1) && pDM_Odm->bLinked) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ AntDiv : ON ] BFmee ==0\n")); ++ if((pDM_Odm->AntDivType!=S0S1_SW_ANTDIV) ) ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ ++ pDM_FatTable->fix_ant_bfee = 0; ++ } ++ } ++ #endif ++ } ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ //----------just for fool proof ++ ++ if(pDM_Odm->antdiv_rssi) ++ pDM_Odm->DebugComponents |= ODM_COMP_ANT_DIV; ++ else ++ pDM_Odm->DebugComponents &= ~ODM_COMP_ANT_DIV; ++ ++ if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) ++ { ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G AntDiv Running ]\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) ++ return; ++ } ++ else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) ++ { ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 5G AntDiv Running ]\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) ++ return; ++ } ++ //else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) ++ //{ ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G & 5G AntDiv Running ]\n")); ++ //} ++#endif ++ ++ //---------- ++ ++ if (pDM_Odm->antdiv_select==1) ++ pDM_Odm->AntType = ODM_FIX_MAIN_ANT; ++ else if (pDM_Odm->antdiv_select==2) ++ pDM_Odm->AntType = ODM_FIX_AUX_ANT; ++ else //if (pDM_Odm->antdiv_select==0) ++ pDM_Odm->AntType = ODM_AUTO_ANT; ++ ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("AntType= (( %d )) , pre_AntType= (( %d )) \n",pDM_Odm->AntType,pDM_Odm->pre_AntType)); ++ ++ if(pDM_Odm->AntType != ODM_AUTO_ANT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fix Antenna at (( %s ))\n",(pDM_Odm->AntType == ODM_FIX_MAIN_ANT)?"MAIN":"AUX")); ++ ++ if(pDM_Odm->AntType != pDM_Odm->pre_AntType) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ ++ if(pDM_Odm->AntType == ODM_FIX_MAIN_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ else if(pDM_Odm->AntType == ODM_FIX_AUX_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ } ++ pDM_Odm->pre_AntType=pDM_Odm->AntType; ++ return; ++ } ++ else ++ { ++ if(pDM_Odm->AntType != pDM_Odm->pre_AntType) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); ++ } ++ pDM_Odm->pre_AntType=pDM_Odm->AntType; ++ } ++ ++ ++ //3 ----------------------------------------------------------------------------------------------------------- ++ //2 [--88E---] ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ #if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV ||pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) ++ odm_FastAntTraining(pDM_Odm); ++ #endif ++ ++ #endif ++ ++ } ++ //2 [--92E---] ++ #if (RTL8192E_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if(pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV || pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) ++ odm_FastAntTraining(pDM_Odm); ++ #endif ++ ++ } ++ #endif ++ ++ #if (RTL8723B_SUPPORT == 1) ++ //2 [--8723B---] ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if (phydm_IsBtEnable_8723b(pDM_Odm)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BT is enable!!!] AntDiv: OFF\n")); ++ if (pDM_FatTable->bBecomeLinked == TRUE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set REG 948[9:6]=0x0\n")); ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9|BIT8|BIT7|BIT6, 0x0); ++ ++ pDM_FatTable->bBecomeLinked = FALSE; ++ } ++ } else { ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); ++ #endif ++ } else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ } ++ } ++ #endif ++ ++ //2 [--8821A---] ++ #if (RTL8821A_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { ++ ++ if (pdm_sat_table->fix_beam_pattern_en != 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", pdm_sat_table->fix_beam_pattern_codeword)); ++ /*return;*/ ++ } else { ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] AntDivType = HL_SW_SMART_ANT_TYPE1\n"));*/ ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++ } ++ ++ } else ++ #endif ++ { ++ if (!pDM_Odm->bBtEnabled) /*BT disabled*/ ++ { ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [S0S1_SW_ANTDIV] -> [CG_TRX_HW_ANTDIV]\n")); ++ /*ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 1); */ ++ if (pDM_FatTable->bBecomeLinked == TRUE) ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ } ++ ++ } else { /*BT enabled*/ ++ ++ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [CG_TRX_HW_ANTDIV] -> [S0S1_SW_ANTDIV]\n")); ++ /*ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 0);*/ ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ } ++ } ++ ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); ++ #endif ++ } else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ } ++ } ++ #endif ++ ++ //2 [--8881A---] ++ #if (RTL8881A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ odm_HW_AntDiv(pDM_Odm); ++ #endif ++ ++ //2 [--8812A---] ++ #if (RTL8812A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ odm_HW_AntDiv(pDM_Odm); ++ #endif ++ ++ #if (RTL8188F_SUPPORT == 1) ++ /* [--8188F---]*/ ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); ++ #endif ++ } ++ #endif ++ ++} ++ ++ ++VOID ++odm_AntselStatistics( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte MacId, ++ IN u4Byte utility, ++ IN u1Byte method ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ if(method==RSSI_METHOD) ++ { ++ if(antsel_tr_mux == ANT1_2G) ++ { ++ pDM_FatTable->MainAnt_Sum[MacId]+=utility; ++ pDM_FatTable->MainAnt_Cnt[MacId]++; ++ } ++ else ++ { ++ pDM_FatTable->AuxAnt_Sum[MacId]+=utility; ++ pDM_FatTable->AuxAnt_Cnt[MacId]++; ++ } ++ } ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ else if(method==EVM_METHOD) ++ { ++ if(antsel_tr_mux == ANT1_2G) ++ { ++ pDM_FatTable->MainAntEVM_Sum[MacId]+=(utility<<5); ++ pDM_FatTable->MainAntEVM_Cnt[MacId]++; ++ } ++ else ++ { ++ pDM_FatTable->AuxAntEVM_Sum[MacId]+=(utility<<5); ++ pDM_FatTable->AuxAntEVM_Cnt[MacId]++; ++ } ++ } ++ else if(method==CRC32_METHOD) ++ { ++ if(utility==0) ++ pDM_FatTable->CRC32_Fail_Cnt++; ++ else ++ pDM_FatTable->CRC32_Ok_Cnt+=utility; ++ } ++ #endif ++} ++ ++ ++VOID ++ODM_Process_RSSIForAntDiv( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ //IN PODM_PHY_INFO_T pPhyInfo, ++ //IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; ++ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; ++ u1Byte isCCKrate=0,CCKMaxRate=ODM_RATE11M; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u4Byte beam_tmp; ++ #endif ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ u4Byte RxPower_Ant0, RxPower_Ant1; ++ u4Byte RxEVM_Ant0, RxEVM_Ant1; ++ #else ++ u1Byte RxPower_Ant0, RxPower_Ant1; ++ u1Byte RxEVM_Ant0, RxEVM_Ant1; ++ #endif ++ ++ CCKMaxRate=ODM_RATE11M; ++ isCCKrate = (pPktinfo->DataRate <= CCKMaxRate)?TRUE:FALSE; ++ ++ if ((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8812)) && (pPktinfo->DataRate > CCKMaxRate)) ++ { ++ RxPower_Ant0 = pPhyInfo->RxMIMOSignalStrength[0]; ++ RxPower_Ant1= pPhyInfo->RxMIMOSignalStrength[1]; ++ ++ RxEVM_Ant0 =pPhyInfo->RxMIMOSignalQuality[0]; ++ RxEVM_Ant1 =pPhyInfo->RxMIMOSignalQuality[1]; ++ } ++ else ++ RxPower_Ant0=pPhyInfo->RxPWDBAll; ++ ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) ++ { ++ if ((pDM_Odm->SupportICType & ODM_HL_SMART_ANT_TYPE1_SUPPORT) && ++ (pPktinfo->bPacketToSelf) && ++ (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) ++ ) { ++ ++ if (pdm_sat_table->pkt_skip_statistic_en == 0) { ++ /* ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", ++ pPktinfo->StationID, pDM_FatTable->antsel_rx_keep_0, pDM_FatTable->hw_antsw_occur, pdm_sat_table->fast_training_beam_num, RxPower_Ant0)); ++ */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antsel_pathA = ((%d)), bPacketToSelf = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", ++ pPktinfo->StationID, pDM_FatTable->antsel_rx_keep_0, pPktinfo->bPacketToSelf, pdm_sat_table->fast_training_beam_num, RxPower_Ant0)); ++ ++ ++ pdm_sat_table->pkt_rssi_sum[pDM_FatTable->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num] += RxPower_Ant0; ++ pdm_sat_table->pkt_rssi_cnt[pDM_FatTable->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num]++; ++ pdm_sat_table->pkt_counter++; ++ ++ /*swich beam every N pkt*/ ++ if ((pdm_sat_table->pkt_counter) >= (pdm_sat_table->per_beam_training_pkt_num)) { ++ ++ pdm_sat_table->pkt_counter = 0; ++ beam_tmp = pdm_sat_table->fast_training_beam_num; ++ ++ if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant-1)) { ++ ++ pDM_FatTable->FAT_State = FAT_DECISION_STATE; ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_decision_workitem); ++ #endif ++ ++ ++ } else { ++ pdm_sat_table->fast_training_beam_num++; ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num)); ++ } ++ } ++ } ++ } ++ } else ++ #endif ++ if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) { ++ if( (pDM_Odm->SupportICType & ODM_SMART_ANT_SUPPORT) && (pPktinfo->bPacketToSelf) && (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) )//(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon)) ++ { ++ u1Byte antsel_tr_mux; ++ antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; ++ pDM_FatTable->antSumRSSI[antsel_tr_mux] += RxPower_Ant0; ++ pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; ++ } ++ } ++ else //AntDivType != CG_TRX_SMART_ANTDIV ++ { ++ if ((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pPktinfo->bPacketToSelf || pDM_FatTable->use_ctrl_frame_antdiv)) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID,RxPower_Ant0,RSSI_METHOD); ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ if(!isCCKrate) ++ { ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID,RxEVM_Ant0,EVM_METHOD); ++ } ++ #endif ++ } ++ else// SupportICType == ODM_RTL8821 and ODM_RTL8723B and ODM_RTL8812) ++ { ++ if(isCCKrate && (pDM_Odm->AntDivType == S0S1_SW_ANTDIV)) ++ { ++ pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; ++ ++ ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->CCK_counter_main++; ++ else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) ++ pDM_FatTable->CCK_counter_aux++; ++ ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0,RSSI_METHOD); ++ } ++ else ++ { ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->OFDM_counter_main++; ++ else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) ++ pDM_FatTable->OFDM_counter_aux++; ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0,RSSI_METHOD); ++ } ++ } ++ } ++ } ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("isCCKrate=%d, PWDB_ALL=%d\n",isCCKrate, pPhyInfo->RxPWDBAll)); ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n",pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); ++} ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++VOID ++ODM_SetTxAntByTxInfo( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ return; ++ ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ return; ++ ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++#if (RTL8723B_SUPPORT == 1) ++ SET_TX_DESC_ANTSEL_A_8723B(pDesc, pDM_FatTable->antsel_a[macId]); ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8723B] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", ++ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8821) { ++#if (RTL8821A_SUPPORT == 1) ++ SET_TX_DESC_ANTSEL_A_8812(pDesc, pDM_FatTable->antsel_a[macId]); ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8821A] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", ++ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8188E) { ++#if (RTL8188E_SUPPORT == 1) ++ SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]); ++ SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]); ++ SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]); ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8188E] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", ++ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ ++#endif ++ } ++} ++#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++VOID ++ODM_SetTxAntByTxInfo( ++ struct rtl8192cd_priv *priv, ++ struct tx_desc *pdesc, ++ unsigned short aid ++) ++{ ++ pFAT_T pDM_FatTable = &priv->pshare->_dmODM.DM_FatTable; ++ u4Byte SupportICType = priv->pshare->_dmODM.SupportICType; ++ ++ if (SupportICType == ODM_RTL8881A) { ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__); */ ++ pdesc->Dword6 &= set_desc(~(BIT(18)|BIT(17)|BIT(16))); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); ++ } else if (SupportICType == ODM_RTL8192E) { ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__); */ ++ pdesc->Dword6 &= set_desc(~(BIT(18)|BIT(17)|BIT(16))); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); ++ } else if (SupportICType == ODM_RTL8188E) { ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8188E******\n",__FUNCTION__,__LINE__);*/ ++ pdesc->Dword2 &= set_desc(~BIT(24)); ++ pdesc->Dword2 &= set_desc(~BIT(25)); ++ pdesc->Dword7 &= set_desc(~BIT(29)); ++ ++ pdesc->Dword2 |= set_desc(pDM_FatTable->antsel_a[aid]<<24); ++ pdesc->Dword2 |= set_desc(pDM_FatTable->antsel_b[aid]<<25); ++ pdesc->Dword7 |= set_desc(pDM_FatTable->antsel_c[aid]<<29); ++ ++ ++ } else if (SupportICType == ODM_RTL8812) { ++ /*[path-A]*/ ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);*/ ++ ++ pdesc->Dword6 &= set_desc(~BIT(16)); ++ pdesc->Dword6 &= set_desc(~BIT(17)); ++ pdesc->Dword6 &= set_desc(~BIT(18)); ++ ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_b[aid]<<17); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_c[aid]<<18); ++ ++ } ++} ++#endif ++ ++ ++VOID ++ODM_AntDiv_Config( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("WIN Config Antenna Diversity\n")); ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ { ++ if((!pDM_Odm->DM_SWAT_Table.ANTA_ON || !pDM_Odm->DM_SWAT_Table.ANTB_ON)) ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ } ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CE Config Antenna Diversity\n")); ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) ++ { ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ } ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ { ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ } ++ ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("AP Config Antenna Diversity\n")); ++ ++ //2 [ NOT_SUPPORT_ANTDIV ] ++ #if(defined(CONFIG_NOT_SUPPORT_ANTDIV)) ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n")); ++ ++ //2 [ 2G&5G_SUPPORT_ANTDIV ] ++ #elif(defined(CONFIG_2G5G_SUPPORT_ANTDIV)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously \n")); ++ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G|ODM_ANTDIV_5G); ++ ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); ++ #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY)||defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); ++ #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ ++ //2 [ 5G_SUPPORT_ANTDIV ] ++ #elif(defined(CONFIG_5G_SUPPORT_ANTDIV)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n")); ++ panic_printk("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); ++ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_5G); ++ if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC) ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); ++ #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 2G AntDivType\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ } ++ ++ //2 [ 2G_SUPPORT_ANTDIV ] ++ #elif(defined(CONFIG_2G_SUPPORT_ANTDIV)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n")); ++ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G); ++ if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC) ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 5G AntDivType\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ } ++ #endif ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SupportAbility = (( %x ))\n", pDM_Odm->SupportAbility )); ++ ++} ++ ++ ++VOID ++ODM_AntDivTimers( ++ IN PVOID pDM_VOID, ++ IN u1Byte state ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(state==INIT_ANTDIV_TIMMER) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_InitializeTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer), ++ (RT_TIMER_CALL_BACK)ODM_SW_AntDiv_Callback, NULL, "phydm_SwAntennaSwitchTimer"); ++ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, ++ (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ ODM_InitializeTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, ++ (RT_TIMER_CALL_BACK)odm_EVM_FastAntTrainingCallback, NULL, "EVM_FastAntTrainingTimer"); ++ #endif ++ } ++ else if(state==CANCEL_ANTDIV_TIMMER) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_CancelTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer)); ++ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ ODM_CancelTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer); ++ #endif ++ } ++ else if(state==RELEASE_ANTDIV_TIMMER) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_ReleaseTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer)); ++ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer); ++ #endif ++ } ++ ++} ++ ++#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ ++ ++VOID ++ODM_AntDivReset( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SWAntDiv_Reset(pDM_Odm); ++ #endif ++ } ++ ++} ++ ++VOID ++odm_AntennaDiversityInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(pDM_Odm->mp_mode == TRUE) ++ return; ++ ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDiv_Config(pDM_Odm); ++ ODM_AntDivInit(pDM_Odm); ++ #endif ++} ++ ++VOID ++odm_AntennaDiversity( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(pDM_Odm->mp_mode == TRUE) ++ return; ++ ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDiv(pDM_Odm); ++ #endif ++} ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdiv.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdiv.h new file mode 100644 -index 000000000..83b6353f5 +index 0000000..8d72d28 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_antdiv.h @@ -0,0 +1,567 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMANTDIV_H__ -+#define __PHYDMANTDIV_H__ -+ -+/*#define ANTDIV_VERSION "2.0" //2014.11.04*/ -+/*#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/ -+/*#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/ -+/*#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen, remove 92c 92d 8723a*/ -+/*#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna diversity when BT is enable for 8723B*/ -+/*#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not need to check the antenna is control by BT, -+ because antenna diversity only works when BT is disable or radio off*/ -+#define ANTDIV_VERSION "3.4" /*2015.08.28 Dino 1.Add 8821A Smart Antenna 2. Add 8188F SW S0S1 Antenna Diversity*/ -+ -+//1 ============================================================ -+//1 Definition -+//1 ============================================================ -+ -+#define MAIN_ANT 1 -+#define AUX_ANT 2 -+ -+#define ANT1_2G 0 // = ANT2_5G -+#define ANT2_2G 1 // = ANT1_5G -+/*smart antenna*/ -+#define SUPPORT_RF_PATH_NUM 4 -+#define SUPPORT_BEAM_PATTERN_NUM 4 -+ -+ -+//Antenna Diversty Control Type -+#define ODM_AUTO_ANT 0 -+#define ODM_FIX_MAIN_ANT 1 -+#define ODM_FIX_AUX_ANT 2 -+ -+#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8188F) -+#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) -+#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT|ODM_AC_ANTDIV_SUPPORT) -+#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E) -+#define ODM_HL_SMART_ANT_TYPE1_SUPPORT (ODM_RTL8821) -+ -+#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A|ODM_RTL8188F) -+#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) -+ -+#define ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC (ODM_RTL8192E) -+ -+#define ODM_ANTDIV_2G BIT0 -+#define ODM_ANTDIV_5G BIT1 -+ -+#define ANTDIV_ON 1 -+#define ANTDIV_OFF 0 -+ -+#define FAT_ON 1 -+#define FAT_OFF 0 -+ -+#define TX_BY_DESC 1 -+#define TX_BY_REG 0 -+ -+#define RSSI_METHOD 0 -+#define EVM_METHOD 1 -+#define CRC32_METHOD 2 -+ -+#define INIT_ANTDIV_TIMMER 0 -+#define CANCEL_ANTDIV_TIMMER 1 -+#define RELEASE_ANTDIV_TIMMER 2 -+ -+#define CRC32_FAIL 1 -+#define CRC32_OK 0 -+ -+#define Evm_RSSI_TH_High 25 -+#define Evm_RSSI_TH_Low 20 -+ -+#define NORMAL_STATE_MIAN 1 -+#define NORMAL_STATE_AUX 2 -+#define TRAINING_STATE 3 -+ -+#define FORCE_RSSI_DIFF 10 -+ -+#define CSI_ON 1 -+#define CSI_OFF 0 -+ -+#define DIVON_CSIOFF 1 -+#define DIVOFF_CSION 2 -+ -+#define BDC_DIV_TRAIN_STATE 0 -+#define BDC_BFer_TRAIN_STATE 1 -+#define BDC_DECISION_STATE 2 -+#define BDC_BF_HOLD_STATE 3 -+#define BDC_DIV_HOLD_STATE 4 -+ -+#define BDC_MODE_1 1 -+#define BDC_MODE_2 2 -+#define BDC_MODE_3 3 -+#define BDC_MODE_4 4 -+#define BDC_MODE_NULL 0xff -+ -+/*SW S0S1 antenna diversity*/ -+#define SWAW_STEP_INIT 0xff -+#define SWAW_STEP_PEEK 0 -+#define SWAW_STEP_DETERMINE 1 -+ -+#define RSSI_CHECK_RESET_PERIOD 10 -+#define RSSI_CHECK_THRESHOLD 50 -+ -+/*Hong Lin Smart antenna*/ -+#define HL_SMTANT_2WIRE_DATA_LEN 24 -+ -+//1 ============================================================ -+//1 structure -+//1 ============================================================ -+ -+ -+typedef struct _SW_Antenna_Switch_ -+{ -+ u1Byte Double_chk_flag; /*If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than check this antenna again*/ -+ u1Byte try_flag; -+ s4Byte PreRSSI; -+ u1Byte CurAntenna; -+ u1Byte PreAntenna; -+ u1Byte RSSI_Trying; -+ u1Byte reset_idx; -+ u1Byte Train_time; -+ u1Byte Train_time_flag; /*base on RSSI difference between two antennas*/ -+ RT_TIMER phydm_SwAntennaSwitchTimer; -+ u4Byte PktCnt_SWAntDivByCtrlFrame; -+ BOOLEAN bSWAntDivByCtrlFrame; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #if USE_WORKITEM -+ RT_WORK_ITEM phydm_SwAntennaSwitchWorkitem; -+ #endif -+ #endif -+ -+ /* AntDect (Before link Antenna Switch check) need to be moved*/ -+ u2Byte Single_Ant_Counter; -+ u2Byte Dual_Ant_Counter; -+ u2Byte Aux_FailDetec_Counter; -+ u2Byte Retry_Counter; -+ u1Byte SWAS_NoLink_State; -+ u4Byte SWAS_NoLink_BK_Reg948; -+ BOOLEAN ANTA_ON; /*To indicate Ant A is or not*/ -+ BOOLEAN ANTB_ON; /*To indicate Ant B is on or not*/ -+ BOOLEAN Pre_Aux_FailDetec; -+ BOOLEAN RSSI_AntDect_bResult; -+ u1Byte Ant5G; -+ u1Byte Ant2G; -+ -+ -+}SWAT_T, *pSWAT_T; -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+typedef struct _BF_DIV_COEX_ -+{ -+ BOOLEAN w_BFer_Client[ODM_ASSOCIATE_ENTRY_NUM]; -+ BOOLEAN w_BFee_Client[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM]; -+ -+ u1Byte BDCcoexType_wBfer; -+ u1Byte num_Txbfee_Client; -+ u1Byte num_Txbfer_Client; -+ u1Byte BDC_Try_counter; -+ u1Byte BDC_Hold_counter; -+ u1Byte BDC_Mode; -+ u1Byte BDC_active_Mode; -+ u1Byte BDC_state; -+ u1Byte BDC_RxIdleUpdate_counter; -+ u1Byte num_Client; -+ u1Byte pre_num_Client; -+ u1Byte num_BfTar; -+ u1Byte num_DivTar; -+ -+ BOOLEAN bAll_DivSta_Idle; -+ BOOLEAN bAll_BFSta_Idle; -+ BOOLEAN BDC_Try_flag; -+ BOOLEAN BF_pass; -+ BOOLEAN DIV_pass; -+}BDC_T,*pBDC_T; -+#endif -+#endif -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+typedef struct _SMART_ANTENNA_TRAINNING_ { -+ u4Byte latch_time; -+ BOOLEAN pkt_skip_statistic_en; -+ u4Byte fix_beam_pattern_en; -+ u4Byte fix_training_num_en; -+ u4Byte fix_beam_pattern_codeword; -+ u4Byte update_beam_codeword; -+ u4Byte ant_num; /*number of smart beam antenna*/ -+ u4Byte beam_patten_num_each_ant;/*number of beam can be switched in each antenna*/ -+ u4Byte data_codeword_bit_num; -+ u4Byte per_beam_training_pkt_num; -+ u1Byte decision_holding_period; -+ u4Byte pkt_counter; -+ u4Byte fast_training_beam_num; -+ u4Byte pre_fast_training_beam_num; -+ u4Byte pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM]; -+ u4Byte pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM]; -+ u4Byte pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM]; -+ u4Byte rx_idle_beam[SUPPORT_RF_PATH_NUM]; -+ u4Byte pre_codeword; -+ BOOLEAN force_update_beam_en; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_WORK_ITEM hl_smart_antenna_workitem; -+ RT_WORK_ITEM hl_smart_antenna_decision_workitem; -+ #endif -+ -+} SAT_T, *pSAT_T; -+#endif -+ -+typedef struct _FAST_ANTENNA_TRAINNING_ -+{ -+ u1Byte Bssid[6]; -+ u1Byte antsel_rx_keep_0; -+ u1Byte antsel_rx_keep_1; -+ u1Byte antsel_rx_keep_2; -+ u1Byte antsel_rx_keep_3; -+ u4Byte antSumRSSI[7]; -+ u4Byte antRSSIcnt[7]; -+ u4Byte antAveRSSI[7]; -+ u1Byte FAT_State; -+ u4Byte TrainIdx; -+ u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; -+ u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; -+ u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u1Byte RxIdleAnt; -+ u1Byte AntDiv_OnOff; -+ BOOLEAN bBecomeLinked; -+ u4Byte MinMaxRSSI; -+ u1Byte idx_AntDiv_counter_2G; -+ u1Byte idx_AntDiv_counter_5G; -+ u1Byte AntDiv_2G_5G; -+ u4Byte CCK_counter_main; -+ u4Byte CCK_counter_aux; -+ u4Byte OFDM_counter_main; -+ u4Byte OFDM_counter_aux; -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ u4Byte MainAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte AuxAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte MainAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte AuxAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ BOOLEAN EVM_method_enable; -+ u1Byte TargetAnt_EVM; -+ u1Byte TargetAnt_CRC32; -+ u1Byte TargetAnt_enhance; -+ u1Byte pre_TargetAnt_enhance; -+ u2Byte Main_MPDU_OK_cnt; -+ u2Byte Aux_MPDU_OK_cnt; -+ -+ u4Byte CRC32_Ok_Cnt; -+ u4Byte CRC32_Fail_Cnt; -+ u4Byte MainCRC32_Ok_Cnt; -+ u4Byte AuxCRC32_Ok_Cnt; -+ u4Byte MainCRC32_Fail_Cnt; -+ u4Byte AuxCRC32_Fail_Cnt; -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ u4Byte CCK_CtrlFrame_Cnt_main; -+ u4Byte CCK_CtrlFrame_Cnt_aux; -+ u4Byte OFDM_CtrlFrame_Cnt_main; -+ u4Byte OFDM_CtrlFrame_Cnt_aux; -+ u4Byte MainAnt_CtrlFrame_Sum; -+ u4Byte AuxAnt_CtrlFrame_Sum; -+ u4Byte MainAnt_CtrlFrame_Cnt; -+ u4Byte AuxAnt_CtrlFrame_Cnt; -+ #endif -+ BOOLEAN fix_ant_bfee; -+ BOOLEAN enable_ctrl_frame_antdiv; -+ BOOLEAN use_ctrl_frame_antdiv; -+ u1Byte hw_antsw_occur; -+}FAT_T,*pFAT_T; -+ -+ -+//1 ============================================================ -+//1 enumeration -+//1 ============================================================ -+ -+ -+ -+typedef enum _FAT_STATE /*Fast antenna training*/ -+{ -+ FAT_BEFORE_LINK_STATE = 0, -+ FAT_PREPARE_STATE = 1, -+ FAT_TRAINING_STATE = 2, -+ FAT_DECISION_STATE = 3 -+}FAT_STATE_E, *PFAT_STATE_E; -+ -+typedef enum _ANT_DIV_TYPE -+{ -+ CG_TRX_HW_ANTDIV = 0x01, -+ CGCS_RX_HW_ANTDIV = 0x02, -+ CG_TRX_SMART_ANTDIV = 0x03, -+ S0S1_SW_ANTDIV = 0x04, /*8723B intrnal switch S0 S1*/ -+ HL_SW_SMART_ANT_TYPE1 = 0x10 /*Hong-Lin Smart antenna use for 8821AE which is a 2 Ant. entitys, and each Ant. is equipped with 4 antenna patterns*/ -+}ANT_DIV_TYPE_E, *PANT_DIV_TYPE_E; -+ -+ -+//1 ============================================================ -+//1 function prototype -+//1 ============================================================ -+ -+ -+VOID -+ODM_StopAntennaSwitchDm( -+ IN PVOID pDM_VOID -+ ); -+VOID -+ODM_SetAntConfig( -+ IN PVOID pDM_VOID, -+ IN u1Byte antSetting // 0=A, 1=B, 2=C, .... -+ ); -+ -+ -+#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink -+ -+VOID ODM_SwAntDivRestAfterLink( -+ IN PVOID pDM_VOID -+ ); -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ -+VOID -+ODM_UpdateRxIdleAnt( -+ IN PVOID pDM_VOID, -+ IN u1Byte Ant -+); -+ -+#if (RTL8723B_SUPPORT == 1) -+VOID -+ODM_UpdateRxIdleAnt_8723B( -+ IN PVOID pDM_VOID, -+ IN u1Byte Ant, -+ IN u4Byte DefaultAnt, -+ IN u4Byte OptionalAnt -+); -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+VOID -+phydm_update_rx_idle_antenna_8188F( -+ IN PVOID pDM_VOID, -+ IN u4Byte default_ant -+); -+#endif -+ -+ -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+ODM_SW_AntDiv_Callback( -+ IN PRT_TIMER pTimer -+ ); -+ -+VOID -+ODM_SW_AntDiv_WorkitemCallback( -+ IN PVOID pContext -+ ); -+ -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+VOID -+ODM_SW_AntDiv_WorkitemCallback( -+ IN PVOID pContext -+); -+ -+VOID -+ODM_SW_AntDiv_Callback( -+ void *FunctionContext -+ ); -+ -+#endif -+ -+VOID -+odm_S0S1_SwAntDivByCtrlFrame( -+ IN PVOID pDM_VOID, -+ IN u1Byte Step -+); -+ -+VOID -+odm_AntselStatisticsOfCtrlFrame( -+ IN PVOID pDM_VOID, -+ IN u1Byte antsel_tr_mux, -+ IN u4Byte RxPWDBAll -+); -+ -+VOID -+odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( -+ IN PVOID pDM_VOID, -+ IN PVOID p_phy_info_void, -+ IN PVOID p_pkt_info_void -+); -+ -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+VOID -+odm_EVM_FastAntTrainingCallback( -+ IN PVOID pDM_VOID -+); -+#endif -+ -+VOID -+odm_HW_AntDiv( -+ IN PVOID pDM_VOID -+); -+ -+#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) -+VOID -+odm_FastAntTraining( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_FastAntTrainingCallback( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_FastAntTrainingWorkItemCallback( -+ IN PVOID pDM_VOID -+); -+#endif -+ -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+phydm_beam_switch_workitem_callback( -+ IN PVOID pContext -+ ); -+ -+VOID -+phydm_beam_decision_workitem_callback( -+ IN PVOID pContext -+ ); -+ -+#endif -+ -+VOID -+phydm_update_beam_pattern( -+ IN PVOID pDM_VOID, -+ IN u4Byte codeword, -+ IN u4Byte codeword_length -+ ); -+ -+void -+phydm_set_all_ant_same_beam_num( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+phydm_hl_smart_ant_cmd( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+); -+ -+#endif/*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ -+VOID -+ODM_AntDivInit( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+ODM_AntDiv( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_AntselStatistics( -+ IN PVOID pDM_VOID, -+ IN u1Byte antsel_tr_mux, -+ IN u4Byte MacId, -+ IN u4Byte utility, -+ IN u1Byte method -+); -+ -+VOID -+ODM_Process_RSSIForAntDiv( -+ IN OUT PVOID pDM_VOID, -+ IN PVOID p_phy_info_void, -+ IN PVOID p_pkt_info_void -+); -+ -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+VOID -+ODM_SetTxAntByTxInfo( -+ IN PVOID pDM_VOID, -+ IN pu1Byte pDesc, -+ IN u1Byte macId -+); -+ -+#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+VOID -+ODM_SetTxAntByTxInfo( -+ struct rtl8192cd_priv *priv, -+ struct tx_desc *pdesc, -+ unsigned short aid -+); -+ -+#endif -+ -+ -+VOID -+ODM_AntDiv_Config( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+ODM_AntDivTimers( -+ IN PVOID pDM_VOID, -+ IN u1Byte state -+); -+ -+#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ -+ -+VOID -+ODM_AntDivReset( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_AntennaDiversityInit( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_AntennaDiversity( -+ IN PVOID pDM_VOID -+); -+ -+ -+#endif /*#ifndef __ODMANTDIV_H__*/ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMANTDIV_H__ ++#define __PHYDMANTDIV_H__ ++ ++/*#define ANTDIV_VERSION "2.0" //2014.11.04*/ ++/*#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/ ++/*#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/ ++/*#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen, remove 92c 92d 8723a*/ ++/*#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna diversity when BT is enable for 8723B*/ ++/*#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not need to check the antenna is control by BT, ++ because antenna diversity only works when BT is disable or radio off*/ ++#define ANTDIV_VERSION "3.4" /*2015.08.28 Dino 1.Add 8821A Smart Antenna 2. Add 8188F SW S0S1 Antenna Diversity*/ ++ ++//1 ============================================================ ++//1 Definition ++//1 ============================================================ ++ ++#define MAIN_ANT 1 ++#define AUX_ANT 2 ++ ++#define ANT1_2G 0 // = ANT2_5G ++#define ANT2_2G 1 // = ANT1_5G ++/*smart antenna*/ ++#define SUPPORT_RF_PATH_NUM 4 ++#define SUPPORT_BEAM_PATTERN_NUM 4 ++ ++ ++//Antenna Diversty Control Type ++#define ODM_AUTO_ANT 0 ++#define ODM_FIX_MAIN_ANT 1 ++#define ODM_FIX_AUX_ANT 2 ++ ++#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8188F) ++#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) ++#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT|ODM_AC_ANTDIV_SUPPORT) ++#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E) ++#define ODM_HL_SMART_ANT_TYPE1_SUPPORT (ODM_RTL8821) ++ ++#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A|ODM_RTL8188F) ++#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) ++ ++#define ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC (ODM_RTL8192E) ++ ++#define ODM_ANTDIV_2G BIT0 ++#define ODM_ANTDIV_5G BIT1 ++ ++#define ANTDIV_ON 1 ++#define ANTDIV_OFF 0 ++ ++#define FAT_ON 1 ++#define FAT_OFF 0 ++ ++#define TX_BY_DESC 1 ++#define TX_BY_REG 0 ++ ++#define RSSI_METHOD 0 ++#define EVM_METHOD 1 ++#define CRC32_METHOD 2 ++ ++#define INIT_ANTDIV_TIMMER 0 ++#define CANCEL_ANTDIV_TIMMER 1 ++#define RELEASE_ANTDIV_TIMMER 2 ++ ++#define CRC32_FAIL 1 ++#define CRC32_OK 0 ++ ++#define Evm_RSSI_TH_High 25 ++#define Evm_RSSI_TH_Low 20 ++ ++#define NORMAL_STATE_MIAN 1 ++#define NORMAL_STATE_AUX 2 ++#define TRAINING_STATE 3 ++ ++#define FORCE_RSSI_DIFF 10 ++ ++#define CSI_ON 1 ++#define CSI_OFF 0 ++ ++#define DIVON_CSIOFF 1 ++#define DIVOFF_CSION 2 ++ ++#define BDC_DIV_TRAIN_STATE 0 ++#define BDC_BFer_TRAIN_STATE 1 ++#define BDC_DECISION_STATE 2 ++#define BDC_BF_HOLD_STATE 3 ++#define BDC_DIV_HOLD_STATE 4 ++ ++#define BDC_MODE_1 1 ++#define BDC_MODE_2 2 ++#define BDC_MODE_3 3 ++#define BDC_MODE_4 4 ++#define BDC_MODE_NULL 0xff ++ ++/*SW S0S1 antenna diversity*/ ++#define SWAW_STEP_INIT 0xff ++#define SWAW_STEP_PEEK 0 ++#define SWAW_STEP_DETERMINE 1 ++ ++#define RSSI_CHECK_RESET_PERIOD 10 ++#define RSSI_CHECK_THRESHOLD 50 ++ ++/*Hong Lin Smart antenna*/ ++#define HL_SMTANT_2WIRE_DATA_LEN 24 ++ ++//1 ============================================================ ++//1 structure ++//1 ============================================================ ++ ++ ++typedef struct _SW_Antenna_Switch_ ++{ ++ u1Byte Double_chk_flag; /*If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than check this antenna again*/ ++ u1Byte try_flag; ++ s4Byte PreRSSI; ++ u1Byte CurAntenna; ++ u1Byte PreAntenna; ++ u1Byte RSSI_Trying; ++ u1Byte reset_idx; ++ u1Byte Train_time; ++ u1Byte Train_time_flag; /*base on RSSI difference between two antennas*/ ++ RT_TIMER phydm_SwAntennaSwitchTimer; ++ u4Byte PktCnt_SWAntDivByCtrlFrame; ++ BOOLEAN bSWAntDivByCtrlFrame; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #if USE_WORKITEM ++ RT_WORK_ITEM phydm_SwAntennaSwitchWorkitem; ++ #endif ++ #endif ++ ++ /* AntDect (Before link Antenna Switch check) need to be moved*/ ++ u2Byte Single_Ant_Counter; ++ u2Byte Dual_Ant_Counter; ++ u2Byte Aux_FailDetec_Counter; ++ u2Byte Retry_Counter; ++ u1Byte SWAS_NoLink_State; ++ u4Byte SWAS_NoLink_BK_Reg948; ++ BOOLEAN ANTA_ON; /*To indicate Ant A is or not*/ ++ BOOLEAN ANTB_ON; /*To indicate Ant B is on or not*/ ++ BOOLEAN Pre_Aux_FailDetec; ++ BOOLEAN RSSI_AntDect_bResult; ++ u1Byte Ant5G; ++ u1Byte Ant2G; ++ ++ ++}SWAT_T, *pSWAT_T; ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++typedef struct _BF_DIV_COEX_ ++{ ++ BOOLEAN w_BFer_Client[ODM_ASSOCIATE_ENTRY_NUM]; ++ BOOLEAN w_BFee_Client[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM]; ++ ++ u1Byte BDCcoexType_wBfer; ++ u1Byte num_Txbfee_Client; ++ u1Byte num_Txbfer_Client; ++ u1Byte BDC_Try_counter; ++ u1Byte BDC_Hold_counter; ++ u1Byte BDC_Mode; ++ u1Byte BDC_active_Mode; ++ u1Byte BDC_state; ++ u1Byte BDC_RxIdleUpdate_counter; ++ u1Byte num_Client; ++ u1Byte pre_num_Client; ++ u1Byte num_BfTar; ++ u1Byte num_DivTar; ++ ++ BOOLEAN bAll_DivSta_Idle; ++ BOOLEAN bAll_BFSta_Idle; ++ BOOLEAN BDC_Try_flag; ++ BOOLEAN BF_pass; ++ BOOLEAN DIV_pass; ++}BDC_T,*pBDC_T; ++#endif ++#endif ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++typedef struct _SMART_ANTENNA_TRAINNING_ { ++ u4Byte latch_time; ++ BOOLEAN pkt_skip_statistic_en; ++ u4Byte fix_beam_pattern_en; ++ u4Byte fix_training_num_en; ++ u4Byte fix_beam_pattern_codeword; ++ u4Byte update_beam_codeword; ++ u4Byte ant_num; /*number of smart beam antenna*/ ++ u4Byte beam_patten_num_each_ant;/*number of beam can be switched in each antenna*/ ++ u4Byte data_codeword_bit_num; ++ u4Byte per_beam_training_pkt_num; ++ u1Byte decision_holding_period; ++ u4Byte pkt_counter; ++ u4Byte fast_training_beam_num; ++ u4Byte pre_fast_training_beam_num; ++ u4Byte pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM]; ++ u4Byte pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM]; ++ u4Byte pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM]; ++ u4Byte rx_idle_beam[SUPPORT_RF_PATH_NUM]; ++ u4Byte pre_codeword; ++ BOOLEAN force_update_beam_en; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_WORK_ITEM hl_smart_antenna_workitem; ++ RT_WORK_ITEM hl_smart_antenna_decision_workitem; ++ #endif ++ ++} SAT_T, *pSAT_T; ++#endif ++ ++typedef struct _FAST_ANTENNA_TRAINNING_ ++{ ++ u1Byte Bssid[6]; ++ u1Byte antsel_rx_keep_0; ++ u1Byte antsel_rx_keep_1; ++ u1Byte antsel_rx_keep_2; ++ u1Byte antsel_rx_keep_3; ++ u4Byte antSumRSSI[7]; ++ u4Byte antRSSIcnt[7]; ++ u4Byte antAveRSSI[7]; ++ u1Byte FAT_State; ++ u4Byte TrainIdx; ++ u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte RxIdleAnt; ++ u1Byte AntDiv_OnOff; ++ BOOLEAN bBecomeLinked; ++ u4Byte MinMaxRSSI; ++ u1Byte idx_AntDiv_counter_2G; ++ u1Byte idx_AntDiv_counter_5G; ++ u1Byte AntDiv_2G_5G; ++ u4Byte CCK_counter_main; ++ u4Byte CCK_counter_aux; ++ u4Byte OFDM_counter_main; ++ u4Byte OFDM_counter_aux; ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ u4Byte MainAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MainAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ BOOLEAN EVM_method_enable; ++ u1Byte TargetAnt_EVM; ++ u1Byte TargetAnt_CRC32; ++ u1Byte TargetAnt_enhance; ++ u1Byte pre_TargetAnt_enhance; ++ u2Byte Main_MPDU_OK_cnt; ++ u2Byte Aux_MPDU_OK_cnt; ++ ++ u4Byte CRC32_Ok_Cnt; ++ u4Byte CRC32_Fail_Cnt; ++ u4Byte MainCRC32_Ok_Cnt; ++ u4Byte AuxCRC32_Ok_Cnt; ++ u4Byte MainCRC32_Fail_Cnt; ++ u4Byte AuxCRC32_Fail_Cnt; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u4Byte CCK_CtrlFrame_Cnt_main; ++ u4Byte CCK_CtrlFrame_Cnt_aux; ++ u4Byte OFDM_CtrlFrame_Cnt_main; ++ u4Byte OFDM_CtrlFrame_Cnt_aux; ++ u4Byte MainAnt_CtrlFrame_Sum; ++ u4Byte AuxAnt_CtrlFrame_Sum; ++ u4Byte MainAnt_CtrlFrame_Cnt; ++ u4Byte AuxAnt_CtrlFrame_Cnt; ++ #endif ++ BOOLEAN fix_ant_bfee; ++ BOOLEAN enable_ctrl_frame_antdiv; ++ BOOLEAN use_ctrl_frame_antdiv; ++ u1Byte hw_antsw_occur; ++}FAT_T,*pFAT_T; ++ ++ ++//1 ============================================================ ++//1 enumeration ++//1 ============================================================ ++ ++ ++ ++typedef enum _FAT_STATE /*Fast antenna training*/ ++{ ++ FAT_BEFORE_LINK_STATE = 0, ++ FAT_PREPARE_STATE = 1, ++ FAT_TRAINING_STATE = 2, ++ FAT_DECISION_STATE = 3 ++}FAT_STATE_E, *PFAT_STATE_E; ++ ++typedef enum _ANT_DIV_TYPE ++{ ++ CG_TRX_HW_ANTDIV = 0x01, ++ CGCS_RX_HW_ANTDIV = 0x02, ++ CG_TRX_SMART_ANTDIV = 0x03, ++ S0S1_SW_ANTDIV = 0x04, /*8723B intrnal switch S0 S1*/ ++ HL_SW_SMART_ANT_TYPE1 = 0x10 /*Hong-Lin Smart antenna use for 8821AE which is a 2 Ant. entitys, and each Ant. is equipped with 4 antenna patterns*/ ++}ANT_DIV_TYPE_E, *PANT_DIV_TYPE_E; ++ ++ ++//1 ============================================================ ++//1 function prototype ++//1 ============================================================ ++ ++ ++VOID ++ODM_StopAntennaSwitchDm( ++ IN PVOID pDM_VOID ++ ); ++VOID ++ODM_SetAntConfig( ++ IN PVOID pDM_VOID, ++ IN u1Byte antSetting // 0=A, 1=B, 2=C, .... ++ ); ++ ++ ++#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink ++ ++VOID ODM_SwAntDivRestAfterLink( ++ IN PVOID pDM_VOID ++ ); ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ++VOID ++ODM_UpdateRxIdleAnt( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant ++); ++ ++#if (RTL8723B_SUPPORT == 1) ++VOID ++ODM_UpdateRxIdleAnt_8723B( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant, ++ IN u4Byte DefaultAnt, ++ IN u4Byte OptionalAnt ++); ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++VOID ++phydm_update_rx_idle_antenna_8188F( ++ IN PVOID pDM_VOID, ++ IN u4Byte default_ant ++); ++#endif ++ ++ ++#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_SW_AntDiv_Callback( ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++ ); ++ ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++); ++ ++VOID ++ODM_SW_AntDiv_Callback( ++ void *FunctionContext ++ ); ++ ++#endif ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte Step ++); ++ ++VOID ++odm_AntselStatisticsOfCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte RxPWDBAll ++); ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( ++ IN PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++); ++ ++#endif ++ ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++VOID ++odm_EVM_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++VOID ++odm_HW_AntDiv( ++ IN PVOID pDM_VOID ++); ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++VOID ++odm_FastAntTraining( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_FastAntTrainingWorkItemCallback( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++phydm_beam_switch_workitem_callback( ++ IN PVOID pContext ++ ); ++ ++VOID ++phydm_beam_decision_workitem_callback( ++ IN PVOID pContext ++ ); ++ ++#endif ++ ++VOID ++phydm_update_beam_pattern( ++ IN PVOID pDM_VOID, ++ IN u4Byte codeword, ++ IN u4Byte codeword_length ++ ); ++ ++void ++phydm_set_all_ant_same_beam_num( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++phydm_hl_smart_ant_cmd( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++); ++ ++#endif/*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ ++VOID ++ODM_AntDivInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_AntDiv( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AntselStatistics( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte MacId, ++ IN u4Byte utility, ++ IN u1Byte method ++); ++ ++VOID ++ODM_Process_RSSIForAntDiv( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++); ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++VOID ++ODM_SetTxAntByTxInfo( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++); ++ ++#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++VOID ++ODM_SetTxAntByTxInfo( ++ struct rtl8192cd_priv *priv, ++ struct tx_desc *pdesc, ++ unsigned short aid ++); ++ ++#endif ++ ++ ++VOID ++ODM_AntDiv_Config( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_AntDivTimers( ++ IN PVOID pDM_VOID, ++ IN u1Byte state ++); ++ ++#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ ++ ++VOID ++ODM_AntDivReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AntennaDiversityInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AntennaDiversity( ++ IN PVOID pDM_VOID ++); ++ ++ ++#endif /*#ifndef __ODMANTDIV_H__*/ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_beamforming.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_beamforming.c new file mode 100644 -index 000000000..ae4678691 +index 0000000..6410a03 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_beamforming.c @@ -0,0 +1,1939 @@ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if WPP_SOFTWARE_TRACE -+#include "phydm_beamforming.tmh" -+#endif -+#endif -+ -+#if (BEAMFORMING_SUPPORT == 1) -+ -+PRT_BEAMFORM_STAINFO -+phydm_staInfoInit( -+ IN PDM_ODM_T pDM_Odm, -+ IN u2Byte staIdx -+ ) -+{ -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORM_STAINFO pEntry = &(pBeamInfo->BeamformSTAinfo); -+ PSTA_INFO_T pSTA = pDM_Odm->pODM_StaInfo[staIdx]; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); -+ PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo); -+ -+ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, Adapter->CurrentAddress, 6); -+ -+ pEntry->HtBeamformCap = pHTInfo->HtBeamformCap; -+ pEntry->VhtBeamformCap = pVHTInfo->VhtBeamformCap; -+ -+ /*IBSS, AP mode*/ -+ if (staIdx != 0) { -+ pEntry->AID = pSTA->AID; -+ pEntry->RA = pSTA->MacAddr; -+ pEntry->MacID = pSTA->AssociatedMacId; -+ pEntry->WirelessMode = pSTA->WirelessMode; -+ pEntry->BW = pSTA->BandWidth; -+ pEntry->CurBeamform = pSTA->HTInfo.HtCurBeamform; -+ } else {/*client mode*/ -+ pEntry->AID = pMgntInfo->mAId; -+ pEntry->RA = pMgntInfo->Bssid; -+ pEntry->MacID = pMgntInfo->mMacId; -+ pEntry->WirelessMode = pMgntInfo->dot11CurrentWirelessMode; -+ pEntry->BW = pMgntInfo->dot11CurrentChannelBandWidth; -+ pEntry->CurBeamform = pHTInfo->HtCurBeamform; -+ } -+ -+ if ((pEntry->WirelessMode & WIRELESS_MODE_AC_5G) || (pEntry->WirelessMode & WIRELESS_MODE_AC_24G)) { -+ if (staIdx != 0) -+ pEntry->CurBeamformVHT = pSTA->VHTInfo.VhtCurBeamform; -+ else -+ pEntry->CurBeamformVHT = pVHTInfo->VhtCurBeamform; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pSTA->wireless_mode = 0x%x, staidx = %d\n", pSTA->WirelessMode, staIdx)); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+ if (!IS_STA_VALID(pSTA)) { -+ rtw_warn_on(1); -+ DBG_871X("%s => sta_info(mac_id:%d) failed\n", __func__, staIdx); -+ return pEntry; -+ } -+ -+ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, adapter_mac_addr(pSTA->padapter), 6); -+ pEntry->HtBeamformCap = pSTA->htpriv.beamform_cap; -+ -+ pEntry->AID = pSTA->aid; -+ pEntry->RA = pSTA->hwaddr; -+ pEntry->MacID = pSTA->mac_id; -+ pEntry->WirelessMode = pSTA->wireless_mode; -+ pEntry->BW = pSTA->bw_mode; -+ -+ pEntry->CurBeamform = pSTA->htpriv.beamform_cap; -+#if ODM_IC_11AC_SERIES_SUPPORT -+ if ((pEntry->WirelessMode & WIRELESS_MODE_AC_5G) || (pEntry->WirelessMode & WIRELESS_MODE_AC_24G)) { -+ pEntry->CurBeamformVHT = pSTA->vhtpriv.beamform_cap; -+ pEntry->VhtBeamformCap = pSTA->vhtpriv.beamform_cap; -+ } -+#endif -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pSTA->wireless_mode = 0x%x, staidx = %d\n", pSTA->wireless_mode, staIdx)); -+#endif -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pEntry->CurBeamform = 0x%x, pEntry->CurBeamformVHT = 0x%x\n", pEntry->CurBeamform, pEntry->CurBeamformVHT)); -+ return pEntry; -+ -+} -+void phydm_staInfoUpdate( -+ IN PDM_ODM_T pDM_Odm, -+ IN u2Byte staIdx, -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry -+ ) -+{ -+ PSTA_INFO_T pSTA = pDM_Odm->pODM_StaInfo[staIdx]; -+ -+ if (!IS_STA_VALID(pSTA)) -+ return; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ pSTA->txbf_paid = pBeamformEntry->P_AID; -+ pSTA->txbf_gid = pBeamformEntry->G_ID; -+#endif -+} -+ -+ -+u1Byte -+Beamforming_GetHTNDPTxRate( -+ IN PVOID pDM_VOID, -+ u1Byte CompSteeringNumofBFer -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Nr_index = 0; -+ u1Byte NDPTxRate; -+ /*Find Nr*/ -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), CompSteeringNumofBFer); -+ else -+ Nr_index = TxBF_Nr(1, CompSteeringNumofBFer); -+ -+ switch (Nr_index) { -+ case 1: -+ NDPTxRate = MGN_MCS8; -+ break; -+ -+ case 2: -+ NDPTxRate = MGN_MCS16; -+ break; -+ -+ case 3: -+ NDPTxRate = MGN_MCS24; -+ break; -+ -+ default: -+ NDPTxRate = MGN_MCS8; -+ break; -+ } -+ -+return NDPTxRate; -+ -+} -+ -+u1Byte -+Beamforming_GetVHTNDPTxRate( -+ IN PVOID pDM_VOID, -+ u1Byte CompSteeringNumofBFer -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Nr_index = 0; -+ u1Byte NDPTxRate; -+ /*Find Nr*/ -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), CompSteeringNumofBFer); -+ else -+ Nr_index = TxBF_Nr(1, CompSteeringNumofBFer); -+ -+ switch (Nr_index) { -+ case 1: -+ NDPTxRate = MGN_VHT2SS_MCS0; -+ break; -+ -+ case 2: -+ NDPTxRate = MGN_VHT3SS_MCS0; -+ break; -+ -+ case 3: -+ NDPTxRate = MGN_VHT4SS_MCS0; -+ break; -+ -+ default: -+ NDPTxRate = MGN_VHT2SS_MCS0; -+ break; -+ } -+ -+return NDPTxRate; -+ -+} -+ -+ -+PRT_BEAMFORMEE_ENTRY -+phydm_Beamforming_GetBFeeEntryByAddr( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ OUT pu1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (pBeamInfo->BeamformeeEntry[i].bUsed && (eqMacAddr(RA, pBeamInfo->BeamformeeEntry[i].MacAddr))) { -+ *Idx = i; -+ return &(pBeamInfo->BeamformeeEntry[i]); -+ } -+ } -+ -+ return NULL; -+} -+ -+PRT_BEAMFORMER_ENTRY -+phydm_Beamforming_GetBFerEntryByAddr( -+ IN PVOID pDM_VOID, -+ IN pu1Byte TA, -+ OUT pu1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { -+ if (pBeamInfo->BeamformerEntry[i].bUsed && (eqMacAddr(TA, pBeamInfo->BeamformerEntry[i].MacAddr))) { -+ *Idx = i; -+ return &(pBeamInfo->BeamformerEntry[i]); -+ } -+ } -+ -+ return NULL; -+} -+ -+ -+PRT_BEAMFORMEE_ENTRY -+phydm_Beamforming_GetEntryByMacId( -+ IN PVOID pDM_VOID, -+ IN u1Byte MacId, -+ OUT pu1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (pBeamInfo->BeamformeeEntry[i].bUsed && (MacId == pBeamInfo->BeamformeeEntry[i].MacId)) { -+ *Idx = i; -+ return &(pBeamInfo->BeamformeeEntry[i]); -+ } -+ } -+ -+ return NULL; -+} -+ -+ -+BEAMFORMING_CAP -+phydm_Beamforming_GetEntryBeamCapByMacId( -+ IN PVOID pDM_VOID, -+ IN u1Byte MacId -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (pBeamInfo->BeamformeeEntry[i].bUsed && (MacId == pBeamInfo->BeamformeeEntry[i].MacId)) { -+ BeamformEntryCap = pBeamInfo->BeamformeeEntry[i].BeamformEntryCap; -+ i = BEAMFORMEE_ENTRY_NUM; -+ } -+ } -+ -+ return BeamformEntryCap; -+} -+ -+ -+PRT_BEAMFORMEE_ENTRY -+phydm_Beamforming_GetFreeBFeeEntry( -+ IN PVOID pDM_VOID, -+ OUT pu1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (pBeamInfo->BeamformeeEntry[i].bUsed == FALSE) { -+ *Idx = i; -+ return &(pBeamInfo->BeamformeeEntry[i]); -+ } -+ } -+ return NULL; -+} -+ -+PRT_BEAMFORMER_ENTRY -+phydm_Beamforming_GetFreeBFerEntry( -+ IN PVOID pDM_VOID, -+ OUT pu1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s ===>\n", __func__)); -+ -+ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { -+ if (pBeamInfo->BeamformerEntry[i].bUsed == FALSE) { -+ *Idx = i; -+ return &(pBeamInfo->BeamformerEntry[i]); -+ } -+ } -+ return NULL; -+} -+ -+/* -+// Description: Get the first entry index of MU Beamformee. -+// -+// Return Value: Index of the first MU sta. -+// -+// 2015.05.25. Created by tynli. -+// -+*/ -+u1Byte -+phydm_Beamforming_GetFirstMUBFeeEntryIdx( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte idx = 0xFF; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ BOOLEAN bFound = FALSE; -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ if (pBeamInfo->BeamformeeEntry[idx].bUsed && pBeamInfo->BeamformeeEntry[idx].is_mu_sta) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx=%d!\n", __func__, idx)); -+ bFound = TRUE; -+ break; -+ } -+ } -+ -+ if (!bFound) -+ idx = 0xFF; -+ -+ return idx; -+} -+ -+ -+/*Add SU BFee and MU BFee*/ -+PRT_BEAMFORMEE_ENTRY -+Beamforming_AddBFeeEntry( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORM_STAINFO pSTA, -+ IN BEAMFORMING_CAP BeamformCap, -+ IN u1Byte NumofSoundingDim, -+ IN u1Byte CompSteeringNumofBFer, -+ OUT pu1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMEE_ENTRY pEntry = phydm_Beamforming_GetFreeBFeeEntry(pDM_Odm, Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (pEntry != NULL) { -+ pEntry->bUsed = TRUE; -+ pEntry->AID = pSTA->AID; -+ pEntry->MacId = pSTA->MacID; -+ pEntry->SoundBW = pSTA->BW; -+ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, pSTA->MyMacAddr, 6); -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { -+ /*BSSID[44:47] xor BSSID[40:43]*/ -+ u2Byte BSSID = ((pSTA->MyMacAddr[5] & 0xf0) >> 4) ^ (pSTA->MyMacAddr[5] & 0xf); -+ /*(dec(A) + dec(B)*32) mod 512*/ -+ pEntry->P_AID = (pSTA->AID + BSSID * 32) & 0x1ff; -+ pEntry->G_ID = 63; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to STA=%d\n", __func__, pEntry->P_AID)); -+ } else if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) { -+ /*ad hoc mode*/ -+ pEntry->P_AID = 0; -+ pEntry->G_ID = 63; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID as IBSS=%d\n", __func__, pEntry->P_AID)); -+ } else { -+ /*client mode*/ -+ pEntry->P_AID = pSTA->RA[5]; -+ /*BSSID[39:47]*/ -+ pEntry->P_AID = (pEntry->P_AID << 1) | (pSTA->RA[4] >> 7); -+ pEntry->G_ID = 0; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to AP=0x%X\n", __func__, pEntry->P_AID)); -+ } -+ cpMacAddr(pEntry->MacAddr, pSTA->RA); -+ pEntry->bTxBF = FALSE; -+ pEntry->bSound = FALSE; -+ pEntry->SoundPeriod = 400; -+ pEntry->BeamformEntryCap = BeamformCap; -+ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ -+/* pEntry->LogSeq = 0xff; Move to Beamforming_AddBFerEntry*/ -+/* pEntry->LogRetryCnt = 0; Move to Beamforming_AddBFerEntry*/ -+/* pEntry->LogSuccessCnt = 0; Move to Beamforming_AddBFerEntry*/ -+ -+ pEntry->LogStatusFailCnt = 0; -+ -+ pEntry->NumofSoundingDim = NumofSoundingDim; -+ pEntry->CompSteeringNumofBFer = CompSteeringNumofBFer; -+ -+ if (BeamformCap & BEAMFORMER_CAP_VHT_MU) { -+ pDM_Odm->BeamformingInfo.beamformee_mu_cnt += 1; -+ pEntry->is_mu_sta = TRUE; -+ pDM_Odm->BeamformingInfo.FirstMUBFeeIndex = phydm_Beamforming_GetFirstMUBFeeEntryIdx(pDM_Odm); -+ } else if (BeamformCap & BEAMFORMER_CAP_VHT_SU) { -+ pDM_Odm->BeamformingInfo.beamformee_su_cnt += 1; -+ pEntry->is_mu_sta = FALSE; -+ } -+ -+ return pEntry; -+ } -+ else -+ return NULL; -+} -+ -+/*Add SU BFee and MU BFer*/ -+PRT_BEAMFORMER_ENTRY -+Beamforming_AddBFerEntry( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORM_STAINFO pSTA, -+ IN BEAMFORMING_CAP BeamformCap, -+ IN u1Byte NumofSoundingDim, -+ OUT pu1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMER_ENTRY pEntry = phydm_Beamforming_GetFreeBFerEntry(pDM_Odm, Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (pEntry != NULL) { -+ pEntry->bUsed = TRUE; -+ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, pSTA->MyMacAddr, 6); -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { -+ /*BSSID[44:47] xor BSSID[40:43]*/ -+ u2Byte BSSID = ((pSTA->MyMacAddr[5] & 0xf0) >> 4) ^ (pSTA->MyMacAddr[5] & 0xf); -+ -+ pEntry->P_AID = (pSTA->AID + BSSID * 32) & 0x1ff; -+ pEntry->G_ID = 63; -+ /*(dec(A) + dec(B)*32) mod 512*/ -+ } else if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) { -+ pEntry->P_AID = 0; -+ pEntry->G_ID = 63; -+ } else { -+ pEntry->P_AID = pSTA->RA[5]; -+ /*BSSID[39:47]*/ -+ pEntry->P_AID = (pEntry->P_AID << 1) | (pSTA->RA[4] >> 7); -+ pEntry->G_ID = 0; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: P_AID addressed to AP=0x%X\n", __func__, pEntry->P_AID)); -+ } -+ -+ cpMacAddr(pEntry->MacAddr, pSTA->RA); -+ pEntry->BeamformEntryCap = BeamformCap; -+ -+ pEntry->PreLogSeq = 0; /*Modified by Jeffery @2015-04-13*/ -+ pEntry->LogSeq = 0; /*Modified by Jeffery @2014-10-29*/ -+ pEntry->LogRetryCnt = 0; /*Modified by Jeffery @2014-10-29*/ -+ pEntry->LogSuccess = 0; /*LogSuccess is NOT needed to be accumulated, so LogSuccessCnt->LogSuccess, 2015-04-13, Jeffery*/ -+ pEntry->ClockResetTimes = 0; /*Modified by Jeffery @2015-04-13*/ -+ -+ pEntry->NumofSoundingDim = NumofSoundingDim; -+ -+ if (BeamformCap & BEAMFORMEE_CAP_VHT_MU) { -+ pDM_Odm->BeamformingInfo.beamformer_mu_cnt += 1; -+ pEntry->is_mu_ap = TRUE; -+ pEntry->AID = pSTA->AID; -+ } else if (BeamformCap & BEAMFORMEE_CAP_VHT_SU) { -+ pDM_Odm->BeamformingInfo.beamformer_su_cnt += 1; -+ pEntry->is_mu_ap = FALSE; -+ } -+ -+ return pEntry; -+ } -+ else -+ return NULL; -+} -+ -+#if 0 -+BOOLEAN -+Beamforming_RemoveEntry( -+ IN PADAPTER Adapter, -+ IN pu1Byte RA, -+ OUT pu1Byte Idx -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ PRT_BEAMFORMER_ENTRY pBFerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, RA, Idx); -+ PRT_BEAMFORMEE_ENTRY pEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, Idx); -+ BOOLEAN ret = FALSE; -+ -+ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s Start!\n", __func__)); -+ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, pBFerEntry=0x%x\n", __func__, pBFerEntry)); -+ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, pEntry=0x%x\n", __func__, pEntry)); -+ -+ if (pEntry != NULL) { -+ pEntry->bUsed = FALSE; -+ pEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; -+ /*pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ -+ pEntry->bBeamformingInProgress = FALSE; -+ ret = TRUE; -+ } -+ if (pBFerEntry != NULL) { -+ pBFerEntry->bUsed = FALSE; -+ pBFerEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; -+ ret = TRUE; -+ } -+ return ret; -+ -+} -+#endif -+ -+/* Used for BeamformingStart_V1 */ -+VOID -+phydm_Beamforming_NDPARate( -+ IN PVOID pDM_VOID, -+ CHANNEL_WIDTH BW, -+ u1Byte Rate -+) -+{ -+ u2Byte NDPARate = Rate; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (NDPARate == 0) { -+ if(pDM_Odm->RSSI_Min > 30) // link RSSI > 30% -+ NDPARate = ODM_RATE24M; -+ else -+ NDPARate = ODM_RATE6M; -+ } -+ -+ if (NDPARate < ODM_RATEMCS0) -+ BW = (CHANNEL_WIDTH)ODM_BW20M; -+ -+ NDPARate = (NDPARate << 8) | BW; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_RATE, (pu1Byte)&NDPARate); -+ -+} -+ -+ -+/* Used for BeamformingStart_SW and BeamformingStart_FW */ -+VOID -+phydm_Beamforming_DymNDPARate( -+ IN PVOID pDM_VOID -+) -+{ -+ u2Byte NDPARate = ODM_RATE6M, BW; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (pDM_Odm->RSSI_Min > 30) /*link RSSI > 30%*/ -+ NDPARate = ODM_RATE24M; -+ else -+ NDPARate = ODM_RATE6M; -+ -+ BW = ODM_BW20M; -+ NDPARate = NDPARate << 8 | BW; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_RATE, (pu1Byte)&NDPARate); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, NDPA Rate = 0x%X\n", __func__, NDPARate)); -+} -+ -+/* -+* SW Sounding : SW Timer unit 1ms -+* HW Timer unit (1/32000) s 32k is clock. -+* FW Sounding : FW Timer unit 10ms -+*/ -+VOID -+Beamforming_DymPeriod( -+ IN PVOID pDM_VOID, -+ IN u8 status -+) -+{ -+ u1Byte Idx; -+ BOOLEAN bChangePeriod = FALSE; -+ u2Byte SoundPeriod_SW, SoundPeriod_FW; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); -+ -+ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ //3 TODO per-client throughput caculation. -+ -+ if ((*(pDM_Odm->pCurrentTxTP) + *(pDM_Odm->pCurrentRxTP) > 2) && ((pEntry->LogStatusFailCnt <= 20) || status)) { -+ SoundPeriod_SW = 40; /* 40ms */ -+ SoundPeriod_FW = 40; /* From H2C cmd, unit = 10ms */ -+ } else { -+ SoundPeriod_SW = 4000;/* 4s */ -+ SoundPeriod_FW = 400; -+ } -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]SoundPeriod_SW=%d, SoundPeriod_FW=%d\n", __func__, SoundPeriod_SW, SoundPeriod_FW)); -+ -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; -+ -+ if (pBeamformEntry->DefaultCSICnt > 20) { -+ /*Modified by David*/ -+ SoundPeriod_SW = 4000; -+ SoundPeriod_FW = 400; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Period = %d\n", __func__, SoundPeriod_SW)); -+ if (pBeamformEntry->BeamformEntryCap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) { -+ if (pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER) { -+ if (pBeamformEntry->SoundPeriod != SoundPeriod_FW) { -+ pBeamformEntry->SoundPeriod = SoundPeriod_FW; -+ bChangePeriod = TRUE; /*Only FW sounding need to send H2C packet to change sound period. */ -+ } -+ } else if (pBeamformEntry->SoundPeriod != SoundPeriod_SW) { -+ pBeamformEntry->SoundPeriod = SoundPeriod_SW; -+ } -+ } -+ } -+ -+ if (bChangePeriod) -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); -+} -+ -+ -+ -+ -+BOOLEAN -+Beamforming_SendHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW, -+ IN u1Byte QIdx -+ ) -+{ -+ BOOLEAN ret = TRUE; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (QIdx == BEACON_QUEUE) -+ ret = SendFWHTNDPAPacket(pDM_Odm, RA, BW); -+ else -+ ret = SendSWHTNDPAPacket(pDM_Odm, RA, BW); -+ -+ return ret; -+} -+ -+ -+ -+BOOLEAN -+Beamforming_SendVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW, -+ IN u1Byte QIdx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ BOOLEAN ret = TRUE; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_GET_TX_RATE, NULL); -+ -+ if ((pDM_Odm->TxBfDataRate >= ODM_RATEVHTSS3MCS7) && (pDM_Odm->TxBfDataRate <= ODM_RATEVHTSS3MCS9)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s: 3SS VHT 789 don't sounding\n", __func__)); -+ -+ } else { -+ if (QIdx == BEACON_QUEUE) /* Send to reserved page => FW NDPA */ -+ ret = SendFWVHTNDPAPacket(pDM_Odm, RA, AID, BW); -+ else { -+#ifdef SUPPORT_MU_BF -+ #if (SUPPORT_MU_BF == 1) -+ pBeamInfo->is_mu_sounding = TRUE; -+ ret = SendSWVHTMUNDPAPacket(pDM_Odm, BW); -+ #else -+ pBeamInfo->is_mu_sounding = FALSE; -+ ret = SendSWVHTNDPAPacket(pDM_Odm, RA, AID, BW); -+ #endif -+#else -+ pBeamInfo->is_mu_sounding = FALSE; -+ ret = SendSWVHTNDPAPacket(pDM_Odm, RA, AID, BW); -+#endif -+ } -+ } -+ return ret; -+} -+ -+ -+BEAMFORMING_NOTIFY_STATE -+phydm_beamfomring_bSounding( -+ IN PVOID pDM_VOID, -+ PRT_BEAMFORMING_INFO pBeamInfo, -+ pu1Byte Idx -+ ) -+{ -+ BEAMFORMING_NOTIFY_STATE bSounding = BEAMFORMING_NOTIFY_NONE; -+ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ /*if(( Beamforming_GetBeamCap(pBeamInfo) & BEAMFORMER_CAP) == 0)*/ -+ /*bSounding = BEAMFORMING_NOTIFY_RESET;*/ -+ if (BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER) -+ bSounding = BEAMFORMING_NOTIFY_RESET; -+ else { -+ u1Byte i; -+ -+ for (i = 0 ; i < BEAMFORMEE_ENTRY_NUM ; i++) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s: BFee Entry %d bUsed=%d, bSound=%d\n", __func__, i, pBeamInfo->BeamformeeEntry[i].bUsed, pBeamInfo->BeamformeeEntry[i].bSound)); -+ if (pBeamInfo->BeamformeeEntry[i].bUsed && (!pBeamInfo->BeamformeeEntry[i].bSound)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Add BFee entry %d\n", __func__, i)); -+ *Idx = i; -+ if (pBeamInfo->BeamformeeEntry[i].is_mu_sta) -+ bSounding = BEAMFORMEE_NOTIFY_ADD_MU; -+ else -+ bSounding = BEAMFORMEE_NOTIFY_ADD_SU; -+ } -+ -+ if ((!pBeamInfo->BeamformeeEntry[i].bUsed) && pBeamInfo->BeamformeeEntry[i].bSound) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Delete BFee entry %d\n", __func__, i)); -+ *Idx = i; -+ if (pBeamInfo->BeamformeeEntry[i].is_mu_sta) -+ bSounding = BEAMFORMEE_NOTIFY_DELETE_MU; -+ else -+ bSounding = BEAMFORMEE_NOTIFY_DELETE_SU; -+ } -+ } -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, bSounding = %d\n", __func__, bSounding)); -+ return bSounding; -+} -+ -+ -+//This function is unused -+u1Byte -+phydm_beamforming_SoundingIdx( -+ IN PVOID pDM_VOID, -+ PRT_BEAMFORMING_INFO pBeamInfo -+ ) -+{ -+ u1Byte Idx = 0; -+ RT_BEAMFORMEE_ENTRY BeamEntry; -+ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (BeamOidInfo.SoundOidMode == SOUNDING_SW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_SW_VHT_TIMER || -+ BeamOidInfo.SoundOidMode == SOUNDING_HW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_VHT_TIMER) -+ Idx = BeamOidInfo.SoundOidIdx; -+ else { -+ u1Byte i; -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (pBeamInfo->BeamformeeEntry[i].bUsed && (FALSE == pBeamInfo->BeamformeeEntry[i].bSound)) { -+ Idx = i; -+ break; -+ } -+ } -+ } -+ -+ return Idx; -+} -+ -+ -+SOUNDING_MODE -+phydm_beamforming_SoundingMode( -+ IN PVOID pDM_VOID, -+ PRT_BEAMFORMING_INFO pBeamInfo, -+ u1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte SupportInterface = pDM_Odm->SupportInterface; -+ -+ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; -+ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; -+ SOUNDING_MODE Mode = BeamOidInfo.SoundOidMode; -+ -+ if (BeamOidInfo.SoundOidMode == SOUNDING_SW_VHT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_VHT_TIMER) { -+ if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) -+ Mode = BeamOidInfo.SoundOidMode; -+ else -+ Mode = SOUNDING_STOP_All_TIMER; -+ } else if (BeamOidInfo.SoundOidMode == SOUNDING_SW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_HT_TIMER) { -+ if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) -+ Mode = BeamOidInfo.SoundOidMode; -+ else -+ Mode = SOUNDING_STOP_All_TIMER; -+ } else if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) { -+ if ((SupportInterface == ODM_ITRF_USB) && !(pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))) -+ Mode = SOUNDING_FW_VHT_TIMER; -+ else -+ Mode = SOUNDING_SW_VHT_TIMER; -+ } else if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) { -+ if ((SupportInterface == ODM_ITRF_USB) && !(pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))) -+ Mode = SOUNDING_FW_HT_TIMER; -+ else -+ Mode = SOUNDING_SW_HT_TIMER; -+ } else -+ Mode = SOUNDING_STOP_All_TIMER; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SupportInterface=%d, Mode=%d\n", __func__, SupportInterface, Mode)); -+ -+ return Mode; -+} -+ -+ -+u2Byte -+phydm_beamforming_SoundingTime( -+ IN PVOID pDM_VOID, -+ PRT_BEAMFORMING_INFO pBeamInfo, -+ SOUNDING_MODE Mode, -+ u1Byte Idx -+ ) -+{ -+ u2Byte SoundingTime = 0xffff; -+ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; -+ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_HW_VHT_TIMER) -+ SoundingTime = BeamOidInfo.SoundOidPeriod * 32; -+ else if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_SW_VHT_TIMER) -+ /*Modified by David*/ -+ SoundingTime = BeamEntry.SoundPeriod; /*BeamOidInfo.SoundOidPeriod;*/ -+ else -+ SoundingTime = BeamEntry.SoundPeriod; -+ -+ return SoundingTime; -+} -+ -+ -+CHANNEL_WIDTH -+phydm_beamforming_SoundingBW( -+ IN PVOID pDM_VOID, -+ PRT_BEAMFORMING_INFO pBeamInfo, -+ SOUNDING_MODE Mode, -+ u1Byte Idx -+ ) -+{ -+ CHANNEL_WIDTH SoundingBW = CHANNEL_WIDTH_20; -+ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; -+ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_HW_VHT_TIMER) -+ SoundingBW = BeamOidInfo.SoundOidBW; -+ else if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_SW_VHT_TIMER) -+ /*Modified by David*/ -+ SoundingBW = BeamEntry.SoundBW; /*BeamOidInfo.SoundOidBW;*/ -+ else -+ SoundingBW = BeamEntry.SoundBW; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, SoundingBW=0x%X\n", __func__, SoundingBW)); -+ -+ return SoundingBW; -+} -+ -+ -+BOOLEAN -+phydm_Beamforming_SelectBeamEntry( -+ IN PVOID pDM_VOID, -+ PRT_BEAMFORMING_INFO pBeamInfo -+ ) -+{ -+ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ /*pEntry.bSound is different between first and latter NDPA, and should not be used as BFee entry selection*/ -+ /*BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed SoundIdx.*/ -+ pSoundInfo->SoundIdx = phydm_beamforming_SoundingIdx(pDM_Odm, pBeamInfo); -+ /*pSoundInfo->SoundIdx = 0;*/ -+ -+ if (pSoundInfo->SoundIdx < BEAMFORMEE_ENTRY_NUM) -+ pSoundInfo->SoundMode = phydm_beamforming_SoundingMode(pDM_Odm, pBeamInfo, pSoundInfo->SoundIdx); -+ else -+ pSoundInfo->SoundMode = SOUNDING_STOP_All_TIMER; -+ -+ if (SOUNDING_STOP_All_TIMER == pSoundInfo->SoundMode) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Return because of SOUNDING_STOP_All_TIMER\n", __func__)); -+ return FALSE; -+ } else { -+ pSoundInfo->SoundBW = phydm_beamforming_SoundingBW(pDM_Odm, pBeamInfo, pSoundInfo->SoundMode, pSoundInfo->SoundIdx ); -+ pSoundInfo->SoundPeriod = phydm_beamforming_SoundingTime(pDM_Odm, pBeamInfo, pSoundInfo->SoundMode, pSoundInfo->SoundIdx ); -+ return TRUE; -+ } -+} -+ -+/*SU BFee Entry Only*/ -+BOOLEAN -+phydm_beamforming_StartPeriod( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ BOOLEAN Ret = TRUE; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); -+ -+ phydm_Beamforming_DymNDPARate(pDM_Odm); -+ -+ phydm_Beamforming_SelectBeamEntry(pDM_Odm, pBeamInfo); // Modified -+ -+ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) -+ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod); -+ else if (pSoundInfo->SoundMode == SOUNDING_HW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_HW_HT_TIMER || -+ pSoundInfo->SoundMode == SOUNDING_AUTO_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_AUTO_HT_TIMER) { -+ HAL_HW_TIMER_TYPE TimerType = HAL_TIMER_TXBF; -+ u4Byte val = (pSoundInfo->SoundPeriod | (TimerType<<16)); -+ -+ //HW timer stop: All IC has the same setting -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_STOP, (pu1Byte)(&TimerType)); -+ //ODM_Write1Byte(pDM_Odm, 0x15F, 0); -+ //HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_INIT, (pu1Byte)(&val)); -+ //ODM_Write1Byte(pDM_Odm, 0x164, 1); -+ //ODM_Write4Byte(pDM_Odm, 0x15C, val); -+ //HW timer start: All IC has the same setting -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_START, (pu1Byte)(&TimerType)); -+ //ODM_Write1Byte(pDM_Odm, 0x15F, 0x5); -+ } else if (pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER) -+ Ret = BeamformingStart_FW(pDM_Odm, pSoundInfo->SoundIdx); -+ else -+ Ret = FALSE; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SoundIdx=%d, SoundMode=%d, SoundBW=%d, SoundPeriod=%d\n", __func__, -+ pSoundInfo->SoundIdx, pSoundInfo->SoundMode, pSoundInfo->SoundBW, pSoundInfo->SoundPeriod)); -+ -+ return Ret; -+} -+ -+// Used after Beamforming_Leave, and will clear the setting of the "already deleted" entry -+/*SU BFee Entry Only*/ -+VOID -+phydm_beamforming_EndPeriod_SW( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ u1Byte Idx = 0; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); -+ -+ HAL_HW_TIMER_TYPE TimerType = HAL_TIMER_TXBF; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) -+ ODM_CancelTimer(pDM_Odm, &pBeamInfo->BeamformingTimer); -+ else if (pSoundInfo->SoundMode == SOUNDING_HW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_HW_HT_TIMER || -+ pSoundInfo->SoundMode == SOUNDING_AUTO_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_AUTO_HT_TIMER) -+ /*HW timer stop: All IC has the same setting*/ -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_STOP, (pu1Byte)(&TimerType)); -+ /*ODM_Write1Byte(pDM_Odm, 0x15F, 0);*/ -+} -+ -+VOID -+phydm_beamforming_EndPeriod_FW( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Idx = 0; -+ -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]\n", __func__)); -+} -+ -+ -+/*SU BFee Entry Only*/ -+VOID -+phydm_beamforming_ClearEntry_SW( -+ IN PVOID pDM_VOID, -+ BOOLEAN IsDelete, -+ u1Byte DeleteIdx -+ ) -+{ -+ u1Byte Idx = 0; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ if (IsDelete) { -+ if (DeleteIdx < BEAMFORMEE_ENTRY_NUM) { -+ pBeamformEntry = pBeamInfo->BeamformeeEntry + DeleteIdx; -+ if (!((!pBeamformEntry->bUsed) && pBeamformEntry->bSound)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW DeleteIdx is wrong!!!!!\n", __func__)); -+ return; -+ } -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW delete BFee entry %d\n", __func__, DeleteIdx)); -+ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) { -+ pBeamformEntry->bBeamformingInProgress = FALSE; -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ } else if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&DeleteIdx); -+ } -+ pBeamformEntry->bSound = FALSE; -+ } else { -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; -+ -+ /*Used after bSounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ -+ /*This function is mainly used in case "BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER".*/ -+ /*However, setting oid doesn't delete entries (bUsed is still TRUE), new entries may fail to be added in.*/ -+ -+ if (pBeamformEntry->bSound) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW reset BFee entry %d\n", __func__, Idx)); -+ /* -+ * If End procedure is -+ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. -+ * After C2H packet return , status bit will be set to zero. -+ * -+ * 2. After C2H packet, then reset state to initialized and clear status bit. -+ */ -+ -+ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ phydm_Beamforming_End_SW(pDM_Odm, 0); -+ else if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx); -+ } -+ -+ pBeamformEntry->bSound = FALSE; -+ } -+ } -+ } -+} -+ -+VOID -+phydm_beamforming_ClearEntry_FW( -+ IN PVOID pDM_VOID, -+ BOOLEAN IsDelete, -+ u1Byte DeleteIdx -+ ) -+{ -+ u1Byte Idx = 0; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ if (IsDelete) { -+ if (DeleteIdx < BEAMFORMEE_ENTRY_NUM) { -+ pBeamformEntry = pBeamInfo->BeamformeeEntry + DeleteIdx; -+ -+ if (!((!pBeamformEntry->bUsed) && pBeamformEntry->bSound)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] FW DeleteIdx is wrong!!!!!\n", __func__)); -+ return; -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: FW delete BFee entry %d\n", __func__, DeleteIdx)); -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ pBeamformEntry->bSound = FALSE; -+ } else { -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; -+ -+ /*Used after bSounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ -+ /*This function is mainly used in case "BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER".*/ -+ /*However, setting oid doesn't delete entries (bUsed is still TRUE), new entries may fail to be added in.*/ -+ -+ if (pBeamformEntry->bSound) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]FW reset BFee entry %d\n", __func__, Idx)); -+ /* -+ * If End procedure is -+ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. -+ * After C2H packet return , status bit will be set to zero. -+ * -+ * 2. After C2H packet, then reset state to initialized and clear status bit. -+ */ -+ -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ pBeamformEntry->bSound = FALSE; -+ } -+ } -+ } -+} -+ -+/* -+* Called : -+* 1. Add and delete entry : Beamforming_Enter/Beamforming_Leave -+* 2. FW trigger : Beamforming_SetTxBFen -+* 3. Set OID_RT_BEAMFORMING_PERIOD : BeamformingControl_V2 -+*/ -+VOID -+phydm_Beamforming_Notify( -+ IN PVOID pDM_VOID -+ ) -+{ -+ u1Byte Idx=BEAMFORMEE_ENTRY_NUM; -+ BEAMFORMING_NOTIFY_STATE bSounding = BEAMFORMING_NOTIFY_NONE; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ bSounding = phydm_beamfomring_bSounding(pDM_Odm, pBeamInfo, &Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, Before notify, bSounding=%d, Idx=%d\n", __func__, bSounding, Idx)); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: pBeamInfo->beamformee_su_cnt = %d\n", __func__, pBeamInfo->beamformee_su_cnt)); -+ -+ -+ switch (bSounding) { -+ case BEAMFORMEE_NOTIFY_ADD_SU: -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_ADD_SU\n", __func__)); -+ phydm_beamforming_StartPeriod(pDM_Odm); -+ break; -+ -+ case BEAMFORMEE_NOTIFY_DELETE_SU: -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_DELETE_SU\n", __func__)); -+ if (pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER) { -+ phydm_beamforming_ClearEntry_FW(pDM_Odm, TRUE, Idx); -+ if (pBeamInfo->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ -+ phydm_beamforming_EndPeriod_FW(pDM_Odm); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: No BFee left\n", __func__)); -+ } -+ } else { -+ phydm_beamforming_ClearEntry_SW(pDM_Odm, TRUE, Idx); -+ if (pBeamInfo->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ -+ phydm_beamforming_EndPeriod_SW(pDM_Odm); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: No BFee left\n", __func__)); -+ } -+ } -+ break; -+ -+ case BEAMFORMEE_NOTIFY_ADD_MU: -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_ADD_MU\n", __func__)); -+ if (pBeamInfo->beamformee_mu_cnt == 2) { -+ /*if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) -+ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod);*/ -+ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, 1000); /*Do MU sounding every 1sec*/ -+ } else -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Less or larger than 2 MU STAs, not to set timer\n", __func__)); -+ break; -+ -+ case BEAMFORMEE_NOTIFY_DELETE_MU: -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_DELETE_MU\n", __func__)); -+ if (pBeamInfo->beamformee_mu_cnt == 1) { -+ /*if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER)*/{ -+ ODM_CancelTimer(pDM_Odm, &pBeamInfo->BeamformingTimer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Less than 2 MU STAs, stop sounding\n", __func__)); -+ } -+ } -+ break; -+ -+ case BEAMFORMING_NOTIFY_RESET: -+ if (pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER) { -+ phydm_beamforming_ClearEntry_FW(pDM_Odm, FALSE, Idx); -+ phydm_beamforming_EndPeriod_FW(pDM_Odm); -+ } else { -+ phydm_beamforming_ClearEntry_SW(pDM_Odm, FALSE, Idx); -+ phydm_beamforming_EndPeriod_SW(pDM_Odm); -+ } -+ -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+ -+ -+BOOLEAN -+Beamforming_InitEntry( -+ IN PVOID pDM_VOID, -+ IN u2Byte staIdx, -+ pu1Byte BFerBFeeIdx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; -+ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; -+ PRT_BEAMFORM_STAINFO pSTA = NULL; -+ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; -+ u1Byte BFerIdx=0xF, BFeeIdx=0xF; -+ u1Byte NumofSoundingDim = 0, CompSteeringNumofBFer = 0; -+ -+ pSTA = phydm_staInfoInit(pDM_Odm, staIdx); -+ -+ /*The current setting does not support Beaforming*/ -+ if (BEAMFORMING_CAP_NONE == pSTA->HtBeamformCap && BEAMFORMING_CAP_NONE == pSTA->VhtBeamformCap) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("The configuration disabled Beamforming! Skip...\n")); -+ return FALSE; -+ } -+ -+ if (pSTA->WirelessMode < WIRELESS_MODE_N_24G) -+ return FALSE; -+ else { /*HT*/ -+ /*We are Beamformee because the STA is Beamformer*/ -+ if (TEST_FLAG(pSTA->CurBeamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { -+ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMEE_CAP_HT_EXPLICIT); -+ NumofSoundingDim = (pSTA->CurBeamform&BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP)>>6; -+ } -+ /*We are Beamformer because the STA is Beamformee*/ -+ if (TEST_FLAG(pSTA->CurBeamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE) || -+ TEST_FLAG(pSTA->HtBeamformCap, BEAMFORMING_HT_BEAMFORMER_TEST)) { -+ BeamformCap =(BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP_HT_EXPLICIT); -+ CompSteeringNumofBFer = (pSTA->CurBeamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM)>>4; -+ } -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] HT CurBeamform=0x%X, BeamformCap=0x%X\n", __func__, pSTA->CurBeamform, BeamformCap)); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] HT NumofSoundingDim=%d, CompSteeringNumofBFer=%d\n", __func__, NumofSoundingDim, CompSteeringNumofBFer)); -+#if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+ if (pSTA->WirelessMode & WIRELESS_MODE_AC_5G || pSTA->WirelessMode & WIRELESS_MODE_AC_24G) { /*VHT*/ -+ -+ /* We are Beamformee because the STA is SU Beamformer*/ -+ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { -+ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMEE_CAP_VHT_SU); -+ NumofSoundingDim = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM)>>12; -+ } -+ /* We are Beamformer because the STA is SU Beamformee*/ -+ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) || -+ TEST_FLAG(pSTA->VhtBeamformCap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { -+ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMER_CAP_VHT_SU); -+ CompSteeringNumofBFer = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMER_STS_CAP)>>8; -+ } -+ /* We are Beamformee because the STA is MU Beamformer*/ -+ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { -+ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMEE_CAP_VHT_MU); -+ NumofSoundingDim = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM)>>12; -+ } -+ /* We are Beamformer because the STA is MU Beamformee*/ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { /* Only AP mode supports to act an MU beamformer */ -+ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) || -+ TEST_FLAG(pSTA->VhtBeamformCap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { -+ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP_VHT_MU); -+ CompSteeringNumofBFer = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMER_STS_CAP)>>8; -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]VHT CurBeamformVHT=0x%X, BeamformCap=0x%X\n", __func__, pSTA->CurBeamformVHT, BeamformCap)); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]VHT NumofSoundingDim=0x%X, CompSteeringNumofBFer=0x%X\n", __func__, NumofSoundingDim, CompSteeringNumofBFer)); -+ -+ } -+#endif -+ } -+ -+ -+ if(BeamformCap == BEAMFORMING_CAP_NONE) -+ return FALSE; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Self BF Entry Cap = 0x%02X\n", __func__, BeamformCap)); -+ -+ /*We are BFee, so the entry is BFer*/ -+ if (BeamformCap & (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) { -+ pBeamformerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, pSTA->RA, &BFerIdx); -+ -+ if (pBeamformerEntry == NULL) { -+ pBeamformerEntry = Beamforming_AddBFerEntry(pDM_Odm, pSTA, BeamformCap, NumofSoundingDim , &BFerIdx); -+ if (pBeamformerEntry == NULL) -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Not enough BFer entry!!!!!\n", __func__)); -+ } -+ } -+ -+ /*We are BFer, so the entry is BFee*/ -+ if (BeamformCap & (BEAMFORMER_CAP_VHT_MU | BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) { -+ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, pSTA->RA, &BFeeIdx); -+ -+ /*¦pªGBFeeIdx = 0xF «h¥Nªí¥Ø«eentry·í¤¤¨S¦³¬Û¦PªºMACID¦b¤º*/ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get BFee entry 0x%X by address\n", __func__, BFeeIdx)); -+ if (pBeamformEntry == NULL) { -+ pBeamformEntry = Beamforming_AddBFeeEntry(pDM_Odm, pSTA, BeamformCap, NumofSoundingDim, CompSteeringNumofBFer, &BFeeIdx); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: pSTA->AID=%d, pSTA->MacID=%d\n", __func__, pSTA->AID, pSTA->MacID)); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: Add BFee entry %d\n", __func__, BFeeIdx)); -+ -+ if (pBeamformEntry == NULL) -+ return FALSE; -+ else -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZEING; -+ } else { -+ /*Entry has been created. If entry is initialing or progressing then errors occur.*/ -+ if (pBeamformEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && -+ pBeamformEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ return FALSE; -+ } else -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZEING; -+ } -+ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ phydm_staInfoUpdate(pDM_Odm, staIdx, pBeamformEntry); -+ } -+ -+ *BFerBFeeIdx = (BFerIdx<<4) | BFeeIdx; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End: BFerIdx=0x%X, BFeeIdx=0x%X, BFerBFeeIdx=0x%X\n", __func__, BFerIdx, BFeeIdx, *BFerBFeeIdx)); -+ -+ return TRUE; -+} -+ -+ -+VOID -+Beamforming_DeInitEntry( -+ IN PVOID pDM_VOID, -+ pu1Byte RA -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Idx = 0; -+ -+ PRT_BEAMFORMER_ENTRY pBFerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, RA, &Idx); -+ PRT_BEAMFORMEE_ENTRY pBFeeEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ BOOLEAN ret = FALSE; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (pBFeeEntry != NULL) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, pBFeeEntry\n", __func__)); -+ pBFeeEntry->bUsed = FALSE; -+ pBFeeEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; -+ pBFeeEntry->bBeamformingInProgress = FALSE; -+ if (pBFeeEntry->is_mu_sta) { -+ pDM_Odm->BeamformingInfo.beamformee_mu_cnt -= 1; -+ pDM_Odm->BeamformingInfo.FirstMUBFeeIndex = phydm_Beamforming_GetFirstMUBFeeEntryIdx(pDM_Odm); -+ } else { -+ pDM_Odm->BeamformingInfo.beamformee_su_cnt -= 1; -+ } -+ ret = TRUE; -+ } -+ -+ if (pBFerEntry != NULL) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, pBFerEntry\n", __func__)); -+ pBFerEntry->bUsed = FALSE; -+ pBFerEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; -+ if (pBFerEntry->is_mu_ap) -+ pDM_Odm->BeamformingInfo.beamformer_mu_cnt -= 1; -+ else -+ pDM_Odm->BeamformingInfo.beamformer_su_cnt -= 1; -+ ret = TRUE; -+ } -+ -+ if (ret == TRUE) -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_LEAVE, (pu1Byte)&Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, Idx = 0x%X\n", __func__, Idx)); -+} -+ -+ -+VOID -+Beamforming_Reset( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Idx = 0; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &(pDM_Odm->BeamformingInfo); -+ -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ if (pBeamformingInfo->BeamformeeEntry[Idx].bUsed == TRUE) { -+ pBeamformingInfo->BeamformeeEntry[Idx].bUsed = FALSE; -+ pBeamformingInfo->BeamformeeEntry[Idx].BeamformEntryCap = BEAMFORMING_CAP_NONE; -+ /*pBeamformingInfo->BeamformeeEntry[Idx].BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ -+ /*Modified by David*/ -+ pBeamformingInfo->BeamformeeEntry[Idx].bBeamformingInProgress = FALSE; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_LEAVE, (pu1Byte)&Idx); -+ } -+ } -+ -+ for (Idx = 0; Idx < BEAMFORMER_ENTRY_NUM; Idx++) { -+ pBeamformingInfo->BeamformerEntry[Idx].bUsed = FALSE; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx=%d, bUsed=%d\n", __func__, Idx, pBeamformingInfo->BeamformerEntry[Idx].bUsed)); -+ } -+ -+} -+ -+ -+BOOLEAN -+BeamformingStart_V1( -+ IN PVOID pDM_VOID, -+ pu1Byte RA, -+ BOOLEAN Mode, -+ CHANNEL_WIDTH BW, -+ u1Byte Rate -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Idx = 0; -+ PRT_BEAMFORMEE_ENTRY pEntry; -+ BOOLEAN ret = TRUE; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ -+ pEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ -+ if (pEntry->bUsed == FALSE) { -+ pEntry->bBeamformingInProgress = FALSE; -+ return FALSE; -+ } else { -+ if (pEntry->bBeamformingInProgress) -+ return FALSE; -+ -+ pEntry->bBeamformingInProgress = TRUE; -+ -+ if (Mode == 1) { -+ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT)) { -+ pEntry->bBeamformingInProgress = FALSE; -+ return FALSE; -+ } -+ } else if (Mode == 0) { -+ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)) { -+ pEntry->bBeamformingInProgress = FALSE; -+ return FALSE; -+ } -+ } -+ -+ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ pEntry->bBeamformingInProgress = FALSE; -+ return FALSE; -+ } else { -+ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; -+ pEntry->bSound = TRUE; -+ } -+ } -+ -+ pEntry->SoundBW = BW; -+ pBeamInfo->BeamformeeCurIdx = Idx; -+ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx); -+ -+ if (Mode == 1) -+ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA, BW, NORMAL_QUEUE); -+ else -+ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA, pEntry->AID, BW, NORMAL_QUEUE); -+ -+ if (ret == FALSE) { -+ Beamforming_Leave(pDM_Odm, RA); -+ pEntry->bBeamformingInProgress = FALSE; -+ return FALSE; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Idx %d\n", __func__, Idx)); -+ return TRUE; -+} -+ -+ -+BOOLEAN -+BeamformingStart_SW( -+ IN PVOID pDM_VOID, -+ u1Byte Idx, -+ u1Byte Mode, -+ CHANNEL_WIDTH BW -+ ) -+{ -+ pu1Byte RA = NULL; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMEE_ENTRY pEntry; -+ BOOLEAN ret = TRUE; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ -+ pEntry = &(pBeamInfo->BeamformeeEntry[Idx]); -+ -+ if (pEntry->bUsed == FALSE) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Skip Beamforming, no entry for Idx =%d\n", Idx)); -+ pEntry->bBeamformingInProgress = FALSE; -+ return FALSE; -+ } else { -+ if (pEntry->bBeamformingInProgress) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("bBeamformingInProgress, skip...\n")); -+ return FALSE; -+ } -+ -+ pEntry->bBeamformingInProgress = TRUE; -+ RA = pEntry->MacAddr; -+ -+ if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_AUTO_HT_TIMER) { -+ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT)) { -+ pEntry->bBeamformingInProgress = FALSE; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n", __func__)); -+ return FALSE; -+ } -+ } else if (Mode == SOUNDING_SW_VHT_TIMER || Mode == SOUNDING_HW_VHT_TIMER || Mode == SOUNDING_AUTO_VHT_TIMER) { -+ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)) { -+ pEntry->bBeamformingInProgress = FALSE; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n", __func__)); -+ return FALSE; -+ } -+ } -+ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ pEntry->bBeamformingInProgress = FALSE; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by incorrect BeamformEntryState(%d) <==\n", __func__, pEntry->BeamformEntryState)); -+ return FALSE; -+ } else { -+ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; -+ pEntry->bSound = TRUE; -+ } -+ } -+ -+ pBeamInfo->BeamformeeCurIdx = Idx; -+ /*2014.12.22 Luke: Need to be checked*/ -+ /*GET_TXBF_INFO(Adapter)->fTxbfSet(Adapter, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx);*/ -+ -+ if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_AUTO_HT_TIMER) -+ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA , BW, NORMAL_QUEUE); -+ else -+ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA , pEntry->AID, BW, NORMAL_QUEUE); -+ -+ if (ret == FALSE) { -+ Beamforming_Leave(pDM_Odm, RA); -+ pEntry->bBeamformingInProgress = FALSE; -+ return FALSE; -+ } -+ -+ -+ /*-------------------------- -+ // Send BF Report Poll for MU BF -+ --------------------------*/ -+#ifdef SUPPORT_MU_BF -+#if (SUPPORT_MU_BF == 1) -+{ -+ u1Byte idx, PollSTACnt = 0; -+ BOOLEAN bGetFirstBFee = FALSE; -+ -+ if (pBeamInfo->beamformee_mu_cnt > 1) { /* More than 1 MU STA*/ -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); -+ if (pEntry->is_mu_sta) { -+ if (bGetFirstBFee) { -+ PollSTACnt++; -+ if (PollSTACnt == (pBeamInfo->beamformee_mu_cnt - 1))/* The last STA*/ -+ SendSWVHTBFReportPoll(pDM_Odm, pEntry->MacAddr, TRUE); -+ else -+ SendSWVHTBFReportPoll(pDM_Odm, pEntry->MacAddr, FALSE); -+ } else { -+ bGetFirstBFee = TRUE; -+ } -+ } -+ } -+ } -+} -+#endif -+#endif -+ return TRUE; -+} -+ -+ -+BOOLEAN -+BeamformingStart_FW( -+ IN PVOID pDM_VOID, -+ u1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pu1Byte RA = NULL; -+ PRT_BEAMFORMEE_ENTRY pEntry; -+ BOOLEAN ret = TRUE; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ -+ pEntry = &(pBeamInfo->BeamformeeEntry[Idx]); -+ if (pEntry->bUsed == FALSE) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Skip Beamforming, no entry for Idx =%d\n", Idx)); -+ return FALSE; -+ } -+ -+ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; -+ pEntry->bSound = TRUE; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End, Idx=0x%X\n", __func__, Idx)); -+ return TRUE; -+} -+ -+VOID -+Beamforming_CheckSoundingSuccess( -+ IN PVOID pDM_VOID, -+ BOOLEAN Status -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[David]@%s Start!\n", __func__)); -+ -+ if (Status == 1) { -+ if (pEntry->LogStatusFailCnt == 21) -+ Beamforming_DymPeriod(pDM_Odm, Status); -+ pEntry->LogStatusFailCnt = 0; -+ } else if (pEntry->LogStatusFailCnt <= 20) { -+ pEntry->LogStatusFailCnt++; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt %d\n", __func__, pEntry->LogStatusFailCnt)); -+ } -+ if (pEntry->LogStatusFailCnt > 20) { -+ pEntry->LogStatusFailCnt = 21; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __func__)); -+ Beamforming_DymPeriod(pDM_Odm, Status); -+ } -+} -+ -+VOID -+phydm_Beamforming_End_SW( -+ IN PVOID pDM_VOID, -+ BOOLEAN Status -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); -+ -+ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSING) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamformStatus %d\n", __func__, pEntry->BeamformEntryState)); -+ return; -+ } -+ -+ if ((pDM_Odm->TxBfDataRate >= ODM_RATEVHTSS3MCS7) && (pDM_Odm->TxBfDataRate <= ODM_RATEVHTSS3MCS9)) { -+ ODM_RT_TRACE(pDM_Odm, BEAMFORMING_DEBUG, ODM_DBG_LOUD, ("[%s] VHT3SS 7,8,9, do not apply V matrix.\n", __func__)); -+ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); -+ } else if (Status == 1) { -+ pEntry->LogStatusFailCnt = 0; -+ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); -+ } else { -+ pEntry->LogStatusFailCnt++; -+ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_TX_PATH_RESET, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] LogStatusFailCnt %d\n", __func__, pEntry->LogStatusFailCnt)); -+ } -+ -+ if (pEntry->LogStatusFailCnt > 30) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt > 50, Stop SOUNDING\n", __func__)); -+ pEntry->bSound = FALSE; -+ Beamforming_DeInitEntry(pDM_Odm, pEntry->MacAddr); -+ -+ /*Modified by David - Every action of deleting entry should follow by Notify*/ -+ phydm_Beamforming_Notify(pDM_Odm); -+ } -+ pEntry->bBeamformingInProgress = FALSE; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Status=%d\n", __func__, Status)); -+} -+ -+ -+VOID -+Beamforming_TimerCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PVOID pDM_VOID -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ IN PVOID pContext -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PADAPTER Adapter = (PADAPTER)pContext; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+#endif -+ BOOLEAN ret = FALSE; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); -+ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ if (pEntry->bBeamformingInProgress) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("bBeamformingInProgress, reset it\n")); -+ phydm_Beamforming_End_SW(pDM_Odm, 0); -+ } -+ -+ ret = phydm_Beamforming_SelectBeamEntry(pDM_Odm, pBeamInfo); -+#if (SUPPORT_MU_BF == 1) -+ if (ret && pBeamInfo->beamformee_mu_cnt > 1) -+ ret = 1; -+ else -+ ret = 0; -+#endif -+ if (ret) -+ ret = BeamformingStart_SW(pDM_Odm, pSoundInfo->SoundIdx, pSoundInfo->SoundMode, pSoundInfo->SoundBW); -+ else -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, Error value return from BeamformingStart_V2\n", __func__)); -+ -+ if ((pBeamInfo->beamformee_su_cnt != 0) || (pBeamInfo->beamformee_mu_cnt > 1)) { -+ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) -+ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod); -+ else { -+ u4Byte val = (pSoundInfo->SoundPeriod << 16) | HAL_TIMER_TXBF; -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_RESTART, (pu1Byte)(&val)); -+ } -+ } -+} -+ -+ -+VOID -+Beamforming_SWTimerCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PRT_TIMER pTimer -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ void *FunctionContext -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ Beamforming_TimerCallback(pDM_Odm); -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)FunctionContext; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ if (Adapter->net_closed == TRUE) -+ return; -+ rtw_run_in_thread_cmd(Adapter, Beamforming_TimerCallback, Adapter); -+#endif -+ -+} -+ -+ -+VOID -+phydm_Beamforming_Init( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PHAL_TXBF_INFO pTxbfInfo = &pBeamInfo->TxbfInfo; -+ PRT_BEAMFORMING_OID_INFO pBeamOidInfo = &(pBeamInfo->BeamformingOidInfo); -+ -+ pBeamOidInfo->SoundOidMode = SOUNDING_STOP_OID_TIMER; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Mode (%d)\n", __func__, pBeamOidInfo->SoundOidMode)); -+ -+ pBeamInfo->beamformee_su_cnt = 0; -+ pBeamInfo->beamformer_su_cnt = 0; -+ pBeamInfo->beamformee_mu_cnt = 0; -+ pBeamInfo->beamformer_mu_cnt = 0; -+ pBeamInfo->beamformee_mu_reg_maping = 0; -+ pBeamInfo->mu_ap_index = 0; -+ pBeamInfo->is_mu_sounding = FALSE; -+ pBeamInfo->FirstMUBFeeIndex = 0xFF; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pBeamInfo->SourceAdapter = pDM_Odm->Adapter; -+#endif -+ halComTxbf_beamformInit(pDM_Odm); -+} -+ -+ -+VOID -+Beamforming_Enter( -+ IN PVOID pDM_VOID, -+ IN u2Byte staIdx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte BFerBFeeIdx = 0xff; -+ -+ if (Beamforming_InitEntry(pDM_Odm, staIdx, &BFerBFeeIdx)) -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_ENTER, (pu1Byte)&BFerBFeeIdx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End!\n", __func__)); -+} -+ -+ -+VOID -+Beamforming_Leave( -+ IN PVOID pDM_VOID, -+ pu1Byte RA -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (RA == NULL) -+ Beamforming_Reset(pDM_Odm); -+ else -+ Beamforming_DeInitEntry(pDM_Odm, RA); -+ -+ phydm_Beamforming_Notify(pDM_Odm); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End!!\n", __func__)); -+} -+ -+#if 0 -+//Nobody calls this function -+VOID -+phydm_Beamforming_SetTxBFen( -+ IN PVOID pDM_VOID, -+ u1Byte MacId, -+ BOOLEAN bTxBF -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Idx = 0; -+ PRT_BEAMFORMEE_ENTRY pEntry; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ pEntry = phydm_Beamforming_GetEntryByMacId(pDM_Odm, MacId, &Idx); -+ -+ if(pEntry == NULL) -+ return; -+ else -+ pEntry->bTxBF = bTxBF; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s MacId %d TxBF %d\n", __func__, pEntry->MacId, pEntry->bTxBF)); -+ -+ phydm_Beamforming_Notify(pDM_Odm); -+} -+#endif -+ -+BEAMFORMING_CAP -+phydm_Beamforming_GetBeamCap( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORMING_INFO pBeamInfo -+ ) -+{ -+ u1Byte i; -+ BOOLEAN bSelfBeamformer = FALSE; -+ BOOLEAN bSelfBeamformee = FALSE; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ BeamformeeEntry = pBeamInfo->BeamformeeEntry[i]; -+ -+ if (BeamformeeEntry.bUsed) { -+ bSelfBeamformer = TRUE; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFee entry %d bUsed=TRUE\n", __func__, i)); -+ break; -+ } -+ } -+ -+ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { -+ BeamformerEntry = pBeamInfo->BeamformerEntry[i]; -+ -+ if (BeamformerEntry.bUsed) { -+ bSelfBeamformee = TRUE; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: BFer entry %d bUsed=TRUE\n", __func__, i)); -+ break; -+ } -+ } -+ -+ if (bSelfBeamformer) -+ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP); -+ if (bSelfBeamformee) -+ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMEE_CAP); -+ -+ return BeamformCap; -+} -+ -+ -+BOOLEAN -+BeamformingControl_V1( -+ IN PVOID pDM_VOID, -+ pu1Byte RA, -+ u1Byte AID, -+ u1Byte Mode, -+ CHANNEL_WIDTH BW, -+ u1Byte Rate -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ BOOLEAN ret = TRUE; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("AID (%d), Mode (%d), BW (%d)\n", AID, Mode, BW)); -+ -+ switch (Mode) { -+ case 0: -+ ret = BeamformingStart_V1(pDM_Odm, RA, 0, BW, Rate); -+ break; -+ case 1: -+ ret = BeamformingStart_V1(pDM_Odm, RA, 1, BW, Rate); -+ break; -+ case 2: -+ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); -+ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA, AID, BW, NORMAL_QUEUE); -+ break; -+ case 3: -+ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); -+ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA, BW, NORMAL_QUEUE); -+ break; -+ } -+ return ret; -+} -+ -+/*Only OID uses this function*/ -+BOOLEAN -+phydm_BeamformingControl_V2( -+ IN PVOID pDM_VOID, -+ u1Byte Idx, -+ u1Byte Mode, -+ CHANNEL_WIDTH BW, -+ u2Byte Period -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMING_OID_INFO pBeamOidInfo = &(pBeamInfo->BeamformingOidInfo); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Idx (%d), Mode (%d), BW (%d), Period (%d)\n", Idx, Mode, BW, Period)); -+ -+ pBeamOidInfo->SoundOidIdx = Idx; -+ pBeamOidInfo->SoundOidMode = (SOUNDING_MODE) Mode; -+ pBeamOidInfo->SoundOidBW = BW; -+ pBeamOidInfo->SoundOidPeriod = Period; -+ -+ phydm_Beamforming_Notify(pDM_Odm); -+ -+ return TRUE; -+} -+ -+ -+VOID -+phydm_Beamforming_Watchdog( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("%s Start!\n", __func__)); -+ -+ if (pBeamInfo->beamformee_su_cnt == 0) -+ return; -+ -+ Beamforming_DymPeriod(pDM_Odm,0); -+ phydm_Beamforming_DymNDPARate(pDM_Odm); -+ -+} -+ -+ -+#endif ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if WPP_SOFTWARE_TRACE ++#include "phydm_beamforming.tmh" ++#endif ++#endif ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ++PRT_BEAMFORM_STAINFO ++phydm_staInfoInit( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte staIdx ++ ) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORM_STAINFO pEntry = &(pBeamInfo->BeamformSTAinfo); ++ PSTA_INFO_T pSTA = pDM_Odm->pODM_StaInfo[staIdx]; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); ++ PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo); ++ ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, Adapter->CurrentAddress, 6); ++ ++ pEntry->HtBeamformCap = pHTInfo->HtBeamformCap; ++ pEntry->VhtBeamformCap = pVHTInfo->VhtBeamformCap; ++ ++ /*IBSS, AP mode*/ ++ if (staIdx != 0) { ++ pEntry->AID = pSTA->AID; ++ pEntry->RA = pSTA->MacAddr; ++ pEntry->MacID = pSTA->AssociatedMacId; ++ pEntry->WirelessMode = pSTA->WirelessMode; ++ pEntry->BW = pSTA->BandWidth; ++ pEntry->CurBeamform = pSTA->HTInfo.HtCurBeamform; ++ } else {/*client mode*/ ++ pEntry->AID = pMgntInfo->mAId; ++ pEntry->RA = pMgntInfo->Bssid; ++ pEntry->MacID = pMgntInfo->mMacId; ++ pEntry->WirelessMode = pMgntInfo->dot11CurrentWirelessMode; ++ pEntry->BW = pMgntInfo->dot11CurrentChannelBandWidth; ++ pEntry->CurBeamform = pHTInfo->HtCurBeamform; ++ } ++ ++ if ((pEntry->WirelessMode & WIRELESS_MODE_AC_5G) || (pEntry->WirelessMode & WIRELESS_MODE_AC_24G)) { ++ if (staIdx != 0) ++ pEntry->CurBeamformVHT = pSTA->VHTInfo.VhtCurBeamform; ++ else ++ pEntry->CurBeamformVHT = pVHTInfo->VhtCurBeamform; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pSTA->wireless_mode = 0x%x, staidx = %d\n", pSTA->WirelessMode, staIdx)); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++ if (!IS_STA_VALID(pSTA)) { ++ rtw_warn_on(1); ++ DBG_871X("%s => sta_info(mac_id:%d) failed\n", __func__, staIdx); ++ return pEntry; ++ } ++ ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, adapter_mac_addr(pSTA->padapter), 6); ++ pEntry->HtBeamformCap = pSTA->htpriv.beamform_cap; ++ ++ pEntry->AID = pSTA->aid; ++ pEntry->RA = pSTA->hwaddr; ++ pEntry->MacID = pSTA->mac_id; ++ pEntry->WirelessMode = pSTA->wireless_mode; ++ pEntry->BW = pSTA->bw_mode; ++ ++ pEntry->CurBeamform = pSTA->htpriv.beamform_cap; ++#if ODM_IC_11AC_SERIES_SUPPORT ++ if ((pEntry->WirelessMode & WIRELESS_MODE_AC_5G) || (pEntry->WirelessMode & WIRELESS_MODE_AC_24G)) { ++ pEntry->CurBeamformVHT = pSTA->vhtpriv.beamform_cap; ++ pEntry->VhtBeamformCap = pSTA->vhtpriv.beamform_cap; ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pSTA->wireless_mode = 0x%x, staidx = %d\n", pSTA->wireless_mode, staIdx)); ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pEntry->CurBeamform = 0x%x, pEntry->CurBeamformVHT = 0x%x\n", pEntry->CurBeamform, pEntry->CurBeamformVHT)); ++ return pEntry; ++ ++} ++void phydm_staInfoUpdate( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte staIdx, ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry ++ ) ++{ ++ PSTA_INFO_T pSTA = pDM_Odm->pODM_StaInfo[staIdx]; ++ ++ if (!IS_STA_VALID(pSTA)) ++ return; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pSTA->txbf_paid = pBeamformEntry->P_AID; ++ pSTA->txbf_gid = pBeamformEntry->G_ID; ++#endif ++} ++ ++ ++u1Byte ++Beamforming_GetHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nr_index = 0; ++ u1Byte NDPTxRate; ++ /*Find Nr*/ ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), CompSteeringNumofBFer); ++ else ++ Nr_index = TxBF_Nr(1, CompSteeringNumofBFer); ++ ++ switch (Nr_index) { ++ case 1: ++ NDPTxRate = MGN_MCS8; ++ break; ++ ++ case 2: ++ NDPTxRate = MGN_MCS16; ++ break; ++ ++ case 3: ++ NDPTxRate = MGN_MCS24; ++ break; ++ ++ default: ++ NDPTxRate = MGN_MCS8; ++ break; ++ } ++ ++return NDPTxRate; ++ ++} ++ ++u1Byte ++Beamforming_GetVHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nr_index = 0; ++ u1Byte NDPTxRate; ++ /*Find Nr*/ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), CompSteeringNumofBFer); ++ else ++ Nr_index = TxBF_Nr(1, CompSteeringNumofBFer); ++ ++ switch (Nr_index) { ++ case 1: ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ break; ++ ++ case 2: ++ NDPTxRate = MGN_VHT3SS_MCS0; ++ break; ++ ++ case 3: ++ NDPTxRate = MGN_VHT4SS_MCS0; ++ break; ++ ++ default: ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ break; ++ } ++ ++return NDPTxRate; ++ ++} ++ ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetBFeeEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (eqMacAddr(RA, pBeamInfo->BeamformeeEntry[i].MacAddr))) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformeeEntry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++PRT_BEAMFORMER_ENTRY ++phydm_Beamforming_GetBFerEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte TA, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformerEntry[i].bUsed && (eqMacAddr(TA, pBeamInfo->BeamformerEntry[i].MacAddr))) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformerEntry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetEntryByMacId( ++ IN PVOID pDM_VOID, ++ IN u1Byte MacId, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (MacId == pBeamInfo->BeamformeeEntry[i].MacId)) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformeeEntry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetEntryBeamCapByMacId( ++ IN PVOID pDM_VOID, ++ IN u1Byte MacId ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (MacId == pBeamInfo->BeamformeeEntry[i].MacId)) { ++ BeamformEntryCap = pBeamInfo->BeamformeeEntry[i].BeamformEntryCap; ++ i = BEAMFORMEE_ENTRY_NUM; ++ } ++ } ++ ++ return BeamformEntryCap; ++} ++ ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetFreeBFeeEntry( ++ IN PVOID pDM_VOID, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed == FALSE) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformeeEntry[i]); ++ } ++ } ++ return NULL; ++} ++ ++PRT_BEAMFORMER_ENTRY ++phydm_Beamforming_GetFreeBFerEntry( ++ IN PVOID pDM_VOID, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s ===>\n", __func__)); ++ ++ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformerEntry[i].bUsed == FALSE) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformerEntry[i]); ++ } ++ } ++ return NULL; ++} ++ ++/* ++// Description: Get the first entry index of MU Beamformee. ++// ++// Return Value: Index of the first MU sta. ++// ++// 2015.05.25. Created by tynli. ++// ++*/ ++u1Byte ++phydm_Beamforming_GetFirstMUBFeeEntryIdx( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte idx = 0xFF; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ BOOLEAN bFound = FALSE; ++ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ if (pBeamInfo->BeamformeeEntry[idx].bUsed && pBeamInfo->BeamformeeEntry[idx].is_mu_sta) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx=%d!\n", __func__, idx)); ++ bFound = TRUE; ++ break; ++ } ++ } ++ ++ if (!bFound) ++ idx = 0xFF; ++ ++ return idx; ++} ++ ++ ++/*Add SU BFee and MU BFee*/ ++PRT_BEAMFORMEE_ENTRY ++Beamforming_AddBFeeEntry( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORM_STAINFO pSTA, ++ IN BEAMFORMING_CAP BeamformCap, ++ IN u1Byte NumofSoundingDim, ++ IN u1Byte CompSteeringNumofBFer, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMEE_ENTRY pEntry = phydm_Beamforming_GetFreeBFeeEntry(pDM_Odm, Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pEntry != NULL) { ++ pEntry->bUsed = TRUE; ++ pEntry->AID = pSTA->AID; ++ pEntry->MacId = pSTA->MacID; ++ pEntry->SoundBW = pSTA->BW; ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, pSTA->MyMacAddr, 6); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { ++ /*BSSID[44:47] xor BSSID[40:43]*/ ++ u2Byte BSSID = ((pSTA->MyMacAddr[5] & 0xf0) >> 4) ^ (pSTA->MyMacAddr[5] & 0xf); ++ /*(dec(A) + dec(B)*32) mod 512*/ ++ pEntry->P_AID = (pSTA->AID + BSSID * 32) & 0x1ff; ++ pEntry->G_ID = 63; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to STA=%d\n", __func__, pEntry->P_AID)); ++ } else if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) { ++ /*ad hoc mode*/ ++ pEntry->P_AID = 0; ++ pEntry->G_ID = 63; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID as IBSS=%d\n", __func__, pEntry->P_AID)); ++ } else { ++ /*client mode*/ ++ pEntry->P_AID = pSTA->RA[5]; ++ /*BSSID[39:47]*/ ++ pEntry->P_AID = (pEntry->P_AID << 1) | (pSTA->RA[4] >> 7); ++ pEntry->G_ID = 0; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to AP=0x%X\n", __func__, pEntry->P_AID)); ++ } ++ cpMacAddr(pEntry->MacAddr, pSTA->RA); ++ pEntry->bTxBF = FALSE; ++ pEntry->bSound = FALSE; ++ pEntry->SoundPeriod = 400; ++ pEntry->BeamformEntryCap = BeamformCap; ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ ++/* pEntry->LogSeq = 0xff; Move to Beamforming_AddBFerEntry*/ ++/* pEntry->LogRetryCnt = 0; Move to Beamforming_AddBFerEntry*/ ++/* pEntry->LogSuccessCnt = 0; Move to Beamforming_AddBFerEntry*/ ++ ++ pEntry->LogStatusFailCnt = 0; ++ ++ pEntry->NumofSoundingDim = NumofSoundingDim; ++ pEntry->CompSteeringNumofBFer = CompSteeringNumofBFer; ++ ++ if (BeamformCap & BEAMFORMER_CAP_VHT_MU) { ++ pDM_Odm->BeamformingInfo.beamformee_mu_cnt += 1; ++ pEntry->is_mu_sta = TRUE; ++ pDM_Odm->BeamformingInfo.FirstMUBFeeIndex = phydm_Beamforming_GetFirstMUBFeeEntryIdx(pDM_Odm); ++ } else if (BeamformCap & BEAMFORMER_CAP_VHT_SU) { ++ pDM_Odm->BeamformingInfo.beamformee_su_cnt += 1; ++ pEntry->is_mu_sta = FALSE; ++ } ++ ++ return pEntry; ++ } ++ else ++ return NULL; ++} ++ ++/*Add SU BFee and MU BFer*/ ++PRT_BEAMFORMER_ENTRY ++Beamforming_AddBFerEntry( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORM_STAINFO pSTA, ++ IN BEAMFORMING_CAP BeamformCap, ++ IN u1Byte NumofSoundingDim, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMER_ENTRY pEntry = phydm_Beamforming_GetFreeBFerEntry(pDM_Odm, Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pEntry != NULL) { ++ pEntry->bUsed = TRUE; ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, pSTA->MyMacAddr, 6); ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { ++ /*BSSID[44:47] xor BSSID[40:43]*/ ++ u2Byte BSSID = ((pSTA->MyMacAddr[5] & 0xf0) >> 4) ^ (pSTA->MyMacAddr[5] & 0xf); ++ ++ pEntry->P_AID = (pSTA->AID + BSSID * 32) & 0x1ff; ++ pEntry->G_ID = 63; ++ /*(dec(A) + dec(B)*32) mod 512*/ ++ } else if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) { ++ pEntry->P_AID = 0; ++ pEntry->G_ID = 63; ++ } else { ++ pEntry->P_AID = pSTA->RA[5]; ++ /*BSSID[39:47]*/ ++ pEntry->P_AID = (pEntry->P_AID << 1) | (pSTA->RA[4] >> 7); ++ pEntry->G_ID = 0; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: P_AID addressed to AP=0x%X\n", __func__, pEntry->P_AID)); ++ } ++ ++ cpMacAddr(pEntry->MacAddr, pSTA->RA); ++ pEntry->BeamformEntryCap = BeamformCap; ++ ++ pEntry->PreLogSeq = 0; /*Modified by Jeffery @2015-04-13*/ ++ pEntry->LogSeq = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogRetryCnt = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogSuccess = 0; /*LogSuccess is NOT needed to be accumulated, so LogSuccessCnt->LogSuccess, 2015-04-13, Jeffery*/ ++ pEntry->ClockResetTimes = 0; /*Modified by Jeffery @2015-04-13*/ ++ ++ pEntry->NumofSoundingDim = NumofSoundingDim; ++ ++ if (BeamformCap & BEAMFORMEE_CAP_VHT_MU) { ++ pDM_Odm->BeamformingInfo.beamformer_mu_cnt += 1; ++ pEntry->is_mu_ap = TRUE; ++ pEntry->AID = pSTA->AID; ++ } else if (BeamformCap & BEAMFORMEE_CAP_VHT_SU) { ++ pDM_Odm->BeamformingInfo.beamformer_su_cnt += 1; ++ pEntry->is_mu_ap = FALSE; ++ } ++ ++ return pEntry; ++ } ++ else ++ return NULL; ++} ++ ++#if 0 ++BOOLEAN ++Beamforming_RemoveEntry( ++ IN PADAPTER Adapter, ++ IN pu1Byte RA, ++ OUT pu1Byte Idx ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ PRT_BEAMFORMER_ENTRY pBFerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, RA, Idx); ++ PRT_BEAMFORMEE_ENTRY pEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, Idx); ++ BOOLEAN ret = FALSE; ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s Start!\n", __func__)); ++ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, pBFerEntry=0x%x\n", __func__, pBFerEntry)); ++ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, pEntry=0x%x\n", __func__, pEntry)); ++ ++ if (pEntry != NULL) { ++ pEntry->bUsed = FALSE; ++ pEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ /*pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ ++ pEntry->bBeamformingInProgress = FALSE; ++ ret = TRUE; ++ } ++ if (pBFerEntry != NULL) { ++ pBFerEntry->bUsed = FALSE; ++ pBFerEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ ret = TRUE; ++ } ++ return ret; ++ ++} ++#endif ++ ++/* Used for BeamformingStart_V1 */ ++VOID ++phydm_Beamforming_NDPARate( ++ IN PVOID pDM_VOID, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++) ++{ ++ u2Byte NDPARate = Rate; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (NDPARate == 0) { ++ if(pDM_Odm->RSSI_Min > 30) // link RSSI > 30% ++ NDPARate = ODM_RATE24M; ++ else ++ NDPARate = ODM_RATE6M; ++ } ++ ++ if (NDPARate < ODM_RATEMCS0) ++ BW = (CHANNEL_WIDTH)ODM_BW20M; ++ ++ NDPARate = (NDPARate << 8) | BW; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_RATE, (pu1Byte)&NDPARate); ++ ++} ++ ++ ++/* Used for BeamformingStart_SW and BeamformingStart_FW */ ++VOID ++phydm_Beamforming_DymNDPARate( ++ IN PVOID pDM_VOID ++) ++{ ++ u2Byte NDPARate = ODM_RATE6M, BW; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pDM_Odm->RSSI_Min > 30) /*link RSSI > 30%*/ ++ NDPARate = ODM_RATE24M; ++ else ++ NDPARate = ODM_RATE6M; ++ ++ BW = ODM_BW20M; ++ NDPARate = NDPARate << 8 | BW; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_RATE, (pu1Byte)&NDPARate); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, NDPA Rate = 0x%X\n", __func__, NDPARate)); ++} ++ ++/* ++* SW Sounding : SW Timer unit 1ms ++* HW Timer unit (1/32000) s 32k is clock. ++* FW Sounding : FW Timer unit 10ms ++*/ ++VOID ++Beamforming_DymPeriod( ++ IN PVOID pDM_VOID, ++ IN u8 status ++) ++{ ++ u1Byte Idx; ++ BOOLEAN bChangePeriod = FALSE; ++ u2Byte SoundPeriod_SW, SoundPeriod_FW; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ //3 TODO per-client throughput caculation. ++ ++ if ((*(pDM_Odm->pCurrentTxTP) + *(pDM_Odm->pCurrentRxTP) > 2) && ((pEntry->LogStatusFailCnt <= 20) || status)) { ++ SoundPeriod_SW = 40; /* 40ms */ ++ SoundPeriod_FW = 40; /* From H2C cmd, unit = 10ms */ ++ } else { ++ SoundPeriod_SW = 4000;/* 4s */ ++ SoundPeriod_FW = 400; ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]SoundPeriod_SW=%d, SoundPeriod_FW=%d\n", __func__, SoundPeriod_SW, SoundPeriod_FW)); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ if (pBeamformEntry->DefaultCSICnt > 20) { ++ /*Modified by David*/ ++ SoundPeriod_SW = 4000; ++ SoundPeriod_FW = 400; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Period = %d\n", __func__, SoundPeriod_SW)); ++ if (pBeamformEntry->BeamformEntryCap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) { ++ if (pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER) { ++ if (pBeamformEntry->SoundPeriod != SoundPeriod_FW) { ++ pBeamformEntry->SoundPeriod = SoundPeriod_FW; ++ bChangePeriod = TRUE; /*Only FW sounding need to send H2C packet to change sound period. */ ++ } ++ } else if (pBeamformEntry->SoundPeriod != SoundPeriod_SW) { ++ pBeamformEntry->SoundPeriod = SoundPeriod_SW; ++ } ++ } ++ } ++ ++ if (bChangePeriod) ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); ++} ++ ++ ++ ++ ++BOOLEAN ++Beamforming_SendHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ) ++{ ++ BOOLEAN ret = TRUE; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (QIdx == BEACON_QUEUE) ++ ret = SendFWHTNDPAPacket(pDM_Odm, RA, BW); ++ else ++ ret = SendSWHTNDPAPacket(pDM_Odm, RA, BW); ++ ++ return ret; ++} ++ ++ ++ ++BOOLEAN ++Beamforming_SendVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_GET_TX_RATE, NULL); ++ ++ if ((pDM_Odm->TxBfDataRate >= ODM_RATEVHTSS3MCS7) && (pDM_Odm->TxBfDataRate <= ODM_RATEVHTSS3MCS9)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s: 3SS VHT 789 don't sounding\n", __func__)); ++ ++ } else { ++ if (QIdx == BEACON_QUEUE) /* Send to reserved page => FW NDPA */ ++ ret = SendFWVHTNDPAPacket(pDM_Odm, RA, AID, BW); ++ else { ++#ifdef SUPPORT_MU_BF ++ #if (SUPPORT_MU_BF == 1) ++ pBeamInfo->is_mu_sounding = TRUE; ++ ret = SendSWVHTMUNDPAPacket(pDM_Odm, BW); ++ #else ++ pBeamInfo->is_mu_sounding = FALSE; ++ ret = SendSWVHTNDPAPacket(pDM_Odm, RA, AID, BW); ++ #endif ++#else ++ pBeamInfo->is_mu_sounding = FALSE; ++ ret = SendSWVHTNDPAPacket(pDM_Odm, RA, AID, BW); ++#endif ++ } ++ } ++ return ret; ++} ++ ++ ++BEAMFORMING_NOTIFY_STATE ++phydm_beamfomring_bSounding( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ pu1Byte Idx ++ ) ++{ ++ BEAMFORMING_NOTIFY_STATE bSounding = BEAMFORMING_NOTIFY_NONE; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ /*if(( Beamforming_GetBeamCap(pBeamInfo) & BEAMFORMER_CAP) == 0)*/ ++ /*bSounding = BEAMFORMING_NOTIFY_RESET;*/ ++ if (BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER) ++ bSounding = BEAMFORMING_NOTIFY_RESET; ++ else { ++ u1Byte i; ++ ++ for (i = 0 ; i < BEAMFORMEE_ENTRY_NUM ; i++) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s: BFee Entry %d bUsed=%d, bSound=%d\n", __func__, i, pBeamInfo->BeamformeeEntry[i].bUsed, pBeamInfo->BeamformeeEntry[i].bSound)); ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (!pBeamInfo->BeamformeeEntry[i].bSound)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Add BFee entry %d\n", __func__, i)); ++ *Idx = i; ++ if (pBeamInfo->BeamformeeEntry[i].is_mu_sta) ++ bSounding = BEAMFORMEE_NOTIFY_ADD_MU; ++ else ++ bSounding = BEAMFORMEE_NOTIFY_ADD_SU; ++ } ++ ++ if ((!pBeamInfo->BeamformeeEntry[i].bUsed) && pBeamInfo->BeamformeeEntry[i].bSound) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Delete BFee entry %d\n", __func__, i)); ++ *Idx = i; ++ if (pBeamInfo->BeamformeeEntry[i].is_mu_sta) ++ bSounding = BEAMFORMEE_NOTIFY_DELETE_MU; ++ else ++ bSounding = BEAMFORMEE_NOTIFY_DELETE_SU; ++ } ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, bSounding = %d\n", __func__, bSounding)); ++ return bSounding; ++} ++ ++ ++//This function is unused ++u1Byte ++phydm_beamforming_SoundingIdx( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo ++ ) ++{ ++ u1Byte Idx = 0; ++ RT_BEAMFORMEE_ENTRY BeamEntry; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (BeamOidInfo.SoundOidMode == SOUNDING_SW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_SW_VHT_TIMER || ++ BeamOidInfo.SoundOidMode == SOUNDING_HW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_VHT_TIMER) ++ Idx = BeamOidInfo.SoundOidIdx; ++ else { ++ u1Byte i; ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (FALSE == pBeamInfo->BeamformeeEntry[i].bSound)) { ++ Idx = i; ++ break; ++ } ++ } ++ } ++ ++ return Idx; ++} ++ ++ ++SOUNDING_MODE ++phydm_beamforming_SoundingMode( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte SupportInterface = pDM_Odm->SupportInterface; ++ ++ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ SOUNDING_MODE Mode = BeamOidInfo.SoundOidMode; ++ ++ if (BeamOidInfo.SoundOidMode == SOUNDING_SW_VHT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_VHT_TIMER) { ++ if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Mode = BeamOidInfo.SoundOidMode; ++ else ++ Mode = SOUNDING_STOP_All_TIMER; ++ } else if (BeamOidInfo.SoundOidMode == SOUNDING_SW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_HT_TIMER) { ++ if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) ++ Mode = BeamOidInfo.SoundOidMode; ++ else ++ Mode = SOUNDING_STOP_All_TIMER; ++ } else if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) { ++ if ((SupportInterface == ODM_ITRF_USB) && !(pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))) ++ Mode = SOUNDING_FW_VHT_TIMER; ++ else ++ Mode = SOUNDING_SW_VHT_TIMER; ++ } else if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) { ++ if ((SupportInterface == ODM_ITRF_USB) && !(pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))) ++ Mode = SOUNDING_FW_HT_TIMER; ++ else ++ Mode = SOUNDING_SW_HT_TIMER; ++ } else ++ Mode = SOUNDING_STOP_All_TIMER; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SupportInterface=%d, Mode=%d\n", __func__, SupportInterface, Mode)); ++ ++ return Mode; ++} ++ ++ ++u2Byte ++phydm_beamforming_SoundingTime( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ SOUNDING_MODE Mode, ++ u1Byte Idx ++ ) ++{ ++ u2Byte SoundingTime = 0xffff; ++ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_HW_VHT_TIMER) ++ SoundingTime = BeamOidInfo.SoundOidPeriod * 32; ++ else if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_SW_VHT_TIMER) ++ /*Modified by David*/ ++ SoundingTime = BeamEntry.SoundPeriod; /*BeamOidInfo.SoundOidPeriod;*/ ++ else ++ SoundingTime = BeamEntry.SoundPeriod; ++ ++ return SoundingTime; ++} ++ ++ ++CHANNEL_WIDTH ++phydm_beamforming_SoundingBW( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ SOUNDING_MODE Mode, ++ u1Byte Idx ++ ) ++{ ++ CHANNEL_WIDTH SoundingBW = CHANNEL_WIDTH_20; ++ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_HW_VHT_TIMER) ++ SoundingBW = BeamOidInfo.SoundOidBW; ++ else if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_SW_VHT_TIMER) ++ /*Modified by David*/ ++ SoundingBW = BeamEntry.SoundBW; /*BeamOidInfo.SoundOidBW;*/ ++ else ++ SoundingBW = BeamEntry.SoundBW; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, SoundingBW=0x%X\n", __func__, SoundingBW)); ++ ++ return SoundingBW; ++} ++ ++ ++BOOLEAN ++phydm_Beamforming_SelectBeamEntry( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo ++ ) ++{ ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*pEntry.bSound is different between first and latter NDPA, and should not be used as BFee entry selection*/ ++ /*BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed SoundIdx.*/ ++ pSoundInfo->SoundIdx = phydm_beamforming_SoundingIdx(pDM_Odm, pBeamInfo); ++ /*pSoundInfo->SoundIdx = 0;*/ ++ ++ if (pSoundInfo->SoundIdx < BEAMFORMEE_ENTRY_NUM) ++ pSoundInfo->SoundMode = phydm_beamforming_SoundingMode(pDM_Odm, pBeamInfo, pSoundInfo->SoundIdx); ++ else ++ pSoundInfo->SoundMode = SOUNDING_STOP_All_TIMER; ++ ++ if (SOUNDING_STOP_All_TIMER == pSoundInfo->SoundMode) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Return because of SOUNDING_STOP_All_TIMER\n", __func__)); ++ return FALSE; ++ } else { ++ pSoundInfo->SoundBW = phydm_beamforming_SoundingBW(pDM_Odm, pBeamInfo, pSoundInfo->SoundMode, pSoundInfo->SoundIdx ); ++ pSoundInfo->SoundPeriod = phydm_beamforming_SoundingTime(pDM_Odm, pBeamInfo, pSoundInfo->SoundMode, pSoundInfo->SoundIdx ); ++ return TRUE; ++ } ++} ++ ++/*SU BFee Entry Only*/ ++BOOLEAN ++phydm_beamforming_StartPeriod( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ BOOLEAN Ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ phydm_Beamforming_DymNDPARate(pDM_Odm); ++ ++ phydm_Beamforming_SelectBeamEntry(pDM_Odm, pBeamInfo); // Modified ++ ++ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod); ++ else if (pSoundInfo->SoundMode == SOUNDING_HW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_HW_HT_TIMER || ++ pSoundInfo->SoundMode == SOUNDING_AUTO_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_AUTO_HT_TIMER) { ++ HAL_HW_TIMER_TYPE TimerType = HAL_TIMER_TXBF; ++ u4Byte val = (pSoundInfo->SoundPeriod | (TimerType<<16)); ++ ++ //HW timer stop: All IC has the same setting ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_STOP, (pu1Byte)(&TimerType)); ++ //ODM_Write1Byte(pDM_Odm, 0x15F, 0); ++ //HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_INIT, (pu1Byte)(&val)); ++ //ODM_Write1Byte(pDM_Odm, 0x164, 1); ++ //ODM_Write4Byte(pDM_Odm, 0x15C, val); ++ //HW timer start: All IC has the same setting ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_START, (pu1Byte)(&TimerType)); ++ //ODM_Write1Byte(pDM_Odm, 0x15F, 0x5); ++ } else if (pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER) ++ Ret = BeamformingStart_FW(pDM_Odm, pSoundInfo->SoundIdx); ++ else ++ Ret = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SoundIdx=%d, SoundMode=%d, SoundBW=%d, SoundPeriod=%d\n", __func__, ++ pSoundInfo->SoundIdx, pSoundInfo->SoundMode, pSoundInfo->SoundBW, pSoundInfo->SoundPeriod)); ++ ++ return Ret; ++} ++ ++// Used after Beamforming_Leave, and will clear the setting of the "already deleted" entry ++/*SU BFee Entry Only*/ ++VOID ++phydm_beamforming_EndPeriod_SW( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ HAL_HW_TIMER_TYPE TimerType = HAL_TIMER_TXBF; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_CancelTimer(pDM_Odm, &pBeamInfo->BeamformingTimer); ++ else if (pSoundInfo->SoundMode == SOUNDING_HW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_HW_HT_TIMER || ++ pSoundInfo->SoundMode == SOUNDING_AUTO_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_AUTO_HT_TIMER) ++ /*HW timer stop: All IC has the same setting*/ ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_STOP, (pu1Byte)(&TimerType)); ++ /*ODM_Write1Byte(pDM_Odm, 0x15F, 0);*/ ++} ++ ++VOID ++phydm_beamforming_EndPeriod_FW( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]\n", __func__)); ++} ++ ++ ++/*SU BFee Entry Only*/ ++VOID ++phydm_beamforming_ClearEntry_SW( ++ IN PVOID pDM_VOID, ++ BOOLEAN IsDelete, ++ u1Byte DeleteIdx ++ ) ++{ ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ if (IsDelete) { ++ if (DeleteIdx < BEAMFORMEE_ENTRY_NUM) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry + DeleteIdx; ++ if (!((!pBeamformEntry->bUsed) && pBeamformEntry->bSound)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW DeleteIdx is wrong!!!!!\n", __func__)); ++ return; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW delete BFee entry %d\n", __func__, DeleteIdx)); ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) { ++ pBeamformEntry->bBeamformingInProgress = FALSE; ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ } else if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&DeleteIdx); ++ } ++ pBeamformEntry->bSound = FALSE; ++ } else { ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ /*Used after bSounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ ++ /*This function is mainly used in case "BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER".*/ ++ /*However, setting oid doesn't delete entries (bUsed is still TRUE), new entries may fail to be added in.*/ ++ ++ if (pBeamformEntry->bSound) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW reset BFee entry %d\n", __func__, Idx)); ++ /* ++ * If End procedure is ++ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. ++ * After C2H packet return , status bit will be set to zero. ++ * ++ * 2. After C2H packet, then reset state to initialized and clear status bit. ++ */ ++ ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ phydm_Beamforming_End_SW(pDM_Odm, 0); ++ else if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx); ++ } ++ ++ pBeamformEntry->bSound = FALSE; ++ } ++ } ++ } ++} ++ ++VOID ++phydm_beamforming_ClearEntry_FW( ++ IN PVOID pDM_VOID, ++ BOOLEAN IsDelete, ++ u1Byte DeleteIdx ++ ) ++{ ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ if (IsDelete) { ++ if (DeleteIdx < BEAMFORMEE_ENTRY_NUM) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry + DeleteIdx; ++ ++ if (!((!pBeamformEntry->bUsed) && pBeamformEntry->bSound)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] FW DeleteIdx is wrong!!!!!\n", __func__)); ++ return; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: FW delete BFee entry %d\n", __func__, DeleteIdx)); ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ pBeamformEntry->bSound = FALSE; ++ } else { ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ /*Used after bSounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ ++ /*This function is mainly used in case "BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER".*/ ++ /*However, setting oid doesn't delete entries (bUsed is still TRUE), new entries may fail to be added in.*/ ++ ++ if (pBeamformEntry->bSound) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]FW reset BFee entry %d\n", __func__, Idx)); ++ /* ++ * If End procedure is ++ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. ++ * After C2H packet return , status bit will be set to zero. ++ * ++ * 2. After C2H packet, then reset state to initialized and clear status bit. ++ */ ++ ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ pBeamformEntry->bSound = FALSE; ++ } ++ } ++ } ++} ++ ++/* ++* Called : ++* 1. Add and delete entry : Beamforming_Enter/Beamforming_Leave ++* 2. FW trigger : Beamforming_SetTxBFen ++* 3. Set OID_RT_BEAMFORMING_PERIOD : BeamformingControl_V2 ++*/ ++VOID ++phydm_Beamforming_Notify( ++ IN PVOID pDM_VOID ++ ) ++{ ++ u1Byte Idx=BEAMFORMEE_ENTRY_NUM; ++ BEAMFORMING_NOTIFY_STATE bSounding = BEAMFORMING_NOTIFY_NONE; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ bSounding = phydm_beamfomring_bSounding(pDM_Odm, pBeamInfo, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, Before notify, bSounding=%d, Idx=%d\n", __func__, bSounding, Idx)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: pBeamInfo->beamformee_su_cnt = %d\n", __func__, pBeamInfo->beamformee_su_cnt)); ++ ++ ++ switch (bSounding) { ++ case BEAMFORMEE_NOTIFY_ADD_SU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_ADD_SU\n", __func__)); ++ phydm_beamforming_StartPeriod(pDM_Odm); ++ break; ++ ++ case BEAMFORMEE_NOTIFY_DELETE_SU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_DELETE_SU\n", __func__)); ++ if (pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER) { ++ phydm_beamforming_ClearEntry_FW(pDM_Odm, TRUE, Idx); ++ if (pBeamInfo->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ ++ phydm_beamforming_EndPeriod_FW(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: No BFee left\n", __func__)); ++ } ++ } else { ++ phydm_beamforming_ClearEntry_SW(pDM_Odm, TRUE, Idx); ++ if (pBeamInfo->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ ++ phydm_beamforming_EndPeriod_SW(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: No BFee left\n", __func__)); ++ } ++ } ++ break; ++ ++ case BEAMFORMEE_NOTIFY_ADD_MU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_ADD_MU\n", __func__)); ++ if (pBeamInfo->beamformee_mu_cnt == 2) { ++ /*if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod);*/ ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, 1000); /*Do MU sounding every 1sec*/ ++ } else ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Less or larger than 2 MU STAs, not to set timer\n", __func__)); ++ break; ++ ++ case BEAMFORMEE_NOTIFY_DELETE_MU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_DELETE_MU\n", __func__)); ++ if (pBeamInfo->beamformee_mu_cnt == 1) { ++ /*if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER)*/{ ++ ODM_CancelTimer(pDM_Odm, &pBeamInfo->BeamformingTimer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Less than 2 MU STAs, stop sounding\n", __func__)); ++ } ++ } ++ break; ++ ++ case BEAMFORMING_NOTIFY_RESET: ++ if (pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER) { ++ phydm_beamforming_ClearEntry_FW(pDM_Odm, FALSE, Idx); ++ phydm_beamforming_EndPeriod_FW(pDM_Odm); ++ } else { ++ phydm_beamforming_ClearEntry_SW(pDM_Odm, FALSE, Idx); ++ phydm_beamforming_EndPeriod_SW(pDM_Odm); ++ } ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++ ++ ++BOOLEAN ++Beamforming_InitEntry( ++ IN PVOID pDM_VOID, ++ IN u2Byte staIdx, ++ pu1Byte BFerBFeeIdx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; ++ PRT_BEAMFORM_STAINFO pSTA = NULL; ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ u1Byte BFerIdx=0xF, BFeeIdx=0xF; ++ u1Byte NumofSoundingDim = 0, CompSteeringNumofBFer = 0; ++ ++ pSTA = phydm_staInfoInit(pDM_Odm, staIdx); ++ ++ /*The current setting does not support Beaforming*/ ++ if (BEAMFORMING_CAP_NONE == pSTA->HtBeamformCap && BEAMFORMING_CAP_NONE == pSTA->VhtBeamformCap) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("The configuration disabled Beamforming! Skip...\n")); ++ return FALSE; ++ } ++ ++ if (pSTA->WirelessMode < WIRELESS_MODE_N_24G) ++ return FALSE; ++ else { /*HT*/ ++ /*We are Beamformee because the STA is Beamformer*/ ++ if (TEST_FLAG(pSTA->CurBeamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMEE_CAP_HT_EXPLICIT); ++ NumofSoundingDim = (pSTA->CurBeamform&BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP)>>6; ++ } ++ /*We are Beamformer because the STA is Beamformee*/ ++ if (TEST_FLAG(pSTA->CurBeamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE) || ++ TEST_FLAG(pSTA->HtBeamformCap, BEAMFORMING_HT_BEAMFORMER_TEST)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP_HT_EXPLICIT); ++ CompSteeringNumofBFer = (pSTA->CurBeamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM)>>4; ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] HT CurBeamform=0x%X, BeamformCap=0x%X\n", __func__, pSTA->CurBeamform, BeamformCap)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] HT NumofSoundingDim=%d, CompSteeringNumofBFer=%d\n", __func__, NumofSoundingDim, CompSteeringNumofBFer)); ++#if (ODM_IC_11AC_SERIES_SUPPORT == 1) ++ if (pSTA->WirelessMode & WIRELESS_MODE_AC_5G || pSTA->WirelessMode & WIRELESS_MODE_AC_24G) { /*VHT*/ ++ ++ /* We are Beamformee because the STA is SU Beamformer*/ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMEE_CAP_VHT_SU); ++ NumofSoundingDim = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM)>>12; ++ } ++ /* We are Beamformer because the STA is SU Beamformee*/ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) || ++ TEST_FLAG(pSTA->VhtBeamformCap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMER_CAP_VHT_SU); ++ CompSteeringNumofBFer = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMER_STS_CAP)>>8; ++ } ++ /* We are Beamformee because the STA is MU Beamformer*/ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMEE_CAP_VHT_MU); ++ NumofSoundingDim = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM)>>12; ++ } ++ /* We are Beamformer because the STA is MU Beamformee*/ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { /* Only AP mode supports to act an MU beamformer */ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) || ++ TEST_FLAG(pSTA->VhtBeamformCap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP_VHT_MU); ++ CompSteeringNumofBFer = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMER_STS_CAP)>>8; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]VHT CurBeamformVHT=0x%X, BeamformCap=0x%X\n", __func__, pSTA->CurBeamformVHT, BeamformCap)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]VHT NumofSoundingDim=0x%X, CompSteeringNumofBFer=0x%X\n", __func__, NumofSoundingDim, CompSteeringNumofBFer)); ++ ++ } ++#endif ++ } ++ ++ ++ if(BeamformCap == BEAMFORMING_CAP_NONE) ++ return FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Self BF Entry Cap = 0x%02X\n", __func__, BeamformCap)); ++ ++ /*We are BFee, so the entry is BFer*/ ++ if (BeamformCap & (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) { ++ pBeamformerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, pSTA->RA, &BFerIdx); ++ ++ if (pBeamformerEntry == NULL) { ++ pBeamformerEntry = Beamforming_AddBFerEntry(pDM_Odm, pSTA, BeamformCap, NumofSoundingDim , &BFerIdx); ++ if (pBeamformerEntry == NULL) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Not enough BFer entry!!!!!\n", __func__)); ++ } ++ } ++ ++ /*We are BFer, so the entry is BFee*/ ++ if (BeamformCap & (BEAMFORMER_CAP_VHT_MU | BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) { ++ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, pSTA->RA, &BFeeIdx); ++ ++ /*¦pªGBFeeIdx = 0xF «h¥Nªí¥Ø«eentry·í¤¤¨S¦³¬Û¦PªºMACID¦b¤º*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get BFee entry 0x%X by address\n", __func__, BFeeIdx)); ++ if (pBeamformEntry == NULL) { ++ pBeamformEntry = Beamforming_AddBFeeEntry(pDM_Odm, pSTA, BeamformCap, NumofSoundingDim, CompSteeringNumofBFer, &BFeeIdx); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: pSTA->AID=%d, pSTA->MacID=%d\n", __func__, pSTA->AID, pSTA->MacID)); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: Add BFee entry %d\n", __func__, BFeeIdx)); ++ ++ if (pBeamformEntry == NULL) ++ return FALSE; ++ else ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } else { ++ /*Entry has been created. If entry is initialing or progressing then errors occur.*/ ++ if (pBeamformEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && ++ pBeamformEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ return FALSE; ++ } else ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ phydm_staInfoUpdate(pDM_Odm, staIdx, pBeamformEntry); ++ } ++ ++ *BFerBFeeIdx = (BFerIdx<<4) | BFeeIdx; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End: BFerIdx=0x%X, BFeeIdx=0x%X, BFerBFeeIdx=0x%X\n", __func__, BFerIdx, BFeeIdx, *BFerBFeeIdx)); ++ ++ return TRUE; ++} ++ ++ ++VOID ++Beamforming_DeInitEntry( ++ IN PVOID pDM_VOID, ++ pu1Byte RA ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ ++ PRT_BEAMFORMER_ENTRY pBFerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, RA, &Idx); ++ PRT_BEAMFORMEE_ENTRY pBFeeEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ BOOLEAN ret = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pBFeeEntry != NULL) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, pBFeeEntry\n", __func__)); ++ pBFeeEntry->bUsed = FALSE; ++ pBFeeEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ pBFeeEntry->bBeamformingInProgress = FALSE; ++ if (pBFeeEntry->is_mu_sta) { ++ pDM_Odm->BeamformingInfo.beamformee_mu_cnt -= 1; ++ pDM_Odm->BeamformingInfo.FirstMUBFeeIndex = phydm_Beamforming_GetFirstMUBFeeEntryIdx(pDM_Odm); ++ } else { ++ pDM_Odm->BeamformingInfo.beamformee_su_cnt -= 1; ++ } ++ ret = TRUE; ++ } ++ ++ if (pBFerEntry != NULL) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, pBFerEntry\n", __func__)); ++ pBFerEntry->bUsed = FALSE; ++ pBFerEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ if (pBFerEntry->is_mu_ap) ++ pDM_Odm->BeamformingInfo.beamformer_mu_cnt -= 1; ++ else ++ pDM_Odm->BeamformingInfo.beamformer_su_cnt -= 1; ++ ret = TRUE; ++ } ++ ++ if (ret == TRUE) ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_LEAVE, (pu1Byte)&Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, Idx = 0x%X\n", __func__, Idx)); ++} ++ ++ ++VOID ++Beamforming_Reset( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &(pDM_Odm->BeamformingInfo); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamformingInfo->BeamformeeEntry[Idx].bUsed == TRUE) { ++ pBeamformingInfo->BeamformeeEntry[Idx].bUsed = FALSE; ++ pBeamformingInfo->BeamformeeEntry[Idx].BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ /*pBeamformingInfo->BeamformeeEntry[Idx].BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ ++ /*Modified by David*/ ++ pBeamformingInfo->BeamformeeEntry[Idx].bBeamformingInProgress = FALSE; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_LEAVE, (pu1Byte)&Idx); ++ } ++ } ++ ++ for (Idx = 0; Idx < BEAMFORMER_ENTRY_NUM; Idx++) { ++ pBeamformingInfo->BeamformerEntry[Idx].bUsed = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx=%d, bUsed=%d\n", __func__, Idx, pBeamformingInfo->BeamformerEntry[Idx].bUsed)); ++ } ++ ++} ++ ++ ++BOOLEAN ++BeamformingStart_V1( ++ IN PVOID pDM_VOID, ++ pu1Byte RA, ++ BOOLEAN Mode, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ pEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ if (pEntry->bUsed == FALSE) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } else { ++ if (pEntry->bBeamformingInProgress) ++ return FALSE; ++ ++ pEntry->bBeamformingInProgress = TRUE; ++ ++ if (Mode == 1) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ } else if (Mode == 0) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ } ++ ++ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } else { ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = TRUE; ++ } ++ } ++ ++ pEntry->SoundBW = BW; ++ pBeamInfo->BeamformeeCurIdx = Idx; ++ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx); ++ ++ if (Mode == 1) ++ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA, BW, NORMAL_QUEUE); ++ else ++ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA, pEntry->AID, BW, NORMAL_QUEUE); ++ ++ if (ret == FALSE) { ++ Beamforming_Leave(pDM_Odm, RA); ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Idx %d\n", __func__, Idx)); ++ return TRUE; ++} ++ ++ ++BOOLEAN ++BeamformingStart_SW( ++ IN PVOID pDM_VOID, ++ u1Byte Idx, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW ++ ) ++{ ++ pu1Byte RA = NULL; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[Idx]); ++ ++ if (pEntry->bUsed == FALSE) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Skip Beamforming, no entry for Idx =%d\n", Idx)); ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } else { ++ if (pEntry->bBeamformingInProgress) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("bBeamformingInProgress, skip...\n")); ++ return FALSE; ++ } ++ ++ pEntry->bBeamformingInProgress = TRUE; ++ RA = pEntry->MacAddr; ++ ++ if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_AUTO_HT_TIMER) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n", __func__)); ++ return FALSE; ++ } ++ } else if (Mode == SOUNDING_SW_VHT_TIMER || Mode == SOUNDING_HW_VHT_TIMER || Mode == SOUNDING_AUTO_VHT_TIMER) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n", __func__)); ++ return FALSE; ++ } ++ } ++ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pEntry->bBeamformingInProgress = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by incorrect BeamformEntryState(%d) <==\n", __func__, pEntry->BeamformEntryState)); ++ return FALSE; ++ } else { ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = TRUE; ++ } ++ } ++ ++ pBeamInfo->BeamformeeCurIdx = Idx; ++ /*2014.12.22 Luke: Need to be checked*/ ++ /*GET_TXBF_INFO(Adapter)->fTxbfSet(Adapter, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx);*/ ++ ++ if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_AUTO_HT_TIMER) ++ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA , BW, NORMAL_QUEUE); ++ else ++ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA , pEntry->AID, BW, NORMAL_QUEUE); ++ ++ if (ret == FALSE) { ++ Beamforming_Leave(pDM_Odm, RA); ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ ++ ++ /*-------------------------- ++ // Send BF Report Poll for MU BF ++ --------------------------*/ ++#ifdef SUPPORT_MU_BF ++#if (SUPPORT_MU_BF == 1) ++{ ++ u1Byte idx, PollSTACnt = 0; ++ BOOLEAN bGetFirstBFee = FALSE; ++ ++ if (pBeamInfo->beamformee_mu_cnt > 1) { /* More than 1 MU STA*/ ++ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); ++ if (pEntry->is_mu_sta) { ++ if (bGetFirstBFee) { ++ PollSTACnt++; ++ if (PollSTACnt == (pBeamInfo->beamformee_mu_cnt - 1))/* The last STA*/ ++ SendSWVHTBFReportPoll(pDM_Odm, pEntry->MacAddr, TRUE); ++ else ++ SendSWVHTBFReportPoll(pDM_Odm, pEntry->MacAddr, FALSE); ++ } else { ++ bGetFirstBFee = TRUE; ++ } ++ } ++ } ++ } ++} ++#endif ++#endif ++ return TRUE; ++} ++ ++ ++BOOLEAN ++BeamformingStart_FW( ++ IN PVOID pDM_VOID, ++ u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pu1Byte RA = NULL; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[Idx]); ++ if (pEntry->bUsed == FALSE) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Skip Beamforming, no entry for Idx =%d\n", Idx)); ++ return FALSE; ++ } ++ ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = TRUE; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End, Idx=0x%X\n", __func__, Idx)); ++ return TRUE; ++} ++ ++VOID ++Beamforming_CheckSoundingSuccess( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[David]@%s Start!\n", __func__)); ++ ++ if (Status == 1) { ++ if (pEntry->LogStatusFailCnt == 21) ++ Beamforming_DymPeriod(pDM_Odm, Status); ++ pEntry->LogStatusFailCnt = 0; ++ } else if (pEntry->LogStatusFailCnt <= 20) { ++ pEntry->LogStatusFailCnt++; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt %d\n", __func__, pEntry->LogStatusFailCnt)); ++ } ++ if (pEntry->LogStatusFailCnt > 20) { ++ pEntry->LogStatusFailCnt = 21; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __func__)); ++ Beamforming_DymPeriod(pDM_Odm, Status); ++ } ++} ++ ++VOID ++phydm_Beamforming_End_SW( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSING) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamformStatus %d\n", __func__, pEntry->BeamformEntryState)); ++ return; ++ } ++ ++ if ((pDM_Odm->TxBfDataRate >= ODM_RATEVHTSS3MCS7) && (pDM_Odm->TxBfDataRate <= ODM_RATEVHTSS3MCS9)) { ++ ODM_RT_TRACE(pDM_Odm, BEAMFORMING_DEBUG, ODM_DBG_LOUD, ("[%s] VHT3SS 7,8,9, do not apply V matrix.\n", __func__)); ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); ++ } else if (Status == 1) { ++ pEntry->LogStatusFailCnt = 0; ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); ++ } else { ++ pEntry->LogStatusFailCnt++; ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_TX_PATH_RESET, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] LogStatusFailCnt %d\n", __func__, pEntry->LogStatusFailCnt)); ++ } ++ ++ if (pEntry->LogStatusFailCnt > 30) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt > 50, Stop SOUNDING\n", __func__)); ++ pEntry->bSound = FALSE; ++ Beamforming_DeInitEntry(pDM_Odm, pEntry->MacAddr); ++ ++ /*Modified by David - Every action of deleting entry should follow by Notify*/ ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++ pEntry->bBeamformingInProgress = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Status=%d\n", __func__, Status)); ++} ++ ++ ++VOID ++Beamforming_TimerCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PVOID pDM_VOID ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ IN PVOID pContext ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = (PADAPTER)pContext; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++#endif ++ BOOLEAN ret = FALSE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pEntry->bBeamformingInProgress) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("bBeamformingInProgress, reset it\n")); ++ phydm_Beamforming_End_SW(pDM_Odm, 0); ++ } ++ ++ ret = phydm_Beamforming_SelectBeamEntry(pDM_Odm, pBeamInfo); ++#if (SUPPORT_MU_BF == 1) ++ if (ret && pBeamInfo->beamformee_mu_cnt > 1) ++ ret = 1; ++ else ++ ret = 0; ++#endif ++ if (ret) ++ ret = BeamformingStart_SW(pDM_Odm, pSoundInfo->SoundIdx, pSoundInfo->SoundMode, pSoundInfo->SoundBW); ++ else ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, Error value return from BeamformingStart_V2\n", __func__)); ++ ++ if ((pBeamInfo->beamformee_su_cnt != 0) || (pBeamInfo->beamformee_mu_cnt > 1)) { ++ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod); ++ else { ++ u4Byte val = (pSoundInfo->SoundPeriod << 16) | HAL_TIMER_TXBF; ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_RESTART, (pu1Byte)(&val)); ++ } ++ } ++} ++ ++ ++VOID ++Beamforming_SWTimerCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PRT_TIMER pTimer ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ void *FunctionContext ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ Beamforming_TimerCallback(pDM_Odm); ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)FunctionContext; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (Adapter->net_closed == TRUE) ++ return; ++ rtw_run_in_thread_cmd(Adapter, Beamforming_TimerCallback, Adapter); ++#endif ++ ++} ++ ++ ++VOID ++phydm_Beamforming_Init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PHAL_TXBF_INFO pTxbfInfo = &pBeamInfo->TxbfInfo; ++ PRT_BEAMFORMING_OID_INFO pBeamOidInfo = &(pBeamInfo->BeamformingOidInfo); ++ ++ pBeamOidInfo->SoundOidMode = SOUNDING_STOP_OID_TIMER; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Mode (%d)\n", __func__, pBeamOidInfo->SoundOidMode)); ++ ++ pBeamInfo->beamformee_su_cnt = 0; ++ pBeamInfo->beamformer_su_cnt = 0; ++ pBeamInfo->beamformee_mu_cnt = 0; ++ pBeamInfo->beamformer_mu_cnt = 0; ++ pBeamInfo->beamformee_mu_reg_maping = 0; ++ pBeamInfo->mu_ap_index = 0; ++ pBeamInfo->is_mu_sounding = FALSE; ++ pBeamInfo->FirstMUBFeeIndex = 0xFF; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pBeamInfo->SourceAdapter = pDM_Odm->Adapter; ++#endif ++ halComTxbf_beamformInit(pDM_Odm); ++} ++ ++ ++VOID ++Beamforming_Enter( ++ IN PVOID pDM_VOID, ++ IN u2Byte staIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte BFerBFeeIdx = 0xff; ++ ++ if (Beamforming_InitEntry(pDM_Odm, staIdx, &BFerBFeeIdx)) ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_ENTER, (pu1Byte)&BFerBFeeIdx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End!\n", __func__)); ++} ++ ++ ++VOID ++Beamforming_Leave( ++ IN PVOID pDM_VOID, ++ pu1Byte RA ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (RA == NULL) ++ Beamforming_Reset(pDM_Odm); ++ else ++ Beamforming_DeInitEntry(pDM_Odm, RA); ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End!!\n", __func__)); ++} ++ ++#if 0 ++//Nobody calls this function ++VOID ++phydm_Beamforming_SetTxBFen( ++ IN PVOID pDM_VOID, ++ u1Byte MacId, ++ BOOLEAN bTxBF ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ pEntry = phydm_Beamforming_GetEntryByMacId(pDM_Odm, MacId, &Idx); ++ ++ if(pEntry == NULL) ++ return; ++ else ++ pEntry->bTxBF = bTxBF; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s MacId %d TxBF %d\n", __func__, pEntry->MacId, pEntry->bTxBF)); ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++} ++#endif ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetBeamCap( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++ ) ++{ ++ u1Byte i; ++ BOOLEAN bSelfBeamformer = FALSE; ++ BOOLEAN bSelfBeamformee = FALSE; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ BeamformeeEntry = pBeamInfo->BeamformeeEntry[i]; ++ ++ if (BeamformeeEntry.bUsed) { ++ bSelfBeamformer = TRUE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFee entry %d bUsed=TRUE\n", __func__, i)); ++ break; ++ } ++ } ++ ++ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { ++ BeamformerEntry = pBeamInfo->BeamformerEntry[i]; ++ ++ if (BeamformerEntry.bUsed) { ++ bSelfBeamformee = TRUE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: BFer entry %d bUsed=TRUE\n", __func__, i)); ++ break; ++ } ++ } ++ ++ if (bSelfBeamformer) ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP); ++ if (bSelfBeamformee) ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMEE_CAP); ++ ++ return BeamformCap; ++} ++ ++ ++BOOLEAN ++BeamformingControl_V1( ++ IN PVOID pDM_VOID, ++ pu1Byte RA, ++ u1Byte AID, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ BOOLEAN ret = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("AID (%d), Mode (%d), BW (%d)\n", AID, Mode, BW)); ++ ++ switch (Mode) { ++ case 0: ++ ret = BeamformingStart_V1(pDM_Odm, RA, 0, BW, Rate); ++ break; ++ case 1: ++ ret = BeamformingStart_V1(pDM_Odm, RA, 1, BW, Rate); ++ break; ++ case 2: ++ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); ++ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA, AID, BW, NORMAL_QUEUE); ++ break; ++ case 3: ++ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); ++ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA, BW, NORMAL_QUEUE); ++ break; ++ } ++ return ret; ++} ++ ++/*Only OID uses this function*/ ++BOOLEAN ++phydm_BeamformingControl_V2( ++ IN PVOID pDM_VOID, ++ u1Byte Idx, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u2Byte Period ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMING_OID_INFO pBeamOidInfo = &(pBeamInfo->BeamformingOidInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Idx (%d), Mode (%d), BW (%d), Period (%d)\n", Idx, Mode, BW, Period)); ++ ++ pBeamOidInfo->SoundOidIdx = Idx; ++ pBeamOidInfo->SoundOidMode = (SOUNDING_MODE) Mode; ++ pBeamOidInfo->SoundOidBW = BW; ++ pBeamOidInfo->SoundOidPeriod = Period; ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ return TRUE; ++} ++ ++ ++VOID ++phydm_Beamforming_Watchdog( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("%s Start!\n", __func__)); ++ ++ if (pBeamInfo->beamformee_su_cnt == 0) ++ return; ++ ++ Beamforming_DymPeriod(pDM_Odm,0); ++ phydm_Beamforming_DymNDPARate(pDM_Odm); ++ ++} ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_beamforming.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_beamforming.h new file mode 100644 -index 000000000..c01f0819e +index 0000000..1d4bf83 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_beamforming.h @@ -0,0 +1,365 @@ -+#ifndef __INC_BEAMFORMING_H -+#define __INC_BEAMFORMING_H -+ -+#ifndef BEAMFORMING_SUPPORT -+#define BEAMFORMING_SUPPORT 0 -+#endif -+ -+/*Beamforming Related*/ -+#include "txbf/halcomtxbf.h" -+#include "txbf/haltxbfjaguar.h" -+#include "txbf/haltxbf8192e.h" -+#include "txbf/haltxbf8814a.h" -+#include "txbf/haltxbf8821b.h" -+#include "txbf/haltxbf8822b.h" -+#include "txbf/haltxbfinterface.h" -+ -+#if (BEAMFORMING_SUPPORT == 1) -+ -+#define MAX_BEAMFORMEE_SU 2 -+#define MAX_BEAMFORMER_SU 2 -+#if (RTL8822B_SUPPORT == 1) -+#define MAX_BEAMFORMEE_MU 6 -+#define MAX_BEAMFORMER_MU 1 -+#else -+#define MAX_BEAMFORMEE_MU 0 -+#define MAX_BEAMFORMER_MU 0 -+#endif -+ -+#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU) -+#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU) -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+/*for different naming between WIN and CE*/ -+#define BEACON_QUEUE BCN_QUEUE_INX -+#define NORMAL_QUEUE MGT_QUEUE_INX -+#define RT_DISABLE_FUNC RTW_DISABLE_FUNC -+#define RT_ENABLE_FUNC RTW_ENABLE_FUNC -+#endif -+ -+typedef enum _BEAMFORMING_ENTRY_STATE { -+ BEAMFORMING_ENTRY_STATE_UNINITIALIZE, -+ BEAMFORMING_ENTRY_STATE_INITIALIZEING, -+ BEAMFORMING_ENTRY_STATE_INITIALIZED, -+ BEAMFORMING_ENTRY_STATE_PROGRESSING, -+ BEAMFORMING_ENTRY_STATE_PROGRESSED -+} BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; -+ -+ -+typedef enum _BEAMFORMING_NOTIFY_STATE { -+ BEAMFORMING_NOTIFY_NONE, -+ BEAMFORMING_NOTIFY_ADD, -+ BEAMFORMING_NOTIFY_DELETE, -+ BEAMFORMEE_NOTIFY_ADD_SU, -+ BEAMFORMEE_NOTIFY_DELETE_SU, -+ BEAMFORMEE_NOTIFY_ADD_MU, -+ BEAMFORMEE_NOTIFY_DELETE_MU, -+ BEAMFORMING_NOTIFY_RESET -+} BEAMFORMING_NOTIFY_STATE, *PBEAMFORMING_NOTIFY_STATE; -+ -+typedef enum _BEAMFORMING_CAP { -+ BEAMFORMING_CAP_NONE = 0x0, -+ BEAMFORMER_CAP_HT_EXPLICIT = BIT1, -+ BEAMFORMEE_CAP_HT_EXPLICIT = BIT2, -+ BEAMFORMER_CAP_VHT_SU = BIT5, /* Self has er Cap, because Reg er & peer ee */ -+ BEAMFORMEE_CAP_VHT_SU = BIT6, /* Self has ee Cap, because Reg ee & peer er */ -+ BEAMFORMER_CAP_VHT_MU = BIT7, /* Self has er Cap, because Reg er & peer ee */ -+ BEAMFORMEE_CAP_VHT_MU = BIT8, /* Self has ee Cap, because Reg ee & peer er */ -+ BEAMFORMER_CAP = BIT9, -+ BEAMFORMEE_CAP = BIT10, -+}BEAMFORMING_CAP, *PBEAMFORMING_CAP; -+ -+ -+typedef enum _SOUNDING_MODE { -+ SOUNDING_SW_VHT_TIMER = 0x0, -+ SOUNDING_SW_HT_TIMER = 0x1, -+ SOUNDING_STOP_All_TIMER = 0x2, -+ SOUNDING_HW_VHT_TIMER = 0x3, -+ SOUNDING_HW_HT_TIMER = 0x4, -+ SOUNDING_STOP_OID_TIMER = 0x5, -+ SOUNDING_AUTO_VHT_TIMER = 0x6, -+ SOUNDING_AUTO_HT_TIMER = 0x7, -+ SOUNDING_FW_VHT_TIMER = 0x8, -+ SOUNDING_FW_HT_TIMER = 0x9, -+}SOUNDING_MODE, *PSOUNDING_MODE; -+ -+typedef struct _RT_BEAMFORM_STAINFO { -+ pu1Byte RA; -+ u2Byte AID; -+ u2Byte MacID; -+ u1Byte MyMacAddr[6]; -+ WIRELESS_MODE WirelessMode; -+ CHANNEL_WIDTH BW; -+ BEAMFORMING_CAP BeamformCap; -+ u1Byte HtBeamformCap; -+ u2Byte VhtBeamformCap; -+ u1Byte CurBeamform; -+ u2Byte CurBeamformVHT; -+} RT_BEAMFORM_STAINFO, *PRT_BEAMFORM_STAINFO; -+ -+ -+typedef struct _RT_BEAMFORMEE_ENTRY { -+ BOOLEAN bUsed; -+ BOOLEAN bTxBF; -+ BOOLEAN bSound; -+ u2Byte AID; /*Used to construct AID field of NDPA packet.*/ -+ u2Byte MacId; /*Used to Set Reg42C in IBSS mode. */ -+ u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ -+ u2Byte G_ID; /*Used to fill Tx DESC*/ -+ u1Byte MyMacAddr[6]; -+ u1Byte MacAddr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/ -+ CHANNEL_WIDTH SoundBW; /*Sounding BandWidth*/ -+ u2Byte SoundPeriod; -+ BEAMFORMING_CAP BeamformEntryCap; -+ BEAMFORMING_ENTRY_STATE BeamformEntryState; -+ BOOLEAN bBeamformingInProgress; -+ /*u1Byte LogSeq; // Move to _RT_BEAMFORMER_ENTRY*/ -+ /*u2Byte LogRetryCnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/ -+ /*u2Byte LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/ -+ u2Byte LogStatusFailCnt:5; // 0~21 -+ u2Byte DefaultCSICnt:5; // 0~21 -+ u1Byte CSIMatrix[327]; -+ u2Byte CSIMatrixLen; -+ u1Byte NumofSoundingDim; -+ u1Byte CompSteeringNumofBFer; -+ u1Byte su_reg_index; -+ /*For MU-MIMO*/ -+ BOOLEAN is_mu_sta; -+ u1Byte mu_reg_index; -+ u1Byte gid_valid[8]; -+ u1Byte user_position[16]; -+} RT_BEAMFORMEE_ENTRY, *PRT_BEAMFORMEE_ENTRY; -+ -+typedef struct _RT_BEAMFORMER_ENTRY { -+ BOOLEAN bUsed; -+ /*P_AID of BFer entry is probably not used*/ -+ u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ -+ u2Byte G_ID; -+ u1Byte MyMacAddr[6]; -+ u1Byte MacAddr[6]; -+ BEAMFORMING_CAP BeamformEntryCap; -+ u1Byte NumofSoundingDim; -+ u1Byte ClockResetTimes; /*Modified by Jeffery @2015-04-10*/ -+ u1Byte PreLogSeq; /*Modified by Jeffery @2015-03-30*/ -+ u1Byte LogSeq; /*Modified by Jeffery @2014-10-29*/ -+ u2Byte LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/ -+ u2Byte LogSuccess:2; /*Modified by Jeffery @2014-10-29*/ -+ u1Byte su_reg_index; -+ /*For MU-MIMO*/ -+ BOOLEAN is_mu_ap; -+ u1Byte gid_valid[8]; -+ u1Byte user_position[16]; -+ u2Byte AID; -+} RT_BEAMFORMER_ENTRY, *PRT_BEAMFORMER_ENTRY; -+ -+typedef struct _RT_SOUNDING_INFO { -+ u1Byte SoundIdx; -+ CHANNEL_WIDTH SoundBW; -+ SOUNDING_MODE SoundMode; -+ u2Byte SoundPeriod; -+} RT_SOUNDING_INFO, *PRT_SOUNDING_INFO; -+ -+ -+ -+typedef struct _RT_BEAMFORMING_OID_INFO { -+ u1Byte SoundOidIdx; -+ CHANNEL_WIDTH SoundOidBW; -+ SOUNDING_MODE SoundOidMode; -+ u2Byte SoundOidPeriod; -+} RT_BEAMFORMING_OID_INFO, *PRT_BEAMFORMING_OID_INFO; -+ -+ -+typedef struct _RT_BEAMFORMING_INFO { -+ BEAMFORMING_CAP BeamformCap; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry[BEAMFORMEE_ENTRY_NUM]; -+ RT_BEAMFORMER_ENTRY BeamformerEntry[BEAMFORMER_ENTRY_NUM]; -+ RT_BEAMFORM_STAINFO BeamformSTAinfo; -+ u1Byte BeamformeeCurIdx; -+ RT_TIMER BeamformingTimer; -+ RT_TIMER mu_timer; -+ RT_SOUNDING_INFO SoundingInfo; -+ RT_BEAMFORMING_OID_INFO BeamformingOidInfo; -+ HAL_TXBF_INFO TxbfInfo; -+ u1Byte SoundingSequence; -+ u1Byte beamformee_su_cnt; -+ u1Byte beamformer_su_cnt; -+ u4Byte beamformee_su_reg_maping; -+ u4Byte beamformer_su_reg_maping; -+ /*For MU-MINO*/ -+ u1Byte beamformee_mu_cnt; -+ u1Byte beamformer_mu_cnt; -+ u4Byte beamformee_mu_reg_maping; -+ u1Byte mu_ap_index; -+ BOOLEAN is_mu_sounding; -+ u1Byte FirstMUBFeeIndex; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER SourceAdapter; -+#endif -+ /* Control register */ -+ u4Byte RegMUTxCtrl; /* For USB/SDIO interfaces aync I/O */ -+} RT_BEAMFORMING_INFO, *PRT_BEAMFORMING_INFO; -+ -+ -+typedef struct _RT_NDPA_STA_INFO { -+ u2Byte AID:12; -+ u2Byte FeedbackType:1; -+ u2Byte NcIndex:3; -+} RT_NDPA_STA_INFO, *PRT_NDPA_STA_INFO; -+ -+ -+BEAMFORMING_CAP -+phydm_Beamforming_GetEntryBeamCapByMacId( -+ IN PVOID pDM_VOID, -+ IN u1Byte MacId -+ ); -+ -+PRT_BEAMFORMEE_ENTRY -+phydm_Beamforming_GetBFeeEntryByAddr( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ OUT pu1Byte Idx -+ ); -+ -+PRT_BEAMFORMER_ENTRY -+phydm_Beamforming_GetBFerEntryByAddr( -+ IN PVOID pDM_VOID, -+ IN pu1Byte TA, -+ OUT pu1Byte Idx -+ ); -+ -+u1Byte -+Beamforming_GetHTNDPTxRate( -+ IN PVOID pDM_VOID, -+ u1Byte CompSteeringNumofBFer -+); -+ -+u1Byte -+Beamforming_GetVHTNDPTxRate( -+ IN PVOID pDM_VOID, -+ u1Byte CompSteeringNumofBFer -+); -+ -+VOID -+phydm_Beamforming_Notify( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+VOID -+Beamforming_Enter( -+ IN PVOID pDM_VOID, -+ IN u2Byte staIdx -+ ); -+ -+VOID -+Beamforming_Leave( -+ IN PVOID pDM_VOID, -+ pu1Byte RA -+ ); -+ -+BOOLEAN -+BeamformingStart_FW( -+ IN PVOID pDM_VOID, -+ u1Byte Idx -+ ); -+ -+VOID -+Beamforming_CheckSoundingSuccess( -+ IN PVOID pDM_VOID, -+ BOOLEAN Status -+); -+ -+VOID -+phydm_Beamforming_End_SW( -+ IN PVOID pDM_VOID, -+ BOOLEAN Status -+ ); -+ -+VOID -+Beamforming_TimerCallback( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+phydm_Beamforming_Init( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+ -+BEAMFORMING_CAP -+phydm_Beamforming_GetBeamCap( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORMING_INFO pBeamInfo -+ ); -+ -+ -+BOOLEAN -+BeamformingControl_V1( -+ IN PVOID pDM_VOID, -+ pu1Byte RA, -+ u1Byte AID, -+ u1Byte Mode, -+ CHANNEL_WIDTH BW, -+ u1Byte Rate -+ ); -+ -+ -+BOOLEAN -+phydm_BeamformingControl_V2( -+ IN PVOID pDM_VOID, -+ u1Byte Idx, -+ u1Byte Mode, -+ CHANNEL_WIDTH BW, -+ u2Byte Period -+ ); -+ -+VOID -+phydm_Beamforming_Watchdog( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+Beamforming_SWTimerCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PRT_TIMER pTimer -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ void *FunctionContext -+#endif -+ ); -+ -+BOOLEAN -+Beamforming_SendHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW, -+ IN u1Byte QIdx -+ ); -+ -+ -+BOOLEAN -+Beamforming_SendVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW, -+ IN u1Byte QIdx -+ ); -+ -+#else -+#define Beamforming_GidPAid(Adapter, pTcb) -+#define Beamforming_Enter(pDM_Odm, staIdx) -+#define Beamforming_Leave(pDM_Odm, RA) -+#define Beamforming_End_FW(pDMOdm) -+#define BeamformingControl_V1(pDM_Odm, RA, AID, Mode, BW, Rate) TRUE -+#define BeamformingControl_V2(pDM_Odm, Idx, Mode, BW, Period) TRUE -+#define phydm_Beamforming_End_SW(pDM_Odm, _Status) -+#define Beamforming_TimerCallback(pDM_Odm) -+#define phydm_Beamforming_Init(pDM_Odm) -+#define phydm_BeamformingControl_V2(pDM_Odm, _Idx, _Mode, _BW, _Period) FALSE -+#define Beamforming_Watchdog(pDM_Odm) -+#define phydm_Beamforming_Watchdog(pDM_Odm) -+ -+ -+#endif -+#endif ++#ifndef __INC_BEAMFORMING_H ++#define __INC_BEAMFORMING_H ++ ++#ifndef BEAMFORMING_SUPPORT ++#define BEAMFORMING_SUPPORT 0 ++#endif ++ ++/*Beamforming Related*/ ++#include "txbf/halcomtxbf.h" ++#include "txbf/haltxbfjaguar.h" ++#include "txbf/haltxbf8192e.h" ++#include "txbf/haltxbf8814a.h" ++#include "txbf/haltxbf8821b.h" ++#include "txbf/haltxbf8822b.h" ++#include "txbf/haltxbfinterface.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ++#define MAX_BEAMFORMEE_SU 2 ++#define MAX_BEAMFORMER_SU 2 ++#if (RTL8822B_SUPPORT == 1) ++#define MAX_BEAMFORMEE_MU 6 ++#define MAX_BEAMFORMER_MU 1 ++#else ++#define MAX_BEAMFORMEE_MU 0 ++#define MAX_BEAMFORMER_MU 0 ++#endif ++ ++#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU) ++#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU) ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*for different naming between WIN and CE*/ ++#define BEACON_QUEUE BCN_QUEUE_INX ++#define NORMAL_QUEUE MGT_QUEUE_INX ++#define RT_DISABLE_FUNC RTW_DISABLE_FUNC ++#define RT_ENABLE_FUNC RTW_ENABLE_FUNC ++#endif ++ ++typedef enum _BEAMFORMING_ENTRY_STATE { ++ BEAMFORMING_ENTRY_STATE_UNINITIALIZE, ++ BEAMFORMING_ENTRY_STATE_INITIALIZEING, ++ BEAMFORMING_ENTRY_STATE_INITIALIZED, ++ BEAMFORMING_ENTRY_STATE_PROGRESSING, ++ BEAMFORMING_ENTRY_STATE_PROGRESSED ++} BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; ++ ++ ++typedef enum _BEAMFORMING_NOTIFY_STATE { ++ BEAMFORMING_NOTIFY_NONE, ++ BEAMFORMING_NOTIFY_ADD, ++ BEAMFORMING_NOTIFY_DELETE, ++ BEAMFORMEE_NOTIFY_ADD_SU, ++ BEAMFORMEE_NOTIFY_DELETE_SU, ++ BEAMFORMEE_NOTIFY_ADD_MU, ++ BEAMFORMEE_NOTIFY_DELETE_MU, ++ BEAMFORMING_NOTIFY_RESET ++} BEAMFORMING_NOTIFY_STATE, *PBEAMFORMING_NOTIFY_STATE; ++ ++typedef enum _BEAMFORMING_CAP { ++ BEAMFORMING_CAP_NONE = 0x0, ++ BEAMFORMER_CAP_HT_EXPLICIT = BIT1, ++ BEAMFORMEE_CAP_HT_EXPLICIT = BIT2, ++ BEAMFORMER_CAP_VHT_SU = BIT5, /* Self has er Cap, because Reg er & peer ee */ ++ BEAMFORMEE_CAP_VHT_SU = BIT6, /* Self has ee Cap, because Reg ee & peer er */ ++ BEAMFORMER_CAP_VHT_MU = BIT7, /* Self has er Cap, because Reg er & peer ee */ ++ BEAMFORMEE_CAP_VHT_MU = BIT8, /* Self has ee Cap, because Reg ee & peer er */ ++ BEAMFORMER_CAP = BIT9, ++ BEAMFORMEE_CAP = BIT10, ++}BEAMFORMING_CAP, *PBEAMFORMING_CAP; ++ ++ ++typedef enum _SOUNDING_MODE { ++ SOUNDING_SW_VHT_TIMER = 0x0, ++ SOUNDING_SW_HT_TIMER = 0x1, ++ SOUNDING_STOP_All_TIMER = 0x2, ++ SOUNDING_HW_VHT_TIMER = 0x3, ++ SOUNDING_HW_HT_TIMER = 0x4, ++ SOUNDING_STOP_OID_TIMER = 0x5, ++ SOUNDING_AUTO_VHT_TIMER = 0x6, ++ SOUNDING_AUTO_HT_TIMER = 0x7, ++ SOUNDING_FW_VHT_TIMER = 0x8, ++ SOUNDING_FW_HT_TIMER = 0x9, ++}SOUNDING_MODE, *PSOUNDING_MODE; ++ ++typedef struct _RT_BEAMFORM_STAINFO { ++ pu1Byte RA; ++ u2Byte AID; ++ u2Byte MacID; ++ u1Byte MyMacAddr[6]; ++ WIRELESS_MODE WirelessMode; ++ CHANNEL_WIDTH BW; ++ BEAMFORMING_CAP BeamformCap; ++ u1Byte HtBeamformCap; ++ u2Byte VhtBeamformCap; ++ u1Byte CurBeamform; ++ u2Byte CurBeamformVHT; ++} RT_BEAMFORM_STAINFO, *PRT_BEAMFORM_STAINFO; ++ ++ ++typedef struct _RT_BEAMFORMEE_ENTRY { ++ BOOLEAN bUsed; ++ BOOLEAN bTxBF; ++ BOOLEAN bSound; ++ u2Byte AID; /*Used to construct AID field of NDPA packet.*/ ++ u2Byte MacId; /*Used to Set Reg42C in IBSS mode. */ ++ u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ ++ u2Byte G_ID; /*Used to fill Tx DESC*/ ++ u1Byte MyMacAddr[6]; ++ u1Byte MacAddr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/ ++ CHANNEL_WIDTH SoundBW; /*Sounding BandWidth*/ ++ u2Byte SoundPeriod; ++ BEAMFORMING_CAP BeamformEntryCap; ++ BEAMFORMING_ENTRY_STATE BeamformEntryState; ++ BOOLEAN bBeamformingInProgress; ++ /*u1Byte LogSeq; // Move to _RT_BEAMFORMER_ENTRY*/ ++ /*u2Byte LogRetryCnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/ ++ /*u2Byte LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/ ++ u2Byte LogStatusFailCnt:5; // 0~21 ++ u2Byte DefaultCSICnt:5; // 0~21 ++ u1Byte CSIMatrix[327]; ++ u2Byte CSIMatrixLen; ++ u1Byte NumofSoundingDim; ++ u1Byte CompSteeringNumofBFer; ++ u1Byte su_reg_index; ++ /*For MU-MIMO*/ ++ BOOLEAN is_mu_sta; ++ u1Byte mu_reg_index; ++ u1Byte gid_valid[8]; ++ u1Byte user_position[16]; ++} RT_BEAMFORMEE_ENTRY, *PRT_BEAMFORMEE_ENTRY; ++ ++typedef struct _RT_BEAMFORMER_ENTRY { ++ BOOLEAN bUsed; ++ /*P_AID of BFer entry is probably not used*/ ++ u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ ++ u2Byte G_ID; ++ u1Byte MyMacAddr[6]; ++ u1Byte MacAddr[6]; ++ BEAMFORMING_CAP BeamformEntryCap; ++ u1Byte NumofSoundingDim; ++ u1Byte ClockResetTimes; /*Modified by Jeffery @2015-04-10*/ ++ u1Byte PreLogSeq; /*Modified by Jeffery @2015-03-30*/ ++ u1Byte LogSeq; /*Modified by Jeffery @2014-10-29*/ ++ u2Byte LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/ ++ u2Byte LogSuccess:2; /*Modified by Jeffery @2014-10-29*/ ++ u1Byte su_reg_index; ++ /*For MU-MIMO*/ ++ BOOLEAN is_mu_ap; ++ u1Byte gid_valid[8]; ++ u1Byte user_position[16]; ++ u2Byte AID; ++} RT_BEAMFORMER_ENTRY, *PRT_BEAMFORMER_ENTRY; ++ ++typedef struct _RT_SOUNDING_INFO { ++ u1Byte SoundIdx; ++ CHANNEL_WIDTH SoundBW; ++ SOUNDING_MODE SoundMode; ++ u2Byte SoundPeriod; ++} RT_SOUNDING_INFO, *PRT_SOUNDING_INFO; ++ ++ ++ ++typedef struct _RT_BEAMFORMING_OID_INFO { ++ u1Byte SoundOidIdx; ++ CHANNEL_WIDTH SoundOidBW; ++ SOUNDING_MODE SoundOidMode; ++ u2Byte SoundOidPeriod; ++} RT_BEAMFORMING_OID_INFO, *PRT_BEAMFORMING_OID_INFO; ++ ++ ++typedef struct _RT_BEAMFORMING_INFO { ++ BEAMFORMING_CAP BeamformCap; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry[BEAMFORMEE_ENTRY_NUM]; ++ RT_BEAMFORMER_ENTRY BeamformerEntry[BEAMFORMER_ENTRY_NUM]; ++ RT_BEAMFORM_STAINFO BeamformSTAinfo; ++ u1Byte BeamformeeCurIdx; ++ RT_TIMER BeamformingTimer; ++ RT_TIMER mu_timer; ++ RT_SOUNDING_INFO SoundingInfo; ++ RT_BEAMFORMING_OID_INFO BeamformingOidInfo; ++ HAL_TXBF_INFO TxbfInfo; ++ u1Byte SoundingSequence; ++ u1Byte beamformee_su_cnt; ++ u1Byte beamformer_su_cnt; ++ u4Byte beamformee_su_reg_maping; ++ u4Byte beamformer_su_reg_maping; ++ /*For MU-MINO*/ ++ u1Byte beamformee_mu_cnt; ++ u1Byte beamformer_mu_cnt; ++ u4Byte beamformee_mu_reg_maping; ++ u1Byte mu_ap_index; ++ BOOLEAN is_mu_sounding; ++ u1Byte FirstMUBFeeIndex; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER SourceAdapter; ++#endif ++ /* Control register */ ++ u4Byte RegMUTxCtrl; /* For USB/SDIO interfaces aync I/O */ ++} RT_BEAMFORMING_INFO, *PRT_BEAMFORMING_INFO; ++ ++ ++typedef struct _RT_NDPA_STA_INFO { ++ u2Byte AID:12; ++ u2Byte FeedbackType:1; ++ u2Byte NcIndex:3; ++} RT_NDPA_STA_INFO, *PRT_NDPA_STA_INFO; ++ ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetEntryBeamCapByMacId( ++ IN PVOID pDM_VOID, ++ IN u1Byte MacId ++ ); ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetBFeeEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ OUT pu1Byte Idx ++ ); ++ ++PRT_BEAMFORMER_ENTRY ++phydm_Beamforming_GetBFerEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte TA, ++ OUT pu1Byte Idx ++ ); ++ ++u1Byte ++Beamforming_GetHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++); ++ ++u1Byte ++Beamforming_GetVHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++); ++ ++VOID ++phydm_Beamforming_Notify( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++Beamforming_Enter( ++ IN PVOID pDM_VOID, ++ IN u2Byte staIdx ++ ); ++ ++VOID ++Beamforming_Leave( ++ IN PVOID pDM_VOID, ++ pu1Byte RA ++ ); ++ ++BOOLEAN ++BeamformingStart_FW( ++ IN PVOID pDM_VOID, ++ u1Byte Idx ++ ); ++ ++VOID ++Beamforming_CheckSoundingSuccess( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++); ++ ++VOID ++phydm_Beamforming_End_SW( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++ ); ++ ++VOID ++Beamforming_TimerCallback( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++phydm_Beamforming_Init( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetBeamCap( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++ ); ++ ++ ++BOOLEAN ++BeamformingControl_V1( ++ IN PVOID pDM_VOID, ++ pu1Byte RA, ++ u1Byte AID, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++ ); ++ ++ ++BOOLEAN ++phydm_BeamformingControl_V2( ++ IN PVOID pDM_VOID, ++ u1Byte Idx, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u2Byte Period ++ ); ++ ++VOID ++phydm_Beamforming_Watchdog( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Beamforming_SWTimerCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PRT_TIMER pTimer ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ void *FunctionContext ++#endif ++ ); ++ ++BOOLEAN ++Beamforming_SendHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ); ++ ++ ++BOOLEAN ++Beamforming_SendVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ); ++ ++#else ++#define Beamforming_GidPAid(Adapter, pTcb) ++#define Beamforming_Enter(pDM_Odm, staIdx) ++#define Beamforming_Leave(pDM_Odm, RA) ++#define Beamforming_End_FW(pDMOdm) ++#define BeamformingControl_V1(pDM_Odm, RA, AID, Mode, BW, Rate) TRUE ++#define BeamformingControl_V2(pDM_Odm, Idx, Mode, BW, Period) TRUE ++#define phydm_Beamforming_End_SW(pDM_Odm, _Status) ++#define Beamforming_TimerCallback(pDM_Odm) ++#define phydm_Beamforming_Init(pDM_Odm) ++#define phydm_BeamformingControl_V2(pDM_Odm, _Idx, _Mode, _BW, _Period) FALSE ++#define Beamforming_Watchdog(pDM_Odm) ++#define phydm_Beamforming_Watchdog(pDM_Odm) ++ ++ ++#endif ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_cfotracking.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_cfotracking.c new file mode 100644 -index 000000000..0aa78f17e +index 0000000..64e2965 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_cfotracking.c @@ -0,0 +1,347 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+VOID -+odm_SetCrystalCap( -+ IN PVOID pDM_VOID, -+ IN u1Byte CrystalCap -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); -+ BOOLEAN bEEPROMCheck; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ bEEPROMCheck = (pHalData->EEPROMVersion >= 0x01)?TRUE:FALSE; -+#else -+ bEEPROMCheck = TRUE; -+#endif -+ -+ if(pCfoTrack->CrystalCap == CrystalCap) -+ return; -+ -+ pCfoTrack->CrystalCap = CrystalCap; -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8188F)) { -+ /* write 0x24[22:17] = 0x24[16:11] = CrystalCap */ -+ CrystalCap = CrystalCap & 0x3F; -+ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap|(CrystalCap << 6))); -+ } else if (pDM_Odm->SupportICType & ODM_RTL8812) { -+ /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ -+ CrystalCap = CrystalCap & 0x3F; -+ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap|(CrystalCap << 6))); -+ } else if (((pDM_Odm->SupportICType & ODM_RTL8723A) && bEEPROMCheck) || -+ (pDM_Odm->SupportICType & (ODM_RTL8703B|ODM_RTL8723B|ODM_RTL8192E|ODM_RTL8821))) { -+ /* 0x2C[23:18] = 0x2C[17:12] = CrystalCap */ -+ CrystalCap = CrystalCap & 0x3F; -+ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap|(CrystalCap << 6))); -+ } else if (pDM_Odm->SupportICType & ODM_RTL8821B) { -+ /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ -+ CrystalCap = CrystalCap & 0x3F; -+ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7E000000, CrystalCap); -+ ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7E, CrystalCap); -+ } else if (pDM_Odm->SupportICType & ODM_RTL8814A) { -+ /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap */ -+ CrystalCap = CrystalCap & 0x3F; -+ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap|(CrystalCap << 6))); -+ } else if (pDM_Odm->SupportICType & ODM_RTL8822B) { -+ /* write 0x24[30:25] = 0x28[6:1] = CrystalCap */ -+ CrystalCap = CrystalCap & 0x3F; -+ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7e000000, CrystalCap); -+ ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7e, CrystalCap); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n")); -+ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap|(CrystalCap << 6))); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap)); -+#endif -+} -+ -+u1Byte -+odm_GetDefaultCrytaltalCap( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte CrystalCap = 0x20; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ CrystalCap = pHalData->CrystalCap; -+#else -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ -+ if(priv->pmib->dot11RFEntry.xcap > 0) -+ CrystalCap = priv->pmib->dot11RFEntry.xcap; -+#endif -+ -+ CrystalCap = CrystalCap & 0x3f; -+ -+ return CrystalCap; -+} -+ -+VOID -+odm_SetATCStatus( -+ IN PVOID pDM_VOID, -+ IN BOOLEAN ATCStatus -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); -+ -+ if(pCfoTrack->bATCStatus == ATCStatus) -+ return; -+ -+ ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus); -+ pCfoTrack->bATCStatus = ATCStatus; -+} -+ -+BOOLEAN -+odm_GetATCStatus( -+ IN PVOID pDM_VOID -+) -+{ -+ BOOLEAN ATCStatus; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm)); -+ return ATCStatus; -+} -+ -+VOID -+ODM_CfoTrackingReset( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); -+ -+ pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm); -+ pCfoTrack->bAdjust = TRUE; -+ -+ if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap) -+ { -+ odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap - 1); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, -+ ("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap)); -+ } else if (pCfoTrack->CrystalCap < pCfoTrack->DefXCap) -+ { -+ odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap + 1); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, -+ ("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap)); -+ } -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ odm_SetATCStatus(pDM_Odm, TRUE); -+ #endif -+} -+ -+VOID -+ODM_CfoTrackingInit( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); -+ -+ pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm); -+ pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm); -+ pCfoTrack->bAdjust = TRUE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========> \n")); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x \n",pCfoTrack->bATCStatus, pCfoTrack->DefXCap)); -+} -+ -+VOID -+ODM_CfoTracking( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); -+ int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0; -+ int CFO_ave_diff; -+ int CrystalCap = (int)pCfoTrack->CrystalCap; -+ u1Byte Adjust_Xtal = 1; -+ -+ //4 Support ability -+ if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n")); -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n")); -+ -+ if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly) -+ { -+ //4 No link or more than one entry -+ ODM_CfoTrackingReset(pDM_Odm); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n", -+ pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly)); -+ } -+ else -+ { -+ //3 1. CFO Tracking -+ //4 1.1 No new packet -+ if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n")); -+ return; -+ } -+ pCfoTrack->packetCount_pre = pCfoTrack->packetCount; -+ -+ //4 1.2 Calculate CFO -+ CFO_kHz_A = (int)((pCfoTrack->CFO_tail[0] * 3125) / 10)>>7; /* CFO_tail[1:0] is S(8,7), (num_subcarrier>>7) x 312.5K = CFO value(K Hz) */ -+ CFO_kHz_B = (int)((pCfoTrack->CFO_tail[1] * 3125) / 10)>>7; -+ -+ if(pDM_Odm->RFType < ODM_2T2R) -+ CFO_ave = CFO_kHz_A; -+ else -+ CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n", -+ CFO_kHz_A, CFO_kHz_B, CFO_ave)); -+ -+ //4 1.3 Avoid abnormal large CFO -+ CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre); -+ if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n")); -+ pCfoTrack->largeCFOHit = 1; -+ return; -+ } -+ else -+ pCfoTrack->largeCFOHit = 0; -+ pCfoTrack->CFO_ave_pre = CFO_ave; -+ -+ //4 1.4 Dynamic Xtal threshold -+ if(pCfoTrack->bAdjust == FALSE) -+ { -+ if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH)) -+ pCfoTrack->bAdjust = TRUE; -+ } -+ else -+ { -+ if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW)) -+ pCfoTrack->bAdjust = FALSE; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ //4 1.5 BT case: Disable CFO tracking -+ if(pDM_Odm->bBtEnabled) -+ { -+ pCfoTrack->bAdjust = FALSE; -+ odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n")); -+ } -+/* -+ //4 1.6 Big jump -+ if(pCfoTrack->bAdjust) -+ { -+ if(CFO_ave > CFO_TH_XTAL_LOW) -+ Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2); -+ else if(CFO_ave < (-CFO_TH_XTAL_LOW)) -+ Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal)); -+ } -+*/ -+#endif -+ -+ //4 1.7 Adjust Crystal Cap. -+ if(pCfoTrack->bAdjust) -+ { -+ if(CFO_ave > CFO_TH_XTAL_LOW) -+ CrystalCap = CrystalCap + Adjust_Xtal; -+ else if(CFO_ave < (-CFO_TH_XTAL_LOW)) -+ CrystalCap = CrystalCap - Adjust_Xtal; -+ -+ if(CrystalCap > 0x3f) -+ CrystalCap = 0x3f; -+ else if (CrystalCap < 0) -+ CrystalCap = 0; -+ -+ odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap); -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n", -+ pCfoTrack->CrystalCap, pCfoTrack->DefXCap)); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ return; -+ -+ //3 2. Dynamic ATC switch -+ if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC) -+ { -+ odm_SetATCStatus(pDM_Odm, FALSE); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n")); -+ } -+ else -+ { -+ odm_SetATCStatus(pDM_Odm, TRUE); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n")); -+ } -+#endif -+ } -+} -+ -+VOID -+ODM_ParsingCFO( -+ IN PVOID pDM_VOID, -+ IN PVOID pPktinfo_VOID, -+ IN s1Byte* pcfotail -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID; -+ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); -+ u1Byte i; -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) -+ return; -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(pPktinfo->bPacketMatchBSSID) -+#else -+ if(pPktinfo->StationID != 0) -+#endif -+ { -+ //3 Update CFO report for path-A & path-B -+ // Only paht-A and path-B have CFO tail and short CFO -+ for(i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++) -+ { -+ pCfoTrack->CFO_tail[i] = (int)pcfotail[i]; -+ } -+ -+ //3 Update packet counter -+ if(pCfoTrack->packetCount == 0xffffffff) -+ pCfoTrack->packetCount = 0; -+ else -+ pCfoTrack->packetCount++; -+ } -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++odm_SetCrystalCap( ++ IN PVOID pDM_VOID, ++ IN u1Byte CrystalCap ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ BOOLEAN bEEPROMCheck; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ bEEPROMCheck = (pHalData->EEPROMVersion >= 0x01)?TRUE:FALSE; ++#else ++ bEEPROMCheck = TRUE; ++#endif ++ ++ if(pCfoTrack->CrystalCap == CrystalCap) ++ return; ++ ++ pCfoTrack->CrystalCap = CrystalCap; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8188F)) { ++ /* write 0x24[22:17] = 0x24[16:11] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap|(CrystalCap << 6))); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8812) { ++ /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap|(CrystalCap << 6))); ++ } else if (((pDM_Odm->SupportICType & ODM_RTL8723A) && bEEPROMCheck) || ++ (pDM_Odm->SupportICType & (ODM_RTL8703B|ODM_RTL8723B|ODM_RTL8192E|ODM_RTL8821))) { ++ /* 0x2C[23:18] = 0x2C[17:12] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap|(CrystalCap << 6))); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8821B) { ++ /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7E000000, CrystalCap); ++ ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7E, CrystalCap); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8814A) { ++ /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap|(CrystalCap << 6))); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ /* write 0x24[30:25] = 0x28[6:1] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7e000000, CrystalCap); ++ ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7e, CrystalCap); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n")); ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap|(CrystalCap << 6))); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap)); ++#endif ++} ++ ++u1Byte ++odm_GetDefaultCrytaltalCap( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte CrystalCap = 0x20; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ CrystalCap = pHalData->CrystalCap; ++#else ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ if(priv->pmib->dot11RFEntry.xcap > 0) ++ CrystalCap = priv->pmib->dot11RFEntry.xcap; ++#endif ++ ++ CrystalCap = CrystalCap & 0x3f; ++ ++ return CrystalCap; ++} ++ ++VOID ++odm_SetATCStatus( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN ATCStatus ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ ++ if(pCfoTrack->bATCStatus == ATCStatus) ++ return; ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus); ++ pCfoTrack->bATCStatus = ATCStatus; ++} ++ ++BOOLEAN ++odm_GetATCStatus( ++ IN PVOID pDM_VOID ++) ++{ ++ BOOLEAN ATCStatus; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm)); ++ return ATCStatus; ++} ++ ++VOID ++ODM_CfoTrackingReset( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ ++ pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm); ++ pCfoTrack->bAdjust = TRUE; ++ ++ if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap) ++ { ++ odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap - 1); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ++ ("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap)); ++ } else if (pCfoTrack->CrystalCap < pCfoTrack->DefXCap) ++ { ++ odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap + 1); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ++ ("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap)); ++ } ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ odm_SetATCStatus(pDM_Odm, TRUE); ++ #endif ++} ++ ++VOID ++ODM_CfoTrackingInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ ++ pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm); ++ pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm); ++ pCfoTrack->bAdjust = TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========> \n")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x \n",pCfoTrack->bATCStatus, pCfoTrack->DefXCap)); ++} ++ ++VOID ++ODM_CfoTracking( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0; ++ int CFO_ave_diff; ++ int CrystalCap = (int)pCfoTrack->CrystalCap; ++ u1Byte Adjust_Xtal = 1; ++ ++ //4 Support ability ++ if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n")); ++ ++ if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly) ++ { ++ //4 No link or more than one entry ++ ODM_CfoTrackingReset(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n", ++ pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly)); ++ } ++ else ++ { ++ //3 1. CFO Tracking ++ //4 1.1 No new packet ++ if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n")); ++ return; ++ } ++ pCfoTrack->packetCount_pre = pCfoTrack->packetCount; ++ ++ //4 1.2 Calculate CFO ++ CFO_kHz_A = (int)((pCfoTrack->CFO_tail[0] * 3125) / 10)>>7; /* CFO_tail[1:0] is S(8,7), (num_subcarrier>>7) x 312.5K = CFO value(K Hz) */ ++ CFO_kHz_B = (int)((pCfoTrack->CFO_tail[1] * 3125) / 10)>>7; ++ ++ if(pDM_Odm->RFType < ODM_2T2R) ++ CFO_ave = CFO_kHz_A; ++ else ++ CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n", ++ CFO_kHz_A, CFO_kHz_B, CFO_ave)); ++ ++ //4 1.3 Avoid abnormal large CFO ++ CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre); ++ if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n")); ++ pCfoTrack->largeCFOHit = 1; ++ return; ++ } ++ else ++ pCfoTrack->largeCFOHit = 0; ++ pCfoTrack->CFO_ave_pre = CFO_ave; ++ ++ //4 1.4 Dynamic Xtal threshold ++ if(pCfoTrack->bAdjust == FALSE) ++ { ++ if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH)) ++ pCfoTrack->bAdjust = TRUE; ++ } ++ else ++ { ++ if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW)) ++ pCfoTrack->bAdjust = FALSE; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ //4 1.5 BT case: Disable CFO tracking ++ if(pDM_Odm->bBtEnabled) ++ { ++ pCfoTrack->bAdjust = FALSE; ++ odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n")); ++ } ++/* ++ //4 1.6 Big jump ++ if(pCfoTrack->bAdjust) ++ { ++ if(CFO_ave > CFO_TH_XTAL_LOW) ++ Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2); ++ else if(CFO_ave < (-CFO_TH_XTAL_LOW)) ++ Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal)); ++ } ++*/ ++#endif ++ ++ //4 1.7 Adjust Crystal Cap. ++ if(pCfoTrack->bAdjust) ++ { ++ if(CFO_ave > CFO_TH_XTAL_LOW) ++ CrystalCap = CrystalCap + Adjust_Xtal; ++ else if(CFO_ave < (-CFO_TH_XTAL_LOW)) ++ CrystalCap = CrystalCap - Adjust_Xtal; ++ ++ if(CrystalCap > 0x3f) ++ CrystalCap = 0x3f; ++ else if (CrystalCap < 0) ++ CrystalCap = 0; ++ ++ odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap); ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n", ++ pCfoTrack->CrystalCap, pCfoTrack->DefXCap)); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ return; ++ ++ //3 2. Dynamic ATC switch ++ if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC) ++ { ++ odm_SetATCStatus(pDM_Odm, FALSE); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n")); ++ } ++ else ++ { ++ odm_SetATCStatus(pDM_Odm, TRUE); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n")); ++ } ++#endif ++ } ++} ++ ++VOID ++ODM_ParsingCFO( ++ IN PVOID pDM_VOID, ++ IN PVOID pPktinfo_VOID, ++ IN s1Byte* pcfotail ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ u1Byte i; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) ++ return; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pPktinfo->bPacketMatchBSSID) ++#else ++ if(pPktinfo->StationID != 0) ++#endif ++ { ++ //3 Update CFO report for path-A & path-B ++ // Only paht-A and path-B have CFO tail and short CFO ++ for(i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++) ++ { ++ pCfoTrack->CFO_tail[i] = (int)pcfotail[i]; ++ } ++ ++ //3 Update packet counter ++ if(pCfoTrack->packetCount == 0xffffffff) ++ pCfoTrack->packetCount = 0; ++ else ++ pCfoTrack->packetCount++; ++ } ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_cfotracking.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_cfotracking.h new file mode 100644 -index 000000000..7eca3f6e9 +index 0000000..b1cc487 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_cfotracking.h @@ -0,0 +1,68 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMCFOTRACK_H__ -+#define __PHYDMCFOTRACK_H__ -+ -+#define CFO_TRACKING_VERSION "1.2" /*2015.06.17*/ -+ -+#define CFO_TH_XTAL_HIGH 20 // kHz -+#define CFO_TH_XTAL_LOW 10 // kHz -+#define CFO_TH_ATC 80 // kHz -+ -+typedef struct _CFO_TRACKING_ -+{ -+ BOOLEAN bATCStatus; -+ BOOLEAN largeCFOHit; -+ BOOLEAN bAdjust; -+ u1Byte CrystalCap; -+ u1Byte DefXCap; -+ int CFO_tail[2]; -+ int CFO_ave_pre; -+ u4Byte packetCount; -+ u4Byte packetCount_pre; -+ -+ BOOLEAN bForceXtalCap; -+ BOOLEAN bReset; -+}CFO_TRACKING, *PCFO_TRACKING; -+ -+VOID -+ODM_CfoTrackingReset( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+ODM_CfoTrackingInit( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+ODM_CfoTracking( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+ODM_ParsingCFO( -+ IN PVOID pDM_VOID, -+ IN PVOID pPktinfo_VOID, -+ IN s1Byte* pcfotail -+); -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMCFOTRACK_H__ ++#define __PHYDMCFOTRACK_H__ ++ ++#define CFO_TRACKING_VERSION "1.2" /*2015.06.17*/ ++ ++#define CFO_TH_XTAL_HIGH 20 // kHz ++#define CFO_TH_XTAL_LOW 10 // kHz ++#define CFO_TH_ATC 80 // kHz ++ ++typedef struct _CFO_TRACKING_ ++{ ++ BOOLEAN bATCStatus; ++ BOOLEAN largeCFOHit; ++ BOOLEAN bAdjust; ++ u1Byte CrystalCap; ++ u1Byte DefXCap; ++ int CFO_tail[2]; ++ int CFO_ave_pre; ++ u4Byte packetCount; ++ u4Byte packetCount_pre; ++ ++ BOOLEAN bForceXtalCap; ++ BOOLEAN bReset; ++}CFO_TRACKING, *PCFO_TRACKING; ++ ++VOID ++ODM_CfoTrackingReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_CfoTrackingInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_CfoTracking( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_ParsingCFO( ++ IN PVOID pDM_VOID, ++ IN PVOID pPktinfo_VOID, ++ IN s1Byte* pcfotail ++); ++ +#endif \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_debug.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_debug.c new file mode 100644 -index 000000000..73efc277f +index 0000000..acbb01c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_debug.c @@ -0,0 +1,2005 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+ -+VOID -+PHYDM_InitDebugSetting( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ pDM_Odm->DebugLevel = ODM_DBG_TRACE; -+ -+ pDM_Odm->DebugComponents = -+ \ -+#if DBG -+//BB Functions -+// ODM_COMP_DIG | -+// ODM_COMP_RA_MASK | -+// ODM_COMP_DYNAMIC_TXPWR | -+// ODM_COMP_FA_CNT | -+// ODM_COMP_RSSI_MONITOR | -+// ODM_COMP_CCK_PD | -+/* ODM_COMP_ANT_DIV |*/ -+// ODM_COMP_PWR_SAVE | -+// ODM_COMP_PWR_TRAIN | -+// ODM_COMP_RATE_ADAPTIVE | -+// ODM_COMP_PATH_DIV | -+// ODM_COMP_DYNAMIC_PRICCA | -+// ODM_COMP_RXHP | -+// ODM_COMP_MP | -+// ODM_COMP_CFO_TRACKING | -+// ODM_COMP_ACS | -+// PHYDM_COMP_ADAPTIVITY | -+// PHYDM_COMP_RA_DBG | -+/* PHYDM_COMP_TXBF |*/ -+//MAC Functions -+// ODM_COMP_EDCA_TURBO | -+// ODM_COMP_EARLY_MODE | -+/* ODM_FW_DEBUG_TRACE |*/ -+//RF Functions -+// ODM_COMP_TX_PWR_TRACK | -+// ODM_COMP_RX_GAIN_TRACK | -+// ODM_COMP_CALIBRATION | -+//Common -+/* ODM_PHY_CONFIG |*/ -+// ODM_COMP_COMMON | -+// ODM_COMP_INIT | -+// ODM_COMP_PSD | -+/* ODM_COMP_NOISY_DETECT |*/ -+#endif -+ 0; -+ -+ pDM_Odm->fw_buff_is_enpty = TRUE; -+ pDM_Odm->pre_c2h_seq = 0; -+} -+ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+static u1Byte BbDbgBuf[BB_TMP_BUF_SIZE]; -+ -+VOID -+phydm_BB_RxHang_Info(IN PDM_ODM_T pDM_Odm) -+{ -+ u4Byte value32 = 0; -+ -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ return; -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xF80 , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ /* dbg_port = state machine */ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x007); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "state machine", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = CCA-related*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x204); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "CCA-related", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ -+ /* dbg_port = edcca/rxd*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x278); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "edcca/rxd", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = rx_state/mux_state/ADC_MASK_OFDM*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x290); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx_state/mux_state/ADC_MASK_OFDM", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = bf-related*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x2B2); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "bf-related", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = bf-related*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x2B8); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "bf-related", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = txon/rxd*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA03); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "txon/rxd", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = l_rate/l_length*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA0B); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "l_rate/l_length", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = rxd/rxd_hit*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA0D); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rxd/rxd_hit", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = dis_cca*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAA0); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "dis_cca", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ -+ /* dbg_port = tx*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAB0); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "tx", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ /* dbg_port = rx plcp*/ -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD0); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD1); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD2); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD3); -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+} -+ -+VOID -+phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm) -+{ -+ -+ u1Byte RX_HT_BW, RX_VHT_BW, RXSC, RX_HT, RX_BW; -+ static u1Byte vRX_BW ; -+ u4Byte value32, value32_1, value32_2, value32_3; -+ s4Byte SFO_A, SFO_B, SFO_C, SFO_D; -+ s4Byte LFO_A, LFO_B, LFO_C, LFO_D; -+ static u1Byte MCSS, Tail, Parity, rsv, vrsv, idx, smooth, htsound, agg, stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, vNsts, vtxops, vrsv2, vbrsv, bf, vbcrc; -+ static u2Byte HLength, htcrc8, Length; -+ static u2Byte vpaid; -+ static u2Byte vLength, vhtcrc8, vMCSS, vTail, vbTail; -+ static u1Byte HMCSS, HRX_BW; -+ -+ -+ u1Byte pwDB; -+ s1Byte RXEVM_0, RXEVM_1, RXEVM_2 ; -+ u1Byte RF_gain_pathA, RF_gain_pathB, RF_gain_pathC, RF_gain_pathD; -+ u1Byte RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD; -+ s4Byte sig_power; -+ const char *RXHT_table[3] = {"legacy", "HT", "VHT"}; -+ const char *BW_table[3] = {"20M", "40M", "80M"}; -+ const char *RXSC_table[7] = {"duplicate/full bw", "usc20-1", "lsc20-1", "usc20-2", "lsc20-2", "usc40", "lsc40"}; -+ -+ const char *L_rate[8] = {"6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M"}; -+ -+ -+ /* -+ const double evm_comp_20M = 0.579919469776867; //10*log10(64.0/56.0) -+ const double evm_comp_40M = 0.503051183113957; //10*log10(128.0/114.0) -+ const double evm_comp_80M = 0.244245993314183; //10*log10(256.0/242.0) -+ const double evm_comp_160M = 0.244245993314183; //10*log10(512.0/484.0) -+ */ -+ -+ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ return; -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s\n", "BB Report Info"); -+ DCMD_Printf(BbDbgBuf); -+ -+ /*BW & Mode Detection*/ -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xf80 , bMaskDWord); -+ value32_2 = value32; -+ RX_HT_BW = (u1Byte)(value32 & 0x1); -+ RX_VHT_BW = (u1Byte)((value32 >> 1) & 0x3); -+ RXSC = (u1Byte)(value32 & 0x78); -+ value32_1 = (value32 & 0x180) >> 7; -+ RX_HT = (u1Byte)(value32_1); -+ /* -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "F80", value32_2); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT_BW", RX_HT_BW); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_VHT_BW", RX_VHT_BW); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_SC", RXSC); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT", RX_HT); -+ DCMD_Printf(BbDbgBuf); -+ */ -+ -+ /*rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n RX_HT:%s ", RXHT_table[RX_HT]);*/ -+ /*DCMD_Printf(BbDbgBuf);*/ -+ RX_BW = 0; -+ -+ if (RX_HT == 2) { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: VHT Mode"); -+ DCMD_Printf(BbDbgBuf); -+ if (RX_VHT_BW == 0) { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); -+ DCMD_Printf(BbDbgBuf); -+ } else if (RX_VHT_BW == 1) { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); -+ DCMD_Printf(BbDbgBuf); -+ } else { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=80M"); -+ DCMD_Printf(BbDbgBuf); -+ } -+ RX_BW = RX_VHT_BW; -+ } else if (RX_HT == 1) { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: HT Mode"); -+ DCMD_Printf(BbDbgBuf); -+ if (RX_HT_BW == 0) { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); -+ DCMD_Printf(BbDbgBuf); -+ } else if (RX_HT_BW == 1) { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); -+ DCMD_Printf(BbDbgBuf); -+ } -+ RX_BW = RX_HT_BW; -+ } else { -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: Legeacy Mode"); -+ DCMD_Printf(BbDbgBuf); -+ } -+ -+ if (RX_HT != 0) { -+ if (RXSC == 0) -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n duplicate/full bw"); -+ else if (RXSC == 1) -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-1"); -+ else if (RXSC == 2) -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-1"); -+ else if (RXSC == 3) -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-2"); -+ else if (RXSC == 4) -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-2"); -+ else if (RXSC == 9) -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc40"); -+ else if (RXSC == 10) -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc40"); -+ DCMD_Printf(BbDbgBuf); -+ } -+ /* -+ if(RX_HT == 2){ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_VHT_BW]); -+ RX_BW = RX_VHT_BW; -+ } -+ else if(RX_HT == 1){ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_HT_BW]); -+ RX_BW = RX_HT_BW; -+ } -+ else -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, ""); -+ -+ DCMD_Printf(BbDbgBuf); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " RXSC:%s", RXSC_table[RXSC]); -+ DCMD_Printf(BbDbgBuf); -+ */ -+ -+ -+/* rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "dB Conversion: 10log(65)", ODM_PWdB_Conversion(65,10,0));*/ -+/* DCMD_Printf(BbDbgBuf);*/ -+ -+ /* RX signal power and AGC related info*/ -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xF90 , bMaskDWord); -+ pwDB = (u1Byte)((value32 & bMaskByte1) >> 8); -+ pwDB = pwDB >> 1; -+ sig_power = -110 + pwDB; -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power); -+ DCMD_Printf(BbDbgBuf); -+ -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xd14 , bMaskDWord); -+ RX_SNR_pathA = (u1Byte)(value32 & 0xFF) >> 1; -+ RF_gain_pathA = (s1Byte)((value32 & bMaskByte1) >> 8); -+ RF_gain_pathA *= 2; -+ value32 = ODM_GetBBReg(pDM_Odm, 0xd54 , bMaskDWord); -+ RX_SNR_pathB = (u1Byte)(value32 & 0xFF) >> 1; -+ RF_gain_pathB = (s1Byte)((value32 & bMaskByte1) >> 8); -+ RF_gain_pathB *= 2; -+ value32 = ODM_GetBBReg(pDM_Odm, 0xd94 , bMaskDWord); -+ RX_SNR_pathC = (u1Byte)(value32 & 0xFF) >> 1; -+ RF_gain_pathC = (s1Byte)((value32 & bMaskByte1) >> 8); -+ RF_gain_pathC *= 2; -+ value32 = ODM_GetBBReg(pDM_Odm, 0xdd4 , bMaskDWord); -+ RX_SNR_pathD = (u1Byte)(value32 & 0xFF) >> 1; -+ RF_gain_pathD = (s1Byte)((value32 & bMaskByte1) >> 8); -+ RF_gain_pathD *= 2; -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", RF_gain_pathA, RF_gain_pathA, RF_gain_pathC, RF_gain_pathD); -+ DCMD_Printf(BbDbgBuf); -+ -+ -+ /* RX Counter related info*/ -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xF08, bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM CCA Counter", ((value32&0xFFFF0000)>>16)); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xFD0, bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM SBD Fail Counter", value32&0xFFFF); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xFC4, bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xFCC, bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "CCK CCA Counter", value32&0xFFFF); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xFBC, bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "LSIG (\"Parity Fail\"/\"Rate Illegal\") Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32_1 = ODM_GetBBReg(pDM_Odm, 0xFC8, bMaskDWord); -+ value32_2 = ODM_GetBBReg(pDM_Odm, 0xFC0, bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT counter", ((value32_2&0xFFFF0000)>>16), value32_1&0xFFFF); -+ DCMD_Printf(BbDbgBuf); -+ -+ -+ /* PostFFT related info*/ -+ -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xF8c , bMaskDWord); -+ RXEVM_0 = (s1Byte)((value32 & bMaskByte2) >> 16); -+ RXEVM_0 /= 2; -+ if (RXEVM_0 < -63) -+ RXEVM_0 = 0; -+ -+ DCMD_Printf(BbDbgBuf); -+ RXEVM_1 = (s1Byte)((value32 & bMaskByte3) >> 24); -+ RXEVM_1 /= 2; -+ value32 = ODM_GetBBReg(pDM_Odm, 0xF88 , bMaskDWord); -+ RXEVM_2 = (s1Byte)((value32 & bMaskByte2) >> 16); -+ RXEVM_2 /= 2; -+ -+ if (RXEVM_1 < -63) -+ RXEVM_1 = 0; -+ if (RXEVM_2 < -63) -+ RXEVM_2 = 0; -+ -+ /* -+ if(RX_BW == 0){ -+ RXEVM_0 -= evm_comp_20M; -+ RXEVM_1 -= evm_comp_20M; -+ RXEVM_2 -= evm_comp_20M; -+ } -+ else if(RX_BW == 1){ -+ RXEVM_0 -= evm_comp_40M; -+ RXEVM_1 -= evm_comp_40M; -+ RXEVM_2 -= evm_comp_40M; -+ } -+ else if (RX_BW == 2){ -+ RXEVM_0 -= evm_comp_80M; -+ RXEVM_1 -= evm_comp_80M; -+ RXEVM_2 -= evm_comp_80M; -+ } -+ */ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", RXEVM_0, RXEVM_1, RXEVM_2); -+ DCMD_Printf(BbDbgBuf); -+ -+/* value32 = ODM_GetBBReg(pDM_Odm, 0xD14 ,bMaskDWord);*/ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD); -+ DCMD_Printf(BbDbgBuf); -+/* rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "B_RXSNR", (value32&0xFF00)>>9);*/ -+/* DCMD_Printf(BbDbgBuf);*/ -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xF8C , bMaskDWord); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); -+ DCMD_Printf(BbDbgBuf); -+ -+ -+ //BW & Mode Detection -+ -+ //Reset Page F Counter -+ ODM_SetBBReg(pDM_Odm, 0xB58 , BIT0, 1); -+ ODM_SetBBReg(pDM_Odm, 0xB58 , BIT0, 0); -+ -+ //CFO Report Info -+ //Short CFO -+ value32 = ODM_GetBBReg(pDM_Odm, 0xd0c , bMaskDWord); -+ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd4c , bMaskDWord); -+ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd8c , bMaskDWord); -+ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdcc , bMaskDWord); -+ -+ SFO_A = (s4Byte)(value32 & bMask12Bits); -+ SFO_B = (s4Byte)(value32_1 & bMask12Bits); -+ SFO_C = (s4Byte)(value32_2 & bMask12Bits); -+ SFO_D = (s4Byte)(value32_3 & bMask12Bits); -+ -+ LFO_A = (s4Byte)(value32 >> 16); -+ LFO_B = (s4Byte)(value32_1 >> 16); -+ LFO_C = (s4Byte)(value32_2 >> 16); -+ LFO_D = (s4Byte)(value32_3 >> 16); -+ -+ //SFO 2's to dec -+ if (SFO_A > 2047) -+ SFO_A = SFO_A - 4096; -+ SFO_A = (SFO_A * 312500) / 2048; -+ -+ if (SFO_B > 2047) -+ SFO_B = SFO_B - 4096; -+ SFO_B = (SFO_B * 312500) / 2048; -+ if (SFO_C > 2047) -+ SFO_C = SFO_C - 4096; -+ SFO_C = (SFO_C * 312500) / 2048; -+ if (SFO_D > 2047) -+ SFO_D = SFO_D - 4096; -+ SFO_D = (SFO_D * 312500) / 2048; -+ -+ //LFO 2's to dec -+ -+ if (LFO_A > 4095) -+ LFO_A = LFO_A - 8192; -+ -+ if (LFO_B > 4095) -+ LFO_B = LFO_B - 8192; -+ -+ if (LFO_C > 4095) -+ LFO_C = LFO_C - 8192; -+ -+ if (LFO_D > 4095) -+ LFO_D = LFO_D - 8192; -+ LFO_A = LFO_A * 312500 / 4096; -+ LFO_B = LFO_B * 312500 / 4096; -+ LFO_C = LFO_C * 312500 / 4096; -+ LFO_D = LFO_D * 312500 / 4096; -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "CFO Report Info"); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Short CFO(Hz) ", SFO_A, SFO_B, SFO_C, SFO_D); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Long CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); -+ DCMD_Printf(BbDbgBuf); -+ -+ //SCFO -+ value32 = ODM_GetBBReg(pDM_Odm, 0xd10 , bMaskDWord); -+ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd50 , bMaskDWord); -+ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd90 , bMaskDWord); -+ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd0 , bMaskDWord); -+ -+ SFO_A = (s4Byte)(value32 & 0x7ff); -+ SFO_B = (s4Byte)(value32_1 & 0x7ff); -+ SFO_C = (s4Byte)(value32_2 & 0x7ff); -+ SFO_D = (s4Byte)(value32_3 & 0x7ff); -+ -+ if (SFO_A > 1023) -+ SFO_A = SFO_A - 2048; -+ -+ if (SFO_B > 2047) -+ SFO_B = SFO_B - 4096; -+ -+ if (SFO_C > 2047) -+ SFO_C = SFO_C - 4096; -+ -+ if (SFO_D > 2047) -+ SFO_D = SFO_D - 4096; -+ -+ SFO_A = SFO_A * 312500 / 1024; -+ SFO_B = SFO_B * 312500 / 1024; -+ SFO_C = SFO_C * 312500 / 1024; -+ SFO_D = SFO_D * 312500 / 1024; -+ -+ LFO_A = (s4Byte)(value32 >> 16); -+ LFO_B = (s4Byte)(value32_1 >> 16); -+ LFO_C = (s4Byte)(value32_2 >> 16); -+ LFO_D = (s4Byte)(value32_3 >> 16); -+ -+ if (LFO_A > 4095) -+ LFO_A = LFO_A - 8192; -+ -+ if (LFO_B > 4095) -+ LFO_B = LFO_B - 8192; -+ -+ if (LFO_C > 4095) -+ LFO_C = LFO_C - 8192; -+ -+ if (LFO_D > 4095) -+ LFO_D = LFO_D - 8192; -+ LFO_A = LFO_A * 312500 / 4096; -+ LFO_B = LFO_B * 312500 / 4096; -+ LFO_C = LFO_C * 312500 / 4096; -+ LFO_D = LFO_D * 312500 / 4096; -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Value SCFO(Hz) ", SFO_A, SFO_B, SFO_C, SFO_D); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " ACQ CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xd14 , bMaskDWord); -+ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd54 , bMaskDWord); -+ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd94 , bMaskDWord); -+ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd4 , bMaskDWord); -+ -+ LFO_A = (s4Byte)(value32 >> 16); -+ LFO_B = (s4Byte)(value32_1 >> 16); -+ LFO_C = (s4Byte)(value32_2 >> 16); -+ LFO_D = (s4Byte)(value32_3 >> 16); -+ -+ if (LFO_A > 4095) -+ LFO_A = LFO_A - 8192; -+ -+ if (LFO_B > 4095) -+ LFO_B = LFO_B - 8192; -+ -+ if (LFO_C > 4095) -+ LFO_C = LFO_C - 8192; -+ -+ if (LFO_D > 4095) -+ LFO_D = LFO_D - 8192; -+ -+ LFO_A = LFO_A * 312500 / 4096; -+ LFO_B = LFO_B * 312500 / 4096; -+ LFO_C = LFO_C * 312500 / 4096; -+ LFO_D = LFO_D * 312500 / 4096; -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " End CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xf20 , bMaskDWord); /*L SIG*/ -+ -+ Tail = (u1Byte)((value32 & 0xfc0000) >> 16); -+ Parity = (u1Byte)((value32 & 0x20000) >> 16); -+ Length = (u2Byte)((value32 & 0x1ffe00) >> 8); -+ rsv = (u1Byte)(value32 & 0x10); -+ MCSS = (u1Byte)(value32 & 0x0f); -+ -+ switch (MCSS) { -+ case 0x0b: -+ idx = 0; -+ break; -+ case 0x0f: -+ idx = 1; -+ break; -+ case 0x0a: -+ idx = 2; -+ break; -+ case 0x0e: -+ idx = 3; -+ break; -+ case 0x09: -+ idx = 4; -+ break; -+ case 0x08: -+ idx = 5; -+ break; -+ case 0x0c: -+ idx = 6; -+ break; -+ default: -+ idx = 6; -+ break; -+ -+ } -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "L-SIG"); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Rate:%s", L_rate[idx]); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x/ %x /%x", " Rsv/Length/Parity", rsv, RX_BW, Length); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG1"); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xf2c , bMaskDWord); /*HT SIG*/ -+ if (RX_HT == 1) { -+ -+ HMCSS = (u1Byte)(value32 & 0x7F); -+ HRX_BW = (u1Byte)(value32 & 0x80); -+ HLength = (u2Byte)((value32 >> 8) & 0xffff); -+ } -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x", " MCS/BW/Length", HMCSS, HRX_BW, HLength); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG2"); -+ DCMD_Printf(BbDbgBuf); -+ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xf30 , bMaskDWord); /*HT SIG*/ -+ -+ if (RX_HT == 1) { -+ smooth = (u1Byte)(value32 & 0x01); -+ htsound = (u1Byte)(value32 & 0x02); -+ rsv = (u1Byte)(value32 & 0x04); -+ agg = (u1Byte)(value32 & 0x08); -+ stbc = (u1Byte)(value32 & 0x30); -+ fec = (u1Byte)(value32 & 0x40); -+ sgi = (u1Byte)(value32 & 0x80); -+ htltf = (u1Byte)((value32 & 0x300) >> 8); -+ htcrc8 = (u2Byte)((value32 & 0x3fc00) >> 8); -+ Tail = (u1Byte)((value32 & 0xfc0000) >> 16); -+ -+ -+ } -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x", " Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", smooth, htsound, rsv, agg, stbc, fec); -+ DCMD_Printf(BbDbgBuf); -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x", " SGI/E-HT-LTFs/CRC/Tail", sgi, htltf, htcrc8, Tail); -+ DCMD_Printf(BbDbgBuf); -+ -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A1"); -+ DCMD_Printf(BbDbgBuf); -+ value32 = ODM_GetBBReg(pDM_Odm, 0xf2c , bMaskDWord); /*VHT SIG A1*/ -+ if (RX_HT == 2) { -+ /* value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord);*/ -+ vRX_BW = (u1Byte)(value32 & 0x03); -+ vrsv = (u1Byte)(value32 & 0x04); -+ vstbc = (u1Byte)(value32 & 0x08); -+ vgid = (u1Byte)((value32 & 0x3f0) >> 4); -+ vNsts = (u1Byte)(((value32 & 0x1c00) >> 8) + 1); -+ vpaid = (u2Byte)(value32 & 0x3fe); -+ vtxops = (u1Byte)((value32 & 0x400000) >> 20); -+ vrsv2 = (u1Byte)((value32 & 0x800000) >> 20); -+ } -+ -+ /*rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F2C", value32);*/ -+ /*DCMD_Printf(BbDbgBuf);*/ -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x /%x /%x", " BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", vRX_BW, vrsv, vstbc, vgid, vNsts, vpaid, vtxops, vrsv2); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A2"); -+ DCMD_Printf(BbDbgBuf); -+ value32 = ODM_GetBBReg(pDM_Odm, 0xf30 , bMaskDWord); /*VHT SIG*/ -+ -+ -+ if (RX_HT == 2) { -+ /*value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); */ /*VHT SIG*/ -+ -+ //sgi=(u1Byte)(value32&0x01); -+ sgiext = (u1Byte)(value32 & 0x03); -+ //fec = (u1Byte)(value32&0x04); -+ fecext = (u1Byte)(value32 & 0x0C); -+ -+ vMCSS = (u1Byte)(value32 & 0xf0); -+ bf = (u1Byte)((value32 & 0x100) >> 8); -+ vrsv = (u1Byte)((value32 & 0x200) >> 8); -+ vhtcrc8 = (u2Byte)((value32 & 0x3fc00) >> 8); -+ vTail = (u1Byte)((value32 & 0xfc0000) >> 16); -+ } -+ /*rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F30", value32);*/ -+ /*DCMD_Printf(BbDbgBuf);*/ -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x/ %x", " SGI/FEC/MCS/BF/Rsv/CRC/Tail", sgiext, fecext, vMCSS, bf, vrsv, vhtcrc8, vTail); -+ DCMD_Printf(BbDbgBuf); -+ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-B"); -+ DCMD_Printf(BbDbgBuf); -+ value32 = ODM_GetBBReg(pDM_Odm, 0xf34 , bMaskDWord); /*VHT SIG*/ -+ { -+ vLength = (u2Byte)(value32 & 0x1fffff); -+ vbrsv = (u1Byte)((value32 & 0x600000) >> 20); -+ vbTail = (u2Byte)((value32 & 0x1f800000) >> 20); -+ vbcrc = (u1Byte)((value32 & 0x80000000) >> 28); -+ -+ } -+ /*rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F34", value32);*/ -+ /*DCMD_Printf(BbDbgBuf);*/ -+ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/", " Length/Rsv/Tail/CRC", vLength, vbrsv, vbTail, vbcrc); -+ DCMD_Printf(BbDbgBuf); -+ -+ -+} -+ -+void phydm_sbd_check( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ static u4Byte pkt_cnt = 0; -+ static BOOLEAN sbd_state = 0; -+ u4Byte sym_count, count, value32; -+ -+ if (sbd_state == 0) { -+ pkt_cnt++; -+ if (pkt_cnt % 5 == 0) { /*read SBD conter once every 5 packets*/ -+ ODM_SetTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer, 0); /*ms*/ -+ sbd_state = 1; -+ } -+ } else { /*read counter*/ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xF98, bMaskDWord); -+ sym_count = (value32 & 0x7C000000) >> 26; -+ count = (value32 & 0x3F00000) >> 20; -+ DbgPrint("#SBD# sym_count %d count %d\n", sym_count, count); -+ sbd_state = 0; -+ } -+} -+ -+void phydm_sbd_callback( -+ PRT_TIMER pTimer -+) -+{ -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+#if USE_WORKITEM -+ ODM_ScheduleWorkItem(&pDM_Odm->sbdcnt_workitem); -+#else -+ phydm_sbd_check(pDM_Odm); -+#endif -+} -+ -+void phydm_sbd_workitem_callback( -+ IN PVOID pContext -+) -+{ -+ PADAPTER pAdapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ phydm_sbd_check(pDM_Odm); -+} -+#endif -+VOID -+phydm_BasicDbgMessage -+( -+ IN PVOID pDM_VOID -+) -+{ -+#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(pDM_Odm , PHYDM_FALSEALMCNT); -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ u1Byte legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; -+ u1Byte vht_en = ((pDM_Odm->RxRate) >= ODM_RATEVHTSS1MCS0) ? 1 : 0; -+ -+ if (pDM_Odm->RxRate <= ODM_RATE11M) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCK AGC Report] LNA_idx = 0x%x, VGA_idx = 0x%x\n", -+ pDM_Odm->cck_lna_idx, pDM_Odm->cck_vga_idx)); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM AGC Report] { 0x%x, 0x%x, 0x%x, 0x%x }\n", -+ pDM_Odm->ofdm_agc_idx[0], pDM_Odm->ofdm_agc_idx[1], pDM_Odm->ofdm_agc_idx[2], pDM_Odm->ofdm_agc_idx[3])); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI: { %d, %d, %d, %d }, RxRate: { %s%s%s%s%d%s}\n", -+ (pDM_Odm->RSSI_A == 0xff) ? 0 : pDM_Odm->RSSI_A , -+ (pDM_Odm->RSSI_B == 0xff) ? 0 : pDM_Odm->RSSI_B , -+ (pDM_Odm->RSSI_C == 0xff) ? 0 : pDM_Odm->RSSI_C, -+ (pDM_Odm->RSSI_D == 0xff) ? 0 : pDM_Odm->RSSI_D, -+ ((pDM_Odm->RxRate >= ODM_RATEVHTSS1MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", -+ ((pDM_Odm->RxRate >= ODM_RATEVHTSS2MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", -+ ((pDM_Odm->RxRate >= ODM_RATEVHTSS3MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", -+ (pDM_Odm->RxRate >= ODM_RATEMCS0) ? "MCS " : "", -+ (vht_en) ? ((pDM_Odm->RxRate - ODM_RATEVHTSS1MCS0)%10) : ((pDM_Odm->RxRate >= ODM_RATEMCS0) ? (pDM_Odm->RxRate - ODM_RATEMCS0) : ((pDM_Odm->RxRate <= ODM_RATE54M)?legacy_table[pDM_Odm->RxRate]:0)), -+ (pDM_Odm->RxRate >= ODM_RATEMCS0) ? "" : "M")); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ FalseAlmCnt->Cnt_CCK_CCA, FalseAlmCnt->Cnt_OFDM_CCA, FalseAlmCnt->Cnt_CCA_all)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n", -+ FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail, FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked = %d, RSSI_Min = %d, CurrentIGI = 0x%x, bNoisy=%d\n\n", -+ pDM_Odm->bLinked, pDM_Odm->RSSI_Min, pDM_DigTable->CurIGValue, pDM_Odm->NoisyDecision)); -+/* -+ temp_reg = ODM_GetBBReg(pDM_Odm, 0xDD0, bMaskByte0); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDD0 = 0x%x\n",temp_reg)); -+ -+ temp_reg = ODM_GetBBReg(pDM_Odm, 0xDDc, bMaskByte1); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDDD = 0x%x\n",temp_reg)); -+ -+ temp_reg = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskByte0); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xC50 = 0x%x\n",temp_reg)); -+ -+ temp_reg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0x3fe0); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RF 0x0[13:5] = 0x%x\n\n",temp_reg)); -+*/ -+ -+#endif -+} -+ -+ -+VOID phydm_BasicProfile( -+ IN PVOID pDM_VOID, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ char *Cut = NULL; -+ char *ICType = NULL; -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ u4Byte commit_ver = 0; -+ u4Byte date = 0; -+ char *commit_by = NULL; -+ u4Byte release_ver = 0; -+ -+ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% Basic Profile %")); -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8192C) -+ ICType = "RTL8192C"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8192D) -+ ICType = "RTL8192D"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8723A) -+ ICType = "RTL8723A"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8188E) -+ ICType = "RTL8188E"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8812) -+ ICType = "RTL8812A"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8821) -+ ICType = "RTL8821A"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8192E) -+ ICType = "RTL8192E"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8723B) -+ ICType = "RTL8723B"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ ICType = "RTL8814A"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8881A) -+ ICType = "RTL8881A"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8821B) -+ ICType = "RTL8821B"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8822B) -+ ICType = "RTL8822B"; -+#if (RTL8703B_SUPPORT == 1) -+ else if (pDM_Odm->SupportICType == ODM_RTL8703B) { -+ ICType = "RTL8703B"; -+ date = RELEASE_DATE_8703B; -+ commit_by = COMMIT_BY_8703B; -+ release_ver = RELEASE_VERSION_8703B; -+ } -+#endif -+ else if (pDM_Odm->SupportICType == ODM_RTL8195A) -+ ICType = "RTL8195A"; -+ else if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ ICType = "RTL8188F"; -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s (MP Chip: %s)\n", "IC Type", ICType, pDM_Odm->bIsMPChip ? "Yes" : "No")); -+ -+ if (pDM_Odm->CutVersion == ODM_CUT_A) -+ Cut = "A"; -+ else if (pDM_Odm->CutVersion == ODM_CUT_B) -+ Cut = "B"; -+ else if (pDM_Odm->CutVersion == ODM_CUT_C) -+ Cut = "C"; -+ else if (pDM_Odm->CutVersion == ODM_CUT_D) -+ Cut = "D"; -+ else if (pDM_Odm->CutVersion == ODM_CUT_E) -+ Cut = "E"; -+ else if (pDM_Odm->CutVersion == ODM_CUT_F) -+ Cut = "F"; -+ else if (pDM_Odm->CutVersion == ODM_CUT_I) -+ Cut = "I"; -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Cut Version", Cut)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Version", ODM_GetHWImgVersion(pDM_Odm))); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Commit date", date)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "PHY Parameter Commit by", commit_by)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Release Version", release_ver)); -+ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ { -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", Adapter->MgntInfo.FirmwareVersion, Adapter->MgntInfo.FirmwareSubVersion)); -+ } -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ { -+ struct rtl8192cd_priv *priv = pDM_Odm->priv; -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", priv->pshare->fw_version, priv->pshare->fw_sub_version)); -+ } -+#else -+ { -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", pHalData->FirmwareVersion, pHalData->FirmwareSubVersion)); -+ } -+#endif -+ //1 PHY DM Version List -+ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% PHYDM Version %")); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Adaptivity", ADAPTIVITY_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "DIG", DIG_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Dynamic BB PowerSaving", DYNAMIC_BBPWRSAV_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "CFO Tracking", CFO_TRACKING_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Antenna Diversity", ANTDIV_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Power Tracking", POWRTRACKING_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Dynamic TxPower", DYNAMIC_TXPWR_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "RA Info", RAINFO_VERSION)); -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Antenna Detection", ANTDECT_VERSION)); -+#endif -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Auto Channel Selection", ACS_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "EDCA Turbo", EDCATURBO_VERSION)); -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Path Diversity", PATHDIV_VERSION)); -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "RxHP", RXHP_VERSION)); -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & ODM_RTL8822B) -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "PHY config 8822B", PHY_CONFIG_VERSION_8822B)); -+ -+#endif -+ *_used = used; -+ *_out_len = out_len; -+ -+} -+ -+VOID -+phydm_fw_trace_en_h2c( -+ IN PVOID pDM_VOID, -+ IN BOOLEAN enable, -+ IN u4Byte monitor_mode, -+ IN u4Byte macid -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u1Byte H2C_Parameter[3] = {0}; -+ -+ H2C_Parameter[0] = enable; -+ H2C_Parameter[1] = (u1Byte)monitor_mode; -+ H2C_Parameter[2] = (u1Byte)macid; -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("---->\n")); -+ if (monitor_mode == 0){ -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[H2C] FW_debug_en: (( %d ))\n", enable)); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", enable, monitor_mode, macid)); -+ } -+ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_FW_TRACE_EN, 3, H2C_Parameter); -+} -+ -+VOID -+phydm_get_per_path_txagc( -+ IN PVOID pDM_VOID, -+ IN u1Byte path, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte rate_idx; -+ u1Byte txagc; -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ -+#if (RTL8822B_SUPPORT == 1) -+ if ((pDM_Odm->SupportICType & ODM_RTL8822B) && (path <= ODM_RF_PATH_B)) { -+ for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) { -+ if (rate_idx == ODM_RATE1M) -+ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s\n", "CCK====>")); -+ else if (rate_idx == ODM_RATE6M) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "OFDM====>")); -+ else if (rate_idx == ODM_RATEMCS0) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 1ss====>")); -+ else if (rate_idx == ODM_RATEMCS8) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 2ss====>")); -+ else if (rate_idx == ODM_RATEMCS16) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 3ss====>")); -+ else if (rate_idx == ODM_RATEMCS24) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 4ss====>")); -+ else if (rate_idx == ODM_RATEVHTSS1MCS0) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 1ss====>")); -+ else if (rate_idx == ODM_RATEVHTSS2MCS0) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 2ss====>")); -+ else if (rate_idx == ODM_RATEVHTSS3MCS0) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 3ss====>")); -+ else if (rate_idx == ODM_RATEVHTSS4MCS0) -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 4ss====>")); -+ -+ txagc = config_phydm_read_txagc_8822b(pDM_Odm, path, rate_idx); -+ if (config_phydm_read_txagc_check_8822b(txagc)) -+ PHYDM_SNPRINTF((output + used, out_len - used, " 0x%02x ", txagc)); -+ else -+ PHYDM_SNPRINTF((output + used, out_len - used, " 0x%s ", "xx")); -+ } -+ } -+#endif -+} -+ -+ -+VOID -+phydm_get_txagc( -+ IN PVOID pDM_VOID, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ -+ /* Path-A */ -+ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "Path-A====================")); -+ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_A, _used, output, _out_len); -+ -+ /* Path-B */ -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-B====================")); -+ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_B, _used, output, _out_len); -+ -+ /* Path-C */ -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-C====================")); -+ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_C, _used, output, _out_len); -+ -+ /* Path-D */ -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-D====================")); -+ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_D, _used, output, _out_len); -+ -+} -+ -+VOID -+phydm_set_txagc( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ -+#if (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & ODM_RTL8822B) { -+ if (dm_value[0] <= 1) { -+ if (phydm_write_txagc_1byte_8822b(pDM_Odm, dm_value[2], dm_value[0], (u1Byte)dm_value[1])) -+ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s%x\n", "Write path-", dm_value[0], "rate index-0x", dm_value[1], " = 0x", dm_value[2])); -+ else -+ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s\n", "Write path-", (dm_value[0] & 0x1), "rate index-0x", (dm_value[1] & 0x7f), " fail")); -+ } else { -+ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s\n", "Write path-", (dm_value[0] & 0x1), "rate index-0x", (dm_value[1] & 0x7f), " fail")); -+ } -+ } -+#endif -+} -+ -+VOID -+odm_debug_trace( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u8Byte pre_debug_components, one = 1; -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ -+ pre_debug_components = pDM_Odm->DebugComponents; -+ -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================")); -+ if (dm_value[0] == 100) { -+ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Debug Message] PhyDM Selection")); -+ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); -+ PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))DIG\n", ((pDM_Odm->DebugComponents & ODM_COMP_DIG) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))RA_MASK\n", ((pDM_Odm->DebugComponents & ODM_COMP_RA_MASK) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))DYNAMIC_TXPWR\n", ((pDM_Odm->DebugComponents & ODM_COMP_DYNAMIC_TXPWR) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))FA_CNT\n", ((pDM_Odm->DebugComponents & ODM_COMP_FA_CNT) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "04. (( %s ))RSSI_MONITOR\n", ((pDM_Odm->DebugComponents & ODM_COMP_RSSI_MONITOR) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "05. (( %s ))CCK_PD\n", ((pDM_Odm->DebugComponents & ODM_COMP_CCK_PD) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "06. (( %s ))ANT_DIV\n", ((pDM_Odm->DebugComponents & ODM_COMP_ANT_DIV) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "07. (( %s ))PWR_SAVE\n", ((pDM_Odm->DebugComponents & ODM_COMP_PWR_SAVE) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "08. (( %s ))PWR_TRAIN\n", ((pDM_Odm->DebugComponents & ODM_COMP_PWR_TRAIN) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "09. (( %s ))RATE_ADAPTIVE\n", ((pDM_Odm->DebugComponents & ODM_COMP_RATE_ADAPTIVE) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "10. (( %s ))PATH_DIV\n", ((pDM_Odm->DebugComponents & ODM_COMP_PATH_DIV) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "11. (( %s ))PSD\n", ((pDM_Odm->DebugComponents & ODM_COMP_PSD) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "12. (( %s ))DYNAMIC_PRICCA\n", ((pDM_Odm->DebugComponents & ODM_COMP_DYNAMIC_PRICCA) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "13. (( %s ))RXHP\n", ((pDM_Odm->DebugComponents & ODM_COMP_RXHP) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "14. (( %s ))MP\n", ((pDM_Odm->DebugComponents & ODM_COMP_MP) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))CFO_TRACKING\n", ((pDM_Odm->DebugComponents & ODM_COMP_CFO_TRACKING) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))ACS\n", ((pDM_Odm->DebugComponents & ODM_COMP_ACS) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))ADAPTIVITY\n", ((pDM_Odm->DebugComponents & PHYDM_COMP_ADAPTIVITY) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))RA_DBG\n", ((pDM_Odm->DebugComponents & PHYDM_COMP_RA_DBG) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))EDCA_TURBO\n", ((pDM_Odm->DebugComponents & ODM_COMP_EDCA_TURBO) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "21. (( %s ))EARLY_MODE\n", ((pDM_Odm->DebugComponents & ODM_COMP_EARLY_MODE) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "22. (( %s ))FW_DEBUG_TRACE\n", ((pDM_Odm->DebugComponents & ODM_FW_DEBUG_TRACE) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "24. (( %s ))TX_PWR_TRACK\n", ((pDM_Odm->DebugComponents & ODM_COMP_TX_PWR_TRACK) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "25. (( %s ))RX_GAIN_TRACK\n", ((pDM_Odm->DebugComponents & ODM_COMP_RX_GAIN_TRACK) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "26. (( %s ))CALIBRATION\n", ((pDM_Odm->DebugComponents & ODM_COMP_CALIBRATION) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "28. (( %s ))PHY_CONFIG\n", ((pDM_Odm->DebugComponents & ODM_PHY_CONFIG) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "29. (( %s ))BEAMFORMING_DEBUG\n", ((pDM_Odm->DebugComponents & BEAMFORMING_DEBUG) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "30. (( %s ))COMMON\n", ((pDM_Odm->DebugComponents & ODM_COMP_COMMON) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "31. (( %s ))INIT\n", ((pDM_Odm->DebugComponents & ODM_COMP_INIT) ? ("V") : (".")))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); -+ -+ } else if (dm_value[0] == 101) { -+ pDM_Odm->DebugComponents = 0; -+ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Disable all debug components")); -+ } else { -+ if (dm_value[1] == 1) { /*enable*/ -+ pDM_Odm->DebugComponents |= (one << dm_value[0]); -+ -+ if (dm_value[0] == 22) { /*FW trace function*/ -+ phydm_fw_trace_en_h2c(pDM_Odm, 1, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/ -+ } -+ } else if (dm_value[1] == 2) { /*disable*/ -+ pDM_Odm->DebugComponents &= ~(one << dm_value[0]); -+ -+ if (dm_value[0] == 22) { /*FW trace function*/ -+ phydm_fw_trace_en_h2c(pDM_Odm, 0, dm_value[2], dm_value[3]); /*H2C to disable C2H Msg*/ -+ } -+ } else -+ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!] 1:enable, 2:disable")); -+ } -+ PHYDM_SNPRINTF((output + used, out_len - used, "pre-DbgComponents = 0x%x\n", (u4Byte)pre_debug_components)); -+ PHYDM_SNPRINTF((output + used, out_len - used, "Curr-DbgComponents = 0x%x\n", ((u4Byte)pDM_Odm->DebugComponents))); -+ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); -+} -+ -+VOID -+phydm_DumpBbReg( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte Addr = 0; -+ -+ /* BB Reg */ -+ for (Addr = 0x800; Addr < 0xfff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8822B|ODM_RTL8814A)) { -+ -+ if (pDM_Odm->RFType > ODM_2T2R) { -+ for (Addr = 0x1800; Addr < 0x18ff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ } -+ -+ if (pDM_Odm->RFType > ODM_3T3R) { -+ for (Addr = 0x1a00; Addr < 0x1aff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ } -+ -+ for (Addr = 0x1900; Addr < 0x19ff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ -+ for (Addr = 0x1c00; Addr < 0x1cff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ -+ for (Addr = 0x1f00; Addr < 0x1fff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ } -+} -+ -+VOID -+phydm_DumpAllReg( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte Addr = 0; -+ -+ /* dump MAC register */ -+ DbgPrint("MAC==========\n"); -+ for (Addr = 0; Addr < 0x7ff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ -+ for (Addr = 1000; Addr < 0x17ff; Addr += 4) -+ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); -+ -+ /* dump BB register */ -+ DbgPrint("BB==========\n"); -+ phydm_DumpBbReg(pDM_Odm); -+ -+ /* dump RF register */ -+ DbgPrint("RF-A==========\n"); -+ for (Addr = 0; Addr < 0xFF; Addr++) -+ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, Addr, bRFRegOffsetMask)); -+ -+ if (pDM_Odm->RFType > ODM_1T1R) { -+ DbgPrint("RF-B==========\n"); -+ for (Addr = 0; Addr < 0xFF; Addr++) -+ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, Addr, bRFRegOffsetMask)); -+ } -+ -+ if (pDM_Odm->RFType > ODM_2T2R) { -+ DbgPrint("RF-C==========\n"); -+ for (Addr = 0; Addr < 0xFF; Addr++) -+ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_C, Addr, bRFRegOffsetMask)); -+ } -+ -+ if (pDM_Odm->RFType > ODM_3T3R) { -+ DbgPrint("RF-D==========\n"); -+ for (Addr = 0; Addr < 0xFF; Addr++) -+ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_D, Addr, bRFRegOffsetMask)); -+ } -+} -+ -+struct _PHYDM_COMMAND { -+ char name[16]; -+ u1Byte id; -+}; -+ -+enum PHYDM_CMD_ID { -+ PHYDM_DEMO, -+ PHYDM_RA, -+ PHYDM_PROFILE, -+ PHYDM_PATHDIV, -+ PHYDM_DEBUG, -+ PHYDM_SUPPORT_ABILITY, -+ PHYDM_GET_TXAGC, -+ PHYDM_SET_TXAGC, -+ PHYDM_SMART_ANT, -+ PHYDM_API, -+ PHYDM_TRX_PATH, -+ PHYDM_LA_MODE, -+ PHYDM_DUMP_REG -+}; -+ -+struct _PHYDM_COMMAND phy_dm_ary[] = { -+ {"demo", PHYDM_DEMO}, -+ {"ra", PHYDM_RA}, -+ {"profile", PHYDM_PROFILE}, -+ {"pathdiv", PHYDM_PATHDIV}, -+ {"dbg", PHYDM_DEBUG}, -+ {"ability", PHYDM_SUPPORT_ABILITY}, -+ {"get_txagc", PHYDM_GET_TXAGC}, -+ {"set_txagc", PHYDM_SET_TXAGC}, -+ {"smtant", PHYDM_SMART_ANT}, -+ {"api", PHYDM_API}, -+ {"trxpath", PHYDM_TRX_PATH}, -+ {"lamode", PHYDM_LA_MODE}, -+ {"dumpreg", PHYDM_DUMP_REG} -+}; -+ -+VOID -+phydm_cmd_parser( -+ IN PDM_ODM_T pDM_Odm, -+ IN char input[][MAX_ARGV], -+ IN u4Byte input_num, -+ IN u1Byte flag, -+ OUT char *output, -+ IN u4Byte out_len -+) -+{ -+ u4Byte used = 0; -+ u1Byte id = 0; -+ int var1[5] = {0}; -+ int i, input_idx = 0; -+ -+ if (flag == 0) { -+ PHYDM_SNPRINTF((output + used, out_len - used, "GET, nothing to print\n")); -+ return; -+ } -+ -+ PHYDM_SNPRINTF((output + used, out_len - used, "\n")); -+ -+ //Parsing Cmd ID -+ if (input_num) { -+ int n, i; -+ -+ n = sizeof(phy_dm_ary) / sizeof(struct _PHYDM_COMMAND); -+ for (i = 0; i < n; i++) { -+ if (strcmp(phy_dm_ary[i].name, input[0]) == 0) { -+ id = phy_dm_ary[i].id; -+ break; -+ } -+ } -+ if (i == n) { -+ PHYDM_SNPRINTF((output + used, out_len - used, "SET, command not found!\n")); -+ return; -+ } -+ } -+ -+ switch (id) { -+ case PHYDM_DEMO: /*echo demo 10 0x3a z abcde >cmd*/ -+ { -+ u4Byte directory = 0; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) -+ char char_temp; -+#else -+ u4Byte char_temp = ' '; -+#endif -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory); -+ PHYDM_SNPRINTF((output + used, out_len - used, "Decimal Value = %d\n", directory)); -+ PHYDM_SSCANF(input[2], DCMD_HEX, &directory); -+ PHYDM_SNPRINTF((output + used, out_len - used, "Hex Value = 0x%x\n", directory)); -+ PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp); -+ PHYDM_SNPRINTF((output + used, out_len - used, "Char = %c\n", char_temp)); -+ PHYDM_SNPRINTF((output + used, out_len - used, "String = %s\n", input[4])); -+ } -+ break; -+ -+ case PHYDM_RA: -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ -+ PHYDM_SNPRINTF((output + used, out_len - used, "new SET, RA_var[%d]= (( %d ))\n", i , var1[i])); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx >= 1) { -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_RA_debug\n"));*/ -+#if (defined(CONFIG_RA_DBG_CMD)) -+ odm_RA_debug((PVOID)pDM_Odm, var1); -+#endif -+ } -+ -+ -+ break; -+ -+ case PHYDM_PATHDIV: -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); -+ -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i , var1[i]));*/ -+ input_idx++; -+ } -+ } -+ -+ if (input_idx >= 1) { -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/ -+#if (defined(CONFIG_PATH_DIVERSITY)) -+ odm_pathdiv_debug(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); -+#endif -+ } -+ -+ break; -+ -+ case PHYDM_DEBUG: -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, Debug_var[%d]= (( %d ))\n", i , var1[i]));*/ -+ input_idx++; -+ } -+ } -+ -+ if (input_idx >= 1) { -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_debug_comp\n"));*/ -+ odm_debug_trace(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); -+ } -+ -+ -+ break; -+ -+ case PHYDM_SUPPORT_ABILITY: -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i , var1[i]));*/ -+ input_idx++; -+ } -+ } -+ -+ if (input_idx >= 1) { -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "support ablity\n"));*/ -+ phydm_support_ablity_debug(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); -+ } -+ -+ break; -+ -+ case PHYDM_SMART_ANT: -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx >= 1) { -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ phydm_hl_smart_ant_cmd(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); -+ #endif -+ #endif -+ } -+ -+ break; -+ -+ case PHYDM_API: -+#if (RTL8822B_SUPPORT == 1) -+ { -+ if (pDM_Odm->SupportICType & ODM_RTL8822B) { -+ BOOLEAN bEnableDbgMode; -+ u1Byte central_ch, primary_ch_idx, bandwidth; -+ -+ for (i = 0; i < 4; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ bEnableDbgMode = (BOOLEAN)var1[0]; -+ central_ch = (u1Byte) var1[1]; -+ primary_ch_idx = (u1Byte) var1[2]; -+ bandwidth = (ODM_BW_E) var1[3]; -+ -+ if (bEnableDbgMode) { -+ pDM_Odm->bDisablePhyApi = FALSE; -+ config_phydm_switch_channel_bw_8822b(pDM_Odm, central_ch, primary_ch_idx, bandwidth); -+ pDM_Odm->bDisablePhyApi = TRUE; -+ PHYDM_SNPRINTF((output+used, out_len-used, "central_ch = %d, primary_ch_idx = %d, bandwidth = %d\n", central_ch, primary_ch_idx, bandwidth)); -+ } else { -+ pDM_Odm->bDisablePhyApi = FALSE; -+ PHYDM_SNPRINTF((output+used, out_len-used, "Disable API debug mode\n")); -+ } -+ } else -+ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); -+ } -+#else -+ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); -+#endif -+ break; -+ -+ case PHYDM_PROFILE: /*echo profile, >cmd*/ -+ phydm_BasicProfile(pDM_Odm, &used, output, &out_len); -+ break; -+ -+ case PHYDM_GET_TXAGC: -+ phydm_get_txagc(pDM_Odm, &used, output, &out_len); -+ break; -+ -+ case PHYDM_SET_TXAGC: -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ -+ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i , var1[i]));*/ -+ input_idx++; -+ } -+ } -+ -+ phydm_set_txagc(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); -+ break; -+ -+ case PHYDM_TRX_PATH: -+#if (RTL8822B_SUPPORT == 1) -+ { -+ if (pDM_Odm->SupportICType & ODM_RTL8822B) { -+ u1Byte TxPath, RxPath; -+ BOOLEAN bEnableDbgMode, bTx2Path; -+ -+ for (i = 0; i < 4; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ bEnableDbgMode = (BOOLEAN)var1[0]; -+ TxPath = (u1Byte) var1[1]; -+ RxPath = (u1Byte) var1[2]; -+ bTx2Path = (BOOLEAN) var1[3]; -+ -+ if (bEnableDbgMode) { -+ pDM_Odm->bDisablePhyApi = FALSE; -+ config_phydm_trx_mode_8822b(pDM_Odm, TxPath, RxPath, bTx2Path); -+ pDM_Odm->bDisablePhyApi = TRUE; -+ PHYDM_SNPRINTF((output+used, out_len-used, "TxPath = 0x%x, RxPath = 0x%x, bTx2Path = %d\n", TxPath, RxPath, bTx2Path)); -+ } else { -+ pDM_Odm->bDisablePhyApi = FALSE; -+ PHYDM_SNPRINTF((output+used, out_len-used, "Disable API debug mode\n")); -+ } -+ } else -+ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); -+ } -+#else -+ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); -+#endif -+ break; -+ -+ case PHYDM_LA_MODE: -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if ((RTL8822B_SUPPORT == 1) || (RTL8814A_SUPPORT == 1)) -+ { -+ if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) { -+ u2Byte PollingTime; -+ u1Byte TrigSel, TrigSigSel, DmaDataSigSel, TriggerTime; -+ BOOLEAN bEnableLaMode; -+ -+ for (i = 0; i < 6; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ bEnableLaMode = (BOOLEAN)var1[0]; -+ if (bEnableLaMode) { -+ TrigSel = (u1Byte)var1[1]; -+ TrigSigSel = (u1Byte)var1[2]; -+ DmaDataSigSel = (u1Byte)var1[3]; -+ TriggerTime = (u1Byte)var1[4]; -+ PollingTime = (((u1Byte)var1[5]) << 6); -+ -+ ADCSmp_Set(pDM_Odm->Adapter, TrigSel, TrigSigSel, DmaDataSigSel, TriggerTime, PollingTime); -+ PHYDM_SNPRINTF((output+used, out_len-used, "TrigSel = %d, TrigSigSel = %d, DmaDataSigSel = %d\n", TrigSel, TrigSigSel, DmaDataSigSel)); -+ PHYDM_SNPRINTF((output+used, out_len-used, "TriggerTime = %d, PollingTime = %d\n", TriggerTime, PollingTime)); -+ } else { -+ ADCSmp_Stop(pDM_Odm->Adapter); -+ PHYDM_SNPRINTF((output+used, out_len-used, "Disable LA mode\n")); -+ } -+ } else -+ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); -+ } -+#else -+ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); -+#endif -+#else -+ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); -+#endif -+ break; -+ -+ case PHYDM_DUMP_REG: -+ { -+ u1Byte type = 0; -+ -+ if (input[1]) { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ type = (u1Byte)var1[0]; -+ } -+ -+ if (type == 0) -+ phydm_DumpBbReg(pDM_Odm); -+ else if (type == 1) -+ phydm_DumpAllReg(pDM_Odm); -+ } -+ break; -+ default: -+ PHYDM_SNPRINTF((output + used, out_len - used, "SET, unknown command!\n")); -+ break; -+ -+ } -+} -+ -+#ifdef __ECOS -+char *strsep(char **s, const char *ct) -+{ -+ char *sbegin = *s; -+ char *end; -+ -+ if (sbegin == NULL) -+ return NULL; -+ -+ end = strpbrk(sbegin, ct); -+ if (end) -+ *end++ = '\0'; -+ *s = end; -+ return sbegin; -+} -+#endif -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) -+s4Byte -+phydm_cmd( -+ IN PDM_ODM_T pDM_Odm, -+ IN char *input, -+ IN u4Byte in_len, -+ IN u1Byte flag, -+ OUT char *output, -+ IN u4Byte out_len -+) -+{ -+ char *token; -+ u4Byte Argc = 0; -+ char Argv[MAX_ARGC][MAX_ARGV]; -+ -+ do { -+ token = strsep(&input, ", "); -+ if (token) { -+ strcpy(Argv[Argc], token); -+ Argc++; -+ } else -+ break; -+ } while (Argc < MAX_ARGC); -+ -+ if (Argc == 1) -+ Argv[0][strlen(Argv[0]) - 1] = '\0'; -+ -+ phydm_cmd_parser(pDM_Odm, Argv, Argc, flag, output, out_len); -+ -+ return 0; -+} -+#endif -+ -+ -+VOID -+phydm_fw_trace_handler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ /*u1Byte debug_trace_11byte[60];*/ -+ u1Byte freg_num, c2h_seq, buf_0 = 0; -+ -+ if (CmdLen > 12) -+ return; -+ -+ buf_0 = CmdBuf[0]; -+ freg_num = (buf_0 & 0xf); -+ c2h_seq = (buf_0 & 0xf0) >> 4; -+ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] freg_num = (( %d )), c2h_seq = (( %d ))\n", freg_num,c2h_seq ));*/ -+ -+ /*strncpy(debug_trace_11byte,&CmdBuf[1],(CmdLen-1));*/ -+ /*debug_trace_11byte[CmdLen-1] = '\0';*/ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] %s\n", debug_trace_11byte));*/ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] CmdLen = (( %d ))\n", CmdLen));*/ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] c2h_cmd_start = (( %d ))\n", pDM_Odm->c2h_cmd_start));*/ -+ -+ -+ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("pre_seq = (( %d )), current_seq = (( %d ))\n", pDM_Odm->pre_c2h_seq, c2h_seq));*/ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("fw_buff_is_enpty = (( %d ))\n", pDM_Odm->fw_buff_is_enpty));*/ -+ -+ if ((c2h_seq != pDM_Odm->pre_c2h_seq) && pDM_Odm->fw_buff_is_enpty == FALSE) { -+ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW Dbg Queue Overflow] %s\n", pDM_Odm->fw_debug_trace)); -+ pDM_Odm->c2h_cmd_start = 0; -+ } -+ -+ if ((CmdLen - 1) > (60 - pDM_Odm->c2h_cmd_start)) { -+ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW Dbg Queue error: wrong C2H length] %s\n", pDM_Odm->fw_debug_trace)); -+ pDM_Odm->c2h_cmd_start = 0; -+ return; -+ } -+ -+ strncpy((char *)&(pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start]), (char *)&CmdBuf[1], (CmdLen-1)); -+ pDM_Odm->c2h_cmd_start += (CmdLen - 1); -+ pDM_Odm->fw_buff_is_enpty = FALSE; -+ -+ if (freg_num == 0 || pDM_Odm->c2h_cmd_start >= 60) { -+ if (pDM_Odm->c2h_cmd_start < 60) -+ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; -+ else -+ pDM_Odm->fw_debug_trace[59] = '\0'; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s\n", pDM_Odm->fw_debug_trace)); -+ /*DbgPrint("[FW DBG Msg] %s\n", pDM_Odm->fw_debug_trace);*/ -+ pDM_Odm->c2h_cmd_start = 0; -+ pDM_Odm->fw_buff_is_enpty = TRUE; -+ } -+ -+ pDM_Odm->pre_c2h_seq = c2h_seq; -+} -+ -+VOID -+phydm_fw_trace_handler_code( -+ IN PVOID pDM_VOID, -+ IN pu1Byte Buffer, -+ IN u1Byte CmdLen -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte function = Buffer[0]; -+ u1Byte dbg_num = Buffer[1]; -+ u2Byte content_0 = (((u2Byte)Buffer[3])<<8)|((u2Byte)Buffer[2]); -+ u2Byte content_1 = (((u2Byte)Buffer[5])<<8)|((u2Byte)Buffer[4]); -+ u2Byte content_2 = (((u2Byte)Buffer[7])<<8)|((u2Byte)Buffer[6]); -+ u2Byte content_3 = (((u2Byte)Buffer[9])<<8)|((u2Byte)Buffer[8]); -+ u2Byte content_4 = (((u2Byte)Buffer[11])<<8)|((u2Byte)Buffer[10]); -+ -+ if(CmdLen >12) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW Msg] Invalid cmd length (( %d )) >12 \n", CmdLen)); -+ } -+ -+ //ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW Msg] Func=((%d)), num=((%d)), ct_0=((%d)), ct_1=((%d)), ct_2=((%d)), ct_3=((%d)), ct_4=((%d))\n", -+ // function, dbg_num, content_0, content_1, content_2, content_3, content_4)); -+ -+ /*--------------------------------------------*/ -+ if(function == RATE_DECISION) { -+ if(dbg_num == 0) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n", content_1, content_2)); -+ } else if(content_0 == 2) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n", content_1, content_2, content_3, content_4)); -+ } else if(content_0 == 3) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", content_1, content_2, content_3, content_4)); -+ } -+ } else if(dbg_num == 1) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RTY[0,1,2,3]=[ %d, %d, %d, %d ] \n", content_1, content_2, content_3, content_4)); -+ } else if(content_0 == 2) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RTY[4]=[ %d ], drop=((%d)), total=((%d)), current_rate=((0x%x))\n", content_1, content_2, content_3, content_4)); -+ } else if(content_0 == 3) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] penality_idx=((%d ))\n", content_1)); -+ } -+ } -+ -+ else if(dbg_num == 3) { -+ if (content_0 == 1) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4)); -+ else if (content_0 == 2) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4)); -+ else if (content_0 == 3) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) ((Rate Down Hold)) RA_CNT=((%d))\n", content_1)); -+ else if (content_0 == 4) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n", content_1)); -+ else if (content_0 == 8) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", content_1)); -+ } -+ -+ else if(dbg_num == 5) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] (( UP)) Nsc=((%d)), N_High=((%d))\n", content_1, content_2)); -+ } else if(content_0 == 2) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((DOWN)) Nsc=((%d)), N_Low=((%d))\n", content_1, content_2)); -+ } else if(content_0 == 3) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", content_1, content_2, content_3, content_4)); -+ } -+ } -+ else if(dbg_num == 0x60) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n", content_1, content_2)); -+ } else if(content_0 == 4) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", content_1, content_2, content_3, content_4)); -+ } else if(content_0 == 5) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", content_1, content_2, content_3, content_4)); -+ } -+ } -+ else if(dbg_num == 0xff) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("\n\n")); -+ } -+ } -+ -+ } -+ /*--------------------------------------------*/ -+ else if (function == INIT_RA_TABLE){ -+ if(dbg_num == 3) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", content_0)); -+ } -+ -+ } -+ /*--------------------------------------------*/ -+ else if (function == RATE_UP) { -+ if(dbg_num == 2) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Highest rate -> return)), macid=((%d)) Nsc=((%d))\n", content_1, content_2)); -+ } -+ } else if(dbg_num == 5) { -+ if (content_0 == 0) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n", content_1, content_2, content_3, content_4)); -+ else if (content_0 == 1) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", content_1, content_2, content_3, content_4)); -+ } -+ -+ } -+ /*--------------------------------------------*/ -+ else if (function == RATE_DOWN) { -+ if(dbg_num == 5) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDownStep] ((Rate Down)), macid=((%d)), rate=((0x%x)), BW=((%d))\n", content_1, content_2, content_3)); -+ } -+ } -+ } else if (function == TRY_DONE) { -+ if (dbg_num == 1) { -+ if (content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", content_1, content_2)); -+ /**/ -+ } -+ } else if (dbg_num == 2) { -+ if (content_0 == 1) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][Try Done] ((try fail )) macid=((%d)), Try_Done_cnt=((%d)), multi_try_rate=((%d))\n", content_1, content_2, content_3)); -+ } -+ } -+ /*--------------------------------------------*/ -+ else if (function == F_RATE_AP_RPT) { -+ if(dbg_num == 1) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n", content_3)); -+ } -+ } else if(dbg_num == 2) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] RTY_all=((%d))\n", content_1)); -+ } -+ } else if(dbg_num == 3) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2)); -+ } -+ } else if(dbg_num == 4) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2)); -+ } -+ } else if(dbg_num == 5) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2)); -+ } -+ } else if(dbg_num == 6) { -+ if(content_0 == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2)); -+ } -+ } -+ } -+ /*--------------------------------------------*/ -+ -+ -+} -+ -+VOID -+phydm_fw_trace_handler_8051( -+ IN PVOID pDM_VOID, -+ IN pu1Byte Buffer, -+ IN u1Byte CmdLen -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if 0 -+ if (CmdLen >= 3) -+ CmdBuf[CmdLen - 1] = '\0'; -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s\n", &(CmdBuf[3]))); -+#else -+ -+ int i = 0; -+ u1Byte Extend_c2hSubID = 0, Extend_c2hDbgLen = 0, Extend_c2hDbgSeq = 0; -+ u1Byte fw_debug_trace[128]; -+ pu1Byte Extend_c2hDbgContent = 0; -+ -+ if (CmdLen > 127) -+ return; -+ -+ Extend_c2hSubID = Buffer[0]; -+ Extend_c2hDbgLen = Buffer[1]; -+ Extend_c2hDbgContent = Buffer + 2; /*DbgSeq+DbgContent for show HEX*/ -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, Extend_c2hDbgLen=%d\n", -+ Extend_c2hSubID, Extend_c2hDbgLen)); -+ -+ RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", Extend_c2hDbgContent, CmdLen-2); -+ #endif -+ -+GoBackforAggreDbgPkt: -+ i = 0; -+ Extend_c2hDbgSeq = Buffer[2]; -+ Extend_c2hDbgContent = Buffer + 3; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", Extend_c2hDbgSeq)); -+ #endif -+ -+ for (; ; i++) { -+ fw_debug_trace[i] = Extend_c2hDbgContent[i]; -+ if (Extend_c2hDbgContent[i + 1] == '\0') { -+ fw_debug_trace[i + 1] = '\0'; -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s", &(fw_debug_trace[0]))); -+ break; -+ } else if (Extend_c2hDbgContent[i] == '\n') { -+ fw_debug_trace[i + 1] = '\0'; -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s", &(fw_debug_trace[0]))); -+ Buffer = Extend_c2hDbgContent + i + 3; -+ goto GoBackforAggreDbgPkt; -+ } -+ } -+ -+ -+#endif -+} -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++VOID ++PHYDM_InitDebugSetting( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ pDM_Odm->DebugLevel = ODM_DBG_TRACE; ++ ++ pDM_Odm->DebugComponents = ++ \ ++#if DBG ++//BB Functions ++// ODM_COMP_DIG | ++// ODM_COMP_RA_MASK | ++// ODM_COMP_DYNAMIC_TXPWR | ++// ODM_COMP_FA_CNT | ++// ODM_COMP_RSSI_MONITOR | ++// ODM_COMP_CCK_PD | ++/* ODM_COMP_ANT_DIV |*/ ++// ODM_COMP_PWR_SAVE | ++// ODM_COMP_PWR_TRAIN | ++// ODM_COMP_RATE_ADAPTIVE | ++// ODM_COMP_PATH_DIV | ++// ODM_COMP_DYNAMIC_PRICCA | ++// ODM_COMP_RXHP | ++// ODM_COMP_MP | ++// ODM_COMP_CFO_TRACKING | ++// ODM_COMP_ACS | ++// PHYDM_COMP_ADAPTIVITY | ++// PHYDM_COMP_RA_DBG | ++/* PHYDM_COMP_TXBF |*/ ++//MAC Functions ++// ODM_COMP_EDCA_TURBO | ++// ODM_COMP_EARLY_MODE | ++/* ODM_FW_DEBUG_TRACE |*/ ++//RF Functions ++// ODM_COMP_TX_PWR_TRACK | ++// ODM_COMP_RX_GAIN_TRACK | ++// ODM_COMP_CALIBRATION | ++//Common ++/* ODM_PHY_CONFIG |*/ ++// ODM_COMP_COMMON | ++// ODM_COMP_INIT | ++// ODM_COMP_PSD | ++/* ODM_COMP_NOISY_DETECT |*/ ++#endif ++ 0; ++ ++ pDM_Odm->fw_buff_is_enpty = TRUE; ++ pDM_Odm->pre_c2h_seq = 0; ++} ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++static u1Byte BbDbgBuf[BB_TMP_BUF_SIZE]; ++ ++VOID ++phydm_BB_RxHang_Info(IN PDM_ODM_T pDM_Odm) ++{ ++ u4Byte value32 = 0; ++ ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ return; ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF80 , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ /* dbg_port = state machine */ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x007); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "state machine", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = CCA-related*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x204); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "CCA-related", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ ++ /* dbg_port = edcca/rxd*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x278); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "edcca/rxd", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = rx_state/mux_state/ADC_MASK_OFDM*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x290); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx_state/mux_state/ADC_MASK_OFDM", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = bf-related*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x2B2); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "bf-related", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = bf-related*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x2B8); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "bf-related", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = txon/rxd*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA03); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "txon/rxd", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = l_rate/l_length*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA0B); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "l_rate/l_length", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = rxd/rxd_hit*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA0D); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rxd/rxd_hit", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = dis_cca*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAA0); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "dis_cca", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ ++ /* dbg_port = tx*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAB0); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "tx", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = rx plcp*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD0); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD1); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD2); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD3); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++} ++ ++VOID ++phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm) ++{ ++ ++ u1Byte RX_HT_BW, RX_VHT_BW, RXSC, RX_HT, RX_BW; ++ static u1Byte vRX_BW ; ++ u4Byte value32, value32_1, value32_2, value32_3; ++ s4Byte SFO_A, SFO_B, SFO_C, SFO_D; ++ s4Byte LFO_A, LFO_B, LFO_C, LFO_D; ++ static u1Byte MCSS, Tail, Parity, rsv, vrsv, idx, smooth, htsound, agg, stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, vNsts, vtxops, vrsv2, vbrsv, bf, vbcrc; ++ static u2Byte HLength, htcrc8, Length; ++ static u2Byte vpaid; ++ static u2Byte vLength, vhtcrc8, vMCSS, vTail, vbTail; ++ static u1Byte HMCSS, HRX_BW; ++ ++ ++ u1Byte pwDB; ++ s1Byte RXEVM_0, RXEVM_1, RXEVM_2 ; ++ u1Byte RF_gain_pathA, RF_gain_pathB, RF_gain_pathC, RF_gain_pathD; ++ u1Byte RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD; ++ s4Byte sig_power; ++ const char *RXHT_table[3] = {"legacy", "HT", "VHT"}; ++ const char *BW_table[3] = {"20M", "40M", "80M"}; ++ const char *RXSC_table[7] = {"duplicate/full bw", "usc20-1", "lsc20-1", "usc20-2", "lsc20-2", "usc40", "lsc40"}; ++ ++ const char *L_rate[8] = {"6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M"}; ++ ++ ++ /* ++ const double evm_comp_20M = 0.579919469776867; //10*log10(64.0/56.0) ++ const double evm_comp_40M = 0.503051183113957; //10*log10(128.0/114.0) ++ const double evm_comp_80M = 0.244245993314183; //10*log10(256.0/242.0) ++ const double evm_comp_160M = 0.244245993314183; //10*log10(512.0/484.0) ++ */ ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ return; ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s\n", "BB Report Info"); ++ DCMD_Printf(BbDbgBuf); ++ ++ /*BW & Mode Detection*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf80 , bMaskDWord); ++ value32_2 = value32; ++ RX_HT_BW = (u1Byte)(value32 & 0x1); ++ RX_VHT_BW = (u1Byte)((value32 >> 1) & 0x3); ++ RXSC = (u1Byte)(value32 & 0x78); ++ value32_1 = (value32 & 0x180) >> 7; ++ RX_HT = (u1Byte)(value32_1); ++ /* ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "F80", value32_2); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT_BW", RX_HT_BW); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_VHT_BW", RX_VHT_BW); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_SC", RXSC); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT", RX_HT); ++ DCMD_Printf(BbDbgBuf); ++ */ ++ ++ /*rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n RX_HT:%s ", RXHT_table[RX_HT]);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ RX_BW = 0; ++ ++ if (RX_HT == 2) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: VHT Mode"); ++ DCMD_Printf(BbDbgBuf); ++ if (RX_VHT_BW == 0) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); ++ DCMD_Printf(BbDbgBuf); ++ } else if (RX_VHT_BW == 1) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); ++ DCMD_Printf(BbDbgBuf); ++ } else { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=80M"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ RX_BW = RX_VHT_BW; ++ } else if (RX_HT == 1) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: HT Mode"); ++ DCMD_Printf(BbDbgBuf); ++ if (RX_HT_BW == 0) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); ++ DCMD_Printf(BbDbgBuf); ++ } else if (RX_HT_BW == 1) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ RX_BW = RX_HT_BW; ++ } else { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: Legeacy Mode"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ if (RX_HT != 0) { ++ if (RXSC == 0) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n duplicate/full bw"); ++ else if (RXSC == 1) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-1"); ++ else if (RXSC == 2) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-1"); ++ else if (RXSC == 3) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-2"); ++ else if (RXSC == 4) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-2"); ++ else if (RXSC == 9) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc40"); ++ else if (RXSC == 10) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc40"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ /* ++ if(RX_HT == 2){ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_VHT_BW]); ++ RX_BW = RX_VHT_BW; ++ } ++ else if(RX_HT == 1){ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_HT_BW]); ++ RX_BW = RX_HT_BW; ++ } ++ else ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, ""); ++ ++ DCMD_Printf(BbDbgBuf); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " RXSC:%s", RXSC_table[RXSC]); ++ DCMD_Printf(BbDbgBuf); ++ */ ++ ++ ++/* rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "dB Conversion: 10log(65)", ODM_PWdB_Conversion(65,10,0));*/ ++/* DCMD_Printf(BbDbgBuf);*/ ++ ++ /* RX signal power and AGC related info*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF90 , bMaskDWord); ++ pwDB = (u1Byte)((value32 & bMaskByte1) >> 8); ++ pwDB = pwDB >> 1; ++ sig_power = -110 + pwDB; ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd14 , bMaskDWord); ++ RX_SNR_pathA = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathA = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathA *= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd54 , bMaskDWord); ++ RX_SNR_pathB = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathB = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathB *= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd94 , bMaskDWord); ++ RX_SNR_pathC = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathC = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathC *= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xdd4 , bMaskDWord); ++ RX_SNR_pathD = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathD = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathD *= 2; ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", RF_gain_pathA, RF_gain_pathA, RF_gain_pathC, RF_gain_pathD); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ /* RX Counter related info*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF08, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM CCA Counter", ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFD0, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM SBD Fail Counter", value32&0xFFFF); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFC4, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFCC, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "CCK CCA Counter", value32&0xFFFF); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFBC, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "LSIG (\"Parity Fail\"/\"Rate Illegal\") Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xFC8, bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xFC0, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT counter", ((value32_2&0xFFFF0000)>>16), value32_1&0xFFFF); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ /* PostFFT related info*/ ++ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF8c , bMaskDWord); ++ RXEVM_0 = (s1Byte)((value32 & bMaskByte2) >> 16); ++ RXEVM_0 /= 2; ++ if (RXEVM_0 < -63) ++ RXEVM_0 = 0; ++ ++ DCMD_Printf(BbDbgBuf); ++ RXEVM_1 = (s1Byte)((value32 & bMaskByte3) >> 24); ++ RXEVM_1 /= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF88 , bMaskDWord); ++ RXEVM_2 = (s1Byte)((value32 & bMaskByte2) >> 16); ++ RXEVM_2 /= 2; ++ ++ if (RXEVM_1 < -63) ++ RXEVM_1 = 0; ++ if (RXEVM_2 < -63) ++ RXEVM_2 = 0; ++ ++ /* ++ if(RX_BW == 0){ ++ RXEVM_0 -= evm_comp_20M; ++ RXEVM_1 -= evm_comp_20M; ++ RXEVM_2 -= evm_comp_20M; ++ } ++ else if(RX_BW == 1){ ++ RXEVM_0 -= evm_comp_40M; ++ RXEVM_1 -= evm_comp_40M; ++ RXEVM_2 -= evm_comp_40M; ++ } ++ else if (RX_BW == 2){ ++ RXEVM_0 -= evm_comp_80M; ++ RXEVM_1 -= evm_comp_80M; ++ RXEVM_2 -= evm_comp_80M; ++ } ++ */ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", RXEVM_0, RXEVM_1, RXEVM_2); ++ DCMD_Printf(BbDbgBuf); ++ ++/* value32 = ODM_GetBBReg(pDM_Odm, 0xD14 ,bMaskDWord);*/ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD); ++ DCMD_Printf(BbDbgBuf); ++/* rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "B_RXSNR", (value32&0xFF00)>>9);*/ ++/* DCMD_Printf(BbDbgBuf);*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF8C , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ //BW & Mode Detection ++ ++ //Reset Page F Counter ++ ODM_SetBBReg(pDM_Odm, 0xB58 , BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, 0xB58 , BIT0, 0); ++ ++ //CFO Report Info ++ //Short CFO ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd0c , bMaskDWord); ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd4c , bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd8c , bMaskDWord); ++ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdcc , bMaskDWord); ++ ++ SFO_A = (s4Byte)(value32 & bMask12Bits); ++ SFO_B = (s4Byte)(value32_1 & bMask12Bits); ++ SFO_C = (s4Byte)(value32_2 & bMask12Bits); ++ SFO_D = (s4Byte)(value32_3 & bMask12Bits); ++ ++ LFO_A = (s4Byte)(value32 >> 16); ++ LFO_B = (s4Byte)(value32_1 >> 16); ++ LFO_C = (s4Byte)(value32_2 >> 16); ++ LFO_D = (s4Byte)(value32_3 >> 16); ++ ++ //SFO 2's to dec ++ if (SFO_A > 2047) ++ SFO_A = SFO_A - 4096; ++ SFO_A = (SFO_A * 312500) / 2048; ++ ++ if (SFO_B > 2047) ++ SFO_B = SFO_B - 4096; ++ SFO_B = (SFO_B * 312500) / 2048; ++ if (SFO_C > 2047) ++ SFO_C = SFO_C - 4096; ++ SFO_C = (SFO_C * 312500) / 2048; ++ if (SFO_D > 2047) ++ SFO_D = SFO_D - 4096; ++ SFO_D = (SFO_D * 312500) / 2048; ++ ++ //LFO 2's to dec ++ ++ if (LFO_A > 4095) ++ LFO_A = LFO_A - 8192; ++ ++ if (LFO_B > 4095) ++ LFO_B = LFO_B - 8192; ++ ++ if (LFO_C > 4095) ++ LFO_C = LFO_C - 8192; ++ ++ if (LFO_D > 4095) ++ LFO_D = LFO_D - 8192; ++ LFO_A = LFO_A * 312500 / 4096; ++ LFO_B = LFO_B * 312500 / 4096; ++ LFO_C = LFO_C * 312500 / 4096; ++ LFO_D = LFO_D * 312500 / 4096; ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "CFO Report Info"); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Short CFO(Hz) ", SFO_A, SFO_B, SFO_C, SFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Long CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ //SCFO ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd10 , bMaskDWord); ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd50 , bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd90 , bMaskDWord); ++ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd0 , bMaskDWord); ++ ++ SFO_A = (s4Byte)(value32 & 0x7ff); ++ SFO_B = (s4Byte)(value32_1 & 0x7ff); ++ SFO_C = (s4Byte)(value32_2 & 0x7ff); ++ SFO_D = (s4Byte)(value32_3 & 0x7ff); ++ ++ if (SFO_A > 1023) ++ SFO_A = SFO_A - 2048; ++ ++ if (SFO_B > 2047) ++ SFO_B = SFO_B - 4096; ++ ++ if (SFO_C > 2047) ++ SFO_C = SFO_C - 4096; ++ ++ if (SFO_D > 2047) ++ SFO_D = SFO_D - 4096; ++ ++ SFO_A = SFO_A * 312500 / 1024; ++ SFO_B = SFO_B * 312500 / 1024; ++ SFO_C = SFO_C * 312500 / 1024; ++ SFO_D = SFO_D * 312500 / 1024; ++ ++ LFO_A = (s4Byte)(value32 >> 16); ++ LFO_B = (s4Byte)(value32_1 >> 16); ++ LFO_C = (s4Byte)(value32_2 >> 16); ++ LFO_D = (s4Byte)(value32_3 >> 16); ++ ++ if (LFO_A > 4095) ++ LFO_A = LFO_A - 8192; ++ ++ if (LFO_B > 4095) ++ LFO_B = LFO_B - 8192; ++ ++ if (LFO_C > 4095) ++ LFO_C = LFO_C - 8192; ++ ++ if (LFO_D > 4095) ++ LFO_D = LFO_D - 8192; ++ LFO_A = LFO_A * 312500 / 4096; ++ LFO_B = LFO_B * 312500 / 4096; ++ LFO_C = LFO_C * 312500 / 4096; ++ LFO_D = LFO_D * 312500 / 4096; ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Value SCFO(Hz) ", SFO_A, SFO_B, SFO_C, SFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " ACQ CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd14 , bMaskDWord); ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd54 , bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd94 , bMaskDWord); ++ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd4 , bMaskDWord); ++ ++ LFO_A = (s4Byte)(value32 >> 16); ++ LFO_B = (s4Byte)(value32_1 >> 16); ++ LFO_C = (s4Byte)(value32_2 >> 16); ++ LFO_D = (s4Byte)(value32_3 >> 16); ++ ++ if (LFO_A > 4095) ++ LFO_A = LFO_A - 8192; ++ ++ if (LFO_B > 4095) ++ LFO_B = LFO_B - 8192; ++ ++ if (LFO_C > 4095) ++ LFO_C = LFO_C - 8192; ++ ++ if (LFO_D > 4095) ++ LFO_D = LFO_D - 8192; ++ ++ LFO_A = LFO_A * 312500 / 4096; ++ LFO_B = LFO_B * 312500 / 4096; ++ LFO_C = LFO_C * 312500 / 4096; ++ LFO_D = LFO_D * 312500 / 4096; ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " End CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf20 , bMaskDWord); /*L SIG*/ ++ ++ Tail = (u1Byte)((value32 & 0xfc0000) >> 16); ++ Parity = (u1Byte)((value32 & 0x20000) >> 16); ++ Length = (u2Byte)((value32 & 0x1ffe00) >> 8); ++ rsv = (u1Byte)(value32 & 0x10); ++ MCSS = (u1Byte)(value32 & 0x0f); ++ ++ switch (MCSS) { ++ case 0x0b: ++ idx = 0; ++ break; ++ case 0x0f: ++ idx = 1; ++ break; ++ case 0x0a: ++ idx = 2; ++ break; ++ case 0x0e: ++ idx = 3; ++ break; ++ case 0x09: ++ idx = 4; ++ break; ++ case 0x08: ++ idx = 5; ++ break; ++ case 0x0c: ++ idx = 6; ++ break; ++ default: ++ idx = 6; ++ break; ++ ++ } ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "L-SIG"); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Rate:%s", L_rate[idx]); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x/ %x /%x", " Rsv/Length/Parity", rsv, RX_BW, Length); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG1"); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf2c , bMaskDWord); /*HT SIG*/ ++ if (RX_HT == 1) { ++ ++ HMCSS = (u1Byte)(value32 & 0x7F); ++ HRX_BW = (u1Byte)(value32 & 0x80); ++ HLength = (u2Byte)((value32 >> 8) & 0xffff); ++ } ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x", " MCS/BW/Length", HMCSS, HRX_BW, HLength); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG2"); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf30 , bMaskDWord); /*HT SIG*/ ++ ++ if (RX_HT == 1) { ++ smooth = (u1Byte)(value32 & 0x01); ++ htsound = (u1Byte)(value32 & 0x02); ++ rsv = (u1Byte)(value32 & 0x04); ++ agg = (u1Byte)(value32 & 0x08); ++ stbc = (u1Byte)(value32 & 0x30); ++ fec = (u1Byte)(value32 & 0x40); ++ sgi = (u1Byte)(value32 & 0x80); ++ htltf = (u1Byte)((value32 & 0x300) >> 8); ++ htcrc8 = (u2Byte)((value32 & 0x3fc00) >> 8); ++ Tail = (u1Byte)((value32 & 0xfc0000) >> 16); ++ ++ ++ } ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x", " Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", smooth, htsound, rsv, agg, stbc, fec); ++ DCMD_Printf(BbDbgBuf); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x", " SGI/E-HT-LTFs/CRC/Tail", sgi, htltf, htcrc8, Tail); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A1"); ++ DCMD_Printf(BbDbgBuf); ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf2c , bMaskDWord); /*VHT SIG A1*/ ++ if (RX_HT == 2) { ++ /* value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord);*/ ++ vRX_BW = (u1Byte)(value32 & 0x03); ++ vrsv = (u1Byte)(value32 & 0x04); ++ vstbc = (u1Byte)(value32 & 0x08); ++ vgid = (u1Byte)((value32 & 0x3f0) >> 4); ++ vNsts = (u1Byte)(((value32 & 0x1c00) >> 8) + 1); ++ vpaid = (u2Byte)(value32 & 0x3fe); ++ vtxops = (u1Byte)((value32 & 0x400000) >> 20); ++ vrsv2 = (u1Byte)((value32 & 0x800000) >> 20); ++ } ++ ++ /*rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F2C", value32);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x /%x /%x", " BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", vRX_BW, vrsv, vstbc, vgid, vNsts, vpaid, vtxops, vrsv2); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A2"); ++ DCMD_Printf(BbDbgBuf); ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf30 , bMaskDWord); /*VHT SIG*/ ++ ++ ++ if (RX_HT == 2) { ++ /*value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); */ /*VHT SIG*/ ++ ++ //sgi=(u1Byte)(value32&0x01); ++ sgiext = (u1Byte)(value32 & 0x03); ++ //fec = (u1Byte)(value32&0x04); ++ fecext = (u1Byte)(value32 & 0x0C); ++ ++ vMCSS = (u1Byte)(value32 & 0xf0); ++ bf = (u1Byte)((value32 & 0x100) >> 8); ++ vrsv = (u1Byte)((value32 & 0x200) >> 8); ++ vhtcrc8 = (u2Byte)((value32 & 0x3fc00) >> 8); ++ vTail = (u1Byte)((value32 & 0xfc0000) >> 16); ++ } ++ /*rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F30", value32);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x/ %x", " SGI/FEC/MCS/BF/Rsv/CRC/Tail", sgiext, fecext, vMCSS, bf, vrsv, vhtcrc8, vTail); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-B"); ++ DCMD_Printf(BbDbgBuf); ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf34 , bMaskDWord); /*VHT SIG*/ ++ { ++ vLength = (u2Byte)(value32 & 0x1fffff); ++ vbrsv = (u1Byte)((value32 & 0x600000) >> 20); ++ vbTail = (u2Byte)((value32 & 0x1f800000) >> 20); ++ vbcrc = (u1Byte)((value32 & 0x80000000) >> 28); ++ ++ } ++ /*rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F34", value32);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/", " Length/Rsv/Tail/CRC", vLength, vbrsv, vbTail, vbcrc); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++} ++ ++void phydm_sbd_check( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ static u4Byte pkt_cnt = 0; ++ static BOOLEAN sbd_state = 0; ++ u4Byte sym_count, count, value32; ++ ++ if (sbd_state == 0) { ++ pkt_cnt++; ++ if (pkt_cnt % 5 == 0) { /*read SBD conter once every 5 packets*/ ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer, 0); /*ms*/ ++ sbd_state = 1; ++ } ++ } else { /*read counter*/ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF98, bMaskDWord); ++ sym_count = (value32 & 0x7C000000) >> 26; ++ count = (value32 & 0x3F00000) >> 20; ++ DbgPrint("#SBD# sym_count %d count %d\n", sym_count, count); ++ sbd_state = 0; ++ } ++} ++ ++void phydm_sbd_callback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++#if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pDM_Odm->sbdcnt_workitem); ++#else ++ phydm_sbd_check(pDM_Odm); ++#endif ++} ++ ++void phydm_sbd_workitem_callback( ++ IN PVOID pContext ++) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ phydm_sbd_check(pDM_Odm); ++} ++#endif ++VOID ++phydm_BasicDbgMessage ++( ++ IN PVOID pDM_VOID ++) ++{ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(pDM_Odm , PHYDM_FALSEALMCNT); ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ u1Byte legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; ++ u1Byte vht_en = ((pDM_Odm->RxRate) >= ODM_RATEVHTSS1MCS0) ? 1 : 0; ++ ++ if (pDM_Odm->RxRate <= ODM_RATE11M) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCK AGC Report] LNA_idx = 0x%x, VGA_idx = 0x%x\n", ++ pDM_Odm->cck_lna_idx, pDM_Odm->cck_vga_idx)); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM AGC Report] { 0x%x, 0x%x, 0x%x, 0x%x }\n", ++ pDM_Odm->ofdm_agc_idx[0], pDM_Odm->ofdm_agc_idx[1], pDM_Odm->ofdm_agc_idx[2], pDM_Odm->ofdm_agc_idx[3])); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI: { %d, %d, %d, %d }, RxRate: { %s%s%s%s%d%s}\n", ++ (pDM_Odm->RSSI_A == 0xff) ? 0 : pDM_Odm->RSSI_A , ++ (pDM_Odm->RSSI_B == 0xff) ? 0 : pDM_Odm->RSSI_B , ++ (pDM_Odm->RSSI_C == 0xff) ? 0 : pDM_Odm->RSSI_C, ++ (pDM_Odm->RSSI_D == 0xff) ? 0 : pDM_Odm->RSSI_D, ++ ((pDM_Odm->RxRate >= ODM_RATEVHTSS1MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", ++ ((pDM_Odm->RxRate >= ODM_RATEVHTSS2MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", ++ ((pDM_Odm->RxRate >= ODM_RATEVHTSS3MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", ++ (pDM_Odm->RxRate >= ODM_RATEMCS0) ? "MCS " : "", ++ (vht_en) ? ((pDM_Odm->RxRate - ODM_RATEVHTSS1MCS0)%10) : ((pDM_Odm->RxRate >= ODM_RATEMCS0) ? (pDM_Odm->RxRate - ODM_RATEMCS0) : ((pDM_Odm->RxRate <= ODM_RATE54M)?legacy_table[pDM_Odm->RxRate]:0)), ++ (pDM_Odm->RxRate >= ODM_RATEMCS0) ? "" : "M")); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", ++ FalseAlmCnt->Cnt_CCK_CCA, FalseAlmCnt->Cnt_OFDM_CCA, FalseAlmCnt->Cnt_CCA_all)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", ++ FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n", ++ FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail, FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked = %d, RSSI_Min = %d, CurrentIGI = 0x%x, bNoisy=%d\n\n", ++ pDM_Odm->bLinked, pDM_Odm->RSSI_Min, pDM_DigTable->CurIGValue, pDM_Odm->NoisyDecision)); ++/* ++ temp_reg = ODM_GetBBReg(pDM_Odm, 0xDD0, bMaskByte0); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDD0 = 0x%x\n",temp_reg)); ++ ++ temp_reg = ODM_GetBBReg(pDM_Odm, 0xDDc, bMaskByte1); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDDD = 0x%x\n",temp_reg)); ++ ++ temp_reg = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskByte0); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xC50 = 0x%x\n",temp_reg)); ++ ++ temp_reg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0x3fe0); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RF 0x0[13:5] = 0x%x\n\n",temp_reg)); ++*/ ++ ++#endif ++} ++ ++ ++VOID phydm_BasicProfile( ++ IN PVOID pDM_VOID, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ char *Cut = NULL; ++ char *ICType = NULL; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ u4Byte commit_ver = 0; ++ u4Byte date = 0; ++ char *commit_by = NULL; ++ u4Byte release_ver = 0; ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% Basic Profile %")); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8192C) ++ ICType = "RTL8192C"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8192D) ++ ICType = "RTL8192D"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8723A) ++ ICType = "RTL8723A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ ICType = "RTL8188E"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8812) ++ ICType = "RTL8812A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8821) ++ ICType = "RTL8821A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ ICType = "RTL8192E"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ ICType = "RTL8723B"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ ICType = "RTL8814A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8881A) ++ ICType = "RTL8881A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ ICType = "RTL8821B"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ ICType = "RTL8822B"; ++#if (RTL8703B_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ ICType = "RTL8703B"; ++ date = RELEASE_DATE_8703B; ++ commit_by = COMMIT_BY_8703B; ++ release_ver = RELEASE_VERSION_8703B; ++ } ++#endif ++ else if (pDM_Odm->SupportICType == ODM_RTL8195A) ++ ICType = "RTL8195A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ ICType = "RTL8188F"; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s (MP Chip: %s)\n", "IC Type", ICType, pDM_Odm->bIsMPChip ? "Yes" : "No")); ++ ++ if (pDM_Odm->CutVersion == ODM_CUT_A) ++ Cut = "A"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_B) ++ Cut = "B"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_C) ++ Cut = "C"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_D) ++ Cut = "D"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_E) ++ Cut = "E"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_F) ++ Cut = "F"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_I) ++ Cut = "I"; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Cut Version", Cut)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Version", ODM_GetHWImgVersion(pDM_Odm))); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Commit date", date)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "PHY Parameter Commit by", commit_by)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Release Version", release_ver)); ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", Adapter->MgntInfo.FirmwareVersion, Adapter->MgntInfo.FirmwareSubVersion)); ++ } ++#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ { ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", priv->pshare->fw_version, priv->pshare->fw_sub_version)); ++ } ++#else ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", pHalData->FirmwareVersion, pHalData->FirmwareSubVersion)); ++ } ++#endif ++ //1 PHY DM Version List ++ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% PHYDM Version %")); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Adaptivity", ADAPTIVITY_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "DIG", DIG_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Dynamic BB PowerSaving", DYNAMIC_BBPWRSAV_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "CFO Tracking", CFO_TRACKING_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Antenna Diversity", ANTDIV_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Power Tracking", POWRTRACKING_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Dynamic TxPower", DYNAMIC_TXPWR_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "RA Info", RAINFO_VERSION)); ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Antenna Detection", ANTDECT_VERSION)); ++#endif ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Auto Channel Selection", ACS_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "EDCA Turbo", EDCATURBO_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Path Diversity", PATHDIV_VERSION)); ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "RxHP", RXHP_VERSION)); ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "PHY config 8822B", PHY_CONFIG_VERSION_8822B)); ++ ++#endif ++ *_used = used; ++ *_out_len = out_len; ++ ++} ++ ++VOID ++phydm_fw_trace_en_h2c( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN enable, ++ IN u4Byte monitor_mode, ++ IN u4Byte macid ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte H2C_Parameter[3] = {0}; ++ ++ H2C_Parameter[0] = enable; ++ H2C_Parameter[1] = (u1Byte)monitor_mode; ++ H2C_Parameter[2] = (u1Byte)macid; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("---->\n")); ++ if (monitor_mode == 0){ ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[H2C] FW_debug_en: (( %d ))\n", enable)); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", enable, monitor_mode, macid)); ++ } ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_FW_TRACE_EN, 3, H2C_Parameter); ++} ++ ++VOID ++phydm_get_per_path_txagc( ++ IN PVOID pDM_VOID, ++ IN u1Byte path, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte rate_idx; ++ u1Byte txagc; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++#if (RTL8822B_SUPPORT == 1) ++ if ((pDM_Odm->SupportICType & ODM_RTL8822B) && (path <= ODM_RF_PATH_B)) { ++ for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) { ++ if (rate_idx == ODM_RATE1M) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s\n", "CCK====>")); ++ else if (rate_idx == ODM_RATE6M) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "OFDM====>")); ++ else if (rate_idx == ODM_RATEMCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 1ss====>")); ++ else if (rate_idx == ODM_RATEMCS8) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 2ss====>")); ++ else if (rate_idx == ODM_RATEMCS16) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 3ss====>")); ++ else if (rate_idx == ODM_RATEMCS24) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 4ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS1MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 1ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS2MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 2ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS3MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 3ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS4MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 4ss====>")); ++ ++ txagc = config_phydm_read_txagc_8822b(pDM_Odm, path, rate_idx); ++ if (config_phydm_read_txagc_check_8822b(txagc)) ++ PHYDM_SNPRINTF((output + used, out_len - used, " 0x%02x ", txagc)); ++ else ++ PHYDM_SNPRINTF((output + used, out_len - used, " 0x%s ", "xx")); ++ } ++ } ++#endif ++} ++ ++ ++VOID ++phydm_get_txagc( ++ IN PVOID pDM_VOID, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ /* Path-A */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "Path-A====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_A, _used, output, _out_len); ++ ++ /* Path-B */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-B====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_B, _used, output, _out_len); ++ ++ /* Path-C */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-C====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_C, _used, output, _out_len); ++ ++ /* Path-D */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-D====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_D, _used, output, _out_len); ++ ++} ++ ++VOID ++phydm_set_txagc( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ if (dm_value[0] <= 1) { ++ if (phydm_write_txagc_1byte_8822b(pDM_Odm, dm_value[2], dm_value[0], (u1Byte)dm_value[1])) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s%x\n", "Write path-", dm_value[0], "rate index-0x", dm_value[1], " = 0x", dm_value[2])); ++ else ++ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s\n", "Write path-", (dm_value[0] & 0x1), "rate index-0x", (dm_value[1] & 0x7f), " fail")); ++ } else { ++ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s\n", "Write path-", (dm_value[0] & 0x1), "rate index-0x", (dm_value[1] & 0x7f), " fail")); ++ } ++ } ++#endif ++} ++ ++VOID ++odm_debug_trace( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u8Byte pre_debug_components, one = 1; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ pre_debug_components = pDM_Odm->DebugComponents; ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================")); ++ if (dm_value[0] == 100) { ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Debug Message] PhyDM Selection")); ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); ++ PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))DIG\n", ((pDM_Odm->DebugComponents & ODM_COMP_DIG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))RA_MASK\n", ((pDM_Odm->DebugComponents & ODM_COMP_RA_MASK) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))DYNAMIC_TXPWR\n", ((pDM_Odm->DebugComponents & ODM_COMP_DYNAMIC_TXPWR) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))FA_CNT\n", ((pDM_Odm->DebugComponents & ODM_COMP_FA_CNT) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "04. (( %s ))RSSI_MONITOR\n", ((pDM_Odm->DebugComponents & ODM_COMP_RSSI_MONITOR) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "05. (( %s ))CCK_PD\n", ((pDM_Odm->DebugComponents & ODM_COMP_CCK_PD) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "06. (( %s ))ANT_DIV\n", ((pDM_Odm->DebugComponents & ODM_COMP_ANT_DIV) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "07. (( %s ))PWR_SAVE\n", ((pDM_Odm->DebugComponents & ODM_COMP_PWR_SAVE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "08. (( %s ))PWR_TRAIN\n", ((pDM_Odm->DebugComponents & ODM_COMP_PWR_TRAIN) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "09. (( %s ))RATE_ADAPTIVE\n", ((pDM_Odm->DebugComponents & ODM_COMP_RATE_ADAPTIVE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "10. (( %s ))PATH_DIV\n", ((pDM_Odm->DebugComponents & ODM_COMP_PATH_DIV) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "11. (( %s ))PSD\n", ((pDM_Odm->DebugComponents & ODM_COMP_PSD) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "12. (( %s ))DYNAMIC_PRICCA\n", ((pDM_Odm->DebugComponents & ODM_COMP_DYNAMIC_PRICCA) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "13. (( %s ))RXHP\n", ((pDM_Odm->DebugComponents & ODM_COMP_RXHP) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "14. (( %s ))MP\n", ((pDM_Odm->DebugComponents & ODM_COMP_MP) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))CFO_TRACKING\n", ((pDM_Odm->DebugComponents & ODM_COMP_CFO_TRACKING) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))ACS\n", ((pDM_Odm->DebugComponents & ODM_COMP_ACS) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))ADAPTIVITY\n", ((pDM_Odm->DebugComponents & PHYDM_COMP_ADAPTIVITY) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))RA_DBG\n", ((pDM_Odm->DebugComponents & PHYDM_COMP_RA_DBG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))EDCA_TURBO\n", ((pDM_Odm->DebugComponents & ODM_COMP_EDCA_TURBO) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "21. (( %s ))EARLY_MODE\n", ((pDM_Odm->DebugComponents & ODM_COMP_EARLY_MODE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "22. (( %s ))FW_DEBUG_TRACE\n", ((pDM_Odm->DebugComponents & ODM_FW_DEBUG_TRACE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "24. (( %s ))TX_PWR_TRACK\n", ((pDM_Odm->DebugComponents & ODM_COMP_TX_PWR_TRACK) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "25. (( %s ))RX_GAIN_TRACK\n", ((pDM_Odm->DebugComponents & ODM_COMP_RX_GAIN_TRACK) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "26. (( %s ))CALIBRATION\n", ((pDM_Odm->DebugComponents & ODM_COMP_CALIBRATION) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "28. (( %s ))PHY_CONFIG\n", ((pDM_Odm->DebugComponents & ODM_PHY_CONFIG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "29. (( %s ))BEAMFORMING_DEBUG\n", ((pDM_Odm->DebugComponents & BEAMFORMING_DEBUG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "30. (( %s ))COMMON\n", ((pDM_Odm->DebugComponents & ODM_COMP_COMMON) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "31. (( %s ))INIT\n", ((pDM_Odm->DebugComponents & ODM_COMP_INIT) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); ++ ++ } else if (dm_value[0] == 101) { ++ pDM_Odm->DebugComponents = 0; ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Disable all debug components")); ++ } else { ++ if (dm_value[1] == 1) { /*enable*/ ++ pDM_Odm->DebugComponents |= (one << dm_value[0]); ++ ++ if (dm_value[0] == 22) { /*FW trace function*/ ++ phydm_fw_trace_en_h2c(pDM_Odm, 1, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/ ++ } ++ } else if (dm_value[1] == 2) { /*disable*/ ++ pDM_Odm->DebugComponents &= ~(one << dm_value[0]); ++ ++ if (dm_value[0] == 22) { /*FW trace function*/ ++ phydm_fw_trace_en_h2c(pDM_Odm, 0, dm_value[2], dm_value[3]); /*H2C to disable C2H Msg*/ ++ } ++ } else ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!] 1:enable, 2:disable")); ++ } ++ PHYDM_SNPRINTF((output + used, out_len - used, "pre-DbgComponents = 0x%x\n", (u4Byte)pre_debug_components)); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Curr-DbgComponents = 0x%x\n", ((u4Byte)pDM_Odm->DebugComponents))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); ++} ++ ++VOID ++phydm_DumpBbReg( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Addr = 0; ++ ++ /* BB Reg */ ++ for (Addr = 0x800; Addr < 0xfff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8822B|ODM_RTL8814A)) { ++ ++ if (pDM_Odm->RFType > ODM_2T2R) { ++ for (Addr = 0x1800; Addr < 0x18ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ } ++ ++ if (pDM_Odm->RFType > ODM_3T3R) { ++ for (Addr = 0x1a00; Addr < 0x1aff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ } ++ ++ for (Addr = 0x1900; Addr < 0x19ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ for (Addr = 0x1c00; Addr < 0x1cff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ for (Addr = 0x1f00; Addr < 0x1fff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ } ++} ++ ++VOID ++phydm_DumpAllReg( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Addr = 0; ++ ++ /* dump MAC register */ ++ DbgPrint("MAC==========\n"); ++ for (Addr = 0; Addr < 0x7ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ for (Addr = 1000; Addr < 0x17ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ /* dump BB register */ ++ DbgPrint("BB==========\n"); ++ phydm_DumpBbReg(pDM_Odm); ++ ++ /* dump RF register */ ++ DbgPrint("RF-A==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, Addr, bRFRegOffsetMask)); ++ ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ DbgPrint("RF-B==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, Addr, bRFRegOffsetMask)); ++ } ++ ++ if (pDM_Odm->RFType > ODM_2T2R) { ++ DbgPrint("RF-C==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_C, Addr, bRFRegOffsetMask)); ++ } ++ ++ if (pDM_Odm->RFType > ODM_3T3R) { ++ DbgPrint("RF-D==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_D, Addr, bRFRegOffsetMask)); ++ } ++} ++ ++struct _PHYDM_COMMAND { ++ char name[16]; ++ u1Byte id; ++}; ++ ++enum PHYDM_CMD_ID { ++ PHYDM_DEMO, ++ PHYDM_RA, ++ PHYDM_PROFILE, ++ PHYDM_PATHDIV, ++ PHYDM_DEBUG, ++ PHYDM_SUPPORT_ABILITY, ++ PHYDM_GET_TXAGC, ++ PHYDM_SET_TXAGC, ++ PHYDM_SMART_ANT, ++ PHYDM_API, ++ PHYDM_TRX_PATH, ++ PHYDM_LA_MODE, ++ PHYDM_DUMP_REG ++}; ++ ++struct _PHYDM_COMMAND phy_dm_ary[] = { ++ {"demo", PHYDM_DEMO}, ++ {"ra", PHYDM_RA}, ++ {"profile", PHYDM_PROFILE}, ++ {"pathdiv", PHYDM_PATHDIV}, ++ {"dbg", PHYDM_DEBUG}, ++ {"ability", PHYDM_SUPPORT_ABILITY}, ++ {"get_txagc", PHYDM_GET_TXAGC}, ++ {"set_txagc", PHYDM_SET_TXAGC}, ++ {"smtant", PHYDM_SMART_ANT}, ++ {"api", PHYDM_API}, ++ {"trxpath", PHYDM_TRX_PATH}, ++ {"lamode", PHYDM_LA_MODE}, ++ {"dumpreg", PHYDM_DUMP_REG} ++}; ++ ++VOID ++phydm_cmd_parser( ++ IN PDM_ODM_T pDM_Odm, ++ IN char input[][MAX_ARGV], ++ IN u4Byte input_num, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++) ++{ ++ u4Byte used = 0; ++ u1Byte id = 0; ++ int var1[5] = {0}; ++ int i, input_idx = 0; ++ ++ if (flag == 0) { ++ PHYDM_SNPRINTF((output + used, out_len - used, "GET, nothing to print\n")); ++ return; ++ } ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n")); ++ ++ //Parsing Cmd ID ++ if (input_num) { ++ int n, i; ++ ++ n = sizeof(phy_dm_ary) / sizeof(struct _PHYDM_COMMAND); ++ for (i = 0; i < n; i++) { ++ if (strcmp(phy_dm_ary[i].name, input[0]) == 0) { ++ id = phy_dm_ary[i].id; ++ break; ++ } ++ } ++ if (i == n) { ++ PHYDM_SNPRINTF((output + used, out_len - used, "SET, command not found!\n")); ++ return; ++ } ++ } ++ ++ switch (id) { ++ case PHYDM_DEMO: /*echo demo 10 0x3a z abcde >cmd*/ ++ { ++ u4Byte directory = 0; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ char char_temp; ++#else ++ u4Byte char_temp = ' '; ++#endif ++ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Decimal Value = %d\n", directory)); ++ PHYDM_SSCANF(input[2], DCMD_HEX, &directory); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Hex Value = 0x%x\n", directory)); ++ PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Char = %c\n", char_temp)); ++ PHYDM_SNPRINTF((output + used, out_len - used, "String = %s\n", input[4])); ++ } ++ break; ++ ++ case PHYDM_RA: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "new SET, RA_var[%d]= (( %d ))\n", i , var1[i])); ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_RA_debug\n"));*/ ++#if (defined(CONFIG_RA_DBG_CMD)) ++ odm_RA_debug((PVOID)pDM_Odm, var1); ++#endif ++ } ++ ++ ++ break; ++ ++ case PHYDM_PATHDIV: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/ ++#if (defined(CONFIG_PATH_DIVERSITY)) ++ odm_pathdiv_debug(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++#endif ++ } ++ ++ break; ++ ++ case PHYDM_DEBUG: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, Debug_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_debug_comp\n"));*/ ++ odm_debug_trace(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ } ++ ++ ++ break; ++ ++ case PHYDM_SUPPORT_ABILITY: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "support ablity\n"));*/ ++ phydm_support_ablity_debug(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ } ++ ++ break; ++ ++ case PHYDM_SMART_ANT: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ phydm_hl_smart_ant_cmd(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ #endif ++ #endif ++ } ++ ++ break; ++ ++ case PHYDM_API: ++#if (RTL8822B_SUPPORT == 1) ++ { ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ BOOLEAN bEnableDbgMode; ++ u1Byte central_ch, primary_ch_idx, bandwidth; ++ ++ for (i = 0; i < 4; i++) { ++ if (input[i + 1]) ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ } ++ ++ bEnableDbgMode = (BOOLEAN)var1[0]; ++ central_ch = (u1Byte) var1[1]; ++ primary_ch_idx = (u1Byte) var1[2]; ++ bandwidth = (ODM_BW_E) var1[3]; ++ ++ if (bEnableDbgMode) { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ config_phydm_switch_channel_bw_8822b(pDM_Odm, central_ch, primary_ch_idx, bandwidth); ++ pDM_Odm->bDisablePhyApi = TRUE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "central_ch = %d, primary_ch_idx = %d, bandwidth = %d\n", central_ch, primary_ch_idx, bandwidth)); ++ } else { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "Disable API debug mode\n")); ++ } ++ } else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++ } ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++#endif ++ break; ++ ++ case PHYDM_PROFILE: /*echo profile, >cmd*/ ++ phydm_BasicProfile(pDM_Odm, &used, output, &out_len); ++ break; ++ ++ case PHYDM_GET_TXAGC: ++ phydm_get_txagc(pDM_Odm, &used, output, &out_len); ++ break; ++ ++ case PHYDM_SET_TXAGC: ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ phydm_set_txagc(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ break; ++ ++ case PHYDM_TRX_PATH: ++#if (RTL8822B_SUPPORT == 1) ++ { ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ u1Byte TxPath, RxPath; ++ BOOLEAN bEnableDbgMode, bTx2Path; ++ ++ for (i = 0; i < 4; i++) { ++ if (input[i + 1]) ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ } ++ ++ bEnableDbgMode = (BOOLEAN)var1[0]; ++ TxPath = (u1Byte) var1[1]; ++ RxPath = (u1Byte) var1[2]; ++ bTx2Path = (BOOLEAN) var1[3]; ++ ++ if (bEnableDbgMode) { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ config_phydm_trx_mode_8822b(pDM_Odm, TxPath, RxPath, bTx2Path); ++ pDM_Odm->bDisablePhyApi = TRUE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "TxPath = 0x%x, RxPath = 0x%x, bTx2Path = %d\n", TxPath, RxPath, bTx2Path)); ++ } else { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "Disable API debug mode\n")); ++ } ++ } else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++ } ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++#endif ++ break; ++ ++ case PHYDM_LA_MODE: ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if ((RTL8822B_SUPPORT == 1) || (RTL8814A_SUPPORT == 1)) ++ { ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) { ++ u2Byte PollingTime; ++ u1Byte TrigSel, TrigSigSel, DmaDataSigSel, TriggerTime; ++ BOOLEAN bEnableLaMode; ++ ++ for (i = 0; i < 6; i++) { ++ if (input[i + 1]) ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ } ++ ++ bEnableLaMode = (BOOLEAN)var1[0]; ++ if (bEnableLaMode) { ++ TrigSel = (u1Byte)var1[1]; ++ TrigSigSel = (u1Byte)var1[2]; ++ DmaDataSigSel = (u1Byte)var1[3]; ++ TriggerTime = (u1Byte)var1[4]; ++ PollingTime = (((u1Byte)var1[5]) << 6); ++ ++ ADCSmp_Set(pDM_Odm->Adapter, TrigSel, TrigSigSel, DmaDataSigSel, TriggerTime, PollingTime); ++ PHYDM_SNPRINTF((output+used, out_len-used, "TrigSel = %d, TrigSigSel = %d, DmaDataSigSel = %d\n", TrigSel, TrigSigSel, DmaDataSigSel)); ++ PHYDM_SNPRINTF((output+used, out_len-used, "TriggerTime = %d, PollingTime = %d\n", TriggerTime, PollingTime)); ++ } else { ++ ADCSmp_Stop(pDM_Odm->Adapter); ++ PHYDM_SNPRINTF((output+used, out_len-used, "Disable LA mode\n")); ++ } ++ } else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); ++ } ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); ++#endif ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); ++#endif ++ break; ++ ++ case PHYDM_DUMP_REG: ++ { ++ u1Byte type = 0; ++ ++ if (input[1]) { ++ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); ++ type = (u1Byte)var1[0]; ++ } ++ ++ if (type == 0) ++ phydm_DumpBbReg(pDM_Odm); ++ else if (type == 1) ++ phydm_DumpAllReg(pDM_Odm); ++ } ++ break; ++ default: ++ PHYDM_SNPRINTF((output + used, out_len - used, "SET, unknown command!\n")); ++ break; ++ ++ } ++} ++ ++#ifdef __ECOS ++char *strsep(char **s, const char *ct) ++{ ++ char *sbegin = *s; ++ char *end; ++ ++ if (sbegin == NULL) ++ return NULL; ++ ++ end = strpbrk(sbegin, ct); ++ if (end) ++ *end++ = '\0'; ++ *s = end; ++ return sbegin; ++} ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++s4Byte ++phydm_cmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN char *input, ++ IN u4Byte in_len, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++) ++{ ++ char *token; ++ u4Byte Argc = 0; ++ char Argv[MAX_ARGC][MAX_ARGV]; ++ ++ do { ++ token = strsep(&input, ", "); ++ if (token) { ++ strcpy(Argv[Argc], token); ++ Argc++; ++ } else ++ break; ++ } while (Argc < MAX_ARGC); ++ ++ if (Argc == 1) ++ Argv[0][strlen(Argv[0]) - 1] = '\0'; ++ ++ phydm_cmd_parser(pDM_Odm, Argv, Argc, flag, output, out_len); ++ ++ return 0; ++} ++#endif ++ ++ ++VOID ++phydm_fw_trace_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*u1Byte debug_trace_11byte[60];*/ ++ u1Byte freg_num, c2h_seq, buf_0 = 0; ++ ++ if (CmdLen > 12) ++ return; ++ ++ buf_0 = CmdBuf[0]; ++ freg_num = (buf_0 & 0xf); ++ c2h_seq = (buf_0 & 0xf0) >> 4; ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] freg_num = (( %d )), c2h_seq = (( %d ))\n", freg_num,c2h_seq ));*/ ++ ++ /*strncpy(debug_trace_11byte,&CmdBuf[1],(CmdLen-1));*/ ++ /*debug_trace_11byte[CmdLen-1] = '\0';*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] %s\n", debug_trace_11byte));*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] CmdLen = (( %d ))\n", CmdLen));*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] c2h_cmd_start = (( %d ))\n", pDM_Odm->c2h_cmd_start));*/ ++ ++ ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("pre_seq = (( %d )), current_seq = (( %d ))\n", pDM_Odm->pre_c2h_seq, c2h_seq));*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("fw_buff_is_enpty = (( %d ))\n", pDM_Odm->fw_buff_is_enpty));*/ ++ ++ if ((c2h_seq != pDM_Odm->pre_c2h_seq) && pDM_Odm->fw_buff_is_enpty == FALSE) { ++ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW Dbg Queue Overflow] %s\n", pDM_Odm->fw_debug_trace)); ++ pDM_Odm->c2h_cmd_start = 0; ++ } ++ ++ if ((CmdLen - 1) > (60 - pDM_Odm->c2h_cmd_start)) { ++ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW Dbg Queue error: wrong C2H length] %s\n", pDM_Odm->fw_debug_trace)); ++ pDM_Odm->c2h_cmd_start = 0; ++ return; ++ } ++ ++ strncpy((char *)&(pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start]), (char *)&CmdBuf[1], (CmdLen-1)); ++ pDM_Odm->c2h_cmd_start += (CmdLen - 1); ++ pDM_Odm->fw_buff_is_enpty = FALSE; ++ ++ if (freg_num == 0 || pDM_Odm->c2h_cmd_start >= 60) { ++ if (pDM_Odm->c2h_cmd_start < 60) ++ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; ++ else ++ pDM_Odm->fw_debug_trace[59] = '\0'; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s\n", pDM_Odm->fw_debug_trace)); ++ /*DbgPrint("[FW DBG Msg] %s\n", pDM_Odm->fw_debug_trace);*/ ++ pDM_Odm->c2h_cmd_start = 0; ++ pDM_Odm->fw_buff_is_enpty = TRUE; ++ } ++ ++ pDM_Odm->pre_c2h_seq = c2h_seq; ++} ++ ++VOID ++phydm_fw_trace_handler_code( ++ IN PVOID pDM_VOID, ++ IN pu1Byte Buffer, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte function = Buffer[0]; ++ u1Byte dbg_num = Buffer[1]; ++ u2Byte content_0 = (((u2Byte)Buffer[3])<<8)|((u2Byte)Buffer[2]); ++ u2Byte content_1 = (((u2Byte)Buffer[5])<<8)|((u2Byte)Buffer[4]); ++ u2Byte content_2 = (((u2Byte)Buffer[7])<<8)|((u2Byte)Buffer[6]); ++ u2Byte content_3 = (((u2Byte)Buffer[9])<<8)|((u2Byte)Buffer[8]); ++ u2Byte content_4 = (((u2Byte)Buffer[11])<<8)|((u2Byte)Buffer[10]); ++ ++ if(CmdLen >12) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW Msg] Invalid cmd length (( %d )) >12 \n", CmdLen)); ++ } ++ ++ //ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW Msg] Func=((%d)), num=((%d)), ct_0=((%d)), ct_1=((%d)), ct_2=((%d)), ct_3=((%d)), ct_4=((%d))\n", ++ // function, dbg_num, content_0, content_1, content_2, content_3, content_4)); ++ ++ /*--------------------------------------------*/ ++ if(function == RATE_DECISION) { ++ if(dbg_num == 0) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n", content_1, content_2)); ++ } else if(content_0 == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", content_1, content_2, content_3, content_4)); ++ } ++ } else if(dbg_num == 1) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RTY[0,1,2,3]=[ %d, %d, %d, %d ] \n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RTY[4]=[ %d ], drop=((%d)), total=((%d)), current_rate=((0x%x))\n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] penality_idx=((%d ))\n", content_1)); ++ } ++ } ++ ++ else if(dbg_num == 3) { ++ if (content_0 == 1) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4)); ++ else if (content_0 == 2) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4)); ++ else if (content_0 == 3) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) ((Rate Down Hold)) RA_CNT=((%d))\n", content_1)); ++ else if (content_0 == 4) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n", content_1)); ++ else if (content_0 == 8) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", content_1)); ++ } ++ ++ else if(dbg_num == 5) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] (( UP)) Nsc=((%d)), N_High=((%d))\n", content_1, content_2)); ++ } else if(content_0 == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((DOWN)) Nsc=((%d)), N_Low=((%d))\n", content_1, content_2)); ++ } else if(content_0 == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", content_1, content_2, content_3, content_4)); ++ } ++ } ++ else if(dbg_num == 0x60) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n", content_1, content_2)); ++ } else if(content_0 == 4) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 5) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", content_1, content_2, content_3, content_4)); ++ } ++ } ++ else if(dbg_num == 0xff) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("\n\n")); ++ } ++ } ++ ++ } ++ /*--------------------------------------------*/ ++ else if (function == INIT_RA_TABLE){ ++ if(dbg_num == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", content_0)); ++ } ++ ++ } ++ /*--------------------------------------------*/ ++ else if (function == RATE_UP) { ++ if(dbg_num == 2) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Highest rate -> return)), macid=((%d)) Nsc=((%d))\n", content_1, content_2)); ++ } ++ } else if(dbg_num == 5) { ++ if (content_0 == 0) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n", content_1, content_2, content_3, content_4)); ++ else if (content_0 == 1) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", content_1, content_2, content_3, content_4)); ++ } ++ ++ } ++ /*--------------------------------------------*/ ++ else if (function == RATE_DOWN) { ++ if(dbg_num == 5) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDownStep] ((Rate Down)), macid=((%d)), rate=((0x%x)), BW=((%d))\n", content_1, content_2, content_3)); ++ } ++ } ++ } else if (function == TRY_DONE) { ++ if (dbg_num == 1) { ++ if (content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", content_1, content_2)); ++ /**/ ++ } ++ } else if (dbg_num == 2) { ++ if (content_0 == 1) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][Try Done] ((try fail )) macid=((%d)), Try_Done_cnt=((%d)), multi_try_rate=((%d))\n", content_1, content_2, content_3)); ++ } ++ } ++ /*--------------------------------------------*/ ++ else if (function == F_RATE_AP_RPT) { ++ if(dbg_num == 1) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n", content_3)); ++ } ++ } else if(dbg_num == 2) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] RTY_all=((%d))\n", content_1)); ++ } ++ } else if(dbg_num == 3) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2)); ++ } ++ } else if(dbg_num == 4) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2)); ++ } ++ } else if(dbg_num == 5) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2)); ++ } ++ } else if(dbg_num == 6) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2)); ++ } ++ } ++ } ++ /*--------------------------------------------*/ ++ ++ ++} ++ ++VOID ++phydm_fw_trace_handler_8051( ++ IN PVOID pDM_VOID, ++ IN pu1Byte Buffer, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if 0 ++ if (CmdLen >= 3) ++ CmdBuf[CmdLen - 1] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s\n", &(CmdBuf[3]))); ++#else ++ ++ int i = 0; ++ u1Byte Extend_c2hSubID = 0, Extend_c2hDbgLen = 0, Extend_c2hDbgSeq = 0; ++ u1Byte fw_debug_trace[128]; ++ pu1Byte Extend_c2hDbgContent = 0; ++ ++ if (CmdLen > 127) ++ return; ++ ++ Extend_c2hSubID = Buffer[0]; ++ Extend_c2hDbgLen = Buffer[1]; ++ Extend_c2hDbgContent = Buffer + 2; /*DbgSeq+DbgContent for show HEX*/ ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, Extend_c2hDbgLen=%d\n", ++ Extend_c2hSubID, Extend_c2hDbgLen)); ++ ++ RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", Extend_c2hDbgContent, CmdLen-2); ++ #endif ++ ++GoBackforAggreDbgPkt: ++ i = 0; ++ Extend_c2hDbgSeq = Buffer[2]; ++ Extend_c2hDbgContent = Buffer + 3; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", Extend_c2hDbgSeq)); ++ #endif ++ ++ for (; ; i++) { ++ fw_debug_trace[i] = Extend_c2hDbgContent[i]; ++ if (Extend_c2hDbgContent[i + 1] == '\0') { ++ fw_debug_trace[i + 1] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s", &(fw_debug_trace[0]))); ++ break; ++ } else if (Extend_c2hDbgContent[i] == '\n') { ++ fw_debug_trace[i + 1] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s", &(fw_debug_trace[0]))); ++ Buffer = Extend_c2hDbgContent + i + 3; ++ goto GoBackforAggreDbgPkt; ++ } ++ } ++ ++ ++#endif ++} ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_debug.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_debug.h new file mode 100644 -index 000000000..60e84e424 +index 0000000..2f5859b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_debug.h @@ -0,0 +1,330 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ -+#ifndef __ODM_DBG_H__ -+#define __ODM_DBG_H__ -+ -+#define DEBUG_VERSION "1.0" /*2015.01.13 Dino*/ -+//----------------------------------------------------------------------------- -+// Define the debug levels -+// -+// 1. DBG_TRACE and DBG_LOUD are used for normal cases. -+// So that, they can help SW engineer to develope or trace states changed -+// and also help HW enginner to trace every operation to and from HW, -+// e.g IO, Tx, Rx. -+// -+// 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, -+// which help us to debug SW or HW. -+// -+//----------------------------------------------------------------------------- -+// -+// Never used in a call to ODM_RT_TRACE()! -+// -+#define ODM_DBG_OFF 1 -+ -+// -+// Fatal bug. -+// For example, Tx/Rx/IO locked up, OS hangs, memory access violation, -+// resource allocation failed, unexpected HW behavior, HW BUG and so on. -+// -+#define ODM_DBG_SERIOUS 2 -+ -+// -+// Abnormal, rare, or unexpeted cases. -+// For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. -+// -+#define ODM_DBG_WARNING 3 -+ -+// -+// Normal case with useful information about current SW or HW state. -+// For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, -+// SW protocol state change, dynamic mechanism state change and so on. -+// -+#define ODM_DBG_LOUD 4 -+ -+// -+// Normal case with detail execution flow or information. -+// -+#define ODM_DBG_TRACE 5 -+ -+/*FW DBG MSG*/ -+#define RATE_DECISION BIT0 -+#define INIT_RA_TABLE BIT1 -+#define RATE_UP BIT2 -+#define RATE_DOWN BIT3 -+#define TRY_DONE BIT4 -+#define F_RATE_AP_RPT BIT7 -+ -+//----------------------------------------------------------------------------- -+// Define the tracing components -+// -+//----------------------------------------------------------------------------- -+//BB Functions -+#define ODM_COMP_DIG BIT0 -+#define ODM_COMP_RA_MASK BIT1 -+#define ODM_COMP_DYNAMIC_TXPWR BIT2 -+#define ODM_COMP_FA_CNT BIT3 -+#define ODM_COMP_RSSI_MONITOR BIT4 -+#define ODM_COMP_CCK_PD BIT5 -+#define ODM_COMP_ANT_DIV BIT6 -+#define ODM_COMP_PWR_SAVE BIT7 -+#define ODM_COMP_PWR_TRAIN BIT8 -+#define ODM_COMP_RATE_ADAPTIVE BIT9 -+#define ODM_COMP_PATH_DIV BIT10 -+#define ODM_COMP_PSD BIT11 -+#define ODM_COMP_DYNAMIC_PRICCA BIT12 -+#define ODM_COMP_RXHP BIT13 -+#define ODM_COMP_MP BIT14 -+#define ODM_COMP_CFO_TRACKING BIT15 -+#define ODM_COMP_ACS BIT16 -+#define PHYDM_COMP_ADAPTIVITY BIT17 -+#define PHYDM_COMP_RA_DBG BIT18 -+#define PHYDM_COMP_TXBF BIT19 -+//MAC Functions -+#define ODM_COMP_EDCA_TURBO BIT20 -+#define ODM_COMP_EARLY_MODE BIT21 -+#define ODM_FW_DEBUG_TRACE BIT22 -+//RF Functions -+#define ODM_COMP_TX_PWR_TRACK BIT24 -+#define ODM_COMP_RX_GAIN_TRACK BIT25 -+#define ODM_COMP_CALIBRATION BIT26 -+//Common Functions -+#define ODM_PHY_CONFIG BIT28 -+#define BEAMFORMING_DEBUG BIT29 -+#define ODM_COMP_COMMON BIT30 -+#define ODM_COMP_INIT BIT31 -+#define ODM_COMP_NOISY_DETECT BIT32 -+ -+/*------------------------Export Marco Definition---------------------------*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #define RT_PRINTK DbgPrint -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #define DbgPrint printk -+ #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); -+ #define RT_DISP(dbgtype, dbgflag, printstr) -+#else -+ #define DbgPrint panic_printk -+ #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); -+#endif -+ -+#ifndef ASSERT -+ #define ASSERT(expr) -+#endif -+ -+#if DBG -+#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \ -+ do { \ -+ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel || level == ODM_DBG_SERIOUS)) \ -+ { \ -+ if(pDM_Odm->SupportICType == ODM_RTL8192C) \ -+ DbgPrint("[ODM-92C] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8192D) \ -+ DbgPrint("[ODM-92D] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8723A) \ -+ DbgPrint("[ODM-8723A] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8188E) \ -+ DbgPrint("[ODM-8188E] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8192E) \ -+ DbgPrint("[ODM-8192E] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8812) \ -+ DbgPrint("[ODM-8812] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8821) \ -+ DbgPrint("[ODM-8821] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8814A) \ -+ DbgPrint("[ODM-8814] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8703B) \ -+ DbgPrint("[ODM-8703B] "); \ -+ else if(pDM_Odm->SupportICType == ODM_RTL8822B) \ -+ DbgPrint("[ODM-8822] "); \ -+ else if (pDM_Odm->SupportICType == ODM_RTL8188F) \ -+ DbgPrint("[ODM-8188F] "); \ -+ RT_PRINTK fmt; \ -+ } \ -+ } while (0) -+ -+#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \ -+ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ -+ { \ -+ RT_PRINTK fmt; \ -+ } -+ -+#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \ -+ if(!(expr)) { \ -+ DbgPrint( "Assertion failed! %s at ......\n", #expr); \ -+ DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__FUNCTION__,__LINE__); \ -+ RT_PRINTK fmt; \ -+ ASSERT(FALSE); \ -+ } -+#define ODM_dbg_enter() { DbgPrint("==> %s\n", __FUNCTION__); } -+#define ODM_dbg_exit() { DbgPrint("<== %s\n", __FUNCTION__); } -+#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __FUNCTION__, str); } -+ -+#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \ -+ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ -+ { \ -+ int __i; \ -+ pu1Byte __ptr = (pu1Byte)ptr; \ -+ DbgPrint("[ODM] "); \ -+ DbgPrint(title_str); \ -+ DbgPrint(" "); \ -+ for( __i=0; __i<6; __i++ ) \ -+ DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-"); \ -+ DbgPrint("\n"); \ -+ } -+#else -+#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) -+#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) -+#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) -+#define ODM_dbg_enter() -+#define ODM_dbg_exit() -+#define ODM_dbg_trace(str) -+#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) -+#endif -+ -+ -+VOID -+PHYDM_InitDebugSetting(IN PDM_ODM_T pDM_Odm); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID phydm_BB_RxHang_Info(IN PDM_ODM_T pDM_Odm); -+#endif -+ -+#define BB_TMP_BUF_SIZE 100 -+VOID phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm); -+VOID phydm_BasicDbgMessage( IN PVOID pDM_VOID); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define PHYDM_DBGPRINT 0 -+#define PHYDM_SSCANF(x, y, z) DCMD_Scanf(x, y, z) -+#if (PHYDM_DBGPRINT == 1) -+#define PHYDM_SNPRINTF(msg) \ -+ do {\ -+ rsprintf msg;\ -+ DbgPrint(output);\ -+ } while (0) -+#else -+#define PHYDM_SNPRINTF(msg) \ -+ do {\ -+ rsprintf msg;\ -+ DCMD_Printf(output);\ -+ } while (0) -+#endif -+#else -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#define PHYDM_DBGPRINT 0 -+#else -+#define PHYDM_DBGPRINT 1 -+#endif -+#define MAX_ARGC 20 -+#define MAX_ARGV 16 -+#define DCMD_DECIMAL "%d" -+#define DCMD_CHAR "%c" -+#define DCMD_HEX "%x" -+ -+#define PHYDM_SSCANF(x, y, z) sscanf(x, y, z) -+#if (PHYDM_DBGPRINT == 1) -+#define PHYDM_SNPRINTF(msg)\ -+ do {\ -+ snprintf msg;\ -+ DbgPrint(output);\ -+ } while (0) -+#else -+#define PHYDM_SNPRINTF(msg)\ -+ do {\ -+ if(out_len > used)\ -+ used+=snprintf msg;\ -+ } while (0) -+#endif -+#endif -+ -+ -+VOID phydm_BasicProfile( -+ IN PVOID pDM_VOID, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+ ); -+#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) -+s4Byte -+phydm_cmd( -+ IN PDM_ODM_T pDM_Odm, -+ IN char *input, -+ IN u4Byte in_len, -+ IN u1Byte flag, -+ OUT char *output, -+ IN u4Byte out_len -+); -+#endif -+VOID -+phydm_cmd_parser( -+ IN PDM_ODM_T pDM_Odm, -+ IN char input[][16], -+ IN u4Byte input_num, -+ IN u1Byte flag, -+ OUT char *output, -+ IN u4Byte out_len -+); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_sbd_check( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+void phydm_sbd_callback( -+ PRT_TIMER pTimer -+ ); -+ -+void phydm_sbd_workitem_callback( -+ IN PVOID pContext -+ ); -+#endif -+ -+VOID -+phydm_fw_trace_en_h2c( -+ IN PVOID pDM_VOID, -+ IN BOOLEAN enable, -+ IN u4Byte monitor_mode, -+ IN u4Byte macid -+); -+ -+VOID -+phydm_fw_trace_handler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+); -+ -+VOID -+phydm_fw_trace_handler_code( -+ IN PVOID pDM_VOID, -+ IN pu1Byte Buffer, -+ IN u1Byte CmdLen -+); -+ -+VOID -+phydm_fw_trace_handler_8051( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+); -+ -+#endif // __ODM_DBG_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __ODM_DBG_H__ ++#define __ODM_DBG_H__ ++ ++#define DEBUG_VERSION "1.0" /*2015.01.13 Dino*/ ++//----------------------------------------------------------------------------- ++// Define the debug levels ++// ++// 1. DBG_TRACE and DBG_LOUD are used for normal cases. ++// So that, they can help SW engineer to develope or trace states changed ++// and also help HW enginner to trace every operation to and from HW, ++// e.g IO, Tx, Rx. ++// ++// 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, ++// which help us to debug SW or HW. ++// ++//----------------------------------------------------------------------------- ++// ++// Never used in a call to ODM_RT_TRACE()! ++// ++#define ODM_DBG_OFF 1 ++ ++// ++// Fatal bug. ++// For example, Tx/Rx/IO locked up, OS hangs, memory access violation, ++// resource allocation failed, unexpected HW behavior, HW BUG and so on. ++// ++#define ODM_DBG_SERIOUS 2 ++ ++// ++// Abnormal, rare, or unexpeted cases. ++// For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. ++// ++#define ODM_DBG_WARNING 3 ++ ++// ++// Normal case with useful information about current SW or HW state. ++// For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, ++// SW protocol state change, dynamic mechanism state change and so on. ++// ++#define ODM_DBG_LOUD 4 ++ ++// ++// Normal case with detail execution flow or information. ++// ++#define ODM_DBG_TRACE 5 ++ ++/*FW DBG MSG*/ ++#define RATE_DECISION BIT0 ++#define INIT_RA_TABLE BIT1 ++#define RATE_UP BIT2 ++#define RATE_DOWN BIT3 ++#define TRY_DONE BIT4 ++#define F_RATE_AP_RPT BIT7 ++ ++//----------------------------------------------------------------------------- ++// Define the tracing components ++// ++//----------------------------------------------------------------------------- ++//BB Functions ++#define ODM_COMP_DIG BIT0 ++#define ODM_COMP_RA_MASK BIT1 ++#define ODM_COMP_DYNAMIC_TXPWR BIT2 ++#define ODM_COMP_FA_CNT BIT3 ++#define ODM_COMP_RSSI_MONITOR BIT4 ++#define ODM_COMP_CCK_PD BIT5 ++#define ODM_COMP_ANT_DIV BIT6 ++#define ODM_COMP_PWR_SAVE BIT7 ++#define ODM_COMP_PWR_TRAIN BIT8 ++#define ODM_COMP_RATE_ADAPTIVE BIT9 ++#define ODM_COMP_PATH_DIV BIT10 ++#define ODM_COMP_PSD BIT11 ++#define ODM_COMP_DYNAMIC_PRICCA BIT12 ++#define ODM_COMP_RXHP BIT13 ++#define ODM_COMP_MP BIT14 ++#define ODM_COMP_CFO_TRACKING BIT15 ++#define ODM_COMP_ACS BIT16 ++#define PHYDM_COMP_ADAPTIVITY BIT17 ++#define PHYDM_COMP_RA_DBG BIT18 ++#define PHYDM_COMP_TXBF BIT19 ++//MAC Functions ++#define ODM_COMP_EDCA_TURBO BIT20 ++#define ODM_COMP_EARLY_MODE BIT21 ++#define ODM_FW_DEBUG_TRACE BIT22 ++//RF Functions ++#define ODM_COMP_TX_PWR_TRACK BIT24 ++#define ODM_COMP_RX_GAIN_TRACK BIT25 ++#define ODM_COMP_CALIBRATION BIT26 ++//Common Functions ++#define ODM_PHY_CONFIG BIT28 ++#define BEAMFORMING_DEBUG BIT29 ++#define ODM_COMP_COMMON BIT30 ++#define ODM_COMP_INIT BIT31 ++#define ODM_COMP_NOISY_DETECT BIT32 ++ ++/*------------------------Export Marco Definition---------------------------*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #define RT_PRINTK DbgPrint ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #define DbgPrint printk ++ #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); ++ #define RT_DISP(dbgtype, dbgflag, printstr) ++#else ++ #define DbgPrint panic_printk ++ #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); ++#endif ++ ++#ifndef ASSERT ++ #define ASSERT(expr) ++#endif ++ ++#if DBG ++#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \ ++ do { \ ++ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel || level == ODM_DBG_SERIOUS)) \ ++ { \ ++ if(pDM_Odm->SupportICType == ODM_RTL8192C) \ ++ DbgPrint("[ODM-92C] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8192D) \ ++ DbgPrint("[ODM-92D] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8723A) \ ++ DbgPrint("[ODM-8723A] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8188E) \ ++ DbgPrint("[ODM-8188E] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) \ ++ DbgPrint("[ODM-8192E] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) \ ++ DbgPrint("[ODM-8812] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8821) \ ++ DbgPrint("[ODM-8821] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8814A) \ ++ DbgPrint("[ODM-8814] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8703B) \ ++ DbgPrint("[ODM-8703B] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8822B) \ ++ DbgPrint("[ODM-8822] "); \ ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) \ ++ DbgPrint("[ODM-8188F] "); \ ++ RT_PRINTK fmt; \ ++ } \ ++ } while (0) ++ ++#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \ ++ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ ++ { \ ++ RT_PRINTK fmt; \ ++ } ++ ++#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \ ++ if(!(expr)) { \ ++ DbgPrint( "Assertion failed! %s at ......\n", #expr); \ ++ DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__FUNCTION__,__LINE__); \ ++ RT_PRINTK fmt; \ ++ ASSERT(FALSE); \ ++ } ++#define ODM_dbg_enter() { DbgPrint("==> %s\n", __FUNCTION__); } ++#define ODM_dbg_exit() { DbgPrint("<== %s\n", __FUNCTION__); } ++#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __FUNCTION__, str); } ++ ++#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \ ++ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ ++ { \ ++ int __i; \ ++ pu1Byte __ptr = (pu1Byte)ptr; \ ++ DbgPrint("[ODM] "); \ ++ DbgPrint(title_str); \ ++ DbgPrint(" "); \ ++ for( __i=0; __i<6; __i++ ) \ ++ DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-"); \ ++ DbgPrint("\n"); \ ++ } ++#else ++#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) ++#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) ++#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) ++#define ODM_dbg_enter() ++#define ODM_dbg_exit() ++#define ODM_dbg_trace(str) ++#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) ++#endif ++ ++ ++VOID ++PHYDM_InitDebugSetting(IN PDM_ODM_T pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID phydm_BB_RxHang_Info(IN PDM_ODM_T pDM_Odm); ++#endif ++ ++#define BB_TMP_BUF_SIZE 100 ++VOID phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm); ++VOID phydm_BasicDbgMessage( IN PVOID pDM_VOID); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define PHYDM_DBGPRINT 0 ++#define PHYDM_SSCANF(x, y, z) DCMD_Scanf(x, y, z) ++#if (PHYDM_DBGPRINT == 1) ++#define PHYDM_SNPRINTF(msg) \ ++ do {\ ++ rsprintf msg;\ ++ DbgPrint(output);\ ++ } while (0) ++#else ++#define PHYDM_SNPRINTF(msg) \ ++ do {\ ++ rsprintf msg;\ ++ DCMD_Printf(output);\ ++ } while (0) ++#endif ++#else ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define PHYDM_DBGPRINT 0 ++#else ++#define PHYDM_DBGPRINT 1 ++#endif ++#define MAX_ARGC 20 ++#define MAX_ARGV 16 ++#define DCMD_DECIMAL "%d" ++#define DCMD_CHAR "%c" ++#define DCMD_HEX "%x" ++ ++#define PHYDM_SSCANF(x, y, z) sscanf(x, y, z) ++#if (PHYDM_DBGPRINT == 1) ++#define PHYDM_SNPRINTF(msg)\ ++ do {\ ++ snprintf msg;\ ++ DbgPrint(output);\ ++ } while (0) ++#else ++#define PHYDM_SNPRINTF(msg)\ ++ do {\ ++ if(out_len > used)\ ++ used+=snprintf msg;\ ++ } while (0) ++#endif ++#endif ++ ++ ++VOID phydm_BasicProfile( ++ IN PVOID pDM_VOID, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ); ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++s4Byte ++phydm_cmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN char *input, ++ IN u4Byte in_len, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++); ++#endif ++VOID ++phydm_cmd_parser( ++ IN PDM_ODM_T pDM_Odm, ++ IN char input[][16], ++ IN u4Byte input_num, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++void phydm_sbd_check( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++void phydm_sbd_callback( ++ PRT_TIMER pTimer ++ ); ++ ++void phydm_sbd_workitem_callback( ++ IN PVOID pContext ++ ); ++#endif ++ ++VOID ++phydm_fw_trace_en_h2c( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN enable, ++ IN u4Byte monitor_mode, ++ IN u4Byte macid ++); ++ ++VOID ++phydm_fw_trace_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++VOID ++phydm_fw_trace_handler_code( ++ IN PVOID pDM_VOID, ++ IN pu1Byte Buffer, ++ IN u1Byte CmdLen ++); ++ ++VOID ++phydm_fw_trace_handler_8051( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++#endif // __ODM_DBG_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dig.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dig.c new file mode 100644 -index 000000000..fbca415fa +index 0000000..468281f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dig.c @@ -0,0 +1,2086 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+ -+VOID -+ODM_ChangeDynamicInitGainThresh( -+ IN PVOID pDM_VOID, -+ IN u4Byte DM_Type, -+ IN u4Byte DM_Value -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+ if (DM_Type == DIG_TYPE_THRESH_HIGH) -+ { -+ pDM_DigTable->RssiHighThresh = DM_Value; -+ } -+ else if (DM_Type == DIG_TYPE_THRESH_LOW) -+ { -+ pDM_DigTable->RssiLowThresh = DM_Value; -+ } -+ else if (DM_Type == DIG_TYPE_ENABLE) -+ { -+ pDM_DigTable->Dig_Enable_Flag = TRUE; -+ } -+ else if (DM_Type == DIG_TYPE_DISABLE) -+ { -+ pDM_DigTable->Dig_Enable_Flag = FALSE; -+ } -+ else if (DM_Type == DIG_TYPE_BACKOFF) -+ { -+ if(DM_Value > 30) -+ DM_Value = 30; -+ pDM_DigTable->BackoffVal = (u1Byte)DM_Value; -+ } -+ else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) -+ { -+ if(DM_Value == 0) -+ DM_Value = 0x1; -+ pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; -+ } -+ else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) -+ { -+ if(DM_Value > 0x50) -+ DM_Value = 0x50; -+ pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; -+ } -+} // DM_ChangeDynamicInitGainThresh // -+ -+int -+getIGIForDiff(int value_IGI) -+{ -+ #define ONERCCA_LOW_TH 0x30 -+ #define ONERCCA_LOW_DIFF 8 -+ -+ if (value_IGI < ONERCCA_LOW_TH) { -+ if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) -+ return ONERCCA_LOW_TH; -+ else -+ return value_IGI + ONERCCA_LOW_DIFF; -+ } else { -+ return value_IGI; -+ } -+} -+ -+VOID -+odm_FAThresholdCheck( -+ IN PVOID pDM_VOID, -+ IN BOOLEAN bDFSBand, -+ IN BOOLEAN bPerformance, -+ IN u4Byte RxTp, -+ IN u4Byte TxTp, -+ OUT u4Byte* dm_FA_thres -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if(pDM_Odm->bLinked && (bPerformance||bDFSBand)) -+ { -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ // 8192D special case -+ dm_FA_thres[0] = DM_DIG_FA_TH0_92D; -+ dm_FA_thres[1] = DM_DIG_FA_TH1_92D; -+ dm_FA_thres[2] = DM_DIG_FA_TH2_92D; -+ } -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) -+ { -+ // For AP -+ if((RxTp>>2) > TxTp && RxTp < 10000 && RxTp > 500) // 10Mbps & 0.5Mbps -+ { -+ dm_FA_thres[0] = 0x080; -+ dm_FA_thres[1] = 0x100; -+ dm_FA_thres[2] = 0x200; -+ } -+ else -+ { -+ dm_FA_thres[0] = 0x100; -+ dm_FA_thres[1] = 0x200; -+ dm_FA_thres[2] = 0x300; -+ } -+ } -+#else -+ else if(pDM_Odm->SupportICType == ODM_RTL8723A && pDM_Odm->bBtLimitedDig) -+ { -+ // 8723A BT special case -+ dm_FA_thres[0] = DM_DIG_FA_TH0; -+ dm_FA_thres[1] = 0x250; -+ dm_FA_thres[2] = 0x300; -+ } -+#endif -+ else -+ { -+ // For NIC -+ dm_FA_thres[0] = DM_DIG_FA_TH0; -+ dm_FA_thres[1] = DM_DIG_FA_TH1; -+ dm_FA_thres[2] = DM_DIG_FA_TH2; -+ } -+ } -+ else -+ { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ if(bDFSBand) -+ { -+ // For DFS band and no link -+ dm_FA_thres[0] = 250; -+ dm_FA_thres[1] = 1000; -+ dm_FA_thres[2] = 2000; -+ } -+ else -+#endif -+ { -+ dm_FA_thres[0] = 2000; -+ dm_FA_thres[1] = 4000; -+ dm_FA_thres[2] = 5000; -+ } -+ } -+ return; -+} -+ -+u1Byte -+odm_ForbiddenIGICheck( -+ IN PVOID pDM_VOID, -+ IN u1Byte DIG_Dynamic_MIN, -+ IN u1Byte CurrentIGI -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); -+ u1Byte rx_gain_range_min = pDM_DigTable->rx_gain_range_min; -+ -+ if(pFalseAlmCnt->Cnt_all > 10000) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case. \n")); -+ -+ if(pDM_DigTable->LargeFAHit != 3) -+ pDM_DigTable->LargeFAHit++; -+ -+ if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) -+ { -+ pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; -+ pDM_DigTable->LargeFAHit = 1; -+ } -+ -+ if(pDM_DigTable->LargeFAHit >= 3) -+ { -+ if((pDM_DigTable->ForbiddenIGI + 2) > pDM_DigTable->rx_gain_range_max) -+ rx_gain_range_min = pDM_DigTable->rx_gain_range_max; -+ else -+ rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); -+ pDM_DigTable->Recover_cnt = 1800; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); -+ } -+ } -+ else -+ { -+ if(pDM_DigTable->Recover_cnt != 0) -+ { -+ pDM_DigTable->Recover_cnt --; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); -+ } -+ else -+ { -+ if(pDM_DigTable->LargeFAHit < 3) -+ { -+ if((pDM_DigTable->ForbiddenIGI - 2) < DIG_Dynamic_MIN) //DM_DIG_MIN) -+ { -+ pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; -+ rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); -+ } -+ else -+ { -+ pDM_DigTable->ForbiddenIGI -= 2; -+ rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); -+ } -+ } -+ else -+ { -+ pDM_DigTable->LargeFAHit = 0; -+ } -+ } -+ } -+ -+ return rx_gain_range_min; -+ -+} -+ -+VOID -+odm_InbandNoiseCalculate ( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ u1Byte IGIBackup, TimeCnt = 0, ValidCnt = 0; -+ BOOLEAN bTimeout = TRUE; -+ s1Byte sNoise_A, sNoise_B; -+ s4Byte NoiseRpt_A = 0,NoiseRpt_B = 0; -+ u4Byte tmp = 0; -+ static u1Byte failCnt = 0; -+ -+ if(!(pDM_Odm->SupportICType & (ODM_RTL8192E))) -+ return; -+ -+ if(pDM_Odm->RFType == ODM_1T1R || *(pDM_Odm->pOnePathCCA) != ODM_CCA_2R) -+ return; -+ -+ if(!pDM_DigTable->bNoiseEst) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_InbandNoiseEstimate()========>\n")); -+ -+ //1 Set initial gain. -+ IGIBackup = pDM_DigTable->CurIGValue; -+ pDM_DigTable->IGIOffset_A = 0; -+ pDM_DigTable->IGIOffset_B = 0; -+ ODM_Write_DIG(pDM_Odm, 0x24); -+ -+ //1 Update idle time power report -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x0); -+ -+ delay_ms(2); -+ -+ //1 Get noise power level -+ while(1) -+ { -+ //2 Read Noise Floor Report -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ tmp = ODM_GetBBReg(pDM_Odm, 0x8f8, bMaskLWord); -+ -+ sNoise_A = (s1Byte)(tmp & 0xff); -+ sNoise_B = (s1Byte)((tmp & 0xff00)>>8); -+ -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); -+ -+ if((sNoise_A < 20 && sNoise_A >= -70) && (sNoise_B < 20 && sNoise_B >= -70)) -+ { -+ ValidCnt++; -+ NoiseRpt_A += sNoise_A; -+ NoiseRpt_B += sNoise_B; -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); -+ } -+ -+ TimeCnt++; -+ bTimeout = (TimeCnt >= 150)?TRUE:FALSE; -+ -+ if(ValidCnt == 20 || bTimeout) -+ break; -+ -+ delay_ms(2); -+ -+ } -+ -+ //1 Keep idle time power report -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x1); -+ -+ //1 Recover IGI -+ ODM_Write_DIG(pDM_Odm, IGIBackup); -+ -+ //1 Calculate Noise Floor -+ if(ValidCnt != 0) -+ { -+ NoiseRpt_A /= (ValidCnt<<1); -+ NoiseRpt_B /= (ValidCnt<<1); -+ } -+ -+ if(bTimeout) -+ { -+ NoiseRpt_A = 0; -+ NoiseRpt_B = 0; -+ -+ failCnt ++; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Noise estimate fail time = %d\n", failCnt)); -+ -+ if(failCnt == 3) -+ { -+ failCnt = 0; -+ pDM_DigTable->bNoiseEst = FALSE; -+ } -+ } -+ else -+ { -+ NoiseRpt_A = -110 + 0x24 + NoiseRpt_A -6; -+ NoiseRpt_B = -110 + 0x24 + NoiseRpt_B -6; -+ pDM_DigTable->bNoiseEst = FALSE; -+ failCnt = 0; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("NoiseRpt_A = %d, NoiseRpt_B = %d\n", NoiseRpt_A, NoiseRpt_B)); -+ } -+ -+ //1 Calculate IGI Offset -+ if(NoiseRpt_A > NoiseRpt_B) -+ { -+ pDM_DigTable->IGIOffset_A = NoiseRpt_A - NoiseRpt_B; -+ pDM_DigTable->IGIOffset_B = 0; -+ } -+ else -+ { -+ pDM_DigTable->IGIOffset_A = 0; -+ pDM_DigTable->IGIOffset_B = NoiseRpt_B - NoiseRpt_A; -+ } -+ -+#endif -+ return; -+} -+ -+VOID -+odm_DigForBtHsMode( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; -+ u1Byte digForBtHs=0; -+ u1Byte digUpBound=0x5a; -+ -+ if(pDM_Odm->bBtConnectProcess) -+ { -+ if(pDM_Odm->SupportICType&(ODM_RTL8723A)) -+ digForBtHs = 0x28; -+ else -+ digForBtHs = 0x22; -+ } -+ else -+ { -+ // -+ // Decide DIG value by BT HS RSSI. -+ // -+ digForBtHs = pDM_Odm->btHsRssi+4; -+ -+ //DIG Bound -+ if(pDM_Odm->SupportICType&(ODM_RTL8723A)) -+ digUpBound = 0x3e; -+ -+ if(digForBtHs > digUpBound) -+ digForBtHs = digUpBound; -+ if(digForBtHs < 0x1c) -+ digForBtHs = 0x1c; -+ -+ // update Current IGI -+ pDM_DigTable->BT30_CurIGI = digForBtHs; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); -+#endif -+} -+ -+VOID -+ODM_Write_DIG( -+ IN PVOID pDM_VOID, -+ IN u1Byte CurrentIGI -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+ if (pDM_DigTable->bStopDIG) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Stop Writing IGI\n")); -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n", -+ ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); -+ -+ //1 Check initial gain by upper bound -+ if ((!pDM_DigTable->bPSDInProgress) && pDM_Odm->bLinked) -+ { -+ if (CurrentIGI > pDM_DigTable->rx_gain_range_max) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x) is larger than upper bound !!\n", CurrentIGI)); -+ CurrentIGI = pDM_DigTable->rx_gain_range_max; -+ } -+ if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY && pDM_Odm->adaptivity_flag == TRUE) -+ { -+ if(CurrentIGI > pDM_Odm->Adaptivity_IGI_upper) -+ CurrentIGI = pDM_Odm->Adaptivity_IGI_upper; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Adaptivity case: Force upper bound to 0x%x !!!!!!\n", CurrentIGI)); -+ } -+ } -+ -+ if(pDM_DigTable->CurIGValue != CurrentIGI) -+ { -+ -+ /*Add by YuChen for USB IO too slow issue*/ -+ if ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) && (CurrentIGI > pDM_DigTable->CurIGValue)) -+ Phydm_Adaptivity(pDM_Odm, CurrentIGI); -+ -+ //1 Set IGI value -+ if(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE)) -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ -+ if(pDM_Odm->RFType > ODM_1T1R) -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ -+ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ } -+ } -+ else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) -+ { -+ switch(*(pDM_Odm->pOnePathCCA)) -+ { -+ case ODM_CCA_2R: -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ -+ if(pDM_Odm->RFType > ODM_1T1R) -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ -+ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) -+ { -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ } -+ break; -+ case ODM_CCA_1R_A: -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ if(pDM_Odm->RFType != ODM_1T1R) -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); -+ break; -+ case ODM_CCA_1R_B: -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); -+ if(pDM_Odm->RFType != ODM_1T1R) -+ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); -+ break; -+ } -+ } -+ pDM_DigTable->CurIGValue = CurrentIGI; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x).\n", CurrentIGI)); -+ -+} -+ -+VOID -+odm_PauseDIG( -+ IN PVOID pDM_VOID, -+ IN PHYDM_PAUSE_TYPE PauseType, -+ IN PHYDM_PAUSE_LEVEL pause_level, -+ IN u1Byte IGIValue -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG()=========> level = %d\n", pause_level)); -+ -+ if ((pDM_DigTable->pause_dig_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_DIG) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, -+ ("odm_PauseDIG(): Return: SupportAbility DIG or FA is disabled !!\n")); -+ return; -+ } -+ -+ if (pause_level > DM_DIG_MAX_PAUSE_TYPE) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, -+ ("odm_PauseDIG(): Return: Wrong pause level !!\n")); -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4], -+ pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0])); -+ -+ switch (PauseType) { -+ /* Pause DIG */ -+ case PHYDM_PAUSE: -+ { -+ /* Disable DIG */ -+ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_DIG)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Pause DIG !!\n")); -+ -+ /* Backup IGI value */ -+ if (pDM_DigTable->pause_dig_level == 0) { -+ pDM_DigTable->IGIBackup = pDM_DigTable->CurIGValue; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Backup IGI = 0x%x, new IGI = 0x%x\n", pDM_DigTable->IGIBackup, IGIValue)); -+ } -+ -+ /* Record IGI value */ -+ pDM_DigTable->pause_dig_value[pause_level] = IGIValue; -+ -+ /* Update pause level */ -+ pDM_DigTable->pause_dig_level = (pDM_DigTable->pause_dig_level | BIT(pause_level)); -+ -+ /* Write new IGI value */ -+ if (BIT(pause_level + 1) > pDM_DigTable->pause_dig_level) { -+ ODM_Write_DIG(pDM_Odm, IGIValue); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): IGI of higher level = 0x%x\n", IGIValue)); -+ } -+ break; -+ } -+ /* Resume DIG */ -+ case PHYDM_RESUME: -+ { -+ /* check if the level is illegal or not */ -+ if ((pDM_DigTable->pause_dig_level & (BIT(pause_level))) != 0) { -+ pDM_DigTable->pause_dig_level = pDM_DigTable->pause_dig_level & (~(BIT(pause_level))); -+ pDM_DigTable->pause_dig_value[pause_level] = 0; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Resume DIG !!\n")); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong resume level !!\n")); -+ break; -+ } -+ -+ /* Resume DIG */ -+ if (pDM_DigTable->pause_dig_level == 0) { -+ /* Write backup IGI value */ -+ ODM_Write_DIG(pDM_Odm, pDM_DigTable->IGIBackup); -+ pDM_DigTable->bIgnoreDIG = TRUE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write original IGI = 0x%x\n", pDM_DigTable->IGIBackup)); -+ -+ /* Enable DIG */ -+ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_DIG); -+ break; -+ } -+ -+ if (BIT(pause_level) > pDM_DigTable->pause_dig_level) { -+ u1Byte max_level; -+ -+ /* Calculate the maximum level now */ -+ for (max_level = (pause_level - 1); max_level >= 0; max_level--) { -+ if ((pDM_DigTable->pause_dig_level & BIT(max_level)) > 0) -+ break; -+ } -+ -+ /* write IGI of lower level */ -+ ODM_Write_DIG(pDM_Odm, pDM_DigTable->pause_dig_value[max_level]); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write IGI (0x%x) of level (%d)\n", -+ pDM_DigTable->pause_dig_value[max_level], max_level)); -+ break; -+ } -+ break; -+ } -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong type !!\n")); -+ break; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4], -+ pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0])); -+ -+} -+ -+BOOLEAN -+odm_DigAbort( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; -+#endif -+ -+ //SupportAbility -+ if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_FA_CNT is disabled\n")); -+ return TRUE; -+ } -+ -+ //SupportAbility -+ if(!(pDM_Odm->SupportAbility & ODM_BB_DIG)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_DIG is disabled\n")); -+ return TRUE; -+ } -+ -+ //ScanInProcess -+ if(*(pDM_Odm->pbScanInProcess)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In Scan Progress \n")); -+ return TRUE; -+ } -+ -+ if(pDM_DigTable->bIgnoreDIG) -+ { -+ pDM_DigTable->bIgnoreDIG = FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Ignore DIG \n")); -+ return TRUE; -+ } -+ -+ //add by Neil Chen to avoid PSD is processing -+ if(pDM_Odm->bDMInitialGainEnable == FALSE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: PSD is Processing \n")); -+ return TRUE; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #if OS_WIN_FROM_WIN7(OS_VERSION) -+ if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Is AP mode or In HCT Test \n")); -+ return TRUE; -+ } -+ #endif -+ -+ if(pDM_Odm->bBtHsOperation) -+ { -+ odm_DigForBtHsMode(pDM_Odm); -+ } -+ -+ if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) -+ { -+ if(pRX_HP_Table->RXHP_flag == 1) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In RXHP Operation \n")); -+ return TRUE; -+ } -+ } -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV -+ if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) -+ { -+ printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); -+ ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); -+ return TRUE; -+ } -+ #endif -+#else -+ if (!(priv->up_time > 5)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Not In DIG Operation Period \n")); -+ return TRUE; -+ } -+#endif -+ -+ return FALSE; -+} -+ -+VOID -+odm_DIGInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); -+#endif -+ -+ pDM_DigTable->bStopDIG = FALSE; -+ pDM_DigTable->bIgnoreDIG = FALSE; -+ pDM_DigTable->bPSDInProgress = FALSE; -+ pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); -+ pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; -+ pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; -+ pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; -+ pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; -+ pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; -+ pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; -+ pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; -+ pDM_DigTable->PreCCK_CCAThres = 0xFF; -+ pDM_DigTable->CurCCK_CCAThres = 0x83; -+ pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; -+ pDM_DigTable->LargeFAHit = 0; -+ pDM_DigTable->Recover_cnt = 0; -+ pDM_DigTable->bMediaConnect_0 = FALSE; -+ pDM_DigTable->bMediaConnect_1 = FALSE; -+ -+ //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error -+ pDM_Odm->bDMInitialGainEnable = TRUE; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ pDM_DigTable->DIG_Dynamic_MIN_0 = 0x25; -+ pDM_DigTable->DIG_Dynamic_MIN_1 = 0x25; -+ -+ // For AP\ ADSL modified DIG -+ pDM_DigTable->bTpTarget = FALSE; -+ pDM_DigTable->bNoiseEst = TRUE; -+ pDM_DigTable->IGIOffset_A = 0; -+ pDM_DigTable->IGIOffset_B = 0; -+ pDM_DigTable->TpTrainTH_min = 0; -+ -+ // For RTL8881A -+ FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; -+ -+ //Dyanmic EDCCA -+ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ { -+ ODM_SetBBReg(pDM_Odm, 0xC50, 0xFFFF0000, 0xfafd); -+ } -+#else -+ pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; -+ pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; -+ -+ //To Initi BT30 IGI -+ pDM_DigTable->BT30_CurIGI=0x32; -+ -+ ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_dig_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1)); -+ pDM_DigTable->pause_dig_level = 0; -+ ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_cckpd_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1)); -+ pDM_DigTable->pause_cckpd_level = 0; -+#endif -+ -+ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) -+ { -+ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; -+ pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; -+ } -+ else -+ { -+ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; -+ pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; -+ } -+ -+} -+ -+ -+VOID -+odm_DIG( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ PSTA_INFO_T pEntry; -+#endif -+ -+ // Common parameters -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); -+ BOOLEAN FirstConnect,FirstDisConnect; -+ u1Byte DIG_MaxOfMin, DIG_Dynamic_MIN; -+ u1Byte dm_dig_max, dm_dig_min; -+ u1Byte CurrentIGI = pDM_DigTable->CurIGValue; -+ u1Byte offset; -+ u4Byte dm_FA_thres[3]; -+ u4Byte TxTp = 0, RxTp = 0; -+ BOOLEAN bDFSBand = FALSE; -+ BOOLEAN bPerformance = TRUE, bFirstTpTarget = FALSE, bFirstCoverage = FALSE; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ u4Byte TpTrainTH_MIN = DM_DIG_TP_Target_TH0; -+ static u1Byte TimeCnt = 0; -+ u1Byte i; -+#endif -+ -+ if(odm_DigAbort(pDM_Odm) == TRUE) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()===========================>\n\n")); -+ -+ -+ //1 Update status -+#if (RTL8192D_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) -+ { -+ if(*(pDM_Odm->pbMasterOfDMSP)) -+ { -+ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; -+ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); -+ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); -+ } -+ else -+ { -+ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; -+ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); -+ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); -+ } -+ } -+ else -+ { -+ if(*(pDM_Odm->pBandType) == ODM_BAND_5G) -+ { -+ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; -+ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); -+ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); -+ } -+ else -+ { -+ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; -+ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); -+ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); -+ } -+ } -+ } -+ else -+#endif -+ { -+ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; -+ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); -+ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ //1 Noise Floor Estimate -+ //pDM_DigTable->bNoiseEst = (FirstConnect)?TRUE:pDM_DigTable->bNoiseEst; -+ //odm_InbandNoiseCalculate (pDM_Odm); -+ -+ //1 Mode decision -+ if(pDM_Odm->bLinked) -+ { -+ //2 Calculate total TP -+ for (i=0; ipODM_StaInfo[i]; -+ if(IS_STA_VALID(pEntry)) -+ { -+ RxTp += (u4Byte)(pEntry->rx_byte_cnt_LowMAW>>7); -+ TxTp += (u4Byte)(pEntry->tx_byte_cnt_LowMAW>>7); //Kbps -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TX TP = %dkbps, RX TP = %dkbps\n", TxTp, RxTp)); -+ } -+ -+ switch(pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable) -+ { -+ case 0: -+ { -+ bPerformance = TRUE; -+ break; -+ } -+ case 1: -+ { -+ bPerformance = FALSE; -+ break; -+ } -+ case 2: -+ { -+ if(pDM_Odm->bLinked) -+ { -+ if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH0) -+ TpTrainTH_MIN = pDM_DigTable->TpTrainTH_min; -+ -+ if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH1) -+ TpTrainTH_MIN = DM_DIG_TP_Target_TH1; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TP training mode lower bound = %dkbps\n", TpTrainTH_MIN)); -+ -+ //2 Decide DIG mode by total TP -+ if((TxTp + RxTp) > DM_DIG_TP_Target_TH1) // change to performance mode -+ { -+ bFirstTpTarget = (!pDM_DigTable->bTpTarget)?TRUE:FALSE; -+ pDM_DigTable->bTpTarget = TRUE; -+ bPerformance = TRUE; -+ } -+ else if((TxTp + RxTp) < TpTrainTH_MIN) // change to coverage mode -+ { -+ bFirstCoverage = (pDM_DigTable->bTpTarget)?TRUE:FALSE; -+ -+ if(TimeCnt < DM_DIG_TP_Training_Period) -+ { -+ pDM_DigTable->bTpTarget = FALSE; -+ bPerformance = FALSE; -+ TimeCnt++; -+ } -+ else -+ { -+ pDM_DigTable->bTpTarget = TRUE; -+ bPerformance = TRUE; -+ bFirstTpTarget = TRUE; -+ TimeCnt = 0; -+ } -+ } -+ else // remain previous mode -+ { -+ bPerformance = pDM_DigTable->bTpTarget; -+ -+ if(!bPerformance) -+ { -+ if(TimeCnt < DM_DIG_TP_Training_Period) -+ TimeCnt++; -+ else -+ { -+ pDM_DigTable->bTpTarget = TRUE; -+ bPerformance = TRUE; -+ bFirstTpTarget = TRUE; -+ TimeCnt = 0; -+ } -+ } -+ } -+ -+ if(!bPerformance) -+ pDM_DigTable->TpTrainTH_min = RxTp + TxTp; -+ -+ } -+ else -+ { -+ bPerformance = FALSE; -+ pDM_DigTable->TpTrainTH_min = 0; -+ } -+ break; -+ } -+ default: -+ bPerformance = TRUE; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== DIG mode = %d ======\n", pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== bPerformance = %d ======\n", bPerformance)); -+#endif -+ -+ //1 Boundary Decision -+#if (RTL8192C_SUPPORT==1) -+ if((pDM_Odm->SupportICType & ODM_RTL8192C) && (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) -+ { -+ //2 High power case -+ if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) -+ { -+ dm_dig_max = DM_DIG_MAX_AP_HP; -+ dm_dig_min = DM_DIG_MIN_AP_HP; -+ } -+ else -+ { -+ dm_dig_max = DM_DIG_MAX_NIC_HP; -+ dm_dig_min = DM_DIG_MIN_NIC_HP; -+ } -+ DIG_MaxOfMin = DM_DIG_MAX_AP_HP; -+ } -+ else -+#endif -+ { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ //2 For AP\ADSL -+ if(!bPerformance) -+ { -+ dm_dig_max = DM_DIG_MAX_AP_COVERAGR; -+ dm_dig_min = DM_DIG_MIN_AP_COVERAGE; -+ DIG_MaxOfMin = DM_DIG_MAX_OF_MIN_COVERAGE; -+ } -+ else -+ { -+ dm_dig_max = DM_DIG_MAX_AP; -+ dm_dig_min = DM_DIG_MIN_AP; -+ DIG_MaxOfMin = DM_DIG_MAX_OF_MIN; -+ } -+ -+ //4 DFS band -+ if (((*pDM_Odm->pChannel>= 52) &&(*pDM_Odm->pChannel <= 64)) || -+ ((*pDM_Odm->pChannel >= 100) && (*pDM_Odm->pChannel <= 140))) -+ { -+ bDFSBand = TRUE; -+ if (*pDM_Odm->pBandWidth == ODM_BW20M){ -+ dm_dig_min = DM_DIG_MIN_AP_DFS+2; -+ } -+ else{ -+ dm_dig_min = DM_DIG_MIN_AP_DFS; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): ====== In DFS band ======\n")); -+ } -+ -+ //4 TX2path -+ if (priv->pmib->dot11RFEntry.tx2path && !bDFSBand && (*(pDM_Odm->pWirelessMode) == ODM_WM_B)) -+ dm_dig_max = 0x2A; -+ -+#if RTL8192E_SUPPORT -+#ifdef HIGH_POWER_EXT_LNA -+ if ((pDM_Odm->SupportICType & (ODM_RTL8192E)) && (pDM_Odm->ExtLNA)) -+ dm_dig_max = 0x42; -+#endif -+#endif -+ -+#else -+ //2 For WIN\CE -+ if(pDM_Odm->SupportICType >= ODM_RTL8188E) -+ dm_dig_max = 0x5A; -+ else -+ dm_dig_max = DM_DIG_MAX_NIC; -+ -+ if(pDM_Odm->SupportICType != ODM_RTL8821) -+ dm_dig_min = DM_DIG_MIN_NIC; -+ else -+ dm_dig_min = 0x1C; -+ -+ DIG_MaxOfMin = DM_DIG_MAX_AP; -+#endif -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutly upper bound = 0x%x, lower bound = 0x%x\n",dm_dig_max, dm_dig_min)); -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ // for P2P case -+ if(0 < *pDM_Odm->pu1ForcedIgiLb) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): P2P case: Force IGI lb to: %u !!!!!!\n", *pDM_Odm->pu1ForcedIgiLb)); -+ dm_dig_min = *pDM_Odm->pu1ForcedIgiLb; -+ dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1); -+ } -+#endif -+ -+ //1 Adjust boundary by RSSI -+ if(pDM_Odm->bLinked && bPerformance) -+ { -+ //2 Modify DIG upper bound -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ offset = 15; -+#else -+ //4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT -+ if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723A)) && (pDM_Odm->bBtLimitedDig==1)) -+ { -+ offset = 10; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset)); -+ } -+ else -+ offset = 15; -+#endif -+ -+ if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) -+ pDM_DigTable->rx_gain_range_max = dm_dig_max; -+ else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) -+ pDM_DigTable->rx_gain_range_max = dm_dig_min; -+ else -+ pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ //2 Modify DIG lower bound -+ //if(pDM_Odm->bOneEntryOnly) -+ { -+ if(pDM_Odm->RSSI_Min < dm_dig_min) -+ DIG_Dynamic_MIN = dm_dig_min; -+ else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) -+ DIG_Dynamic_MIN = DIG_MaxOfMin; -+ else -+ DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; -+ } -+#else -+ { -+ //4 For AP -+#ifdef __ECOS -+ HAL_REORDER_BARRIER(); -+#else -+ rmb(); -+#endif -+ if (bDFSBand) -+ { -+ DIG_Dynamic_MIN = dm_dig_min; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min)); -+ } -+ else -+ { -+ if(pDM_Odm->RSSI_Min < dm_dig_min) -+ DIG_Dynamic_MIN = dm_dig_min; -+ else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) -+ DIG_Dynamic_MIN = DIG_MaxOfMin; -+ else -+ DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; -+ } -+ } -+#endif -+ } -+ else -+ { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ if(bPerformance && bDFSBand) -+ { -+ pDM_DigTable->rx_gain_range_max = 0x28; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force upper bound to 0x%x before link !!!!!!\n", pDM_DigTable->rx_gain_range_max)); -+ } -+ else -+#endif -+ { -+ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_OF_MIN; -+ } -+ DIG_Dynamic_MIN = dm_dig_min; -+ } -+ -+ //1 Force Lower Bound for AntDiv -+ if(pDM_Odm->bLinked && !pDM_Odm->bOneEntryOnly) -+ { -+ if((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) -+ { -+ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV || pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) { -+ if (pDM_DigTable->AntDiv_RSSI_max > DIG_MaxOfMin) -+ DIG_Dynamic_MIN = DIG_MaxOfMin; -+ else -+ DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", DIG_Dynamic_MIN)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", pDM_DigTable->AntDiv_RSSI_max)); -+ } -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n", -+ pDM_DigTable->rx_gain_range_max, DIG_Dynamic_MIN)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Link status: bLinked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n", -+ pDM_Odm->bLinked, pDM_Odm->RSSI_Min, FirstConnect, FirstDisConnect)); -+ -+ //1 Modify DIG lower bound, deal with abnormal case -+ //2 Abnormal false alarm case -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ if(bDFSBand) -+ { -+ pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; -+ } -+ else -+#endif -+ { -+ if(!pDM_Odm->bLinked) -+ { -+ pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; -+ -+ if (FirstDisConnect) -+ pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; -+ } -+ else -+ pDM_DigTable->rx_gain_range_min = odm_ForbiddenIGICheck(pDM_Odm, DIG_Dynamic_MIN, CurrentIGI); -+ } -+ -+ //2 Abnormal # beacon case -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(pDM_Odm->bLinked && !FirstConnect) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Beacon Num (%d)\n", pDM_Odm->PhyDbgInfo.NumQryBeaconPkt)); -+ if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pDM_Odm->bsta_state)) -+ { -+ pDM_DigTable->rx_gain_range_min = dm_dig_min; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", -+ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, pDM_DigTable->rx_gain_range_min)); -+ } -+ } -+#endif -+ -+ //2 Abnormal lower bound case -+ if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) -+ { -+ pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n",pDM_DigTable->rx_gain_range_min)); -+ } -+ -+ -+ //1 False alarm threshold decision -+ odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d \n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2])); -+ -+ //1 Adjust initial gain by false alarm -+ if(pDM_Odm->bLinked && bPerformance) -+ { -+ //2 After link -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI after link\n")); -+ -+ if(bFirstTpTarget || (FirstConnect && bPerformance)) -+ { -+ pDM_DigTable->LargeFAHit = 0; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ if(bDFSBand) -+ { -+ if(pDM_Odm->RSSI_Min > 0x28) -+ CurrentIGI = 0x28; -+ else -+ CurrentIGI = pDM_Odm->RSSI_Min; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: One-shot to 0x28 upmost!!!!!!\n")); -+ } -+ else -+#endif -+ { -+ if(pDM_Odm->RSSI_Min < DIG_MaxOfMin) -+ { -+ if(CurrentIGI < pDM_Odm->RSSI_Min) -+ CurrentIGI = pDM_Odm->RSSI_Min; -+ } -+ else -+ { -+ if(CurrentIGI < DIG_MaxOfMin) -+ CurrentIGI = DIG_MaxOfMin; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+#if (RTL8812A_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8812) -+ ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); -+#endif -+#endif -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", CurrentIGI)); -+ -+ } -+ else -+ { -+ if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) -+ CurrentIGI = CurrentIGI + 4; -+ else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) -+ CurrentIGI = CurrentIGI + 2; -+ else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) -+ CurrentIGI = CurrentIGI - 2; -+ -+ //4 Abnormal # beacon case -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) -+ { -+ CurrentIGI = pDM_DigTable->rx_gain_range_min; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n", -+ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, CurrentIGI)); -+ } -+#endif -+ } -+ } -+ else -+ { -+ //2 Before link -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI before link\n")); -+ -+ if(FirstDisConnect || bFirstCoverage) -+ { -+ CurrentIGI = dm_dig_min; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n")); -+ } -+ else -+ { -+ if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) -+ CurrentIGI = CurrentIGI + 4; -+ else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) -+ CurrentIGI = CurrentIGI + 2; -+ else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) -+ CurrentIGI = CurrentIGI - 2; -+ } -+ } -+ -+ //1 Check initial gain by upper/lower bound -+ if(CurrentIGI < pDM_DigTable->rx_gain_range_min) -+ CurrentIGI = pDM_DigTable->rx_gain_range_min; -+ -+ if(CurrentIGI > pDM_DigTable->rx_gain_range_max) -+ CurrentIGI = pDM_DigTable->rx_gain_range_max; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x, TotalFA = %d\n\n", CurrentIGI, pFalseAlmCnt->Cnt_all)); -+ -+ //1 High power RSSI threshold -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) -+ { -+ // High power IGI lower bound -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); -+ if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); -+ //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; -+ CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; -+ } -+ } -+ if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) -+ { -+ if(pHalData->UndecoratedSmoothedPWDB > 0x28) -+ { -+ if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) -+ { -+ //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; -+ CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; -+ } -+ } -+ } -+#endif -+ -+ //1 Update status -+#if (RTL8192D_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ //sherry delete DualMacSmartConncurrent 20110517 -+ if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) -+ { -+ ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); -+ if(*(pDM_Odm->pbMasterOfDMSP)) -+ { -+ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; -+ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; -+ } -+ else -+ { -+ pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; -+ pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; -+ } -+ } -+ else -+ { -+ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); -+ if(*(pDM_Odm->pBandType) == ODM_BAND_5G) -+ { -+ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; -+ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; -+ } -+ else -+ { -+ pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; -+ pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; -+ } -+ } -+ } -+ else -+#endif -+ { -+#if ((DM_ODM_SUPPORT_TYPE & ODM_WIN) || ((DM_ODM_SUPPORT_TYPE & ODM_CE) && (ODM_CONFIG_BT_COEXIST == 1))) -+ if(pDM_Odm->bBtHsOperation) -+ { -+ if(pDM_Odm->bLinked) -+ { -+ if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) -+ ODM_Write_DIG(pDM_Odm, CurrentIGI); -+ else -+ ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); -+ -+ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; -+ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; -+ } -+ else -+ { -+ if(pDM_Odm->bLinkInProcess) -+ ODM_Write_DIG(pDM_Odm, 0x1c); -+ else if(pDM_Odm->bBtConnectProcess) -+ ODM_Write_DIG(pDM_Odm, 0x28); -+ else -+ ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); -+ } -+ } -+ else // BT is not using -+#endif -+ { -+ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); -+ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; -+ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; -+ } -+ } -+} -+ -+VOID -+odm_DIGbyRSSI_LPS( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); -+ -+ u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C -+ u1Byte CurrentIGI=pDM_Odm->RSSI_Min; -+ -+ if(odm_DigAbort(pDM_Odm) == TRUE) -+ return; -+ -+ CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS()==>\n")); -+ -+ // Using FW PS mode to make IGI -+ //Adjust by FA in LPS MODE -+ if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) -+ CurrentIGI = CurrentIGI+4; -+ else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) -+ CurrentIGI = CurrentIGI+2; -+ else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) -+ CurrentIGI = CurrentIGI-2; -+ -+ -+ //Lower bound checking -+ -+ //RSSI Lower bound check -+ if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) -+ RSSI_Lower =(pDM_Odm->RSSI_Min-10); -+ else -+ RSSI_Lower =DM_DIG_MIN_NIC; -+ -+ //Upper and Lower Bound checking -+ if(CurrentIGI > DM_DIG_MAX_NIC) -+ CurrentIGI=DM_DIG_MAX_NIC; -+ else if(CurrentIGI < RSSI_Lower) -+ CurrentIGI =RSSI_Lower; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pFalseAlmCnt->Cnt_all = %d\n",pFalseAlmCnt->Cnt_all)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pDM_Odm->RSSI_Min = %d\n",pDM_Odm->RSSI_Min)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): CurrentIGI = 0x%x\n",CurrentIGI)); -+ -+ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); -+#endif -+} -+ -+//3============================================================ -+//3 FASLE ALARM CHECK -+//3============================================================ -+ -+VOID -+odm_FalseAlarmCounterStatistics( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); -+ u4Byte ret_value; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+//Mark there, and check this in odm_DMWatchDog -+#if 0 //(DM_ODM_SUPPORT_TYPE == ODM_AP) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) -+ return; -+#endif -+#endif -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics()======>\n")); -+ -+#if (ODM_IC_11N_SERIES_SUPPORT == 1) -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) -+ { -+ -+ //hold ofdm counter -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter -+ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); -+ FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); -+ FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); -+ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); -+ FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); -+ FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); -+ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); -+ FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); -+ FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); -+ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); -+ FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); -+ -+ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + -+ FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + -+ FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; -+ -+#if (RTL8188E_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); -+ FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); -+ FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); -+ } -+#endif -+ -+#if (RTL8192D_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ odm_GetCCKFalseAlarm_92D(pDM_Odm); -+ } -+ else -+#endif -+ { -+ //hold cck counter -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); -+ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); -+ FalseAlmCnt->Cnt_Cck_fail = ret_value; -+ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); -+ FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; -+ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); -+ FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); -+ } -+ -+ FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + -+ FalseAlmCnt->Cnt_SB_Search_fail + -+ FalseAlmCnt->Cnt_Parity_Fail + -+ FalseAlmCnt->Cnt_Rate_Illegal + -+ FalseAlmCnt->Cnt_Crc8_fail + -+ FalseAlmCnt->Cnt_Mcs_fail + -+ FalseAlmCnt->Cnt_Cck_fail); -+ -+ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; -+ -+#if (RTL8192C_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8192C) -+ odm_ResetFACounter_92C(pDM_Odm); -+#endif -+ -+#if (RTL8192D_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ odm_ResetFACounter_92D(pDM_Odm); -+#endif -+ -+ if(pDM_Odm->SupportICType >=ODM_RTL8723A) -+ { -+ //reset false alarm counter registers -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); -+ -+ //update ofdm counter -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter -+ -+ //reset CCK CCA counter -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); -+ //reset CCK FA counter -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); -+ } -+ -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", -+ FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", -+ FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", -+ FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); -+ } -+#endif -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ { -+ u4Byte CCKenable; -+ -+ /* read OFDM FA counter */ -+ FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); -+ -+ -+ /* Read CCK FA counter */ -+ FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); -+ -+ /* read CCK/OFDM CCA counter */ -+ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11AC, bMaskDWord); -+ FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff0000) >> 16; -+ FalseAlmCnt->Cnt_CCK_CCA = ret_value & 0xffff; -+ -+#if (RTL8881A_SUPPORT==1) -+ /* For 8881A */ -+ if(pDM_Odm->SupportICType == ODM_RTL8881A) -+ { -+ u4Byte Cnt_Ofdm_fail_temp = 0; -+ -+ if(FalseAlmCnt->Cnt_Ofdm_fail >= FalseAlmCnt->Cnt_Ofdm_fail_pre) -+ { -+ Cnt_Ofdm_fail_temp = FalseAlmCnt->Cnt_Ofdm_fail_pre; -+ FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; -+ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Ofdm_fail - Cnt_Ofdm_fail_temp; -+ } -+ else -+ FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail_pre)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail_pre=%d\n", Cnt_Ofdm_fail_temp)); -+ -+ /* Reset FA counter by enable/disable OFDM */ -+ if(FalseAlmCnt->Cnt_Ofdm_fail_pre >= 0x7fff) -+ { -+ // reset OFDM -+ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,0); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,1); -+ FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Reset false alarm counter\n")); -+ } -+ } -+#endif -+ -+ /* reset OFDM FA coutner */ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); -+ -+ /* reset CCK FA counter */ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); -+ -+ /* reset CCA counter */ -+ ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 1); -+ ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 0); -+ -+ CCKenable = ODM_GetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT28); -+ if(CCKenable)//if(*pDM_Odm->pBandType == ODM_BAND_2_4G) -+ { -+ FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; -+ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_CCK_CCA + FalseAlmCnt->Cnt_OFDM_CCA; -+ } -+ else -+ { -+ FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail; -+ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA; -+ } -+ -+ } -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_OFDM_CCA=%d\n", FalseAlmCnt->Cnt_OFDM_CCA)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCK_CCA=%d\n", FalseAlmCnt->Cnt_CCK_CCA)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCA_all=%d\n", FalseAlmCnt->Cnt_CCA_all)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Total False Alarm=%d\n\n", FalseAlmCnt->Cnt_all)); -+} -+ -+//3============================================================ -+//3 CCK Packet Detect Threshold -+//3============================================================ -+ -+VOID -+odm_PauseCCKPacketDetection( -+ IN PVOID pDM_VOID, -+ IN PHYDM_PAUSE_TYPE PauseType, -+ IN PHYDM_PAUSE_LEVEL pause_level, -+ IN u1Byte CCKPDThreshold -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection()=========> level = %d\n", pause_level)); -+ -+ if ((pDM_DigTable->pause_cckpd_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Return: SupportAbility ODM_BB_CCK_PD or ODM_BB_FA_CNT is disabled\n")); -+ return; -+ } -+ -+ if (pause_level > DM_DIG_MAX_PAUSE_TYPE) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, -+ ("odm_PauseCCKPacketDetection(): Return: Wrong pause level !!\n")); -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4], -+ pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0])); -+ -+ switch (PauseType) { -+ /* Pause CCK Packet Detection Threshold */ -+ case PHYDM_PAUSE: -+ { -+ /* Disable CCK PD */ -+ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_CCK_PD)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Pause CCK packet detection threshold !!\n")); -+ -+ /* Backup original CCK PD threshold decided by CCK PD mechanism */ -+ if (pDM_DigTable->pause_cckpd_level == 0) { -+ pDM_DigTable->CCKPDBackup = pDM_DigTable->CurCCK_CCAThres; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, -+ ("odm_PauseCCKPacketDetection(): Backup CCKPD = 0x%x, new CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup, CCKPDThreshold)); -+ } -+ -+ /* Update pause level */ -+ pDM_DigTable->pause_cckpd_level = (pDM_DigTable->pause_cckpd_level | BIT(pause_level)); -+ -+ /* Record CCK PD threshold */ -+ pDM_DigTable->pause_cckpd_value[pause_level] = CCKPDThreshold; -+ -+ /* Write new CCK PD threshold */ -+ if (BIT(pause_level + 1) > pDM_DigTable->pause_cckpd_level) { -+ ODM_Write_CCK_CCA_Thres(pDM_Odm, CCKPDThreshold); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): CCKPD of higher level = 0x%x\n", CCKPDThreshold)); -+ } -+ break; -+ } -+ /* Resume CCK Packet Detection Threshold */ -+ case PHYDM_RESUME: -+ { -+ /* check if the level is illegal or not */ -+ if ((pDM_DigTable->pause_cckpd_level & (BIT(pause_level))) != 0) { -+ pDM_DigTable->pause_cckpd_level = pDM_DigTable->pause_cckpd_level & (~(BIT(pause_level))); -+ pDM_DigTable->pause_cckpd_value[pause_level] = 0; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Resume CCK PD !!\n")); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong resume level !!\n")); -+ break; -+ } -+ -+ /* Resume DIG */ -+ if (pDM_DigTable->pause_cckpd_level == 0) { -+ /* Write backup IGI value */ -+ ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->CCKPDBackup); -+ /* pDM_DigTable->bIgnoreDIG = TRUE; */ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write original CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup)); -+ -+ /* Enable DIG */ -+ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_CCK_PD); -+ break; -+ } -+ -+ if (BIT(pause_level) > pDM_DigTable->pause_cckpd_level) { -+ u1Byte max_level; -+ -+ /* Calculate the maximum level now */ -+ for (max_level = (pause_level - 1); max_level >= 0; max_level--) { -+ if ((pDM_DigTable->pause_cckpd_level & BIT(max_level)) > 0) -+ break; -+ } -+ -+ /* write CCKPD of lower level */ -+ ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->pause_cckpd_value[max_level]); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write CCKPD (0x%x) of level (%d)\n", -+ pDM_DigTable->pause_cckpd_value[max_level], max_level)); -+ break; -+ } -+ break; -+ } -+ default: -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong type !!\n")); -+ break; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4], -+ pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0])); -+} -+ -+ -+VOID -+odm_CCKPacketDetectionThresh( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); -+ u1Byte CurCCK_CCAThres, RSSI_thd = 55; -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+//modify by Guo.Mingzhi 2011-12-29 -+ if (pDM_Odm->bDualMacSmartConcurrent == TRUE) -+// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) -+ return; -+ if(pDM_Odm->bBtHsOperation) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); -+ ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); -+ return; -+ } -+#endif -+ -+ if((!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD)) ||(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() return==========\n")); -+#ifdef MCR_WIRELESS_EXTEND -+ ODM_Write_CCK_CCA_Thres(pDM_Odm, 0x43); -+#endif -+ return; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ if(pDM_Odm->ExtLNA) -+ return; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() ==========>\n")); -+ -+ if (pDM_Odm->bLinked) -+ { -+ if (pDM_Odm->RSSI_Min > RSSI_thd) -+ CurCCK_CCAThres = 0xcd; -+ else if ((pDM_Odm->RSSI_Min <= RSSI_thd) && (pDM_Odm->RSSI_Min > 10)) -+ CurCCK_CCAThres = 0x83; -+ else -+ { -+ if(FalseAlmCnt->Cnt_Cck_fail > 1000) -+ CurCCK_CCAThres = 0x83; -+ else -+ CurCCK_CCAThres = 0x40; -+ } -+ } else { -+ if(FalseAlmCnt->Cnt_Cck_fail > 1000) -+ CurCCK_CCAThres = 0x83; -+ else -+ CurCCK_CCAThres = 0x40; -+ } -+ -+#if (RTL8192D_SUPPORT==1) -+ if((pDM_Odm->SupportICType == ODM_RTL8192D) && (*pDM_Odm->pBandType == ODM_BAND_2_4G)) -+ ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); -+ else -+#endif -+ ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() CurCCK_CCAThres = 0x%x\n",CurCCK_CCAThres)); -+} -+ -+VOID -+ODM_Write_CCK_CCA_Thres( -+ IN PVOID pDM_VOID, -+ IN u1Byte CurCCK_CCAThres -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+ if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 -+ { -+ ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); -+ } -+ pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; -+ pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+// <20130108, Kordan> E.g., With LNA used, we make the Rx power smaller to have a better EVM. (Asked by Willis) -+VOID -+odm_RFEControl( -+ IN PDM_ODM_T pDM_Odm, -+ IN u8Byte RSSIVal -+ ) -+{ -+ PADAPTER Adapter = (PADAPTER)pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ static u1Byte TRSW_HighPwr = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("===> odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X, pHalData->RFEType = %d\n", -+ RSSIVal, TRSW_HighPwr, pHalData->RFEType )); -+ -+ if (pHalData->RFEType == 3) { -+ -+ pDM_Odm->RSSI_TRSW = RSSIVal; -+ -+ if (pDM_Odm->RSSI_TRSW >= pDM_Odm->RSSI_TRSW_H) -+ { -+ TRSW_HighPwr = 1; // Switch to -+ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control -+ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); // Set ANTSW=1/ANTSWB=0 for SW control -+ -+ } -+ else if (pDM_Odm->RSSI_TRSW <= pDM_Odm->RSSI_TRSW_L) -+ { -+ TRSW_HighPwr = 0; // Switched back -+ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control -+ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x0); // Set ANTSW=1/ANTSWB=0 for SW control -+ -+ } -+ } -+ -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L) = (%d, %d)\n", pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(RSSIVal, RSSIVal, pDM_Odm->RSSI_TRSW_iso) = (%d, %d, %d)\n", -+ RSSIVal, pDM_Odm->RSSI_TRSW_iso, pDM_Odm->RSSI_TRSW)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("<=== odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X\n", RSSIVal, TRSW_HighPwr)); -+} -+ -+VOID -+odm_MPT_DIGWorkItemCallback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER Adapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ ODM_MPT_DIG(pDM_Odm); -+} -+ -+VOID -+odm_MPT_DIGCallback( -+ PRT_TIMER pTimer -+) -+{ -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ -+ #if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ #if USE_WORKITEM -+ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); -+ #else -+ ODM_MPT_DIG(pDM_Odm); -+ #endif -+ #else -+ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); -+ #endif -+ -+} -+ -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+VOID -+odm_MPT_DIGCallback( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if USE_WORKITEM -+ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); -+#else -+ ODM_MPT_DIG(pDM_Odm); -+#endif -+} -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE != ODM_CE) -+VOID -+odm_MPT_Write_DIG( -+ IN PVOID pDM_VOID, -+ IN u1Byte CurIGValue -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), CurIGValue); -+ -+ if(pDM_Odm->RFType > ODM_1T1R) -+ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), CurIGValue); -+ -+ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) -+ { -+ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_C,pDM_Odm), CurIGValue); -+ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_D,pDM_Odm), CurIGValue); -+ } -+ -+ pDM_DigTable->CurIGValue = CurIGValue; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurIGValue = 0x%x\n", CurIGValue)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("pDM_Odm->RFType = 0x%x\n", pDM_Odm->RFType)); -+} -+ -+VOID -+ODM_MPT_DIG( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); -+ u1Byte CurrentIGI = pDM_DigTable->CurIGValue; -+ u1Byte DIG_Upper = 0x40, DIG_Lower = 0x20; -+ u4Byte RXOK_cal; -+ u4Byte RxPWDBAve_final; -+ u1Byte IGI_A = 0x20, IGI_B = 0x20; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ #if ODM_FIX_2G_DIG -+ IGI_A = 0x22; -+ IGI_B = 0x24; -+ #endif -+ -+#else -+ if (!(pDM_Odm->priv->pshare->rf_ft_var.mp_specific && pDM_Odm->priv->pshare->mp_dig_on)) -+ return; -+ -+ if (*pDM_Odm->pBandType == ODM_BAND_5G) -+ DIG_Lower = 0x22; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> ODM_MPT_DIG, pBandType = %d\n", *pDM_Odm->pBandType)); -+ -+#if (ODM_FIX_2G_DIG || (DM_ODM_SUPPORT_TYPE & ODM_AP)) -+ if (*pDM_Odm->pBandType == ODM_BAND_5G || (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B))) // for 5G or 8814 -+#else -+ if (1) // for both 2G/5G -+#endif -+ { -+ odm_FalseAlarmCounterStatistics(pDM_Odm); -+ -+ RXOK_cal = pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM; -+ RxPWDBAve_final = (RXOK_cal != 0)?pDM_Odm->RxPWDBAve/RXOK_cal:0; -+ -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; -+ pDM_Odm->RxPWDBAve = 0; -+ pDM_Odm->MPDIG_2G = FALSE; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pDM_Odm->Times_2G = 0; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RX OK = %d\n", RXOK_cal)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RSSI = %d\n", RxPWDBAve_final)); -+ -+ if (RXOK_cal >= 70 && RxPWDBAve_final <= 40) -+ { -+ if (CurrentIGI > 0x24) -+ odm_MPT_Write_DIG(pDM_Odm, 0x24); -+ } -+ else -+ { -+ if(pFalseAlmCnt->Cnt_all > 1000){ -+ CurrentIGI = CurrentIGI + 8; -+ } -+ else if(pFalseAlmCnt->Cnt_all > 200){ -+ CurrentIGI = CurrentIGI + 4; -+ } -+ else if (pFalseAlmCnt->Cnt_all > 50){ -+ CurrentIGI = CurrentIGI + 2; -+ } -+ else if (pFalseAlmCnt->Cnt_all < 2){ -+ CurrentIGI = CurrentIGI - 2; -+ } -+ -+ if (CurrentIGI < DIG_Lower ){ -+ CurrentIGI = DIG_Lower; -+ } -+ -+ if(CurrentIGI > DIG_Upper){ -+ CurrentIGI = DIG_Upper; -+ } -+ -+ odm_MPT_Write_DIG(pDM_Odm, CurrentIGI); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG = 0x%x, Cnt_all = %d, Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d\n", -+ CurrentIGI, pFalseAlmCnt->Cnt_all, pFalseAlmCnt->Cnt_Ofdm_fail, pFalseAlmCnt->Cnt_Cck_fail)); -+ } -+ } -+ else -+ { -+ if(pDM_Odm->MPDIG_2G == FALSE) -+ { -+ if((pDM_Odm->SupportPlatform & ODM_WIN) && !(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B))) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> Fix IGI\n")); -+ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), IGI_A); -+ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), IGI_B); -+ pDM_DigTable->CurIGValue = IGI_B; -+ } -+ else -+ odm_MPT_Write_DIG(pDM_Odm, IGI_A); -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pDM_Odm->Times_2G++; -+ -+ if (pDM_Odm->Times_2G == 3) -+#endif -+ { -+ pDM_Odm->MPDIG_2G = TRUE; -+ } -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (pDM_Odm->SupportICType == ODM_RTL8812) -+ odm_RFEControl(pDM_Odm, RxPWDBAve_final); -+#endif -+ -+ ODM_SetTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, 700); -+} -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++VOID ++ODM_ChangeDynamicInitGainThresh( ++ IN PVOID pDM_VOID, ++ IN u4Byte DM_Type, ++ IN u4Byte DM_Value ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ if (DM_Type == DIG_TYPE_THRESH_HIGH) ++ { ++ pDM_DigTable->RssiHighThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_THRESH_LOW) ++ { ++ pDM_DigTable->RssiLowThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_ENABLE) ++ { ++ pDM_DigTable->Dig_Enable_Flag = TRUE; ++ } ++ else if (DM_Type == DIG_TYPE_DISABLE) ++ { ++ pDM_DigTable->Dig_Enable_Flag = FALSE; ++ } ++ else if (DM_Type == DIG_TYPE_BACKOFF) ++ { ++ if(DM_Value > 30) ++ DM_Value = 30; ++ pDM_DigTable->BackoffVal = (u1Byte)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) ++ { ++ if(DM_Value == 0) ++ DM_Value = 0x1; ++ pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) ++ { ++ if(DM_Value > 0x50) ++ DM_Value = 0x50; ++ pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; ++ } ++} // DM_ChangeDynamicInitGainThresh // ++ ++int ++getIGIForDiff(int value_IGI) ++{ ++ #define ONERCCA_LOW_TH 0x30 ++ #define ONERCCA_LOW_DIFF 8 ++ ++ if (value_IGI < ONERCCA_LOW_TH) { ++ if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) ++ return ONERCCA_LOW_TH; ++ else ++ return value_IGI + ONERCCA_LOW_DIFF; ++ } else { ++ return value_IGI; ++ } ++} ++ ++VOID ++odm_FAThresholdCheck( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN bDFSBand, ++ IN BOOLEAN bPerformance, ++ IN u4Byte RxTp, ++ IN u4Byte TxTp, ++ OUT u4Byte* dm_FA_thres ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if(pDM_Odm->bLinked && (bPerformance||bDFSBand)) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ // 8192D special case ++ dm_FA_thres[0] = DM_DIG_FA_TH0_92D; ++ dm_FA_thres[1] = DM_DIG_FA_TH1_92D; ++ dm_FA_thres[2] = DM_DIG_FA_TH2_92D; ++ } ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) ++ { ++ // For AP ++ if((RxTp>>2) > TxTp && RxTp < 10000 && RxTp > 500) // 10Mbps & 0.5Mbps ++ { ++ dm_FA_thres[0] = 0x080; ++ dm_FA_thres[1] = 0x100; ++ dm_FA_thres[2] = 0x200; ++ } ++ else ++ { ++ dm_FA_thres[0] = 0x100; ++ dm_FA_thres[1] = 0x200; ++ dm_FA_thres[2] = 0x300; ++ } ++ } ++#else ++ else if(pDM_Odm->SupportICType == ODM_RTL8723A && pDM_Odm->bBtLimitedDig) ++ { ++ // 8723A BT special case ++ dm_FA_thres[0] = DM_DIG_FA_TH0; ++ dm_FA_thres[1] = 0x250; ++ dm_FA_thres[2] = 0x300; ++ } ++#endif ++ else ++ { ++ // For NIC ++ dm_FA_thres[0] = DM_DIG_FA_TH0; ++ dm_FA_thres[1] = DM_DIG_FA_TH1; ++ dm_FA_thres[2] = DM_DIG_FA_TH2; ++ } ++ } ++ else ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bDFSBand) ++ { ++ // For DFS band and no link ++ dm_FA_thres[0] = 250; ++ dm_FA_thres[1] = 1000; ++ dm_FA_thres[2] = 2000; ++ } ++ else ++#endif ++ { ++ dm_FA_thres[0] = 2000; ++ dm_FA_thres[1] = 4000; ++ dm_FA_thres[2] = 5000; ++ } ++ } ++ return; ++} ++ ++u1Byte ++odm_ForbiddenIGICheck( ++ IN PVOID pDM_VOID, ++ IN u1Byte DIG_Dynamic_MIN, ++ IN u1Byte CurrentIGI ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u1Byte rx_gain_range_min = pDM_DigTable->rx_gain_range_min; ++ ++ if(pFalseAlmCnt->Cnt_all > 10000) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case. \n")); ++ ++ if(pDM_DigTable->LargeFAHit != 3) ++ pDM_DigTable->LargeFAHit++; ++ ++ if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) ++ { ++ pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; ++ pDM_DigTable->LargeFAHit = 1; ++ } ++ ++ if(pDM_DigTable->LargeFAHit >= 3) ++ { ++ if((pDM_DigTable->ForbiddenIGI + 2) > pDM_DigTable->rx_gain_range_max) ++ rx_gain_range_min = pDM_DigTable->rx_gain_range_max; ++ else ++ rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); ++ pDM_DigTable->Recover_cnt = 1800; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); ++ } ++ } ++ else ++ { ++ if(pDM_DigTable->Recover_cnt != 0) ++ { ++ pDM_DigTable->Recover_cnt --; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); ++ } ++ else ++ { ++ if(pDM_DigTable->LargeFAHit < 3) ++ { ++ if((pDM_DigTable->ForbiddenIGI - 2) < DIG_Dynamic_MIN) //DM_DIG_MIN) ++ { ++ pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; ++ rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); ++ } ++ else ++ { ++ pDM_DigTable->ForbiddenIGI -= 2; ++ rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); ++ } ++ } ++ else ++ { ++ pDM_DigTable->LargeFAHit = 0; ++ } ++ } ++ } ++ ++ return rx_gain_range_min; ++ ++} ++ ++VOID ++odm_InbandNoiseCalculate ( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ u1Byte IGIBackup, TimeCnt = 0, ValidCnt = 0; ++ BOOLEAN bTimeout = TRUE; ++ s1Byte sNoise_A, sNoise_B; ++ s4Byte NoiseRpt_A = 0,NoiseRpt_B = 0; ++ u4Byte tmp = 0; ++ static u1Byte failCnt = 0; ++ ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8192E))) ++ return; ++ ++ if(pDM_Odm->RFType == ODM_1T1R || *(pDM_Odm->pOnePathCCA) != ODM_CCA_2R) ++ return; ++ ++ if(!pDM_DigTable->bNoiseEst) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_InbandNoiseEstimate()========>\n")); ++ ++ //1 Set initial gain. ++ IGIBackup = pDM_DigTable->CurIGValue; ++ pDM_DigTable->IGIOffset_A = 0; ++ pDM_DigTable->IGIOffset_B = 0; ++ ODM_Write_DIG(pDM_Odm, 0x24); ++ ++ //1 Update idle time power report ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x0); ++ ++ delay_ms(2); ++ ++ //1 Get noise power level ++ while(1) ++ { ++ //2 Read Noise Floor Report ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ tmp = ODM_GetBBReg(pDM_Odm, 0x8f8, bMaskLWord); ++ ++ sNoise_A = (s1Byte)(tmp & 0xff); ++ sNoise_B = (s1Byte)((tmp & 0xff00)>>8); ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); ++ ++ if((sNoise_A < 20 && sNoise_A >= -70) && (sNoise_B < 20 && sNoise_B >= -70)) ++ { ++ ValidCnt++; ++ NoiseRpt_A += sNoise_A; ++ NoiseRpt_B += sNoise_B; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); ++ } ++ ++ TimeCnt++; ++ bTimeout = (TimeCnt >= 150)?TRUE:FALSE; ++ ++ if(ValidCnt == 20 || bTimeout) ++ break; ++ ++ delay_ms(2); ++ ++ } ++ ++ //1 Keep idle time power report ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x1); ++ ++ //1 Recover IGI ++ ODM_Write_DIG(pDM_Odm, IGIBackup); ++ ++ //1 Calculate Noise Floor ++ if(ValidCnt != 0) ++ { ++ NoiseRpt_A /= (ValidCnt<<1); ++ NoiseRpt_B /= (ValidCnt<<1); ++ } ++ ++ if(bTimeout) ++ { ++ NoiseRpt_A = 0; ++ NoiseRpt_B = 0; ++ ++ failCnt ++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Noise estimate fail time = %d\n", failCnt)); ++ ++ if(failCnt == 3) ++ { ++ failCnt = 0; ++ pDM_DigTable->bNoiseEst = FALSE; ++ } ++ } ++ else ++ { ++ NoiseRpt_A = -110 + 0x24 + NoiseRpt_A -6; ++ NoiseRpt_B = -110 + 0x24 + NoiseRpt_B -6; ++ pDM_DigTable->bNoiseEst = FALSE; ++ failCnt = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("NoiseRpt_A = %d, NoiseRpt_B = %d\n", NoiseRpt_A, NoiseRpt_B)); ++ } ++ ++ //1 Calculate IGI Offset ++ if(NoiseRpt_A > NoiseRpt_B) ++ { ++ pDM_DigTable->IGIOffset_A = NoiseRpt_A - NoiseRpt_B; ++ pDM_DigTable->IGIOffset_B = 0; ++ } ++ else ++ { ++ pDM_DigTable->IGIOffset_A = 0; ++ pDM_DigTable->IGIOffset_B = NoiseRpt_B - NoiseRpt_A; ++ } ++ ++#endif ++ return; ++} ++ ++VOID ++odm_DigForBtHsMode( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; ++ u1Byte digForBtHs=0; ++ u1Byte digUpBound=0x5a; ++ ++ if(pDM_Odm->bBtConnectProcess) ++ { ++ if(pDM_Odm->SupportICType&(ODM_RTL8723A)) ++ digForBtHs = 0x28; ++ else ++ digForBtHs = 0x22; ++ } ++ else ++ { ++ // ++ // Decide DIG value by BT HS RSSI. ++ // ++ digForBtHs = pDM_Odm->btHsRssi+4; ++ ++ //DIG Bound ++ if(pDM_Odm->SupportICType&(ODM_RTL8723A)) ++ digUpBound = 0x3e; ++ ++ if(digForBtHs > digUpBound) ++ digForBtHs = digUpBound; ++ if(digForBtHs < 0x1c) ++ digForBtHs = 0x1c; ++ ++ // update Current IGI ++ pDM_DigTable->BT30_CurIGI = digForBtHs; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); ++#endif ++} ++ ++VOID ++ODM_Write_DIG( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurrentIGI ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ if (pDM_DigTable->bStopDIG) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Stop Writing IGI\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n", ++ ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); ++ ++ //1 Check initial gain by upper bound ++ if ((!pDM_DigTable->bPSDInProgress) && pDM_Odm->bLinked) ++ { ++ if (CurrentIGI > pDM_DigTable->rx_gain_range_max) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x) is larger than upper bound !!\n", CurrentIGI)); ++ CurrentIGI = pDM_DigTable->rx_gain_range_max; ++ } ++ if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY && pDM_Odm->adaptivity_flag == TRUE) ++ { ++ if(CurrentIGI > pDM_Odm->Adaptivity_IGI_upper) ++ CurrentIGI = pDM_Odm->Adaptivity_IGI_upper; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Adaptivity case: Force upper bound to 0x%x !!!!!!\n", CurrentIGI)); ++ } ++ } ++ ++ if(pDM_DigTable->CurIGValue != CurrentIGI) ++ { ++ ++ /*Add by YuChen for USB IO too slow issue*/ ++ if ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) && (CurrentIGI > pDM_DigTable->CurIGValue)) ++ Phydm_Adaptivity(pDM_Odm, CurrentIGI); ++ ++ //1 Set IGI value ++ if(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE)) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if(pDM_Odm->RFType > ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ } ++ } ++ else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) ++ { ++ switch(*(pDM_Odm->pOnePathCCA)) ++ { ++ case ODM_CCA_2R: ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if(pDM_Odm->RFType > ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ } ++ break; ++ case ODM_CCA_1R_A: ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ if(pDM_Odm->RFType != ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); ++ break; ++ case ODM_CCA_1R_B: ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); ++ if(pDM_Odm->RFType != ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ break; ++ } ++ } ++ pDM_DigTable->CurIGValue = CurrentIGI; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x).\n", CurrentIGI)); ++ ++} ++ ++VOID ++odm_PauseDIG( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte IGIValue ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG()=========> level = %d\n", pause_level)); ++ ++ if ((pDM_DigTable->pause_dig_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_DIG) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ++ ("odm_PauseDIG(): Return: SupportAbility DIG or FA is disabled !!\n")); ++ return; ++ } ++ ++ if (pause_level > DM_DIG_MAX_PAUSE_TYPE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ++ ("odm_PauseDIG(): Return: Wrong pause level !!\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4], ++ pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0])); ++ ++ switch (PauseType) { ++ /* Pause DIG */ ++ case PHYDM_PAUSE: ++ { ++ /* Disable DIG */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_DIG)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Pause DIG !!\n")); ++ ++ /* Backup IGI value */ ++ if (pDM_DigTable->pause_dig_level == 0) { ++ pDM_DigTable->IGIBackup = pDM_DigTable->CurIGValue; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Backup IGI = 0x%x, new IGI = 0x%x\n", pDM_DigTable->IGIBackup, IGIValue)); ++ } ++ ++ /* Record IGI value */ ++ pDM_DigTable->pause_dig_value[pause_level] = IGIValue; ++ ++ /* Update pause level */ ++ pDM_DigTable->pause_dig_level = (pDM_DigTable->pause_dig_level | BIT(pause_level)); ++ ++ /* Write new IGI value */ ++ if (BIT(pause_level + 1) > pDM_DigTable->pause_dig_level) { ++ ODM_Write_DIG(pDM_Odm, IGIValue); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): IGI of higher level = 0x%x\n", IGIValue)); ++ } ++ break; ++ } ++ /* Resume DIG */ ++ case PHYDM_RESUME: ++ { ++ /* check if the level is illegal or not */ ++ if ((pDM_DigTable->pause_dig_level & (BIT(pause_level))) != 0) { ++ pDM_DigTable->pause_dig_level = pDM_DigTable->pause_dig_level & (~(BIT(pause_level))); ++ pDM_DigTable->pause_dig_value[pause_level] = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Resume DIG !!\n")); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong resume level !!\n")); ++ break; ++ } ++ ++ /* Resume DIG */ ++ if (pDM_DigTable->pause_dig_level == 0) { ++ /* Write backup IGI value */ ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->IGIBackup); ++ pDM_DigTable->bIgnoreDIG = TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write original IGI = 0x%x\n", pDM_DigTable->IGIBackup)); ++ ++ /* Enable DIG */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_DIG); ++ break; ++ } ++ ++ if (BIT(pause_level) > pDM_DigTable->pause_dig_level) { ++ u1Byte max_level; ++ ++ /* Calculate the maximum level now */ ++ for (max_level = (pause_level - 1); max_level >= 0; max_level--) { ++ if ((pDM_DigTable->pause_dig_level & BIT(max_level)) > 0) ++ break; ++ } ++ ++ /* write IGI of lower level */ ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->pause_dig_value[max_level]); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write IGI (0x%x) of level (%d)\n", ++ pDM_DigTable->pause_dig_value[max_level], max_level)); ++ break; ++ } ++ break; ++ } ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong type !!\n")); ++ break; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4], ++ pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0])); ++ ++} ++ ++BOOLEAN ++odm_DigAbort( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++#endif ++ ++ //SupportAbility ++ if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_FA_CNT is disabled\n")); ++ return TRUE; ++ } ++ ++ //SupportAbility ++ if(!(pDM_Odm->SupportAbility & ODM_BB_DIG)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_DIG is disabled\n")); ++ return TRUE; ++ } ++ ++ //ScanInProcess ++ if(*(pDM_Odm->pbScanInProcess)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In Scan Progress \n")); ++ return TRUE; ++ } ++ ++ if(pDM_DigTable->bIgnoreDIG) ++ { ++ pDM_DigTable->bIgnoreDIG = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Ignore DIG \n")); ++ return TRUE; ++ } ++ ++ //add by Neil Chen to avoid PSD is processing ++ if(pDM_Odm->bDMInitialGainEnable == FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: PSD is Processing \n")); ++ return TRUE; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #if OS_WIN_FROM_WIN7(OS_VERSION) ++ if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Is AP mode or In HCT Test \n")); ++ return TRUE; ++ } ++ #endif ++ ++ if(pDM_Odm->bBtHsOperation) ++ { ++ odm_DigForBtHsMode(pDM_Odm); ++ } ++ ++ if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) ++ { ++ if(pRX_HP_Table->RXHP_flag == 1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In RXHP Operation \n")); ++ return TRUE; ++ } ++ } ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) ++ { ++ printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); ++ ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); ++ return TRUE; ++ } ++ #endif ++#else ++ if (!(priv->up_time > 5)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Not In DIG Operation Period \n")); ++ return TRUE; ++ } ++#endif ++ ++ return FALSE; ++} ++ ++VOID ++odm_DIGInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++#endif ++ ++ pDM_DigTable->bStopDIG = FALSE; ++ pDM_DigTable->bIgnoreDIG = FALSE; ++ pDM_DigTable->bPSDInProgress = FALSE; ++ pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); ++ pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; ++ pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; ++ pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; ++ pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; ++ pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; ++ pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; ++ pDM_DigTable->PreCCK_CCAThres = 0xFF; ++ pDM_DigTable->CurCCK_CCAThres = 0x83; ++ pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; ++ pDM_DigTable->LargeFAHit = 0; ++ pDM_DigTable->Recover_cnt = 0; ++ pDM_DigTable->bMediaConnect_0 = FALSE; ++ pDM_DigTable->bMediaConnect_1 = FALSE; ++ ++ //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error ++ pDM_Odm->bDMInitialGainEnable = TRUE; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ pDM_DigTable->DIG_Dynamic_MIN_0 = 0x25; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = 0x25; ++ ++ // For AP\ ADSL modified DIG ++ pDM_DigTable->bTpTarget = FALSE; ++ pDM_DigTable->bNoiseEst = TRUE; ++ pDM_DigTable->IGIOffset_A = 0; ++ pDM_DigTable->IGIOffset_B = 0; ++ pDM_DigTable->TpTrainTH_min = 0; ++ ++ // For RTL8881A ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; ++ ++ //Dyanmic EDCCA ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xC50, 0xFFFF0000, 0xfafd); ++ } ++#else ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; ++ ++ //To Initi BT30 IGI ++ pDM_DigTable->BT30_CurIGI=0x32; ++ ++ ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_dig_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1)); ++ pDM_DigTable->pause_dig_level = 0; ++ ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_cckpd_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1)); ++ pDM_DigTable->pause_cckpd_level = 0; ++#endif ++ ++ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) ++ { ++ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; ++ pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; ++ } ++ else ++ { ++ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; ++ pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; ++ } ++ ++} ++ ++ ++VOID ++odm_DIG( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PSTA_INFO_T pEntry; ++#endif ++ ++ // Common parameters ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ BOOLEAN FirstConnect,FirstDisConnect; ++ u1Byte DIG_MaxOfMin, DIG_Dynamic_MIN; ++ u1Byte dm_dig_max, dm_dig_min; ++ u1Byte CurrentIGI = pDM_DigTable->CurIGValue; ++ u1Byte offset; ++ u4Byte dm_FA_thres[3]; ++ u4Byte TxTp = 0, RxTp = 0; ++ BOOLEAN bDFSBand = FALSE; ++ BOOLEAN bPerformance = TRUE, bFirstTpTarget = FALSE, bFirstCoverage = FALSE; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ u4Byte TpTrainTH_MIN = DM_DIG_TP_Target_TH0; ++ static u1Byte TimeCnt = 0; ++ u1Byte i; ++#endif ++ ++ if(odm_DigAbort(pDM_Odm) == TRUE) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()===========================>\n\n")); ++ ++ ++ //1 Update status ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) ++ { ++ if(*(pDM_Odm->pbMasterOfDMSP)) ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); ++ } ++ else ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); ++ } ++ } ++ else ++ { ++ if(*(pDM_Odm->pBandType) == ODM_BAND_5G) ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); ++ } ++ else ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); ++ } ++ } ++ } ++ else ++#endif ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ //1 Noise Floor Estimate ++ //pDM_DigTable->bNoiseEst = (FirstConnect)?TRUE:pDM_DigTable->bNoiseEst; ++ //odm_InbandNoiseCalculate (pDM_Odm); ++ ++ //1 Mode decision ++ if(pDM_Odm->bLinked) ++ { ++ //2 Calculate total TP ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ RxTp += (u4Byte)(pEntry->rx_byte_cnt_LowMAW>>7); ++ TxTp += (u4Byte)(pEntry->tx_byte_cnt_LowMAW>>7); //Kbps ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TX TP = %dkbps, RX TP = %dkbps\n", TxTp, RxTp)); ++ } ++ ++ switch(pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable) ++ { ++ case 0: ++ { ++ bPerformance = TRUE; ++ break; ++ } ++ case 1: ++ { ++ bPerformance = FALSE; ++ break; ++ } ++ case 2: ++ { ++ if(pDM_Odm->bLinked) ++ { ++ if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH0) ++ TpTrainTH_MIN = pDM_DigTable->TpTrainTH_min; ++ ++ if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH1) ++ TpTrainTH_MIN = DM_DIG_TP_Target_TH1; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TP training mode lower bound = %dkbps\n", TpTrainTH_MIN)); ++ ++ //2 Decide DIG mode by total TP ++ if((TxTp + RxTp) > DM_DIG_TP_Target_TH1) // change to performance mode ++ { ++ bFirstTpTarget = (!pDM_DigTable->bTpTarget)?TRUE:FALSE; ++ pDM_DigTable->bTpTarget = TRUE; ++ bPerformance = TRUE; ++ } ++ else if((TxTp + RxTp) < TpTrainTH_MIN) // change to coverage mode ++ { ++ bFirstCoverage = (pDM_DigTable->bTpTarget)?TRUE:FALSE; ++ ++ if(TimeCnt < DM_DIG_TP_Training_Period) ++ { ++ pDM_DigTable->bTpTarget = FALSE; ++ bPerformance = FALSE; ++ TimeCnt++; ++ } ++ else ++ { ++ pDM_DigTable->bTpTarget = TRUE; ++ bPerformance = TRUE; ++ bFirstTpTarget = TRUE; ++ TimeCnt = 0; ++ } ++ } ++ else // remain previous mode ++ { ++ bPerformance = pDM_DigTable->bTpTarget; ++ ++ if(!bPerformance) ++ { ++ if(TimeCnt < DM_DIG_TP_Training_Period) ++ TimeCnt++; ++ else ++ { ++ pDM_DigTable->bTpTarget = TRUE; ++ bPerformance = TRUE; ++ bFirstTpTarget = TRUE; ++ TimeCnt = 0; ++ } ++ } ++ } ++ ++ if(!bPerformance) ++ pDM_DigTable->TpTrainTH_min = RxTp + TxTp; ++ ++ } ++ else ++ { ++ bPerformance = FALSE; ++ pDM_DigTable->TpTrainTH_min = 0; ++ } ++ break; ++ } ++ default: ++ bPerformance = TRUE; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== DIG mode = %d ======\n", pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== bPerformance = %d ======\n", bPerformance)); ++#endif ++ ++ //1 Boundary Decision ++#if (RTL8192C_SUPPORT==1) ++ if((pDM_Odm->SupportICType & ODM_RTL8192C) && (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) ++ { ++ //2 High power case ++ if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) ++ { ++ dm_dig_max = DM_DIG_MAX_AP_HP; ++ dm_dig_min = DM_DIG_MIN_AP_HP; ++ } ++ else ++ { ++ dm_dig_max = DM_DIG_MAX_NIC_HP; ++ dm_dig_min = DM_DIG_MIN_NIC_HP; ++ } ++ DIG_MaxOfMin = DM_DIG_MAX_AP_HP; ++ } ++ else ++#endif ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ //2 For AP\ADSL ++ if(!bPerformance) ++ { ++ dm_dig_max = DM_DIG_MAX_AP_COVERAGR; ++ dm_dig_min = DM_DIG_MIN_AP_COVERAGE; ++ DIG_MaxOfMin = DM_DIG_MAX_OF_MIN_COVERAGE; ++ } ++ else ++ { ++ dm_dig_max = DM_DIG_MAX_AP; ++ dm_dig_min = DM_DIG_MIN_AP; ++ DIG_MaxOfMin = DM_DIG_MAX_OF_MIN; ++ } ++ ++ //4 DFS band ++ if (((*pDM_Odm->pChannel>= 52) &&(*pDM_Odm->pChannel <= 64)) || ++ ((*pDM_Odm->pChannel >= 100) && (*pDM_Odm->pChannel <= 140))) ++ { ++ bDFSBand = TRUE; ++ if (*pDM_Odm->pBandWidth == ODM_BW20M){ ++ dm_dig_min = DM_DIG_MIN_AP_DFS+2; ++ } ++ else{ ++ dm_dig_min = DM_DIG_MIN_AP_DFS; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): ====== In DFS band ======\n")); ++ } ++ ++ //4 TX2path ++ if (priv->pmib->dot11RFEntry.tx2path && !bDFSBand && (*(pDM_Odm->pWirelessMode) == ODM_WM_B)) ++ dm_dig_max = 0x2A; ++ ++#if RTL8192E_SUPPORT ++#ifdef HIGH_POWER_EXT_LNA ++ if ((pDM_Odm->SupportICType & (ODM_RTL8192E)) && (pDM_Odm->ExtLNA)) ++ dm_dig_max = 0x42; ++#endif ++#endif ++ ++#else ++ //2 For WIN\CE ++ if(pDM_Odm->SupportICType >= ODM_RTL8188E) ++ dm_dig_max = 0x5A; ++ else ++ dm_dig_max = DM_DIG_MAX_NIC; ++ ++ if(pDM_Odm->SupportICType != ODM_RTL8821) ++ dm_dig_min = DM_DIG_MIN_NIC; ++ else ++ dm_dig_min = 0x1C; ++ ++ DIG_MaxOfMin = DM_DIG_MAX_AP; ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutly upper bound = 0x%x, lower bound = 0x%x\n",dm_dig_max, dm_dig_min)); ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ // for P2P case ++ if(0 < *pDM_Odm->pu1ForcedIgiLb) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): P2P case: Force IGI lb to: %u !!!!!!\n", *pDM_Odm->pu1ForcedIgiLb)); ++ dm_dig_min = *pDM_Odm->pu1ForcedIgiLb; ++ dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1); ++ } ++#endif ++ ++ //1 Adjust boundary by RSSI ++ if(pDM_Odm->bLinked && bPerformance) ++ { ++ //2 Modify DIG upper bound ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ offset = 15; ++#else ++ //4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT ++ if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723A)) && (pDM_Odm->bBtLimitedDig==1)) ++ { ++ offset = 10; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset)); ++ } ++ else ++ offset = 15; ++#endif ++ ++ if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) ++ pDM_DigTable->rx_gain_range_max = dm_dig_max; ++ else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) ++ pDM_DigTable->rx_gain_range_max = dm_dig_min; ++ else ++ pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ //2 Modify DIG lower bound ++ //if(pDM_Odm->bOneEntryOnly) ++ { ++ if(pDM_Odm->RSSI_Min < dm_dig_min) ++ DIG_Dynamic_MIN = dm_dig_min; ++ else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) ++ DIG_Dynamic_MIN = DIG_MaxOfMin; ++ else ++ DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; ++ } ++#else ++ { ++ //4 For AP ++#ifdef __ECOS ++ HAL_REORDER_BARRIER(); ++#else ++ rmb(); ++#endif ++ if (bDFSBand) ++ { ++ DIG_Dynamic_MIN = dm_dig_min; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min)); ++ } ++ else ++ { ++ if(pDM_Odm->RSSI_Min < dm_dig_min) ++ DIG_Dynamic_MIN = dm_dig_min; ++ else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) ++ DIG_Dynamic_MIN = DIG_MaxOfMin; ++ else ++ DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; ++ } ++ } ++#endif ++ } ++ else ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bPerformance && bDFSBand) ++ { ++ pDM_DigTable->rx_gain_range_max = 0x28; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force upper bound to 0x%x before link !!!!!!\n", pDM_DigTable->rx_gain_range_max)); ++ } ++ else ++#endif ++ { ++ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_OF_MIN; ++ } ++ DIG_Dynamic_MIN = dm_dig_min; ++ } ++ ++ //1 Force Lower Bound for AntDiv ++ if(pDM_Odm->bLinked && !pDM_Odm->bOneEntryOnly) ++ { ++ if((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ { ++ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV || pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) { ++ if (pDM_DigTable->AntDiv_RSSI_max > DIG_MaxOfMin) ++ DIG_Dynamic_MIN = DIG_MaxOfMin; ++ else ++ DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", DIG_Dynamic_MIN)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", pDM_DigTable->AntDiv_RSSI_max)); ++ } ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n", ++ pDM_DigTable->rx_gain_range_max, DIG_Dynamic_MIN)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Link status: bLinked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n", ++ pDM_Odm->bLinked, pDM_Odm->RSSI_Min, FirstConnect, FirstDisConnect)); ++ ++ //1 Modify DIG lower bound, deal with abnormal case ++ //2 Abnormal false alarm case ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bDFSBand) ++ { ++ pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; ++ } ++ else ++#endif ++ { ++ if(!pDM_Odm->bLinked) ++ { ++ pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; ++ ++ if (FirstDisConnect) ++ pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; ++ } ++ else ++ pDM_DigTable->rx_gain_range_min = odm_ForbiddenIGICheck(pDM_Odm, DIG_Dynamic_MIN, CurrentIGI); ++ } ++ ++ //2 Abnormal # beacon case ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pDM_Odm->bLinked && !FirstConnect) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Beacon Num (%d)\n", pDM_Odm->PhyDbgInfo.NumQryBeaconPkt)); ++ if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pDM_Odm->bsta_state)) ++ { ++ pDM_DigTable->rx_gain_range_min = dm_dig_min; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, pDM_DigTable->rx_gain_range_min)); ++ } ++ } ++#endif ++ ++ //2 Abnormal lower bound case ++ if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) ++ { ++ pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n",pDM_DigTable->rx_gain_range_min)); ++ } ++ ++ ++ //1 False alarm threshold decision ++ odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d \n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2])); ++ ++ //1 Adjust initial gain by false alarm ++ if(pDM_Odm->bLinked && bPerformance) ++ { ++ //2 After link ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI after link\n")); ++ ++ if(bFirstTpTarget || (FirstConnect && bPerformance)) ++ { ++ pDM_DigTable->LargeFAHit = 0; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bDFSBand) ++ { ++ if(pDM_Odm->RSSI_Min > 0x28) ++ CurrentIGI = 0x28; ++ else ++ CurrentIGI = pDM_Odm->RSSI_Min; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: One-shot to 0x28 upmost!!!!!!\n")); ++ } ++ else ++#endif ++ { ++ if(pDM_Odm->RSSI_Min < DIG_MaxOfMin) ++ { ++ if(CurrentIGI < pDM_Odm->RSSI_Min) ++ CurrentIGI = pDM_Odm->RSSI_Min; ++ } ++ else ++ { ++ if(CurrentIGI < DIG_MaxOfMin) ++ CurrentIGI = DIG_MaxOfMin; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++#if (RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); ++#endif ++#endif ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", CurrentIGI)); ++ ++ } ++ else ++ { ++ if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) ++ CurrentIGI = CurrentIGI + 4; ++ else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) ++ CurrentIGI = CurrentIGI + 2; ++ else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) ++ CurrentIGI = CurrentIGI - 2; ++ ++ //4 Abnormal # beacon case ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) ++ { ++ CurrentIGI = pDM_DigTable->rx_gain_range_min; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n", ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, CurrentIGI)); ++ } ++#endif ++ } ++ } ++ else ++ { ++ //2 Before link ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI before link\n")); ++ ++ if(FirstDisConnect || bFirstCoverage) ++ { ++ CurrentIGI = dm_dig_min; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n")); ++ } ++ else ++ { ++ if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) ++ CurrentIGI = CurrentIGI + 4; ++ else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) ++ CurrentIGI = CurrentIGI + 2; ++ else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) ++ CurrentIGI = CurrentIGI - 2; ++ } ++ } ++ ++ //1 Check initial gain by upper/lower bound ++ if(CurrentIGI < pDM_DigTable->rx_gain_range_min) ++ CurrentIGI = pDM_DigTable->rx_gain_range_min; ++ ++ if(CurrentIGI > pDM_DigTable->rx_gain_range_max) ++ CurrentIGI = pDM_DigTable->rx_gain_range_max; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x, TotalFA = %d\n\n", CurrentIGI, pFalseAlmCnt->Cnt_all)); ++ ++ //1 High power RSSI threshold ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) ++ { ++ // High power IGI lower bound ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); ++ if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); ++ //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; ++ CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; ++ } ++ } ++ if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) ++ { ++ if(pHalData->UndecoratedSmoothedPWDB > 0x28) ++ { ++ if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) ++ { ++ //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; ++ CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; ++ } ++ } ++ } ++#endif ++ ++ //1 Update status ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ //sherry delete DualMacSmartConncurrent 20110517 ++ if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) ++ { ++ ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); ++ if(*(pDM_Odm->pbMasterOfDMSP)) ++ { ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ else ++ { ++ pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; ++ } ++ } ++ else ++ { ++ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++ if(*(pDM_Odm->pBandType) == ODM_BAND_5G) ++ { ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ else ++ { ++ pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; ++ } ++ } ++ } ++ else ++#endif ++ { ++#if ((DM_ODM_SUPPORT_TYPE & ODM_WIN) || ((DM_ODM_SUPPORT_TYPE & ODM_CE) && (ODM_CONFIG_BT_COEXIST == 1))) ++ if(pDM_Odm->bBtHsOperation) ++ { ++ if(pDM_Odm->bLinked) ++ { ++ if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) ++ ODM_Write_DIG(pDM_Odm, CurrentIGI); ++ else ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); ++ ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ else ++ { ++ if(pDM_Odm->bLinkInProcess) ++ ODM_Write_DIG(pDM_Odm, 0x1c); ++ else if(pDM_Odm->bBtConnectProcess) ++ ODM_Write_DIG(pDM_Odm, 0x28); ++ else ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++ } ++ } ++ else // BT is not using ++#endif ++ { ++ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ } ++} ++ ++VOID ++odm_DIGbyRSSI_LPS( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ ++ u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C ++ u1Byte CurrentIGI=pDM_Odm->RSSI_Min; ++ ++ if(odm_DigAbort(pDM_Odm) == TRUE) ++ return; ++ ++ CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS()==>\n")); ++ ++ // Using FW PS mode to make IGI ++ //Adjust by FA in LPS MODE ++ if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) ++ CurrentIGI = CurrentIGI+4; ++ else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) ++ CurrentIGI = CurrentIGI+2; ++ else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) ++ CurrentIGI = CurrentIGI-2; ++ ++ ++ //Lower bound checking ++ ++ //RSSI Lower bound check ++ if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) ++ RSSI_Lower =(pDM_Odm->RSSI_Min-10); ++ else ++ RSSI_Lower =DM_DIG_MIN_NIC; ++ ++ //Upper and Lower Bound checking ++ if(CurrentIGI > DM_DIG_MAX_NIC) ++ CurrentIGI=DM_DIG_MAX_NIC; ++ else if(CurrentIGI < RSSI_Lower) ++ CurrentIGI =RSSI_Lower; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pFalseAlmCnt->Cnt_all = %d\n",pFalseAlmCnt->Cnt_all)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pDM_Odm->RSSI_Min = %d\n",pDM_Odm->RSSI_Min)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): CurrentIGI = 0x%x\n",CurrentIGI)); ++ ++ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++#endif ++} ++ ++//3============================================================ ++//3 FASLE ALARM CHECK ++//3============================================================ ++ ++VOID ++odm_FalseAlarmCounterStatistics( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u4Byte ret_value; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++//Mark there, and check this in odm_DMWatchDog ++#if 0 //(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) ++ return; ++#endif ++#endif ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics()======>\n")); ++ ++#if (ODM_IC_11N_SERIES_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ ++ //hold ofdm counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); ++ ++ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + ++ FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; ++ ++#if (RTL8188E_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); ++ } ++#endif ++ ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ odm_GetCCKFalseAlarm_92D(pDM_Odm); ++ } ++ else ++#endif ++ { ++ //hold cck counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); ++ FalseAlmCnt->Cnt_Cck_fail = ret_value; ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); ++ FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); ++ } ++ ++ FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + ++ FalseAlmCnt->Cnt_SB_Search_fail + ++ FalseAlmCnt->Cnt_Parity_Fail + ++ FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + ++ FalseAlmCnt->Cnt_Mcs_fail + ++ FalseAlmCnt->Cnt_Cck_fail); ++ ++ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; ++ ++#if (RTL8192C_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192C) ++ odm_ResetFACounter_92C(pDM_Odm); ++#endif ++ ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ odm_ResetFACounter_92D(pDM_Odm); ++#endif ++ ++ if(pDM_Odm->SupportICType >=ODM_RTL8723A) ++ { ++ //reset false alarm counter registers ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); ++ ++ //update ofdm counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter ++ ++ //reset CCK CCA counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); ++ //reset CCK FA counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", ++ FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", ++ FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", ++ FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); ++ } ++#endif ++ ++#if (ODM_IC_11AC_SERIES_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ u4Byte CCKenable; ++ ++ /* read OFDM FA counter */ ++ FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); ++ ++ ++ /* Read CCK FA counter */ ++ FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); ++ ++ /* read CCK/OFDM CCA counter */ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11AC, bMaskDWord); ++ FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff0000) >> 16; ++ FalseAlmCnt->Cnt_CCK_CCA = ret_value & 0xffff; ++ ++#if (RTL8881A_SUPPORT==1) ++ /* For 8881A */ ++ if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ { ++ u4Byte Cnt_Ofdm_fail_temp = 0; ++ ++ if(FalseAlmCnt->Cnt_Ofdm_fail >= FalseAlmCnt->Cnt_Ofdm_fail_pre) ++ { ++ Cnt_Ofdm_fail_temp = FalseAlmCnt->Cnt_Ofdm_fail_pre; ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; ++ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Ofdm_fail - Cnt_Ofdm_fail_temp; ++ } ++ else ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail_pre)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail_pre=%d\n", Cnt_Ofdm_fail_temp)); ++ ++ /* Reset FA counter by enable/disable OFDM */ ++ if(FalseAlmCnt->Cnt_Ofdm_fail_pre >= 0x7fff) ++ { ++ // reset OFDM ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,1); ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Reset false alarm counter\n")); ++ } ++ } ++#endif ++ ++ /* reset OFDM FA coutner */ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); ++ ++ /* reset CCK FA counter */ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); ++ ++ /* reset CCA counter */ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 0); ++ ++ CCKenable = ODM_GetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT28); ++ if(CCKenable)//if(*pDM_Odm->pBandType == ODM_BAND_2_4G) ++ { ++ FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; ++ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_CCK_CCA + FalseAlmCnt->Cnt_OFDM_CCA; ++ } ++ else ++ { ++ FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail; ++ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA; ++ } ++ ++ } ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_OFDM_CCA=%d\n", FalseAlmCnt->Cnt_OFDM_CCA)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCK_CCA=%d\n", FalseAlmCnt->Cnt_CCK_CCA)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCA_all=%d\n", FalseAlmCnt->Cnt_CCA_all)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Total False Alarm=%d\n\n", FalseAlmCnt->Cnt_all)); ++} ++ ++//3============================================================ ++//3 CCK Packet Detect Threshold ++//3============================================================ ++ ++VOID ++odm_PauseCCKPacketDetection( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte CCKPDThreshold ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection()=========> level = %d\n", pause_level)); ++ ++ if ((pDM_DigTable->pause_cckpd_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Return: SupportAbility ODM_BB_CCK_PD or ODM_BB_FA_CNT is disabled\n")); ++ return; ++ } ++ ++ if (pause_level > DM_DIG_MAX_PAUSE_TYPE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ++ ("odm_PauseCCKPacketDetection(): Return: Wrong pause level !!\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4], ++ pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0])); ++ ++ switch (PauseType) { ++ /* Pause CCK Packet Detection Threshold */ ++ case PHYDM_PAUSE: ++ { ++ /* Disable CCK PD */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_CCK_PD)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Pause CCK packet detection threshold !!\n")); ++ ++ /* Backup original CCK PD threshold decided by CCK PD mechanism */ ++ if (pDM_DigTable->pause_cckpd_level == 0) { ++ pDM_DigTable->CCKPDBackup = pDM_DigTable->CurCCK_CCAThres; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ++ ("odm_PauseCCKPacketDetection(): Backup CCKPD = 0x%x, new CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup, CCKPDThreshold)); ++ } ++ ++ /* Update pause level */ ++ pDM_DigTable->pause_cckpd_level = (pDM_DigTable->pause_cckpd_level | BIT(pause_level)); ++ ++ /* Record CCK PD threshold */ ++ pDM_DigTable->pause_cckpd_value[pause_level] = CCKPDThreshold; ++ ++ /* Write new CCK PD threshold */ ++ if (BIT(pause_level + 1) > pDM_DigTable->pause_cckpd_level) { ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, CCKPDThreshold); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): CCKPD of higher level = 0x%x\n", CCKPDThreshold)); ++ } ++ break; ++ } ++ /* Resume CCK Packet Detection Threshold */ ++ case PHYDM_RESUME: ++ { ++ /* check if the level is illegal or not */ ++ if ((pDM_DigTable->pause_cckpd_level & (BIT(pause_level))) != 0) { ++ pDM_DigTable->pause_cckpd_level = pDM_DigTable->pause_cckpd_level & (~(BIT(pause_level))); ++ pDM_DigTable->pause_cckpd_value[pause_level] = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Resume CCK PD !!\n")); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong resume level !!\n")); ++ break; ++ } ++ ++ /* Resume DIG */ ++ if (pDM_DigTable->pause_cckpd_level == 0) { ++ /* Write backup IGI value */ ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->CCKPDBackup); ++ /* pDM_DigTable->bIgnoreDIG = TRUE; */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write original CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup)); ++ ++ /* Enable DIG */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_CCK_PD); ++ break; ++ } ++ ++ if (BIT(pause_level) > pDM_DigTable->pause_cckpd_level) { ++ u1Byte max_level; ++ ++ /* Calculate the maximum level now */ ++ for (max_level = (pause_level - 1); max_level >= 0; max_level--) { ++ if ((pDM_DigTable->pause_cckpd_level & BIT(max_level)) > 0) ++ break; ++ } ++ ++ /* write CCKPD of lower level */ ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->pause_cckpd_value[max_level]); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write CCKPD (0x%x) of level (%d)\n", ++ pDM_DigTable->pause_cckpd_value[max_level], max_level)); ++ break; ++ } ++ break; ++ } ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong type !!\n")); ++ break; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4], ++ pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0])); ++} ++ ++ ++VOID ++odm_CCKPacketDetectionThresh( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u1Byte CurCCK_CCAThres, RSSI_thd = 55; ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++//modify by Guo.Mingzhi 2011-12-29 ++ if (pDM_Odm->bDualMacSmartConcurrent == TRUE) ++// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) ++ return; ++ if(pDM_Odm->bBtHsOperation) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); ++ return; ++ } ++#endif ++ ++ if((!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD)) ||(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() return==========\n")); ++#ifdef MCR_WIRELESS_EXTEND ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, 0x43); ++#endif ++ return; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pDM_Odm->ExtLNA) ++ return; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() ==========>\n")); ++ ++ if (pDM_Odm->bLinked) ++ { ++ if (pDM_Odm->RSSI_Min > RSSI_thd) ++ CurCCK_CCAThres = 0xcd; ++ else if ((pDM_Odm->RSSI_Min <= RSSI_thd) && (pDM_Odm->RSSI_Min > 10)) ++ CurCCK_CCAThres = 0x83; ++ else ++ { ++ if(FalseAlmCnt->Cnt_Cck_fail > 1000) ++ CurCCK_CCAThres = 0x83; ++ else ++ CurCCK_CCAThres = 0x40; ++ } ++ } else { ++ if(FalseAlmCnt->Cnt_Cck_fail > 1000) ++ CurCCK_CCAThres = 0x83; ++ else ++ CurCCK_CCAThres = 0x40; ++ } ++ ++#if (RTL8192D_SUPPORT==1) ++ if((pDM_Odm->SupportICType == ODM_RTL8192D) && (*pDM_Odm->pBandType == ODM_BAND_2_4G)) ++ ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); ++ else ++#endif ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() CurCCK_CCAThres = 0x%x\n",CurCCK_CCAThres)); ++} ++ ++VOID ++ODM_Write_CCK_CCA_Thres( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurCCK_CCAThres ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 ++ { ++ ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); ++ } ++ pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; ++ pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++// <20130108, Kordan> E.g., With LNA used, we make the Rx power smaller to have a better EVM. (Asked by Willis) ++VOID ++odm_RFEControl( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8Byte RSSIVal ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ static u1Byte TRSW_HighPwr = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("===> odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X, pHalData->RFEType = %d\n", ++ RSSIVal, TRSW_HighPwr, pHalData->RFEType )); ++ ++ if (pHalData->RFEType == 3) { ++ ++ pDM_Odm->RSSI_TRSW = RSSIVal; ++ ++ if (pDM_Odm->RSSI_TRSW >= pDM_Odm->RSSI_TRSW_H) ++ { ++ TRSW_HighPwr = 1; // Switch to ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); // Set ANTSW=1/ANTSWB=0 for SW control ++ ++ } ++ else if (pDM_Odm->RSSI_TRSW <= pDM_Odm->RSSI_TRSW_L) ++ { ++ TRSW_HighPwr = 0; // Switched back ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x0); // Set ANTSW=1/ANTSWB=0 for SW control ++ ++ } ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L) = (%d, %d)\n", pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(RSSIVal, RSSIVal, pDM_Odm->RSSI_TRSW_iso) = (%d, %d, %d)\n", ++ RSSIVal, pDM_Odm->RSSI_TRSW_iso, pDM_Odm->RSSI_TRSW)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("<=== odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X\n", RSSIVal, TRSW_HighPwr)); ++} ++ ++VOID ++odm_MPT_DIGWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_MPT_DIG(pDM_Odm); ++} ++ ++VOID ++odm_MPT_DIGCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ++ #if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ #if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); ++ #else ++ ODM_MPT_DIG(pDM_Odm); ++ #endif ++ #else ++ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); ++ #endif ++ ++} ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++VOID ++odm_MPT_DIGCallback( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); ++#else ++ ODM_MPT_DIG(pDM_Odm); ++#endif ++} ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_CE) ++VOID ++odm_MPT_Write_DIG( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurIGValue ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), CurIGValue); ++ ++ if(pDM_Odm->RFType > ODM_1T1R) ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), CurIGValue); ++ ++ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) ++ { ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_C,pDM_Odm), CurIGValue); ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_D,pDM_Odm), CurIGValue); ++ } ++ ++ pDM_DigTable->CurIGValue = CurIGValue; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurIGValue = 0x%x\n", CurIGValue)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("pDM_Odm->RFType = 0x%x\n", pDM_Odm->RFType)); ++} ++ ++VOID ++ODM_MPT_DIG( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u1Byte CurrentIGI = pDM_DigTable->CurIGValue; ++ u1Byte DIG_Upper = 0x40, DIG_Lower = 0x20; ++ u4Byte RXOK_cal; ++ u4Byte RxPWDBAve_final; ++ u1Byte IGI_A = 0x20, IGI_B = 0x20; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ #if ODM_FIX_2G_DIG ++ IGI_A = 0x22; ++ IGI_B = 0x24; ++ #endif ++ ++#else ++ if (!(pDM_Odm->priv->pshare->rf_ft_var.mp_specific && pDM_Odm->priv->pshare->mp_dig_on)) ++ return; ++ ++ if (*pDM_Odm->pBandType == ODM_BAND_5G) ++ DIG_Lower = 0x22; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> ODM_MPT_DIG, pBandType = %d\n", *pDM_Odm->pBandType)); ++ ++#if (ODM_FIX_2G_DIG || (DM_ODM_SUPPORT_TYPE & ODM_AP)) ++ if (*pDM_Odm->pBandType == ODM_BAND_5G || (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B))) // for 5G or 8814 ++#else ++ if (1) // for both 2G/5G ++#endif ++ { ++ odm_FalseAlarmCounterStatistics(pDM_Odm); ++ ++ RXOK_cal = pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM; ++ RxPWDBAve_final = (RXOK_cal != 0)?pDM_Odm->RxPWDBAve/RXOK_cal:0; ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->RxPWDBAve = 0; ++ pDM_Odm->MPDIG_2G = FALSE; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->Times_2G = 0; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RX OK = %d\n", RXOK_cal)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RSSI = %d\n", RxPWDBAve_final)); ++ ++ if (RXOK_cal >= 70 && RxPWDBAve_final <= 40) ++ { ++ if (CurrentIGI > 0x24) ++ odm_MPT_Write_DIG(pDM_Odm, 0x24); ++ } ++ else ++ { ++ if(pFalseAlmCnt->Cnt_all > 1000){ ++ CurrentIGI = CurrentIGI + 8; ++ } ++ else if(pFalseAlmCnt->Cnt_all > 200){ ++ CurrentIGI = CurrentIGI + 4; ++ } ++ else if (pFalseAlmCnt->Cnt_all > 50){ ++ CurrentIGI = CurrentIGI + 2; ++ } ++ else if (pFalseAlmCnt->Cnt_all < 2){ ++ CurrentIGI = CurrentIGI - 2; ++ } ++ ++ if (CurrentIGI < DIG_Lower ){ ++ CurrentIGI = DIG_Lower; ++ } ++ ++ if(CurrentIGI > DIG_Upper){ ++ CurrentIGI = DIG_Upper; ++ } ++ ++ odm_MPT_Write_DIG(pDM_Odm, CurrentIGI); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG = 0x%x, Cnt_all = %d, Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d\n", ++ CurrentIGI, pFalseAlmCnt->Cnt_all, pFalseAlmCnt->Cnt_Ofdm_fail, pFalseAlmCnt->Cnt_Cck_fail)); ++ } ++ } ++ else ++ { ++ if(pDM_Odm->MPDIG_2G == FALSE) ++ { ++ if((pDM_Odm->SupportPlatform & ODM_WIN) && !(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B))) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> Fix IGI\n")); ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), IGI_A); ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), IGI_B); ++ pDM_DigTable->CurIGValue = IGI_B; ++ } ++ else ++ odm_MPT_Write_DIG(pDM_Odm, IGI_A); ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->Times_2G++; ++ ++ if (pDM_Odm->Times_2G == 3) ++#endif ++ { ++ pDM_Odm->MPDIG_2G = TRUE; ++ } ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ odm_RFEControl(pDM_Odm, RxPWDBAve_final); ++#endif ++ ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, 700); ++} ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dig.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dig.h new file mode 100644 -index 000000000..e7c89edb7 +index 0000000..7e2b13b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dig.h @@ -0,0 +1,327 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMDIG_H__ -+#define __PHYDMDIG_H__ -+ -+#define DIG_VERSION "1.8" /*2015.07.01*/ -+ -+/* Pause DIG & CCKPD */ -+#define DM_DIG_MAX_PAUSE_TYPE 0x7 -+ -+typedef struct _Dynamic_Initial_Gain_Threshold_ -+{ -+ BOOLEAN bStopDIG; // for debug -+ BOOLEAN bIgnoreDIG; -+ BOOLEAN bPSDInProgress; -+ -+ u1Byte Dig_Enable_Flag; -+ u1Byte Dig_Ext_Port_Stage; -+ -+ int RssiLowThresh; -+ int RssiHighThresh; -+ -+ u4Byte FALowThresh; -+ u4Byte FAHighThresh; -+ -+ u1Byte CurSTAConnectState; -+ u1Byte PreSTAConnectState; -+ u1Byte CurMultiSTAConnectState; -+ -+ u1Byte PreIGValue; -+ u1Byte CurIGValue; -+ u1Byte BackupIGValue; //MP DIG -+ u1Byte BT30_CurIGI; -+ u1Byte IGIBackup; -+ -+ s1Byte BackoffVal; -+ s1Byte BackoffVal_range_max; -+ s1Byte BackoffVal_range_min; -+ u1Byte rx_gain_range_max; -+ u1Byte rx_gain_range_min; -+ u1Byte Rssi_val_min; -+ -+ u1Byte PreCCK_CCAThres; -+ u1Byte CurCCK_CCAThres; -+ u1Byte PreCCKPDState; -+ u1Byte CurCCKPDState; -+ u1Byte CCKPDBackup; -+ u1Byte pause_cckpd_level; -+ u1Byte pause_cckpd_value[DM_DIG_MAX_PAUSE_TYPE + 1]; -+ -+ u1Byte LargeFAHit; -+ u1Byte ForbiddenIGI; -+ u4Byte Recover_cnt; -+ -+ u1Byte DIG_Dynamic_MIN_0; -+ u1Byte DIG_Dynamic_MIN_1; -+ BOOLEAN bMediaConnect_0; -+ BOOLEAN bMediaConnect_1; -+ -+ u4Byte AntDiv_RSSI_max; -+ u4Byte RSSI_max; -+ -+ u1Byte *bP2PInProcess; -+ -+ u1Byte pause_dig_level; -+ u1Byte pause_dig_value[DM_DIG_MAX_PAUSE_TYPE + 1]; -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ BOOLEAN bTpTarget; -+ BOOLEAN bNoiseEst; -+ u4Byte TpTrainTH_min; -+ u1Byte IGIOffset_A; -+ u1Byte IGIOffset_B; -+#endif -+}DIG_T,*pDIG_T; -+ -+typedef struct _FALSE_ALARM_STATISTICS{ -+ u4Byte Cnt_Parity_Fail; -+ u4Byte Cnt_Rate_Illegal; -+ u4Byte Cnt_Crc8_fail; -+ u4Byte Cnt_Mcs_fail; -+ u4Byte Cnt_Ofdm_fail; -+ u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A -+ u4Byte Cnt_Cck_fail; -+ u4Byte Cnt_all; -+ u4Byte Cnt_Fast_Fsync; -+ u4Byte Cnt_SB_Search_fail; -+ u4Byte Cnt_OFDM_CCA; -+ u4Byte Cnt_CCK_CCA; -+ u4Byte Cnt_CCA_all; -+ u4Byte Cnt_BW_USC; //Gary -+ u4Byte Cnt_BW_LSC; //Gary -+}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; -+ -+typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition -+{ -+ DIG_TYPE_THRESH_HIGH = 0, -+ DIG_TYPE_THRESH_LOW = 1, -+ DIG_TYPE_BACKOFF = 2, -+ DIG_TYPE_RX_GAIN_MIN = 3, -+ DIG_TYPE_RX_GAIN_MAX = 4, -+ DIG_TYPE_ENABLE = 5, -+ DIG_TYPE_DISABLE = 6, -+ DIG_OP_TYPE_MAX -+}DM_DIG_OP_E; -+ -+/* -+typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition -+{ -+ CCK_PD_STAGE_LowRssi = 0, -+ CCK_PD_STAGE_HighRssi = 1, -+ CCK_PD_STAGE_MAX = 3, -+}DM_CCK_PDTH_E; -+ -+typedef enum tag_DIG_EXT_PORT_ALGO_Definition -+{ -+ DIG_EXT_PORT_STAGE_0 = 0, -+ DIG_EXT_PORT_STAGE_1 = 1, -+ DIG_EXT_PORT_STAGE_2 = 2, -+ DIG_EXT_PORT_STAGE_3 = 3, -+ DIG_EXT_PORT_STAGE_MAX = 4, -+}DM_DIG_EXT_PORT_ALG_E; -+ -+typedef enum tag_DIG_Connect_Definition -+{ -+ DIG_STA_DISCONNECT = 0, -+ DIG_STA_CONNECT = 1, -+ DIG_STA_BEFORE_CONNECT = 2, -+ DIG_MultiSTA_DISCONNECT = 3, -+ DIG_MultiSTA_CONNECT = 4, -+ DIG_CONNECT_MAX -+}DM_DIG_CONNECT_E; -+ -+ -+#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} -+ -+#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \ -+ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT) -+ -+#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \ -+ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT) -+*/ -+ -+typedef enum tag_PHYDM_Pause_Type { -+ PHYDM_PAUSE = BIT0, -+ PHYDM_RESUME = BIT1 -+} PHYDM_PAUSE_TYPE; -+ -+typedef enum tag_PHYDM_Pause_Level { -+/* number of pause level can't exceed DM_DIG_MAX_PAUSE_TYPE */ -+ PHYDM_PAUSE_LEVEL_0 = 0, -+ PHYDM_PAUSE_LEVEL_1 = 1, -+ PHYDM_PAUSE_LEVEL_2 = 2, -+ PHYDM_PAUSE_LEVEL_3 = 3, -+ PHYDM_PAUSE_LEVEL_4 = 4, -+ PHYDM_PAUSE_LEVEL_5 = 5, -+ PHYDM_PAUSE_LEVEL_6 = 6, -+ PHYDM_PAUSE_LEVEL_7 = DM_DIG_MAX_PAUSE_TYPE /* maximum level */ -+} PHYDM_PAUSE_LEVEL; -+ -+ -+#define DM_DIG_THRESH_HIGH 40 -+#define DM_DIG_THRESH_LOW 35 -+ -+#define DM_FALSEALARM_THRESH_LOW 400 -+#define DM_FALSEALARM_THRESH_HIGH 1000 -+ -+#define DM_DIG_MAX_NIC 0x3e -+#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c -+#define DM_DIG_MAX_OF_MIN_NIC 0x3e -+ -+#define DM_DIG_MAX_AP 0x3e -+#define DM_DIG_MIN_AP 0x1c -+#define DM_DIG_MAX_OF_MIN 0x2A //0x32 -+#define DM_DIG_MIN_AP_DFS 0x20 -+ -+#define DM_DIG_MAX_NIC_HP 0x46 -+#define DM_DIG_MIN_NIC_HP 0x2e -+ -+#define DM_DIG_MAX_AP_HP 0x42 -+#define DM_DIG_MIN_AP_HP 0x30 -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+#define DM_DIG_MAX_AP_COVERAGR 0x26 -+#define DM_DIG_MIN_AP_COVERAGE 0x1c -+#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22 -+ -+#define DM_DIG_TP_Target_TH0 500 -+#define DM_DIG_TP_Target_TH1 1000 -+#define DM_DIG_TP_Training_Period 10 -+#endif -+ -+//vivi 92c&92d has different definition, 20110504 -+//this is for 92c -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV -+ #define DM_DIG_FA_TH0 0x80//0x20 -+ #else -+ #define DM_DIG_FA_TH0 0x200//0x20 -+ #endif -+#else -+ #define DM_DIG_FA_TH0 0x200//0x20 -+#endif -+ -+#define DM_DIG_FA_TH1 0x300 -+#define DM_DIG_FA_TH2 0x400 -+//this is for 92d -+#define DM_DIG_FA_TH0_92D 0x100 -+#define DM_DIG_FA_TH1_92D 0x400 -+#define DM_DIG_FA_TH2_92D 0x600 -+ -+#define DM_DIG_BACKOFF_MAX 12 -+#define DM_DIG_BACKOFF_MIN -4 -+#define DM_DIG_BACKOFF_DEFAULT 10 -+ -+#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps -+#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps -+#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps -+#define RSSI_OFFSET_DIG 0x05 -+ -+VOID -+ODM_ChangeDynamicInitGainThresh( -+ IN PVOID pDM_VOID, -+ IN u4Byte DM_Type, -+ IN u4Byte DM_Value -+ ); -+ -+VOID -+ODM_Write_DIG( -+ IN PVOID pDM_VOID, -+ IN u1Byte CurrentIGI -+ ); -+ -+VOID -+odm_PauseDIG( -+ IN PVOID pDM_VOID, -+ IN PHYDM_PAUSE_TYPE PauseType, -+ IN PHYDM_PAUSE_LEVEL pause_level, -+ IN u1Byte IGIValue -+ ); -+ -+VOID -+odm_DIGInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DIG( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DIGbyRSSI_LPS( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_FalseAlarmCounterStatistics( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_PauseCCKPacketDetection( -+ IN PVOID pDM_VOID, -+ IN PHYDM_PAUSE_TYPE PauseType, -+ IN PHYDM_PAUSE_LEVEL pause_level, -+ IN u1Byte CCKPDThreshold -+ ); -+ -+VOID -+odm_CCKPacketDetectionThresh( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+ODM_Write_CCK_CCA_Thres( -+ IN PVOID pDM_VOID, -+ IN u1Byte CurCCK_CCAThres -+ ); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+odm_MPT_DIGCallback( -+ PRT_TIMER pTimer -+); -+ -+VOID -+odm_MPT_DIGWorkItemCallback( -+ IN PVOID pContext -+ ); -+ -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+VOID -+odm_MPT_DIGCallback( -+ IN PVOID pDM_VOID -+); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE != ODM_CE) -+VOID -+ODM_MPT_DIG( -+ IN PVOID pDM_VOID -+); -+#endif -+ -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMDIG_H__ ++#define __PHYDMDIG_H__ ++ ++#define DIG_VERSION "1.8" /*2015.07.01*/ ++ ++/* Pause DIG & CCKPD */ ++#define DM_DIG_MAX_PAUSE_TYPE 0x7 ++ ++typedef struct _Dynamic_Initial_Gain_Threshold_ ++{ ++ BOOLEAN bStopDIG; // for debug ++ BOOLEAN bIgnoreDIG; ++ BOOLEAN bPSDInProgress; ++ ++ u1Byte Dig_Enable_Flag; ++ u1Byte Dig_Ext_Port_Stage; ++ ++ int RssiLowThresh; ++ int RssiHighThresh; ++ ++ u4Byte FALowThresh; ++ u4Byte FAHighThresh; ++ ++ u1Byte CurSTAConnectState; ++ u1Byte PreSTAConnectState; ++ u1Byte CurMultiSTAConnectState; ++ ++ u1Byte PreIGValue; ++ u1Byte CurIGValue; ++ u1Byte BackupIGValue; //MP DIG ++ u1Byte BT30_CurIGI; ++ u1Byte IGIBackup; ++ ++ s1Byte BackoffVal; ++ s1Byte BackoffVal_range_max; ++ s1Byte BackoffVal_range_min; ++ u1Byte rx_gain_range_max; ++ u1Byte rx_gain_range_min; ++ u1Byte Rssi_val_min; ++ ++ u1Byte PreCCK_CCAThres; ++ u1Byte CurCCK_CCAThres; ++ u1Byte PreCCKPDState; ++ u1Byte CurCCKPDState; ++ u1Byte CCKPDBackup; ++ u1Byte pause_cckpd_level; ++ u1Byte pause_cckpd_value[DM_DIG_MAX_PAUSE_TYPE + 1]; ++ ++ u1Byte LargeFAHit; ++ u1Byte ForbiddenIGI; ++ u4Byte Recover_cnt; ++ ++ u1Byte DIG_Dynamic_MIN_0; ++ u1Byte DIG_Dynamic_MIN_1; ++ BOOLEAN bMediaConnect_0; ++ BOOLEAN bMediaConnect_1; ++ ++ u4Byte AntDiv_RSSI_max; ++ u4Byte RSSI_max; ++ ++ u1Byte *bP2PInProcess; ++ ++ u1Byte pause_dig_level; ++ u1Byte pause_dig_value[DM_DIG_MAX_PAUSE_TYPE + 1]; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ BOOLEAN bTpTarget; ++ BOOLEAN bNoiseEst; ++ u4Byte TpTrainTH_min; ++ u1Byte IGIOffset_A; ++ u1Byte IGIOffset_B; ++#endif ++}DIG_T,*pDIG_T; ++ ++typedef struct _FALSE_ALARM_STATISTICS{ ++ u4Byte Cnt_Parity_Fail; ++ u4Byte Cnt_Rate_Illegal; ++ u4Byte Cnt_Crc8_fail; ++ u4Byte Cnt_Mcs_fail; ++ u4Byte Cnt_Ofdm_fail; ++ u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A ++ u4Byte Cnt_Cck_fail; ++ u4Byte Cnt_all; ++ u4Byte Cnt_Fast_Fsync; ++ u4Byte Cnt_SB_Search_fail; ++ u4Byte Cnt_OFDM_CCA; ++ u4Byte Cnt_CCK_CCA; ++ u4Byte Cnt_CCA_all; ++ u4Byte Cnt_BW_USC; //Gary ++ u4Byte Cnt_BW_LSC; //Gary ++}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; ++ ++typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition ++{ ++ DIG_TYPE_THRESH_HIGH = 0, ++ DIG_TYPE_THRESH_LOW = 1, ++ DIG_TYPE_BACKOFF = 2, ++ DIG_TYPE_RX_GAIN_MIN = 3, ++ DIG_TYPE_RX_GAIN_MAX = 4, ++ DIG_TYPE_ENABLE = 5, ++ DIG_TYPE_DISABLE = 6, ++ DIG_OP_TYPE_MAX ++}DM_DIG_OP_E; ++ ++/* ++typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition ++{ ++ CCK_PD_STAGE_LowRssi = 0, ++ CCK_PD_STAGE_HighRssi = 1, ++ CCK_PD_STAGE_MAX = 3, ++}DM_CCK_PDTH_E; ++ ++typedef enum tag_DIG_EXT_PORT_ALGO_Definition ++{ ++ DIG_EXT_PORT_STAGE_0 = 0, ++ DIG_EXT_PORT_STAGE_1 = 1, ++ DIG_EXT_PORT_STAGE_2 = 2, ++ DIG_EXT_PORT_STAGE_3 = 3, ++ DIG_EXT_PORT_STAGE_MAX = 4, ++}DM_DIG_EXT_PORT_ALG_E; ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} ++ ++#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \ ++ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT) ++ ++#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \ ++ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT) ++*/ ++ ++typedef enum tag_PHYDM_Pause_Type { ++ PHYDM_PAUSE = BIT0, ++ PHYDM_RESUME = BIT1 ++} PHYDM_PAUSE_TYPE; ++ ++typedef enum tag_PHYDM_Pause_Level { ++/* number of pause level can't exceed DM_DIG_MAX_PAUSE_TYPE */ ++ PHYDM_PAUSE_LEVEL_0 = 0, ++ PHYDM_PAUSE_LEVEL_1 = 1, ++ PHYDM_PAUSE_LEVEL_2 = 2, ++ PHYDM_PAUSE_LEVEL_3 = 3, ++ PHYDM_PAUSE_LEVEL_4 = 4, ++ PHYDM_PAUSE_LEVEL_5 = 5, ++ PHYDM_PAUSE_LEVEL_6 = 6, ++ PHYDM_PAUSE_LEVEL_7 = DM_DIG_MAX_PAUSE_TYPE /* maximum level */ ++} PHYDM_PAUSE_LEVEL; ++ ++ ++#define DM_DIG_THRESH_HIGH 40 ++#define DM_DIG_THRESH_LOW 35 ++ ++#define DM_FALSEALARM_THRESH_LOW 400 ++#define DM_FALSEALARM_THRESH_HIGH 1000 ++ ++#define DM_DIG_MAX_NIC 0x3e ++#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c ++#define DM_DIG_MAX_OF_MIN_NIC 0x3e ++ ++#define DM_DIG_MAX_AP 0x3e ++#define DM_DIG_MIN_AP 0x1c ++#define DM_DIG_MAX_OF_MIN 0x2A //0x32 ++#define DM_DIG_MIN_AP_DFS 0x20 ++ ++#define DM_DIG_MAX_NIC_HP 0x46 ++#define DM_DIG_MIN_NIC_HP 0x2e ++ ++#define DM_DIG_MAX_AP_HP 0x42 ++#define DM_DIG_MIN_AP_HP 0x30 ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#define DM_DIG_MAX_AP_COVERAGR 0x26 ++#define DM_DIG_MIN_AP_COVERAGE 0x1c ++#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22 ++ ++#define DM_DIG_TP_Target_TH0 500 ++#define DM_DIG_TP_Target_TH1 1000 ++#define DM_DIG_TP_Training_Period 10 ++#endif ++ ++//vivi 92c&92d has different definition, 20110504 ++//this is for 92c ++#if (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ #define DM_DIG_FA_TH0 0x80//0x20 ++ #else ++ #define DM_DIG_FA_TH0 0x200//0x20 ++ #endif ++#else ++ #define DM_DIG_FA_TH0 0x200//0x20 ++#endif ++ ++#define DM_DIG_FA_TH1 0x300 ++#define DM_DIG_FA_TH2 0x400 ++//this is for 92d ++#define DM_DIG_FA_TH0_92D 0x100 ++#define DM_DIG_FA_TH1_92D 0x400 ++#define DM_DIG_FA_TH2_92D 0x600 ++ ++#define DM_DIG_BACKOFF_MAX 12 ++#define DM_DIG_BACKOFF_MIN -4 ++#define DM_DIG_BACKOFF_DEFAULT 10 ++ ++#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps ++#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps ++#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps ++#define RSSI_OFFSET_DIG 0x05 ++ ++VOID ++ODM_ChangeDynamicInitGainThresh( ++ IN PVOID pDM_VOID, ++ IN u4Byte DM_Type, ++ IN u4Byte DM_Value ++ ); ++ ++VOID ++ODM_Write_DIG( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurrentIGI ++ ); ++ ++VOID ++odm_PauseDIG( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte IGIValue ++ ); ++ ++VOID ++odm_DIGInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DIG( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DIGbyRSSI_LPS( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_FalseAlarmCounterStatistics( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_PauseCCKPacketDetection( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte CCKPDThreshold ++ ); ++ ++VOID ++odm_CCKPacketDetectionThresh( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++ODM_Write_CCK_CCA_Thres( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurCCK_CCAThres ++ ); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++odm_MPT_DIGCallback( ++ PRT_TIMER pTimer ++); ++ ++VOID ++odm_MPT_DIGWorkItemCallback( ++ IN PVOID pContext ++ ); ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++VOID ++odm_MPT_DIGCallback( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_CE) ++VOID ++ODM_MPT_DIG( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamicbbpowersaving.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamicbbpowersaving.c new file mode 100644 -index 000000000..ab01c4760 +index 0000000..23fc002 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamicbbpowersaving.c @@ -0,0 +1,219 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+VOID -+odm_DynamicBBPowerSavingInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; -+ -+ pDM_PSTable->PreCCAState = CCA_MAX; -+ pDM_PSTable->CurCCAState = CCA_MAX; -+ pDM_PSTable->PreRFState = RF_MAX; -+ pDM_PSTable->CurRFState = RF_MAX; -+ pDM_PSTable->Rssi_val_min = 0; -+ pDM_PSTable->initialize = 0; -+} -+ -+ -+VOID -+odm_DynamicBBPowerSaving( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ -+ if (pDM_Odm->SupportICType != ODM_RTL8723A) -+ return; -+ if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) -+ return; -+ if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))) -+ return; -+ -+ //1 2.Power Saving for 92C -+ if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) -+ { -+ odm_1R_CCA(pDM_Odm); -+ } -+ -+ // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. -+ // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. -+ //1 3.Power Saving for 88C -+ else -+ { -+ ODM_RF_Saving(pDM_Odm, FALSE); -+ } -+#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+} -+ -+VOID -+odm_1R_CCA( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; -+ -+ if(pDM_Odm->RSSI_Min!= 0xFF) -+ { -+ -+ if(pDM_PSTable->PreCCAState == CCA_2R) -+ { -+ if(pDM_Odm->RSSI_Min >= 35) -+ pDM_PSTable->CurCCAState = CCA_1R; -+ else -+ pDM_PSTable->CurCCAState = CCA_2R; -+ -+ } -+ else{ -+ if(pDM_Odm->RSSI_Min <= 30) -+ pDM_PSTable->CurCCAState = CCA_2R; -+ else -+ pDM_PSTable->CurCCAState = CCA_1R; -+ } -+ } -+ else{ -+ pDM_PSTable->CurCCAState=CCA_MAX; -+ } -+ -+ if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) -+ { -+ if(pDM_PSTable->CurCCAState == CCA_1R) -+ { -+ if( pDM_Odm->RFType ==ODM_2T2R ) -+ { -+ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); -+ //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); -+ } -+ else -+ { -+ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); -+ //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 -+ } -+ } -+ else -+ { -+ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); -+ //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); -+ } -+ pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; -+ } -+} -+ -+void -+ODM_RF_Saving( -+ IN PVOID pDM_VOID, -+ IN u1Byte bForceInNormal -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; -+ u1Byte Rssi_Up_bound = 30 ; -+ u1Byte Rssi_Low_bound = 25; -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV -+ { -+ Rssi_Up_bound = 50 ; -+ Rssi_Low_bound = 45; -+ } -+#endif -+ if(pDM_PSTable->initialize == 0){ -+ -+ pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; -+ pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; -+ pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; -+ pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; -+ //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); -+ pDM_PSTable->initialize = 1; -+ } -+ -+ if(!bForceInNormal) -+ { -+ if(pDM_Odm->RSSI_Min != 0xFF) -+ { -+ if(pDM_PSTable->PreRFState == RF_Normal) -+ { -+ if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) -+ pDM_PSTable->CurRFState = RF_Save; -+ else -+ pDM_PSTable->CurRFState = RF_Normal; -+ } -+ else{ -+ if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) -+ pDM_PSTable->CurRFState = RF_Normal; -+ else -+ pDM_PSTable->CurRFState = RF_Save; -+ } -+ } -+ else -+ pDM_PSTable->CurRFState=RF_MAX; -+ } -+ else -+ { -+ pDM_PSTable->CurRFState = RF_Normal; -+ } -+ -+ if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) -+ { -+ if(pDM_PSTable->CurRFState == RF_Save) -+ { -+ // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. -+ // Suggested by SD3 Yu-Nan. 2011.01.20. -+ if(pDM_Odm->SupportICType == ODM_RTL8723A) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 -+ } -+ ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 -+ ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 -+ ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 -+ ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 -+ ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 -+ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 -+ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 -+ } -+ else -+ { -+ ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); -+ ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); -+ ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); -+ ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); -+ ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8723A) -+ { -+ ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 -+ } -+ } -+ pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; -+ } -+#endif -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++odm_DynamicBBPowerSavingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; ++ ++ pDM_PSTable->PreCCAState = CCA_MAX; ++ pDM_PSTable->CurCCAState = CCA_MAX; ++ pDM_PSTable->PreRFState = RF_MAX; ++ pDM_PSTable->CurRFState = RF_MAX; ++ pDM_PSTable->Rssi_val_min = 0; ++ pDM_PSTable->initialize = 0; ++} ++ ++ ++VOID ++odm_DynamicBBPowerSaving( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8723A) ++ return; ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) ++ return; ++ if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))) ++ return; ++ ++ //1 2.Power Saving for 92C ++ if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) ++ { ++ odm_1R_CCA(pDM_Odm); ++ } ++ ++ // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. ++ // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. ++ //1 3.Power Saving for 88C ++ else ++ { ++ ODM_RF_Saving(pDM_Odm, FALSE); ++ } ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++} ++ ++VOID ++odm_1R_CCA( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; ++ ++ if(pDM_Odm->RSSI_Min!= 0xFF) ++ { ++ ++ if(pDM_PSTable->PreCCAState == CCA_2R) ++ { ++ if(pDM_Odm->RSSI_Min >= 35) ++ pDM_PSTable->CurCCAState = CCA_1R; ++ else ++ pDM_PSTable->CurCCAState = CCA_2R; ++ ++ } ++ else{ ++ if(pDM_Odm->RSSI_Min <= 30) ++ pDM_PSTable->CurCCAState = CCA_2R; ++ else ++ pDM_PSTable->CurCCAState = CCA_1R; ++ } ++ } ++ else{ ++ pDM_PSTable->CurCCAState=CCA_MAX; ++ } ++ ++ if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) ++ { ++ if(pDM_PSTable->CurCCAState == CCA_1R) ++ { ++ if( pDM_Odm->RFType ==ODM_2T2R ) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); ++ //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); ++ //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 ++ } ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); ++ //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); ++ } ++ pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; ++ } ++} ++ ++void ++ODM_RF_Saving( ++ IN PVOID pDM_VOID, ++ IN u1Byte bForceInNormal ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; ++ u1Byte Rssi_Up_bound = 30 ; ++ u1Byte Rssi_Low_bound = 25; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV ++ { ++ Rssi_Up_bound = 50 ; ++ Rssi_Low_bound = 45; ++ } ++#endif ++ if(pDM_PSTable->initialize == 0){ ++ ++ pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; ++ pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; ++ pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; ++ pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; ++ //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); ++ pDM_PSTable->initialize = 1; ++ } ++ ++ if(!bForceInNormal) ++ { ++ if(pDM_Odm->RSSI_Min != 0xFF) ++ { ++ if(pDM_PSTable->PreRFState == RF_Normal) ++ { ++ if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) ++ pDM_PSTable->CurRFState = RF_Save; ++ else ++ pDM_PSTable->CurRFState = RF_Normal; ++ } ++ else{ ++ if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) ++ pDM_PSTable->CurRFState = RF_Normal; ++ else ++ pDM_PSTable->CurRFState = RF_Save; ++ } ++ } ++ else ++ pDM_PSTable->CurRFState=RF_MAX; ++ } ++ else ++ { ++ pDM_PSTable->CurRFState = RF_Normal; ++ } ++ ++ if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) ++ { ++ if(pDM_PSTable->CurRFState == RF_Save) ++ { ++ // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. ++ // Suggested by SD3 Yu-Nan. 2011.01.20. ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 ++ } ++ ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 ++ ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 ++ ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 ++ ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 ++ ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); ++ ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); ++ ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); ++ ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); ++ ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 ++ } ++ } ++ pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; ++ } ++#endif ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamicbbpowersaving.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamicbbpowersaving.h new file mode 100644 -index 000000000..365c17181 +index 0000000..0556e3f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamicbbpowersaving.h @@ -0,0 +1,63 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMDYNAMICBBPOWERSAVING_H__ -+#define __PHYDMDYNAMICBBPOWERSAVING_H__ -+ -+#define DYNAMIC_BBPWRSAV_VERSION "1.0" -+ -+typedef struct _Dynamic_Power_Saving_ -+{ -+ u1Byte PreCCAState; -+ u1Byte CurCCAState; -+ -+ u1Byte PreRFState; -+ u1Byte CurRFState; -+ -+ int Rssi_val_min; -+ -+ u1Byte initialize; -+ u4Byte Reg874,RegC70,Reg85C,RegA74; -+ -+}PS_T,*pPS_T; -+ -+#define dm_RF_Saving ODM_RF_Saving -+ -+void ODM_RF_Saving( -+ IN PVOID pDM_VOID, -+ IN u1Byte bForceInNormal -+); -+ -+VOID -+odm_DynamicBBPowerSavingInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DynamicBBPowerSaving( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_1R_CCA( -+ IN PVOID pDM_VOID -+ ); -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMDYNAMICBBPOWERSAVING_H__ ++#define __PHYDMDYNAMICBBPOWERSAVING_H__ ++ ++#define DYNAMIC_BBPWRSAV_VERSION "1.0" ++ ++typedef struct _Dynamic_Power_Saving_ ++{ ++ u1Byte PreCCAState; ++ u1Byte CurCCAState; ++ ++ u1Byte PreRFState; ++ u1Byte CurRFState; ++ ++ int Rssi_val_min; ++ ++ u1Byte initialize; ++ u4Byte Reg874,RegC70,Reg85C,RegA74; ++ ++}PS_T,*pPS_T; ++ ++#define dm_RF_Saving ODM_RF_Saving ++ ++void ODM_RF_Saving( ++ IN PVOID pDM_VOID, ++ IN u1Byte bForceInNormal ++); ++ ++VOID ++odm_DynamicBBPowerSavingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicBBPowerSaving( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_1R_CCA( ++ IN PVOID pDM_VOID ++ ); ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamictxpower.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamictxpower.c new file mode 100644 -index 000000000..7a9d3ec83 +index 0000000..afb3be9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamictxpower.c @@ -0,0 +1,633 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+VOID -+odm_DynamicTxPowerInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ #if DEV_BUS_TYPE==RT_USB_INTERFACE -+ if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) -+ { -+ odm_DynamicTxPowerSavePowerIndex(pDM_Odm); -+ pMgntInfo->bDynamicTxPowerEnable = TRUE; -+ } -+ else -+ #else -+ //so 92c pci do not need dynamic tx power? vivi check it later -+ if(IS_HARDWARE_TYPE_8192D(Adapter)) -+ pMgntInfo->bDynamicTxPowerEnable = TRUE; -+ else -+ pMgntInfo->bDynamicTxPowerEnable = FALSE; -+ #endif -+ -+ -+ pHalData->LastDTPLvl = TxHighPwrLevel_Normal; -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ -+ -+#endif -+ -+} -+ -+VOID -+odm_DynamicTxPowerSavePowerIndex( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ u1Byte index; -+ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ for(index = 0; index< 6; index++) -+ pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); -+ -+ -+#endif -+#endif -+} -+ -+VOID -+odm_DynamicTxPowerRestorePowerIndex( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ u1Byte index; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ for(index = 0; index< 6; index++) -+ PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); -+ -+ -+#endif -+#endif -+} -+ -+VOID -+odm_DynamicTxPowerWritePowerIndex( -+ IN PVOID pDM_VOID, -+ IN u1Byte Value) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte index; -+ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; -+ -+ for(index = 0; index< 6; index++) -+ //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); -+ ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); -+ -+} -+ -+ -+VOID -+odm_DynamicTxPower( -+ IN PVOID pDM_VOID -+ ) -+{ -+ // -+ // For AP/ADSL use prtl8192cd_priv -+ // For CE/NIC use PADAPTER -+ // -+ //PADAPTER pAdapter = pDM_Odm->Adapter; -+// prtl8192cd_priv priv = pDM_Odm->priv; -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) -+ return; -+ // -+ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate -+ // at the same time. In the stage2/3, we need to prive universal interface and merge all -+ // HW dynamic mechanism. -+ // -+ switch (pDM_Odm->SupportPlatform) -+ { -+ case ODM_WIN: -+ case ODM_CE: -+ odm_DynamicTxPowerNIC(pDM_Odm); -+ break; -+ case ODM_AP: -+ odm_DynamicTxPowerAP(pDM_Odm); -+ break; -+ -+ case ODM_ADSL: -+ //odm_DIGAP(pDM_Odm); -+ break; -+ } -+ -+ -+} -+ -+ -+VOID -+odm_DynamicTxPowerNIC( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) -+ return; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8192C) -+ { -+ odm_DynamicTxPower_92C(pDM_Odm); -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ odm_DynamicTxPower_92D(pDM_Odm); -+ } -+ else if (pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); -+ -+ if (pMgntInfo->RegRspPwr == 1) -+ { -+ if(pDM_Odm->RSSI_Min > 60) -+ { -+ ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB -+ -+ } -+ else if(pDM_Odm->RSSI_Min < 55) -+ { -+ ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB -+ } -+ } -+#endif -+ } -+#endif -+} -+ -+VOID -+odm_DynamicTxPowerAP( -+ IN PVOID pDM_VOID -+ -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+//#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1)) -+ -+ -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ s4Byte i; -+ s2Byte pwr_thd = TX_POWER_NEAR_FIELD_THRESH_AP; -+ -+ if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) -+ return; -+ -+#if ((RTL8812E_SUPPORT==1) || (RTL8881A_SUPPORT==1) || (RTL8814A_SUPPORT==1)) -+ if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A)) -+ pwr_thd = TX_POWER_NEAR_FIELD_THRESH_8812; -+#endif -+ -+#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) -+ if(CHIP_VER_92X_SERIES(priv)) -+ { -+#ifdef HIGH_POWER_EXT_PA -+ if(pDM_Odm->ExtPA) -+ tx_power_control(priv); -+#endif -+ } -+#endif -+ /* -+ * Check if station is near by to use lower tx power -+ */ -+ -+ if ((priv->up_time % 3) == 0 ) { -+ int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0; -+ -+ for(i=0; ipODM_StaInfo[i]; -+ if(IS_STA_VALID(pstat) ) { -+ if(disable_pwr_ctrl) -+ pstat->hp_level = 0; -+ else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd)) -+ pstat->hp_level = 1; -+ else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8))) -+ pstat->hp_level = 0; -+ } -+ } -+ -+#if defined(CONFIG_WLAN_HAL_8192EE) -+ if (GET_CHIP_VER(priv) == VERSION_8192E) { -+ if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) { -+ if(pDM_Odm->RSSI_Min > pwr_thd) -+ RRSR_power_control_11n(priv, 1 ); -+ else if(pDM_Odm->RSSI_Min < (pwr_thd-8)) -+ RRSR_power_control_11n(priv, 0 ); -+ } else { -+ RRSR_power_control_11n(priv, 0 ); -+ } -+ } -+#endif -+ -+#ifdef CONFIG_WLAN_HAL_8814AE -+ if (GET_CHIP_VER(priv) == VERSION_8814A) { -+ if (!disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff)) { -+ if (pDM_Odm->RSSI_Min > pwr_thd) -+ RRSR_power_control_14(priv, 1); -+ else if (pDM_Odm->RSSI_Min < (pwr_thd-8)) -+ RRSR_power_control_14(priv, 0); -+ } else { -+ RRSR_power_control_14(priv, 0); -+ } -+ } -+#endif -+ -+ } -+//#endif -+ -+#endif -+} -+ -+ -+VOID -+odm_DynamicTxPower_92C( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ s4Byte UndecoratedSmoothedPWDB; -+ -+ // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. -+ if (pDM_Odm->ExtPA == FALSE) -+ return; -+ -+ // STA not connected and AP not connected -+ if((!pMgntInfo->bMediaConnect) && -+ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ -+ //the LastDTPlvl should reset when disconnect, -+ //otherwise the tx power level wouldn't change when disconnect and connect again. -+ // Maddest 20091220. -+ pHalData->LastDTPLvl=TxHighPwrLevel_Normal; -+ return; -+ } -+ -+#if (INTEL_PROXIMITY_SUPPORT == 1) -+ // Intel set fixed tx power -+ if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) -+ { -+ switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ -+ case 1: -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); -+ break; -+ case 2: -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); -+ break; -+ case 3: -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); -+ break; -+ case 4: -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); -+ break; -+ case 5: -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); -+ break; -+ default: -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); -+ break; -+ } -+ } -+ else -+#endif -+ { -+ if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || -+ pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ } -+ else -+ { -+ if(pMgntInfo->bMediaConnect) // Default port -+ { -+ if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) -+ { -+ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); -+ } -+ else -+ { -+ UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); -+ } -+ } -+ else // associated entry pwdb -+ { -+ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); -+ } -+ -+ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); -+ } -+ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && -+ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); -+ } -+ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); -+ } -+ } -+ } -+ if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); -+ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); -+ if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && -+ (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal -+ odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); -+ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) -+ odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); -+ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) -+ odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); -+ } -+ pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; -+ -+ -+ -+ -+#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+} -+ -+ -+VOID -+odm_DynamicTxPower_92D( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if (RTL8192D_SUPPORT==1) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ s4Byte UndecoratedSmoothedPWDB; -+ -+ PADAPTER BuddyAdapter = Adapter->BuddyAdapter; -+ BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); -+ u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; -+ -+ // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. -+ if (pDM_Odm->ExtPA == FALSE) -+ return; -+ -+ // If dynamic high power is disabled. -+ if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || -+ pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ return; -+ } -+ -+ // STA not connected and AP not connected -+ if((!pMgntInfo->bMediaConnect) && -+ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ -+ //the LastDTPlvl should reset when disconnect, -+ //otherwise the tx power level wouldn't change when disconnect and connect again. -+ // Maddest 20091220. -+ pHalData->LastDTPLvl=TxHighPwrLevel_Normal; -+ return; -+ } -+ -+ if(pMgntInfo->bMediaConnect) // Default port -+ { -+ if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) -+ { -+ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); -+ } -+ else -+ { -+ UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); -+ } -+ } -+ else // associated entry pwdb -+ { -+ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); -+ } -+ -+ if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){ -+ if(UndecoratedSmoothedPWDB >= 0x33) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); -+ } -+ else if((UndecoratedSmoothedPWDB <0x33) && -+ (UndecoratedSmoothedPWDB >= 0x2b) ) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); -+ } -+ else if(UndecoratedSmoothedPWDB < 0x2b) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); -+ } -+ -+ } -+ else -+ -+ { -+ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); -+ } -+ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && -+ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); -+ } -+ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) -+ { -+ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); -+ } -+ -+ } -+ -+//sherry delete flag 20110517 -+ if(bGetValueFromBuddyAdapter) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); -+ if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() change value \n")); -+ HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; -+ pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; -+ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); -+ pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; -+ Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; -+ } -+ } -+ -+ if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); -+ if(Adapter->DualMacSmartConcurrent == TRUE) -+ { -+ if(BuddyAdapter == NULL) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); -+ if(!Adapter->bSlaveOfDMSP) -+ { -+ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); -+ } -+ } -+ else -+ { -+ if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); -+ if(Adapter->bSlaveOfDMSP) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); -+ BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; -+ BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() master case \n")); -+ if(!bGetValueFromBuddyAdapter) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); -+ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); -+ } -+ } -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); -+ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); -+ } -+ } -+ } -+ else -+ { -+ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); -+ } -+ -+ } -+ pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; -+ -+ -+#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#endif -+} -+ -+VOID -+odm_DynamicTxPower_8821( -+ IN PVOID pDM_VOID, -+ IN pu1Byte pDesc, -+ IN u1Byte macId -+ ) -+{ -+#if (RTL8821A_SUPPORT == 1) -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PSTA_INFO_T pEntry; -+ u1Byte reg0xc56_byte; -+ u1Byte reg0xe56_byte; -+ u1Byte txpwr_offset = 0; -+ -+ pEntry = pDM_Odm->pODM_StaInfo[macId]; -+ -+ reg0xc56_byte = ODM_Read1Byte(pDM_Odm, 0xc56); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("reg0xc56_byte=%d\n", reg0xc56_byte)); -+ -+ if (pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB > 85) { -+ -+ /* Avoid TXAGC error after TX power offset is applied. -+ For example: Reg0xc56=0x6, if txpwr_offset=3( reduce 11dB ) -+ Total power = 6-11= -5( overflow!! ), PA may be burned ! -+ so txpwr_offset should be adjusted by Reg0xc56*/ -+ -+ if (reg0xc56_byte < 7) -+ txpwr_offset = 1; -+ else if (reg0xc56_byte < 11) -+ txpwr_offset = 2; -+ else -+ txpwr_offset = 3; -+ -+ SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset)); -+ -+ } else{ -+ SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset)); -+ -+ } -+#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+#endif /*#if (RTL8821A_SUPPORT==1)*/ -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++odm_DynamicTxPowerInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ #if DEV_BUS_TYPE==RT_USB_INTERFACE ++ if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) ++ { ++ odm_DynamicTxPowerSavePowerIndex(pDM_Odm); ++ pMgntInfo->bDynamicTxPowerEnable = TRUE; ++ } ++ else ++ #else ++ //so 92c pci do not need dynamic tx power? vivi check it later ++ if(IS_HARDWARE_TYPE_8192D(Adapter)) ++ pMgntInfo->bDynamicTxPowerEnable = TRUE; ++ else ++ pMgntInfo->bDynamicTxPowerEnable = FALSE; ++ #endif ++ ++ ++ pHalData->LastDTPLvl = TxHighPwrLevel_Normal; ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ ++#endif ++ ++} ++ ++VOID ++odm_DynamicTxPowerSavePowerIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ u1Byte index; ++ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ for(index = 0; index< 6; index++) ++ pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); ++ ++ ++#endif ++#endif ++} ++ ++VOID ++odm_DynamicTxPowerRestorePowerIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ u1Byte index; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ for(index = 0; index< 6; index++) ++ PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); ++ ++ ++#endif ++#endif ++} ++ ++VOID ++odm_DynamicTxPowerWritePowerIndex( ++ IN PVOID pDM_VOID, ++ IN u1Byte Value) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte index; ++ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); ++ ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); ++ ++} ++ ++ ++VOID ++odm_DynamicTxPower( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ //PADAPTER pAdapter = pDM_Odm->Adapter; ++// prtl8192cd_priv priv = pDM_Odm->priv; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) ++ return; ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ case ODM_CE: ++ odm_DynamicTxPowerNIC(pDM_Odm); ++ break; ++ case ODM_AP: ++ odm_DynamicTxPowerAP(pDM_Odm); ++ break; ++ ++ case ODM_ADSL: ++ //odm_DIGAP(pDM_Odm); ++ break; ++ } ++ ++ ++} ++ ++ ++VOID ++odm_DynamicTxPowerNIC( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) ++ return; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8192C) ++ { ++ odm_DynamicTxPower_92C(pDM_Odm); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ odm_DynamicTxPower_92D(pDM_Odm); ++ } ++ else if (pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); ++ ++ if (pMgntInfo->RegRspPwr == 1) ++ { ++ if(pDM_Odm->RSSI_Min > 60) ++ { ++ ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB ++ ++ } ++ else if(pDM_Odm->RSSI_Min < 55) ++ { ++ ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB ++ } ++ } ++#endif ++ } ++#endif ++} ++ ++VOID ++odm_DynamicTxPowerAP( ++ IN PVOID pDM_VOID ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++//#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1)) ++ ++ ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ s4Byte i; ++ s2Byte pwr_thd = TX_POWER_NEAR_FIELD_THRESH_AP; ++ ++ if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) ++ return; ++ ++#if ((RTL8812E_SUPPORT==1) || (RTL8881A_SUPPORT==1) || (RTL8814A_SUPPORT==1)) ++ if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A)) ++ pwr_thd = TX_POWER_NEAR_FIELD_THRESH_8812; ++#endif ++ ++#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) ++ if(CHIP_VER_92X_SERIES(priv)) ++ { ++#ifdef HIGH_POWER_EXT_PA ++ if(pDM_Odm->ExtPA) ++ tx_power_control(priv); ++#endif ++ } ++#endif ++ /* ++ * Check if station is near by to use lower tx power ++ */ ++ ++ if ((priv->up_time % 3) == 0 ) { ++ int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0; ++ ++ for(i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pstat) ) { ++ if(disable_pwr_ctrl) ++ pstat->hp_level = 0; ++ else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd)) ++ pstat->hp_level = 1; ++ else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8))) ++ pstat->hp_level = 0; ++ } ++ } ++ ++#if defined(CONFIG_WLAN_HAL_8192EE) ++ if (GET_CHIP_VER(priv) == VERSION_8192E) { ++ if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) { ++ if(pDM_Odm->RSSI_Min > pwr_thd) ++ RRSR_power_control_11n(priv, 1 ); ++ else if(pDM_Odm->RSSI_Min < (pwr_thd-8)) ++ RRSR_power_control_11n(priv, 0 ); ++ } else { ++ RRSR_power_control_11n(priv, 0 ); ++ } ++ } ++#endif ++ ++#ifdef CONFIG_WLAN_HAL_8814AE ++ if (GET_CHIP_VER(priv) == VERSION_8814A) { ++ if (!disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff)) { ++ if (pDM_Odm->RSSI_Min > pwr_thd) ++ RRSR_power_control_14(priv, 1); ++ else if (pDM_Odm->RSSI_Min < (pwr_thd-8)) ++ RRSR_power_control_14(priv, 0); ++ } else { ++ RRSR_power_control_14(priv, 0); ++ } ++ } ++#endif ++ ++ } ++//#endif ++ ++#endif ++} ++ ++ ++VOID ++odm_DynamicTxPower_92C( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s4Byte UndecoratedSmoothedPWDB; ++ ++ // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. ++ if (pDM_Odm->ExtPA == FALSE) ++ return; ++ ++ // STA not connected and AP not connected ++ if((!pMgntInfo->bMediaConnect) && ++ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ //the LastDTPlvl should reset when disconnect, ++ //otherwise the tx power level wouldn't change when disconnect and connect again. ++ // Maddest 20091220. ++ pHalData->LastDTPLvl=TxHighPwrLevel_Normal; ++ return; ++ } ++ ++#if (INTEL_PROXIMITY_SUPPORT == 1) ++ // Intel set fixed tx power ++ if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) ++ { ++ switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ ++ case 1: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); ++ break; ++ case 2: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); ++ break; ++ case 3: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); ++ break; ++ case 4: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); ++ break; ++ case 5: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); ++ break; ++ default: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); ++ break; ++ } ++ } ++ else ++#endif ++ { ++ if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || ++ pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ } ++ else ++ { ++ if(pMgntInfo->bMediaConnect) // Default port ++ { ++ if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ ++ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && ++ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); ++ } ++ } ++ } ++ if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && ++ (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal ++ odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); ++ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); ++ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); ++ } ++ pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; ++ ++ ++ ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++} ++ ++ ++VOID ++odm_DynamicTxPower_92D( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (RTL8192D_SUPPORT==1) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s4Byte UndecoratedSmoothedPWDB; ++ ++ PADAPTER BuddyAdapter = Adapter->BuddyAdapter; ++ BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); ++ u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; ++ ++ // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. ++ if (pDM_Odm->ExtPA == FALSE) ++ return; ++ ++ // If dynamic high power is disabled. ++ if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || ++ pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ return; ++ } ++ ++ // STA not connected and AP not connected ++ if((!pMgntInfo->bMediaConnect) && ++ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ //the LastDTPlvl should reset when disconnect, ++ //otherwise the tx power level wouldn't change when disconnect and connect again. ++ // Maddest 20091220. ++ pHalData->LastDTPLvl=TxHighPwrLevel_Normal; ++ return; ++ } ++ ++ if(pMgntInfo->bMediaConnect) // Default port ++ { ++ if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ ++ if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){ ++ if(UndecoratedSmoothedPWDB >= 0x33) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB <0x33) && ++ (UndecoratedSmoothedPWDB >= 0x2b) ) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < 0x2b) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); ++ } ++ ++ } ++ else ++ ++ { ++ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && ++ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); ++ } ++ ++ } ++ ++//sherry delete flag 20110517 ++ if(bGetValueFromBuddyAdapter) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); ++ if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() change value \n")); ++ HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; ++ pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; ++ Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; ++ } ++ } ++ ++ if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); ++ if(Adapter->DualMacSmartConcurrent == TRUE) ++ { ++ if(BuddyAdapter == NULL) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); ++ if(!Adapter->bSlaveOfDMSP) ++ { ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ } ++ else ++ { ++ if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); ++ if(Adapter->bSlaveOfDMSP) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); ++ BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; ++ BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() master case \n")); ++ if(!bGetValueFromBuddyAdapter) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ } ++ } ++ else ++ { ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ ++ } ++ pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; ++ ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#endif ++} ++ ++VOID ++odm_DynamicTxPower_8821( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++ ) ++{ ++#if (RTL8821A_SUPPORT == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PSTA_INFO_T pEntry; ++ u1Byte reg0xc56_byte; ++ u1Byte reg0xe56_byte; ++ u1Byte txpwr_offset = 0; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[macId]; ++ ++ reg0xc56_byte = ODM_Read1Byte(pDM_Odm, 0xc56); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("reg0xc56_byte=%d\n", reg0xc56_byte)); ++ ++ if (pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB > 85) { ++ ++ /* Avoid TXAGC error after TX power offset is applied. ++ For example: Reg0xc56=0x6, if txpwr_offset=3( reduce 11dB ) ++ Total power = 6-11= -5( overflow!! ), PA may be burned ! ++ so txpwr_offset should be adjusted by Reg0xc56*/ ++ ++ if (reg0xc56_byte < 7) ++ txpwr_offset = 1; ++ else if (reg0xc56_byte < 11) ++ txpwr_offset = 2; ++ else ++ txpwr_offset = 3; ++ ++ SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset)); ++ ++ } else{ ++ SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset)); ++ ++ } ++#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++#endif /*#if (RTL8821A_SUPPORT==1)*/ ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamictxpower.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamictxpower.h new file mode 100644 -index 000000000..db61bf85d +index 0000000..69e1849 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_dynamictxpower.h @@ -0,0 +1,98 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMDYNAMICTXPOWER_H__ -+#define __PHYDMDYNAMICTXPOWER_H__ -+ -+/*#define DYNAMIC_TXPWR_VERSION "1.0"*/ -+#define DYNAMIC_TXPWR_VERSION "1.1" /*2015.01.13*/ -+ -+#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 -+#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 -+#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F -+#define TX_POWER_NEAR_FIELD_THRESH_8812 60 -+ -+#define TxHighPwrLevel_Normal 0 -+#define TxHighPwrLevel_Level1 1 -+#define TxHighPwrLevel_Level2 2 -+#define TxHighPwrLevel_BT1 3 -+#define TxHighPwrLevel_BT2 4 -+#define TxHighPwrLevel_15 5 -+#define TxHighPwrLevel_35 6 -+#define TxHighPwrLevel_50 7 -+#define TxHighPwrLevel_70 8 -+#define TxHighPwrLevel_100 9 -+ -+VOID -+odm_DynamicTxPowerInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DynamicTxPowerRestorePowerIndex( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DynamicTxPowerNIC( -+ IN PVOID pDM_VOID -+ ); -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+VOID -+odm_DynamicTxPowerSavePowerIndex( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DynamicTxPowerWritePowerIndex( -+ IN PVOID pDM_VOID, -+ IN u1Byte Value); -+ -+VOID -+odm_DynamicTxPower_92C( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DynamicTxPower_92D( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DynamicTxPower_8821( -+ IN PVOID pDM_VOID, -+ IN pu1Byte pDesc, -+ IN u1Byte macId -+ ); -+ -+#endif -+ -+VOID -+odm_DynamicTxPower( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_DynamicTxPowerAP( -+ IN PVOID pDM_VOID -+ ); -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMDYNAMICTXPOWER_H__ ++#define __PHYDMDYNAMICTXPOWER_H__ ++ ++/*#define DYNAMIC_TXPWR_VERSION "1.0"*/ ++#define DYNAMIC_TXPWR_VERSION "1.1" /*2015.01.13*/ ++ ++#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 ++#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 ++#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F ++#define TX_POWER_NEAR_FIELD_THRESH_8812 60 ++ ++#define TxHighPwrLevel_Normal 0 ++#define TxHighPwrLevel_Level1 1 ++#define TxHighPwrLevel_Level2 2 ++#define TxHighPwrLevel_BT1 3 ++#define TxHighPwrLevel_BT2 4 ++#define TxHighPwrLevel_15 5 ++#define TxHighPwrLevel_35 6 ++#define TxHighPwrLevel_50 7 ++#define TxHighPwrLevel_70 8 ++#define TxHighPwrLevel_100 9 ++ ++VOID ++odm_DynamicTxPowerInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerRestorePowerIndex( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerNIC( ++ IN PVOID pDM_VOID ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++VOID ++odm_DynamicTxPowerSavePowerIndex( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerWritePowerIndex( ++ IN PVOID pDM_VOID, ++ IN u1Byte Value); ++ ++VOID ++odm_DynamicTxPower_92C( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPower_92D( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPower_8821( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++ ); ++ ++#endif ++ ++VOID ++odm_DynamicTxPower( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerAP( ++ IN PVOID pDM_VOID ++ ); ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_edcaturbocheck.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_edcaturbocheck.c new file mode 100644 -index 000000000..6d3dc6d38 +index 0000000..255d985 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_edcaturbocheck.c @@ -0,0 +1,835 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+VOID -+ODM_EdcaTurboInit( -+ IN PVOID pDM_VOID) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) -+ PADAPTER Adapter = NULL; -+ HAL_DATA_TYPE *pHalData = NULL; -+ -+ if(pDM_Odm->Adapter==NULL) { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); -+ return; -+ } -+ -+ Adapter=pDM_Odm->Adapter; -+ pHalData=GET_HAL_DATA(Adapter); -+ -+ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; -+ pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; -+ pHalData->bIsAnyNonBEPkts = FALSE; -+ -+#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; -+ pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; -+ Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; -+ -+#endif -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); -+ -+ -+} // ODM_InitEdcaTurbo -+ -+VOID -+odm_EdcaTurboCheck( -+ IN PVOID pDM_VOID -+ ) -+{ -+ // -+ // For AP/ADSL use prtl8192cd_priv -+ // For CE/NIC use PADAPTER -+ // -+ -+ // -+ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate -+ // at the same time. In the stage2/3, we need to prive universal interface and merge all -+ // HW dynamic mechanism. -+ // -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); -+ -+ if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) -+ return; -+ -+ switch (pDM_Odm->SupportPlatform) -+ { -+ case ODM_WIN: -+ -+#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) -+ odm_EdcaTurboCheckMP(pDM_Odm); -+#endif -+ break; -+ -+ case ODM_CE: -+#if(DM_ODM_SUPPORT_TYPE==ODM_CE) -+ odm_EdcaTurboCheckCE(pDM_Odm); -+#endif -+ break; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); -+ -+} // odm_CheckEdcaTurbo -+ -+#if(DM_ODM_SUPPORT_TYPE==ODM_CE) -+ -+ -+VOID -+odm_EdcaTurboCheckCE( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; -+ u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; -+ u32 ICType=pDM_Odm->SupportICType; -+ u32 IOTPeer=0; -+ u8 WirelessMode=0xFF; //invalid value -+ u32 trafficIndex; -+ u32 edca_param; -+ u64 cur_tx_bytes = 0; -+ u64 cur_rx_bytes = 0; -+ u8 bbtchange = _FALSE; -+ u8 bBiasOnRx = _FALSE; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct recv_priv *precvpriv = &(Adapter->recvpriv); -+ struct registry_priv *pregpriv = &Adapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if(pDM_Odm->bLinked != _TRUE) -+ { -+ precvpriv->bIsAnyNonBEPkts = _FALSE; -+ return; -+ } -+ -+ if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) -+ { -+ precvpriv->bIsAnyNonBEPkts = _FALSE; -+ return; -+ } -+ -+ if(pDM_Odm->pWirelessMode!=NULL) -+ WirelessMode=*(pDM_Odm->pWirelessMode); -+ -+ IOTPeer = pmlmeinfo->assoc_AP_vendor; -+ -+ if (IOTPeer >= HT_IOT_PEER_MAX) -+ { -+ precvpriv->bIsAnyNonBEPkts = _FALSE; -+ return; -+ } -+ -+ if( (pDM_Odm->SupportICType == ODM_RTL8192C) || -+ (pDM_Odm->SupportICType == ODM_RTL8723A) || -+ (pDM_Odm->SupportICType == ODM_RTL8188E)) -+ { -+ if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS)) -+ bBiasOnRx = _TRUE; -+ } -+ -+ // Check if the status needs to be changed. -+ if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) -+ { -+ cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes; -+ cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes; -+ -+ //traffic, TX or RX -+ if(bBiasOnRx) -+ { -+ if (cur_tx_bytes > (cur_rx_bytes << 2)) -+ { // Uplink TP is present. -+ trafficIndex = UP_LINK; -+ } -+ else -+ { // Balance TP is present. -+ trafficIndex = DOWN_LINK; -+ } -+ } -+ else -+ { -+ if (cur_rx_bytes > (cur_tx_bytes << 2)) -+ { // Downlink TP is present. -+ trafficIndex = DOWN_LINK; -+ } -+ else -+ { // Balance TP is present. -+ trafficIndex = UP_LINK; -+ } -+ } -+ -+ //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) -+ { -+ if (ICType == ODM_RTL8192D) { -+ // Single PHY -+ if (pDM_Odm->RFType == ODM_2T2R) { -+ EDCA_BE_UL = 0x60a42b; //0x5ea42b; -+ EDCA_BE_DL = 0x60a42b; //0x5ea42b; -+ } else { -+ EDCA_BE_UL = 0x6ea42b; -+ EDCA_BE_DL = 0x6ea42b; -+ } -+ } -+ else -+ { -+ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { -+ if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { -+ EDCA_BE_UL = 0x60a42b; -+ EDCA_BE_DL = 0x60a42b; -+ } else { -+ EDCA_BE_UL = 0x6ea42b; -+ EDCA_BE_DL = 0x6ea42b; -+ } -+ } -+ } -+ -+ //92D txop can't be set to 0x3e for cisco1250 -+ if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) -+ { -+ EDCA_BE_DL = edca_setting_DL[IOTPeer]; -+ EDCA_BE_UL = edca_setting_UL[IOTPeer]; -+ } -+ //merge from 92s_92c_merge temp brunch v2445 20120215 -+ else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) -+ { -+ EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer]; -+ } -+ else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) -+ { -+ EDCA_BE_DL = 0xa630; -+ } -+ else if(IOTPeer == HT_IOT_PEER_MARVELL) -+ { -+ EDCA_BE_DL = edca_setting_DL[IOTPeer]; -+ EDCA_BE_UL = edca_setting_UL[IOTPeer]; -+ } -+ else if(IOTPeer == HT_IOT_PEER_ATHEROS) -+ { -+ // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. -+ EDCA_BE_DL = edca_setting_DL[IOTPeer]; -+ } -+ -+ if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE -+ { -+ EDCA_BE_UL = 0x5ea42b; -+ EDCA_BE_DL = 0x5ea42b; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL)); -+ } -+ -+ if (trafficIndex == DOWN_LINK) -+ edca_param = EDCA_BE_DL; -+ else -+ edca_param = EDCA_BE_UL; -+ -+ rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); -+ -+ pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; -+ } -+ -+ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; -+ } -+ else -+ { -+ // -+ // Turn Off EDCA turbo here. -+ // Restore original EDCA according to the declaration of AP. -+ // -+ if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) -+ { -+ rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); -+ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; -+ } -+ } -+ -+} -+ -+ -+#elif(DM_ODM_SUPPORT_TYPE==ODM_WIN) -+VOID -+odm_EdcaTurboCheckMP( -+ IN PVOID pDM_VOID -+ ) -+{ -+ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); -+ PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; -+ //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn -+ u8Byte Ext_curTxOkCnt = 0; -+ u8Byte Ext_curRxOkCnt = 0; -+ //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. -+ u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; -+ -+ // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. -+ u8Byte curTxOkCnt = 0; -+ u8Byte curRxOkCnt = 0; -+ u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; -+ u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; -+ u4Byte EDCA_BE = 0x5ea42b; -+ u1Byte IOTPeer=0; -+ BOOLEAN *pbIsCurRDLState=NULL; -+ BOOLEAN bLastIsCurRDLState=FALSE; -+ BOOLEAN bBiasOnRx=FALSE; -+ BOOLEAN bEdcaTurboOn=FALSE; -+ u1Byte TxRate = 0xFF; -+ u8Byte value64; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); -+ -+////=============================== -+////list paramter for different platform -+////=============================== -+ bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; -+ pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); -+ -+ //2012/09/14 MH Add -+ if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg) -+ pHalData->bIsAnyNonBEPkts = TRUE; -+ -+ pMgntInfo->NumNonBePkt = 0; -+ -+ // Caculate TX/RX TP: -+ //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; -+ //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; -+ curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt; -+ curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt; -+ pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; -+ pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; -+ -+ if(pExtAdapter == NULL) -+ pExtAdapter = pDefaultAdapter; -+ -+ Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; -+ Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; -+ GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); -+ //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. -+ if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) -+ { -+ curTxOkCnt = Ext_curTxOkCnt ; -+ curRxOkCnt = Ext_curRxOkCnt ; -+ } -+ // -+ IOTPeer=pMgntInfo->IOTPeer; -+ bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; -+ bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts)); -+ -+ -+////=============================== -+////check if edca turbo is disabled -+////=============================== -+ if(odm_IsEdcaTurboDisable(pDM_Odm)) -+ { -+ pHalData->bIsAnyNonBEPkts = FALSE; -+ pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; -+ pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; -+ pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; -+ pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; -+ -+ } -+ -+////=============================== -+////remove iot case out -+////=============================== -+ ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); -+ -+ -+////=============================== -+////Check if the status needs to be changed. -+////=============================== -+ if(bEdcaTurboOn) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); -+ if(bBiasOnRx) -+ odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); -+ else -+ odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); -+ -+//modify by Guo.Mingzhi 2011-12-29 -+ EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; -+ if(IS_HARDWARE_TYPE_8821U(Adapter)) -+ { -+ if(pMgntInfo->RegTxDutyEnable) -+ { -+ //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) -+ if(!pMgntInfo->ForcedDataRate) //auto rate -+ { -+ if(pDM_Odm->TxRate != 0xFF) -+ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); -+ } -+ else //force rate -+ { -+ TxRate = (u1Byte) pMgntInfo->ForcedDataRate; -+ } -+ -+ value64 = (curRxOkCnt<<2); -+ if(curTxOkCnt < value64) //Downlink -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ else //Uplink -+ { -+ /*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/ -+ /*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/ -+ if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ else -+ { -+ switch (TxRate) -+ { -+ case MGN_VHT1SS_MCS6: -+ case MGN_VHT1SS_MCS5: -+ case MGN_MCS6: -+ case MGN_MCS5: -+ case MGN_48M: -+ case MGN_54M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b); -+ break; -+ case MGN_VHT1SS_MCS4: -+ case MGN_MCS4: -+ case MGN_36M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b); -+ break; -+ case MGN_VHT1SS_MCS3: -+ case MGN_MCS3: -+ case MGN_24M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f); -+ break; -+ case MGN_VHT1SS_MCS2: -+ case MGN_MCS2: -+ case MGN_18M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f); -+ break; -+ case MGN_VHT1SS_MCS1: -+ case MGN_MCS1: -+ case MGN_9M: -+ case MGN_12M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f); -+ break; -+ case MGN_VHT1SS_MCS0: -+ case MGN_MCS0: -+ case MGN_6M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); -+ break; -+ default: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ break; -+ } -+ } -+ } -+ } -+ else -+ { -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ } -+ -+ } -+ else if (IS_HARDWARE_TYPE_8812AU(Adapter)){ -+ if(pMgntInfo->RegTxDutyEnable) -+ { -+ //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) -+ // it;s the same issue as 8811AU -+ if(!pMgntInfo->ForcedDataRate) //auto rate -+ { -+ if(pDM_Odm->TxRate != 0xFF) -+ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); -+ } -+ else //force rate -+ { -+ TxRate = (u1Byte) pMgntInfo->ForcedDataRate; -+ } -+ -+ value64 = (curRxOkCnt<<2); -+ if(curTxOkCnt < value64) //Downlink -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ else //Uplink -+ { -+ /*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/ -+ /*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/ -+ if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ else -+ { -+ switch (TxRate) -+ { -+ case MGN_VHT2SS_MCS9: -+ case MGN_VHT1SS_MCS9: -+ case MGN_VHT1SS_MCS8: -+ case MGN_MCS15: -+ case MGN_MCS7: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f); -+ case MGN_VHT2SS_MCS8: -+ case MGN_VHT1SS_MCS7: -+ case MGN_MCS14: -+ case MGN_MCS6: -+ case MGN_54M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f); -+ case MGN_VHT2SS_MCS7: -+ case MGN_VHT2SS_MCS6: -+ case MGN_VHT1SS_MCS6: -+ case MGN_VHT1SS_MCS5: -+ case MGN_MCS13: -+ case MGN_MCS5: -+ case MGN_48M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630); -+ break; -+ case MGN_VHT2SS_MCS5: -+ case MGN_VHT2SS_MCS4: -+ case MGN_VHT1SS_MCS4: -+ case MGN_VHT1SS_MCS3: -+ case MGN_MCS12: -+ case MGN_MCS4: -+ case MGN_MCS3: -+ case MGN_36M: -+ case MGN_24M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730); -+ break; -+ case MGN_VHT2SS_MCS3: -+ case MGN_VHT2SS_MCS2: -+ case MGN_VHT2SS_MCS1: -+ case MGN_VHT1SS_MCS2: -+ case MGN_VHT1SS_MCS1: -+ case MGN_MCS11: -+ case MGN_MCS10: -+ case MGN_MCS9: -+ case MGN_MCS2: -+ case MGN_MCS1: -+ case MGN_18M: -+ case MGN_12M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830); -+ break; -+ case MGN_VHT2SS_MCS0: -+ case MGN_VHT1SS_MCS0: -+ case MGN_MCS0: -+ case MGN_MCS8: -+ case MGN_9M: -+ case MGN_6M: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); -+ break; -+ default: -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ break; -+ } -+ } -+ } -+ } -+ else -+ { -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ } -+ } -+ else -+ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); -+ -+ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); -+ -+ } -+ else -+ { -+ // Turn Off EDCA turbo here. -+ // Restore original EDCA according to the declaration of AP. -+ if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) -+ { -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); -+ -+ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); -+ -+ } -+ } -+ -+} -+ -+ -+//check if edca turbo is disabled -+BOOLEAN -+odm_IsEdcaTurboDisable( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ u4Byte IOTPeer=pMgntInfo->IOTPeer; -+ -+ if(pDM_Odm->bBtDisableEdcaTurbo) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); -+ return TRUE; -+ } -+ -+ if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| -+ (pDM_Odm->bWIFITest)|| -+ (IOTPeer>= HT_IOT_PEER_MAX)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); -+ return TRUE; -+ } -+ -+ -+ // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue -+ // 2. User may disable EDCA Turbo mode with OID settings. -+ if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); -+ return TRUE; -+ } -+ -+ return FALSE; -+ -+ -+} -+ -+//add iot case here: for MP/CE -+VOID -+ODM_EdcaParaSelByIot( -+ IN PVOID pDM_VOID, -+ OUT u4Byte *EDCA_BE_UL, -+ OUT u4Byte *EDCA_BE_DL -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u4Byte IOTPeer=0; -+ u4Byte ICType=pDM_Odm->SupportICType; -+ u1Byte WirelessMode=0xFF; //invalid value -+ u4Byte RFType=pDM_Odm->RFType; -+ u4Byte IOTPeerSubType = 0; -+ -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; -+ -+ if(pDM_Odm->pWirelessMode!=NULL) -+ WirelessMode=*(pDM_Odm->pWirelessMode); -+ -+/////////////////////////////////////////////////////////// -+////list paramter for different platform -+ -+ IOTPeer=pMgntInfo->IOTPeer; -+ IOTPeerSubType=pMgntInfo->IOTPeerSubtype; -+ GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); -+ -+ -+ if(ICType==ODM_RTL8192D) -+ { -+ // Single PHY -+ if(pDM_Odm->RFType==ODM_2T2R) -+ { -+ (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; -+ (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; -+ -+ } -+ else -+ { -+ (*EDCA_BE_UL) = 0x6ea42b; -+ (*EDCA_BE_DL) = 0x6ea42b; -+ } -+ -+ } -+////============================ -+/// IOT case for MP -+////============================ -+ -+ else -+ { -+ -+ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ -+ if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { -+ (*EDCA_BE_UL) = 0x60a42b; -+ (*EDCA_BE_DL) = 0x60a42b; -+ } -+ else -+ { -+ (*EDCA_BE_UL) = 0x6ea42b; -+ (*EDCA_BE_DL) = 0x6ea42b; -+ } -+ } -+ } -+ -+ if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) -+ { -+ (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; -+ (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; -+ } -+ -+ #if (INTEL_PROXIMITY_SUPPORT == 1) -+ if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) -+ { -+ (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; -+ } -+ else -+ #endif -+ { -+ if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) -+ {// To check whether we shall force turn on TXOP configuration. -+ if(!((*EDCA_BE_UL) & 0xffff0000)) -+ (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. -+ if(!((*EDCA_BE_DL) & 0xffff0000)) -+ (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. -+ } -+ -+ //92D txop can't be set to 0x3e for cisco1250 -+ if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) -+ { -+ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; -+ (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; -+ } -+ //merge from 92s_92c_merge temp brunch v2445 20120215 -+ else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) -+ { -+ (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; -+ } -+ else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) -+ { -+ (*EDCA_BE_DL) = 0xa630; -+ } -+ -+ else if(IOTPeer == HT_IOT_PEER_MARVELL) -+ { -+ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; -+ (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; -+ } -+ else if(IOTPeer == HT_IOT_PEER_ATHEROS && IOTPeerSubType != HT_IOT_PEER_TPLINK_AC1750) -+ { -+ // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. -+ if(WirelessMode==ODM_WM_G) -+ (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; -+ else -+ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; -+ -+ if(ICType == ODM_RTL8821) -+ (*EDCA_BE_DL) = 0x5ea630; -+ -+ } -+ } -+ -+ if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G))) -+ { -+ (*EDCA_BE_DL) = 0x432b; -+ (*EDCA_BE_UL) = 0x432b; -+ } -+ -+ -+ -+ if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE -+ { -+ (*EDCA_BE_UL) = 0x5ea42b; -+ (*EDCA_BE_DL) = 0x5ea42b; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL))); -+ } -+ -+ if((ICType==ODM_RTL8814A) && (IOTPeer == HT_IOT_PEER_REALTEK)) /*8814AU and 8814AR*/ -+ { -+ (*EDCA_BE_UL) = 0x5ea42b; -+ (*EDCA_BE_DL) = 0xa42b; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8814A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL))); -+ } -+ -+ -+ -+ // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22. -+ if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) && -+ (pMgntInfo->dot11CurrentChannelNumber == 6)) -+ { -+ (*EDCA_BE_DL) = 0xa92b; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx, IOTPeer = %d\n",(*EDCA_BE_UL),(*EDCA_BE_DL), IOTPeer)); -+ -+} -+ -+ -+VOID -+odm_EdcaChooseTrafficIdx( -+ IN PVOID pDM_VOID, -+ IN u8Byte cur_tx_bytes, -+ IN u8Byte cur_rx_bytes, -+ IN BOOLEAN bBiasOnRx, -+ OUT BOOLEAN *pbIsCurRDLState -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if(bBiasOnRx) -+ { -+ -+ if(cur_tx_bytes>(cur_rx_bytes*4)) -+ { -+ *pbIsCurRDLState=FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); -+ -+ } -+ else -+ { -+ *pbIsCurRDLState=TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); -+ -+ } -+ } -+ else -+ { -+ if(cur_rx_bytes>(cur_tx_bytes*4)) -+ { -+ *pbIsCurRDLState=TRUE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); -+ -+ } -+ else -+ { -+ *pbIsCurRDLState=FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); -+ } -+ } -+ -+ return ; -+} -+ -+#endif -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++ODM_EdcaTurboInit( ++ IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) ++ PADAPTER Adapter = NULL; ++ HAL_DATA_TYPE *pHalData = NULL; ++ ++ if(pDM_Odm->Adapter==NULL) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); ++ return; ++ } ++ ++ Adapter=pDM_Odm->Adapter; ++ pHalData=GET_HAL_DATA(Adapter); ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; ++ pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; ++ pHalData->bIsAnyNonBEPkts = FALSE; ++ ++#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; ++ pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; ++ Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; ++ ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); ++ ++ ++} // ODM_InitEdcaTurbo ++ ++VOID ++odm_EdcaTurboCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); ++ ++ if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) ++ return; ++ ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++ odm_EdcaTurboCheckMP(pDM_Odm); ++#endif ++ break; ++ ++ case ODM_CE: ++#if(DM_ODM_SUPPORT_TYPE==ODM_CE) ++ odm_EdcaTurboCheckCE(pDM_Odm); ++#endif ++ break; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); ++ ++} // odm_CheckEdcaTurbo ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_CE) ++ ++ ++VOID ++odm_EdcaTurboCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; ++ u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; ++ u32 ICType=pDM_Odm->SupportICType; ++ u32 IOTPeer=0; ++ u8 WirelessMode=0xFF; //invalid value ++ u32 trafficIndex; ++ u32 edca_param; ++ u64 cur_tx_bytes = 0; ++ u64 cur_rx_bytes = 0; ++ u8 bbtchange = _FALSE; ++ u8 bBiasOnRx = _FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct recv_priv *precvpriv = &(Adapter->recvpriv); ++ struct registry_priv *pregpriv = &Adapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pDM_Odm->bLinked != _TRUE) ++ { ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ return; ++ } ++ ++ if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) ++ { ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ return; ++ } ++ ++ if(pDM_Odm->pWirelessMode!=NULL) ++ WirelessMode=*(pDM_Odm->pWirelessMode); ++ ++ IOTPeer = pmlmeinfo->assoc_AP_vendor; ++ ++ if (IOTPeer >= HT_IOT_PEER_MAX) ++ { ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ return; ++ } ++ ++ if( (pDM_Odm->SupportICType == ODM_RTL8192C) || ++ (pDM_Odm->SupportICType == ODM_RTL8723A) || ++ (pDM_Odm->SupportICType == ODM_RTL8188E)) ++ { ++ if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS)) ++ bBiasOnRx = _TRUE; ++ } ++ ++ // Check if the status needs to be changed. ++ if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) ++ { ++ cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes; ++ cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes; ++ ++ //traffic, TX or RX ++ if(bBiasOnRx) ++ { ++ if (cur_tx_bytes > (cur_rx_bytes << 2)) ++ { // Uplink TP is present. ++ trafficIndex = UP_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ } ++ else ++ { ++ if (cur_rx_bytes > (cur_tx_bytes << 2)) ++ { // Downlink TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = UP_LINK; ++ } ++ } ++ ++ //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) ++ { ++ if (ICType == ODM_RTL8192D) { ++ // Single PHY ++ if (pDM_Odm->RFType == ODM_2T2R) { ++ EDCA_BE_UL = 0x60a42b; //0x5ea42b; ++ EDCA_BE_DL = 0x60a42b; //0x5ea42b; ++ } else { ++ EDCA_BE_UL = 0x6ea42b; ++ EDCA_BE_DL = 0x6ea42b; ++ } ++ } ++ else ++ { ++ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { ++ if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { ++ EDCA_BE_UL = 0x60a42b; ++ EDCA_BE_DL = 0x60a42b; ++ } else { ++ EDCA_BE_UL = 0x6ea42b; ++ EDCA_BE_DL = 0x6ea42b; ++ } ++ } ++ } ++ ++ //92D txop can't be set to 0x3e for cisco1250 ++ if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) ++ { ++ EDCA_BE_DL = edca_setting_DL[IOTPeer]; ++ EDCA_BE_UL = edca_setting_UL[IOTPeer]; ++ } ++ //merge from 92s_92c_merge temp brunch v2445 20120215 ++ else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) ++ { ++ EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer]; ++ } ++ else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) ++ { ++ EDCA_BE_DL = 0xa630; ++ } ++ else if(IOTPeer == HT_IOT_PEER_MARVELL) ++ { ++ EDCA_BE_DL = edca_setting_DL[IOTPeer]; ++ EDCA_BE_UL = edca_setting_UL[IOTPeer]; ++ } ++ else if(IOTPeer == HT_IOT_PEER_ATHEROS) ++ { ++ // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. ++ EDCA_BE_DL = edca_setting_DL[IOTPeer]; ++ } ++ ++ if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE ++ { ++ EDCA_BE_UL = 0x5ea42b; ++ EDCA_BE_DL = 0x5ea42b; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL)); ++ } ++ ++ if (trafficIndex == DOWN_LINK) ++ edca_param = EDCA_BE_DL; ++ else ++ edca_param = EDCA_BE_UL; ++ ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); ++ ++ pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; ++ } ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; ++ } ++ else ++ { ++ // ++ // Turn Off EDCA turbo here. ++ // Restore original EDCA according to the declaration of AP. ++ // ++ if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) ++ { ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; ++ } ++ } ++ ++} ++ ++ ++#elif(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++VOID ++odm_EdcaTurboCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); ++ PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; ++ //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn ++ u8Byte Ext_curTxOkCnt = 0; ++ u8Byte Ext_curRxOkCnt = 0; ++ //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. ++ u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; ++ ++ // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. ++ u8Byte curTxOkCnt = 0; ++ u8Byte curRxOkCnt = 0; ++ u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; ++ u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; ++ u4Byte EDCA_BE = 0x5ea42b; ++ u1Byte IOTPeer=0; ++ BOOLEAN *pbIsCurRDLState=NULL; ++ BOOLEAN bLastIsCurRDLState=FALSE; ++ BOOLEAN bBiasOnRx=FALSE; ++ BOOLEAN bEdcaTurboOn=FALSE; ++ u1Byte TxRate = 0xFF; ++ u8Byte value64; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); ++ ++////=============================== ++////list paramter for different platform ++////=============================== ++ bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; ++ pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); ++ ++ //2012/09/14 MH Add ++ if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg) ++ pHalData->bIsAnyNonBEPkts = TRUE; ++ ++ pMgntInfo->NumNonBePkt = 0; ++ ++ // Caculate TX/RX TP: ++ //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; ++ //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; ++ curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt; ++ curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt; ++ pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; ++ pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; ++ ++ if(pExtAdapter == NULL) ++ pExtAdapter = pDefaultAdapter; ++ ++ Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; ++ Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; ++ GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); ++ //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. ++ if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) ++ { ++ curTxOkCnt = Ext_curTxOkCnt ; ++ curRxOkCnt = Ext_curRxOkCnt ; ++ } ++ // ++ IOTPeer=pMgntInfo->IOTPeer; ++ bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; ++ bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts)); ++ ++ ++////=============================== ++////check if edca turbo is disabled ++////=============================== ++ if(odm_IsEdcaTurboDisable(pDM_Odm)) ++ { ++ pHalData->bIsAnyNonBEPkts = FALSE; ++ pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; ++ pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; ++ pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; ++ pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; ++ ++ } ++ ++////=============================== ++////remove iot case out ++////=============================== ++ ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); ++ ++ ++////=============================== ++////Check if the status needs to be changed. ++////=============================== ++ if(bEdcaTurboOn) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); ++ if(bBiasOnRx) ++ odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); ++ else ++ odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); ++ ++//modify by Guo.Mingzhi 2011-12-29 ++ EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; ++ if(IS_HARDWARE_TYPE_8821U(Adapter)) ++ { ++ if(pMgntInfo->RegTxDutyEnable) ++ { ++ //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) ++ if(!pMgntInfo->ForcedDataRate) //auto rate ++ { ++ if(pDM_Odm->TxRate != 0xFF) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ } ++ else //force rate ++ { ++ TxRate = (u1Byte) pMgntInfo->ForcedDataRate; ++ } ++ ++ value64 = (curRxOkCnt<<2); ++ if(curTxOkCnt < value64) //Downlink ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else //Uplink ++ { ++ /*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/ ++ /*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/ ++ if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else ++ { ++ switch (TxRate) ++ { ++ case MGN_VHT1SS_MCS6: ++ case MGN_VHT1SS_MCS5: ++ case MGN_MCS6: ++ case MGN_MCS5: ++ case MGN_48M: ++ case MGN_54M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b); ++ break; ++ case MGN_VHT1SS_MCS4: ++ case MGN_MCS4: ++ case MGN_36M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b); ++ break; ++ case MGN_VHT1SS_MCS3: ++ case MGN_MCS3: ++ case MGN_24M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f); ++ break; ++ case MGN_VHT1SS_MCS2: ++ case MGN_MCS2: ++ case MGN_18M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f); ++ break; ++ case MGN_VHT1SS_MCS1: ++ case MGN_MCS1: ++ case MGN_9M: ++ case MGN_12M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f); ++ break; ++ case MGN_VHT1SS_MCS0: ++ case MGN_MCS0: ++ case MGN_6M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); ++ break; ++ default: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ break; ++ } ++ } ++ } ++ } ++ else ++ { ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ } ++ ++ } ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)){ ++ if(pMgntInfo->RegTxDutyEnable) ++ { ++ //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) ++ // it;s the same issue as 8811AU ++ if(!pMgntInfo->ForcedDataRate) //auto rate ++ { ++ if(pDM_Odm->TxRate != 0xFF) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ } ++ else //force rate ++ { ++ TxRate = (u1Byte) pMgntInfo->ForcedDataRate; ++ } ++ ++ value64 = (curRxOkCnt<<2); ++ if(curTxOkCnt < value64) //Downlink ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else //Uplink ++ { ++ /*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/ ++ /*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/ ++ if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else ++ { ++ switch (TxRate) ++ { ++ case MGN_VHT2SS_MCS9: ++ case MGN_VHT1SS_MCS9: ++ case MGN_VHT1SS_MCS8: ++ case MGN_MCS15: ++ case MGN_MCS7: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f); ++ case MGN_VHT2SS_MCS8: ++ case MGN_VHT1SS_MCS7: ++ case MGN_MCS14: ++ case MGN_MCS6: ++ case MGN_54M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f); ++ case MGN_VHT2SS_MCS7: ++ case MGN_VHT2SS_MCS6: ++ case MGN_VHT1SS_MCS6: ++ case MGN_VHT1SS_MCS5: ++ case MGN_MCS13: ++ case MGN_MCS5: ++ case MGN_48M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630); ++ break; ++ case MGN_VHT2SS_MCS5: ++ case MGN_VHT2SS_MCS4: ++ case MGN_VHT1SS_MCS4: ++ case MGN_VHT1SS_MCS3: ++ case MGN_MCS12: ++ case MGN_MCS4: ++ case MGN_MCS3: ++ case MGN_36M: ++ case MGN_24M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730); ++ break; ++ case MGN_VHT2SS_MCS3: ++ case MGN_VHT2SS_MCS2: ++ case MGN_VHT2SS_MCS1: ++ case MGN_VHT1SS_MCS2: ++ case MGN_VHT1SS_MCS1: ++ case MGN_MCS11: ++ case MGN_MCS10: ++ case MGN_MCS9: ++ case MGN_MCS2: ++ case MGN_MCS1: ++ case MGN_18M: ++ case MGN_12M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830); ++ break; ++ case MGN_VHT2SS_MCS0: ++ case MGN_VHT1SS_MCS0: ++ case MGN_MCS0: ++ case MGN_MCS8: ++ case MGN_9M: ++ case MGN_6M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); ++ break; ++ default: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ break; ++ } ++ } ++ } ++ } ++ else ++ { ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ } ++ } ++ else ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); ++ ++ } ++ else ++ { ++ // Turn Off EDCA turbo here. ++ // Restore original EDCA according to the declaration of AP. ++ if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) ++ { ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); ++ ++ } ++ } ++ ++} ++ ++ ++//check if edca turbo is disabled ++BOOLEAN ++odm_IsEdcaTurboDisable( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ u4Byte IOTPeer=pMgntInfo->IOTPeer; ++ ++ if(pDM_Odm->bBtDisableEdcaTurbo) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); ++ return TRUE; ++ } ++ ++ if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| ++ (pDM_Odm->bWIFITest)|| ++ (IOTPeer>= HT_IOT_PEER_MAX)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); ++ return TRUE; ++ } ++ ++ ++ // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue ++ // 2. User may disable EDCA Turbo mode with OID settings. ++ if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); ++ return TRUE; ++ } ++ ++ return FALSE; ++ ++ ++} ++ ++//add iot case here: for MP/CE ++VOID ++ODM_EdcaParaSelByIot( ++ IN PVOID pDM_VOID, ++ OUT u4Byte *EDCA_BE_UL, ++ OUT u4Byte *EDCA_BE_DL ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u4Byte IOTPeer=0; ++ u4Byte ICType=pDM_Odm->SupportICType; ++ u1Byte WirelessMode=0xFF; //invalid value ++ u4Byte RFType=pDM_Odm->RFType; ++ u4Byte IOTPeerSubType = 0; ++ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; ++ ++ if(pDM_Odm->pWirelessMode!=NULL) ++ WirelessMode=*(pDM_Odm->pWirelessMode); ++ ++/////////////////////////////////////////////////////////// ++////list paramter for different platform ++ ++ IOTPeer=pMgntInfo->IOTPeer; ++ IOTPeerSubType=pMgntInfo->IOTPeerSubtype; ++ GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); ++ ++ ++ if(ICType==ODM_RTL8192D) ++ { ++ // Single PHY ++ if(pDM_Odm->RFType==ODM_2T2R) ++ { ++ (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; ++ (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; ++ ++ } ++ else ++ { ++ (*EDCA_BE_UL) = 0x6ea42b; ++ (*EDCA_BE_DL) = 0x6ea42b; ++ } ++ ++ } ++////============================ ++/// IOT case for MP ++////============================ ++ ++ else ++ { ++ ++ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ ++ if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { ++ (*EDCA_BE_UL) = 0x60a42b; ++ (*EDCA_BE_DL) = 0x60a42b; ++ } ++ else ++ { ++ (*EDCA_BE_UL) = 0x6ea42b; ++ (*EDCA_BE_DL) = 0x6ea42b; ++ } ++ } ++ } ++ ++ if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) ++ { ++ (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; ++ (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; ++ } ++ ++ #if (INTEL_PROXIMITY_SUPPORT == 1) ++ if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) ++ { ++ (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; ++ } ++ else ++ #endif ++ { ++ if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) ++ {// To check whether we shall force turn on TXOP configuration. ++ if(!((*EDCA_BE_UL) & 0xffff0000)) ++ (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. ++ if(!((*EDCA_BE_DL) & 0xffff0000)) ++ (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. ++ } ++ ++ //92D txop can't be set to 0x3e for cisco1250 ++ if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) ++ { ++ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; ++ (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; ++ } ++ //merge from 92s_92c_merge temp brunch v2445 20120215 ++ else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) ++ { ++ (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; ++ } ++ else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) ++ { ++ (*EDCA_BE_DL) = 0xa630; ++ } ++ ++ else if(IOTPeer == HT_IOT_PEER_MARVELL) ++ { ++ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; ++ (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; ++ } ++ else if(IOTPeer == HT_IOT_PEER_ATHEROS && IOTPeerSubType != HT_IOT_PEER_TPLINK_AC1750) ++ { ++ // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. ++ if(WirelessMode==ODM_WM_G) ++ (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; ++ else ++ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; ++ ++ if(ICType == ODM_RTL8821) ++ (*EDCA_BE_DL) = 0x5ea630; ++ ++ } ++ } ++ ++ if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G))) ++ { ++ (*EDCA_BE_DL) = 0x432b; ++ (*EDCA_BE_UL) = 0x432b; ++ } ++ ++ ++ ++ if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE ++ { ++ (*EDCA_BE_UL) = 0x5ea42b; ++ (*EDCA_BE_DL) = 0x5ea42b; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL))); ++ } ++ ++ if((ICType==ODM_RTL8814A) && (IOTPeer == HT_IOT_PEER_REALTEK)) /*8814AU and 8814AR*/ ++ { ++ (*EDCA_BE_UL) = 0x5ea42b; ++ (*EDCA_BE_DL) = 0xa42b; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8814A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL))); ++ } ++ ++ ++ ++ // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22. ++ if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) && ++ (pMgntInfo->dot11CurrentChannelNumber == 6)) ++ { ++ (*EDCA_BE_DL) = 0xa92b; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx, IOTPeer = %d\n",(*EDCA_BE_UL),(*EDCA_BE_DL), IOTPeer)); ++ ++} ++ ++ ++VOID ++odm_EdcaChooseTrafficIdx( ++ IN PVOID pDM_VOID, ++ IN u8Byte cur_tx_bytes, ++ IN u8Byte cur_rx_bytes, ++ IN BOOLEAN bBiasOnRx, ++ OUT BOOLEAN *pbIsCurRDLState ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if(bBiasOnRx) ++ { ++ ++ if(cur_tx_bytes>(cur_rx_bytes*4)) ++ { ++ *pbIsCurRDLState=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); ++ ++ } ++ else ++ { ++ *pbIsCurRDLState=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); ++ ++ } ++ } ++ else ++ { ++ if(cur_rx_bytes>(cur_tx_bytes*4)) ++ { ++ *pbIsCurRDLState=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); ++ ++ } ++ else ++ { ++ *pbIsCurRDLState=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); ++ } ++ } ++ ++ return ; ++} ++ ++#endif ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_edcaturbocheck.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_edcaturbocheck.h new file mode 100644 -index 000000000..d4cd8d841 +index 0000000..982df92 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_edcaturbocheck.h @@ -0,0 +1,100 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMEDCATURBOCHECK_H__ -+#define __PHYDMEDCATURBOCHECK_H__ -+ -+/*#define EDCATURBO_VERSION "2.1"*/ -+#define EDCATURBO_VERSION "2.2" /*2015.01.13*/ -+ -+typedef struct _EDCA_TURBO_ -+{ -+ BOOLEAN bCurrentTurboEDCA; -+ BOOLEAN bIsCurRDLState; -+ -+ #if(DM_ODM_SUPPORT_TYPE == ODM_CE ) -+ u4Byte prv_traffic_idx; // edca turbo -+ #endif -+ -+}EDCA_T,*pEDCA_T; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = -+// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) -+{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322}; -+ -+ -+static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = -+// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) -+{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b}; -+ -+static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = -+// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP -+{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; -+ -+#endif -+ -+ -+ -+VOID -+odm_EdcaTurboCheck( -+ IN PVOID pDM_VOID -+ ); -+VOID -+ODM_EdcaTurboInit( -+ IN PVOID pDM_VOID -+); -+ -+#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) -+VOID -+odm_EdcaTurboCheckMP( -+ IN PVOID pDM_VOID -+ ); -+ -+//check if edca turbo is disabled -+BOOLEAN -+odm_IsEdcaTurboDisable( -+ IN PVOID pDM_VOID -+); -+//choose edca paramter for special IOT case -+VOID -+ODM_EdcaParaSelByIot( -+ IN PVOID pDM_VOID, -+ OUT u4Byte *EDCA_BE_UL, -+ OUT u4Byte *EDCA_BE_DL -+ ); -+//check if it is UL or DL -+VOID -+odm_EdcaChooseTrafficIdx( -+ IN PVOID pDM_VOID, -+ IN u8Byte cur_tx_bytes, -+ IN u8Byte cur_rx_bytes, -+ IN BOOLEAN bBiasOnRx, -+ OUT BOOLEAN *pbIsCurRDLState -+ ); -+ -+#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) -+VOID -+odm_EdcaTurboCheckCE( -+ IN PVOID pDM_VOID -+ ); -+#endif -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMEDCATURBOCHECK_H__ ++#define __PHYDMEDCATURBOCHECK_H__ ++ ++/*#define EDCATURBO_VERSION "2.1"*/ ++#define EDCATURBO_VERSION "2.2" /*2015.01.13*/ ++ ++typedef struct _EDCA_TURBO_ ++{ ++ BOOLEAN bCurrentTurboEDCA; ++ BOOLEAN bIsCurRDLState; ++ ++ #if(DM_ODM_SUPPORT_TYPE == ODM_CE ) ++ u4Byte prv_traffic_idx; // edca turbo ++ #endif ++ ++}EDCA_T,*pEDCA_T; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = ++// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) ++{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322}; ++ ++ ++static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = ++// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) ++{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b}; ++ ++static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = ++// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP ++{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; ++ ++#endif ++ ++ ++ ++VOID ++odm_EdcaTurboCheck( ++ IN PVOID pDM_VOID ++ ); ++VOID ++ODM_EdcaTurboInit( ++ IN PVOID pDM_VOID ++); ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++VOID ++odm_EdcaTurboCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++//check if edca turbo is disabled ++BOOLEAN ++odm_IsEdcaTurboDisable( ++ IN PVOID pDM_VOID ++); ++//choose edca paramter for special IOT case ++VOID ++ODM_EdcaParaSelByIot( ++ IN PVOID pDM_VOID, ++ OUT u4Byte *EDCA_BE_UL, ++ OUT u4Byte *EDCA_BE_DL ++ ); ++//check if it is UL or DL ++VOID ++odm_EdcaChooseTrafficIdx( ++ IN PVOID pDM_VOID, ++ IN u8Byte cur_tx_bytes, ++ IN u8Byte cur_rx_bytes, ++ IN BOOLEAN bBiasOnRx, ++ OUT BOOLEAN *pbIsCurRDLState ++ ); ++ ++#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) ++VOID ++odm_EdcaTurboCheckCE( ++ IN PVOID pDM_VOID ++ ); ++#endif ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_features.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_features.h new file mode 100644 -index 000000000..f31c8161c +index 0000000..78b56be --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_features.h @@ -0,0 +1,115 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDM_FEATURES_H__ -+#define __PHYDM_FEATURES -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /*Antenna Diversity*/ -+ #define CONFIG_PHYDM_ANTENNA_DIVERSITY -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) -+ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ #endif -+ -+ #if (RTL8821A_SUPPORT == 1) -+ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ #endif -+ #endif -+ -+ /*#define CONFIG_PATH_DIVERSITY*/ -+ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+ #define CONFIG_ANT_DETECTION -+ #define CONFIG_RA_DBG_CMD -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ /* [ Configure RA Debug H2C CMD ]*/ -+ #define CONFIG_RA_DBG_CMD -+ -+ /*#define CONFIG_PATH_DIVERSITY*/ -+ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+ #define CONFIG_RA_DYNAMIC_RATE_ID -+ -+ /* [ Configure Antenna Diversity ] */ -+ #if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) -+ #define CONFIG_PHYDM_ANTENNA_DIVERSITY -+ #define ODM_EVM_ENHANCE_ANTDIV -+ -+ /*----------*/ -+ -+ #if (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ #define CONFIG_NO_2G_DIVERSITY -+ #endif -+ -+ #ifdef CONFIG_NO_5G_DIVERSITY_8881A -+ #define CONFIG_NO_5G_DIVERSITY -+ #elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A) -+ #define CONFIG_5G_CGCS_RX_DIVERSITY -+ #elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A) -+ #define CONFIG_5G_CG_TRX_DIVERSITY -+ #elif defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) -+ #define CONFIG_2G5G_CG_TRX_DIVERSITY -+ #endif -+ #if (!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) -+ #define CONFIG_NO_5G_DIVERSITY -+ #endif -+ /*----------*/ -+ #if (defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) -+ #define CONFIG_NOT_SUPPORT_ANTDIV -+ #elif (!defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) -+ #define CONFIG_2G_SUPPORT_ANTDIV -+ #elif (defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) -+ #define CONFIG_5G_SUPPORT_ANTDIV -+ #elif ((!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY)) -+ #define CONFIG_2G5G_SUPPORT_ANTDIV -+ #endif -+ /*----------*/ -+ #endif -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+ /*Antenna Diversity*/ -+ #ifdef CONFIG_ANTENNA_DIVERSITY -+ #define CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) -+ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ #endif -+ -+ #if (RTL8821A_SUPPORT == 1) -+ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ #endif -+ #endif -+ #endif -+ -+ /*#define CONFIG_RA_DBG_CMD*/ -+ /*#define CONFIG_ANT_DETECTION*/ -+ /*#define CONFIG_PATH_DIVERSITY*/ -+ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+ -+#endif -+ -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDM_FEATURES_H__ ++#define __PHYDM_FEATURES ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ /*Antenna Diversity*/ ++ #define CONFIG_PHYDM_ANTENNA_DIVERSITY ++ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY ++ ++ #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) ++ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ #endif ++ ++ #if (RTL8821A_SUPPORT == 1) ++ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ #endif ++ #endif ++ ++ /*#define CONFIG_PATH_DIVERSITY*/ ++ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ ++ #define CONFIG_ANT_DETECTION ++ #define CONFIG_RA_DBG_CMD ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ /* [ Configure RA Debug H2C CMD ]*/ ++ #define CONFIG_RA_DBG_CMD ++ ++ /*#define CONFIG_PATH_DIVERSITY*/ ++ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ ++ #define CONFIG_RA_DYNAMIC_RATE_ID ++ ++ /* [ Configure Antenna Diversity ] */ ++ #if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) ++ #define CONFIG_PHYDM_ANTENNA_DIVERSITY ++ #define ODM_EVM_ENHANCE_ANTDIV ++ ++ /*----------*/ ++ ++ #if (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) ++ #define CONFIG_NO_2G_DIVERSITY ++ #endif ++ ++ #ifdef CONFIG_NO_5G_DIVERSITY_8881A ++ #define CONFIG_NO_5G_DIVERSITY ++ #elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A) ++ #define CONFIG_5G_CGCS_RX_DIVERSITY ++ #elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A) ++ #define CONFIG_5G_CG_TRX_DIVERSITY ++ #elif defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) ++ #define CONFIG_2G5G_CG_TRX_DIVERSITY ++ #endif ++ #if (!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ++ #define CONFIG_NO_5G_DIVERSITY ++ #endif ++ /*----------*/ ++ #if (defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) ++ #define CONFIG_NOT_SUPPORT_ANTDIV ++ #elif (!defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) ++ #define CONFIG_2G_SUPPORT_ANTDIV ++ #elif (defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) ++ #define CONFIG_5G_SUPPORT_ANTDIV ++ #elif ((!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY)) ++ #define CONFIG_2G5G_SUPPORT_ANTDIV ++ #endif ++ /*----------*/ ++ #endif ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++ /*Antenna Diversity*/ ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ #define CONFIG_PHYDM_ANTENNA_DIVERSITY ++ ++ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY ++ ++ #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) ++ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ #endif ++ ++ #if (RTL8821A_SUPPORT == 1) ++ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ #endif ++ #endif ++ #endif ++ ++ /*#define CONFIG_RA_DBG_CMD*/ ++ /*#define CONFIG_ANT_DETECTION*/ ++ /*#define CONFIG_PATH_DIVERSITY*/ ++ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ ++ ++#endif ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_hwconfig.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_hwconfig.c new file mode 100644 -index 000000000..4db241e1c +index 0000000..1d57659 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_hwconfig.c @@ -0,0 +1,3331 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm)) -+#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm)) -+ -+ -+#if (PHYDM_TESTCHIP_SUPPORT == 1) -+#define READ_AND_CONFIG(ic, txt) do {\ -+ if (pDM_Odm->bIsMPChip)\ -+ READ_AND_CONFIG_MP(ic,txt);\ -+ else\ -+ READ_AND_CONFIG_TC(ic,txt);\ -+ } while(0) -+#else -+ #define READ_AND_CONFIG READ_AND_CONFIG_MP -+#endif -+ -+ -+#define READ_FIRMWARE_MP(ic, txt) (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize)) -+#define READ_FIRMWARE_TC(ic, txt) (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize)) -+ -+#if (PHYDM_TESTCHIP_SUPPORT == 1) -+#define READ_FIRMWARE(ic, txt) do {\ -+ if (pDM_Odm->bIsMPChip)\ -+ READ_FIRMWARE_MP(ic,txt);\ -+ else\ -+ READ_FIRMWARE_TC(ic,txt);\ -+ } while(0) -+#else -+#define READ_FIRMWARE READ_FIRMWARE_MP -+#endif -+ -+#define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt()) -+#define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt()) -+#define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt)) -+ -+u1Byte -+odm_QueryRxPwrPercentage( -+ IN s1Byte AntPower -+ ) -+{ -+ if ((AntPower <= -100) || (AntPower >= 20)) -+ { -+ return 0; -+ } -+ else if (AntPower >= 0) -+ { -+ return 100; -+ } -+ else -+ { -+ return (100+AntPower); -+ } -+ -+} -+ -+ -+// -+// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. -+// IF other SW team do not support the feature, remove this section.?? -+// -+s4Byte -+odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( -+ IN OUT PDM_ODM_T pDM_Odm, -+ s4Byte CurrSig -+) -+{ -+ s4Byte RetSig = 0; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) -+ { -+ // Step 1. Scale mapping. -+ // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. -+ // 20100426 Joseph: Modify Signal strength mapping. -+ // This modification makes the RSSI indication similar to Intel solution. -+ // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. -+ if(CurrSig >= 54 && CurrSig <= 100) -+ { -+ RetSig = 100; -+ } -+ else if(CurrSig>=42 && CurrSig <= 53 ) -+ { -+ RetSig = 95; -+ } -+ else if(CurrSig>=36 && CurrSig <= 41 ) -+ { -+ RetSig = 74 + ((CurrSig - 36) *20)/6; -+ } -+ else if(CurrSig>=33 && CurrSig <= 35 ) -+ { -+ RetSig = 65 + ((CurrSig - 33) *8)/2; -+ } -+ else if(CurrSig>=18 && CurrSig <= 32 ) -+ { -+ RetSig = 62 + ((CurrSig - 18) *2)/15; -+ } -+ else if(CurrSig>=15 && CurrSig <= 17 ) -+ { -+ RetSig = 33 + ((CurrSig - 15) *28)/2; -+ } -+ else if(CurrSig>=10 && CurrSig <= 14 ) -+ { -+ RetSig = 39; -+ } -+ else if(CurrSig>=8 && CurrSig <= 9 ) -+ { -+ RetSig = 33; -+ } -+ else if(CurrSig <= 8 ) -+ { -+ RetSig = 19; -+ } -+ } -+#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ return RetSig; -+} -+ -+s4Byte -+odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( -+ IN OUT PDM_ODM_T pDM_Odm, -+ s4Byte CurrSig -+) -+{ -+ s4Byte RetSig = 0; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ //if(pDM_Odm->SupportInterface == ODM_ITRF_USB) -+ { -+ // Netcore request this modification because 2009.04.13 SU driver use it. -+ if(CurrSig >= 31 && CurrSig <= 100) -+ { -+ RetSig = 100; -+ } -+ else if(CurrSig >= 21 && CurrSig <= 30) -+ { -+ RetSig = 90 + ((CurrSig - 20) / 1); -+ } -+ else if(CurrSig >= 11 && CurrSig <= 20) -+ { -+ RetSig = 80 + ((CurrSig - 10) / 1); -+ } -+ else if(CurrSig >= 7 && CurrSig <= 10) -+ { -+ RetSig = 69 + (CurrSig - 7); -+ } -+ else if(CurrSig == 6) -+ { -+ RetSig = 54; -+ } -+ else if(CurrSig == 5) -+ { -+ RetSig = 45; -+ } -+ else if(CurrSig == 4) -+ { -+ RetSig = 36; -+ } -+ else if(CurrSig == 3) -+ { -+ RetSig = 27; -+ } -+ else if(CurrSig == 2) -+ { -+ RetSig = 18; -+ } -+ else if(CurrSig == 1) -+ { -+ RetSig = 9; -+ } -+ else -+ { -+ RetSig = CurrSig; -+ } -+ } -+#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ return RetSig; -+} -+ -+ -+s4Byte -+odm_SignalScaleMapping_92CSeries( -+ IN OUT PDM_ODM_T pDM_Odm, -+ IN s4Byte CurrSig -+) -+{ -+ s4Byte RetSig = 0; -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) -+ { -+ // Step 1. Scale mapping. -+ if(CurrSig >= 61 && CurrSig <= 100) -+ { -+ RetSig = 90 + ((CurrSig - 60) / 4); -+ } -+ else if(CurrSig >= 41 && CurrSig <= 60) -+ { -+ RetSig = 78 + ((CurrSig - 40) / 2); -+ } -+ else if(CurrSig >= 31 && CurrSig <= 40) -+ { -+ RetSig = 66 + (CurrSig - 30); -+ } -+ else if(CurrSig >= 21 && CurrSig <= 30) -+ { -+ RetSig = 54 + (CurrSig - 20); -+ } -+ else if(CurrSig >= 5 && CurrSig <= 20) -+ { -+ RetSig = 42 + (((CurrSig - 5) * 2) / 3); -+ } -+ else if(CurrSig == 4) -+ { -+ RetSig = 36; -+ } -+ else if(CurrSig == 3) -+ { -+ RetSig = 27; -+ } -+ else if(CurrSig == 2) -+ { -+ RetSig = 18; -+ } -+ else if(CurrSig == 1) -+ { -+ RetSig = 9; -+ } -+ else -+ { -+ RetSig = CurrSig; -+ } -+ } -+#endif -+ -+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+ if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) -+ { -+ if(CurrSig >= 51 && CurrSig <= 100) -+ { -+ RetSig = 100; -+ } -+ else if(CurrSig >= 41 && CurrSig <= 50) -+ { -+ RetSig = 80 + ((CurrSig - 40)*2); -+ } -+ else if(CurrSig >= 31 && CurrSig <= 40) -+ { -+ RetSig = 66 + (CurrSig - 30); -+ } -+ else if(CurrSig >= 21 && CurrSig <= 30) -+ { -+ RetSig = 54 + (CurrSig - 20); -+ } -+ else if(CurrSig >= 10 && CurrSig <= 20) -+ { -+ RetSig = 42 + (((CurrSig - 10) * 2) / 3); -+ } -+ else if(CurrSig >= 5 && CurrSig <= 9) -+ { -+ RetSig = 22 + (((CurrSig - 5) * 3) / 2); -+ } -+ else if(CurrSig >= 1 && CurrSig <= 4) -+ { -+ RetSig = 6 + (((CurrSig - 1) * 3) / 2); -+ } -+ else -+ { -+ RetSig = CurrSig; -+ } -+ } -+ -+#endif -+ return RetSig; -+} -+s4Byte -+odm_SignalScaleMapping( -+ IN OUT PDM_ODM_T pDM_Odm, -+ IN s4Byte CurrSig -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if( (pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO -+ (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore -+ { -+ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig); -+ } -+ else if( (pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) && -+ (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo) -+ { -+ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig); -+ }else -+#endif -+ { -+ return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig); -+ } -+ -+} -+ -+ -+ -+static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte isCCKrate, -+ IN u1Byte PWDB_ALL, -+ IN u1Byte path, -+ IN u1Byte RSSI -+) -+{ -+ u1Byte SQ = 0; -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ if(isCCKrate){ -+ -+ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter)) -+ { -+ -+ // -+ // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 -+ // 802.11n, 802.11b, 802.11g only at channel 6 -+ // -+ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) -+ // 50 5 -52 -+ // 55 5 -54 -+ // 60 5 -55 -+ // 65 5 -59 -+ // 70 5 -63 -+ // 75 5 -66 -+ // 80 4 -72 -+ // 85 3 -75 -+ // 90 3 -80 -+ // 95 2 -85 -+ // 100 1 -89 -+ // 102 1 -90 -+ // 104 1 -91 -+ // -+ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n")); -+ -+#if OS_WIN_FROM_WIN8(OS_VERSION) -+ if(PWDB_ALL >= 50) -+ SQ = 100; -+ else if(PWDB_ALL >= 23 && PWDB_ALL < 50) -+ SQ = 80; -+ else if(PWDB_ALL >= 18 && PWDB_ALL < 23) -+ SQ = 60; -+ else if(PWDB_ALL >= 8 && PWDB_ALL < 18) -+ SQ = 40; -+ else -+ SQ = 10; -+#else -+ if(PWDB_ALL >= 34) -+ SQ = 100; -+ else if(PWDB_ALL >= 23 && PWDB_ALL < 34) -+ SQ = 80; -+ else if(PWDB_ALL >= 18 && PWDB_ALL < 23) -+ SQ = 60; -+ else if(PWDB_ALL >= 8 && PWDB_ALL < 18) -+ SQ = 40; -+ else -+ SQ = 10; -+ -+ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 -+ SQ = 20; -+#endif -+ -+ } -+ else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){ -+ -+ // -+ // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 -+ // 802.11n, 802.11b, 802.11g only at channel 6 -+ // -+ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) -+ // 50 5 -49 -+ // 55 5 -49 -+ // 60 5 -50 -+ // 65 5 -51 -+ // 70 5 -52 -+ // 75 5 -54 -+ // 80 5 -55 -+ // 85 4 -60 -+ // 90 3 -63 -+ // 95 3 -65 -+ // 100 2 -67 -+ // 102 2 -67 -+ // 104 1 -70 -+ // -+ -+ if(PWDB_ALL >= 50) -+ SQ = 100; -+ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) -+ SQ = 80; -+ else if(PWDB_ALL >= 31 && PWDB_ALL < 35) -+ SQ = 60; -+ else if(PWDB_ALL >= 22 && PWDB_ALL < 31) -+ SQ = 40; -+ else if(PWDB_ALL >= 18 && PWDB_ALL < 22) -+ SQ = 20; -+ else -+ SQ = 10; -+ } else { -+ if (PWDB_ALL >= 50) -+ SQ = 100; -+ else if (PWDB_ALL >= 35 && PWDB_ALL < 50) -+ SQ = 80; -+ else if (PWDB_ALL >= 22 && PWDB_ALL < 35) -+ SQ = 60; -+ else if (PWDB_ALL >= 18 && PWDB_ALL < 22) -+ SQ = 40; -+ else -+ SQ = 10; -+ } -+ -+ } -+ else -+ {//OFDM rate -+ -+ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || -+ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) -+ { -+ if(RSSI >= 45) -+ SQ = 100; -+ else if(RSSI >= 22 && RSSI < 45) -+ SQ = 80; -+ else if(RSSI >= 18 && RSSI < 22) -+ SQ = 40; -+ else -+ SQ = 20; -+ } else { -+ if(RSSI >= 45) -+ SQ = 100; -+ else if(RSSI >= 22 && RSSI < 45) -+ SQ = 80; -+ else if(RSSI >= 18 && RSSI < 22) -+ SQ = 40; -+ else -+ SQ = 20; -+ } -+ } -+ -+ RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); -+ -+#endif -+ return SQ; -+} -+ -+static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte isCCKrate, -+ IN u1Byte PWDB_ALL, -+ IN u1Byte path, -+ IN u1Byte RSSI -+) -+{ -+ u1Byte SQ = 0; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ if(isCCKrate){ -+ -+ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n")); -+ -+#if OS_WIN_FROM_WIN8(OS_VERSION) -+ -+ if(PWDB_ALL >= 50) -+ SQ = 100; -+ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) -+ SQ = 80; -+ else if(PWDB_ALL >= 30 && PWDB_ALL < 35) -+ SQ = 60; -+ else if(PWDB_ALL >= 25 && PWDB_ALL < 30) -+ SQ = 40; -+ else if(PWDB_ALL >= 20 && PWDB_ALL < 25) -+ SQ = 20; -+ else -+ SQ = 10; -+#else -+ if(PWDB_ALL >= 50) -+ SQ = 100; -+ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) -+ SQ = 80; -+ else if(PWDB_ALL >= 30 && PWDB_ALL < 35) -+ SQ = 60; -+ else if(PWDB_ALL >= 25 && PWDB_ALL < 30) -+ SQ = 40; -+ else if(PWDB_ALL >= 20 && PWDB_ALL < 25) -+ SQ = 20; -+ else -+ SQ = 10; -+ -+ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 -+ SQ = 20; -+#endif -+ -+ -+ -+ } -+ else -+ {//OFDM rate -+ -+ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || -+ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) -+ { -+ if(RSSI >= 45) -+ SQ = 100; -+ else if(RSSI >= 22 && RSSI < 45) -+ SQ = 80; -+ else if(RSSI >= 18 && RSSI < 22) -+ SQ = 40; -+ else -+ SQ = 20; -+ } -+ else -+ { -+ if(RSSI >= 35) -+ SQ = 100; -+ else if(RSSI >= 30 && RSSI < 35) -+ SQ = 80; -+ else if(RSSI >= 25 && RSSI < 30) -+ SQ = 40; -+ else -+ SQ = 20; -+ } -+ } -+ -+ RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); -+ -+#endif -+ return SQ; -+} -+ -+static u1Byte -+odm_EVMdbToPercentage( -+ IN s1Byte Value -+ ) -+{ -+ // -+ // -33dB~0dB to 0%~99% -+ // -+ s1Byte ret_val; -+ -+ ret_val = Value; -+ ret_val /= 2; -+ -+ /*DbgPrint("Value=%d\n", Value);*/ -+ /*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x\n", ret_val, ret_val));*/ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ if (ret_val >= 0) -+ ret_val = 0; -+ -+ if (ret_val <= -40) -+ ret_val = -40; -+ -+ ret_val = 0 - ret_val; -+ ret_val *= 3; -+#else -+ if (ret_val >= 0) -+ ret_val = 0; -+ -+ if (ret_val <= -33) -+ ret_val = -33; -+ -+ ret_val = 0 - ret_val; -+ ret_val *= 3; -+ -+ if (ret_val == 99) -+ ret_val = 100; -+#endif -+ -+ return (u1Byte)ret_val; -+} -+ -+static u1Byte -+odm_EVMdbm_JaguarSeries( -+ IN s1Byte Value -+ ) -+{ -+ s1Byte ret_val = Value; -+ -+ // -33dB~0dB to 33dB ~ 0dB -+ if(ret_val == -128) -+ ret_val = 127; -+ else if (ret_val < 0) -+ ret_val = 0 - ret_val; -+ -+ ret_val = ret_val >> 1; -+ return (u1Byte)ret_val; -+} -+ -+static s2Byte -+odm_Cfo( -+ IN s1Byte Value -+) -+{ -+ s2Byte ret_val; -+ -+ if (Value < 0) -+ { -+ ret_val = 0 - Value; -+ ret_val = (ret_val << 1) + (ret_val >> 1) ; // *2.5~=312.5/2^7 -+ ret_val = ret_val | BIT12; // set bit12 as 1 for negative cfo -+ } -+ else -+ { -+ ret_val = Value; -+ ret_val = (ret_val << 1) + (ret_val>>1) ; // *2.5~=312.5/2^7 -+ } -+ return ret_val; -+} -+ -+#if(ODM_IC_11N_SERIES_SUPPORT == 1) -+ -+s1Byte -+odm_CCKRSSI_8703B( -+ IN u2Byte LNA_idx, -+ IN u1Byte VGA_idx -+ ) -+{ -+ s1Byte rx_pwr_all = 0x00; -+ -+ switch (LNA_idx) { -+ case 0xf: -+ rx_pwr_all = -48 - (2 * VGA_idx); -+ break; -+ case 0xb: -+ rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/ -+ break; -+ case 0xa: -+ rx_pwr_all = -36 - (2 * VGA_idx); -+ break; -+ case 8: -+ rx_pwr_all = -32 - (2 * VGA_idx); -+ break; -+ case 7: -+ rx_pwr_all = -28 - (2 * VGA_idx); /*TBD*/ -+ break; -+ case 4: -+ rx_pwr_all = -16 - (2 * VGA_idx); -+ break; -+ case 0: -+ rx_pwr_all = -2 - (2 * VGA_idx); -+ break; -+ default: -+ /*rx_pwr_all = -53+(2*(31-VGA_idx));*/ -+ /*DbgPrint("wrong LNA index\n");*/ -+ break; -+ -+ } -+ return rx_pwr_all; -+} -+ -+VOID -+odm_RxPhyStatus92CSeries_Parsing( -+ IN OUT PDM_ODM_T pDM_Odm, -+ OUT PODM_PHY_INFO_T pPhyInfo, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+ SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ u1Byte i, Max_spatial_stream; -+ s1Byte rx_pwr[4], rx_pwr_all=0; -+ u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT; -+ u1Byte RSSI, total_rssi=0; -+ BOOLEAN isCCKrate=FALSE; -+ u1Byte rf_rx_num = 0; -+ u1Byte cck_highpwr = 0; -+ u1Byte LNA_idx = 0; -+ u1Byte VGA_idx = 0; -+ PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus; -+ -+ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M) ? TRUE : FALSE; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; -+ -+ -+ if(isCCKrate) -+ { -+ u1Byte report; -+ u1Byte cck_agc_rpt; -+ -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; -+ // -+ // (1)Hardware does not provide RSSI for CCK -+ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) -+ // -+ -+ //if(pHalData->eRFPowerState == eRfOn) -+ cck_highpwr = pDM_Odm->bCckHighPower; -+ //else -+ // cck_highpwr = FALSE; -+ -+ cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ; -+ -+ //2011.11.28 LukeLee: 88E use different LNA & VGA gain table -+ //The RSSI formula should be modified according to the gain table -+ //In 88E, cck_highpwr is always set to 1 -+ if (pDM_Odm->SupportICType & (ODM_RTL8703B)) { -+ -+ #if (RTL8703B_SUPPORT == 1) -+ if (pDM_Odm->cck_agc_report_type == 1) { /*4 bit LNA*/ -+ -+ u1Byte cck_agc_rpt_b = (pPhyStaRpt->cck_rpt_b_ofdm_cfosho_b & BIT7) ? 1 : 0; -+ -+ LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5); -+ VGA_idx = (cck_agc_rpt & 0x1F); -+ -+ rx_pwr_all = odm_CCKRSSI_8703B(LNA_idx, VGA_idx); -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ if (PWDB_ALL > 100) -+ PWDB_ALL = 100; -+ -+ } -+ #endif -+ } else if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F)) /*3 bit LNA*/ -+ { -+ LNA_idx = ((cck_agc_rpt & 0xE0) >>5); -+ VGA_idx = (cck_agc_rpt & 0x1F); -+ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E)) -+ { -+ if(pDM_Odm->cck_agc_report_type == 0 && (pDM_Odm->SupportICType & ODM_RTL8192E) ) -+ { -+ switch(LNA_idx) -+ { -+ case 7: -+ rx_pwr_all = -45 - 2*(VGA_idx); -+ break; -+ case 6: -+ rx_pwr_all = -43 -2*(VGA_idx); -+ break; -+ case 5: -+ rx_pwr_all = -27 - 2*(VGA_idx); -+ break; -+ case 4: -+ rx_pwr_all = -21 - 2*(VGA_idx); -+ break; -+ case 3: -+ rx_pwr_all = -18 - 2*(VGA_idx); -+ break; -+ case 2: -+ rx_pwr_all = -6 - 2*(VGA_idx); -+ break; -+ case 1: -+ rx_pwr_all = 9 -2*(VGA_idx); -+ break; -+ case 0: -+ rx_pwr_all = 15 -2*(VGA_idx); -+ break; -+ default: -+ -+ break; -+ } -+ -+ if(pDM_Odm->BoardType & ODM_BOARD_EXT_LNA) -+ { -+ rx_pwr_all -= pDM_Odm->ExtLNAGain; -+ } -+ -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ } -+ else -+ { -+ switch(LNA_idx) -+ { -+ case 7: -+ if(VGA_idx <= 27) -+ rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2 -+ else -+ rx_pwr_all = -100; -+ break; -+ case 6: -+ rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0 -+ break; -+ case 5: -+ rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5 -+ break; -+ case 4: -+ rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4 -+ break; -+ case 3: -+ //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0 -+ rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0 -+ break; -+ case 2: -+ if(cck_highpwr) -+ rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0 -+ else -+ rx_pwr_all = -6+ 2*(5-VGA_idx); -+ break; -+ case 1: -+ rx_pwr_all = 8-2*VGA_idx; -+ break; -+ case 0: -+ rx_pwr_all = 14-2*VGA_idx; -+ break; -+ default: -+ //DbgPrint("CCK Exception default\n"); -+ break; -+ } -+ rx_pwr_all += 8; -+ -+ //2012.10.08 LukeLee: Modify for 92E CCK RSSI -+ if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ rx_pwr_all += 8; -+ -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ if(cck_highpwr == FALSE) -+ { -+ if(PWDB_ALL >= 80) -+ PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; -+ else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) -+ PWDB_ALL += 3; -+ if(PWDB_ALL>100) -+ PWDB_ALL = 100; -+ } -+ } -+ } -+ else if(pDM_Odm->SupportICType & (ODM_RTL8723B)) -+ { -+#if (RTL8723B_SUPPORT == 1) -+ rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx); -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ if(PWDB_ALL>100) -+ PWDB_ALL = 100; -+#endif -+ } else if (pDM_Odm->SupportICType & (ODM_RTL8188F)) { -+#if (RTL8188F_SUPPORT == 1) -+ rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx); -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ if (PWDB_ALL > 100) -+ PWDB_ALL = 100; -+#endif -+ } -+ } -+ else -+ { -+ if(!cck_highpwr) -+ { -+ report =( cck_agc_rpt & 0xc0 )>>6; -+ switch(report) -+ { -+ // 03312009 modified by cosa -+ // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion -+ // Note: different RF with the different RNA gain. -+ case 0x3: -+ rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); -+ break; -+ case 0x2: -+ rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); -+ break; -+ case 0x1: -+ rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); -+ break; -+ case 0x0: -+ rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); -+ break; -+ } -+ } -+ else -+ { -+ //report = pDrvInfo->cfosho[0] & 0x60; -+ //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60; -+ -+ report = (cck_agc_rpt & 0x60)>>5; -+ switch(report) -+ { -+ case 0x3: -+ rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ; -+ break; -+ case 0x2: -+ rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1); -+ break; -+ case 0x1: -+ rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ; -+ break; -+ case 0x0: -+ rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ; -+ break; -+ } -+ } -+ -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ -+ //Modification for ext-LNA board -+ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) -+ { -+ if((cck_agc_rpt>>7) == 0){ -+ PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6); -+ } -+ else -+ { -+ if(PWDB_ALL > 38) -+ PWDB_ALL -= 16; -+ else -+ PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12); -+ } -+ -+ //CCK modification -+ if(PWDB_ALL > 25 && PWDB_ALL <= 60) -+ PWDB_ALL += 6; -+ //else if (PWDB_ALL <= 25) -+ // PWDB_ALL += 8; -+ } -+ else//Modification for int-LNA board -+ { -+ if(PWDB_ALL > 99) -+ PWDB_ALL -= 8; -+ else if(PWDB_ALL > 50 && PWDB_ALL <= 68) -+ PWDB_ALL += 4; -+ } -+ } -+ -+ pDM_Odm->cck_lna_idx = LNA_idx; -+ pDM_Odm->cck_vga_idx = VGA_idx; -+ pPhyInfo->RxPWDBAll = PWDB_ALL; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; -+ pPhyInfo->RecvSignalPower = rx_pwr_all; -+#endif -+ // -+ // (3) Get Signal Quality (EVM) -+ // -+ //if(pPktinfo->bPacketMatchBSSID) -+ { -+ u1Byte SQ,SQ_rpt; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if((pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){ -+ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0); -+ }else if((pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->PatchID==RT_CID_819x_Acer)) -+ { -+ SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0); -+ }else -+#endif -+ if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){ -+ SQ = 100; -+ } -+ else{ -+ SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; -+ -+ if(SQ_rpt > 64) -+ SQ = 0; -+ else if (SQ_rpt < 20) -+ SQ = 100; -+ else -+ SQ = ((64-SQ_rpt) * 100) / 44; -+ -+ } -+ -+ //DbgPrint("cck SQ = %d\n", SQ); -+ pPhyInfo->SignalQuality = SQ; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; -+ } -+ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) { -+ if (i == 0) -+ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL; -+ else -+ pPhyInfo->RxMIMOSignalStrength[1] = 0; -+ } -+ } -+ else //2 is OFDM rate -+ { -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; -+ -+ // -+ // (1)Get RSSI for HT rate -+ // -+ -+ for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) -+ { -+ // 2008/01/30 MH we will judge RF RX path now. -+ if (pDM_Odm->RFPathRxEnable & BIT(i)) -+ rf_rx_num++; -+ //else -+ //continue; -+ -+ rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110; -+ pDM_Odm->ofdm_agc_idx[i] = (pPhyStaRpt->path_agc[i].gain & 0x3F); -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->RxPwr[i] = rx_pwr[i]; -+ #endif -+ -+ /* Translate DBM to percentage. */ -+ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); -+ total_rssi += RSSI; -+ //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); -+ -+ -+ if(pDM_Odm->SupportICType&ODM_RTL8192C) -+ { -+ //Modification for ext-LNA board -+ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) -+ { -+ if((pPhyStaRpt->path_agc[i].trsw) == 1) -+ RSSI = (RSSI>94)?100:(RSSI +6); -+ else -+ RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16); -+ -+ if((RSSI <= 34) && (RSSI >=4)) -+ RSSI -= 4; -+ } -+ } -+ -+ pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; -+ -+ #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP)) -+ //Get Rx snr value in DB -+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); -+ #endif -+ -+ /* Record Signal Strength for next packet */ -+ //if(pPktinfo->bPacketMatchBSSID) -+ { -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if((pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->PatchID==RT_CID_819x_Lenovo)) -+ { -+ if(i==ODM_RF_PATH_A) -+ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI); -+ -+ } -+ else if((pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->PatchID==RT_CID_819x_Acer)) -+ { -+ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI); -+ } -+#endif -+ } -+ } -+ -+ -+ // -+ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) -+ // -+ rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; -+ -+ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ -+ -+ pPhyInfo->RxPWDBAll = PWDB_ALL; -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; -+ pPhyInfo->RxPower = rx_pwr_all; -+ pPhyInfo->RecvSignalPower = rx_pwr_all; -+ #endif -+ -+ if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){ -+ //do nothing -+ }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){ -+ //do nothing -+ } -+ else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo -+ // -+ // (3)EVM of HT rate -+ // -+ if(pPktinfo->DataRate >=ODM_RATEMCS8 && pPktinfo->DataRate <=ODM_RATEMCS15) -+ Max_spatial_stream = 2; //both spatial stream make sense -+ else -+ Max_spatial_stream = 1; //only spatial stream 1 makes sense -+ -+ for(i=0; i>= 1" because the compilor of free build environment -+ // fill most significant bit to "zero" when doing shifting operation which may change a negative -+ // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. -+ EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm -+ -+ //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); -+ -+ //if(pPktinfo->bPacketMatchBSSID) -+ { -+ if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only -+ { -+ pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff); -+ } -+ pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff); -+ } -+ } -+ } -+ -+ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail); -+ -+ } -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ //UI BSS List signal strength(in percentage), make it good looking, from 0~100. -+ //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). -+ if(isCCKrate) -+ { -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ -+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, TRUE, TRUE); -+#else -+ #ifdef CONFIG_SIGNAL_SCALE_MAPPING -+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/ -+ #else -+ pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL; -+ #endif -+#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+ } -+ else -+ { -+ if (rf_rx_num != 0) -+ { -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ -+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, (total_rssi /= rf_rx_num), TRUE, FALSE); -+ #else -+ #ifdef CONFIG_SIGNAL_SCALE_MAPPING -+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num)); -+ #else -+ total_rssi/=rf_rx_num; -+ pPhyInfo->SignalStrength = (u1Byte)total_rssi; -+ #endif -+ #endif -+ } -+ } -+#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))*/ -+ -+ //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", -+ //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a); -+ -+ //For 92C/92D HW (Hybrid) Antenna Diversity -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ //For 88E HW Antenna Diversity -+ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; -+ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; -+ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; -+#endif -+} -+#endif -+ -+#if ODM_IC_11AC_SERIES_SUPPORT -+ -+VOID -+odm_RxPhyBWJaguarSeries_Parsing( -+ OUT PODM_PHY_INFO_T pPhyInfo, -+ IN PODM_PACKET_INFO_T pPktinfo, -+ IN PPHY_STATUS_RPT_8812_T pPhyStaRpt -+) -+{ -+ -+ if(pPktinfo->DataRate <= ODM_RATE54M) { -+ switch (pPhyStaRpt->r_RFMOD) { -+ case 1: -+ if (pPhyStaRpt->sub_chnl == 0) -+ pPhyInfo->BandWidth = 1; -+ else -+ pPhyInfo->BandWidth = 0; -+ break; -+ -+ case 2: -+ if (pPhyStaRpt->sub_chnl == 0) -+ pPhyInfo->BandWidth = 2; -+ else if (pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10) -+ pPhyInfo->BandWidth = 1; -+ else -+ pPhyInfo->BandWidth = 0; -+ break; -+ -+ default: -+ case 0: -+ pPhyInfo->BandWidth = 0; -+ break; -+ } -+ } -+ -+} -+ -+VOID -+odm_RxPhyStatusJaguarSeries_Parsing( -+ IN OUT PDM_ODM_T pDM_Odm, -+ OUT PODM_PHY_INFO_T pPhyInfo, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo -+) -+{ -+ u1Byte i, Max_spatial_stream; -+ s1Byte rx_pwr[4], rx_pwr_all = 0; -+ u1Byte EVM, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT; -+ u1Byte RSSI, avg_rssi = 0, best_rssi = 0, second_rssi = 0; -+ u1Byte isCCKrate = 0; -+ u1Byte rf_rx_num = 0; -+ u1Byte cck_highpwr = 0; -+ u1Byte LNA_idx, VGA_idx; -+ PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus; -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ -+ odm_RxPhyBWJaguarSeries_Parsing(pPhyInfo, pPktinfo, pPhyStaRpt); -+ -+ if (pPktinfo->DataRate <= ODM_RATE11M) -+ isCCKrate = TRUE; -+ else -+ isCCKrate = FALSE; -+ -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_C] = -1; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_D] = -1; -+ -+ if (isCCKrate) { -+ u1Byte cck_agc_rpt; -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; -+ -+ /*(1)Hardware does not provide RSSI for CCK*/ -+ /*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ -+ -+ /*if(pHalData->eRFPowerState == eRfOn)*/ -+ cck_highpwr = pDM_Odm->bCckHighPower; -+ /*else*/ -+ /*cck_highpwr = FALSE;*/ -+ -+ cck_agc_rpt = pPhyStaRpt->cfosho[0] ; -+ LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); -+ VGA_idx = (cck_agc_rpt & 0x1F); -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8812) { -+ switch (LNA_idx) { -+ case 7: -+ if (VGA_idx <= 27) -+ rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/ -+ else -+ rx_pwr_all = -100; -+ break; -+ case 6: -+ rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/ -+ break; -+ case 5: -+ rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/ -+ break; -+ case 4: -+ rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/ -+ break; -+ case 3: -+ /*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/ -+ rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/ -+ break; -+ case 2: -+ if (cck_highpwr) -+ rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/ -+ else -+ rx_pwr_all = -6 + 2 * (5 - VGA_idx); -+ break; -+ case 1: -+ rx_pwr_all = 8 - 2 * VGA_idx; -+ break; -+ case 0: -+ rx_pwr_all = 14 - 2 * VGA_idx; -+ break; -+ default: -+ /*DbgPrint("CCK Exception default\n");*/ -+ break; -+ } -+ rx_pwr_all += 6; -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ -+ if (cck_highpwr == FALSE) { -+ if (PWDB_ALL >= 80) -+ PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80; -+ else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) -+ PWDB_ALL += 3; -+ if (PWDB_ALL > 100) -+ PWDB_ALL = 100; -+ } -+ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) { -+ s1Byte Pout = -6; -+ -+ switch (LNA_idx) { -+ case 5: -+ rx_pwr_all = Pout - 32 - (2 * VGA_idx); -+ break; -+ case 4: -+ rx_pwr_all = Pout - 24 - (2 * VGA_idx); -+ break; -+ case 2: -+ rx_pwr_all = Pout - 11 - (2 * VGA_idx); -+ break; -+ case 1: -+ rx_pwr_all = Pout + 5 - (2 * VGA_idx); -+ break; -+ case 0: -+ rx_pwr_all = Pout + 21 - (2 * VGA_idx); -+ break; -+ } -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ } else if (pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8822B) { -+ s1Byte Pout = -6; -+ -+ switch (LNA_idx) { -+ /*CCK only use LNA: 2, 3, 5, 7*/ -+ case 7: -+ rx_pwr_all = Pout - 32 - (2 * VGA_idx); -+ break; -+ case 5: -+ rx_pwr_all = Pout - 22 - (2 * VGA_idx); -+ break; -+ case 3: -+ rx_pwr_all = Pout - 2 - (2 * VGA_idx); -+ break; -+ case 2: -+ rx_pwr_all = Pout + 5 - (2 * VGA_idx); -+ break; -+ /*case 6:*/ -+ /*rx_pwr_all = Pout -26 - (2*VGA_idx);*/ -+ /*break;*/ -+ /*case 4:*/ -+ /*rx_pwr_all = Pout - 8 - (2*VGA_idx);*/ -+ /*break;*/ -+ /*case 1:*/ -+ /*rx_pwr_all = Pout + 21 - (2*VGA_idx);*/ -+ /*break;*/ -+ /*case 0:*/ -+ /*rx_pwr_all = Pout + 10 - (2*VGA_idx);*/ -+/* // break;*/ -+ default: -+/* //DbgPrint("CCK Exception default\n");*/ -+ break; -+ } -+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ } -+ -+ pPhyInfo->RxPWDBAll = PWDB_ALL; -+/* //if(pPktinfo->StationID == 0)*/ -+/* //{*/ -+/* // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n",*/ -+/* // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);*/ -+/* //}*/ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; -+ pPhyInfo->RecvSignalPower = rx_pwr_all; -+#endif -+ /*(3) Get Signal Quality (EVM)*/ -+ if (pPktinfo->bPacketMatchBSSID) { -+ u1Byte SQ, SQ_rpt; -+ -+ if ((pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) { -+ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, 0, 0); -+ } else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) { -+ SQ = 100; -+ } else { -+ SQ_rpt = pPhyStaRpt->pwdb_all; -+ -+ if (SQ_rpt > 64) -+ SQ = 0; -+ else if (SQ_rpt < 20) -+ SQ = 100; -+ else -+ SQ = ((64 - SQ_rpt) * 100) / 44; -+ } -+ -+/* //DbgPrint("cck SQ = %d\n", SQ);*/ -+ pPhyInfo->SignalQuality = SQ; -+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; -+ } -+ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { -+ if (i == 0) -+ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL; -+ else -+ pPhyInfo->RxMIMOSignalStrength[i] = 0; -+ } -+ } else { -+ /*is OFDM rate*/ -+ pDM_FatTable->hw_antsw_occur = pPhyStaRpt->hw_antsw_occur; -+ -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; -+ -+ /*(1)Get RSSI for OFDM rate*/ -+ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { -+ /*2008/01/30 MH we will judge RF RX path now.*/ -+/* //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);*/ -+ if (pDM_Odm->RFPathRxEnable & BIT(i)) -+ rf_rx_num++; -+/* //else*/ -+/* //continue;*/ -+ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ -+/* //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))*/ -+ if (i < ODM_RF_PATH_C) -+ rx_pwr[i] = (pPhyStaRpt->gain_trsw[i] & 0x7F) - 110; -+ else -+ rx_pwr[i] = (pPhyStaRpt->gain_trsw_cd[i - 2] & 0x7F) - 110; -+/* //else*/ -+ /*rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; OLD FORMULA*/ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->RxPwr[i] = rx_pwr[i]; -+#endif -+ -+ /* Translate DBM to percentage. */ -+ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); -+ -+ /*total_rssi += RSSI;*/ -+ /*Get the best two RSSI*/ -+ if (RSSI > best_rssi && RSSI > second_rssi) { -+ second_rssi = best_rssi; -+ best_rssi = RSSI; -+ } else if (RSSI > second_rssi && RSSI <= best_rssi) -+ second_rssi = RSSI; -+ -+ /*RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));*/ -+ -+ pPhyInfo->RxMIMOSignalStrength[i] = (u1Byte) RSSI; -+ -+ -+ /*Get Rx snr value in DB*/ -+ if (i < ODM_RF_PATH_C) -+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i] / 2; -+ else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) -+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->csi_current[i - 2] / 2; -+ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ /*(2) CFO_short & CFO_tail*/ -+ if (i < ODM_RF_PATH_C) { -+ pPhyInfo->Cfo_short[i] = odm_Cfo((pPhyStaRpt->cfosho[i])); -+ pPhyInfo->Cfo_tail[i] = odm_Cfo((pPhyStaRpt->cfotail[i])); -+ } -+#endif -+ /* Record Signal Strength for next packet */ -+ if (pPktinfo->bPacketMatchBSSID) { -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if ((pDM_Odm->SupportPlatform == ODM_WIN) && -+ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) { -+ if (i == ODM_RF_PATH_A) -+ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, i, RSSI); -+ -+ } -+#endif -+ } -+ } -+ -+ /*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ -+ -+ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ -+ if ((pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!pDM_Odm->bIsMPChip)) -+ rx_pwr_all = (pPhyStaRpt->pwdb_all & 0x7f) - 110; -+ else -+ rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1) & 0x7f) - 110; /*OLD FORMULA*/ -+ -+ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); -+ -+ pPhyInfo->RxPWDBAll = PWDB_ALL; -+ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));*/ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; -+ pPhyInfo->RxPower = rx_pwr_all; -+ pPhyInfo->RecvSignalPower = rx_pwr_all; -+#endif -+ -+ if ((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID == 19)) { -+ /*do nothing*/ -+ } else { -+ /*pMgntInfo->CustomerID != RT_CID_819x_Lenovo*/ -+ -+ /*(4)EVM of OFDM rate*/ -+ -+ if ((pPktinfo->DataRate >= ODM_RATEMCS8) && -+ (pPktinfo->DataRate <= ODM_RATEMCS15)) -+ Max_spatial_stream = 2; -+ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS2MCS0) && -+ (pPktinfo->DataRate <= ODM_RATEVHTSS2MCS9)) -+ Max_spatial_stream = 2; -+ else if ((pPktinfo->DataRate >= ODM_RATEMCS16) && -+ (pPktinfo->DataRate <= ODM_RATEMCS23)) -+ Max_spatial_stream = 3; -+ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS3MCS0) && -+ (pPktinfo->DataRate <= ODM_RATEVHTSS3MCS9)) -+ Max_spatial_stream = 3; -+ else -+ Max_spatial_stream = 1; -+ -+ if (pPktinfo->bPacketMatchBSSID) { -+ /*DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);*/ -+ -+ for (i = 0; i < Max_spatial_stream; i++) { -+ /*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/ -+ /*fill most significant bit to "zero" when doing shifting operation which may change a negative*/ -+ /*value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.*/ -+ -+ if (pPktinfo->DataRate >= ODM_RATE6M && pPktinfo->DataRate <= ODM_RATE54M) { -+ if (i == ODM_RF_PATH_A) { -+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->sigevm)); /*dbm*/ -+ EVM += 20; -+ if (EVM > 100) -+ EVM = 100; -+ } -+ } else { -+ if (i < ODM_RF_PATH_C) { -+ if (pPhyStaRpt->rxevm[i] == -128) -+ pPhyStaRpt->rxevm[i] = -25; -+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm[i])); /*dbm*/ -+ } else { -+ if (pPhyStaRpt->rxevm_cd[i - 2] == -128){ -+ pPhyStaRpt->rxevm_cd[i - 2] = -25; -+ } -+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm_cd[i - 2])); /*dbm*/ -+ } -+ } -+ -+ if (i < ODM_RF_PATH_C) -+ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]); -+ else -+ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm_cd[i - 2]); -+ /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/ -+ /*pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));*/ -+ -+ { -+ if (i == ODM_RF_PATH_A) { -+ /*Fill value in RFD, Get the first spatial stream only*/ -+ pPhyInfo->SignalQuality = EVM; -+ } -+ pPhyInfo->RxMIMOSignalQuality[i] = EVM; -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm; -+#endif -+ } -+ } -+ } -+ } -+ -+ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail); -+ -+ } -+/* //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);*/ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ /*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/ -+ /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/ -+ if (isCCKrate) { -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ -+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, FALSE, TRUE); -+#else -+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/ -+#endif -+ } else { -+ if (rf_rx_num != 0) { -+ /* 2015/01 Sean, use the best two RSSI only, suggested by Ynlin and ChenYu.*/ -+ if (rf_rx_num == 1) -+ avg_rssi = best_rssi; -+ else -+ avg_rssi = (best_rssi + second_rssi)/2; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ -+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, avg_rssi, FALSE, FALSE); -+#else -+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, avg_rssi)); -+#endif -+ } -+ } -+#endif -+ pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll; -+ -+ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta; -+ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb; -+ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antidx_antc; -+ pDM_Odm->DM_FatTable.antsel_rx_keep_3 = pPhyStaRpt->antidx_antd; -+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antidx_anta = ((%d)), MatchBSSID = ((%d))\n", pPktinfo->StationID, pPhyStaRpt->antidx_anta, pPktinfo->bPacketMatchBSSID));*/ -+ -+ -+/* DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d\n",*/ -+/* pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb);*/ -+/* DbgPrint("----------------------------\n");*/ -+/* DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);*/ -+/* DbgPrint("pPhyStaRpt->r_RFMOD = %d\n", pPhyStaRpt->r_RFMOD);*/ -+/* DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x\n",*/ -+/* pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1]);*/ -+/* DbgPrint("pPhyStaRpt->gain_trsw[2]=0x%x, pPhyStaRpt->gain_trsw[3]=0x%x\n",*/ -+/* pPhyStaRpt->gain_trsw_cd[0],pPhyStaRpt->gain_trsw_cd[1]);*/ -+/* DbgPrint("pPhyStaRpt->pwdb_all = 0x%x, pPhyInfo->RxPWDBAll = %d\n", pPhyStaRpt->pwdb_all, pPhyInfo->RxPWDBAll);*/ -+/* DbgPrint("pPhyStaRpt->cfotail[i] = 0x%x, pPhyStaRpt->CFO_tail[i] = 0x%x\n", pPhyStaRpt->cfotail[0], pPhyStaRpt->cfotail[1]);*/ -+/* DbgPrint("pPhyStaRpt->rxevm[0] = %d, pPhyStaRpt->rxevm[1] = %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1]);*/ -+/* DbgPrint("pPhyStaRpt->rxevm[2] = %d, pPhyStaRpt->rxevm[3] = %d\n", pPhyStaRpt->rxevm_cd[0], pPhyStaRpt->rxevm_cd[1]);*/ -+/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",*/ -+/* pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);*/ -+/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[2]=%d, pPhyInfo->RxMIMOSignalStrength[3]=%d\n",*/ -+/* pPhyInfo->RxMIMOSignalStrength[2], pPhyInfo->RxMIMOSignalStrength[3]);*/ -+/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[0]=%d, pPhyInfo->RxMIMOSignalQuality[1]=%d\n",*/ -+/* pPhyInfo->RxMIMOSignalQuality[0], pPhyInfo->RxMIMOSignalQuality[1]);*/ -+/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[2]=%d, pPhyInfo->RxMIMOSignalQuality[3]=%d\n",*/ -+/* pPhyInfo->RxMIMOSignalQuality[2], pPhyInfo->RxMIMOSignalQuality[3]);*/ -+ -+} -+ -+#endif -+ -+VOID -+odm_Init_RSSIForDM( -+ IN OUT PDM_ODM_T pDM_Odm -+ ) -+{ -+ -+} -+ -+VOID -+odm_Process_RSSIForDM( -+ IN OUT PDM_ODM_T pDM_Odm, -+ IN PODM_PHY_INFO_T pPhyInfo, -+ IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+ -+ s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave; -+ u1Byte i, isCCKrate=0; -+ u1Byte RSSI_max, RSSI_min; -+ u4Byte OFDM_pkt=0; -+ u4Byte Weighting=0; -+ PSTA_INFO_T pEntry; -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; -+ #endif -+ -+ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM) -+ return; -+ -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(pDM_Odm, pPhyInfo, pPktinfo); -+ #endif -+ -+ // -+ // 2012/05/30 MH/Luke.Lee Add some description -+ // In windows driver: AP/IBSS mode STA -+ // -+ //if (pDM_Odm->SupportPlatform == ODM_WIN) -+ //{ -+ // pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]]; -+ //} -+ //else -+ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; -+ -+ if(!IS_STA_VALID(pEntry) ) -+ { -+ return; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ if ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) && -+ (pDM_FatTable->enable_ctrl_frame_antdiv) -+ ) -+ { -+ if (pPktinfo->bPacketMatchBSSID) -+ pDM_Odm->data_frame_num++; -+ -+ if ((pDM_FatTable->use_ctrl_frame_antdiv)) { -+ if (!pPktinfo->bToSelf)/*data frame + CTRL frame*/ -+ return; -+ } else { -+ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ -+ return; -+ } -+ } else -+#endif -+ { -+ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ -+ return; -+ } -+ -+ if(pPktinfo->bPacketBeacon) -+ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; -+ -+ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M )?TRUE :FALSE; -+ pDM_Odm->RxRate = pPktinfo->DataRate; -+ -+ //--------------Statistic for antenna/path diversity------------------ -+ if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) -+ { -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo); -+ #endif -+ } -+ #if(defined(CONFIG_PATH_DIVERSITY)) -+ else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV) -+ { -+ phydm_process_rssi_for_path_div(pDM_Odm,pPhyInfo,pPktinfo); -+ } -+ #endif -+ //-----------------Smart Antenna Debug Message------------------// -+ -+ UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; -+ UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; -+ UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; -+ -+ if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) -+ { -+ -+ if(!isCCKrate)//ofdm rate -+ { -+#if (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) { -+ u1Byte RX_count = 0; -+ u4Byte RSSI_linear = 0; -+ -+ if (pDM_Odm->RXAntStatus & ODM_RF_A) { -+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; -+ RX_count++; -+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]); -+ } else -+ pDM_Odm->RSSI_A = 0; -+ -+ if (pDM_Odm->RXAntStatus & ODM_RF_B) { -+ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; -+ RX_count++; -+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]); -+ } else -+ pDM_Odm->RSSI_B = 0; -+ -+ if (pDM_Odm->RXAntStatus & ODM_RF_C) { -+ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]; -+ RX_count++; -+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]); -+ } else -+ pDM_Odm->RSSI_C = 0; -+ -+ if (pDM_Odm->RXAntStatus & ODM_RF_D) { -+ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]; -+ RX_count++; -+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]); -+ } else -+ pDM_Odm->RSSI_D = 0; -+ -+ /* Calculate average RSSI */ -+ switch (RX_count) { -+ case 2: -+ RSSI_linear = (RSSI_linear >> 1); -+ break; -+ case 3: -+ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */ -+ break; -+ case 4: -+ RSSI_linear = (RSSI_linear >> 2); -+ break; -+ } -+ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear); -+ } else -+#endif -+ { -+ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) { -+ RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; -+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; -+ pDM_Odm->RSSI_B = 0; -+ } else { -+ /*DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d\n",*/ -+ /*pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);*/ -+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; -+ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; -+ -+ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) { -+ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; -+ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; -+ } else { -+ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; -+ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; -+ } -+ if ((RSSI_max - RSSI_min) < 3) -+ RSSI_Ave = RSSI_max; -+ else if ((RSSI_max - RSSI_min) < 6) -+ RSSI_Ave = RSSI_max - 1; -+ else if ((RSSI_max - RSSI_min) < 10) -+ RSSI_Ave = RSSI_max - 2; -+ else -+ RSSI_Ave = RSSI_max - 3; -+ } -+ } -+ -+ //1 Process OFDM RSSI -+ if(UndecoratedSmoothedOFDM <= 0) // initialize -+ { -+ UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; -+ } -+ else -+ { -+ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM) -+ { -+ UndecoratedSmoothedOFDM = -+ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + -+ (RSSI_Ave)) /(Rx_Smooth_Factor); -+ UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; -+ } -+ else -+ { -+ UndecoratedSmoothedOFDM = -+ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + -+ (RSSI_Ave)) /(Rx_Smooth_Factor); -+ } -+ } -+ if (pEntry->rssi_stat.OFDM_pkt != 64) { -+ i = 63; -+ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)(((pEntry->rssi_stat.PacketMap>>i)&BIT0)-1); -+ } -+ pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; -+ -+ } -+ else -+ { -+ RSSI_Ave = pPhyInfo->RxPWDBAll; -+ pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll; -+ pDM_Odm->RSSI_B = 0xFF; -+ pDM_Odm->RSSI_C = 0xFF; -+ pDM_Odm->RSSI_D = 0xFF; -+ -+ //1 Process CCK RSSI -+ if(UndecoratedSmoothedCCK <= 0) // initialize -+ { -+ UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; -+ } -+ else -+ { -+ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK) -+ { -+ UndecoratedSmoothedCCK = -+ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + -+ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); -+ UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; -+ } -+ else -+ { -+ UndecoratedSmoothedCCK = -+ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + -+ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); -+ } -+ } -+ i = 63; -+ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)((pEntry->rssi_stat.PacketMap>>i)&BIT0); -+ pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; -+ } -+ -+ //if(pEntry) -+ { -+ //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI -+ if (pEntry->rssi_stat.OFDM_pkt == 64) { /* speed up when all packets are OFDM*/ -+ UndecoratedSmoothedPWDB = UndecoratedSmoothedOFDM; -+ } else { -+ if (pEntry->rssi_stat.ValidBit < 64) -+ pEntry->rssi_stat.ValidBit++; -+ -+ if (pEntry->rssi_stat.ValidBit == 64) { -+ Weighting = ((pEntry->rssi_stat.OFDM_pkt<<4) > 64)?64:(pEntry->rssi_stat.OFDM_pkt<<4); -+ UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; -+ } else { -+ if (pEntry->rssi_stat.ValidBit != 0) -+ UndecoratedSmoothedPWDB = (pEntry->rssi_stat.OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-pEntry->rssi_stat.OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit; -+ else -+ UndecoratedSmoothedPWDB = 0; -+ } -+ } -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1) -+ phydm_ra_rssi_rpt_wk(pDM_Odm); -+ #endif -+ pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; -+ pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; -+ pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; -+ -+ //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting); -+ //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", -+ // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); -+ -+ } -+ -+ } -+} -+ -+ -+#if(ODM_IC_11N_SERIES_SUPPORT ==1) -+// -+// Endianness before calling this API -+// -+VOID -+ODM_PhyStatusQuery_92CSeries( -+ IN OUT PDM_ODM_T pDM_Odm, -+ OUT PODM_PHY_INFO_T pPhyInfo, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+ odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); -+ odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo); -+} -+#endif -+ -+ -+// -+// Endianness before calling this API -+// -+#if ODM_IC_11AC_SERIES_SUPPORT -+ -+VOID -+ODM_PhyStatusQuery_JaguarSeries( -+ IN OUT PDM_ODM_T pDM_Odm, -+ OUT PODM_PHY_INFO_T pPhyInfo, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+ odm_RxPhyStatusJaguarSeries_Parsing( -+ pDM_Odm, -+ pPhyInfo, -+ pPhyStatus, -+ pPktinfo); -+ -+ odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ //phydm_sbd_check(pDM_Odm); -+#endif -+} -+#endif -+ -+VOID -+ODM_PhyStatusQuery( -+ IN OUT PDM_ODM_T pDM_Odm, -+ OUT PODM_PHY_INFO_T pPhyInfo, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+#if (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType & ODM_RTL8822B) { -+ phydm_RxPhyStatusJaguarSeries2(pDM_Odm, pPhyStatus, pPktinfo, pPhyInfo); -+ return; -+ } -+#endif -+ -+#if ODM_IC_11AC_SERIES_SUPPORT -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ ODM_PhyStatusQuery_JaguarSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); -+#endif -+ -+#if ODM_IC_11N_SERIES_SUPPORT -+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES ) -+ ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); -+#endif -+} -+ -+// For future use. -+VOID ODM_MacStatusQuery( -+ IN OUT PDM_ODM_T pDM_Odm, -+ IN pu1Byte pMacStatus, -+ IN u1Byte MacID, -+ IN BOOLEAN bPacketMatchBSSID, -+ IN BOOLEAN bPacketToSelf, -+ IN BOOLEAN bPacketBeacon -+ ) -+{ -+ // 2011/10/19 Driver team will handle in the future. -+ -+} -+ -+ -+// -+// If you want to add a new IC, Please follow below template and generate a new one. -+// -+// -+ -+HAL_STATUS -+ODM_ConfigRFWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_RF_Config_Type ConfigType, -+ IN ODM_RF_RADIO_PATH_E eRFPath -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, -+ ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, -+ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", -+ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); -+ -+//1 AP doesn't use PHYDM power tracking table in these ICs -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8723A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8723A) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_MP(8723A,_RadioA); -+ } -+ } -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A){ -+ READ_AND_CONFIG_MP(8812A,_RadioA); -+ } -+ else if(eRFPath == ODM_RF_PATH_B){ -+ READ_AND_CONFIG_MP(8812A,_RadioB); -+ } -+ } -+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) { -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ if ((pHalData->EEPROMSVID == 0x17AA && pHalData->EEPROMSMID == 0xA811) || -+ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0xA812) || -+ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0x8812)) -+ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT_HM812A03); -+ else -+ #endif -+ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT); -+ } -+ } -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A){ -+ READ_AND_CONFIG_MP(8821A,_RadioA); -+ } -+ } -+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { -+ if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G) -+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM); -+ else -+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA); -+ } -+ else { -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (pMgntInfo->CustomerID == RT_CID_8821AE_ASUS_MB) -+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_8mm); -+ else if (pMgntInfo->CustomerID == RT_CID_ASUS_NB) -+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_5mm); -+ else -+ #endif -+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n")); -+ } -+#endif -+ -+#if (RTL8723B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) -+ READ_AND_CONFIG_MP(8723B,_RadioA); -+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8723B,_TXPWR_LMT); -+ } -+#endif -+ -+#if (RTL8192E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_MP(8192E,_RadioA); -+ else if(eRFPath == ODM_RF_PATH_B) -+ READ_AND_CONFIG_MP(8192E,_RadioB); -+ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) { -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ if ((pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8192) || -+ (pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8193)) -+ READ_AND_CONFIG_MP(8192E, _TXPWR_LMT_8192E_SAR_5mm); -+ else -+#endif -+ READ_AND_CONFIG_MP(8192E,_TXPWR_LMT); -+ } -+ } -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+//1 All platforms support -+#if (RTL8188E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_MP(8188E,_RadioA); -+ } -+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8188E,_TXPWR_LMT); -+ } -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_MP(8814A,_RadioA); -+ else if(eRFPath == ODM_RF_PATH_B) -+ READ_AND_CONFIG_MP(8814A,_RadioB); -+ else if(eRFPath == ODM_RF_PATH_C) -+ READ_AND_CONFIG_MP(8814A,_RadioC); -+ else if(eRFPath == ODM_RF_PATH_D) -+ READ_AND_CONFIG_MP(8814A,_RadioD); -+ } -+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8814A,_TXPWR_LMT); -+ } -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8703B) { -+ if (ConfigType == CONFIG_RF_RADIO) { -+ if (eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_MP(8703B, _RadioA); -+ } -+ } -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) { -+ if (ConfigType == CONFIG_RF_RADIO) { -+ if (eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_MP(8188F, _RadioA); -+ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8188F, _TXPWR_LMT); -+ } -+#endif -+ -+//1 New ICs (WIN only) -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (RTL8821B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821B) -+ { -+ if (ConfigType == CONFIG_RF_RADIO) { -+ if (eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG(8821B, _RadioA); -+ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG(8821B, _TXPWR_LMT); -+ } -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8822B) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_MP(8822B, _RadioA); -+ else if(eRFPath == ODM_RF_PATH_B) -+ READ_AND_CONFIG_MP(8822B, _RadioB); -+ } -+ } -+#endif -+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ { -+ if(ConfigType == CONFIG_RF_RADIO) { -+ if(eRFPath == ODM_RF_PATH_A) -+ READ_AND_CONFIG_TC(8188F,_RadioA); -+ } -+ } -+#endif -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ return HAL_STATUS_SUCCESS; -+} -+ -+HAL_STATUS -+ODM_ConfigRFWithTxPwrTrackHeaderFile( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, -+ ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, -+ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", -+ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); -+ -+ -+//1 AP doesn't use PHYDM power tracking table in these ICs -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if RTL8821A_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_SDIO); -+ } -+#endif -+#if RTL8812A_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_PCIE); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { -+ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) -+ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3); -+ else -+ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_USB); -+ } -+ -+ } -+#endif -+#if RTL8192E_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_SDIO); -+ } -+#endif -+#if RTL8723B_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_PCIE); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_USB); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_SDIO); -+ } -+#endif -+#if RTL8188E_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_SDIO); -+ } -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+//1 All platforms support -+#if RTL8814A_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ if(pDM_Odm->RFEType == 0) -+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type0); -+ else if(pDM_Odm->RFEType == 2) -+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type2); -+ else if (pDM_Odm->RFEType == 5) -+ READ_AND_CONFIG_MP(8814A, _TxPowerTrack_Type5); -+ else -+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack); -+ } -+#endif -+#if RTL8703B_SUPPORT -+ if (pDM_Odm->SupportICType == ODM_RTL8703B) { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_USB); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_SDIO); -+ } -+#endif -+ -+#if RTL8188F_SUPPORT -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) { -+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_USB); -+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_SDIO); -+ } -+#endif -+ -+//1 New ICs (WIN only) -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if RTL8821B_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8821B) -+ READ_AND_CONFIG(8821B,_TxPowerTrack); -+#endif -+#if RTL8822B_SUPPORT -+/* if(pDM_Odm->SupportICType == ODM_RTL8822B) -+ READ_AND_CONFIG_MP(8822B, _TxPowerTrack); */ -+#endif -+ -+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+#if RTL8188F_SUPPORT -+ if(pDM_Odm->SupportICType == ODM_RTL8188F) -+ READ_AND_CONFIG_TC(8188F,_TxPowerTrack_PCIE); -+#endif -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ -+ return HAL_STATUS_SUCCESS; -+} -+ -+HAL_STATUS -+ODM_ConfigBBWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_BB_Config_Type ConfigType -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+#endif -+ -+//1 AP doesn't use PHYDM initialization in these ICs -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8723A_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8723A) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG){ -+ READ_AND_CONFIG_MP(8723A,_PHY_REG); -+ }else if(ConfigType == CONFIG_BB_AGC_TAB){ -+ READ_AND_CONFIG_MP(8723A,_AGC_TAB); -+ } -+ } -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG){ -+ READ_AND_CONFIG_MP(8812A,_PHY_REG); -+ }else if(ConfigType == CONFIG_BB_AGC_TAB){ -+ READ_AND_CONFIG_MP(8812A,_AGC_TAB); -+ } -+ else if(ConfigType == CONFIG_BB_PHY_REG_PG) -+ { -+ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) -+ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS); -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) -+ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC); -+ #endif -+ else -+ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG); -+ } -+ else if(ConfigType == CONFIG_BB_PHY_REG_MP){ -+ READ_AND_CONFIG_MP(8812A,_PHY_REG_MP); -+ } -+ else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF) -+ { -+ if ((36 <= *pDM_Odm->pChannel) && (*pDM_Odm->pChannel <= 64)) -+ AGC_DIFF_CONFIG_MP(8812A,LB); -+ else if (100 <= *pDM_Odm->pChannel) -+ AGC_DIFF_CONFIG_MP(8812A,HB); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8812AGCTABArray\n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8812PHY_REGArray\n")); -+ } -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG){ -+ READ_AND_CONFIG_MP(8821A,_PHY_REG); -+ }else if(ConfigType == CONFIG_BB_AGC_TAB){ -+ READ_AND_CONFIG_MP(8821A,_AGC_TAB); -+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ -+ READ_AND_CONFIG_MP(8821A,_PHY_REG_PG); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8821AGCTABArray\n")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8821PHY_REGArray\n")); -+ } -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG){ -+ READ_AND_CONFIG_MP(8723B,_PHY_REG); -+ }else if(ConfigType == CONFIG_BB_AGC_TAB){ -+ READ_AND_CONFIG_MP(8723B,_AGC_TAB); -+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ -+ READ_AND_CONFIG_MP(8723B,_PHY_REG_PG); -+ } -+ } -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG){ -+ READ_AND_CONFIG_MP(8192E,_PHY_REG); -+ }else if(ConfigType == CONFIG_BB_AGC_TAB){ -+ READ_AND_CONFIG_MP(8192E,_AGC_TAB); -+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ -+ READ_AND_CONFIG_MP(8192E,_PHY_REG_PG); -+ } -+ } -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+ -+//1 All platforms support -+#if (RTL8188E_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8188E,_PHY_REG); -+ else if(ConfigType == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8188E,_AGC_TAB); -+ else if(ConfigType == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8188E,_PHY_REG_PG); -+ } -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG){ -+ READ_AND_CONFIG_MP(8814A,_PHY_REG); -+ }else if(ConfigType == CONFIG_BB_AGC_TAB){ -+ READ_AND_CONFIG_MP(8814A,_AGC_TAB); -+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ -+ READ_AND_CONFIG_MP(8814A,_PHY_REG_PG); -+ }else if(ConfigType == CONFIG_BB_PHY_REG_MP){ -+ READ_AND_CONFIG_MP(8814A,_PHY_REG_MP); -+ } -+ } -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8703B) { -+ if (ConfigType == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8703B, _PHY_REG); -+ else if (ConfigType == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8703B, _AGC_TAB); -+ else if (ConfigType == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8703B, _PHY_REG_PG); -+ } -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) { -+ if (ConfigType == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8188F, _PHY_REG); -+ else if (ConfigType == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8188F, _AGC_TAB); -+ else if (ConfigType == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8188F, _PHY_REG_PG); -+ } -+#endif -+ -+//1 New ICs (WIN only) -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (RTL8821B_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8821B) -+ { -+ if (ConfigType == CONFIG_BB_PHY_REG) { -+ READ_AND_CONFIG(8821B,_PHY_REG); -+ } else if (ConfigType == CONFIG_BB_AGC_TAB) { -+ READ_AND_CONFIG(8821B,_AGC_TAB); -+ } else if (ConfigType == CONFIG_BB_PHY_REG_PG) { -+ READ_AND_CONFIG(8821B,_PHY_REG_PG); -+ } -+ } -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8822B) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8822B, _PHY_REG); -+ else if(ConfigType == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8822B, _AGC_TAB); -+/* else if(ConfigType == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8822B, _PHY_REG_PG); -+ else if(ConfigType == CONFIG_BB_PHY_REG_MP) -+ READ_AND_CONFIG_MP(8822B, _PHY_REG_MP); */ -+ } -+#endif -+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+#if (RTL8188F_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8188F) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_TC(8188F,_PHY_REG); -+ else if(ConfigType == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_TC(8188F,_AGC_TAB); -+ else if(ConfigType == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_TC(8188F,_PHY_REG_PG); -+ } -+#endif -+#endif -+#if (RTL8195A_SUPPORT == 1) -+ if(pDM_Odm->SupportICType == ODM_RTL8195A) -+ { -+ if(ConfigType == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG(8195A,_PHY_REG); -+ else if(ConfigType == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG(8195A,_AGC_TAB); -+ else if(ConfigType == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG(8195A,_PHY_REG_PG); -+ } -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ return HAL_STATUS_SUCCESS; -+} -+ -+HAL_STATUS -+ODM_ConfigMACWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, -+ ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, -+ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", -+ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); -+ -+//1 AP doesn't use PHYDM initialization in these ICs -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8723A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8723A){ -+ READ_AND_CONFIG_MP(8723A,_MAC_REG); -+ } -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8812){ -+ READ_AND_CONFIG_MP(8812A,_MAC_REG); -+ } -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821){ -+ READ_AND_CONFIG_MP(8821A,_MAC_REG); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n")); -+ } -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8723B){ -+ READ_AND_CONFIG_MP(8723B,_MAC_REG); -+ } -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8192E){ -+ READ_AND_CONFIG_MP(8192E,_MAC_REG); -+ } -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+//1 All platforms support -+#if (RTL8188E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188E){ -+ READ_AND_CONFIG_MP(8188E,_MAC_REG); -+ } -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8814A){ -+ READ_AND_CONFIG_MP(8814A,_MAC_REG); -+ } -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8703B) -+ READ_AND_CONFIG_MP(8703B, _MAC_REG); -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ READ_AND_CONFIG_MP(8188F, _MAC_REG); -+#endif -+ -+//1 New ICs (WIN only) -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (RTL8821B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821B){ -+ READ_AND_CONFIG(8821B,_MAC_REG); -+ } -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8822B) -+ READ_AND_CONFIG_MP(8822B, _MAC_REG); -+#endif -+ -+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ READ_AND_CONFIG_TC(8188F,_MAC_REG); -+#endif -+#endif -+#if (RTL8195A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8195A) -+ READ_AND_CONFIG_MP(8195A,_MAC_REG); -+#endif -+#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/ -+ -+ return HAL_STATUS_SUCCESS; -+} -+ -+HAL_STATUS -+ODM_ConfigFWWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_FW_Config_Type ConfigType, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pSize -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+#if (RTL8188E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ #ifdef CONFIG_SFW_SUPPORTED -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8188E_T,_FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN); -+ else if(ConfigType == CONFIG_FW_NIC_2) -+ READ_FIRMWARE_MP(8188E_S,_FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN_2) -+ READ_FIRMWARE_MP(8188E_S,_FW_WoWLAN); -+ #ifdef CONFIG_AP_WOWLAN -+ if (ConfigType == CONFIG_FW_AP) -+ READ_FIRMWARE_MP(8188E_T,_FW_AP); -+ else if (ConfigType == CONFIG_FW_AP_2) -+ READ_FIRMWARE_MP(8188E_S,_FW_AP); -+ #endif //CONFIG_AP_WOWLAN -+ #else -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8188E_T,_FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP) -+ READ_FIRMWARE_MP(8188E_T,_FW_AP); -+ #endif //CONFIG_AP_WOWLAN -+ #endif -+ } -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8723B) -+ { -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8723B,_FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8723B,_FW_WoWLAN); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP_WoWLAN) -+ READ_FIRMWARE(8723B,_FW_AP_WoWLAN); -+ #endif -+ -+ } -+#endif //#if (RTL8723B_SUPPORT == 1) -+#if (RTL8812A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8812A,_FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8812A,_FW_WoWLAN); -+ else if (ConfigType == CONFIG_FW_BT) -+ READ_FIRMWARE_MP(8812A,_FW_NIC_BT); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP_WoWLAN) -+ READ_FIRMWARE(8812A,_FW_AP); -+ #endif -+ } -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821){ -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8821A,_FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8821A,_FW_WoWLAN); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP_WoWLAN) -+ READ_FIRMWARE_MP(8821A , _FW_AP); -+ #endif /*CONFIG_AP_WOWLAN*/ -+ else if (ConfigType == CONFIG_FW_BT) -+ READ_FIRMWARE_MP(8821A,_FW_NIC_BT); -+ } -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8192E) -+ { -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8192E,_FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8192E,_FW_WoWLAN); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP_WoWLAN) -+ READ_FIRMWARE_MP(8192E,_FW_AP); -+ #endif -+ } -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8814A,_FW_NIC); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP_WoWLAN) -+ READ_FIRMWARE_MP(8814A,_FW_AP); -+ #endif -+ } -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8703B) { -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8703B, _FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8703B, _FW_WoWLAN); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP_WoWLAN) -+ READ_FIRMWARE(8703B, _FW_AP_WoWLAN); -+ #endif -+ } -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) { -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8188F, _FW_NIC); -+ else if (ConfigType == CONFIG_FW_WoWLAN) -+ READ_FIRMWARE_MP(8188F, _FW_WoWLAN); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP) -+ READ_FIRMWARE_MP(8188F,_FW_AP); -+ #endif -+ } -+#endif -+ -+//1 New ICs (WIN only) -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if (RTL8821B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821B) -+ { -+ } -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8822B) -+ { -+ /* -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8822B,_FW_NIC); -+ #ifdef CONFIG_AP_WOWLAN -+ else if (ConfigType == CONFIG_FW_AP_WoWLAN) -+ READ_FIRMWARE(8822B,_FW_AP); -+ #endif */ -+ } -+#endif -+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ { -+ if (ConfigType == CONFIG_FW_NIC) -+ READ_FIRMWARE_MP(8188F,_FW_NIC); -+ } -+#endif -+#endif -+#endif//(DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) -+ return HAL_STATUS_SUCCESS; -+} -+ -+u4Byte -+ODM_GetHWImgVersion( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ u4Byte Version=0; -+ -+//1 AP doesn't use PHYDM initialization in these ICs -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8723A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8723A) -+ Version = GET_VERSION_MP(8723A,_MAC_REG); -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8723B) -+ Version = GET_VERSION_MP(8723B,_MAC_REG); -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821) -+ Version = GET_VERSION_MP(8821A,_MAC_REG); -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8192E) -+ Version = GET_VERSION_MP(8192E,_MAC_REG); -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8812) -+ Version = GET_VERSION_MP(8812A,_MAC_REG); -+#endif -+#endif //(DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+/*1 All platforms support*/ -+#if (RTL8188E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188E) -+ Version = GET_VERSION_MP(8188E,_MAC_REG); -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ Version = GET_VERSION_MP(8814A,_MAC_REG); -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8703B) -+ Version = GET_VERSION_MP(8703B, _MAC_REG); -+#endif -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ Version = GET_VERSION_MP(8188F, _MAC_REG); -+#endif -+ -+//1 New ICs (WIN only) -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if (RTL8821B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8821B) -+ Version = GET_VERSION(8821B,_MAC_REG); -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8822B) -+ Version = GET_VERSION(8822B, _MAC_REG); -+#endif -+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+#if (RTL8188F_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188F) -+ Version = GET_VERSION_TC(8188F, _MAC_REG); -+#endif -+#endif -+#endif //(DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ return Version; -+} -+ -+#if (RTL8822B_SUPPORT == 1) -+/* For 8822B only!! need to move to FW finally */ -+/*==============================================*/ -+ -+VOID -+phydm_ResetPhyInfo( -+ IN PDM_ODM_T pPhydm, -+ OUT PODM_PHY_INFO_T pPhyInfo -+) -+{ -+ pPhyInfo->RxPWDBAll = 0; -+ pPhyInfo->SignalQuality = 0; -+ pPhyInfo->BandWidth = 0; -+#if (RTL8822B_SUPPORT == 1) -+ pPhyInfo->RxCount = 0; -+#endif -+ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalQuality, 0 , 4); -+ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalStrength, 0, 4); -+ ODM_Memory_Set(pPhydm, pPhyInfo->RxSNR, 0, 4); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->RxPower = -110; -+ pPhyInfo->RecvSignalPower = -110; -+ pPhyInfo->BTRxRSSIPercentage = 0; -+ pPhyInfo->SignalStrength = 0; -+ pPhyInfo->btCoexPwrAdjust = 0; -+#if (RTL8822B_SUPPORT == 1) -+ pPhyInfo->channel = 0; -+ pPhyInfo->bMuPacket = 0; -+ pPhyInfo->bBeamformed = 0; -+ pPhyInfo->rxsc = 0; -+#endif -+ ODM_Memory_Set(pPhydm, pPhyInfo->RxPwr, -110, 4); -+ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOEVMdbm, 0, 4); -+ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_short, 0, 8); -+ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_tail, 0, 8); -+#endif -+} -+ -+VOID -+phydm_SetPerPathPhyInfo( -+ IN u1Byte RxPath, -+ IN s1Byte RxPwr, -+ IN s1Byte RxEVM, -+ IN s1Byte Cfo_tail, -+ IN s1Byte RxSNR, -+ OUT PODM_PHY_INFO_T pPhyInfo -+) -+{ -+ u1Byte EVMdBm = 0; -+ u1Byte EVMPercentage = 0; -+ -+ /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */ -+ -+ if (RxEVM < 0) { -+ /* Calculate EVM in dBm */ -+ EVMdBm = ((u1Byte)(0 - RxEVM) >> 1); -+ -+ /* Calculate EVM in percentage */ -+ if (EVMdBm >= 33) -+ EVMPercentage = 100; -+ else -+ EVMPercentage = (EVMdBm << 1) + (EVMdBm); -+ } -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->RxPwr[RxPath] = RxPwr; -+ pPhyInfo->RxMIMOEVMdbm[RxPath] = EVMdBm; -+ -+ /* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/ -+ pPhyInfo->Cfo_tail[RxPath] = Cfo_tail; -+ pPhyInfo->Cfo_tail[RxPath] = ((pPhyInfo->Cfo_tail[RxPath] << 5) + (pPhyInfo->Cfo_tail[RxPath] << 2) + -+ (pPhyInfo->Cfo_tail[RxPath] << 1) + (pPhyInfo->Cfo_tail[RxPath])) >> 9; -+#endif -+ -+ pPhyInfo->RxMIMOSignalStrength[RxPath] = odm_QueryRxPwrPercentage(RxPwr); -+ pPhyInfo->RxMIMOSignalQuality[RxPath] = EVMPercentage; -+ pPhyInfo->RxSNR[RxPath] = RxSNR >> 1; -+ -+/* -+ //if (pPktinfo->bPacketMatchBSSID) -+ { -+ DbgPrint("Path (%d)--------\n", RxPath); -+ DbgPrint("RxPwr = %d, Signal strength = %d\n", pPhyInfo->RxPwr[RxPath], pPhyInfo->RxMIMOSignalStrength[RxPath]); -+ DbgPrint("EVMdBm = %d, Signal quality = %d\n", pPhyInfo->RxMIMOEVMdbm[RxPath], pPhyInfo->RxMIMOSignalQuality[RxPath]); -+ DbgPrint("CFO = %d, SNR = %d\n", pPhyInfo->Cfo_tail[RxPath], pPhyInfo->RxSNR[RxPath]); -+ } -+*/ -+} -+ -+VOID -+phydm_SetCommonPhyInfo( -+ IN s1Byte RxPower, -+ IN u1Byte channel, -+ IN BOOLEAN bBeamformed, -+ IN BOOLEAN bMuPacket, -+ IN u1Byte bandwidth, -+ IN u1Byte signalQuality, -+ IN u1Byte rxsc, -+ OUT PODM_PHY_INFO_T pPhyInfo -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ pPhyInfo->RxPower = RxPower; /* RSSI in dB */ -+ pPhyInfo->RecvSignalPower = RxPower; /* RSSI in dB */ -+ pPhyInfo->channel = channel; /* channel number */ -+ pPhyInfo->bBeamformed = bBeamformed; /* apply BF */ -+ pPhyInfo->bMuPacket = bMuPacket; /* MU packet */ -+ pPhyInfo->rxsc = rxsc; -+#endif -+ pPhyInfo->RxPWDBAll = odm_QueryRxPwrPercentage(RxPower); /* RSSI in percentage */ -+ pPhyInfo->SignalQuality = signalQuality; /* signal quality */ -+ pPhyInfo->BandWidth = bandwidth; /* bandwidth */ -+ -+/* -+ //if (pPktinfo->bPacketMatchBSSID) -+ { -+ DbgPrint("RxPWDBAll = %d, RxPower = %d, RecvSignalPower = %d\n", pPhyInfo->RxPWDBAll, pPhyInfo->RxPower, pPhyInfo->RecvSignalPower); -+ DbgPrint("SignalQuality = %d\n", pPhyInfo->SignalQuality); -+ DbgPrint("bBeamformed = %d, bMuPacket = %d, RxCount = %d\n", pPhyInfo->bBeamformed, pPhyInfo->bMuPacket, pPhyInfo->RxCount + 1); -+ DbgPrint("channel = %d, rxsc = %d, BandWidth = %d\n", channel, rxsc, bandwidth); -+ } -+*/ -+} -+ -+VOID -+phydm_GetRxPhyStatusType0( -+ IN PDM_ODM_T pDM_Odm, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo, -+ OUT PODM_PHY_INFO_T pPhyInfo -+) -+{ -+ /* Type 0 is used for cck packet */ -+ -+ PPHY_STATUS_RPT_JAGUAR2_TYPE0 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE0)pPhyStatus; -+ u1Byte i, SQ = 0; -+ -+ /* Calculate Signal Quality*/ -+ if (pPktinfo->bPacketMatchBSSID) { -+ if (pPhyStaRpt->signal_quality >= 64) -+ SQ = 0; -+ else if (pPhyStaRpt->signal_quality <= 20) -+ SQ = 100; -+ else { -+ /* mapping to 2~99% */ -+ SQ = 64 - pPhyStaRpt->signal_quality; -+ SQ = ((SQ << 3) + SQ) >> 2; -+ } -+ } -+ -+ /* Update CCK packet counter */ -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; -+ -+ /* Update Common information */ -+ phydm_SetCommonPhyInfo((pPhyStaRpt->pwdb - 110), pPhyStaRpt->channel, FALSE, -+ FALSE, ODM_BW20M, SQ, pPhyStaRpt->rxsc, pPhyInfo); -+ -+ /* Update CCK pwdb */ -+ phydm_SetPerPathPhyInfo(ODM_RF_PATH_A, (pPhyStaRpt->pwdb - 110), 0, 0, 0, pPhyInfo); /* Update per-path information */ -+ -+/* -+ //if (pPktinfo->bPacketMatchBSSID) -+ { -+ DbgPrint("pwdb = 0x%x, MP gain index = 0x%x, TRSW = 0x%x\n", pPhyStaRpt->pwdb, pPhyStaRpt->gain, pPhyStaRpt->trsw); -+ DbgPrint("channel = %d, band = %d, rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->rxsc); -+ DbgPrint("agc_table = 0x%x, agc_rpt 0x%x, bb_power = 0x%x\n", pPhyStaRpt->agc_table, pPhyStaRpt->agc_rpt, pPhyStaRpt->bb_power); -+ DbgPrint("length = %d, SQ = %d\n", pPhyStaRpt->length, pPhyStaRpt->signal_quality); -+ DbgPrint("antidx a = 0x%x, b = 0x%x, c = 0x%x, d = 0x%x\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d); -+ DbgPrint("rsvd_0 = 0x%x, rsvd_1 = 0x%x, rsvd_2 = 0x%x\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2); -+ DbgPrint("rsvd_3 = 0x%x, rsvd_4 = 0x%x, rsvd_5 = 0x%x\n", pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5); -+ DbgPrint("rsvd_6 = 0x%x, rsvd_7 = 0x%x, rsvd_8 = 0x%x\n", pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7, pPhyStaRpt->rsvd_8); -+ } -+*/ -+} -+ -+VOID -+phydm_GetRxPhyStatusType1( -+ IN PDM_ODM_T pDM_Odm, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo, -+ OUT PODM_PHY_INFO_T pPhyInfo -+) -+{ -+ /* Type 1 is used for ofdm packet */ -+ -+ PPHY_STATUS_RPT_JAGUAR2_TYPE1 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE1)pPhyStatus; -+ s1Byte rx_pwr_db = -120; -+ u1Byte i, rxsc, bw, RxCount = 0; -+ BOOLEAN bMU; -+ -+ /* Update OFDM packet counter */ -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; -+ -+ /* Update per-path information */ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { -+ if (pDM_Odm->RXAntStatus & BIT(i)) { -+ s1Byte rx_path_pwr_db; -+ -+ /* RX path counter */ -+ RxCount++; -+ -+ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */ -+ /* EVM report is reported by stream, not path */ -+ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */ -+ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, pPhyStaRpt->rxevm[RxCount - 1], -+ pPhyStaRpt->cfo_tail[i], pPhyStaRpt->rxsnr[i], pPhyInfo); -+ -+ /* search maximum pwdb */ -+ if (rx_path_pwr_db > rx_pwr_db) -+ rx_pwr_db = rx_path_pwr_db; -+ } -+ } -+ -+ /* mapping RX counter from 1~4 to 0~3 */ -+ if (RxCount > 0) -+ pPhyInfo->RxCount = RxCount - 1; -+ -+ /* Check if MU packet or not */ -+ if ((pPhyStaRpt->gid != 0) && (pPhyStaRpt->gid != 63)) { -+ bMU = TRUE; -+ pDM_Odm->PhyDbgInfo.NumQryMuPkt++; -+ } else -+ bMU = FALSE; -+ -+ /* Count BF packet */ -+ pDM_Odm->PhyDbgInfo.NumQryBfPkt = pDM_Odm->PhyDbgInfo.NumQryBfPkt + pPhyStaRpt->beamformed; -+ -+ /* Check sub-channel */ -+ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0)) -+ rxsc = pPhyStaRpt->l_rxsc; -+ else -+ rxsc = pPhyStaRpt->ht_rxsc; -+ -+ /* Check RX bandwidth */ -+ if ((rxsc >= 1) && (rxsc <= 8)) -+ bw = ODM_BW20M; -+ else if ((rxsc >= 9) && (rxsc <= 12)) -+ bw = ODM_BW40M; -+ else if (rxsc >= 13) -+ bw = ODM_BW80M; -+ else -+ bw = pPhyStaRpt->rf_mode; -+ -+ /* Update packet information */ -+ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed, -+ bMU, bw, odm_EVMdbToPercentage(pPhyStaRpt->rxevm[0]), rxsc, pPhyInfo); -+ -+/* -+ //if (pPktinfo->bPacketMatchBSSID) -+ { -+ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc, pPhyStaRpt->rf_mode); -+ DbgPrint("Antidx A = %d, B = %d, C = %d, D = %d\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d); -+ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]); -+ DbgPrint("EVM A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1], pPhyStaRpt->rxevm[2], pPhyStaRpt->rxevm[3]); -+ DbgPrint("SNR A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxsnr[0], pPhyStaRpt->rxsnr[1], pPhyStaRpt->rxsnr[2], pPhyStaRpt->rxsnr[3]); -+ DbgPrint("CFO A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->cfo_tail[0], pPhyStaRpt->cfo_tail[1], pPhyStaRpt->cfo_tail[2], pPhyStaRpt->cfo_tail[3]); -+ DbgPrint("paid = %d, gid = %d, length = %d\n", (pPhyStaRpt->paid + (pPhyStaRpt->paid_msb<<8)), pPhyStaRpt->gid, pPhyStaRpt->lsig_length); -+ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu); -+ DbgPrint("NBI: %d, pos: %d\n", pPhyStaRpt->nb_intf_flag, (pPhyStaRpt->intf_pos + (pPhyStaRpt->intf_pos_msb<<8))); -+ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5); -+ } -+ DbgPrint("phydm_GetRxPhyStatusType1 pPktinfo->bPacketMatchBSSID = %d\n", pPktinfo->bPacketMatchBSSID); -+ DbgPrint("pPktinfo->DataRate = 0x%x\n", pPktinfo->DataRate); -+*/ -+} -+ -+VOID -+phydm_GetRxPhyStatusType2( -+ IN PDM_ODM_T pDM_Odm, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo, -+ OUT PODM_PHY_INFO_T pPhyInfo -+) -+{ -+ PPHY_STATUS_RPT_JAGUAR2_TYPE2 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE2)pPhyStatus; -+ s1Byte rx_pwr_db = -120; -+ u1Byte i, rxsc, bw, RxCount = 0; -+ -+ /* Update OFDM packet counter */ -+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; -+ -+ /* Update per-path information */ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { -+ if (pDM_Odm->RXAntStatus & BIT(i)) { -+ s1Byte rx_path_pwr_db; -+ -+ /* RX path counter */ -+ RxCount++; -+ -+ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */ -+ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */ -+ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, 0, 0, 0, pPhyInfo); -+ -+ /* search maximum pwdb */ -+ if (rx_path_pwr_db > rx_pwr_db) -+ rx_pwr_db = rx_path_pwr_db; -+ } -+ } -+ -+ /* mapping RX counter from 1~4 to 0~3 */ -+ if (RxCount > 0) -+ pPhyInfo->RxCount = RxCount - 1; -+ -+ /* Check RX sub-channel */ -+ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0)) -+ rxsc = pPhyStaRpt->l_rxsc; -+ else -+ rxsc = pPhyStaRpt->ht_rxsc; -+ -+ /* Check RX bandwidth */ -+ /* the BW information of sc=0 is useless, because there is no information of RF mode*/ -+ if ((rxsc >= 1) && (rxsc <= 8)) -+ bw = ODM_BW20M; -+ else if ((rxsc >= 9) && (rxsc <= 12)) -+ bw = ODM_BW40M; -+ else if (rxsc >= 13) -+ bw = ODM_BW80M; -+ else -+ bw = ODM_BW20M; -+ -+ /* Update packet information */ -+ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed, -+ FALSE, bw, 0, rxsc, pPhyInfo); -+ -+/* -+ //if (pPktinfo->bPacketMatchBSSID) -+ { -+ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc); -+ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]); -+ DbgPrint("Agc table A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->agc_table_a, pPhyStaRpt->agc_table_b, pPhyStaRpt->agc_table_c, pPhyStaRpt->agc_table_d); -+ DbgPrint("Gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->gain_a, pPhyStaRpt->gain_b, pPhyStaRpt->gain_c, pPhyStaRpt->gain_d); -+ DbgPrint("TRSW A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->trsw_a, pPhyStaRpt->trsw_b, pPhyStaRpt->trsw_c, pPhyStaRpt->trsw_d); -+ DbgPrint("AAGC step A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->aagc_step_a, pPhyStaRpt->aagc_step_b, pPhyStaRpt->aagc_step_c, pPhyStaRpt->aagc_step_d); -+ DbgPrint("HT AAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->ht_aagc_gain[0], pPhyStaRpt->ht_aagc_gain[1], pPhyStaRpt->ht_aagc_gain[2], pPhyStaRpt->ht_aagc_gain[3]); -+ DbgPrint("DAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->dagc_gain[0], pPhyStaRpt->dagc_gain[1], pPhyStaRpt->dagc_gain[2], pPhyStaRpt->dagc_gain[3]); -+ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu); -+ DbgPrint("counter: %d, syn_count: %d\n", pPhyStaRpt->counter, pPhyStaRpt->syn_count); -+ DbgPrint("cnt_cca2agc_rdy: %d, cnt_pw2cca: %d, shift_l_map\n", pPhyStaRpt->cnt_cca2agc_rdy, pPhyStaRpt->cnt_pw2cca, pPhyStaRpt->shift_l_map); -+ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4); -+ DbgPrint("rsvd_5 = %d, rsvd_6 = %d, rsvd_6 = %d\n", pPhyStaRpt->rsvd_5, pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7); -+ } -+*/ -+} -+ -+VOID -+phydm_GetRxPhyStatusType5( -+ IN pu1Byte pPhyStatus -+) -+{ -+/* -+ DbgPrint("DW0: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 3), *(pPhyStatus + 2), *(pPhyStatus + 1), *(pPhyStatus + 0)); -+ DbgPrint("DW1: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 7), *(pPhyStatus + 6), *(pPhyStatus + 5), *(pPhyStatus + 4)); -+ DbgPrint("DW2: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 11), *(pPhyStatus + 10), *(pPhyStatus + 9), *(pPhyStatus + 8)); -+ DbgPrint("DW3: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 15), *(pPhyStatus + 14), *(pPhyStatus + 13), *(pPhyStatus + 12)); -+ DbgPrint("DW4: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 19), *(pPhyStatus + 18), *(pPhyStatus + 17), *(pPhyStatus + 16)); -+ DbgPrint("DW5: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 23), *(pPhyStatus + 22), *(pPhyStatus + 21), *(pPhyStatus + 20)); -+ DbgPrint("DW6: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 27), *(pPhyStatus + 26), *(pPhyStatus + 25), *(pPhyStatus + 24)); -+*/ -+} -+ -+VOID -+phydm_Process_RSSIForDM_Jaguar2( -+ IN OUT PDM_ODM_T pDM_Odm, -+ IN PODM_PHY_INFO_T pPhyInfo, -+ IN PODM_PACKET_INFO_T pPktinfo -+ ) -+{ -+ u4Byte UndecoratedSmoothedPWDB, RSSI_Ave; -+ u1Byte i; -+ PSTA_INFO_T pEntry; -+ -+ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM) -+ return; -+ -+ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; -+ -+ if (!IS_STA_VALID(pEntry)) -+ return; -+ -+ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ -+ return; -+ -+ if (pPktinfo->bPacketBeacon) -+ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; -+ -+ if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { -+ u4Byte RSSI_linear = 0; -+ -+ UndecoratedSmoothedPWDB = (u4Byte)pEntry->rssi_stat.UndecoratedSmoothedPWDB; -+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; -+ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; -+ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]; -+ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]; -+ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { -+ if (pPhyInfo->RxMIMOSignalStrength[i] != 0) -+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[i]); -+ } -+ -+ switch (pPhyInfo->RxCount + 1) { -+ case 2: -+ RSSI_linear = (RSSI_linear >> 1); -+ break; -+ case 3: -+ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */ -+ break; -+ case 4: -+ RSSI_linear = (RSSI_linear >> 2); -+ break; -+ } -+ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear); -+ -+ if (UndecoratedSmoothedPWDB <= 0) -+ UndecoratedSmoothedPWDB = pPhyInfo->RxPWDBAll; -+ else -+ UndecoratedSmoothedPWDB = (RSSI_Ave + ((UndecoratedSmoothedPWDB<<4) - UndecoratedSmoothedPWDB))>>4; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1) -+ phydm_ra_rssi_rpt_wk(pDM_Odm); -+ #endif -+ -+ pEntry->rssi_stat.UndecoratedSmoothedPWDB = (s4Byte)UndecoratedSmoothedPWDB; -+ } -+} -+ -+VOID -+phydm_RxPhyStatusJaguarSeries2( -+ IN PDM_ODM_T pPhydm, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo, -+ OUT PODM_PHY_INFO_T pPhyInfo -+) -+{ -+ u1Byte phy_status_type = (*pPhyStatus & 0xf); -+ -+ /*DbgPrint("phydm_RxPhyStatusJaguarSeries2================> (page: %d)\n", phy_status_type);*/ -+ -+ /* Memory reset */ -+ phydm_ResetPhyInfo(pPhydm, pPhyInfo); -+ -+ /* Phy status parsing */ -+ switch (phy_status_type) { -+ case 0: -+ { -+ phydm_GetRxPhyStatusType0(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); -+ break; -+ } -+ case 1: -+ { -+ phydm_GetRxPhyStatusType1(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); -+ break; -+ } -+ case 2: -+ { -+ phydm_GetRxPhyStatusType2(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); -+ break; -+ } -+ case 5: -+ { -+ phydm_GetRxPhyStatusType5(pPhyStatus); -+ return; -+ } -+ default: -+ return; -+ } -+ -+ /* Update signal strength to UI, and pPhyInfo->RxPWDBAll is the maximum RSSI of all path */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pPhyInfo->SignalStrength = SignalScaleProc(pPhydm->Adapter, pPhyInfo->RxPWDBAll, FALSE, FALSE); -+#else -+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pPhydm, pPhyInfo->RxPWDBAll)); -+#endif -+ -+ /* Calculate average RSSI and smoothed RSSI */ -+ phydm_Process_RSSIForDM_Jaguar2(pPhydm, pPhyInfo, pPktinfo); -+ -+} -+/*==============================================*/ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm)) ++#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm)) ++ ++ ++#if (PHYDM_TESTCHIP_SUPPORT == 1) ++#define READ_AND_CONFIG(ic, txt) do {\ ++ if (pDM_Odm->bIsMPChip)\ ++ READ_AND_CONFIG_MP(ic,txt);\ ++ else\ ++ READ_AND_CONFIG_TC(ic,txt);\ ++ } while(0) ++#else ++ #define READ_AND_CONFIG READ_AND_CONFIG_MP ++#endif ++ ++ ++#define READ_FIRMWARE_MP(ic, txt) (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize)) ++#define READ_FIRMWARE_TC(ic, txt) (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize)) ++ ++#if (PHYDM_TESTCHIP_SUPPORT == 1) ++#define READ_FIRMWARE(ic, txt) do {\ ++ if (pDM_Odm->bIsMPChip)\ ++ READ_FIRMWARE_MP(ic,txt);\ ++ else\ ++ READ_FIRMWARE_TC(ic,txt);\ ++ } while(0) ++#else ++#define READ_FIRMWARE READ_FIRMWARE_MP ++#endif ++ ++#define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt()) ++#define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt()) ++#define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt)) ++ ++u1Byte ++odm_QueryRxPwrPercentage( ++ IN s1Byte AntPower ++ ) ++{ ++ if ((AntPower <= -100) || (AntPower >= 20)) ++ { ++ return 0; ++ } ++ else if (AntPower >= 0) ++ { ++ return 100; ++ } ++ else ++ { ++ return (100+AntPower); ++ } ++ ++} ++ ++ ++// ++// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. ++// IF other SW team do not support the feature, remove this section.?? ++// ++s4Byte ++odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( ++ IN OUT PDM_ODM_T pDM_Odm, ++ s4Byte CurrSig ++) ++{ ++ s4Byte RetSig = 0; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ { ++ // Step 1. Scale mapping. ++ // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. ++ // 20100426 Joseph: Modify Signal strength mapping. ++ // This modification makes the RSSI indication similar to Intel solution. ++ // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. ++ if(CurrSig >= 54 && CurrSig <= 100) ++ { ++ RetSig = 100; ++ } ++ else if(CurrSig>=42 && CurrSig <= 53 ) ++ { ++ RetSig = 95; ++ } ++ else if(CurrSig>=36 && CurrSig <= 41 ) ++ { ++ RetSig = 74 + ((CurrSig - 36) *20)/6; ++ } ++ else if(CurrSig>=33 && CurrSig <= 35 ) ++ { ++ RetSig = 65 + ((CurrSig - 33) *8)/2; ++ } ++ else if(CurrSig>=18 && CurrSig <= 32 ) ++ { ++ RetSig = 62 + ((CurrSig - 18) *2)/15; ++ } ++ else if(CurrSig>=15 && CurrSig <= 17 ) ++ { ++ RetSig = 33 + ((CurrSig - 15) *28)/2; ++ } ++ else if(CurrSig>=10 && CurrSig <= 14 ) ++ { ++ RetSig = 39; ++ } ++ else if(CurrSig>=8 && CurrSig <= 9 ) ++ { ++ RetSig = 33; ++ } ++ else if(CurrSig <= 8 ) ++ { ++ RetSig = 19; ++ } ++ } ++#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ return RetSig; ++} ++ ++s4Byte ++odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( ++ IN OUT PDM_ODM_T pDM_Odm, ++ s4Byte CurrSig ++) ++{ ++ s4Byte RetSig = 0; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //if(pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ { ++ // Netcore request this modification because 2009.04.13 SU driver use it. ++ if(CurrSig >= 31 && CurrSig <= 100) ++ { ++ RetSig = 100; ++ } ++ else if(CurrSig >= 21 && CurrSig <= 30) ++ { ++ RetSig = 90 + ((CurrSig - 20) / 1); ++ } ++ else if(CurrSig >= 11 && CurrSig <= 20) ++ { ++ RetSig = 80 + ((CurrSig - 10) / 1); ++ } ++ else if(CurrSig >= 7 && CurrSig <= 10) ++ { ++ RetSig = 69 + (CurrSig - 7); ++ } ++ else if(CurrSig == 6) ++ { ++ RetSig = 54; ++ } ++ else if(CurrSig == 5) ++ { ++ RetSig = 45; ++ } ++ else if(CurrSig == 4) ++ { ++ RetSig = 36; ++ } ++ else if(CurrSig == 3) ++ { ++ RetSig = 27; ++ } ++ else if(CurrSig == 2) ++ { ++ RetSig = 18; ++ } ++ else if(CurrSig == 1) ++ { ++ RetSig = 9; ++ } ++ else ++ { ++ RetSig = CurrSig; ++ } ++ } ++#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ return RetSig; ++} ++ ++ ++s4Byte ++odm_SignalScaleMapping_92CSeries( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN s4Byte CurrSig ++) ++{ ++ s4Byte RetSig = 0; ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ { ++ // Step 1. Scale mapping. ++ if(CurrSig >= 61 && CurrSig <= 100) ++ { ++ RetSig = 90 + ((CurrSig - 60) / 4); ++ } ++ else if(CurrSig >= 41 && CurrSig <= 60) ++ { ++ RetSig = 78 + ((CurrSig - 40) / 2); ++ } ++ else if(CurrSig >= 31 && CurrSig <= 40) ++ { ++ RetSig = 66 + (CurrSig - 30); ++ } ++ else if(CurrSig >= 21 && CurrSig <= 30) ++ { ++ RetSig = 54 + (CurrSig - 20); ++ } ++ else if(CurrSig >= 5 && CurrSig <= 20) ++ { ++ RetSig = 42 + (((CurrSig - 5) * 2) / 3); ++ } ++ else if(CurrSig == 4) ++ { ++ RetSig = 36; ++ } ++ else if(CurrSig == 3) ++ { ++ RetSig = 27; ++ } ++ else if(CurrSig == 2) ++ { ++ RetSig = 18; ++ } ++ else if(CurrSig == 1) ++ { ++ RetSig = 9; ++ } ++ else ++ { ++ RetSig = CurrSig; ++ } ++ } ++#endif ++ ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) ++ { ++ if(CurrSig >= 51 && CurrSig <= 100) ++ { ++ RetSig = 100; ++ } ++ else if(CurrSig >= 41 && CurrSig <= 50) ++ { ++ RetSig = 80 + ((CurrSig - 40)*2); ++ } ++ else if(CurrSig >= 31 && CurrSig <= 40) ++ { ++ RetSig = 66 + (CurrSig - 30); ++ } ++ else if(CurrSig >= 21 && CurrSig <= 30) ++ { ++ RetSig = 54 + (CurrSig - 20); ++ } ++ else if(CurrSig >= 10 && CurrSig <= 20) ++ { ++ RetSig = 42 + (((CurrSig - 10) * 2) / 3); ++ } ++ else if(CurrSig >= 5 && CurrSig <= 9) ++ { ++ RetSig = 22 + (((CurrSig - 5) * 3) / 2); ++ } ++ else if(CurrSig >= 1 && CurrSig <= 4) ++ { ++ RetSig = 6 + (((CurrSig - 1) * 3) / 2); ++ } ++ else ++ { ++ RetSig = CurrSig; ++ } ++ } ++ ++#endif ++ return RetSig; ++} ++s4Byte ++odm_SignalScaleMapping( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN s4Byte CurrSig ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if( (pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO ++ (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore ++ { ++ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig); ++ } ++ else if( (pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) && ++ (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo) ++ { ++ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig); ++ }else ++#endif ++ { ++ return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig); ++ } ++ ++} ++ ++ ++ ++static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte isCCKrate, ++ IN u1Byte PWDB_ALL, ++ IN u1Byte path, ++ IN u1Byte RSSI ++) ++{ ++ u1Byte SQ = 0; ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ if(isCCKrate){ ++ ++ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter)) ++ { ++ ++ // ++ // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 ++ // 802.11n, 802.11b, 802.11g only at channel 6 ++ // ++ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) ++ // 50 5 -52 ++ // 55 5 -54 ++ // 60 5 -55 ++ // 65 5 -59 ++ // 70 5 -63 ++ // 75 5 -66 ++ // 80 4 -72 ++ // 85 3 -75 ++ // 90 3 -80 ++ // 95 2 -85 ++ // 100 1 -89 ++ // 102 1 -90 ++ // 104 1 -91 ++ // ++ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n")); ++ ++#if OS_WIN_FROM_WIN8(OS_VERSION) ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 23 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 18 && PWDB_ALL < 23) ++ SQ = 60; ++ else if(PWDB_ALL >= 8 && PWDB_ALL < 18) ++ SQ = 40; ++ else ++ SQ = 10; ++#else ++ if(PWDB_ALL >= 34) ++ SQ = 100; ++ else if(PWDB_ALL >= 23 && PWDB_ALL < 34) ++ SQ = 80; ++ else if(PWDB_ALL >= 18 && PWDB_ALL < 23) ++ SQ = 60; ++ else if(PWDB_ALL >= 8 && PWDB_ALL < 18) ++ SQ = 40; ++ else ++ SQ = 10; ++ ++ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 ++ SQ = 20; ++#endif ++ ++ } ++ else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){ ++ ++ // ++ // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 ++ // 802.11n, 802.11b, 802.11g only at channel 6 ++ // ++ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) ++ // 50 5 -49 ++ // 55 5 -49 ++ // 60 5 -50 ++ // 65 5 -51 ++ // 70 5 -52 ++ // 75 5 -54 ++ // 80 5 -55 ++ // 85 4 -60 ++ // 90 3 -63 ++ // 95 3 -65 ++ // 100 2 -67 ++ // 102 2 -67 ++ // 104 1 -70 ++ // ++ ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 31 && PWDB_ALL < 35) ++ SQ = 60; ++ else if(PWDB_ALL >= 22 && PWDB_ALL < 31) ++ SQ = 40; ++ else if(PWDB_ALL >= 18 && PWDB_ALL < 22) ++ SQ = 20; ++ else ++ SQ = 10; ++ } else { ++ if (PWDB_ALL >= 50) ++ SQ = 100; ++ else if (PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if (PWDB_ALL >= 22 && PWDB_ALL < 35) ++ SQ = 60; ++ else if (PWDB_ALL >= 18 && PWDB_ALL < 22) ++ SQ = 40; ++ else ++ SQ = 10; ++ } ++ ++ } ++ else ++ {//OFDM rate ++ ++ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || ++ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) ++ { ++ if(RSSI >= 45) ++ SQ = 100; ++ else if(RSSI >= 22 && RSSI < 45) ++ SQ = 80; ++ else if(RSSI >= 18 && RSSI < 22) ++ SQ = 40; ++ else ++ SQ = 20; ++ } else { ++ if(RSSI >= 45) ++ SQ = 100; ++ else if(RSSI >= 22 && RSSI < 45) ++ SQ = 80; ++ else if(RSSI >= 18 && RSSI < 22) ++ SQ = 40; ++ else ++ SQ = 20; ++ } ++ } ++ ++ RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); ++ ++#endif ++ return SQ; ++} ++ ++static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte isCCKrate, ++ IN u1Byte PWDB_ALL, ++ IN u1Byte path, ++ IN u1Byte RSSI ++) ++{ ++ u1Byte SQ = 0; ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ if(isCCKrate){ ++ ++ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n")); ++ ++#if OS_WIN_FROM_WIN8(OS_VERSION) ++ ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 30 && PWDB_ALL < 35) ++ SQ = 60; ++ else if(PWDB_ALL >= 25 && PWDB_ALL < 30) ++ SQ = 40; ++ else if(PWDB_ALL >= 20 && PWDB_ALL < 25) ++ SQ = 20; ++ else ++ SQ = 10; ++#else ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 30 && PWDB_ALL < 35) ++ SQ = 60; ++ else if(PWDB_ALL >= 25 && PWDB_ALL < 30) ++ SQ = 40; ++ else if(PWDB_ALL >= 20 && PWDB_ALL < 25) ++ SQ = 20; ++ else ++ SQ = 10; ++ ++ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 ++ SQ = 20; ++#endif ++ ++ ++ ++ } ++ else ++ {//OFDM rate ++ ++ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || ++ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) ++ { ++ if(RSSI >= 45) ++ SQ = 100; ++ else if(RSSI >= 22 && RSSI < 45) ++ SQ = 80; ++ else if(RSSI >= 18 && RSSI < 22) ++ SQ = 40; ++ else ++ SQ = 20; ++ } ++ else ++ { ++ if(RSSI >= 35) ++ SQ = 100; ++ else if(RSSI >= 30 && RSSI < 35) ++ SQ = 80; ++ else if(RSSI >= 25 && RSSI < 30) ++ SQ = 40; ++ else ++ SQ = 20; ++ } ++ } ++ ++ RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); ++ ++#endif ++ return SQ; ++} ++ ++static u1Byte ++odm_EVMdbToPercentage( ++ IN s1Byte Value ++ ) ++{ ++ // ++ // -33dB~0dB to 0%~99% ++ // ++ s1Byte ret_val; ++ ++ ret_val = Value; ++ ret_val /= 2; ++ ++ /*DbgPrint("Value=%d\n", Value);*/ ++ /*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x\n", ret_val, ret_val));*/ ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++ if (ret_val >= 0) ++ ret_val = 0; ++ ++ if (ret_val <= -40) ++ ret_val = -40; ++ ++ ret_val = 0 - ret_val; ++ ret_val *= 3; ++#else ++ if (ret_val >= 0) ++ ret_val = 0; ++ ++ if (ret_val <= -33) ++ ret_val = -33; ++ ++ ret_val = 0 - ret_val; ++ ret_val *= 3; ++ ++ if (ret_val == 99) ++ ret_val = 100; ++#endif ++ ++ return (u1Byte)ret_val; ++} ++ ++static u1Byte ++odm_EVMdbm_JaguarSeries( ++ IN s1Byte Value ++ ) ++{ ++ s1Byte ret_val = Value; ++ ++ // -33dB~0dB to 33dB ~ 0dB ++ if(ret_val == -128) ++ ret_val = 127; ++ else if (ret_val < 0) ++ ret_val = 0 - ret_val; ++ ++ ret_val = ret_val >> 1; ++ return (u1Byte)ret_val; ++} ++ ++static s2Byte ++odm_Cfo( ++ IN s1Byte Value ++) ++{ ++ s2Byte ret_val; ++ ++ if (Value < 0) ++ { ++ ret_val = 0 - Value; ++ ret_val = (ret_val << 1) + (ret_val >> 1) ; // *2.5~=312.5/2^7 ++ ret_val = ret_val | BIT12; // set bit12 as 1 for negative cfo ++ } ++ else ++ { ++ ret_val = Value; ++ ret_val = (ret_val << 1) + (ret_val>>1) ; // *2.5~=312.5/2^7 ++ } ++ return ret_val; ++} ++ ++#if(ODM_IC_11N_SERIES_SUPPORT == 1) ++ ++s1Byte ++odm_CCKRSSI_8703B( ++ IN u2Byte LNA_idx, ++ IN u1Byte VGA_idx ++ ) ++{ ++ s1Byte rx_pwr_all = 0x00; ++ ++ switch (LNA_idx) { ++ case 0xf: ++ rx_pwr_all = -48 - (2 * VGA_idx); ++ break; ++ case 0xb: ++ rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/ ++ break; ++ case 0xa: ++ rx_pwr_all = -36 - (2 * VGA_idx); ++ break; ++ case 8: ++ rx_pwr_all = -32 - (2 * VGA_idx); ++ break; ++ case 7: ++ rx_pwr_all = -28 - (2 * VGA_idx); /*TBD*/ ++ break; ++ case 4: ++ rx_pwr_all = -16 - (2 * VGA_idx); ++ break; ++ case 0: ++ rx_pwr_all = -2 - (2 * VGA_idx); ++ break; ++ default: ++ /*rx_pwr_all = -53+(2*(31-VGA_idx));*/ ++ /*DbgPrint("wrong LNA index\n");*/ ++ break; ++ ++ } ++ return rx_pwr_all; ++} ++ ++VOID ++odm_RxPhyStatus92CSeries_Parsing( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ u1Byte i, Max_spatial_stream; ++ s1Byte rx_pwr[4], rx_pwr_all=0; ++ u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT; ++ u1Byte RSSI, total_rssi=0; ++ BOOLEAN isCCKrate=FALSE; ++ u1Byte rf_rx_num = 0; ++ u1Byte cck_highpwr = 0; ++ u1Byte LNA_idx = 0; ++ u1Byte VGA_idx = 0; ++ PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus; ++ ++ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M) ? TRUE : FALSE; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; ++ ++ ++ if(isCCKrate) ++ { ++ u1Byte report; ++ u1Byte cck_agc_rpt; ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; ++ // ++ // (1)Hardware does not provide RSSI for CCK ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) ++ // ++ ++ //if(pHalData->eRFPowerState == eRfOn) ++ cck_highpwr = pDM_Odm->bCckHighPower; ++ //else ++ // cck_highpwr = FALSE; ++ ++ cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ; ++ ++ //2011.11.28 LukeLee: 88E use different LNA & VGA gain table ++ //The RSSI formula should be modified according to the gain table ++ //In 88E, cck_highpwr is always set to 1 ++ if (pDM_Odm->SupportICType & (ODM_RTL8703B)) { ++ ++ #if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->cck_agc_report_type == 1) { /*4 bit LNA*/ ++ ++ u1Byte cck_agc_rpt_b = (pPhyStaRpt->cck_rpt_b_ofdm_cfosho_b & BIT7) ? 1 : 0; ++ ++ LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5); ++ VGA_idx = (cck_agc_rpt & 0x1F); ++ ++ rx_pwr_all = odm_CCKRSSI_8703B(LNA_idx, VGA_idx); ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if (PWDB_ALL > 100) ++ PWDB_ALL = 100; ++ ++ } ++ #endif ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F)) /*3 bit LNA*/ ++ { ++ LNA_idx = ((cck_agc_rpt & 0xE0) >>5); ++ VGA_idx = (cck_agc_rpt & 0x1F); ++ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E)) ++ { ++ if(pDM_Odm->cck_agc_report_type == 0 && (pDM_Odm->SupportICType & ODM_RTL8192E) ) ++ { ++ switch(LNA_idx) ++ { ++ case 7: ++ rx_pwr_all = -45 - 2*(VGA_idx); ++ break; ++ case 6: ++ rx_pwr_all = -43 -2*(VGA_idx); ++ break; ++ case 5: ++ rx_pwr_all = -27 - 2*(VGA_idx); ++ break; ++ case 4: ++ rx_pwr_all = -21 - 2*(VGA_idx); ++ break; ++ case 3: ++ rx_pwr_all = -18 - 2*(VGA_idx); ++ break; ++ case 2: ++ rx_pwr_all = -6 - 2*(VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = 9 -2*(VGA_idx); ++ break; ++ case 0: ++ rx_pwr_all = 15 -2*(VGA_idx); ++ break; ++ default: ++ ++ break; ++ } ++ ++ if(pDM_Odm->BoardType & ODM_BOARD_EXT_LNA) ++ { ++ rx_pwr_all -= pDM_Odm->ExtLNAGain; ++ } ++ ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ } ++ else ++ { ++ switch(LNA_idx) ++ { ++ case 7: ++ if(VGA_idx <= 27) ++ rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2 ++ else ++ rx_pwr_all = -100; ++ break; ++ case 6: ++ rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0 ++ break; ++ case 5: ++ rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5 ++ break; ++ case 4: ++ rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4 ++ break; ++ case 3: ++ //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0 ++ rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0 ++ break; ++ case 2: ++ if(cck_highpwr) ++ rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0 ++ else ++ rx_pwr_all = -6+ 2*(5-VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = 8-2*VGA_idx; ++ break; ++ case 0: ++ rx_pwr_all = 14-2*VGA_idx; ++ break; ++ default: ++ //DbgPrint("CCK Exception default\n"); ++ break; ++ } ++ rx_pwr_all += 8; ++ ++ //2012.10.08 LukeLee: Modify for 92E CCK RSSI ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ rx_pwr_all += 8; ++ ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if(cck_highpwr == FALSE) ++ { ++ if(PWDB_ALL >= 80) ++ PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; ++ else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) ++ PWDB_ALL += 3; ++ if(PWDB_ALL>100) ++ PWDB_ALL = 100; ++ } ++ } ++ } ++ else if(pDM_Odm->SupportICType & (ODM_RTL8723B)) ++ { ++#if (RTL8723B_SUPPORT == 1) ++ rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx); ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if(PWDB_ALL>100) ++ PWDB_ALL = 100; ++#endif ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8188F)) { ++#if (RTL8188F_SUPPORT == 1) ++ rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx); ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if (PWDB_ALL > 100) ++ PWDB_ALL = 100; ++#endif ++ } ++ } ++ else ++ { ++ if(!cck_highpwr) ++ { ++ report =( cck_agc_rpt & 0xc0 )>>6; ++ switch(report) ++ { ++ // 03312009 modified by cosa ++ // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion ++ // Note: different RF with the different RNA gain. ++ case 0x3: ++ rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); ++ break; ++ case 0x2: ++ rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); ++ break; ++ case 0x1: ++ rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); ++ break; ++ case 0x0: ++ rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); ++ break; ++ } ++ } ++ else ++ { ++ //report = pDrvInfo->cfosho[0] & 0x60; ++ //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60; ++ ++ report = (cck_agc_rpt & 0x60)>>5; ++ switch(report) ++ { ++ case 0x3: ++ rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x2: ++ rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1); ++ break; ++ case 0x1: ++ rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x0: ++ rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ } ++ } ++ ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ //Modification for ext-LNA board ++ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) ++ { ++ if((cck_agc_rpt>>7) == 0){ ++ PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6); ++ } ++ else ++ { ++ if(PWDB_ALL > 38) ++ PWDB_ALL -= 16; ++ else ++ PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12); ++ } ++ ++ //CCK modification ++ if(PWDB_ALL > 25 && PWDB_ALL <= 60) ++ PWDB_ALL += 6; ++ //else if (PWDB_ALL <= 25) ++ // PWDB_ALL += 8; ++ } ++ else//Modification for int-LNA board ++ { ++ if(PWDB_ALL > 99) ++ PWDB_ALL -= 8; ++ else if(PWDB_ALL > 50 && PWDB_ALL <= 68) ++ PWDB_ALL += 4; ++ } ++ } ++ ++ pDM_Odm->cck_lna_idx = LNA_idx; ++ pDM_Odm->cck_vga_idx = VGA_idx; ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++#endif ++ // ++ // (3) Get Signal Quality (EVM) ++ // ++ //if(pPktinfo->bPacketMatchBSSID) ++ { ++ u1Byte SQ,SQ_rpt; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){ ++ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0); ++ }else if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Acer)) ++ { ++ SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0); ++ }else ++#endif ++ if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){ ++ SQ = 100; ++ } ++ else{ ++ SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; ++ ++ if(SQ_rpt > 64) ++ SQ = 0; ++ else if (SQ_rpt < 20) ++ SQ = 100; ++ else ++ SQ = ((64-SQ_rpt) * 100) / 44; ++ ++ } ++ ++ //DbgPrint("cck SQ = %d\n", SQ); ++ pPhyInfo->SignalQuality = SQ; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; ++ } ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) { ++ if (i == 0) ++ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL; ++ else ++ pPhyInfo->RxMIMOSignalStrength[1] = 0; ++ } ++ } ++ else //2 is OFDM rate ++ { ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ // ++ // (1)Get RSSI for HT rate ++ // ++ ++ for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) ++ { ++ // 2008/01/30 MH we will judge RF RX path now. ++ if (pDM_Odm->RFPathRxEnable & BIT(i)) ++ rf_rx_num++; ++ //else ++ //continue; ++ ++ rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110; ++ pDM_Odm->ofdm_agc_idx[i] = (pPhyStaRpt->path_agc[i].gain & 0x3F); ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPwr[i] = rx_pwr[i]; ++ #endif ++ ++ /* Translate DBM to percentage. */ ++ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); ++ total_rssi += RSSI; ++ //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); ++ ++ ++ if(pDM_Odm->SupportICType&ODM_RTL8192C) ++ { ++ //Modification for ext-LNA board ++ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) ++ { ++ if((pPhyStaRpt->path_agc[i].trsw) == 1) ++ RSSI = (RSSI>94)?100:(RSSI +6); ++ else ++ RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16); ++ ++ if((RSSI <= 34) && (RSSI >=4)) ++ RSSI -= 4; ++ } ++ } ++ ++ pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; ++ ++ #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP)) ++ //Get Rx snr value in DB ++ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); ++ #endif ++ ++ /* Record Signal Strength for next packet */ ++ //if(pPktinfo->bPacketMatchBSSID) ++ { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Lenovo)) ++ { ++ if(i==ODM_RF_PATH_A) ++ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI); ++ ++ } ++ else if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Acer)) ++ { ++ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI); ++ } ++#endif ++ } ++ } ++ ++ ++ // ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) ++ // ++ rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; ++ ++ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; ++ pPhyInfo->RxPower = rx_pwr_all; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++ #endif ++ ++ if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){ ++ //do nothing ++ }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){ ++ //do nothing ++ } ++ else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo ++ // ++ // (3)EVM of HT rate ++ // ++ if(pPktinfo->DataRate >=ODM_RATEMCS8 && pPktinfo->DataRate <=ODM_RATEMCS15) ++ Max_spatial_stream = 2; //both spatial stream make sense ++ else ++ Max_spatial_stream = 1; //only spatial stream 1 makes sense ++ ++ for(i=0; i>= 1" because the compilor of free build environment ++ // fill most significant bit to "zero" when doing shifting operation which may change a negative ++ // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. ++ EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm ++ ++ //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); ++ ++ //if(pPktinfo->bPacketMatchBSSID) ++ { ++ if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only ++ { ++ pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff); ++ } ++ pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff); ++ } ++ } ++ } ++ ++ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail); ++ ++ } ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ //UI BSS List signal strength(in percentage), make it good looking, from 0~100. ++ //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). ++ if(isCCKrate) ++ { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, TRUE, TRUE); ++#else ++ #ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/ ++ #else ++ pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL; ++ #endif ++#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++ } ++ else ++ { ++ if (rf_rx_num != 0) ++ { ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, (total_rssi /= rf_rx_num), TRUE, FALSE); ++ #else ++ #ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num)); ++ #else ++ total_rssi/=rf_rx_num; ++ pPhyInfo->SignalStrength = (u1Byte)total_rssi; ++ #endif ++ #endif ++ } ++ } ++#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))*/ ++ ++ //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", ++ //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a); ++ ++ //For 92C/92D HW (Hybrid) Antenna Diversity ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ //For 88E HW Antenna Diversity ++ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; ++#endif ++} ++#endif ++ ++#if ODM_IC_11AC_SERIES_SUPPORT ++ ++VOID ++odm_RxPhyBWJaguarSeries_Parsing( ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ IN PPHY_STATUS_RPT_8812_T pPhyStaRpt ++) ++{ ++ ++ if(pPktinfo->DataRate <= ODM_RATE54M) { ++ switch (pPhyStaRpt->r_RFMOD) { ++ case 1: ++ if (pPhyStaRpt->sub_chnl == 0) ++ pPhyInfo->BandWidth = 1; ++ else ++ pPhyInfo->BandWidth = 0; ++ break; ++ ++ case 2: ++ if (pPhyStaRpt->sub_chnl == 0) ++ pPhyInfo->BandWidth = 2; ++ else if (pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10) ++ pPhyInfo->BandWidth = 1; ++ else ++ pPhyInfo->BandWidth = 0; ++ break; ++ ++ default: ++ case 0: ++ pPhyInfo->BandWidth = 0; ++ break; ++ } ++ } ++ ++} ++ ++VOID ++odm_RxPhyStatusJaguarSeries_Parsing( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++) ++{ ++ u1Byte i, Max_spatial_stream; ++ s1Byte rx_pwr[4], rx_pwr_all = 0; ++ u1Byte EVM, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT; ++ u1Byte RSSI, avg_rssi = 0, best_rssi = 0, second_rssi = 0; ++ u1Byte isCCKrate = 0; ++ u1Byte rf_rx_num = 0; ++ u1Byte cck_highpwr = 0; ++ u1Byte LNA_idx, VGA_idx; ++ PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ odm_RxPhyBWJaguarSeries_Parsing(pPhyInfo, pPktinfo, pPhyStaRpt); ++ ++ if (pPktinfo->DataRate <= ODM_RATE11M) ++ isCCKrate = TRUE; ++ else ++ isCCKrate = FALSE; ++ ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_C] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_D] = -1; ++ ++ if (isCCKrate) { ++ u1Byte cck_agc_rpt; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; ++ ++ /*(1)Hardware does not provide RSSI for CCK*/ ++ /*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ ++ ++ /*if(pHalData->eRFPowerState == eRfOn)*/ ++ cck_highpwr = pDM_Odm->bCckHighPower; ++ /*else*/ ++ /*cck_highpwr = FALSE;*/ ++ ++ cck_agc_rpt = pPhyStaRpt->cfosho[0] ; ++ LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); ++ VGA_idx = (cck_agc_rpt & 0x1F); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ switch (LNA_idx) { ++ case 7: ++ if (VGA_idx <= 27) ++ rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/ ++ else ++ rx_pwr_all = -100; ++ break; ++ case 6: ++ rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/ ++ break; ++ case 5: ++ rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/ ++ break; ++ case 4: ++ rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/ ++ break; ++ case 3: ++ /*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/ ++ rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/ ++ break; ++ case 2: ++ if (cck_highpwr) ++ rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/ ++ else ++ rx_pwr_all = -6 + 2 * (5 - VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = 8 - 2 * VGA_idx; ++ break; ++ case 0: ++ rx_pwr_all = 14 - 2 * VGA_idx; ++ break; ++ default: ++ /*DbgPrint("CCK Exception default\n");*/ ++ break; ++ } ++ rx_pwr_all += 6; ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ if (cck_highpwr == FALSE) { ++ if (PWDB_ALL >= 80) ++ PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80; ++ else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) ++ PWDB_ALL += 3; ++ if (PWDB_ALL > 100) ++ PWDB_ALL = 100; ++ } ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) { ++ s1Byte Pout = -6; ++ ++ switch (LNA_idx) { ++ case 5: ++ rx_pwr_all = Pout - 32 - (2 * VGA_idx); ++ break; ++ case 4: ++ rx_pwr_all = Pout - 24 - (2 * VGA_idx); ++ break; ++ case 2: ++ rx_pwr_all = Pout - 11 - (2 * VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = Pout + 5 - (2 * VGA_idx); ++ break; ++ case 0: ++ rx_pwr_all = Pout + 21 - (2 * VGA_idx); ++ break; ++ } ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ } else if (pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8822B) { ++ s1Byte Pout = -6; ++ ++ switch (LNA_idx) { ++ /*CCK only use LNA: 2, 3, 5, 7*/ ++ case 7: ++ rx_pwr_all = Pout - 32 - (2 * VGA_idx); ++ break; ++ case 5: ++ rx_pwr_all = Pout - 22 - (2 * VGA_idx); ++ break; ++ case 3: ++ rx_pwr_all = Pout - 2 - (2 * VGA_idx); ++ break; ++ case 2: ++ rx_pwr_all = Pout + 5 - (2 * VGA_idx); ++ break; ++ /*case 6:*/ ++ /*rx_pwr_all = Pout -26 - (2*VGA_idx);*/ ++ /*break;*/ ++ /*case 4:*/ ++ /*rx_pwr_all = Pout - 8 - (2*VGA_idx);*/ ++ /*break;*/ ++ /*case 1:*/ ++ /*rx_pwr_all = Pout + 21 - (2*VGA_idx);*/ ++ /*break;*/ ++ /*case 0:*/ ++ /*rx_pwr_all = Pout + 10 - (2*VGA_idx);*/ ++/* // break;*/ ++ default: ++/* //DbgPrint("CCK Exception default\n");*/ ++ break; ++ } ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ } ++ ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++/* //if(pPktinfo->StationID == 0)*/ ++/* //{*/ ++/* // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n",*/ ++/* // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);*/ ++/* //}*/ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++#endif ++ /*(3) Get Signal Quality (EVM)*/ ++ if (pPktinfo->bPacketMatchBSSID) { ++ u1Byte SQ, SQ_rpt; ++ ++ if ((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) { ++ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, 0, 0); ++ } else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) { ++ SQ = 100; ++ } else { ++ SQ_rpt = pPhyStaRpt->pwdb_all; ++ ++ if (SQ_rpt > 64) ++ SQ = 0; ++ else if (SQ_rpt < 20) ++ SQ = 100; ++ else ++ SQ = ((64 - SQ_rpt) * 100) / 44; ++ } ++ ++/* //DbgPrint("cck SQ = %d\n", SQ);*/ ++ pPhyInfo->SignalQuality = SQ; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; ++ } ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (i == 0) ++ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL; ++ else ++ pPhyInfo->RxMIMOSignalStrength[i] = 0; ++ } ++ } else { ++ /*is OFDM rate*/ ++ pDM_FatTable->hw_antsw_occur = pPhyStaRpt->hw_antsw_occur; ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ /*(1)Get RSSI for OFDM rate*/ ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ /*2008/01/30 MH we will judge RF RX path now.*/ ++/* //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);*/ ++ if (pDM_Odm->RFPathRxEnable & BIT(i)) ++ rf_rx_num++; ++/* //else*/ ++/* //continue;*/ ++ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ ++/* //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))*/ ++ if (i < ODM_RF_PATH_C) ++ rx_pwr[i] = (pPhyStaRpt->gain_trsw[i] & 0x7F) - 110; ++ else ++ rx_pwr[i] = (pPhyStaRpt->gain_trsw_cd[i - 2] & 0x7F) - 110; ++/* //else*/ ++ /*rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; OLD FORMULA*/ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPwr[i] = rx_pwr[i]; ++#endif ++ ++ /* Translate DBM to percentage. */ ++ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); ++ ++ /*total_rssi += RSSI;*/ ++ /*Get the best two RSSI*/ ++ if (RSSI > best_rssi && RSSI > second_rssi) { ++ second_rssi = best_rssi; ++ best_rssi = RSSI; ++ } else if (RSSI > second_rssi && RSSI <= best_rssi) ++ second_rssi = RSSI; ++ ++ /*RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));*/ ++ ++ pPhyInfo->RxMIMOSignalStrength[i] = (u1Byte) RSSI; ++ ++ ++ /*Get Rx snr value in DB*/ ++ if (i < ODM_RF_PATH_C) ++ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i] / 2; ++ else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) ++ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->csi_current[i - 2] / 2; ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ /*(2) CFO_short & CFO_tail*/ ++ if (i < ODM_RF_PATH_C) { ++ pPhyInfo->Cfo_short[i] = odm_Cfo((pPhyStaRpt->cfosho[i])); ++ pPhyInfo->Cfo_tail[i] = odm_Cfo((pPhyStaRpt->cfotail[i])); ++ } ++#endif ++ /* Record Signal Strength for next packet */ ++ if (pPktinfo->bPacketMatchBSSID) { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if ((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) { ++ if (i == ODM_RF_PATH_A) ++ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, i, RSSI); ++ ++ } ++#endif ++ } ++ } ++ ++ /*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ ++ ++ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ ++ if ((pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!pDM_Odm->bIsMPChip)) ++ rx_pwr_all = (pPhyStaRpt->pwdb_all & 0x7f) - 110; ++ else ++ rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1) & 0x7f) - 110; /*OLD FORMULA*/ ++ ++ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));*/ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; ++ pPhyInfo->RxPower = rx_pwr_all; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++#endif ++ ++ if ((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID == 19)) { ++ /*do nothing*/ ++ } else { ++ /*pMgntInfo->CustomerID != RT_CID_819x_Lenovo*/ ++ ++ /*(4)EVM of OFDM rate*/ ++ ++ if ((pPktinfo->DataRate >= ODM_RATEMCS8) && ++ (pPktinfo->DataRate <= ODM_RATEMCS15)) ++ Max_spatial_stream = 2; ++ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS2MCS0) && ++ (pPktinfo->DataRate <= ODM_RATEVHTSS2MCS9)) ++ Max_spatial_stream = 2; ++ else if ((pPktinfo->DataRate >= ODM_RATEMCS16) && ++ (pPktinfo->DataRate <= ODM_RATEMCS23)) ++ Max_spatial_stream = 3; ++ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS3MCS0) && ++ (pPktinfo->DataRate <= ODM_RATEVHTSS3MCS9)) ++ Max_spatial_stream = 3; ++ else ++ Max_spatial_stream = 1; ++ ++ if (pPktinfo->bPacketMatchBSSID) { ++ /*DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);*/ ++ ++ for (i = 0; i < Max_spatial_stream; i++) { ++ /*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/ ++ /*fill most significant bit to "zero" when doing shifting operation which may change a negative*/ ++ /*value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.*/ ++ ++ if (pPktinfo->DataRate >= ODM_RATE6M && pPktinfo->DataRate <= ODM_RATE54M) { ++ if (i == ODM_RF_PATH_A) { ++ EVM = odm_EVMdbToPercentage((pPhyStaRpt->sigevm)); /*dbm*/ ++ EVM += 20; ++ if (EVM > 100) ++ EVM = 100; ++ } ++ } else { ++ if (i < ODM_RF_PATH_C) { ++ if (pPhyStaRpt->rxevm[i] == -128) ++ pPhyStaRpt->rxevm[i] = -25; ++ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm[i])); /*dbm*/ ++ } else { ++ if (pPhyStaRpt->rxevm_cd[i - 2] == -128){ ++ pPhyStaRpt->rxevm_cd[i - 2] = -25; ++ } ++ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm_cd[i - 2])); /*dbm*/ ++ } ++ } ++ ++ if (i < ODM_RF_PATH_C) ++ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]); ++ else ++ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm_cd[i - 2]); ++ /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/ ++ /*pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));*/ ++ ++ { ++ if (i == ODM_RF_PATH_A) { ++ /*Fill value in RFD, Get the first spatial stream only*/ ++ pPhyInfo->SignalQuality = EVM; ++ } ++ pPhyInfo->RxMIMOSignalQuality[i] = EVM; ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm; ++#endif ++ } ++ } ++ } ++ } ++ ++ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail); ++ ++ } ++/* //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);*/ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ /*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/ ++ /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/ ++ if (isCCKrate) { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, FALSE, TRUE); ++#else ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/ ++#endif ++ } else { ++ if (rf_rx_num != 0) { ++ /* 2015/01 Sean, use the best two RSSI only, suggested by Ynlin and ChenYu.*/ ++ if (rf_rx_num == 1) ++ avg_rssi = best_rssi; ++ else ++ avg_rssi = (best_rssi + second_rssi)/2; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, avg_rssi, FALSE, FALSE); ++#else ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, avg_rssi)); ++#endif ++ } ++ } ++#endif ++ pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll; ++ ++ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antidx_antc; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_3 = pPhyStaRpt->antidx_antd; ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antidx_anta = ((%d)), MatchBSSID = ((%d))\n", pPktinfo->StationID, pPhyStaRpt->antidx_anta, pPktinfo->bPacketMatchBSSID));*/ ++ ++ ++/* DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d\n",*/ ++/* pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb);*/ ++/* DbgPrint("----------------------------\n");*/ ++/* DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);*/ ++/* DbgPrint("pPhyStaRpt->r_RFMOD = %d\n", pPhyStaRpt->r_RFMOD);*/ ++/* DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x\n",*/ ++/* pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1]);*/ ++/* DbgPrint("pPhyStaRpt->gain_trsw[2]=0x%x, pPhyStaRpt->gain_trsw[3]=0x%x\n",*/ ++/* pPhyStaRpt->gain_trsw_cd[0],pPhyStaRpt->gain_trsw_cd[1]);*/ ++/* DbgPrint("pPhyStaRpt->pwdb_all = 0x%x, pPhyInfo->RxPWDBAll = %d\n", pPhyStaRpt->pwdb_all, pPhyInfo->RxPWDBAll);*/ ++/* DbgPrint("pPhyStaRpt->cfotail[i] = 0x%x, pPhyStaRpt->CFO_tail[i] = 0x%x\n", pPhyStaRpt->cfotail[0], pPhyStaRpt->cfotail[1]);*/ ++/* DbgPrint("pPhyStaRpt->rxevm[0] = %d, pPhyStaRpt->rxevm[1] = %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1]);*/ ++/* DbgPrint("pPhyStaRpt->rxevm[2] = %d, pPhyStaRpt->rxevm[3] = %d\n", pPhyStaRpt->rxevm_cd[0], pPhyStaRpt->rxevm_cd[1]);*/ ++/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);*/ ++/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[2]=%d, pPhyInfo->RxMIMOSignalStrength[3]=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalStrength[2], pPhyInfo->RxMIMOSignalStrength[3]);*/ ++/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[0]=%d, pPhyInfo->RxMIMOSignalQuality[1]=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalQuality[0], pPhyInfo->RxMIMOSignalQuality[1]);*/ ++/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[2]=%d, pPhyInfo->RxMIMOSignalQuality[3]=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalQuality[2], pPhyInfo->RxMIMOSignalQuality[3]);*/ ++ ++} ++ ++#endif ++ ++VOID ++odm_Init_RSSIForDM( ++ IN OUT PDM_ODM_T pDM_Odm ++ ) ++{ ++ ++} ++ ++VOID ++odm_Process_RSSIForDM( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN PODM_PHY_INFO_T pPhyInfo, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ ++ s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave; ++ u1Byte i, isCCKrate=0; ++ u1Byte RSSI_max, RSSI_min; ++ u4Byte OFDM_pkt=0; ++ u4Byte Weighting=0; ++ PSTA_INFO_T pEntry; ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ #endif ++ ++ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM) ++ return; ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(pDM_Odm, pPhyInfo, pPktinfo); ++ #endif ++ ++ // ++ // 2012/05/30 MH/Luke.Lee Add some description ++ // In windows driver: AP/IBSS mode STA ++ // ++ //if (pDM_Odm->SupportPlatform == ODM_WIN) ++ //{ ++ // pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]]; ++ //} ++ //else ++ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; ++ ++ if(!IS_STA_VALID(pEntry) ) ++ { ++ return; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ if ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) && ++ (pDM_FatTable->enable_ctrl_frame_antdiv) ++ ) ++ { ++ if (pPktinfo->bPacketMatchBSSID) ++ pDM_Odm->data_frame_num++; ++ ++ if ((pDM_FatTable->use_ctrl_frame_antdiv)) { ++ if (!pPktinfo->bToSelf)/*data frame + CTRL frame*/ ++ return; ++ } else { ++ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ ++ return; ++ } ++ } else ++#endif ++ { ++ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ ++ return; ++ } ++ ++ if(pPktinfo->bPacketBeacon) ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; ++ ++ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M )?TRUE :FALSE; ++ pDM_Odm->RxRate = pPktinfo->DataRate; ++ ++ //--------------Statistic for antenna/path diversity------------------ ++ if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) ++ { ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo); ++ #endif ++ } ++ #if(defined(CONFIG_PATH_DIVERSITY)) ++ else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV) ++ { ++ phydm_process_rssi_for_path_div(pDM_Odm,pPhyInfo,pPktinfo); ++ } ++ #endif ++ //-----------------Smart Antenna Debug Message------------------// ++ ++ UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; ++ UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; ++ UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) ++ { ++ ++ if(!isCCKrate)//ofdm rate ++ { ++#if (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) { ++ u1Byte RX_count = 0; ++ u4Byte RSSI_linear = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_A) { ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]); ++ } else ++ pDM_Odm->RSSI_A = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_B) { ++ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]); ++ } else ++ pDM_Odm->RSSI_B = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_C) { ++ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]); ++ } else ++ pDM_Odm->RSSI_C = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_D) { ++ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]); ++ } else ++ pDM_Odm->RSSI_D = 0; ++ ++ /* Calculate average RSSI */ ++ switch (RX_count) { ++ case 2: ++ RSSI_linear = (RSSI_linear >> 1); ++ break; ++ case 3: ++ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */ ++ break; ++ case 4: ++ RSSI_linear = (RSSI_linear >> 2); ++ break; ++ } ++ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear); ++ } else ++#endif ++ { ++ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) { ++ RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_B = 0; ++ } else { ++ /*DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d\n",*/ ++ /*pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);*/ ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ ++ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) { ++ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ } else { ++ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ } ++ if ((RSSI_max - RSSI_min) < 3) ++ RSSI_Ave = RSSI_max; ++ else if ((RSSI_max - RSSI_min) < 6) ++ RSSI_Ave = RSSI_max - 1; ++ else if ((RSSI_max - RSSI_min) < 10) ++ RSSI_Ave = RSSI_max - 2; ++ else ++ RSSI_Ave = RSSI_max - 3; ++ } ++ } ++ ++ //1 Process OFDM RSSI ++ if(UndecoratedSmoothedOFDM <= 0) // initialize ++ { ++ UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; ++ } ++ else ++ { ++ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM) ++ { ++ UndecoratedSmoothedOFDM = ++ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + ++ (RSSI_Ave)) /(Rx_Smooth_Factor); ++ UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedOFDM = ++ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + ++ (RSSI_Ave)) /(Rx_Smooth_Factor); ++ } ++ } ++ if (pEntry->rssi_stat.OFDM_pkt != 64) { ++ i = 63; ++ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)(((pEntry->rssi_stat.PacketMap>>i)&BIT0)-1); ++ } ++ pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; ++ ++ } ++ else ++ { ++ RSSI_Ave = pPhyInfo->RxPWDBAll; ++ pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll; ++ pDM_Odm->RSSI_B = 0xFF; ++ pDM_Odm->RSSI_C = 0xFF; ++ pDM_Odm->RSSI_D = 0xFF; ++ ++ //1 Process CCK RSSI ++ if(UndecoratedSmoothedCCK <= 0) // initialize ++ { ++ UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; ++ } ++ else ++ { ++ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK) ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); ++ UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); ++ } ++ } ++ i = 63; ++ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)((pEntry->rssi_stat.PacketMap>>i)&BIT0); ++ pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; ++ } ++ ++ //if(pEntry) ++ { ++ //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI ++ if (pEntry->rssi_stat.OFDM_pkt == 64) { /* speed up when all packets are OFDM*/ ++ UndecoratedSmoothedPWDB = UndecoratedSmoothedOFDM; ++ } else { ++ if (pEntry->rssi_stat.ValidBit < 64) ++ pEntry->rssi_stat.ValidBit++; ++ ++ if (pEntry->rssi_stat.ValidBit == 64) { ++ Weighting = ((pEntry->rssi_stat.OFDM_pkt<<4) > 64)?64:(pEntry->rssi_stat.OFDM_pkt<<4); ++ UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; ++ } else { ++ if (pEntry->rssi_stat.ValidBit != 0) ++ UndecoratedSmoothedPWDB = (pEntry->rssi_stat.OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-pEntry->rssi_stat.OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit; ++ else ++ UndecoratedSmoothedPWDB = 0; ++ } ++ } ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1) ++ phydm_ra_rssi_rpt_wk(pDM_Odm); ++ #endif ++ pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; ++ pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; ++ pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting); ++ //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", ++ // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); ++ ++ } ++ ++ } ++} ++ ++ ++#if(ODM_IC_11N_SERIES_SUPPORT ==1) ++// ++// Endianness before calling this API ++// ++VOID ++ODM_PhyStatusQuery_92CSeries( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); ++ odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo); ++} ++#endif ++ ++ ++// ++// Endianness before calling this API ++// ++#if ODM_IC_11AC_SERIES_SUPPORT ++ ++VOID ++ODM_PhyStatusQuery_JaguarSeries( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ odm_RxPhyStatusJaguarSeries_Parsing( ++ pDM_Odm, ++ pPhyInfo, ++ pPhyStatus, ++ pPktinfo); ++ ++ odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //phydm_sbd_check(pDM_Odm); ++#endif ++} ++#endif ++ ++VOID ++ODM_PhyStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ phydm_RxPhyStatusJaguarSeries2(pDM_Odm, pPhyStatus, pPktinfo, pPhyInfo); ++ return; ++ } ++#endif ++ ++#if ODM_IC_11AC_SERIES_SUPPORT ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ ODM_PhyStatusQuery_JaguarSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); ++#endif ++ ++#if ODM_IC_11N_SERIES_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES ) ++ ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); ++#endif ++} ++ ++// For future use. ++VOID ODM_MacStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN pu1Byte pMacStatus, ++ IN u1Byte MacID, ++ IN BOOLEAN bPacketMatchBSSID, ++ IN BOOLEAN bPacketToSelf, ++ IN BOOLEAN bPacketBeacon ++ ) ++{ ++ // 2011/10/19 Driver team will handle in the future. ++ ++} ++ ++ ++// ++// If you want to add a new IC, Please follow below template and generate a new one. ++// ++// ++ ++HAL_STATUS ++ODM_ConfigRFWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_Config_Type ConfigType, ++ IN ODM_RF_RADIO_PATH_E eRFPath ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", ++ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); ++ ++//1 AP doesn't use PHYDM power tracking table in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8723A,_RadioA); ++ } ++ } ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A){ ++ READ_AND_CONFIG_MP(8812A,_RadioA); ++ } ++ else if(eRFPath == ODM_RF_PATH_B){ ++ READ_AND_CONFIG_MP(8812A,_RadioB); ++ } ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ if ((pHalData->EEPROMSVID == 0x17AA && pHalData->EEPROMSMID == 0xA811) || ++ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0xA812) || ++ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0x8812)) ++ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT_HM812A03); ++ else ++ #endif ++ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT); ++ } ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A){ ++ READ_AND_CONFIG_MP(8821A,_RadioA); ++ } ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G) ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM); ++ else ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA); ++ } ++ else { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pMgntInfo->CustomerID == RT_CID_8821AE_ASUS_MB) ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_8mm); ++ else if (pMgntInfo->CustomerID == RT_CID_ASUS_NB) ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_5mm); ++ else ++ #endif ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n")); ++ } ++#endif ++ ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) ++ READ_AND_CONFIG_MP(8723B,_RadioA); ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8723B,_TXPWR_LMT); ++ } ++#endif ++ ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8192E,_RadioA); ++ else if(eRFPath == ODM_RF_PATH_B) ++ READ_AND_CONFIG_MP(8192E,_RadioB); ++ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) { ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if ((pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8192) || ++ (pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8193)) ++ READ_AND_CONFIG_MP(8192E, _TXPWR_LMT_8192E_SAR_5mm); ++ else ++#endif ++ READ_AND_CONFIG_MP(8192E,_TXPWR_LMT); ++ } ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++//1 All platforms support ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8188E,_RadioA); ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8188E,_TXPWR_LMT); ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8814A,_RadioA); ++ else if(eRFPath == ODM_RF_PATH_B) ++ READ_AND_CONFIG_MP(8814A,_RadioB); ++ else if(eRFPath == ODM_RF_PATH_C) ++ READ_AND_CONFIG_MP(8814A,_RadioC); ++ else if(eRFPath == ODM_RF_PATH_D) ++ READ_AND_CONFIG_MP(8814A,_RadioD); ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8814A,_TXPWR_LMT); ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (ConfigType == CONFIG_RF_RADIO) { ++ if (eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8703B, _RadioA); ++ } ++ } ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (ConfigType == CONFIG_RF_RADIO) { ++ if (eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8188F, _RadioA); ++ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8188F, _TXPWR_LMT); ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ { ++ if (ConfigType == CONFIG_RF_RADIO) { ++ if (eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG(8821B, _RadioA); ++ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG(8821B, _TXPWR_LMT); ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8822B, _RadioA); ++ else if(eRFPath == ODM_RF_PATH_B) ++ READ_AND_CONFIG_MP(8822B, _RadioB); ++ } ++ } ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_TC(8188F,_RadioA); ++ } ++ } ++#endif ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigRFWithTxPwrTrackHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", ++ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); ++ ++ ++//1 AP doesn't use PHYDM power tracking table in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if RTL8821A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_SDIO); ++ } ++#endif ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) ++ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3); ++ else ++ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_USB); ++ } ++ ++ } ++#endif ++#if RTL8192E_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_SDIO); ++ } ++#endif ++#if RTL8723B_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_SDIO); ++ } ++#endif ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_SDIO); ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++//1 All platforms support ++#if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if(pDM_Odm->RFEType == 0) ++ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type0); ++ else if(pDM_Odm->RFEType == 2) ++ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type2); ++ else if (pDM_Odm->RFEType == 5) ++ READ_AND_CONFIG_MP(8814A, _TxPowerTrack_Type5); ++ else ++ READ_AND_CONFIG_MP(8814A,_TxPowerTrack); ++ } ++#endif ++#if RTL8703B_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_SDIO); ++ } ++#endif ++ ++#if RTL8188F_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_SDIO); ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if RTL8821B_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8821B) ++ READ_AND_CONFIG(8821B,_TxPowerTrack); ++#endif ++#if RTL8822B_SUPPORT ++/* if(pDM_Odm->SupportICType == ODM_RTL8822B) ++ READ_AND_CONFIG_MP(8822B, _TxPowerTrack); */ ++#endif ++ ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if RTL8188F_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8188F) ++ READ_AND_CONFIG_TC(8188F,_TxPowerTrack_PCIE); ++#endif ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigBBWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_BB_Config_Type ConfigType ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++#endif ++ ++//1 AP doesn't use PHYDM initialization in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8723A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8723A,_AGC_TAB); ++ } ++ } ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8812A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8812A,_AGC_TAB); ++ } ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ { ++ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS); ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC); ++ #endif ++ else ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG); ++ } ++ else if(ConfigType == CONFIG_BB_PHY_REG_MP){ ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_MP); ++ } ++ else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF) ++ { ++ if ((36 <= *pDM_Odm->pChannel) && (*pDM_Odm->pChannel <= 64)) ++ AGC_DIFF_CONFIG_MP(8812A,LB); ++ else if (100 <= *pDM_Odm->pChannel) ++ AGC_DIFF_CONFIG_MP(8812A,HB); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8812AGCTABArray\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8812PHY_REGArray\n")); ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8821A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8821A,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8821A,_PHY_REG_PG); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8821AGCTABArray\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8821PHY_REGArray\n")); ++ } ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8723B,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8723B,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8723B,_PHY_REG_PG); ++ } ++ } ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8192E,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8192E,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8192E,_PHY_REG_PG); ++ } ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++ ++//1 All platforms support ++#if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8188E,_PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8188E,_AGC_TAB); ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8188E,_PHY_REG_PG); ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8814A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8814A,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8814A,_PHY_REG_PG); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_MP){ ++ READ_AND_CONFIG_MP(8814A,_PHY_REG_MP); ++ } ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8703B, _PHY_REG); ++ else if (ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8703B, _AGC_TAB); ++ else if (ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8703B, _PHY_REG_PG); ++ } ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8188F, _PHY_REG); ++ else if (ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8188F, _AGC_TAB); ++ else if (ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8188F, _PHY_REG_PG); ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8821B) ++ { ++ if (ConfigType == CONFIG_BB_PHY_REG) { ++ READ_AND_CONFIG(8821B,_PHY_REG); ++ } else if (ConfigType == CONFIG_BB_AGC_TAB) { ++ READ_AND_CONFIG(8821B,_AGC_TAB); ++ } else if (ConfigType == CONFIG_BB_PHY_REG_PG) { ++ READ_AND_CONFIG(8821B,_PHY_REG_PG); ++ } ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8822B, _PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8822B, _AGC_TAB); ++/* else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8822B, _PHY_REG_PG); ++ else if(ConfigType == CONFIG_BB_PHY_REG_MP) ++ READ_AND_CONFIG_MP(8822B, _PHY_REG_MP); */ ++ } ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_TC(8188F,_PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_TC(8188F,_AGC_TAB); ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_TC(8188F,_PHY_REG_PG); ++ } ++#endif ++#endif ++#if (RTL8195A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8195A) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG(8195A,_PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG(8195A,_AGC_TAB); ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG(8195A,_PHY_REG_PG); ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigMACWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", ++ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); ++ ++//1 AP doesn't use PHYDM initialization in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723A){ ++ READ_AND_CONFIG_MP(8723A,_MAC_REG); ++ } ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812){ ++ READ_AND_CONFIG_MP(8812A,_MAC_REG); ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821){ ++ READ_AND_CONFIG_MP(8821A,_MAC_REG); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n")); ++ } ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B){ ++ READ_AND_CONFIG_MP(8723B,_MAC_REG); ++ } ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E){ ++ READ_AND_CONFIG_MP(8192E,_MAC_REG); ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++//1 All platforms support ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E){ ++ READ_AND_CONFIG_MP(8188E,_MAC_REG); ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A){ ++ READ_AND_CONFIG_MP(8814A,_MAC_REG); ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) ++ READ_AND_CONFIG_MP(8703B, _MAC_REG); ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ READ_AND_CONFIG_MP(8188F, _MAC_REG); ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B){ ++ READ_AND_CONFIG(8821B,_MAC_REG); ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ READ_AND_CONFIG_MP(8822B, _MAC_REG); ++#endif ++ ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ READ_AND_CONFIG_TC(8188F,_MAC_REG); ++#endif ++#endif ++#if (RTL8195A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8195A) ++ READ_AND_CONFIG_MP(8195A,_MAC_REG); ++#endif ++#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/ ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigFWWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_FW_Config_Type ConfigType, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pSize ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ #ifdef CONFIG_SFW_SUPPORTED ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188E_T,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN); ++ else if(ConfigType == CONFIG_FW_NIC_2) ++ READ_FIRMWARE_MP(8188E_S,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN_2) ++ READ_FIRMWARE_MP(8188E_S,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ if (ConfigType == CONFIG_FW_AP) ++ READ_FIRMWARE_MP(8188E_T,_FW_AP); ++ else if (ConfigType == CONFIG_FW_AP_2) ++ READ_FIRMWARE_MP(8188E_S,_FW_AP); ++ #endif //CONFIG_AP_WOWLAN ++ #else ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188E_T,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP) ++ READ_FIRMWARE_MP(8188E_T,_FW_AP); ++ #endif //CONFIG_AP_WOWLAN ++ #endif ++ } ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8723B,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8723B,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8723B,_FW_AP_WoWLAN); ++ #endif ++ ++ } ++#endif //#if (RTL8723B_SUPPORT == 1) ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8812A,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8812A,_FW_WoWLAN); ++ else if (ConfigType == CONFIG_FW_BT) ++ READ_FIRMWARE_MP(8812A,_FW_NIC_BT); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8812A,_FW_AP); ++ #endif ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821){ ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8821A,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8821A,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE_MP(8821A , _FW_AP); ++ #endif /*CONFIG_AP_WOWLAN*/ ++ else if (ConfigType == CONFIG_FW_BT) ++ READ_FIRMWARE_MP(8821A,_FW_NIC_BT); ++ } ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8192E,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8192E,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE_MP(8192E,_FW_AP); ++ #endif ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8814A,_FW_NIC); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE_MP(8814A,_FW_AP); ++ #endif ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8703B, _FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8703B, _FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8703B, _FW_AP_WoWLAN); ++ #endif ++ } ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188F, _FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8188F, _FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP) ++ READ_FIRMWARE_MP(8188F,_FW_AP); ++ #endif ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ { ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ /* ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8822B,_FW_NIC); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8822B,_FW_AP); ++ #endif */ ++ } ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188F,_FW_NIC); ++ } ++#endif ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ return HAL_STATUS_SUCCESS; ++} ++ ++u4Byte ++ODM_GetHWImgVersion( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte Version=0; ++ ++//1 AP doesn't use PHYDM initialization in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723A) ++ Version = GET_VERSION_MP(8723A,_MAC_REG); ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ Version = GET_VERSION_MP(8723B,_MAC_REG); ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821) ++ Version = GET_VERSION_MP(8821A,_MAC_REG); ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ Version = GET_VERSION_MP(8192E,_MAC_REG); ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ Version = GET_VERSION_MP(8812A,_MAC_REG); ++#endif ++#endif //(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++/*1 All platforms support*/ ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ Version = GET_VERSION_MP(8188E,_MAC_REG); ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ Version = GET_VERSION_MP(8814A,_MAC_REG); ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) ++ Version = GET_VERSION_MP(8703B, _MAC_REG); ++#endif ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ Version = GET_VERSION_MP(8188F, _MAC_REG); ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ Version = GET_VERSION(8821B,_MAC_REG); ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ Version = GET_VERSION(8822B, _MAC_REG); ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ Version = GET_VERSION_TC(8188F, _MAC_REG); ++#endif ++#endif ++#endif //(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ return Version; ++} ++ ++#if (RTL8822B_SUPPORT == 1) ++/* For 8822B only!! need to move to FW finally */ ++/*==============================================*/ ++ ++VOID ++phydm_ResetPhyInfo( ++ IN PDM_ODM_T pPhydm, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ pPhyInfo->RxPWDBAll = 0; ++ pPhyInfo->SignalQuality = 0; ++ pPhyInfo->BandWidth = 0; ++#if (RTL8822B_SUPPORT == 1) ++ pPhyInfo->RxCount = 0; ++#endif ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalQuality, 0 , 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalStrength, 0, 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxSNR, 0, 4); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPower = -110; ++ pPhyInfo->RecvSignalPower = -110; ++ pPhyInfo->BTRxRSSIPercentage = 0; ++ pPhyInfo->SignalStrength = 0; ++ pPhyInfo->btCoexPwrAdjust = 0; ++#if (RTL8822B_SUPPORT == 1) ++ pPhyInfo->channel = 0; ++ pPhyInfo->bMuPacket = 0; ++ pPhyInfo->bBeamformed = 0; ++ pPhyInfo->rxsc = 0; ++#endif ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxPwr, -110, 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOEVMdbm, 0, 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_short, 0, 8); ++ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_tail, 0, 8); ++#endif ++} ++ ++VOID ++phydm_SetPerPathPhyInfo( ++ IN u1Byte RxPath, ++ IN s1Byte RxPwr, ++ IN s1Byte RxEVM, ++ IN s1Byte Cfo_tail, ++ IN s1Byte RxSNR, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ u1Byte EVMdBm = 0; ++ u1Byte EVMPercentage = 0; ++ ++ /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */ ++ ++ if (RxEVM < 0) { ++ /* Calculate EVM in dBm */ ++ EVMdBm = ((u1Byte)(0 - RxEVM) >> 1); ++ ++ /* Calculate EVM in percentage */ ++ if (EVMdBm >= 33) ++ EVMPercentage = 100; ++ else ++ EVMPercentage = (EVMdBm << 1) + (EVMdBm); ++ } ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPwr[RxPath] = RxPwr; ++ pPhyInfo->RxMIMOEVMdbm[RxPath] = EVMdBm; ++ ++ /* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/ ++ pPhyInfo->Cfo_tail[RxPath] = Cfo_tail; ++ pPhyInfo->Cfo_tail[RxPath] = ((pPhyInfo->Cfo_tail[RxPath] << 5) + (pPhyInfo->Cfo_tail[RxPath] << 2) + ++ (pPhyInfo->Cfo_tail[RxPath] << 1) + (pPhyInfo->Cfo_tail[RxPath])) >> 9; ++#endif ++ ++ pPhyInfo->RxMIMOSignalStrength[RxPath] = odm_QueryRxPwrPercentage(RxPwr); ++ pPhyInfo->RxMIMOSignalQuality[RxPath] = EVMPercentage; ++ pPhyInfo->RxSNR[RxPath] = RxSNR >> 1; ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("Path (%d)--------\n", RxPath); ++ DbgPrint("RxPwr = %d, Signal strength = %d\n", pPhyInfo->RxPwr[RxPath], pPhyInfo->RxMIMOSignalStrength[RxPath]); ++ DbgPrint("EVMdBm = %d, Signal quality = %d\n", pPhyInfo->RxMIMOEVMdbm[RxPath], pPhyInfo->RxMIMOSignalQuality[RxPath]); ++ DbgPrint("CFO = %d, SNR = %d\n", pPhyInfo->Cfo_tail[RxPath], pPhyInfo->RxSNR[RxPath]); ++ } ++*/ ++} ++ ++VOID ++phydm_SetCommonPhyInfo( ++ IN s1Byte RxPower, ++ IN u1Byte channel, ++ IN BOOLEAN bBeamformed, ++ IN BOOLEAN bMuPacket, ++ IN u1Byte bandwidth, ++ IN u1Byte signalQuality, ++ IN u1Byte rxsc, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPower = RxPower; /* RSSI in dB */ ++ pPhyInfo->RecvSignalPower = RxPower; /* RSSI in dB */ ++ pPhyInfo->channel = channel; /* channel number */ ++ pPhyInfo->bBeamformed = bBeamformed; /* apply BF */ ++ pPhyInfo->bMuPacket = bMuPacket; /* MU packet */ ++ pPhyInfo->rxsc = rxsc; ++#endif ++ pPhyInfo->RxPWDBAll = odm_QueryRxPwrPercentage(RxPower); /* RSSI in percentage */ ++ pPhyInfo->SignalQuality = signalQuality; /* signal quality */ ++ pPhyInfo->BandWidth = bandwidth; /* bandwidth */ ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("RxPWDBAll = %d, RxPower = %d, RecvSignalPower = %d\n", pPhyInfo->RxPWDBAll, pPhyInfo->RxPower, pPhyInfo->RecvSignalPower); ++ DbgPrint("SignalQuality = %d\n", pPhyInfo->SignalQuality); ++ DbgPrint("bBeamformed = %d, bMuPacket = %d, RxCount = %d\n", pPhyInfo->bBeamformed, pPhyInfo->bMuPacket, pPhyInfo->RxCount + 1); ++ DbgPrint("channel = %d, rxsc = %d, BandWidth = %d\n", channel, rxsc, bandwidth); ++ } ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType0( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ /* Type 0 is used for cck packet */ ++ ++ PPHY_STATUS_RPT_JAGUAR2_TYPE0 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE0)pPhyStatus; ++ u1Byte i, SQ = 0; ++ ++ /* Calculate Signal Quality*/ ++ if (pPktinfo->bPacketMatchBSSID) { ++ if (pPhyStaRpt->signal_quality >= 64) ++ SQ = 0; ++ else if (pPhyStaRpt->signal_quality <= 20) ++ SQ = 100; ++ else { ++ /* mapping to 2~99% */ ++ SQ = 64 - pPhyStaRpt->signal_quality; ++ SQ = ((SQ << 3) + SQ) >> 2; ++ } ++ } ++ ++ /* Update CCK packet counter */ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; ++ ++ /* Update Common information */ ++ phydm_SetCommonPhyInfo((pPhyStaRpt->pwdb - 110), pPhyStaRpt->channel, FALSE, ++ FALSE, ODM_BW20M, SQ, pPhyStaRpt->rxsc, pPhyInfo); ++ ++ /* Update CCK pwdb */ ++ phydm_SetPerPathPhyInfo(ODM_RF_PATH_A, (pPhyStaRpt->pwdb - 110), 0, 0, 0, pPhyInfo); /* Update per-path information */ ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("pwdb = 0x%x, MP gain index = 0x%x, TRSW = 0x%x\n", pPhyStaRpt->pwdb, pPhyStaRpt->gain, pPhyStaRpt->trsw); ++ DbgPrint("channel = %d, band = %d, rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->rxsc); ++ DbgPrint("agc_table = 0x%x, agc_rpt 0x%x, bb_power = 0x%x\n", pPhyStaRpt->agc_table, pPhyStaRpt->agc_rpt, pPhyStaRpt->bb_power); ++ DbgPrint("length = %d, SQ = %d\n", pPhyStaRpt->length, pPhyStaRpt->signal_quality); ++ DbgPrint("antidx a = 0x%x, b = 0x%x, c = 0x%x, d = 0x%x\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d); ++ DbgPrint("rsvd_0 = 0x%x, rsvd_1 = 0x%x, rsvd_2 = 0x%x\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2); ++ DbgPrint("rsvd_3 = 0x%x, rsvd_4 = 0x%x, rsvd_5 = 0x%x\n", pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5); ++ DbgPrint("rsvd_6 = 0x%x, rsvd_7 = 0x%x, rsvd_8 = 0x%x\n", pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7, pPhyStaRpt->rsvd_8); ++ } ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType1( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ /* Type 1 is used for ofdm packet */ ++ ++ PPHY_STATUS_RPT_JAGUAR2_TYPE1 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE1)pPhyStatus; ++ s1Byte rx_pwr_db = -120; ++ u1Byte i, rxsc, bw, RxCount = 0; ++ BOOLEAN bMU; ++ ++ /* Update OFDM packet counter */ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ /* Update per-path information */ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (pDM_Odm->RXAntStatus & BIT(i)) { ++ s1Byte rx_path_pwr_db; ++ ++ /* RX path counter */ ++ RxCount++; ++ ++ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */ ++ /* EVM report is reported by stream, not path */ ++ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */ ++ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, pPhyStaRpt->rxevm[RxCount - 1], ++ pPhyStaRpt->cfo_tail[i], pPhyStaRpt->rxsnr[i], pPhyInfo); ++ ++ /* search maximum pwdb */ ++ if (rx_path_pwr_db > rx_pwr_db) ++ rx_pwr_db = rx_path_pwr_db; ++ } ++ } ++ ++ /* mapping RX counter from 1~4 to 0~3 */ ++ if (RxCount > 0) ++ pPhyInfo->RxCount = RxCount - 1; ++ ++ /* Check if MU packet or not */ ++ if ((pPhyStaRpt->gid != 0) && (pPhyStaRpt->gid != 63)) { ++ bMU = TRUE; ++ pDM_Odm->PhyDbgInfo.NumQryMuPkt++; ++ } else ++ bMU = FALSE; ++ ++ /* Count BF packet */ ++ pDM_Odm->PhyDbgInfo.NumQryBfPkt = pDM_Odm->PhyDbgInfo.NumQryBfPkt + pPhyStaRpt->beamformed; ++ ++ /* Check sub-channel */ ++ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0)) ++ rxsc = pPhyStaRpt->l_rxsc; ++ else ++ rxsc = pPhyStaRpt->ht_rxsc; ++ ++ /* Check RX bandwidth */ ++ if ((rxsc >= 1) && (rxsc <= 8)) ++ bw = ODM_BW20M; ++ else if ((rxsc >= 9) && (rxsc <= 12)) ++ bw = ODM_BW40M; ++ else if (rxsc >= 13) ++ bw = ODM_BW80M; ++ else ++ bw = pPhyStaRpt->rf_mode; ++ ++ /* Update packet information */ ++ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed, ++ bMU, bw, odm_EVMdbToPercentage(pPhyStaRpt->rxevm[0]), rxsc, pPhyInfo); ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc, pPhyStaRpt->rf_mode); ++ DbgPrint("Antidx A = %d, B = %d, C = %d, D = %d\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d); ++ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]); ++ DbgPrint("EVM A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1], pPhyStaRpt->rxevm[2], pPhyStaRpt->rxevm[3]); ++ DbgPrint("SNR A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxsnr[0], pPhyStaRpt->rxsnr[1], pPhyStaRpt->rxsnr[2], pPhyStaRpt->rxsnr[3]); ++ DbgPrint("CFO A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->cfo_tail[0], pPhyStaRpt->cfo_tail[1], pPhyStaRpt->cfo_tail[2], pPhyStaRpt->cfo_tail[3]); ++ DbgPrint("paid = %d, gid = %d, length = %d\n", (pPhyStaRpt->paid + (pPhyStaRpt->paid_msb<<8)), pPhyStaRpt->gid, pPhyStaRpt->lsig_length); ++ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu); ++ DbgPrint("NBI: %d, pos: %d\n", pPhyStaRpt->nb_intf_flag, (pPhyStaRpt->intf_pos + (pPhyStaRpt->intf_pos_msb<<8))); ++ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5); ++ } ++ DbgPrint("phydm_GetRxPhyStatusType1 pPktinfo->bPacketMatchBSSID = %d\n", pPktinfo->bPacketMatchBSSID); ++ DbgPrint("pPktinfo->DataRate = 0x%x\n", pPktinfo->DataRate); ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType2( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ PPHY_STATUS_RPT_JAGUAR2_TYPE2 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE2)pPhyStatus; ++ s1Byte rx_pwr_db = -120; ++ u1Byte i, rxsc, bw, RxCount = 0; ++ ++ /* Update OFDM packet counter */ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ /* Update per-path information */ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (pDM_Odm->RXAntStatus & BIT(i)) { ++ s1Byte rx_path_pwr_db; ++ ++ /* RX path counter */ ++ RxCount++; ++ ++ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */ ++ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */ ++ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, 0, 0, 0, pPhyInfo); ++ ++ /* search maximum pwdb */ ++ if (rx_path_pwr_db > rx_pwr_db) ++ rx_pwr_db = rx_path_pwr_db; ++ } ++ } ++ ++ /* mapping RX counter from 1~4 to 0~3 */ ++ if (RxCount > 0) ++ pPhyInfo->RxCount = RxCount - 1; ++ ++ /* Check RX sub-channel */ ++ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0)) ++ rxsc = pPhyStaRpt->l_rxsc; ++ else ++ rxsc = pPhyStaRpt->ht_rxsc; ++ ++ /* Check RX bandwidth */ ++ /* the BW information of sc=0 is useless, because there is no information of RF mode*/ ++ if ((rxsc >= 1) && (rxsc <= 8)) ++ bw = ODM_BW20M; ++ else if ((rxsc >= 9) && (rxsc <= 12)) ++ bw = ODM_BW40M; ++ else if (rxsc >= 13) ++ bw = ODM_BW80M; ++ else ++ bw = ODM_BW20M; ++ ++ /* Update packet information */ ++ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed, ++ FALSE, bw, 0, rxsc, pPhyInfo); ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc); ++ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]); ++ DbgPrint("Agc table A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->agc_table_a, pPhyStaRpt->agc_table_b, pPhyStaRpt->agc_table_c, pPhyStaRpt->agc_table_d); ++ DbgPrint("Gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->gain_a, pPhyStaRpt->gain_b, pPhyStaRpt->gain_c, pPhyStaRpt->gain_d); ++ DbgPrint("TRSW A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->trsw_a, pPhyStaRpt->trsw_b, pPhyStaRpt->trsw_c, pPhyStaRpt->trsw_d); ++ DbgPrint("AAGC step A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->aagc_step_a, pPhyStaRpt->aagc_step_b, pPhyStaRpt->aagc_step_c, pPhyStaRpt->aagc_step_d); ++ DbgPrint("HT AAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->ht_aagc_gain[0], pPhyStaRpt->ht_aagc_gain[1], pPhyStaRpt->ht_aagc_gain[2], pPhyStaRpt->ht_aagc_gain[3]); ++ DbgPrint("DAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->dagc_gain[0], pPhyStaRpt->dagc_gain[1], pPhyStaRpt->dagc_gain[2], pPhyStaRpt->dagc_gain[3]); ++ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu); ++ DbgPrint("counter: %d, syn_count: %d\n", pPhyStaRpt->counter, pPhyStaRpt->syn_count); ++ DbgPrint("cnt_cca2agc_rdy: %d, cnt_pw2cca: %d, shift_l_map\n", pPhyStaRpt->cnt_cca2agc_rdy, pPhyStaRpt->cnt_pw2cca, pPhyStaRpt->shift_l_map); ++ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4); ++ DbgPrint("rsvd_5 = %d, rsvd_6 = %d, rsvd_6 = %d\n", pPhyStaRpt->rsvd_5, pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7); ++ } ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType5( ++ IN pu1Byte pPhyStatus ++) ++{ ++/* ++ DbgPrint("DW0: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 3), *(pPhyStatus + 2), *(pPhyStatus + 1), *(pPhyStatus + 0)); ++ DbgPrint("DW1: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 7), *(pPhyStatus + 6), *(pPhyStatus + 5), *(pPhyStatus + 4)); ++ DbgPrint("DW2: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 11), *(pPhyStatus + 10), *(pPhyStatus + 9), *(pPhyStatus + 8)); ++ DbgPrint("DW3: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 15), *(pPhyStatus + 14), *(pPhyStatus + 13), *(pPhyStatus + 12)); ++ DbgPrint("DW4: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 19), *(pPhyStatus + 18), *(pPhyStatus + 17), *(pPhyStatus + 16)); ++ DbgPrint("DW5: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 23), *(pPhyStatus + 22), *(pPhyStatus + 21), *(pPhyStatus + 20)); ++ DbgPrint("DW6: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 27), *(pPhyStatus + 26), *(pPhyStatus + 25), *(pPhyStatus + 24)); ++*/ ++} ++ ++VOID ++phydm_Process_RSSIForDM_Jaguar2( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN PODM_PHY_INFO_T pPhyInfo, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ u4Byte UndecoratedSmoothedPWDB, RSSI_Ave; ++ u1Byte i; ++ PSTA_INFO_T pEntry; ++ ++ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM) ++ return; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; ++ ++ if (!IS_STA_VALID(pEntry)) ++ return; ++ ++ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ ++ return; ++ ++ if (pPktinfo->bPacketBeacon) ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; ++ ++ if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { ++ u4Byte RSSI_linear = 0; ++ ++ UndecoratedSmoothedPWDB = (u4Byte)pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]; ++ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]; ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (pPhyInfo->RxMIMOSignalStrength[i] != 0) ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[i]); ++ } ++ ++ switch (pPhyInfo->RxCount + 1) { ++ case 2: ++ RSSI_linear = (RSSI_linear >> 1); ++ break; ++ case 3: ++ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */ ++ break; ++ case 4: ++ RSSI_linear = (RSSI_linear >> 2); ++ break; ++ } ++ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear); ++ ++ if (UndecoratedSmoothedPWDB <= 0) ++ UndecoratedSmoothedPWDB = pPhyInfo->RxPWDBAll; ++ else ++ UndecoratedSmoothedPWDB = (RSSI_Ave + ((UndecoratedSmoothedPWDB<<4) - UndecoratedSmoothedPWDB))>>4; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1) ++ phydm_ra_rssi_rpt_wk(pDM_Odm); ++ #endif ++ ++ pEntry->rssi_stat.UndecoratedSmoothedPWDB = (s4Byte)UndecoratedSmoothedPWDB; ++ } ++} ++ ++VOID ++phydm_RxPhyStatusJaguarSeries2( ++ IN PDM_ODM_T pPhydm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ u1Byte phy_status_type = (*pPhyStatus & 0xf); ++ ++ /*DbgPrint("phydm_RxPhyStatusJaguarSeries2================> (page: %d)\n", phy_status_type);*/ ++ ++ /* Memory reset */ ++ phydm_ResetPhyInfo(pPhydm, pPhyInfo); ++ ++ /* Phy status parsing */ ++ switch (phy_status_type) { ++ case 0: ++ { ++ phydm_GetRxPhyStatusType0(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); ++ break; ++ } ++ case 1: ++ { ++ phydm_GetRxPhyStatusType1(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); ++ break; ++ } ++ case 2: ++ { ++ phydm_GetRxPhyStatusType2(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); ++ break; ++ } ++ case 5: ++ { ++ phydm_GetRxPhyStatusType5(pPhyStatus); ++ return; ++ } ++ default: ++ return; ++ } ++ ++ /* Update signal strength to UI, and pPhyInfo->RxPWDBAll is the maximum RSSI of all path */ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pPhyInfo->SignalStrength = SignalScaleProc(pPhydm->Adapter, pPhyInfo->RxPWDBAll, FALSE, FALSE); ++#else ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pPhydm, pPhyInfo->RxPWDBAll)); ++#endif ++ ++ /* Calculate average RSSI and smoothed RSSI */ ++ phydm_Process_RSSIForDM_Jaguar2(pPhydm, pPhyInfo, pPktinfo); ++ ++} ++/*==============================================*/ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_hwconfig.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_hwconfig.h new file mode 100644 -index 000000000..2fb26401e +index 0000000..e56f1c2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_hwconfig.h @@ -0,0 +1,506 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ -+#ifndef __HALHWOUTSRC_H__ -+#define __HALHWOUTSRC_H__ -+ -+ -+/*--------------------------Define -------------------------------------------*/ -+ -+#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \ -+ sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) -+#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \ -+ sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) -+ -+#define AGC_DIFF_CONFIG(ic, band) do {\ -+ if (pDM_Odm->bIsMPChip)\ -+ AGC_DIFF_CONFIG_MP(ic,band);\ -+ else\ -+ AGC_DIFF_CONFIG_TC(ic,band);\ -+ } while(0) -+ -+ -+//============================================================ -+// structure and define -+//============================================================ -+ -+__PACK typedef struct _Phy_Rx_AGC_Info -+{ -+ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte gain:7,trsw:1; -+ #else -+ u1Byte trsw:1,gain:7; -+ #endif -+} __WLAN_ATTRIB_PACK__ PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T; -+ -+__PACK typedef struct _Phy_Status_Rpt_8192cd { -+ PHY_RX_AGC_INFO_T path_agc[2]; -+ u1Byte ch_corr[2]; -+ u1Byte cck_sig_qual_ofdm_pwdb_all; -+ u1Byte cck_agc_rpt_ofdm_cfosho_a; -+ u1Byte cck_rpt_b_ofdm_cfosho_b; -+ u1Byte rsvd_1;/*ch_corr_msb;*/ -+ u1Byte noise_power_db_msb; -+ s1Byte path_cfotail[2]; -+ u1Byte pcts_mask[2]; -+ s1Byte stream_rxevm[2]; -+ u1Byte path_rxsnr[2]; -+ u1Byte noise_power_db_lsb; -+ u1Byte rsvd_2[3]; -+ u1Byte stream_csi[2]; -+ u1Byte stream_target_csi[2]; -+ s1Byte sig_evm; -+ u1Byte rsvd_3; -+ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte antsel_rx_keep_2: 1; /*ex_intf_flg:1;*/ -+ u1Byte sgi_en: 1; -+ u1Byte rxsc: 2; -+ u1Byte idle_long: 1; -+ u1Byte r_ant_train_en: 1; -+ u1Byte ant_sel_b: 1; -+ u1Byte ant_sel: 1; -+#else /*_BIG_ENDIAN_ */ -+ u1Byte ant_sel: 1; -+ u1Byte ant_sel_b: 1; -+ u1Byte r_ant_train_en: 1; -+ u1Byte idle_long: 1; -+ u1Byte rxsc: 2; -+ u1Byte sgi_en: 1; -+ u1Byte antsel_rx_keep_2: 1;/*ex_intf_flg:1;*/ -+#endif -+} __WLAN_ATTRIB_PACK__ PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T; -+ -+ -+typedef struct _Phy_Status_Rpt_8812 { -+/* DWORD 0*/ -+ u1Byte gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/ -+ u1Byte chl_num_LSB; /*channel number[7:0]*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte chl_num_MSB: 2; /*channel number[9:8]*/ -+ u1Byte sub_chnl: 4; /*sub-channel location[3:0]*/ -+ u1Byte r_RFMOD: 2; /*RF mode[1:0]*/ -+#else /*_BIG_ENDIAN_ */ -+ u1Byte r_RFMOD: 2; -+ u1Byte sub_chnl: 4; -+ u1Byte chl_num_MSB: 2; -+#endif -+ -+/* DWORD 1*/ -+ u1Byte pwdb_all; /*CCK signal quality / OFDM pwdb all*/ -+ s1Byte cfosho[2]; /*DW1 byte 1 DW1 byte2 CCK AGC report and CCK_BB_Power / OFDM Path-A and Path-B short CFO*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ /*this should be checked again because the definition of 8812 and 8814 is different*/ -+/* u1Byte r_cck_rx_enable_pathc:2; cck rx enable pathc[1:0]*/ -+/* u1Byte cck_rx_path:4; cck rx path[3:0]*/ -+ u1Byte resvd_0: 6; -+ u1Byte bt_RF_ch_MSB: 2; /*8812A:2'b0 8814A: bt rf channel keep[7:6]*/ -+#else /*_BIG_ENDIAN_*/ -+ u1Byte bt_RF_ch_MSB: 2; -+ u1Byte resvd_0: 6; -+#endif -+ -+/* DWORD 2*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte ant_div_sw_a: 1; /*8812A: ant_div_sw_a 8814A: 1'b0*/ -+ u1Byte ant_div_sw_b: 1; /*8812A: ant_div_sw_b 8814A: 1'b0*/ -+ u1Byte bt_RF_ch_LSB: 6; /*8812A: 6'b0 8814A: bt rf channel keep[5:0]*/ -+#else /*_BIG_ENDIAN_ */ -+ u1Byte bt_RF_ch_LSB: 6; -+ u1Byte ant_div_sw_b: 1; -+ u1Byte ant_div_sw_a: 1; -+#endif -+ s1Byte cfotail[2]; /*DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/ -+ u1Byte PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/ -+ u1Byte PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/ -+ -+/* DWORD 3*/ -+ s1Byte rxevm[2]; /*DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/ -+ s1Byte rxsnr[2]; /*DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/ -+ -+/* DWORD 4*/ -+ u1Byte PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte PCTS_MSK_RPT_3: 6; /*PCTS mask report[29:24]*/ -+ u1Byte pcts_rpt_valid: 1; /*pcts_rpt_valid*/ -+ u1Byte resvd_1: 1; /*1'b0*/ -+#else /*_BIG_ENDIAN_*/ -+ u1Byte resvd_1: 1; -+ u1Byte pcts_rpt_valid: 1; -+ u1Byte PCTS_MSK_RPT_3: 6; -+#endif -+ s1Byte rxevm_cd[2]; /*DW 4 byte 3 DW5 byte 0 8812A: 16'b0 8814A: stream 3 and stream 4 RX EVM*/ -+ -+/* DWORD 5*/ -+ u1Byte csi_current[2]; /*DW5 byte 1 DW5 byte 2 8812A: stream 1 and 2 CSI 8814A: path-C and path-D RX SNR*/ -+ u1Byte gain_trsw_cd[2]; /*DW5 byte 3 DW6 byte 0 path-C and path-D {TRSW, gain[6:0] }*/ -+ -+/* DWORD 6*/ -+ s1Byte sigevm; /*signal field EVM*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte antidx_antc: 3; /*8812A: 3'b0 8814A: antidx_antc[2:0]*/ -+ u1Byte antidx_antd: 3; /*8812A: 3'b0 8814A: antidx_antd[2:0]*/ -+ u1Byte dpdt_ctrl_keep: 1; /*8812A: 1'b0 8814A: dpdt_ctrl_keep*/ -+ u1Byte GNT_BT_keep: 1; /*8812A: 1'b0 8814A: GNT_BT_keep*/ -+#else /*_BIG_ENDIAN_*/ -+ u1Byte GNT_BT_keep: 1; -+ u1Byte dpdt_ctrl_keep: 1; -+ u1Byte antidx_antd: 3; -+ u1Byte antidx_antc: 3; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte antidx_anta: 3; /*antidx_anta[2:0]*/ -+ u1Byte antidx_antb: 3; /*antidx_antb[2:0]*/ -+ u1Byte hw_antsw_occur: 2; /*1'b0*/ -+#else /*_BIG_ENDIAN_*/ -+ u1Byte hw_antsw_occur: 2; -+ u1Byte antidx_antb: 3; -+ u1Byte antidx_anta: 3; -+#endif -+} PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T; -+ -+VOID -+odm_Init_RSSIForDM( -+ IN OUT PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+ODM_PhyStatusQuery( -+ IN OUT PDM_ODM_T pDM_Odm, -+ OUT PODM_PHY_INFO_T pPhyInfo, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo -+ ); -+ -+VOID -+ODM_MacStatusQuery( -+ IN OUT PDM_ODM_T pDM_Odm, -+ IN pu1Byte pMacStatus, -+ IN u1Byte MacID, -+ IN BOOLEAN bPacketMatchBSSID, -+ IN BOOLEAN bPacketToSelf, -+ IN BOOLEAN bPacketBeacon -+ ); -+ -+HAL_STATUS -+ODM_ConfigRFWithTxPwrTrackHeaderFile( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+HAL_STATUS -+ODM_ConfigRFWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_RF_Config_Type ConfigType, -+ IN ODM_RF_RADIO_PATH_E eRFPath -+ ); -+ -+HAL_STATUS -+ODM_ConfigBBWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_BB_Config_Type ConfigType -+ ); -+ -+HAL_STATUS -+ODM_ConfigMACWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+HAL_STATUS -+ODM_ConfigFWWithHeaderFile( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_FW_Config_Type ConfigType, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pSize -+ ); -+ -+u4Byte -+ODM_GetHWImgVersion( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+s4Byte -+odm_SignalScaleMapping( -+ IN OUT PDM_ODM_T pDM_Odm, -+ IN s4Byte CurrSig -+ ); -+ -+#if (RTL8822B_SUPPORT == 1) -+/*For 8822B only!! need to move to FW finally */ -+/*==============================================*/ -+VOID -+phydm_RxPhyStatusJaguarSeries2( -+ IN PDM_ODM_T pPhydm, -+ IN pu1Byte pPhyStatus, -+ IN PODM_PACKET_INFO_T pPktinfo, -+ OUT PODM_PHY_INFO_T pPhyInfo -+); -+ -+typedef struct _Phy_Status_Rpt_Jaguar2_Type0 { -+ /* DW0 */ -+ u1Byte page_num; -+ u1Byte pwdb; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte gain: 6; -+ u1Byte rsvd_0: 1; -+ u1Byte trsw: 1; -+#else -+ u1Byte trsw: 1; -+ u1Byte rsvd_0: 1; -+ u1Byte gain: 6; -+#endif -+ u1Byte rsvd_1; -+ -+ /* DW1 */ -+ u1Byte rsvd_2; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte rxsc: 4; -+ u1Byte agc_table: 4; -+#else -+ u1Byte agc_table: 4; -+ u1Byte rxsc: 4; -+#endif -+ u1Byte channel; -+ u1Byte band; -+ -+ /* DW2 */ -+ u2Byte length; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte antidx_a: 3; -+ u1Byte antidx_b: 3; -+ u1Byte rsvd_3: 2; -+ u1Byte antidx_c: 3; -+ u1Byte antidx_d: 3; -+ u1Byte rsvd_4:2; -+#else -+ u1Byte rsvd_3: 2; -+ u1Byte antidx_b: 3; -+ u1Byte antidx_a: 3; -+ u1Byte rsvd_4:2; -+ u1Byte antidx_d: 3; -+ u1Byte antidx_c: 3; -+#endif -+ -+ /* DW3 */ -+ u1Byte signal_quality; -+ u1Byte agc_rpt; -+ u1Byte bb_power; -+ u1Byte rsvd_5; -+ -+ /* DW4 */ -+ u4Byte rsvd_6; -+ -+ /* DW5 */ -+ u4Byte rsvd_7; -+ -+ /* DW6 */ -+ u4Byte rsvd_8; -+} PHY_STATUS_RPT_JAGUAR2_TYPE0, *PPHY_STATUS_RPT_JAGUAR2_TYPE0; -+ -+typedef struct _Phy_Status_Rpt_Jaguar2_Type1 { -+ /* DW0 and DW1 */ -+ u1Byte page_num; -+ u1Byte pwdb[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte l_rxsc: 4; -+ u1Byte ht_rxsc: 4; -+#else -+ u1Byte ht_rxsc: 4; -+ u1Byte l_rxsc: 4; -+#endif -+ u1Byte channel; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte band: 2; -+ u1Byte rsvd_0: 1; -+ u1Byte hw_antsw_occu: 1; -+ u1Byte gnt_bt: 1; -+ u1Byte ldpc: 1; -+ u1Byte stbc: 1; -+ u1Byte beamformed: 1; -+#else -+ u1Byte beamformed: 1; -+ u1Byte stbc: 1; -+ u1Byte ldpc: 1; -+ u1Byte gnt_bt: 1; -+ u1Byte hw_antsw_occu: 1; -+ u1Byte rsvd_0: 1; -+ u1Byte band: 2; -+#endif -+ -+ /* DW2 */ -+ u2Byte lsig_length; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte antidx_a: 3; -+ u1Byte antidx_b: 3; -+ u1Byte rsvd_1: 2; -+ u1Byte antidx_c: 3; -+ u1Byte antidx_d: 3; -+ u1Byte rsvd_2: 2; -+#else -+ u1Byte rsvd_1: 2; -+ u1Byte antidx_b: 3; -+ u1Byte antidx_a: 3; -+ u1Byte rsvd_2: 2; -+ u1Byte antidx_d: 3; -+ u1Byte antidx_c: 3; -+#endif -+ -+ /* DW3 */ -+ u1Byte paid; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte paid_msb: 1; -+ u1Byte gid: 6; -+ u1Byte rsvd_3: 1; -+#else -+ u1Byte rsvd_3: 1; -+ u1Byte gid: 6; -+ u1Byte paid_msb: 1; -+#endif -+ u1Byte intf_pos; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte intf_pos_msb: 1; -+ u1Byte rsvd_4: 2; -+ u1Byte nb_intf_flag: 1; -+ u1Byte rf_mode: 2; -+ u1Byte rsvd_5: 2; -+#else -+ u1Byte rsvd_5: 2; -+ u1Byte rf_mode: 2; -+ u1Byte nb_intf_flag: 1; -+ u1Byte rsvd_4: 2; -+ u1Byte intf_pos_msb: 1; -+#endif -+ -+ /* DW4 */ -+ s1Byte rxevm[4]; /* s(8,1) */ -+ -+ /* DW5 */ -+ s1Byte cfo_tail[4]; /* s(8,7) */ -+ -+ /* DW6 */ -+ s1Byte rxsnr[4]; /* s(8,1) */ -+} PHY_STATUS_RPT_JAGUAR2_TYPE1, *PPHY_STATUS_RPT_JAGUAR2_TYPE1; -+ -+typedef struct _Phy_Status_Rpt_Jaguar2_Type2 { -+ /* DW0 ane DW1 */ -+ u1Byte page_num; -+ u1Byte pwdb[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte l_rxsc: 4; -+ u1Byte ht_rxsc: 4; -+#else -+ u1Byte ht_rxsc: 4; -+ u1Byte l_rxsc: 4; -+#endif -+ u1Byte channel; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte band: 2; -+ u1Byte rsvd_0: 1; -+ u1Byte hw_antsw_occu: 1; -+ u1Byte gnt_bt: 1; -+ u1Byte ldpc: 1; -+ u1Byte stbc: 1; -+ u1Byte beamformed: 1; -+#else -+ u1Byte beamformed: 1; -+ u1Byte stbc: 1; -+ u1Byte ldpc: 1; -+ u1Byte gnt_bt: 1; -+ u1Byte hw_antsw_occu: 1; -+ u1Byte rsvd_0: 1; -+ u1Byte band: 2; -+#endif -+ -+ /* DW2 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte shift_l_map: 6; -+ u1Byte rsvd_1: 2; -+#else -+ u1Byte rsvd_1: 2; -+ u1Byte shift_l_map: 6; -+#endif -+ u1Byte cnt_pw2cca; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte agc_table_a: 4; -+ u1Byte agc_table_b: 4; -+ u1Byte agc_table_c: 4; -+ u1Byte agc_table_d: 4; -+#else -+ u1Byte agc_table_b: 4; -+ u1Byte agc_table_a: 4; -+ u1Byte agc_table_d: 4; -+ u1Byte agc_table_c: 4; -+#endif -+ -+ /* DW3 ~ DW6*/ -+ u1Byte cnt_cca2agc_rdy; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte gain_a: 6; -+ u1Byte rsvd_2: 1; -+ u1Byte trsw_a: 1; -+ u1Byte gain_b: 6; -+ u1Byte rsvd_3: 1; -+ u1Byte trsw_b: 1; -+ u1Byte gain_c: 6; -+ u1Byte rsvd_4: 1; -+ u1Byte trsw_c: 1; -+ u1Byte gain_d: 6; -+ u1Byte rsvd_5: 1; -+ u1Byte trsw_d: 1; -+ u1Byte aagc_step_a: 2; -+ u1Byte aagc_step_b: 2; -+ u1Byte aagc_step_c: 2; -+ u1Byte aagc_step_d: 2; -+#else -+ u1Byte trsw_a: 1; -+ u1Byte rsvd_2: 1; -+ u1Byte gain_a: 6; -+ u1Byte trsw_b: 1; -+ u1Byte rsvd_3: 1; -+ u1Byte gain_b: 6; -+ u1Byte trsw_c: 1; -+ u1Byte rsvd_4: 1; -+ u1Byte gain_c: 6; -+ u1Byte trsw_d: 1; -+ u1Byte rsvd_5: 1; -+ u1Byte gain_d: 6; -+ u1Byte aagc_step_d: 2; -+ u1Byte aagc_step_c: 2; -+ u1Byte aagc_step_b: 2; -+ u1Byte aagc_step_a: 2; -+#endif -+ u1Byte ht_aagc_gain[4]; -+ u1Byte dagc_gain[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u1Byte counter: 6; -+ u1Byte rsvd_6: 2; -+ u1Byte syn_count: 5; -+ u1Byte rsvd_7:3; -+#else -+ u1Byte rsvd_6: 2; -+ u1Byte counter: 6; -+ u1Byte rsvd_7:3; -+ u1Byte syn_count: 5; -+#endif -+} PHY_STATUS_RPT_JAGUAR2_TYPE2, *PPHY_STATUS_RPT_JAGUAR2_TYPE2; -+/*==============================================*/ -+#endif -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __HALHWOUTSRC_H__ ++#define __HALHWOUTSRC_H__ ++ ++ ++/*--------------------------Define -------------------------------------------*/ ++ ++#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \ ++ sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) ++#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \ ++ sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) ++ ++#define AGC_DIFF_CONFIG(ic, band) do {\ ++ if (pDM_Odm->bIsMPChip)\ ++ AGC_DIFF_CONFIG_MP(ic,band);\ ++ else\ ++ AGC_DIFF_CONFIG_TC(ic,band);\ ++ } while(0) ++ ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++__PACK typedef struct _Phy_Rx_AGC_Info ++{ ++ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte gain:7,trsw:1; ++ #else ++ u1Byte trsw:1,gain:7; ++ #endif ++} __WLAN_ATTRIB_PACK__ PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T; ++ ++__PACK typedef struct _Phy_Status_Rpt_8192cd { ++ PHY_RX_AGC_INFO_T path_agc[2]; ++ u1Byte ch_corr[2]; ++ u1Byte cck_sig_qual_ofdm_pwdb_all; ++ u1Byte cck_agc_rpt_ofdm_cfosho_a; ++ u1Byte cck_rpt_b_ofdm_cfosho_b; ++ u1Byte rsvd_1;/*ch_corr_msb;*/ ++ u1Byte noise_power_db_msb; ++ s1Byte path_cfotail[2]; ++ u1Byte pcts_mask[2]; ++ s1Byte stream_rxevm[2]; ++ u1Byte path_rxsnr[2]; ++ u1Byte noise_power_db_lsb; ++ u1Byte rsvd_2[3]; ++ u1Byte stream_csi[2]; ++ u1Byte stream_target_csi[2]; ++ s1Byte sig_evm; ++ u1Byte rsvd_3; ++ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antsel_rx_keep_2: 1; /*ex_intf_flg:1;*/ ++ u1Byte sgi_en: 1; ++ u1Byte rxsc: 2; ++ u1Byte idle_long: 1; ++ u1Byte r_ant_train_en: 1; ++ u1Byte ant_sel_b: 1; ++ u1Byte ant_sel: 1; ++#else /*_BIG_ENDIAN_ */ ++ u1Byte ant_sel: 1; ++ u1Byte ant_sel_b: 1; ++ u1Byte r_ant_train_en: 1; ++ u1Byte idle_long: 1; ++ u1Byte rxsc: 2; ++ u1Byte sgi_en: 1; ++ u1Byte antsel_rx_keep_2: 1;/*ex_intf_flg:1;*/ ++#endif ++} __WLAN_ATTRIB_PACK__ PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T; ++ ++ ++typedef struct _Phy_Status_Rpt_8812 { ++/* DWORD 0*/ ++ u1Byte gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/ ++ u1Byte chl_num_LSB; /*channel number[7:0]*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte chl_num_MSB: 2; /*channel number[9:8]*/ ++ u1Byte sub_chnl: 4; /*sub-channel location[3:0]*/ ++ u1Byte r_RFMOD: 2; /*RF mode[1:0]*/ ++#else /*_BIG_ENDIAN_ */ ++ u1Byte r_RFMOD: 2; ++ u1Byte sub_chnl: 4; ++ u1Byte chl_num_MSB: 2; ++#endif ++ ++/* DWORD 1*/ ++ u1Byte pwdb_all; /*CCK signal quality / OFDM pwdb all*/ ++ s1Byte cfosho[2]; /*DW1 byte 1 DW1 byte2 CCK AGC report and CCK_BB_Power / OFDM Path-A and Path-B short CFO*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ /*this should be checked again because the definition of 8812 and 8814 is different*/ ++/* u1Byte r_cck_rx_enable_pathc:2; cck rx enable pathc[1:0]*/ ++/* u1Byte cck_rx_path:4; cck rx path[3:0]*/ ++ u1Byte resvd_0: 6; ++ u1Byte bt_RF_ch_MSB: 2; /*8812A:2'b0 8814A: bt rf channel keep[7:6]*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte bt_RF_ch_MSB: 2; ++ u1Byte resvd_0: 6; ++#endif ++ ++/* DWORD 2*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte ant_div_sw_a: 1; /*8812A: ant_div_sw_a 8814A: 1'b0*/ ++ u1Byte ant_div_sw_b: 1; /*8812A: ant_div_sw_b 8814A: 1'b0*/ ++ u1Byte bt_RF_ch_LSB: 6; /*8812A: 6'b0 8814A: bt rf channel keep[5:0]*/ ++#else /*_BIG_ENDIAN_ */ ++ u1Byte bt_RF_ch_LSB: 6; ++ u1Byte ant_div_sw_b: 1; ++ u1Byte ant_div_sw_a: 1; ++#endif ++ s1Byte cfotail[2]; /*DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/ ++ u1Byte PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/ ++ u1Byte PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/ ++ ++/* DWORD 3*/ ++ s1Byte rxevm[2]; /*DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/ ++ s1Byte rxsnr[2]; /*DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/ ++ ++/* DWORD 4*/ ++ u1Byte PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte PCTS_MSK_RPT_3: 6; /*PCTS mask report[29:24]*/ ++ u1Byte pcts_rpt_valid: 1; /*pcts_rpt_valid*/ ++ u1Byte resvd_1: 1; /*1'b0*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte resvd_1: 1; ++ u1Byte pcts_rpt_valid: 1; ++ u1Byte PCTS_MSK_RPT_3: 6; ++#endif ++ s1Byte rxevm_cd[2]; /*DW 4 byte 3 DW5 byte 0 8812A: 16'b0 8814A: stream 3 and stream 4 RX EVM*/ ++ ++/* DWORD 5*/ ++ u1Byte csi_current[2]; /*DW5 byte 1 DW5 byte 2 8812A: stream 1 and 2 CSI 8814A: path-C and path-D RX SNR*/ ++ u1Byte gain_trsw_cd[2]; /*DW5 byte 3 DW6 byte 0 path-C and path-D {TRSW, gain[6:0] }*/ ++ ++/* DWORD 6*/ ++ s1Byte sigevm; /*signal field EVM*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_antc: 3; /*8812A: 3'b0 8814A: antidx_antc[2:0]*/ ++ u1Byte antidx_antd: 3; /*8812A: 3'b0 8814A: antidx_antd[2:0]*/ ++ u1Byte dpdt_ctrl_keep: 1; /*8812A: 1'b0 8814A: dpdt_ctrl_keep*/ ++ u1Byte GNT_BT_keep: 1; /*8812A: 1'b0 8814A: GNT_BT_keep*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte GNT_BT_keep: 1; ++ u1Byte dpdt_ctrl_keep: 1; ++ u1Byte antidx_antd: 3; ++ u1Byte antidx_antc: 3; ++#endif ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_anta: 3; /*antidx_anta[2:0]*/ ++ u1Byte antidx_antb: 3; /*antidx_antb[2:0]*/ ++ u1Byte hw_antsw_occur: 2; /*1'b0*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte hw_antsw_occur: 2; ++ u1Byte antidx_antb: 3; ++ u1Byte antidx_anta: 3; ++#endif ++} PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T; ++ ++VOID ++odm_Init_RSSIForDM( ++ IN OUT PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_PhyStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ); ++ ++VOID ++ODM_MacStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN pu1Byte pMacStatus, ++ IN u1Byte MacID, ++ IN BOOLEAN bPacketMatchBSSID, ++ IN BOOLEAN bPacketToSelf, ++ IN BOOLEAN bPacketBeacon ++ ); ++ ++HAL_STATUS ++ODM_ConfigRFWithTxPwrTrackHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++HAL_STATUS ++ODM_ConfigRFWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_Config_Type ConfigType, ++ IN ODM_RF_RADIO_PATH_E eRFPath ++ ); ++ ++HAL_STATUS ++ODM_ConfigBBWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_BB_Config_Type ConfigType ++ ); ++ ++HAL_STATUS ++ODM_ConfigMACWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++HAL_STATUS ++ODM_ConfigFWWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_FW_Config_Type ConfigType, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pSize ++ ); ++ ++u4Byte ++ODM_GetHWImgVersion( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++s4Byte ++odm_SignalScaleMapping( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN s4Byte CurrSig ++ ); ++ ++#if (RTL8822B_SUPPORT == 1) ++/*For 8822B only!! need to move to FW finally */ ++/*==============================================*/ ++VOID ++phydm_RxPhyStatusJaguarSeries2( ++ IN PDM_ODM_T pPhydm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++); ++ ++typedef struct _Phy_Status_Rpt_Jaguar2_Type0 { ++ /* DW0 */ ++ u1Byte page_num; ++ u1Byte pwdb; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte gain: 6; ++ u1Byte rsvd_0: 1; ++ u1Byte trsw: 1; ++#else ++ u1Byte trsw: 1; ++ u1Byte rsvd_0: 1; ++ u1Byte gain: 6; ++#endif ++ u1Byte rsvd_1; ++ ++ /* DW1 */ ++ u1Byte rsvd_2; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte rxsc: 4; ++ u1Byte agc_table: 4; ++#else ++ u1Byte agc_table: 4; ++ u1Byte rxsc: 4; ++#endif ++ u1Byte channel; ++ u1Byte band; ++ ++ /* DW2 */ ++ u2Byte length; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_a: 3; ++ u1Byte antidx_b: 3; ++ u1Byte rsvd_3: 2; ++ u1Byte antidx_c: 3; ++ u1Byte antidx_d: 3; ++ u1Byte rsvd_4:2; ++#else ++ u1Byte rsvd_3: 2; ++ u1Byte antidx_b: 3; ++ u1Byte antidx_a: 3; ++ u1Byte rsvd_4:2; ++ u1Byte antidx_d: 3; ++ u1Byte antidx_c: 3; ++#endif ++ ++ /* DW3 */ ++ u1Byte signal_quality; ++ u1Byte agc_rpt; ++ u1Byte bb_power; ++ u1Byte rsvd_5; ++ ++ /* DW4 */ ++ u4Byte rsvd_6; ++ ++ /* DW5 */ ++ u4Byte rsvd_7; ++ ++ /* DW6 */ ++ u4Byte rsvd_8; ++} PHY_STATUS_RPT_JAGUAR2_TYPE0, *PPHY_STATUS_RPT_JAGUAR2_TYPE0; ++ ++typedef struct _Phy_Status_Rpt_Jaguar2_Type1 { ++ /* DW0 and DW1 */ ++ u1Byte page_num; ++ u1Byte pwdb[4]; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte l_rxsc: 4; ++ u1Byte ht_rxsc: 4; ++#else ++ u1Byte ht_rxsc: 4; ++ u1Byte l_rxsc: 4; ++#endif ++ u1Byte channel; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte band: 2; ++ u1Byte rsvd_0: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte ldpc: 1; ++ u1Byte stbc: 1; ++ u1Byte beamformed: 1; ++#else ++ u1Byte beamformed: 1; ++ u1Byte stbc: 1; ++ u1Byte ldpc: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte rsvd_0: 1; ++ u1Byte band: 2; ++#endif ++ ++ /* DW2 */ ++ u2Byte lsig_length; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_a: 3; ++ u1Byte antidx_b: 3; ++ u1Byte rsvd_1: 2; ++ u1Byte antidx_c: 3; ++ u1Byte antidx_d: 3; ++ u1Byte rsvd_2: 2; ++#else ++ u1Byte rsvd_1: 2; ++ u1Byte antidx_b: 3; ++ u1Byte antidx_a: 3; ++ u1Byte rsvd_2: 2; ++ u1Byte antidx_d: 3; ++ u1Byte antidx_c: 3; ++#endif ++ ++ /* DW3 */ ++ u1Byte paid; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte paid_msb: 1; ++ u1Byte gid: 6; ++ u1Byte rsvd_3: 1; ++#else ++ u1Byte rsvd_3: 1; ++ u1Byte gid: 6; ++ u1Byte paid_msb: 1; ++#endif ++ u1Byte intf_pos; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte intf_pos_msb: 1; ++ u1Byte rsvd_4: 2; ++ u1Byte nb_intf_flag: 1; ++ u1Byte rf_mode: 2; ++ u1Byte rsvd_5: 2; ++#else ++ u1Byte rsvd_5: 2; ++ u1Byte rf_mode: 2; ++ u1Byte nb_intf_flag: 1; ++ u1Byte rsvd_4: 2; ++ u1Byte intf_pos_msb: 1; ++#endif ++ ++ /* DW4 */ ++ s1Byte rxevm[4]; /* s(8,1) */ ++ ++ /* DW5 */ ++ s1Byte cfo_tail[4]; /* s(8,7) */ ++ ++ /* DW6 */ ++ s1Byte rxsnr[4]; /* s(8,1) */ ++} PHY_STATUS_RPT_JAGUAR2_TYPE1, *PPHY_STATUS_RPT_JAGUAR2_TYPE1; ++ ++typedef struct _Phy_Status_Rpt_Jaguar2_Type2 { ++ /* DW0 ane DW1 */ ++ u1Byte page_num; ++ u1Byte pwdb[4]; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte l_rxsc: 4; ++ u1Byte ht_rxsc: 4; ++#else ++ u1Byte ht_rxsc: 4; ++ u1Byte l_rxsc: 4; ++#endif ++ u1Byte channel; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte band: 2; ++ u1Byte rsvd_0: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte ldpc: 1; ++ u1Byte stbc: 1; ++ u1Byte beamformed: 1; ++#else ++ u1Byte beamformed: 1; ++ u1Byte stbc: 1; ++ u1Byte ldpc: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte rsvd_0: 1; ++ u1Byte band: 2; ++#endif ++ ++ /* DW2 */ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte shift_l_map: 6; ++ u1Byte rsvd_1: 2; ++#else ++ u1Byte rsvd_1: 2; ++ u1Byte shift_l_map: 6; ++#endif ++ u1Byte cnt_pw2cca; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte agc_table_a: 4; ++ u1Byte agc_table_b: 4; ++ u1Byte agc_table_c: 4; ++ u1Byte agc_table_d: 4; ++#else ++ u1Byte agc_table_b: 4; ++ u1Byte agc_table_a: 4; ++ u1Byte agc_table_d: 4; ++ u1Byte agc_table_c: 4; ++#endif ++ ++ /* DW3 ~ DW6*/ ++ u1Byte cnt_cca2agc_rdy; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte gain_a: 6; ++ u1Byte rsvd_2: 1; ++ u1Byte trsw_a: 1; ++ u1Byte gain_b: 6; ++ u1Byte rsvd_3: 1; ++ u1Byte trsw_b: 1; ++ u1Byte gain_c: 6; ++ u1Byte rsvd_4: 1; ++ u1Byte trsw_c: 1; ++ u1Byte gain_d: 6; ++ u1Byte rsvd_5: 1; ++ u1Byte trsw_d: 1; ++ u1Byte aagc_step_a: 2; ++ u1Byte aagc_step_b: 2; ++ u1Byte aagc_step_c: 2; ++ u1Byte aagc_step_d: 2; ++#else ++ u1Byte trsw_a: 1; ++ u1Byte rsvd_2: 1; ++ u1Byte gain_a: 6; ++ u1Byte trsw_b: 1; ++ u1Byte rsvd_3: 1; ++ u1Byte gain_b: 6; ++ u1Byte trsw_c: 1; ++ u1Byte rsvd_4: 1; ++ u1Byte gain_c: 6; ++ u1Byte trsw_d: 1; ++ u1Byte rsvd_5: 1; ++ u1Byte gain_d: 6; ++ u1Byte aagc_step_d: 2; ++ u1Byte aagc_step_c: 2; ++ u1Byte aagc_step_b: 2; ++ u1Byte aagc_step_a: 2; ++#endif ++ u1Byte ht_aagc_gain[4]; ++ u1Byte dagc_gain[4]; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte counter: 6; ++ u1Byte rsvd_6: 2; ++ u1Byte syn_count: 5; ++ u1Byte rsvd_7:3; ++#else ++ u1Byte rsvd_6: 2; ++ u1Byte counter: 6; ++ u1Byte rsvd_7:3; ++ u1Byte syn_count: 5; ++#endif ++} PHY_STATUS_RPT_JAGUAR2_TYPE2, *PPHY_STATUS_RPT_JAGUAR2_TYPE2; ++/*==============================================*/ ++#endif ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_interface.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_interface.c new file mode 100644 -index 000000000..7f50b3ba5 +index 0000000..6b97b03 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_interface.c @@ -0,0 +1,1014 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+// -+// ODM IO Relative API. -+// -+ -+u1Byte -+ODM_Read1Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ return RTL_R8(RegAddr); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return rtw_read8(Adapter,RegAddr); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return PlatformEFIORead1Byte(Adapter, RegAddr); -+#endif -+ -+} -+ -+ -+u2Byte -+ODM_Read2Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ return RTL_R16(RegAddr); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return rtw_read16(Adapter,RegAddr); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return PlatformEFIORead2Byte(Adapter, RegAddr); -+#endif -+ -+} -+ -+ -+u4Byte -+ODM_Read4Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ return RTL_R32(RegAddr); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return rtw_read32(Adapter,RegAddr); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return PlatformEFIORead4Byte(Adapter, RegAddr); -+#endif -+ -+} -+ -+ -+VOID -+ODM_Write1Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u1Byte Data -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ RTL_W8(RegAddr, Data); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ rtw_write8(Adapter,RegAddr, Data); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformEFIOWrite1Byte(Adapter, RegAddr, Data); -+#endif -+ -+} -+ -+ -+VOID -+ODM_Write2Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u2Byte Data -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ RTL_W16(RegAddr, Data); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ rtw_write16(Adapter,RegAddr, Data); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformEFIOWrite2Byte(Adapter, RegAddr, Data); -+#endif -+ -+} -+ -+ -+VOID -+ODM_Write4Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte Data -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ RTL_W32(RegAddr, Data); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ rtw_write32(Adapter,RegAddr, Data); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformEFIOWrite4Byte(Adapter, RegAddr, Data); -+#endif -+ -+} -+ -+ -+VOID -+ODM_SetMACReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -+#endif -+} -+ -+ -+u4Byte -+ODM_GetMACReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ return PHY_QueryMacReg(pDM_Odm->Adapter, RegAddr, BitMask); -+#endif -+} -+ -+ -+VOID -+ODM_SetBBReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -+#endif -+} -+ -+ -+u4Byte -+ODM_GetBBReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -+#endif -+} -+ -+ -+VOID -+ODM_SetRFReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_RF_RADIO_PATH_E eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data); -+ ODM_delay_us(2); -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PHY_SetRFReg(pDM_Odm->Adapter, eRFPath, RegAddr, BitMask, Data); -+#endif -+} -+ -+ -+u4Byte -+ODM_GetRFReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_RF_RADIO_PATH_E eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1); -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask); -+#endif -+} -+ -+ -+ -+ -+// -+// ODM Memory relative API. -+// -+VOID -+ODM_AllocateMemory( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PVOID *pPtr, -+ IN u4Byte length -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ *pPtr = kmalloc(length, GFP_ATOMIC); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) -+ *pPtr = rtw_zvmalloc(length); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformAllocateMemory(Adapter, pPtr, length); -+#endif -+} -+ -+// length could be ignored, used to detect memory leakage. -+VOID -+ODM_FreeMemory( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PVOID pPtr, -+ IN u4Byte length -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ kfree(pPtr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) -+ rtw_vmfree(pPtr, length); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ //PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformFreeMemory(pPtr, length); -+#endif -+} -+ -+VOID -+ODM_MoveMemory( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PVOID pDest, -+ IN PVOID pSrc, -+ IN u4Byte Length -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ memcpy(pDest, pSrc, Length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) -+ _rtw_memcpy(pDest, pSrc, Length); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformMoveMemory(pDest, pSrc, Length); -+#endif -+} -+ -+void ODM_Memory_Set( -+ IN PDM_ODM_T pDM_Odm, -+ IN PVOID pbuf, -+ IN s1Byte value, -+ IN u4Byte length -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ memset(pbuf, value, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) -+ _rtw_memset(pbuf,value, length); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformFillMemory(pbuf,length,value); -+#endif -+} -+s4Byte ODM_CompareMemory( -+ IN PDM_ODM_T pDM_Odm, -+ IN PVOID pBuf1, -+ IN PVOID pBuf2, -+ IN u4Byte length -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ return memcmp(pBuf1,pBuf2,length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) -+ return _rtw_memcmp(pBuf1,pBuf2,length); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return PlatformCompareMemory(pBuf1,pBuf2,length); -+#endif -+} -+ -+ -+ -+// -+// ODM MISC relative API. -+// -+VOID -+ODM_AcquireSpinLock( -+ IN PDM_ODM_T pDM_Odm, -+ IN RT_SPINLOCK_TYPE type -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ rtw_odm_acquirespinlock(Adapter, type); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformAcquireSpinLock(Adapter, type); -+#endif -+} -+VOID -+ODM_ReleaseSpinLock( -+ IN PDM_ODM_T pDM_Odm, -+ IN RT_SPINLOCK_TYPE type -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ rtw_odm_releasespinlock(Adapter, type); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformReleaseSpinLock(Adapter, type); -+#endif -+} -+ -+// -+// Work item relative API. FOr MP driver only~! -+// -+VOID -+ODM_InitializeWorkItem( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_WORK_ITEM pRtWorkItem, -+ IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, -+ IN PVOID pContext, -+ IN const char* szID -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID); -+#endif -+} -+ -+ -+VOID -+ODM_StartWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStartWorkItem(pRtWorkItem); -+#endif -+} -+ -+ -+VOID -+ODM_StopWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStopWorkItem(pRtWorkItem); -+#endif -+} -+ -+ -+VOID -+ODM_FreeWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformFreeWorkItem(pRtWorkItem); -+#endif -+} -+ -+ -+VOID -+ODM_ScheduleWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformScheduleWorkItem(pRtWorkItem); -+#endif -+} -+ -+ -+VOID -+ODM_IsWorkItemScheduled( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformIsWorkItemScheduled(pRtWorkItem); -+#endif -+} -+ -+ -+ -+// -+// ODM Timer relative API. -+// -+VOID -+ODM_StallExecution( -+ IN u4Byte usDelay -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_udelay_os(usDelay); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStallExecution(usDelay); -+#endif -+} -+ -+VOID -+ODM_delay_ms(IN u4Byte ms) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ delay_ms(ms); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_mdelay_os(ms); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ delay_ms(ms); -+#endif -+} -+ -+VOID -+ODM_delay_us(IN u4Byte us) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ delay_us(us); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_udelay_os(us); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStallExecution(us); -+#endif -+} -+ -+VOID -+ODM_sleep_ms(IN u4Byte ms) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_msleep_os(ms); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#endif -+} -+ -+VOID -+ODM_sleep_us(IN u4Byte us) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_usleep_os(us); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#endif -+} -+ -+VOID -+ODM_SetTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer, -+ IN u4Byte msDelay -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ mod_timer(pTimer, jiffies + RTL_MILISECONDS_TO_JIFFIES(msDelay)); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ _set_timer(pTimer,msDelay ); //ms -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformSetTimer(Adapter, pTimer, msDelay); -+#endif -+ -+} -+ -+VOID -+ODM_InitializeTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer, -+ IN RT_TIMER_CALL_BACK CallBackFunc, -+ IN PVOID pContext, -+ IN const char* szID -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ init_timer(pTimer); -+ pTimer->function = CallBackFunc; -+ pTimer->data = (unsigned long)pDM_Odm; -+ mod_timer(pTimer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ _init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID); -+#endif -+} -+ -+ -+VOID -+ODM_CancelTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ del_timer(pTimer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ _cancel_timer_ex(pTimer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PlatformCancelTimer(Adapter, pTimer); -+#endif -+} -+ -+ -+VOID -+ODM_ReleaseTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ // <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. -+ // Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. -+ if (pTimer == 0) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n")); -+ return; -+ } -+ -+ PlatformReleaseTimer(Adapter, pTimer); -+#endif -+} -+ -+BOOLEAN -+phydm_actingDetermine( -+ IN PDM_ODM_T pDM_Odm, -+ IN PHYDM_ACTING_TYPE type -+ ) -+{ -+ BOOLEAN ret = FALSE; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->BeamformingInfo.SourceAdapter; -+#else -+ PADAPTER Adapter = pDM_Odm->Adapter; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (type == PhyDM_ACTING_AS_AP) -+ ret = ACTING_AS_AP(Adapter); -+ else if (type == PhyDM_ACTING_AS_IBSS) -+ ret = ACTING_AS_IBSS(Adapter); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ -+ if (type == PhyDM_ACTING_AS_AP) -+ ret = check_fwstate(pmlmepriv, WIFI_AP_STATE); -+ else if (type == PhyDM_ACTING_AS_IBSS) -+ ret = check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+#endif -+ -+ return ret; -+ -+} -+ -+ -+u1Byte -+phydm_trans_h2c_id( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte phydm_h2c_id -+) -+{ -+ u1Byte platform_h2c_id=0xff; -+ -+ -+ switch(phydm_h2c_id) -+ { -+ //1 [0] -+ case ODM_H2C_RSSI_REPORT: -+ -+ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if(pDM_Odm->SupportICType == ODM_RTL8188E) -+ { -+ platform_h2c_id = H2C_88E_RSSI_REPORT; -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ platform_h2c_id =H2C_8814A_RSSI_REPORT; -+ } -+ else -+ { -+ platform_h2c_id = H2C_RSSI_REPORT; -+ } -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ platform_h2c_id = H2C_RSSI_SETTING; -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) -+ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) -+ { -+ platform_h2c_id =H2C_88XX_RSSI_REPORT; -+ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] H2C_88XX_RSSI_REPORT CMD_ID = (( %d ))\n", platform_h2c_id));*/ -+ } else -+ #endif -+ #if(RTL8812A_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ platform_h2c_id = H2C_8812_RSSI_REPORT; -+ } else -+ #endif -+ {} -+ #endif -+ -+ break; -+ -+ //1 [3] -+ case ODM_H2C_WIFI_CALIBRATION: -+ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ platform_h2c_id =H2C_WIFI_CALIBRATION; -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ #if(RTL8723B_SUPPORT==1) -+ platform_h2c_id = H2C_8723B_BT_WLAN_CALIBRATION; -+ #endif -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ -+ #endif -+ -+ break; -+ -+ -+ //1 [4] -+ case ODM_H2C_IQ_CALIBRATION: -+ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ platform_h2c_id =H2C_IQ_CALIBRATION; -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) -+ platform_h2c_id = H2C_8812_IQ_CALIBRATION; -+ #endif -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ -+ #endif -+ -+ break; -+ //1 [5] -+ case ODM_H2C_RA_PARA_ADJUST: -+ -+ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) -+ platform_h2c_id = H2C_8814A_RA_PARA_ADJUST; -+ else -+ platform_h2c_id = H2C_RA_PARA_ADJUST; -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) -+ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; -+ #elif ((RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) -+ platform_h2c_id = H2C_RA_PARA_ADJUST; -+ #elif(RTL8192E_SUPPORT==1) -+ platform_h2c_id =H2C_8192E_RA_PARA_ADJUST; -+ #elif(RTL8723B_SUPPORT==1) -+ platform_h2c_id =H2C_8723B_RA_PARA_ADJUST; -+ #endif -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) -+ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) { -+ platform_h2c_id =H2C_88XX_RA_PARA_ADJUST; -+ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] H2C_88XX_RA_PARA_ADJUST CMD_ID = (( %d ))\n", platform_h2c_id));*/ -+ } else -+ #endif -+ #if(RTL8812A_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; -+ } else -+ #endif -+ {} -+ #endif -+ -+ break; -+ -+ -+ //1 [6] -+ case PHYDM_H2C_DYNAMIC_TX_PATH: -+ -+ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if(pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ platform_h2c_id =H2C_8814A_DYNAMIC_TX_PATH; -+ } -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ #if (RTL8814A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ platform_h2c_id = H2C_DYNAMIC_TX_PATH; -+ #endif -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ #if(RTL8814A_SUPPORT==1) -+ if( pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ platform_h2c_id = H2C_88XX_DYNAMIC_TX_PATH; -+ } -+ #endif -+ -+ #endif -+ -+ break; -+ -+ /* [7]*/ -+ case PHYDM_H2C_FW_TRACE_EN: -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) -+ platform_h2c_id = H2C_8814A_FW_TRACE_EN; -+ else -+ platform_h2c_id = H2C_FW_TRACE_EN; -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) -+ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) -+ platform_h2c_id = H2C_88XX_FW_TRACE_EN; -+ else -+ #endif -+ #if (RTL8812A_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8812) { -+ platform_h2c_id = H2C_8812_FW_TRACE_EN; -+ } else -+ #endif -+ {} -+ -+ #endif -+ -+ break; -+ -+ case PHYDM_H2C_TXBF: -+#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1)) -+ platform_h2c_id = 0x41; /*H2C_TxBF*/ -+#endif -+ break; -+ -+ default: -+ platform_h2c_id=0xff; -+ break; -+ } -+ -+ return platform_h2c_id; -+ -+} -+ -+// -+// ODM FW relative API. -+// -+ -+VOID -+ODM_FillH2CCmd( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte phydm_h2c_id, -+ IN u4Byte CmdLen, -+ IN pu1Byte pCmdBuffer -+) -+{ -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ u1Byte platform_h2c_id; -+ -+ platform_h2c_id=phydm_trans_h2c_id(pDM_Odm, phydm_h2c_id); -+ -+ if(platform_h2c_id==0xff) -+ { -+ ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Wrong H2C CMD-ID !! platform_h2c_id==0xff , PHYDM_ElementID=((%d )) \n",phydm_h2c_id)); -+ return; -+ } -+ -+ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (pDM_Odm->SupportICType == ODM_RTL8188E) -+ if (!pDM_Odm->RaSupport88E) -+ FillH2CCmd88E(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); -+ else if (pDM_Odm->SupportICType == ODM_RTL8192C) -+ FillH2CCmd92C(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); -+ else if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ FillH2CCmd8814A(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); -+ else if (pDM_Odm->SupportICType == ODM_RTL8822B) -+#if (RTL8822B_SUPPORT == 1) -+ FillH2CCmd8822B(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); -+#endif -+ else -+ FillH2CCmd(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_hal_fill_h2c_cmd(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); -+ -+ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ #if((RTL8881A_SUPPORT==1)||(RTL8192E_SUPPORT==1)||(RTL8814A_SUPPORT==1)) -+ if(pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E|| pDM_Odm->SupportICType == ODM_RTL8814A) -+ { -+ GET_HAL_INTERFACE(pDM_Odm->priv)->FillH2CCmdHandler(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); -+ //FillH2CCmd88XX(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); -+ } else -+ #endif -+ #if(RTL8812A_SUPPORT==1) -+ if(pDM_Odm->SupportICType == ODM_RTL8812) -+ { -+ FillH2CCmd8812(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); -+ } else -+ #endif -+ {} -+ #endif -+} -+ -+u1Byte -+phydm_c2H_content_parsing( -+ IN PVOID pDM_VOID, -+ IN u1Byte c2hCmdId, -+ IN u1Byte c2hCmdLen, -+ IN pu1Byte tmpBuf -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ #endif -+ u1Byte Extend_c2hSubID = 0; -+ u1Byte find_c2h_cmd = TRUE; -+ -+ switch (c2hCmdId) { -+ case PHYDM_C2H_DBG: -+ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) -+ phydm_fw_trace_handler(pDM_Odm, tmpBuf, c2hCmdLen); -+ -+ break; -+ -+ case PHYDM_C2H_RA_RPT: -+ phydm_c2h_ra_report_handler(pDM_Odm, tmpBuf, c2hCmdLen); -+ break; -+ -+ case PHYDM_C2H_RA_PARA_RPT: -+ ODM_C2HRaParaReportHandler(pDM_Odm, tmpBuf, c2hCmdLen); -+ break; -+ -+ case PHYDM_C2H_DYNAMIC_TX_PATH_RPT: -+ if (pDM_Odm->SupportICType & (ODM_RTL8814A)) -+ phydm_c2h_dtp_handler(pDM_Odm, tmpBuf, c2hCmdLen); -+ -+ break; -+ -+ case PHYDM_C2H_IQK_FINISH: -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821)) { -+ -+ RT_TRACE(COMP_MP, DBG_LOUD, ("== FW IQK Finish ==\n")); -+ PlatformAcquireSpinLock(Adapter, RT_IQK_SPINLOCK); -+ pDM_Odm->RFCalibrateInfo.bIQKInProgress = FALSE; -+ PlatformReleaseSpinLock(Adapter, RT_IQK_SPINLOCK); -+ pDM_Odm->RFCalibrateInfo.IQK_ProgressingTime = 0; -+ pDM_Odm->RFCalibrateInfo.IQK_ProgressingTime = ODM_GetProgressingTime(pDM_Odm, pDM_Odm->RFCalibrateInfo.IQK_StartTime); -+ } -+ -+ #endif -+ break; -+ -+ case PHYDM_C2H_DBG_CODE: -+ phydm_fw_trace_handler_code(pDM_Odm, tmpBuf, c2hCmdLen); -+ break; -+ -+ case PHYDM_C2H_EXTEND: -+ Extend_c2hSubID = tmpBuf[0]; -+ if (Extend_c2hSubID == PHYDM_EXTEND_C2H_DBG_PRINT) -+ phydm_fw_trace_handler_8051(pDM_Odm, tmpBuf, c2hCmdLen); -+ -+ break; -+ -+ default: -+ find_c2h_cmd = FALSE; -+ break; -+ } -+ -+ return find_c2h_cmd; -+ -+} -+ -+u8Byte -+ODM_GetCurrentTime( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ return 0; -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return (u8Byte)rtw_get_current_time(); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return PlatformGetCurrentTime(); -+#endif -+} -+ -+u8Byte -+ODM_GetProgressingTime( -+ IN PDM_ODM_T pDM_Odm, -+ IN u8Byte Start_Time -+ ) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ return 0; -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return rtw_get_passing_time_ms((u4Byte)Start_Time); -+#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return ((PlatformGetCurrentTime() - Start_Time)>>10); -+#endif -+} -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++// ++// ODM IO Relative API. ++// ++ ++u1Byte ++ODM_Read1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ return RTL_R8(RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return rtw_read8(Adapter,RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PlatformEFIORead1Byte(Adapter, RegAddr); ++#endif ++ ++} ++ ++ ++u2Byte ++ODM_Read2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ return RTL_R16(RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return rtw_read16(Adapter,RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PlatformEFIORead2Byte(Adapter, RegAddr); ++#endif ++ ++} ++ ++ ++u4Byte ++ODM_Read4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ return RTL_R32(RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return rtw_read32(Adapter,RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PlatformEFIORead4Byte(Adapter, RegAddr); ++#endif ++ ++} ++ ++ ++VOID ++ODM_Write1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ RTL_W8(RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_write8(Adapter,RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformEFIOWrite1Byte(Adapter, RegAddr, Data); ++#endif ++ ++} ++ ++ ++VOID ++ODM_Write2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u2Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ RTL_W16(RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_write16(Adapter,RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformEFIOWrite2Byte(Adapter, RegAddr, Data); ++#endif ++ ++} ++ ++ ++VOID ++ODM_Write4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ RTL_W32(RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_write32(Adapter,RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformEFIOWrite4Byte(Adapter, RegAddr, Data); ++#endif ++ ++} ++ ++ ++VOID ++ODM_SetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); ++#endif ++} ++ ++ ++u4Byte ++ODM_GetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ return PHY_QueryMacReg(pDM_Odm->Adapter, RegAddr, BitMask); ++#endif ++} ++ ++ ++VOID ++ODM_SetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); ++#endif ++} ++ ++ ++u4Byte ++ODM_GetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PHY_QueryBBReg(Adapter, RegAddr, BitMask); ++#endif ++} ++ ++ ++VOID ++ODM_SetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data); ++ ODM_delay_us(2); ++ ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PHY_SetRFReg(pDM_Odm->Adapter, eRFPath, RegAddr, BitMask, Data); ++#endif ++} ++ ++ ++u4Byte ++ODM_GetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask); ++#endif ++} ++ ++ ++ ++ ++// ++// ODM Memory relative API. ++// ++VOID ++ODM_AllocateMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID *pPtr, ++ IN u4Byte length ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ *pPtr = kmalloc(length, GFP_ATOMIC); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ *pPtr = rtw_zvmalloc(length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformAllocateMemory(Adapter, pPtr, length); ++#endif ++} ++ ++// length could be ignored, used to detect memory leakage. ++VOID ++ODM_FreeMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pPtr, ++ IN u4Byte length ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ kfree(pPtr); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ rtw_vmfree(pPtr, length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ //PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformFreeMemory(pPtr, length); ++#endif ++} ++ ++VOID ++ODM_MoveMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pDest, ++ IN PVOID pSrc, ++ IN u4Byte Length ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ memcpy(pDest, pSrc, Length); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ _rtw_memcpy(pDest, pSrc, Length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformMoveMemory(pDest, pSrc, Length); ++#endif ++} ++ ++void ODM_Memory_Set( ++ IN PDM_ODM_T pDM_Odm, ++ IN PVOID pbuf, ++ IN s1Byte value, ++ IN u4Byte length ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ memset(pbuf, value, length); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ _rtw_memset(pbuf,value, length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformFillMemory(pbuf,length,value); ++#endif ++} ++s4Byte ODM_CompareMemory( ++ IN PDM_ODM_T pDM_Odm, ++ IN PVOID pBuf1, ++ IN PVOID pBuf2, ++ IN u4Byte length ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return memcmp(pBuf1,pBuf2,length); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ return _rtw_memcmp(pBuf1,pBuf2,length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ return PlatformCompareMemory(pBuf1,pBuf2,length); ++#endif ++} ++ ++ ++ ++// ++// ODM MISC relative API. ++// ++VOID ++ODM_AcquireSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_odm_acquirespinlock(Adapter, type); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformAcquireSpinLock(Adapter, type); ++#endif ++} ++VOID ++ODM_ReleaseSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_odm_releasespinlock(Adapter, type); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformReleaseSpinLock(Adapter, type); ++#endif ++} ++ ++// ++// Work item relative API. FOr MP driver only~! ++// ++VOID ++ODM_InitializeWorkItem( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_WORK_ITEM pRtWorkItem, ++ IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, ++ IN PVOID pContext, ++ IN const char* szID ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID); ++#endif ++} ++ ++ ++VOID ++ODM_StartWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStartWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_StopWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStopWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_FreeWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformFreeWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_ScheduleWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformScheduleWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_IsWorkItemScheduled( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformIsWorkItemScheduled(pRtWorkItem); ++#endif ++} ++ ++ ++ ++// ++// ODM Timer relative API. ++// ++VOID ++ODM_StallExecution( ++ IN u4Byte usDelay ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_udelay_os(usDelay); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStallExecution(usDelay); ++#endif ++} ++ ++VOID ++ODM_delay_ms(IN u4Byte ms) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ delay_ms(ms); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_mdelay_os(ms); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ delay_ms(ms); ++#endif ++} ++ ++VOID ++ODM_delay_us(IN u4Byte us) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ delay_us(us); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_udelay_os(us); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStallExecution(us); ++#endif ++} ++ ++VOID ++ODM_sleep_ms(IN u4Byte ms) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_msleep_os(ms); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#endif ++} ++ ++VOID ++ODM_sleep_us(IN u4Byte us) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_usleep_os(us); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#endif ++} ++ ++VOID ++ODM_SetTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN u4Byte msDelay ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ mod_timer(pTimer, jiffies + RTL_MILISECONDS_TO_JIFFIES(msDelay)); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ _set_timer(pTimer,msDelay ); //ms ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformSetTimer(Adapter, pTimer, msDelay); ++#endif ++ ++} ++ ++VOID ++ODM_InitializeTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN RT_TIMER_CALL_BACK CallBackFunc, ++ IN PVOID pContext, ++ IN const char* szID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ init_timer(pTimer); ++ pTimer->function = CallBackFunc; ++ pTimer->data = (unsigned long)pDM_Odm; ++ mod_timer(pTimer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ _init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID); ++#endif ++} ++ ++ ++VOID ++ODM_CancelTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ del_timer(pTimer); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ _cancel_timer_ex(pTimer); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformCancelTimer(Adapter, pTimer); ++#endif ++} ++ ++ ++VOID ++ODM_ReleaseTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ // <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. ++ // Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. ++ if (pTimer == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n")); ++ return; ++ } ++ ++ PlatformReleaseTimer(Adapter, pTimer); ++#endif ++} ++ ++BOOLEAN ++phydm_actingDetermine( ++ IN PDM_ODM_T pDM_Odm, ++ IN PHYDM_ACTING_TYPE type ++ ) ++{ ++ BOOLEAN ret = FALSE; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->BeamformingInfo.SourceAdapter; ++#else ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (type == PhyDM_ACTING_AS_AP) ++ ret = ACTING_AS_AP(Adapter); ++ else if (type == PhyDM_ACTING_AS_IBSS) ++ ret = ACTING_AS_IBSS(Adapter); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ if (type == PhyDM_ACTING_AS_AP) ++ ret = check_fwstate(pmlmepriv, WIFI_AP_STATE); ++ else if (type == PhyDM_ACTING_AS_IBSS) ++ ret = check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++#endif ++ ++ return ret; ++ ++} ++ ++ ++u1Byte ++phydm_trans_h2c_id( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte phydm_h2c_id ++) ++{ ++ u1Byte platform_h2c_id=0xff; ++ ++ ++ switch(phydm_h2c_id) ++ { ++ //1 [0] ++ case ODM_H2C_RSSI_REPORT: ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ platform_h2c_id = H2C_88E_RSSI_REPORT; ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ platform_h2c_id =H2C_8814A_RSSI_REPORT; ++ } ++ else ++ { ++ platform_h2c_id = H2C_RSSI_REPORT; ++ } ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ platform_h2c_id = H2C_RSSI_SETTING; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) ++ { ++ platform_h2c_id =H2C_88XX_RSSI_REPORT; ++ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] H2C_88XX_RSSI_REPORT CMD_ID = (( %d ))\n", platform_h2c_id));*/ ++ } else ++ #endif ++ #if(RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ platform_h2c_id = H2C_8812_RSSI_REPORT; ++ } else ++ #endif ++ {} ++ #endif ++ ++ break; ++ ++ //1 [3] ++ case ODM_H2C_WIFI_CALIBRATION: ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ platform_h2c_id =H2C_WIFI_CALIBRATION; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if(RTL8723B_SUPPORT==1) ++ platform_h2c_id = H2C_8723B_BT_WLAN_CALIBRATION; ++ #endif ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ ++ #endif ++ ++ break; ++ ++ ++ //1 [4] ++ case ODM_H2C_IQ_CALIBRATION: ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ platform_h2c_id =H2C_IQ_CALIBRATION; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) ++ platform_h2c_id = H2C_8812_IQ_CALIBRATION; ++ #endif ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ ++ #endif ++ ++ break; ++ //1 [5] ++ case ODM_H2C_RA_PARA_ADJUST: ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) ++ platform_h2c_id = H2C_8814A_RA_PARA_ADJUST; ++ else ++ platform_h2c_id = H2C_RA_PARA_ADJUST; ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) ++ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; ++ #elif ((RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ platform_h2c_id = H2C_RA_PARA_ADJUST; ++ #elif(RTL8192E_SUPPORT==1) ++ platform_h2c_id =H2C_8192E_RA_PARA_ADJUST; ++ #elif(RTL8723B_SUPPORT==1) ++ platform_h2c_id =H2C_8723B_RA_PARA_ADJUST; ++ #endif ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) { ++ platform_h2c_id =H2C_88XX_RA_PARA_ADJUST; ++ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] H2C_88XX_RA_PARA_ADJUST CMD_ID = (( %d ))\n", platform_h2c_id));*/ ++ } else ++ #endif ++ #if(RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; ++ } else ++ #endif ++ {} ++ #endif ++ ++ break; ++ ++ ++ //1 [6] ++ case PHYDM_H2C_DYNAMIC_TX_PATH: ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ platform_h2c_id =H2C_8814A_DYNAMIC_TX_PATH; ++ } ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ platform_h2c_id = H2C_DYNAMIC_TX_PATH; ++ #endif ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if(RTL8814A_SUPPORT==1) ++ if( pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ platform_h2c_id = H2C_88XX_DYNAMIC_TX_PATH; ++ } ++ #endif ++ ++ #endif ++ ++ break; ++ ++ /* [7]*/ ++ case PHYDM_H2C_FW_TRACE_EN: ++ ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) ++ platform_h2c_id = H2C_8814A_FW_TRACE_EN; ++ else ++ platform_h2c_id = H2C_FW_TRACE_EN; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) ++ platform_h2c_id = H2C_88XX_FW_TRACE_EN; ++ else ++ #endif ++ #if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ platform_h2c_id = H2C_8812_FW_TRACE_EN; ++ } else ++ #endif ++ {} ++ ++ #endif ++ ++ break; ++ ++ case PHYDM_H2C_TXBF: ++#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1)) ++ platform_h2c_id = 0x41; /*H2C_TxBF*/ ++#endif ++ break; ++ ++ default: ++ platform_h2c_id=0xff; ++ break; ++ } ++ ++ return platform_h2c_id; ++ ++} ++ ++// ++// ODM FW relative API. ++// ++ ++VOID ++ODM_FillH2CCmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte phydm_h2c_id, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte platform_h2c_id; ++ ++ platform_h2c_id=phydm_trans_h2c_id(pDM_Odm, phydm_h2c_id); ++ ++ if(platform_h2c_id==0xff) ++ { ++ ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Wrong H2C CMD-ID !! platform_h2c_id==0xff , PHYDM_ElementID=((%d )) \n",phydm_h2c_id)); ++ return; ++ } ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ if (!pDM_Odm->RaSupport88E) ++ FillH2CCmd88E(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ else if (pDM_Odm->SupportICType == ODM_RTL8192C) ++ FillH2CCmd92C(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ else if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ FillH2CCmd8814A(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ else if (pDM_Odm->SupportICType == ODM_RTL8822B) ++#if (RTL8822B_SUPPORT == 1) ++ FillH2CCmd8822B(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++#endif ++ else ++ FillH2CCmd(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_hal_fill_h2c_cmd(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if((RTL8881A_SUPPORT==1)||(RTL8192E_SUPPORT==1)||(RTL8814A_SUPPORT==1)) ++ if(pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E|| pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ GET_HAL_INTERFACE(pDM_Odm->priv)->FillH2CCmdHandler(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); ++ //FillH2CCmd88XX(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); ++ } else ++ #endif ++ #if(RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ FillH2CCmd8812(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); ++ } else ++ #endif ++ {} ++ #endif ++} ++ ++u1Byte ++phydm_c2H_content_parsing( ++ IN PVOID pDM_VOID, ++ IN u1Byte c2hCmdId, ++ IN u1Byte c2hCmdLen, ++ IN pu1Byte tmpBuf ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ #endif ++ u1Byte Extend_c2hSubID = 0; ++ u1Byte find_c2h_cmd = TRUE; ++ ++ switch (c2hCmdId) { ++ case PHYDM_C2H_DBG: ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) ++ phydm_fw_trace_handler(pDM_Odm, tmpBuf, c2hCmdLen); ++ ++ break; ++ ++ case PHYDM_C2H_RA_RPT: ++ phydm_c2h_ra_report_handler(pDM_Odm, tmpBuf, c2hCmdLen); ++ break; ++ ++ case PHYDM_C2H_RA_PARA_RPT: ++ ODM_C2HRaParaReportHandler(pDM_Odm, tmpBuf, c2hCmdLen); ++ break; ++ ++ case PHYDM_C2H_DYNAMIC_TX_PATH_RPT: ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A)) ++ phydm_c2h_dtp_handler(pDM_Odm, tmpBuf, c2hCmdLen); ++ ++ break; ++ ++ case PHYDM_C2H_IQK_FINISH: ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821)) { ++ ++ RT_TRACE(COMP_MP, DBG_LOUD, ("== FW IQK Finish ==\n")); ++ PlatformAcquireSpinLock(Adapter, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.bIQKInProgress = FALSE; ++ PlatformReleaseSpinLock(Adapter, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.IQK_ProgressingTime = 0; ++ pDM_Odm->RFCalibrateInfo.IQK_ProgressingTime = ODM_GetProgressingTime(pDM_Odm, pDM_Odm->RFCalibrateInfo.IQK_StartTime); ++ } ++ ++ #endif ++ break; ++ ++ case PHYDM_C2H_DBG_CODE: ++ phydm_fw_trace_handler_code(pDM_Odm, tmpBuf, c2hCmdLen); ++ break; ++ ++ case PHYDM_C2H_EXTEND: ++ Extend_c2hSubID = tmpBuf[0]; ++ if (Extend_c2hSubID == PHYDM_EXTEND_C2H_DBG_PRINT) ++ phydm_fw_trace_handler_8051(pDM_Odm, tmpBuf, c2hCmdLen); ++ ++ break; ++ ++ default: ++ find_c2h_cmd = FALSE; ++ break; ++ } ++ ++ return find_c2h_cmd; ++ ++} ++ ++u8Byte ++ODM_GetCurrentTime( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return 0; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ return (u8Byte)rtw_get_current_time(); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ return PlatformGetCurrentTime(); ++#endif ++} ++ ++u8Byte ++ODM_GetProgressingTime( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8Byte Start_Time ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return 0; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ return rtw_get_passing_time_ms((u4Byte)Start_Time); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ return ((PlatformGetCurrentTime() - Start_Time)>>10); ++#endif ++} ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_interface.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_interface.h new file mode 100644 -index 000000000..342c493e8 +index 0000000..3288849 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_interface.h @@ -0,0 +1,442 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ -+#ifndef __ODM_INTERFACE_H__ -+#define __ODM_INTERFACE_H__ -+ -+#define INTERFACE_VERSION "1.0" /*2015.01.13 Dino*/ -+ -+// -+// =========== Constant/Structure/Enum/... Define -+// -+ -+ -+ -+// -+// =========== Macro Define -+// -+ -+#define _reg_all(_name) ODM_##_name -+#define _reg_ic(_name, _ic) ODM_##_name##_ic -+#define _bit_all(_name) BIT_##_name -+#define _bit_ic(_name, _ic) BIT_##_name##_ic -+ -+// _cat: implemented by Token-Pasting Operator. -+#if 0 -+#define _cat(_name, _ic_type, _func) \ -+ ( \ -+ _func##_all(_name) \ -+ ) -+#endif -+ -+/*=================================== -+ -+#define ODM_REG_DIG_11N 0xC50 -+#define ODM_REG_DIG_11AC 0xDDD -+ -+ODM_REG(DIG,_pDM_Odm) -+=====================================*/ -+ -+#define _reg_11N(_name) ODM_REG_##_name##_11N -+#define _reg_11AC(_name) ODM_REG_##_name##_11AC -+#define _bit_11N(_name) ODM_BIT_##_name##_11N -+#define _bit_11AC(_name) ODM_BIT_##_name##_11AC -+ -+#ifdef __ECOS -+#define _rtk_cat(_name, _ic_type, _func) \ -+ ( \ -+ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ -+ _func##_11AC(_name) \ -+ ) -+#else -+ -+#define _cat(_name, _ic_type, _func) \ -+ ( \ -+ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ -+ _func##_11AC(_name) \ -+ ) -+#endif -+/* -+// only sample code -+//#define _cat(_name, _ic_type, _func) \ -+// ( \ -+// ((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \ -+// ((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \ -+// ((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \ -+// ((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \ -+// ((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \ -+// _func##_ic(_name, _8195) \ -+// ) -+*/ -+ -+// _name: name of register or bit. -+// Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" -+// gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType. -+#ifdef __ECOS -+#define ODM_REG(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _reg) -+#define ODM_BIT(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _bit) -+#else -+#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) -+#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) -+#endif -+typedef enum _PHYDM_H2C_CMD { -+ ODM_H2C_RSSI_REPORT = 0, -+ ODM_H2C_PSD_RESULT = 1, -+ ODM_H2C_PathDiv = 2, -+ ODM_H2C_WIFI_CALIBRATION = 3, -+ ODM_H2C_IQ_CALIBRATION = 4, -+ ODM_H2C_RA_PARA_ADJUST = 5, -+ PHYDM_H2C_DYNAMIC_TX_PATH = 6, -+ PHYDM_H2C_FW_TRACE_EN = 7, -+ PHYDM_H2C_TXBF = 8, -+ ODM_MAX_H2CCMD -+} PHYDM_H2C_CMD; -+ -+typedef enum _PHYDM_C2H_EVT { -+ PHYDM_C2H_DBG = 0, -+ PHYDM_C2H_LB = 1, -+ PHYDM_C2H_XBF = 2, -+ PHYDM_C2H_TX_REPORT = 3, -+ PHYDM_C2H_INFO = 9, -+ PHYDM_C2H_BT_MP = 11, -+ PHYDM_C2H_RA_RPT = 12, -+ PHYDM_C2H_RA_PARA_RPT = 14, -+ PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15, -+ PHYDM_C2H_IQK_FINISH = 17, /*0x11*/ -+ PHYDM_C2H_DBG_CODE = 0xFE, -+ PHYDM_C2H_EXTEND = 0xFF, -+} PHYDM_C2H_EVT; -+ -+typedef enum _PHYDM_EXTEND_C2H_EVT { -+ PHYDM_EXTEND_C2H_DBG_PRINT = 0 -+ -+} PHYDM_EXTEND_C2H_EVT; -+ -+typedef enum _PHYDM_ACTING_TYPE { -+ PhyDM_ACTING_AS_IBSS = 0, -+ PhyDM_ACTING_AS_AP = 1 -+} PHYDM_ACTING_TYPE; -+ -+ -+// -+// 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. -+// Suggest HW team to use thread instead of workitem. Windows also support the feature. -+// -+#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) -+typedef void *PRT_WORK_ITEM ; -+typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE; -+typedef VOID (*RT_WORKITEM_CALL_BACK)(PVOID pContext); -+ -+#if 0 -+typedef struct tasklet_struct RT_WORKITEM_HANDLE, *PRT_WORKITEM_HANDLE; -+ -+typedef struct _RT_WORK_ITEM -+{ -+ -+ RT_WORKITEM_HANDLE Handle; // Platform-dependent handle for this workitem, e.g. Ndis Workitem object. -+ PVOID Adapter; // Pointer to Adapter object. -+ PVOID pContext; // Parameter to passed to CallBackFunc(). -+ RT_WORKITEM_CALL_BACK CallbackFunc; // Callback function of the workitem. -+ u1Byte RefCount; // 0: driver is going to unload, 1: No such workitem scheduled, 2: one workitem is schedueled. -+ PVOID pPlatformExt; // Pointer to platform-dependent extension. -+ BOOLEAN bFree; -+ char szID[36]; // An identity string of this workitem. -+}RT_WORK_ITEM, *PRT_WORK_ITEM; -+ -+#endif -+ -+ -+#endif -+ -+// -+// =========== Extern Variable ??? It should be forbidden. -+// -+ -+ -+// -+// =========== EXtern Function Prototype -+// -+ -+ -+u1Byte -+ODM_Read1Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr -+ ); -+ -+u2Byte -+ODM_Read2Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr -+ ); -+ -+u4Byte -+ODM_Read4Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr -+ ); -+ -+VOID -+ODM_Write1Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u1Byte Data -+ ); -+ -+VOID -+ODM_Write2Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u2Byte Data -+ ); -+ -+VOID -+ODM_Write4Byte( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte Data -+ ); -+ -+VOID -+ODM_SetMACReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ); -+ -+u4Byte -+ODM_GetMACReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ); -+ -+VOID -+ODM_SetBBReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ); -+ -+u4Byte -+ODM_GetBBReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ); -+ -+VOID -+ODM_SetRFReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_RF_RADIO_PATH_E eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ); -+ -+u4Byte -+ODM_GetRFReg( -+ IN PDM_ODM_T pDM_Odm, -+ IN ODM_RF_RADIO_PATH_E eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ); -+ -+ -+// -+// Memory Relative Function. -+// -+VOID -+ODM_AllocateMemory( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PVOID *pPtr, -+ IN u4Byte length -+ ); -+VOID -+ODM_FreeMemory( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PVOID pPtr, -+ IN u4Byte length -+ ); -+ -+VOID -+ODM_MoveMemory( -+ IN PDM_ODM_T pDM_Odm, -+ OUT PVOID pDest, -+ IN PVOID pSrc, -+ IN u4Byte Length -+ ); -+ -+s4Byte ODM_CompareMemory( -+ IN PDM_ODM_T pDM_Odm, -+ IN PVOID pBuf1, -+ IN PVOID pBuf2, -+ IN u4Byte length -+ ); -+ -+void ODM_Memory_Set -+ (IN PDM_ODM_T pDM_Odm, -+ IN PVOID pbuf, -+ IN s1Byte value, -+ IN u4Byte length); -+ -+// -+// ODM MISC-spin lock relative API. -+// -+VOID -+ODM_AcquireSpinLock( -+ IN PDM_ODM_T pDM_Odm, -+ IN RT_SPINLOCK_TYPE type -+ ); -+ -+VOID -+ODM_ReleaseSpinLock( -+ IN PDM_ODM_T pDM_Odm, -+ IN RT_SPINLOCK_TYPE type -+ ); -+ -+ -+// -+// ODM MISC-workitem relative API. -+// -+VOID -+ODM_InitializeWorkItem( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_WORK_ITEM pRtWorkItem, -+ IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, -+ IN PVOID pContext, -+ IN const char* szID -+ ); -+ -+VOID -+ODM_StartWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ); -+ -+VOID -+ODM_StopWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ); -+ -+VOID -+ODM_FreeWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ); -+ -+VOID -+ODM_ScheduleWorkItem( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ); -+ -+VOID -+ODM_IsWorkItemScheduled( -+ IN PRT_WORK_ITEM pRtWorkItem -+ ); -+ -+// -+// ODM Timer relative API. -+// -+VOID -+ODM_StallExecution( -+ IN u4Byte usDelay -+ ); -+ -+VOID -+ODM_delay_ms(IN u4Byte ms); -+ -+ -+ -+VOID -+ODM_delay_us(IN u4Byte us); -+ -+VOID -+ODM_sleep_ms(IN u4Byte ms); -+ -+VOID -+ODM_sleep_us(IN u4Byte us); -+ -+VOID -+ODM_SetTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer, -+ IN u4Byte msDelay -+ ); -+ -+VOID -+ODM_InitializeTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer, -+ IN RT_TIMER_CALL_BACK CallBackFunc, -+ IN PVOID pContext, -+ IN const char* szID -+ ); -+ -+VOID -+ODM_CancelTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer -+ ); -+ -+VOID -+ODM_ReleaseTimer( -+ IN PDM_ODM_T pDM_Odm, -+ IN PRT_TIMER pTimer -+ ); -+ -+BOOLEAN -+phydm_actingDetermine( -+ IN PDM_ODM_T pDM_Odm, -+ IN PHYDM_ACTING_TYPE type -+ ); -+ -+// -+// ODM FW relative API. -+// -+VOID -+ODM_FillH2CCmd( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte ElementID, -+ IN u4Byte CmdLen, -+ IN pu1Byte pCmdBuffer -+); -+ -+u1Byte -+phydm_c2H_content_parsing( -+ IN PVOID pDM_VOID, -+ IN u1Byte c2hCmdId, -+ IN u1Byte c2hCmdLen, -+ IN pu1Byte tmpBuf -+); -+ -+u8Byte -+ODM_GetCurrentTime( -+ IN PDM_ODM_T pDM_Odm -+ ); -+u8Byte -+ODM_GetProgressingTime( -+ IN PDM_ODM_T pDM_Odm, -+ IN u8Byte Start_Time -+ ); -+ -+#endif // __ODM_INTERFACE_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __ODM_INTERFACE_H__ ++#define __ODM_INTERFACE_H__ ++ ++#define INTERFACE_VERSION "1.0" /*2015.01.13 Dino*/ ++ ++// ++// =========== Constant/Structure/Enum/... Define ++// ++ ++ ++ ++// ++// =========== Macro Define ++// ++ ++#define _reg_all(_name) ODM_##_name ++#define _reg_ic(_name, _ic) ODM_##_name##_ic ++#define _bit_all(_name) BIT_##_name ++#define _bit_ic(_name, _ic) BIT_##_name##_ic ++ ++// _cat: implemented by Token-Pasting Operator. ++#if 0 ++#define _cat(_name, _ic_type, _func) \ ++ ( \ ++ _func##_all(_name) \ ++ ) ++#endif ++ ++/*=================================== ++ ++#define ODM_REG_DIG_11N 0xC50 ++#define ODM_REG_DIG_11AC 0xDDD ++ ++ODM_REG(DIG,_pDM_Odm) ++=====================================*/ ++ ++#define _reg_11N(_name) ODM_REG_##_name##_11N ++#define _reg_11AC(_name) ODM_REG_##_name##_11AC ++#define _bit_11N(_name) ODM_BIT_##_name##_11N ++#define _bit_11AC(_name) ODM_BIT_##_name##_11AC ++ ++#ifdef __ECOS ++#define _rtk_cat(_name, _ic_type, _func) \ ++ ( \ ++ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ ++ _func##_11AC(_name) \ ++ ) ++#else ++ ++#define _cat(_name, _ic_type, _func) \ ++ ( \ ++ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ ++ _func##_11AC(_name) \ ++ ) ++#endif ++/* ++// only sample code ++//#define _cat(_name, _ic_type, _func) \ ++// ( \ ++// ((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \ ++// ((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \ ++// ((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \ ++// ((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \ ++// ((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \ ++// _func##_ic(_name, _8195) \ ++// ) ++*/ ++ ++// _name: name of register or bit. ++// Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" ++// gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType. ++#ifdef __ECOS ++#define ODM_REG(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _reg) ++#define ODM_BIT(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _bit) ++#else ++#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) ++#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) ++#endif ++typedef enum _PHYDM_H2C_CMD { ++ ODM_H2C_RSSI_REPORT = 0, ++ ODM_H2C_PSD_RESULT = 1, ++ ODM_H2C_PathDiv = 2, ++ ODM_H2C_WIFI_CALIBRATION = 3, ++ ODM_H2C_IQ_CALIBRATION = 4, ++ ODM_H2C_RA_PARA_ADJUST = 5, ++ PHYDM_H2C_DYNAMIC_TX_PATH = 6, ++ PHYDM_H2C_FW_TRACE_EN = 7, ++ PHYDM_H2C_TXBF = 8, ++ ODM_MAX_H2CCMD ++} PHYDM_H2C_CMD; ++ ++typedef enum _PHYDM_C2H_EVT { ++ PHYDM_C2H_DBG = 0, ++ PHYDM_C2H_LB = 1, ++ PHYDM_C2H_XBF = 2, ++ PHYDM_C2H_TX_REPORT = 3, ++ PHYDM_C2H_INFO = 9, ++ PHYDM_C2H_BT_MP = 11, ++ PHYDM_C2H_RA_RPT = 12, ++ PHYDM_C2H_RA_PARA_RPT = 14, ++ PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15, ++ PHYDM_C2H_IQK_FINISH = 17, /*0x11*/ ++ PHYDM_C2H_DBG_CODE = 0xFE, ++ PHYDM_C2H_EXTEND = 0xFF, ++} PHYDM_C2H_EVT; ++ ++typedef enum _PHYDM_EXTEND_C2H_EVT { ++ PHYDM_EXTEND_C2H_DBG_PRINT = 0 ++ ++} PHYDM_EXTEND_C2H_EVT; ++ ++typedef enum _PHYDM_ACTING_TYPE { ++ PhyDM_ACTING_AS_IBSS = 0, ++ PhyDM_ACTING_AS_AP = 1 ++} PHYDM_ACTING_TYPE; ++ ++ ++// ++// 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. ++// Suggest HW team to use thread instead of workitem. Windows also support the feature. ++// ++#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) ++typedef void *PRT_WORK_ITEM ; ++typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE; ++typedef VOID (*RT_WORKITEM_CALL_BACK)(PVOID pContext); ++ ++#if 0 ++typedef struct tasklet_struct RT_WORKITEM_HANDLE, *PRT_WORKITEM_HANDLE; ++ ++typedef struct _RT_WORK_ITEM ++{ ++ ++ RT_WORKITEM_HANDLE Handle; // Platform-dependent handle for this workitem, e.g. Ndis Workitem object. ++ PVOID Adapter; // Pointer to Adapter object. ++ PVOID pContext; // Parameter to passed to CallBackFunc(). ++ RT_WORKITEM_CALL_BACK CallbackFunc; // Callback function of the workitem. ++ u1Byte RefCount; // 0: driver is going to unload, 1: No such workitem scheduled, 2: one workitem is schedueled. ++ PVOID pPlatformExt; // Pointer to platform-dependent extension. ++ BOOLEAN bFree; ++ char szID[36]; // An identity string of this workitem. ++}RT_WORK_ITEM, *PRT_WORK_ITEM; ++ ++#endif ++ ++ ++#endif ++ ++// ++// =========== Extern Variable ??? It should be forbidden. ++// ++ ++ ++// ++// =========== EXtern Function Prototype ++// ++ ++ ++u1Byte ++ODM_Read1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ); ++ ++u2Byte ++ODM_Read2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ); ++ ++u4Byte ++ODM_Read4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ); ++ ++VOID ++ODM_Write1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ); ++ ++VOID ++ODM_Write2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u2Byte Data ++ ); ++ ++VOID ++ODM_Write4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte Data ++ ); ++ ++VOID ++ODM_SetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++ ++u4Byte ++ODM_GetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++ ++VOID ++ODM_SetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++ ++u4Byte ++ODM_GetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++ ++VOID ++ODM_SetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++ ++u4Byte ++ODM_GetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++ ++ ++// ++// Memory Relative Function. ++// ++VOID ++ODM_AllocateMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID *pPtr, ++ IN u4Byte length ++ ); ++VOID ++ODM_FreeMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pPtr, ++ IN u4Byte length ++ ); ++ ++VOID ++ODM_MoveMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pDest, ++ IN PVOID pSrc, ++ IN u4Byte Length ++ ); ++ ++s4Byte ODM_CompareMemory( ++ IN PDM_ODM_T pDM_Odm, ++ IN PVOID pBuf1, ++ IN PVOID pBuf2, ++ IN u4Byte length ++ ); ++ ++void ODM_Memory_Set ++ (IN PDM_ODM_T pDM_Odm, ++ IN PVOID pbuf, ++ IN s1Byte value, ++ IN u4Byte length); ++ ++// ++// ODM MISC-spin lock relative API. ++// ++VOID ++ODM_AcquireSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ); ++ ++VOID ++ODM_ReleaseSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ); ++ ++ ++// ++// ODM MISC-workitem relative API. ++// ++VOID ++ODM_InitializeWorkItem( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_WORK_ITEM pRtWorkItem, ++ IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, ++ IN PVOID pContext, ++ IN const char* szID ++ ); ++ ++VOID ++ODM_StartWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_StopWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_FreeWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_ScheduleWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_IsWorkItemScheduled( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++// ++// ODM Timer relative API. ++// ++VOID ++ODM_StallExecution( ++ IN u4Byte usDelay ++ ); ++ ++VOID ++ODM_delay_ms(IN u4Byte ms); ++ ++ ++ ++VOID ++ODM_delay_us(IN u4Byte us); ++ ++VOID ++ODM_sleep_ms(IN u4Byte ms); ++ ++VOID ++ODM_sleep_us(IN u4Byte us); ++ ++VOID ++ODM_SetTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN u4Byte msDelay ++ ); ++ ++VOID ++ODM_InitializeTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN RT_TIMER_CALL_BACK CallBackFunc, ++ IN PVOID pContext, ++ IN const char* szID ++ ); ++ ++VOID ++ODM_CancelTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++ODM_ReleaseTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ); ++ ++BOOLEAN ++phydm_actingDetermine( ++ IN PDM_ODM_T pDM_Odm, ++ IN PHYDM_ACTING_TYPE type ++ ); ++ ++// ++// ODM FW relative API. ++// ++VOID ++ODM_FillH2CCmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte ElementID, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++); ++ ++u1Byte ++phydm_c2H_content_parsing( ++ IN PVOID pDM_VOID, ++ IN u1Byte c2hCmdId, ++ IN u1Byte c2hCmdLen, ++ IN pu1Byte tmpBuf ++); ++ ++u8Byte ++ODM_GetCurrentTime( ++ IN PDM_ODM_T pDM_Odm ++ ); ++u8Byte ++ODM_GetProgressingTime( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8Byte Start_Time ++ ); ++ ++#endif // __ODM_INTERFACE_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_noisemonitor.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_noisemonitor.c new file mode 100644 -index 000000000..647709cb5 +index 0000000..22c50db --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_noisemonitor.c @@ -0,0 +1,299 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+//#include "mp_precomp.h" -+#include "phydm_precomp.h" -+#include "phydm_noisemonitor.h" -+ -+//================================================= -+// This function is for inband noise test utility only -+// To obtain the inband noise level(dbm), do the following. -+// 1. disable DIG and Power Saving -+// 2. Set initial gain = 0x1a -+// 3. Stop updating idle time pwer report (for driver read) -+// - 0x80c[25] -+// -+//================================================= -+ -+#define Valid_Min -35 -+#define Valid_Max 10 -+#define ValidCnt 5 -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ -+s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time) -+{ -+ u4Byte tmp4b; -+ u1Byte max_rf_path=0,rf_path; -+ u1Byte reg_c50, reg_c58,valid_done=0; -+ struct noise_level noise_data; -+ u32 start = 0, func_start=0, func_end = 0; -+ -+ func_start = ODM_GetCurrentTime(pDM_Odm); -+ pDM_Odm->noise_level.noise_all = 0; -+ -+ if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R)) -+ max_rf_path = 2; -+ else -+ max_rf_path = 1; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n")); -+ -+ ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level)); -+ -+ // -+ // Step 1. Disable DIG && Set initial gain. -+ // -+ -+ if(bPauseDIG) -+ { -+ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue); -+ } -+ // -+ // Step 2. Disable all power save for read registers -+ // -+ //dcmd_DebugControlPowerSave(pAdapter, PSDisable); -+ -+ // -+ // Step 3. Get noise power level -+ // -+ start = ODM_GetCurrentTime(pDM_Odm); -+ while(1) -+ { -+ -+ //Stop updating idle time pwer report (for driver read) -+ ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1); -+ -+ //Read Noise Floor Report -+ tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord ); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b)); -+ -+ //ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain); -+ //if(max_rf_path == 2) -+ // ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain); -+ -+ //update idle time pwer report per 5us -+ ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0); -+ -+ noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff); -+ noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n", -+ noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B])); -+ -+ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) -+ { -+ noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path]; -+ noise_data.sval[rf_path] /= 2; -+ } -+ -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n", -+ noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B])); -+ //ODM_delay_ms(10); -+ //ODM_sleep_ms(10); -+ -+ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) -+ { -+ if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min)) -+ { -+ noise_data.valid_cnt[rf_path]++; -+ noise_data.sum[rf_path] += noise_data.sval[rf_path]; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path])); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path])); -+ if(noise_data.valid_cnt[rf_path] == ValidCnt) -+ { -+ valid_done++; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path])); -+ } -+ -+ } -+ -+ } -+ -+ //printk("####### valid_done:%d #############\n",valid_done); -+ if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time)) -+ { -+ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) -+ { -+ //printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); -+ if(noise_data.valid_cnt[rf_path]) -+ noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path]; -+ else -+ noise_data.sum[rf_path] = 0; -+ } -+ break; -+ } -+ } -+ reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0); -+ reg_c50 &= ~BIT7; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50)); -+ pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]; -+ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A]; -+ -+ if(max_rf_path == 2){ -+ reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0); -+ reg_c58 &= ~BIT7; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58)); -+ pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]; -+ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B]; -+ } -+ pDM_Odm->noise_level.noise_all /= max_rf_path; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n", -+ pDM_Odm->noise_level.noise[ODM_RF_PATH_A], -+ pDM_Odm->noise_level.noise[ODM_RF_PATH_B])); -+ -+ // -+ // Step 4. Recover the Dig -+ // -+ if(bPauseDIG) -+ { -+ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue); -+ } -+ func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_DebugControlInbandNoise_Nseries() <==\n")); -+ return pDM_Odm->noise_level.noise_all; -+ -+} -+ -+s2Byte -+odm_InbandNoise_Monitor_ACSeries(PDM_ODM_T pDM_Odm, u8 bPauseDIG, u8 IGIValue, u32 max_time -+ ) -+{ -+ s4Byte rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/ -+ s4Byte value32, pwdb_A = 0, sval, noise, sum; -+ BOOLEAN pd_flag; -+ u1Byte i, valid_cnt; -+ u32 start = 0, func_start = 0, func_end = 0; -+ -+ -+ if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821))) -+ return 0; -+ -+ func_start = ODM_GetCurrentTime(pDM_Odm); -+ pDM_Odm->noise_level.noise_all = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() ==>\n")); -+ -+ /* Step 1. Disable DIG && Set initial gain. */ -+ if (bPauseDIG) -+ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue); -+ -+ /* Step 2. Disable all power save for read registers */ -+ /*dcmd_DebugControlPowerSave(pAdapter, PSDisable); */ -+ -+ /* Step 3. Get noise power level */ -+ start = ODM_GetCurrentTime(pDM_Odm); -+ -+ /* reset counters */ -+ sum = 0; -+ valid_cnt = 0; -+ -+ /* Step 3. Get noise power level */ -+ while (1) { -+ /*Set IGI=0x1C */ -+ ODM_Write_DIG(pDM_Odm, 0x1C); -+ /*stop CK320&CK88 */ -+ ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 1); -+ /*Read Path-A */ -+ ODM_SetBBReg(pDM_Odm, 0x8FC, bMaskDWord, 0x200); /*set debug port*/ -+ value32 = ODM_GetBBReg(pDM_Odm, 0xFA0, bMaskDWord); /*read debug port*/ -+ -+ rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/ -+ rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/ -+ -+ pd_flag = (BOOLEAN) ((value32 & BIT31) >> 31); -+ -+ /*Not in packet detection period or Tx state */ -+ if ((!pd_flag) || (rxi_buf_anta != 0x200)) { -+ /*sign conversion*/ -+ rxi_buf_anta = ODM_SignConversion(rxi_buf_anta, 10); -+ rxq_buf_anta = ODM_SignConversion(rxq_buf_anta, 10); -+ -+ pwdb_A = ODM_PWdB_Conversion(rxi_buf_anta * rxi_buf_anta + rxq_buf_anta * rxq_buf_anta, 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/ -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", pwdb_A, rxi_buf_anta & 0x3FF, rxq_buf_anta & 0x3FF)); -+ } -+ -+ /*BB Reset*/ -+ ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) & (~BIT0)); -+ ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) | BIT0); -+ -+ /*Start CK320&CK88*/ -+ ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 0); -+ -+ sval = pwdb_A; -+ -+ if (sval < 0 && sval >= -27) { -+ if (valid_cnt < ValidCnt) { -+ valid_cnt++; -+ sum += sval; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Valid sval = %d\n", sval)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", sum)); -+ if ((valid_cnt >= ValidCnt) || (ODM_GetProgressingTime(pDM_Odm, start) > max_time)) { -+ sum /= valid_cnt; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, sum = %d\n", sum)); -+ break; -+ } -+ } -+ } -+ } -+ -+ /*ADC backoff is 12dB,*/ -+ /*Ptarget=0x1C-110=-82dBm*/ -+ noise = sum + 12 + 0x1C - 110; -+ -+ /*Offset*/ -+ noise = noise - 3; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("noise = %d\n", noise)); -+ pDM_Odm->noise_level.noise_all = (s2Byte)noise; -+ -+ /* Step 4. Recover the Dig*/ -+ if (bPauseDIG) -+ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue); -+ -+ func_end = ODM_GetProgressingTime(pDM_Odm, func_start); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() <==\n")); -+ -+ return pDM_Odm->noise_level.noise_all; -+} -+ -+ -+ -+s2Byte -+ODM_InbandNoise_Monitor(PVOID pDM_VOID, u8 bPauseDIG, u8 IGIValue, u32 max_time) -+{ -+ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) -+ return odm_InbandNoise_Monitor_ACSeries(pDM_Odm, bPauseDIG, IGIValue, max_time); -+ else -+ return odm_InbandNoise_Monitor_NSeries(pDM_Odm, bPauseDIG, IGIValue, max_time); -+} -+ -+#endif -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++//#include "mp_precomp.h" ++#include "phydm_precomp.h" ++#include "phydm_noisemonitor.h" ++ ++//================================================= ++// This function is for inband noise test utility only ++// To obtain the inband noise level(dbm), do the following. ++// 1. disable DIG and Power Saving ++// 2. Set initial gain = 0x1a ++// 3. Stop updating idle time pwer report (for driver read) ++// - 0x80c[25] ++// ++//================================================= ++ ++#define Valid_Min -35 ++#define Valid_Max 10 ++#define ValidCnt 5 ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time) ++{ ++ u4Byte tmp4b; ++ u1Byte max_rf_path=0,rf_path; ++ u1Byte reg_c50, reg_c58,valid_done=0; ++ struct noise_level noise_data; ++ u32 start = 0, func_start=0, func_end = 0; ++ ++ func_start = ODM_GetCurrentTime(pDM_Odm); ++ pDM_Odm->noise_level.noise_all = 0; ++ ++ if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R)) ++ max_rf_path = 2; ++ else ++ max_rf_path = 1; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n")); ++ ++ ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level)); ++ ++ // ++ // Step 1. Disable DIG && Set initial gain. ++ // ++ ++ if(bPauseDIG) ++ { ++ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ } ++ // ++ // Step 2. Disable all power save for read registers ++ // ++ //dcmd_DebugControlPowerSave(pAdapter, PSDisable); ++ ++ // ++ // Step 3. Get noise power level ++ // ++ start = ODM_GetCurrentTime(pDM_Odm); ++ while(1) ++ { ++ ++ //Stop updating idle time pwer report (for driver read) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1); ++ ++ //Read Noise Floor Report ++ tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord ); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b)); ++ ++ //ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain); ++ //if(max_rf_path == 2) ++ // ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain); ++ ++ //update idle time pwer report per 5us ++ ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0); ++ ++ noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff); ++ noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n", ++ noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B])); ++ ++ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) ++ { ++ noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path]; ++ noise_data.sval[rf_path] /= 2; ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n", ++ noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B])); ++ //ODM_delay_ms(10); ++ //ODM_sleep_ms(10); ++ ++ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) ++ { ++ if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min)) ++ { ++ noise_data.valid_cnt[rf_path]++; ++ noise_data.sum[rf_path] += noise_data.sval[rf_path]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path])); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path])); ++ if(noise_data.valid_cnt[rf_path] == ValidCnt) ++ { ++ valid_done++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path])); ++ } ++ ++ } ++ ++ } ++ ++ //printk("####### valid_done:%d #############\n",valid_done); ++ if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time)) ++ { ++ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) ++ { ++ //printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); ++ if(noise_data.valid_cnt[rf_path]) ++ noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path]; ++ else ++ noise_data.sum[rf_path] = 0; ++ } ++ break; ++ } ++ } ++ reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0); ++ reg_c50 &= ~BIT7; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50)); ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]; ++ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A]; ++ ++ if(max_rf_path == 2){ ++ reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0); ++ reg_c58 &= ~BIT7; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58)); ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]; ++ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B]; ++ } ++ pDM_Odm->noise_level.noise_all /= max_rf_path; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n", ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_A], ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_B])); ++ ++ // ++ // Step 4. Recover the Dig ++ // ++ if(bPauseDIG) ++ { ++ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ } ++ func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_DebugControlInbandNoise_Nseries() <==\n")); ++ return pDM_Odm->noise_level.noise_all; ++ ++} ++ ++s2Byte ++odm_InbandNoise_Monitor_ACSeries(PDM_ODM_T pDM_Odm, u8 bPauseDIG, u8 IGIValue, u32 max_time ++ ) ++{ ++ s4Byte rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/ ++ s4Byte value32, pwdb_A = 0, sval, noise, sum; ++ BOOLEAN pd_flag; ++ u1Byte i, valid_cnt; ++ u32 start = 0, func_start = 0, func_end = 0; ++ ++ ++ if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821))) ++ return 0; ++ ++ func_start = ODM_GetCurrentTime(pDM_Odm); ++ pDM_Odm->noise_level.noise_all = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() ==>\n")); ++ ++ /* Step 1. Disable DIG && Set initial gain. */ ++ if (bPauseDIG) ++ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ ++ /* Step 2. Disable all power save for read registers */ ++ /*dcmd_DebugControlPowerSave(pAdapter, PSDisable); */ ++ ++ /* Step 3. Get noise power level */ ++ start = ODM_GetCurrentTime(pDM_Odm); ++ ++ /* reset counters */ ++ sum = 0; ++ valid_cnt = 0; ++ ++ /* Step 3. Get noise power level */ ++ while (1) { ++ /*Set IGI=0x1C */ ++ ODM_Write_DIG(pDM_Odm, 0x1C); ++ /*stop CK320&CK88 */ ++ ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 1); ++ /*Read Path-A */ ++ ODM_SetBBReg(pDM_Odm, 0x8FC, bMaskDWord, 0x200); /*set debug port*/ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFA0, bMaskDWord); /*read debug port*/ ++ ++ rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/ ++ rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/ ++ ++ pd_flag = (BOOLEAN) ((value32 & BIT31) >> 31); ++ ++ /*Not in packet detection period or Tx state */ ++ if ((!pd_flag) || (rxi_buf_anta != 0x200)) { ++ /*sign conversion*/ ++ rxi_buf_anta = ODM_SignConversion(rxi_buf_anta, 10); ++ rxq_buf_anta = ODM_SignConversion(rxq_buf_anta, 10); ++ ++ pwdb_A = ODM_PWdB_Conversion(rxi_buf_anta * rxi_buf_anta + rxq_buf_anta * rxq_buf_anta, 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", pwdb_A, rxi_buf_anta & 0x3FF, rxq_buf_anta & 0x3FF)); ++ } ++ ++ /*BB Reset*/ ++ ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) & (~BIT0)); ++ ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) | BIT0); ++ ++ /*Start CK320&CK88*/ ++ ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 0); ++ ++ sval = pwdb_A; ++ ++ if (sval < 0 && sval >= -27) { ++ if (valid_cnt < ValidCnt) { ++ valid_cnt++; ++ sum += sval; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Valid sval = %d\n", sval)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", sum)); ++ if ((valid_cnt >= ValidCnt) || (ODM_GetProgressingTime(pDM_Odm, start) > max_time)) { ++ sum /= valid_cnt; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, sum = %d\n", sum)); ++ break; ++ } ++ } ++ } ++ } ++ ++ /*ADC backoff is 12dB,*/ ++ /*Ptarget=0x1C-110=-82dBm*/ ++ noise = sum + 12 + 0x1C - 110; ++ ++ /*Offset*/ ++ noise = noise - 3; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("noise = %d\n", noise)); ++ pDM_Odm->noise_level.noise_all = (s2Byte)noise; ++ ++ /* Step 4. Recover the Dig*/ ++ if (bPauseDIG) ++ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ ++ func_end = ODM_GetProgressingTime(pDM_Odm, func_start); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() <==\n")); ++ ++ return pDM_Odm->noise_level.noise_all; ++} ++ ++ ++ ++s2Byte ++ODM_InbandNoise_Monitor(PVOID pDM_VOID, u8 bPauseDIG, u8 IGIValue, u32 max_time) ++{ ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ return odm_InbandNoise_Monitor_ACSeries(pDM_Odm, bPauseDIG, IGIValue, max_time); ++ else ++ return odm_InbandNoise_Monitor_NSeries(pDM_Odm, bPauseDIG, IGIValue, max_time); ++} ++ ++#endif ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_noisemonitor.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_noisemonitor.h new file mode 100644 -index 000000000..022cefe28 +index 0000000..6625be6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_noisemonitor.h @@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ *****************************************************************************/ -+#ifndef __ODMNOISEMONITOR_H__ -+#define __ODMNOISEMONITOR_H__ -+ -+#define ODM_MAX_CHANNEL_NUM 38//14+24 -+struct noise_level -+{ -+ //u1Byte value_a, value_b; -+ u1Byte value[MAX_RF_PATH]; -+ //s1Byte sval_a, sval_b; -+ s1Byte sval[MAX_RF_PATH]; -+ -+ //s4Byte noise_a=0, noise_b=0,sum_a=0, sum_b=0; -+ //s4Byte noise[ODM_RF_PATH_MAX]; -+ s4Byte sum[MAX_RF_PATH]; -+ //u1Byte valid_cnt_a=0, valid_cnt_b=0, -+ u1Byte valid[MAX_RF_PATH]; -+ u1Byte valid_cnt[MAX_RF_PATH]; -+ -+}; -+ -+ -+typedef struct _ODM_NOISE_MONITOR_ -+{ -+ s1Byte noise[MAX_RF_PATH]; -+ s2Byte noise_all; -+}ODM_NOISE_MONITOR; -+ -+s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time); -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ *****************************************************************************/ ++#ifndef __ODMNOISEMONITOR_H__ ++#define __ODMNOISEMONITOR_H__ ++ ++#define ODM_MAX_CHANNEL_NUM 38//14+24 ++struct noise_level ++{ ++ //u1Byte value_a, value_b; ++ u1Byte value[MAX_RF_PATH]; ++ //s1Byte sval_a, sval_b; ++ s1Byte sval[MAX_RF_PATH]; ++ ++ //s4Byte noise_a=0, noise_b=0,sum_a=0, sum_b=0; ++ //s4Byte noise[ODM_RF_PATH_MAX]; ++ s4Byte sum[MAX_RF_PATH]; ++ //u1Byte valid_cnt_a=0, valid_cnt_b=0, ++ u1Byte valid[MAX_RF_PATH]; ++ u1Byte valid_cnt[MAX_RF_PATH]; ++ ++}; ++ ++ ++typedef struct _ODM_NOISE_MONITOR_ ++{ ++ s1Byte noise[MAX_RF_PATH]; ++ s2Byte noise_all; ++}ODM_NOISE_MONITOR; ++ ++s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time); ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pathdiv.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pathdiv.c new file mode 100644 -index 000000000..f1a8f1122 +index 0000000..433d091 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pathdiv.c @@ -0,0 +1,2311 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if(defined(CONFIG_PATH_DIVERSITY)) -+#if RTL8814A_SUPPORT -+ -+VOID -+phydm_dtp_fix_tx_path( -+ IN PVOID pDM_VOID, -+ IN u1Byte path -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; -+ u1Byte i,num_enable_path=0; -+ -+ if(path==pDM_PathDiv->pre_tx_path) -+ { -+ return; -+ } -+ else -+ { -+ pDM_PathDiv->pre_tx_path=path; -+ } -+ -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT18|BIT19, 3); -+ -+ for(i=0; i<4; i++) -+ { -+ if(path&BIT(i)) -+ num_enable_path++; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Number of trun-on path : (( %d ))\n", num_enable_path)); -+ -+ if(num_enable_path == 1) -+ { -+ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); -+ -+ if(path==PHYDM_A)//1-1 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A ))\n")); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); -+ } -+ else if(path==PHYDM_B)//1-2 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B ))\n")); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); -+ } -+ else if(path==PHYDM_C)//1-3 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( C ))\n")); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 0); -+ -+ } -+ else if(path==PHYDM_D)//1-4 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( D ))\n")); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 0); -+ } -+ -+ } -+ else if(num_enable_path == 2) -+ { -+ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); -+ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0, path); -+ -+ if(path==PHYDM_AB)//2-1 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); -+ } -+ else if(path==PHYDM_AC)//2-2 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A C ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); -+ } -+ else if(path==PHYDM_AD)//2-3 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A D ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); -+ } -+ else if(path==PHYDM_BC)//2-4 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B C ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); -+ } -+ else if(path==PHYDM_BD)//2-5 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B D ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); -+ } -+ else if(path==PHYDM_CD)//2-6 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( C D ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); -+ } -+ -+ } -+ else if(num_enable_path == 3) -+ { -+ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); -+ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0, path); -+ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0000, path); -+ -+ if(path==PHYDM_ABC)//3-1 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B C))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 2); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 2); -+ //set for 3ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 2); -+ } -+ else if(path==PHYDM_ABD)//3-2 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B D ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); -+ //set for 3ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); -+ -+ } -+ else if(path==PHYDM_ACD)//3-3 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A C D ))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); -+ //set for 3ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); -+ } -+ else if(path==PHYDM_BCD)//3-4 -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B C D))\n")); -+ //set for 1ss -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); -+ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); -+ //set for 2ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); -+ //set for 3ss -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 0); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 1); -+ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); -+ } -+ } -+ else if(num_enable_path == 4) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path ((A B C D))\n")); -+ } -+ -+} -+ -+VOID -+phydm_find_default_path( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; -+ u4Byte rssi_avg_a=0, rssi_avg_b=0, rssi_avg_c=0, rssi_avg_d=0, rssi_avg_bcd=0; -+ u4Byte rssi_total_a=0, rssi_total_b=0, rssi_total_c=0, rssi_total_d=0; -+ -+ //2 Default Path Selection By RSSI -+ -+ rssi_avg_a = (pDM_PathDiv->path_a_cnt_all > 0)? (pDM_PathDiv->path_a_sum_all / pDM_PathDiv->path_a_cnt_all) :0 ; -+ rssi_avg_b = (pDM_PathDiv->path_b_cnt_all > 0)? (pDM_PathDiv->path_b_sum_all / pDM_PathDiv->path_b_cnt_all) :0 ; -+ rssi_avg_c = (pDM_PathDiv->path_c_cnt_all > 0)? (pDM_PathDiv->path_c_sum_all / pDM_PathDiv->path_c_cnt_all) :0 ; -+ rssi_avg_d = (pDM_PathDiv->path_d_cnt_all > 0)? (pDM_PathDiv->path_d_sum_all / pDM_PathDiv->path_d_cnt_all) :0 ; -+ -+ -+ pDM_PathDiv->path_a_sum_all = 0; -+ pDM_PathDiv->path_a_cnt_all = 0; -+ pDM_PathDiv->path_b_sum_all = 0; -+ pDM_PathDiv->path_b_cnt_all = 0; -+ pDM_PathDiv->path_c_sum_all = 0; -+ pDM_PathDiv->path_c_cnt_all = 0; -+ pDM_PathDiv->path_d_sum_all = 0; -+ pDM_PathDiv->path_d_cnt_all = 0; -+ -+ if(pDM_PathDiv->use_path_a_as_default_ant == 1) -+ { -+ rssi_avg_bcd=(rssi_avg_b+rssi_avg_c+rssi_avg_d)/3; -+ -+ if( (rssi_avg_a + ANT_DECT_RSSI_TH) > rssi_avg_bcd ) -+ { -+ pDM_PathDiv->is_pathA_exist=TRUE; -+ pDM_PathDiv->default_path=PATH_A; -+ } -+ else -+ { -+ pDM_PathDiv->is_pathA_exist=FALSE; -+ } -+ } -+ else -+ { -+ if( (rssi_avg_a >=rssi_avg_b) && (rssi_avg_a >=rssi_avg_c)&&(rssi_avg_a >=rssi_avg_d)) -+ pDM_PathDiv->default_path=PATH_A; -+ else if( (rssi_avg_b >=rssi_avg_c)&&(rssi_avg_b >=rssi_avg_d)) -+ pDM_PathDiv->default_path=PATH_B; -+ else if( rssi_avg_c >=rssi_avg_d) -+ pDM_PathDiv->default_path=PATH_C; -+ else -+ pDM_PathDiv->default_path=PATH_D; -+ } -+ -+ -+} -+ -+ -+VOID -+phydm_candidate_dtp_update( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; -+ -+ pDM_PathDiv->num_candidate=3; -+ -+ if(pDM_PathDiv->use_path_a_as_default_ant == 1) -+ { -+ if(pDM_PathDiv->num_tx_path==3) -+ { -+ if(pDM_PathDiv->is_pathA_exist) -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_ACD; -+ } -+ else // use path BCD -+ { -+ pDM_PathDiv->num_candidate=1; -+ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BCD); -+ return; -+ } -+ } -+ else if(pDM_PathDiv->num_tx_path==2) -+ { -+ if(pDM_PathDiv->is_pathA_exist) -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_AC; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_AD; -+ } -+ else -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_BC; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_BD; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_CD; -+ } -+ } -+ } -+ else -+ { -+ //2 3 TX Mode -+ if(pDM_PathDiv->num_tx_path==3)//choose 3 ant form 4 -+ { -+ if(pDM_PathDiv->default_path == PATH_A) //choose 2 ant form 3 -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_ACD; -+ } -+ else if(pDM_PathDiv->default_path==PATH_B) -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; -+ } -+ else if(pDM_PathDiv->default_path == PATH_C) -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_ACD; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; -+ } -+ else if(pDM_PathDiv->default_path == PATH_D) -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_ABD; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_ACD; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; -+ } -+ } -+ -+ //2 2 TX Mode -+ else if(pDM_PathDiv->num_tx_path==2)//choose 2 ant form 4 -+ { -+ if(pDM_PathDiv->default_path == PATH_A) //choose 2 ant form 3 -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_AC; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_AD; -+ } -+ else if(pDM_PathDiv->default_path==PATH_B) -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_BC; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_BD; -+ } -+ else if(pDM_PathDiv->default_path == PATH_C) -+ { -+ pDM_PathDiv->ant_candidate_1 = PHYDM_AC; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_BC; -+ pDM_PathDiv->ant_candidate_3 = PHYDM_CD; -+ } -+ else if(pDM_PathDiv->default_path == PATH_D) -+ { -+ pDM_PathDiv->ant_candidate_1= PHYDM_AD; -+ pDM_PathDiv->ant_candidate_2 = PHYDM_BD; -+ pDM_PathDiv->ant_candidate_3= PHYDM_CD; -+ } -+ } -+ } -+} -+ -+ -+VOID -+phydm_dynamic_tx_path( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; -+ -+ PSTA_INFO_T pEntry; -+ u4Byte i; -+ u1Byte num_client=0; -+ u1Byte H2C_Parameter[6] ={0}; -+ -+ -+ if(!pDM_Odm->bLinked) //bLinked==False -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("DTP_8814 [No Link!!!]\n")); -+ -+ if(pDM_PathDiv->bBecomeLinked == TRUE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" [Be disconnected]----->\n")); -+ pDM_PathDiv->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ return; -+ } -+ else -+ { -+ if(pDM_PathDiv->bBecomeLinked ==FALSE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" [Be Linked !!!]----->\n")); -+ pDM_PathDiv->bBecomeLinked = pDM_Odm->bLinked; -+ } -+ } -+ -+ //2 [Period CTRL] -+ if(pDM_PathDiv->dtp_period >=2) -+ { -+ pDM_PathDiv->dtp_period=0; -+ } -+ else -+ { -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Phydm_Dynamic_Tx_Path_8814A() Stay = (( %d ))\n",pDM_PathDiv->dtp_period)); -+ pDM_PathDiv->dtp_period++; -+ return; -+ } -+ -+ -+ //2 [Fix Path] -+ if (pDM_Odm->path_select != PHYDM_AUTO_PATH) -+ { -+ return; -+ } -+ -+ //2 [Check Bfer] -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #if (BEAMFORMING_SUPPORT == 1) -+ { -+ BEAMFORMING_CAP BeamformCap = (pDM_Odm->BeamformingInfo.BeamformCap); -+ -+ if( BeamformCap & BEAMFORMER_CAP ) // BFmer On && Div On -> Div Off -+ { -+ if( pDM_PathDiv->fix_path_bfer == 0) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("[ PathDiv : OFF ] BFmer ==1 \n")); -+ pDM_PathDiv->fix_path_bfer = 1 ; -+ } -+ return; -+ } -+ else // BFmer Off && Div Off -> Div On -+ { -+ if( pDM_PathDiv->fix_path_bfer == 1 ) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("[ PathDiv : ON ] BFmer ==0 \n")); -+ pDM_PathDiv->fix_path_bfer = 0; -+ } -+ } -+ } -+ #endif -+ #endif -+ -+ if(pDM_PathDiv->use_path_a_as_default_ant ==1) -+ { -+ phydm_find_default_path(pDM_Odm); -+ phydm_candidate_dtp_update(pDM_Odm); -+ } -+ else -+ { -+ if( pDM_PathDiv->dtp_state == PHYDM_DTP_INIT) -+ { -+ phydm_find_default_path(pDM_Odm); -+ phydm_candidate_dtp_update(pDM_Odm); -+ pDM_PathDiv->dtp_state = PHYDM_DTP_RUNNING_1; -+ } -+ -+ else if( pDM_PathDiv->dtp_state == PHYDM_DTP_RUNNING_1) -+ { -+ pDM_PathDiv->dtp_check_patha_counter++; -+ -+ if(pDM_PathDiv->dtp_check_patha_counter>=NUM_RESET_DTP_PERIOD) -+ { -+ pDM_PathDiv->dtp_check_patha_counter=0; -+ pDM_PathDiv->dtp_state = PHYDM_DTP_INIT; -+ } -+ //2 Search space update -+ else -+ { -+ // 1. find the worst candidate -+ -+ -+ // 2. repalce the worst candidate -+ } -+ } -+ } -+ -+ //2 Dynamic Path Selection H2C -+ -+ if(pDM_PathDiv->num_candidate == 1) -+ { -+ return; -+ } -+ else -+ { -+ H2C_Parameter[0] = pDM_PathDiv->num_candidate; -+ H2C_Parameter[1] = pDM_PathDiv->num_tx_path; -+ H2C_Parameter[2] = pDM_PathDiv->ant_candidate_1; -+ H2C_Parameter[3] = pDM_PathDiv->ant_candidate_2; -+ H2C_Parameter[4] = pDM_PathDiv->ant_candidate_3; -+ -+ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, H2C_Parameter); -+ } -+ -+} -+ -+ -+ -+VOID -+phydm_dynamic_tx_path_init( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ USB_MODE_MECH *pUsbModeMech = &pAdapter->UsbModeMechanism; -+ #endif -+ u1Byte search_space_2[NUM_CHOOSE2_FROM4]= {PHYDM_AB, PHYDM_AC, PHYDM_AD, PHYDM_BC, PHYDM_BD, PHYDM_CD }; -+ u1Byte search_space_3[NUM_CHOOSE3_FROM4]= {PHYDM_BCD, PHYDM_ACD, PHYDM_ABD, PHYDM_ABC}; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pDM_PathDiv->is_u3_mode = (pUsbModeMech->CurUsbMode==USB_MODE_U3)? 1 : 0 ; -+ #else -+ pDM_PathDiv->is_u3_mode = 1; -+ #endif -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Dynamic TX Path Init 8814\n")); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("is_u3_mode = (( %d ))\n", pDM_PathDiv->is_u3_mode)); -+ -+ memcpy(&(pDM_PathDiv->search_space_2[0]), &(search_space_2[0]), NUM_CHOOSE2_FROM4); -+ memcpy(&(pDM_PathDiv->search_space_3[0]), &(search_space_3[0]), NUM_CHOOSE3_FROM4); -+ -+ pDM_PathDiv->use_path_a_as_default_ant= 1; -+ pDM_PathDiv->dtp_state = PHYDM_DTP_INIT; -+ pDM_Odm->path_select = PHYDM_AUTO_PATH; -+ pDM_PathDiv->path_div_type = PHYDM_4R_PATH_DIV; -+ -+ -+ if(pDM_PathDiv->is_u3_mode ) -+ { -+ pDM_PathDiv->num_tx_path=3; -+ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BCD);/* 3TX Set Init TX Path*/ -+ -+ } -+ else -+ { -+ pDM_PathDiv->num_tx_path=2; -+ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BC);/* 2TX // Set Init TX Path*/ -+ } -+ -+} -+ -+ -+VOID -+phydm_process_rssi_for_path_div( -+ IN OUT PVOID pDM_VOID, -+ IN PVOID p_phy_info_void, -+ IN PVOID p_pkt_info_void -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; -+ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; -+ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); -+ -+ if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID) -+ { -+ if(pPktinfo->DataRate > ODM_RATE11M) -+ { -+ if(pDM_PathDiv->path_div_type == PHYDM_4R_PATH_DIV) -+ { -+ #if RTL8814A_SUPPORT -+ if(pDM_Odm->SupportICType & ODM_RTL8814A) -+ { -+ pDM_PathDiv->path_a_sum_all+=pPhyInfo->RxMIMOSignalStrength[0]; -+ pDM_PathDiv->path_a_cnt_all++; -+ -+ pDM_PathDiv->path_b_sum_all+=pPhyInfo->RxMIMOSignalStrength[1]; -+ pDM_PathDiv->path_b_cnt_all++; -+ -+ pDM_PathDiv->path_c_sum_all+=pPhyInfo->RxMIMOSignalStrength[2]; -+ pDM_PathDiv->path_c_cnt_all++; -+ -+ pDM_PathDiv->path_d_sum_all+=pPhyInfo->RxMIMOSignalStrength[3]; -+ pDM_PathDiv->path_d_cnt_all++; -+ } -+ #endif -+ } -+ else -+ { -+ pDM_PathDiv->PathA_Sum[pPktinfo->StationID]+=pPhyInfo->RxMIMOSignalStrength[0]; -+ pDM_PathDiv->PathA_Cnt[pPktinfo->StationID]++; -+ -+ pDM_PathDiv->PathB_Sum[pPktinfo->StationID]+=pPhyInfo->RxMIMOSignalStrength[1]; -+ pDM_PathDiv->PathB_Cnt[pPktinfo->StationID]++; -+ } -+ } -+ } -+ -+ -+} -+ -+#endif //#if RTL8814A_SUPPORT -+ -+VOID -+odm_pathdiv_debug( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); -+ u4Byte used = *_used; -+ u4Byte out_len = *_out_len; -+ -+ pDM_Odm->path_select = (dm_value[0] & 0xf); -+ PHYDM_SNPRINTF((output+used, out_len-used,"Path_select = (( 0x%x ))\n",pDM_Odm->path_select )); -+ -+ //2 [Fix Path] -+ if (pDM_Odm->path_select != PHYDM_AUTO_PATH) -+ { -+ PHYDM_SNPRINTF((output+used, out_len-used,"Trun on path [%s%s%s%s]\n", -+ ((pDM_Odm->path_select) & 0x1)?"A":"", -+ ((pDM_Odm->path_select) & 0x2)?"B":"", -+ ((pDM_Odm->path_select) & 0x4)?"C":"", -+ ((pDM_Odm->path_select) & 0x8)?"D":"" )); -+ -+ phydm_dtp_fix_tx_path( pDM_Odm, pDM_Odm->path_select ); -+ } -+ else -+ { -+ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n","Auto Path")); -+ } -+} -+ -+#endif // #if(defined(CONFIG_PATH_DIVERSITY)) -+ -+VOID -+phydm_c2h_dtp_handler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+) -+{ -+#if(defined(CONFIG_PATH_DIVERSITY)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); -+ -+ u1Byte macid = CmdBuf[0]; -+ u1Byte target = CmdBuf[1]; -+ u1Byte nsc_1 = CmdBuf[2]; -+ u1Byte nsc_2 = CmdBuf[3]; -+ u1Byte nsc_3 = CmdBuf[4]; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Target_candidate = (( %d ))\n", target)); -+ /* -+ if( (nsc_1 >= nsc_2) && (nsc_1 >= nsc_3)) -+ { -+ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_1); -+ } -+ else if( nsc_2 >= nsc_3) -+ { -+ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_2); -+ } -+ else -+ { -+ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_3); -+ } -+ */ -+#endif -+} -+ -+VOID -+odm_PathDiversity( -+ IN PVOID pDM_VOID -+) -+{ -+#if(defined(CONFIG_PATH_DIVERSITY)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); -+ return; -+ } -+ -+ #if RTL8812A_SUPPORT -+ -+ if(pDM_Odm->SupportICType & ODM_RTL8812) -+ ODM_PathDiversity_8812A(pDM_Odm); -+ else -+ #endif -+ -+ #if RTL8814A_SUPPORT -+ if(pDM_Odm->SupportICType & ODM_RTL8814A) -+ phydm_dynamic_tx_path(pDM_Odm); -+ else -+ #endif -+ {} -+#endif -+} -+ -+VOID -+odm_PathDiversityInit( -+ IN PVOID pDM_VOID -+) -+{ -+#if(defined(CONFIG_PATH_DIVERSITY)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ /*pDM_Odm->SupportAbility |= ODM_BB_PATH_DIV;*/ -+ -+ if(pDM_Odm->mp_mode == TRUE) -+ return; -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) -+ { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); -+ return; -+ } -+ -+#if RTL8812A_SUPPORT -+ if(pDM_Odm->SupportICType & ODM_RTL8812) -+ ODM_PathDiversityInit_8812A(pDM_Odm); -+ else -+ #endif -+ -+ #if RTL8814A_SUPPORT -+ if(pDM_Odm->SupportICType & ODM_RTL8814A) -+ phydm_dynamic_tx_path_init(pDM_Odm); -+ else -+ #endif -+ {} -+#endif -+} -+ -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+// -+// 2011/12/02 MH Copy from MP oursrc for temporarily test. -+// -+#if RTL8192C_SUPPORT -+BOOLEAN -+odm_IsConnected_92C( -+ IN PADAPTER Adapter -+) -+{ -+ PRT_WLAN_STA pEntry; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ u4Byte i; -+ BOOLEAN bConnected=FALSE; -+ -+ if(pMgntInfo->mAssoc) -+ { -+ bConnected = TRUE; -+ } -+ else -+ { -+ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ { -+ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) -+ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); -+ else -+ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); -+ -+ if(pEntry!=NULL) -+ { -+ if(pEntry->bAssociated) -+ { -+ bConnected = TRUE; -+ break; -+ } -+ } -+ else -+ { -+ break; -+ } -+ } -+ } -+ return bConnected; -+} -+ -+BOOLEAN -+ODM_PathDiversityBeforeLink92C( -+ //IN PADAPTER Adapter -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE* pHalData = NULL; -+ PMGNT_INFO pMgntInfo = NULL; -+ //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; -+ pPD_T pDM_PDTable = NULL; -+ -+ s1Byte Score = 0; -+ PRT_WLAN_BSS pTmpBssDesc; -+ PRT_WLAN_BSS pTestBssDesc; -+ -+ u1Byte target_chnl = 0; -+ u2Byte index; -+ -+ if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 -+ { // The ODM structure is not initialized. -+ return FALSE; -+ } -+ pHalData = GET_HAL_DATA(Adapter); -+ pMgntInfo = &Adapter->MgntInfo; -+ pDM_PDTable = &Adapter->DM_PDTable; -+ -+ // Condition that does not need to use path diversity. -+ if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) -+ { -+ RT_TRACE(COMP_INIT, DBG_LOUD, -+ ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); -+ return FALSE; -+ } -+ -+ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. -+ PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); -+ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) -+ { -+ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); -+ -+ RT_TRACE(COMP_INIT, DBG_LOUD, -+ ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", -+ pMgntInfo->RFChangeInProgress, -+ pHalData->eRFPowerState)); -+ -+ //pDM_SWAT_Table->SWAS_NoLink_State = 0; -+ pDM_PDTable->PathDiv_NoLink_State = 0; -+ -+ return FALSE; -+ } -+ else -+ { -+ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); -+ } -+ -+ //1 Run AntDiv mechanism "Before Link" part. -+ //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) -+ if(pDM_PDTable->PathDiv_NoLink_State == 0) -+ { -+ //1 Prepare to do Scan again to check current antenna state. -+ -+ // Set check state to next step. -+ //pDM_SWAT_Table->SWAS_NoLink_State = 1; -+ pDM_PDTable->PathDiv_NoLink_State = 1; -+ -+ // Copy Current Scan list. -+ Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; -+ PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); -+ -+ // Switch Antenna to another one. -+ if(pDM_PDTable->DefaultRespPath == 0) -+ { -+ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB -+ odm_SetRespPath_92C(Adapter, 1); -+ pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; -+ pDM_PDTable->CCKTXPath = 0xFFFFFFFF; -+ } -+ else -+ { -+ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA -+ odm_SetRespPath_92C(Adapter, 0); -+ pDM_PDTable->OFDMTXPath = 0x0; -+ pDM_PDTable->CCKTXPath = 0x0; -+ } -+#if 0 -+ -+ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; -+ pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; -+ -+ RT_TRACE(COMP_INIT, DBG_LOUD, -+ ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); -+ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); -+ pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); -+ PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); -+#endif -+ -+ // Go back to scan function again. -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); -+ pMgntInfo->ScanStep=0; -+ target_chnl = odm_SwAntDivSelectScanChnl(Adapter); -+ odm_SwAntDivConstructScanChnl(Adapter, target_chnl); -+ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); -+ -+ return TRUE; -+ } -+ else -+ { -+ //1 ScanComple() is called after antenna swiched. -+ //1 Check scan result and determine which antenna is going -+ //1 to be used. -+ -+ for(index=0; indexMgntInfo.tmpNumBssDesc; index++) -+ { -+ pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); -+ pTestBssDesc = &(pMgntInfo->bssDesc[index]); -+ -+ if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) -+ { -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); -+ continue; -+ } -+ -+ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) -+ { -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); -+ RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ -+ Score++; -+ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); -+ } -+ else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) -+ { -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); -+ RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); -+ Score--; -+ } -+ -+ } -+ -+ if(pMgntInfo->NumBssDesc!=0 && Score<=0) -+ { -+ RT_TRACE(COMP_INIT, DBG_LOUD, -+ ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); -+ -+ //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; -+ } -+ else -+ { -+ RT_TRACE(COMP_INIT, DBG_LOUD, -+ ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); -+ -+ if(pDM_PDTable->DefaultRespPath == 0) -+ { -+ pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; -+ pDM_PDTable->CCKTXPath = 0xFFFFFFFF; -+ odm_SetRespPath_92C(Adapter, 1); -+ } -+ else -+ { -+ pDM_PDTable->OFDMTXPath = 0x0; -+ pDM_PDTable->CCKTXPath = 0x0; -+ odm_SetRespPath_92C(Adapter, 0); -+ } -+ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB -+ -+ //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; -+ -+ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); -+ //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); -+ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); -+ } -+ -+ // Check state reset to default and wait for next time. -+ //pDM_SWAT_Table->SWAS_NoLink_State = 0; -+ pDM_PDTable->PathDiv_NoLink_State = 0; -+ -+ return FALSE; -+ } -+#else -+ return FALSE; -+#endif -+ -+} -+ -+ -+ -+VOID -+odm_PathDiversityAfterLink_92C( -+ IN PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ pPD_T pDM_PDTable = &Adapter->DM_PDTable; -+ u1Byte DefaultRespPath=0; -+ -+ if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) -+ { -+ if(pHalData->PathDivCfg == 0) -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); -+ } -+ else -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); -+ } -+ return; -+ } -+ if(!odm_IsConnected_92C(Adapter)) -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); -+ return; -+ } -+ -+ -+ if(pDM_PDTable->TrainingState == 0) -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); -+ odm_OFDMTXPathDiversity_92C(Adapter); -+ -+ if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) -+ { -+ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); -+ -+ if(pDM_PDTable->CCK_Pkt_Cnt > 300) -+ pDM_PDTable->Timer = 20; -+ else if(pDM_PDTable->CCK_Pkt_Cnt > 100) -+ pDM_PDTable->Timer = 60; -+ else -+ pDM_PDTable->Timer = 250; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); -+ -+ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA -+ pDM_PDTable->TrainingState = 1; -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms -+ } -+ else -+ { -+ pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; -+ DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); -+ odm_SetRespPath_92C(Adapter, DefaultRespPath); -+ odm_ResetPathDiversity_92C(Adapter); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); -+ } -+ } -+ else if(pDM_PDTable->TrainingState == 1) -+ { -+ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); -+ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB -+ pDM_PDTable->TrainingState = 2; -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms -+ } -+ else -+ { -+ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); -+ pDM_PDTable->TrainingState = 0; -+ odm_CCKTXPathDiversity_92C(Adapter); -+ if(pDM_PDTable->OFDM_Pkt_Cnt != 0) -+ { -+ DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); -+ } -+ else -+ { -+ DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); -+ } -+ odm_SetRespPath_92C(Adapter, DefaultRespPath); -+ odm_ResetPathDiversity_92C(Adapter); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); -+ } -+ -+} -+ -+VOID -+odm_SetRespPath_92C( -+ IN PADAPTER Adapter, -+ IN u1Byte DefaultRespPath -+ ) -+{ -+ pPD_T pDM_PDTable = &Adapter->DM_PDTable; -+ -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); -+ if(DefaultRespPath != pDM_PDTable->DefaultRespPath) -+ { -+ if(DefaultRespPath == 0) -+ { -+ PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); -+ } -+ else -+ { -+ PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); -+ } -+ } -+ pDM_PDTable->DefaultRespPath = DefaultRespPath; -+} -+ -+VOID -+odm_OFDMTXPathDiversity_92C( -+ IN PADAPTER Adapter) -+{ -+// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ PRT_WLAN_STA pEntry; -+ u1Byte i, DefaultRespPath = 0; -+ s4Byte MinRSSI = 0xFF; -+ pPD_T pDM_PDTable = &Adapter->DM_PDTable; -+ pDM_PDTable->OFDMTXPath = 0; -+ -+ //1 Default Port -+ if(pMgntInfo->mAssoc) -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", -+ Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); -+ if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) -+ { -+ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); -+ MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; -+ DefaultRespPath = 0; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); -+ } -+ else -+ { -+ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; -+ MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; -+ DefaultRespPath = 1; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); -+ } -+ //RT_TRACE( COMP_INIT, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); -+ } -+ //1 Extension Port -+ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ { -+ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) -+ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); -+ else -+ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); -+ -+ if(pEntry!=NULL) -+ { -+ if(pEntry->bAssociated) -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", -+ pEntry->AssociatedMacId, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); -+ -+ if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) -+ { -+ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AssociatedMacId)); -+ //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AssociatedMacId)); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AssociatedMacId)); -+ if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) -+ { -+ MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; -+ DefaultRespPath = 0; -+ } -+ } -+ else -+ { -+ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AssociatedMacId); -+ //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AssociatedMacId)); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AssociatedMacId)); -+ if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) -+ { -+ MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; -+ DefaultRespPath = 1; -+ } -+ } -+ } -+ } -+ else -+ { -+ break; -+ } -+ } -+ -+ pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; -+} -+ -+ -+VOID -+odm_CCKTXPathDiversity_92C( -+ IN PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ PRT_WLAN_STA pEntry; -+ s4Byte MinRSSI = 0xFF; -+ u1Byte i, DefaultRespPath = 0; -+// BOOLEAN bBModePathDiv = FALSE; -+ pPD_T pDM_PDTable = &Adapter->DM_PDTable; -+ -+ //1 Default Port -+ if(pMgntInfo->mAssoc) -+ { -+ if(pHalData->OFDM_Pkt_Cnt == 0) -+ { -+ for(i=0; i<2; i++) -+ { -+ if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded -+ pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); -+ else -+ pDM_PDTable->RSSI_CCK_Path[i] = 0; -+ } -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", -+ pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", -+ pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); -+ -+ if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) -+ { -+ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); -+ MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; -+ DefaultRespPath = 0; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); -+ } -+ else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) -+ { -+ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; -+ MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; -+ DefaultRespPath = 1; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); -+ } -+ else -+ { -+ if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) -+ { -+ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); -+ MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; -+ DefaultRespPath = 0; -+ } -+ else -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); -+ } -+ } -+ } -+ else //Follow OFDM decision -+ { -+ pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", -+ pDM_PDTable->CCKTXPath &BIT0)); -+ } -+ } -+ //1 Extension Port -+ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ { -+ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) -+ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); -+ else -+ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); -+ -+ if(pEntry!=NULL) -+ { -+ if(pEntry->bAssociated) -+ { -+ if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) -+ { -+ u1Byte j=0; -+ for(j=0; j<2; j++) -+ { -+ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] > 1) -+ pEntry->rssi_stat.RSSI_CCK_Path[j] = pEntry->rssi_stat.RSSI_CCK_Path[j] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[j]-1); -+ else -+ pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; -+ } -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", -+ pEntry->AssociatedMacId, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); -+ -+ if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) -+ { -+ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); -+ if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) -+ { -+ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; -+ DefaultRespPath = 0; -+ } -+ } -+ else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) -+ { -+ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AssociatedMacId); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AssociatedMacId)); -+ if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) -+ { -+ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; -+ DefaultRespPath = 1; -+ } -+ } -+ else -+ { -+ if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) -+ { -+ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); -+ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; -+ DefaultRespPath = 0; -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); -+ } -+ else -+ { -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AssociatedMacId)); -+ } -+ } -+ } -+ else //Follow OFDM decision -+ { -+ pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AssociatedMacId)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AssociatedMacId)); -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", -+ pEntry->AssociatedMacId, (pDM_PDTable->CCKTXPath & BIT(pEntry->AssociatedMacId))>>(pEntry->AssociatedMacId))); -+ } -+ } -+ } -+ else -+ { -+ break; -+ } -+ } -+ -+ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); -+ -+ if(MinRSSI == 0xFF) -+ DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; -+ -+ pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; -+} -+ -+ -+VOID -+odm_ResetPathDiversity_92C( -+ IN PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ pPD_T pDM_PDTable = &Adapter->DM_PDTable; -+ PRT_WLAN_STA pEntry; -+ u4Byte i,j; -+ -+ pDM_PDTable->CCK_Pkt_Cnt = 0; -+ pDM_PDTable->OFDM_Pkt_Cnt = 0; -+ pHalData->CCK_Pkt_Cnt =0; -+ pHalData->OFDM_Pkt_Cnt =0; -+ -+ if(pDM_PDTable->CCKPathDivEnable == TRUE) -+ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB -+ -+ for(i=0; i<2; i++) -+ { -+ pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; -+ pDM_PDTable->RSSI_CCK_Path[i] = 0; -+ } -+ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ { -+ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) -+ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); -+ else -+ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); -+ -+ if(pEntry!=NULL) -+ { -+ pEntry->rssi_stat.CCK_Pkt_Cnt = 0; -+ pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; -+ for(j=0; j<2; j++) -+ { -+ pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] = 0; -+ pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; -+ } -+ } -+ else -+ break; -+ } -+} -+ -+ -+ -+ -+ -+VOID -+odm_CCKTXPathDiversityCallback( -+ PRT_TIMER pTimer -+) -+{ -+#if USE_WORKITEM -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+#endif -+ -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+#if USE_WORKITEM -+ PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -+#else -+ odm_PathDiversityAfterLink_92C(Adapter); -+#endif -+#else -+ PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -+#endif -+ -+} -+ -+ -+VOID -+odm_CCKTXPathDiversityWorkItemCallback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER Adapter = (PADAPTER)pContext; -+ -+ odm_CCKTXPathDiversity_92C(Adapter); -+} -+ -+// -+// 20100514 Luke/Joseph: -+// Callback function for 500ms antenna test trying. -+// -+VOID -+odm_PathDivChkAntSwitchCallback( -+ PRT_TIMER pTimer -+) -+{ -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ -+#if USE_WORKITEM -+ PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -+#else -+ odm_PathDivChkAntSwitch(pDM_Odm); -+#endif -+#else -+ PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -+#endif -+ -+//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); -+ -+} -+ -+ -+VOID -+odm_PathDivChkAntSwitchWorkitemCallback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER pAdapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ odm_PathDivChkAntSwitch(pDM_Odm); -+} -+ -+ -+ //MAC0_ACCESS_PHY1 -+ -+// 2011-06-22 Neil Chen & Gary Hsin -+// Refer to Jr.Luke's SW ANT DIV -+// 92D Path Diversity Main function -+// refer to 88C software antenna diversity -+// -+VOID -+odm_PathDivChkAntSwitch( -+ PDM_ODM_T pDM_Odm -+ //PADAPTER Adapter, -+ //u1Byte Step -+) -+{ -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ -+ -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ s4Byte curRSSI=100, RSSI_A, RSSI_B; -+ u1Byte nextAntenna=AUX_ANT; -+ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; -+ u8Byte curTxOkCnt, curRxOkCnt; -+ static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; -+ u8Byte CurByteCnt=0, PreByteCnt=0; -+ static u1Byte TrafficLoad = TRAFFIC_LOW; -+ u1Byte Score_A=0, Score_B=0; -+ u1Byte i=0x0; -+ // Neil Chen -+ static u1Byte pathdiv_para=0x0; -+ static u1Byte switchfirsttime=0x00; -+ // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); -+ u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); -+ -+ -+ //u1Byte reg637 =0x0; -+ static u1Byte fw_value=0x0; -+ //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; -+ PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC -+ // Path Diversity //Neil Chen--2011--06--22 -+ -+ //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); -+ u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); -+ u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; -+ -+ -+ //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); -+ if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType == BAND_ON_2_4G)) -+ { -+ return; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); -+ -+ // The first time to switch path excluding 2nd, 3rd, ....etc.... -+ if(switchfirsttime==0) -+ { -+ if(regB33==0) -+ { -+ pDM_SWAT_Table->CurAntenna = MAIN_ANT; // Default MAC0_5G-->Path A (current antenna) -+ } -+ } -+ -+ // Condition that does not need to use antenna diversity. -+ if(pDM_Odm->SupportICType != ODM_RTL8192D) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); -+ return; -+ } -+ -+ // Radio off: Status reset to default and return. -+ if(pHalData->eRFPowerState==eRfOff) -+ { -+ //ODM_SwAntDivRestAfterLink(Adapter); -+ return; -+ } -+ -+ /* -+ // Handling step mismatch condition. -+ // Peak step is not finished at last time. Recover the variable and check again. -+ if( Step != pDM_SWAT_Table->try_flag ) -+ { -+ ODM_SwAntDivRestAfterLink(Adapter); -+ } */ -+ -+ if(pDM_SWAT_Table->try_flag == 0xff) -+ { -+ // Select RSSI checking target -+ if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) -+ { -+ // Target: Infrastructure mode AP. -+ pHalData->RSSI_target = NULL; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); -+ } -+ else -+ { -+ u1Byte index = 0; -+ PRT_WLAN_STA pEntry = NULL; -+ PADAPTER pTargetAdapter = NULL; -+ -+ if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) -+ { -+ // Target: AP/IBSS peer. -+ pTargetAdapter = Adapter; -+ } -+ else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) -+ { -+ // Target: VWIFI peer. -+ pTargetAdapter = GetFirstExtAdapter(Adapter); -+ } -+ -+ if(pTargetAdapter != NULL) -+ { -+ for(index=0; indexbAssociated) -+ break; -+ } -+ } -+ } -+ -+ if(pEntry == NULL) -+ { -+ ODM_PathDivRestAfterLink(pDM_Odm); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); -+ return; -+ } -+ else -+ { -+ pHalData->RSSI_target = pEntry; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); -+ } -+ } -+ -+ pHalData->RSSI_cnt_A = 0; -+ pHalData->RSSI_cnt_B = 0; -+ pDM_SWAT_Table->try_flag = 0; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); -+ return; -+ } -+ else -+ { -+ // 1st step -+ curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; -+ curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; -+ lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; -+ lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; -+ -+ if(pDM_SWAT_Table->try_flag == 1) // Training State -+ { -+ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) -+ { -+ TXByteCnt_A += curTxOkCnt; -+ RXByteCnt_A += curRxOkCnt; -+ } -+ else -+ { -+ TXByteCnt_B += curTxOkCnt; -+ RXByteCnt_B += curRxOkCnt; -+ } -+ -+ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; -+ pDM_SWAT_Table->RSSI_Trying--; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); -+ if(pDM_SWAT_Table->RSSI_Trying == 0) -+ { -+ CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); -+ PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); -+ -+ if(TrafficLoad == TRAFFIC_HIGH) -+ { -+ //CurByteCnt = PlatformDivision64(CurByteCnt, 9); -+ PreByteCnt =PreByteCnt*9; -+ } -+ else if(TrafficLoad == TRAFFIC_LOW) -+ { -+ //CurByteCnt = PlatformDivision64(CurByteCnt, 2); -+ PreByteCnt =PreByteCnt*2; -+ } -+ if(pHalData->RSSI_cnt_A > 0) -+ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; -+ else -+ RSSI_A = 0; -+ if(pHalData->RSSI_cnt_B > 0) -+ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; -+ else -+ RSSI_B = 0; -+ curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; -+ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", -+ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", -+ RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); -+ } -+ -+ } -+ else // try_flag=0 -+ { -+ -+ if(pHalData->RSSI_cnt_A > 0) -+ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; -+ else -+ RSSI_A = 0; -+ if(pHalData->RSSI_cnt_B > 0) -+ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; -+ else -+ RSSI_B = 0; -+ curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; -+ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", -+ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", -+ RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); -+ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); -+ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); -+ } -+ -+ //1 Trying State -+ if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) -+ { -+ -+ if(pDM_SWAT_Table->TestMode == TP_MODE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); -+ if(CurByteCnt < PreByteCnt) -+ { -+ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) -+ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; -+ else -+ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; -+ } -+ else -+ { -+ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) -+ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; -+ else -+ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; -+ } -+ for (i= 0; i<8; i++) -+ { -+ if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) -+ Score_A++; -+ else -+ Score_B++; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); -+ -+ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) -+ { -+ nextAntenna = (Score_A >= Score_B)?MAIN_ANT:AUX_ANT; -+ } -+ else -+ { -+ nextAntenna = (Score_B >= Score_A)?AUX_ANT:MAIN_ANT; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==MAIN_ANT)?"MAIN":"AUX")); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", -+ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); -+ -+ if(nextAntenna != pDM_SWAT_Table->CurAntenna) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); -+ } -+ else -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); -+ } -+ } -+ -+ -+ if(pDM_SWAT_Table->TestMode == RSSI_MODE) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); -+ pDM_SWAT_Table->SelectAntennaMap=0xAA; -+ if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna -+ { -+ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Switch back to another antenna")); -+ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?AUX_ANT : MAIN_ANT; -+ } -+ else // current anntena is good -+ { -+ nextAntenna =pDM_SWAT_Table->CurAntenna; -+ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: current anntena is good\n")); -+ } -+ } -+ -+ pDM_SWAT_Table->try_flag = 0; -+ pHalData->RSSI_sum_A = 0; -+ pHalData->RSSI_cnt_A = 0; -+ pHalData->RSSI_sum_B = 0; -+ pHalData->RSSI_cnt_B = 0; -+ TXByteCnt_A = 0; -+ TXByteCnt_B = 0; -+ RXByteCnt_A = 0; -+ RXByteCnt_B = 0; -+ -+ } -+ -+ //1 Normal State -+ else if(pDM_SWAT_Table->try_flag == 0) -+ { -+ if(TrafficLoad == TRAFFIC_HIGH) -+ { -+ if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) -+ TrafficLoad = TRAFFIC_HIGH; -+ else -+ TrafficLoad = TRAFFIC_LOW; -+ } -+ else if(TrafficLoad == TRAFFIC_LOW) -+ { -+ if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) -+ TrafficLoad = TRAFFIC_HIGH; -+ else -+ TrafficLoad = TRAFFIC_LOW; -+ } -+ if(TrafficLoad == TRAFFIC_HIGH) -+ pDM_SWAT_Table->bTriggerAntennaSwitch = 0; -+ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); -+ -+ //Prepare To Try Antenna -+ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; -+ pDM_SWAT_Table->try_flag = 1; -+ if((curRxOkCnt+curTxOkCnt) > 1000) -+ { -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ pDM_SWAT_Table->RSSI_Trying = 4; -+#else -+ pDM_SWAT_Table->RSSI_Trying = 2; -+#endif -+ pDM_SWAT_Table->TestMode = TP_MODE; -+ } -+ else -+ { -+ pDM_SWAT_Table->RSSI_Trying = 2; -+ pDM_SWAT_Table->TestMode = RSSI_MODE; -+ -+ } -+ -+ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); -+ pHalData->RSSI_sum_A = 0; -+ pHalData->RSSI_cnt_A = 0; -+ pHalData->RSSI_sum_B = 0; -+ pHalData->RSSI_cnt_B = 0; -+ } // end of try_flag=0 -+ } -+ -+ //1 4.Change TRX antenna -+ if(nextAntenna != pDM_SWAT_Table->CurAntenna) -+ { -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); -+ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C -+ if(nextAntenna==MAIN_ANT) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); -+ pathdiv_para = 0x02; //02 to switchback to RF path A -+ fw_value = 0x03; -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -+#else -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -+#endif -+ } -+ else if(nextAntenna==AUX_ANT) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); -+ if(switchfirsttime==0) // First Time To Enter Path Diversity -+ { -+ switchfirsttime=0x01; -+ pathdiv_para = 0x00; -+ fw_value=0x00; // to backup RF Path A Releated Registers -+ -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -+#else -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -+ //for(u1Byte n=0; n<80,n++) -+ //{ -+ //delay_us(500); -+ ODM_delay_ms(500); -+ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -+ -+ fw_value=0x01; // to backup RF Path A Releated Registers -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -+#endif -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); -+ } -+ else -+ { -+ pathdiv_para = 0x01; -+ fw_value = 0x02; -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -+#else -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -+#endif -+ } -+ } -+ // odm_PathDiversity_8192D(Adapter, pathdiv_para); -+ } -+ -+ //1 5.Reset Statistics -+ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; -+ pDM_SWAT_Table->CurAntenna = nextAntenna; -+ pDM_SWAT_Table->PreRSSI = curRSSI; -+ -+ //1 6.Set next timer -+ -+ if(pDM_SWAT_Table->RSSI_Trying == 0) -+ return; -+ -+ if(pDM_SWAT_Table->RSSI_Trying%2 == 0) -+ { -+ if(pDM_SWAT_Table->TestMode == TP_MODE) -+ { -+ if(TrafficLoad == TRAFFIC_HIGH) -+ { -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); -+#else -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); -+#endif -+ } -+ else if(TrafficLoad == TRAFFIC_LOW) -+ { -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); -+ } -+ } -+ else // TestMode == RSSI_MODE -+ { -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); -+ } -+ } -+ else -+ { -+ if(pDM_SWAT_Table->TestMode == TP_MODE) -+ { -+ if(TrafficLoad == TRAFFIC_HIGH) -+ -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms -+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); -+#else -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms -+#endif -+ else if(TrafficLoad == TRAFFIC_LOW) -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms -+ } -+ else -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms -+ } -+} -+ -+ -+ -+VOID -+ODM_CCKPathDiversityChkPerPktRssi( -+ PADAPTER Adapter, -+ BOOLEAN bIsDefPort, -+ BOOLEAN bMatchBSSID, -+ PRT_WLAN_STA pEntry, -+ PRT_RFD pRfd, -+ pu1Byte pDesc -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ BOOLEAN bCount = FALSE; -+ pPD_T pDM_PDTable = &Adapter->DM_PDTable; -+ //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); -+#if DEV_BUS_TYPE != RT_SDIO_INTERFACE -+ BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); -+#else //below code would be removed if we have verified SDIO -+ BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); -+#endif -+ -+ if ((pHalData->PathDivCfg != 1)) -+ return; -+ -+ if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) -+ bCount = TRUE; -+ else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) -+ bCount = TRUE; -+ -+ if(bCount && isCCKrate) -+ { -+ if(pDM_PDTable->TrainingState == 1 ) -+ { -+ if(pEntry) -+ { -+ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) -+ pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; -+ pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; -+ } -+ else -+ { -+ if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) -+ pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; -+ pDM_PDTable->RSSI_CCK_Path_cnt[0]++; -+ } -+ } -+ else if(pDM_PDTable->TrainingState == 2 ) -+ { -+ if(pEntry) -+ { -+ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) -+ pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; -+ pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; -+ } -+ else -+ { -+ if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) -+ pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; -+ pDM_PDTable->RSSI_CCK_Path_cnt[1]++; -+ } -+ } -+ } -+} -+ -+ -+ -+ -+//Neil Chen---2011--06--22 -+//----92D Path Diversity----// -+//#ifdef PathDiv92D -+//================================== -+//3 Path Diversity -+//================================== -+// -+// 20100514 Luke/Joseph: -+// Add new function for antenna diversity after link. -+// This is the main function of antenna diversity after link. -+// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). -+// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. -+// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. -+// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just -+// listened on the air with the RSSI of original antenna. -+// It chooses the antenna with better RSSI. -+// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting -+// penalty to get next try. -+// -+// -+// 20100503 Joseph: -+// Add new function SwAntDivCheck8192C(). -+// This is the main function of Antenna diversity function before link. -+// Mainly, it just retains last scan result and scan again. -+// After that, it compares the scan result to see which one gets better RSSI. -+// It selects antenna with better receiving power and returns better scan result. -+// -+ -+ -+// -+// 20100514 Luke/Joseph: -+// This function is used to gather the RSSI information for antenna testing. -+// It selects the RSSI of the peer STA that we want to know. -+// -+VOID -+ODM_PathDivChkPerPktRssi( -+ PADAPTER Adapter, -+ BOOLEAN bIsDefPort, -+ BOOLEAN bMatchBSSID, -+ PRT_WLAN_STA pEntry, -+ PRT_RFD pRfd -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ BOOLEAN bCount = FALSE; -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ -+ if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) -+ bCount = TRUE; -+ else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) -+ bCount = TRUE; -+ -+ if(bCount) -+ { -+ //1 RSSI for SW Antenna Switch -+ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) -+ { -+ pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; -+ pHalData->RSSI_cnt_A++; -+ } -+ else -+ { -+ pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; -+ pHalData->RSSI_cnt_B++; -+ -+ } -+ } -+} -+ -+ -+// -+// 20100514 Luke/Joseph: -+// Add new function to reset antenna diversity state after link. -+// -+VOID -+ODM_PathDivRestAfterLink( -+ IN PDM_ODM_T pDM_Odm -+ ) -+{ -+ PADAPTER Adapter=pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -+ -+ pHalData->RSSI_cnt_A = 0; -+ pHalData->RSSI_cnt_B = 0; -+ pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff -+ pDM_SWAT_Table->RSSI_Trying = 0; -+ pDM_SWAT_Table->SelectAntennaMap=0xAA; -+ pDM_SWAT_Table->CurAntenna = MAIN_ANT; -+} -+ -+ -+//================================================== -+//3 PathDiv End -+//================================================== -+ -+ -+VOID -+ODM_FillTXPathInTXDESC( -+ IN PADAPTER Adapter, -+ IN PRT_TCB pTcb, -+ IN pu1Byte pDesc -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u4Byte TXPath; -+ pPD_T pDM_PDTable = &Adapter->DM_PDTable; -+ -+ //2011.09.05 Add by Luke Lee for path diversity -+ if(pHalData->PathDivCfg == 1) -+ { -+ TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; -+ //RT_TRACE( COMP_INIT, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); -+ //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); -+ if(TXPath == 0) -+ { -+ SET_TX_DESC_TX_ANTL_92C(pDesc,1); -+ SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); -+ } -+ else -+ { -+ SET_TX_DESC_TX_ANTL_92C(pDesc,2); -+ SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); -+ } -+ TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; -+ if(TXPath == 0) -+ { -+ SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); -+ } -+ else -+ { -+ SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); -+ } -+ } -+} -+ -+//Only for MP //Neil Chen--2012--0502-- -+VOID -+odm_PathDivInit_92D( -+IN PDM_ODM_T pDM_Odm) -+{ -+ pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; -+ -+ pathIQK->org_2g_RegC14=0x0; -+ pathIQK->org_2g_RegC4C=0x0; -+ pathIQK->org_2g_RegC80=0x0; -+ pathIQK->org_2g_RegC94=0x0; -+ pathIQK->org_2g_RegCA0=0x0; -+ pathIQK->org_5g_RegC14=0x0; -+ pathIQK->org_5g_RegCA0=0x0; -+ pathIQK->org_5g_RegE30=0x0; -+ pathIQK->swt_2g_RegC14=0x0; -+ pathIQK->swt_2g_RegC4C=0x0; -+ pathIQK->swt_2g_RegC80=0x0; -+ pathIQK->swt_2g_RegC94=0x0; -+ pathIQK->swt_2g_RegCA0=0x0; -+ pathIQK->swt_5g_RegC14=0x0; -+ pathIQK->swt_5g_RegCA0=0x0; -+ pathIQK->swt_5g_RegE30=0x0; -+ -+} -+ -+ -+u1Byte -+odm_SwAntDivSelectScanChnl( -+ IN PADAPTER Adapter -+ ) -+{ -+#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ u2Byte i; -+ u1Byte j, ScanChannel = 0, ChannelNum = 0; -+ PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); -+ u1Byte EachChannelSTAs[MAX_SCAN_CHANNEL_NUM] = {0}; -+ -+ if(pMgntInfo->tmpNumBssDesc == 0) -+ return 0; -+ -+ for(i = 0; i < pMgntInfo->tmpNumBssDesc; i++) -+ { -+ ChannelNum = pMgntInfo->tmpbssDesc[i].ChannelNumber; -+ for(j = 0; j < pChannelList->ChannelLen; j++) -+ { -+ if(pChannelList->ChnlListEntry[j].ChannelNum == ChannelNum) -+ { -+ EachChannelSTAs[j]++; -+ break; -+ } -+ } -+ } -+ -+ for(i = 0; i < MAX_SCAN_CHANNEL_NUM; i++) -+ { -+ if(EachChannelSTAs[i] > EachChannelSTAs[ScanChannel]) -+ ScanChannel = (u1Byte)i; -+ } -+ -+ if(EachChannelSTAs[ScanChannel] == 0) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("odm_SwAntDivSelectScanChnl(): Scan List is empty.\n")); -+ return 0; -+ } -+ -+ ScanChannel = pChannelList->ChnlListEntry[ScanChannel].ChannelNum; -+ -+ -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, -+ ("odm_SwAntDivSelectScanChnl(): Channel (( %d )) is select as scan channel.\n", ScanChannel)); -+ -+ return ScanChannel; -+#else -+ return 0; -+#endif -+} -+ -+ -+VOID -+odm_SwAntDivConstructScanChnl( -+ IN PADAPTER Adapter, -+ IN u1Byte ScanChnl -+ ) -+{ -+ -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ -+ if(ScanChnl == 0) -+ { -+ u1Byte i; -+ PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); -+ -+ // 20100519 Joseph: Original antenna scanned nothing. -+ // Test antenna shall scan all channel with half period in this condition. -+ -+ RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); -+ -+ RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); -+ for(i = 0; i < pChannelList->ChannelLen; i++) -+ pChannelList->ChnlListEntry[i].ScanPeriod /= 2; -+ } -+ else -+ { -+ // The using of this CustomizedScanRequest is a trick to rescan the two channels -+ // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. -+ CUSTOMIZED_SCAN_REQUEST CustomScanReq; -+ -+ CustomScanReq.bEnabled = TRUE; -+ CustomScanReq.Channels[0] = ScanChnl; -+ CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; -+ CustomScanReq.nChannels = 2; -+ CustomScanReq.ScanType = SCAN_ACTIVE; -+ CustomScanReq.Duration = DEFAULT_PASSIVE_SCAN_PERIOD; -+ -+ RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); -+ -+ RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); -+ } -+ -+} -+#else -+ -+VOID -+odm_PathDivChkAntSwitchCallback( -+ PRT_TIMER pTimer -+) -+{ -+} -+ -+VOID -+odm_PathDivChkAntSwitchWorkitemCallback( -+ IN PVOID pContext -+ ) -+{ -+} -+ -+VOID -+odm_CCKTXPathDiversityCallback( -+ PRT_TIMER pTimer -+) -+{ -+} -+ -+VOID -+odm_CCKTXPathDiversityWorkItemCallback( -+ IN PVOID pContext -+ ) -+{ -+} -+u1Byte -+odm_SwAntDivSelectScanChnl( -+ IN PADAPTER Adapter -+ ) -+{ -+ return 0; -+} -+VOID -+odm_SwAntDivConstructScanChnl( -+ IN PADAPTER Adapter, -+ IN u1Byte ScanChnl -+ ) -+{ -+} -+ -+ -+#endif -+ -+#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++#if RTL8814A_SUPPORT ++ ++VOID ++phydm_dtp_fix_tx_path( ++ IN PVOID pDM_VOID, ++ IN u1Byte path ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ u1Byte i,num_enable_path=0; ++ ++ if(path==pDM_PathDiv->pre_tx_path) ++ { ++ return; ++ } ++ else ++ { ++ pDM_PathDiv->pre_tx_path=path; ++ } ++ ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT18|BIT19, 3); ++ ++ for(i=0; i<4; i++) ++ { ++ if(path&BIT(i)) ++ num_enable_path++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Number of trun-on path : (( %d ))\n", num_enable_path)); ++ ++ if(num_enable_path == 1) ++ { ++ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); ++ ++ if(path==PHYDM_A)//1-1 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ } ++ else if(path==PHYDM_B)//1-2 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ } ++ else if(path==PHYDM_C)//1-3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( C ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 0); ++ ++ } ++ else if(path==PHYDM_D)//1-4 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( D ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 0); ++ } ++ ++ } ++ else if(num_enable_path == 2) ++ { ++ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); ++ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0, path); ++ ++ if(path==PHYDM_AB)//2-1 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); ++ } ++ else if(path==PHYDM_AC)//2-2 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A C ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ } ++ else if(path==PHYDM_AD)//2-3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); ++ } ++ else if(path==PHYDM_BC)//2-4 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B C ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ } ++ else if(path==PHYDM_BD)//2-5 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); ++ } ++ else if(path==PHYDM_CD)//2-6 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( C D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); ++ } ++ ++ } ++ else if(num_enable_path == 3) ++ { ++ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); ++ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0, path); ++ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0000, path); ++ ++ if(path==PHYDM_ABC)//3-1 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B C))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 2); ++ } ++ else if(path==PHYDM_ABD)//3-2 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); ++ ++ } ++ else if(path==PHYDM_ACD)//3-3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A C D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); ++ } ++ else if(path==PHYDM_BCD)//3-4 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B C D))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); ++ } ++ } ++ else if(num_enable_path == 4) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path ((A B C D))\n")); ++ } ++ ++} ++ ++VOID ++phydm_find_default_path( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ u4Byte rssi_avg_a=0, rssi_avg_b=0, rssi_avg_c=0, rssi_avg_d=0, rssi_avg_bcd=0; ++ u4Byte rssi_total_a=0, rssi_total_b=0, rssi_total_c=0, rssi_total_d=0; ++ ++ //2 Default Path Selection By RSSI ++ ++ rssi_avg_a = (pDM_PathDiv->path_a_cnt_all > 0)? (pDM_PathDiv->path_a_sum_all / pDM_PathDiv->path_a_cnt_all) :0 ; ++ rssi_avg_b = (pDM_PathDiv->path_b_cnt_all > 0)? (pDM_PathDiv->path_b_sum_all / pDM_PathDiv->path_b_cnt_all) :0 ; ++ rssi_avg_c = (pDM_PathDiv->path_c_cnt_all > 0)? (pDM_PathDiv->path_c_sum_all / pDM_PathDiv->path_c_cnt_all) :0 ; ++ rssi_avg_d = (pDM_PathDiv->path_d_cnt_all > 0)? (pDM_PathDiv->path_d_sum_all / pDM_PathDiv->path_d_cnt_all) :0 ; ++ ++ ++ pDM_PathDiv->path_a_sum_all = 0; ++ pDM_PathDiv->path_a_cnt_all = 0; ++ pDM_PathDiv->path_b_sum_all = 0; ++ pDM_PathDiv->path_b_cnt_all = 0; ++ pDM_PathDiv->path_c_sum_all = 0; ++ pDM_PathDiv->path_c_cnt_all = 0; ++ pDM_PathDiv->path_d_sum_all = 0; ++ pDM_PathDiv->path_d_cnt_all = 0; ++ ++ if(pDM_PathDiv->use_path_a_as_default_ant == 1) ++ { ++ rssi_avg_bcd=(rssi_avg_b+rssi_avg_c+rssi_avg_d)/3; ++ ++ if( (rssi_avg_a + ANT_DECT_RSSI_TH) > rssi_avg_bcd ) ++ { ++ pDM_PathDiv->is_pathA_exist=TRUE; ++ pDM_PathDiv->default_path=PATH_A; ++ } ++ else ++ { ++ pDM_PathDiv->is_pathA_exist=FALSE; ++ } ++ } ++ else ++ { ++ if( (rssi_avg_a >=rssi_avg_b) && (rssi_avg_a >=rssi_avg_c)&&(rssi_avg_a >=rssi_avg_d)) ++ pDM_PathDiv->default_path=PATH_A; ++ else if( (rssi_avg_b >=rssi_avg_c)&&(rssi_avg_b >=rssi_avg_d)) ++ pDM_PathDiv->default_path=PATH_B; ++ else if( rssi_avg_c >=rssi_avg_d) ++ pDM_PathDiv->default_path=PATH_C; ++ else ++ pDM_PathDiv->default_path=PATH_D; ++ } ++ ++ ++} ++ ++ ++VOID ++phydm_candidate_dtp_update( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ ++ pDM_PathDiv->num_candidate=3; ++ ++ if(pDM_PathDiv->use_path_a_as_default_ant == 1) ++ { ++ if(pDM_PathDiv->num_tx_path==3) ++ { ++ if(pDM_PathDiv->is_pathA_exist) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_ACD; ++ } ++ else // use path BCD ++ { ++ pDM_PathDiv->num_candidate=1; ++ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BCD); ++ return; ++ } ++ } ++ else if(pDM_PathDiv->num_tx_path==2) ++ { ++ if(pDM_PathDiv->is_pathA_exist) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_AC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_AD; ++ } ++ else ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_BC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_CD; ++ } ++ } ++ } ++ else ++ { ++ //2 3 TX Mode ++ if(pDM_PathDiv->num_tx_path==3)//choose 3 ant form 4 ++ { ++ if(pDM_PathDiv->default_path == PATH_A) //choose 2 ant form 3 ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_ACD; ++ } ++ else if(pDM_PathDiv->default_path==PATH_B) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_C) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ACD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_D) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ACD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; ++ } ++ } ++ ++ //2 2 TX Mode ++ else if(pDM_PathDiv->num_tx_path==2)//choose 2 ant form 4 ++ { ++ if(pDM_PathDiv->default_path == PATH_A) //choose 2 ant form 3 ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_AC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_AD; ++ } ++ else if(pDM_PathDiv->default_path==PATH_B) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_C) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_CD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_D) ++ { ++ pDM_PathDiv->ant_candidate_1= PHYDM_AD; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BD; ++ pDM_PathDiv->ant_candidate_3= PHYDM_CD; ++ } ++ } ++ } ++} ++ ++ ++VOID ++phydm_dynamic_tx_path( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ ++ PSTA_INFO_T pEntry; ++ u4Byte i; ++ u1Byte num_client=0; ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("DTP_8814 [No Link!!!]\n")); ++ ++ if(pDM_PathDiv->bBecomeLinked == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" [Be disconnected]----->\n")); ++ pDM_PathDiv->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_PathDiv->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" [Be Linked !!!]----->\n")); ++ pDM_PathDiv->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ //2 [Period CTRL] ++ if(pDM_PathDiv->dtp_period >=2) ++ { ++ pDM_PathDiv->dtp_period=0; ++ } ++ else ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Phydm_Dynamic_Tx_Path_8814A() Stay = (( %d ))\n",pDM_PathDiv->dtp_period)); ++ pDM_PathDiv->dtp_period++; ++ return; ++ } ++ ++ ++ //2 [Fix Path] ++ if (pDM_Odm->path_select != PHYDM_AUTO_PATH) ++ { ++ return; ++ } ++ ++ //2 [Check Bfer] ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #if (BEAMFORMING_SUPPORT == 1) ++ { ++ BEAMFORMING_CAP BeamformCap = (pDM_Odm->BeamformingInfo.BeamformCap); ++ ++ if( BeamformCap & BEAMFORMER_CAP ) // BFmer On && Div On -> Div Off ++ { ++ if( pDM_PathDiv->fix_path_bfer == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("[ PathDiv : OFF ] BFmer ==1 \n")); ++ pDM_PathDiv->fix_path_bfer = 1 ; ++ } ++ return; ++ } ++ else // BFmer Off && Div Off -> Div On ++ { ++ if( pDM_PathDiv->fix_path_bfer == 1 ) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("[ PathDiv : ON ] BFmer ==0 \n")); ++ pDM_PathDiv->fix_path_bfer = 0; ++ } ++ } ++ } ++ #endif ++ #endif ++ ++ if(pDM_PathDiv->use_path_a_as_default_ant ==1) ++ { ++ phydm_find_default_path(pDM_Odm); ++ phydm_candidate_dtp_update(pDM_Odm); ++ } ++ else ++ { ++ if( pDM_PathDiv->dtp_state == PHYDM_DTP_INIT) ++ { ++ phydm_find_default_path(pDM_Odm); ++ phydm_candidate_dtp_update(pDM_Odm); ++ pDM_PathDiv->dtp_state = PHYDM_DTP_RUNNING_1; ++ } ++ ++ else if( pDM_PathDiv->dtp_state == PHYDM_DTP_RUNNING_1) ++ { ++ pDM_PathDiv->dtp_check_patha_counter++; ++ ++ if(pDM_PathDiv->dtp_check_patha_counter>=NUM_RESET_DTP_PERIOD) ++ { ++ pDM_PathDiv->dtp_check_patha_counter=0; ++ pDM_PathDiv->dtp_state = PHYDM_DTP_INIT; ++ } ++ //2 Search space update ++ else ++ { ++ // 1. find the worst candidate ++ ++ ++ // 2. repalce the worst candidate ++ } ++ } ++ } ++ ++ //2 Dynamic Path Selection H2C ++ ++ if(pDM_PathDiv->num_candidate == 1) ++ { ++ return; ++ } ++ else ++ { ++ H2C_Parameter[0] = pDM_PathDiv->num_candidate; ++ H2C_Parameter[1] = pDM_PathDiv->num_tx_path; ++ H2C_Parameter[2] = pDM_PathDiv->ant_candidate_1; ++ H2C_Parameter[3] = pDM_PathDiv->ant_candidate_2; ++ H2C_Parameter[4] = pDM_PathDiv->ant_candidate_3; ++ ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, H2C_Parameter); ++ } ++ ++} ++ ++ ++ ++VOID ++phydm_dynamic_tx_path_init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ USB_MODE_MECH *pUsbModeMech = &pAdapter->UsbModeMechanism; ++ #endif ++ u1Byte search_space_2[NUM_CHOOSE2_FROM4]= {PHYDM_AB, PHYDM_AC, PHYDM_AD, PHYDM_BC, PHYDM_BD, PHYDM_CD }; ++ u1Byte search_space_3[NUM_CHOOSE3_FROM4]= {PHYDM_BCD, PHYDM_ACD, PHYDM_ABD, PHYDM_ABC}; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_PathDiv->is_u3_mode = (pUsbModeMech->CurUsbMode==USB_MODE_U3)? 1 : 0 ; ++ #else ++ pDM_PathDiv->is_u3_mode = 1; ++ #endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Dynamic TX Path Init 8814\n")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("is_u3_mode = (( %d ))\n", pDM_PathDiv->is_u3_mode)); ++ ++ memcpy(&(pDM_PathDiv->search_space_2[0]), &(search_space_2[0]), NUM_CHOOSE2_FROM4); ++ memcpy(&(pDM_PathDiv->search_space_3[0]), &(search_space_3[0]), NUM_CHOOSE3_FROM4); ++ ++ pDM_PathDiv->use_path_a_as_default_ant= 1; ++ pDM_PathDiv->dtp_state = PHYDM_DTP_INIT; ++ pDM_Odm->path_select = PHYDM_AUTO_PATH; ++ pDM_PathDiv->path_div_type = PHYDM_4R_PATH_DIV; ++ ++ ++ if(pDM_PathDiv->is_u3_mode ) ++ { ++ pDM_PathDiv->num_tx_path=3; ++ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BCD);/* 3TX Set Init TX Path*/ ++ ++ } ++ else ++ { ++ pDM_PathDiv->num_tx_path=2; ++ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BC);/* 2TX // Set Init TX Path*/ ++ } ++ ++} ++ ++ ++VOID ++phydm_process_rssi_for_path_div( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; ++ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ ++ if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID) ++ { ++ if(pPktinfo->DataRate > ODM_RATE11M) ++ { ++ if(pDM_PathDiv->path_div_type == PHYDM_4R_PATH_DIV) ++ { ++ #if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) ++ { ++ pDM_PathDiv->path_a_sum_all+=pPhyInfo->RxMIMOSignalStrength[0]; ++ pDM_PathDiv->path_a_cnt_all++; ++ ++ pDM_PathDiv->path_b_sum_all+=pPhyInfo->RxMIMOSignalStrength[1]; ++ pDM_PathDiv->path_b_cnt_all++; ++ ++ pDM_PathDiv->path_c_sum_all+=pPhyInfo->RxMIMOSignalStrength[2]; ++ pDM_PathDiv->path_c_cnt_all++; ++ ++ pDM_PathDiv->path_d_sum_all+=pPhyInfo->RxMIMOSignalStrength[3]; ++ pDM_PathDiv->path_d_cnt_all++; ++ } ++ #endif ++ } ++ else ++ { ++ pDM_PathDiv->PathA_Sum[pPktinfo->StationID]+=pPhyInfo->RxMIMOSignalStrength[0]; ++ pDM_PathDiv->PathA_Cnt[pPktinfo->StationID]++; ++ ++ pDM_PathDiv->PathB_Sum[pPktinfo->StationID]+=pPhyInfo->RxMIMOSignalStrength[1]; ++ pDM_PathDiv->PathB_Cnt[pPktinfo->StationID]++; ++ } ++ } ++ } ++ ++ ++} ++ ++#endif //#if RTL8814A_SUPPORT ++ ++VOID ++odm_pathdiv_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ pDM_Odm->path_select = (dm_value[0] & 0xf); ++ PHYDM_SNPRINTF((output+used, out_len-used,"Path_select = (( 0x%x ))\n",pDM_Odm->path_select )); ++ ++ //2 [Fix Path] ++ if (pDM_Odm->path_select != PHYDM_AUTO_PATH) ++ { ++ PHYDM_SNPRINTF((output+used, out_len-used,"Trun on path [%s%s%s%s]\n", ++ ((pDM_Odm->path_select) & 0x1)?"A":"", ++ ((pDM_Odm->path_select) & 0x2)?"B":"", ++ ((pDM_Odm->path_select) & 0x4)?"C":"", ++ ((pDM_Odm->path_select) & 0x8)?"D":"" )); ++ ++ phydm_dtp_fix_tx_path( pDM_Odm, pDM_Odm->path_select ); ++ } ++ else ++ { ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n","Auto Path")); ++ } ++} ++ ++#endif // #if(defined(CONFIG_PATH_DIVERSITY)) ++ ++VOID ++phydm_c2h_dtp_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ ++ u1Byte macid = CmdBuf[0]; ++ u1Byte target = CmdBuf[1]; ++ u1Byte nsc_1 = CmdBuf[2]; ++ u1Byte nsc_2 = CmdBuf[3]; ++ u1Byte nsc_3 = CmdBuf[4]; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Target_candidate = (( %d ))\n", target)); ++ /* ++ if( (nsc_1 >= nsc_2) && (nsc_1 >= nsc_3)) ++ { ++ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_1); ++ } ++ else if( nsc_2 >= nsc_3) ++ { ++ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_2); ++ } ++ else ++ { ++ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_3); ++ } ++ */ ++#endif ++} ++ ++VOID ++odm_PathDiversity( ++ IN PVOID pDM_VOID ++) ++{ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); ++ return; ++ } ++ ++ #if RTL8812A_SUPPORT ++ ++ if(pDM_Odm->SupportICType & ODM_RTL8812) ++ ODM_PathDiversity_8812A(pDM_Odm); ++ else ++ #endif ++ ++ #if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) ++ phydm_dynamic_tx_path(pDM_Odm); ++ else ++ #endif ++ {} ++#endif ++} ++ ++VOID ++odm_PathDiversityInit( ++ IN PVOID pDM_VOID ++) ++{ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*pDM_Odm->SupportAbility |= ODM_BB_PATH_DIV;*/ ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ return; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); ++ return; ++ } ++ ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8812) ++ ODM_PathDiversityInit_8812A(pDM_Odm); ++ else ++ #endif ++ ++ #if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) ++ phydm_dynamic_tx_path_init(pDM_Odm); ++ else ++ #endif ++ {} ++#endif ++} ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++// ++// 2011/12/02 MH Copy from MP oursrc for temporarily test. ++// ++#if RTL8192C_SUPPORT ++BOOLEAN ++odm_IsConnected_92C( ++ IN PADAPTER Adapter ++) ++{ ++ PRT_WLAN_STA pEntry; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u4Byte i; ++ BOOLEAN bConnected=FALSE; ++ ++ if(pMgntInfo->mAssoc) ++ { ++ bConnected = TRUE; ++ } ++ else ++ { ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ if(pEntry->bAssociated) ++ { ++ bConnected = TRUE; ++ break; ++ } ++ } ++ else ++ { ++ break; ++ } ++ } ++ } ++ return bConnected; ++} ++ ++BOOLEAN ++ODM_PathDiversityBeforeLink92C( ++ //IN PADAPTER Adapter ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE* pHalData = NULL; ++ PMGNT_INFO pMgntInfo = NULL; ++ //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; ++ pPD_T pDM_PDTable = NULL; ++ ++ s1Byte Score = 0; ++ PRT_WLAN_BSS pTmpBssDesc; ++ PRT_WLAN_BSS pTestBssDesc; ++ ++ u1Byte target_chnl = 0; ++ u2Byte index; ++ ++ if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 ++ { // The ODM structure is not initialized. ++ return FALSE; ++ } ++ pHalData = GET_HAL_DATA(Adapter); ++ pMgntInfo = &Adapter->MgntInfo; ++ pDM_PDTable = &Adapter->DM_PDTable; ++ ++ // Condition that does not need to use path diversity. ++ if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); ++ return FALSE; ++ } ++ ++ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. ++ PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", ++ pMgntInfo->RFChangeInProgress, ++ pHalData->eRFPowerState)); ++ ++ //pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pDM_PDTable->PathDiv_NoLink_State = 0; ++ ++ return FALSE; ++ } ++ else ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ } ++ ++ //1 Run AntDiv mechanism "Before Link" part. ++ //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) ++ if(pDM_PDTable->PathDiv_NoLink_State == 0) ++ { ++ //1 Prepare to do Scan again to check current antenna state. ++ ++ // Set check state to next step. ++ //pDM_SWAT_Table->SWAS_NoLink_State = 1; ++ pDM_PDTable->PathDiv_NoLink_State = 1; ++ ++ // Copy Current Scan list. ++ Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; ++ PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); ++ ++ // Switch Antenna to another one. ++ if(pDM_PDTable->DefaultRespPath == 0) ++ { ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB ++ odm_SetRespPath_92C(Adapter, 1); ++ pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; ++ pDM_PDTable->CCKTXPath = 0xFFFFFFFF; ++ } ++ else ++ { ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA ++ odm_SetRespPath_92C(Adapter, 0); ++ pDM_PDTable->OFDMTXPath = 0x0; ++ pDM_PDTable->CCKTXPath = 0x0; ++ } ++#if 0 ++ ++ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; ++ ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); ++ pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); ++ PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); ++#endif ++ ++ // Go back to scan function again. ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); ++ pMgntInfo->ScanStep=0; ++ target_chnl = odm_SwAntDivSelectScanChnl(Adapter); ++ odm_SwAntDivConstructScanChnl(Adapter, target_chnl); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ ++ return TRUE; ++ } ++ else ++ { ++ //1 ScanComple() is called after antenna swiched. ++ //1 Check scan result and determine which antenna is going ++ //1 to be used. ++ ++ for(index=0; indexMgntInfo.tmpNumBssDesc; index++) ++ { ++ pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); ++ pTestBssDesc = &(pMgntInfo->bssDesc[index]); ++ ++ if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); ++ continue; ++ } ++ ++ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); ++ RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ++ Score++; ++ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); ++ } ++ else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); ++ RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ Score--; ++ } ++ ++ } ++ ++ if(pMgntInfo->NumBssDesc!=0 && Score<=0) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); ++ ++ //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ } ++ else ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); ++ ++ if(pDM_PDTable->DefaultRespPath == 0) ++ { ++ pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; ++ pDM_PDTable->CCKTXPath = 0xFFFFFFFF; ++ odm_SetRespPath_92C(Adapter, 1); ++ } ++ else ++ { ++ pDM_PDTable->OFDMTXPath = 0x0; ++ pDM_PDTable->CCKTXPath = 0x0; ++ odm_SetRespPath_92C(Adapter, 0); ++ } ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB ++ ++ //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; ++ ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); ++ //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); ++ } ++ ++ // Check state reset to default and wait for next time. ++ //pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pDM_PDTable->PathDiv_NoLink_State = 0; ++ ++ return FALSE; ++ } ++#else ++ return FALSE; ++#endif ++ ++} ++ ++ ++ ++VOID ++odm_PathDiversityAfterLink_92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ u1Byte DefaultRespPath=0; ++ ++ if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) ++ { ++ if(pHalData->PathDivCfg == 0) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); ++ } ++ else ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); ++ } ++ return; ++ } ++ if(!odm_IsConnected_92C(Adapter)) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); ++ return; ++ } ++ ++ ++ if(pDM_PDTable->TrainingState == 0) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); ++ odm_OFDMTXPathDiversity_92C(Adapter); ++ ++ if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) ++ { ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); ++ ++ if(pDM_PDTable->CCK_Pkt_Cnt > 300) ++ pDM_PDTable->Timer = 20; ++ else if(pDM_PDTable->CCK_Pkt_Cnt > 100) ++ pDM_PDTable->Timer = 60; ++ else ++ pDM_PDTable->Timer = 250; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); ++ ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA ++ pDM_PDTable->TrainingState = 1; ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms ++ } ++ else ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; ++ DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); ++ odm_SetRespPath_92C(Adapter, DefaultRespPath); ++ odm_ResetPathDiversity_92C(Adapter); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); ++ } ++ } ++ else if(pDM_PDTable->TrainingState == 1) ++ { ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB ++ pDM_PDTable->TrainingState = 2; ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms ++ } ++ else ++ { ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); ++ pDM_PDTable->TrainingState = 0; ++ odm_CCKTXPathDiversity_92C(Adapter); ++ if(pDM_PDTable->OFDM_Pkt_Cnt != 0) ++ { ++ DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); ++ } ++ else ++ { ++ DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); ++ } ++ odm_SetRespPath_92C(Adapter, DefaultRespPath); ++ odm_ResetPathDiversity_92C(Adapter); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); ++ } ++ ++} ++ ++VOID ++odm_SetRespPath_92C( ++ IN PADAPTER Adapter, ++ IN u1Byte DefaultRespPath ++ ) ++{ ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); ++ if(DefaultRespPath != pDM_PDTable->DefaultRespPath) ++ { ++ if(DefaultRespPath == 0) ++ { ++ PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); ++ } ++ else ++ { ++ PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); ++ } ++ } ++ pDM_PDTable->DefaultRespPath = DefaultRespPath; ++} ++ ++VOID ++odm_OFDMTXPathDiversity_92C( ++ IN PADAPTER Adapter) ++{ ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_WLAN_STA pEntry; ++ u1Byte i, DefaultRespPath = 0; ++ s4Byte MinRSSI = 0xFF; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ pDM_PDTable->OFDMTXPath = 0; ++ ++ //1 Default Port ++ if(pMgntInfo->mAssoc) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", ++ Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); ++ if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); ++ MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; ++ DefaultRespPath = 0; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); ++ } ++ else ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; ++ MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; ++ DefaultRespPath = 1; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); ++ } ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); ++ } ++ //1 Extension Port ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ if(pEntry->bAssociated) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", ++ pEntry->AssociatedMacId, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); ++ ++ if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AssociatedMacId)); ++ //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; ++ DefaultRespPath = 0; ++ } ++ } ++ else ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AssociatedMacId); ++ //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; ++ DefaultRespPath = 1; ++ } ++ } ++ } ++ } ++ else ++ { ++ break; ++ } ++ } ++ ++ pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; ++} ++ ++ ++VOID ++odm_CCKTXPathDiversity_92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_WLAN_STA pEntry; ++ s4Byte MinRSSI = 0xFF; ++ u1Byte i, DefaultRespPath = 0; ++// BOOLEAN bBModePathDiv = FALSE; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ ++ //1 Default Port ++ if(pMgntInfo->mAssoc) ++ { ++ if(pHalData->OFDM_Pkt_Cnt == 0) ++ { ++ for(i=0; i<2; i++) ++ { ++ if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded ++ pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); ++ else ++ pDM_PDTable->RSSI_CCK_Path[i] = 0; ++ } ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", ++ pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", ++ pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); ++ ++ if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); ++ MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); ++ } ++ else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; ++ MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; ++ DefaultRespPath = 1; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); ++ } ++ else ++ { ++ if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); ++ MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ } ++ else ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); ++ } ++ } ++ } ++ else //Follow OFDM decision ++ { ++ pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", ++ pDM_PDTable->CCKTXPath &BIT0)); ++ } ++ } ++ //1 Extension Port ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ if(pEntry->bAssociated) ++ { ++ if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) ++ { ++ u1Byte j=0; ++ for(j=0; j<2; j++) ++ { ++ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] > 1) ++ pEntry->rssi_stat.RSSI_CCK_Path[j] = pEntry->rssi_stat.RSSI_CCK_Path[j] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[j]-1); ++ else ++ pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; ++ } ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", ++ pEntry->AssociatedMacId, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); ++ ++ if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ } ++ } ++ else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AssociatedMacId); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; ++ DefaultRespPath = 1; ++ } ++ } ++ else ++ { ++ if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); ++ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); ++ } ++ else ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AssociatedMacId)); ++ } ++ } ++ } ++ else //Follow OFDM decision ++ { ++ pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AssociatedMacId)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", ++ pEntry->AssociatedMacId, (pDM_PDTable->CCKTXPath & BIT(pEntry->AssociatedMacId))>>(pEntry->AssociatedMacId))); ++ } ++ } ++ } ++ else ++ { ++ break; ++ } ++ } ++ ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); ++ ++ if(MinRSSI == 0xFF) ++ DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; ++ ++ pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; ++} ++ ++ ++VOID ++odm_ResetPathDiversity_92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ PRT_WLAN_STA pEntry; ++ u4Byte i,j; ++ ++ pDM_PDTable->CCK_Pkt_Cnt = 0; ++ pDM_PDTable->OFDM_Pkt_Cnt = 0; ++ pHalData->CCK_Pkt_Cnt =0; ++ pHalData->OFDM_Pkt_Cnt =0; ++ ++ if(pDM_PDTable->CCKPathDivEnable == TRUE) ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB ++ ++ for(i=0; i<2; i++) ++ { ++ pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; ++ pDM_PDTable->RSSI_CCK_Path[i] = 0; ++ } ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ pEntry->rssi_stat.CCK_Pkt_Cnt = 0; ++ pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; ++ for(j=0; j<2; j++) ++ { ++ pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] = 0; ++ pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; ++ } ++ } ++ else ++ break; ++ } ++} ++ ++ ++ ++ ++ ++VOID ++odm_CCKTXPathDiversityCallback( ++ PRT_TIMER pTimer ++) ++{ ++#if USE_WORKITEM ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++#endif ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); ++#else ++ odm_PathDiversityAfterLink_92C(Adapter); ++#endif ++#else ++ PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); ++#endif ++ ++} ++ ++ ++VOID ++odm_CCKTXPathDiversityWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ ++ odm_CCKTXPathDiversity_92C(Adapter); ++} ++ ++// ++// 20100514 Luke/Joseph: ++// Callback function for 500ms antenna test trying. ++// ++VOID ++odm_PathDivChkAntSwitchCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); ++#else ++ odm_PathDivChkAntSwitch(pDM_Odm); ++#endif ++#else ++ PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); ++#endif ++ ++//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); ++ ++} ++ ++ ++VOID ++odm_PathDivChkAntSwitchWorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ odm_PathDivChkAntSwitch(pDM_Odm); ++} ++ ++ ++ //MAC0_ACCESS_PHY1 ++ ++// 2011-06-22 Neil Chen & Gary Hsin ++// Refer to Jr.Luke's SW ANT DIV ++// 92D Path Diversity Main function ++// refer to 88C software antenna diversity ++// ++VOID ++odm_PathDivChkAntSwitch( ++ PDM_ODM_T pDM_Odm ++ //PADAPTER Adapter, ++ //u1Byte Step ++) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ s4Byte curRSSI=100, RSSI_A, RSSI_B; ++ u1Byte nextAntenna=AUX_ANT; ++ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; ++ u8Byte curTxOkCnt, curRxOkCnt; ++ static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; ++ u8Byte CurByteCnt=0, PreByteCnt=0; ++ static u1Byte TrafficLoad = TRAFFIC_LOW; ++ u1Byte Score_A=0, Score_B=0; ++ u1Byte i=0x0; ++ // Neil Chen ++ static u1Byte pathdiv_para=0x0; ++ static u1Byte switchfirsttime=0x00; ++ // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); ++ u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); ++ ++ ++ //u1Byte reg637 =0x0; ++ static u1Byte fw_value=0x0; ++ //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; ++ PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC ++ // Path Diversity //Neil Chen--2011--06--22 ++ ++ //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); ++ u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); ++ u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; ++ ++ ++ //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); ++ if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType == BAND_ON_2_4G)) ++ { ++ return; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); ++ ++ // The first time to switch path excluding 2nd, 3rd, ....etc.... ++ if(switchfirsttime==0) ++ { ++ if(regB33==0) ++ { ++ pDM_SWAT_Table->CurAntenna = MAIN_ANT; // Default MAC0_5G-->Path A (current antenna) ++ } ++ } ++ ++ // Condition that does not need to use antenna diversity. ++ if(pDM_Odm->SupportICType != ODM_RTL8192D) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); ++ return; ++ } ++ ++ // Radio off: Status reset to default and return. ++ if(pHalData->eRFPowerState==eRfOff) ++ { ++ //ODM_SwAntDivRestAfterLink(Adapter); ++ return; ++ } ++ ++ /* ++ // Handling step mismatch condition. ++ // Peak step is not finished at last time. Recover the variable and check again. ++ if( Step != pDM_SWAT_Table->try_flag ) ++ { ++ ODM_SwAntDivRestAfterLink(Adapter); ++ } */ ++ ++ if(pDM_SWAT_Table->try_flag == 0xff) ++ { ++ // Select RSSI checking target ++ if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) ++ { ++ // Target: Infrastructure mode AP. ++ pHalData->RSSI_target = NULL; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); ++ } ++ else ++ { ++ u1Byte index = 0; ++ PRT_WLAN_STA pEntry = NULL; ++ PADAPTER pTargetAdapter = NULL; ++ ++ if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) ++ { ++ // Target: AP/IBSS peer. ++ pTargetAdapter = Adapter; ++ } ++ else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ { ++ // Target: VWIFI peer. ++ pTargetAdapter = GetFirstExtAdapter(Adapter); ++ } ++ ++ if(pTargetAdapter != NULL) ++ { ++ for(index=0; indexbAssociated) ++ break; ++ } ++ } ++ } ++ ++ if(pEntry == NULL) ++ { ++ ODM_PathDivRestAfterLink(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); ++ return; ++ } ++ else ++ { ++ pHalData->RSSI_target = pEntry; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); ++ } ++ } ++ ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_cnt_B = 0; ++ pDM_SWAT_Table->try_flag = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); ++ return; ++ } ++ else ++ { ++ // 1st step ++ curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; ++ curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; ++ lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; ++ lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; ++ ++ if(pDM_SWAT_Table->try_flag == 1) // Training State ++ { ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ { ++ TXByteCnt_A += curTxOkCnt; ++ RXByteCnt_A += curRxOkCnt; ++ } ++ else ++ { ++ TXByteCnt_B += curTxOkCnt; ++ RXByteCnt_B += curRxOkCnt; ++ } ++ ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->RSSI_Trying--; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ { ++ CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); ++ PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); ++ ++ if(TrafficLoad == TRAFFIC_HIGH) ++ { ++ //CurByteCnt = PlatformDivision64(CurByteCnt, 9); ++ PreByteCnt =PreByteCnt*9; ++ } ++ else if(TrafficLoad == TRAFFIC_LOW) ++ { ++ //CurByteCnt = PlatformDivision64(CurByteCnt, 2); ++ PreByteCnt =PreByteCnt*2; ++ } ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", ++ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); ++ } ++ ++ } ++ else // try_flag=0 ++ { ++ ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", ++ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); ++ } ++ ++ //1 Trying State ++ if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) ++ { ++ ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); ++ if(CurByteCnt < PreByteCnt) ++ { ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ } ++ else ++ { ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ } ++ for (i= 0; i<8; i++) ++ { ++ if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) ++ Score_A++; ++ else ++ Score_B++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); ++ ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ { ++ nextAntenna = (Score_A >= Score_B)?MAIN_ANT:AUX_ANT; ++ } ++ else ++ { ++ nextAntenna = (Score_B >= Score_A)?AUX_ANT:MAIN_ANT; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==MAIN_ANT)?"MAIN":"AUX")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", ++ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ++ ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); ++ } ++ } ++ ++ ++ if(pDM_SWAT_Table->TestMode == RSSI_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna ++ { ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Switch back to another antenna")); ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?AUX_ANT : MAIN_ANT; ++ } ++ else // current anntena is good ++ { ++ nextAntenna =pDM_SWAT_Table->CurAntenna; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: current anntena is good\n")); ++ } ++ } ++ ++ pDM_SWAT_Table->try_flag = 0; ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ TXByteCnt_A = 0; ++ TXByteCnt_B = 0; ++ RXByteCnt_A = 0; ++ RXByteCnt_B = 0; ++ ++ } ++ ++ //1 Normal State ++ else if(pDM_SWAT_Table->try_flag == 0) ++ { ++ if(TrafficLoad == TRAFFIC_HIGH) ++ { ++ if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) ++ TrafficLoad = TRAFFIC_HIGH; ++ else ++ TrafficLoad = TRAFFIC_LOW; ++ } ++ else if(TrafficLoad == TRAFFIC_LOW) ++ { ++ if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) ++ TrafficLoad = TRAFFIC_HIGH; ++ else ++ TrafficLoad = TRAFFIC_LOW; ++ } ++ if(TrafficLoad == TRAFFIC_HIGH) ++ pDM_SWAT_Table->bTriggerAntennaSwitch = 0; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); ++ ++ //Prepare To Try Antenna ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->try_flag = 1; ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ pDM_SWAT_Table->RSSI_Trying = 4; ++#else ++ pDM_SWAT_Table->RSSI_Trying = 2; ++#endif ++ pDM_SWAT_Table->TestMode = TP_MODE; ++ } ++ else ++ { ++ pDM_SWAT_Table->RSSI_Trying = 2; ++ pDM_SWAT_Table->TestMode = RSSI_MODE; ++ ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ } // end of try_flag=0 ++ } ++ ++ //1 4.Change TRX antenna ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C ++ if(nextAntenna==MAIN_ANT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); ++ pathdiv_para = 0x02; //02 to switchback to RF path A ++ fw_value = 0x03; ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++#else ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++#endif ++ } ++ else if(nextAntenna==AUX_ANT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); ++ if(switchfirsttime==0) // First Time To Enter Path Diversity ++ { ++ switchfirsttime=0x01; ++ pathdiv_para = 0x00; ++ fw_value=0x00; // to backup RF Path A Releated Registers ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++#else ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++ //for(u1Byte n=0; n<80,n++) ++ //{ ++ //delay_us(500); ++ ODM_delay_ms(500); ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++ ++ fw_value=0x01; // to backup RF Path A Releated Registers ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); ++ } ++ else ++ { ++ pathdiv_para = 0x01; ++ fw_value = 0x02; ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++#else ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++#endif ++ } ++ } ++ // odm_PathDiversity_8192D(Adapter, pathdiv_para); ++ } ++ ++ //1 5.Reset Statistics ++ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ pDM_SWAT_Table->CurAntenna = nextAntenna; ++ pDM_SWAT_Table->PreRSSI = curRSSI; ++ ++ //1 6.Set next timer ++ ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ return; ++ ++ if(pDM_SWAT_Table->RSSI_Trying%2 == 0) ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(TrafficLoad == TRAFFIC_HIGH) ++ { ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); ++#else ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); ++#endif ++ } ++ else if(TrafficLoad == TRAFFIC_LOW) ++ { ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); ++ } ++ } ++ else // TestMode == RSSI_MODE ++ { ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); ++ } ++ } ++ else ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(TrafficLoad == TRAFFIC_HIGH) ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); ++#else ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms ++#endif ++ else if(TrafficLoad == TRAFFIC_LOW) ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms ++ } ++ else ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms ++ } ++} ++ ++ ++ ++VOID ++ODM_CCKPathDiversityChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd, ++ pu1Byte pDesc ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN bCount = FALSE; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); ++#if DEV_BUS_TYPE != RT_SDIO_INTERFACE ++ BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); ++#else //below code would be removed if we have verified SDIO ++ BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); ++#endif ++ ++ if ((pHalData->PathDivCfg != 1)) ++ return; ++ ++ if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) ++ bCount = TRUE; ++ else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) ++ bCount = TRUE; ++ ++ if(bCount && isCCKrate) ++ { ++ if(pDM_PDTable->TrainingState == 1 ) ++ { ++ if(pEntry) ++ { ++ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) ++ pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; ++ pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; ++ } ++ else ++ { ++ if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) ++ pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; ++ pDM_PDTable->RSSI_CCK_Path_cnt[0]++; ++ } ++ } ++ else if(pDM_PDTable->TrainingState == 2 ) ++ { ++ if(pEntry) ++ { ++ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) ++ pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; ++ pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; ++ } ++ else ++ { ++ if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) ++ pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; ++ pDM_PDTable->RSSI_CCK_Path_cnt[1]++; ++ } ++ } ++ } ++} ++ ++ ++ ++ ++//Neil Chen---2011--06--22 ++//----92D Path Diversity----// ++//#ifdef PathDiv92D ++//================================== ++//3 Path Diversity ++//================================== ++// ++// 20100514 Luke/Joseph: ++// Add new function for antenna diversity after link. ++// This is the main function of antenna diversity after link. ++// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). ++// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. ++// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. ++// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just ++// listened on the air with the RSSI of original antenna. ++// It chooses the antenna with better RSSI. ++// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting ++// penalty to get next try. ++// ++// ++// 20100503 Joseph: ++// Add new function SwAntDivCheck8192C(). ++// This is the main function of Antenna diversity function before link. ++// Mainly, it just retains last scan result and scan again. ++// After that, it compares the scan result to see which one gets better RSSI. ++// It selects antenna with better receiving power and returns better scan result. ++// ++ ++ ++// ++// 20100514 Luke/Joseph: ++// This function is used to gather the RSSI information for antenna testing. ++// It selects the RSSI of the peer STA that we want to know. ++// ++VOID ++ODM_PathDivChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN bCount = FALSE; ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) ++ bCount = TRUE; ++ else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) ++ bCount = TRUE; ++ ++ if(bCount) ++ { ++ //1 RSSI for SW Antenna Switch ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ { ++ pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; ++ pHalData->RSSI_cnt_A++; ++ } ++ else ++ { ++ pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; ++ pHalData->RSSI_cnt_B++; ++ ++ } ++ } ++} ++ ++ ++// ++// 20100514 Luke/Joseph: ++// Add new function to reset antenna diversity state after link. ++// ++VOID ++ODM_PathDivRestAfterLink( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ PADAPTER Adapter=pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_cnt_B = 0; ++ pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ pDM_SWAT_Table->CurAntenna = MAIN_ANT; ++} ++ ++ ++//================================================== ++//3 PathDiv End ++//================================================== ++ ++ ++VOID ++ODM_FillTXPathInTXDESC( ++ IN PADAPTER Adapter, ++ IN PRT_TCB pTcb, ++ IN pu1Byte pDesc ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u4Byte TXPath; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ ++ //2011.09.05 Add by Luke Lee for path diversity ++ if(pHalData->PathDivCfg == 1) ++ { ++ TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); ++ //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); ++ if(TXPath == 0) ++ { ++ SET_TX_DESC_TX_ANTL_92C(pDesc,1); ++ SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); ++ } ++ else ++ { ++ SET_TX_DESC_TX_ANTL_92C(pDesc,2); ++ SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); ++ } ++ TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; ++ if(TXPath == 0) ++ { ++ SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); ++ } ++ else ++ { ++ SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); ++ } ++ } ++} ++ ++//Only for MP //Neil Chen--2012--0502-- ++VOID ++odm_PathDivInit_92D( ++IN PDM_ODM_T pDM_Odm) ++{ ++ pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; ++ ++ pathIQK->org_2g_RegC14=0x0; ++ pathIQK->org_2g_RegC4C=0x0; ++ pathIQK->org_2g_RegC80=0x0; ++ pathIQK->org_2g_RegC94=0x0; ++ pathIQK->org_2g_RegCA0=0x0; ++ pathIQK->org_5g_RegC14=0x0; ++ pathIQK->org_5g_RegCA0=0x0; ++ pathIQK->org_5g_RegE30=0x0; ++ pathIQK->swt_2g_RegC14=0x0; ++ pathIQK->swt_2g_RegC4C=0x0; ++ pathIQK->swt_2g_RegC80=0x0; ++ pathIQK->swt_2g_RegC94=0x0; ++ pathIQK->swt_2g_RegCA0=0x0; ++ pathIQK->swt_5g_RegC14=0x0; ++ pathIQK->swt_5g_RegCA0=0x0; ++ pathIQK->swt_5g_RegE30=0x0; ++ ++} ++ ++ ++u1Byte ++odm_SwAntDivSelectScanChnl( ++ IN PADAPTER Adapter ++ ) ++{ ++#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ u2Byte i; ++ u1Byte j, ScanChannel = 0, ChannelNum = 0; ++ PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); ++ u1Byte EachChannelSTAs[MAX_SCAN_CHANNEL_NUM] = {0}; ++ ++ if(pMgntInfo->tmpNumBssDesc == 0) ++ return 0; ++ ++ for(i = 0; i < pMgntInfo->tmpNumBssDesc; i++) ++ { ++ ChannelNum = pMgntInfo->tmpbssDesc[i].ChannelNumber; ++ for(j = 0; j < pChannelList->ChannelLen; j++) ++ { ++ if(pChannelList->ChnlListEntry[j].ChannelNum == ChannelNum) ++ { ++ EachChannelSTAs[j]++; ++ break; ++ } ++ } ++ } ++ ++ for(i = 0; i < MAX_SCAN_CHANNEL_NUM; i++) ++ { ++ if(EachChannelSTAs[i] > EachChannelSTAs[ScanChannel]) ++ ScanChannel = (u1Byte)i; ++ } ++ ++ if(EachChannelSTAs[ScanChannel] == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("odm_SwAntDivSelectScanChnl(): Scan List is empty.\n")); ++ return 0; ++ } ++ ++ ScanChannel = pChannelList->ChnlListEntry[ScanChannel].ChannelNum; ++ ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ++ ("odm_SwAntDivSelectScanChnl(): Channel (( %d )) is select as scan channel.\n", ScanChannel)); ++ ++ return ScanChannel; ++#else ++ return 0; ++#endif ++} ++ ++ ++VOID ++odm_SwAntDivConstructScanChnl( ++ IN PADAPTER Adapter, ++ IN u1Byte ScanChnl ++ ) ++{ ++ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ if(ScanChnl == 0) ++ { ++ u1Byte i; ++ PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); ++ ++ // 20100519 Joseph: Original antenna scanned nothing. ++ // Test antenna shall scan all channel with half period in this condition. ++ ++ RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); ++ ++ RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); ++ for(i = 0; i < pChannelList->ChannelLen; i++) ++ pChannelList->ChnlListEntry[i].ScanPeriod /= 2; ++ } ++ else ++ { ++ // The using of this CustomizedScanRequest is a trick to rescan the two channels ++ // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. ++ CUSTOMIZED_SCAN_REQUEST CustomScanReq; ++ ++ CustomScanReq.bEnabled = TRUE; ++ CustomScanReq.Channels[0] = ScanChnl; ++ CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; ++ CustomScanReq.nChannels = 2; ++ CustomScanReq.ScanType = SCAN_ACTIVE; ++ CustomScanReq.Duration = DEFAULT_PASSIVE_SCAN_PERIOD; ++ ++ RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); ++ ++ RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); ++ } ++ ++} ++#else ++ ++VOID ++odm_PathDivChkAntSwitchCallback( ++ PRT_TIMER pTimer ++) ++{ ++} ++ ++VOID ++odm_PathDivChkAntSwitchWorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++} ++ ++VOID ++odm_CCKTXPathDiversityCallback( ++ PRT_TIMER pTimer ++) ++{ ++} ++ ++VOID ++odm_CCKTXPathDiversityWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++} ++u1Byte ++odm_SwAntDivSelectScanChnl( ++ IN PADAPTER Adapter ++ ) ++{ ++ return 0; ++} ++VOID ++odm_SwAntDivConstructScanChnl( ++ IN PADAPTER Adapter, ++ IN u1Byte ScanChnl ++ ) ++{ ++} ++ ++ ++#endif ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pathdiv.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pathdiv.h new file mode 100644 -index 000000000..020288ea4 +index 0000000..ca2116f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pathdiv.h @@ -0,0 +1,324 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMPATHDIV_H__ -+#define __PHYDMPATHDIV_H__ -+/*#define PATHDIV_VERSION "2.0" //2014.11.04*/ -+#define PATHDIV_VERSION "3.0" /*2015.01.13 Dino*/ -+ -+#if(defined(CONFIG_PATH_DIVERSITY)) -+#define USE_PATH_A_AS_DEFAULT_ANT //for 8814 dynamic TX path selection -+ -+#define NUM_RESET_DTP_PERIOD 5 -+#define ANT_DECT_RSSI_TH 3 -+ -+#define PATH_A 1 -+#define PATH_B 2 -+#define PATH_C 3 -+#define PATH_D 4 -+ -+#define PHYDM_AUTO_PATH 0 -+#define PHYDM_FIX_PATH 1 -+ -+#define NUM_CHOOSE2_FROM4 6 -+#define NUM_CHOOSE3_FROM4 4 -+ -+ -+#define PHYDM_A BIT0 -+#define PHYDM_B BIT1 -+#define PHYDM_C BIT2 -+#define PHYDM_D BIT3 -+#define PHYDM_AB (BIT0 | BIT1) // 0 -+#define PHYDM_AC (BIT0 | BIT2) // 1 -+#define PHYDM_AD (BIT0 | BIT3) // 2 -+#define PHYDM_BC (BIT1 | BIT2) // 3 -+#define PHYDM_BD (BIT1 | BIT3) // 4 -+#define PHYDM_CD (BIT2 | BIT3) // 5 -+ -+#define PHYDM_ABC (BIT0 | BIT1 | BIT2) /* 0*/ -+#define PHYDM_ABD (BIT0 | BIT1 | BIT3) /* 1*/ -+#define PHYDM_ACD (BIT0 | BIT2 | BIT3) /* 2*/ -+#define PHYDM_BCD (BIT1 | BIT2 | BIT3) /* 3*/ -+ -+#define PHYDM_ABCD (BIT0 | BIT1 | BIT2 | BIT3) -+ -+ -+typedef enum dtp_state -+{ -+ PHYDM_DTP_INIT=1, -+ PHYDM_DTP_RUNNING_1 -+ -+}PHYDM_DTP_STATE; -+ -+typedef enum path_div_type -+{ -+ PHYDM_2R_PATH_DIV = 1, -+ PHYDM_4R_PATH_DIV = 2 -+}PHYDM_PATH_DIV_TYPE; -+ -+VOID -+phydm_process_rssi_for_path_div( -+ IN OUT PVOID pDM_VOID, -+ IN PVOID p_phy_info_void, -+ IN PVOID p_pkt_info_void -+ ); -+ -+typedef struct _ODM_PATH_DIVERSITY_ -+{ -+ u1Byte RespTxPath; -+ u1Byte PathSel[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte PathA_Sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u4Byte PathB_Sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u2Byte PathA_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u2Byte PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u1Byte path_div_type; -+ #if RTL8814A_SUPPORT -+ -+ u4Byte path_a_sum_all; -+ u4Byte path_b_sum_all; -+ u4Byte path_c_sum_all; -+ u4Byte path_d_sum_all; -+ -+ u4Byte path_a_cnt_all; -+ u4Byte path_b_cnt_all; -+ u4Byte path_c_cnt_all; -+ u4Byte path_d_cnt_all; -+ -+ u1Byte dtp_period; -+ BOOLEAN bBecomeLinked; -+ BOOLEAN is_u3_mode; -+ u1Byte num_tx_path; -+ u1Byte default_path; -+ u1Byte num_candidate; -+ u1Byte ant_candidate_1; -+ u1Byte ant_candidate_2; -+ u1Byte ant_candidate_3; -+ u1Byte dtp_state; -+ u1Byte dtp_check_patha_counter; -+ BOOLEAN fix_path_bfer; -+ u1Byte search_space_2[NUM_CHOOSE2_FROM4]; -+ u1Byte search_space_3[NUM_CHOOSE3_FROM4]; -+ -+ u1Byte pre_tx_path; -+ u1Byte use_path_a_as_default_ant; -+ BOOLEAN is_pathA_exist; -+ -+ #endif -+}PATHDIV_T, *pPATHDIV_T; -+ -+ -+#endif //#if(defined(CONFIG_PATH_DIVERSITY)) -+ -+VOID -+phydm_c2h_dtp_handler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+ ); -+ -+VOID -+odm_PathDiversityInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_PathDiversity( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_pathdiv_debug( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value, -+ IN u4Byte *_used, -+ OUT char *output, -+ IN u4Byte *_out_len -+ ); -+ -+ -+ -+//1 [OLD IC]-------------------------------------------------------------------------------- -+ -+ -+ -+ -+ -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+//#define PATHDIV_ENABLE 1 -+#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi -+#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C -+ -+ -+ -+ -+typedef struct _PathDiv_Parameter_define_ -+{ -+ u4Byte org_5g_RegE30; -+ u4Byte org_5g_RegC14; -+ u4Byte org_5g_RegCA0; -+ u4Byte swt_5g_RegE30; -+ u4Byte swt_5g_RegC14; -+ u4Byte swt_5g_RegCA0; -+ //for 2G IQK information -+ u4Byte org_2g_RegC80; -+ u4Byte org_2g_RegC4C; -+ u4Byte org_2g_RegC94; -+ u4Byte org_2g_RegC14; -+ u4Byte org_2g_RegCA0; -+ -+ u4Byte swt_2g_RegC80; -+ u4Byte swt_2g_RegC4C; -+ u4Byte swt_2g_RegC94; -+ u4Byte swt_2g_RegC14; -+ u4Byte swt_2g_RegCA0; -+}PATHDIV_PARA,*pPATHDIV_PARA; -+ -+VOID -+odm_PathDiversityInit_92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_2TPathDiversityInit_92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_1TPathDiversityInit_92C( -+ IN PADAPTER Adapter -+ ); -+ -+BOOLEAN -+odm_IsConnected_92C( -+ IN PADAPTER Adapter -+ ); -+ -+BOOLEAN -+ODM_PathDiversityBeforeLink92C( -+ //IN PADAPTER Adapter -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+odm_PathDiversityAfterLink_92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_SetRespPath_92C( -+ IN PADAPTER Adapter, -+ IN u1Byte DefaultRespPath -+ ); -+ -+VOID -+odm_OFDMTXPathDiversity_92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_CCKTXPathDiversity_92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_ResetPathDiversity_92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_CCKTXPathDiversityCallback( -+ PRT_TIMER pTimer -+ ); -+ -+VOID -+odm_CCKTXPathDiversityWorkItemCallback( -+ IN PVOID pContext -+ ); -+ -+VOID -+odm_PathDivChkAntSwitchCallback( -+ PRT_TIMER pTimer -+ ); -+ -+VOID -+odm_PathDivChkAntSwitchWorkitemCallback( -+ IN PVOID pContext -+ ); -+ -+ -+VOID -+odm_PathDivChkAntSwitch( -+ PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+ODM_CCKPathDiversityChkPerPktRssi( -+ PADAPTER Adapter, -+ BOOLEAN bIsDefPort, -+ BOOLEAN bMatchBSSID, -+ PRT_WLAN_STA pEntry, -+ PRT_RFD pRfd, -+ pu1Byte pDesc -+ ); -+ -+VOID -+ODM_PathDivChkPerPktRssi( -+ PADAPTER Adapter, -+ BOOLEAN bIsDefPort, -+ BOOLEAN bMatchBSSID, -+ PRT_WLAN_STA pEntry, -+ PRT_RFD pRfd -+ ); -+ -+VOID -+ODM_PathDivRestAfterLink( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+VOID -+ODM_FillTXPathInTXDESC( -+ IN PADAPTER Adapter, -+ IN PRT_TCB pTcb, -+ IN pu1Byte pDesc -+ ); -+ -+VOID -+odm_PathDivInit_92D( -+ IN PDM_ODM_T pDM_Odm -+ ); -+ -+u1Byte -+odm_SwAntDivSelectScanChnl( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_SwAntDivConstructScanChnl( -+ IN PADAPTER Adapter, -+ IN u1Byte ScanChnl -+ ); -+ -+ #endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+ -+ #endif //#ifndef __ODMPATHDIV_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPATHDIV_H__ ++#define __PHYDMPATHDIV_H__ ++/*#define PATHDIV_VERSION "2.0" //2014.11.04*/ ++#define PATHDIV_VERSION "3.0" /*2015.01.13 Dino*/ ++ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++#define USE_PATH_A_AS_DEFAULT_ANT //for 8814 dynamic TX path selection ++ ++#define NUM_RESET_DTP_PERIOD 5 ++#define ANT_DECT_RSSI_TH 3 ++ ++#define PATH_A 1 ++#define PATH_B 2 ++#define PATH_C 3 ++#define PATH_D 4 ++ ++#define PHYDM_AUTO_PATH 0 ++#define PHYDM_FIX_PATH 1 ++ ++#define NUM_CHOOSE2_FROM4 6 ++#define NUM_CHOOSE3_FROM4 4 ++ ++ ++#define PHYDM_A BIT0 ++#define PHYDM_B BIT1 ++#define PHYDM_C BIT2 ++#define PHYDM_D BIT3 ++#define PHYDM_AB (BIT0 | BIT1) // 0 ++#define PHYDM_AC (BIT0 | BIT2) // 1 ++#define PHYDM_AD (BIT0 | BIT3) // 2 ++#define PHYDM_BC (BIT1 | BIT2) // 3 ++#define PHYDM_BD (BIT1 | BIT3) // 4 ++#define PHYDM_CD (BIT2 | BIT3) // 5 ++ ++#define PHYDM_ABC (BIT0 | BIT1 | BIT2) /* 0*/ ++#define PHYDM_ABD (BIT0 | BIT1 | BIT3) /* 1*/ ++#define PHYDM_ACD (BIT0 | BIT2 | BIT3) /* 2*/ ++#define PHYDM_BCD (BIT1 | BIT2 | BIT3) /* 3*/ ++ ++#define PHYDM_ABCD (BIT0 | BIT1 | BIT2 | BIT3) ++ ++ ++typedef enum dtp_state ++{ ++ PHYDM_DTP_INIT=1, ++ PHYDM_DTP_RUNNING_1 ++ ++}PHYDM_DTP_STATE; ++ ++typedef enum path_div_type ++{ ++ PHYDM_2R_PATH_DIV = 1, ++ PHYDM_4R_PATH_DIV = 2 ++}PHYDM_PATH_DIV_TYPE; ++ ++VOID ++phydm_process_rssi_for_path_div( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ ); ++ ++typedef struct _ODM_PATH_DIVERSITY_ ++{ ++ u1Byte RespTxPath; ++ u1Byte PathSel[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte PathA_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte PathB_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u2Byte PathA_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u2Byte PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte path_div_type; ++ #if RTL8814A_SUPPORT ++ ++ u4Byte path_a_sum_all; ++ u4Byte path_b_sum_all; ++ u4Byte path_c_sum_all; ++ u4Byte path_d_sum_all; ++ ++ u4Byte path_a_cnt_all; ++ u4Byte path_b_cnt_all; ++ u4Byte path_c_cnt_all; ++ u4Byte path_d_cnt_all; ++ ++ u1Byte dtp_period; ++ BOOLEAN bBecomeLinked; ++ BOOLEAN is_u3_mode; ++ u1Byte num_tx_path; ++ u1Byte default_path; ++ u1Byte num_candidate; ++ u1Byte ant_candidate_1; ++ u1Byte ant_candidate_2; ++ u1Byte ant_candidate_3; ++ u1Byte dtp_state; ++ u1Byte dtp_check_patha_counter; ++ BOOLEAN fix_path_bfer; ++ u1Byte search_space_2[NUM_CHOOSE2_FROM4]; ++ u1Byte search_space_3[NUM_CHOOSE3_FROM4]; ++ ++ u1Byte pre_tx_path; ++ u1Byte use_path_a_as_default_ant; ++ BOOLEAN is_pathA_exist; ++ ++ #endif ++}PATHDIV_T, *pPATHDIV_T; ++ ++ ++#endif //#if(defined(CONFIG_PATH_DIVERSITY)) ++ ++VOID ++phydm_c2h_dtp_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++ ); ++ ++VOID ++odm_PathDiversityInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_PathDiversity( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_pathdiv_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ); ++ ++ ++ ++//1 [OLD IC]-------------------------------------------------------------------------------- ++ ++ ++ ++ ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++//#define PATHDIV_ENABLE 1 ++#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi ++#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C ++ ++ ++ ++ ++typedef struct _PathDiv_Parameter_define_ ++{ ++ u4Byte org_5g_RegE30; ++ u4Byte org_5g_RegC14; ++ u4Byte org_5g_RegCA0; ++ u4Byte swt_5g_RegE30; ++ u4Byte swt_5g_RegC14; ++ u4Byte swt_5g_RegCA0; ++ //for 2G IQK information ++ u4Byte org_2g_RegC80; ++ u4Byte org_2g_RegC4C; ++ u4Byte org_2g_RegC94; ++ u4Byte org_2g_RegC14; ++ u4Byte org_2g_RegCA0; ++ ++ u4Byte swt_2g_RegC80; ++ u4Byte swt_2g_RegC4C; ++ u4Byte swt_2g_RegC94; ++ u4Byte swt_2g_RegC14; ++ u4Byte swt_2g_RegCA0; ++}PATHDIV_PARA,*pPATHDIV_PARA; ++ ++VOID ++odm_PathDiversityInit_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_2TPathDiversityInit_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_1TPathDiversityInit_92C( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++odm_IsConnected_92C( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++ODM_PathDiversityBeforeLink92C( ++ //IN PADAPTER Adapter ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++odm_PathDiversityAfterLink_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_SetRespPath_92C( ++ IN PADAPTER Adapter, ++ IN u1Byte DefaultRespPath ++ ); ++ ++VOID ++odm_OFDMTXPathDiversity_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_CCKTXPathDiversity_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_ResetPathDiversity_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_CCKTXPathDiversityCallback( ++ PRT_TIMER pTimer ++ ); ++ ++VOID ++odm_CCKTXPathDiversityWorkItemCallback( ++ IN PVOID pContext ++ ); ++ ++VOID ++odm_PathDivChkAntSwitchCallback( ++ PRT_TIMER pTimer ++ ); ++ ++VOID ++odm_PathDivChkAntSwitchWorkitemCallback( ++ IN PVOID pContext ++ ); ++ ++ ++VOID ++odm_PathDivChkAntSwitch( ++ PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_CCKPathDiversityChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd, ++ pu1Byte pDesc ++ ); ++ ++VOID ++ODM_PathDivChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd ++ ); ++ ++VOID ++ODM_PathDivRestAfterLink( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_FillTXPathInTXDESC( ++ IN PADAPTER Adapter, ++ IN PRT_TCB pTcb, ++ IN pu1Byte pDesc ++ ); ++ ++VOID ++odm_PathDivInit_92D( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++u1Byte ++odm_SwAntDivSelectScanChnl( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_SwAntDivConstructScanChnl( ++ IN PADAPTER Adapter, ++ IN u1Byte ScanChnl ++ ); ++ ++ #endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++ ++ #endif //#ifndef __ODMPATHDIV_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ap.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ap.c new file mode 100644 -index 000000000..4f8623958 +index 0000000..fce05cb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ap.c @@ -0,0 +1,1050 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if !defined(_OUTSRC_COEXIST) -+//============================================================ -+// Global var -+//============================================================ -+ -+ -+u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE_92D] = { -+ 0x0b40002d, // 0, -15.0dB -+ 0x0c000030, // 1, -14.5dB -+ 0x0cc00033, // 2, -14.0dB -+ 0x0d800036, // 3, -13.5dB -+ 0x0e400039, // 4, -13.0dB -+ 0x0f00003c, // 5, -12.5dB -+ 0x10000040, // 6, -12.0dB -+ 0x11000044, // 7, -11.5dB -+ 0x12000048, // 8, -11.0dB -+ 0x1300004c, // 9, -10.5dB -+ 0x14400051, // 10, -10.0dB -+ 0x15800056, // 11, -9.5dB -+ 0x16c0005b, // 12, -9.0dB -+ 0x18000060, // 13, -8.5dB -+ 0x19800066, // 14, -8.0dB -+ 0x1b00006c, // 15, -7.5dB -+ 0x1c800072, // 16, -7.0dB -+ 0x1e400079, // 17, -6.5dB -+ 0x20000080, // 18, -6.0dB -+ 0x22000088, // 19, -5.5dB -+ 0x24000090, // 20, -5.0dB -+ 0x26000098, // 21, -4.5dB -+ 0x288000a2, // 22, -4.0dB -+ 0x2ac000ab, // 23, -3.5dB -+ 0x2d4000b5, // 24, -3.0dB -+ 0x300000c0, // 25, -2.5dB -+ 0x32c000cb, // 26, -2.0dB -+ 0x35c000d7, // 27, -1.5dB -+ 0x390000e4, // 28, -1.0dB -+ 0x3c8000f2, // 29, -0.5dB -+ 0x40000100, // 30, +0dB -+ 0x43c0010f, // 31, +0.5dB -+ 0x47c0011f, // 32, +1.0dB -+ 0x4c000130, // 33, +1.5dB -+ 0x50800142, // 34, +2.0dB -+ 0x55400155, // 35, +2.5dB -+ 0x5a400169, // 36, +3.0dB -+ 0x5fc0017f, // 37, +3.5dB -+ 0x65400195, // 38, +4.0dB -+ 0x6b8001ae, // 39, +4.5dB -+ 0x71c001c7, // 40, +5.0dB -+ 0x788001e2, // 41, +5.5dB -+ 0x7f8001fe // 42, +6.0dB -+}; -+ -+u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB -+ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB -+ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB -+}; -+ -+u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { -+ 0x0b40002d, // 0, -15.0dB -+ 0x0c000030, // 1, -14.5dB -+ 0x0cc00033, // 2, -14.0dB -+ 0x0d800036, // 3, -13.5dB -+ 0x0e400039, // 4, -13.0dB -+ 0x0f00003c, // 5, -12.5dB -+ 0x10000040, // 6, -12.0dB -+ 0x11000044, // 7, -11.5dB -+ 0x12000048, // 8, -11.0dB -+ 0x1300004c, // 9, -10.5dB -+ 0x14400051, // 10, -10.0dB -+ 0x15800056, // 11, -9.5dB -+ 0x16c0005b, // 12, -9.0dB -+ 0x18000060, // 13, -8.5dB -+ 0x19800066, // 14, -8.0dB -+ 0x1b00006c, // 15, -7.5dB -+ 0x1c800072, // 16, -7.0dB -+ 0x1e400079, // 17, -6.5dB -+ 0x20000080, // 18, -6.0dB -+ 0x22000088, // 19, -5.5dB -+ 0x24000090, // 20, -5.0dB -+ 0x26000098, // 21, -4.5dB -+ 0x288000a2, // 22, -4.0dB -+ 0x2ac000ab, // 23, -3.5dB -+ 0x2d4000b5, // 24, -3.0dB -+ 0x300000c0, // 25, -2.5dB -+ 0x32c000cb, // 26, -2.0dB -+ 0x35c000d7, // 27, -1.5dB -+ 0x390000e4, // 28, -1.0dB -+ 0x3c8000f2, // 29, -0.5dB -+ 0x40000100, // 30, +0dB -+ 0x43c0010f, // 31, +0.5dB -+ 0x47c0011f, // 32, +1.0dB -+ 0x4c000130, // 33, +1.5dB -+ 0x50800142, // 34, +2.0dB -+ 0x55400155, // 35, +2.5dB -+ 0x5a400169, // 36, +3.0dB -+ 0x5fc0017f, // 37, +3.5dB -+ 0x65400195, // 38, +4.0dB -+ 0x6b8001ae, // 39, +4.5dB -+ 0x71c001c7, // 40, +5.0dB -+ 0x788001e2, // 41, +5.5dB -+ 0x7f8001fe // 42, +6.0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB -+ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB -+ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB -+}; -+ -+u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { -+{0x16, 0x15, 0x13, 0x10, 0xD, 0x9, 0x6, 0x3, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 0 -16dB */ -+{0x18, 0x17, 0x15, 0x12, 0xE, 0xA, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 1 -15.5dB */ -+{0x1B, 0x1A, 0x18, 0x14, 0x10, 0xB, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 2 -15dB */ -+{0x1F, 0x1E, 0x1B, 0x17, 0x12, 0xD, 0x8, 0x5, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 3 -14.5dB */ -+{0x22, 0x21, 0x1E, 0x19, 0x14, 0xE, 0x9, 0x5, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 4 -14dB */ -+{0x26, 0x25, 0x22, 0x1C, 0x16, 0x10, 0xA, 0x6, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 5 -13.5dB */ -+{0x2B, 0x2A, 0x26, 0x20, 0x19, 0x12, 0xC, 0x7, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 6 -13dB */ -+{0x30, 0x2F, 0x2A, 0x24, 0x1C, 0x14, 0xD, 0x8, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 7 -12.5dB */ -+{0x36, 0x34, 0x2F, 0x28, 0x1F, 0x17, 0xF, 0x9, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 8 -12dB */ -+{0x3D, 0x3B, 0x35, 0x2D, 0x23, 0x19, 0x11, 0xA, 0x5, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 9 -11.5dB */ -+{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0xB, 0x5, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 10 -11dB */ -+{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0xC, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 11 -10.5dB */ -+{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0xE, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 12 -10dB */ -+{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0xF, 0x7, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 13 -9.5dB */ -+{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x8, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 14 -9dB */ -+{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x9, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 15 -8.5dB */ -+{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0xA, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 16 -8dB */ -+{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0xB, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 17 -7.5dB */ -+{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0xD, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 18 -7dB */ -+{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0xE, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 19 -6.5dB */ -+{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0} /* 20 -6dB */ -+}; -+ -+ -+#if 0 -+u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E] = { -+ /* Index0 6 dB */ 0x7fc001ff, -+ /* Index1 5.7dB */ 0x7b4001ed, -+ /* Index2 5.4dB */ 0x774001dd, -+ /* Index3 5.1dB */ 0x734001cd, -+ /* Index4 4.8dB */ 0x6f4001bd, -+ /* Index5 4.5dB */ 0x6b8001ae, -+ /* Index6 4.2dB */ 0x67c0019f, -+ /* Index7 3.9dB */ 0x64400191, -+ /* Index8 3.6dB */ 0x60c00183, -+ /* Index9 3.3dB */ 0x5d800176, -+ /* Index10 3 dB */ 0x5a80016a, -+ /* Index11 2.7dB */ 0x5740015d, -+ /* Index12 2.4dB */ 0x54400151, -+ /* Index13 2.1dB */ 0x51800146, -+ /* Index14 1.8dB */ 0x4ec0013b, -+ /* Index15 1.5dB */ 0x4c000130, -+ /* Index16 1.2dB */ 0x49800126, -+ /* Index17 0.9dB */ 0x4700011c, -+ /* Index18 0.6dB */ 0x44800112, -+ /* Index19 0.3dB */ 0x42000108, -+ /* Index20 0 dB */ 0x40000100, // 20 This is OFDM base index -+ /* Index21 -0.3dB */ 0x3dc000f7, -+ /* Index22 -0.6dB */ 0x3bc000ef, -+ /* Index23 -0.9dB */ 0x39c000e7, -+ /* Index24 -1.2dB */ 0x37c000df, -+ /* Index25 -1.5dB */ 0x35c000d7, -+ /* Index26 -1.8dB */ 0x340000d0, -+ /* Index27 -2.1dB */ 0x324000c9, -+ /* Index28 -2.4dB */ 0x308000c2, -+ /* Index29 -2.7dB */ 0x2f0000bc, -+ /* Index30 -3 dB */ 0x2d4000b5, -+ /* Index31 -3.3dB */ 0x2bc000af, -+ /* Index32 -3.6dB */ 0x2a4000a9, -+ /* Index33 -3.9dB */ 0x28c000a3, -+ /* Index34 -4.2dB */ 0x2780009e, -+ /* Index35 -4.5dB */ 0x26000098, -+ /* Index36 -4.8dB */ 0x24c00093, -+ /* Index37 -5.1dB */ 0x2380008e, -+ /* Index38 -5.4dB */ 0x22400089, -+ /* Index39 -5.7dB */ 0x21400085, -+ /* Index40 -6 dB */ 0x20000080, -+ /* Index41 -6.3dB */ 0x1f00007c, -+ /* Index42 -6.6dB */ 0x1e000078, -+ /* Index43 -6.9dB */ 0x1d000074, -+ /* Index44 -7.2dB */ 0x1c000070, -+ /* Index45 -7.5dB */ 0x1b00006c, -+ /* Index46 -7.8dB */ 0x1a000068, -+ /* Index47 -8.1dB */ 0x19400065, -+ /* Index48 -8.4dB */ 0x18400061, -+ /* Index49 -8.7dB */ 0x1780005e, -+ /* Index50 -9 dB */ 0x16c0005b, -+ /* Index51 -9.3dB */ 0x16000058, -+ /* Index52 -9.6dB */ 0x15400055, -+ /* Index53 -9.9dB */ 0x14800052 -+}; -+u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x1C , 0x12 , 0x08 , 0x04}, -+ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x1B , 0x11 , 0x08 , 0x04}, -+ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x1A , 0x11 , 0x07 , 0x04}, -+ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x19 , 0x10 , 0x07 , 0x04}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x18 , 0x10 , 0x07 , 0x03}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x18 , 0x0F , 0x07 , 0x03}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x17 , 0x0F , 0x06 , 0x03}, -+ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x16 , 0x0E , 0x06 , 0x03}, -+ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x15 , 0x0E , 0x06 , 0x03}, -+ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x14 , 0x0D , 0x06 , 0x03}, -+ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x14 , 0x0D , 0x06 , 0x03}, -+ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x13 , 0x0C , 0x05 , 0x03}, -+ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x12 , 0x0C , 0x05 , 0x03}, -+ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x12 , 0x0B , 0x05 , 0x03}, -+ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, -+ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x10 , 0x0A , 0x05 , 0x02}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x10 , 0x0A , 0x04 , 0x02}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x0F , 0x0A , 0x04 , 0x02}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x0E , 0x09 , 0x04 , 0x02}, -+ /* Index20 -6.0dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x0E , 0x09 , 0x04 , 0x02}, // 20 This is CCK base index -+ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x0E , 0x09 , 0x04 , 0x02}, -+ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x0D , 0x08 , 0x04 , 0x02}, -+ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x0D , 0x08 , 0x04 , 0x02}, -+ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x0C , 0x08 , 0x03 , 0x02}, -+ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x0C , 0x08 , 0x03 , 0x02}, -+ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, -+ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, -+ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x0B , 0x07 , 0x03 , 0x02}, -+ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x0A , 0x07 , 0x03 , 0x01}, -+ /* Index30 -9.0dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, // 30 This is hp CCK base index -+ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, -+ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x09 , 0x06 , 0x03 , 0x01}, -+ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x09 , 0x06 , 0x03 , 0x01}, -+ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x09 , 0x06 , 0x02 , 0x01}, -+ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, -+ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x08 , 0x05 , 0x02 , 0x01}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, -+ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x05 , 0x03 , 0x02 , 0x01}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x04 , 0x03 , 0x01 , 0x01} -+}; -+u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index20 -6 dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index30 -9 dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00} -+}; -+#endif -+ -+#ifdef AP_BUILD_WORKAROUND -+ -+unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { -+ /* +6.0dB */ 0x7f8001fe, -+ /* +5.5dB */ 0x788001e2, -+ /* +5.0dB */ 0x71c001c7, -+ /* +4.5dB */ 0x6b8001ae, -+ /* +4.0dB */ 0x65400195, -+ /* +3.5dB */ 0x5fc0017f, -+ /* +3.0dB */ 0x5a400169, -+ /* +2.5dB */ 0x55400155, -+ /* +2.0dB */ 0x50800142, -+ /* +1.5dB */ 0x4c000130, -+ /* +1.0dB */ 0x47c0011f, -+ /* +0.5dB */ 0x43c0010f, -+ /* 0.0dB */ 0x40000100, -+ /* -0.5dB */ 0x3c8000f2, -+ /* -1.0dB */ 0x390000e4, -+ /* -1.5dB */ 0x35c000d7, -+ /* -2.0dB */ 0x32c000cb, -+ /* -2.5dB */ 0x300000c0, -+ /* -3.0dB */ 0x2d4000b5, -+ /* -3.5dB */ 0x2ac000ab, -+ /* -4.0dB */ 0x288000a2, -+ /* -4.5dB */ 0x26000098, -+ /* -5.0dB */ 0x24000090, -+ /* -5.5dB */ 0x22000088, -+ /* -6.0dB */ 0x20000080, -+ /* -6.5dB */ 0x1a00006c, -+ /* -7.0dB */ 0x1c800072, -+ /* -7.5dB */ 0x18000060, -+ /* -8.0dB */ 0x19800066, -+ /* -8.5dB */ 0x15800056, -+ /* -9.0dB */ 0x26c0005b, -+ /* -9.5dB */ 0x14400051, -+ /* -10.0dB */ 0x24400051, -+ /* -10.5dB */ 0x1300004c, -+ /* -11.0dB */ 0x12000048, -+ /* -11.5dB */ 0x11000044, -+ /* -12.0dB */ 0x10000040 -+}; -+#endif -+ -+#endif -+ -+ -+u1Byte DeltaSwingTableIdx_2GA_P_DEFAULT[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3 -+, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -+u1Byte DeltaSwingTableIdx_2GA_N_DEFAULT[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4 -+, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+ -+ -+#ifdef CONFIG_WLAN_HAL_8192EE -+u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E] = { -+ /* Index0 6 dB */ 0x7fc001ff, -+ /* Index1 5.7dB */ 0x7b4001ed, -+ /* Index2 5.4dB */ 0x774001dd, -+ /* Index3 5.1dB */ 0x734001cd, -+ /* Index4 4.8dB */ 0x6f4001bd, -+ /* Index5 4.5dB */ 0x6b8001ae, -+ /* Index6 4.2dB */ 0x67c0019f, -+ /* Index7 3.9dB */ 0x64400191, -+ /* Index8 3.6dB */ 0x60c00183, -+ /* Index9 3.3dB */ 0x5d800176, -+ /* Index10 3 dB */ 0x5a80016a, -+ /* Index11 2.7dB */ 0x5740015d, -+ /* Index12 2.4dB */ 0x54400151, -+ /* Index13 2.1dB */ 0x51800146, -+ /* Index14 1.8dB */ 0x4ec0013b, -+ /* Index15 1.5dB */ 0x4c000130, -+ /* Index16 1.2dB */ 0x49800126, -+ /* Index17 0.9dB */ 0x4700011c, -+ /* Index18 0.6dB */ 0x44800112, -+ /* Index19 0.3dB */ 0x42000108, -+ /* Index20 0 dB */ 0x40000100, // 20 This is OFDM base index -+ /* Index21 -0.3dB */ 0x3dc000f7, -+ /* Index22 -0.6dB */ 0x3bc000ef, -+ /* Index23 -0.9dB */ 0x39c000e7, -+ /* Index24 -1.2dB */ 0x37c000df, -+ /* Index25 -1.5dB */ 0x35c000d7, -+ /* Index26 -1.8dB */ 0x340000d0, -+ /* Index27 -2.1dB */ 0x324000c9, -+ /* Index28 -2.4dB */ 0x308000c2, -+ /* Index29 -2.7dB */ 0x2f0000bc, -+ /* Index30 -3 dB */ 0x2d4000b5, -+ /* Index31 -3.3dB */ 0x2bc000af, -+ /* Index32 -3.6dB */ 0x2a4000a9, -+ /* Index33 -3.9dB */ 0x28c000a3, -+ /* Index34 -4.2dB */ 0x2780009e, -+ /* Index35 -4.5dB */ 0x26000098, -+ /* Index36 -4.8dB */ 0x24c00093, -+ /* Index37 -5.1dB */ 0x2380008e, -+ /* Index38 -5.4dB */ 0x22400089, -+ /* Index39 -5.7dB */ 0x21400085, -+ /* Index40 -6 dB */ 0x20000080, -+ /* Index41 -6.3dB */ 0x1f00007c, -+ /* Index42 -6.6dB */ 0x1e000078, -+ /* Index43 -6.9dB */ 0x1d000074, -+ /* Index44 -7.2dB */ 0x1c000070, -+ /* Index45 -7.5dB */ 0x1b00006c, -+ /* Index46 -7.8dB */ 0x1a000068, -+ /* Index47 -8.1dB */ 0x19400065, -+ /* Index48 -8.4dB */ 0x18400061, -+ /* Index49 -8.7dB */ 0x1780005e, -+ /* Index50 -9 dB */ 0x16c0005b, -+ /* Index51 -9.3dB */ 0x16000058, -+ /* Index52 -9.6dB */ 0x15400055, -+ /* Index53 -9.9dB */ 0x14800052 -+}; -+u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x1C , 0x12 , 0x08 , 0x04}, -+ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x1B , 0x11 , 0x08 , 0x04}, -+ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x1A , 0x11 , 0x07 , 0x04}, -+ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x19 , 0x10 , 0x07 , 0x04}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x18 , 0x10 , 0x07 , 0x03}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x18 , 0x0F , 0x07 , 0x03}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x17 , 0x0F , 0x06 , 0x03}, -+ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x16 , 0x0E , 0x06 , 0x03}, -+ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x15 , 0x0E , 0x06 , 0x03}, -+ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x14 , 0x0D , 0x06 , 0x03}, -+ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x14 , 0x0D , 0x06 , 0x03}, -+ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x13 , 0x0C , 0x05 , 0x03}, -+ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x12 , 0x0C , 0x05 , 0x03}, -+ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x12 , 0x0B , 0x05 , 0x03}, -+ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, -+ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x10 , 0x0A , 0x05 , 0x02}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x10 , 0x0A , 0x04 , 0x02}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x0F , 0x0A , 0x04 , 0x02}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x0E , 0x09 , 0x04 , 0x02}, -+ /* Index20 -6.0dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x0E , 0x09 , 0x04 , 0x02}, // 20 This is CCK base index -+ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x0E , 0x09 , 0x04 , 0x02}, -+ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x0D , 0x08 , 0x04 , 0x02}, -+ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x0D , 0x08 , 0x04 , 0x02}, -+ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x0C , 0x08 , 0x03 , 0x02}, -+ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x0C , 0x08 , 0x03 , 0x02}, -+ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, -+ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, -+ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x0B , 0x07 , 0x03 , 0x02}, -+ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x0A , 0x07 , 0x03 , 0x01}, -+ /* Index30 -9.0dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, // 30 This is hp CCK base index -+ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, -+ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x09 , 0x06 , 0x03 , 0x01}, -+ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x09 , 0x06 , 0x03 , 0x01}, -+ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x09 , 0x06 , 0x02 , 0x01}, -+ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, -+ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x08 , 0x05 , 0x02 , 0x01}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, -+ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x06 , 0x04 , 0x02 , 0x01}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x05 , 0x03 , 0x02 , 0x01}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, -+ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x04 , 0x03 , 0x01 , 0x01} -+}; -+u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index20 -6 dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index30 -9 dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, -+ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00} -+}; -+#endif -+ -+#if(RTL8814A_SUPPORT == 1) -+u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = -+{ -+ 0x081, // 0, -12.0dB -+ 0x088, // 1, -11.5dB -+ 0x090, // 2, -11.0dB -+ 0x099, // 3, -10.5dB -+ 0x0A2, // 4, -10.0dB -+ 0x0AC, // 5, -9.5dB -+ 0x0B6, // 6, -9.0dB -+ 0x0C0, // 7, -8.5dB -+ 0x0CC, // 8, -8.0dB -+ 0x0D8, // 9, -7.5dB -+ 0x0E5, // 10, -7.0dB -+ 0x0F2, // 11, -6.5dB -+ 0x101, // 12, -6.0dB -+ 0x110, // 13, -5.5dB -+ 0x120, // 14, -5.0dB -+ 0x131, // 15, -4.5dB -+ 0x143, // 16, -4.0dB -+ 0x156, // 17, -3.5dB -+ 0x16A, // 18, -3.0dB -+ 0x180, // 19, -2.5dB -+ 0x197, // 20, -2.0dB -+ 0x1AF, // 21, -1.5dB -+ 0x1C8, // 22, -1.0dB -+ 0x1E3, // 23, -0.5dB -+ 0x200, // 24, +0 dB -+ 0x21E, // 25, +0.5dB -+ 0x23E, // 26, +1.0dB -+ 0x261, // 27, +1.5dB -+ 0x285, // 28, +2.0dB -+ 0x2AB, // 29, +2.5dB -+ 0x2D3, // 30, +3.0dB -+ 0x2FE, // 31, +3.5dB -+ 0x32B, // 32, +4.0dB -+ 0x35C, // 33, +4.5dB -+ 0x38E, // 34, +5.0dB -+ 0x3C4, // 35, +5.5dB -+ 0x3FE // 36, +6.0dB -+}; -+#elif(ODM_IC_11AC_SERIES_SUPPORT) -+u4Byte OFDMSwingTable_8812[OFDM_TABLE_SIZE_8812] = { -+ 0x3FE, // 0, (6dB) -+ 0x3C4, // 1, (5.5dB) -+ 0x38E, // 2, (5dB) -+ 0x35C, // 3, (4.5dB) -+ 0x32B, // 4, (4dB) -+ 0x2FE, // 5, (3.5dB) -+ 0x2D3, // 6, (3dB) -+ 0x2AB, // 7, (2.5dB) -+ 0x285, // 8, (2dB) -+ 0x261, // 9, (1.5dB -+ 0x23E, // 10, (1dB) -+ 0x21E, // 11, (0.5dB) -+ 0x200, // 12, (0dB) 8814 int PA 2G default -+ 0x1E3, // 13, (-0.5dB) -+ 0x1C8, // 14, (-1dB) -+ 0x1AF, // 15, (-1.5dB) -+ 0x197, // 16, (-2dB) -+ 0x180, // 17, (-2.5dB) -+ 0x16A, // 18, (-3dB) 8812 / 8814 int PA 5G / 8814 ext PA 2G5G default -+ 0x156, // 19, (-3.5dB) -+ 0x143, // 20, (-4dB) 8812 HP default -+ 0x131, // 21, (-4.5dB) -+ 0x120, // 22, (-5dB) -+ 0x110, // 23, (-5.5dB) -+ 0x101, // 24, (-6dB) -+ 0x0F2, // 25, (-6.5dB) -+ 0x0E5, // 26, (-7dB) -+ 0x0D8, // 27, (-7.5dB) -+ 0x0CC, // 28, (-8dB) -+ 0x0C0, // 29, (-8.5dB) -+ 0x0B6, // 30, (-9dB) -+ 0x0AC, // 31, (-9.5dB) -+ 0x0A2, // 32, (-10dB) -+ 0x099, // 33, (-10.5dB) -+ 0x090, // 34, (-11dB) -+ 0x088, // 35, (-11.5dB) -+ 0x081, // 36, (-12dB) -+ 0x079, // 37, (-12.5dB) -+ 0x072, // 38, (-13dB) -+ 0x06c, // 39, (-13.5dB) -+ 0x066, // 40, (-14dB) -+ 0x060, // 41, (-14.5dB) -+ 0x05B // 42, (-15dB) -+}; -+#endif -+ -+//#endif -+//3============================================================ -+//3 Tx Power Tracking -+//3============================================================ -+ -+VOID -+odm_TXPowerTrackingInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) -+ return; -+#endif -+ -+ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); -+} -+ -+ -+VOID -+odm_TXPowerTrackingThermalMeterInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ u1Byte p; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ pMgntInfo->bTXPowerTracking = TRUE; -+ pHalData->TXPowercount = 0; -+ pHalData->bTXPowerTrackingInit = FALSE; -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pHalData->TxPowerTrackControl = TRUE; -+ ODM_RT_TRACE(pDM_Odm,COMP_POWER_TRACKING, DBG_LOUD, ("pMgntInfo->bTXPowerTracking = %d\n", pMgntInfo->bTXPowerTracking)); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #ifdef CONFIG_RTL8188E -+ { -+ pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; -+ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; -+ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; -+ -+ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); -+ } -+ #else -+ { -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct dm_priv *pdmpriv = &pHalData->dmpriv; -+ -+ //if(IS_HARDWARE_TYPE_8192C(pHalData)) -+ { -+ pdmpriv->bTXPowerTracking = _TRUE; -+ pdmpriv->TXPowercount = 0; -+ pdmpriv->bTXPowerTrackingInit = _FALSE; -+ -+ if(pDM_Odm->mp_mode == FALSE) //for mp driver, turn off txpwrtracking as default -+ pdmpriv->TxPowerTrackControl = _TRUE; -+ -+ } -+ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); -+ -+ } -+ #endif//endif (CONFIG_RTL8188E==1) -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+ #ifdef RTL8188E_SUPPORT -+ { -+ pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; -+ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; -+ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; -+ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; -+ } -+ #endif -+#endif -+ -+ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = 0; -+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = 0; -+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; -+ pDM_Odm->RFCalibrateInfo.ThermalValue = 0; -+ pRFCalibrateInfo->DefaultOfdmIndex = 28; -+ -+ -+#if RTL8188E_SUPPORT -+ pRFCalibrateInfo->DefaultCckIndex = 20; // -6 dB -+#elif RTL8192E_SUPPORT -+ pRFCalibrateInfo->DefaultCckIndex = 8; // -12 dB -+#endif -+ pRFCalibrateInfo->BbSwingIdxOfdmBase = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; -+ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->DefaultCckIndex; -+ for(p = 0; p < MAX_RF_PATH; p++) -+ { -+ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->KfreeOffset[p] = 0; // for 8814 kfree -+ } -+ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; -+ -+} -+ -+ -+VOID -+ODM_TXPowerTrackingCheck( -+ IN PVOID pDM_VOID -+ ) -+{ -+ // -+ // For AP/ADSL use prtl8192cd_priv -+ // For CE/NIC use PADAPTER -+ // -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ -+ -+ if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) -+ return; -+ -+ // -+ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate -+ // at the same time. In the stage2/3, we need to prive universal interface and merge all -+ // HW dynamic mechanism. -+ // -+ switch (pDM_Odm->SupportPlatform) -+ { -+ case ODM_WIN: -+ odm_TXPowerTrackingCheckMP(pDM_Odm); -+ break; -+ -+ case ODM_CE: -+ odm_TXPowerTrackingCheckCE(pDM_Odm); -+ break; -+ -+ case ODM_AP: -+ odm_TXPowerTrackingCheckAP(pDM_Odm); -+ break; -+ default: -+ break; -+ } -+ -+} -+ -+VOID -+odm_TXPowerTrackingCheckCE( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ #if(RTL8188E_SUPPORT==1) -+ -+ //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) -+ if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) -+ { -+ return; -+ } -+ -+ if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec -+ { -+ //pHalData->TxPowerCheckCnt++; //cosa add for debug -+ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); -+ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); -+ -+ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; -+ return; -+ -+ } -+ else -+ { -+ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); -+ odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); -+ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; -+ } -+ #endif -+ -+#endif -+} -+ -+VOID -+odm_TXPowerTrackingCheckMP( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ if (ODM_CheckPowerStatus(Adapter) == FALSE) -+ return; -+ -+ if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) -+ odm_TXPowerTrackingThermalMeterCheck(Adapter); -+#endif -+ -+} -+ -+ -+VOID -+odm_TXPowerTrackingCheckAP( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ -+#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1)) -+ if (pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8812|ODM_RTL8881A|ODM_RTL8814A)) -+ ODM_TXPowerTrackingCallback_ThermalMeter(pDM_Odm); -+ else -+#endif -+ { -+ } -+#endif -+ -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+odm_TXPowerTrackingThermalMeterCheck( -+ IN PADAPTER Adapter -+ ) -+{ -+#ifndef AP_BUILD_WORKAROUND -+#if (HAL_CODE_BASE==RTL8192_C) -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ static u1Byte TM_Trigger = 0; -+ //u1Byte TxPowerCheckCnt = 5; //10 sec -+ -+ if(!pMgntInfo->bTXPowerTracking /*|| (!pHalData->TxPowerTrackControl && pHalData->bAPKdone)*/) -+ { -+ return; -+ } -+ -+ if(!TM_Trigger) //at least delay 1 sec -+ { -+ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_8812(Adapter)) -+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); -+ else -+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger 92C Thermal Meter!!\n")); -+ -+ TM_Trigger = 1; -+ return; -+ } -+ else -+ { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); -+ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. -+ TM_Trigger = 0; -+ } -+#endif -+#endif -+} -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if !defined(_OUTSRC_COEXIST) ++//============================================================ ++// Global var ++//============================================================ ++ ++ ++u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE_92D] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { ++{0x16, 0x15, 0x13, 0x10, 0xD, 0x9, 0x6, 0x3, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 0 -16dB */ ++{0x18, 0x17, 0x15, 0x12, 0xE, 0xA, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 1 -15.5dB */ ++{0x1B, 0x1A, 0x18, 0x14, 0x10, 0xB, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 2 -15dB */ ++{0x1F, 0x1E, 0x1B, 0x17, 0x12, 0xD, 0x8, 0x5, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 3 -14.5dB */ ++{0x22, 0x21, 0x1E, 0x19, 0x14, 0xE, 0x9, 0x5, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 4 -14dB */ ++{0x26, 0x25, 0x22, 0x1C, 0x16, 0x10, 0xA, 0x6, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 5 -13.5dB */ ++{0x2B, 0x2A, 0x26, 0x20, 0x19, 0x12, 0xC, 0x7, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 6 -13dB */ ++{0x30, 0x2F, 0x2A, 0x24, 0x1C, 0x14, 0xD, 0x8, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 7 -12.5dB */ ++{0x36, 0x34, 0x2F, 0x28, 0x1F, 0x17, 0xF, 0x9, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 8 -12dB */ ++{0x3D, 0x3B, 0x35, 0x2D, 0x23, 0x19, 0x11, 0xA, 0x5, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 9 -11.5dB */ ++{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0xB, 0x5, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 10 -11dB */ ++{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0xC, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 11 -10.5dB */ ++{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0xE, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 12 -10dB */ ++{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0xF, 0x7, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 13 -9.5dB */ ++{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x8, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 14 -9dB */ ++{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x9, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 15 -8.5dB */ ++{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0xA, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 16 -8dB */ ++{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0xB, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 17 -7.5dB */ ++{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0xD, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 18 -7dB */ ++{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0xE, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 19 -6.5dB */ ++{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0} /* 20 -6dB */ ++}; ++ ++ ++#if 0 ++u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E] = { ++ /* Index0 6 dB */ 0x7fc001ff, ++ /* Index1 5.7dB */ 0x7b4001ed, ++ /* Index2 5.4dB */ 0x774001dd, ++ /* Index3 5.1dB */ 0x734001cd, ++ /* Index4 4.8dB */ 0x6f4001bd, ++ /* Index5 4.5dB */ 0x6b8001ae, ++ /* Index6 4.2dB */ 0x67c0019f, ++ /* Index7 3.9dB */ 0x64400191, ++ /* Index8 3.6dB */ 0x60c00183, ++ /* Index9 3.3dB */ 0x5d800176, ++ /* Index10 3 dB */ 0x5a80016a, ++ /* Index11 2.7dB */ 0x5740015d, ++ /* Index12 2.4dB */ 0x54400151, ++ /* Index13 2.1dB */ 0x51800146, ++ /* Index14 1.8dB */ 0x4ec0013b, ++ /* Index15 1.5dB */ 0x4c000130, ++ /* Index16 1.2dB */ 0x49800126, ++ /* Index17 0.9dB */ 0x4700011c, ++ /* Index18 0.6dB */ 0x44800112, ++ /* Index19 0.3dB */ 0x42000108, ++ /* Index20 0 dB */ 0x40000100, // 20 This is OFDM base index ++ /* Index21 -0.3dB */ 0x3dc000f7, ++ /* Index22 -0.6dB */ 0x3bc000ef, ++ /* Index23 -0.9dB */ 0x39c000e7, ++ /* Index24 -1.2dB */ 0x37c000df, ++ /* Index25 -1.5dB */ 0x35c000d7, ++ /* Index26 -1.8dB */ 0x340000d0, ++ /* Index27 -2.1dB */ 0x324000c9, ++ /* Index28 -2.4dB */ 0x308000c2, ++ /* Index29 -2.7dB */ 0x2f0000bc, ++ /* Index30 -3 dB */ 0x2d4000b5, ++ /* Index31 -3.3dB */ 0x2bc000af, ++ /* Index32 -3.6dB */ 0x2a4000a9, ++ /* Index33 -3.9dB */ 0x28c000a3, ++ /* Index34 -4.2dB */ 0x2780009e, ++ /* Index35 -4.5dB */ 0x26000098, ++ /* Index36 -4.8dB */ 0x24c00093, ++ /* Index37 -5.1dB */ 0x2380008e, ++ /* Index38 -5.4dB */ 0x22400089, ++ /* Index39 -5.7dB */ 0x21400085, ++ /* Index40 -6 dB */ 0x20000080, ++ /* Index41 -6.3dB */ 0x1f00007c, ++ /* Index42 -6.6dB */ 0x1e000078, ++ /* Index43 -6.9dB */ 0x1d000074, ++ /* Index44 -7.2dB */ 0x1c000070, ++ /* Index45 -7.5dB */ 0x1b00006c, ++ /* Index46 -7.8dB */ 0x1a000068, ++ /* Index47 -8.1dB */ 0x19400065, ++ /* Index48 -8.4dB */ 0x18400061, ++ /* Index49 -8.7dB */ 0x1780005e, ++ /* Index50 -9 dB */ 0x16c0005b, ++ /* Index51 -9.3dB */ 0x16000058, ++ /* Index52 -9.6dB */ 0x15400055, ++ /* Index53 -9.9dB */ 0x14800052 ++}; ++u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x1C , 0x12 , 0x08 , 0x04}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x1B , 0x11 , 0x08 , 0x04}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x1A , 0x11 , 0x07 , 0x04}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x19 , 0x10 , 0x07 , 0x04}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x18 , 0x10 , 0x07 , 0x03}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x18 , 0x0F , 0x07 , 0x03}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x17 , 0x0F , 0x06 , 0x03}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x16 , 0x0E , 0x06 , 0x03}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x15 , 0x0E , 0x06 , 0x03}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x13 , 0x0C , 0x05 , 0x03}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x12 , 0x0C , 0x05 , 0x03}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x12 , 0x0B , 0x05 , 0x03}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x10 , 0x0A , 0x05 , 0x02}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x10 , 0x0A , 0x04 , 0x02}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x0F , 0x0A , 0x04 , 0x02}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index20 -6.0dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x0E , 0x09 , 0x04 , 0x02}, // 20 This is CCK base index ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x0A , 0x07 , 0x03 , 0x01}, ++ /* Index30 -9.0dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, // 30 This is hp CCK base index ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x09 , 0x06 , 0x02 , 0x01}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x05 , 0x03 , 0x02 , 0x01}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x04 , 0x03 , 0x01 , 0x01} ++}; ++u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index20 -6 dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index30 -9 dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00} ++}; ++#endif ++ ++#ifdef AP_BUILD_WORKAROUND ++ ++unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { ++ /* +6.0dB */ 0x7f8001fe, ++ /* +5.5dB */ 0x788001e2, ++ /* +5.0dB */ 0x71c001c7, ++ /* +4.5dB */ 0x6b8001ae, ++ /* +4.0dB */ 0x65400195, ++ /* +3.5dB */ 0x5fc0017f, ++ /* +3.0dB */ 0x5a400169, ++ /* +2.5dB */ 0x55400155, ++ /* +2.0dB */ 0x50800142, ++ /* +1.5dB */ 0x4c000130, ++ /* +1.0dB */ 0x47c0011f, ++ /* +0.5dB */ 0x43c0010f, ++ /* 0.0dB */ 0x40000100, ++ /* -0.5dB */ 0x3c8000f2, ++ /* -1.0dB */ 0x390000e4, ++ /* -1.5dB */ 0x35c000d7, ++ /* -2.0dB */ 0x32c000cb, ++ /* -2.5dB */ 0x300000c0, ++ /* -3.0dB */ 0x2d4000b5, ++ /* -3.5dB */ 0x2ac000ab, ++ /* -4.0dB */ 0x288000a2, ++ /* -4.5dB */ 0x26000098, ++ /* -5.0dB */ 0x24000090, ++ /* -5.5dB */ 0x22000088, ++ /* -6.0dB */ 0x20000080, ++ /* -6.5dB */ 0x1a00006c, ++ /* -7.0dB */ 0x1c800072, ++ /* -7.5dB */ 0x18000060, ++ /* -8.0dB */ 0x19800066, ++ /* -8.5dB */ 0x15800056, ++ /* -9.0dB */ 0x26c0005b, ++ /* -9.5dB */ 0x14400051, ++ /* -10.0dB */ 0x24400051, ++ /* -10.5dB */ 0x1300004c, ++ /* -11.0dB */ 0x12000048, ++ /* -11.5dB */ 0x11000044, ++ /* -12.0dB */ 0x10000040 ++}; ++#endif ++ ++#endif ++ ++ ++u1Byte DeltaSwingTableIdx_2GA_P_DEFAULT[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3 ++, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; ++u1Byte DeltaSwingTableIdx_2GA_N_DEFAULT[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4 ++, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; ++ ++ ++#ifdef CONFIG_WLAN_HAL_8192EE ++u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E] = { ++ /* Index0 6 dB */ 0x7fc001ff, ++ /* Index1 5.7dB */ 0x7b4001ed, ++ /* Index2 5.4dB */ 0x774001dd, ++ /* Index3 5.1dB */ 0x734001cd, ++ /* Index4 4.8dB */ 0x6f4001bd, ++ /* Index5 4.5dB */ 0x6b8001ae, ++ /* Index6 4.2dB */ 0x67c0019f, ++ /* Index7 3.9dB */ 0x64400191, ++ /* Index8 3.6dB */ 0x60c00183, ++ /* Index9 3.3dB */ 0x5d800176, ++ /* Index10 3 dB */ 0x5a80016a, ++ /* Index11 2.7dB */ 0x5740015d, ++ /* Index12 2.4dB */ 0x54400151, ++ /* Index13 2.1dB */ 0x51800146, ++ /* Index14 1.8dB */ 0x4ec0013b, ++ /* Index15 1.5dB */ 0x4c000130, ++ /* Index16 1.2dB */ 0x49800126, ++ /* Index17 0.9dB */ 0x4700011c, ++ /* Index18 0.6dB */ 0x44800112, ++ /* Index19 0.3dB */ 0x42000108, ++ /* Index20 0 dB */ 0x40000100, // 20 This is OFDM base index ++ /* Index21 -0.3dB */ 0x3dc000f7, ++ /* Index22 -0.6dB */ 0x3bc000ef, ++ /* Index23 -0.9dB */ 0x39c000e7, ++ /* Index24 -1.2dB */ 0x37c000df, ++ /* Index25 -1.5dB */ 0x35c000d7, ++ /* Index26 -1.8dB */ 0x340000d0, ++ /* Index27 -2.1dB */ 0x324000c9, ++ /* Index28 -2.4dB */ 0x308000c2, ++ /* Index29 -2.7dB */ 0x2f0000bc, ++ /* Index30 -3 dB */ 0x2d4000b5, ++ /* Index31 -3.3dB */ 0x2bc000af, ++ /* Index32 -3.6dB */ 0x2a4000a9, ++ /* Index33 -3.9dB */ 0x28c000a3, ++ /* Index34 -4.2dB */ 0x2780009e, ++ /* Index35 -4.5dB */ 0x26000098, ++ /* Index36 -4.8dB */ 0x24c00093, ++ /* Index37 -5.1dB */ 0x2380008e, ++ /* Index38 -5.4dB */ 0x22400089, ++ /* Index39 -5.7dB */ 0x21400085, ++ /* Index40 -6 dB */ 0x20000080, ++ /* Index41 -6.3dB */ 0x1f00007c, ++ /* Index42 -6.6dB */ 0x1e000078, ++ /* Index43 -6.9dB */ 0x1d000074, ++ /* Index44 -7.2dB */ 0x1c000070, ++ /* Index45 -7.5dB */ 0x1b00006c, ++ /* Index46 -7.8dB */ 0x1a000068, ++ /* Index47 -8.1dB */ 0x19400065, ++ /* Index48 -8.4dB */ 0x18400061, ++ /* Index49 -8.7dB */ 0x1780005e, ++ /* Index50 -9 dB */ 0x16c0005b, ++ /* Index51 -9.3dB */ 0x16000058, ++ /* Index52 -9.6dB */ 0x15400055, ++ /* Index53 -9.9dB */ 0x14800052 ++}; ++u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x1C , 0x12 , 0x08 , 0x04}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x1B , 0x11 , 0x08 , 0x04}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x1A , 0x11 , 0x07 , 0x04}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x19 , 0x10 , 0x07 , 0x04}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x18 , 0x10 , 0x07 , 0x03}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x18 , 0x0F , 0x07 , 0x03}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x17 , 0x0F , 0x06 , 0x03}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x16 , 0x0E , 0x06 , 0x03}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x15 , 0x0E , 0x06 , 0x03}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x13 , 0x0C , 0x05 , 0x03}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x12 , 0x0C , 0x05 , 0x03}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x12 , 0x0B , 0x05 , 0x03}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x10 , 0x0A , 0x05 , 0x02}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x10 , 0x0A , 0x04 , 0x02}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x0F , 0x0A , 0x04 , 0x02}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index20 -6.0dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x0E , 0x09 , 0x04 , 0x02}, // 20 This is CCK base index ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x0A , 0x07 , 0x03 , 0x01}, ++ /* Index30 -9.0dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, // 30 This is hp CCK base index ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x09 , 0x06 , 0x02 , 0x01}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x05 , 0x03 , 0x02 , 0x01}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x04 , 0x03 , 0x01 , 0x01} ++}; ++u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index20 -6 dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index30 -9 dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00} ++}; ++#endif ++ ++#if(RTL8814A_SUPPORT == 1) ++u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = ++{ ++ 0x081, // 0, -12.0dB ++ 0x088, // 1, -11.5dB ++ 0x090, // 2, -11.0dB ++ 0x099, // 3, -10.5dB ++ 0x0A2, // 4, -10.0dB ++ 0x0AC, // 5, -9.5dB ++ 0x0B6, // 6, -9.0dB ++ 0x0C0, // 7, -8.5dB ++ 0x0CC, // 8, -8.0dB ++ 0x0D8, // 9, -7.5dB ++ 0x0E5, // 10, -7.0dB ++ 0x0F2, // 11, -6.5dB ++ 0x101, // 12, -6.0dB ++ 0x110, // 13, -5.5dB ++ 0x120, // 14, -5.0dB ++ 0x131, // 15, -4.5dB ++ 0x143, // 16, -4.0dB ++ 0x156, // 17, -3.5dB ++ 0x16A, // 18, -3.0dB ++ 0x180, // 19, -2.5dB ++ 0x197, // 20, -2.0dB ++ 0x1AF, // 21, -1.5dB ++ 0x1C8, // 22, -1.0dB ++ 0x1E3, // 23, -0.5dB ++ 0x200, // 24, +0 dB ++ 0x21E, // 25, +0.5dB ++ 0x23E, // 26, +1.0dB ++ 0x261, // 27, +1.5dB ++ 0x285, // 28, +2.0dB ++ 0x2AB, // 29, +2.5dB ++ 0x2D3, // 30, +3.0dB ++ 0x2FE, // 31, +3.5dB ++ 0x32B, // 32, +4.0dB ++ 0x35C, // 33, +4.5dB ++ 0x38E, // 34, +5.0dB ++ 0x3C4, // 35, +5.5dB ++ 0x3FE // 36, +6.0dB ++}; ++#elif(ODM_IC_11AC_SERIES_SUPPORT) ++u4Byte OFDMSwingTable_8812[OFDM_TABLE_SIZE_8812] = { ++ 0x3FE, // 0, (6dB) ++ 0x3C4, // 1, (5.5dB) ++ 0x38E, // 2, (5dB) ++ 0x35C, // 3, (4.5dB) ++ 0x32B, // 4, (4dB) ++ 0x2FE, // 5, (3.5dB) ++ 0x2D3, // 6, (3dB) ++ 0x2AB, // 7, (2.5dB) ++ 0x285, // 8, (2dB) ++ 0x261, // 9, (1.5dB ++ 0x23E, // 10, (1dB) ++ 0x21E, // 11, (0.5dB) ++ 0x200, // 12, (0dB) 8814 int PA 2G default ++ 0x1E3, // 13, (-0.5dB) ++ 0x1C8, // 14, (-1dB) ++ 0x1AF, // 15, (-1.5dB) ++ 0x197, // 16, (-2dB) ++ 0x180, // 17, (-2.5dB) ++ 0x16A, // 18, (-3dB) 8812 / 8814 int PA 5G / 8814 ext PA 2G5G default ++ 0x156, // 19, (-3.5dB) ++ 0x143, // 20, (-4dB) 8812 HP default ++ 0x131, // 21, (-4.5dB) ++ 0x120, // 22, (-5dB) ++ 0x110, // 23, (-5.5dB) ++ 0x101, // 24, (-6dB) ++ 0x0F2, // 25, (-6.5dB) ++ 0x0E5, // 26, (-7dB) ++ 0x0D8, // 27, (-7.5dB) ++ 0x0CC, // 28, (-8dB) ++ 0x0C0, // 29, (-8.5dB) ++ 0x0B6, // 30, (-9dB) ++ 0x0AC, // 31, (-9.5dB) ++ 0x0A2, // 32, (-10dB) ++ 0x099, // 33, (-10.5dB) ++ 0x090, // 34, (-11dB) ++ 0x088, // 35, (-11.5dB) ++ 0x081, // 36, (-12dB) ++ 0x079, // 37, (-12.5dB) ++ 0x072, // 38, (-13dB) ++ 0x06c, // 39, (-13.5dB) ++ 0x066, // 40, (-14dB) ++ 0x060, // 41, (-14.5dB) ++ 0x05B // 42, (-15dB) ++}; ++#endif ++ ++//#endif ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) ++ return; ++#endif ++ ++ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); ++} ++ ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u1Byte p; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pMgntInfo->bTXPowerTracking = TRUE; ++ pHalData->TXPowercount = 0; ++ pHalData->bTXPowerTrackingInit = FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pHalData->TxPowerTrackControl = TRUE; ++ ODM_RT_TRACE(pDM_Odm,COMP_POWER_TRACKING, DBG_LOUD, ("pMgntInfo->bTXPowerTracking = %d\n", pMgntInfo->bTXPowerTracking)); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #ifdef CONFIG_RTL8188E ++ { ++ pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; ++ ++ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); ++ } ++ #else ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ //if(IS_HARDWARE_TYPE_8192C(pHalData)) ++ { ++ pdmpriv->bTXPowerTracking = _TRUE; ++ pdmpriv->TXPowercount = 0; ++ pdmpriv->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) //for mp driver, turn off txpwrtracking as default ++ pdmpriv->TxPowerTrackControl = _TRUE; ++ ++ } ++ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); ++ ++ } ++ #endif//endif (CONFIG_RTL8188E==1) ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ ++ #ifdef RTL8188E_SUPPORT ++ { ++ pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; ++ } ++ #endif ++#endif ++ ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = 0; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = 0; ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; ++ pDM_Odm->RFCalibrateInfo.ThermalValue = 0; ++ pRFCalibrateInfo->DefaultOfdmIndex = 28; ++ ++ ++#if RTL8188E_SUPPORT ++ pRFCalibrateInfo->DefaultCckIndex = 20; // -6 dB ++#elif RTL8192E_SUPPORT ++ pRFCalibrateInfo->DefaultCckIndex = 8; // -12 dB ++#endif ++ pRFCalibrateInfo->BbSwingIdxOfdmBase = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->DefaultCckIndex; ++ for(p = 0; p < MAX_RF_PATH; p++) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; // for 8814 kfree ++ } ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; ++ ++} ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ++ ++ if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ return; ++ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ odm_TXPowerTrackingCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_TXPowerTrackingCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_TXPowerTrackingCheckAP(pDM_Odm); ++ break; ++ default: ++ break; ++ } ++ ++} ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ #if(RTL8188E_SUPPORT==1) ++ ++ //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ return; ++ } ++ ++ if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec ++ { ++ //pHalData->TxPowerCheckCnt++; //cosa add for debug ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); ++ ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; ++ return; ++ ++ } ++ else ++ { ++ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); ++ odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; ++ } ++ #endif ++ ++#endif ++} ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (ODM_CheckPowerStatus(Adapter) == FALSE) ++ return; ++ ++ if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) ++ odm_TXPowerTrackingThermalMeterCheck(Adapter); ++#endif ++ ++} ++ ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8812|ODM_RTL8881A|ODM_RTL8814A)) ++ ODM_TXPowerTrackingCallback_ThermalMeter(pDM_Odm); ++ else ++#endif ++ { ++ } ++#endif ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifndef AP_BUILD_WORKAROUND ++#if (HAL_CODE_BASE==RTL8192_C) ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ static u1Byte TM_Trigger = 0; ++ //u1Byte TxPowerCheckCnt = 5; //10 sec ++ ++ if(!pMgntInfo->bTXPowerTracking /*|| (!pHalData->TxPowerTrackControl && pHalData->bAPKdone)*/) ++ { ++ return; ++ } ++ ++ if(!TM_Trigger) //at least delay 1 sec ++ { ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_8812(Adapter)) ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); ++ else ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger 92C Thermal Meter!!\n")); ++ ++ TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); ++ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ TM_Trigger = 0; ++ } ++#endif ++#endif ++} ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ap.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ap.h new file mode 100644 -index 000000000..8c7c2867e +index 0000000..264b529 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ap.h @@ -0,0 +1,314 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMPOWERTRACKING_H__ -+#define __PHYDMPOWERTRACKING_H__ -+ -+#define POWRTRACKING_VERSION "1.1" -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#ifdef RTK_AC_SUPPORT -+#define ODM_IC_11AC_SERIES_SUPPORT 1 -+#else -+#define ODM_IC_11AC_SERIES_SUPPORT 0 -+#endif -+#else -+#define ODM_IC_11AC_SERIES_SUPPORT 1 -+#endif -+ -+#define DPK_DELTA_MAPPING_NUM 13 -+#define index_mapping_HP_NUM 15 -+#define DELTA_SWINGIDX_SIZE 30 -+#define BAND_NUM 3 -+#define MAX_RF_PATH 4 -+#define TXSCALE_TABLE_SIZE 37 -+#define IQK_MAC_REG_NUM 4 -+#define IQK_ADDA_REG_NUM 16 -+#define IQK_BB_REG_NUM_MAX 10 -+ -+#define IQK_BB_REG_NUM 9 -+ -+#define HP_THERMAL_NUM 8 -+ -+#define AVG_THERMAL_NUM 8 -+#define IQK_Matrix_REG_NUM 8 -+//#define IQK_Matrix_Settings_NUM 1+24+21 -+#define IQK_Matrix_Settings_NUM (14+24+21) // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G -+ -+#if !defined(_OUTSRC_COEXIST) -+#define OFDM_TABLE_SIZE_92D 43 -+#define OFDM_TABLE_SIZE 37 -+#define CCK_TABLE_SIZE 33 -+#define CCK_TABLE_SIZE_88F 21 -+ -+ -+ -+//#define OFDM_TABLE_SIZE_92E 54 -+//#define CCK_TABLE_SIZE_92E 54 -+extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D]; -+extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; -+ -+ -+extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE_92D]; -+extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; -+ -+#endif -+ -+#define ODM_OFDM_TABLE_SIZE 37 -+#define ODM_CCK_TABLE_SIZE 33 -+// <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. -+extern u1Byte DeltaSwingTableIdx_2GA_P_DEFAULT[DELTA_SWINGIDX_SIZE]; -+extern u1Byte DeltaSwingTableIdx_2GA_N_DEFAULT[DELTA_SWINGIDX_SIZE]; -+ -+ -+//extern u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E]; -+//extern u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8]; -+//extern u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8]; -+ -+#ifdef CONFIG_WLAN_HAL_8192EE -+#define OFDM_TABLE_SIZE_92E 54 -+#define CCK_TABLE_SIZE_92E 54 -+extern u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E]; -+extern u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8]; -+extern u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8]; -+#endif -+ -+#define OFDM_TABLE_SIZE_8812 43 -+#define AVG_THERMAL_NUM_8812 4 -+ -+#if(RTL8814A_SUPPORT == 1) -+extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; -+#elif(ODM_IC_11AC_SERIES_SUPPORT) -+extern unsigned int OFDMSwingTable_8812[OFDM_TABLE_SIZE_8812]; -+#endif -+ -+#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck -+ -+typedef struct _IQK_MATRIX_REGS_SETTING{ -+ BOOLEAN bIQKDone; -+ s4Byte Value[1][IQK_Matrix_REG_NUM]; -+}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; -+ -+typedef struct ODM_RF_Calibration_Structure -+{ -+ //for tx power tracking -+ -+ u4Byte RegA24; // for TempCCK -+ s4Byte RegE94; -+ s4Byte RegE9C; -+ s4Byte RegEB4; -+ s4Byte RegEBC; -+ -+ //u1Byte bTXPowerTracking; -+ u1Byte TXPowercount; -+ BOOLEAN bTXPowerTrackingInit; -+ BOOLEAN bTXPowerTracking; -+ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default -+ u1Byte TM_Trigger; -+ u1Byte InternalPA5G[2]; //pathA / pathB -+ -+ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 -+ u1Byte ThermalValue; -+ u1Byte ThermalValue_LCK; -+ u1Byte ThermalValue_IQK; -+ u1Byte ThermalValue_DPK; -+ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; -+ u1Byte ThermalValue_AVG_index; -+ u1Byte ThermalValue_RxGain; -+ u1Byte ThermalValue_Crystal; -+ u1Byte ThermalValue_DPKstore; -+ u1Byte ThermalValue_DPKtrack; -+ BOOLEAN TxPowerTrackingInProgress; -+ BOOLEAN bDPKenable; -+ -+ BOOLEAN bReloadtxpowerindex; -+ u1Byte bRfPiEnable; -+ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug -+ -+ u1Byte bCCKinCH14; -+ u1Byte CCK_index; -+ u1Byte OFDM_index[MAX_RF_PATH]; -+ s1Byte PowerIndexOffset; -+ s1Byte DeltaPowerIndex; -+ s1Byte DeltaPowerIndexLast; -+ BOOLEAN bTxPowerChanged; -+ -+ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; -+ u1Byte ThermalValue_HP_index; -+ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; -+ BOOLEAN bNeedIQK; -+ u1Byte Delta_IQK; -+ u1Byte Delta_LCK; -+ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; -+ -+ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; -+ u1Byte BbSwingIdxOfdmCurrent; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; -+#else -+ u1Byte BbSwingIdxOfdmBase; -+#endif -+ BOOLEAN BbSwingFlagOfdm; -+ u1Byte BbSwingIdxCck; -+ u1Byte BbSwingIdxCckCurrent; -+ u1Byte BbSwingIdxCckBase; -+ u1Byte DefaultOfdmIndex; -+ u1Byte DefaultCckIndex; -+ BOOLEAN BbSwingFlagCck; -+ -+ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; -+ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; -+ s1Byte Remnant_CCKSwingIdx; -+ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ -+ BOOLEAN Modify_TxAGC_Flag_PathA; -+ BOOLEAN Modify_TxAGC_Flag_PathB; -+ BOOLEAN Modify_TxAGC_Flag_PathC; -+ BOOLEAN Modify_TxAGC_Flag_PathD; -+ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; -+ -+ s1Byte KfreeOffset[MAX_RF_PATH]; -+ -+ //--------------------------------------------------------------------// -+ -+ //for IQK -+ u4Byte RegC04; -+ u4Byte Reg874; -+ u4Byte RegC08; -+ u4Byte RegB68; -+ u4Byte RegB6C; -+ u4Byte Reg870; -+ u4Byte Reg860; -+ u4Byte Reg864; -+ -+ BOOLEAN bIQKInitialized; -+ BOOLEAN bLCKInProgress; -+ BOOLEAN bAntennaDetected; -+ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; -+ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; -+ u4Byte IQK_BB_backup_recover[9]; -+ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; -+ -+ //for APK -+ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a -+ u1Byte bAPKdone; -+ u1Byte bAPKThermalMeterIgnore; -+ u1Byte bDPdone; -+ u1Byte bDPPathAOK; -+ u1Byte bDPPathBOK; -+ -+ /*Add by Yuchen for Kfree Phydm*/ -+ u1Byte RegRfKFreeEnable; /*for registry*/ -+ u1Byte RfKFreeEnable; /*for efuse enable check*/ -+ -+}ODM_RF_CAL_T,*PODM_RF_CAL_T; -+ -+VOID -+odm_TXPowerTrackingCheckAP( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+ODM_TXPowerTrackingCheck( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+VOID -+odm_TXPowerTrackingThermalMeterInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingCheckMP( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+VOID -+odm_TXPowerTrackingCheckCE( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+VOID -+odm_TXPowerTrackingCallbackThermalMeter92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingCallbackRXGainThermalMeter92D( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingCallbackThermalMeter92D( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingDirectCall92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingThermalMeterCheck( -+ IN PADAPTER Adapter -+ ); -+ -+#endif -+ -+ -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPOWERTRACKING_H__ ++#define __PHYDMPOWERTRACKING_H__ ++ ++#define POWRTRACKING_VERSION "1.1" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#ifdef RTK_AC_SUPPORT ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#else ++#define ODM_IC_11AC_SERIES_SUPPORT 0 ++#endif ++#else ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#endif ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++#define DELTA_SWINGIDX_SIZE 30 ++#define BAND_NUM 3 ++#define MAX_RF_PATH 4 ++#define TXSCALE_TABLE_SIZE 37 ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM_MAX 10 ++ ++#define IQK_BB_REG_NUM 9 ++ ++#define HP_THERMAL_NUM 8 ++ ++#define AVG_THERMAL_NUM 8 ++#define IQK_Matrix_REG_NUM 8 ++//#define IQK_Matrix_Settings_NUM 1+24+21 ++#define IQK_Matrix_Settings_NUM (14+24+21) // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G ++ ++#if !defined(_OUTSRC_COEXIST) ++#define OFDM_TABLE_SIZE_92D 43 ++#define OFDM_TABLE_SIZE 37 ++#define CCK_TABLE_SIZE 33 ++#define CCK_TABLE_SIZE_88F 21 ++ ++ ++ ++//#define OFDM_TABLE_SIZE_92E 54 ++//#define CCK_TABLE_SIZE_92E 54 ++extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D]; ++extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++ ++extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE_92D]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; ++ ++#endif ++ ++#define ODM_OFDM_TABLE_SIZE 37 ++#define ODM_CCK_TABLE_SIZE 33 ++// <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. ++extern u1Byte DeltaSwingTableIdx_2GA_P_DEFAULT[DELTA_SWINGIDX_SIZE]; ++extern u1Byte DeltaSwingTableIdx_2GA_N_DEFAULT[DELTA_SWINGIDX_SIZE]; ++ ++ ++//extern u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E]; ++//extern u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8]; ++//extern u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8]; ++ ++#ifdef CONFIG_WLAN_HAL_8192EE ++#define OFDM_TABLE_SIZE_92E 54 ++#define CCK_TABLE_SIZE_92E 54 ++extern u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8]; ++extern u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8]; ++#endif ++ ++#define OFDM_TABLE_SIZE_8812 43 ++#define AVG_THERMAL_NUM_8812 4 ++ ++#if(RTL8814A_SUPPORT == 1) ++extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; ++#elif(ODM_IC_11AC_SERIES_SUPPORT) ++extern unsigned int OFDMSwingTable_8812[OFDM_TABLE_SIZE_8812]; ++#endif ++ ++#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck ++ ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++ s4Byte Value[1][IQK_Matrix_REG_NUM]; ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++typedef struct ODM_RF_Calibration_Structure ++{ ++ //for tx power tracking ++ ++ u4Byte RegA24; // for TempCCK ++ s4Byte RegE94; ++ s4Byte RegE9C; ++ s4Byte RegEB4; ++ s4Byte RegEBC; ++ ++ //u1Byte bTXPowerTracking; ++ u1Byte TXPowercount; ++ BOOLEAN bTXPowerTrackingInit; ++ BOOLEAN bTXPowerTracking; ++ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u1Byte TM_Trigger; ++ u1Byte InternalPA5G[2]; //pathA / pathB ++ ++ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u1Byte ThermalValue; ++ u1Byte ThermalValue_LCK; ++ u1Byte ThermalValue_IQK; ++ u1Byte ThermalValue_DPK; ++ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u1Byte ThermalValue_AVG_index; ++ u1Byte ThermalValue_RxGain; ++ u1Byte ThermalValue_Crystal; ++ u1Byte ThermalValue_DPKstore; ++ u1Byte ThermalValue_DPKtrack; ++ BOOLEAN TxPowerTrackingInProgress; ++ BOOLEAN bDPKenable; ++ ++ BOOLEAN bReloadtxpowerindex; ++ u1Byte bRfPiEnable; ++ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ u1Byte bCCKinCH14; ++ u1Byte CCK_index; ++ u1Byte OFDM_index[MAX_RF_PATH]; ++ s1Byte PowerIndexOffset; ++ s1Byte DeltaPowerIndex; ++ s1Byte DeltaPowerIndexLast; ++ BOOLEAN bTxPowerChanged; ++ ++ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; ++ u1Byte ThermalValue_HP_index; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++ BOOLEAN bNeedIQK; ++ u1Byte Delta_IQK; ++ u1Byte Delta_LCK; ++ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; ++ ++ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; ++ u1Byte BbSwingIdxOfdmCurrent; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; ++#else ++ u1Byte BbSwingIdxOfdmBase; ++#endif ++ BOOLEAN BbSwingFlagOfdm; ++ u1Byte BbSwingIdxCck; ++ u1Byte BbSwingIdxCckCurrent; ++ u1Byte BbSwingIdxCckBase; ++ u1Byte DefaultOfdmIndex; ++ u1Byte DefaultCckIndex; ++ BOOLEAN BbSwingFlagCck; ++ ++ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_CCKSwingIdx; ++ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ ++ BOOLEAN Modify_TxAGC_Flag_PathA; ++ BOOLEAN Modify_TxAGC_Flag_PathB; ++ BOOLEAN Modify_TxAGC_Flag_PathC; ++ BOOLEAN Modify_TxAGC_Flag_PathD; ++ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; ++ ++ s1Byte KfreeOffset[MAX_RF_PATH]; ++ ++ //--------------------------------------------------------------------// ++ ++ //for IQK ++ u4Byte RegC04; ++ u4Byte Reg874; ++ u4Byte RegC08; ++ u4Byte RegB68; ++ u4Byte RegB6C; ++ u4Byte Reg870; ++ u4Byte Reg860; ++ u4Byte Reg864; ++ ++ BOOLEAN bIQKInitialized; ++ BOOLEAN bLCKInProgress; ++ BOOLEAN bAntennaDetected; ++ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; ++ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte IQK_BB_backup_recover[9]; ++ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; ++ ++ //for APK ++ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u1Byte bAPKdone; ++ u1Byte bAPKThermalMeterIgnore; ++ u1Byte bDPdone; ++ u1Byte bDPPathAOK; ++ u1Byte bDPPathBOK; ++ ++ /*Add by Yuchen for Kfree Phydm*/ ++ u1Byte RegRfKFreeEnable; /*for registry*/ ++ u1Byte RfKFreeEnable; /*for efuse enable check*/ ++ ++}ODM_RF_CAL_T,*PODM_RF_CAL_T; ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackRXGainThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingDirectCall92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ); ++ ++#endif ++ ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ce.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ce.c new file mode 100644 -index 000000000..b8fe78407 +index 0000000..b97d664 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ce.c @@ -0,0 +1,670 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+/*============================================================ */ -+/* include files */ -+/*============================================================ */ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+//============================================================ -+// Global var -+//============================================================ -+ -+u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = { -+ 0x7f8001fe, // 0, +6.0dB -+ 0x788001e2, // 1, +5.5dB -+ 0x71c001c7, // 2, +5.0dB -+ 0x6b8001ae, // 3, +4.5dB -+ 0x65400195, // 4, +4.0dB -+ 0x5fc0017f, // 5, +3.5dB -+ 0x5a400169, // 6, +3.0dB -+ 0x55400155, // 7, +2.5dB -+ 0x50800142, // 8, +2.0dB -+ 0x4c000130, // 9, +1.5dB -+ 0x47c0011f, // 10, +1.0dB -+ 0x43c0010f, // 11, +0.5dB -+ 0x40000100, // 12, +0dB -+ 0x3c8000f2, // 13, -0.5dB -+ 0x390000e4, // 14, -1.0dB -+ 0x35c000d7, // 15, -1.5dB -+ 0x32c000cb, // 16, -2.0dB -+ 0x300000c0, // 17, -2.5dB -+ 0x2d4000b5, // 18, -3.0dB -+ 0x2ac000ab, // 19, -3.5dB -+ 0x288000a2, // 20, -4.0dB -+ 0x26000098, // 21, -4.5dB -+ 0x24000090, // 22, -5.0dB -+ 0x22000088, // 23, -5.5dB -+ 0x20000080, // 24, -6.0dB -+ 0x1e400079, // 25, -6.5dB -+ 0x1c800072, // 26, -7.0dB -+ 0x1b00006c, // 27. -7.5dB -+ 0x19800066, // 28, -8.0dB -+ 0x18000060, // 29, -8.5dB -+ 0x16c0005b, // 30, -9.0dB -+ 0x15800056, // 31, -9.5dB -+ 0x14400051, // 32, -10.0dB -+ 0x1300004c, // 33, -10.5dB -+ 0x12000048, // 34, -11.0dB -+ 0x11000044, // 35, -11.5dB -+ 0x10000040, // 36, -12.0dB -+}; -+ -+u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB -+}; -+ -+ -+u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = { -+ 0x0b40002d, // 0, -15.0dB -+ 0x0c000030, // 1, -14.5dB -+ 0x0cc00033, // 2, -14.0dB -+ 0x0d800036, // 3, -13.5dB -+ 0x0e400039, // 4, -13.0dB -+ 0x0f00003c, // 5, -12.5dB -+ 0x10000040, // 6, -12.0dB -+ 0x11000044, // 7, -11.5dB -+ 0x12000048, // 8, -11.0dB -+ 0x1300004c, // 9, -10.5dB -+ 0x14400051, // 10, -10.0dB -+ 0x15800056, // 11, -9.5dB -+ 0x16c0005b, // 12, -9.0dB -+ 0x18000060, // 13, -8.5dB -+ 0x19800066, // 14, -8.0dB -+ 0x1b00006c, // 15, -7.5dB -+ 0x1c800072, // 16, -7.0dB -+ 0x1e400079, // 17, -6.5dB -+ 0x20000080, // 18, -6.0dB -+ 0x22000088, // 19, -5.5dB -+ 0x24000090, // 20, -5.0dB -+ 0x26000098, // 21, -4.5dB -+ 0x288000a2, // 22, -4.0dB -+ 0x2ac000ab, // 23, -3.5dB -+ 0x2d4000b5, // 24, -3.0dB -+ 0x300000c0, // 25, -2.5dB -+ 0x32c000cb, // 26, -2.0dB -+ 0x35c000d7, // 27, -1.5dB -+ 0x390000e4, // 28, -1.0dB -+ 0x3c8000f2, // 29, -0.5dB -+ 0x40000100, // 30, +0dB -+ 0x43c0010f, // 31, +0.5dB -+ 0x47c0011f, // 32, +1.0dB -+ 0x4c000130, // 33, +1.5dB -+ 0x50800142, // 34, +2.0dB -+ 0x55400155, // 35, +2.5dB -+ 0x5a400169, // 36, +3.0dB -+ 0x5fc0017f, // 37, +3.5dB -+ 0x65400195, // 38, +4.0dB -+ 0x6b8001ae, // 39, +4.5dB -+ 0x71c001c7, // 40, +5.0dB -+ 0x788001e2, // 41, +5.5dB -+ 0x7f8001fe // 42, +6.0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { -+{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+ -+u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB -+}; -+ -+u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = -+{ -+ 0x081, // 0, -12.0dB -+ 0x088, // 1, -11.5dB -+ 0x090, // 2, -11.0dB -+ 0x099, // 3, -10.5dB -+ 0x0A2, // 4, -10.0dB -+ 0x0AC, // 5, -9.5dB -+ 0x0B6, // 6, -9.0dB -+ 0x0C0, // 7, -8.5dB -+ 0x0CC, // 8, -8.0dB -+ 0x0D8, // 9, -7.5dB -+ 0x0E5, // 10, -7.0dB -+ 0x0F2, // 11, -6.5dB -+ 0x101, // 12, -6.0dB -+ 0x110, // 13, -5.5dB -+ 0x120, // 14, -5.0dB -+ 0x131, // 15, -4.5dB -+ 0x143, // 16, -4.0dB -+ 0x156, // 17, -3.5dB -+ 0x16A, // 18, -3.0dB -+ 0x180, // 19, -2.5dB -+ 0x197, // 20, -2.0dB -+ 0x1AF, // 21, -1.5dB -+ 0x1C8, // 22, -1.0dB -+ 0x1E3, // 23, -0.5dB -+ 0x200, // 24, +0 dB -+ 0x21E, // 25, +0.5dB -+ 0x23E, // 26, +1.0dB -+ 0x261, // 27, +1.5dB -+ 0x285, // 28, +2.0dB -+ 0x2AB, // 29, +2.5dB -+ 0x2D3, // 30, +3.0dB -+ 0x2FE, // 31, +3.5dB -+ 0x32B, // 32, +4.0dB -+ 0x35C, // 33, +4.5dB -+ 0x38E, // 34, +5.0dB -+ 0x3C4, // 35, +5.5dB -+ 0x3FE // 36, +6.0dB -+}; -+ -+#ifdef AP_BUILD_WORKAROUND -+ -+unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { -+ /* +6.0dB */ 0x7f8001fe, -+ /* +5.5dB */ 0x788001e2, -+ /* +5.0dB */ 0x71c001c7, -+ /* +4.5dB */ 0x6b8001ae, -+ /* +4.0dB */ 0x65400195, -+ /* +3.5dB */ 0x5fc0017f, -+ /* +3.0dB */ 0x5a400169, -+ /* +2.5dB */ 0x55400155, -+ /* +2.0dB */ 0x50800142, -+ /* +1.5dB */ 0x4c000130, -+ /* +1.0dB */ 0x47c0011f, -+ /* +0.5dB */ 0x43c0010f, -+ /* 0.0dB */ 0x40000100, -+ /* -0.5dB */ 0x3c8000f2, -+ /* -1.0dB */ 0x390000e4, -+ /* -1.5dB */ 0x35c000d7, -+ /* -2.0dB */ 0x32c000cb, -+ /* -2.5dB */ 0x300000c0, -+ /* -3.0dB */ 0x2d4000b5, -+ /* -3.5dB */ 0x2ac000ab, -+ /* -4.0dB */ 0x288000a2, -+ /* -4.5dB */ 0x26000098, -+ /* -5.0dB */ 0x24000090, -+ /* -5.5dB */ 0x22000088, -+ /* -6.0dB */ 0x20000080, -+ /* -6.5dB */ 0x1a00006c, -+ /* -7.0dB */ 0x1c800072, -+ /* -7.5dB */ 0x18000060, -+ /* -8.0dB */ 0x19800066, -+ /* -8.5dB */ 0x15800056, -+ /* -9.0dB */ 0x26c0005b, -+ /* -9.5dB */ 0x14400051, -+ /* -10.0dB */ 0x24400051, -+ /* -10.5dB */ 0x1300004c, -+ /* -11.0dB */ 0x12000048, -+ /* -11.5dB */ 0x11000044, -+ /* -12.0dB */ 0x10000040 -+}; -+#endif -+ -+ -+ -+VOID -+odm_TXPowerTrackingInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) -+ return; -+#endif -+ -+ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); -+} -+ -+u1Byte -+getSwingIndex( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u1Byte i = 0; -+ u4Byte bbSwing; -+ u4Byte swingTableSize; -+ pu4Byte pSwingTable; -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B -+ || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B -+ ) { -+ bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); -+ -+ pSwingTable = OFDMSwingTable_New; -+ swingTableSize = OFDM_TABLE_SIZE; -+ } else { -+#if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) -+ if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) -+ { -+ bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); -+ pSwingTable = TxScalingTable_Jaguar; -+ swingTableSize = TXSCALE_TABLE_SIZE; -+ } -+ else -+#endif -+ { -+ bbSwing = 0; -+ pSwingTable = OFDMSwingTable; -+ swingTableSize = OFDM_TABLE_SIZE; -+ } -+ } -+ -+ for (i = 0; i < swingTableSize; ++i) { -+ u4Byte tableValue = pSwingTable[i]; -+ -+ if (tableValue >= 0x100000 ) -+ tableValue >>= 22; -+ if (bbSwing == tableValue) -+ break; -+ } -+ return i; -+} -+ -+VOID -+odm_TXPowerTrackingThermalMeterInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); -+ u1Byte p = 0; -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pHalData->TxPowerTrackControl = TRUE; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ pRFCalibrateInfo->bTXPowerTracking = _TRUE; -+ pRFCalibrateInfo->TXPowercount = 0; -+ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; -+ else -+ pRFCalibrateInfo->TxPowerTrackControl = _FALSE; -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; -+ -+ -+ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pRFCalibrateInfo->TxPowerTrackControl); -+ -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ #ifdef RTL8188E_SUPPORT -+ { -+ pRFCalibrateInfo->bTXPowerTracking = _TRUE; -+ pRFCalibrateInfo->TXPowercount = 0; -+ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; -+ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; -+ } -+ #endif -+#endif -+ -+ //pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; -+ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; -+ pRFCalibrateInfo->ThermalValue_IQK = pHalData->EEPROMThermalMeter; -+ pRFCalibrateInfo->ThermalValue_LCK = pHalData->EEPROMThermalMeter; -+ -+ // The index of "0 dB" in SwingTable. -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || -+ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8703B) { -+ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; -+ pRFCalibrateInfo->DefaultCckIndex = 20; -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8188F) //add by Mingzhi.Guo 2015-03-23 -+ { -+ pRFCalibrateInfo->DefaultOfdmIndex =28; //OFDM: -1dB -+ pRFCalibrateInfo->DefaultCckIndex =20; //CCK:-6dB -+ } -+ else -+ { -+ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; -+ pRFCalibrateInfo->DefaultCckIndex = 24; -+ } -+ -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; -+ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->DefaultCckIndex; -+ -+ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) -+ { -+ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; -+ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; -+ pRFCalibrateInfo->PowerIndexOffset[p] = 0; -+ } -+ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //add by Mingzhi.Guo -+ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //add by Mingzhi.Guo -+ -+} -+ -+ -+VOID -+ODM_TXPowerTrackingCheck( -+ IN PVOID pDM_VOID -+ ) -+{ -+ /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate -+ at the same time. In the stage2/3, we need to prive universal interface and merge all -+ HW dynamic mechanism. */ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ switch (pDM_Odm->SupportPlatform) -+ { -+ case ODM_WIN: -+ odm_TXPowerTrackingCheckMP(pDM_Odm); -+ break; -+ -+ case ODM_CE: -+ odm_TXPowerTrackingCheckCE(pDM_Odm); -+ break; -+ -+ case ODM_AP: -+ odm_TXPowerTrackingCheckAP(pDM_Odm); -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+VOID -+odm_TXPowerTrackingCheckCE( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) -+ return; -+ -+ if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec -+ { -+ //pHalData->TxPowerCheckCnt++; //cosa add for debug -+ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) -+ || IS_HARDWARE_TYPE_8723B(Adapter) -+ || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) -+ || IS_HARDWARE_TYPE_8703B(Adapter) -+ ) { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); -+ } else { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60); -+ } -+ -+ //DBG_871X("Trigger Thermal Meter!!\n"); -+ -+ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; -+ return; -+ } -+ else -+ { -+ //DBG_871X("Schedule TxPowerTracking direct call!!\n"); -+ ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); -+ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; -+ } -+ -+#endif -+} -+ -+VOID -+odm_TXPowerTrackingCheckMP( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ if (ODM_CheckPowerStatus(Adapter) == FALSE) -+ { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); -+ return; -+ } -+ -+ if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) -+ odm_TXPowerTrackingThermalMeterCheck(Adapter); -+ else { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); -+ } -+#endif -+ -+} -+ -+ -+VOID -+odm_TXPowerTrackingCheckAP( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ -+ return; -+ -+#endif -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+odm_TXPowerTrackingThermalMeterCheck( -+ IN PADAPTER Adapter -+ ) -+{ -+#ifndef AP_BUILD_WORKAROUND -+ static u1Byte TM_Trigger = 0; -+ -+ if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) -+ { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, -+ ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); -+ return; -+ } -+ -+ if(!TM_Trigger) //at least delay 1 sec -+ { -+ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || -+ IS_HARDWARE_TYPE_8723B(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) -+ || IS_HARDWARE_TYPE_8703B(Adapter)) -+ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); -+ else -+ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); -+ -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); -+ -+ TM_Trigger = 1; -+ return; -+ } -+ else -+ { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); -+ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. -+ TM_Trigger = 0; -+ } -+#endif -+} -+#endif -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/*============================================================ */ ++/* include files */ ++/*============================================================ */ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//============================================================ ++// Global var ++//============================================================ ++ ++u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = { ++ 0x7f8001fe, // 0, +6.0dB ++ 0x788001e2, // 1, +5.5dB ++ 0x71c001c7, // 2, +5.0dB ++ 0x6b8001ae, // 3, +4.5dB ++ 0x65400195, // 4, +4.0dB ++ 0x5fc0017f, // 5, +3.5dB ++ 0x5a400169, // 6, +3.0dB ++ 0x55400155, // 7, +2.5dB ++ 0x50800142, // 8, +2.0dB ++ 0x4c000130, // 9, +1.5dB ++ 0x47c0011f, // 10, +1.0dB ++ 0x43c0010f, // 11, +0.5dB ++ 0x40000100, // 12, +0dB ++ 0x3c8000f2, // 13, -0.5dB ++ 0x390000e4, // 14, -1.0dB ++ 0x35c000d7, // 15, -1.5dB ++ 0x32c000cb, // 16, -2.0dB ++ 0x300000c0, // 17, -2.5dB ++ 0x2d4000b5, // 18, -3.0dB ++ 0x2ac000ab, // 19, -3.5dB ++ 0x288000a2, // 20, -4.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x24000090, // 22, -5.0dB ++ 0x22000088, // 23, -5.5dB ++ 0x20000080, // 24, -6.0dB ++ 0x1e400079, // 25, -6.5dB ++ 0x1c800072, // 26, -7.0dB ++ 0x1b00006c, // 27. -7.5dB ++ 0x19800066, // 28, -8.0dB ++ 0x18000060, // 29, -8.5dB ++ 0x16c0005b, // 30, -9.0dB ++ 0x15800056, // 31, -9.5dB ++ 0x14400051, // 32, -10.0dB ++ 0x1300004c, // 33, -10.5dB ++ 0x12000048, // 34, -11.0dB ++ 0x11000044, // 35, -11.5dB ++ 0x10000040, // 36, -12.0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB ++}; ++ ++ ++u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { ++{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ ++{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ ++{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ ++{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ ++{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ ++{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ ++{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ ++{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ ++{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ ++{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ ++{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ ++{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ ++{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ ++{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ ++{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ ++{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ ++{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ ++{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ ++{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ ++{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ ++{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = ++{ ++ 0x081, // 0, -12.0dB ++ 0x088, // 1, -11.5dB ++ 0x090, // 2, -11.0dB ++ 0x099, // 3, -10.5dB ++ 0x0A2, // 4, -10.0dB ++ 0x0AC, // 5, -9.5dB ++ 0x0B6, // 6, -9.0dB ++ 0x0C0, // 7, -8.5dB ++ 0x0CC, // 8, -8.0dB ++ 0x0D8, // 9, -7.5dB ++ 0x0E5, // 10, -7.0dB ++ 0x0F2, // 11, -6.5dB ++ 0x101, // 12, -6.0dB ++ 0x110, // 13, -5.5dB ++ 0x120, // 14, -5.0dB ++ 0x131, // 15, -4.5dB ++ 0x143, // 16, -4.0dB ++ 0x156, // 17, -3.5dB ++ 0x16A, // 18, -3.0dB ++ 0x180, // 19, -2.5dB ++ 0x197, // 20, -2.0dB ++ 0x1AF, // 21, -1.5dB ++ 0x1C8, // 22, -1.0dB ++ 0x1E3, // 23, -0.5dB ++ 0x200, // 24, +0 dB ++ 0x21E, // 25, +0.5dB ++ 0x23E, // 26, +1.0dB ++ 0x261, // 27, +1.5dB ++ 0x285, // 28, +2.0dB ++ 0x2AB, // 29, +2.5dB ++ 0x2D3, // 30, +3.0dB ++ 0x2FE, // 31, +3.5dB ++ 0x32B, // 32, +4.0dB ++ 0x35C, // 33, +4.5dB ++ 0x38E, // 34, +5.0dB ++ 0x3C4, // 35, +5.5dB ++ 0x3FE // 36, +6.0dB ++}; ++ ++#ifdef AP_BUILD_WORKAROUND ++ ++unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { ++ /* +6.0dB */ 0x7f8001fe, ++ /* +5.5dB */ 0x788001e2, ++ /* +5.0dB */ 0x71c001c7, ++ /* +4.5dB */ 0x6b8001ae, ++ /* +4.0dB */ 0x65400195, ++ /* +3.5dB */ 0x5fc0017f, ++ /* +3.0dB */ 0x5a400169, ++ /* +2.5dB */ 0x55400155, ++ /* +2.0dB */ 0x50800142, ++ /* +1.5dB */ 0x4c000130, ++ /* +1.0dB */ 0x47c0011f, ++ /* +0.5dB */ 0x43c0010f, ++ /* 0.0dB */ 0x40000100, ++ /* -0.5dB */ 0x3c8000f2, ++ /* -1.0dB */ 0x390000e4, ++ /* -1.5dB */ 0x35c000d7, ++ /* -2.0dB */ 0x32c000cb, ++ /* -2.5dB */ 0x300000c0, ++ /* -3.0dB */ 0x2d4000b5, ++ /* -3.5dB */ 0x2ac000ab, ++ /* -4.0dB */ 0x288000a2, ++ /* -4.5dB */ 0x26000098, ++ /* -5.0dB */ 0x24000090, ++ /* -5.5dB */ 0x22000088, ++ /* -6.0dB */ 0x20000080, ++ /* -6.5dB */ 0x1a00006c, ++ /* -7.0dB */ 0x1c800072, ++ /* -7.5dB */ 0x18000060, ++ /* -8.0dB */ 0x19800066, ++ /* -8.5dB */ 0x15800056, ++ /* -9.0dB */ 0x26c0005b, ++ /* -9.5dB */ 0x14400051, ++ /* -10.0dB */ 0x24400051, ++ /* -10.5dB */ 0x1300004c, ++ /* -11.0dB */ 0x12000048, ++ /* -11.5dB */ 0x11000044, ++ /* -12.0dB */ 0x10000040 ++}; ++#endif ++ ++ ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) ++ return; ++#endif ++ ++ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); ++} ++ ++u1Byte ++getSwingIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte i = 0; ++ u4Byte bbSwing; ++ u4Byte swingTableSize; ++ pu4Byte pSwingTable; ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B ++ || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B ++ ) { ++ bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); ++ ++ pSwingTable = OFDMSwingTable_New; ++ swingTableSize = OFDM_TABLE_SIZE; ++ } else { ++#if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); ++ pSwingTable = TxScalingTable_Jaguar; ++ swingTableSize = TXSCALE_TABLE_SIZE; ++ } ++ else ++#endif ++ { ++ bbSwing = 0; ++ pSwingTable = OFDMSwingTable; ++ swingTableSize = OFDM_TABLE_SIZE; ++ } ++ } ++ ++ for (i = 0; i < swingTableSize; ++i) { ++ u4Byte tableValue = pSwingTable[i]; ++ ++ if (tableValue >= 0x100000 ) ++ tableValue >>= 22; ++ if (bbSwing == tableValue) ++ break; ++ } ++ return i; ++} ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); ++ u1Byte p = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pHalData->TxPowerTrackControl = TRUE; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ else ++ pRFCalibrateInfo->TxPowerTrackControl = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ ++ ++ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pRFCalibrateInfo->TxPowerTrackControl); ++ ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ #ifdef RTL8188E_SUPPORT ++ { ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ } ++ #endif ++#endif ++ ++ //pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_IQK = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_LCK = pHalData->EEPROMThermalMeter; ++ ++ // The index of "0 dB" in SwingTable. ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || ++ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8703B) { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 20; ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8188F) //add by Mingzhi.Guo 2015-03-23 ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex =28; //OFDM: -1dB ++ pRFCalibrateInfo->DefaultCckIndex =20; //CCK:-6dB ++ } ++ else ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 24; ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->DefaultCckIndex; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ } ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //add by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //add by Mingzhi.Guo ++ ++} ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ at the same time. In the stage2/3, we need to prive universal interface and merge all ++ HW dynamic mechanism. */ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ odm_TXPowerTrackingCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_TXPowerTrackingCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_TXPowerTrackingCheckAP(pDM_Odm); ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ return; ++ ++ if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec ++ { ++ //pHalData->TxPowerCheckCnt++; //cosa add for debug ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) ++ || IS_HARDWARE_TYPE_8723B(Adapter) ++ || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) ++ || IS_HARDWARE_TYPE_8703B(Adapter) ++ ) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); ++ } else { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60); ++ } ++ ++ //DBG_871X("Trigger Thermal Meter!!\n"); ++ ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ //DBG_871X("Schedule TxPowerTracking direct call!!\n"); ++ ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; ++ } ++ ++#endif ++} ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (ODM_CheckPowerStatus(Adapter) == FALSE) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); ++ return; ++ } ++ ++ if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) ++ odm_TXPowerTrackingThermalMeterCheck(Adapter); ++ else { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); ++ } ++#endif ++ ++} ++ ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ return; ++ ++#endif ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifndef AP_BUILD_WORKAROUND ++ static u1Byte TM_Trigger = 0; ++ ++ if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ++ ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); ++ return; ++ } ++ ++ if(!TM_Trigger) //at least delay 1 sec ++ { ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_8723B(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) ++ || IS_HARDWARE_TYPE_8703B(Adapter)) ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); ++ else ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); ++ ++ TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); ++ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ TM_Trigger = 0; ++ } ++#endif ++} ++#endif ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ce.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ce.h new file mode 100644 -index 000000000..c068b7479 +index 0000000..337fd1f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_ce.h @@ -0,0 +1,296 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMPOWERTRACKING_H__ -+#define __PHYDMPOWERTRACKING_H__ -+ -+#define POWRTRACKING_VERSION "1.1" -+ -+#define DPK_DELTA_MAPPING_NUM 13 -+#define index_mapping_HP_NUM 15 -+#define OFDM_TABLE_SIZE 43 -+#define CCK_TABLE_SIZE 33 -+#define CCK_TABLE_SIZE_88F 21 -+#define TXSCALE_TABLE_SIZE 37 -+#define TXPWR_TRACK_TABLE_SIZE 30 -+#define DELTA_SWINGIDX_SIZE 30 -+#define BAND_NUM 4 -+ -+#define AVG_THERMAL_NUM 8 -+#define HP_THERMAL_NUM 8 -+#define IQK_MAC_REG_NUM 4 -+#define IQK_ADDA_REG_NUM 16 -+#define IQK_BB_REG_NUM_MAX 10 -+ -+#define IQK_BB_REG_NUM 9 -+ -+ -+ -+#define IQK_Matrix_REG_NUM 8 -+#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G -+ -+extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE]; -+extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; -+ -+extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE]; -+extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; -+ -+ -+extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; -+ -+// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. -+static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -+static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+ -+#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck -+ -+typedef struct _IQK_MATRIX_REGS_SETTING{ -+ BOOLEAN bIQKDone; -+ s4Byte Value[3][IQK_Matrix_REG_NUM]; -+ BOOLEAN bBWIqkResultSaved[3]; -+}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; -+ -+typedef struct ODM_RF_Calibration_Structure -+{ -+ //for tx power tracking -+ -+ u4Byte RegA24; // for TempCCK -+ s4Byte RegE94; -+ s4Byte RegE9C; -+ s4Byte RegEB4; -+ s4Byte RegEBC; -+ -+ u1Byte TXPowercount; -+ BOOLEAN bTXPowerTrackingInit; -+ BOOLEAN bTXPowerTracking; -+ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default -+ u1Byte TM_Trigger; -+ u1Byte InternalPA5G[2]; //pathA / pathB -+ -+ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 -+ u1Byte ThermalValue; -+ u1Byte ThermalValue_LCK; -+ u1Byte ThermalValue_IQK; -+ u1Byte ThermalValue_DPK; -+ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; -+ u1Byte ThermalValue_AVG_index; -+ u1Byte ThermalValue_RxGain; -+ u1Byte ThermalValue_Crystal; -+ u1Byte ThermalValue_DPKstore; -+ u1Byte ThermalValue_DPKtrack; -+ BOOLEAN TxPowerTrackingInProgress; -+ -+ BOOLEAN bReloadtxpowerindex; -+ u1Byte bRfPiEnable; -+ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug -+ -+ -+ //------------------------- Tx power Tracking -------------------------// -+ u1Byte bCCKinCH14; -+ u1Byte CCK_index; -+ u1Byte OFDM_index[MAX_RF_PATH]; -+ s1Byte PowerIndexOffset[MAX_RF_PATH]; -+ s1Byte DeltaPowerIndex[MAX_RF_PATH]; -+ s1Byte DeltaPowerIndexLast[MAX_RF_PATH]; -+ BOOLEAN bTxPowerChanged; -+ -+ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; -+ u1Byte ThermalValue_HP_index; -+ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; -+ u1Byte Delta_LCK; -+ s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB -+ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; -+ -+ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; -+ u1Byte BbSwingIdxOfdmCurrent; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; -+#else -+ u1Byte BbSwingIdxOfdmBase; -+#endif -+ BOOLEAN BbSwingFlagOfdm; -+ u1Byte BbSwingIdxCck; -+ u1Byte BbSwingIdxCckCurrent; -+ u1Byte BbSwingIdxCckBase; -+ u1Byte DefaultOfdmIndex; -+ u1Byte DefaultCckIndex; -+ BOOLEAN BbSwingFlagCck; -+ -+ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; -+ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; -+ s1Byte Remnant_CCKSwingIdx; -+ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ -+ BOOLEAN Modify_TxAGC_Flag_PathA; -+ BOOLEAN Modify_TxAGC_Flag_PathB; -+ BOOLEAN Modify_TxAGC_Flag_PathC; -+ BOOLEAN Modify_TxAGC_Flag_PathD; -+ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; -+ -+ s1Byte KfreeOffset[MAX_RF_PATH]; -+ -+ //--------------------------------------------------------------------// -+ -+ //for IQK -+ u4Byte RegC04; -+ u4Byte Reg874; -+ u4Byte RegC08; -+ u4Byte RegB68; -+ u4Byte RegB6C; -+ u4Byte Reg870; -+ u4Byte Reg860; -+ u4Byte Reg864; -+ -+ BOOLEAN bIQKInitialized; -+ BOOLEAN bLCKInProgress; -+ BOOLEAN bAntennaDetected; -+ BOOLEAN bNeedIQK; -+ BOOLEAN bIQKInProgress; -+ u1Byte Delta_IQK; -+ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; -+ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; -+ u4Byte IQK_BB_backup_recover[9]; -+ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; -+ u4Byte TxIQC_8723B[2][3][2]; // { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} -+ u4Byte RxIQC_8723B[2][2][2]; // { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} -+ u4Byte TxIQC_8703B[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u4Byte RxIQC_8703B[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ -+ -+ -+ // IQK time measurement -+ u8Byte IQK_StartTime; -+ u8Byte IQK_ProgressingTime; -+ u4Byte LOK_Result; -+ -+ //for APK -+ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a -+ u1Byte bAPKdone; -+ u1Byte bAPKThermalMeterIgnore; -+ -+ // DPK -+ BOOLEAN bDPKFail; -+ u1Byte bDPdone; -+ u1Byte bDPPathAOK; -+ u1Byte bDPPathBOK; -+ -+ u4Byte TxLOK[2]; -+ u4Byte DpkTxAGC; -+ s4Byte DpkGain; -+ u4Byte DpkThermal[4]; -+ s1Byte Modify_TxAGC_Value_OFDM; -+ s1Byte Modify_TxAGC_Value_CCK; -+}ODM_RF_CAL_T,*PODM_RF_CAL_T; -+ -+ -+VOID -+ODM_TXPowerTrackingCheck( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+VOID -+odm_TXPowerTrackingInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingCheckAP( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingThermalMeterInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingCheckMP( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+VOID -+odm_TXPowerTrackingCheckCE( -+ IN PVOID pDM_VOID -+ ); -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+VOID -+odm_TXPowerTrackingCallbackThermalMeter92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingCallbackRXGainThermalMeter92D( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingCallbackThermalMeter92D( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingDirectCall92C( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+odm_TXPowerTrackingThermalMeterCheck( -+ IN PADAPTER Adapter -+ ); -+ -+#endif -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPOWERTRACKING_H__ ++#define __PHYDMPOWERTRACKING_H__ ++ ++#define POWRTRACKING_VERSION "1.1" ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++#define OFDM_TABLE_SIZE 43 ++#define CCK_TABLE_SIZE 33 ++#define CCK_TABLE_SIZE_88F 21 ++#define TXSCALE_TABLE_SIZE 37 ++#define TXPWR_TRACK_TABLE_SIZE 30 ++#define DELTA_SWINGIDX_SIZE 30 ++#define BAND_NUM 4 ++ ++#define AVG_THERMAL_NUM 8 ++#define HP_THERMAL_NUM 8 ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM_MAX 10 ++ ++#define IQK_BB_REG_NUM 9 ++ ++ ++ ++#define IQK_Matrix_REG_NUM 8 ++#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G ++ ++extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; ++ ++ ++extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; ++ ++// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. ++static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; ++static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; ++ ++#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck ++ ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++ s4Byte Value[3][IQK_Matrix_REG_NUM]; ++ BOOLEAN bBWIqkResultSaved[3]; ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++typedef struct ODM_RF_Calibration_Structure ++{ ++ //for tx power tracking ++ ++ u4Byte RegA24; // for TempCCK ++ s4Byte RegE94; ++ s4Byte RegE9C; ++ s4Byte RegEB4; ++ s4Byte RegEBC; ++ ++ u1Byte TXPowercount; ++ BOOLEAN bTXPowerTrackingInit; ++ BOOLEAN bTXPowerTracking; ++ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u1Byte TM_Trigger; ++ u1Byte InternalPA5G[2]; //pathA / pathB ++ ++ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u1Byte ThermalValue; ++ u1Byte ThermalValue_LCK; ++ u1Byte ThermalValue_IQK; ++ u1Byte ThermalValue_DPK; ++ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u1Byte ThermalValue_AVG_index; ++ u1Byte ThermalValue_RxGain; ++ u1Byte ThermalValue_Crystal; ++ u1Byte ThermalValue_DPKstore; ++ u1Byte ThermalValue_DPKtrack; ++ BOOLEAN TxPowerTrackingInProgress; ++ ++ BOOLEAN bReloadtxpowerindex; ++ u1Byte bRfPiEnable; ++ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ ++ //------------------------- Tx power Tracking -------------------------// ++ u1Byte bCCKinCH14; ++ u1Byte CCK_index; ++ u1Byte OFDM_index[MAX_RF_PATH]; ++ s1Byte PowerIndexOffset[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndex[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndexLast[MAX_RF_PATH]; ++ BOOLEAN bTxPowerChanged; ++ ++ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; ++ u1Byte ThermalValue_HP_index; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++ u1Byte Delta_LCK; ++ s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB ++ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; ++ ++ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; ++ u1Byte BbSwingIdxOfdmCurrent; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; ++#else ++ u1Byte BbSwingIdxOfdmBase; ++#endif ++ BOOLEAN BbSwingFlagOfdm; ++ u1Byte BbSwingIdxCck; ++ u1Byte BbSwingIdxCckCurrent; ++ u1Byte BbSwingIdxCckBase; ++ u1Byte DefaultOfdmIndex; ++ u1Byte DefaultCckIndex; ++ BOOLEAN BbSwingFlagCck; ++ ++ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_CCKSwingIdx; ++ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ ++ BOOLEAN Modify_TxAGC_Flag_PathA; ++ BOOLEAN Modify_TxAGC_Flag_PathB; ++ BOOLEAN Modify_TxAGC_Flag_PathC; ++ BOOLEAN Modify_TxAGC_Flag_PathD; ++ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; ++ ++ s1Byte KfreeOffset[MAX_RF_PATH]; ++ ++ //--------------------------------------------------------------------// ++ ++ //for IQK ++ u4Byte RegC04; ++ u4Byte Reg874; ++ u4Byte RegC08; ++ u4Byte RegB68; ++ u4Byte RegB6C; ++ u4Byte Reg870; ++ u4Byte Reg860; ++ u4Byte Reg864; ++ ++ BOOLEAN bIQKInitialized; ++ BOOLEAN bLCKInProgress; ++ BOOLEAN bAntennaDetected; ++ BOOLEAN bNeedIQK; ++ BOOLEAN bIQKInProgress; ++ u1Byte Delta_IQK; ++ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; ++ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte IQK_BB_backup_recover[9]; ++ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; ++ u4Byte TxIQC_8723B[2][3][2]; // { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} ++ u4Byte RxIQC_8723B[2][2][2]; // { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} ++ u4Byte TxIQC_8703B[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ ++ u4Byte RxIQC_8703B[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ ++ ++ ++ ++ // IQK time measurement ++ u8Byte IQK_StartTime; ++ u8Byte IQK_ProgressingTime; ++ u4Byte LOK_Result; ++ ++ //for APK ++ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u1Byte bAPKdone; ++ u1Byte bAPKThermalMeterIgnore; ++ ++ // DPK ++ BOOLEAN bDPKFail; ++ u1Byte bDPdone; ++ u1Byte bDPPathAOK; ++ u1Byte bDPPathBOK; ++ ++ u4Byte TxLOK[2]; ++ u4Byte DpkTxAGC; ++ s4Byte DpkGain; ++ u4Byte DpkThermal[4]; ++ s1Byte Modify_TxAGC_Value_OFDM; ++ s1Byte Modify_TxAGC_Value_CCK; ++}ODM_RF_CAL_T,*PODM_RF_CAL_T; ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackRXGainThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingDirectCall92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ); ++ ++#endif ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_win.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_win.c new file mode 100644 -index 000000000..acf2147c8 +index 0000000..2cf4c76 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_win.c @@ -0,0 +1,687 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+//============================================================ -+// Global var -+//============================================================ -+ -+u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = { -+ 0x7f8001fe, // 0, +6.0dB -+ 0x788001e2, // 1, +5.5dB -+ 0x71c001c7, // 2, +5.0dB -+ 0x6b8001ae, // 3, +4.5dB -+ 0x65400195, // 4, +4.0dB -+ 0x5fc0017f, // 5, +3.5dB -+ 0x5a400169, // 6, +3.0dB -+ 0x55400155, // 7, +2.5dB -+ 0x50800142, // 8, +2.0dB -+ 0x4c000130, // 9, +1.5dB -+ 0x47c0011f, // 10, +1.0dB -+ 0x43c0010f, // 11, +0.5dB -+ 0x40000100, // 12, +0dB -+ 0x3c8000f2, // 13, -0.5dB -+ 0x390000e4, // 14, -1.0dB -+ 0x35c000d7, // 15, -1.5dB -+ 0x32c000cb, // 16, -2.0dB -+ 0x300000c0, // 17, -2.5dB -+ 0x2d4000b5, // 18, -3.0dB -+ 0x2ac000ab, // 19, -3.5dB -+ 0x288000a2, // 20, -4.0dB -+ 0x26000098, // 21, -4.5dB -+ 0x24000090, // 22, -5.0dB -+ 0x22000088, // 23, -5.5dB -+ 0x20000080, // 24, -6.0dB -+ 0x1e400079, // 25, -6.5dB -+ 0x1c800072, // 26, -7.0dB -+ 0x1b00006c, // 27. -7.5dB -+ 0x19800066, // 28, -8.0dB -+ 0x18000060, // 29, -8.5dB -+ 0x16c0005b, // 30, -9.0dB -+ 0x15800056, // 31, -9.5dB -+ 0x14400051, // 32, -10.0dB -+ 0x1300004c, // 33, -10.5dB -+ 0x12000048, // 34, -11.0dB -+ 0x11000044, // 35, -11.5dB -+ 0x10000040, // 36, -12.0dB -+}; -+ -+u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB -+}; -+ -+ -+u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = { -+ 0x0b40002d, // 0, -15.0dB -+ 0x0c000030, // 1, -14.5dB -+ 0x0cc00033, // 2, -14.0dB -+ 0x0d800036, // 3, -13.5dB -+ 0x0e400039, // 4, -13.0dB -+ 0x0f00003c, // 5, -12.5dB -+ 0x10000040, // 6, -12.0dB -+ 0x11000044, // 7, -11.5dB -+ 0x12000048, // 8, -11.0dB -+ 0x1300004c, // 9, -10.5dB -+ 0x14400051, // 10, -10.0dB -+ 0x15800056, // 11, -9.5dB -+ 0x16c0005b, // 12, -9.0dB -+ 0x18000060, // 13, -8.5dB -+ 0x19800066, // 14, -8.0dB -+ 0x1b00006c, // 15, -7.5dB -+ 0x1c800072, // 16, -7.0dB -+ 0x1e400079, // 17, -6.5dB -+ 0x20000080, // 18, -6.0dB -+ 0x22000088, // 19, -5.5dB -+ 0x24000090, // 20, -5.0dB -+ 0x26000098, // 21, -4.5dB -+ 0x288000a2, // 22, -4.0dB -+ 0x2ac000ab, // 23, -3.5dB -+ 0x2d4000b5, // 24, -3.0dB -+ 0x300000c0, // 25, -2.5dB -+ 0x32c000cb, // 26, -2.0dB -+ 0x35c000d7, // 27, -1.5dB -+ 0x390000e4, // 28, -1.0dB -+ 0x3c8000f2, // 29, -0.5dB -+ 0x40000100, // 30, +0dB -+ 0x43c0010f, // 31, +0.5dB -+ 0x47c0011f, // 32, +1.0dB -+ 0x4c000130, // 33, +1.5dB -+ 0x50800142, // 34, +2.0dB -+ 0x55400155, // 35, +2.5dB -+ 0x5a400169, // 36, +3.0dB -+ 0x5fc0017f, // 37, +3.5dB -+ 0x65400195, // 38, +4.0dB -+ 0x6b8001ae, // 39, +4.5dB -+ 0x71c001c7, // 40, +5.0dB -+ 0x788001e2, // 41, +5.5dB -+ 0x7f8001fe // 42, +6.0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { -+{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+ -+u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB -+}; -+ -+ -+u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB -+}; -+ -+u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = -+{ -+ 0x081, // 0, -12.0dB -+ 0x088, // 1, -11.5dB -+ 0x090, // 2, -11.0dB -+ 0x099, // 3, -10.5dB -+ 0x0A2, // 4, -10.0dB -+ 0x0AC, // 5, -9.5dB -+ 0x0B6, // 6, -9.0dB -+ 0x0C0, // 7, -8.5dB -+ 0x0CC, // 8, -8.0dB -+ 0x0D8, // 9, -7.5dB -+ 0x0E5, // 10, -7.0dB -+ 0x0F2, // 11, -6.5dB -+ 0x101, // 12, -6.0dB -+ 0x110, // 13, -5.5dB -+ 0x120, // 14, -5.0dB -+ 0x131, // 15, -4.5dB -+ 0x143, // 16, -4.0dB -+ 0x156, // 17, -3.5dB -+ 0x16A, // 18, -3.0dB -+ 0x180, // 19, -2.5dB -+ 0x197, // 20, -2.0dB -+ 0x1AF, // 21, -1.5dB -+ 0x1C8, // 22, -1.0dB -+ 0x1E3, // 23, -0.5dB -+ 0x200, // 24, +0 dB -+ 0x21E, // 25, +0.5dB -+ 0x23E, // 26, +1.0dB -+ 0x261, // 27, +1.5dB -+ 0x285, // 28, +2.0dB -+ 0x2AB, // 29, +2.5dB -+ 0x2D3, // 30, +3.0dB -+ 0x2FE, // 31, +3.5dB -+ 0x32B, // 32, +4.0dB -+ 0x35C, // 33, +4.5dB -+ 0x38E, // 34, +5.0dB -+ 0x3C4, // 35, +5.5dB -+ 0x3FE // 36, +6.0dB -+}; -+ -+#ifdef AP_BUILD_WORKAROUND -+ -+unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { -+ /* +6.0dB */ 0x7f8001fe, -+ /* +5.5dB */ 0x788001e2, -+ /* +5.0dB */ 0x71c001c7, -+ /* +4.5dB */ 0x6b8001ae, -+ /* +4.0dB */ 0x65400195, -+ /* +3.5dB */ 0x5fc0017f, -+ /* +3.0dB */ 0x5a400169, -+ /* +2.5dB */ 0x55400155, -+ /* +2.0dB */ 0x50800142, -+ /* +1.5dB */ 0x4c000130, -+ /* +1.0dB */ 0x47c0011f, -+ /* +0.5dB */ 0x43c0010f, -+ /* 0.0dB */ 0x40000100, -+ /* -0.5dB */ 0x3c8000f2, -+ /* -1.0dB */ 0x390000e4, -+ /* -1.5dB */ 0x35c000d7, -+ /* -2.0dB */ 0x32c000cb, -+ /* -2.5dB */ 0x300000c0, -+ /* -3.0dB */ 0x2d4000b5, -+ /* -3.5dB */ 0x2ac000ab, -+ /* -4.0dB */ 0x288000a2, -+ /* -4.5dB */ 0x26000098, -+ /* -5.0dB */ 0x24000090, -+ /* -5.5dB */ 0x22000088, -+ /* -6.0dB */ 0x20000080, -+ /* -6.5dB */ 0x1a00006c, -+ /* -7.0dB */ 0x1c800072, -+ /* -7.5dB */ 0x18000060, -+ /* -8.0dB */ 0x19800066, -+ /* -8.5dB */ 0x15800056, -+ /* -9.0dB */ 0x26c0005b, -+ /* -9.5dB */ 0x14400051, -+ /* -10.0dB */ 0x24400051, -+ /* -10.5dB */ 0x1300004c, -+ /* -11.0dB */ 0x12000048, -+ /* -11.5dB */ 0x11000044, -+ /* -12.0dB */ 0x10000040 -+}; -+ -+#endif -+ -+VOID -+odm_TXPowerTrackingInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES|ODM_RTL8822B))) -+ return; -+#endif -+ -+ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); -+} -+ -+u1Byte -+getSwingIndex( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u1Byte i = 0; -+ u4Byte bbSwing; -+ u4Byte swingTableSize; -+ pu4Byte pSwingTable; -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || -+ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) -+ { -+ bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); -+ -+ pSwingTable = OFDMSwingTable_New; -+ swingTableSize = OFDM_TABLE_SIZE; -+ } else { -+ bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); -+ pSwingTable = TxScalingTable_Jaguar; -+ swingTableSize = TXSCALE_TABLE_SIZE; -+ } -+ -+ for (i = 0; i < swingTableSize; ++i) { -+ u4Byte tableValue = pSwingTable[i]; -+ -+ if (tableValue >= 0x100000 ) -+ tableValue >>= 22; -+ if (bbSwing == tableValue) -+ break; -+ } -+ return i; -+} -+ -+VOID -+odm_TXPowerTrackingThermalMeterInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u1Byte p = 0; -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pRFCalibrateInfo->TxPowerTrackControl = TRUE; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #ifdef CONFIG_RTL8188E -+ { -+ pRFCalibrateInfo->bTXPowerTracking = _TRUE; -+ pRFCalibrateInfo->TXPowercount = 0; -+ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; -+ -+ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pRFCalibrateInfo->TxPowerTrackControl); -+ } -+ #else -+ { -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct dm_priv *pdmpriv = &pHalData->dmpriv; -+ -+ pdmpriv->bTXPowerTracking = _TRUE; -+ pdmpriv->TXPowercount = 0; -+ pdmpriv->bTXPowerTrackingInit = _FALSE; -+ -+ if(pDM_Odm->mp_mode == FALSE) -+ pdmpriv->TxPowerTrackControl = _TRUE; -+ -+ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); -+ -+ } -+ #endif//endif (CONFIG_RTL8188E==1) -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ #ifdef RTL8188E_SUPPORT -+ { -+ pRFCalibrateInfo->bTXPowerTracking = _TRUE; -+ pRFCalibrateInfo->TXPowercount = 0; -+ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; -+ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; -+ } -+ #endif -+#endif -+ -+ pRFCalibrateInfo->TxPowerTrackControl = TRUE; -+ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; -+ pRFCalibrateInfo->ThermalValue_IQK = pHalData->EEPROMThermalMeter; -+ pRFCalibrateInfo->ThermalValue_LCK = pHalData->EEPROMThermalMeter; -+ -+ // The index of "0 dB" in SwingTable. -+ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || -+ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8703B) -+ { -+ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; -+ pRFCalibrateInfo->DefaultCckIndex = 20; -+ } -+ else if(pDM_Odm->SupportICType == ODM_RTL8188F) //add by Mingzhi.Guo 2015-03-23 -+ { -+ pRFCalibrateInfo->DefaultOfdmIndex =28; //OFDM: -1dB -+ pRFCalibrateInfo->DefaultCckIndex =20; //CCK:-6dB -+ } -+ else -+ { -+ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; -+ pRFCalibrateInfo->DefaultCckIndex = 24; -+ } -+ -+ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; -+ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->DefaultCckIndex; -+ -+ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) -+ { -+ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; -+ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; -+ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; -+ pRFCalibrateInfo->PowerIndexOffset[p] = 0; -+ pRFCalibrateInfo->KfreeOffset[p] = 0; -+ } -+ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //add by Mingzhi.Guo -+ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //add by Mingzhi.Guo -+ -+} -+ -+ -+VOID -+ODM_TXPowerTrackingCheck( -+ IN PVOID pDM_VOID -+ ) -+{ -+ // -+ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate -+ // at the same time. In the stage2/3, we need to prive universal interface and merge all -+ // HW dynamic mechanism. -+ // -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ switch (pDM_Odm->SupportPlatform) -+ { -+ case ODM_WIN: -+ odm_TXPowerTrackingCheckMP(pDM_Odm); -+ break; -+ -+ case ODM_CE: -+ odm_TXPowerTrackingCheckCE(pDM_Odm); -+ break; -+ -+ case ODM_AP: -+ odm_TXPowerTrackingCheckAP(pDM_Odm); -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+VOID -+odm_TXPowerTrackingCheckCE( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ #if ((RTL8188F_SUPPORT == 1)) -+ rtl8192c_odm_CheckTXPowerTracking(Adapter); -+ #endif -+ -+ #if(RTL8188E_SUPPORT==1) -+ -+ if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) -+ { -+ return; -+ } -+ -+ if(!pRFCalibrateInfo->TM_Trigger) //at least delay 1 sec -+ { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); -+ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); -+ -+ pRFCalibrateInfo->TM_Trigger = 1; -+ return; -+ -+ } -+ else -+ { -+ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); -+ odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); -+ pRFCalibrateInfo->TM_Trigger = 0; -+ } -+ #endif -+#endif -+} -+ -+VOID -+odm_TXPowerTrackingCheckMP( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ if(*pDM_Odm->pIsFcsModeEnable) -+ return; -+ -+ if (ODM_CheckPowerStatus(Adapter) == FALSE) -+ { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); -+ return; -+ } -+ -+ if(IS_HARDWARE_TYPE_8821B(Adapter)) // TODO: Don't Do PowerTracking -+ return; -+ -+// #if(RTL8192D_SUPPORT==1) -+// if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) -+ if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter)) -+ odm_TXPowerTrackingThermalMeterCheck(Adapter); -+ else { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); -+ } -+// #endif -+#endif -+ -+} -+ -+ -+VOID -+odm_TXPowerTrackingCheckAP( -+ IN PVOID pDM_VOID -+ ) -+{ -+return; -+ -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+odm_TXPowerTrackingDirectCall( -+ IN PADAPTER Adapter -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); -+} -+ -+VOID -+odm_TXPowerTrackingThermalMeterCheck( -+ IN PADAPTER Adapter -+ ) -+{ -+#ifndef AP_BUILD_WORKAROUND -+ static u1Byte TM_Trigger = 0; -+ -+ if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) -+ { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, -+ ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); -+ return; -+ } -+ -+ if(!TM_Trigger) //at least delay 1 sec -+ { -+ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || -+ IS_HARDWARE_TYPE_8723B(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8703B(Adapter)) -+ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); -+ else -+ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); -+ -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); -+ -+ TM_Trigger = 1; -+ return; -+ } -+ else -+ { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); -+ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. -+ TM_Trigger = 0; -+ } -+#endif -+} -+ -+#endif //end #ifMP -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//============================================================ ++// Global var ++//============================================================ ++ ++u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = { ++ 0x7f8001fe, // 0, +6.0dB ++ 0x788001e2, // 1, +5.5dB ++ 0x71c001c7, // 2, +5.0dB ++ 0x6b8001ae, // 3, +4.5dB ++ 0x65400195, // 4, +4.0dB ++ 0x5fc0017f, // 5, +3.5dB ++ 0x5a400169, // 6, +3.0dB ++ 0x55400155, // 7, +2.5dB ++ 0x50800142, // 8, +2.0dB ++ 0x4c000130, // 9, +1.5dB ++ 0x47c0011f, // 10, +1.0dB ++ 0x43c0010f, // 11, +0.5dB ++ 0x40000100, // 12, +0dB ++ 0x3c8000f2, // 13, -0.5dB ++ 0x390000e4, // 14, -1.0dB ++ 0x35c000d7, // 15, -1.5dB ++ 0x32c000cb, // 16, -2.0dB ++ 0x300000c0, // 17, -2.5dB ++ 0x2d4000b5, // 18, -3.0dB ++ 0x2ac000ab, // 19, -3.5dB ++ 0x288000a2, // 20, -4.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x24000090, // 22, -5.0dB ++ 0x22000088, // 23, -5.5dB ++ 0x20000080, // 24, -6.0dB ++ 0x1e400079, // 25, -6.5dB ++ 0x1c800072, // 26, -7.0dB ++ 0x1b00006c, // 27. -7.5dB ++ 0x19800066, // 28, -8.0dB ++ 0x18000060, // 29, -8.5dB ++ 0x16c0005b, // 30, -9.0dB ++ 0x15800056, // 31, -9.5dB ++ 0x14400051, // 32, -10.0dB ++ 0x1300004c, // 33, -10.5dB ++ 0x12000048, // 34, -11.0dB ++ 0x11000044, // 35, -11.5dB ++ 0x10000040, // 36, -12.0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB ++}; ++ ++ ++u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { ++{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ ++{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ ++{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ ++{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ ++{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ ++{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ ++{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ ++{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ ++{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ ++{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ ++{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ ++{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ ++{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ ++{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ ++{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ ++{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ ++{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ ++{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ ++{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ ++{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ ++{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = ++{ ++ 0x081, // 0, -12.0dB ++ 0x088, // 1, -11.5dB ++ 0x090, // 2, -11.0dB ++ 0x099, // 3, -10.5dB ++ 0x0A2, // 4, -10.0dB ++ 0x0AC, // 5, -9.5dB ++ 0x0B6, // 6, -9.0dB ++ 0x0C0, // 7, -8.5dB ++ 0x0CC, // 8, -8.0dB ++ 0x0D8, // 9, -7.5dB ++ 0x0E5, // 10, -7.0dB ++ 0x0F2, // 11, -6.5dB ++ 0x101, // 12, -6.0dB ++ 0x110, // 13, -5.5dB ++ 0x120, // 14, -5.0dB ++ 0x131, // 15, -4.5dB ++ 0x143, // 16, -4.0dB ++ 0x156, // 17, -3.5dB ++ 0x16A, // 18, -3.0dB ++ 0x180, // 19, -2.5dB ++ 0x197, // 20, -2.0dB ++ 0x1AF, // 21, -1.5dB ++ 0x1C8, // 22, -1.0dB ++ 0x1E3, // 23, -0.5dB ++ 0x200, // 24, +0 dB ++ 0x21E, // 25, +0.5dB ++ 0x23E, // 26, +1.0dB ++ 0x261, // 27, +1.5dB ++ 0x285, // 28, +2.0dB ++ 0x2AB, // 29, +2.5dB ++ 0x2D3, // 30, +3.0dB ++ 0x2FE, // 31, +3.5dB ++ 0x32B, // 32, +4.0dB ++ 0x35C, // 33, +4.5dB ++ 0x38E, // 34, +5.0dB ++ 0x3C4, // 35, +5.5dB ++ 0x3FE // 36, +6.0dB ++}; ++ ++#ifdef AP_BUILD_WORKAROUND ++ ++unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { ++ /* +6.0dB */ 0x7f8001fe, ++ /* +5.5dB */ 0x788001e2, ++ /* +5.0dB */ 0x71c001c7, ++ /* +4.5dB */ 0x6b8001ae, ++ /* +4.0dB */ 0x65400195, ++ /* +3.5dB */ 0x5fc0017f, ++ /* +3.0dB */ 0x5a400169, ++ /* +2.5dB */ 0x55400155, ++ /* +2.0dB */ 0x50800142, ++ /* +1.5dB */ 0x4c000130, ++ /* +1.0dB */ 0x47c0011f, ++ /* +0.5dB */ 0x43c0010f, ++ /* 0.0dB */ 0x40000100, ++ /* -0.5dB */ 0x3c8000f2, ++ /* -1.0dB */ 0x390000e4, ++ /* -1.5dB */ 0x35c000d7, ++ /* -2.0dB */ 0x32c000cb, ++ /* -2.5dB */ 0x300000c0, ++ /* -3.0dB */ 0x2d4000b5, ++ /* -3.5dB */ 0x2ac000ab, ++ /* -4.0dB */ 0x288000a2, ++ /* -4.5dB */ 0x26000098, ++ /* -5.0dB */ 0x24000090, ++ /* -5.5dB */ 0x22000088, ++ /* -6.0dB */ 0x20000080, ++ /* -6.5dB */ 0x1a00006c, ++ /* -7.0dB */ 0x1c800072, ++ /* -7.5dB */ 0x18000060, ++ /* -8.0dB */ 0x19800066, ++ /* -8.5dB */ 0x15800056, ++ /* -9.0dB */ 0x26c0005b, ++ /* -9.5dB */ 0x14400051, ++ /* -10.0dB */ 0x24400051, ++ /* -10.5dB */ 0x1300004c, ++ /* -11.0dB */ 0x12000048, ++ /* -11.5dB */ 0x11000044, ++ /* -12.0dB */ 0x10000040 ++}; ++ ++#endif ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES|ODM_RTL8822B))) ++ return; ++#endif ++ ++ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); ++} ++ ++u1Byte ++getSwingIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte i = 0; ++ u4Byte bbSwing; ++ u4Byte swingTableSize; ++ pu4Byte pSwingTable; ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || ++ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) ++ { ++ bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); ++ ++ pSwingTable = OFDMSwingTable_New; ++ swingTableSize = OFDM_TABLE_SIZE; ++ } else { ++ bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); ++ pSwingTable = TxScalingTable_Jaguar; ++ swingTableSize = TXSCALE_TABLE_SIZE; ++ } ++ ++ for (i = 0; i < swingTableSize; ++i) { ++ u4Byte tableValue = pSwingTable[i]; ++ ++ if (tableValue >= 0x100000 ) ++ tableValue >>= 22; ++ if (bbSwing == tableValue) ++ break; ++ } ++ return i; ++} ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte p = 0; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = TRUE; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #ifdef CONFIG_RTL8188E ++ { ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ ++ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pRFCalibrateInfo->TxPowerTrackControl); ++ } ++ #else ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ pdmpriv->bTXPowerTracking = _TRUE; ++ pdmpriv->TXPowercount = 0; ++ pdmpriv->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pdmpriv->TxPowerTrackControl = _TRUE; ++ ++ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); ++ ++ } ++ #endif//endif (CONFIG_RTL8188E==1) ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ #ifdef RTL8188E_SUPPORT ++ { ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ } ++ #endif ++#endif ++ ++ pRFCalibrateInfo->TxPowerTrackControl = TRUE; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_IQK = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_LCK = pHalData->EEPROMThermalMeter; ++ ++ // The index of "0 dB" in SwingTable. ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || ++ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8703B) ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 20; ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8188F) //add by Mingzhi.Guo 2015-03-23 ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex =28; //OFDM: -1dB ++ pRFCalibrateInfo->DefaultCckIndex =20; //CCK:-6dB ++ } ++ else ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 24; ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->DefaultCckIndex; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; ++ } ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //add by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //add by Mingzhi.Guo ++ ++} ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ odm_TXPowerTrackingCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_TXPowerTrackingCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_TXPowerTrackingCheckAP(pDM_Odm); ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ #if ((RTL8188F_SUPPORT == 1)) ++ rtl8192c_odm_CheckTXPowerTracking(Adapter); ++ #endif ++ ++ #if(RTL8188E_SUPPORT==1) ++ ++ if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ return; ++ } ++ ++ if(!pRFCalibrateInfo->TM_Trigger) //at least delay 1 sec ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); ++ ++ pRFCalibrateInfo->TM_Trigger = 1; ++ return; ++ ++ } ++ else ++ { ++ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); ++ odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); ++ pRFCalibrateInfo->TM_Trigger = 0; ++ } ++ #endif ++#endif ++} ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if(*pDM_Odm->pIsFcsModeEnable) ++ return; ++ ++ if (ODM_CheckPowerStatus(Adapter) == FALSE) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); ++ return; ++ } ++ ++ if(IS_HARDWARE_TYPE_8821B(Adapter)) // TODO: Don't Do PowerTracking ++ return; ++ ++// #if(RTL8192D_SUPPORT==1) ++// if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) ++ if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter)) ++ odm_TXPowerTrackingThermalMeterCheck(Adapter); ++ else { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); ++ } ++// #endif ++#endif ++ ++} ++ ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ) ++{ ++return; ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_TXPowerTrackingDirectCall( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); ++} ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifndef AP_BUILD_WORKAROUND ++ static u1Byte TM_Trigger = 0; ++ ++ if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ++ ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); ++ return; ++ } ++ ++ if(!TM_Trigger) //at least delay 1 sec ++ { ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_8723B(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8703B(Adapter)) ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); ++ else ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); ++ ++ TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); ++ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ TM_Trigger = 0; ++ } ++#endif ++} ++ ++#endif //end #ifMP ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_win.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_win.h new file mode 100644 -index 000000000..0ecb3179b +index 0000000..be43875 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_powertracking_win.h @@ -0,0 +1,265 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMPOWERTRACKING_H__ -+#define __PHYDMPOWERTRACKING_H__ -+ -+#define POWRTRACKING_VERSION "1.1" -+ -+#define DPK_DELTA_MAPPING_NUM 13 -+#define index_mapping_HP_NUM 15 -+#define TXSCALE_TABLE_SIZE 37 -+#define TXPWR_TRACK_TABLE_SIZE 30 -+#define DELTA_SWINGIDX_SIZE 30 -+#define BAND_NUM 3 -+#define MAX_RF_PATH 4 -+#define CCK_TABLE_SIZE_88F 21 -+ -+ -+#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck -+ -+#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G -+#define AVG_THERMAL_NUM 8 -+#define HP_THERMAL_NUM 8 -+#define IQK_Matrix_REG_NUM 8 -+#define IQK_MAC_REG_NUM 4 -+#define IQK_ADDA_REG_NUM 16 -+ -+#define IQK_BB_REG_NUM 9 -+ -+ -+extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE]; -+extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; -+ -+extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE]; -+extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; -+extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; -+ -+extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; -+ -+// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. -+static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -+static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+ -+VOID -+ODM_TXPowerTrackingCheck( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingCheckAP( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingThermalMeterInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+odm_TXPowerTrackingCheckMP( -+ IN PVOID pDM_VOID -+ ); -+ -+ -+VOID -+odm_TXPowerTrackingCheckCE( -+ IN PVOID pDM_VOID -+ ); -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+ -+VOID -+odm_TXPowerTrackingThermalMeterCheck( -+ IN PADAPTER Adapter -+ ); -+ -+#endif -+ -+typedef struct _IQK_MATRIX_REGS_SETTING{ -+ BOOLEAN bIQKDone; -+ s4Byte Value[3][IQK_Matrix_REG_NUM]; -+ BOOLEAN bBWIqkResultSaved[3]; -+}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; -+ -+typedef struct ODM_RF_Calibration_Structure -+{ -+ //for tx power tracking -+ -+ u4Byte RegA24; // for TempCCK -+ s4Byte RegE94; -+ s4Byte RegE9C; -+ s4Byte RegEB4; -+ s4Byte RegEBC; -+ //u1Byte bTXPowerTracking; -+ u1Byte TXPowercount; -+ BOOLEAN bTXPowerTrackingInit; -+ BOOLEAN bTXPowerTracking; -+ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default -+ u1Byte TM_Trigger; -+ u1Byte InternalPA5G[2]; //pathA / pathB -+ -+ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 -+ u1Byte ThermalValue; -+ u1Byte ThermalValue_LCK; -+ u1Byte ThermalValue_IQK; -+ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; -+ u1Byte ThermalValue_AVG_index; -+ u1Byte ThermalValue_RxGain; -+ -+ BOOLEAN bReloadtxpowerindex; -+ u1Byte bRfPiEnable; -+ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug -+ -+ -+ //------------------------- Tx power Tracking -------------------------// -+ u1Byte bCCKinCH14; -+ u1Byte CCK_index; -+ u1Byte OFDM_index[MAX_RF_PATH]; -+ s1Byte PowerIndexOffset[MAX_RF_PATH]; -+ s1Byte DeltaPowerIndex[MAX_RF_PATH]; -+ s1Byte DeltaPowerIndexLast[MAX_RF_PATH]; -+ BOOLEAN bTxPowerChanged; -+ -+ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; -+ u1Byte ThermalValue_HP_index; -+ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; -+ u1Byte Delta_LCK; -+ s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB -+ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; -+ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; -+ -+ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; -+ u1Byte BbSwingIdxOfdmCurrent; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; -+#else -+ u1Byte BbSwingIdxOfdmBase; -+#endif -+ BOOLEAN BbSwingFlagOfdm; -+ u1Byte BbSwingIdxCck; -+ u1Byte BbSwingIdxCckCurrent; -+ u1Byte BbSwingIdxCckBase; -+ u1Byte DefaultOfdmIndex; -+ u1Byte DefaultCckIndex; -+ BOOLEAN BbSwingFlagCck; -+ -+ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; -+ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; -+ s1Byte Remnant_CCKSwingIdx; -+ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ -+ BOOLEAN Modify_TxAGC_Flag_PathA; -+ BOOLEAN Modify_TxAGC_Flag_PathB; -+ BOOLEAN Modify_TxAGC_Flag_PathC; -+ BOOLEAN Modify_TxAGC_Flag_PathD; -+ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; -+ -+ s1Byte KfreeOffset[MAX_RF_PATH]; -+ -+ //--------------------------------------------------------------------// -+ -+ //for IQK -+ u4Byte RegC04; -+ u4Byte Reg874; -+ u4Byte RegC08; -+ u4Byte RegB68; -+ u4Byte RegB6C; -+ u4Byte Reg870; -+ u4Byte Reg860; -+ u4Byte Reg864; -+ -+ BOOLEAN bIQKInitialized; -+ BOOLEAN bLCKInProgress; -+ BOOLEAN bAntennaDetected; -+ BOOLEAN bNeedIQK; -+ BOOLEAN bIQKInProgress; -+ u1Byte Delta_IQK; -+ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; -+ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; -+ u4Byte IQK_BB_backup_recover[9]; -+ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; -+ u4Byte TxIQC_8723B[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u4Byte RxIQC_8723B[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u4Byte TxIQC_8703B[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u4Byte RxIQC_8703B[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ -+ -+ -+ // IQK time measurement -+ u8Byte IQK_StartTime; -+ u8Byte IQK_ProgressingTime; -+ u4Byte LOK_Result; -+ -+ //for APK -+ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a -+ u1Byte bAPKdone; -+ u1Byte bAPKThermalMeterIgnore; -+ -+ // DPK -+ BOOLEAN bDPKFail; -+ u1Byte bDPdone; -+ u1Byte bDPPathAOK; -+ u1Byte bDPPathBOK; -+ -+ u4Byte TxLOK[2]; -+ u4Byte DpkTxAGC; -+ s4Byte DpkGain; -+ u4Byte DpkThermal[4]; -+ -+ s1Byte Modify_TxAGC_Value_OFDM; -+ s1Byte Modify_TxAGC_Value_CCK; -+}ODM_RF_CAL_T,*PODM_RF_CAL_T; -+ -+ -+ -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPOWERTRACKING_H__ ++#define __PHYDMPOWERTRACKING_H__ ++ ++#define POWRTRACKING_VERSION "1.1" ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++#define TXSCALE_TABLE_SIZE 37 ++#define TXPWR_TRACK_TABLE_SIZE 30 ++#define DELTA_SWINGIDX_SIZE 30 ++#define BAND_NUM 3 ++#define MAX_RF_PATH 4 ++#define CCK_TABLE_SIZE_88F 21 ++ ++ ++#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck ++ ++#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G ++#define AVG_THERMAL_NUM 8 ++#define HP_THERMAL_NUM 8 ++#define IQK_Matrix_REG_NUM 8 ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++ ++#define IQK_BB_REG_NUM 9 ++ ++ ++extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; ++ ++extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; ++ ++// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. ++static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; ++static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ); ++ ++#endif ++ ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++ s4Byte Value[3][IQK_Matrix_REG_NUM]; ++ BOOLEAN bBWIqkResultSaved[3]; ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++typedef struct ODM_RF_Calibration_Structure ++{ ++ //for tx power tracking ++ ++ u4Byte RegA24; // for TempCCK ++ s4Byte RegE94; ++ s4Byte RegE9C; ++ s4Byte RegEB4; ++ s4Byte RegEBC; ++ //u1Byte bTXPowerTracking; ++ u1Byte TXPowercount; ++ BOOLEAN bTXPowerTrackingInit; ++ BOOLEAN bTXPowerTracking; ++ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u1Byte TM_Trigger; ++ u1Byte InternalPA5G[2]; //pathA / pathB ++ ++ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u1Byte ThermalValue; ++ u1Byte ThermalValue_LCK; ++ u1Byte ThermalValue_IQK; ++ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u1Byte ThermalValue_AVG_index; ++ u1Byte ThermalValue_RxGain; ++ ++ BOOLEAN bReloadtxpowerindex; ++ u1Byte bRfPiEnable; ++ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ ++ //------------------------- Tx power Tracking -------------------------// ++ u1Byte bCCKinCH14; ++ u1Byte CCK_index; ++ u1Byte OFDM_index[MAX_RF_PATH]; ++ s1Byte PowerIndexOffset[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndex[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndexLast[MAX_RF_PATH]; ++ BOOLEAN bTxPowerChanged; ++ ++ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; ++ u1Byte ThermalValue_HP_index; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++ u1Byte Delta_LCK; ++ s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB ++ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; ++ ++ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; ++ u1Byte BbSwingIdxOfdmCurrent; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; ++#else ++ u1Byte BbSwingIdxOfdmBase; ++#endif ++ BOOLEAN BbSwingFlagOfdm; ++ u1Byte BbSwingIdxCck; ++ u1Byte BbSwingIdxCckCurrent; ++ u1Byte BbSwingIdxCckBase; ++ u1Byte DefaultOfdmIndex; ++ u1Byte DefaultCckIndex; ++ BOOLEAN BbSwingFlagCck; ++ ++ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_CCKSwingIdx; ++ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ ++ BOOLEAN Modify_TxAGC_Flag_PathA; ++ BOOLEAN Modify_TxAGC_Flag_PathB; ++ BOOLEAN Modify_TxAGC_Flag_PathC; ++ BOOLEAN Modify_TxAGC_Flag_PathD; ++ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; ++ ++ s1Byte KfreeOffset[MAX_RF_PATH]; ++ ++ //--------------------------------------------------------------------// ++ ++ //for IQK ++ u4Byte RegC04; ++ u4Byte Reg874; ++ u4Byte RegC08; ++ u4Byte RegB68; ++ u4Byte RegB6C; ++ u4Byte Reg870; ++ u4Byte Reg860; ++ u4Byte Reg864; ++ ++ BOOLEAN bIQKInitialized; ++ BOOLEAN bLCKInProgress; ++ BOOLEAN bAntennaDetected; ++ BOOLEAN bNeedIQK; ++ BOOLEAN bIQKInProgress; ++ u1Byte Delta_IQK; ++ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; ++ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte IQK_BB_backup_recover[9]; ++ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; ++ u4Byte TxIQC_8723B[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ ++ u4Byte RxIQC_8723B[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ ++ u4Byte TxIQC_8703B[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ ++ u4Byte RxIQC_8703B[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ ++ ++ ++ ++ // IQK time measurement ++ u8Byte IQK_StartTime; ++ u8Byte IQK_ProgressingTime; ++ u4Byte LOK_Result; ++ ++ //for APK ++ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u1Byte bAPKdone; ++ u1Byte bAPKThermalMeterIgnore; ++ ++ // DPK ++ BOOLEAN bDPKFail; ++ u1Byte bDPdone; ++ u1Byte bDPPathAOK; ++ u1Byte bDPPathBOK; ++ ++ u4Byte TxLOK[2]; ++ u4Byte DpkTxAGC; ++ s4Byte DpkGain; ++ u4Byte DpkThermal[4]; ++ ++ s1Byte Modify_TxAGC_Value_OFDM; ++ s1Byte Modify_TxAGC_Value_CCK; ++}ODM_RF_CAL_T,*PODM_RF_CAL_T; ++ ++ ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pre_define.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pre_define.h new file mode 100644 -index 000000000..c64e0d40f +index 0000000..ea89aa0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_pre_define.h @@ -0,0 +1,615 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ -+#ifndef __PHYDMPREDEFINE_H__ -+#define __PHYDMPREDEFINE_H__ -+ -+//1 ============================================================ -+//1 Definition -+//1 ============================================================ -+ -+//Max path of IC -+#define MAX_PATH_NUM_92CS 2 -+#define MAX_PATH_NUM_8188E 1 -+#define MAX_PATH_NUM_8192E 2 -+#define MAX_PATH_NUM_8723B 1 -+#define MAX_PATH_NUM_8812A 2 -+#define MAX_PATH_NUM_8821A 1 -+#define MAX_PATH_NUM_8814A 4 -+#define MAX_PATH_NUM_8822B 2 -+#define MAX_PATH_NUM_8821B 2 -+#define MAX_PATH_NUM_8703B 1 -+#define MAX_PATH_NUM_8188F 1 -+ -+//Max RF path -+#define ODM_RF_PATH_MAX 2 -+#define ODM_RF_PATH_MAX_JAGUAR 4 -+ -+//number of entry -+#if(DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ #define ASSOCIATE_ENTRY_NUM MACID_NUM_SW_LIMIT /* Max size of AsocEntry[].*/ -+ #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ #define ASSOCIATE_ENTRY_NUM NUM_STAT -+ #define ODM_ASSOCIATE_ENTRY_NUM (ASSOCIATE_ENTRY_NUM+1) -+#else -+ #define ODM_ASSOCIATE_ENTRY_NUM ((ASSOCIATE_ENTRY_NUM*3)+1) -+#endif -+ -+/* -----MGN rate--------------------------------- */ -+ -+#define ODM_MGN_1M 0x02 -+#define ODM_MGN_2M 0x04 -+#define ODM_MGN_5_5M 0x0b -+#define ODM_MGN_11M 0x16 -+ -+#define ODM_MGN_6M 0x0c -+#define ODM_MGN_9M 0x12 -+#define ODM_MGN_12M 0x18 -+#define ODM_MGN_18M 0x24 -+#define ODM_MGN_24M 0x30 -+#define ODM_MGN_36M 0x48 -+#define ODM_MGN_48M 0x60 -+#define ODM_MGN_54M 0x6c -+ -+/*TxHT = 1*/ -+#define ODM_MGN_MCS0 0x80 -+#define ODM_MGN_MCS1 0x81 -+#define ODM_MGN_MCS2 0x82 -+#define ODM_MGN_MCS3 0x83 -+#define ODM_MGN_MCS4 0x84 -+#define ODM_MGN_MCS5 0x85 -+#define ODM_MGN_MCS6 0x86 -+#define ODM_MGN_MCS7 0x87 -+#define ODM_MGN_MCS8 0x88 -+#define ODM_MGN_MCS9 0x89 -+#define ODM_MGN_MCS10 0x8a -+#define ODM_MGN_MCS11 0x8b -+#define ODM_MGN_MCS12 0x8c -+#define ODM_MGN_MCS13 0x8d -+#define ODM_MGN_MCS14 0x8e -+#define ODM_MGN_MCS15 0x8f -+#define ODM_MGN_VHT1SS_MCS0 0x90 -+#define ODM_MGN_VHT1SS_MCS1 0x91 -+#define ODM_MGN_VHT1SS_MCS2 0x92 -+#define ODM_MGN_VHT1SS_MCS3 0x93 -+#define ODM_MGN_VHT1SS_MCS4 0x94 -+#define ODM_MGN_VHT1SS_MCS5 0x95 -+#define ODM_MGN_VHT1SS_MCS6 0x96 -+#define ODM_MGN_VHT1SS_MCS7 0x97 -+#define ODM_MGN_VHT1SS_MCS8 0x98 -+#define ODM_MGN_VHT1SS_MCS9 0x99 -+#define ODM_MGN_VHT2SS_MCS0 0x9a -+#define ODM_MGN_VHT2SS_MCS1 0x9b -+#define ODM_MGN_VHT2SS_MCS2 0x9c -+#define ODM_MGN_VHT2SS_MCS3 0x9d -+#define ODM_MGN_VHT2SS_MCS4 0x9e -+#define ODM_MGN_VHT2SS_MCS5 0x9f -+#define ODM_MGN_VHT2SS_MCS6 0xa0 -+#define ODM_MGN_VHT2SS_MCS7 0xa1 -+#define ODM_MGN_VHT2SS_MCS8 0xa2 -+#define ODM_MGN_VHT2SS_MCS9 0xa3 -+ -+#define ODM_MGN_MCS0_SG 0xc0 -+#define ODM_MGN_MCS1_SG 0xc1 -+#define ODM_MGN_MCS2_SG 0xc2 -+#define ODM_MGN_MCS3_SG 0xc3 -+#define ODM_MGN_MCS4_SG 0xc4 -+#define ODM_MGN_MCS5_SG 0xc5 -+#define ODM_MGN_MCS6_SG 0xc6 -+#define ODM_MGN_MCS7_SG 0xc7 -+#define ODM_MGN_MCS8_SG 0xc8 -+#define ODM_MGN_MCS9_SG 0xc9 -+#define ODM_MGN_MCS10_SG 0xca -+#define ODM_MGN_MCS11_SG 0xcb -+#define ODM_MGN_MCS12_SG 0xcc -+#define ODM_MGN_MCS13_SG 0xcd -+#define ODM_MGN_MCS14_SG 0xce -+#define ODM_MGN_MCS15_SG 0xcf -+ -+/* -----DESC rate--------------------------------- */ -+ -+#define ODM_RATEMCS15_SG 0x1c -+#define ODM_RATEMCS32 0x20 -+ -+ -+// CCK Rates, TxHT = 0 -+#define ODM_RATE1M 0x00 -+#define ODM_RATE2M 0x01 -+#define ODM_RATE5_5M 0x02 -+#define ODM_RATE11M 0x03 -+// OFDM Rates, TxHT = 0 -+#define ODM_RATE6M 0x04 -+#define ODM_RATE9M 0x05 -+#define ODM_RATE12M 0x06 -+#define ODM_RATE18M 0x07 -+#define ODM_RATE24M 0x08 -+#define ODM_RATE36M 0x09 -+#define ODM_RATE48M 0x0A -+#define ODM_RATE54M 0x0B -+// MCS Rates, TxHT = 1 -+#define ODM_RATEMCS0 0x0C -+#define ODM_RATEMCS1 0x0D -+#define ODM_RATEMCS2 0x0E -+#define ODM_RATEMCS3 0x0F -+#define ODM_RATEMCS4 0x10 -+#define ODM_RATEMCS5 0x11 -+#define ODM_RATEMCS6 0x12 -+#define ODM_RATEMCS7 0x13 -+#define ODM_RATEMCS8 0x14 -+#define ODM_RATEMCS9 0x15 -+#define ODM_RATEMCS10 0x16 -+#define ODM_RATEMCS11 0x17 -+#define ODM_RATEMCS12 0x18 -+#define ODM_RATEMCS13 0x19 -+#define ODM_RATEMCS14 0x1A -+#define ODM_RATEMCS15 0x1B -+#define ODM_RATEMCS16 0x1C -+#define ODM_RATEMCS17 0x1D -+#define ODM_RATEMCS18 0x1E -+#define ODM_RATEMCS19 0x1F -+#define ODM_RATEMCS20 0x20 -+#define ODM_RATEMCS21 0x21 -+#define ODM_RATEMCS22 0x22 -+#define ODM_RATEMCS23 0x23 -+#define ODM_RATEMCS24 0x24 -+#define ODM_RATEMCS25 0x25 -+#define ODM_RATEMCS26 0x26 -+#define ODM_RATEMCS27 0x27 -+#define ODM_RATEMCS28 0x28 -+#define ODM_RATEMCS29 0x29 -+#define ODM_RATEMCS30 0x2A -+#define ODM_RATEMCS31 0x2B -+#define ODM_RATEVHTSS1MCS0 0x2C -+#define ODM_RATEVHTSS1MCS1 0x2D -+#define ODM_RATEVHTSS1MCS2 0x2E -+#define ODM_RATEVHTSS1MCS3 0x2F -+#define ODM_RATEVHTSS1MCS4 0x30 -+#define ODM_RATEVHTSS1MCS5 0x31 -+#define ODM_RATEVHTSS1MCS6 0x32 -+#define ODM_RATEVHTSS1MCS7 0x33 -+#define ODM_RATEVHTSS1MCS8 0x34 -+#define ODM_RATEVHTSS1MCS9 0x35 -+#define ODM_RATEVHTSS2MCS0 0x36 -+#define ODM_RATEVHTSS2MCS1 0x37 -+#define ODM_RATEVHTSS2MCS2 0x38 -+#define ODM_RATEVHTSS2MCS3 0x39 -+#define ODM_RATEVHTSS2MCS4 0x3A -+#define ODM_RATEVHTSS2MCS5 0x3B -+#define ODM_RATEVHTSS2MCS6 0x3C -+#define ODM_RATEVHTSS2MCS7 0x3D -+#define ODM_RATEVHTSS2MCS8 0x3E -+#define ODM_RATEVHTSS2MCS9 0x3F -+#define ODM_RATEVHTSS3MCS0 0x40 -+#define ODM_RATEVHTSS3MCS1 0x41 -+#define ODM_RATEVHTSS3MCS2 0x42 -+#define ODM_RATEVHTSS3MCS3 0x43 -+#define ODM_RATEVHTSS3MCS4 0x44 -+#define ODM_RATEVHTSS3MCS5 0x45 -+#define ODM_RATEVHTSS3MCS6 0x46 -+#define ODM_RATEVHTSS3MCS7 0x47 -+#define ODM_RATEVHTSS3MCS8 0x48 -+#define ODM_RATEVHTSS3MCS9 0x49 -+#define ODM_RATEVHTSS4MCS0 0x4A -+#define ODM_RATEVHTSS4MCS1 0x4B -+#define ODM_RATEVHTSS4MCS2 0x4C -+#define ODM_RATEVHTSS4MCS3 0x4D -+#define ODM_RATEVHTSS4MCS4 0x4E -+#define ODM_RATEVHTSS4MCS5 0x4F -+#define ODM_RATEVHTSS4MCS6 0x50 -+#define ODM_RATEVHTSS4MCS7 0x51 -+#define ODM_RATEVHTSS4MCS8 0x52 -+#define ODM_RATEVHTSS4MCS9 0x53 -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) -+#else -+ #if (RTL8192E_SUPPORT == 1) -+ #define ODM_NUM_RATE_IDX (ODM_RATEMCS15+1) -+ #elif (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) -+ #define ODM_NUM_RATE_IDX (ODM_RATEMCS7+1) -+ #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) -+ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS1MCS9+1) -+ #elif (RTL8812A_SUPPORT == 1) -+ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS2MCS9+1) -+ #elif(RTL8814A_SUPPORT == 1) -+ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS3MCS9+1) -+ #else -+ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) -+ #endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define CONFIG_SFW_SUPPORTED -+#endif -+ -+//1 ============================================================ -+//1 enumeration -+//1 ============================================================ -+ -+ -+// ODM_CMNINFO_INTERFACE -+typedef enum tag_ODM_Support_Interface_Definition -+{ -+ ODM_ITRF_PCIE = 0x1, -+ ODM_ITRF_USB = 0x2, -+ ODM_ITRF_SDIO = 0x4, -+ ODM_ITRF_ALL = 0x7, -+}ODM_INTERFACE_E; -+ -+// ODM_CMNINFO_IC_TYPE -+typedef enum tag_ODM_Support_IC_Type_Definition -+{ -+ ODM_RTL8192S = BIT0, -+ ODM_RTL8192C = BIT1, -+ ODM_RTL8192D = BIT2, -+ ODM_RTL8723A = BIT3, -+ ODM_RTL8188E = BIT4, -+ ODM_RTL8812 = BIT5, -+ ODM_RTL8821 = BIT6, -+ ODM_RTL8192E = BIT7, -+ ODM_RTL8723B = BIT8, -+ ODM_RTL8814A = BIT9, -+ ODM_RTL8881A = BIT10, -+ ODM_RTL8821B = BIT11, -+ ODM_RTL8822B = BIT12, -+ ODM_RTL8703B = BIT13, -+ ODM_RTL8195A = BIT14, -+ ODM_RTL8188F = BIT15 -+}ODM_IC_TYPE_E; -+ -+ -+ -+ -+#define ODM_IC_11N_SERIES (ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8703B|ODM_RTL8188F) -+#define ODM_IC_11AC_SERIES (ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A|ODM_RTL8821B|ODM_RTL8822B) -+#define ODM_IC_TXBF_SUPPORT (ODM_RTL8192E|ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A|ODM_RTL8822B) -+#define ODM_IC_11N_GAIN_IDX_EDCCA (ODM_RTL8195A|ODM_RTL8703B|ODM_RTL8188F) -+#define ODM_IC_11AC_GAIN_IDX_EDCCA (ODM_RTL8814A|ODM_RTL8822B) -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+#ifdef RTK_AC_SUPPORT -+#define ODM_IC_11AC_SERIES_SUPPORT 1 -+#else -+#define ODM_IC_11AC_SERIES_SUPPORT 0 -+#endif -+ -+#define ODM_IC_11N_SERIES_SUPPORT 1 -+#define ODM_CONFIG_BT_COEXIST 0 -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#define ODM_IC_11AC_SERIES_SUPPORT 1 -+#define ODM_IC_11N_SERIES_SUPPORT 1 -+#define ODM_CONFIG_BT_COEXIST 1 -+ -+#else -+ -+#if((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1) || (RTL8723A_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) ||\ -+(RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8195A_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) || \ -+(RTL8188F_SUPPORT == 1)) -+#define ODM_IC_11N_SERIES_SUPPORT 1 -+#define ODM_IC_11AC_SERIES_SUPPORT 0 -+#else -+#define ODM_IC_11N_SERIES_SUPPORT 0 -+#define ODM_IC_11AC_SERIES_SUPPORT 1 -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+#define ODM_CONFIG_BT_COEXIST 1 -+#else -+#define ODM_CONFIG_BT_COEXIST 0 -+#endif -+ -+#endif -+ -+ -+//ODM_CMNINFO_CUT_VER -+typedef enum tag_ODM_Cut_Version_Definition -+{ -+ ODM_CUT_A = 0, -+ ODM_CUT_B = 1, -+ ODM_CUT_C = 2, -+ ODM_CUT_D = 3, -+ ODM_CUT_E = 4, -+ ODM_CUT_F = 5, -+ -+ ODM_CUT_I = 8, -+ ODM_CUT_J = 9, -+ ODM_CUT_K = 10, -+ ODM_CUT_TEST = 15, -+}ODM_CUT_VERSION_E; -+ -+// ODM_CMNINFO_FAB_VER -+typedef enum tag_ODM_Fab_Version_Definition -+{ -+ ODM_TSMC = 0, -+ ODM_UMC = 1, -+}ODM_FAB_E; -+ -+// ODM_CMNINFO_RF_TYPE -+// -+// For example 1T2R (A+AB = BIT0|BIT4|BIT5) -+// -+typedef enum tag_ODM_RF_Path_Bit_Definition -+{ -+ ODM_RF_A = BIT0, -+ ODM_RF_B = BIT1, -+ ODM_RF_C = BIT2, -+ ODM_RF_D = BIT3, -+}ODM_RF_PATH_E; -+ -+typedef enum tag_PHYDM_RF_TX_NUM { -+ ODM_1T = 1, -+ ODM_2T = 2, -+ ODM_3T = 3, -+ ODM_4T = 4, -+} ODM_RF_TX_NUM_E; -+ -+typedef enum tag_ODM_RF_Type_Definition { -+ ODM_1T1R, -+ ODM_1T2R, -+ ODM_2T2R, -+ ODM_2T2R_GREEN, -+ ODM_2T3R, -+ ODM_2T4R, -+ ODM_3T3R, -+ ODM_3T4R, -+ ODM_4T4R, -+ ODM_XTXR -+}ODM_RF_TYPE_E; -+ -+ -+typedef enum tag_ODM_MAC_PHY_Mode_Definition -+{ -+ ODM_SMSP = 0, -+ ODM_DMSP = 1, -+ ODM_DMDP = 2, -+}ODM_MAC_PHY_MODE_E; -+ -+ -+typedef enum tag_BT_Coexist_Definition -+{ -+ ODM_BT_BUSY = 1, -+ ODM_BT_ON = 2, -+ ODM_BT_OFF = 3, -+ ODM_BT_NONE = 4, -+}ODM_BT_COEXIST_E; -+ -+// ODM_CMNINFO_OP_MODE -+typedef enum tag_Operation_Mode_Definition -+{ -+ ODM_NO_LINK = BIT0, -+ ODM_LINK = BIT1, -+ ODM_SCAN = BIT2, -+ ODM_POWERSAVE = BIT3, -+ ODM_AP_MODE = BIT4, -+ ODM_CLIENT_MODE = BIT5, -+ ODM_AD_HOC = BIT6, -+ ODM_WIFI_DIRECT = BIT7, -+ ODM_WIFI_DISPLAY = BIT8, -+}ODM_OPERATION_MODE_E; -+ -+// ODM_CMNINFO_WM_MODE -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+typedef enum tag_Wireless_Mode_Definition -+{ -+ ODM_WM_UNKNOW = 0x0, -+ ODM_WM_B = BIT0, -+ ODM_WM_G = BIT1, -+ ODM_WM_A = BIT2, -+ ODM_WM_N24G = BIT3, -+ ODM_WM_N5G = BIT4, -+ ODM_WM_AUTO = BIT5, -+ ODM_WM_AC = BIT6, -+}ODM_WIRELESS_MODE_E; -+#else -+typedef enum tag_Wireless_Mode_Definition -+{ -+ ODM_WM_UNKNOWN = 0x00,/*0x0*/ -+ ODM_WM_A = BIT0, /* 0x1*/ -+ ODM_WM_B = BIT1, /* 0x2*/ -+ ODM_WM_G = BIT2,/* 0x4*/ -+ ODM_WM_AUTO = BIT3,/* 0x8*/ -+ ODM_WM_N24G = BIT4,/* 0x10*/ -+ ODM_WM_N5G = BIT5,/* 0x20*/ -+ ODM_WM_AC_5G = BIT6,/* 0x40*/ -+ ODM_WM_AC_24G = BIT7,/* 0x80*/ -+ ODM_WM_AC_ONLY = BIT8,/* 0x100*/ -+ ODM_WM_MAX = BIT11/* 0x800*/ -+ -+}ODM_WIRELESS_MODE_E; -+#endif -+ -+// ODM_CMNINFO_BAND -+typedef enum tag_Band_Type_Definition -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ ODM_BAND_2_4G = BIT0, -+ ODM_BAND_5G = BIT1, -+#else -+ ODM_BAND_2_4G = 0, -+ ODM_BAND_5G, -+ ODM_BAND_ON_BOTH, -+ ODM_BANDMAX -+#endif -+}ODM_BAND_TYPE_E; -+ -+ -+// ODM_CMNINFO_SEC_CHNL_OFFSET -+typedef enum tag_Secondary_Channel_Offset_Definition -+{ -+ ODM_DONT_CARE = 0, -+ ODM_BELOW = 1, -+ ODM_ABOVE = 2 -+}ODM_SEC_CHNL_OFFSET_E; -+ -+// ODM_CMNINFO_SEC_MODE -+typedef enum tag_Security_Definition -+{ -+ ODM_SEC_OPEN = 0, -+ ODM_SEC_WEP40 = 1, -+ ODM_SEC_TKIP = 2, -+ ODM_SEC_RESERVE = 3, -+ ODM_SEC_AESCCMP = 4, -+ ODM_SEC_WEP104 = 5, -+ ODM_WEP_WPA_MIXED = 6, // WEP + WPA -+ ODM_SEC_SMS4 = 7, -+}ODM_SECURITY_E; -+ -+// ODM_CMNINFO_BW -+typedef enum tag_Bandwidth_Definition -+{ -+ ODM_BW20M = 0, -+ ODM_BW40M = 1, -+ ODM_BW80M = 2, -+ ODM_BW160M = 3, -+ ODM_BW5M = 4, -+ ODM_BW10M = 5, -+ ODM_BW_MAX = 6 -+}ODM_BW_E; -+ -+// ODM_CMNINFO_CHNL -+ -+// ODM_CMNINFO_BOARD_TYPE -+typedef enum tag_Board_Definition -+{ -+ ODM_BOARD_DEFAULT = 0, // The DEFAULT case. -+ ODM_BOARD_MINICARD = BIT(0), // 0 = non-mini card, 1= mini card. -+ ODM_BOARD_SLIM = BIT(1), // 0 = non-slim card, 1 = slim card -+ ODM_BOARD_BT = BIT(2), // 0 = without BT card, 1 = with BT -+ ODM_BOARD_EXT_PA = BIT(3), // 0 = no 2G ext-PA, 1 = existing 2G ext-PA -+ ODM_BOARD_EXT_LNA = BIT(4), // 0 = no 2G ext-LNA, 1 = existing 2G ext-LNA -+ ODM_BOARD_EXT_TRSW = BIT(5), // 0 = no ext-TRSW, 1 = existing ext-TRSW -+ ODM_BOARD_EXT_PA_5G = BIT(6), // 0 = no 5G ext-PA, 1 = existing 5G ext-PA -+ ODM_BOARD_EXT_LNA_5G= BIT(7), // 0 = no 5G ext-LNA, 1 = existing 5G ext-LNA -+}ODM_BOARD_TYPE_E; -+ -+typedef enum tag_ODM_Package_Definition -+{ -+ ODM_PACKAGE_DEFAULT = 0, -+ ODM_PACKAGE_QFN68 = BIT(0), -+ ODM_PACKAGE_TFBGA90 = BIT(1), -+ ODM_PACKAGE_TFBGA79 = BIT(2), -+}ODM_Package_TYPE_E; -+ -+typedef enum tag_ODM_TYPE_GPA_Definition { -+ TYPE_GPA0 = 0x0000, -+ TYPE_GPA1 = 0x0055, -+ TYPE_GPA2 = 0x00AA, -+ TYPE_GPA3 = 0x00FF, -+ TYPE_GPA4 = 0x5500, -+ TYPE_GPA5 = 0x5555, -+ TYPE_GPA6 = 0x55AA, -+ TYPE_GPA7 = 0x55FF, -+ TYPE_GPA8 = 0xAA00, -+ TYPE_GPA9 = 0xAA55, -+ TYPE_GPA10 = 0xAAAA, -+ TYPE_GPA11 = 0xAAFF, -+ TYPE_GPA12 = 0xFF00, -+ TYPE_GPA13 = 0xFF55, -+ TYPE_GPA14 = 0xFFAA, -+ TYPE_GPA15 = 0xFFFF, -+}ODM_TYPE_GPA_E; -+ -+typedef enum tag_ODM_TYPE_APA_Definition { -+ TYPE_APA0 = 0x0000, -+ TYPE_APA1 = 0x0055, -+ TYPE_APA2 = 0x00AA, -+ TYPE_APA3 = 0x00FF, -+ TYPE_APA4 = 0x5500, -+ TYPE_APA5 = 0x5555, -+ TYPE_APA6 = 0x55AA, -+ TYPE_APA7 = 0x55FF, -+ TYPE_APA8 = 0xAA00, -+ TYPE_APA9 = 0xAA55, -+ TYPE_APA10 = 0xAAAA, -+ TYPE_APA11 = 0xAAFF, -+ TYPE_APA12 = 0xFF00, -+ TYPE_APA13 = 0xFF55, -+ TYPE_APA14 = 0xFFAA, -+ TYPE_APA15 = 0xFFFF, -+}ODM_TYPE_APA_E; -+ -+typedef enum tag_ODM_TYPE_GLNA_Definition { -+ TYPE_GLNA0 = 0x0000, -+ TYPE_GLNA1 = 0x0055, -+ TYPE_GLNA2 = 0x00AA, -+ TYPE_GLNA3 = 0x00FF, -+ TYPE_GLNA4 = 0x5500, -+ TYPE_GLNA5 = 0x5555, -+ TYPE_GLNA6 = 0x55AA, -+ TYPE_GLNA7 = 0x55FF, -+ TYPE_GLNA8 = 0xAA00, -+ TYPE_GLNA9 = 0xAA55, -+ TYPE_GLNA10 = 0xAAAA, -+ TYPE_GLNA11 = 0xAAFF, -+ TYPE_GLNA12 = 0xFF00, -+ TYPE_GLNA13 = 0xFF55, -+ TYPE_GLNA14 = 0xFFAA, -+ TYPE_GLNA15 = 0xFFFF, -+}ODM_TYPE_GLNA_E; -+ -+typedef enum tag_ODM_TYPE_ALNA_Definition { -+ TYPE_ALNA0 = 0x0000, -+ TYPE_ALNA1 = 0x0055, -+ TYPE_ALNA2 = 0x00AA, -+ TYPE_ALNA3 = 0x00FF, -+ TYPE_ALNA4 = 0x5500, -+ TYPE_ALNA5 = 0x5555, -+ TYPE_ALNA6 = 0x55AA, -+ TYPE_ALNA7 = 0x55FF, -+ TYPE_ALNA8 = 0xAA00, -+ TYPE_ALNA9 = 0xAA55, -+ TYPE_ALNA10 = 0xAAAA, -+ TYPE_ALNA11 = 0xAAFF, -+ TYPE_ALNA12 = 0xFF00, -+ TYPE_ALNA13 = 0xFF55, -+ TYPE_ALNA14 = 0xFFAA, -+ TYPE_ALNA15 = 0xFFFF, -+}ODM_TYPE_ALNA_E; -+ -+ -+typedef enum _ODM_RF_RADIO_PATH { -+ ODM_RF_PATH_A = 0, //Radio Path A -+ ODM_RF_PATH_B = 1, //Radio Path B -+ ODM_RF_PATH_C = 2, //Radio Path C -+ ODM_RF_PATH_D = 3, //Radio Path D -+ ODM_RF_PATH_AB, -+ ODM_RF_PATH_AC, -+ ODM_RF_PATH_AD, -+ ODM_RF_PATH_BC, -+ ODM_RF_PATH_BD, -+ ODM_RF_PATH_CD, -+ ODM_RF_PATH_ABC, -+ ODM_RF_PATH_ACD, -+ ODM_RF_PATH_BCD, -+ ODM_RF_PATH_ABCD, -+ // ODM_RF_PATH_MAX, //Max RF number 90 support -+} ODM_RF_RADIO_PATH_E, *PODM_RF_RADIO_PATH_E; -+ -+typedef enum _ODM_PARAMETER_INIT { -+ ODM_PRE_SETTING = 0, -+ ODM_POST_SETTING = 1, -+} ODM_PARAMETER_INIT_E; -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __PHYDMPREDEFINE_H__ ++#define __PHYDMPREDEFINE_H__ ++ ++//1 ============================================================ ++//1 Definition ++//1 ============================================================ ++ ++//Max path of IC ++#define MAX_PATH_NUM_92CS 2 ++#define MAX_PATH_NUM_8188E 1 ++#define MAX_PATH_NUM_8192E 2 ++#define MAX_PATH_NUM_8723B 1 ++#define MAX_PATH_NUM_8812A 2 ++#define MAX_PATH_NUM_8821A 1 ++#define MAX_PATH_NUM_8814A 4 ++#define MAX_PATH_NUM_8822B 2 ++#define MAX_PATH_NUM_8821B 2 ++#define MAX_PATH_NUM_8703B 1 ++#define MAX_PATH_NUM_8188F 1 ++ ++//Max RF path ++#define ODM_RF_PATH_MAX 2 ++#define ODM_RF_PATH_MAX_JAGUAR 4 ++ ++//number of entry ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ #define ASSOCIATE_ENTRY_NUM MACID_NUM_SW_LIMIT /* Max size of AsocEntry[].*/ ++ #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ #define ASSOCIATE_ENTRY_NUM NUM_STAT ++ #define ODM_ASSOCIATE_ENTRY_NUM (ASSOCIATE_ENTRY_NUM+1) ++#else ++ #define ODM_ASSOCIATE_ENTRY_NUM ((ASSOCIATE_ENTRY_NUM*3)+1) ++#endif ++ ++/* -----MGN rate--------------------------------- */ ++ ++#define ODM_MGN_1M 0x02 ++#define ODM_MGN_2M 0x04 ++#define ODM_MGN_5_5M 0x0b ++#define ODM_MGN_11M 0x16 ++ ++#define ODM_MGN_6M 0x0c ++#define ODM_MGN_9M 0x12 ++#define ODM_MGN_12M 0x18 ++#define ODM_MGN_18M 0x24 ++#define ODM_MGN_24M 0x30 ++#define ODM_MGN_36M 0x48 ++#define ODM_MGN_48M 0x60 ++#define ODM_MGN_54M 0x6c ++ ++/*TxHT = 1*/ ++#define ODM_MGN_MCS0 0x80 ++#define ODM_MGN_MCS1 0x81 ++#define ODM_MGN_MCS2 0x82 ++#define ODM_MGN_MCS3 0x83 ++#define ODM_MGN_MCS4 0x84 ++#define ODM_MGN_MCS5 0x85 ++#define ODM_MGN_MCS6 0x86 ++#define ODM_MGN_MCS7 0x87 ++#define ODM_MGN_MCS8 0x88 ++#define ODM_MGN_MCS9 0x89 ++#define ODM_MGN_MCS10 0x8a ++#define ODM_MGN_MCS11 0x8b ++#define ODM_MGN_MCS12 0x8c ++#define ODM_MGN_MCS13 0x8d ++#define ODM_MGN_MCS14 0x8e ++#define ODM_MGN_MCS15 0x8f ++#define ODM_MGN_VHT1SS_MCS0 0x90 ++#define ODM_MGN_VHT1SS_MCS1 0x91 ++#define ODM_MGN_VHT1SS_MCS2 0x92 ++#define ODM_MGN_VHT1SS_MCS3 0x93 ++#define ODM_MGN_VHT1SS_MCS4 0x94 ++#define ODM_MGN_VHT1SS_MCS5 0x95 ++#define ODM_MGN_VHT1SS_MCS6 0x96 ++#define ODM_MGN_VHT1SS_MCS7 0x97 ++#define ODM_MGN_VHT1SS_MCS8 0x98 ++#define ODM_MGN_VHT1SS_MCS9 0x99 ++#define ODM_MGN_VHT2SS_MCS0 0x9a ++#define ODM_MGN_VHT2SS_MCS1 0x9b ++#define ODM_MGN_VHT2SS_MCS2 0x9c ++#define ODM_MGN_VHT2SS_MCS3 0x9d ++#define ODM_MGN_VHT2SS_MCS4 0x9e ++#define ODM_MGN_VHT2SS_MCS5 0x9f ++#define ODM_MGN_VHT2SS_MCS6 0xa0 ++#define ODM_MGN_VHT2SS_MCS7 0xa1 ++#define ODM_MGN_VHT2SS_MCS8 0xa2 ++#define ODM_MGN_VHT2SS_MCS9 0xa3 ++ ++#define ODM_MGN_MCS0_SG 0xc0 ++#define ODM_MGN_MCS1_SG 0xc1 ++#define ODM_MGN_MCS2_SG 0xc2 ++#define ODM_MGN_MCS3_SG 0xc3 ++#define ODM_MGN_MCS4_SG 0xc4 ++#define ODM_MGN_MCS5_SG 0xc5 ++#define ODM_MGN_MCS6_SG 0xc6 ++#define ODM_MGN_MCS7_SG 0xc7 ++#define ODM_MGN_MCS8_SG 0xc8 ++#define ODM_MGN_MCS9_SG 0xc9 ++#define ODM_MGN_MCS10_SG 0xca ++#define ODM_MGN_MCS11_SG 0xcb ++#define ODM_MGN_MCS12_SG 0xcc ++#define ODM_MGN_MCS13_SG 0xcd ++#define ODM_MGN_MCS14_SG 0xce ++#define ODM_MGN_MCS15_SG 0xcf ++ ++/* -----DESC rate--------------------------------- */ ++ ++#define ODM_RATEMCS15_SG 0x1c ++#define ODM_RATEMCS32 0x20 ++ ++ ++// CCK Rates, TxHT = 0 ++#define ODM_RATE1M 0x00 ++#define ODM_RATE2M 0x01 ++#define ODM_RATE5_5M 0x02 ++#define ODM_RATE11M 0x03 ++// OFDM Rates, TxHT = 0 ++#define ODM_RATE6M 0x04 ++#define ODM_RATE9M 0x05 ++#define ODM_RATE12M 0x06 ++#define ODM_RATE18M 0x07 ++#define ODM_RATE24M 0x08 ++#define ODM_RATE36M 0x09 ++#define ODM_RATE48M 0x0A ++#define ODM_RATE54M 0x0B ++// MCS Rates, TxHT = 1 ++#define ODM_RATEMCS0 0x0C ++#define ODM_RATEMCS1 0x0D ++#define ODM_RATEMCS2 0x0E ++#define ODM_RATEMCS3 0x0F ++#define ODM_RATEMCS4 0x10 ++#define ODM_RATEMCS5 0x11 ++#define ODM_RATEMCS6 0x12 ++#define ODM_RATEMCS7 0x13 ++#define ODM_RATEMCS8 0x14 ++#define ODM_RATEMCS9 0x15 ++#define ODM_RATEMCS10 0x16 ++#define ODM_RATEMCS11 0x17 ++#define ODM_RATEMCS12 0x18 ++#define ODM_RATEMCS13 0x19 ++#define ODM_RATEMCS14 0x1A ++#define ODM_RATEMCS15 0x1B ++#define ODM_RATEMCS16 0x1C ++#define ODM_RATEMCS17 0x1D ++#define ODM_RATEMCS18 0x1E ++#define ODM_RATEMCS19 0x1F ++#define ODM_RATEMCS20 0x20 ++#define ODM_RATEMCS21 0x21 ++#define ODM_RATEMCS22 0x22 ++#define ODM_RATEMCS23 0x23 ++#define ODM_RATEMCS24 0x24 ++#define ODM_RATEMCS25 0x25 ++#define ODM_RATEMCS26 0x26 ++#define ODM_RATEMCS27 0x27 ++#define ODM_RATEMCS28 0x28 ++#define ODM_RATEMCS29 0x29 ++#define ODM_RATEMCS30 0x2A ++#define ODM_RATEMCS31 0x2B ++#define ODM_RATEVHTSS1MCS0 0x2C ++#define ODM_RATEVHTSS1MCS1 0x2D ++#define ODM_RATEVHTSS1MCS2 0x2E ++#define ODM_RATEVHTSS1MCS3 0x2F ++#define ODM_RATEVHTSS1MCS4 0x30 ++#define ODM_RATEVHTSS1MCS5 0x31 ++#define ODM_RATEVHTSS1MCS6 0x32 ++#define ODM_RATEVHTSS1MCS7 0x33 ++#define ODM_RATEVHTSS1MCS8 0x34 ++#define ODM_RATEVHTSS1MCS9 0x35 ++#define ODM_RATEVHTSS2MCS0 0x36 ++#define ODM_RATEVHTSS2MCS1 0x37 ++#define ODM_RATEVHTSS2MCS2 0x38 ++#define ODM_RATEVHTSS2MCS3 0x39 ++#define ODM_RATEVHTSS2MCS4 0x3A ++#define ODM_RATEVHTSS2MCS5 0x3B ++#define ODM_RATEVHTSS2MCS6 0x3C ++#define ODM_RATEVHTSS2MCS7 0x3D ++#define ODM_RATEVHTSS2MCS8 0x3E ++#define ODM_RATEVHTSS2MCS9 0x3F ++#define ODM_RATEVHTSS3MCS0 0x40 ++#define ODM_RATEVHTSS3MCS1 0x41 ++#define ODM_RATEVHTSS3MCS2 0x42 ++#define ODM_RATEVHTSS3MCS3 0x43 ++#define ODM_RATEVHTSS3MCS4 0x44 ++#define ODM_RATEVHTSS3MCS5 0x45 ++#define ODM_RATEVHTSS3MCS6 0x46 ++#define ODM_RATEVHTSS3MCS7 0x47 ++#define ODM_RATEVHTSS3MCS8 0x48 ++#define ODM_RATEVHTSS3MCS9 0x49 ++#define ODM_RATEVHTSS4MCS0 0x4A ++#define ODM_RATEVHTSS4MCS1 0x4B ++#define ODM_RATEVHTSS4MCS2 0x4C ++#define ODM_RATEVHTSS4MCS3 0x4D ++#define ODM_RATEVHTSS4MCS4 0x4E ++#define ODM_RATEVHTSS4MCS5 0x4F ++#define ODM_RATEVHTSS4MCS6 0x50 ++#define ODM_RATEVHTSS4MCS7 0x51 ++#define ODM_RATEVHTSS4MCS8 0x52 ++#define ODM_RATEVHTSS4MCS9 0x53 ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) ++#else ++ #if (RTL8192E_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEMCS15+1) ++ #elif (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEMCS7+1) ++ #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS1MCS9+1) ++ #elif (RTL8812A_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS2MCS9+1) ++ #elif(RTL8814A_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS3MCS9+1) ++ #else ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) ++ #endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define CONFIG_SFW_SUPPORTED ++#endif ++ ++//1 ============================================================ ++//1 enumeration ++//1 ============================================================ ++ ++ ++// ODM_CMNINFO_INTERFACE ++typedef enum tag_ODM_Support_Interface_Definition ++{ ++ ODM_ITRF_PCIE = 0x1, ++ ODM_ITRF_USB = 0x2, ++ ODM_ITRF_SDIO = 0x4, ++ ODM_ITRF_ALL = 0x7, ++}ODM_INTERFACE_E; ++ ++// ODM_CMNINFO_IC_TYPE ++typedef enum tag_ODM_Support_IC_Type_Definition ++{ ++ ODM_RTL8192S = BIT0, ++ ODM_RTL8192C = BIT1, ++ ODM_RTL8192D = BIT2, ++ ODM_RTL8723A = BIT3, ++ ODM_RTL8188E = BIT4, ++ ODM_RTL8812 = BIT5, ++ ODM_RTL8821 = BIT6, ++ ODM_RTL8192E = BIT7, ++ ODM_RTL8723B = BIT8, ++ ODM_RTL8814A = BIT9, ++ ODM_RTL8881A = BIT10, ++ ODM_RTL8821B = BIT11, ++ ODM_RTL8822B = BIT12, ++ ODM_RTL8703B = BIT13, ++ ODM_RTL8195A = BIT14, ++ ODM_RTL8188F = BIT15 ++}ODM_IC_TYPE_E; ++ ++ ++ ++ ++#define ODM_IC_11N_SERIES (ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8703B|ODM_RTL8188F) ++#define ODM_IC_11AC_SERIES (ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A|ODM_RTL8821B|ODM_RTL8822B) ++#define ODM_IC_TXBF_SUPPORT (ODM_RTL8192E|ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A|ODM_RTL8822B) ++#define ODM_IC_11N_GAIN_IDX_EDCCA (ODM_RTL8195A|ODM_RTL8703B|ODM_RTL8188F) ++#define ODM_IC_11AC_GAIN_IDX_EDCCA (ODM_RTL8814A|ODM_RTL8822B) ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++#ifdef RTK_AC_SUPPORT ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#else ++#define ODM_IC_11AC_SERIES_SUPPORT 0 ++#endif ++ ++#define ODM_IC_11N_SERIES_SUPPORT 1 ++#define ODM_CONFIG_BT_COEXIST 0 ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#define ODM_IC_11N_SERIES_SUPPORT 1 ++#define ODM_CONFIG_BT_COEXIST 1 ++ ++#else ++ ++#if((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1) || (RTL8723A_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) ||\ ++(RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8195A_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) || \ ++(RTL8188F_SUPPORT == 1)) ++#define ODM_IC_11N_SERIES_SUPPORT 1 ++#define ODM_IC_11AC_SERIES_SUPPORT 0 ++#else ++#define ODM_IC_11N_SERIES_SUPPORT 0 ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++#define ODM_CONFIG_BT_COEXIST 1 ++#else ++#define ODM_CONFIG_BT_COEXIST 0 ++#endif ++ ++#endif ++ ++ ++//ODM_CMNINFO_CUT_VER ++typedef enum tag_ODM_Cut_Version_Definition ++{ ++ ODM_CUT_A = 0, ++ ODM_CUT_B = 1, ++ ODM_CUT_C = 2, ++ ODM_CUT_D = 3, ++ ODM_CUT_E = 4, ++ ODM_CUT_F = 5, ++ ++ ODM_CUT_I = 8, ++ ODM_CUT_J = 9, ++ ODM_CUT_K = 10, ++ ODM_CUT_TEST = 15, ++}ODM_CUT_VERSION_E; ++ ++// ODM_CMNINFO_FAB_VER ++typedef enum tag_ODM_Fab_Version_Definition ++{ ++ ODM_TSMC = 0, ++ ODM_UMC = 1, ++}ODM_FAB_E; ++ ++// ODM_CMNINFO_RF_TYPE ++// ++// For example 1T2R (A+AB = BIT0|BIT4|BIT5) ++// ++typedef enum tag_ODM_RF_Path_Bit_Definition ++{ ++ ODM_RF_A = BIT0, ++ ODM_RF_B = BIT1, ++ ODM_RF_C = BIT2, ++ ODM_RF_D = BIT3, ++}ODM_RF_PATH_E; ++ ++typedef enum tag_PHYDM_RF_TX_NUM { ++ ODM_1T = 1, ++ ODM_2T = 2, ++ ODM_3T = 3, ++ ODM_4T = 4, ++} ODM_RF_TX_NUM_E; ++ ++typedef enum tag_ODM_RF_Type_Definition { ++ ODM_1T1R, ++ ODM_1T2R, ++ ODM_2T2R, ++ ODM_2T2R_GREEN, ++ ODM_2T3R, ++ ODM_2T4R, ++ ODM_3T3R, ++ ODM_3T4R, ++ ODM_4T4R, ++ ODM_XTXR ++}ODM_RF_TYPE_E; ++ ++ ++typedef enum tag_ODM_MAC_PHY_Mode_Definition ++{ ++ ODM_SMSP = 0, ++ ODM_DMSP = 1, ++ ODM_DMDP = 2, ++}ODM_MAC_PHY_MODE_E; ++ ++ ++typedef enum tag_BT_Coexist_Definition ++{ ++ ODM_BT_BUSY = 1, ++ ODM_BT_ON = 2, ++ ODM_BT_OFF = 3, ++ ODM_BT_NONE = 4, ++}ODM_BT_COEXIST_E; ++ ++// ODM_CMNINFO_OP_MODE ++typedef enum tag_Operation_Mode_Definition ++{ ++ ODM_NO_LINK = BIT0, ++ ODM_LINK = BIT1, ++ ODM_SCAN = BIT2, ++ ODM_POWERSAVE = BIT3, ++ ODM_AP_MODE = BIT4, ++ ODM_CLIENT_MODE = BIT5, ++ ODM_AD_HOC = BIT6, ++ ODM_WIFI_DIRECT = BIT7, ++ ODM_WIFI_DISPLAY = BIT8, ++}ODM_OPERATION_MODE_E; ++ ++// ODM_CMNINFO_WM_MODE ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++typedef enum tag_Wireless_Mode_Definition ++{ ++ ODM_WM_UNKNOW = 0x0, ++ ODM_WM_B = BIT0, ++ ODM_WM_G = BIT1, ++ ODM_WM_A = BIT2, ++ ODM_WM_N24G = BIT3, ++ ODM_WM_N5G = BIT4, ++ ODM_WM_AUTO = BIT5, ++ ODM_WM_AC = BIT6, ++}ODM_WIRELESS_MODE_E; ++#else ++typedef enum tag_Wireless_Mode_Definition ++{ ++ ODM_WM_UNKNOWN = 0x00,/*0x0*/ ++ ODM_WM_A = BIT0, /* 0x1*/ ++ ODM_WM_B = BIT1, /* 0x2*/ ++ ODM_WM_G = BIT2,/* 0x4*/ ++ ODM_WM_AUTO = BIT3,/* 0x8*/ ++ ODM_WM_N24G = BIT4,/* 0x10*/ ++ ODM_WM_N5G = BIT5,/* 0x20*/ ++ ODM_WM_AC_5G = BIT6,/* 0x40*/ ++ ODM_WM_AC_24G = BIT7,/* 0x80*/ ++ ODM_WM_AC_ONLY = BIT8,/* 0x100*/ ++ ODM_WM_MAX = BIT11/* 0x800*/ ++ ++}ODM_WIRELESS_MODE_E; ++#endif ++ ++// ODM_CMNINFO_BAND ++typedef enum tag_Band_Type_Definition ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ ODM_BAND_2_4G = BIT0, ++ ODM_BAND_5G = BIT1, ++#else ++ ODM_BAND_2_4G = 0, ++ ODM_BAND_5G, ++ ODM_BAND_ON_BOTH, ++ ODM_BANDMAX ++#endif ++}ODM_BAND_TYPE_E; ++ ++ ++// ODM_CMNINFO_SEC_CHNL_OFFSET ++typedef enum tag_Secondary_Channel_Offset_Definition ++{ ++ ODM_DONT_CARE = 0, ++ ODM_BELOW = 1, ++ ODM_ABOVE = 2 ++}ODM_SEC_CHNL_OFFSET_E; ++ ++// ODM_CMNINFO_SEC_MODE ++typedef enum tag_Security_Definition ++{ ++ ODM_SEC_OPEN = 0, ++ ODM_SEC_WEP40 = 1, ++ ODM_SEC_TKIP = 2, ++ ODM_SEC_RESERVE = 3, ++ ODM_SEC_AESCCMP = 4, ++ ODM_SEC_WEP104 = 5, ++ ODM_WEP_WPA_MIXED = 6, // WEP + WPA ++ ODM_SEC_SMS4 = 7, ++}ODM_SECURITY_E; ++ ++// ODM_CMNINFO_BW ++typedef enum tag_Bandwidth_Definition ++{ ++ ODM_BW20M = 0, ++ ODM_BW40M = 1, ++ ODM_BW80M = 2, ++ ODM_BW160M = 3, ++ ODM_BW5M = 4, ++ ODM_BW10M = 5, ++ ODM_BW_MAX = 6 ++}ODM_BW_E; ++ ++// ODM_CMNINFO_CHNL ++ ++// ODM_CMNINFO_BOARD_TYPE ++typedef enum tag_Board_Definition ++{ ++ ODM_BOARD_DEFAULT = 0, // The DEFAULT case. ++ ODM_BOARD_MINICARD = BIT(0), // 0 = non-mini card, 1= mini card. ++ ODM_BOARD_SLIM = BIT(1), // 0 = non-slim card, 1 = slim card ++ ODM_BOARD_BT = BIT(2), // 0 = without BT card, 1 = with BT ++ ODM_BOARD_EXT_PA = BIT(3), // 0 = no 2G ext-PA, 1 = existing 2G ext-PA ++ ODM_BOARD_EXT_LNA = BIT(4), // 0 = no 2G ext-LNA, 1 = existing 2G ext-LNA ++ ODM_BOARD_EXT_TRSW = BIT(5), // 0 = no ext-TRSW, 1 = existing ext-TRSW ++ ODM_BOARD_EXT_PA_5G = BIT(6), // 0 = no 5G ext-PA, 1 = existing 5G ext-PA ++ ODM_BOARD_EXT_LNA_5G= BIT(7), // 0 = no 5G ext-LNA, 1 = existing 5G ext-LNA ++}ODM_BOARD_TYPE_E; ++ ++typedef enum tag_ODM_Package_Definition ++{ ++ ODM_PACKAGE_DEFAULT = 0, ++ ODM_PACKAGE_QFN68 = BIT(0), ++ ODM_PACKAGE_TFBGA90 = BIT(1), ++ ODM_PACKAGE_TFBGA79 = BIT(2), ++}ODM_Package_TYPE_E; ++ ++typedef enum tag_ODM_TYPE_GPA_Definition { ++ TYPE_GPA0 = 0x0000, ++ TYPE_GPA1 = 0x0055, ++ TYPE_GPA2 = 0x00AA, ++ TYPE_GPA3 = 0x00FF, ++ TYPE_GPA4 = 0x5500, ++ TYPE_GPA5 = 0x5555, ++ TYPE_GPA6 = 0x55AA, ++ TYPE_GPA7 = 0x55FF, ++ TYPE_GPA8 = 0xAA00, ++ TYPE_GPA9 = 0xAA55, ++ TYPE_GPA10 = 0xAAAA, ++ TYPE_GPA11 = 0xAAFF, ++ TYPE_GPA12 = 0xFF00, ++ TYPE_GPA13 = 0xFF55, ++ TYPE_GPA14 = 0xFFAA, ++ TYPE_GPA15 = 0xFFFF, ++}ODM_TYPE_GPA_E; ++ ++typedef enum tag_ODM_TYPE_APA_Definition { ++ TYPE_APA0 = 0x0000, ++ TYPE_APA1 = 0x0055, ++ TYPE_APA2 = 0x00AA, ++ TYPE_APA3 = 0x00FF, ++ TYPE_APA4 = 0x5500, ++ TYPE_APA5 = 0x5555, ++ TYPE_APA6 = 0x55AA, ++ TYPE_APA7 = 0x55FF, ++ TYPE_APA8 = 0xAA00, ++ TYPE_APA9 = 0xAA55, ++ TYPE_APA10 = 0xAAAA, ++ TYPE_APA11 = 0xAAFF, ++ TYPE_APA12 = 0xFF00, ++ TYPE_APA13 = 0xFF55, ++ TYPE_APA14 = 0xFFAA, ++ TYPE_APA15 = 0xFFFF, ++}ODM_TYPE_APA_E; ++ ++typedef enum tag_ODM_TYPE_GLNA_Definition { ++ TYPE_GLNA0 = 0x0000, ++ TYPE_GLNA1 = 0x0055, ++ TYPE_GLNA2 = 0x00AA, ++ TYPE_GLNA3 = 0x00FF, ++ TYPE_GLNA4 = 0x5500, ++ TYPE_GLNA5 = 0x5555, ++ TYPE_GLNA6 = 0x55AA, ++ TYPE_GLNA7 = 0x55FF, ++ TYPE_GLNA8 = 0xAA00, ++ TYPE_GLNA9 = 0xAA55, ++ TYPE_GLNA10 = 0xAAAA, ++ TYPE_GLNA11 = 0xAAFF, ++ TYPE_GLNA12 = 0xFF00, ++ TYPE_GLNA13 = 0xFF55, ++ TYPE_GLNA14 = 0xFFAA, ++ TYPE_GLNA15 = 0xFFFF, ++}ODM_TYPE_GLNA_E; ++ ++typedef enum tag_ODM_TYPE_ALNA_Definition { ++ TYPE_ALNA0 = 0x0000, ++ TYPE_ALNA1 = 0x0055, ++ TYPE_ALNA2 = 0x00AA, ++ TYPE_ALNA3 = 0x00FF, ++ TYPE_ALNA4 = 0x5500, ++ TYPE_ALNA5 = 0x5555, ++ TYPE_ALNA6 = 0x55AA, ++ TYPE_ALNA7 = 0x55FF, ++ TYPE_ALNA8 = 0xAA00, ++ TYPE_ALNA9 = 0xAA55, ++ TYPE_ALNA10 = 0xAAAA, ++ TYPE_ALNA11 = 0xAAFF, ++ TYPE_ALNA12 = 0xFF00, ++ TYPE_ALNA13 = 0xFF55, ++ TYPE_ALNA14 = 0xFFAA, ++ TYPE_ALNA15 = 0xFFFF, ++}ODM_TYPE_ALNA_E; ++ ++ ++typedef enum _ODM_RF_RADIO_PATH { ++ ODM_RF_PATH_A = 0, //Radio Path A ++ ODM_RF_PATH_B = 1, //Radio Path B ++ ODM_RF_PATH_C = 2, //Radio Path C ++ ODM_RF_PATH_D = 3, //Radio Path D ++ ODM_RF_PATH_AB, ++ ODM_RF_PATH_AC, ++ ODM_RF_PATH_AD, ++ ODM_RF_PATH_BC, ++ ODM_RF_PATH_BD, ++ ODM_RF_PATH_CD, ++ ODM_RF_PATH_ABC, ++ ODM_RF_PATH_ACD, ++ ODM_RF_PATH_BCD, ++ ODM_RF_PATH_ABCD, ++ // ODM_RF_PATH_MAX, //Max RF number 90 support ++} ODM_RF_RADIO_PATH_E, *PODM_RF_RADIO_PATH_E; ++ ++typedef enum _ODM_PARAMETER_INIT { ++ ODM_PRE_SETTING = 0, ++ ODM_POST_SETTING = 1, ++} ODM_PARAMETER_INIT_E; ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_precomp.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_precomp.h new file mode 100644 -index 000000000..99f96a771 +index 0000000..5669c15 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_precomp.h @@ -0,0 +1,320 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __ODM_PRECOMP_H__ -+#define __ODM_PRECOMP_H__ -+ -+#include "phydm_types.h" -+#include "phydm_features.h" -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting. -+#else -+#define TEST_FALG___ 1 -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE ==ODM_CE) -+#define RTL8192CE_SUPPORT 0 -+#define RTL8192CU_SUPPORT 0 -+#define RTL8192C_SUPPORT 0 -+ -+#define RTL8192DE_SUPPORT 0 -+#define RTL8192DU_SUPPORT 0 -+#define RTL8192D_SUPPORT 0 -+ -+#define RTL8723AU_SUPPORT 0 -+#define RTL8723AS_SUPPORT 0 -+#define RTL8723AE_SUPPORT 0 -+#define RTL8723A_SUPPORT 0 -+#define RTL8723_FPGA_VERIFICATION 0 -+#endif -+ -+//2 Config Flags and Structs - defined by each ODM Type -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "../8192cd_cfg.h" -+ #include "../odm_inc.h" -+ -+ #include "../8192cd.h" -+ #include "../8192cd_util.h" -+ #ifdef _BIG_ENDIAN_ -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG -+ #else -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #endif -+ -+ #ifdef AP_BUILD_WORKAROUND -+ #include "../8192cd_headers.h" -+ #include "../8192cd_debug.h" -+ #endif -+ -+#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE) -+ #define __PACK -+ #define __WLAN_ATTRIB_PACK__ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "mp_precomp.h" -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #define __PACK -+ #define __WLAN_ATTRIB_PACK__ -+#endif -+ -+//2 OutSrc Header Files -+ -+#include "phydm.h" -+#include "phydm_hwconfig.h" -+#include "phydm_debug.h" -+#include "phydm_regdefine11ac.h" -+#include "phydm_regdefine11n.h" -+#include "phydm_interface.h" -+#include "phydm_reg.h" -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#define RTL8821B_SUPPORT 0 -+#define RTL8822B_SUPPORT 0 -+ -+VOID -+PHY_SetTxPowerLimit( -+ IN PDM_ODM_T pDM_Odm, -+ IN u8 *Regulation, -+ IN u8 *Band, -+ IN u8 *Bandwidth, -+ IN u8 *RateSection, -+ IN u8 *RfPath, -+ IN u8 *Channel, -+ IN u8 *PowerLimit -+); -+ -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#define RTL8821B_SUPPORT 0 -+#define RTL8822B_SUPPORT 0 -+#define RTL8703B_SUPPORT 0 -+#define RTL8188F_SUPPORT 0 -+#endif -+ -+#if RTL8188E_SUPPORT == 1 -+#define RTL8188E_T_SUPPORT 1 -+#ifdef CONFIG_SFW_SUPPORTED -+#define RTL8188E_S_SUPPORT 1 -+#else -+#define RTL8188E_S_SUPPORT 0 -+#endif -+#endif -+ -+#if (RTL8188E_SUPPORT==1) -+#include "rtl8188e/hal8188erateadaptive.h"//for RA,Power training -+#include "rtl8188e/halhwimg8188e_mac.h" -+#include "rtl8188e/halhwimg8188e_rf.h" -+#include "rtl8188e/halhwimg8188e_bb.h" -+#include "rtl8188e/halhwimg8188e_t_fw.h" -+#include "rtl8188e/halhwimg8188e_s_fw.h" -+#include "rtl8188e/phydm_regconfig8188e.h" -+#include "rtl8188e/phydm_rtl8188e.h" -+#include "rtl8188e/hal8188ereg.h" -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8188e_hal.h" -+ #include "rtl8188e/halphyrf_8188e_ce.h" -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "rtl8188e/halphyrf_8188e_win.h" -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "rtl8188e/halphyrf_8188e_ap.h" -+#endif -+#endif //88E END -+ -+#if (RTL8192E_SUPPORT==1) -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "rtl8192e/halphyrf_8192e_win.h" /*FOR_8192E_IQK*/ -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "rtl8192e/halphyrf_8192e_ap.h" /*FOR_8192E_IQK*/ -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8192e/halphyrf_8192e_ce.h" /*FOR_8192E_IQK*/ -+ #endif -+ -+#include "rtl8192e/phydm_rtl8192e.h" //FOR_8192E_IQK -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ #include "rtl8192e/halhwimg8192e_bb.h" -+ #include "rtl8192e/halhwimg8192e_mac.h" -+ #include "rtl8192e/halhwimg8192e_rf.h" -+ #include "rtl8192e/phydm_regconfig8192e.h" -+ #include "rtl8192e/halhwimg8192e_fw.h" -+ #include "rtl8192e/hal8192ereg.h" -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8192e_hal.h" -+#endif -+#endif //92E END -+ -+#if (RTL8812A_SUPPORT==1) -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "rtl8812a/halphyrf_8812a_win.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "rtl8812a/halphyrf_8812a_ap.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8812a/halphyrf_8812a_ce.h" -+ #endif -+ -+ //#include "rtl8812a/HalPhyRf_8812A.h" //FOR_8812_IQK -+ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ #include "rtl8812a/halhwimg8812a_bb.h" -+ #include "rtl8812a/halhwimg8812a_mac.h" -+ #include "rtl8812a/halhwimg8812a_rf.h" -+ #include "rtl8812a/phydm_regconfig8812a.h" -+ #include "rtl8812a/halhwimg8812a_fw.h" -+ #include "rtl8812a/phydm_rtl8812a.h" -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8812a_hal.h" -+ #endif -+ -+#endif //8812 END -+ -+#if (RTL8814A_SUPPORT==1) -+ -+#include "rtl8814a/halhwimg8814a_mac.h" -+#include "rtl8814a/halhwimg8814a_rf.h" -+#include "rtl8814a/halhwimg8814a_bb.h" -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ #include "rtl8814a/halhwimg8814a_fw.h" -+ #include "rtl8814a/phydm_rtl8814a.h" -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "rtl8814a/halphyrf_8814a_win.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8814a/halphyrf_8814a_ce.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "rtl8814a/halphyrf_8814a_ap.h" -+#endif -+ #include "rtl8814a/phydm_regconfig8814a.h" -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8814a_hal.h" -+ #include "rtl8814a/phydm_iqk_8814a.h" -+#endif -+#endif //8814 END -+ -+#if (RTL8881A_SUPPORT==1)//FOR_8881_IQK -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#include "rtl8821a/phydm_iqk_8821a_win.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#include "rtl8821a/phydm_iqk_8821a_ce.h" -+#else -+#include "rtl8821a/phydm_iqk_8821a_ap.h" -+#endif -+//#include "rtl8881a/HalHWImg8881A_BB.h" -+//#include "rtl8881a/HalHWImg8881A_MAC.h" -+//#include "rtl8881a/HalHWImg8881A_RF.h" -+//#include "rtl8881a/odm_RegConfig8881A.h" -+#endif -+ -+#if (RTL8723B_SUPPORT==1) -+#include "rtl8723b/halhwimg8723b_mac.h" -+#include "rtl8723b/halhwimg8723b_rf.h" -+#include "rtl8723b/halhwimg8723b_bb.h" -+#include "rtl8723b/halhwimg8723b_fw.h" -+#include "rtl8723b/phydm_regconfig8723b.h" -+#include "rtl8723b/phydm_rtl8723b.h" -+#include "rtl8723b/hal8723breg.h" -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "rtl8723b/halphyrf_8723b_win.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8723b/halphyrf_8723b_ce.h" -+ #include "rtl8723b/halhwimg8723b_mp.h" -+ #include "rtl8723b_hal.h" -+#endif -+#endif -+ -+#if (RTL8821A_SUPPORT==1) -+#include "rtl8821a/halhwimg8821a_mac.h" -+#include "rtl8821a/halhwimg8821a_rf.h" -+#include "rtl8821a/halhwimg8821a_bb.h" -+#include "rtl8821a/halhwimg8821a_fw.h" -+#include "rtl8821a/phydm_regconfig8821a.h" -+#include "rtl8821a/phydm_rtl8821a.h" -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "rtl8821a/halphyrf_8821a_win.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8821a/halphyrf_8821a_ce.h" -+ #include "rtl8821a/phydm_iqk_8821a_ce.h"/*for IQK*/ -+ #include "rtl8812a/halphyrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/ -+ #include "rtl8812a_hal.h" -+#else -+#endif -+#endif -+ -+#if (RTL8821B_SUPPORT==1) -+#include "rtl8821b/halhwimg8821b_mac.h" -+#include "rtl8821b/halhwimg8821b_rf.h" -+#include "rtl8821b/halhwimg8821b_bb.h" -+#include "rtl8821b/halhwimg8821b_fw.h" -+#include "rtl8821b/phydm_regconfig8821b.h" -+#include "rtl8821b/halhwimg8821b_testchip_mac.h" -+#include "rtl8821b/halhwimg8821b_testchip_rf.h" -+#include "rtl8821b/halhwimg8821b_testchip_bb.h" -+#include "rtl8821b/halhwimg8821b_testchip_fw.h" -+#include "rtl8821b/halphyrf_8821b.h" -+#endif -+ -+#if (RTL8822B_SUPPORT==1) -+#include "rtl8822b/halhwimg8822b_mac.h" -+#include "rtl8822b/halhwimg8822b_rf.h" -+#include "rtl8822b/halhwimg8822b_bb.h" -+/*#include "rtl8822b/halhwimg8822b_fw.h"*/ -+#include "rtl8822b/phydm_regconfig8822b.h" -+#include "rtl8822b/halphyrf_8822b.h" -+#include "rtl8822b/phydm_rtl8822b.h" -+#include "rtl8822b/phydm_hal_api8822b.h" -+#include "rtl8822b/version_rtl8822b.h" -+#endif -+ -+#if (RTL8703B_SUPPORT==1) -+#include "rtl8703b/phydm_regconfig8703b.h" -+#include "rtl8703b/halhwimg8703b_mac.h" -+#include "rtl8703b/halhwimg8703b_rf.h" -+#include "rtl8703b/halhwimg8703b_bb.h" -+#include "rtl8703b/halhwimg8703b_fw.h" -+#include "rtl8703b/halphyrf_8703b.h" -+#include "rtl8703b/version_rtl8703b.h" -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#include "rtl8703b_hal.h" -+#endif -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+#include "rtl8188f/halhwimg8188f_mac.h" -+#include "rtl8188f/halhwimg8188f_rf.h" -+#include "rtl8188f/halhwimg8188f_bb.h" -+#include "rtl8188f/halhwimg8188f_fw.h" -+#include "rtl8188f/hal8188freg.h" -+#include "rtl8188f/phydm_rtl8188f.h" -+#include "rtl8188f/phydm_regconfig8188f.h" -+#include "rtl8188f/halphyrf_8188f.h" /* for IQK,LCK,Power-tracking */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#include "rtl8188f_hal.h" -+#endif -+#endif -+ -+#endif // __ODM_PRECOMP_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __ODM_PRECOMP_H__ ++#define __ODM_PRECOMP_H__ ++ ++#include "phydm_types.h" ++#include "phydm_features.h" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting. ++#else ++#define TEST_FALG___ 1 ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE ==ODM_CE) ++#define RTL8192CE_SUPPORT 0 ++#define RTL8192CU_SUPPORT 0 ++#define RTL8192C_SUPPORT 0 ++ ++#define RTL8192DE_SUPPORT 0 ++#define RTL8192DU_SUPPORT 0 ++#define RTL8192D_SUPPORT 0 ++ ++#define RTL8723AU_SUPPORT 0 ++#define RTL8723AS_SUPPORT 0 ++#define RTL8723AE_SUPPORT 0 ++#define RTL8723A_SUPPORT 0 ++#define RTL8723_FPGA_VERIFICATION 0 ++#endif ++ ++//2 Config Flags and Structs - defined by each ODM Type ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "../8192cd_cfg.h" ++ #include "../odm_inc.h" ++ ++ #include "../8192cd.h" ++ #include "../8192cd_util.h" ++ #ifdef _BIG_ENDIAN_ ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG ++ #else ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE ++ #endif ++ ++ #ifdef AP_BUILD_WORKAROUND ++ #include "../8192cd_headers.h" ++ #include "../8192cd_debug.h" ++ #endif ++ ++#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE) ++ #define __PACK ++ #define __WLAN_ATTRIB_PACK__ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "mp_precomp.h" ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE ++ #define __PACK ++ #define __WLAN_ATTRIB_PACK__ ++#endif ++ ++//2 OutSrc Header Files ++ ++#include "phydm.h" ++#include "phydm_hwconfig.h" ++#include "phydm_debug.h" ++#include "phydm_regdefine11ac.h" ++#include "phydm_regdefine11n.h" ++#include "phydm_interface.h" ++#include "phydm_reg.h" ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_CE) ++#define RTL8821B_SUPPORT 0 ++#define RTL8822B_SUPPORT 0 ++ ++VOID ++PHY_SetTxPowerLimit( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8 *Regulation, ++ IN u8 *Band, ++ IN u8 *Bandwidth, ++ IN u8 *RateSection, ++ IN u8 *RfPath, ++ IN u8 *Channel, ++ IN u8 *PowerLimit ++); ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++#define RTL8821B_SUPPORT 0 ++#define RTL8822B_SUPPORT 0 ++#define RTL8703B_SUPPORT 0 ++#define RTL8188F_SUPPORT 0 ++#endif ++ ++#if RTL8188E_SUPPORT == 1 ++#define RTL8188E_T_SUPPORT 1 ++#ifdef CONFIG_SFW_SUPPORTED ++#define RTL8188E_S_SUPPORT 1 ++#else ++#define RTL8188E_S_SUPPORT 0 ++#endif ++#endif ++ ++#if (RTL8188E_SUPPORT==1) ++#include "rtl8188e/hal8188erateadaptive.h"//for RA,Power training ++#include "rtl8188e/halhwimg8188e_mac.h" ++#include "rtl8188e/halhwimg8188e_rf.h" ++#include "rtl8188e/halhwimg8188e_bb.h" ++#include "rtl8188e/halhwimg8188e_t_fw.h" ++#include "rtl8188e/halhwimg8188e_s_fw.h" ++#include "rtl8188e/phydm_regconfig8188e.h" ++#include "rtl8188e/phydm_rtl8188e.h" ++#include "rtl8188e/hal8188ereg.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8188e_hal.h" ++ #include "rtl8188e/halphyrf_8188e_ce.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8188e/halphyrf_8188e_win.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8188e/halphyrf_8188e_ap.h" ++#endif ++#endif //88E END ++ ++#if (RTL8192E_SUPPORT==1) ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8192e/halphyrf_8192e_win.h" /*FOR_8192E_IQK*/ ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8192e/halphyrf_8192e_ap.h" /*FOR_8192E_IQK*/ ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8192e/halphyrf_8192e_ce.h" /*FOR_8192E_IQK*/ ++ #endif ++ ++#include "rtl8192e/phydm_rtl8192e.h" //FOR_8192E_IQK ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ #include "rtl8192e/halhwimg8192e_bb.h" ++ #include "rtl8192e/halhwimg8192e_mac.h" ++ #include "rtl8192e/halhwimg8192e_rf.h" ++ #include "rtl8192e/phydm_regconfig8192e.h" ++ #include "rtl8192e/halhwimg8192e_fw.h" ++ #include "rtl8192e/hal8192ereg.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8192e_hal.h" ++#endif ++#endif //92E END ++ ++#if (RTL8812A_SUPPORT==1) ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8812a/halphyrf_8812a_win.h" ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8812a/halphyrf_8812a_ap.h" ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8812a/halphyrf_8812a_ce.h" ++ #endif ++ ++ //#include "rtl8812a/HalPhyRf_8812A.h" //FOR_8812_IQK ++ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ #include "rtl8812a/halhwimg8812a_bb.h" ++ #include "rtl8812a/halhwimg8812a_mac.h" ++ #include "rtl8812a/halhwimg8812a_rf.h" ++ #include "rtl8812a/phydm_regconfig8812a.h" ++ #include "rtl8812a/halhwimg8812a_fw.h" ++ #include "rtl8812a/phydm_rtl8812a.h" ++ #endif ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8812a_hal.h" ++ #endif ++ ++#endif //8812 END ++ ++#if (RTL8814A_SUPPORT==1) ++ ++#include "rtl8814a/halhwimg8814a_mac.h" ++#include "rtl8814a/halhwimg8814a_rf.h" ++#include "rtl8814a/halhwimg8814a_bb.h" ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ #include "rtl8814a/halhwimg8814a_fw.h" ++ #include "rtl8814a/phydm_rtl8814a.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8814a/halphyrf_8814a_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8814a/halphyrf_8814a_ce.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8814a/halphyrf_8814a_ap.h" ++#endif ++ #include "rtl8814a/phydm_regconfig8814a.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8814a_hal.h" ++ #include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++#endif //8814 END ++ ++#if (RTL8881A_SUPPORT==1)//FOR_8881_IQK ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#include "rtl8821a/phydm_iqk_8821a_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#include "rtl8821a/phydm_iqk_8821a_ce.h" ++#else ++#include "rtl8821a/phydm_iqk_8821a_ap.h" ++#endif ++//#include "rtl8881a/HalHWImg8881A_BB.h" ++//#include "rtl8881a/HalHWImg8881A_MAC.h" ++//#include "rtl8881a/HalHWImg8881A_RF.h" ++//#include "rtl8881a/odm_RegConfig8881A.h" ++#endif ++ ++#if (RTL8723B_SUPPORT==1) ++#include "rtl8723b/halhwimg8723b_mac.h" ++#include "rtl8723b/halhwimg8723b_rf.h" ++#include "rtl8723b/halhwimg8723b_bb.h" ++#include "rtl8723b/halhwimg8723b_fw.h" ++#include "rtl8723b/phydm_regconfig8723b.h" ++#include "rtl8723b/phydm_rtl8723b.h" ++#include "rtl8723b/hal8723breg.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8723b/halphyrf_8723b_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8723b/halphyrf_8723b_ce.h" ++ #include "rtl8723b/halhwimg8723b_mp.h" ++ #include "rtl8723b_hal.h" ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT==1) ++#include "rtl8821a/halhwimg8821a_mac.h" ++#include "rtl8821a/halhwimg8821a_rf.h" ++#include "rtl8821a/halhwimg8821a_bb.h" ++#include "rtl8821a/halhwimg8821a_fw.h" ++#include "rtl8821a/phydm_regconfig8821a.h" ++#include "rtl8821a/phydm_rtl8821a.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8821a/halphyrf_8821a_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8821a/halphyrf_8821a_ce.h" ++ #include "rtl8821a/phydm_iqk_8821a_ce.h"/*for IQK*/ ++ #include "rtl8812a/halphyrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/ ++ #include "rtl8812a_hal.h" ++#else ++#endif ++#endif ++ ++#if (RTL8821B_SUPPORT==1) ++#include "rtl8821b/halhwimg8821b_mac.h" ++#include "rtl8821b/halhwimg8821b_rf.h" ++#include "rtl8821b/halhwimg8821b_bb.h" ++#include "rtl8821b/halhwimg8821b_fw.h" ++#include "rtl8821b/phydm_regconfig8821b.h" ++#include "rtl8821b/halhwimg8821b_testchip_mac.h" ++#include "rtl8821b/halhwimg8821b_testchip_rf.h" ++#include "rtl8821b/halhwimg8821b_testchip_bb.h" ++#include "rtl8821b/halhwimg8821b_testchip_fw.h" ++#include "rtl8821b/halphyrf_8821b.h" ++#endif ++ ++#if (RTL8822B_SUPPORT==1) ++#include "rtl8822b/halhwimg8822b_mac.h" ++#include "rtl8822b/halhwimg8822b_rf.h" ++#include "rtl8822b/halhwimg8822b_bb.h" ++/*#include "rtl8822b/halhwimg8822b_fw.h"*/ ++#include "rtl8822b/phydm_regconfig8822b.h" ++#include "rtl8822b/halphyrf_8822b.h" ++#include "rtl8822b/phydm_rtl8822b.h" ++#include "rtl8822b/phydm_hal_api8822b.h" ++#include "rtl8822b/version_rtl8822b.h" ++#endif ++ ++#if (RTL8703B_SUPPORT==1) ++#include "rtl8703b/phydm_regconfig8703b.h" ++#include "rtl8703b/halhwimg8703b_mac.h" ++#include "rtl8703b/halhwimg8703b_rf.h" ++#include "rtl8703b/halhwimg8703b_bb.h" ++#include "rtl8703b/halhwimg8703b_fw.h" ++#include "rtl8703b/halphyrf_8703b.h" ++#include "rtl8703b/version_rtl8703b.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#include "rtl8703b_hal.h" ++#endif ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++#include "rtl8188f/halhwimg8188f_mac.h" ++#include "rtl8188f/halhwimg8188f_rf.h" ++#include "rtl8188f/halhwimg8188f_bb.h" ++#include "rtl8188f/halhwimg8188f_fw.h" ++#include "rtl8188f/hal8188freg.h" ++#include "rtl8188f/phydm_rtl8188f.h" ++#include "rtl8188f/phydm_regconfig8188f.h" ++#include "rtl8188f/halphyrf_8188f.h" /* for IQK,LCK,Power-tracking */ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#include "rtl8188f_hal.h" ++#endif ++#endif ++ ++#endif // __ODM_PRECOMP_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rainfo.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rainfo.c new file mode 100644 -index 000000000..5cd230813 +index 0000000..f1f21c0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rainfo.c @@ -0,0 +1,2574 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (defined(CONFIG_RA_DBG_CMD)) -+VOID -+ODM_C2HRaParaReportHandler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ -+ u1Byte para_idx = CmdBuf[0]; //Retry Penalty, NH, NL -+ u1Byte RateTypeStart = CmdBuf[1]; -+ u1Byte RateTypeLength = CmdLen - 2; -+ u1Byte i; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[ From FW C2H RA Para ] CmdBuf[0]= (( %d ))\n", CmdBuf[0])); -+ -+ if (para_idx == RADBG_RTY_PENALTY) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |RTY Penality Index| \n")); -+ -+ for (i = 0 ; i < (RateTypeLength) ; i++) { -+ if (pRA_Table->is_ra_dbg_init) -+ pRA_Table->RTY_P_default[RateTypeStart + i] = CmdBuf[2 + i]; -+ -+ pRA_Table->RTY_P[RateTypeStart + i] = CmdBuf[2 + i]; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RTY_P[RateTypeStart + i])); -+ } -+ -+ } else if (para_idx == RADBG_N_HIGH) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-High| \n")); -+ -+ -+ } else if (para_idx == RADBG_N_LOW){ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-Low| \n")); -+ -+ } -+ else if (para_idx == RADBG_RATE_UP_RTY_RATIO) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Up RTY Ratio| \n")); -+ -+ for (i = 0 ; i < (RateTypeLength) ; i++) { -+ if (pRA_Table->is_ra_dbg_init) -+ pRA_Table->RATE_UP_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i]; -+ -+ pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i]; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i])); -+ } -+ } else if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Down RTY Ratio| \n")); -+ -+ for (i = 0 ; i < (RateTypeLength) ; i++) { -+ if (pRA_Table->is_ra_dbg_init) -+ pRA_Table->RATE_DOWN_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i]; -+ -+ pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i]; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i])); -+ } -+ } else if (para_idx == RADBG_DEBUG_MONITOR1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); -+ if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) { -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Rate =", CmdBuf[2] & 0x7f)); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI =", (CmdBuf[2] & 0x80) >> 7)); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW =", CmdBuf[3])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW_max =", CmdBuf[4])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate0 =", CmdBuf[5])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate1 =", CmdBuf[6])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[7])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[8])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI_support =", CmdBuf[9])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "try_ness =", CmdBuf[10])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "pre_rate =", CmdBuf[11])); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x \n", "BW =", CmdBuf[2])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[3])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[4])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Hightest Rate =", CmdBuf[5])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Lowest Rate =", CmdBuf[6])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "SGI_support =", CmdBuf[7])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Rate_ID =", CmdBuf[8]));; -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); -+ } else if (para_idx == RADBG_DEBUG_MONITOR2) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); -+ if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RateID =", CmdBuf[1])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "highest_rate =", CmdBuf[2])); -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "lowest_rate =", CmdBuf[3])); -+ -+ for (i = 4 ; i <= 11 ; i++) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("RAMASK = 0x%x \n", CmdBuf[i])); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x%x %x%x %x%x %x%x \n", "RA Mask:", -+ CmdBuf[8], CmdBuf[7], CmdBuf[6], CmdBuf[5], CmdBuf[4], CmdBuf[3], CmdBuf[2], CmdBuf[1])); -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); -+ } else if (para_idx == RADBG_DEBUG_MONITOR3) { -+ -+ for (i = 0 ; i < (CmdLen - 1) ; i++) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("content[%d] = %d \n", i, CmdBuf[1 + i])); -+ } else if (para_idx == RADBG_DEBUG_MONITOR4) -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s {%d.%d} \n", "RA Version =", CmdBuf[1], CmdBuf[2])); -+ -+} -+ -+VOID -+odm_RA_ParaAdjust_Send_H2C( -+ IN PVOID pDM_VOID -+) -+{ -+ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u1Byte H2C_Parameter[6] = {0}; -+ -+ H2C_Parameter[0] = RA_FIRST_MACID; -+ -+ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("RA_Para_feedback_req= (( %d )) \n",pRA_Table->RA_Para_feedback_req )); -+ if (pRA_Table->RA_Para_feedback_req) { //H2C_Parameter[5]=1 ; ask FW for all RA parameters -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Ask FW for RA parameter \n")); -+ H2C_Parameter[5] |= BIT1; //ask FW to report RA parameters -+ H2C_Parameter[1] = pRA_Table->para_idx; //pRA_Table->para_idx; -+ pRA_Table->RA_Para_feedback_req = 0; -+ } else { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Send H2C to FW for modifying RA parameter \n")); -+ -+ H2C_Parameter[1] = pRA_Table->para_idx; -+ H2C_Parameter[2] = pRA_Table->rate_idx; -+ //1 [8 bit] -+ if (pRA_Table->para_idx == RADBG_RTY_PENALTY || pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO || pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { -+ H2C_Parameter[3] = pRA_Table->value; -+ H2C_Parameter[4] = 0; -+ } -+ //1 [16 bit] -+ else { //if ((pRA_Table->rate_idx==RADBG_N_HIGH)||(pRA_Table->rate_idx==RADBG_N_LOW)) -+ H2C_Parameter[3] = (u1Byte)(((pRA_Table->value_16) & 0xf0) >> 4); //byte1 -+ H2C_Parameter[4] = (u1Byte)((pRA_Table->value_16) & 0x0f); //byte0 -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[1] = 0x%x \n", H2C_Parameter[1])); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[2] = 0x%x \n", H2C_Parameter[2])); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[3] = 0x%x \n", H2C_Parameter[3])); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[4] = 0x%x \n", H2C_Parameter[4])); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[5] = 0x%x \n", H2C_Parameter[5])); -+ -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RA_PARA_ADJUST, 6, H2C_Parameter); -+ -+} -+ -+ -+VOID -+odm_RA_ParaAdjust( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u1Byte para_idx = pRA_Table->para_idx; -+ u1Byte rate_idx = pRA_Table->rate_idx; -+ u1Byte value = pRA_Table->value; -+ u1Byte Pre_value = 0xff; -+ -+ BOOLEAN sign = 0; -+ -+ if (pRA_Table->para_idx == RADBG_RTY_PENALTY) { -+ Pre_value = pRA_Table->RTY_P[rate_idx]; -+ pRA_Table->RTY_P[rate_idx] = value; -+ pRA_Table->RTY_P_modify_note[rate_idx] = 1; -+ } else if (pRA_Table->para_idx == RADBG_N_HIGH) { -+ -+ } else if (pRA_Table->para_idx == RADBG_N_LOW) { -+ -+ } else if (pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO) { -+ Pre_value = pRA_Table->RATE_UP_RTY_RATIO[rate_idx]; -+ pRA_Table->RATE_UP_RTY_RATIO[rate_idx] = value; -+ pRA_Table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1; -+ } else if (pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { -+ Pre_value = pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx]; -+ pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx] = value; -+ pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1; -+ } -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" Change RA Papa[%d], Rate[ %d ], ((%d)) -> ((%d)) \n", pRA_Table->para_idx, rate_idx, Pre_value, value)); -+ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); -+} -+ -+ -+VOID -+phydm_ra_print_msg( -+ IN PVOID pDM_VOID, -+ IN u1Byte *value, -+ IN u1Byte *value_default, -+ IN u1Byte *modify_note -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u4Byte i; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate index| |Current-value| |Default-value| |Modify?| \n")); -+ for (i = 0 ; i <= (pRA_Table->rate_length); i++) { -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %20d %25d %20s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . "))); -+#else -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %10d %14d %14s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . "))); -+#endif -+ } -+ -+} -+ -+VOID -+odm_RA_debug( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ -+ pRA_Table->is_ra_dbg_init = FALSE; -+ -+ if (dm_value[0] == 100) { /*1 Print RA Parameters*/ -+ u1Byte default_pointer_value; -+ u1Byte *pvalue; -+ u1Byte *pvalue_default; -+ u1Byte *pmodify_note; -+ -+ pvalue = pvalue_default = pmodify_note = &default_pointer_value; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n")); -+ -+ if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [1] RTY_PENALTY\n")); -+ pvalue = &(pRA_Table->RTY_P[0]); -+ pvalue_default = &(pRA_Table->RTY_P_default[0]); -+ pmodify_note = (u1Byte *)&(pRA_Table->RTY_P_modify_note[0]); -+ } else if (dm_value[1] == RADBG_N_HIGH) { /* [2]*/ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [2] N_HIGH\n")); -+ -+ } else if (dm_value[1] == RADBG_N_LOW) { /*[3]*/ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [3] N_LOW\n")); -+ -+ } else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [8] RATE_UP_RTY_RATIO\n")); -+ pvalue = &(pRA_Table->RATE_UP_RTY_RATIO[0]); -+ pvalue_default = &(pRA_Table->RATE_UP_RTY_RATIO_default[0]); -+ pmodify_note = (u1Byte *)&(pRA_Table->RATE_UP_RTY_RATIO_modify_note[0]); -+ } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [9] RATE_DOWN_RTY_RATIO\n")); -+ pvalue = &(pRA_Table->RATE_DOWN_RTY_RATIO[0]); -+ pvalue_default = &(pRA_Table->RATE_DOWN_RTY_RATIO_default[0]); -+ pmodify_note = (u1Byte *)&(pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[0]); -+ } -+ -+ phydm_ra_print_msg(pDM_Odm, pvalue, pvalue_default, pmodify_note); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n\n")); -+ -+ } else if (dm_value[0] == 101) { -+ pRA_Table->para_idx = (u1Byte)dm_value[1]; -+ -+ pRA_Table->RA_Para_feedback_req = 1; -+ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); -+ } else { -+ pRA_Table->para_idx = (u1Byte)dm_value[0]; -+ pRA_Table->rate_idx = (u1Byte)dm_value[1]; -+ pRA_Table->value = (u1Byte)dm_value[2]; -+ -+ odm_RA_ParaAdjust(pDM_Odm); -+ } -+ -+} -+ -+VOID -+odm_RA_ParaAdjust_init( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u1Byte i; -+ u1Byte ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO}; -+ /* -+ RTY_PENALTY = 1, //u8 -+ N_HIGH = 2, -+ N_LOW = 3, -+ RATE_UP_TABLE = 4, -+ RATE_DOWN_TABLE = 5, -+ TRYING_NECESSARY = 6, -+ DROPING_NECESSARY = 7, -+ RATE_UP_RTY_RATIO = 8, //u8 -+ RATE_DOWN_RTY_RATIO= 9, //u8 -+ ALL_PARA = 0xff -+ -+ */ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_RA_ParaAdjust_init \n")); -+ -+ pRA_Table->is_ra_dbg_init = TRUE; -+ for (i = 0; i < 3; i++) { -+ pRA_Table->RA_Para_feedback_req = 1; -+ pRA_Table->para_idx = ra_para_pool_u8[i]; -+ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); -+ } -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8192E) -+ pRA_Table->rate_length = ODM_RATEMCS15; -+ else if ((pDM_Odm->SupportICType == ODM_RTL8723B) || (pDM_Odm->SupportICType == ODM_RTL8188E)) -+ pRA_Table->rate_length = ODM_RATEMCS7; -+ else if ((pDM_Odm->SupportICType == ODM_RTL8821) || (pDM_Odm->SupportICType == ODM_RTL8881A)) -+ pRA_Table->rate_length = ODM_RATEVHTSS1MCS9; -+ else if (pDM_Odm->SupportICType == ODM_RTL8812) -+ pRA_Table->rate_length = ODM_RATEVHTSS2MCS9; -+ else if (pDM_Odm->SupportICType == ODM_RTL8814A) -+ pRA_Table->rate_length = ODM_RATEVHTSS3MCS9; -+ else -+ pRA_Table->rate_length = ODM_RATEVHTSS4MCS9; -+ -+} -+ -+#else -+ -+VOID -+ODM_C2HRaParaReportHandler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+) -+{ -+} -+ -+VOID -+odm_RA_debug( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value -+) -+{ -+} -+ -+VOID -+odm_RA_ParaAdjust_init( -+ IN PVOID pDM_VOID -+) -+ -+{ -+} -+ -+#endif //#if (defined(CONFIG_RA_DBG_CMD)) -+ -+VOID -+phydm_ra_dynamic_retry_count( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ PSTA_INFO_T pEntry; -+ u1Byte i, retry_offset; -+ u4Byte ma_rx_tp; -+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pDM_Odm->pre_b_noisy = %d\n", pDM_Odm->pre_b_noisy ));*/ -+ if (pDM_Odm->pre_b_noisy != pDM_Odm->NoisyDecision) { -+ -+ if (pDM_Odm->NoisyDecision) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Noisy Env. RA fallback value\n")); -+ ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x0); -+ ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x04030201); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Clean Env. RA fallback value\n")); -+ ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x02010000); -+ ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x06050403); -+ } -+ pDM_Odm->pre_b_noisy = pDM_Odm->NoisyDecision; -+ } -+} -+ -+#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) -+ -+VOID -+phydm_retry_limit_table_bound( -+ IN PVOID pDM_VOID, -+ IN u1Byte *retry_limit, -+ IN u1Byte offset -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ -+ if (*retry_limit > offset) { -+ -+ *retry_limit -= offset; -+ -+ if (*retry_limit < pRA_Table->retrylimit_low) -+ *retry_limit = pRA_Table->retrylimit_low; -+ else if (*retry_limit > pRA_Table->retrylimit_high) -+ *retry_limit = pRA_Table->retrylimit_high; -+ } else -+ *retry_limit = pRA_Table->retrylimit_low; -+} -+ -+VOID -+phydm_reset_retry_limit_table( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u1Byte i; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*support all IC platform*/ -+ -+ #else -+ #if ((RTL8192E_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1)) -+ u1Byte per_rate_retrylimit_table_20M[ODM_RATEMCS15+1] = { -+ 1, 1, 2, 4, /*CCK*/ -+ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ -+ 2, 4, 6, 8, 12, 18, 20, 22, /*20M HT-1SS*/ -+ 2, 4, 6, 8, 12, 18, 20, 22 /*20M HT-2SS*/ -+ }; -+ u1Byte per_rate_retrylimit_table_40M[ODM_RATEMCS15+1] = { -+ 1, 1, 2, 4, /*CCK*/ -+ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ -+ 4, 8, 12, 16, 24, 32, 32, 32, /*40M HT-1SS*/ -+ 4, 8, 12, 16, 24, 32, 32, 32 /*40M HT-2SS*/ -+ }; -+ -+ #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) -+ -+ #elif (RTL8812A_SUPPORT == 1) -+ -+ #elif(RTL8814A_SUPPORT == 1) -+ -+ #else -+ -+ #endif -+ #endif -+ -+ memcpy(&(pRA_Table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX); -+ memcpy(&(pRA_Table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX); -+ -+ for (i = 0; i < ODM_NUM_RATE_IDX; i++) { -+ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), 0); -+ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), 0); -+ } -+} -+ -+VOID -+phydm_ra_dynamic_retry_limit( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ PSTA_INFO_T pEntry; -+ u1Byte i, retry_offset; -+ u4Byte ma_rx_tp; -+ -+ -+ if (pDM_Odm->pre_number_active_client == pDM_Odm->number_active_client) { -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" pre_number_active_client == number_active_client\n")); -+ return; -+ -+ } else { -+ if (pDM_Odm->number_active_client == 1) { -+ phydm_reset_retry_limit_table(pDM_Odm); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("one client only->reset to default value\n")); -+ } else { -+ -+ retry_offset = pDM_Odm->number_active_client * pRA_Table->retry_descend_num; -+ -+ for (i = 0; i < ODM_NUM_RATE_IDX; i++) { -+ -+ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), retry_offset); -+ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), retry_offset); -+ } -+ } -+ } -+} -+ -+VOID -+phydm_ra_dynamic_retry_limit_init( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ -+ pRA_Table->retry_descend_num = RA_RETRY_DESCEND_NUM; -+ pRA_Table->retrylimit_low = RA_RETRY_LIMIT_LOW; -+ pRA_Table->retrylimit_high = RA_RETRY_LIMIT_HIGH; -+ -+ phydm_reset_retry_limit_table(pDM_Odm); -+ -+} -+#else -+VOID -+phydm_ra_dynamic_retry_limit( -+ IN PVOID pDM_VOID -+) -+{ -+} -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+VOID -+phydm_ra_dynamic_rate_id_on_assoc( -+ IN PVOID pDM_VOID, -+ IN u1Byte wireless_mode, -+ IN u1Byte init_rate_id -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", pDM_Odm->RFType, wireless_mode, init_rate_id)); -+ -+ if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) { -+ -+ if ((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) && -+ (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) -+ ){ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set N-2SS ARFR5 table\n")); -+ ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ } else if ((pDM_Odm->SupportICType & (ODM_RTL8812)) && -+ (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) -+ ){ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set AC-2SS ARFR0 table\n")); -+ ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ -+ ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ -+ } -+ } -+ -+} -+ -+VOID -+phydm_ra_dynamic_rate_id_init( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) { -+ -+ ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ -+ ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ -+ ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ -+ } -+} -+ -+VOID -+phydm_update_rate_id( -+ IN PVOID pDM_VOID, -+ IN u1Byte rate, -+ IN u1Byte platform_macid -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u1Byte current_tx_ss; -+ u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/ -+ u1Byte wireless_mode; -+ u1Byte phydm_macid; -+ PSTA_INFO_T pEntry; -+ -+ if (rate_idx >= ODM_RATEVHTSS2MCS0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS2MCS0))); -+ /*dummy for SD4 check patch*/ -+ } else if (rate_idx >= ODM_RATEVHTSS1MCS0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS1MCS0))); -+ /*dummy for SD4 check patch*/ -+ } else if (rate_idx >= ODM_RATEMCS0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEMCS0))); -+ /*dummy for SD4 check patch*/ -+ } else { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx)); -+ /*dummy for SD4 check patch*/ -+ } -+ -+ phydm_macid = pDM_Odm->platform2phydm_macid_table[platform_macid]; -+ pEntry = pDM_Odm->pODM_StaInfo[phydm_macid]; -+ -+ if (IS_STA_VALID(pEntry)) { -+ wireless_mode = pEntry->WirelessMode; -+ -+ if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) { -+ -+ pEntry->ratr_idx = pEntry->ratr_idx_init; -+ if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/ -+ if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/ -+ -+ pEntry->ratr_idx = ARFR_5_RATE_ID; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_5\n")); -+ } -+ } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/ -+ if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/ -+ -+ pEntry->ratr_idx = ARFR_0_RATE_ID; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_0\n")); -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, pEntry->ratr_idx)); -+ } -+ } -+ -+} -+#endif -+ -+VOID -+phydm_c2h_ra_report_handler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ u1Byte legacy_table[12] = {1,2,5,11,6,9,12,18,24,36,48,54}; -+ u1Byte macid = CmdBuf[1]; -+ -+ u1Byte rate = CmdBuf[0]; -+ u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/ -+ u1Byte vht_en=(rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0; -+ u1Byte b_sgi = (rate & 0x80)>>7; -+ -+ u1Byte pre_rate = pRA_Table->link_tx_rate[macid]; -+ u1Byte pre_rate_idx = pre_rate & 0x7f; /*remove bit7 SGI*/ -+ u1Byte pre_vht_en=(pre_rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0; -+ u1Byte pre_b_sgi = (pre_rate & 0x80)>>7; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ GET_HAL_DATA(Adapter)->CurrentRARate = HwRateToMRate(rate_idx); -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ ODM_UpdateInitRate(pDM_Odm, rate_idx); -+ #endif -+ -+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,("RA: rate_idx=0x%x , sgi = %d\n", rate_idx, b_sgi));*/ -+ /*if (pDM_Odm->SupportICType & (ODM_RTL8703B))*/ -+ { -+ if (CmdLen >= 4) { -+ if (CmdBuf[3] == 0) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Init-Rate Update\n")); -+ /**/ -+ } else if (CmdBuf[3] == 0xff) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("FW Level: Fix rate\n")); -+ /**/ -+ } else if (CmdBuf[3] == 1) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Success\n")); -+ /**/ -+ } else if (CmdBuf[3] == 2) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Fail & Try Again\n")); -+ /**/ -+ } else if (CmdBuf[3] == 3) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Rate Back\n")); -+ /**/ -+ } else if (CmdBuf[3] == 4) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("start rate by RSSI\n")); -+ /**/ -+ } else if (CmdBuf[3] == 5) { -+ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try rate\n")); -+ /**/ -+ } -+ } -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Tx Rate Update, MACID[%d] ( %s%s%s%s%d%s%s ) -> ( %s%s%s%s%d%s%s)\n", -+ macid, -+ ((pre_rate_idx >= ODM_RATEVHTSS1MCS0) && (pre_rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", -+ ((pre_rate_idx >= ODM_RATEVHTSS2MCS0) && (pre_rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", -+ ((pre_rate_idx >= ODM_RATEVHTSS3MCS0) && (pre_rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", -+ (pre_rate_idx >= ODM_RATEMCS0) ? "MCS " : "", -+ (pre_vht_en) ? ((pre_rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((pre_rate_idx >= ODM_RATEMCS0)? (pre_rate_idx - ODM_RATEMCS0) : ((pre_rate_idx <= ODM_RATE54M)?legacy_table[pre_rate_idx]:0)), -+ (pre_b_sgi) ? "-S" : " ", -+ (pre_rate_idx >= ODM_RATEMCS0) ? "" : "M", -+ ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", -+ ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", -+ ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", -+ (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", -+ (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((rate_idx >= ODM_RATEMCS0)? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M)?legacy_table[rate_idx]:0)), -+ (b_sgi) ? "-S" : " ", -+ (rate_idx >= ODM_RATEMCS0) ? "" : "M" )); -+ -+ pRA_Table->link_tx_rate[macid] = rate; -+ -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) -+ phydm_update_rate_id(pDM_Odm, rate, macid); -+ #endif -+ -+} -+ -+VOID -+odm_RSSIMonitorInit( -+ IN PVOID pDM_VOID -+) -+{ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ pRA_Table->firstconnect = FALSE; -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ pRA_Table->PT_collision_pre = TRUE; //used in ODM_DynamicARFBSelect(WIN only) -+#endif -+#endif -+} -+ -+VOID -+ODM_RAPostActionOnAssoc( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ pDM_Odm->H2C_RARpt_connect = 1; -+ odm_RSSIMonitorCheck(pDM_Odm); -+ pDM_Odm->H2C_RARpt_connect = 0; -+} -+ -+VOID -+odm_RSSIMonitorCheck( -+ IN PVOID pDM_VOID -+) -+{ -+ // -+ // For AP/ADSL use prtl8192cd_priv -+ // For CE/NIC use PADAPTER -+ // -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) -+ return; -+ -+ // -+ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate -+ // at the same time. In the stage2/3, we need to prive universal interface and merge all -+ // HW dynamic mechanism. -+ // -+ switch (pDM_Odm->SupportPlatform) { -+ case ODM_WIN: -+ odm_RSSIMonitorCheckMP(pDM_Odm); -+ break; -+ -+ case ODM_CE: -+ odm_RSSIMonitorCheckCE(pDM_Odm); -+ break; -+ -+ case ODM_AP: -+ odm_RSSIMonitorCheckAP(pDM_Odm); -+ break; -+ -+ case ODM_ADSL: -+ //odm_DIGAP(pDM_Odm); -+ break; -+ } -+ -+} // odm_RSSIMonitorCheck -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+s4Byte -+phydm_FindMinimumRSSI( -+IN PDM_ODM_T pDM_Odm, -+IN PADAPTER pAdapter, -+IN OUT BOOLEAN *pbLink_temp -+ -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); -+ BOOLEAN act_as_ap = ACTING_AS_AP(pAdapter); -+ -+ /*DbgPrint("bMediaConnect = %d, ACTING_AS_AP = %d , EntryMinUndecoratedSmoothedPWDB = %d\n", -+ pMgntInfo->bMediaConnect,act_as_ap,pHalData->EntryMinUndecoratedSmoothedPWDB);*/ -+ -+ -+ /* 1.Determine the minimum RSSI */ -+ if ((!pMgntInfo->bMediaConnect) || -+ (act_as_ap && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/ -+ -+ pHalData->MinUndecoratedPWDBForDM = 0; -+ *pbLink_temp = FALSE; -+ -+ } else -+ *pbLink_temp = TRUE; -+ -+ -+ if (pMgntInfo->bMediaConnect) { /* Default port*/ -+ -+ if (act_as_ap || pMgntInfo->mIbss) { -+ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; -+ /**/ -+ } else { -+ pHalData->MinUndecoratedPWDBForDM = pHalData->UndecoratedSmoothedPWDB; -+ /**/ -+ } -+ } else { /* associated entry pwdb*/ -+ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; -+ /**/ -+ } -+ -+ return pHalData->MinUndecoratedPWDBForDM; -+} -+ -+#endif -+ -+VOID -+odm_RSSIMonitorCheckMP( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte H2C_Parameter[4] = {0}; -+ u4Byte i; -+ BOOLEAN bExtRAInfo = FALSE; -+ u1Byte cmdlen = 3; -+ u1Byte TxBF_EN = 0, stbc_en = 0; -+ -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PRT_WLAN_STA pEntry = NULL; -+ s4Byte tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo; -+ u8Byte curTxOkCnt = 0, curRxOkCnt = 0; -+ //BOOLEAN FirstConnect = 0; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ -+#if (BEAMFORMING_SUPPORT == 1) -+ BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE; -+#endif -+ -+ PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); -+ -+ if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) { -+ bExtRAInfo = TRUE; -+ cmdlen = 4; -+ } -+ -+ //FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); -+ //pRA_Table->firstconnect = pHalData->bLinked; -+ -+ -+ /* -+ if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP)) -+ { -+ if(curRxOkCnt >(curTxOkCnt*6)) -+ PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015); -+ else -+ PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015); -+ } -+ -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821 || -+ pDM_Odm->SupportICType == ODM_RTL8814A|| pDM_Odm->SupportICType == ODM_RTL8822B) -+ { -+ if(curRxOkCnt >(curTxOkCnt*6)) -+ H2C_Parameter[3]|=RAINFO_BE_RX_STATE; -+ } -+ */ -+ -+ while (pLoopAdapter) { -+ -+ if (pLoopAdapter != NULL) { -+ pMgntInfo = &pLoopAdapter->MgntInfo; -+ curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; -+ curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; -+ pMgntInfo->lastTxOkCnt = curTxOkCnt; -+ pMgntInfo->lastRxOkCnt = curRxOkCnt; -+ } -+ -+ for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) { -+ -+ if (IsAPModeExist(pLoopAdapter)) { -+ if (GetFirstExtAdapter(pLoopAdapter) != NULL && -+ GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter) -+ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); -+ else if (GetFirstGOPort(pLoopAdapter) != NULL && -+ IsFirstGoAdapter(pLoopAdapter)) -+ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); -+ } else { -+ if (GetDefaultAdapter(pLoopAdapter) == pLoopAdapter) -+ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); -+ } -+ -+ if (pEntry != NULL) { -+ if (pEntry->bAssociated) { -+ -+ RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); -+ RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", -+ pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB)); -+ -+ //2 BF_en -+#if (BEAMFORMING_SUPPORT) -+ Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->AssociatedMacId); -+ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) -+ TxBF_EN = 1; -+#endif -+ //2 STBC_en -+ if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) || -+ TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX)) -+ stbc_en = 1; -+ -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) -+ tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) -+ tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; -+ -+ if (bExtRAInfo) { -+ if (curRxOkCnt > (curTxOkCnt * 6)) -+ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; -+ -+ if (TxBF_EN) -+ H2C_Parameter[3] |= RAINFO_BF_STATE; -+ else { -+ if (stbc_en) -+ H2C_Parameter[3] |= RAINFO_STBC_STATE; -+ } -+ -+ if ( pDM_Odm->NoisyDecision ) -+ { -+ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 -+ } -+ else -+ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); -+ -+ if (pDM_Odm->H2C_RARpt_connect) -+ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; -+ } -+ -+ H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF); -+ //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 -+ H2C_Parameter[0] = (pEntry->AssociatedMacId); -+ -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); -+ } -+ } else -+ break; -+ } -+ -+ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); -+ } -+ -+ if (tmpEntryMaxPWDB != 0) { // If associated entry is found -+ pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; -+ RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB)); -+ } else -+ pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; -+ -+ if (tmpEntryMinPWDB != 0xff) { // If associated entry is found -+ pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; -+ RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB)); -+ -+ } else -+ pHalData->EntryMinUndecoratedSmoothedPWDB = 0; -+ -+ // Indicate Rx signal strength to FW. -+ if (pHalData->bUseRAMask) { -+ PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo); -+ PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo); -+ -+ //2 BF_en -+#if (BEAMFORMING_SUPPORT == 1) -+ Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pDefaultMgntInfo->mMacId); -+ -+ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) -+ TxBF_EN = 1; -+#endif -+ -+ //2 STBC_en -+ if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX)) || -+ TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX)) -+ stbc_en = 1; -+ -+ if (bExtRAInfo) { -+ if (TxBF_EN) -+ H2C_Parameter[3] |= RAINFO_BF_STATE; -+ else { -+ if (stbc_en) -+ H2C_Parameter[3] |= RAINFO_STBC_STATE; -+ } -+ -+ if (pDM_Odm->H2C_RARpt_connect) -+ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; -+ -+ if ( pDM_Odm->NoisyDecision==1 ) -+ { -+ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] Send H2C to FW\n")); -+ } -+ else -+ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] H2C_Parameter=%x\n", H2C_Parameter[3])); -+ } -+ -+ H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); -+ //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 -+ H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 -+ -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); -+ -+ // BT 3.0 HS mode Rssi -+ if (pDM_Odm->bBtHsOperation) { -+ H2C_Parameter[2] = pDM_Odm->btHsRssi; -+ //H2C_Parameter[1] = 0x0; -+ H2C_Parameter[0] = 2; -+ -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); -+ } -+ } else -+ PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); -+ -+ if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8192E)) -+ odm_RSSIDumpToRegister(pDM_Odm); -+ -+ -+ { -+ PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); -+ BOOLEAN default_pointer_value, *pbLink_temp = &default_pointer_value; -+ s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min; -+ BOOLEAN bLink = FALSE; -+ -+ while (pLoopAdapter) { -+ LocalRSSI_Min = phydm_FindMinimumRSSI(pDM_Odm, pLoopAdapter, pbLink_temp); -+ //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min); -+ if ((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0)) -+ GlobalRSSI_min = LocalRSSI_Min; -+ -+ if (*pbLink_temp) -+ bLink = TRUE; -+ -+ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); -+ } -+ -+ pHalData->bLinked = bLink; -+ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc , ODM_CMNINFO_LINK, (u8Byte)bLink); -+ -+ if (bLink) -+ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min); -+ else -+ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0); -+ -+ } -+ -+#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+/*H2C_RSSI_REPORT*/ -+s8 phydm_rssi_report(PDM_ODM_T pDM_Odm, u8 mac_id) -+{ -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u8 H2C_Parameter[4] = {0}; -+ u8 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0; -+ u8 cmdlen = 4, first_connect = _FALSE; -+ u64 curTxOkCnt = 0, curRxOkCnt = 0; -+ PSTA_INFO_T pEntry = pDM_Odm->pODM_StaInfo[mac_id]; -+ -+ if (!IS_STA_VALID(pEntry)) -+ return _FAIL; -+ -+ if (mac_id != pEntry->mac_id) { -+ DBG_871X("%s mac_id:%u:%u invalid\n", __func__, mac_id, pEntry->mac_id); -+ rtw_warn_on(1); -+ return _FAIL; -+ } -+ -+ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ -+ return _FAIL; -+ -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) { -+ DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, pEntry->mac_id, MAC_ARG(pEntry->hwaddr)); -+ return _FAIL; -+ } -+ -+ curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes; -+ curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes; -+ if (curRxOkCnt > (curTxOkCnt * 6)) -+ UL_DL_STATE = 1; -+ else -+ UL_DL_STATE = 0; -+ -+ #ifdef CONFIG_BEAMFORMING -+ { -+ #if (BEAMFORMING_SUPPORT == 1) -+ BEAMFORMING_CAP Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->mac_id); -+ #else/*for drv beamforming*/ -+ BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, pEntry->mac_id); -+ #endif -+ -+ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) -+ TxBF_EN = 1; -+ else -+ TxBF_EN = 0; -+ } -+ #endif /*#ifdef CONFIG_BEAMFORMING*/ -+ -+ if (TxBF_EN) -+ STBC_TX = 0; -+ else { -+ #ifdef CONFIG_80211AC_VHT -+ if (IsSupportedVHT(pEntry->wireless_mode)) -+ STBC_TX = TEST_FLAG(pEntry->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX); -+ else -+ #endif -+ STBC_TX = TEST_FLAG(pEntry->htpriv.stbc_cap, STBC_HT_ENABLE_TX); -+ } -+ -+ H2C_Parameter[0] = (u8)(pEntry->mac_id & 0xFF); -+ H2C_Parameter[2] = pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F; -+ -+ if (UL_DL_STATE) -+ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; -+ -+ if (TxBF_EN) -+ H2C_Parameter[3] |= RAINFO_BF_STATE; -+ if (STBC_TX) -+ H2C_Parameter[3] |= RAINFO_STBC_STATE; -+ if (pDM_Odm->NoisyDecision) -+ H2C_Parameter[3] |= RAINFO_NOISY_STATE; -+ -+ if (pEntry->ra_rpt_linked == _FALSE) { -+ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; -+ pEntry->ra_rpt_linked = _TRUE; -+ first_connect = _TRUE; -+ } -+ -+ #if 1 -+ if (first_connect) { -+ DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, -+ pEntry->mac_id, MAC_ARG(pEntry->hwaddr), pEntry->rssi_stat.UndecoratedSmoothedPWDB); -+ -+ DBG_871X("%s RAINFO - TP:%s, TxBF:%s, STBC:%s, Noisy:%s, Firstcont:%s\n", __func__, -+ (UL_DL_STATE) ? "DL" : "UL", (TxBF_EN) ? "EN" : "DIS", (STBC_TX) ? "EN" : "DIS", -+ (pDM_Odm->NoisyDecision) ? "True" : "False", (first_connect) ? "True" : "False"); -+ } -+ #endif -+ -+ if (pHalData->fw_ractrl == _TRUE) { -+ #if (RTL8188E_SUPPORT == 1) -+ if (pDM_Odm->SupportICType == ODM_RTL8188E) -+ cmdlen = 3; -+ #endif -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); -+ } else { -+ #if ((RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1)) -+ if (pDM_Odm->SupportICType == ODM_RTL8188E) -+ ODM_RA_SetRSSI_8188E(pDM_Odm, (u8)(pEntry->mac_id & 0xFF), pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F); -+ #endif -+ } -+ return _SUCCESS; -+} -+ -+void phydm_ra_rssi_rpt_wk_hdl(PVOID pContext) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext; -+ int i; -+ u8 mac_id = 0xFF; -+ PSTA_INFO_T pEntry = NULL; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ pEntry = pDM_Odm->pODM_StaInfo[i]; -+ if (IS_STA_VALID(pEntry)) { -+ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ -+ continue; -+ if (pEntry->ra_rpt_linked == _FALSE) { -+ mac_id = i; -+ break; -+ } -+ } -+ } -+ if (mac_id != 0xFF) -+ phydm_rssi_report(pDM_Odm, mac_id); -+} -+void phydm_ra_rssi_rpt_wk(PVOID pContext) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext; -+ -+ rtw_run_in_thread_cmd(pDM_Odm->Adapter, phydm_ra_rssi_rpt_wk_hdl, pDM_Odm); -+} -+#endif -+ -+VOID -+odm_RSSIMonitorCheckCE( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PSTA_INFO_T pEntry; -+ int i; -+ int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; -+ u8 sta_cnt = 0; -+ -+ if (pDM_Odm->bLinked != _TRUE) -+ return; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ pEntry = pDM_Odm->pODM_StaInfo[i]; -+ if (IS_STA_VALID(pEntry)) { -+ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ -+ continue; -+ -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) -+ continue; -+ -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) -+ tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; -+ -+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) -+ tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; -+ -+ if (phydm_rssi_report(pDM_Odm, i)) -+ sta_cnt++; -+ } -+ } -+ /*DBG_871X("%s==> sta_cnt(%d)\n", __func__, sta_cnt);*/ -+ -+ if (tmpEntryMaxPWDB != 0) // If associated entry is found -+ pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; -+ else -+ pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; -+ -+ if (tmpEntryMinPWDB != 0xff) // If associated entry is found -+ pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; -+ else -+ pHalData->EntryMinUndecoratedSmoothedPWDB = 0; -+ -+ FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM -+ -+ pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM; -+ //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); -+#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+} -+ -+ -+VOID -+odm_RSSIMonitorCheckAP( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#if (RTL8812A_SUPPORT||RTL8881A_SUPPORT||RTL8192E_SUPPORT||RTL8814A_SUPPORT) -+ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte H2C_Parameter[4] = {0}; -+ u4Byte i; -+ BOOLEAN bExtRAInfo = FALSE; -+ u1Byte cmdlen = 3 ; -+ u1Byte TxBF_EN = 0, stbc_en = 0; -+ -+ prtl8192cd_priv priv = pDM_Odm->priv; -+ PSTA_INFO_T pstat; -+ BOOLEAN act_bfer = FALSE; -+ -+#ifdef BEAMFORMING_SUPPORT -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; -+ pDM_BdcTable->num_Txbfee_Client = 0; -+ pDM_BdcTable->num_Txbfer_Client = 0; -+#endif -+#endif -+ -+ if (pDM_Odm->H2C_RARpt_connect) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] First Connected\n")); -+ /**/ -+ } else if (priv->up_time % 2) -+ return; -+ -+ if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) { -+ bExtRAInfo = TRUE; -+ cmdlen = 4; -+ } -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ pstat = pDM_Odm->pODM_StaInfo[i]; -+ -+ if (IS_STA_VALID(pstat)) { -+ if (pstat->sta_in_firmware != 1) -+ continue; -+ -+ //2 BF_en -+#ifdef BEAMFORMING_SUPPORT -+ BEAMFORMING_CAP Beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, pstat->aid); -+ -+ if (Beamform_cap == BEAMFORMER_CAP_HT_EXPLICIT || Beamform_cap == BEAMFORMER_CAP_VHT_SU || -+ Beamform_cap == (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMEE_CAP_HT_EXPLICIT) || -+ Beamform_cap == (BEAMFORMER_CAP_VHT_SU | BEAMFORMEE_CAP_VHT_SU)) { -+ TxBF_EN = 1; -+ act_bfer = TRUE; -+ } -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*BDC*/ -+ -+ if (act_bfer == TRUE) { -+ pDM_BdcTable->w_BFee_Client[i] = 1; //AP act as BFer -+ pDM_BdcTable->num_Txbfee_Client++; -+ } else { -+ pDM_BdcTable->w_BFee_Client[i] = 0; //AP act as BFer -+ } -+ -+ if ((Beamform_cap & BEAMFORMEE_CAP_HT_EXPLICIT) || (Beamform_cap & BEAMFORMEE_CAP_VHT_SU)) { -+ pDM_BdcTable->w_BFer_Client[i] = 1; //AP act as BFee -+ pDM_BdcTable->num_Txbfer_Client++; -+ } else { -+ pDM_BdcTable->w_BFer_Client[i] = 0; //AP act as BFer -+ } -+#endif -+#endif -+ -+ //2 STBC_en -+ if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) && -+ ((pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_)) -+#ifdef RTK_AC_SUPPORT -+ || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_)) -+#endif -+ )) -+ stbc_en = 1; -+ -+ //2 RAINFO -+ -+ if (bExtRAInfo) { -+ if ((pstat->rx_avarage) > ((pstat->tx_avarage) * 6)) -+ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; -+ -+ if (TxBF_EN) -+ H2C_Parameter[3] |= RAINFO_BF_STATE; -+ else { -+ if (stbc_en) -+ H2C_Parameter[3] |= RAINFO_STBC_STATE; -+ } -+ -+ if ( pDM_Odm->NoisyDecision ) -+ { -+ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 -+ } -+ else -+ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); -+ -+ if (pDM_Odm->H2C_RARpt_connect) { -+ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] set Init rate by RSSI\n")); -+ } -+ -+ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RAINFO] H2C_Para[3] = %x\n",H2C_Parameter[3]));*/ -+ } -+ -+ H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF); -+ H2C_Parameter[0] = REMAP_AID(pstat); -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, -+ ("H2C_Parameter[3]=%d\n", H2C_Parameter[3])); -+ -+ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RSSI] H2C_Para[2] = %x, \n",H2C_Parameter[2])); -+ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[MACID] H2C_Para[0] = %x, \n",H2C_Parameter[0])); -+ -+ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); -+ -+ } -+ } -+ -+#endif -+#endif -+ -+} -+ -+ -+VOID -+odm_RateAdaptiveMaskInit( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); -+ -+ pMgntInfo->Ratr_State = DM_RATR_STA_INIT; -+ -+ if (pMgntInfo->DM_Type == DM_Type_ByDriver) -+ pHalData->bUseRAMask = TRUE; -+ else -+ pHalData->bUseRAMask = FALSE; -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ pOdmRA->Type = DM_Type_ByDriver; -+ if (pOdmRA->Type == DM_Type_ByDriver) -+ pDM_Odm->bUseRAMask = _TRUE; -+ else -+ pDM_Odm->bUseRAMask = _FALSE; -+#endif -+ -+ pOdmRA->RATRState = DM_RATR_STA_INIT; -+ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (pDM_Odm->SupportICType == ODM_RTL8812) -+ pOdmRA->LdpcThres = 50; -+ else -+ pOdmRA->LdpcThres = 35; -+ -+ pOdmRA->RtsThres = 35; -+ -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ pOdmRA->LdpcThres = 35; -+ pOdmRA->bUseLdpc = FALSE; -+ -+#else -+ pOdmRA->UltraLowRSSIThresh = 9; -+ -+#endif -+ -+ pOdmRA->HighRSSIThresh = 50; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \ -+ ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+ pOdmRA->LowRSSIThresh = 23; -+#else -+ pOdmRA->LowRSSIThresh = 20; -+#endif -+} -+/*----------------------------------------------------------------------------- -+ * Function: odm_RefreshRateAdaptiveMask() -+ * -+ * Overview: Update rate table mask according to rssi -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 05/27/2009 hpfan Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+VOID -+odm_RefreshRateAdaptiveMask( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n")); -+ if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n")); -+ return; -+ } -+ // -+ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate -+ // at the same time. In the stage2/3, we need to prive universal interface and merge all -+ // HW dynamic mechanism. -+ // -+ switch (pDM_Odm->SupportPlatform) { -+ case ODM_WIN: -+ odm_RefreshRateAdaptiveMaskMP(pDM_Odm); -+ break; -+ -+ case ODM_CE: -+ odm_RefreshRateAdaptiveMaskCE(pDM_Odm); -+ break; -+ -+ case ODM_AP: -+ case ODM_ADSL: -+ odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); -+ break; -+ } -+ -+} -+ -+VOID -+odm_RefreshRateAdaptiveMaskMP( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ PADAPTER pTargetAdapter = NULL; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); -+ -+ if (pAdapter->bDriverStopped) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); -+ return; -+ } -+ -+ if (!pHalData->bUseRAMask) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); -+ return; -+ } -+ -+ // if default port is connected, update RA table for default port (infrastructure mode only) -+ if (pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) { -+ odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n")); -+ if (ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State)) { -+ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State)); -+ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); -+ } else if (pDM_Odm->bChangeState) { -+ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); -+ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); -+ } -+ } -+ -+ // -+ // The following part configure AP/VWifi/IBSS rate adaptive mask. -+ // -+ -+ if (pMgntInfo->mIbss) // Target: AP/IBSS peer. -+ pTargetAdapter = GetDefaultAdapter(pAdapter); -+ else -+ pTargetAdapter = GetFirstAPAdapter(pAdapter); -+ -+ // if extension port (softap) is started, updaet RA table for more than one clients associate -+ if (pTargetAdapter != NULL) { -+ int i; -+ PRT_WLAN_STA pEntry; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ pEntry = AsocEntry_EnumStation(pTargetAdapter, i); -+ if (NULL != pEntry) { -+ if (pEntry->bAssociated) { -+ odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB); -+ -+ if (ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State)) { -+ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State)); -+ pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State); -+ } else if (pDM_Odm->bChangeState) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); -+ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); -+ } -+ } -+ } -+ } -+ } -+ -+ if (pMgntInfo->bSetTXPowerTrainingByOid) -+ pMgntInfo->bSetTXPowerTrainingByOid = FALSE; -+#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+} -+ -+ -+VOID -+odm_RefreshRateAdaptiveMaskCE( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i; -+ PADAPTER pAdapter = pDM_Odm->Adapter; -+ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; -+ -+ if (RTW_CANNOT_RUN(pAdapter)) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); -+ return; -+ } -+ -+ if (!pDM_Odm->bUseRAMask) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); -+ return; -+ } -+ -+ //printk("==> %s \n",__FUNCTION__); -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i]; -+ if (IS_STA_VALID(pstat)) { -+ if (IS_MCAST(pstat->hwaddr)) //if(psta->mac_id ==1) -+ continue; -+ -+#if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) -+ if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8821)) { -+ if (pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) { -+ pRA->bUseLdpc = TRUE; -+ pRA->bLowerRtsRate = TRUE; -+ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) -+ Set_RA_LDPC_8812(pstat, TRUE); -+ //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB); -+ } else if (pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres - 5)) { -+ pRA->bUseLdpc = FALSE; -+ pRA->bLowerRtsRate = FALSE; -+ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) -+ Set_RA_LDPC_8812(pstat, FALSE); -+ //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB); -+ } -+ } -+#endif -+ -+ if (TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level)) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); -+ //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); -+ rtw_hal_update_ra_mask(pstat, pstat->rssi_level); -+ } else if (pDM_Odm->bChangeState) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); -+ rtw_hal_update_ra_mask(pstat, pstat->rssi_level); -+ } -+ -+ } -+ } -+ -+#endif -+} -+ -+VOID -+odm_RefreshRateAdaptiveMaskAPADSL( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ struct rtl8192cd_priv *priv = pDM_Odm->priv; -+ struct aid_obj *aidarray; -+ u4Byte i; -+ PSTA_INFO_T pstat; -+ -+ if (priv->up_time % 2) -+ return; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ pstat = pDM_Odm->pODM_StaInfo[i]; -+ -+ if (IS_STA_VALID(pstat)) { -+#if defined(UNIVERSAL_REPEATER) || defined(MBSSID) -+ aidarray = container_of(pstat, struct aid_obj, station); -+ priv = aidarray->priv; -+#endif -+ -+ if (!priv->pmib->dot11StationConfigEntry.autoRate) -+ continue; -+ -+ if (ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level)) { -+ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); -+ -+#ifdef CONFIG_WLAN_HAL -+ if (IS_HAL_CHIP(priv)) { -+#ifdef WDS -+// if(!(pstat->state & WIFI_WDS))//if WDS donot setting -+#endif -+ GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level); -+ } else -+#endif -+#ifdef CONFIG_RTL_8812_SUPPORT -+ if (GET_CHIP_VER(priv) == VERSION_8812E) -+ UpdateHalRAMask8812(priv, pstat, 3); -+ else -+#endif -+#ifdef CONFIG_RTL_88E_SUPPORT -+ if (GET_CHIP_VER(priv) == VERSION_8188E) { -+#ifdef TXREPORT -+ add_RATid(priv, pstat); -+#endif -+ } else -+#endif -+ { -+#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) -+ add_update_RATid(priv, pstat); -+#endif -+ } -+ } -+ } -+ } -+#endif -+} -+ -+ -+// Return Value: BOOLEAN -+// - TRUE: RATRState is changed. -+BOOLEAN -+ODM_RAStateCheck( -+ IN PVOID pDM_VOID, -+ IN s4Byte RSSI, -+ IN BOOLEAN bForceUpdate, -+ OUT pu1Byte pRATRState -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; -+ const u1Byte GoUpGap = 5; -+ u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; -+ u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; -+ u1Byte RATRState; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", RSSI, *pRATRState)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Ori RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA)); -+ // Threshold Adjustment: -+ // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. -+ // Here GoUpGap is added to solve the boundary's level alternation issue. -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh; -+ if (pDM_Odm->SupportICType == ODM_RTL8881A) -+ LowRSSIThreshForRA = 30; // for LDPC / BCC switch -+#endif -+ -+ switch (*pRATRState) { -+ case DM_RATR_STA_INIT: -+ case DM_RATR_STA_HIGH: -+ break; -+ -+ case DM_RATR_STA_MIDDLE: -+ HighRSSIThreshForRA += GoUpGap; -+ break; -+ -+ case DM_RATR_STA_LOW: -+ HighRSSIThreshForRA += GoUpGap; -+ LowRSSIThreshForRA += GoUpGap; -+ break; -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ case DM_RATR_STA_ULTRA_LOW: -+ HighRSSIThreshForRA += GoUpGap; -+ LowRSSIThreshForRA += GoUpGap; -+ UltraLowRSSIThreshForRA += GoUpGap; -+ break; -+#endif -+ -+ default: -+ ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState)); -+ break; -+ } -+ -+ // Decide RATRState by RSSI. -+ if (RSSI > HighRSSIThreshForRA) -+ RATRState = DM_RATR_STA_HIGH; -+ else if (RSSI > LowRSSIThreshForRA) -+ RATRState = DM_RATR_STA_MIDDLE; -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -+ else if (RSSI > UltraLowRSSIThreshForRA) -+ RATRState = DM_RATR_STA_LOW; -+ else -+ RATRState = DM_RATR_STA_ULTRA_LOW; -+#else -+ else -+ RATRState = DM_RATR_STA_LOW; -+#endif -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Mod RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA)); -+ /*printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI);*/ -+ -+ if (*pRATRState != RATRState || bForceUpdate) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[RSSI Level Update] %d -> %d\n", *pRATRState, RATRState)); -+ *pRATRState = RATRState; -+ return TRUE; -+ } -+ -+ return FALSE; -+} -+ -+VOID -+odm_RefreshBasicRateMask( -+ IN PVOID pDM_VOID -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ static u1Byte Stage = 0; -+ u1Byte CurStage = 0; -+ OCTET_STRING osRateSet; -+ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); -+ u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; -+ -+ if (pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821) -+ return; -+ -+ if (pDM_Odm->bLinked == FALSE) // unlink Default port information -+ CurStage = 0; -+ else if (pDM_Odm->RSSI_Min < 40) // link RSSI < 40% -+ CurStage = 1; -+ else if (pDM_Odm->RSSI_Min > 45) // link RSSI > 45% -+ CurStage = 3; -+ else -+ CurStage = 2; // link 25% <= RSSI <= 30% -+ -+ if (CurStage != Stage) { -+ if (CurStage == 1) { -+ FillOctetString(osRateSet, RateSet, 5); -+ FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE); -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet); -+ } else if (CurStage == 3 && (Stage == 1 || Stage == 2)) -+ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates)); -+ } -+ -+ Stage = CurStage; -+#endif -+} -+ -+ -+VOID -+phydm_ra_info_init( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) -+ phydm_ra_dynamic_retry_limit_init(pDM_Odm); -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ phydm_ra_dynamic_rate_id_init(pDM_Odm); -+ #endif -+ -+ /*phydm_fw_trace_en_h2c(pDM_Odm, 1, 0, 0);*/ -+} -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+u1Byte -+odm_Find_RTS_Rate( -+ IN PVOID pDM_VOID, -+ IN u1Byte Tx_Rate, -+ IN BOOLEAN bErpProtect -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte RTS_Ini_Rate = ODM_RATE6M; -+ -+ if (bErpProtect) /* use CCK rate as RTS*/ -+ RTS_Ini_Rate = ODM_RATE1M; -+ else { -+ switch (Tx_Rate) { -+ case ODM_RATEVHTSS3MCS9: -+ case ODM_RATEVHTSS3MCS8: -+ case ODM_RATEVHTSS3MCS7: -+ case ODM_RATEVHTSS3MCS6: -+ case ODM_RATEVHTSS3MCS5: -+ case ODM_RATEVHTSS3MCS4: -+ case ODM_RATEVHTSS3MCS3: -+ case ODM_RATEVHTSS2MCS9: -+ case ODM_RATEVHTSS2MCS8: -+ case ODM_RATEVHTSS2MCS7: -+ case ODM_RATEVHTSS2MCS6: -+ case ODM_RATEVHTSS2MCS5: -+ case ODM_RATEVHTSS2MCS4: -+ case ODM_RATEVHTSS2MCS3: -+ case ODM_RATEVHTSS1MCS9: -+ case ODM_RATEVHTSS1MCS8: -+ case ODM_RATEVHTSS1MCS7: -+ case ODM_RATEVHTSS1MCS6: -+ case ODM_RATEVHTSS1MCS5: -+ case ODM_RATEVHTSS1MCS4: -+ case ODM_RATEVHTSS1MCS3: -+ case ODM_RATEMCS15: -+ case ODM_RATEMCS14: -+ case ODM_RATEMCS13: -+ case ODM_RATEMCS12: -+ case ODM_RATEMCS11: -+ case ODM_RATEMCS7: -+ case ODM_RATEMCS6: -+ case ODM_RATEMCS5: -+ case ODM_RATEMCS4: -+ case ODM_RATEMCS3: -+ case ODM_RATE54M: -+ case ODM_RATE48M: -+ case ODM_RATE36M: -+ case ODM_RATE24M: -+ RTS_Ini_Rate = ODM_RATE24M; -+ break; -+ case ODM_RATEVHTSS3MCS2: -+ case ODM_RATEVHTSS3MCS1: -+ case ODM_RATEVHTSS2MCS2: -+ case ODM_RATEVHTSS2MCS1: -+ case ODM_RATEVHTSS1MCS2: -+ case ODM_RATEVHTSS1MCS1: -+ case ODM_RATEMCS10: -+ case ODM_RATEMCS9: -+ case ODM_RATEMCS2: -+ case ODM_RATEMCS1: -+ case ODM_RATE18M: -+ case ODM_RATE12M: -+ RTS_Ini_Rate = ODM_RATE12M; -+ break; -+ case ODM_RATEVHTSS3MCS0: -+ case ODM_RATEVHTSS2MCS0: -+ case ODM_RATEVHTSS1MCS0: -+ case ODM_RATEMCS8: -+ case ODM_RATEMCS0: -+ case ODM_RATE9M: -+ case ODM_RATE6M: -+ RTS_Ini_Rate = ODM_RATE6M; -+ break; -+ case ODM_RATE11M: -+ case ODM_RATE5_5M: -+ case ODM_RATE2M: -+ case ODM_RATE1M: -+ RTS_Ini_Rate = ODM_RATE1M; -+ break; -+ default: -+ RTS_Ini_Rate = ODM_RATE6M; -+ break; -+ } -+ } -+ -+ if (*pDM_Odm->pBandType == 1) { -+ if (RTS_Ini_Rate < ODM_RATE6M) -+ RTS_Ini_Rate = ODM_RATE6M; -+ } -+ return RTS_Ini_Rate; -+ -+} -+ -+VOID -+odm_Set_RA_DM_ARFB_by_Noisy( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ /*DbgPrint("DM_ARFB ====>\n");*/ -+ if (pDM_Odm->bNoisyState) { -+ ODM_Write4Byte(pDM_Odm, 0x430, 0x00000000); -+ ODM_Write4Byte(pDM_Odm, 0x434, 0x05040200); -+ /*DbgPrint("DM_ARFB ====> Noisy State\n");*/ -+ } else { -+ ODM_Write4Byte(pDM_Odm, 0x430, 0x02010000); -+ ODM_Write4Byte(pDM_Odm, 0x434, 0x07050403); -+ /*DbgPrint("DM_ARFB ====> Clean State\n");*/ -+ } -+ -+} -+ -+VOID -+ODM_UpdateNoisyState( -+ IN PVOID pDM_VOID, -+ IN BOOLEAN bNoisyStateFromC2H -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ /*DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);*/ -+ if (pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 || -+ pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E) -+ pDM_Odm->bNoisyState = bNoisyStateFromC2H; -+ odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm); -+}; -+ -+u4Byte -+Set_RA_DM_Ratrbitmap_by_Noisy( -+ IN PVOID pDM_VOID, -+ IN WIRELESS_MODE WirelessMode, -+ IN u4Byte ratr_bitmap, -+ IN u1Byte rssi_level -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte ret_bitmap = ratr_bitmap; -+ -+ return ret_bitmap; -+ -+ switch (WirelessMode) { -+ case WIRELESS_MODE_AC_24G: -+ case WIRELESS_MODE_AC_5G: -+ case WIRELESS_MODE_AC_ONLY: -+ if (pDM_Odm->bNoisyState) { /*in Noisy State*/ -+ if (rssi_level == 1) -+ ret_bitmap &= 0xfc3e0c08; // Reserve MCS 5-9 -+ else if (rssi_level == 2) -+ ret_bitmap &= 0xfe3f8e08; // Reserve MCS 3-9 -+ else if (rssi_level == 3) -+ ret_bitmap &= 0xffffffff; -+ else -+ ret_bitmap &= 0xffffffff; -+ } else { /* in SNR State*/ -+ if (rssi_level == 1) -+ ret_bitmap &= 0xfe3f0e08; // Reserve MCS 4-9 -+ else if (rssi_level == 2) -+ ret_bitmap &= 0xff3fcf8c; // Reserve MCS 2-9 -+ else if (rssi_level == 3) -+ ret_bitmap &= 0xffffffff; -+ else -+ ret_bitmap &= 0xffffffff; -+ } -+ break; -+ case WIRELESS_MODE_B: -+ case WIRELESS_MODE_A: -+ case WIRELESS_MODE_G: -+ case WIRELESS_MODE_N_24G: -+ case WIRELESS_MODE_N_5G: -+ if (pDM_Odm->bNoisyState) { -+ if (rssi_level == 1) -+ ret_bitmap &= 0x0f0e0c08; // Reserve MCS 4-7; MCS12-15 -+ else if (rssi_level == 2) -+ ret_bitmap &= 0x0fcfce0c; // Reserve MCS 2-7; MCS10-15 -+ else if (rssi_level == 3) -+ ret_bitmap &= 0xffffffff; -+ else -+ ret_bitmap &= 0xffffffff; -+ } else { -+ if (rssi_level == 1) -+ ret_bitmap &= 0x0f8f8e08; // Reserve MCS 3-7; MCS11-15 -+ else if (rssi_level == 2) -+ ret_bitmap &= 0x0fefef8c; // Reserve MCS 1-7; MCS9-15 -+ else if (rssi_level == 3) -+ ret_bitmap &= 0xffffffff; -+ else -+ ret_bitmap &= 0xffffffff; -+ } -+ break; -+ default: -+ break; -+ } -+ /*DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x\n", rssi_level, ret_bitmap);*/ -+ return ret_bitmap; -+ -+} -+ -+VOID -+ODM_UpdateInitRate( -+ IN PVOID pDM_VOID, -+ IN u1Byte Rate -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte p = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Get C2H Command! Rate=0x%x\n", Rate)); -+ -+ pDM_Odm->TxRate = Rate; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+#if USE_WORKITEM -+ PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); -+#else -+ if (pDM_Odm->SupportICType == ODM_RTL8821) { -+#if (RTL8821A_SUPPORT == 1) -+ ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); -+#endif -+ } else if (pDM_Odm->SupportICType == ODM_RTL8812) { -+ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) { -+#if (RTL8812A_SUPPORT == 1) -+ ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); -+#endif -+ } -+ } else if (pDM_Odm->SupportICType == ODM_RTL8723B) { -+#if (RTL8723B_SUPPORT == 1) -+ ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); -+#endif -+ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { -+ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) { -+#if (RTL8192E_SUPPORT == 1) -+ ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); -+#endif -+ } -+ } else if (pDM_Odm->SupportICType == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT == 1) -+ ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); -+#endif -+ } -+#endif -+#else -+ PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); -+#endif -+#endif -+ -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+odm_RSSIDumpToRegister( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ if (pDM_Odm->SupportICType == ODM_RTL8812) { -+ PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]); -+ PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]); -+ -+ /* Rx EVM*/ -+ PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]); -+ PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]); -+ -+ /* Rx SNR*/ -+ PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); -+ PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); -+ -+ /* Rx Cfo_Short*/ -+ PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]); -+ PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]); -+ -+ /* Rx Cfo_Tail*/ -+ PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]); -+ PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]); -+ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { -+ PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]); -+ PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]); -+ /* Rx EVM*/ -+ PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]); -+ PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]); -+ /* Rx SNR*/ -+ PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); -+ PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); -+ /* Rx Cfo_Short*/ -+ PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]); -+ PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]); -+ /* Rx Cfo_Tail*/ -+ PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]); -+ PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]); -+ } -+} -+ -+VOID -+odm_RefreshLdpcRtsMP( -+ IN PADAPTER pAdapter, -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte mMacId, -+ IN u1Byte IOTPeer, -+ IN s4Byte UndecoratedSmoothedPWDB -+) -+{ -+ BOOLEAN bCtlLdpc = FALSE; -+ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); -+ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; -+ -+ if (pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812) -+ return; -+ -+ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) -+ bCtlLdpc = TRUE; -+ else if (pDM_Odm->SupportICType == ODM_RTL8812 && -+ IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) -+ bCtlLdpc = TRUE; -+ -+ if (bCtlLdpc) { -+ if (UndecoratedSmoothedPWDB < (pRA->LdpcThres - 5)) -+ MgntSet_TX_LDPC(pAdapter, mMacId, TRUE); -+ else if (UndecoratedSmoothedPWDB > pRA->LdpcThres) -+ MgntSet_TX_LDPC(pAdapter, mMacId, FALSE); -+ } -+ -+ if (UndecoratedSmoothedPWDB < (pRA->RtsThres - 5)) -+ pRA->bLowerRtsRate = TRUE; -+ else if (UndecoratedSmoothedPWDB > pRA->RtsThres) -+ pRA->bLowerRtsRate = FALSE; -+} -+ -+VOID -+ODM_DynamicARFBSelect( -+ IN PVOID pDM_VOID, -+ IN u1Byte rate, -+ IN BOOLEAN Collision_State -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -+ -+ if (pDM_Odm->SupportICType != ODM_RTL8192E) -+ return; -+ -+ if (Collision_State == pRA_Table->PT_collision_pre) -+ return; -+ -+ if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12) { -+ if (Collision_State == 1) { -+ if (rate == DESC_RATEMCS12) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501); -+ } else if (rate == DESC_RATEMCS11) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605); -+ } else if (rate == DESC_RATEMCS10) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706); -+ } else if (rate == DESC_RATEMCS9) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707); -+ } else { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808); -+ } -+ } else { /* Collision_State == 0*/ -+ if (rate == DESC_RATEMCS12) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); -+ } else if (rate == DESC_RATEMCS11) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807); -+ } else if (rate == DESC_RATEMCS10) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908); -+ } else if (rate == DESC_RATEMCS9) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808); -+ } else { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909); -+ } -+ } -+ } else { /* MCS13~MCS15, 1SS, G-mode*/ -+ if (Collision_State == 1) { -+ if (rate == DESC_RATEMCS15) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302); -+ } else if (rate == DESC_RATEMCS14) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302); -+ } else if (rate == DESC_RATEMCS13) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502); -+ } else { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402); -+ } -+ } else { // Collision_State == 0 -+ if (rate == DESC_RATEMCS15) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504); -+ } else if (rate == DESC_RATEMCS14) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); -+ } else if (rate == DESC_RATEMCS13) { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); -+ } else { -+ -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000); -+ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); -+ } -+ -+ -+ } -+ -+ } -+ pRA_Table->PT_collision_pre = Collision_State; -+} -+ -+VOID -+ODM_RateAdaptiveStateApInit( -+ IN PVOID PADAPTER_VOID, -+ IN PRT_WLAN_STA pEntry -+) -+{ -+ PADAPTER Adapter = (PADAPTER)PADAPTER_VOID; -+ pEntry->Ratr_State = DM_RATR_STA_INIT; -+} -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+ -+static void -+FindMinimumRSSI( -+ IN PADAPTER pAdapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -+ -+ /*Determine the minimum RSSI*/ -+ -+ if ((pDM_Odm->bLinked != _TRUE) && -+ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) { -+ pHalData->MinUndecoratedPWDBForDM = 0; -+ /*ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any\n"));*/ -+ } else -+ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; -+ -+ /*DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);*/ -+ /*ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));*/ -+} -+ -+u8Byte -+PhyDM_Get_Rate_Bitmap_Ex( -+ IN PVOID pDM_VOID, -+ IN u4Byte macid, -+ IN u8Byte ra_mask, -+ IN u1Byte rssi_level, -+ OUT u8Byte *dm_RA_Mask, -+ OUT u1Byte *dm_RteID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PSTA_INFO_T pEntry; -+ u8Byte rate_bitmap = 0; -+ u1Byte WirelessMode; -+ -+ pEntry = pDM_Odm->pODM_StaInfo[macid]; -+ if (!IS_STA_VALID(pEntry)) -+ return ra_mask; -+ WirelessMode = pEntry->wireless_mode; -+ switch (WirelessMode) { -+ case ODM_WM_B: -+ if (ra_mask & 0x000000000000000c) /* 11M or 5.5M enable */ -+ rate_bitmap = 0x000000000000000d; -+ else -+ rate_bitmap = 0x000000000000000f; -+ break; -+ -+ case (ODM_WM_G): -+ case (ODM_WM_A): -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x0000000000000f00; -+ else -+ rate_bitmap = 0x0000000000000ff0; -+ break; -+ -+ case (ODM_WM_B|ODM_WM_G): -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x0000000000000f00; -+ else if (rssi_level == DM_RATR_STA_MIDDLE) -+ rate_bitmap = 0x0000000000000ff0; -+ else -+ rate_bitmap = 0x0000000000000ff5; -+ break; -+ -+ case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): -+ case (ODM_WM_B|ODM_WM_N24G): -+ case (ODM_WM_G|ODM_WM_N24G): -+ case (ODM_WM_A|ODM_WM_N5G): { -+ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x00000000000f0000; -+ else if (rssi_level == DM_RATR_STA_MIDDLE) -+ rate_bitmap = 0x00000000000ff000; -+ else { -+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) -+ rate_bitmap = 0x00000000000ff015; -+ else -+ rate_bitmap = 0x00000000000ff005; -+ } -+ } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) { -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x000000000f8f0000; -+ else if (rssi_level == DM_RATR_STA_MIDDLE) -+ rate_bitmap = 0x000000000f8ff000; -+ else { -+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) -+ rate_bitmap = 0x000000000f8ff015; -+ else -+ rate_bitmap = 0x000000000f8ff005; -+ } -+ } else { -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x0000000f0f0f0000; -+ else if (rssi_level == DM_RATR_STA_MIDDLE) -+ rate_bitmap = 0x0000000fcfcfe000; -+ else { -+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) -+ rate_bitmap = 0x0000000ffffff015; -+ else -+ rate_bitmap = 0x0000000ffffff005; -+ } -+ } -+ } -+ break; -+ -+ case (ODM_WM_AC|ODM_WM_G): -+ if (rssi_level == 1) -+ rate_bitmap = 0x00000000fc3f0000; -+ else if (rssi_level == 2) -+ rate_bitmap = 0x00000000fffff000; -+ else -+ rate_bitmap = 0x00000000ffffffff; -+ break; -+ -+ case (ODM_WM_AC|ODM_WM_A): -+ -+ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { -+ if (rssi_level == 1) /* add by Gary for ac-series */ -+ rate_bitmap = 0x00000000003f8000; -+ else if (rssi_level == 2) -+ rate_bitmap = 0x00000000003fe000; -+ else -+ rate_bitmap = 0x00000000003ff010; -+ } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) { -+ if (rssi_level == 1) /* add by Gary for ac-series */ -+ rate_bitmap = 0x00000000fe3f8000; /* VHT 2SS MCS3~9 */ -+ else if (rssi_level == 2) -+ rate_bitmap = 0x00000000fffff000; /* VHT 2SS MCS0~9 */ -+ else -+ rate_bitmap = 0x00000000fffff010; /* All */ -+ } else { -+ if (rssi_level == 1) /* add by Gary for ac-series */ -+ rate_bitmap = 0x000003f8fe3f8000ULL; /* VHT 3SS MCS3~9 */ -+ else if (rssi_level == 2) -+ rate_bitmap = 0x000003fffffff000ULL; /* VHT3SS MCS0~9 */ -+ else -+ rate_bitmap = 0x000003fffffff010ULL; /* All */ -+ } -+ break; -+ -+ default: -+ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) -+ rate_bitmap = 0x00000000000fffff; -+ else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) -+ rate_bitmap = 0x000000000fffffff; -+ else -+ rate_bitmap = 0x0000003fffffffffULL; -+ break; -+ -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%016llx\n", rssi_level, WirelessMode, rate_bitmap)); -+ -+ return (ra_mask & rate_bitmap); -+} -+ -+ -+u4Byte -+ODM_Get_Rate_Bitmap( -+ IN PVOID pDM_VOID, -+ IN u4Byte macid, -+ IN u4Byte ra_mask, -+ IN u1Byte rssi_level -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PSTA_INFO_T pEntry; -+ u4Byte rate_bitmap = 0; -+ u1Byte WirelessMode; -+ //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); -+ -+ -+ pEntry = pDM_Odm->pODM_StaInfo[macid]; -+ if (!IS_STA_VALID(pEntry)) -+ return ra_mask; -+ -+ WirelessMode = pEntry->wireless_mode; -+ -+ switch (WirelessMode) { -+ case ODM_WM_B: -+ if (ra_mask & 0x0000000c) //11M or 5.5M enable -+ rate_bitmap = 0x0000000d; -+ else -+ rate_bitmap = 0x0000000f; -+ break; -+ -+ case (ODM_WM_G): -+ case (ODM_WM_A): -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x00000f00; -+ else -+ rate_bitmap = 0x00000ff0; -+ break; -+ -+ case (ODM_WM_B|ODM_WM_G): -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x00000f00; -+ else if (rssi_level == DM_RATR_STA_MIDDLE) -+ rate_bitmap = 0x00000ff0; -+ else -+ rate_bitmap = 0x00000ff5; -+ break; -+ -+ case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : -+ case (ODM_WM_B|ODM_WM_N24G) : -+ case (ODM_WM_G|ODM_WM_N24G) : -+ case (ODM_WM_A|ODM_WM_N5G) : { -+ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x000f0000; -+ else if (rssi_level == DM_RATR_STA_MIDDLE) -+ rate_bitmap = 0x000ff000; -+ else { -+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) -+ rate_bitmap = 0x000ff015; -+ else -+ rate_bitmap = 0x000ff005; -+ } -+ } else { -+ if (rssi_level == DM_RATR_STA_HIGH) -+ rate_bitmap = 0x0f8f0000; -+ else if (rssi_level == DM_RATR_STA_MIDDLE) -+ rate_bitmap = 0x0f8ff000; -+ else { -+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) -+ rate_bitmap = 0x0f8ff015; -+ else -+ rate_bitmap = 0x0f8ff005; -+ } -+ } -+ } -+ break; -+ -+ case (ODM_WM_AC|ODM_WM_G): -+ if (rssi_level == 1) -+ rate_bitmap = 0xfc3f0000; -+ else if (rssi_level == 2) -+ rate_bitmap = 0xfffff000; -+ else -+ rate_bitmap = 0xffffffff; -+ break; -+ -+ case (ODM_WM_AC|ODM_WM_A): -+ -+ if (pDM_Odm->RFType == RF_1T1R) { -+ if (rssi_level == 1) // add by Gary for ac-series -+ rate_bitmap = 0x003f8000; -+ else if (rssi_level == 2) -+ rate_bitmap = 0x003ff000; -+ else -+ rate_bitmap = 0x003ff010; -+ } else { -+ if (rssi_level == 1) // add by Gary for ac-series -+ rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9 -+ else if (rssi_level == 2) -+ rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9 -+ else -+ rate_bitmap = 0xfffff010; // All -+ } -+ break; -+ -+ default: -+ if (pDM_Odm->RFType == RF_1T2R) -+ rate_bitmap = 0x000fffff; -+ else -+ rate_bitmap = 0x0fffffff; -+ break; -+ -+ } -+ -+ DBG_871X("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap)); -+ -+ return (ra_mask & rate_bitmap); -+ -+} -+ -+#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (defined(CONFIG_RA_DBG_CMD)) ++VOID ++ODM_C2HRaParaReportHandler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ u1Byte para_idx = CmdBuf[0]; //Retry Penalty, NH, NL ++ u1Byte RateTypeStart = CmdBuf[1]; ++ u1Byte RateTypeLength = CmdLen - 2; ++ u1Byte i; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[ From FW C2H RA Para ] CmdBuf[0]= (( %d ))\n", CmdBuf[0])); ++ ++ if (para_idx == RADBG_RTY_PENALTY) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |RTY Penality Index| \n")); ++ ++ for (i = 0 ; i < (RateTypeLength) ; i++) { ++ if (pRA_Table->is_ra_dbg_init) ++ pRA_Table->RTY_P_default[RateTypeStart + i] = CmdBuf[2 + i]; ++ ++ pRA_Table->RTY_P[RateTypeStart + i] = CmdBuf[2 + i]; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RTY_P[RateTypeStart + i])); ++ } ++ ++ } else if (para_idx == RADBG_N_HIGH) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-High| \n")); ++ ++ ++ } else if (para_idx == RADBG_N_LOW){ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-Low| \n")); ++ ++ } ++ else if (para_idx == RADBG_RATE_UP_RTY_RATIO) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Up RTY Ratio| \n")); ++ ++ for (i = 0 ; i < (RateTypeLength) ; i++) { ++ if (pRA_Table->is_ra_dbg_init) ++ pRA_Table->RATE_UP_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i]; ++ ++ pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i]; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i])); ++ } ++ } else if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Down RTY Ratio| \n")); ++ ++ for (i = 0 ; i < (RateTypeLength) ; i++) { ++ if (pRA_Table->is_ra_dbg_init) ++ pRA_Table->RATE_DOWN_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i]; ++ ++ pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i]; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i])); ++ } ++ } else if (para_idx == RADBG_DEBUG_MONITOR1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Rate =", CmdBuf[2] & 0x7f)); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI =", (CmdBuf[2] & 0x80) >> 7)); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW =", CmdBuf[3])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW_max =", CmdBuf[4])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate0 =", CmdBuf[5])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate1 =", CmdBuf[6])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[7])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[8])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI_support =", CmdBuf[9])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "try_ness =", CmdBuf[10])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "pre_rate =", CmdBuf[11])); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x \n", "BW =", CmdBuf[2])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[3])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[4])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Hightest Rate =", CmdBuf[5])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Lowest Rate =", CmdBuf[6])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "SGI_support =", CmdBuf[7])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Rate_ID =", CmdBuf[8]));; ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ } else if (para_idx == RADBG_DEBUG_MONITOR2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RateID =", CmdBuf[1])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "highest_rate =", CmdBuf[2])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "lowest_rate =", CmdBuf[3])); ++ ++ for (i = 4 ; i <= 11 ; i++) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("RAMASK = 0x%x \n", CmdBuf[i])); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x%x %x%x %x%x %x%x \n", "RA Mask:", ++ CmdBuf[8], CmdBuf[7], CmdBuf[6], CmdBuf[5], CmdBuf[4], CmdBuf[3], CmdBuf[2], CmdBuf[1])); ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ } else if (para_idx == RADBG_DEBUG_MONITOR3) { ++ ++ for (i = 0 ; i < (CmdLen - 1) ; i++) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("content[%d] = %d \n", i, CmdBuf[1 + i])); ++ } else if (para_idx == RADBG_DEBUG_MONITOR4) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s {%d.%d} \n", "RA Version =", CmdBuf[1], CmdBuf[2])); ++ ++} ++ ++VOID ++odm_RA_ParaAdjust_Send_H2C( ++ IN PVOID pDM_VOID ++) ++{ ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte H2C_Parameter[6] = {0}; ++ ++ H2C_Parameter[0] = RA_FIRST_MACID; ++ ++ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("RA_Para_feedback_req= (( %d )) \n",pRA_Table->RA_Para_feedback_req )); ++ if (pRA_Table->RA_Para_feedback_req) { //H2C_Parameter[5]=1 ; ask FW for all RA parameters ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Ask FW for RA parameter \n")); ++ H2C_Parameter[5] |= BIT1; //ask FW to report RA parameters ++ H2C_Parameter[1] = pRA_Table->para_idx; //pRA_Table->para_idx; ++ pRA_Table->RA_Para_feedback_req = 0; ++ } else { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Send H2C to FW for modifying RA parameter \n")); ++ ++ H2C_Parameter[1] = pRA_Table->para_idx; ++ H2C_Parameter[2] = pRA_Table->rate_idx; ++ //1 [8 bit] ++ if (pRA_Table->para_idx == RADBG_RTY_PENALTY || pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO || pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { ++ H2C_Parameter[3] = pRA_Table->value; ++ H2C_Parameter[4] = 0; ++ } ++ //1 [16 bit] ++ else { //if ((pRA_Table->rate_idx==RADBG_N_HIGH)||(pRA_Table->rate_idx==RADBG_N_LOW)) ++ H2C_Parameter[3] = (u1Byte)(((pRA_Table->value_16) & 0xf0) >> 4); //byte1 ++ H2C_Parameter[4] = (u1Byte)((pRA_Table->value_16) & 0x0f); //byte0 ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[1] = 0x%x \n", H2C_Parameter[1])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[2] = 0x%x \n", H2C_Parameter[2])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[3] = 0x%x \n", H2C_Parameter[3])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[4] = 0x%x \n", H2C_Parameter[4])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[5] = 0x%x \n", H2C_Parameter[5])); ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RA_PARA_ADJUST, 6, H2C_Parameter); ++ ++} ++ ++ ++VOID ++odm_RA_ParaAdjust( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte para_idx = pRA_Table->para_idx; ++ u1Byte rate_idx = pRA_Table->rate_idx; ++ u1Byte value = pRA_Table->value; ++ u1Byte Pre_value = 0xff; ++ ++ BOOLEAN sign = 0; ++ ++ if (pRA_Table->para_idx == RADBG_RTY_PENALTY) { ++ Pre_value = pRA_Table->RTY_P[rate_idx]; ++ pRA_Table->RTY_P[rate_idx] = value; ++ pRA_Table->RTY_P_modify_note[rate_idx] = 1; ++ } else if (pRA_Table->para_idx == RADBG_N_HIGH) { ++ ++ } else if (pRA_Table->para_idx == RADBG_N_LOW) { ++ ++ } else if (pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO) { ++ Pre_value = pRA_Table->RATE_UP_RTY_RATIO[rate_idx]; ++ pRA_Table->RATE_UP_RTY_RATIO[rate_idx] = value; ++ pRA_Table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1; ++ } else if (pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { ++ Pre_value = pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx]; ++ pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx] = value; ++ pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1; ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" Change RA Papa[%d], Rate[ %d ], ((%d)) -> ((%d)) \n", pRA_Table->para_idx, rate_idx, Pre_value, value)); ++ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); ++} ++ ++ ++VOID ++phydm_ra_print_msg( ++ IN PVOID pDM_VOID, ++ IN u1Byte *value, ++ IN u1Byte *value_default, ++ IN u1Byte *modify_note ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u4Byte i; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate index| |Current-value| |Default-value| |Modify?| \n")); ++ for (i = 0 ; i <= (pRA_Table->rate_length); i++) { ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %20d %25d %20s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . "))); ++#else ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %10d %14d %14s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . "))); ++#endif ++ } ++ ++} ++ ++VOID ++odm_RA_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ pRA_Table->is_ra_dbg_init = FALSE; ++ ++ if (dm_value[0] == 100) { /*1 Print RA Parameters*/ ++ u1Byte default_pointer_value; ++ u1Byte *pvalue; ++ u1Byte *pvalue_default; ++ u1Byte *pmodify_note; ++ ++ pvalue = pvalue_default = pmodify_note = &default_pointer_value; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n")); ++ ++ if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [1] RTY_PENALTY\n")); ++ pvalue = &(pRA_Table->RTY_P[0]); ++ pvalue_default = &(pRA_Table->RTY_P_default[0]); ++ pmodify_note = (u1Byte *)&(pRA_Table->RTY_P_modify_note[0]); ++ } else if (dm_value[1] == RADBG_N_HIGH) { /* [2]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [2] N_HIGH\n")); ++ ++ } else if (dm_value[1] == RADBG_N_LOW) { /*[3]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [3] N_LOW\n")); ++ ++ } else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [8] RATE_UP_RTY_RATIO\n")); ++ pvalue = &(pRA_Table->RATE_UP_RTY_RATIO[0]); ++ pvalue_default = &(pRA_Table->RATE_UP_RTY_RATIO_default[0]); ++ pmodify_note = (u1Byte *)&(pRA_Table->RATE_UP_RTY_RATIO_modify_note[0]); ++ } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [9] RATE_DOWN_RTY_RATIO\n")); ++ pvalue = &(pRA_Table->RATE_DOWN_RTY_RATIO[0]); ++ pvalue_default = &(pRA_Table->RATE_DOWN_RTY_RATIO_default[0]); ++ pmodify_note = (u1Byte *)&(pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[0]); ++ } ++ ++ phydm_ra_print_msg(pDM_Odm, pvalue, pvalue_default, pmodify_note); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n\n")); ++ ++ } else if (dm_value[0] == 101) { ++ pRA_Table->para_idx = (u1Byte)dm_value[1]; ++ ++ pRA_Table->RA_Para_feedback_req = 1; ++ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); ++ } else { ++ pRA_Table->para_idx = (u1Byte)dm_value[0]; ++ pRA_Table->rate_idx = (u1Byte)dm_value[1]; ++ pRA_Table->value = (u1Byte)dm_value[2]; ++ ++ odm_RA_ParaAdjust(pDM_Odm); ++ } ++ ++} ++ ++VOID ++odm_RA_ParaAdjust_init( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte i; ++ u1Byte ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO}; ++ /* ++ RTY_PENALTY = 1, //u8 ++ N_HIGH = 2, ++ N_LOW = 3, ++ RATE_UP_TABLE = 4, ++ RATE_DOWN_TABLE = 5, ++ TRYING_NECESSARY = 6, ++ DROPING_NECESSARY = 7, ++ RATE_UP_RTY_RATIO = 8, //u8 ++ RATE_DOWN_RTY_RATIO= 9, //u8 ++ ALL_PARA = 0xff ++ ++ */ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_RA_ParaAdjust_init \n")); ++ ++ pRA_Table->is_ra_dbg_init = TRUE; ++ for (i = 0; i < 3; i++) { ++ pRA_Table->RA_Para_feedback_req = 1; ++ pRA_Table->para_idx = ra_para_pool_u8[i]; ++ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); ++ } ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ pRA_Table->rate_length = ODM_RATEMCS15; ++ else if ((pDM_Odm->SupportICType == ODM_RTL8723B) || (pDM_Odm->SupportICType == ODM_RTL8188E)) ++ pRA_Table->rate_length = ODM_RATEMCS7; ++ else if ((pDM_Odm->SupportICType == ODM_RTL8821) || (pDM_Odm->SupportICType == ODM_RTL8881A)) ++ pRA_Table->rate_length = ODM_RATEVHTSS1MCS9; ++ else if (pDM_Odm->SupportICType == ODM_RTL8812) ++ pRA_Table->rate_length = ODM_RATEVHTSS2MCS9; ++ else if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ pRA_Table->rate_length = ODM_RATEVHTSS3MCS9; ++ else ++ pRA_Table->rate_length = ODM_RATEVHTSS4MCS9; ++ ++} ++ ++#else ++ ++VOID ++ODM_C2HRaParaReportHandler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++} ++ ++VOID ++odm_RA_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value ++) ++{ ++} ++ ++VOID ++odm_RA_ParaAdjust_init( ++ IN PVOID pDM_VOID ++) ++ ++{ ++} ++ ++#endif //#if (defined(CONFIG_RA_DBG_CMD)) ++ ++VOID ++phydm_ra_dynamic_retry_count( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ PSTA_INFO_T pEntry; ++ u1Byte i, retry_offset; ++ u4Byte ma_rx_tp; ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pDM_Odm->pre_b_noisy = %d\n", pDM_Odm->pre_b_noisy ));*/ ++ if (pDM_Odm->pre_b_noisy != pDM_Odm->NoisyDecision) { ++ ++ if (pDM_Odm->NoisyDecision) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Noisy Env. RA fallback value\n")); ++ ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x0); ++ ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x04030201); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Clean Env. RA fallback value\n")); ++ ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x02010000); ++ ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x06050403); ++ } ++ pDM_Odm->pre_b_noisy = pDM_Odm->NoisyDecision; ++ } ++} ++ ++#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) ++ ++VOID ++phydm_retry_limit_table_bound( ++ IN PVOID pDM_VOID, ++ IN u1Byte *retry_limit, ++ IN u1Byte offset ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ if (*retry_limit > offset) { ++ ++ *retry_limit -= offset; ++ ++ if (*retry_limit < pRA_Table->retrylimit_low) ++ *retry_limit = pRA_Table->retrylimit_low; ++ else if (*retry_limit > pRA_Table->retrylimit_high) ++ *retry_limit = pRA_Table->retrylimit_high; ++ } else ++ *retry_limit = pRA_Table->retrylimit_low; ++} ++ ++VOID ++phydm_reset_retry_limit_table( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte i; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*support all IC platform*/ ++ ++ #else ++ #if ((RTL8192E_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1)) ++ u1Byte per_rate_retrylimit_table_20M[ODM_RATEMCS15+1] = { ++ 1, 1, 2, 4, /*CCK*/ ++ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ ++ 2, 4, 6, 8, 12, 18, 20, 22, /*20M HT-1SS*/ ++ 2, 4, 6, 8, 12, 18, 20, 22 /*20M HT-2SS*/ ++ }; ++ u1Byte per_rate_retrylimit_table_40M[ODM_RATEMCS15+1] = { ++ 1, 1, 2, 4, /*CCK*/ ++ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ ++ 4, 8, 12, 16, 24, 32, 32, 32, /*40M HT-1SS*/ ++ 4, 8, 12, 16, 24, 32, 32, 32 /*40M HT-2SS*/ ++ }; ++ ++ #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) ++ ++ #elif (RTL8812A_SUPPORT == 1) ++ ++ #elif(RTL8814A_SUPPORT == 1) ++ ++ #else ++ ++ #endif ++ #endif ++ ++ memcpy(&(pRA_Table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX); ++ memcpy(&(pRA_Table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX); ++ ++ for (i = 0; i < ODM_NUM_RATE_IDX; i++) { ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), 0); ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), 0); ++ } ++} ++ ++VOID ++phydm_ra_dynamic_retry_limit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ PSTA_INFO_T pEntry; ++ u1Byte i, retry_offset; ++ u4Byte ma_rx_tp; ++ ++ ++ if (pDM_Odm->pre_number_active_client == pDM_Odm->number_active_client) { ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" pre_number_active_client == number_active_client\n")); ++ return; ++ ++ } else { ++ if (pDM_Odm->number_active_client == 1) { ++ phydm_reset_retry_limit_table(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("one client only->reset to default value\n")); ++ } else { ++ ++ retry_offset = pDM_Odm->number_active_client * pRA_Table->retry_descend_num; ++ ++ for (i = 0; i < ODM_NUM_RATE_IDX; i++) { ++ ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), retry_offset); ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), retry_offset); ++ } ++ } ++ } ++} ++ ++VOID ++phydm_ra_dynamic_retry_limit_init( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ pRA_Table->retry_descend_num = RA_RETRY_DESCEND_NUM; ++ pRA_Table->retrylimit_low = RA_RETRY_LIMIT_LOW; ++ pRA_Table->retrylimit_high = RA_RETRY_LIMIT_HIGH; ++ ++ phydm_reset_retry_limit_table(pDM_Odm); ++ ++} ++#else ++VOID ++phydm_ra_dynamic_retry_limit( ++ IN PVOID pDM_VOID ++) ++{ ++} ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++VOID ++phydm_ra_dynamic_rate_id_on_assoc( ++ IN PVOID pDM_VOID, ++ IN u1Byte wireless_mode, ++ IN u1Byte init_rate_id ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", pDM_Odm->RFType, wireless_mode, init_rate_id)); ++ ++ if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) { ++ ++ if ((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) && ++ (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) ++ ){ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set N-2SS ARFR5 table\n")); ++ ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ } else if ((pDM_Odm->SupportICType & (ODM_RTL8812)) && ++ (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) ++ ){ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set AC-2SS ARFR0 table\n")); ++ ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ } ++ } ++ ++} ++ ++VOID ++phydm_ra_dynamic_rate_id_init( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) { ++ ++ ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ ++ ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ } ++} ++ ++VOID ++phydm_update_rate_id( ++ IN PVOID pDM_VOID, ++ IN u1Byte rate, ++ IN u1Byte platform_macid ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte current_tx_ss; ++ u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/ ++ u1Byte wireless_mode; ++ u1Byte phydm_macid; ++ PSTA_INFO_T pEntry; ++ ++ if (rate_idx >= ODM_RATEVHTSS2MCS0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS2MCS0))); ++ /*dummy for SD4 check patch*/ ++ } else if (rate_idx >= ODM_RATEVHTSS1MCS0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS1MCS0))); ++ /*dummy for SD4 check patch*/ ++ } else if (rate_idx >= ODM_RATEMCS0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEMCS0))); ++ /*dummy for SD4 check patch*/ ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx)); ++ /*dummy for SD4 check patch*/ ++ } ++ ++ phydm_macid = pDM_Odm->platform2phydm_macid_table[platform_macid]; ++ pEntry = pDM_Odm->pODM_StaInfo[phydm_macid]; ++ ++ if (IS_STA_VALID(pEntry)) { ++ wireless_mode = pEntry->WirelessMode; ++ ++ if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) { ++ ++ pEntry->ratr_idx = pEntry->ratr_idx_init; ++ if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/ ++ if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/ ++ ++ pEntry->ratr_idx = ARFR_5_RATE_ID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_5\n")); ++ } ++ } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/ ++ if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/ ++ ++ pEntry->ratr_idx = ARFR_0_RATE_ID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_0\n")); ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, pEntry->ratr_idx)); ++ } ++ } ++ ++} ++#endif ++ ++VOID ++phydm_c2h_ra_report_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte legacy_table[12] = {1,2,5,11,6,9,12,18,24,36,48,54}; ++ u1Byte macid = CmdBuf[1]; ++ ++ u1Byte rate = CmdBuf[0]; ++ u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/ ++ u1Byte vht_en=(rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0; ++ u1Byte b_sgi = (rate & 0x80)>>7; ++ ++ u1Byte pre_rate = pRA_Table->link_tx_rate[macid]; ++ u1Byte pre_rate_idx = pre_rate & 0x7f; /*remove bit7 SGI*/ ++ u1Byte pre_vht_en=(pre_rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0; ++ u1Byte pre_b_sgi = (pre_rate & 0x80)>>7; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ GET_HAL_DATA(Adapter)->CurrentRARate = HwRateToMRate(rate_idx); ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ ODM_UpdateInitRate(pDM_Odm, rate_idx); ++ #endif ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,("RA: rate_idx=0x%x , sgi = %d\n", rate_idx, b_sgi));*/ ++ /*if (pDM_Odm->SupportICType & (ODM_RTL8703B))*/ ++ { ++ if (CmdLen >= 4) { ++ if (CmdBuf[3] == 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Init-Rate Update\n")); ++ /**/ ++ } else if (CmdBuf[3] == 0xff) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("FW Level: Fix rate\n")); ++ /**/ ++ } else if (CmdBuf[3] == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Success\n")); ++ /**/ ++ } else if (CmdBuf[3] == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Fail & Try Again\n")); ++ /**/ ++ } else if (CmdBuf[3] == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Rate Back\n")); ++ /**/ ++ } else if (CmdBuf[3] == 4) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("start rate by RSSI\n")); ++ /**/ ++ } else if (CmdBuf[3] == 5) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try rate\n")); ++ /**/ ++ } ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Tx Rate Update, MACID[%d] ( %s%s%s%s%d%s%s ) -> ( %s%s%s%s%d%s%s)\n", ++ macid, ++ ((pre_rate_idx >= ODM_RATEVHTSS1MCS0) && (pre_rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", ++ ((pre_rate_idx >= ODM_RATEVHTSS2MCS0) && (pre_rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", ++ ((pre_rate_idx >= ODM_RATEVHTSS3MCS0) && (pre_rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", ++ (pre_rate_idx >= ODM_RATEMCS0) ? "MCS " : "", ++ (pre_vht_en) ? ((pre_rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((pre_rate_idx >= ODM_RATEMCS0)? (pre_rate_idx - ODM_RATEMCS0) : ((pre_rate_idx <= ODM_RATE54M)?legacy_table[pre_rate_idx]:0)), ++ (pre_b_sgi) ? "-S" : " ", ++ (pre_rate_idx >= ODM_RATEMCS0) ? "" : "M", ++ ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", ++ ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", ++ ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", ++ (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", ++ (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((rate_idx >= ODM_RATEMCS0)? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M)?legacy_table[rate_idx]:0)), ++ (b_sgi) ? "-S" : " ", ++ (rate_idx >= ODM_RATEMCS0) ? "" : "M" )); ++ ++ pRA_Table->link_tx_rate[macid] = rate; ++ ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) ++ phydm_update_rate_id(pDM_Odm, rate, macid); ++ #endif ++ ++} ++ ++VOID ++odm_RSSIMonitorInit( ++ IN PVOID pDM_VOID ++) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ pRA_Table->firstconnect = FALSE; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ pRA_Table->PT_collision_pre = TRUE; //used in ODM_DynamicARFBSelect(WIN only) ++#endif ++#endif ++} ++ ++VOID ++ODM_RAPostActionOnAssoc( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ pDM_Odm->H2C_RARpt_connect = 1; ++ odm_RSSIMonitorCheck(pDM_Odm); ++ pDM_Odm->H2C_RARpt_connect = 0; ++} ++ ++VOID ++odm_RSSIMonitorCheck( ++ IN PVOID pDM_VOID ++) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) ++ return; ++ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) { ++ case ODM_WIN: ++ odm_RSSIMonitorCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_RSSIMonitorCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_RSSIMonitorCheckAP(pDM_Odm); ++ break; ++ ++ case ODM_ADSL: ++ //odm_DIGAP(pDM_Odm); ++ break; ++ } ++ ++} // odm_RSSIMonitorCheck ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++s4Byte ++phydm_FindMinimumRSSI( ++IN PDM_ODM_T pDM_Odm, ++IN PADAPTER pAdapter, ++IN OUT BOOLEAN *pbLink_temp ++ ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ BOOLEAN act_as_ap = ACTING_AS_AP(pAdapter); ++ ++ /*DbgPrint("bMediaConnect = %d, ACTING_AS_AP = %d , EntryMinUndecoratedSmoothedPWDB = %d\n", ++ pMgntInfo->bMediaConnect,act_as_ap,pHalData->EntryMinUndecoratedSmoothedPWDB);*/ ++ ++ ++ /* 1.Determine the minimum RSSI */ ++ if ((!pMgntInfo->bMediaConnect) || ++ (act_as_ap && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/ ++ ++ pHalData->MinUndecoratedPWDBForDM = 0; ++ *pbLink_temp = FALSE; ++ ++ } else ++ *pbLink_temp = TRUE; ++ ++ ++ if (pMgntInfo->bMediaConnect) { /* Default port*/ ++ ++ if (act_as_ap || pMgntInfo->mIbss) { ++ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ /**/ ++ } else { ++ pHalData->MinUndecoratedPWDBForDM = pHalData->UndecoratedSmoothedPWDB; ++ /**/ ++ } ++ } else { /* associated entry pwdb*/ ++ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ /**/ ++ } ++ ++ return pHalData->MinUndecoratedPWDBForDM; ++} ++ ++#endif ++ ++VOID ++odm_RSSIMonitorCheckMP( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte H2C_Parameter[4] = {0}; ++ u4Byte i; ++ BOOLEAN bExtRAInfo = FALSE; ++ u1Byte cmdlen = 3; ++ u1Byte TxBF_EN = 0, stbc_en = 0; ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_WLAN_STA pEntry = NULL; ++ s4Byte tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo; ++ u8Byte curTxOkCnt = 0, curRxOkCnt = 0; ++ //BOOLEAN FirstConnect = 0; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE; ++#endif ++ ++ PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); ++ ++ if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) { ++ bExtRAInfo = TRUE; ++ cmdlen = 4; ++ } ++ ++ //FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ //pRA_Table->firstconnect = pHalData->bLinked; ++ ++ ++ /* ++ if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP)) ++ { ++ if(curRxOkCnt >(curTxOkCnt*6)) ++ PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015); ++ else ++ PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015); ++ } ++ ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8814A|| pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ if(curRxOkCnt >(curTxOkCnt*6)) ++ H2C_Parameter[3]|=RAINFO_BE_RX_STATE; ++ } ++ */ ++ ++ while (pLoopAdapter) { ++ ++ if (pLoopAdapter != NULL) { ++ pMgntInfo = &pLoopAdapter->MgntInfo; ++ curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; ++ curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; ++ pMgntInfo->lastTxOkCnt = curTxOkCnt; ++ pMgntInfo->lastRxOkCnt = curRxOkCnt; ++ } ++ ++ for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) { ++ ++ if (IsAPModeExist(pLoopAdapter)) { ++ if (GetFirstExtAdapter(pLoopAdapter) != NULL && ++ GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter) ++ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); ++ else if (GetFirstGOPort(pLoopAdapter) != NULL && ++ IsFirstGoAdapter(pLoopAdapter)) ++ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); ++ } else { ++ if (GetDefaultAdapter(pLoopAdapter) == pLoopAdapter) ++ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); ++ } ++ ++ if (pEntry != NULL) { ++ if (pEntry->bAssociated) { ++ ++ RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); ++ RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", ++ pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB)); ++ ++ //2 BF_en ++#if (BEAMFORMING_SUPPORT) ++ Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->AssociatedMacId); ++ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) ++ TxBF_EN = 1; ++#endif ++ //2 STBC_en ++ if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) || ++ TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX)) ++ stbc_en = 1; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) ++ tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) ++ tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if (bExtRAInfo) { ++ if (curRxOkCnt > (curTxOkCnt * 6)) ++ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; ++ ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ else { ++ if (stbc_en) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ } ++ ++ if ( pDM_Odm->NoisyDecision ) ++ { ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 ++ } ++ else ++ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); ++ ++ if (pDM_Odm->H2C_RARpt_connect) ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ } ++ ++ H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF); ++ //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 ++ H2C_Parameter[0] = (pEntry->AssociatedMacId); ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ } ++ } else ++ break; ++ } ++ ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ } ++ ++ if (tmpEntryMaxPWDB != 0) { // If associated entry is found ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; ++ RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB)); ++ } else ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; ++ ++ if (tmpEntryMinPWDB != 0xff) { // If associated entry is found ++ pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; ++ RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB)); ++ ++ } else ++ pHalData->EntryMinUndecoratedSmoothedPWDB = 0; ++ ++ // Indicate Rx signal strength to FW. ++ if (pHalData->bUseRAMask) { ++ PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo); ++ PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo); ++ ++ //2 BF_en ++#if (BEAMFORMING_SUPPORT == 1) ++ Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pDefaultMgntInfo->mMacId); ++ ++ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) ++ TxBF_EN = 1; ++#endif ++ ++ //2 STBC_en ++ if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX)) || ++ TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX)) ++ stbc_en = 1; ++ ++ if (bExtRAInfo) { ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ else { ++ if (stbc_en) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ } ++ ++ if (pDM_Odm->H2C_RARpt_connect) ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ ++ if ( pDM_Odm->NoisyDecision==1 ) ++ { ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] Send H2C to FW\n")); ++ } ++ else ++ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] H2C_Parameter=%x\n", H2C_Parameter[3])); ++ } ++ ++ H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); ++ //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 ++ H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ ++ // BT 3.0 HS mode Rssi ++ if (pDM_Odm->bBtHsOperation) { ++ H2C_Parameter[2] = pDM_Odm->btHsRssi; ++ //H2C_Parameter[1] = 0x0; ++ H2C_Parameter[0] = 2; ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ } ++ } else ++ PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); ++ ++ if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8192E)) ++ odm_RSSIDumpToRegister(pDM_Odm); ++ ++ ++ { ++ PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); ++ BOOLEAN default_pointer_value, *pbLink_temp = &default_pointer_value; ++ s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min; ++ BOOLEAN bLink = FALSE; ++ ++ while (pLoopAdapter) { ++ LocalRSSI_Min = phydm_FindMinimumRSSI(pDM_Odm, pLoopAdapter, pbLink_temp); ++ //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min); ++ if ((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0)) ++ GlobalRSSI_min = LocalRSSI_Min; ++ ++ if (*pbLink_temp) ++ bLink = TRUE; ++ ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ } ++ ++ pHalData->bLinked = bLink; ++ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc , ODM_CMNINFO_LINK, (u8Byte)bLink); ++ ++ if (bLink) ++ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min); ++ else ++ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0); ++ ++ } ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*H2C_RSSI_REPORT*/ ++s8 phydm_rssi_report(PDM_ODM_T pDM_Odm, u8 mac_id) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 H2C_Parameter[4] = {0}; ++ u8 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0; ++ u8 cmdlen = 4, first_connect = _FALSE; ++ u64 curTxOkCnt = 0, curRxOkCnt = 0; ++ PSTA_INFO_T pEntry = pDM_Odm->pODM_StaInfo[mac_id]; ++ ++ if (!IS_STA_VALID(pEntry)) ++ return _FAIL; ++ ++ if (mac_id != pEntry->mac_id) { ++ DBG_871X("%s mac_id:%u:%u invalid\n", __func__, mac_id, pEntry->mac_id); ++ rtw_warn_on(1); ++ return _FAIL; ++ } ++ ++ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ ++ return _FAIL; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) { ++ DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, pEntry->mac_id, MAC_ARG(pEntry->hwaddr)); ++ return _FAIL; ++ } ++ ++ curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes; ++ curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes; ++ if (curRxOkCnt > (curTxOkCnt * 6)) ++ UL_DL_STATE = 1; ++ else ++ UL_DL_STATE = 0; ++ ++ #ifdef CONFIG_BEAMFORMING ++ { ++ #if (BEAMFORMING_SUPPORT == 1) ++ BEAMFORMING_CAP Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->mac_id); ++ #else/*for drv beamforming*/ ++ BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, pEntry->mac_id); ++ #endif ++ ++ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) ++ TxBF_EN = 1; ++ else ++ TxBF_EN = 0; ++ } ++ #endif /*#ifdef CONFIG_BEAMFORMING*/ ++ ++ if (TxBF_EN) ++ STBC_TX = 0; ++ else { ++ #ifdef CONFIG_80211AC_VHT ++ if (IsSupportedVHT(pEntry->wireless_mode)) ++ STBC_TX = TEST_FLAG(pEntry->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX); ++ else ++ #endif ++ STBC_TX = TEST_FLAG(pEntry->htpriv.stbc_cap, STBC_HT_ENABLE_TX); ++ } ++ ++ H2C_Parameter[0] = (u8)(pEntry->mac_id & 0xFF); ++ H2C_Parameter[2] = pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F; ++ ++ if (UL_DL_STATE) ++ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; ++ ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ if (STBC_TX) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ if (pDM_Odm->NoisyDecision) ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; ++ ++ if (pEntry->ra_rpt_linked == _FALSE) { ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ pEntry->ra_rpt_linked = _TRUE; ++ first_connect = _TRUE; ++ } ++ ++ #if 1 ++ if (first_connect) { ++ DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, ++ pEntry->mac_id, MAC_ARG(pEntry->hwaddr), pEntry->rssi_stat.UndecoratedSmoothedPWDB); ++ ++ DBG_871X("%s RAINFO - TP:%s, TxBF:%s, STBC:%s, Noisy:%s, Firstcont:%s\n", __func__, ++ (UL_DL_STATE) ? "DL" : "UL", (TxBF_EN) ? "EN" : "DIS", (STBC_TX) ? "EN" : "DIS", ++ (pDM_Odm->NoisyDecision) ? "True" : "False", (first_connect) ? "True" : "False"); ++ } ++ #endif ++ ++ if (pHalData->fw_ractrl == _TRUE) { ++ #if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ cmdlen = 3; ++ #endif ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ } else { ++ #if ((RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ ODM_RA_SetRSSI_8188E(pDM_Odm, (u8)(pEntry->mac_id & 0xFF), pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F); ++ #endif ++ } ++ return _SUCCESS; ++} ++ ++void phydm_ra_rssi_rpt_wk_hdl(PVOID pContext) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext; ++ int i; ++ u8 mac_id = 0xFF; ++ PSTA_INFO_T pEntry = NULL; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pEntry = pDM_Odm->pODM_StaInfo[i]; ++ if (IS_STA_VALID(pEntry)) { ++ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ ++ continue; ++ if (pEntry->ra_rpt_linked == _FALSE) { ++ mac_id = i; ++ break; ++ } ++ } ++ } ++ if (mac_id != 0xFF) ++ phydm_rssi_report(pDM_Odm, mac_id); ++} ++void phydm_ra_rssi_rpt_wk(PVOID pContext) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext; ++ ++ rtw_run_in_thread_cmd(pDM_Odm->Adapter, phydm_ra_rssi_rpt_wk_hdl, pDM_Odm); ++} ++#endif ++ ++VOID ++odm_RSSIMonitorCheckCE( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PSTA_INFO_T pEntry; ++ int i; ++ int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; ++ u8 sta_cnt = 0; ++ ++ if (pDM_Odm->bLinked != _TRUE) ++ return; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pEntry = pDM_Odm->pODM_StaInfo[i]; ++ if (IS_STA_VALID(pEntry)) { ++ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ ++ continue; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) ++ continue; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) ++ tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) ++ tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if (phydm_rssi_report(pDM_Odm, i)) ++ sta_cnt++; ++ } ++ } ++ /*DBG_871X("%s==> sta_cnt(%d)\n", __func__, sta_cnt);*/ ++ ++ if (tmpEntryMaxPWDB != 0) // If associated entry is found ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; ++ else ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; ++ ++ if (tmpEntryMinPWDB != 0xff) // If associated entry is found ++ pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; ++ else ++ pHalData->EntryMinUndecoratedSmoothedPWDB = 0; ++ ++ FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM ++ ++ pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM; ++ //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); ++#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++} ++ ++ ++VOID ++odm_RSSIMonitorCheckAP( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#if (RTL8812A_SUPPORT||RTL8881A_SUPPORT||RTL8192E_SUPPORT||RTL8814A_SUPPORT) ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte H2C_Parameter[4] = {0}; ++ u4Byte i; ++ BOOLEAN bExtRAInfo = FALSE; ++ u1Byte cmdlen = 3 ; ++ u1Byte TxBF_EN = 0, stbc_en = 0; ++ ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PSTA_INFO_T pstat; ++ BOOLEAN act_bfer = FALSE; ++ ++#ifdef BEAMFORMING_SUPPORT ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ pDM_BdcTable->num_Txbfee_Client = 0; ++ pDM_BdcTable->num_Txbfer_Client = 0; ++#endif ++#endif ++ ++ if (pDM_Odm->H2C_RARpt_connect) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] First Connected\n")); ++ /**/ ++ } else if (priv->up_time % 2) ++ return; ++ ++ if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) { ++ bExtRAInfo = TRUE; ++ cmdlen = 4; ++ } ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pstat = pDM_Odm->pODM_StaInfo[i]; ++ ++ if (IS_STA_VALID(pstat)) { ++ if (pstat->sta_in_firmware != 1) ++ continue; ++ ++ //2 BF_en ++#ifdef BEAMFORMING_SUPPORT ++ BEAMFORMING_CAP Beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, pstat->aid); ++ ++ if (Beamform_cap == BEAMFORMER_CAP_HT_EXPLICIT || Beamform_cap == BEAMFORMER_CAP_VHT_SU || ++ Beamform_cap == (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMEE_CAP_HT_EXPLICIT) || ++ Beamform_cap == (BEAMFORMER_CAP_VHT_SU | BEAMFORMEE_CAP_VHT_SU)) { ++ TxBF_EN = 1; ++ act_bfer = TRUE; ++ } ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*BDC*/ ++ ++ if (act_bfer == TRUE) { ++ pDM_BdcTable->w_BFee_Client[i] = 1; //AP act as BFer ++ pDM_BdcTable->num_Txbfee_Client++; ++ } else { ++ pDM_BdcTable->w_BFee_Client[i] = 0; //AP act as BFer ++ } ++ ++ if ((Beamform_cap & BEAMFORMEE_CAP_HT_EXPLICIT) || (Beamform_cap & BEAMFORMEE_CAP_VHT_SU)) { ++ pDM_BdcTable->w_BFer_Client[i] = 1; //AP act as BFee ++ pDM_BdcTable->num_Txbfer_Client++; ++ } else { ++ pDM_BdcTable->w_BFer_Client[i] = 0; //AP act as BFer ++ } ++#endif ++#endif ++ ++ //2 STBC_en ++ if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) && ++ ((pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_)) ++#ifdef RTK_AC_SUPPORT ++ || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_)) ++#endif ++ )) ++ stbc_en = 1; ++ ++ //2 RAINFO ++ ++ if (bExtRAInfo) { ++ if ((pstat->rx_avarage) > ((pstat->tx_avarage) * 6)) ++ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; ++ ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ else { ++ if (stbc_en) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ } ++ ++ if ( pDM_Odm->NoisyDecision ) ++ { ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 ++ } ++ else ++ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); ++ ++ if (pDM_Odm->H2C_RARpt_connect) { ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] set Init rate by RSSI\n")); ++ } ++ ++ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RAINFO] H2C_Para[3] = %x\n",H2C_Parameter[3]));*/ ++ } ++ ++ H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF); ++ H2C_Parameter[0] = REMAP_AID(pstat); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("H2C_Parameter[3]=%d\n", H2C_Parameter[3])); ++ ++ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RSSI] H2C_Para[2] = %x, \n",H2C_Parameter[2])); ++ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[MACID] H2C_Para[0] = %x, \n",H2C_Parameter[0])); ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ ++ } ++ } ++ ++#endif ++#endif ++ ++} ++ ++ ++VOID ++odm_RateAdaptiveMaskInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ ++ pMgntInfo->Ratr_State = DM_RATR_STA_INIT; ++ ++ if (pMgntInfo->DM_Type == DM_Type_ByDriver) ++ pHalData->bUseRAMask = TRUE; ++ else ++ pHalData->bUseRAMask = FALSE; ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pOdmRA->Type = DM_Type_ByDriver; ++ if (pOdmRA->Type == DM_Type_ByDriver) ++ pDM_Odm->bUseRAMask = _TRUE; ++ else ++ pDM_Odm->bUseRAMask = _FALSE; ++#endif ++ ++ pOdmRA->RATRState = DM_RATR_STA_INIT; ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ pOdmRA->LdpcThres = 50; ++ else ++ pOdmRA->LdpcThres = 35; ++ ++ pOdmRA->RtsThres = 35; ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ pOdmRA->LdpcThres = 35; ++ pOdmRA->bUseLdpc = FALSE; ++ ++#else ++ pOdmRA->UltraLowRSSIThresh = 9; ++ ++#endif ++ ++ pOdmRA->HighRSSIThresh = 50; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \ ++ ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ pOdmRA->LowRSSIThresh = 23; ++#else ++ pOdmRA->LowRSSIThresh = 20; ++#endif ++} ++/*----------------------------------------------------------------------------- ++ * Function: odm_RefreshRateAdaptiveMask() ++ * ++ * Overview: Update rate table mask according to rssi ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 05/27/2009 hpfan Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++odm_RefreshRateAdaptiveMask( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n")); ++ if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n")); ++ return; ++ } ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) { ++ case ODM_WIN: ++ odm_RefreshRateAdaptiveMaskMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_RefreshRateAdaptiveMaskCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ case ODM_ADSL: ++ odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); ++ break; ++ } ++ ++} ++ ++VOID ++odm_RefreshRateAdaptiveMaskMP( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PADAPTER pTargetAdapter = NULL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); ++ ++ if (pAdapter->bDriverStopped) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); ++ return; ++ } ++ ++ if (!pHalData->bUseRAMask) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); ++ return; ++ } ++ ++ // if default port is connected, update RA table for default port (infrastructure mode only) ++ if (pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) { ++ odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n")); ++ if (ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State)) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); ++ } else if (pDM_Odm->bChangeState) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); ++ } ++ } ++ ++ // ++ // The following part configure AP/VWifi/IBSS rate adaptive mask. ++ // ++ ++ if (pMgntInfo->mIbss) // Target: AP/IBSS peer. ++ pTargetAdapter = GetDefaultAdapter(pAdapter); ++ else ++ pTargetAdapter = GetFirstAPAdapter(pAdapter); ++ ++ // if extension port (softap) is started, updaet RA table for more than one clients associate ++ if (pTargetAdapter != NULL) { ++ int i; ++ PRT_WLAN_STA pEntry; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pEntry = AsocEntry_EnumStation(pTargetAdapter, i); ++ if (NULL != pEntry) { ++ if (pEntry->bAssociated) { ++ odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB); ++ ++ if (ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State)) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State); ++ } else if (pDM_Odm->bChangeState) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); ++ } ++ } ++ } ++ } ++ } ++ ++ if (pMgntInfo->bSetTXPowerTrainingByOid) ++ pMgntInfo->bSetTXPowerTrainingByOid = FALSE; ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++} ++ ++ ++VOID ++odm_RefreshRateAdaptiveMaskCE( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; ++ ++ if (RTW_CANNOT_RUN(pAdapter)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); ++ return; ++ } ++ ++ if (!pDM_Odm->bUseRAMask) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); ++ return; ++ } ++ ++ //printk("==> %s \n",__FUNCTION__); ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i]; ++ if (IS_STA_VALID(pstat)) { ++ if (IS_MCAST(pstat->hwaddr)) //if(psta->mac_id ==1) ++ continue; ++ ++#if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) ++ if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8821)) { ++ if (pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) { ++ pRA->bUseLdpc = TRUE; ++ pRA->bLowerRtsRate = TRUE; ++ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) ++ Set_RA_LDPC_8812(pstat, TRUE); ++ //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB); ++ } else if (pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres - 5)) { ++ pRA->bUseLdpc = FALSE; ++ pRA->bLowerRtsRate = FALSE; ++ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) ++ Set_RA_LDPC_8812(pstat, FALSE); ++ //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB); ++ } ++ } ++#endif ++ ++ if (TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); ++ //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); ++ rtw_hal_update_ra_mask(pstat, pstat->rssi_level); ++ } else if (pDM_Odm->bChangeState) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); ++ rtw_hal_update_ra_mask(pstat, pstat->rssi_level); ++ } ++ ++ } ++ } ++ ++#endif ++} ++ ++VOID ++odm_RefreshRateAdaptiveMaskAPADSL( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ struct aid_obj *aidarray; ++ u4Byte i; ++ PSTA_INFO_T pstat; ++ ++ if (priv->up_time % 2) ++ return; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pstat = pDM_Odm->pODM_StaInfo[i]; ++ ++ if (IS_STA_VALID(pstat)) { ++#if defined(UNIVERSAL_REPEATER) || defined(MBSSID) ++ aidarray = container_of(pstat, struct aid_obj, station); ++ priv = aidarray->priv; ++#endif ++ ++ if (!priv->pmib->dot11StationConfigEntry.autoRate) ++ continue; ++ ++ if (ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level)) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); ++ ++#ifdef CONFIG_WLAN_HAL ++ if (IS_HAL_CHIP(priv)) { ++#ifdef WDS ++// if(!(pstat->state & WIFI_WDS))//if WDS donot setting ++#endif ++ GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level); ++ } else ++#endif ++#ifdef CONFIG_RTL_8812_SUPPORT ++ if (GET_CHIP_VER(priv) == VERSION_8812E) ++ UpdateHalRAMask8812(priv, pstat, 3); ++ else ++#endif ++#ifdef CONFIG_RTL_88E_SUPPORT ++ if (GET_CHIP_VER(priv) == VERSION_8188E) { ++#ifdef TXREPORT ++ add_RATid(priv, pstat); ++#endif ++ } else ++#endif ++ { ++#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) ++ add_update_RATid(priv, pstat); ++#endif ++ } ++ } ++ } ++ } ++#endif ++} ++ ++ ++// Return Value: BOOLEAN ++// - TRUE: RATRState is changed. ++BOOLEAN ++ODM_RAStateCheck( ++ IN PVOID pDM_VOID, ++ IN s4Byte RSSI, ++ IN BOOLEAN bForceUpdate, ++ OUT pu1Byte pRATRState ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; ++ const u1Byte GoUpGap = 5; ++ u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; ++ u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; ++ u1Byte RATRState; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", RSSI, *pRATRState)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Ori RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA)); ++ // Threshold Adjustment: ++ // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. ++ // Here GoUpGap is added to solve the boundary's level alternation issue. ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh; ++ if (pDM_Odm->SupportICType == ODM_RTL8881A) ++ LowRSSIThreshForRA = 30; // for LDPC / BCC switch ++#endif ++ ++ switch (*pRATRState) { ++ case DM_RATR_STA_INIT: ++ case DM_RATR_STA_HIGH: ++ break; ++ ++ case DM_RATR_STA_MIDDLE: ++ HighRSSIThreshForRA += GoUpGap; ++ break; ++ ++ case DM_RATR_STA_LOW: ++ HighRSSIThreshForRA += GoUpGap; ++ LowRSSIThreshForRA += GoUpGap; ++ break; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ case DM_RATR_STA_ULTRA_LOW: ++ HighRSSIThreshForRA += GoUpGap; ++ LowRSSIThreshForRA += GoUpGap; ++ UltraLowRSSIThreshForRA += GoUpGap; ++ break; ++#endif ++ ++ default: ++ ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState)); ++ break; ++ } ++ ++ // Decide RATRState by RSSI. ++ if (RSSI > HighRSSIThreshForRA) ++ RATRState = DM_RATR_STA_HIGH; ++ else if (RSSI > LowRSSIThreshForRA) ++ RATRState = DM_RATR_STA_MIDDLE; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ else if (RSSI > UltraLowRSSIThreshForRA) ++ RATRState = DM_RATR_STA_LOW; ++ else ++ RATRState = DM_RATR_STA_ULTRA_LOW; ++#else ++ else ++ RATRState = DM_RATR_STA_LOW; ++#endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Mod RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA)); ++ /*printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI);*/ ++ ++ if (*pRATRState != RATRState || bForceUpdate) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[RSSI Level Update] %d -> %d\n", *pRATRState, RATRState)); ++ *pRATRState = RATRState; ++ return TRUE; ++ } ++ ++ return FALSE; ++} ++ ++VOID ++odm_RefreshBasicRateMask( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ static u1Byte Stage = 0; ++ u1Byte CurStage = 0; ++ OCTET_STRING osRateSet; ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); ++ u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821) ++ return; ++ ++ if (pDM_Odm->bLinked == FALSE) // unlink Default port information ++ CurStage = 0; ++ else if (pDM_Odm->RSSI_Min < 40) // link RSSI < 40% ++ CurStage = 1; ++ else if (pDM_Odm->RSSI_Min > 45) // link RSSI > 45% ++ CurStage = 3; ++ else ++ CurStage = 2; // link 25% <= RSSI <= 30% ++ ++ if (CurStage != Stage) { ++ if (CurStage == 1) { ++ FillOctetString(osRateSet, RateSet, 5); ++ FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE); ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet); ++ } else if (CurStage == 3 && (Stage == 1 || Stage == 2)) ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates)); ++ } ++ ++ Stage = CurStage; ++#endif ++} ++ ++ ++VOID ++phydm_ra_info_init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) ++ phydm_ra_dynamic_retry_limit_init(pDM_Odm); ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ phydm_ra_dynamic_rate_id_init(pDM_Odm); ++ #endif ++ ++ /*phydm_fw_trace_en_h2c(pDM_Odm, 1, 0, 0);*/ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++u1Byte ++odm_Find_RTS_Rate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Tx_Rate, ++ IN BOOLEAN bErpProtect ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte RTS_Ini_Rate = ODM_RATE6M; ++ ++ if (bErpProtect) /* use CCK rate as RTS*/ ++ RTS_Ini_Rate = ODM_RATE1M; ++ else { ++ switch (Tx_Rate) { ++ case ODM_RATEVHTSS3MCS9: ++ case ODM_RATEVHTSS3MCS8: ++ case ODM_RATEVHTSS3MCS7: ++ case ODM_RATEVHTSS3MCS6: ++ case ODM_RATEVHTSS3MCS5: ++ case ODM_RATEVHTSS3MCS4: ++ case ODM_RATEVHTSS3MCS3: ++ case ODM_RATEVHTSS2MCS9: ++ case ODM_RATEVHTSS2MCS8: ++ case ODM_RATEVHTSS2MCS7: ++ case ODM_RATEVHTSS2MCS6: ++ case ODM_RATEVHTSS2MCS5: ++ case ODM_RATEVHTSS2MCS4: ++ case ODM_RATEVHTSS2MCS3: ++ case ODM_RATEVHTSS1MCS9: ++ case ODM_RATEVHTSS1MCS8: ++ case ODM_RATEVHTSS1MCS7: ++ case ODM_RATEVHTSS1MCS6: ++ case ODM_RATEVHTSS1MCS5: ++ case ODM_RATEVHTSS1MCS4: ++ case ODM_RATEVHTSS1MCS3: ++ case ODM_RATEMCS15: ++ case ODM_RATEMCS14: ++ case ODM_RATEMCS13: ++ case ODM_RATEMCS12: ++ case ODM_RATEMCS11: ++ case ODM_RATEMCS7: ++ case ODM_RATEMCS6: ++ case ODM_RATEMCS5: ++ case ODM_RATEMCS4: ++ case ODM_RATEMCS3: ++ case ODM_RATE54M: ++ case ODM_RATE48M: ++ case ODM_RATE36M: ++ case ODM_RATE24M: ++ RTS_Ini_Rate = ODM_RATE24M; ++ break; ++ case ODM_RATEVHTSS3MCS2: ++ case ODM_RATEVHTSS3MCS1: ++ case ODM_RATEVHTSS2MCS2: ++ case ODM_RATEVHTSS2MCS1: ++ case ODM_RATEVHTSS1MCS2: ++ case ODM_RATEVHTSS1MCS1: ++ case ODM_RATEMCS10: ++ case ODM_RATEMCS9: ++ case ODM_RATEMCS2: ++ case ODM_RATEMCS1: ++ case ODM_RATE18M: ++ case ODM_RATE12M: ++ RTS_Ini_Rate = ODM_RATE12M; ++ break; ++ case ODM_RATEVHTSS3MCS0: ++ case ODM_RATEVHTSS2MCS0: ++ case ODM_RATEVHTSS1MCS0: ++ case ODM_RATEMCS8: ++ case ODM_RATEMCS0: ++ case ODM_RATE9M: ++ case ODM_RATE6M: ++ RTS_Ini_Rate = ODM_RATE6M; ++ break; ++ case ODM_RATE11M: ++ case ODM_RATE5_5M: ++ case ODM_RATE2M: ++ case ODM_RATE1M: ++ RTS_Ini_Rate = ODM_RATE1M; ++ break; ++ default: ++ RTS_Ini_Rate = ODM_RATE6M; ++ break; ++ } ++ } ++ ++ if (*pDM_Odm->pBandType == 1) { ++ if (RTS_Ini_Rate < ODM_RATE6M) ++ RTS_Ini_Rate = ODM_RATE6M; ++ } ++ return RTS_Ini_Rate; ++ ++} ++ ++VOID ++odm_Set_RA_DM_ARFB_by_Noisy( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ /*DbgPrint("DM_ARFB ====>\n");*/ ++ if (pDM_Odm->bNoisyState) { ++ ODM_Write4Byte(pDM_Odm, 0x430, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, 0x434, 0x05040200); ++ /*DbgPrint("DM_ARFB ====> Noisy State\n");*/ ++ } else { ++ ODM_Write4Byte(pDM_Odm, 0x430, 0x02010000); ++ ODM_Write4Byte(pDM_Odm, 0x434, 0x07050403); ++ /*DbgPrint("DM_ARFB ====> Clean State\n");*/ ++ } ++ ++} ++ ++VOID ++ODM_UpdateNoisyState( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN bNoisyStateFromC2H ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);*/ ++ if (pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 || ++ pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E) ++ pDM_Odm->bNoisyState = bNoisyStateFromC2H; ++ odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm); ++}; ++ ++u4Byte ++Set_RA_DM_Ratrbitmap_by_Noisy( ++ IN PVOID pDM_VOID, ++ IN WIRELESS_MODE WirelessMode, ++ IN u4Byte ratr_bitmap, ++ IN u1Byte rssi_level ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte ret_bitmap = ratr_bitmap; ++ ++ return ret_bitmap; ++ ++ switch (WirelessMode) { ++ case WIRELESS_MODE_AC_24G: ++ case WIRELESS_MODE_AC_5G: ++ case WIRELESS_MODE_AC_ONLY: ++ if (pDM_Odm->bNoisyState) { /*in Noisy State*/ ++ if (rssi_level == 1) ++ ret_bitmap &= 0xfc3e0c08; // Reserve MCS 5-9 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0xfe3f8e08; // Reserve MCS 3-9 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } else { /* in SNR State*/ ++ if (rssi_level == 1) ++ ret_bitmap &= 0xfe3f0e08; // Reserve MCS 4-9 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0xff3fcf8c; // Reserve MCS 2-9 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } ++ break; ++ case WIRELESS_MODE_B: ++ case WIRELESS_MODE_A: ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ case WIRELESS_MODE_N_5G: ++ if (pDM_Odm->bNoisyState) { ++ if (rssi_level == 1) ++ ret_bitmap &= 0x0f0e0c08; // Reserve MCS 4-7; MCS12-15 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0x0fcfce0c; // Reserve MCS 2-7; MCS10-15 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } else { ++ if (rssi_level == 1) ++ ret_bitmap &= 0x0f8f8e08; // Reserve MCS 3-7; MCS11-15 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0x0fefef8c; // Reserve MCS 1-7; MCS9-15 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } ++ break; ++ default: ++ break; ++ } ++ /*DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x\n", rssi_level, ret_bitmap);*/ ++ return ret_bitmap; ++ ++} ++ ++VOID ++ODM_UpdateInitRate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte p = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Get C2H Command! Rate=0x%x\n", Rate)); ++ ++ pDM_Odm->TxRate = Rate; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); ++#else ++ if (pDM_Odm->SupportICType == ODM_RTL8821) { ++#if (RTL8821A_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) { ++#if (RTL8812A_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); ++#endif ++ } ++ } else if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++#if (RTL8723B_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) { ++#if (RTL8192E_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); ++#endif ++ } ++ } else if (pDM_Odm->SupportICType == ODM_RTL8188E) { ++#if (RTL8188E_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++#endif ++ } ++#endif ++#else ++ PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); ++#endif ++#endif ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_RSSIDumpToRegister( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]); ++ PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]); ++ ++ /* Rx EVM*/ ++ PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]); ++ PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]); ++ ++ /* Rx SNR*/ ++ PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); ++ PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); ++ ++ /* Rx Cfo_Short*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]); ++ ++ /* Rx Cfo_Tail*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]); ++ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { ++ PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]); ++ PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]); ++ /* Rx EVM*/ ++ PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]); ++ PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]); ++ /* Rx SNR*/ ++ PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); ++ PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); ++ /* Rx Cfo_Short*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]); ++ /* Rx Cfo_Tail*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]); ++ } ++} ++ ++VOID ++odm_RefreshLdpcRtsMP( ++ IN PADAPTER pAdapter, ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte mMacId, ++ IN u1Byte IOTPeer, ++ IN s4Byte UndecoratedSmoothedPWDB ++) ++{ ++ BOOLEAN bCtlLdpc = FALSE; ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); ++ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812) ++ return; ++ ++ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) ++ bCtlLdpc = TRUE; ++ else if (pDM_Odm->SupportICType == ODM_RTL8812 && ++ IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) ++ bCtlLdpc = TRUE; ++ ++ if (bCtlLdpc) { ++ if (UndecoratedSmoothedPWDB < (pRA->LdpcThres - 5)) ++ MgntSet_TX_LDPC(pAdapter, mMacId, TRUE); ++ else if (UndecoratedSmoothedPWDB > pRA->LdpcThres) ++ MgntSet_TX_LDPC(pAdapter, mMacId, FALSE); ++ } ++ ++ if (UndecoratedSmoothedPWDB < (pRA->RtsThres - 5)) ++ pRA->bLowerRtsRate = TRUE; ++ else if (UndecoratedSmoothedPWDB > pRA->RtsThres) ++ pRA->bLowerRtsRate = FALSE; ++} ++ ++VOID ++ODM_DynamicARFBSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte rate, ++ IN BOOLEAN Collision_State ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8192E) ++ return; ++ ++ if (Collision_State == pRA_Table->PT_collision_pre) ++ return; ++ ++ if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12) { ++ if (Collision_State == 1) { ++ if (rate == DESC_RATEMCS12) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501); ++ } else if (rate == DESC_RATEMCS11) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605); ++ } else if (rate == DESC_RATEMCS10) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706); ++ } else if (rate == DESC_RATEMCS9) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808); ++ } ++ } else { /* Collision_State == 0*/ ++ if (rate == DESC_RATEMCS12) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); ++ } else if (rate == DESC_RATEMCS11) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807); ++ } else if (rate == DESC_RATEMCS10) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908); ++ } else if (rate == DESC_RATEMCS9) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909); ++ } ++ } ++ } else { /* MCS13~MCS15, 1SS, G-mode*/ ++ if (Collision_State == 1) { ++ if (rate == DESC_RATEMCS15) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302); ++ } else if (rate == DESC_RATEMCS14) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302); ++ } else if (rate == DESC_RATEMCS13) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402); ++ } ++ } else { // Collision_State == 0 ++ if (rate == DESC_RATEMCS15) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504); ++ } else if (rate == DESC_RATEMCS14) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); ++ } else if (rate == DESC_RATEMCS13) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); ++ } ++ ++ ++ } ++ ++ } ++ pRA_Table->PT_collision_pre = Collision_State; ++} ++ ++VOID ++ODM_RateAdaptiveStateApInit( ++ IN PVOID PADAPTER_VOID, ++ IN PRT_WLAN_STA pEntry ++) ++{ ++ PADAPTER Adapter = (PADAPTER)PADAPTER_VOID; ++ pEntry->Ratr_State = DM_RATR_STA_INIT; ++} ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++ ++static void ++FindMinimumRSSI( ++ IN PADAPTER pAdapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ /*Determine the minimum RSSI*/ ++ ++ if ((pDM_Odm->bLinked != _TRUE) && ++ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) { ++ pHalData->MinUndecoratedPWDBForDM = 0; ++ /*ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any\n"));*/ ++ } else ++ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ++ /*DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);*/ ++ /*ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));*/ ++} ++ ++u8Byte ++PhyDM_Get_Rate_Bitmap_Ex( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u8Byte ra_mask, ++ IN u1Byte rssi_level, ++ OUT u8Byte *dm_RA_Mask, ++ OUT u1Byte *dm_RteID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PSTA_INFO_T pEntry; ++ u8Byte rate_bitmap = 0; ++ u1Byte WirelessMode; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[macid]; ++ if (!IS_STA_VALID(pEntry)) ++ return ra_mask; ++ WirelessMode = pEntry->wireless_mode; ++ switch (WirelessMode) { ++ case ODM_WM_B: ++ if (ra_mask & 0x000000000000000c) /* 11M or 5.5M enable */ ++ rate_bitmap = 0x000000000000000d; ++ else ++ rate_bitmap = 0x000000000000000f; ++ break; ++ ++ case (ODM_WM_G): ++ case (ODM_WM_A): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0000000000000f00; ++ else ++ rate_bitmap = 0x0000000000000ff0; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0000000000000f00; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x0000000000000ff0; ++ else ++ rate_bitmap = 0x0000000000000ff5; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): ++ case (ODM_WM_B|ODM_WM_N24G): ++ case (ODM_WM_G|ODM_WM_N24G): ++ case (ODM_WM_A|ODM_WM_N5G): { ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x00000000000f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x00000000000ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x00000000000ff015; ++ else ++ rate_bitmap = 0x00000000000ff005; ++ } ++ } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x000000000f8f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x000000000f8ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x000000000f8ff015; ++ else ++ rate_bitmap = 0x000000000f8ff005; ++ } ++ } else { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0000000f0f0f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x0000000fcfcfe000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x0000000ffffff015; ++ else ++ rate_bitmap = 0x0000000ffffff005; ++ } ++ } ++ } ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_G): ++ if (rssi_level == 1) ++ rate_bitmap = 0x00000000fc3f0000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0x00000000fffff000; ++ else ++ rate_bitmap = 0x00000000ffffffff; ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_A): ++ ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { ++ if (rssi_level == 1) /* add by Gary for ac-series */ ++ rate_bitmap = 0x00000000003f8000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0x00000000003fe000; ++ else ++ rate_bitmap = 0x00000000003ff010; ++ } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) { ++ if (rssi_level == 1) /* add by Gary for ac-series */ ++ rate_bitmap = 0x00000000fe3f8000; /* VHT 2SS MCS3~9 */ ++ else if (rssi_level == 2) ++ rate_bitmap = 0x00000000fffff000; /* VHT 2SS MCS0~9 */ ++ else ++ rate_bitmap = 0x00000000fffff010; /* All */ ++ } else { ++ if (rssi_level == 1) /* add by Gary for ac-series */ ++ rate_bitmap = 0x000003f8fe3f8000ULL; /* VHT 3SS MCS3~9 */ ++ else if (rssi_level == 2) ++ rate_bitmap = 0x000003fffffff000ULL; /* VHT3SS MCS0~9 */ ++ else ++ rate_bitmap = 0x000003fffffff010ULL; /* All */ ++ } ++ break; ++ ++ default: ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) ++ rate_bitmap = 0x00000000000fffff; ++ else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) ++ rate_bitmap = 0x000000000fffffff; ++ else ++ rate_bitmap = 0x0000003fffffffffULL; ++ break; ++ ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%016llx\n", rssi_level, WirelessMode, rate_bitmap)); ++ ++ return (ra_mask & rate_bitmap); ++} ++ ++ ++u4Byte ++ODM_Get_Rate_Bitmap( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u4Byte ra_mask, ++ IN u1Byte rssi_level ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PSTA_INFO_T pEntry; ++ u4Byte rate_bitmap = 0; ++ u1Byte WirelessMode; ++ //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); ++ ++ ++ pEntry = pDM_Odm->pODM_StaInfo[macid]; ++ if (!IS_STA_VALID(pEntry)) ++ return ra_mask; ++ ++ WirelessMode = pEntry->wireless_mode; ++ ++ switch (WirelessMode) { ++ case ODM_WM_B: ++ if (ra_mask & 0x0000000c) //11M or 5.5M enable ++ rate_bitmap = 0x0000000d; ++ else ++ rate_bitmap = 0x0000000f; ++ break; ++ ++ case (ODM_WM_G): ++ case (ODM_WM_A): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x00000f00; ++ else ++ rate_bitmap = 0x00000ff0; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x00000f00; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x00000ff0; ++ else ++ rate_bitmap = 0x00000ff5; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : ++ case (ODM_WM_B|ODM_WM_N24G) : ++ case (ODM_WM_G|ODM_WM_N24G) : ++ case (ODM_WM_A|ODM_WM_N5G) : { ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x000f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x000ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x000ff015; ++ else ++ rate_bitmap = 0x000ff005; ++ } ++ } else { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0f8f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x0f8ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x0f8ff015; ++ else ++ rate_bitmap = 0x0f8ff005; ++ } ++ } ++ } ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_G): ++ if (rssi_level == 1) ++ rate_bitmap = 0xfc3f0000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0xfffff000; ++ else ++ rate_bitmap = 0xffffffff; ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_A): ++ ++ if (pDM_Odm->RFType == RF_1T1R) { ++ if (rssi_level == 1) // add by Gary for ac-series ++ rate_bitmap = 0x003f8000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0x003ff000; ++ else ++ rate_bitmap = 0x003ff010; ++ } else { ++ if (rssi_level == 1) // add by Gary for ac-series ++ rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9 ++ else if (rssi_level == 2) ++ rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9 ++ else ++ rate_bitmap = 0xfffff010; // All ++ } ++ break; ++ ++ default: ++ if (pDM_Odm->RFType == RF_1T2R) ++ rate_bitmap = 0x000fffff; ++ else ++ rate_bitmap = 0x0fffffff; ++ break; ++ ++ } ++ ++ DBG_871X("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap)); ++ ++ return (ra_mask & rate_bitmap); ++ ++} ++ ++#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rainfo.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rainfo.h new file mode 100644 -index 000000000..da7869526 +index 0000000..35f26c3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rainfo.h @@ -0,0 +1,445 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __PHYDMRAINFO_H__ -+#define __PHYDMRAINFO_H__ -+ -+/*#define RAINFO_VERSION "2.0" //2014.11.04*/ -+/*#define RAINFO_VERSION "3.0" //2015.01.13 Dino*/ -+/*#define RAINFO_VERSION "3.1" //2015.01.14 Dino*/ -+#define RAINFO_VERSION "3.2" /*2015.01.14 Dino*/ -+ -+#define HIGH_RSSI_THRESH 50 -+#define LOW_RSSI_THRESH 20 -+ -+#define ACTIVE_TP_THRESHOLD 150 -+#define RA_RETRY_DESCEND_NUM 2 -+#define RA_RETRY_LIMIT_LOW 4 -+#define RA_RETRY_LIMIT_HIGH 32 -+ -+#define PHYDM_IC_8051_SERIES (ODM_RTL8881A|ODM_RTL8812|ODM_RTL8821|ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8703B|ODM_RTL8188F) -+#define PHYDM_IC_3081_SERIES (ODM_RTL8814A|ODM_RTL8821B|ODM_RTL8822B) -+ -+#define RAINFO_BE_RX_STATE BIT0 // 1:RX //ULDL -+#define RAINFO_STBC_STATE BIT1 -+//#define RAINFO_LDPC_STATE BIT2 -+#define RAINFO_NOISY_STATE BIT2 // set by Noisy_Detection -+#define RAINFO_SHURTCUT_STATE BIT3 -+#define RAINFO_SHURTCUT_FLAG BIT4 -+#define RAINFO_INIT_RSSI_RATE_STATE BIT5 -+#define RAINFO_BF_STATE BIT6 -+#define RAINFO_BE_TX_STATE BIT7 // 1:TX -+ -+#define RA_MASK_CCK 0xf -+#define RA_MASK_OFDM 0xff0 -+#define RA_MASK_HT1SS 0xff000 -+#define RA_MASK_HT2SS 0xff00000 -+/*#define RA_MASK_MCS3SS */ -+#define RA_MASK_HT4SS 0xff0 -+#define RA_MASK_VHT1SS 0x3ff000 -+#define RA_MASK_VHT2SS 0xffc00000 -+ -+#if(DM_ODM_SUPPORT_TYPE == ODM_AP) -+#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8881A |ODM_RTL8192E |ODM_RTL8812 |ODM_RTL8814A|ODM_RTL8822B) -+#define RA_FIRST_MACID 1 -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8723B | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8703B) -+#define RA_FIRST_MACID 0 -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+/*#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8192E|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723B|ODM_RTL8814A|ODM_RTL8822B|ODM_RTL8703B) */ -+#define RA_FIRST_MACID 0 -+#endif -+ -+ -+#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit -+ -+#define DM_RATR_STA_INIT 0 -+#define DM_RATR_STA_HIGH 1 -+#define DM_RATR_STA_MIDDLE 2 -+#define DM_RATR_STA_LOW 3 -+#if(DM_ODM_SUPPORT_TYPE & ODM_AP) -+#define DM_RATR_STA_ULTRA_LOW 4 -+#endif -+ -+#define DM_RA_RATE_UP 1 -+#define DM_RA_RATE_DOWN 2 -+ -+typedef enum _phydm_arfr_num { -+ ARFR_0_RATE_ID = 0x9, -+ ARFR_1_RATE_ID = 0xa, -+ ARFR_2_RATE_ID = 0xb, -+ ARFR_3_RATE_ID = 0xc, -+ ARFR_4_RATE_ID = 0xd, -+ ARFR_5_RATE_ID = 0xe -+} PHYDM_RA_ARFR_NUM_E; -+ -+typedef enum _Phydm_ra_dbg_para { -+ RADBG_RTY_PENALTY = 1, //u8 -+ RADBG_N_HIGH = 2, -+ RADBG_N_LOW = 3, -+ RADBG_TRATE_UP_TABLE = 4, -+ RADBG_TRATE_DOWN_TABLE = 5, -+ RADBG_TRYING_NECESSARY = 6, -+ RADBG_TDROPING_NECESSARY = 7, -+ RADBG_RATE_UP_RTY_RATIO = 8, //u8 -+ RADBG_RATE_DOWN_RTY_RATIO = 9, //u8 -+ -+ RADBG_DEBUG_MONITOR1 = 0xc, -+ RADBG_DEBUG_MONITOR2 = 0xd, -+ RADBG_DEBUG_MONITOR3 = 0xe, -+ RADBG_DEBUG_MONITOR4 = 0xf, -+ NUM_RA_PARA -+} PHYDM_RA_DBG_PARA_E; -+ -+ -+#if (RATE_ADAPTIVE_SUPPORT == 1)//88E RA -+typedef struct _ODM_RA_Info_ { -+ u1Byte RateID; -+ u4Byte RateMask; -+ u4Byte RAUseRate; -+ u1Byte RateSGI; -+ u1Byte RssiStaRA; -+ u1Byte PreRssiStaRA; -+ u1Byte SGIEnable; -+ u1Byte DecisionRate; -+ u1Byte PreRate; -+ u1Byte HighestRate; -+ u1Byte LowestRate; -+ u4Byte NscUp; -+ u4Byte NscDown; -+ u2Byte RTY[5]; -+ u4Byte TOTAL; -+ u2Byte DROP; -+ u1Byte Active; -+ u2Byte RptTime; -+ u1Byte RAWaitingCounter; -+ u1Byte RAPendingCounter; -+#if 1 //POWER_TRAINING_ACTIVE == 1 // For compile pass only~! -+ u1Byte PTActive; // on or off -+ u1Byte PTTryState; // 0 trying state, 1 for decision state -+ u1Byte PTStage; // 0~6 -+ u1Byte PTStopCount; //Stop PT counter -+ u1Byte PTPreRate; // if rate change do PT -+ u1Byte PTPreRssi; // if RSSI change 5% do PT -+ u1Byte PTModeSS; // decide whitch rate should do PT -+ u1Byte RAstage; // StageRA, decide how many times RA will be done between PT -+ u1Byte PTSmoothFactor; -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+ u1Byte RateDownCounter; -+ u1Byte RateUpCounter; -+ u1Byte RateDirection; -+ u1Byte BoundingType; -+ u1Byte BoundingCounter; -+ u1Byte BoundingLearningTime; -+ u1Byte RateDownStartTime; -+#endif -+} ODM_RA_INFO_T, *PODM_RA_INFO_T; -+#endif -+ -+ -+typedef struct _Rate_Adaptive_Table_ { -+ u1Byte firstconnect; -+#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) -+ BOOLEAN PT_collision_pre; -+#endif -+ -+#if (defined(CONFIG_RA_DBG_CMD)) -+ BOOLEAN is_ra_dbg_init; -+ -+ u1Byte RTY_P[ODM_NUM_RATE_IDX]; -+ u1Byte RTY_P_default[ODM_NUM_RATE_IDX]; -+ BOOLEAN RTY_P_modify_note[ODM_NUM_RATE_IDX]; -+ -+ u1Byte RATE_UP_RTY_RATIO[ODM_NUM_RATE_IDX]; -+ u1Byte RATE_UP_RTY_RATIO_default[ODM_NUM_RATE_IDX]; -+ BOOLEAN RATE_UP_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; -+ -+ u1Byte RATE_DOWN_RTY_RATIO[ODM_NUM_RATE_IDX]; -+ u1Byte RATE_DOWN_RTY_RATIO_default[ODM_NUM_RATE_IDX]; -+ BOOLEAN RATE_DOWN_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; -+ -+ BOOLEAN RA_Para_feedback_req; -+ -+ u1Byte para_idx; -+ u1Byte rate_idx; -+ u1Byte value; -+ u2Byte value_16; -+ u1Byte rate_length; -+#endif -+ u1Byte link_tx_rate[ODM_ASSOCIATE_ENTRY_NUM]; -+ -+ #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) -+ u1Byte per_rate_retrylimit_20M[ODM_NUM_RATE_IDX]; -+ u1Byte per_rate_retrylimit_40M[ODM_NUM_RATE_IDX]; -+ u1Byte retry_descend_num; -+ u1Byte retrylimit_low; -+ u1Byte retrylimit_high; -+ #endif -+ -+ -+} RA_T, *pRA_T; -+ -+typedef struct _ODM_RATE_ADAPTIVE { -+ u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver -+ u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH -+ u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW -+ u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW -+ -+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -+ u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC -+ BOOLEAN bLowerRtsRate; -+#endif -+ -+#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ u1Byte RtsThres; -+#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) -+ BOOLEAN bUseLdpc; -+#else -+ u1Byte UltraLowRSSIThresh; -+ u4Byte LastRATR; // RATR Register Content -+#endif -+ -+} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; -+ -+VOID -+ODM_C2HRaParaReportHandler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+); -+ -+VOID -+odm_RA_ParaAdjust_Send_H2C( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RA_debug( -+ IN PVOID pDM_VOID, -+ IN u4Byte *const dm_value -+); -+ -+VOID -+odm_RA_ParaAdjust_init( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RA_ParaAdjust( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+phydm_ra_dynamic_retry_count( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+phydm_ra_dynamic_retry_limit( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+phydm_ra_dynamic_rate_id_on_assoc( -+ IN PVOID pDM_VOID, -+ IN u1Byte wireless_mode, -+ IN u1Byte init_rate_id -+); -+ -+VOID -+phydm_c2h_ra_report_handler( -+ IN PVOID pDM_VOID, -+ IN pu1Byte CmdBuf, -+ IN u1Byte CmdLen -+); -+ -+VOID -+phydm_ra_info_init( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RSSIMonitorInit( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RSSIMonitorCheck( -+ IN PVOID pDM_VOID -+); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+s4Byte -+phydm_FindMinimumRSSI( -+IN PDM_ODM_T pDM_Odm, -+IN PADAPTER pAdapter, -+IN OUT BOOLEAN *pbLink_temp -+ -+ ); -+#endif -+ -+VOID -+odm_RSSIMonitorCheckMP( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RSSIMonitorCheckCE( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RSSIMonitorCheckAP( -+ IN PVOID pDM_VOID -+); -+ -+ -+VOID -+odm_RateAdaptiveMaskInit( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RefreshRateAdaptiveMask( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RefreshRateAdaptiveMaskMP( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RefreshRateAdaptiveMaskCE( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RefreshRateAdaptiveMaskAPADSL( -+ IN PVOID pDM_VOID -+); -+ -+BOOLEAN -+ODM_RAStateCheck( -+ IN PVOID pDM_VOID, -+ IN s4Byte RSSI, -+ IN BOOLEAN bForceUpdate, -+ OUT pu1Byte pRATRState -+); -+ -+VOID -+odm_RefreshBasicRateMask( -+ IN PVOID pDM_VOID -+); -+VOID -+ODM_RAPostActionOnAssoc( -+ IN PVOID pDM_Odm -+); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ -+u1Byte -+odm_Find_RTS_Rate( -+ IN PVOID pDM_VOID, -+ IN u1Byte Tx_Rate, -+ IN BOOLEAN bErpProtect -+); -+ -+VOID -+ODM_UpdateNoisyState( -+ IN PVOID pDM_VOID, -+ IN BOOLEAN bNoisyStateFromC2H -+); -+ -+u4Byte -+Set_RA_DM_Ratrbitmap_by_Noisy( -+ IN PVOID pDM_VOID, -+ IN WIRELESS_MODE WirelessMode, -+ IN u4Byte ratr_bitmap, -+ IN u1Byte rssi_level -+); -+ -+VOID -+ODM_UpdateInitRate( -+ IN PVOID pDM_VOID, -+ IN u1Byte Rate -+); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+VOID -+odm_RSSIDumpToRegister( -+ IN PVOID pDM_VOID -+); -+ -+VOID -+odm_RefreshLdpcRtsMP( -+ IN PADAPTER pAdapter, -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte mMacId, -+ IN u1Byte IOTPeer, -+ IN s4Byte UndecoratedSmoothedPWDB -+); -+ -+VOID -+ODM_DynamicARFBSelect( -+ IN PVOID pDM_VOID, -+ IN u1Byte rate, -+ IN BOOLEAN Collision_State -+); -+ -+VOID -+ODM_RateAdaptiveStateApInit( -+ IN PVOID PADAPTER_VOID, -+ IN PRT_WLAN_STA pEntry -+); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+static void -+FindMinimumRSSI( -+ IN PADAPTER pAdapter -+); -+ -+u8Byte -+PhyDM_Get_Rate_Bitmap_Ex( -+ IN PVOID pDM_VOID, -+ IN u4Byte macid, -+ IN u8Byte ra_mask, -+ IN u1Byte rssi_level, -+ OUT u8Byte *dm_RA_Mask, -+ OUT u1Byte *dm_RteID -+); -+u4Byte -+ODM_Get_Rate_Bitmap( -+ IN PVOID pDM_VOID, -+ IN u4Byte macid, -+ IN u4Byte ra_mask, -+ IN u1Byte rssi_level -+); -+void phydm_ra_rssi_rpt_wk(PVOID pContext); -+ -+#endif/*#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)*/ -+ -+#endif/*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/ -+ -+#endif /*#ifndef __ODMRAINFO_H__*/ -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMRAINFO_H__ ++#define __PHYDMRAINFO_H__ ++ ++/*#define RAINFO_VERSION "2.0" //2014.11.04*/ ++/*#define RAINFO_VERSION "3.0" //2015.01.13 Dino*/ ++/*#define RAINFO_VERSION "3.1" //2015.01.14 Dino*/ ++#define RAINFO_VERSION "3.2" /*2015.01.14 Dino*/ ++ ++#define HIGH_RSSI_THRESH 50 ++#define LOW_RSSI_THRESH 20 ++ ++#define ACTIVE_TP_THRESHOLD 150 ++#define RA_RETRY_DESCEND_NUM 2 ++#define RA_RETRY_LIMIT_LOW 4 ++#define RA_RETRY_LIMIT_HIGH 32 ++ ++#define PHYDM_IC_8051_SERIES (ODM_RTL8881A|ODM_RTL8812|ODM_RTL8821|ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8703B|ODM_RTL8188F) ++#define PHYDM_IC_3081_SERIES (ODM_RTL8814A|ODM_RTL8821B|ODM_RTL8822B) ++ ++#define RAINFO_BE_RX_STATE BIT0 // 1:RX //ULDL ++#define RAINFO_STBC_STATE BIT1 ++//#define RAINFO_LDPC_STATE BIT2 ++#define RAINFO_NOISY_STATE BIT2 // set by Noisy_Detection ++#define RAINFO_SHURTCUT_STATE BIT3 ++#define RAINFO_SHURTCUT_FLAG BIT4 ++#define RAINFO_INIT_RSSI_RATE_STATE BIT5 ++#define RAINFO_BF_STATE BIT6 ++#define RAINFO_BE_TX_STATE BIT7 // 1:TX ++ ++#define RA_MASK_CCK 0xf ++#define RA_MASK_OFDM 0xff0 ++#define RA_MASK_HT1SS 0xff000 ++#define RA_MASK_HT2SS 0xff00000 ++/*#define RA_MASK_MCS3SS */ ++#define RA_MASK_HT4SS 0xff0 ++#define RA_MASK_VHT1SS 0x3ff000 ++#define RA_MASK_VHT2SS 0xffc00000 ++ ++#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8881A |ODM_RTL8192E |ODM_RTL8812 |ODM_RTL8814A|ODM_RTL8822B) ++#define RA_FIRST_MACID 1 ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8723B | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8703B) ++#define RA_FIRST_MACID 0 ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8192E|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723B|ODM_RTL8814A|ODM_RTL8822B|ODM_RTL8703B) */ ++#define RA_FIRST_MACID 0 ++#endif ++ ++ ++#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit ++ ++#define DM_RATR_STA_INIT 0 ++#define DM_RATR_STA_HIGH 1 ++#define DM_RATR_STA_MIDDLE 2 ++#define DM_RATR_STA_LOW 3 ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) ++#define DM_RATR_STA_ULTRA_LOW 4 ++#endif ++ ++#define DM_RA_RATE_UP 1 ++#define DM_RA_RATE_DOWN 2 ++ ++typedef enum _phydm_arfr_num { ++ ARFR_0_RATE_ID = 0x9, ++ ARFR_1_RATE_ID = 0xa, ++ ARFR_2_RATE_ID = 0xb, ++ ARFR_3_RATE_ID = 0xc, ++ ARFR_4_RATE_ID = 0xd, ++ ARFR_5_RATE_ID = 0xe ++} PHYDM_RA_ARFR_NUM_E; ++ ++typedef enum _Phydm_ra_dbg_para { ++ RADBG_RTY_PENALTY = 1, //u8 ++ RADBG_N_HIGH = 2, ++ RADBG_N_LOW = 3, ++ RADBG_TRATE_UP_TABLE = 4, ++ RADBG_TRATE_DOWN_TABLE = 5, ++ RADBG_TRYING_NECESSARY = 6, ++ RADBG_TDROPING_NECESSARY = 7, ++ RADBG_RATE_UP_RTY_RATIO = 8, //u8 ++ RADBG_RATE_DOWN_RTY_RATIO = 9, //u8 ++ ++ RADBG_DEBUG_MONITOR1 = 0xc, ++ RADBG_DEBUG_MONITOR2 = 0xd, ++ RADBG_DEBUG_MONITOR3 = 0xe, ++ RADBG_DEBUG_MONITOR4 = 0xf, ++ NUM_RA_PARA ++} PHYDM_RA_DBG_PARA_E; ++ ++ ++#if (RATE_ADAPTIVE_SUPPORT == 1)//88E RA ++typedef struct _ODM_RA_Info_ { ++ u1Byte RateID; ++ u4Byte RateMask; ++ u4Byte RAUseRate; ++ u1Byte RateSGI; ++ u1Byte RssiStaRA; ++ u1Byte PreRssiStaRA; ++ u1Byte SGIEnable; ++ u1Byte DecisionRate; ++ u1Byte PreRate; ++ u1Byte HighestRate; ++ u1Byte LowestRate; ++ u4Byte NscUp; ++ u4Byte NscDown; ++ u2Byte RTY[5]; ++ u4Byte TOTAL; ++ u2Byte DROP; ++ u1Byte Active; ++ u2Byte RptTime; ++ u1Byte RAWaitingCounter; ++ u1Byte RAPendingCounter; ++#if 1 //POWER_TRAINING_ACTIVE == 1 // For compile pass only~! ++ u1Byte PTActive; // on or off ++ u1Byte PTTryState; // 0 trying state, 1 for decision state ++ u1Byte PTStage; // 0~6 ++ u1Byte PTStopCount; //Stop PT counter ++ u1Byte PTPreRate; // if rate change do PT ++ u1Byte PTPreRssi; // if RSSI change 5% do PT ++ u1Byte PTModeSS; // decide whitch rate should do PT ++ u1Byte RAstage; // StageRA, decide how many times RA will be done between PT ++ u1Byte PTSmoothFactor; ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ u1Byte RateDownCounter; ++ u1Byte RateUpCounter; ++ u1Byte RateDirection; ++ u1Byte BoundingType; ++ u1Byte BoundingCounter; ++ u1Byte BoundingLearningTime; ++ u1Byte RateDownStartTime; ++#endif ++} ODM_RA_INFO_T, *PODM_RA_INFO_T; ++#endif ++ ++ ++typedef struct _Rate_Adaptive_Table_ { ++ u1Byte firstconnect; ++#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++ BOOLEAN PT_collision_pre; ++#endif ++ ++#if (defined(CONFIG_RA_DBG_CMD)) ++ BOOLEAN is_ra_dbg_init; ++ ++ u1Byte RTY_P[ODM_NUM_RATE_IDX]; ++ u1Byte RTY_P_default[ODM_NUM_RATE_IDX]; ++ BOOLEAN RTY_P_modify_note[ODM_NUM_RATE_IDX]; ++ ++ u1Byte RATE_UP_RTY_RATIO[ODM_NUM_RATE_IDX]; ++ u1Byte RATE_UP_RTY_RATIO_default[ODM_NUM_RATE_IDX]; ++ BOOLEAN RATE_UP_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; ++ ++ u1Byte RATE_DOWN_RTY_RATIO[ODM_NUM_RATE_IDX]; ++ u1Byte RATE_DOWN_RTY_RATIO_default[ODM_NUM_RATE_IDX]; ++ BOOLEAN RATE_DOWN_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; ++ ++ BOOLEAN RA_Para_feedback_req; ++ ++ u1Byte para_idx; ++ u1Byte rate_idx; ++ u1Byte value; ++ u2Byte value_16; ++ u1Byte rate_length; ++#endif ++ u1Byte link_tx_rate[ODM_ASSOCIATE_ENTRY_NUM]; ++ ++ #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) ++ u1Byte per_rate_retrylimit_20M[ODM_NUM_RATE_IDX]; ++ u1Byte per_rate_retrylimit_40M[ODM_NUM_RATE_IDX]; ++ u1Byte retry_descend_num; ++ u1Byte retrylimit_low; ++ u1Byte retrylimit_high; ++ #endif ++ ++ ++} RA_T, *pRA_T; ++ ++typedef struct _ODM_RATE_ADAPTIVE { ++ u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver ++ u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH ++ u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW ++ u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC ++ BOOLEAN bLowerRtsRate; ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ u1Byte RtsThres; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ BOOLEAN bUseLdpc; ++#else ++ u1Byte UltraLowRSSIThresh; ++ u4Byte LastRATR; // RATR Register Content ++#endif ++ ++} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; ++ ++VOID ++ODM_C2HRaParaReportHandler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++VOID ++odm_RA_ParaAdjust_Send_H2C( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RA_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value ++); ++ ++VOID ++odm_RA_ParaAdjust_init( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RA_ParaAdjust( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++phydm_ra_dynamic_retry_count( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++phydm_ra_dynamic_retry_limit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++phydm_ra_dynamic_rate_id_on_assoc( ++ IN PVOID pDM_VOID, ++ IN u1Byte wireless_mode, ++ IN u1Byte init_rate_id ++); ++ ++VOID ++phydm_c2h_ra_report_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++VOID ++phydm_ra_info_init( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorCheck( ++ IN PVOID pDM_VOID ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++s4Byte ++phydm_FindMinimumRSSI( ++IN PDM_ODM_T pDM_Odm, ++IN PADAPTER pAdapter, ++IN OUT BOOLEAN *pbLink_temp ++ ++ ); ++#endif ++ ++VOID ++odm_RSSIMonitorCheckMP( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorCheckCE( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorCheckAP( ++ IN PVOID pDM_VOID ++); ++ ++ ++VOID ++odm_RateAdaptiveMaskInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMask( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMaskMP( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMaskCE( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMaskAPADSL( ++ IN PVOID pDM_VOID ++); ++ ++BOOLEAN ++ODM_RAStateCheck( ++ IN PVOID pDM_VOID, ++ IN s4Byte RSSI, ++ IN BOOLEAN bForceUpdate, ++ OUT pu1Byte pRATRState ++); ++ ++VOID ++odm_RefreshBasicRateMask( ++ IN PVOID pDM_VOID ++); ++VOID ++ODM_RAPostActionOnAssoc( ++ IN PVOID pDM_Odm ++); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ ++u1Byte ++odm_Find_RTS_Rate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Tx_Rate, ++ IN BOOLEAN bErpProtect ++); ++ ++VOID ++ODM_UpdateNoisyState( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN bNoisyStateFromC2H ++); ++ ++u4Byte ++Set_RA_DM_Ratrbitmap_by_Noisy( ++ IN PVOID pDM_VOID, ++ IN WIRELESS_MODE WirelessMode, ++ IN u4Byte ratr_bitmap, ++ IN u1Byte rssi_level ++); ++ ++VOID ++ODM_UpdateInitRate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Rate ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_RSSIDumpToRegister( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshLdpcRtsMP( ++ IN PADAPTER pAdapter, ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte mMacId, ++ IN u1Byte IOTPeer, ++ IN s4Byte UndecoratedSmoothedPWDB ++); ++ ++VOID ++ODM_DynamicARFBSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte rate, ++ IN BOOLEAN Collision_State ++); ++ ++VOID ++ODM_RateAdaptiveStateApInit( ++ IN PVOID PADAPTER_VOID, ++ IN PRT_WLAN_STA pEntry ++); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++static void ++FindMinimumRSSI( ++ IN PADAPTER pAdapter ++); ++ ++u8Byte ++PhyDM_Get_Rate_Bitmap_Ex( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u8Byte ra_mask, ++ IN u1Byte rssi_level, ++ OUT u8Byte *dm_RA_Mask, ++ OUT u1Byte *dm_RteID ++); ++u4Byte ++ODM_Get_Rate_Bitmap( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u4Byte ra_mask, ++ IN u1Byte rssi_level ++); ++void phydm_ra_rssi_rpt_wk(PVOID pContext); ++ ++#endif/*#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)*/ ++ ++#endif/*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/ ++ ++#endif /*#ifndef __ODMRAINFO_H__*/ ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_reg.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_reg.h new file mode 100644 -index 000000000..e8424139b +index 0000000..8deff91 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_reg.h @@ -0,0 +1,208 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+//============================================================ -+// File Name: odm_reg.h -+// -+// Description: -+// -+// This file is for general register definition. -+// -+// -+//============================================================ -+#ifndef __HAL_ODM_REG_H__ -+#define __HAL_ODM_REG_H__ -+ -+// -+// Register Definition -+// -+ -+//MAC REG -+#define ODM_BB_RESET 0x002 -+#define ODM_DUMMY 0x4fe -+#define RF_T_METER_OLD 0x24 -+#define RF_T_METER_NEW 0x42 -+ -+#define ODM_EDCA_VO_PARAM 0x500 -+#define ODM_EDCA_VI_PARAM 0x504 -+#define ODM_EDCA_BE_PARAM 0x508 -+#define ODM_EDCA_BK_PARAM 0x50C -+#define ODM_TXPAUSE 0x522 -+ -+//BB REG -+#define ODM_FPGA_PHY0_PAGE8 0x800 -+#define ODM_PSD_SETTING 0x808 -+#define ODM_AFE_SETTING 0x818 -+#define ODM_TXAGC_B_6_18 0x830 -+#define ODM_TXAGC_B_24_54 0x834 -+#define ODM_TXAGC_B_MCS32_5 0x838 -+#define ODM_TXAGC_B_MCS0_MCS3 0x83c -+#define ODM_TXAGC_B_MCS4_MCS7 0x848 -+#define ODM_TXAGC_B_MCS8_MCS11 0x84c -+#define ODM_ANALOG_REGISTER 0x85c -+#define ODM_RF_INTERFACE_OUTPUT 0x860 -+#define ODM_TXAGC_B_MCS12_MCS15 0x868 -+#define ODM_TXAGC_B_11_A_2_11 0x86c -+#define ODM_AD_DA_LSB_MASK 0x874 -+#define ODM_ENABLE_3_WIRE 0x88c -+#define ODM_PSD_REPORT 0x8b4 -+#define ODM_R_ANT_SELECT 0x90c -+#define ODM_CCK_ANT_SELECT 0xa07 -+#define ODM_CCK_PD_THRESH 0xa0a -+#define ODM_CCK_RF_REG1 0xa11 -+#define ODM_CCK_MATCH_FILTER 0xa20 -+#define ODM_CCK_RAKE_MAC 0xa2e -+#define ODM_CCK_CNT_RESET 0xa2d -+#define ODM_CCK_TX_DIVERSITY 0xa2f -+#define ODM_CCK_FA_CNT_MSB 0xa5b -+#define ODM_CCK_FA_CNT_LSB 0xa5c -+#define ODM_CCK_NEW_FUNCTION 0xa75 -+#define ODM_OFDM_PHY0_PAGE_C 0xc00 -+#define ODM_OFDM_RX_ANT 0xc04 -+#define ODM_R_A_RXIQI 0xc14 -+#define ODM_R_A_AGC_CORE1 0xc50 -+#define ODM_R_A_AGC_CORE2 0xc54 -+#define ODM_R_B_AGC_CORE1 0xc58 -+#define ODM_R_AGC_PAR 0xc70 -+#define ODM_R_HTSTF_AGC_PAR 0xc7c -+#define ODM_TX_PWR_TRAINING_A 0xc90 -+#define ODM_TX_PWR_TRAINING_B 0xc98 -+#define ODM_OFDM_FA_CNT1 0xcf0 -+#define ODM_OFDM_PHY0_PAGE_D 0xd00 -+#define ODM_OFDM_FA_CNT2 0xda0 -+#define ODM_OFDM_FA_CNT3 0xda4 -+#define ODM_OFDM_FA_CNT4 0xda8 -+#define ODM_TXAGC_A_6_18 0xe00 -+#define ODM_TXAGC_A_24_54 0xe04 -+#define ODM_TXAGC_A_1_MCS32 0xe08 -+#define ODM_TXAGC_A_MCS0_MCS3 0xe10 -+#define ODM_TXAGC_A_MCS4_MCS7 0xe14 -+#define ODM_TXAGC_A_MCS8_MCS11 0xe18 -+#define ODM_TXAGC_A_MCS12_MCS15 0xe1c -+ -+//RF REG -+#define ODM_GAIN_SETTING 0x00 -+#define ODM_CHANNEL 0x18 -+#define ODM_RF_T_METER 0x24 -+#define ODM_RF_T_METER_92D 0x42 -+#define ODM_RF_T_METER_88E 0x42 -+#define ODM_RF_T_METER_92E 0x42 -+#define ODM_RF_T_METER_8812 0x42 -+ -+//Ant Detect Reg -+#define ODM_DPDT 0x300 -+ -+//PSD Init -+#define ODM_PSDREG 0x808 -+ -+//92D Path Div -+#define PATHDIV_REG 0xB30 -+#define PATHDIV_TRI 0xBA0 -+ -+ -+// -+// Bitmap Definition -+// -+#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+// TX AGC -+#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 -+#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 -+#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 -+#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c -+#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 -+#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 -+#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 -+#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c -+#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 -+#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 -+#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 -+#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c -+#if defined(CONFIG_WLAN_HAL_8814AE) -+#define rTxAGC_A_MCS19_MCS16_JAguar 0xcd8 -+#define rTxAGC_A_MCS23_MCS20_JAguar 0xcdc -+#define rTxAGC_A_Nss3Index3_Nss3Index0_JAguar 0xce0 -+#define rTxAGC_A_Nss3Index7_Nss3Index4_JAguar 0xce4 -+#define rTxAGC_A_Nss3Index9_Nss3Index8_JAguar 0xce8 -+#endif -+#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 -+#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 -+#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 -+#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c -+#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 -+#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 -+#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 -+#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c -+#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 -+#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 -+#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 -+#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c -+#if defined(CONFIG_WLAN_HAL_8814AE) -+#define rTxAGC_B_MCS19_MCS16_JAguar 0xed8 -+#define rTxAGC_B_MCS23_MCS20_JAguar 0xedc -+#define rTxAGC_B_Nss3Index3_Nss3Index0_JAguar 0xee0 -+#define rTxAGC_B_Nss3Index7_Nss3Index4_JAguar 0xee4 -+#define rTxAGC_B_Nss3Index9_Nss3Index8_JAguar 0xee8 -+#define rTxAGC_C_CCK11_CCK1_JAguar 0x1820 -+#define rTxAGC_C_Ofdm18_Ofdm6_JAguar 0x1824 -+#define rTxAGC_C_Ofdm54_Ofdm24_JAguar 0x1828 -+#define rTxAGC_C_MCS3_MCS0_JAguar 0x182c -+#define rTxAGC_C_MCS7_MCS4_JAguar 0x1830 -+#define rTxAGC_C_MCS11_MCS8_JAguar 0x1834 -+#define rTxAGC_C_MCS15_MCS12_JAguar 0x1838 -+#define rTxAGC_C_Nss1Index3_Nss1Index0_JAguar 0x183c -+#define rTxAGC_C_Nss1Index7_Nss1Index4_JAguar 0x1840 -+#define rTxAGC_C_Nss2Index1_Nss1Index8_JAguar 0x1844 -+#define rTxAGC_C_Nss2Index5_Nss2Index2_JAguar 0x1848 -+#define rTxAGC_C_Nss2Index9_Nss2Index6_JAguar 0x184c -+#define rTxAGC_C_MCS19_MCS16_JAguar 0x18d8 -+#define rTxAGC_C_MCS23_MCS20_JAguar 0x18dc -+#define rTxAGC_C_Nss3Index3_Nss3Index0_JAguar 0x18e0 -+#define rTxAGC_C_Nss3Index7_Nss3Index4_JAguar 0x18e4 -+#define rTxAGC_C_Nss3Index9_Nss3Index8_JAguar 0x18e8 -+#define rTxAGC_D_CCK11_CCK1_JAguar 0x1a20 -+#define rTxAGC_D_Ofdm18_Ofdm6_JAguar 0x1a24 -+#define rTxAGC_D_Ofdm54_Ofdm24_JAguar 0x1a28 -+#define rTxAGC_D_MCS3_MCS0_JAguar 0x1a2c -+#define rTxAGC_D_MCS7_MCS4_JAguar 0x1a30 -+#define rTxAGC_D_MCS11_MCS8_JAguar 0x1a34 -+#define rTxAGC_D_MCS15_MCS12_JAguar 0x1a38 -+#define rTxAGC_D_Nss1Index3_Nss1Index0_JAguar 0x1a3c -+#define rTxAGC_D_Nss1Index7_Nss1Index4_JAguar 0x1a40 -+#define rTxAGC_D_Nss2Index1_Nss1Index8_JAguar 0x1a44 -+#define rTxAGC_D_Nss2Index5_Nss2Index2_JAguar 0x1a48 -+#define rTxAGC_D_Nss2Index9_Nss2Index6_JAguar 0x1a4c -+#define rTxAGC_D_MCS19_MCS16_JAguar 0x1ad8 -+#define rTxAGC_D_MCS23_MCS20_JAguar 0x1adc -+#define rTxAGC_D_Nss3Index3_Nss3Index0_JAguar 0x1ae0 -+#define rTxAGC_D_Nss3Index7_Nss3Index4_JAguar 0x1ae4 -+#define rTxAGC_D_Nss3Index9_Nss3Index8_JAguar 0x1ae8 -+#endif -+ -+#define bTxAGC_byte0_Jaguar 0xff -+#define bTxAGC_byte1_Jaguar 0xff00 -+#define bTxAGC_byte2_Jaguar 0xff0000 -+#define bTxAGC_byte3_Jaguar 0xff000000 -+#endif -+ -+#define BIT_FA_RESET BIT0 -+ -+ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// File Name: odm_reg.h ++// ++// Description: ++// ++// This file is for general register definition. ++// ++// ++//============================================================ ++#ifndef __HAL_ODM_REG_H__ ++#define __HAL_ODM_REG_H__ ++ ++// ++// Register Definition ++// ++ ++//MAC REG ++#define ODM_BB_RESET 0x002 ++#define ODM_DUMMY 0x4fe ++#define RF_T_METER_OLD 0x24 ++#define RF_T_METER_NEW 0x42 ++ ++#define ODM_EDCA_VO_PARAM 0x500 ++#define ODM_EDCA_VI_PARAM 0x504 ++#define ODM_EDCA_BE_PARAM 0x508 ++#define ODM_EDCA_BK_PARAM 0x50C ++#define ODM_TXPAUSE 0x522 ++ ++//BB REG ++#define ODM_FPGA_PHY0_PAGE8 0x800 ++#define ODM_PSD_SETTING 0x808 ++#define ODM_AFE_SETTING 0x818 ++#define ODM_TXAGC_B_6_18 0x830 ++#define ODM_TXAGC_B_24_54 0x834 ++#define ODM_TXAGC_B_MCS32_5 0x838 ++#define ODM_TXAGC_B_MCS0_MCS3 0x83c ++#define ODM_TXAGC_B_MCS4_MCS7 0x848 ++#define ODM_TXAGC_B_MCS8_MCS11 0x84c ++#define ODM_ANALOG_REGISTER 0x85c ++#define ODM_RF_INTERFACE_OUTPUT 0x860 ++#define ODM_TXAGC_B_MCS12_MCS15 0x868 ++#define ODM_TXAGC_B_11_A_2_11 0x86c ++#define ODM_AD_DA_LSB_MASK 0x874 ++#define ODM_ENABLE_3_WIRE 0x88c ++#define ODM_PSD_REPORT 0x8b4 ++#define ODM_R_ANT_SELECT 0x90c ++#define ODM_CCK_ANT_SELECT 0xa07 ++#define ODM_CCK_PD_THRESH 0xa0a ++#define ODM_CCK_RF_REG1 0xa11 ++#define ODM_CCK_MATCH_FILTER 0xa20 ++#define ODM_CCK_RAKE_MAC 0xa2e ++#define ODM_CCK_CNT_RESET 0xa2d ++#define ODM_CCK_TX_DIVERSITY 0xa2f ++#define ODM_CCK_FA_CNT_MSB 0xa5b ++#define ODM_CCK_FA_CNT_LSB 0xa5c ++#define ODM_CCK_NEW_FUNCTION 0xa75 ++#define ODM_OFDM_PHY0_PAGE_C 0xc00 ++#define ODM_OFDM_RX_ANT 0xc04 ++#define ODM_R_A_RXIQI 0xc14 ++#define ODM_R_A_AGC_CORE1 0xc50 ++#define ODM_R_A_AGC_CORE2 0xc54 ++#define ODM_R_B_AGC_CORE1 0xc58 ++#define ODM_R_AGC_PAR 0xc70 ++#define ODM_R_HTSTF_AGC_PAR 0xc7c ++#define ODM_TX_PWR_TRAINING_A 0xc90 ++#define ODM_TX_PWR_TRAINING_B 0xc98 ++#define ODM_OFDM_FA_CNT1 0xcf0 ++#define ODM_OFDM_PHY0_PAGE_D 0xd00 ++#define ODM_OFDM_FA_CNT2 0xda0 ++#define ODM_OFDM_FA_CNT3 0xda4 ++#define ODM_OFDM_FA_CNT4 0xda8 ++#define ODM_TXAGC_A_6_18 0xe00 ++#define ODM_TXAGC_A_24_54 0xe04 ++#define ODM_TXAGC_A_1_MCS32 0xe08 ++#define ODM_TXAGC_A_MCS0_MCS3 0xe10 ++#define ODM_TXAGC_A_MCS4_MCS7 0xe14 ++#define ODM_TXAGC_A_MCS8_MCS11 0xe18 ++#define ODM_TXAGC_A_MCS12_MCS15 0xe1c ++ ++//RF REG ++#define ODM_GAIN_SETTING 0x00 ++#define ODM_CHANNEL 0x18 ++#define ODM_RF_T_METER 0x24 ++#define ODM_RF_T_METER_92D 0x42 ++#define ODM_RF_T_METER_88E 0x42 ++#define ODM_RF_T_METER_92E 0x42 ++#define ODM_RF_T_METER_8812 0x42 ++ ++//Ant Detect Reg ++#define ODM_DPDT 0x300 ++ ++//PSD Init ++#define ODM_PSDREG 0x808 ++ ++//92D Path Div ++#define PATHDIV_REG 0xB30 ++#define PATHDIV_TRI 0xBA0 ++ ++ ++// ++// Bitmap Definition ++// ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 ++#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c ++#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 ++#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 ++#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 ++#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c ++#if defined(CONFIG_WLAN_HAL_8814AE) ++#define rTxAGC_A_MCS19_MCS16_JAguar 0xcd8 ++#define rTxAGC_A_MCS23_MCS20_JAguar 0xcdc ++#define rTxAGC_A_Nss3Index3_Nss3Index0_JAguar 0xce0 ++#define rTxAGC_A_Nss3Index7_Nss3Index4_JAguar 0xce4 ++#define rTxAGC_A_Nss3Index9_Nss3Index8_JAguar 0xce8 ++#endif ++#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 ++#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c ++#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 ++#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 ++#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 ++#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c ++#if defined(CONFIG_WLAN_HAL_8814AE) ++#define rTxAGC_B_MCS19_MCS16_JAguar 0xed8 ++#define rTxAGC_B_MCS23_MCS20_JAguar 0xedc ++#define rTxAGC_B_Nss3Index3_Nss3Index0_JAguar 0xee0 ++#define rTxAGC_B_Nss3Index7_Nss3Index4_JAguar 0xee4 ++#define rTxAGC_B_Nss3Index9_Nss3Index8_JAguar 0xee8 ++#define rTxAGC_C_CCK11_CCK1_JAguar 0x1820 ++#define rTxAGC_C_Ofdm18_Ofdm6_JAguar 0x1824 ++#define rTxAGC_C_Ofdm54_Ofdm24_JAguar 0x1828 ++#define rTxAGC_C_MCS3_MCS0_JAguar 0x182c ++#define rTxAGC_C_MCS7_MCS4_JAguar 0x1830 ++#define rTxAGC_C_MCS11_MCS8_JAguar 0x1834 ++#define rTxAGC_C_MCS15_MCS12_JAguar 0x1838 ++#define rTxAGC_C_Nss1Index3_Nss1Index0_JAguar 0x183c ++#define rTxAGC_C_Nss1Index7_Nss1Index4_JAguar 0x1840 ++#define rTxAGC_C_Nss2Index1_Nss1Index8_JAguar 0x1844 ++#define rTxAGC_C_Nss2Index5_Nss2Index2_JAguar 0x1848 ++#define rTxAGC_C_Nss2Index9_Nss2Index6_JAguar 0x184c ++#define rTxAGC_C_MCS19_MCS16_JAguar 0x18d8 ++#define rTxAGC_C_MCS23_MCS20_JAguar 0x18dc ++#define rTxAGC_C_Nss3Index3_Nss3Index0_JAguar 0x18e0 ++#define rTxAGC_C_Nss3Index7_Nss3Index4_JAguar 0x18e4 ++#define rTxAGC_C_Nss3Index9_Nss3Index8_JAguar 0x18e8 ++#define rTxAGC_D_CCK11_CCK1_JAguar 0x1a20 ++#define rTxAGC_D_Ofdm18_Ofdm6_JAguar 0x1a24 ++#define rTxAGC_D_Ofdm54_Ofdm24_JAguar 0x1a28 ++#define rTxAGC_D_MCS3_MCS0_JAguar 0x1a2c ++#define rTxAGC_D_MCS7_MCS4_JAguar 0x1a30 ++#define rTxAGC_D_MCS11_MCS8_JAguar 0x1a34 ++#define rTxAGC_D_MCS15_MCS12_JAguar 0x1a38 ++#define rTxAGC_D_Nss1Index3_Nss1Index0_JAguar 0x1a3c ++#define rTxAGC_D_Nss1Index7_Nss1Index4_JAguar 0x1a40 ++#define rTxAGC_D_Nss2Index1_Nss1Index8_JAguar 0x1a44 ++#define rTxAGC_D_Nss2Index5_Nss2Index2_JAguar 0x1a48 ++#define rTxAGC_D_Nss2Index9_Nss2Index6_JAguar 0x1a4c ++#define rTxAGC_D_MCS19_MCS16_JAguar 0x1ad8 ++#define rTxAGC_D_MCS23_MCS20_JAguar 0x1adc ++#define rTxAGC_D_Nss3Index3_Nss3Index0_JAguar 0x1ae0 ++#define rTxAGC_D_Nss3Index7_Nss3Index4_JAguar 0x1ae4 ++#define rTxAGC_D_Nss3Index9_Nss3Index8_JAguar 0x1ae8 ++#endif ++ ++#define bTxAGC_byte0_Jaguar 0xff ++#define bTxAGC_byte1_Jaguar 0xff00 ++#define bTxAGC_byte2_Jaguar 0xff0000 ++#define bTxAGC_byte3_Jaguar 0xff000000 ++#endif ++ ++#define BIT_FA_RESET BIT0 ++ ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_regdefine11ac.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_regdefine11ac.h new file mode 100644 -index 000000000..c8a551d1c +index 0000000..3dfaf1f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_regdefine11ac.h @@ -0,0 +1,90 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __ODM_REGDEFINE11AC_H__ -+#define __ODM_REGDEFINE11AC_H__ -+ -+//2 RF REG LIST -+ -+ -+ -+//2 BB REG LIST -+//PAGE 8 -+#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 -+#define ODM_REG_BB_RX_PATH_11AC 0x808 -+#define ODM_REG_BB_TX_PATH_11AC 0x80c -+#define ODM_REG_BB_ATC_11AC 0x860 -+#define ODM_REG_EDCCA_POWER_CAL 0x8dc -+#define ODM_REG_DBG_RPT_11AC 0x8fc -+//PAGE 9 -+#define ODM_REG_EDCCA_DOWN_OPT 0x900 -+#define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 -+#define ODM_REG_OFDM_FA_RST_11AC 0x9A4 -+#define ODM_REG_NHM_TIMER_11AC 0x990 -+#define ODM_REG_CLM_TIME_PERIOD_11AC 0x990 -+#define ODM_REG_NHM_TH9_TH10_11AC 0x994 -+#define ODM_REG_CLM_11AC 0x994 -+#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 -+#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c -+#define ODM_REG_NHM_TH8_11AC 0x9a0 -+#define ODM_REG_NHM_9E8_11AC 0x9e8 -+#define ODM_REG_CSI_CONTENT_VALUE 0x9b4 -+//PAGE A -+#define ODM_REG_CCK_CCA_11AC 0xA0A -+#define ODM_REG_CCK_FA_RST_11AC 0xA2C -+#define ODM_REG_CCK_FA_11AC 0xA5C -+//PAGE B -+#define ODM_REG_RST_RPT_11AC 0xB58 -+//PAGE C -+#define ODM_REG_TRMUX_11AC 0xC08 -+#define ODM_REG_IGI_A_11AC 0xC50 -+//PAGE E -+#define ODM_REG_IGI_B_11AC 0xE50 -+#define ODM_REG_TRMUX_11AC_B 0xE08 -+//PAGE F -+#define ODM_REG_CCK_CCA_CNT_11AC 0xF08 -+#define ODM_REG_OFDM_FA_11AC 0xF48 -+#define ODM_REG_RPT_11AC 0xfa0 -+#define ODM_REG_CLM_RESULT_11AC 0xfa4 -+#define ODM_REG_NHM_CNT_11AC 0xfa8 -+#define ODM_REG_NHM_DUR_READY_11AC 0xfb4 -+ -+#define ODM_REG_NHM_CNT7_TO_CNT4_11AC 0xfac -+#define ODM_REG_NHM_CNT11_TO_CNT8_11AC 0xfb0 -+#define ODM_REG_OFDM_FA_TYPE2_11AC 0xFD0 -+//PAGE 18 -+#define ODM_REG_IGI_C_11AC 0x1850 -+//PAGE 1A -+#define ODM_REG_IGI_D_11AC 0x1A50 -+ -+//2 MAC REG LIST -+#define ODM_REG_RESP_TX_11AC 0x6D8 -+ -+ -+ -+//DIG Related -+#define ODM_BIT_IGI_11AC 0xFFFFFFFF -+#define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16 -+#define ODM_BIT_BB_RX_PATH_11AC 0xF -+#define ODM_BIT_BB_TX_PATH_11AC 0xF -+#define ODM_BIT_BB_ATC_11AC BIT14 -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __ODM_REGDEFINE11AC_H__ ++#define __ODM_REGDEFINE11AC_H__ ++ ++//2 RF REG LIST ++ ++ ++ ++//2 BB REG LIST ++//PAGE 8 ++#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 ++#define ODM_REG_BB_RX_PATH_11AC 0x808 ++#define ODM_REG_BB_TX_PATH_11AC 0x80c ++#define ODM_REG_BB_ATC_11AC 0x860 ++#define ODM_REG_EDCCA_POWER_CAL 0x8dc ++#define ODM_REG_DBG_RPT_11AC 0x8fc ++//PAGE 9 ++#define ODM_REG_EDCCA_DOWN_OPT 0x900 ++#define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 ++#define ODM_REG_OFDM_FA_RST_11AC 0x9A4 ++#define ODM_REG_NHM_TIMER_11AC 0x990 ++#define ODM_REG_CLM_TIME_PERIOD_11AC 0x990 ++#define ODM_REG_NHM_TH9_TH10_11AC 0x994 ++#define ODM_REG_CLM_11AC 0x994 ++#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 ++#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c ++#define ODM_REG_NHM_TH8_11AC 0x9a0 ++#define ODM_REG_NHM_9E8_11AC 0x9e8 ++#define ODM_REG_CSI_CONTENT_VALUE 0x9b4 ++//PAGE A ++#define ODM_REG_CCK_CCA_11AC 0xA0A ++#define ODM_REG_CCK_FA_RST_11AC 0xA2C ++#define ODM_REG_CCK_FA_11AC 0xA5C ++//PAGE B ++#define ODM_REG_RST_RPT_11AC 0xB58 ++//PAGE C ++#define ODM_REG_TRMUX_11AC 0xC08 ++#define ODM_REG_IGI_A_11AC 0xC50 ++//PAGE E ++#define ODM_REG_IGI_B_11AC 0xE50 ++#define ODM_REG_TRMUX_11AC_B 0xE08 ++//PAGE F ++#define ODM_REG_CCK_CCA_CNT_11AC 0xF08 ++#define ODM_REG_OFDM_FA_11AC 0xF48 ++#define ODM_REG_RPT_11AC 0xfa0 ++#define ODM_REG_CLM_RESULT_11AC 0xfa4 ++#define ODM_REG_NHM_CNT_11AC 0xfa8 ++#define ODM_REG_NHM_DUR_READY_11AC 0xfb4 ++ ++#define ODM_REG_NHM_CNT7_TO_CNT4_11AC 0xfac ++#define ODM_REG_NHM_CNT11_TO_CNT8_11AC 0xfb0 ++#define ODM_REG_OFDM_FA_TYPE2_11AC 0xFD0 ++//PAGE 18 ++#define ODM_REG_IGI_C_11AC 0x1850 ++//PAGE 1A ++#define ODM_REG_IGI_D_11AC 0x1A50 ++ ++//2 MAC REG LIST ++#define ODM_REG_RESP_TX_11AC 0x6D8 ++ ++ ++ ++//DIG Related ++#define ODM_BIT_IGI_11AC 0xFFFFFFFF ++#define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16 ++#define ODM_BIT_BB_RX_PATH_11AC 0xF ++#define ODM_BIT_BB_TX_PATH_11AC 0xF ++#define ODM_BIT_BB_ATC_11AC BIT14 ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_regdefine11n.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_regdefine11n.h new file mode 100644 -index 000000000..8826dfb20 +index 0000000..2f09dc7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_regdefine11n.h @@ -0,0 +1,199 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __ODM_REGDEFINE11N_H__ -+#define __ODM_REGDEFINE11N_H__ -+ -+ -+//2 RF REG LIST -+#define ODM_REG_RF_MODE_11N 0x00 -+#define ODM_REG_RF_0B_11N 0x0B -+#define ODM_REG_CHNBW_11N 0x18 -+#define ODM_REG_T_METER_11N 0x24 -+#define ODM_REG_RF_25_11N 0x25 -+#define ODM_REG_RF_26_11N 0x26 -+#define ODM_REG_RF_27_11N 0x27 -+#define ODM_REG_RF_2B_11N 0x2B -+#define ODM_REG_RF_2C_11N 0x2C -+#define ODM_REG_RXRF_A3_11N 0x3C -+#define ODM_REG_T_METER_92D_11N 0x42 -+#define ODM_REG_T_METER_88E_11N 0x42 -+ -+ -+ -+//2 BB REG LIST -+//PAGE 8 -+#define ODM_REG_BB_CTRL_11N 0x800 -+#define ODM_REG_RF_PIN_11N 0x804 -+#define ODM_REG_PSD_CTRL_11N 0x808 -+#define ODM_REG_TX_ANT_CTRL_11N 0x80C -+#define ODM_REG_BB_PWR_SAV5_11N 0x818 -+#define ODM_REG_CCK_RPT_FORMAT_11N 0x824 -+#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C -+#define ODM_REG_RX_DEFUALT_A_11N 0x858 -+#define ODM_REG_RX_DEFUALT_B_11N 0x85A -+#define ODM_REG_BB_PWR_SAV3_11N 0x85C -+#define ODM_REG_ANTSEL_CTRL_11N 0x860 -+#define ODM_REG_RX_ANT_CTRL_11N 0x864 -+#define ODM_REG_PIN_CTRL_11N 0x870 -+#define ODM_REG_BB_PWR_SAV1_11N 0x874 -+#define ODM_REG_ANTSEL_PATH_11N 0x878 -+#define ODM_REG_BB_3WIRE_11N 0x88C -+#define ODM_REG_SC_CNT_11N 0x8C4 -+#define ODM_REG_PSD_DATA_11N 0x8B4 -+#define ODM_REG_PSD_DATA_11N 0x8B4 -+#define ODM_REG_NHM_TIMER_11N 0x894 -+#define ODM_REG_CLM_TIME_PERIOD_11N 0x894 -+#define ODM_REG_NHM_TH9_TH10_11N 0x890 -+#define ODM_REG_CLM_11N 0x890 -+#define ODM_REG_NHM_TH3_TO_TH0_11N 0x898 -+#define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c -+#define ODM_REG_NHM_TH8_11N 0xe28 -+#define ODM_REG_CLM_READY_11N 0x8b4 -+#define ODM_REG_CLM_RESULT_11N 0x8d0 -+#define ODM_REG_NHM_CNT_11N 0x8d8 -+ -+// For ACS, Jeffery, 2014-12-26 -+#define ODM_REG_NHM_CNT7_TO_CNT4_11N 0x8dc -+#define ODM_REG_NHM_CNT9_TO_CNT8_11N 0x8d0 -+#define ODM_REG_NHM_CNT10_11N 0x8d4 -+ -+ -+ -+//PAGE 9 -+#define ODM_REG_DBG_RPT_11N 0x908 -+#define ODM_REG_BB_TX_PATH_11N 0x90c -+#define ODM_REG_ANT_MAPPING1_11N 0x914 -+#define ODM_REG_ANT_MAPPING2_11N 0x918 -+#define ODM_REG_EDCCA_DOWN_OPT_11N 0x948 -+ -+//PAGE A -+#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 -+#define ODM_REG_CCK_CCA_11N 0xA0A -+#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C -+#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10 -+#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14 -+#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22 -+#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23 -+#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24 -+#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25 -+#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26 -+#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27 -+#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28 -+#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29 -+#define ODM_REG_CCK_FA_RST_11N 0xA2C -+#define ODM_REG_CCK_FA_MSB_11N 0xA58 -+#define ODM_REG_CCK_FA_LSB_11N 0xA5C -+#define ODM_REG_CCK_CCA_CNT_11N 0xA60 -+#define ODM_REG_BB_PWR_SAV4_11N 0xA74 -+//PAGE B -+#define ODM_REG_LNA_SWITCH_11N 0xB2C -+#define ODM_REG_PATH_SWITCH_11N 0xB30 -+#define ODM_REG_RSSI_CTRL_11N 0xB38 -+#define ODM_REG_CONFIG_ANTA_11N 0xB68 -+#define ODM_REG_RSSI_BT_11N 0xB9C -+//PAGE C -+#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 -+#define ODM_REG_BB_RX_PATH_11N 0xC04 -+#define ODM_REG_TRMUX_11N 0xC08 -+#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C -+#define ODM_REG_RXIQI_MATRIX_11N 0xC14 -+#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C -+#define ODM_REG_IGI_A_11N 0xC50 -+#define ODM_REG_ANTDIV_PARA2_11N 0xC54 -+#define ODM_REG_IGI_B_11N 0xC58 -+#define ODM_REG_ANTDIV_PARA3_11N 0xC5C -+#define ODM_REG_L1SBD_PD_CH_11N 0XC6C -+#define ODM_REG_BB_PWR_SAV2_11N 0xC70 -+#define ODM_REG_RX_OFF_11N 0xC7C -+#define ODM_REG_TXIQK_MATRIXA_11N 0xC80 -+#define ODM_REG_TXIQK_MATRIXB_11N 0xC88 -+#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94 -+#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C -+#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0 -+#define ODM_REG_ANTDIV_PARA1_11N 0xCA4 -+#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 -+//PAGE D -+#define ODM_REG_OFDM_FA_RSTD_11N 0xD00 -+#define ODM_REG_BB_ATC_11N 0xD2C -+#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 -+#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 -+#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 -+#define ODM_REG_RPT_11N 0xDF4 -+//PAGE E -+#define ODM_REG_TXAGC_A_6_18_11N 0xE00 -+#define ODM_REG_TXAGC_A_24_54_11N 0xE04 -+#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 -+#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10 -+#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14 -+#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18 -+#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C -+#define ODM_REG_EDCCA_DCNF_11N 0xE24 -+#define ODM_REG_FPGA0_IQK_11N 0xE28 -+#define ODM_REG_TXIQK_TONE_A_11N 0xE30 -+#define ODM_REG_RXIQK_TONE_A_11N 0xE34 -+#define ODM_REG_TXIQK_PI_A_11N 0xE38 -+#define ODM_REG_RXIQK_PI_A_11N 0xE3C -+#define ODM_REG_TXIQK_11N 0xE40 -+#define ODM_REG_RXIQK_11N 0xE44 -+#define ODM_REG_IQK_AGC_PTS_11N 0xE48 -+#define ODM_REG_IQK_AGC_RSP_11N 0xE4C -+#define ODM_REG_BLUETOOTH_11N 0xE6C -+#define ODM_REG_RX_WAIT_CCA_11N 0xE70 -+#define ODM_REG_TX_CCK_RFON_11N 0xE74 -+#define ODM_REG_TX_CCK_BBON_11N 0xE78 -+#define ODM_REG_OFDM_RFON_11N 0xE7C -+#define ODM_REG_OFDM_BBON_11N 0xE80 -+#define ODM_REG_TX2RX_11N 0xE84 -+#define ODM_REG_TX2TX_11N 0xE88 -+#define ODM_REG_RX_CCK_11N 0xE8C -+#define ODM_REG_RX_OFDM_11N 0xED0 -+#define ODM_REG_RX_WAIT_RIFS_11N 0xED4 -+#define ODM_REG_RX2RX_11N 0xED8 -+#define ODM_REG_STANDBY_11N 0xEDC -+#define ODM_REG_SLEEP_11N 0xEE0 -+#define ODM_REG_PMPD_ANAEN_11N 0xEEC -+#define ODM_REG_IGI_C_11N 0xF84 -+#define ODM_REG_IGI_D_11N 0xF88 -+ -+//2 MAC REG LIST -+#define ODM_REG_BB_RST_11N 0x02 -+#define ODM_REG_ANTSEL_PIN_11N 0x4C -+#define ODM_REG_EARLY_MODE_11N 0x4D0 -+#define ODM_REG_RSSI_MONITOR_11N 0x4FE -+#define ODM_REG_EDCA_VO_11N 0x500 -+#define ODM_REG_EDCA_VI_11N 0x504 -+#define ODM_REG_EDCA_BE_11N 0x508 -+#define ODM_REG_EDCA_BK_11N 0x50C -+#define ODM_REG_TXPAUSE_11N 0x522 -+#define ODM_REG_RESP_TX_11N 0x6D8 -+#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 -+#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 -+ -+ -+//DIG Related -+#define ODM_BIT_IGI_11N 0x0000007F -+#define ODM_BIT_CCK_RPT_FORMAT_11N BIT9 -+#define ODM_BIT_BB_RX_PATH_11N 0xF -+#define ODM_BIT_BB_TX_PATH_11N 0xF -+#define ODM_BIT_BB_ATC_11N BIT11 -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __ODM_REGDEFINE11N_H__ ++#define __ODM_REGDEFINE11N_H__ ++ ++ ++//2 RF REG LIST ++#define ODM_REG_RF_MODE_11N 0x00 ++#define ODM_REG_RF_0B_11N 0x0B ++#define ODM_REG_CHNBW_11N 0x18 ++#define ODM_REG_T_METER_11N 0x24 ++#define ODM_REG_RF_25_11N 0x25 ++#define ODM_REG_RF_26_11N 0x26 ++#define ODM_REG_RF_27_11N 0x27 ++#define ODM_REG_RF_2B_11N 0x2B ++#define ODM_REG_RF_2C_11N 0x2C ++#define ODM_REG_RXRF_A3_11N 0x3C ++#define ODM_REG_T_METER_92D_11N 0x42 ++#define ODM_REG_T_METER_88E_11N 0x42 ++ ++ ++ ++//2 BB REG LIST ++//PAGE 8 ++#define ODM_REG_BB_CTRL_11N 0x800 ++#define ODM_REG_RF_PIN_11N 0x804 ++#define ODM_REG_PSD_CTRL_11N 0x808 ++#define ODM_REG_TX_ANT_CTRL_11N 0x80C ++#define ODM_REG_BB_PWR_SAV5_11N 0x818 ++#define ODM_REG_CCK_RPT_FORMAT_11N 0x824 ++#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C ++#define ODM_REG_RX_DEFUALT_A_11N 0x858 ++#define ODM_REG_RX_DEFUALT_B_11N 0x85A ++#define ODM_REG_BB_PWR_SAV3_11N 0x85C ++#define ODM_REG_ANTSEL_CTRL_11N 0x860 ++#define ODM_REG_RX_ANT_CTRL_11N 0x864 ++#define ODM_REG_PIN_CTRL_11N 0x870 ++#define ODM_REG_BB_PWR_SAV1_11N 0x874 ++#define ODM_REG_ANTSEL_PATH_11N 0x878 ++#define ODM_REG_BB_3WIRE_11N 0x88C ++#define ODM_REG_SC_CNT_11N 0x8C4 ++#define ODM_REG_PSD_DATA_11N 0x8B4 ++#define ODM_REG_PSD_DATA_11N 0x8B4 ++#define ODM_REG_NHM_TIMER_11N 0x894 ++#define ODM_REG_CLM_TIME_PERIOD_11N 0x894 ++#define ODM_REG_NHM_TH9_TH10_11N 0x890 ++#define ODM_REG_CLM_11N 0x890 ++#define ODM_REG_NHM_TH3_TO_TH0_11N 0x898 ++#define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c ++#define ODM_REG_NHM_TH8_11N 0xe28 ++#define ODM_REG_CLM_READY_11N 0x8b4 ++#define ODM_REG_CLM_RESULT_11N 0x8d0 ++#define ODM_REG_NHM_CNT_11N 0x8d8 ++ ++// For ACS, Jeffery, 2014-12-26 ++#define ODM_REG_NHM_CNT7_TO_CNT4_11N 0x8dc ++#define ODM_REG_NHM_CNT9_TO_CNT8_11N 0x8d0 ++#define ODM_REG_NHM_CNT10_11N 0x8d4 ++ ++ ++ ++//PAGE 9 ++#define ODM_REG_DBG_RPT_11N 0x908 ++#define ODM_REG_BB_TX_PATH_11N 0x90c ++#define ODM_REG_ANT_MAPPING1_11N 0x914 ++#define ODM_REG_ANT_MAPPING2_11N 0x918 ++#define ODM_REG_EDCCA_DOWN_OPT_11N 0x948 ++ ++//PAGE A ++#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 ++#define ODM_REG_CCK_CCA_11N 0xA0A ++#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C ++#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10 ++#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14 ++#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22 ++#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23 ++#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24 ++#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25 ++#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26 ++#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27 ++#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28 ++#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29 ++#define ODM_REG_CCK_FA_RST_11N 0xA2C ++#define ODM_REG_CCK_FA_MSB_11N 0xA58 ++#define ODM_REG_CCK_FA_LSB_11N 0xA5C ++#define ODM_REG_CCK_CCA_CNT_11N 0xA60 ++#define ODM_REG_BB_PWR_SAV4_11N 0xA74 ++//PAGE B ++#define ODM_REG_LNA_SWITCH_11N 0xB2C ++#define ODM_REG_PATH_SWITCH_11N 0xB30 ++#define ODM_REG_RSSI_CTRL_11N 0xB38 ++#define ODM_REG_CONFIG_ANTA_11N 0xB68 ++#define ODM_REG_RSSI_BT_11N 0xB9C ++//PAGE C ++#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 ++#define ODM_REG_BB_RX_PATH_11N 0xC04 ++#define ODM_REG_TRMUX_11N 0xC08 ++#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C ++#define ODM_REG_RXIQI_MATRIX_11N 0xC14 ++#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C ++#define ODM_REG_IGI_A_11N 0xC50 ++#define ODM_REG_ANTDIV_PARA2_11N 0xC54 ++#define ODM_REG_IGI_B_11N 0xC58 ++#define ODM_REG_ANTDIV_PARA3_11N 0xC5C ++#define ODM_REG_L1SBD_PD_CH_11N 0XC6C ++#define ODM_REG_BB_PWR_SAV2_11N 0xC70 ++#define ODM_REG_RX_OFF_11N 0xC7C ++#define ODM_REG_TXIQK_MATRIXA_11N 0xC80 ++#define ODM_REG_TXIQK_MATRIXB_11N 0xC88 ++#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94 ++#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C ++#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0 ++#define ODM_REG_ANTDIV_PARA1_11N 0xCA4 ++#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 ++//PAGE D ++#define ODM_REG_OFDM_FA_RSTD_11N 0xD00 ++#define ODM_REG_BB_ATC_11N 0xD2C ++#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 ++#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 ++#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 ++#define ODM_REG_RPT_11N 0xDF4 ++//PAGE E ++#define ODM_REG_TXAGC_A_6_18_11N 0xE00 ++#define ODM_REG_TXAGC_A_24_54_11N 0xE04 ++#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 ++#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10 ++#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14 ++#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18 ++#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C ++#define ODM_REG_EDCCA_DCNF_11N 0xE24 ++#define ODM_REG_FPGA0_IQK_11N 0xE28 ++#define ODM_REG_TXIQK_TONE_A_11N 0xE30 ++#define ODM_REG_RXIQK_TONE_A_11N 0xE34 ++#define ODM_REG_TXIQK_PI_A_11N 0xE38 ++#define ODM_REG_RXIQK_PI_A_11N 0xE3C ++#define ODM_REG_TXIQK_11N 0xE40 ++#define ODM_REG_RXIQK_11N 0xE44 ++#define ODM_REG_IQK_AGC_PTS_11N 0xE48 ++#define ODM_REG_IQK_AGC_RSP_11N 0xE4C ++#define ODM_REG_BLUETOOTH_11N 0xE6C ++#define ODM_REG_RX_WAIT_CCA_11N 0xE70 ++#define ODM_REG_TX_CCK_RFON_11N 0xE74 ++#define ODM_REG_TX_CCK_BBON_11N 0xE78 ++#define ODM_REG_OFDM_RFON_11N 0xE7C ++#define ODM_REG_OFDM_BBON_11N 0xE80 ++#define ODM_REG_TX2RX_11N 0xE84 ++#define ODM_REG_TX2TX_11N 0xE88 ++#define ODM_REG_RX_CCK_11N 0xE8C ++#define ODM_REG_RX_OFDM_11N 0xED0 ++#define ODM_REG_RX_WAIT_RIFS_11N 0xED4 ++#define ODM_REG_RX2RX_11N 0xED8 ++#define ODM_REG_STANDBY_11N 0xEDC ++#define ODM_REG_SLEEP_11N 0xEE0 ++#define ODM_REG_PMPD_ANAEN_11N 0xEEC ++#define ODM_REG_IGI_C_11N 0xF84 ++#define ODM_REG_IGI_D_11N 0xF88 ++ ++//2 MAC REG LIST ++#define ODM_REG_BB_RST_11N 0x02 ++#define ODM_REG_ANTSEL_PIN_11N 0x4C ++#define ODM_REG_EARLY_MODE_11N 0x4D0 ++#define ODM_REG_RSSI_MONITOR_11N 0x4FE ++#define ODM_REG_EDCA_VO_11N 0x500 ++#define ODM_REG_EDCA_VI_11N 0x504 ++#define ODM_REG_EDCA_BE_11N 0x508 ++#define ODM_REG_EDCA_BK_11N 0x50C ++#define ODM_REG_TXPAUSE_11N 0x522 ++#define ODM_REG_RESP_TX_11N 0x6D8 ++#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 ++#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 ++ ++ ++//DIG Related ++#define ODM_BIT_IGI_11N 0x0000007F ++#define ODM_BIT_CCK_RPT_FORMAT_11N BIT9 ++#define ODM_BIT_BB_RX_PATH_11N 0xF ++#define ODM_BIT_BB_TX_PATH_11N 0xF ++#define ODM_BIT_BB_ATC_11N BIT11 ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rxhp.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rxhp.c new file mode 100644 -index 000000000..9451d5523 +index 0000000..8a4a273 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rxhp.c @@ -0,0 +1,1692 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD -+#define MODE_40M 0 //0:20M, 1:40M -+#define PSD_TH2 3 -+#define PSD_CHMIN 20 // Minimum channel number for BT AFH -+#define SIR_STEP_SIZE 3 -+#define Smooth_Size_1 5 -+#define Smooth_TH_1 3 -+#define Smooth_Size_2 10 -+#define Smooth_TH_2 4 -+#define Smooth_Size_3 20 -+#define Smooth_TH_3 4 -+#define Smooth_Step_Size 5 -+#define Adaptive_SIR 1 -+#define SCAN_INTERVAL 1500 //ms -+#define SYN_Length 5 // for 92D -+ -+#define LNA_Low_Gain_1 0x64 -+#define LNA_Low_Gain_2 0x5A -+#define LNA_Low_Gain_3 0x58 -+ -+#define pw_th_10dB 0x0 -+#define pw_th_16dB 0x3 -+ -+#define FA_RXHP_TH1 5000 -+#define FA_RXHP_TH2 1500 -+#define FA_RXHP_TH3 800 -+#define FA_RXHP_TH4 600 -+#define FA_RXHP_TH5 500 -+ -+#define Idle_Mode 0 -+#define High_TP_Mode 1 -+#define Low_TP_Mode 2 -+ -+ -+VOID -+odm_PSDMonitorInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ //PSD Monitor Setting -+ //Which path in ADC/DAC is turnned on for PSD: both I/Q -+ ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); -+ //Ageraged number: 8 -+ ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); -+ pDM_Odm->bPSDinProcess = FALSE; -+ pDM_Odm->bUserAssignLevel = FALSE; -+ pDM_Odm->bPSDactive = FALSE; -+ //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit -+ //Set Debug Port -+ //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); -+ //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD -+ //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan -+ //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval -+ -+ //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms -+#endif -+} -+ -+VOID -+PatchDCTone( -+ IN PVOID pDM_VOID, -+ pu4Byte PSD_report, -+ u1Byte initial_gain_psd -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ //PADAPTER pAdapter; -+ -+ u4Byte psd_report; -+ -+ //2 Switch to CH11 to patch CH9 and CH13 DC tone -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 11); -+ -+ if(pDM_Odm->SupportICType== ODM_RTL8192D) -+ { -+ if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) -+ { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 11); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x77C1A); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x41289); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01840); -+ } -+ else -+ { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x77C1A); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x41289); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01840); -+ } -+ } -+ -+ //Ch9 DC tone patch -+ psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); -+ PSD_report[50] = psd_report; -+ //Ch13 DC tone patch -+ psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); -+ PSD_report[70] = psd_report; -+ -+ //2 Switch to CH3 to patch CH1 and CH5 DC tone -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 3); -+ -+ -+ if(pDM_Odm->SupportICType==ODM_RTL8192D) -+ { -+ if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) -+ { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 3); -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x07C1A); -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x61289); -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01C41); -+ } -+ else -+ { -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x07C1A); -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x61289); -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01C41); -+ } -+ } -+ -+ //Ch1 DC tone patch -+ psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); -+ PSD_report[10] = psd_report; -+ //Ch5 DC tone patch -+ psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); -+ PSD_report[30] = psd_report; -+ -+} -+ -+ -+VOID -+GoodChannelDecision( -+ IN PVOID pDM_VOID, -+ pu4Byte PSD_report, -+ pu1Byte PSD_bitmap, -+ u1Byte RSSI_BT, -+ pu1Byte PSD_bitmap_memory) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; -+ //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen -+ s4Byte TH1= RSSI_BT+0x14; -+ s4Byte TH2 = RSSI_BT+85; -+ //u2Byte TH3; -+// s4Byte RegB34; -+ u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; -+ //u1Byte psd_bit; -+ u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; -+ int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; -+ -+// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; -+ -+ if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) -+ { -+ TH1 = RSSI_BT + 0x14; -+ } -+ -+ Smooth_size[0]=Smooth_Size_1; -+ Smooth_size[1]=Smooth_Size_2; -+ Smooth_size[2]=Smooth_Size_3; -+ Smooth_TH[0]=Smooth_TH_1; -+ Smooth_TH[1]=Smooth_TH_2; -+ Smooth_TH[2]=Smooth_TH_3; -+ Smooth_Interval[0]=16; -+ Smooth_Interval[1]=15; -+ Smooth_Interval[2]=13; -+ good_cnt = 0; -+ if(pDM_Odm->SupportICType==ODM_RTL8723A) -+ { -+ //2 Threshold -+ -+ if(RSSI_BT >=41) -+ TH1 = 113; -+ else if(RSSI_BT >=38) // >= -15dBm -+ TH1 = 105; //0x69 -+ else if((RSSI_BT >=33)&(RSSI_BT <38)) -+ TH1 = 99+(RSSI_BT-33); //0x63 -+ else if((RSSI_BT >=26)&(RSSI_BT<33)) -+ TH1 = 99-(33-RSSI_BT)+2; //0x5e -+ else if((RSSI_BT >=24)&(RSSI_BT<26)) -+ TH1 = 88-((RSSI_BT-24)*3); //0x58 -+ else if((RSSI_BT >=18)&(RSSI_BT<24)) -+ TH1 = 77+((RSSI_BT-18)*2); -+ else if((RSSI_BT >=14)&(RSSI_BT<18)) -+ TH1 = 63+((RSSI_BT-14)*2); -+ else if((RSSI_BT >=8)&(RSSI_BT<14)) -+ TH1 = 58+((RSSI_BT-8)*2); -+ else if((RSSI_BT >=3)&(RSSI_BT<8)) -+ TH1 = 52+(RSSI_BT-3); -+ else -+ TH1 = 51; -+ } -+ -+ for (i = 0; i< 10; i++) -+ PSD_bitmap[i] = 0; -+ -+ -+ // Add By Gary -+ for (i=0; i<80; i++) -+ pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; -+ // End -+ -+ -+ -+ if(pDM_Odm->SupportICType==ODM_RTL8723A) -+ { -+ TH1 =TH1-SIR_STEP_SIZE; -+ } -+ while (good_cnt < PSD_CHMIN) -+ { -+ good_cnt = 0; -+ if(pDM_Odm->SupportICType==ODM_RTL8723A) -+ { -+ if(TH1 ==TH2) -+ break; -+ if((TH1+SIR_STEP_SIZE) < TH2) -+ TH1 += SIR_STEP_SIZE; -+ else -+ TH1 = TH2; -+ } -+ else -+ { -+ if(TH1==(RSSI_BT+0x1E)) -+ break; -+ if((TH1+2) < (RSSI_BT+0x1E)) -+ TH1+=3; -+ else -+ TH1 = RSSI_BT+0x1E; -+ -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); -+ -+ for (i = 0; i< 80; i++) -+ { -+ if((s4Byte)(PSD_report[i]) < TH1) -+ { -+ byte_idx = i / 8; -+ bit_idx = i -8*byte_idx; -+ bitmap = PSD_bitmap[byte_idx]; -+ PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); -+ } -+ } -+ -+#if DBG -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); -+ for(n=0;n<10;n++) -+ { -+ //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); -+ for (i = 0; i<8; i++) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); -+ } -+#endif -+ -+ //1 Start of smoothing function -+ -+ for (j=0;j<3;j++) -+ { -+ start_byte_idx=0; -+ start_bit_idx=0; -+ for(n=0; n 7 ) -+ { -+ start_byte_idx= start_byte_idx+start_bit_idx/8; -+ start_bit_idx = start_bit_idx%8; -+ } -+ } -+ -+ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); -+ for(n=0;n<10;n++) -+ { -+ for (i = 0; i<8; i++) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); -+ -+ if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary -+ { -+ pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; -+ } // ------end by Gary -+ } -+ } -+ -+ } -+ -+ -+ good_cnt = 0; -+ for ( i = 0; i < 10; i++) -+ { -+ for (n = 0; n < 8; n++) -+ if((PSD_bitmap[i]& BIT(n)) != 0) -+ good_cnt++; -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, ODM_COMP_PSD,("PSD: good channel cnt = %u",good_cnt)); -+ } -+ -+ //RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); -+ for (i = 0; i <10; i++) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); -+/* -+ //Update bitmap memory -+ for(i = 0; i < 80; i++) -+ { -+ byte_idx = i / 8; -+ bit_idx = i -8*byte_idx; -+ psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; -+ bitmap = PSD_bitmap_memory[i]; -+ PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; -+ } -+*/ -+} -+ -+ -+ -+VOID -+odm_PSD_Monitor( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ unsigned int pts, start_point, stop_point; -+ u1Byte initial_gain ; -+ static u1Byte PSD_bitmap_memory[80], init_memory = 0; -+ static u1Byte psd_cnt=0; -+ static u4Byte PSD_report[80], PSD_report_tmp; -+ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; -+ u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; -+ static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; -+ u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, -+ 0,3,6,10,13,16,19,22,26,29}; -+ u1Byte n, i, channel, BBReset,tone_idx; -+ u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; -+ s4Byte PSD_skip_start, PSD_skip_stop; -+ u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; -+ u4Byte ReScan, Interval, Is40MHz; -+ u8Byte curTxOkCnt, curRxOkCnt; -+ int cur_byte_idx, cur_bit_idx; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -+ -+ -+ if(*pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("pbDriverIsGoingToPnpSetPowerSleep!!!!!!!!!!!!!!!\n")); -+ return; -+ } -+ -+ -+ if( (*(pDM_Odm->pbScanInProcess)) || -+ pDM_Odm->bLinkInProcess) -+ { -+ if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) -+ { -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 1500); //ms -+ //psd_cnt=0; -+ } -+ return; -+ } -+ -+ if(pDM_Odm->bBtHsOperation) -+ { -+ ReScan = 1; -+ Interval = SCAN_INTERVAL; -+ } -+ else -+ { -+ ReScan = PSD_RESCAN; -+ Interval = SCAN_INTERVAL; -+ } -+ -+ //1 Initialization -+ if(init_memory == 0) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); -+ for(i = 0; i < 80; i++) -+ PSD_bitmap_memory[i] = 0xFF; // channel is always good -+ init_memory = 1; -+ } -+ if(psd_cnt == 0) -+ { -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); -+ for(i = 0; i < 80; i++) -+ PSD_report[i] = 0; -+ } -+ -+ //1 Backup Current Settings -+ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); -+/* -+ if(pDM_Odm->SupportICType==ODM_RTL8192D) -+ { -+ //2 Record Current synthesizer parameters based on current channel -+ if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) -+ { -+ SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x25, bMaskDWord); -+ SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x26, bMaskDWord); -+ SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x27, bMaskDWord); -+ SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, bMaskDWord); -+ SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, bMaskDWord); -+ } -+ else // DualMAC_DualPHY 2G -+ { -+ SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x25, bMaskDWord); -+ SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x26, bMaskDWord); -+ SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x27, bMaskDWord); -+ SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, bMaskDWord); -+ SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, bMaskDWord); -+ } -+ } -+*/ -+ //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); -+ RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); -+ -+ //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; -+ RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; -+ -+ //2??? -+ if(CHNL_RUN_ABOVE_40MHZ(pMgntInfo)) -+ Is40MHz = TRUE; -+ else -+ Is40MHz = FALSE; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); -+ //1 Turn off CCK -+ //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); -+ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); -+ //1 Turn off TX -+ //Pause TX Queue -+ //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); -+ ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); -+ -+ //Force RX to stop TX immediately -+ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); -+ //1 Turn off RX -+ //Rx AGC off RegC70[0]=0, RegC7C[20]=0 -+ //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); -+ //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); -+ -+ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); -+ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); -+ -+ -+ //Turn off CCA -+ //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); -+ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); -+ -+ //BB Reset -+ //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); -+ BBReset = ODM_Read1Byte(pDM_Odm, 0x02); -+ -+ //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); -+ //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); -+ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess -+ ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); -+ ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); -+ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); -+ -+ //1 Leave RX idle low power -+ //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); -+ -+ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); -+ //1 Fix initial gain -+ //if (IS_HARDWARE_TYPE_8723AE(Adapter)) -+ //RSSI_BT = pHalData->RSSI_BT; -+ //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary -+ // RSSI_BT = RSSI_BT_new; -+ -+ if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) -+ RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT -+ -+ if(RSSI_BT>=47) -+ RSSI_BT=47; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); -+ -+ if(pDM_Odm->SupportICType==ODM_RTL8723A) -+ { -+ //Neil add--2011--10--12 -+ //2 Initial Gain index -+ if(RSSI_BT >=35) // >= -15dBm -+ initial_gain_psd = RSSI_BT*2; -+ else if((RSSI_BT >=33)&(RSSI_BT<35)) -+ initial_gain_psd = RSSI_BT*2+6; -+ else if((RSSI_BT >=24)&(RSSI_BT<33)) -+ initial_gain_psd = 70-(33-RSSI_BT); -+ else if((RSSI_BT >=19)&(RSSI_BT<24)) -+ initial_gain_psd = 64-((24-RSSI_BT)*4); -+ else if((RSSI_BT >=14)&(RSSI_BT<19)) -+ initial_gain_psd = 44-((18-RSSI_BT)*2); -+ else if((RSSI_BT >=8)&(RSSI_BT<14)) -+ initial_gain_psd = 35-(14-RSSI_BT); -+ else -+ initial_gain_psd = 0x1B; -+ } -+ else -+ { -+ -+ //need to do -+ initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI -+ //} -+ } -+ //if(RSSI_BT<0x17) -+ // RSSI_BT +=3; -+ //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); -+ -+ //initialGainUpper = 0x5E; //Modify by neil chen -+ -+ if(pDM_Odm->bUserAssignLevel) -+ { -+ pDM_Odm->bUserAssignLevel = FALSE; -+ initialGainUpper = 0x7f; -+ } -+ else -+ { -+ initialGainUpper = 0x5E; -+ } -+ -+ /* -+ if (initial_gain_psd < 0x1a) -+ initial_gain_psd = 0x1a; -+ if (initial_gain_psd > initialGainUpper) -+ initial_gain_psd = initialGainUpper; -+ */ -+ -+ //if(pDM_Odm->SupportICType==ODM_RTL8723A) -+ SSBT = RSSI_BT * 2 +0x3E; -+ -+ -+ //if(IS_HARDWARE_TYPE_8723AE(Adapter)) -+ // SSBT = RSSI_BT * 2 +0x3E; -+ //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary -+ //{ -+ // RSSI_BT = initial_gain_psd; -+ // SSBT = RSSI_BT; -+ //} -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); -+ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); -+ //DbgPrint("PSD: SSBT= %d", SSBT); -+ //need to do -+ pDM_Odm->bDMInitialGainEnable = FALSE; -+ initial_gain =(u1Byte) (ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F); -+ -+ // make sure the initial gain is under the correct range. -+ //initial_gain_psd &= 0x7f; -+ ODM_Write_DIG(pDM_Odm, initial_gain_psd); -+ //1 Turn off 3-wire -+ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); -+ -+ //pts value = 128, 256, 512, 1024 -+ pts = 128; -+ -+ if(pts == 128) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); -+ start_point = 64; -+ stop_point = 192; -+ } -+ else if(pts == 256) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); -+ start_point = 128; -+ stop_point = 384; -+ } -+ else if(pts == 512) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); -+ start_point = 256; -+ stop_point = 768; -+ } -+ else -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); -+ start_point = 512; -+ stop_point = 1536; -+ } -+ -+ -+//3 Skip WLAN channels if WLAN busy -+ -+ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; -+ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; -+ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); -+ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); -+ -+ PSD_skip_start=80; -+ PSD_skip_stop = 0; -+ wlan_channel = CurrentChannel & 0x0f; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); -+ if(pDM_Odm->SupportICType==ODM_RTL8723A) -+ { -+ if(pDM_Odm->bBtHsOperation) -+ { -+ if(pDM_Odm->bLinked) -+ { -+ if(Is40MHz) -+ { -+ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask -+ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; -+ } -+ else -+ { -+ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask -+ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; -+ } -+ } -+ else -+ { -+ // mask for 40MHz -+ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask -+ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; -+ } -+ if(PSD_skip_start < 0) -+ PSD_skip_start = 0; -+ if(PSD_skip_stop >80) -+ PSD_skip_stop = 80; -+ } -+ else -+ { -+ if((curRxOkCnt+curTxOkCnt) > 5) -+ { -+ if(Is40MHz) -+ { -+ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask -+ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; -+ } -+ else -+ { -+ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask -+ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; -+ } -+ -+ if(PSD_skip_start < 0) -+ PSD_skip_start = 0; -+ if(PSD_skip_stop >80) -+ PSD_skip_stop = 80; -+ } -+ } -+ } -+#if 0 -+ else -+ { -+ if((curRxOkCnt+curTxOkCnt) > 1000) -+ { -+ PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; -+ PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; -+ } -+ } -+#endif //Reove RXHP Issue -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); -+ -+ for (n=0;n<80;n++) -+ { -+ if((n%20)==0) -+ { -+ channel = (n/20)*4 + 1; -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); -+ } -+ tone_idx = n%20; -+ if ((n>=PSD_skip_start) && (n PSD_report[n]) -+ PSD_report[n] = PSD_report_tmp; -+ -+ } -+ } -+ -+ PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); -+ -+ //----end -+ //1 Turn on RX -+ //Rx AGC on -+ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); -+ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); -+ //CCK on -+ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); -+ //1 Turn on TX -+ //Resume TX Queue -+ -+ ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); -+ //Turn on 3-wire -+ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); -+ //1 Restore Current Settings -+ //Resume DIG -+ pDM_Odm->bDMInitialGainEnable = TRUE; -+ -+ ODM_Write_DIG(pDM_Odm, initial_gain); -+ -+ // restore originl center frequency -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); -+ -+ //Turn on CCA -+ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); -+ //Restore RX idle low power -+ if(RxIdleLowPwr == TRUE) -+ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); -+ -+ psd_cnt++; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); -+ if (psd_cnt < ReScan) -+ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); -+ else -+ { -+ psd_cnt = 0; -+ for(i=0;i<80;i++) -+ //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); -+ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); -+ -+ -+ GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); -+ -+ if(pDM_Odm->SupportICType==ODM_RTL8723A) -+ { -+ cur_byte_idx=0; -+ cur_bit_idx=0; -+ -+ //2 Restore H2C PSD Data to Last Data -+ H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; -+ H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; -+ H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; -+ H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; -+ H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; -+ -+ -+ //2 Translate 80bit channel map to 40bit channel -+ for ( i=0;i<5;i++) -+ { -+ for(n=0;n<8;n++) -+ { -+ cur_byte_idx = i*2 + n/4; -+ cur_bit_idx = (n%4)*2; -+ if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) -+ H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); -+ } -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); -+ } -+ -+ //3 To Compare the difference -+ for ( i=0;i<5;i++) -+ { -+ if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) -+ { -+ FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); -+ break; -+ } -+ else -+ { -+ if(i==5) -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Not need to Update\n")); -+ } -+ } -+ if(pDM_Odm->bBtHsOperation) -+ { -+ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 10000); -+ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); -+ } -+ else -+ { -+ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 1500); -+ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); -+ } -+ } -+ } -+} -+/* -+//Neil for Get BT RSSI -+// Be Triggered by BT C2H CMD -+VOID -+ODM_PSDGetRSSI( -+ IN u1Byte RSSI_BT) -+{ -+ -+ -+} -+ -+*/ -+ -+VOID -+ODM_PSDMonitor( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ //if(IS_HARDWARE_TYPE_8723AE(Adapter)) -+ -+ if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type -+ { -+ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) -+ { -+ if(!pDM_Odm->bBtEnabled) //need to check upper layer connection -+ { -+ pDM_Odm->bPSDactive=FALSE; -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); -+ //{ -+ pDM_Odm->bPSDinProcess = TRUE; -+ pDM_Odm->bPSDactive=TRUE; -+ odm_PSD_Monitor(pDM_Odm); -+ pDM_Odm->bPSDinProcess = FALSE; -+ } -+ } -+ -+} -+VOID -+odm_PSDMonitorCallback( -+ PRT_TIMER pTimer -+) -+{ -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); -+} -+ -+VOID -+odm_PSDMonitorWorkItemCallback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER Adapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ ODM_PSDMonitor(pDM_Odm); -+} -+ -+ -+ //cosa debug tool need to modify -+ -+VOID -+ODM_PSDDbgControl( -+ IN PADAPTER Adapter, -+ IN u4Byte mode, -+ IN u4Byte btRssi -+ ) -+{ -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); -+ if(mode) -+ { -+ pDM_Odm->RSSI_BT = (u1Byte)btRssi; -+ pDM_Odm->bUserAssignLevel = TRUE; -+ ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms -+ } -+ else -+ { -+ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); -+ } -+#endif -+} -+ -+ -+//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) -+ -+void odm_RXHPInit( -+ IN PVOID pDM_VOID) -+{ -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; -+ u1Byte index; -+ -+ pRX_HP_Table->RXHP_enable = TRUE; -+ pRX_HP_Table->RXHP_flag = 0; -+ pRX_HP_Table->PSD_func_trigger = 0; -+ pRX_HP_Table->Pre_IGI = 0x20; -+ pRX_HP_Table->Cur_IGI = 0x20; -+ pRX_HP_Table->Cur_pw_th = pw_th_10dB; -+ pRX_HP_Table->Pre_pw_th = pw_th_10dB; -+ for(index=0; index<80; index++) -+ pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; -+ -+#if(DEV_BUS_TYPE == RT_USB_INTERFACE) -+ pRX_HP_Table->TP_Mode = Idle_Mode; -+#endif -+#endif -+} -+ -+VOID -+odm_PSD_RXHP( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ unsigned int pts, start_point, stop_point, initial_gain ; -+ static u1Byte PSD_bitmap_memory[80], init_memory = 0; -+ static u1Byte psd_cnt=0; -+ static u4Byte PSD_report[80], PSD_report_tmp; -+ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; -+ u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, -+ 0,3,6,10,13,16,19,22,26,29}; -+ u1Byte n, i, channel, BBReset,tone_idx; -+ u1Byte PSD_bitmap[10]/*, SSBT=0*/,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; -+ s4Byte PSD_skip_start, PSD_skip_stop; -+ u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; -+ u4Byte ReScan, Interval, Is40MHz; -+ u8Byte curTxOkCnt, curRxOkCnt; -+ //--------------2G band synthesizer for 92D switch RF channel using----------------- -+ u1Byte group_idx=0; -+ u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; -+ u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel -+ u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} -+ {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 -+ {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 -+ //--------------------- Add by Gary for Debug setting ---------------------- -+ u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); -+ u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); -+ //--------------------------------------------------------------------- -+ -+ if(pMgntInfo->bScanInProgress) -+ { -+ return; -+ } -+ -+ ReScan = PSD_RESCAN; -+ Interval = SCAN_INTERVAL; -+ -+ -+ //1 Initialization -+ if(init_memory == 0) -+ { -+ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); -+ for(i = 0; i < 80; i++) -+ PSD_bitmap_memory[i] = 0xFF; // channel is always good -+ init_memory = 1; -+ } -+ if(psd_cnt == 0) -+ { -+ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); -+ for(i = 0; i < 80; i++) -+ PSD_report[i] = 0; -+ } -+ -+ //1 Backup Current Settings -+ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ //2 Record Current synthesizer parameters based on current channel -+ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) -+ { -+ SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord); -+ SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord); -+ SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord); -+ SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord); -+ SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord); -+ } -+ else // DualMAC_DualPHY 2G -+ { -+ SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord); -+ SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord); -+ SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord); -+ SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord); -+ SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord); -+ } -+ } -+ RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); -+ RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; -+ Is40MHz = *(pDM_Odm->pBandWidth); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); -+ //1 Turn off CCK -+ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); -+ //1 Turn off TX -+ //Pause TX Queue -+ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); -+ //Force RX to stop TX immediately -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); -+ //1 Turn off RX -+ //Rx AGC off RegC70[0]=0, RegC7C[20]=0 -+ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); -+ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); -+ //Turn off CCA -+ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); -+ //BB Reset -+ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess -+ BBReset = ODM_Read1Byte(pDM_Odm, 0x02); -+ ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); -+ ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); -+ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); -+ //1 Leave RX idle low power -+ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); -+ //1 Fix initial gain -+ RSSI_BT = RSSI_BT_new; -+ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); -+ -+ if(rssi_ctrl == 1) // just for debug!! -+ initial_gain_psd = RSSI_BT_new; -+ else -+ initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI -+ -+ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); -+ -+ initialGainUpper = 0x54; -+ -+ RSSI_BT = initial_gain_psd; -+ //SSBT = RSSI_BT; -+ -+ //RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); -+ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); -+ -+ pDM_Odm->bDMInitialGainEnable = FALSE; -+ initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; -+ //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); -+ ODM_Write_DIG(pDM_Odm, initial_gain_psd); -+ //1 Turn off 3-wire -+ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); -+ -+ //pts value = 128, 256, 512, 1024 -+ pts = 128; -+ -+ if(pts == 128) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); -+ start_point = 64; -+ stop_point = 192; -+ } -+ else if(pts == 256) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); -+ start_point = 128; -+ stop_point = 384; -+ } -+ else if(pts == 512) -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); -+ start_point = 256; -+ stop_point = 768; -+ } -+ else -+ { -+ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); -+ start_point = 512; -+ stop_point = 1536; -+ } -+ -+ -+//3 Skip WLAN channels if WLAN busy -+ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; -+ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; -+ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); -+ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); -+ -+ PSD_skip_start=80; -+ PSD_skip_stop = 0; -+ wlan_channel = CurrentChannel & 0x0f; -+ -+ RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); -+ -+ if((curRxOkCnt+curTxOkCnt) > 1000) -+ { -+ PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; -+ PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; -+ } -+ -+ RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); -+ -+ for (n=0;n<80;n++) -+ { -+ if((n%20)==0) -+ { -+ channel = (n/20)*4 + 1; -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ switch(channel) -+ { -+ case 1: -+ case 9: -+ group_idx = 0; -+ break; -+ case 5: -+ group_idx = 2; -+ break; -+ case 13: -+ group_idx = 1; -+ break; -+ } -+ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) -+ { -+ for(i = 0; i < SYN_Length; i++) -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, channel); -+ } -+ else // DualMAC_DualPHY 2G -+ { -+ for(i = 0; i < SYN_Length; i++) -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); -+ } -+ } -+ else -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); -+ } -+ tone_idx = n%20; -+ if ((n>=PSD_skip_start) && (n PSD_report[n]) -+ PSD_report[n] = PSD_report_tmp; -+ -+ } -+ } -+ -+ PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); -+ -+ //----end -+ //1 Turn on RX -+ //Rx AGC on -+ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); -+ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); -+ //CCK on -+ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); -+ //1 Turn on TX -+ //Resume TX Queue -+ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); -+ //Turn on 3-wire -+ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); -+ //1 Restore Current Settings -+ //Resume DIG -+ pDM_Odm->bDMInitialGainEnable= TRUE; -+ //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); -+ ODM_Write_DIG(pDM_Odm,(u1Byte) initial_gain); -+ // restore originl center frequency -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) -+ { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); -+ } -+ else // DualMAC_DualPHY -+ { -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); -+ } -+ } -+ //Turn on CCA -+ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); -+ //Restore RX idle low power -+ if(RxIdleLowPwr == TRUE) -+ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); -+ -+ psd_cnt++; -+ //gPrint("psd cnt=%d\n", psd_cnt); -+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); -+ if (psd_cnt < ReScan) -+ { -+ ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms -+ } -+ else -+ { -+ psd_cnt = 0; -+ for(i=0;i<80;i++) -+ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); -+ //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); -+ -+ GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); -+ -+ } -+} -+ -+void odm_Write_RXHP( -+ IN PVOID pDM_VOID) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; -+ u4Byte currentIGI; -+ -+ if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) -+ { -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); -+ } -+ -+ if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) -+{ -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 -+ } -+ -+ if(pRX_HP_Table->RXHP_flag == 0) -+ { -+ pRX_HP_Table->Cur_IGI = 0x20; -+ } -+ else -+ { -+ currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); -+ if(currentIGI<0x50) -+ { -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); -+ ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); -+ } -+ } -+ pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; -+ pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; -+ -+} -+ -+ -+void odm_RXHP( -+ IN PVOID pDM_VOID) -+{ -+#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; -+ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; -+ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_FALSEALMCNT); -+ -+ u1Byte i, j, sum; -+ u1Byte Is40MHz; -+ s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; -+ s4Byte cur_channel; -+ u1Byte ch_map_intf_5M[17] = {0}; -+ static u4Byte FA_TH = 0; -+ static u1Byte psd_intf_flag = 0; -+ static s4Byte curRssi = 0; -+ static s4Byte preRssi = 0; -+ static u1Byte PSDTriggerCnt = 1; -+ -+ u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! -+ -+#if(DEV_BUS_TYPE == RT_USB_INTERFACE) -+ static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; -+ s8Byte curTxOkCnt, curRxOkCnt; -+ s8Byte curTPOkCnt; -+ s8Byte TP_Acc3, TP_Acc5; -+ static s8Byte TP_Buff[5] = {0}; -+ static u1Byte pre_state = 0, pre_state_flag = 0; -+ static u1Byte Intf_HighTP_flag = 0, De_counter = 16; -+ static u1Byte TP_Degrade_flag = 0; -+#endif -+ static u1Byte LatchCnt = 0; -+ -+ if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E)) -+ return; -+ //AGC RX High Power Mode is only applied on 2G band in 92D!!! -+ if(pDM_Odm->SupportICType == ODM_RTL8192D) -+ { -+ if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) -+ return; -+ } -+ -+ if(!(pDM_Odm->SupportAbility & ODM_BB_RXHP)) -+ return; -+ -+ -+ //RX HP ON/OFF -+ if(RX_HP_enable == 1) -+ pRX_HP_Table->RXHP_enable = FALSE; -+ else -+ pRX_HP_Table->RXHP_enable = TRUE; -+ -+ if(pRX_HP_Table->RXHP_enable == FALSE) -+ { -+ if(pRX_HP_Table->RXHP_flag == 1) -+ { -+ pRX_HP_Table->RXHP_flag = 0; -+ psd_intf_flag = 0; -+ } -+ return; -+ } -+ -+#if(DEV_BUS_TYPE == RT_USB_INTERFACE) -+ //2 Record current TP for USB interface -+ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; -+ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; -+ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); -+ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); -+ -+ curTPOkCnt = curTxOkCnt+curRxOkCnt; -+ TP_Buff[0] = curTPOkCnt; // current TP -+ TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); -+ TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); -+ -+ if(TP_Acc5 < 1000) -+ pRX_HP_Table->TP_Mode = Idle_Mode; -+ else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) -+ pRX_HP_Table->TP_Mode = Low_TP_Mode; -+ else -+ pRX_HP_Table->TP_Mode = High_TP_Mode; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); -+ // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. -+ // When LatchCnt = 0, we would Get PSD result. -+ if(TP_Degrade_flag == 1) -+ { -+ LatchCnt--; -+ if(LatchCnt == 0) -+ { -+ TP_Degrade_flag = 0; -+ } -+ } -+ // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 -+ // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. -+ if(Intf_HighTP_flag == 1) -+ { -+ De_counter--; -+ if(De_counter == 0) -+ { -+ Intf_HighTP_flag = 0; -+ psd_intf_flag = 0; -+ } -+ } -+#endif -+ -+ //2 AGC RX High Power Mode by PSD only applied to STA Mode -+ //3 NOT applied 1. Ad Hoc Mode. -+ //3 NOT applied 2. AP Mode -+ if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) -+ { -+ Is40MHz = *(pDM_Odm->pBandWidth); -+ curRssi = pDM_Odm->RSSI_Min; -+ cur_channel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; -+ -+ /* check illegal channel and bandwidth */ -+ if (Is40MHz && ((cur_channel < 3) || (cur_channel > 12))) { -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("illegal channel setting, 40MHz channel = %d\n", cur_channel)); -+ return; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); -+ //2 PSD function would be triggered -+ //3 1. Every 4 sec for PCIE -+ //3 2. Before TP Mode (Idle TP<4kbps) for USB -+ //3 3. After TP Mode (High TP) for USB -+ if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process -+ { -+#if (DEV_BUS_TYPE == RT_USB_INTERFACE) -+ //2 Before TP Mode ==> PSD would be trigger every 4 sec -+ if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps -+ { -+#endif -+ if(PSDTriggerCnt == 1) -+ { -+ odm_PSD_RXHP(pDM_Odm); -+ pRX_HP_Table->PSD_func_trigger = 1; -+ PSDTriggerCnt = 0; -+ } -+ else -+ { -+ PSDTriggerCnt++; -+ } -+#if(DEV_BUS_TYPE == RT_USB_INTERFACE) -+ } -+ //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function -+ if(pRX_HP_Table->TP_Mode == High_TP_Mode) -+ { -+ if((pre_state_flag == 0)&&(LatchCnt == 0)) -+ { -+ // TP var < 5% -+ if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) -+ { -+ pre_state++; -+ if(pre_state == 3) // hit pre_state condition => consecutive 3 times -+ { -+ pre_state_flag = 1; -+ pre_state = 0; -+ } -+ -+ } -+ else -+ { -+ pre_state = 0; -+ } -+ } -+ //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% -+ if(pre_state_flag == 1) -+ { -+ if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% -+ { -+ odm_PSD_RXHP(pDM_Odm); -+ pRX_HP_Table->PSD_func_trigger = 1; -+ TP_Degrade_flag = 1; -+ LatchCnt = 2; -+ pre_state_flag = 0; -+ } -+ else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) -+ { -+ odm_PSD_RXHP(pDM_Odm); -+ pRX_HP_Table->PSD_func_trigger = 1; -+ TP_Degrade_flag = 1; -+ LatchCnt = 2; -+ pre_state_flag = 0; -+ } -+ else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) -+ { -+ odm_PSD_RXHP(pDM_Odm); -+ pRX_HP_Table->PSD_func_trigger = 1; -+ TP_Degrade_flag = 1; -+ LatchCnt = 2; -+ pre_state_flag = 0; -+ } -+ } -+ } -+#endif -+} -+ -+#if (DEV_BUS_TYPE == RT_USB_INTERFACE) -+ for (i=0;i<4;i++) -+ { -+ TP_Buff[4-i] = TP_Buff[3-i]; -+ } -+#endif -+ //2 Update PSD bitmap according to PSD report -+ if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) -+ { -+ //2 Separate 80M bandwidth into 16 group with smaller 5M BW. -+ for (i = 0 ; i < 16 ; i++) -+ { -+ sum = 0; -+ for(j = 0; j < 5 ; j++) -+ sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; -+ -+ if(sum < 5) -+ { -+ ch_map_intf_5M[i] = 1; // interference flag -+ } -+ } -+ //=============just for debug========================= -+ //for(i=0;i<16;i++) -+ //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); -+ //=============================================== -+ //2 Mask target channel 5M index -+ for(i = 0; i < (4+4*Is40MHz) ; i++) -+ { -+ ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; -+ } -+ -+ psd_intf_flag = 0; -+ for(i = 0; i < 16; i++) -+ { -+ if(ch_map_intf_5M[i] == 1) -+ { -+ psd_intf_flag = 1; // interference is detected!!! -+ break; -+ } -+ } -+ -+#if (DEV_BUS_TYPE == RT_USB_INTERFACE) -+ if(pRX_HP_Table->TP_Mode!=Idle_Mode) -+ { -+ if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 -+ { -+ Intf_HighTP_flag = 1; -+ De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 -+ } -+ } -+#endif -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); -+ //2 Distance between target channel and interference -+ for(i = 0; i < 16; i++) -+ { -+ if(ch_map_intf_5M[i] == 1) -+ { -+ Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); -+ if(Intf_diff_idx < MIN_Intf_diff_idx) -+ MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target -+ } -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); -+ //2 Choose False Alarm Threshold -+ switch (MIN_Intf_diff_idx){ -+ case 0: -+ case 1: -+ case 2: -+ case 3: -+ FA_TH = FA_RXHP_TH1; -+ break; -+ case 4: // CH5 -+ case 5: // CH6 -+ FA_TH = FA_RXHP_TH2; -+ break; -+ case 6: // CH7 -+ case 7: // CH8 -+ FA_TH = FA_RXHP_TH3; -+ break; -+ case 8: // CH9 -+ case 9: //CH10 -+ FA_TH = FA_RXHP_TH4; -+ break; -+ case 10: -+ case 11: -+ case 12: -+ case 13: -+ case 14: -+ case 15: -+ FA_TH = FA_RXHP_TH5; -+ break; -+ } -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); -+ pRX_HP_Table->PSD_func_trigger = 0; -+ } -+ //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode -+ if(pRX_HP_Table->RXHP_flag == 1) -+ { -+ if ((curRssi > 80)&&(preRssi < 80)) -+ { -+ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; -+ } -+ else if ((curRssi < 80)&&(preRssi > 80)) -+ { -+ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; -+ } -+ else if ((curRssi > 72)&&(preRssi < 72)) -+ { -+ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; -+ } -+ else if ((curRssi < 72)&&( preRssi > 72)) -+ { -+ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; -+ } -+ else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode -+ { -+ pRX_HP_Table->Cur_pw_th = pw_th_10dB; -+ pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode -+ psd_intf_flag = 0; -+ } -+ } -+ else // pRX_HP_Table->RXHP_flag == 0 -+ { -+ //1 Decide whether to enter AGC RX High Power Mode -+ if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && -+ (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) -+ { -+ if (curRssi > 80) -+ { -+ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; -+ } -+ else if (curRssi > 72) -+ { -+ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; -+ } -+ else -+ { -+ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; -+ } -+ pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 -+ pRX_HP_Table->First_time_enter = TRUE; -+ pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode -+ } -+ } -+ preRssi = curRssi; -+ odm_Write_RXHP(pDM_Odm); -+ } -+#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) -+} -+ -+ -+VOID -+odm_PSD_RXHPCallback( -+ PRT_TIMER pTimer -+) -+{ -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; -+ -+#if DEV_BUS_TYPE==RT_PCI_INTERFACE -+ #if USE_WORKITEM -+ ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); -+ #else -+ odm_PSD_RXHP(pDM_Odm); -+ #endif -+#else -+ ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); -+#endif -+ -+ } -+ -+VOID -+odm_PSD_RXHPWorkitemCallback( -+ IN PVOID pContext -+ ) -+{ -+ PADAPTER pAdapter = (PADAPTER)pContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ odm_PSD_RXHP(pDM_Odm); -+} -+ -+#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD ++#define MODE_40M 0 //0:20M, 1:40M ++#define PSD_TH2 3 ++#define PSD_CHMIN 20 // Minimum channel number for BT AFH ++#define SIR_STEP_SIZE 3 ++#define Smooth_Size_1 5 ++#define Smooth_TH_1 3 ++#define Smooth_Size_2 10 ++#define Smooth_TH_2 4 ++#define Smooth_Size_3 20 ++#define Smooth_TH_3 4 ++#define Smooth_Step_Size 5 ++#define Adaptive_SIR 1 ++#define SCAN_INTERVAL 1500 //ms ++#define SYN_Length 5 // for 92D ++ ++#define LNA_Low_Gain_1 0x64 ++#define LNA_Low_Gain_2 0x5A ++#define LNA_Low_Gain_3 0x58 ++ ++#define pw_th_10dB 0x0 ++#define pw_th_16dB 0x3 ++ ++#define FA_RXHP_TH1 5000 ++#define FA_RXHP_TH2 1500 ++#define FA_RXHP_TH3 800 ++#define FA_RXHP_TH4 600 ++#define FA_RXHP_TH5 500 ++ ++#define Idle_Mode 0 ++#define High_TP_Mode 1 ++#define Low_TP_Mode 2 ++ ++ ++VOID ++odm_PSDMonitorInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PSD Monitor Setting ++ //Which path in ADC/DAC is turnned on for PSD: both I/Q ++ ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); ++ //Ageraged number: 8 ++ ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); ++ pDM_Odm->bPSDinProcess = FALSE; ++ pDM_Odm->bUserAssignLevel = FALSE; ++ pDM_Odm->bPSDactive = FALSE; ++ //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit ++ //Set Debug Port ++ //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); ++ //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD ++ //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan ++ //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval ++ ++ //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms ++#endif ++} ++ ++VOID ++PatchDCTone( ++ IN PVOID pDM_VOID, ++ pu4Byte PSD_report, ++ u1Byte initial_gain_psd ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PADAPTER pAdapter; ++ ++ u4Byte psd_report; ++ ++ //2 Switch to CH11 to patch CH9 and CH13 DC tone ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 11); ++ ++ if(pDM_Odm->SupportICType== ODM_RTL8192D) ++ { ++ if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 11); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x77C1A); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x41289); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01840); ++ } ++ else ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x77C1A); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x41289); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01840); ++ } ++ } ++ ++ //Ch9 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); ++ PSD_report[50] = psd_report; ++ //Ch13 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); ++ PSD_report[70] = psd_report; ++ ++ //2 Switch to CH3 to patch CH1 and CH5 DC tone ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 3); ++ ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8192D) ++ { ++ if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 3); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x07C1A); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x61289); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01C41); ++ } ++ else ++ { ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x07C1A); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x61289); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01C41); ++ } ++ } ++ ++ //Ch1 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); ++ PSD_report[10] = psd_report; ++ //Ch5 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); ++ PSD_report[30] = psd_report; ++ ++} ++ ++ ++VOID ++GoodChannelDecision( ++ IN PVOID pDM_VOID, ++ pu4Byte PSD_report, ++ pu1Byte PSD_bitmap, ++ u1Byte RSSI_BT, ++ pu1Byte PSD_bitmap_memory) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen ++ s4Byte TH1= RSSI_BT+0x14; ++ s4Byte TH2 = RSSI_BT+85; ++ //u2Byte TH3; ++// s4Byte RegB34; ++ u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; ++ //u1Byte psd_bit; ++ u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; ++ int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; ++ ++// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; ++ ++ if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) ++ { ++ TH1 = RSSI_BT + 0x14; ++ } ++ ++ Smooth_size[0]=Smooth_Size_1; ++ Smooth_size[1]=Smooth_Size_2; ++ Smooth_size[2]=Smooth_Size_3; ++ Smooth_TH[0]=Smooth_TH_1; ++ Smooth_TH[1]=Smooth_TH_2; ++ Smooth_TH[2]=Smooth_TH_3; ++ Smooth_Interval[0]=16; ++ Smooth_Interval[1]=15; ++ Smooth_Interval[2]=13; ++ good_cnt = 0; ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ //2 Threshold ++ ++ if(RSSI_BT >=41) ++ TH1 = 113; ++ else if(RSSI_BT >=38) // >= -15dBm ++ TH1 = 105; //0x69 ++ else if((RSSI_BT >=33)&(RSSI_BT <38)) ++ TH1 = 99+(RSSI_BT-33); //0x63 ++ else if((RSSI_BT >=26)&(RSSI_BT<33)) ++ TH1 = 99-(33-RSSI_BT)+2; //0x5e ++ else if((RSSI_BT >=24)&(RSSI_BT<26)) ++ TH1 = 88-((RSSI_BT-24)*3); //0x58 ++ else if((RSSI_BT >=18)&(RSSI_BT<24)) ++ TH1 = 77+((RSSI_BT-18)*2); ++ else if((RSSI_BT >=14)&(RSSI_BT<18)) ++ TH1 = 63+((RSSI_BT-14)*2); ++ else if((RSSI_BT >=8)&(RSSI_BT<14)) ++ TH1 = 58+((RSSI_BT-8)*2); ++ else if((RSSI_BT >=3)&(RSSI_BT<8)) ++ TH1 = 52+(RSSI_BT-3); ++ else ++ TH1 = 51; ++ } ++ ++ for (i = 0; i< 10; i++) ++ PSD_bitmap[i] = 0; ++ ++ ++ // Add By Gary ++ for (i=0; i<80; i++) ++ pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; ++ // End ++ ++ ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ TH1 =TH1-SIR_STEP_SIZE; ++ } ++ while (good_cnt < PSD_CHMIN) ++ { ++ good_cnt = 0; ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ if(TH1 ==TH2) ++ break; ++ if((TH1+SIR_STEP_SIZE) < TH2) ++ TH1 += SIR_STEP_SIZE; ++ else ++ TH1 = TH2; ++ } ++ else ++ { ++ if(TH1==(RSSI_BT+0x1E)) ++ break; ++ if((TH1+2) < (RSSI_BT+0x1E)) ++ TH1+=3; ++ else ++ TH1 = RSSI_BT+0x1E; ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); ++ ++ for (i = 0; i< 80; i++) ++ { ++ if((s4Byte)(PSD_report[i]) < TH1) ++ { ++ byte_idx = i / 8; ++ bit_idx = i -8*byte_idx; ++ bitmap = PSD_bitmap[byte_idx]; ++ PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); ++ } ++ } ++ ++#if DBG ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); ++ for(n=0;n<10;n++) ++ { ++ //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); ++ for (i = 0; i<8; i++) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); ++ } ++#endif ++ ++ //1 Start of smoothing function ++ ++ for (j=0;j<3;j++) ++ { ++ start_byte_idx=0; ++ start_bit_idx=0; ++ for(n=0; n 7 ) ++ { ++ start_byte_idx= start_byte_idx+start_bit_idx/8; ++ start_bit_idx = start_bit_idx%8; ++ } ++ } ++ ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); ++ for(n=0;n<10;n++) ++ { ++ for (i = 0; i<8; i++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); ++ ++ if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary ++ { ++ pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; ++ } // ------end by Gary ++ } ++ } ++ ++ } ++ ++ ++ good_cnt = 0; ++ for ( i = 0; i < 10; i++) ++ { ++ for (n = 0; n < 8; n++) ++ if((PSD_bitmap[i]& BIT(n)) != 0) ++ good_cnt++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, ODM_COMP_PSD,("PSD: good channel cnt = %u",good_cnt)); ++ } ++ ++ //RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); ++ for (i = 0; i <10; i++) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); ++/* ++ //Update bitmap memory ++ for(i = 0; i < 80; i++) ++ { ++ byte_idx = i / 8; ++ bit_idx = i -8*byte_idx; ++ psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; ++ bitmap = PSD_bitmap_memory[i]; ++ PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; ++ } ++*/ ++} ++ ++ ++ ++VOID ++odm_PSD_Monitor( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ unsigned int pts, start_point, stop_point; ++ u1Byte initial_gain ; ++ static u1Byte PSD_bitmap_memory[80], init_memory = 0; ++ static u1Byte psd_cnt=0; ++ static u4Byte PSD_report[80], PSD_report_tmp; ++ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; ++ u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; ++ static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; ++ u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, ++ 0,3,6,10,13,16,19,22,26,29}; ++ u1Byte n, i, channel, BBReset,tone_idx; ++ u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; ++ s4Byte PSD_skip_start, PSD_skip_stop; ++ u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; ++ u4Byte ReScan, Interval, Is40MHz; ++ u8Byte curTxOkCnt, curRxOkCnt; ++ int cur_byte_idx, cur_bit_idx; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ ++ if(*pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("pbDriverIsGoingToPnpSetPowerSleep!!!!!!!!!!!!!!!\n")); ++ return; ++ } ++ ++ ++ if( (*(pDM_Odm->pbScanInProcess)) || ++ pDM_Odm->bLinkInProcess) ++ { ++ if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) ++ { ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 1500); //ms ++ //psd_cnt=0; ++ } ++ return; ++ } ++ ++ if(pDM_Odm->bBtHsOperation) ++ { ++ ReScan = 1; ++ Interval = SCAN_INTERVAL; ++ } ++ else ++ { ++ ReScan = PSD_RESCAN; ++ Interval = SCAN_INTERVAL; ++ } ++ ++ //1 Initialization ++ if(init_memory == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); ++ for(i = 0; i < 80; i++) ++ PSD_bitmap_memory[i] = 0xFF; // channel is always good ++ init_memory = 1; ++ } ++ if(psd_cnt == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); ++ for(i = 0; i < 80; i++) ++ PSD_report[i] = 0; ++ } ++ ++ //1 Backup Current Settings ++ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); ++/* ++ if(pDM_Odm->SupportICType==ODM_RTL8192D) ++ { ++ //2 Record Current synthesizer parameters based on current channel ++ if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) ++ { ++ SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, bMaskDWord); ++ } ++ else // DualMAC_DualPHY 2G ++ { ++ SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, bMaskDWord); ++ } ++ } ++*/ ++ //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); ++ RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); ++ ++ //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; ++ RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; ++ ++ //2??? ++ if(CHNL_RUN_ABOVE_40MHZ(pMgntInfo)) ++ Is40MHz = TRUE; ++ else ++ Is40MHz = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); ++ //1 Turn off CCK ++ //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); ++ //1 Turn off TX ++ //Pause TX Queue ++ //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); ++ ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); ++ ++ //Force RX to stop TX immediately ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); ++ //1 Turn off RX ++ //Rx AGC off RegC70[0]=0, RegC7C[20]=0 ++ //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); ++ //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); ++ ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); ++ ++ ++ //Turn off CCA ++ //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); ++ ++ //BB Reset ++ //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); ++ BBReset = ODM_Read1Byte(pDM_Odm, 0x02); ++ ++ //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); ++ //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); ++ ++ //1 Leave RX idle low power ++ //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); ++ ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); ++ //1 Fix initial gain ++ //if (IS_HARDWARE_TYPE_8723AE(Adapter)) ++ //RSSI_BT = pHalData->RSSI_BT; ++ //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary ++ // RSSI_BT = RSSI_BT_new; ++ ++ if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) ++ RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT ++ ++ if(RSSI_BT>=47) ++ RSSI_BT=47; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ //Neil add--2011--10--12 ++ //2 Initial Gain index ++ if(RSSI_BT >=35) // >= -15dBm ++ initial_gain_psd = RSSI_BT*2; ++ else if((RSSI_BT >=33)&(RSSI_BT<35)) ++ initial_gain_psd = RSSI_BT*2+6; ++ else if((RSSI_BT >=24)&(RSSI_BT<33)) ++ initial_gain_psd = 70-(33-RSSI_BT); ++ else if((RSSI_BT >=19)&(RSSI_BT<24)) ++ initial_gain_psd = 64-((24-RSSI_BT)*4); ++ else if((RSSI_BT >=14)&(RSSI_BT<19)) ++ initial_gain_psd = 44-((18-RSSI_BT)*2); ++ else if((RSSI_BT >=8)&(RSSI_BT<14)) ++ initial_gain_psd = 35-(14-RSSI_BT); ++ else ++ initial_gain_psd = 0x1B; ++ } ++ else ++ { ++ ++ //need to do ++ initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI ++ //} ++ } ++ //if(RSSI_BT<0x17) ++ // RSSI_BT +=3; ++ //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ //initialGainUpper = 0x5E; //Modify by neil chen ++ ++ if(pDM_Odm->bUserAssignLevel) ++ { ++ pDM_Odm->bUserAssignLevel = FALSE; ++ initialGainUpper = 0x7f; ++ } ++ else ++ { ++ initialGainUpper = 0x5E; ++ } ++ ++ /* ++ if (initial_gain_psd < 0x1a) ++ initial_gain_psd = 0x1a; ++ if (initial_gain_psd > initialGainUpper) ++ initial_gain_psd = initialGainUpper; ++ */ ++ ++ //if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ SSBT = RSSI_BT * 2 +0x3E; ++ ++ ++ //if(IS_HARDWARE_TYPE_8723AE(Adapter)) ++ // SSBT = RSSI_BT * 2 +0x3E; ++ //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary ++ //{ ++ // RSSI_BT = initial_gain_psd; ++ // SSBT = RSSI_BT; ++ //} ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); ++ //DbgPrint("PSD: SSBT= %d", SSBT); ++ //need to do ++ pDM_Odm->bDMInitialGainEnable = FALSE; ++ initial_gain =(u1Byte) (ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F); ++ ++ // make sure the initial gain is under the correct range. ++ //initial_gain_psd &= 0x7f; ++ ODM_Write_DIG(pDM_Odm, initial_gain_psd); ++ //1 Turn off 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); ++ ++ //pts value = 128, 256, 512, 1024 ++ pts = 128; ++ ++ if(pts == 128) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); ++ start_point = 64; ++ stop_point = 192; ++ } ++ else if(pts == 256) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); ++ start_point = 128; ++ stop_point = 384; ++ } ++ else if(pts == 512) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); ++ start_point = 256; ++ stop_point = 768; ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); ++ start_point = 512; ++ stop_point = 1536; ++ } ++ ++ ++//3 Skip WLAN channels if WLAN busy ++ ++ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; ++ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; ++ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); ++ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); ++ ++ PSD_skip_start=80; ++ PSD_skip_stop = 0; ++ wlan_channel = CurrentChannel & 0x0f; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ if(pDM_Odm->bBtHsOperation) ++ { ++ if(pDM_Odm->bLinked) ++ { ++ if(Is40MHz) ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; ++ } ++ else ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; ++ } ++ } ++ else ++ { ++ // mask for 40MHz ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; ++ } ++ if(PSD_skip_start < 0) ++ PSD_skip_start = 0; ++ if(PSD_skip_stop >80) ++ PSD_skip_stop = 80; ++ } ++ else ++ { ++ if((curRxOkCnt+curTxOkCnt) > 5) ++ { ++ if(Is40MHz) ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; ++ } ++ else ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; ++ } ++ ++ if(PSD_skip_start < 0) ++ PSD_skip_start = 0; ++ if(PSD_skip_stop >80) ++ PSD_skip_stop = 80; ++ } ++ } ++ } ++#if 0 ++ else ++ { ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++ PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; ++ PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; ++ } ++ } ++#endif //Reove RXHP Issue ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); ++ ++ for (n=0;n<80;n++) ++ { ++ if((n%20)==0) ++ { ++ channel = (n/20)*4 + 1; ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ } ++ tone_idx = n%20; ++ if ((n>=PSD_skip_start) && (n PSD_report[n]) ++ PSD_report[n] = PSD_report_tmp; ++ ++ } ++ } ++ ++ PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); ++ ++ //----end ++ //1 Turn on RX ++ //Rx AGC on ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); ++ //CCK on ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); ++ //1 Turn on TX ++ //Resume TX Queue ++ ++ ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); ++ //Turn on 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); ++ //1 Restore Current Settings ++ //Resume DIG ++ pDM_Odm->bDMInitialGainEnable = TRUE; ++ ++ ODM_Write_DIG(pDM_Odm, initial_gain); ++ ++ // restore originl center frequency ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); ++ ++ //Turn on CCA ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); ++ //Restore RX idle low power ++ if(RxIdleLowPwr == TRUE) ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); ++ ++ psd_cnt++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); ++ if (psd_cnt < ReScan) ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); ++ else ++ { ++ psd_cnt = 0; ++ for(i=0;i<80;i++) ++ //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); ++ ++ ++ GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ cur_byte_idx=0; ++ cur_bit_idx=0; ++ ++ //2 Restore H2C PSD Data to Last Data ++ H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; ++ H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; ++ H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; ++ H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; ++ H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; ++ ++ ++ //2 Translate 80bit channel map to 40bit channel ++ for ( i=0;i<5;i++) ++ { ++ for(n=0;n<8;n++) ++ { ++ cur_byte_idx = i*2 + n/4; ++ cur_bit_idx = (n%4)*2; ++ if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) ++ H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); ++ } ++ ++ //3 To Compare the difference ++ for ( i=0;i<5;i++) ++ { ++ if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) ++ { ++ FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); ++ break; ++ } ++ else ++ { ++ if(i==5) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Not need to Update\n")); ++ } ++ } ++ if(pDM_Odm->bBtHsOperation) ++ { ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 10000); ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); ++ } ++ else ++ { ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 1500); ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); ++ } ++ } ++ } ++} ++/* ++//Neil for Get BT RSSI ++// Be Triggered by BT C2H CMD ++VOID ++ODM_PSDGetRSSI( ++ IN u1Byte RSSI_BT) ++{ ++ ++ ++} ++ ++*/ ++ ++VOID ++ODM_PSDMonitor( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //if(IS_HARDWARE_TYPE_8723AE(Adapter)) ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type ++ { ++ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) ++ { ++ if(!pDM_Odm->bBtEnabled) //need to check upper layer connection ++ { ++ pDM_Odm->bPSDactive=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); ++ //{ ++ pDM_Odm->bPSDinProcess = TRUE; ++ pDM_Odm->bPSDactive=TRUE; ++ odm_PSD_Monitor(pDM_Odm); ++ pDM_Odm->bPSDinProcess = FALSE; ++ } ++ } ++ ++} ++VOID ++odm_PSDMonitorCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); ++} ++ ++VOID ++odm_PSDMonitorWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_PSDMonitor(pDM_Odm); ++} ++ ++ ++ //cosa debug tool need to modify ++ ++VOID ++ODM_PSDDbgControl( ++ IN PADAPTER Adapter, ++ IN u4Byte mode, ++ IN u4Byte btRssi ++ ) ++{ ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); ++ if(mode) ++ { ++ pDM_Odm->RSSI_BT = (u1Byte)btRssi; ++ pDM_Odm->bUserAssignLevel = TRUE; ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms ++ } ++ else ++ { ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); ++ } ++#endif ++} ++ ++ ++//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ ++void odm_RXHPInit( ++ IN PVOID pDM_VOID) ++{ ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ u1Byte index; ++ ++ pRX_HP_Table->RXHP_enable = TRUE; ++ pRX_HP_Table->RXHP_flag = 0; ++ pRX_HP_Table->PSD_func_trigger = 0; ++ pRX_HP_Table->Pre_IGI = 0x20; ++ pRX_HP_Table->Cur_IGI = 0x20; ++ pRX_HP_Table->Cur_pw_th = pw_th_10dB; ++ pRX_HP_Table->Pre_pw_th = pw_th_10dB; ++ for(index=0; index<80; index++) ++ pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; ++ ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ pRX_HP_Table->TP_Mode = Idle_Mode; ++#endif ++#endif ++} ++ ++VOID ++odm_PSD_RXHP( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ unsigned int pts, start_point, stop_point, initial_gain ; ++ static u1Byte PSD_bitmap_memory[80], init_memory = 0; ++ static u1Byte psd_cnt=0; ++ static u4Byte PSD_report[80], PSD_report_tmp; ++ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; ++ u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, ++ 0,3,6,10,13,16,19,22,26,29}; ++ u1Byte n, i, channel, BBReset,tone_idx; ++ u1Byte PSD_bitmap[10]/*, SSBT=0*/,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; ++ s4Byte PSD_skip_start, PSD_skip_stop; ++ u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; ++ u4Byte ReScan, Interval, Is40MHz; ++ u8Byte curTxOkCnt, curRxOkCnt; ++ //--------------2G band synthesizer for 92D switch RF channel using----------------- ++ u1Byte group_idx=0; ++ u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; ++ u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel ++ u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} ++ {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 ++ {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 ++ //--------------------- Add by Gary for Debug setting ---------------------- ++ u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); ++ u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); ++ //--------------------------------------------------------------------- ++ ++ if(pMgntInfo->bScanInProgress) ++ { ++ return; ++ } ++ ++ ReScan = PSD_RESCAN; ++ Interval = SCAN_INTERVAL; ++ ++ ++ //1 Initialization ++ if(init_memory == 0) ++ { ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); ++ for(i = 0; i < 80; i++) ++ PSD_bitmap_memory[i] = 0xFF; // channel is always good ++ init_memory = 1; ++ } ++ if(psd_cnt == 0) ++ { ++ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); ++ for(i = 0; i < 80; i++) ++ PSD_report[i] = 0; ++ } ++ ++ //1 Backup Current Settings ++ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ //2 Record Current synthesizer parameters based on current channel ++ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) ++ { ++ SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord); ++ } ++ else // DualMAC_DualPHY 2G ++ { ++ SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord); ++ } ++ } ++ RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); ++ RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; ++ Is40MHz = *(pDM_Odm->pBandWidth); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); ++ //1 Turn off CCK ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); ++ //1 Turn off TX ++ //Pause TX Queue ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); ++ //Force RX to stop TX immediately ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); ++ //1 Turn off RX ++ //Rx AGC off RegC70[0]=0, RegC7C[20]=0 ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); ++ //Turn off CCA ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); ++ //BB Reset ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess ++ BBReset = ODM_Read1Byte(pDM_Odm, 0x02); ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); ++ //1 Leave RX idle low power ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); ++ //1 Fix initial gain ++ RSSI_BT = RSSI_BT_new; ++ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ if(rssi_ctrl == 1) // just for debug!! ++ initial_gain_psd = RSSI_BT_new; ++ else ++ initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI ++ ++ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ initialGainUpper = 0x54; ++ ++ RSSI_BT = initial_gain_psd; ++ //SSBT = RSSI_BT; ++ ++ //RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); ++ ++ pDM_Odm->bDMInitialGainEnable = FALSE; ++ initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; ++ //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); ++ ODM_Write_DIG(pDM_Odm, initial_gain_psd); ++ //1 Turn off 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); ++ ++ //pts value = 128, 256, 512, 1024 ++ pts = 128; ++ ++ if(pts == 128) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); ++ start_point = 64; ++ stop_point = 192; ++ } ++ else if(pts == 256) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); ++ start_point = 128; ++ stop_point = 384; ++ } ++ else if(pts == 512) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); ++ start_point = 256; ++ stop_point = 768; ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); ++ start_point = 512; ++ stop_point = 1536; ++ } ++ ++ ++//3 Skip WLAN channels if WLAN busy ++ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; ++ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; ++ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); ++ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); ++ ++ PSD_skip_start=80; ++ PSD_skip_stop = 0; ++ wlan_channel = CurrentChannel & 0x0f; ++ ++ RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); ++ ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++ PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; ++ PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; ++ } ++ ++ RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); ++ ++ for (n=0;n<80;n++) ++ { ++ if((n%20)==0) ++ { ++ channel = (n/20)*4 + 1; ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ switch(channel) ++ { ++ case 1: ++ case 9: ++ group_idx = 0; ++ break; ++ case 5: ++ group_idx = 2; ++ break; ++ case 13: ++ group_idx = 1; ++ break; ++ } ++ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) ++ { ++ for(i = 0; i < SYN_Length; i++) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, channel); ++ } ++ else // DualMAC_DualPHY 2G ++ { ++ for(i = 0; i < SYN_Length; i++) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ } ++ } ++ else ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ } ++ tone_idx = n%20; ++ if ((n>=PSD_skip_start) && (n PSD_report[n]) ++ PSD_report[n] = PSD_report_tmp; ++ ++ } ++ } ++ ++ PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); ++ ++ //----end ++ //1 Turn on RX ++ //Rx AGC on ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); ++ //CCK on ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); ++ //1 Turn on TX ++ //Resume TX Queue ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); ++ //Turn on 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); ++ //1 Restore Current Settings ++ //Resume DIG ++ pDM_Odm->bDMInitialGainEnable= TRUE; ++ //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); ++ ODM_Write_DIG(pDM_Odm,(u1Byte) initial_gain); ++ // restore originl center frequency ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); ++ } ++ else // DualMAC_DualPHY ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); ++ } ++ } ++ //Turn on CCA ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); ++ //Restore RX idle low power ++ if(RxIdleLowPwr == TRUE) ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); ++ ++ psd_cnt++; ++ //gPrint("psd cnt=%d\n", psd_cnt); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); ++ if (psd_cnt < ReScan) ++ { ++ ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms ++ } ++ else ++ { ++ psd_cnt = 0; ++ for(i=0;i<80;i++) ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); ++ //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); ++ ++ GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); ++ ++ } ++} ++ ++void odm_Write_RXHP( ++ IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ u4Byte currentIGI; ++ ++ if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) ++ { ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ } ++ ++ if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) ++{ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 ++ } ++ ++ if(pRX_HP_Table->RXHP_flag == 0) ++ { ++ pRX_HP_Table->Cur_IGI = 0x20; ++ } ++ else ++ { ++ currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); ++ if(currentIGI<0x50) ++ { ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ } ++ } ++ pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; ++ pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; ++ ++} ++ ++ ++void odm_RXHP( ++ IN PVOID pDM_VOID) ++{ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_FALSEALMCNT); ++ ++ u1Byte i, j, sum; ++ u1Byte Is40MHz; ++ s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; ++ s4Byte cur_channel; ++ u1Byte ch_map_intf_5M[17] = {0}; ++ static u4Byte FA_TH = 0; ++ static u1Byte psd_intf_flag = 0; ++ static s4Byte curRssi = 0; ++ static s4Byte preRssi = 0; ++ static u1Byte PSDTriggerCnt = 1; ++ ++ u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! ++ ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; ++ s8Byte curTxOkCnt, curRxOkCnt; ++ s8Byte curTPOkCnt; ++ s8Byte TP_Acc3, TP_Acc5; ++ static s8Byte TP_Buff[5] = {0}; ++ static u1Byte pre_state = 0, pre_state_flag = 0; ++ static u1Byte Intf_HighTP_flag = 0, De_counter = 16; ++ static u1Byte TP_Degrade_flag = 0; ++#endif ++ static u1Byte LatchCnt = 0; ++ ++ if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E)) ++ return; ++ //AGC RX High Power Mode is only applied on 2G band in 92D!!! ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) ++ return; ++ } ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_RXHP)) ++ return; ++ ++ ++ //RX HP ON/OFF ++ if(RX_HP_enable == 1) ++ pRX_HP_Table->RXHP_enable = FALSE; ++ else ++ pRX_HP_Table->RXHP_enable = TRUE; ++ ++ if(pRX_HP_Table->RXHP_enable == FALSE) ++ { ++ if(pRX_HP_Table->RXHP_flag == 1) ++ { ++ pRX_HP_Table->RXHP_flag = 0; ++ psd_intf_flag = 0; ++ } ++ return; ++ } ++ ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ //2 Record current TP for USB interface ++ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; ++ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; ++ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); ++ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); ++ ++ curTPOkCnt = curTxOkCnt+curRxOkCnt; ++ TP_Buff[0] = curTPOkCnt; // current TP ++ TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); ++ TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); ++ ++ if(TP_Acc5 < 1000) ++ pRX_HP_Table->TP_Mode = Idle_Mode; ++ else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) ++ pRX_HP_Table->TP_Mode = Low_TP_Mode; ++ else ++ pRX_HP_Table->TP_Mode = High_TP_Mode; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); ++ // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. ++ // When LatchCnt = 0, we would Get PSD result. ++ if(TP_Degrade_flag == 1) ++ { ++ LatchCnt--; ++ if(LatchCnt == 0) ++ { ++ TP_Degrade_flag = 0; ++ } ++ } ++ // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 ++ // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. ++ if(Intf_HighTP_flag == 1) ++ { ++ De_counter--; ++ if(De_counter == 0) ++ { ++ Intf_HighTP_flag = 0; ++ psd_intf_flag = 0; ++ } ++ } ++#endif ++ ++ //2 AGC RX High Power Mode by PSD only applied to STA Mode ++ //3 NOT applied 1. Ad Hoc Mode. ++ //3 NOT applied 2. AP Mode ++ if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) ++ { ++ Is40MHz = *(pDM_Odm->pBandWidth); ++ curRssi = pDM_Odm->RSSI_Min; ++ cur_channel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; ++ ++ /* check illegal channel and bandwidth */ ++ if (Is40MHz && ((cur_channel < 3) || (cur_channel > 12))) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("illegal channel setting, 40MHz channel = %d\n", cur_channel)); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); ++ //2 PSD function would be triggered ++ //3 1. Every 4 sec for PCIE ++ //3 2. Before TP Mode (Idle TP<4kbps) for USB ++ //3 3. After TP Mode (High TP) for USB ++ if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process ++ { ++#if (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ //2 Before TP Mode ==> PSD would be trigger every 4 sec ++ if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps ++ { ++#endif ++ if(PSDTriggerCnt == 1) ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ PSDTriggerCnt = 0; ++ } ++ else ++ { ++ PSDTriggerCnt++; ++ } ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ } ++ //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function ++ if(pRX_HP_Table->TP_Mode == High_TP_Mode) ++ { ++ if((pre_state_flag == 0)&&(LatchCnt == 0)) ++ { ++ // TP var < 5% ++ if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) ++ { ++ pre_state++; ++ if(pre_state == 3) // hit pre_state condition => consecutive 3 times ++ { ++ pre_state_flag = 1; ++ pre_state = 0; ++ } ++ ++ } ++ else ++ { ++ pre_state = 0; ++ } ++ } ++ //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% ++ if(pre_state_flag == 1) ++ { ++ if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ TP_Degrade_flag = 1; ++ LatchCnt = 2; ++ pre_state_flag = 0; ++ } ++ else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ TP_Degrade_flag = 1; ++ LatchCnt = 2; ++ pre_state_flag = 0; ++ } ++ else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ TP_Degrade_flag = 1; ++ LatchCnt = 2; ++ pre_state_flag = 0; ++ } ++ } ++ } ++#endif ++} ++ ++#if (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ for (i=0;i<4;i++) ++ { ++ TP_Buff[4-i] = TP_Buff[3-i]; ++ } ++#endif ++ //2 Update PSD bitmap according to PSD report ++ if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) ++ { ++ //2 Separate 80M bandwidth into 16 group with smaller 5M BW. ++ for (i = 0 ; i < 16 ; i++) ++ { ++ sum = 0; ++ for(j = 0; j < 5 ; j++) ++ sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; ++ ++ if(sum < 5) ++ { ++ ch_map_intf_5M[i] = 1; // interference flag ++ } ++ } ++ //=============just for debug========================= ++ //for(i=0;i<16;i++) ++ //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); ++ //=============================================== ++ //2 Mask target channel 5M index ++ for(i = 0; i < (4+4*Is40MHz) ; i++) ++ { ++ ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; ++ } ++ ++ psd_intf_flag = 0; ++ for(i = 0; i < 16; i++) ++ { ++ if(ch_map_intf_5M[i] == 1) ++ { ++ psd_intf_flag = 1; // interference is detected!!! ++ break; ++ } ++ } ++ ++#if (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ if(pRX_HP_Table->TP_Mode!=Idle_Mode) ++ { ++ if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 ++ { ++ Intf_HighTP_flag = 1; ++ De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 ++ } ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); ++ //2 Distance between target channel and interference ++ for(i = 0; i < 16; i++) ++ { ++ if(ch_map_intf_5M[i] == 1) ++ { ++ Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); ++ if(Intf_diff_idx < MIN_Intf_diff_idx) ++ MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); ++ //2 Choose False Alarm Threshold ++ switch (MIN_Intf_diff_idx){ ++ case 0: ++ case 1: ++ case 2: ++ case 3: ++ FA_TH = FA_RXHP_TH1; ++ break; ++ case 4: // CH5 ++ case 5: // CH6 ++ FA_TH = FA_RXHP_TH2; ++ break; ++ case 6: // CH7 ++ case 7: // CH8 ++ FA_TH = FA_RXHP_TH3; ++ break; ++ case 8: // CH9 ++ case 9: //CH10 ++ FA_TH = FA_RXHP_TH4; ++ break; ++ case 10: ++ case 11: ++ case 12: ++ case 13: ++ case 14: ++ case 15: ++ FA_TH = FA_RXHP_TH5; ++ break; ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); ++ pRX_HP_Table->PSD_func_trigger = 0; ++ } ++ //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode ++ if(pRX_HP_Table->RXHP_flag == 1) ++ { ++ if ((curRssi > 80)&&(preRssi < 80)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; ++ } ++ else if ((curRssi < 80)&&(preRssi > 80)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; ++ } ++ else if ((curRssi > 72)&&(preRssi < 72)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; ++ } ++ else if ((curRssi < 72)&&( preRssi > 72)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; ++ } ++ else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode ++ { ++ pRX_HP_Table->Cur_pw_th = pw_th_10dB; ++ pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode ++ psd_intf_flag = 0; ++ } ++ } ++ else // pRX_HP_Table->RXHP_flag == 0 ++ { ++ //1 Decide whether to enter AGC RX High Power Mode ++ if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && ++ (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) ++ { ++ if (curRssi > 80) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; ++ } ++ else if (curRssi > 72) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; ++ } ++ else ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; ++ } ++ pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 ++ pRX_HP_Table->First_time_enter = TRUE; ++ pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode ++ } ++ } ++ preRssi = curRssi; ++ odm_Write_RXHP(pDM_Odm); ++ } ++#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) ++} ++ ++ ++VOID ++odm_PSD_RXHPCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ #if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); ++ #else ++ odm_PSD_RXHP(pDM_Odm); ++ #endif ++#else ++ ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); ++#endif ++ ++ } ++ ++VOID ++odm_PSD_RXHPWorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ odm_PSD_RXHP(pDM_Odm); ++} ++ ++#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rxhp.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rxhp.h new file mode 100644 -index 000000000..98b3aa6ab +index 0000000..a1fe97f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_rxhp.h @@ -0,0 +1,105 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __PHYDMRXHP_H__ -+#define __PHYDMRXHP_H__ -+ -+#define RXHP_VERSION "1.0" -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD -+#define MODE_40M 0 //0:20M, 1:40M -+#define PSD_TH2 3 -+#define PSD_CHMIN 20 // Minimum channel number for BT AFH -+#define SIR_STEP_SIZE 3 -+#define Smooth_Size_1 5 -+#define Smooth_TH_1 3 -+#define Smooth_Size_2 10 -+#define Smooth_TH_2 4 -+#define Smooth_Size_3 20 -+#define Smooth_TH_3 4 -+#define Smooth_Step_Size 5 -+#define Adaptive_SIR 1 -+#define PSD_RESCAN 4 -+#define PSD_SCAN_INTERVAL 700 //ms -+ -+typedef struct _RX_High_Power_ -+{ -+ u1Byte RXHP_flag; -+ u1Byte PSD_func_trigger; -+ u1Byte PSD_bitmap_RXHP[80]; -+ u1Byte Pre_IGI; -+ u1Byte Cur_IGI; -+ u1Byte Pre_pw_th; -+ u1Byte Cur_pw_th; -+ BOOLEAN First_time_enter; -+ BOOLEAN RXHP_enable; -+ u1Byte TP_Mode; -+ RT_TIMER PSDTimer; -+ #if USE_WORKITEM -+ RT_WORK_ITEM PSDTimeWorkitem; -+ #endif -+}RXHP_T, *pRXHP_T; -+ -+#define dm_PSDMonitorCallback odm_PSDMonitorCallback -+VOID odm_PSDMonitorCallback(PRT_TIMER pTimer); -+ -+VOID -+odm_PSDMonitorInit( -+ IN PVOID pDM_VOID -+ ); -+ -+void odm_RXHPInit( -+ IN PVOID pDM_VOID); -+ -+void odm_RXHP( -+ IN PVOID pDM_VOID); -+ -+VOID -+odm_PSD_RXHPCallback( -+ PRT_TIMER pTimer -+); -+ -+ VOID -+ODM_PSDDbgControl( -+ IN PADAPTER Adapter, -+ IN u4Byte mode, -+ IN u4Byte btRssi -+ ); -+ -+ VOID -+odm_PSD_RXHPCallback( -+ PRT_TIMER pTimer -+); -+ -+VOID -+odm_PSD_RXHPWorkitemCallback( -+ IN PVOID pContext -+ ); -+ -+VOID -+odm_PSDMonitorWorkItemCallback( -+ IN PVOID pContext -+ ); -+ -+ #endif -+ -+ #endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PHYDMRXHP_H__ ++#define __PHYDMRXHP_H__ ++ ++#define RXHP_VERSION "1.0" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD ++#define MODE_40M 0 //0:20M, 1:40M ++#define PSD_TH2 3 ++#define PSD_CHMIN 20 // Minimum channel number for BT AFH ++#define SIR_STEP_SIZE 3 ++#define Smooth_Size_1 5 ++#define Smooth_TH_1 3 ++#define Smooth_Size_2 10 ++#define Smooth_TH_2 4 ++#define Smooth_Size_3 20 ++#define Smooth_TH_3 4 ++#define Smooth_Step_Size 5 ++#define Adaptive_SIR 1 ++#define PSD_RESCAN 4 ++#define PSD_SCAN_INTERVAL 700 //ms ++ ++typedef struct _RX_High_Power_ ++{ ++ u1Byte RXHP_flag; ++ u1Byte PSD_func_trigger; ++ u1Byte PSD_bitmap_RXHP[80]; ++ u1Byte Pre_IGI; ++ u1Byte Cur_IGI; ++ u1Byte Pre_pw_th; ++ u1Byte Cur_pw_th; ++ BOOLEAN First_time_enter; ++ BOOLEAN RXHP_enable; ++ u1Byte TP_Mode; ++ RT_TIMER PSDTimer; ++ #if USE_WORKITEM ++ RT_WORK_ITEM PSDTimeWorkitem; ++ #endif ++}RXHP_T, *pRXHP_T; ++ ++#define dm_PSDMonitorCallback odm_PSDMonitorCallback ++VOID odm_PSDMonitorCallback(PRT_TIMER pTimer); ++ ++VOID ++odm_PSDMonitorInit( ++ IN PVOID pDM_VOID ++ ); ++ ++void odm_RXHPInit( ++ IN PVOID pDM_VOID); ++ ++void odm_RXHP( ++ IN PVOID pDM_VOID); ++ ++VOID ++odm_PSD_RXHPCallback( ++ PRT_TIMER pTimer ++); ++ ++ VOID ++ODM_PSDDbgControl( ++ IN PADAPTER Adapter, ++ IN u4Byte mode, ++ IN u4Byte btRssi ++ ); ++ ++ VOID ++odm_PSD_RXHPCallback( ++ PRT_TIMER pTimer ++); ++ ++VOID ++odm_PSD_RXHPWorkitemCallback( ++ IN PVOID pContext ++ ); ++ ++VOID ++odm_PSDMonitorWorkItemCallback( ++ IN PVOID pContext ++ ); ++ ++ #endif ++ ++ #endif + \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_types.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_types.h new file mode 100644 -index 000000000..c739bd9da +index 0000000..459ca0b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/phydm_types.h @@ -0,0 +1,259 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __ODM_TYPES_H__ -+#define __ODM_TYPES_H__ -+ -+ -+/*Define Different SW team support*/ -+#define ODM_AP 0x01 /*BIT0*/ -+#define ODM_ADSL 0x02 -+#define ODM_CE 0x04 /*BIT2*/ -+#define ODM_WIN 0x08 /*BIT3*/ -+ -+/*Deifne HW endian support*/ -+#define ODM_ENDIAN_BIG 0 -+#define ODM_ENDIAN_LITTLE 1 -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc))) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv))) -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) -+#define RT_PCI_INTERFACE 1 -+#define RT_USB_INTERFACE 2 -+#define RT_SDIO_INTERFACE 3 -+#endif -+ -+typedef enum _HAL_STATUS{ -+ HAL_STATUS_SUCCESS, -+ HAL_STATUS_FAILURE, -+ /*RT_STATUS_PENDING, -+ RT_STATUS_RESOURCE, -+ RT_STATUS_INVALID_CONTEXT, -+ RT_STATUS_INVALID_PARAMETER, -+ RT_STATUS_NOT_SUPPORT, -+ RT_STATUS_OS_API_FAILED,*/ -+}HAL_STATUS,*PHAL_STATUS; -+ -+#if( DM_ODM_SUPPORT_TYPE == ODM_AP) -+#define MP_DRIVER 0 -+#endif -+#if(DM_ODM_SUPPORT_TYPE != ODM_WIN) -+ -+#define VISTA_USB_RX_REVISE 0 -+ -+// -+// Declare for ODM spin lock defintion temporarily fro compile pass. -+// -+typedef enum _RT_SPINLOCK_TYPE{ -+ RT_TX_SPINLOCK = 1, -+ RT_RX_SPINLOCK = 2, -+ RT_RM_SPINLOCK = 3, -+ RT_CAM_SPINLOCK = 4, -+ RT_SCAN_SPINLOCK = 5, -+ RT_LOG_SPINLOCK = 7, -+ RT_BW_SPINLOCK = 8, -+ RT_CHNLOP_SPINLOCK = 9, -+ RT_RF_OPERATE_SPINLOCK = 10, -+ RT_INITIAL_SPINLOCK = 11, -+ RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30. -+#if VISTA_USB_RX_REVISE -+ RT_USBRX_CONTEXT_SPINLOCK = 13, -+ RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR -+#endif -+ //Shall we define Ndis 6.2 SpinLock Here ? -+ RT_PORT_SPINLOCK=16, -+ RT_VNIC_SPINLOCK=17, -+ RT_HVL_SPINLOCK=18, -+ RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09. -+ -+ RT_BTData_SPINLOCK=25, -+ -+ RT_WAPI_OPTION_SPINLOCK=26, -+ RT_WAPI_RX_SPINLOCK=27, -+ -+ // add for 92D CCK control issue -+ RT_CCK_PAGEA_SPINLOCK = 28, -+ RT_BUFFER_SPINLOCK = 29, -+ RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30, -+ RT_GEN_TEMP_BUF_SPINLOCK = 31, -+ RT_AWB_SPINLOCK = 32, -+ RT_FW_PS_SPINLOCK = 33, -+ RT_HW_TIMER_SPIN_LOCK = 34, -+ RT_MPT_WI_SPINLOCK = 35, -+ RT_P2P_SPIN_LOCK = 36, // Protect P2P context -+ RT_DBG_SPIN_LOCK = 37, -+ RT_IQK_SPINLOCK = 38, -+ RT_PENDED_OID_SPINLOCK = 39, -+ RT_CHNLLIST_SPINLOCK = 40, -+ RT_INDIC_SPINLOCK = 41, //protect indication -+ RT_RFD_SPINLOCK = 42, -+ RT_SYNC_IO_CNT_SPINLOCK = 43, -+ RT_LAST_SPINLOCK, -+}RT_SPINLOCK_TYPE; -+ -+#endif -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #define STA_INFO_T RT_WLAN_STA -+ #define PSTA_INFO_T PRT_WLAN_STA -+ #define __func__ __FUNCTION__ -+ #define PHYDM_TESTCHIP_SUPPORT TESTCHIP_SUPPORT -+ #define bMaskH3Bytes 0xffffff00 -+ #define SUCCESS 0 -+ #define FAIL (-1) -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07. -+ #define ADSL_AP_BUILD_WORKAROUND -+ #define AP_BUILD_WORKAROUND -+ -+ #ifdef AP_BUILD_WORKAROUND -+ #include "../typedef.h" -+ #else -+ typedef void VOID,*PVOID; -+ typedef unsigned char BOOLEAN,*PBOOLEAN; -+ typedef unsigned char u1Byte,*pu1Byte; -+ typedef unsigned short u2Byte,*pu2Byte; -+ typedef unsigned int u4Byte,*pu4Byte; -+ typedef unsigned long long u8Byte,*pu8Byte; -+#if 1 -+/* In ARM platform, system would use the type -- "char" as "unsigned char" -+ * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/ -+ typedef signed char s1Byte,*ps1Byte; -+#else -+ typedef char s1Byte,*ps1Byte; -+#endif -+ typedef short s2Byte,*ps2Byte; -+ typedef long s4Byte,*ps4Byte; -+ typedef long long s8Byte,*ps8Byte; -+ #endif -+ -+ typedef struct rtl8192cd_priv *prtl8192cd_priv; -+ typedef struct stat_info STA_INFO_T,*PSTA_INFO_T; -+ typedef struct timer_list RT_TIMER, *PRT_TIMER; -+ typedef void * RT_TIMER_CALL_BACK; -+ -+#ifdef CONFIG_PCI_HCI -+ #define DEV_BUS_TYPE RT_PCI_INTERFACE -+#endif -+ -+ #define _TRUE 1 -+ #define _FALSE 0 -+ -+ #if (defined(TESTCHIP_SUPPORT)) -+ #define PHYDM_TESTCHIP_SUPPORT 1 -+ #else -+ #define PHYDM_TESTCHIP_SUPPORT 0 -+ #endif -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include -+#if 0 -+ typedef u8 u1Byte, *pu1Byte; -+ typedef u16 u2Byte,*pu2Byte; -+ typedef u32 u4Byte,*pu4Byte; -+ typedef u64 u8Byte,*pu8Byte; -+ typedef s8 s1Byte,*ps1Byte; -+ typedef s16 s2Byte,*ps2Byte; -+ typedef s32 s4Byte,*ps4Byte; -+ typedef s64 s8Byte,*ps8Byte; -+#else -+ #define u1Byte u8 -+ #define pu1Byte u8* -+ -+ #define u2Byte u16 -+ #define pu2Byte u16* -+ -+ #define u4Byte u32 -+ #define pu4Byte u32* -+ -+ #define u8Byte u64 -+ #define pu8Byte u64* -+ -+ #define s1Byte s8 -+ #define ps1Byte s8* -+ -+ #define s2Byte s16 -+ #define ps2Byte s16* -+ -+ #define s4Byte s32 -+ #define ps4Byte s32* -+ -+ #define s8Byte s64 -+ #define ps8Byte s64* -+ -+#endif -+ #ifdef CONFIG_USB_HCI -+ #define DEV_BUS_TYPE RT_USB_INTERFACE -+ #elif defined(CONFIG_PCI_HCI) -+ #define DEV_BUS_TYPE RT_PCI_INTERFACE -+ #elif defined(CONFIG_SDIO_HCI) -+ #define DEV_BUS_TYPE RT_SDIO_INTERFACE -+ #elif defined(CONFIG_GSPI_HCI) -+ #define DEV_BUS_TYPE RT_SDIO_INTERFACE -+ #endif -+ -+ -+ #if defined(CONFIG_LITTLE_ENDIAN) -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #elif defined (CONFIG_BIG_ENDIAN) -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG -+ #endif -+ -+ typedef struct timer_list RT_TIMER, *PRT_TIMER; -+ typedef void * RT_TIMER_CALL_BACK; -+ #define STA_INFO_T struct sta_info -+ #define PSTA_INFO_T struct sta_info * -+ -+ -+ -+ #define TRUE _TRUE -+ #define FALSE _FALSE -+ -+ -+ #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) -+ #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) -+ #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) -+ -+ //define useless flag to avoid compile warning -+ #define USE_WORKITEM 0 -+ #define FOR_BRAZIL_PRETEST 0 -+ /*#define BT_30_SUPPORT 0*/ -+ #define FPGA_TWO_MAC_VERIFICATION 0 -+ #define RTL8881A_SUPPORT 0 -+ -+ #if (defined(TESTCHIP_SUPPORT)) -+ #define PHYDM_TESTCHIP_SUPPORT 1 -+ #else -+ #define PHYDM_TESTCHIP_SUPPORT 0 -+ #endif -+#endif -+ -+#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) -+#define COND_ELSE 2 -+#define COND_ENDIF 3 -+ -+#endif // __ODM_TYPES_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __ODM_TYPES_H__ ++#define __ODM_TYPES_H__ ++ ++ ++/*Define Different SW team support*/ ++#define ODM_AP 0x01 /*BIT0*/ ++#define ODM_ADSL 0x02 ++#define ODM_CE 0x04 /*BIT2*/ ++#define ODM_WIN 0x08 /*BIT3*/ ++ ++/*Deifne HW endian support*/ ++#define ODM_ENDIAN_BIG 0 ++#define ODM_ENDIAN_LITTLE 1 ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc))) ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv))) ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) ++#define RT_PCI_INTERFACE 1 ++#define RT_USB_INTERFACE 2 ++#define RT_SDIO_INTERFACE 3 ++#endif ++ ++typedef enum _HAL_STATUS{ ++ HAL_STATUS_SUCCESS, ++ HAL_STATUS_FAILURE, ++ /*RT_STATUS_PENDING, ++ RT_STATUS_RESOURCE, ++ RT_STATUS_INVALID_CONTEXT, ++ RT_STATUS_INVALID_PARAMETER, ++ RT_STATUS_NOT_SUPPORT, ++ RT_STATUS_OS_API_FAILED,*/ ++}HAL_STATUS,*PHAL_STATUS; ++ ++#if( DM_ODM_SUPPORT_TYPE == ODM_AP) ++#define MP_DRIVER 0 ++#endif ++#if(DM_ODM_SUPPORT_TYPE != ODM_WIN) ++ ++#define VISTA_USB_RX_REVISE 0 ++ ++// ++// Declare for ODM spin lock defintion temporarily fro compile pass. ++// ++typedef enum _RT_SPINLOCK_TYPE{ ++ RT_TX_SPINLOCK = 1, ++ RT_RX_SPINLOCK = 2, ++ RT_RM_SPINLOCK = 3, ++ RT_CAM_SPINLOCK = 4, ++ RT_SCAN_SPINLOCK = 5, ++ RT_LOG_SPINLOCK = 7, ++ RT_BW_SPINLOCK = 8, ++ RT_CHNLOP_SPINLOCK = 9, ++ RT_RF_OPERATE_SPINLOCK = 10, ++ RT_INITIAL_SPINLOCK = 11, ++ RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30. ++#if VISTA_USB_RX_REVISE ++ RT_USBRX_CONTEXT_SPINLOCK = 13, ++ RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR ++#endif ++ //Shall we define Ndis 6.2 SpinLock Here ? ++ RT_PORT_SPINLOCK=16, ++ RT_VNIC_SPINLOCK=17, ++ RT_HVL_SPINLOCK=18, ++ RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09. ++ ++ RT_BTData_SPINLOCK=25, ++ ++ RT_WAPI_OPTION_SPINLOCK=26, ++ RT_WAPI_RX_SPINLOCK=27, ++ ++ // add for 92D CCK control issue ++ RT_CCK_PAGEA_SPINLOCK = 28, ++ RT_BUFFER_SPINLOCK = 29, ++ RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30, ++ RT_GEN_TEMP_BUF_SPINLOCK = 31, ++ RT_AWB_SPINLOCK = 32, ++ RT_FW_PS_SPINLOCK = 33, ++ RT_HW_TIMER_SPIN_LOCK = 34, ++ RT_MPT_WI_SPINLOCK = 35, ++ RT_P2P_SPIN_LOCK = 36, // Protect P2P context ++ RT_DBG_SPIN_LOCK = 37, ++ RT_IQK_SPINLOCK = 38, ++ RT_PENDED_OID_SPINLOCK = 39, ++ RT_CHNLLIST_SPINLOCK = 40, ++ RT_INDIC_SPINLOCK = 41, //protect indication ++ RT_RFD_SPINLOCK = 42, ++ RT_SYNC_IO_CNT_SPINLOCK = 43, ++ RT_LAST_SPINLOCK, ++}RT_SPINLOCK_TYPE; ++ ++#endif ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #define STA_INFO_T RT_WLAN_STA ++ #define PSTA_INFO_T PRT_WLAN_STA ++ #define __func__ __FUNCTION__ ++ #define PHYDM_TESTCHIP_SUPPORT TESTCHIP_SUPPORT ++ #define bMaskH3Bytes 0xffffff00 ++ #define SUCCESS 0 ++ #define FAIL (-1) ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07. ++ #define ADSL_AP_BUILD_WORKAROUND ++ #define AP_BUILD_WORKAROUND ++ ++ #ifdef AP_BUILD_WORKAROUND ++ #include "../typedef.h" ++ #else ++ typedef void VOID,*PVOID; ++ typedef unsigned char BOOLEAN,*PBOOLEAN; ++ typedef unsigned char u1Byte,*pu1Byte; ++ typedef unsigned short u2Byte,*pu2Byte; ++ typedef unsigned int u4Byte,*pu4Byte; ++ typedef unsigned long long u8Byte,*pu8Byte; ++#if 1 ++/* In ARM platform, system would use the type -- "char" as "unsigned char" ++ * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/ ++ typedef signed char s1Byte,*ps1Byte; ++#else ++ typedef char s1Byte,*ps1Byte; ++#endif ++ typedef short s2Byte,*ps2Byte; ++ typedef long s4Byte,*ps4Byte; ++ typedef long long s8Byte,*ps8Byte; ++ #endif ++ ++ typedef struct rtl8192cd_priv *prtl8192cd_priv; ++ typedef struct stat_info STA_INFO_T,*PSTA_INFO_T; ++ typedef struct timer_list RT_TIMER, *PRT_TIMER; ++ typedef void * RT_TIMER_CALL_BACK; ++ ++#ifdef CONFIG_PCI_HCI ++ #define DEV_BUS_TYPE RT_PCI_INTERFACE ++#endif ++ ++ #define _TRUE 1 ++ #define _FALSE 0 ++ ++ #if (defined(TESTCHIP_SUPPORT)) ++ #define PHYDM_TESTCHIP_SUPPORT 1 ++ #else ++ #define PHYDM_TESTCHIP_SUPPORT 0 ++ #endif ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include ++#if 0 ++ typedef u8 u1Byte, *pu1Byte; ++ typedef u16 u2Byte,*pu2Byte; ++ typedef u32 u4Byte,*pu4Byte; ++ typedef u64 u8Byte,*pu8Byte; ++ typedef s8 s1Byte,*ps1Byte; ++ typedef s16 s2Byte,*ps2Byte; ++ typedef s32 s4Byte,*ps4Byte; ++ typedef s64 s8Byte,*ps8Byte; ++#else ++ #define u1Byte u8 ++ #define pu1Byte u8* ++ ++ #define u2Byte u16 ++ #define pu2Byte u16* ++ ++ #define u4Byte u32 ++ #define pu4Byte u32* ++ ++ #define u8Byte u64 ++ #define pu8Byte u64* ++ ++ #define s1Byte s8 ++ #define ps1Byte s8* ++ ++ #define s2Byte s16 ++ #define ps2Byte s16* ++ ++ #define s4Byte s32 ++ #define ps4Byte s32* ++ ++ #define s8Byte s64 ++ #define ps8Byte s64* ++ ++#endif ++ #ifdef CONFIG_USB_HCI ++ #define DEV_BUS_TYPE RT_USB_INTERFACE ++ #elif defined(CONFIG_PCI_HCI) ++ #define DEV_BUS_TYPE RT_PCI_INTERFACE ++ #elif defined(CONFIG_SDIO_HCI) ++ #define DEV_BUS_TYPE RT_SDIO_INTERFACE ++ #elif defined(CONFIG_GSPI_HCI) ++ #define DEV_BUS_TYPE RT_SDIO_INTERFACE ++ #endif ++ ++ ++ #if defined(CONFIG_LITTLE_ENDIAN) ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE ++ #elif defined (CONFIG_BIG_ENDIAN) ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG ++ #endif ++ ++ typedef struct timer_list RT_TIMER, *PRT_TIMER; ++ typedef void * RT_TIMER_CALL_BACK; ++ #define STA_INFO_T struct sta_info ++ #define PSTA_INFO_T struct sta_info * ++ ++ ++ ++ #define TRUE _TRUE ++ #define FALSE _FALSE ++ ++ ++ #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) ++ #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) ++ #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) ++ ++ //define useless flag to avoid compile warning ++ #define USE_WORKITEM 0 ++ #define FOR_BRAZIL_PRETEST 0 ++ /*#define BT_30_SUPPORT 0*/ ++ #define FPGA_TWO_MAC_VERIFICATION 0 ++ #define RTL8881A_SUPPORT 0 ++ ++ #if (defined(TESTCHIP_SUPPORT)) ++ #define PHYDM_TESTCHIP_SUPPORT 1 ++ #else ++ #define PHYDM_TESTCHIP_SUPPORT 0 ++ #endif ++#endif ++ ++#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) ++#define COND_ELSE 2 ++#define COND_ENDIF 3 ++ ++#endif // __ODM_TYPES_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtchnlplan.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtchnlplan.c new file mode 100644 -index 000000000..d2a762df5 +index 0000000..5f81e05 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtchnlplan.c @@ -0,0 +1,480 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+/****************************************************************************** -+ -+ History: -+ Data Who Remark (Internal History) -+ -+ 05/14/2012 MH Collect RTK inernal infromation and generate channel plan draft. -+ -+******************************************************************************/ -+ -+//============================================================ -+// include files -+//============================================================ -+#include "mp_precomp.h" -+#include "rtchnlplan.h" -+ -+ -+ -+// -+// Channel Plan Domain Code -+// -+ -+/* -+ Channel Plan Contents -+ Domain Code EEPROM Countries in Specific Domain -+ 2G RD 5G RD Bit[6:0] 2G 5G -+ Case Old Define 00h~1Fh Old Define Old Define -+ 1 2G_WORLD 5G_NULL 20h Worldwird 13 NA -+ 2 2G_ETSI1 5G_NULL 21h Europe 2G NA -+ 3 2G_FCC1 5G_NULL 22h US 2G NA -+ 4 2G_MKK1 5G_NULL 23h Japan 2G NA -+ 5 2G_ETSI2 5G_NULL 24h France 2G NA -+ 6 2G_FCC1 5G_FCC1 25h US 2G US 5G ¤K¤j°ê»{ÃÒ -+ 7 2G_WORLD 5G_ETSI1 26h Worldwird 13 Europe ¤K¤j°ê»{ÃÒ -+ 8 2G_MKK1 5G_MKK1 27h Japan 2G Japan 5G ¤K¤j°ê»{ÃÒ -+ 9 2G_WORLD 5G_KCC1 28h Worldwird 13 Korea ¤K¤j°ê»{ÃÒ -+ 10 2G_WORLD 5G_FCC2 29h Worldwird 13 US o/w DFS Channels -+ 11 2G_WORLD 5G_FCC3 30h Worldwird 13 India, Mexico -+ 12 2G_WORLD 5G_FCC4 31h Worldwird 13 Venezuela -+ 13 2G_WORLD 5G_FCC5 32h Worldwird 13 China -+ 14 2G_WORLD 5G_FCC6 33h Worldwird 13 Israel -+ 15 2G_FCC1 5G_FCC7 34h US 2G US/Canada ¤K¤j°ê»{ÃÒ -+ 16 2G_WORLD 5G_ETSI2 35h Worldwird 13 Australia, New Zealand ¤K¤j°ê»{ÃÒ -+ 17 2G_WORLD 5G_ETSI3 36h Worldwird 13 Russia -+ 18 2G_MKK1 5G_MKK2 37h Japan 2G Japan (W52, W53) -+ 19 2G_MKK1 5G_MKK3 38h Japan 2G Japan (W56) -+ 20 2G_FCC1 5G_NCC1 39h US 2G Taiwan ¤K¤j°ê»{ÃÒ -+ -+ NA 2G_WORLD 5G_FCC1 7F FCC FCC DFS Channels Realtek Define -+ -+ -+ -+ -+ -+ 2.4G Regulatory Domains -+ Case 2G RD Regulation Channels Frequencyes Note Countries in Specific Domain -+ 1 2G_WORLD ETSI 1~13 2412~2472 Passive scan CH 12, 13 Worldwird 13 -+ 2 2G_ETSI1 ETSI 1~13 2412~2472 Europe -+ 3 2G_FCC1 FCC 1~11 2412~2462 US -+ 4 2G_MKK1 MKK 1~13, 14 2412~2472, 2484 Japan -+ 5 2G_ETSI2 ETSI 10~13 2457~2472 France -+ -+ -+ -+ -+ 5G Regulatory Domains -+ Case 5G RD Regulation Channels Frequencyes Note Countries in Specific Domain -+ 1 5G_NULL NA NA NA Do not support 5GHz -+ 2 5G_ETSI1 ETSI "36~48, 52~64, -+ 100~140" "5180~5240, 5260~5230 -+ 5500~5700" Band1, Ban2, Band3 Europe -+ 3 5G_ETSI2 ETSI "36~48, 52~64, -+ 100~140, 149~165" "5180~5240, 5260~5230 -+ 5500~5700, 5745~5825" Band1, Ban2, Band3, Band4 Australia, New Zealand -+ 4 5G_ETSI3 ETSI "36~48, 52~64, -+ 100~132, 149~165" -+ "5180~5240, 5260~5230 -+ 5500~5660, 5745~5825" Band1, Ban2, Band3(except CH 136, 140), Band4" Russia -+ 5 5G_FCC1 FCC "36~48, 52~64, -+ 100~140, 149~165" -+ "5180~5240, 5260~5230 -+ 5500~5700, 5745~5825" Band1(5150~5250MHz), -+ Band2(5250~5350MHz), -+ Band3(5470~5725MHz), -+ Band4(5725~5850MHz)" US -+ 6 5G_FCC2 FCC 36~48, 149~165 5180~5240, 5745~5825 Band1, Band4 FCC o/w DFS Channels -+ 7 5G_FCC3 FCC "36~48, 52~64, -+ 149~165" "5180~5240, 5260~5230 -+ 5745~5825" Band1, Ban2, Band4 India, Mexico -+ 8 5G_FCC4 FCC "36~48, 52~64, -+ 149~161" "5180~5240, 5260~5230 -+ 5745~5805" Band1, Ban2, -+ Band4(except CH 165)" Venezuela -+ 9 5G_FCC5 FCC 149~165 5745~5825 Band4 China -+ 10 5G_FCC6 FCC 36~48, 52~64 5180~5240, 5260~5230 Band1, Band2 Israel -+ 11 5G_FCC7 -+ 5G_IC1 FCC -+ IC" "36~48, 52~64, -+ 100~116, 136, 140, -+ 149~165" "5180~5240, 5260~5230 -+ 5500~5580, 5680, 5700, -+ 5745~5825" "Band1, Band2, -+ Band3(except 5600~5650MHz), -+ Band4" "US -+ Canada" -+ 12 5G_KCC1 KCC "36~48, 52~64, -+ 100~124, 149~165" "5180~5240, 5260~5230 -+ 5500~5620, 5745~5825" "Band1, Ban2, -+ Band3(5470~5650MHz), -+ Band4" Korea -+ 13 5G_MKK1 MKK "36~48, 52~64, -+ 100~140" "5180~5240, 5260~5230 -+ 5500~5700" W52, W53, W56 Japan -+ 14 5G_MKK2 MKK 36~48, 52~64 5180~5240, 5260~5230 W52, W53 Japan (W52, W53) -+ 15 5G_MKK3 MKK 100~140 5500~5700 W56 Japan (W56) -+ 16 5G_NCC1 NCC "56~64, -+ 100~116, 136, 140, -+ 149~165" "5260~5320 -+ 5500~5580, 5680, 5700, -+ 5745~5825" "Band2(except CH 52), -+ Band3(except 5600~5650MHz), -+ Band4" Taiwan -+ -+ -+*/ -+ -+// -+// 2.4G CHannel -+// -+/* -+ -+ 2.4G Band Regulatory Domains RTL8192D -+ Channel Number Channel Frequency US Canada Europe Spain France Japan Japan 20M 40M -+ (MHz) (FCC) (IC) (ETSI) (MPHPT) -+ 1 2412 v v v v v -+ 2 2417 v v v v v -+ 3 2422 v v v v v v -+ 4 2427 v v v v v v -+ 5 2432 v v v v v v -+ 6 2437 v v v v v v -+ 7 2442 v v v v v v -+ 8 2447 v v v v v v -+ 9 2452 v v v v v v -+ 10 2457 v v v v v v v v -+ 11 2462 v v v v v v v v -+ 12 2467 v v v v v -+ 13 2472 v v v v -+ 14 2484 v v -+ -+ -+*/ -+ -+ -+// -+// 5G Operating Channel -+// -+/* -+ -+ 5G Band RTL8192D RTL8195 (Jaguar) Jaguar 2 Regulatory Domains -+ Channel Number Channel Frequency Global Global Global "US -+(FCC 15.407)" "Canada -+(FCC, except 5.6~5.65GHz)" Argentina, Australia, New Zealand, Brazil, S. Africa (FCC/ETSI) "Europe -+(CE 301 893)" China India, Mexico, Singapore Israel, Turkey "Japan -+(MIC Item 19-3, 19-3-2)" Korea Russia, Ukraine "Taiwan -+(NCC)" Venezuela -+ (MHz) (20MHz) (20MHz) (40MHz) (80MHz) (160MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) -+"Band 1 -+5.15GHz -+~ -+5.25GHz" 36 5180 v v v v v Indoor Indoor v Indoor v Indoor Indoor v v v -+ 40 5200 v v v Indoor Indoor v Indoor v Indoor Indoor v v v -+ 44 5220 v v v v Indoor Indoor v Indoor v Indoor Indoor v v v -+ 48 5240 v v v Indoor Indoor v Indoor v Indoor Indoor v v v -+"Band 2 -+5.25GHz -+~ -+5.35GHz -+(DFS)" 52 5260 v v v v v v v v Indoor v Indoor Indoor v v v -+ 56 5280 v v v v v v Indoor v Indoor Indoor v v Indoor v -+ 60 5300 v v v v v v v Indoor v Indoor Indoor v v Indoor v -+ 64 5320 v v v v v v Indoor v Indoor Indoor v v Indoor v -+ -+"Band 3 -+5.47GHz -+~ -+5.725GHz -+(DFS)" 100 5500 v v v v v v v v v v v v v -+ 104 5520 v v v v v v v v v v v -+ 108 5540 v v v v v v v v v v v v -+ 112 5560 v v v v v v v v v v v -+ 116 5580 v v v v v v v v v v v v v -+ 120 5600 v v v Indoor v Indoor v v v -+ 124 5620 v v v v Indoor v Indoor v v v -+ 128 5640 v v v Indoor v Indoor v v -+ 132 5660 v v v E v Indoor v Indoor v v -+ 136 5680 v v v v v v v v v -+ 140 5700 v v E v v v v v v v -+ 144 5720 E E E -+"Band 4 -+5.725GHz -+~ -+5.85GHz -+(~5.9GHz)" 149 5745 v v v v v v v v v v v v v v -+ 153 5765 v v v v v v v v v v v v -+ 157 5785 v v v v v v v v v v v v v -+ 161 5805 v v v v v v v v v v v v -+ 165 5825 v v P P v v v v v v v v v -+ 169 5845 P P P -+ 173 5865 P P P P -+ 177 5885 P P P -+Channel Count 28 28 14 7 0 28 24 20 24 19 5 13 8 19 20 22 15 12 -+ E: FCC accepted the ask for CH144 from Accord. PS: 160MHz ¥Î 80MHz+80MHz¹ê²{¡H Argentina Belgium (¤ñ§Q®É) India Israel Russia -+ P: Customer's requirement from James. Australia The Netherlands (²üÄõ) Mexico Turkey Ukraine -+ New Zealand UK (­^°ê) Singapore -+ Brazil Switzerland (·ç¤h) -+ -+ -+*/ -+ -+/*---------------------------Define Local Constant---------------------------*/ -+ -+ -+// define Maximum Power v.s each band for each region -+// ISRAEL -+// Format: -+// RT_CHANNEL_DOMAIN_Region ={{{Chnl_Start, Chnl_end, Pwr_dB_Max}, {Chn2_Start, Chn2_end, Pwr_dB_Max}, {Chn3_Start, Chn3_end, Pwr_dB_Max}, {Chn4_Start, Chn4_end, Pwr_dB_Max}, {Chn5_Start, Chn5_end, Pwr_dB_Max}}, Limit_Num} */ -+// RT_CHANNEL_DOMAIN_FCC ={{{01,11,30}, {36,48,17}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} -+// "NR" is non-release channle. -+// Issue--- Israel--Russia--New Zealand -+// DOMAIN_01= (2G_WORLD, 5G_NULL) -+// DOMAIN_02= (2G_ETSI1, 5G_NULL) -+// DOMAIN_03= (2G_FCC1, 5G_NULL) -+// DOMAIN_04= (2G_MKK1, 5G_NULL) -+// DOMAIN_05= (2G_ETSI2, 5G_NULL) -+// DOMAIN_06= (2G_FCC1, 5G_FCC1) -+// DOMAIN_07= (2G_WORLD, 5G_ETSI1) -+// DOMAIN_08= (2G_MKK1, 5G_MKK1) -+// DOMAIN_09= (2G_WORLD, 5G_KCC1) -+// DOMAIN_10= (2G_WORLD, 5G_FCC2) -+// DOMAIN_11= (2G_WORLD, 5G_FCC3)----india -+// DOMAIN_12= (2G_WORLD, 5G_FCC4)----Venezuela -+// DOMAIN_13= (2G_WORLD, 5G_FCC5)----China -+// DOMAIN_14= (2G_WORLD, 5G_FCC6)----Israel -+// DOMAIN_15= (2G_FCC1, 5G_FCC7)-----Canada -+// DOMAIN_16= (2G_WORLD, 5G_ETSI2)---Australia -+// DOMAIN_17= (2G_WORLD, 5G_ETSI3)---Russia -+// DOMAIN_18= (2G_MKK1, 5G_MKK2)-----Japan -+// DOMAIN_19= (2G_MKK1, 5G_MKK3)-----Japan -+// DOMAIN_20= (2G_FCC1, 5G_NCC1)-----Taiwan -+// DOMAIN_21= (2G_FCC1, 5G_NCC1)-----Taiwan -+ -+ -+static RT_CHANNEL_PLAN_MAXPWR ChnlPlanPwrMax_2G[] = { -+ -+ // 2G_WORLD, -+ {{1, 13, 20}, 1}, -+ -+ // 2G_ETSI1 -+ {{1, 13, 20}, 1}, -+ -+ /* RT_CHANNEL_DOMAIN_ETSI */ -+ {{{1, 11, 17}, {40, 56, 17}, {60, 128, 17}, {0, 0, 0}, {149, 165, 17}}, 4}, -+ -+ // RT_CHANNEL_DOMAIN_MKK -+ {{{1, 11, 17}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}}, 1}, -+ -+ // Add new channel plan mex power table. -+ // ...... -+ }; -+ -+ -+/* -+//===========================================1:(2G_WORLD, 5G_NULL) -+ -+RT_CHANNEL_PLAN_MAXPWR RT_DOMAIN_01 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} -+ -+//===========================================2:(2G_ETSI1, 5G_NULL) -+ -+RT_DOMAIN_02 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} -+ -+//===========================================3:(2G_FCC1, 5G_NULL) -+ -+RT_DOMAIN_03 ={{{01,11,30}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} -+ -+//===========================================4:(2G_MKK1, 5G_NULL) -+ -+RT_DOMAIN_04 ={{{01,14,23}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} -+ -+//===========================================5:(2G_ETSI2, 5G_NULL) -+ -+RT_DOMAIN_05 ={{{10,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} -+ -+//===========================================6:(2G_FCC1, 5G_FCC1) -+ -+RT_DOMAIN_06 ={{{01,13,30}, {36,48,17}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} -+ -+//===========================================7:(2G_WORLD, 5G_ETSI1) -+ -+RT_DOMAIN_07 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {NR,NR,0}}, 4} -+ -+//===========================================8:(2G_MKK1, 5G_MKK1) -+ -+RT_DOMAIN_08 ={{{01,14,23}, {36,48,23}, {52,64,23}, {100,140,23}, {NR,NR,0}}, 4} -+ -+//===========================================9:(2G_WORLD, 5G_KCC1) -+ -+RT_DOMAIN_09 ={{{01,13,20}, {36,48,17}, {52,64,23}, {100,124,23}, {149,165,23}}, 5} -+ -+//===========================================10:(2G_WORLD, 5G_FCC2) -+ -+RT_DOMAIN_10 ={{{01,13,20}, {36,48,17}, {NR,NR,0}, {NR,NR,0}, {149,165,30}}, 3} -+ -+//===========================================11:(2G_WORLD, 5G_FCC3) -+RT_DOMAIN_11 ={{{01,13,20}, {36,48,23}, {52,64,23}, {NR,NR,0}, {149,165,23}}, 4} -+ -+//===========================================12:(2G_WORLD, 5G_FCC4) -+RT_DOMAIN_12 ={{{01,13,20}, {36,48,24}, {52,64,24}, {NR,NR,0}, {149,161,27}}, 4} -+ -+//===========================================13:(2G_WORLD, 5G_FCC5) -+RT_DOMAIN_13 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {149,165,27}}, 2} -+ -+//===========================================14:(2G_WORLD, 5G_FCC6) -+RT_DOMAIN_14 ={{{01,13,20}, {36,48,17}, {52,64,17}, {NR,NR,0}, {NR,NR,0}}, 3} -+ -+//===========================================15:(2G_FCC1, 5G_FCC7) -+RT_DOMAIN_15 ={{{01,11,30}, {36,48,23}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} -+ -+//===========================================16:(2G_WORLD, 5G_ETSI2) -+RT_DOMAIN_16 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {149,165,30}}, 5} -+ -+//===========================================17:(2G_WORLD, 5G_ETSI3) -+RT_DOMAIN_17 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,132,30}, {149,165,20}}, 5} -+ -+//===========================================18:(2G_MKK1, 5G_MKK2) -+RT_DOMAIN_18 ={{{01,14,23}, {36,48,23}, {52,64,23}, {NR,NR,0}, {NR,NR,0}}, 3} -+ -+//===========================================19:(2G_MKK1, 5G_MKK3) -+RT_DOMAIN_19 ={{{01,14,23}, {NR,NR,0}, {NR,NR,0}, {100,140,23}, {NR,NR,0}}, 2} -+ -+//===========================================20:(2G_FCC1, 5G_NCC1) -+RT_DOMAIN_20 ={{{01,11,30}, {NR,NR,0}, {56,64,23}, {100,140,24}, {149,165,30}}, 4} -+ -+//===========================================21:(2G_FCC1, 5G_NCC2) -+RT_DOMAIN_21 ={{{01,11,30}, {NR,NR,0}, {56,64,23}, {NR,NR,0}, {149,165,30}}, 3} -+ -+//===========================================22:(2G_WORLD, 5G_FCC3) -+RT_DOMAIN_22 ={{{01,13,24}, {36,48,20}, {52,64,24}, {NR,NR,0}, {149,165,30}}, 4} -+ -+//===========================================23:(2G_WORLD, 5G_ETSI2) -+RT_DOMAIN_23 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {149,165,30}}, 5} -+ -+*/ -+ -+// -+// Counter & Realtek Channel plan transfer table. -+// -+RT_CHNL_CTRY_TBL RtCtryChnlTbl[] = -+{ -+ -+ { -+ RT_CTRY_AL, // "Albaniaªüº¸¤Ú¥§¨È" -+ "AL", -+ RT_2G_WORLD, -+ RT_5G_WORLD, -+ RT_CHANNEL_DOMAIN_UNDEFINED // 2G/5G world. -+ }, -+#if 0 -+ { -+ RT_CTRY_BB, // "Barbados¤Ú¤Ú¦h´µ" -+ "BB", -+ RT_2G_WORLD, -+ RT_5G_NULL, -+ RT_CHANNEL_DOMAIN_EFUSE_0x20 // 2G world. 5G_NULL -+ }, -+ -+ { -+ RT_CTRY_DE, // "Germany¼w°ê" -+ "DE", -+ RT_2G_WORLD, -+ RT_5G_ETSI1, -+ RT_CHANNEL_DOMAIN_EFUSE_0x26 -+ }, -+ -+ { -+ RT_CTRY_US, // "Germany¼w°ê" -+ "US", -+ RT_2G_FCC1, -+ RT_5G_FCC7, -+ RT_CHANNEL_DOMAIN_EFUSE_0x34 -+ }, -+ -+ { -+ RT_CTRY_JP, // "Germany¼w°ê" -+ "JP", -+ RT_2G_MKK1, -+ RT_5G_MKK1, -+ RT_CHANNEL_DOMAIN_EFUSE_0x34 -+ }, -+ -+ { -+ RT_CTRY_TW, // "Germany¼w°ê" -+ "TW", -+ RT_2G_FCC1, -+ RT_5G_NCC1, -+ RT_CHANNEL_DOMAIN_EFUSE_0x39 -+ }, -+#endif -+ -+}; // RtCtryChnlTbl -+ -+// -+// Realtek Defined Channel plan. -+// -+#if 0 -+ -+static RT_CHANNEL_PLAN_NEW RtChnlPlan[] = -+{ -+ // Channel Plan 0x20. -+ { -+ &RtCtryChnlTbl[1], // RT_CHNL_CTRY_TBL Country & channel plan transfer table. -+ RT_CHANNEL_DOMAIN_EFUSE_0x20, // RT_CHANNEL_DOMAIN RT Channel Plan Define -+ RT_2G_WORLD, // RT_REGULATION_2G -+ RT_5G_NULL, // RT_REGULATION_5G -+ RT_WORLD, // RT_REGULATION_CMN RT Regulatory domain definition. -+ RT_SREQ_NA, // RT Channel plan special & customerize requirement. -+ -+ CHNL_RT_2G_WORLD, -+ CHNL_RT_2G_WORLD_SCAN_TYPE, -+ &ChnlPlanPwrMax_2G[0], -+ -+ CHNL_RT_5G_NULL, -+ CHNL_RT_5G_NULL_SCAN_TYPE, -+ -+ -+ }, -+ -+ // Channel Plan 0x26. -+ { -+ &RtCtryChnlTbl[1], // RT_CHNL_CTRY_TBL Country & channel plan transfer table. -+ RT_CHANNEL_DOMAIN_EFUSE_0x26, // RT_CHANNEL_DOMAIN RT Channel Plan Define -+ RT_2G_WORLD, // RT_REGULATION_2G -+ RT_5G_ETSI1, // RT_REGULATION_5G -+ RT_WORLD, // RT_REGULATION_CMN RT Regulatory domain definition. -+ RT_SREQ_NA, // RT Channel plan special & customerize requirement. -+ -+ CHNL_RT_2G_WORLD, // 2G workd cannel -+ CHNL_RT_2G_WORLD_SCAN_TYPE, -+ &ChnlPlanPwrMax_2G[1], -+ -+ CHNL_RT_5G_ETSI1, -+ CHNL_RT_5G_ETSI1_SCAN_TYPE, -+ -+ } -+ -+ -+}; -+#endif -+ -+ -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/****************************************************************************** ++ ++ History: ++ Data Who Remark (Internal History) ++ ++ 05/14/2012 MH Collect RTK inernal infromation and generate channel plan draft. ++ ++******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "rtchnlplan.h" ++ ++ ++ ++// ++// Channel Plan Domain Code ++// ++ ++/* ++ Channel Plan Contents ++ Domain Code EEPROM Countries in Specific Domain ++ 2G RD 5G RD Bit[6:0] 2G 5G ++ Case Old Define 00h~1Fh Old Define Old Define ++ 1 2G_WORLD 5G_NULL 20h Worldwird 13 NA ++ 2 2G_ETSI1 5G_NULL 21h Europe 2G NA ++ 3 2G_FCC1 5G_NULL 22h US 2G NA ++ 4 2G_MKK1 5G_NULL 23h Japan 2G NA ++ 5 2G_ETSI2 5G_NULL 24h France 2G NA ++ 6 2G_FCC1 5G_FCC1 25h US 2G US 5G ¤K¤j°ê»{ÃÒ ++ 7 2G_WORLD 5G_ETSI1 26h Worldwird 13 Europe ¤K¤j°ê»{ÃÒ ++ 8 2G_MKK1 5G_MKK1 27h Japan 2G Japan 5G ¤K¤j°ê»{ÃÒ ++ 9 2G_WORLD 5G_KCC1 28h Worldwird 13 Korea ¤K¤j°ê»{ÃÒ ++ 10 2G_WORLD 5G_FCC2 29h Worldwird 13 US o/w DFS Channels ++ 11 2G_WORLD 5G_FCC3 30h Worldwird 13 India, Mexico ++ 12 2G_WORLD 5G_FCC4 31h Worldwird 13 Venezuela ++ 13 2G_WORLD 5G_FCC5 32h Worldwird 13 China ++ 14 2G_WORLD 5G_FCC6 33h Worldwird 13 Israel ++ 15 2G_FCC1 5G_FCC7 34h US 2G US/Canada ¤K¤j°ê»{ÃÒ ++ 16 2G_WORLD 5G_ETSI2 35h Worldwird 13 Australia, New Zealand ¤K¤j°ê»{ÃÒ ++ 17 2G_WORLD 5G_ETSI3 36h Worldwird 13 Russia ++ 18 2G_MKK1 5G_MKK2 37h Japan 2G Japan (W52, W53) ++ 19 2G_MKK1 5G_MKK3 38h Japan 2G Japan (W56) ++ 20 2G_FCC1 5G_NCC1 39h US 2G Taiwan ¤K¤j°ê»{ÃÒ ++ ++ NA 2G_WORLD 5G_FCC1 7F FCC FCC DFS Channels Realtek Define ++ ++ ++ ++ ++ ++ 2.4G Regulatory Domains ++ Case 2G RD Regulation Channels Frequencyes Note Countries in Specific Domain ++ 1 2G_WORLD ETSI 1~13 2412~2472 Passive scan CH 12, 13 Worldwird 13 ++ 2 2G_ETSI1 ETSI 1~13 2412~2472 Europe ++ 3 2G_FCC1 FCC 1~11 2412~2462 US ++ 4 2G_MKK1 MKK 1~13, 14 2412~2472, 2484 Japan ++ 5 2G_ETSI2 ETSI 10~13 2457~2472 France ++ ++ ++ ++ ++ 5G Regulatory Domains ++ Case 5G RD Regulation Channels Frequencyes Note Countries in Specific Domain ++ 1 5G_NULL NA NA NA Do not support 5GHz ++ 2 5G_ETSI1 ETSI "36~48, 52~64, ++ 100~140" "5180~5240, 5260~5230 ++ 5500~5700" Band1, Ban2, Band3 Europe ++ 3 5G_ETSI2 ETSI "36~48, 52~64, ++ 100~140, 149~165" "5180~5240, 5260~5230 ++ 5500~5700, 5745~5825" Band1, Ban2, Band3, Band4 Australia, New Zealand ++ 4 5G_ETSI3 ETSI "36~48, 52~64, ++ 100~132, 149~165" ++ "5180~5240, 5260~5230 ++ 5500~5660, 5745~5825" Band1, Ban2, Band3(except CH 136, 140), Band4" Russia ++ 5 5G_FCC1 FCC "36~48, 52~64, ++ 100~140, 149~165" ++ "5180~5240, 5260~5230 ++ 5500~5700, 5745~5825" Band1(5150~5250MHz), ++ Band2(5250~5350MHz), ++ Band3(5470~5725MHz), ++ Band4(5725~5850MHz)" US ++ 6 5G_FCC2 FCC 36~48, 149~165 5180~5240, 5745~5825 Band1, Band4 FCC o/w DFS Channels ++ 7 5G_FCC3 FCC "36~48, 52~64, ++ 149~165" "5180~5240, 5260~5230 ++ 5745~5825" Band1, Ban2, Band4 India, Mexico ++ 8 5G_FCC4 FCC "36~48, 52~64, ++ 149~161" "5180~5240, 5260~5230 ++ 5745~5805" Band1, Ban2, ++ Band4(except CH 165)" Venezuela ++ 9 5G_FCC5 FCC 149~165 5745~5825 Band4 China ++ 10 5G_FCC6 FCC 36~48, 52~64 5180~5240, 5260~5230 Band1, Band2 Israel ++ 11 5G_FCC7 ++ 5G_IC1 FCC ++ IC" "36~48, 52~64, ++ 100~116, 136, 140, ++ 149~165" "5180~5240, 5260~5230 ++ 5500~5580, 5680, 5700, ++ 5745~5825" "Band1, Band2, ++ Band3(except 5600~5650MHz), ++ Band4" "US ++ Canada" ++ 12 5G_KCC1 KCC "36~48, 52~64, ++ 100~124, 149~165" "5180~5240, 5260~5230 ++ 5500~5620, 5745~5825" "Band1, Ban2, ++ Band3(5470~5650MHz), ++ Band4" Korea ++ 13 5G_MKK1 MKK "36~48, 52~64, ++ 100~140" "5180~5240, 5260~5230 ++ 5500~5700" W52, W53, W56 Japan ++ 14 5G_MKK2 MKK 36~48, 52~64 5180~5240, 5260~5230 W52, W53 Japan (W52, W53) ++ 15 5G_MKK3 MKK 100~140 5500~5700 W56 Japan (W56) ++ 16 5G_NCC1 NCC "56~64, ++ 100~116, 136, 140, ++ 149~165" "5260~5320 ++ 5500~5580, 5680, 5700, ++ 5745~5825" "Band2(except CH 52), ++ Band3(except 5600~5650MHz), ++ Band4" Taiwan ++ ++ ++*/ ++ ++// ++// 2.4G CHannel ++// ++/* ++ ++ 2.4G Band Regulatory Domains RTL8192D ++ Channel Number Channel Frequency US Canada Europe Spain France Japan Japan 20M 40M ++ (MHz) (FCC) (IC) (ETSI) (MPHPT) ++ 1 2412 v v v v v ++ 2 2417 v v v v v ++ 3 2422 v v v v v v ++ 4 2427 v v v v v v ++ 5 2432 v v v v v v ++ 6 2437 v v v v v v ++ 7 2442 v v v v v v ++ 8 2447 v v v v v v ++ 9 2452 v v v v v v ++ 10 2457 v v v v v v v v ++ 11 2462 v v v v v v v v ++ 12 2467 v v v v v ++ 13 2472 v v v v ++ 14 2484 v v ++ ++ ++*/ ++ ++ ++// ++// 5G Operating Channel ++// ++/* ++ ++ 5G Band RTL8192D RTL8195 (Jaguar) Jaguar 2 Regulatory Domains ++ Channel Number Channel Frequency Global Global Global "US ++(FCC 15.407)" "Canada ++(FCC, except 5.6~5.65GHz)" Argentina, Australia, New Zealand, Brazil, S. Africa (FCC/ETSI) "Europe ++(CE 301 893)" China India, Mexico, Singapore Israel, Turkey "Japan ++(MIC Item 19-3, 19-3-2)" Korea Russia, Ukraine "Taiwan ++(NCC)" Venezuela ++ (MHz) (20MHz) (20MHz) (40MHz) (80MHz) (160MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) ++"Band 1 ++5.15GHz ++~ ++5.25GHz" 36 5180 v v v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++ 40 5200 v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++ 44 5220 v v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++ 48 5240 v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++"Band 2 ++5.25GHz ++~ ++5.35GHz ++(DFS)" 52 5260 v v v v v v v v Indoor v Indoor Indoor v v v ++ 56 5280 v v v v v v Indoor v Indoor Indoor v v Indoor v ++ 60 5300 v v v v v v v Indoor v Indoor Indoor v v Indoor v ++ 64 5320 v v v v v v Indoor v Indoor Indoor v v Indoor v ++ ++"Band 3 ++5.47GHz ++~ ++5.725GHz ++(DFS)" 100 5500 v v v v v v v v v v v v v ++ 104 5520 v v v v v v v v v v v ++ 108 5540 v v v v v v v v v v v v ++ 112 5560 v v v v v v v v v v v ++ 116 5580 v v v v v v v v v v v v v ++ 120 5600 v v v Indoor v Indoor v v v ++ 124 5620 v v v v Indoor v Indoor v v v ++ 128 5640 v v v Indoor v Indoor v v ++ 132 5660 v v v E v Indoor v Indoor v v ++ 136 5680 v v v v v v v v v ++ 140 5700 v v E v v v v v v v ++ 144 5720 E E E ++"Band 4 ++5.725GHz ++~ ++5.85GHz ++(~5.9GHz)" 149 5745 v v v v v v v v v v v v v v ++ 153 5765 v v v v v v v v v v v v ++ 157 5785 v v v v v v v v v v v v v ++ 161 5805 v v v v v v v v v v v v ++ 165 5825 v v P P v v v v v v v v v ++ 169 5845 P P P ++ 173 5865 P P P P ++ 177 5885 P P P ++Channel Count 28 28 14 7 0 28 24 20 24 19 5 13 8 19 20 22 15 12 ++ E: FCC accepted the ask for CH144 from Accord. PS: 160MHz ¥Î 80MHz+80MHz¹ê²{¡H Argentina Belgium (¤ñ§Q®É) India Israel Russia ++ P: Customer's requirement from James. Australia The Netherlands (²üÄõ) Mexico Turkey Ukraine ++ New Zealand UK (­^°ê) Singapore ++ Brazil Switzerland (·ç¤h) ++ ++ ++*/ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++// define Maximum Power v.s each band for each region ++// ISRAEL ++// Format: ++// RT_CHANNEL_DOMAIN_Region ={{{Chnl_Start, Chnl_end, Pwr_dB_Max}, {Chn2_Start, Chn2_end, Pwr_dB_Max}, {Chn3_Start, Chn3_end, Pwr_dB_Max}, {Chn4_Start, Chn4_end, Pwr_dB_Max}, {Chn5_Start, Chn5_end, Pwr_dB_Max}}, Limit_Num} */ ++// RT_CHANNEL_DOMAIN_FCC ={{{01,11,30}, {36,48,17}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} ++// "NR" is non-release channle. ++// Issue--- Israel--Russia--New Zealand ++// DOMAIN_01= (2G_WORLD, 5G_NULL) ++// DOMAIN_02= (2G_ETSI1, 5G_NULL) ++// DOMAIN_03= (2G_FCC1, 5G_NULL) ++// DOMAIN_04= (2G_MKK1, 5G_NULL) ++// DOMAIN_05= (2G_ETSI2, 5G_NULL) ++// DOMAIN_06= (2G_FCC1, 5G_FCC1) ++// DOMAIN_07= (2G_WORLD, 5G_ETSI1) ++// DOMAIN_08= (2G_MKK1, 5G_MKK1) ++// DOMAIN_09= (2G_WORLD, 5G_KCC1) ++// DOMAIN_10= (2G_WORLD, 5G_FCC2) ++// DOMAIN_11= (2G_WORLD, 5G_FCC3)----india ++// DOMAIN_12= (2G_WORLD, 5G_FCC4)----Venezuela ++// DOMAIN_13= (2G_WORLD, 5G_FCC5)----China ++// DOMAIN_14= (2G_WORLD, 5G_FCC6)----Israel ++// DOMAIN_15= (2G_FCC1, 5G_FCC7)-----Canada ++// DOMAIN_16= (2G_WORLD, 5G_ETSI2)---Australia ++// DOMAIN_17= (2G_WORLD, 5G_ETSI3)---Russia ++// DOMAIN_18= (2G_MKK1, 5G_MKK2)-----Japan ++// DOMAIN_19= (2G_MKK1, 5G_MKK3)-----Japan ++// DOMAIN_20= (2G_FCC1, 5G_NCC1)-----Taiwan ++// DOMAIN_21= (2G_FCC1, 5G_NCC1)-----Taiwan ++ ++ ++static RT_CHANNEL_PLAN_MAXPWR ChnlPlanPwrMax_2G[] = { ++ ++ // 2G_WORLD, ++ {{1, 13, 20}, 1}, ++ ++ // 2G_ETSI1 ++ {{1, 13, 20}, 1}, ++ ++ /* RT_CHANNEL_DOMAIN_ETSI */ ++ {{{1, 11, 17}, {40, 56, 17}, {60, 128, 17}, {0, 0, 0}, {149, 165, 17}}, 4}, ++ ++ // RT_CHANNEL_DOMAIN_MKK ++ {{{1, 11, 17}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}}, 1}, ++ ++ // Add new channel plan mex power table. ++ // ...... ++ }; ++ ++ ++/* ++//===========================================1:(2G_WORLD, 5G_NULL) ++ ++RT_CHANNEL_PLAN_MAXPWR RT_DOMAIN_01 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================2:(2G_ETSI1, 5G_NULL) ++ ++RT_DOMAIN_02 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================3:(2G_FCC1, 5G_NULL) ++ ++RT_DOMAIN_03 ={{{01,11,30}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================4:(2G_MKK1, 5G_NULL) ++ ++RT_DOMAIN_04 ={{{01,14,23}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================5:(2G_ETSI2, 5G_NULL) ++ ++RT_DOMAIN_05 ={{{10,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================6:(2G_FCC1, 5G_FCC1) ++ ++RT_DOMAIN_06 ={{{01,13,30}, {36,48,17}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} ++ ++//===========================================7:(2G_WORLD, 5G_ETSI1) ++ ++RT_DOMAIN_07 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {NR,NR,0}}, 4} ++ ++//===========================================8:(2G_MKK1, 5G_MKK1) ++ ++RT_DOMAIN_08 ={{{01,14,23}, {36,48,23}, {52,64,23}, {100,140,23}, {NR,NR,0}}, 4} ++ ++//===========================================9:(2G_WORLD, 5G_KCC1) ++ ++RT_DOMAIN_09 ={{{01,13,20}, {36,48,17}, {52,64,23}, {100,124,23}, {149,165,23}}, 5} ++ ++//===========================================10:(2G_WORLD, 5G_FCC2) ++ ++RT_DOMAIN_10 ={{{01,13,20}, {36,48,17}, {NR,NR,0}, {NR,NR,0}, {149,165,30}}, 3} ++ ++//===========================================11:(2G_WORLD, 5G_FCC3) ++RT_DOMAIN_11 ={{{01,13,20}, {36,48,23}, {52,64,23}, {NR,NR,0}, {149,165,23}}, 4} ++ ++//===========================================12:(2G_WORLD, 5G_FCC4) ++RT_DOMAIN_12 ={{{01,13,20}, {36,48,24}, {52,64,24}, {NR,NR,0}, {149,161,27}}, 4} ++ ++//===========================================13:(2G_WORLD, 5G_FCC5) ++RT_DOMAIN_13 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {149,165,27}}, 2} ++ ++//===========================================14:(2G_WORLD, 5G_FCC6) ++RT_DOMAIN_14 ={{{01,13,20}, {36,48,17}, {52,64,17}, {NR,NR,0}, {NR,NR,0}}, 3} ++ ++//===========================================15:(2G_FCC1, 5G_FCC7) ++RT_DOMAIN_15 ={{{01,11,30}, {36,48,23}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} ++ ++//===========================================16:(2G_WORLD, 5G_ETSI2) ++RT_DOMAIN_16 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {149,165,30}}, 5} ++ ++//===========================================17:(2G_WORLD, 5G_ETSI3) ++RT_DOMAIN_17 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,132,30}, {149,165,20}}, 5} ++ ++//===========================================18:(2G_MKK1, 5G_MKK2) ++RT_DOMAIN_18 ={{{01,14,23}, {36,48,23}, {52,64,23}, {NR,NR,0}, {NR,NR,0}}, 3} ++ ++//===========================================19:(2G_MKK1, 5G_MKK3) ++RT_DOMAIN_19 ={{{01,14,23}, {NR,NR,0}, {NR,NR,0}, {100,140,23}, {NR,NR,0}}, 2} ++ ++//===========================================20:(2G_FCC1, 5G_NCC1) ++RT_DOMAIN_20 ={{{01,11,30}, {NR,NR,0}, {56,64,23}, {100,140,24}, {149,165,30}}, 4} ++ ++//===========================================21:(2G_FCC1, 5G_NCC2) ++RT_DOMAIN_21 ={{{01,11,30}, {NR,NR,0}, {56,64,23}, {NR,NR,0}, {149,165,30}}, 3} ++ ++//===========================================22:(2G_WORLD, 5G_FCC3) ++RT_DOMAIN_22 ={{{01,13,24}, {36,48,20}, {52,64,24}, {NR,NR,0}, {149,165,30}}, 4} ++ ++//===========================================23:(2G_WORLD, 5G_ETSI2) ++RT_DOMAIN_23 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {149,165,30}}, 5} ++ ++*/ ++ ++// ++// Counter & Realtek Channel plan transfer table. ++// ++RT_CHNL_CTRY_TBL RtCtryChnlTbl[] = ++{ ++ ++ { ++ RT_CTRY_AL, // "Albaniaªüº¸¤Ú¥§¨È" ++ "AL", ++ RT_2G_WORLD, ++ RT_5G_WORLD, ++ RT_CHANNEL_DOMAIN_UNDEFINED // 2G/5G world. ++ }, ++#if 0 ++ { ++ RT_CTRY_BB, // "Barbados¤Ú¤Ú¦h´µ" ++ "BB", ++ RT_2G_WORLD, ++ RT_5G_NULL, ++ RT_CHANNEL_DOMAIN_EFUSE_0x20 // 2G world. 5G_NULL ++ }, ++ ++ { ++ RT_CTRY_DE, // "Germany¼w°ê" ++ "DE", ++ RT_2G_WORLD, ++ RT_5G_ETSI1, ++ RT_CHANNEL_DOMAIN_EFUSE_0x26 ++ }, ++ ++ { ++ RT_CTRY_US, // "Germany¼w°ê" ++ "US", ++ RT_2G_FCC1, ++ RT_5G_FCC7, ++ RT_CHANNEL_DOMAIN_EFUSE_0x34 ++ }, ++ ++ { ++ RT_CTRY_JP, // "Germany¼w°ê" ++ "JP", ++ RT_2G_MKK1, ++ RT_5G_MKK1, ++ RT_CHANNEL_DOMAIN_EFUSE_0x34 ++ }, ++ ++ { ++ RT_CTRY_TW, // "Germany¼w°ê" ++ "TW", ++ RT_2G_FCC1, ++ RT_5G_NCC1, ++ RT_CHANNEL_DOMAIN_EFUSE_0x39 ++ }, ++#endif ++ ++}; // RtCtryChnlTbl ++ ++// ++// Realtek Defined Channel plan. ++// ++#if 0 ++ ++static RT_CHANNEL_PLAN_NEW RtChnlPlan[] = ++{ ++ // Channel Plan 0x20. ++ { ++ &RtCtryChnlTbl[1], // RT_CHNL_CTRY_TBL Country & channel plan transfer table. ++ RT_CHANNEL_DOMAIN_EFUSE_0x20, // RT_CHANNEL_DOMAIN RT Channel Plan Define ++ RT_2G_WORLD, // RT_REGULATION_2G ++ RT_5G_NULL, // RT_REGULATION_5G ++ RT_WORLD, // RT_REGULATION_CMN RT Regulatory domain definition. ++ RT_SREQ_NA, // RT Channel plan special & customerize requirement. ++ ++ CHNL_RT_2G_WORLD, ++ CHNL_RT_2G_WORLD_SCAN_TYPE, ++ &ChnlPlanPwrMax_2G[0], ++ ++ CHNL_RT_5G_NULL, ++ CHNL_RT_5G_NULL_SCAN_TYPE, ++ ++ ++ }, ++ ++ // Channel Plan 0x26. ++ { ++ &RtCtryChnlTbl[1], // RT_CHNL_CTRY_TBL Country & channel plan transfer table. ++ RT_CHANNEL_DOMAIN_EFUSE_0x26, // RT_CHANNEL_DOMAIN RT Channel Plan Define ++ RT_2G_WORLD, // RT_REGULATION_2G ++ RT_5G_ETSI1, // RT_REGULATION_5G ++ RT_WORLD, // RT_REGULATION_CMN RT Regulatory domain definition. ++ RT_SREQ_NA, // RT Channel plan special & customerize requirement. ++ ++ CHNL_RT_2G_WORLD, // 2G workd cannel ++ CHNL_RT_2G_WORLD_SCAN_TYPE, ++ &ChnlPlanPwrMax_2G[1], ++ ++ CHNL_RT_5G_ETSI1, ++ CHNL_RT_5G_ETSI1_SCAN_TYPE, ++ ++ } ++ ++ ++}; ++#endif ++ ++ ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtchnlplan.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtchnlplan.h new file mode 100644 -index 000000000..78a31dcd1 +index 0000000..37786cf --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtchnlplan.h @@ -0,0 +1,699 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ -+#ifndef __RT_CHANNELPLAN_H__ -+#define __RT_CHANNELPLAN_H__ -+ -+typedef enum _RT_CHANNEL_DOMAIN_NEW -+{ -+ -+ //===== Add new channel plan above this line ===============// -+ -+ // For new architecture we define different 2G/5G CH area for all country. -+ // 2.4 G only -+ RT_CHANNEL_DOMAIN_2G_WORLD_5G_NULL = 0x20, -+ RT_CHANNEL_DOMAIN_2G_ETSI1_5G_NULL = 0x21, -+ RT_CHANNEL_DOMAIN_2G_FCC1_5G_NULL = 0x22, -+ RT_CHANNEL_DOMAIN_2G_MKK1_5G_NULL = 0x23, -+ RT_CHANNEL_DOMAIN_2G_ETSI2_5G_NULL = 0x24, -+ // 2.4 G + 5G type 1 -+ RT_CHANNEL_DOMAIN_2G_FCC1_5G_FCC1 = 0x25, -+ RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1 = 0x26, -+ //RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1 = 0x27, -+ // ..... -+ -+ RT_CHANNEL_DOMAIN_MAX_NEW, -+ -+}RT_CHANNEL_DOMAIN_NEW, *PRT_CHANNEL_DOMAIN_NEW; -+ -+ -+#if 0 -+#define DOMAIN_CODE_2G_WORLD \ -+ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 -+#define DOMAIN_CODE_2G_ETSI1 \ -+ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 -+#define DOMAIN_CODE_2G_ETSI2 \ -+ {1,2,3,4,5,6,7,8,9,10,11}, 11 -+#define DOMAIN_CODE_2G_FCC1 \ -+ {1,2,3,4,5,6,7,8,9,10,11,12,13,14}, 14 -+#define DOMAIN_CODE_2G_MKK1 \ -+ {10,11,12,13}, 4 -+ -+#define DOMAIN_CODE_5G_ETSI1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 -+#define DOMAIN_CODE_5G_ETSI2 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 -+#define DOMAIN_CODE_5G_ETSI3 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 -+#define DOMAIN_CODE_5G_FCC1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 -+#define DOMAIN_CODE_5G_FCC2 \ -+ {36,40,44,48,149,153,157,161,165}, 9 -+#define DOMAIN_CODE_5G_FCC3 \ -+ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 -+#define DOMAIN_CODE_5G_FCC4 \ -+ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 -+#define DOMAIN_CODE_5G_FCC5 \ -+ {149,153,157,161,165}, 5 -+#define DOMAIN_CODE_5G_FCC6 \ -+ {36,40,44,48,52,56,60,64}, 8 -+#define DOMAIN_CODE_5G_FCC7 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 -+#define DOMAIN_CODE_5G_IC1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 -+#define DOMAIN_CODE_5G_KCC1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 -+#define DOMAIN_CODE_5G_MKK1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 -+#define DOMAIN_CODE_5G_MKK2 \ -+ {36,40,44,48,52,56,60,64}, 8 -+#define DOMAIN_CODE_5G_MKK3 \ -+ {100,104,108,112,116,120,124,128,132,136,140}, 11 -+#define DOMAIN_CODE_5G_NCC1 \ -+ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 -+#define DOMAIN_CODE_5G_NCC2 \ -+ {56,60,64,149,153,157,161,165}, 8 -+#define UNDEFINED \ -+ {0}, 0 -+#endif -+ -+// -+// -+// -+/* -+ -+Countries "Country Abbreviation" Domain Code SKU's Ch# of 20MHz -+ 2G 5G Ch# of 40MHz -+"Albaniaªüº¸¤Ú¥§¨È" AL Local Test -+ -+"Algeriaªüº¸¤Î§Q¨È" DZ CE TCF -+ -+"Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F" AG 2G_WORLD FCC TCF -+ -+"Argentinaªü®Ú§Ê" AR 2G_WORLD Local Test -+ -+"Armenia¨È¬ü¥§¨È" AM 2G_WORLD ETSI -+ -+"Arubaªü¾|¤Ú®q" AW 2G_WORLD FCC TCF -+ -+"Australia¿D¬w" AU 2G_WORLD 5G_ETSI2 -+ -+"Austria¶ø¦a§Q" AT 2G_WORLD 5G_ETSI1 CE -+ -+"Azerbaijanªü¶ë«ô¾Ê" AZ 2G_WORLD CE TCF -+ -+"Bahamas¤Ú«¢°¨" BS 2G_WORLD -+ -+"Barbados¤Ú¤Ú¦h´µ" BB 2G_WORLD FCC TCF -+ -+"Belgium¤ñ§Q®É" BE 2G_WORLD 5G_ETSI1 CE -+ -+"Bermuda¦Ê¼}¹F" BM 2G_WORLD FCC TCF -+ -+"Brazil¤Ú¦è" BR 2G_WORLD Local Test -+ -+"Bulgaria«O¥[§Q¨È" BG 2G_WORLD 5G_ETSI1 CE -+ -+"Canada¥[®³¤j" CA 2G_FCC1 5G_FCC7 IC / FCC IC / FCC -+ -+"Cayman Islands¶}°Ò¸s®q" KY 2G_WORLD 5G_ETSI1 CE -+ -+"Chile´¼§Q" CL 2G_WORLD FCC TCF -+ -+"China¤¤°ê" CN 2G_WORLD 5G_FCC5 «H³¡?¡i2002¡j353? -+ -+"Columbia­ô­Û¤ñ¨È" CO 2G_WORLD Voluntary -+ -+"Costa Rica­ô´µ¹F¾¤¥[" CR 2G_WORLD FCC TCF -+ -+"Cyprus¶ë®ú¸ô´µ" CY 2G_WORLD 5G_ETSI1 CE -+ -+"Czech ±¶§J" CZ 2G_WORLD 5G_ETSI1 CE -+ -+"Denmark¤¦³Á" DK 2G_WORLD 5G_ETSI1 CE -+ -+"Dominican Republic¦h©ú¥§¥[¦@©M°ê" DO 2G_WORLD FCC TCF -+ -+"Egypt®J¤Î" EG 2G_WORLD CE T CF -+ -+"El SalvadorÂĺ¸¥Ë¦h" SV 2G_WORLD Voluntary -+ -+"Estonia·R¨F¥§¨È" EE 2G_WORLD 5G_ETSI1 CE -+ -+"FinlandªâÄõ" FI 2G_WORLD 5G_ETSI1 CE -+ -+"Franceªk°ê" FR 5G_E TSI1 CE -+ -+"Germany¼w°ê" DE 2G_WORLD 5G_ETSI1 CE -+ -+"Greece §Æþ" GR 2G_WORLD 5G_ETSI1 CE -+ -+"GuamÃö®q" GU 2G_WORLD -+ -+"Guatemala¥Ê¦a°¨©Ô" GT 2G_WORLD -+ -+"Haiti®ü¦a" HT 2G_WORLD FCC TCF -+ -+"Honduras§»³£©Ô´µ" HN 2G_WORLD FCC TCF -+ -+"Hungary¦I¤ú§Q" HU 2G_WORLD 5G_ETSI1 CE -+ -+"Iceland¦B®q" IS 2G_WORLD 5G_ETSI1 CE -+ -+"India¦L«×" IN 2G_WORLD 5G_FCC3 FCC/CE TCF -+ -+"Ireland·Rº¸Äõ" IE 2G_WORLD 5G_ETSI1 CE -+ -+"Israel¥H¦â¦C" IL 5G_F CC6 CE TCF -+ -+"Italy¸q¤j§Q" IT 2G_WORLD 5G_ETSI1 CE -+ -+"Japan¤é¥»" JP 2G_MKK1 5G_MKK1 MKK MKK -+ -+"KoreaÁú°ê" KR 2G_WORLD 5G_KCC1 KCC KCC -+ -+"Latvia©Ô²æºû¨È" LV 2G_WORLD 5G_ETSI1 CE -+ -+"Lithuania¥ß³³©{" LT 2G_WORLD 5G_ETSI1 CE -+ -+"Luxembourg¿c´Ë³ù" LU 2G_WORLD 5G_ETSI1 CE -+ -+"Malaysia°¨¨Ó¦è¨È" MY 2G_WORLD Local Test -+ -+"Malta°¨º¸¥L" MT 2G_WORLD 5G_ETSI1 CE -+ -+"Mexico¾¥¦è­ô" MX 2G_WORLD 5G_FCC3 Local Test -+ -+"Morocco¼¯¬¥­ô" MA CE TCF -+ -+"Netherlands²üÄõ" NL 2G_WORLD 5G_ETSI1 CE -+ -+"New Zealand¯Ã¦èÄõ" NZ 2G_WORLD 5G_ETSI2 -+ -+"Norway®¿«Â" NO 2G_WORLD 5G_ETSI1 CE -+ -+"Panama¤Ú®³°¨ " PA 2G_FCC1 Voluntary -+ -+"Philippinesµá«ß»«" PH 2G_WORLD FCC TCF -+ -+"PolandªiÄõ" PL 2G_WORLD 5G_ETSI1 CE -+ -+"Portugal¸²µå¤ú" PT 2G_WORLD 5G_ETSI1 CE -+ -+"Romaniaù°¨¥§¨È" RO 2G_WORLD 5G_ETSI1 CE -+ -+"Russia«Xù´µ" RU 2G_WORLD 5G_ETSI3 CE TCF -+ -+"Saudi Arabia¨F¦aªü©Ô§B" SA 2G_WORLD CE TCF -+ -+"Singapore·s¥[©Y" SG 2G_WORLD -+ -+"Slovakia´µ¬¥¥ï§J" SK 2G_WORLD 5G_ETSI1 CE -+ -+"Slovenia´µ¬¥ºû¥§¨È" SI 2G_WORLD 5G_ETSI1 CE -+ -+"South Africa«n«D" ZA 2G_WORLD CE TCF -+ -+"Spain¦è¯Z¤ú" ES 5G_ETSI1 CE -+ -+"Sweden·ç¨å" SE 2G_WORLD 5G_ETSI1 CE -+ -+"Switzerland·ç¤h" CH 2G_WORLD 5G_ETSI1 CE -+ -+"Taiwan»OÆW" TW 2G_FCC1 5G_NCC1 NCC -+ -+"Thailand®õ°ê" TH 2G_WORLD FCC/CE TCF -+ -+"Turkey¤g¦Õ¨ä" TR 2G_WORLD -+ -+"Ukraine¯Q§JÄõ" UA 2G_WORLD Local Test -+ -+"United Kingdom­^°ê" GB 2G_WORLD 5G_ETSI1 CE ETSI -+ -+"United States¬ü°ê" US 2G_FCC1 5G_FCC7 FCC FCC -+ -+"Venezuela©e¤º·ç©Ô" VE 2G_WORLD 5G_FCC4 FCC TCF -+ -+"Vietnam¶V«n" VN 2G_WORLD FCC/CE TCF -+ -+ -+ -+*/ -+ -+// Counter abbervation. -+typedef enum _RT_COUNTRY_DEFINE_NUM -+{ -+ RT_CTRY_AL, // "Albaniaªüº¸¤Ú¥§¨È" -+ RT_CTRY_DZ, // "Algeriaªüº¸¤Î§Q¨È" -+ RT_CTRY_AG, // "Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F" -+ RT_CTRY_AR, // "Argentinaªü®Ú§Ê" -+ RT_CTRY_AM, // "Armenia¨È¬ü¥§¨È" -+ RT_CTRY_AW, // "Arubaªü¾|¤Ú®q" -+ RT_CTRY_AU, // "Australia¿D¬w" -+ RT_CTRY_AT, // "Austria¶ø¦a§Q" -+ RT_CTRY_AZ, // "Azerbaijanªü¶ë«ô¾Ê" -+ RT_CTRY_BS, // "Bahamas¤Ú«¢°¨" -+ RT_CTRY_BB, // "Barbados¤Ú¤Ú¦h´µ" -+ RT_CTRY_BE, // "Belgium¤ñ§Q®É" -+ RT_CTRY_BM, // "Bermuda¦Ê¼}¹F" -+ RT_CTRY_BR, // "Brazil¤Ú¦è" -+ RT_CTRY_BG, // "Bulgaria«O¥[§Q¨È" -+ RT_CTRY_CA, // "Canada¥[®³¤j" -+ RT_CTRY_KY, // "Cayman Islands¶}°Ò¸s®q" -+ RT_CTRY_CL, // "Chile´¼§Q" -+ RT_CTRY_CN, // "China¤¤°ê" -+ RT_CTRY_CO, // "Columbia­ô­Û¤ñ¨È" -+ RT_CTRY_CR, // "Costa Rica­ô´µ¹F¾¤¥[" -+ RT_CTRY_CY, // "Cyprus¶ë®ú¸ô´µ" -+ RT_CTRY_CZ, // "Czech ±¶§J" -+ RT_CTRY_DK, // "Denmark¤¦³Á" -+ RT_CTRY_DO, // "Dominican Republic¦h©ú¥§¥[¦@©M°ê" -+ RT_CTRY_CE, // "Egypt®J¤Î" EG 2G_WORLD -+ RT_CTRY_SV, // "El SalvadorÂĺ¸¥Ë¦h" -+ RT_CTRY_EE, // "Estonia·R¨F¥§¨È" -+ RT_CTRY_FI, // "FinlandªâÄõ" -+ RT_CTRY_FR, // "Franceªk°ê" -+ RT_CTRY_DE, // "Germany¼w°ê" -+ RT_CTRY_GR, // "Greece §Æþ" -+ RT_CTRY_GU, // "GuamÃö®q" -+ RT_CTRY_GT, // "Guatemala¥Ê¦a°¨©Ô" -+ RT_CTRY_HT, // "Haiti®ü¦a" -+ RT_CTRY_HN, // "Honduras§»³£©Ô´µ" -+ RT_CTRY_HU, // "Hungary¦I¤ú§Q" -+ RT_CTRY_IS, // "Iceland¦B®q" -+ RT_CTRY_IN, // "India¦L«×" -+ RT_CTRY_IE, // "Ireland·Rº¸Äõ" -+ RT_CTRY_IL, // "Israel¥H¦â¦C" -+ RT_CTRY_IT, // "Italy¸q¤j§Q" -+ RT_CTRY_JP, // "Japan¤é¥»" -+ RT_CTRY_KR, // "KoreaÁú°ê" -+ RT_CTRY_LV, // "Latvia©Ô²æºû¨È" -+ RT_CTRY_LT, // "Lithuania¥ß³³©{" -+ RT_CTRY_LU, // "Luxembourg¿c´Ë³ù" -+ RT_CTRY_MY, // "Malaysia°¨¨Ó¦è¨È" -+ RT_CTRY_MT, // "Malta°¨º¸¥L" -+ RT_CTRY_MX, // "Mexico¾¥¦è­ô" -+ RT_CTRY_MA, // "Morocco¼¯¬¥­ô" -+ RT_CTRY_NL, // "Netherlands²üÄõ" -+ RT_CTRY_NZ, // "New Zealand¯Ã¦èÄõ" -+ RT_CTRY_NO, // "Norway®¿«Â" -+ RT_CTRY_PA, // "Panama¤Ú®³°¨ " -+ RT_CTRY_PH, // "Philippinesµá«ß»«" -+ RT_CTRY_PL, // "PolandªiÄõ" -+ RT_CTRY_PT, // "Portugal¸²µå¤ú" -+ RT_CTRY_RO, // "Romaniaù°¨¥§¨È" -+ RT_CTRY_RU, // "Russia«Xù´µ" -+ RT_CTRY_SA, // "Saudi Arabia¨F¦aªü©Ô§B" -+ RT_CTRY_SG, // "Singapore·s¥[©Y" -+ RT_CTRY_SK, // "Slovakia´µ¬¥¥ï§J" -+ RT_CTRY_SI, // "Slovenia´µ¬¥ºû¥§¨È" -+ RT_CTRY_ZA, // "South Africa«n«D" -+ RT_CTRY_ES, // "Spain¦è¯Z¤ú" -+ RT_CTRY_SE, // "Sweden·ç¨å" -+ RT_CTRY_CH, // "Switzerland·ç¤h" -+ RT_CTRY_TW, // "Taiwan»OÆW" -+ RT_CTRY_TH, // "Thailand®õ°ê" -+ RT_CTRY_TR, // "Turkey¤g¦Õ¨ä" -+ RT_CTRY_UA, // "Ukraine¯Q§JÄõ" -+ RT_CTRY_GB, // "United Kingdom­^°ê" -+ RT_CTRY_US, // "United States¬ü°ê" -+ RT_CTRY_VE, // "Venezuela©e¤º·ç©Ô" -+ RT_CTRY_VN, // "Vietnam¶V«n" -+ RT_CTRY_MAX, // -+ -+}RT_COUNTRY_NAME, *PRT_COUNTRY_NAME; -+ -+// Scan type including active and passive scan. -+typedef enum _RT_SCAN_TYPE_NEW -+{ -+ SCAN_NULL, -+ SCAN_ACT, -+ SCAN_PAS, -+ SCAN_BOTH, -+}RT_SCAN_TYPE_NEW, *PRT_SCAN_TYPE_NEW; -+ -+ -+// Power table sample. -+ -+typedef struct _RT_CHNL_PLAN_LIMIT -+{ -+ u2Byte Chnl_Start; -+ u2Byte Chnl_end; -+ -+ u2Byte Freq_Start; -+ u2Byte Freq_end; -+}RT_CHNL_PLAN_LIMIT, *PRT_CHNL_PLAN_LIMIT; -+ -+ -+// -+// 2.4G Regulatory Domains -+// -+typedef enum _RT_REGULATION_DOMAIN_2G -+{ -+ RT_2G_NULL, -+ RT_2G_WORLD, -+ RT_2G_ETSI1, -+ RT_2G_FCC1, -+ RT_2G_MKK1, -+ RT_2G_ETSI2 -+ -+}RT_REGULATION_2G, *PRT_REGULATION_2G; -+ -+ -+//typedef struct _RT_CHANNEL_BEHAVIOR -+//{ -+// u1Byte Chnl; -+// RT_SCAN_TYPE_NEW -+// -+//}RT_CHANNEL_BEHAVIOR, *PRT_CHANNEL_BEHAVIOR; -+ -+//typedef struct _RT_CHANNEL_PLAN_TYPE -+//{ -+// RT_CHANNEL_BEHAVIOR -+// u1Byte Chnl_num; -+//}RT_CHNL_PLAN_TYPE, *PRT_CHNL_PLAN_TYPE; -+ -+// -+// 2.4G Channel Number -+// Channel definition & number -+// -+#define CHNL_RT_2G_NULL \ -+ {0}, 0 -+#define CHNL_RT_2G_WORLD \ -+ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 -+#define CHNL_RT_2G_WORLD_TEST \ -+ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 -+ -+#define CHNL_RT_2G_EFSI1 \ -+ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 -+#define CHNL_RT_2G_FCC1 \ -+ {1,2,3,4,5,6,7,8,9,10,11}, 11 -+#define CHNL_RT_2G_MKK1 \ -+ {1,2,3,4,5,6,7,8,9,10,11,12,13,14}, 14 -+#define CHNL_RT_2G_ETSI2 \ -+ {10,11,12,13}, 4 -+ -+// -+// 2.4G Channel Active or passive scan. -+// -+#define CHNL_RT_2G_NULL_SCAN_TYPE \ -+ {SCAN_NULL} -+#define CHNL_RT_2G_WORLD_SCAN_TYPE \ -+ {1,1,1,1,1,1,1,1,1,1,1,0,0} -+#define CHNL_RT_2G_EFSI1_SCAN_TYPE \ -+ {1,1,1,1,1,1,1,1,1,1,1,1,1} -+#define CHNL_RT_2G_FCC1_SCAN_TYPE \ -+ {1,1,1,1,1,1,1,1,1,1,1} -+#define CHNL_RT_2G_MKK1_SCAN_TYPE \ -+ {1,1,1,1,1,1,1,1,1,1,1,1,1,1} -+#define CHNL_RT_2G_ETSI2_SCAN_TYPE \ -+ {1,1,1,1} -+ -+ -+// -+// 2.4G Band & Frequency Section -+// Freqency start & end / band number -+// -+#define FREQ_RT_2G_NULL \ -+ {0}, 0 -+ // Passive scan CH 12, 13 -+#define FREQ_RT_2G_WORLD \ -+ {2412, 2472}, 1 -+#define FREQ_RT_2G_EFSI1 \ -+ {2412, 2472}, 1 -+#define FREQ_RT_2G_FCC1 \ -+ {2412, 2462}, 1 -+#define FREQ_RT_2G_MKK1 \ -+ {2412, 2484}, 1 -+#define FREQ_RT_2G_ETSI2 \ -+ {2457, 2472}, 1 -+ -+ -+// -+// 5G Regulatory Domains -+// -+typedef enum _RT_REGULATION_DOMAIN_5G -+{ -+ RT_5G_NULL, -+ RT_5G_WORLD, -+ RT_5G_ETSI1, -+ RT_5G_ETSI2, -+ RT_5G_ETSI3, -+ RT_5G_FCC1, -+ RT_5G_FCC2, -+ RT_5G_FCC3, -+ RT_5G_FCC4, -+ RT_5G_FCC5, -+ RT_5G_FCC6, -+ RT_5G_FCC7, -+ RT_5G_IC1, -+ RT_5G_KCC1, -+ RT_5G_MKK1, -+ RT_5G_MKK2, -+ RT_5G_MKK3, -+ RT_5G_NCC1, -+ -+}RT_REGULATION_5G, *PRT_REGULATION_5G; -+ -+// -+// 5G Channel Number -+// -+#define CHNL_RT_5G_NULL \ -+ {0}, 0 -+#define CHNL_RT_5G_WORLD \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 -+#define CHNL_RT_5G_ETSI1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 -+#define CHNL_RT_5G_ETSI2 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 -+#define CHNL_RT_5G_ETSI3 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 -+#define CHNL_RT_5G_FCC1 \ -+ {36,40,44,48,149,153,157,161,165}, 9 -+#define CHNL_RT_5G_FCC2 \ -+ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 -+#define CHNL_RT_5G_FCC3 \ -+ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 -+#define CHNL_RT_5G_FCC4 \ -+ {149,153,157,161,165}, 5 -+#define CHNL_RT_5G_FCC5 \ -+ {36,40,44,48,52,56,60,64}, 8 -+#define CHNL_RT_5G_FCC6 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 -+#define CHNL_RT_5G_FCC7 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 -+#define CHNL_RT_5G_IC1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 -+#define CHNL_RT_5G_KCC1 \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 -+#define CHNL_RT_5G_MKK1 \ -+ {36,40,44,48,52,56,60,64}, 8 -+#define CHNL_RT_5G_MKK2 \ -+ {100,104,108,112,116,120,124,128,132,136,140}, 11 -+#define CHNL_RT_5G_MKK3 \ -+ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 -+#define CHNL_RT_5G_NCC1 \ -+ {56,60,64,149,153,157,161,165}, 8 -+ -+// -+// 5G Channel Active or passive scan. -+// -+#define CHNL_RT_5G_NULL_SCAN_TYPE \ -+ {SCAN_NULL} -+#define CHNL_RT_5G_WORLD_SCAN_TYPE \ -+ {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} -+#define CHNL_RT_5G_ETSI1_SCAN_TYPE \ -+ {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} -+#define CHNL_RT_5G_ETSI2_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 -+#define CHNL_RT_5G_ETSI3_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 -+#define CHNL_RT_5G_FCC1_SCAN_TYPE \ -+ {36,40,44,48,149,153,157,161,165}, 9 -+#define CHNL_RT_5G_FCC2_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 -+#define CHNL_RT_5G_FCC3_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 -+#define CHNL_RT_5G_FCC4_SCAN_TYPE \ -+ {149,153,157,161,165}, 5 -+#define CHNL_RT_5G_FCC5_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64}, 8 -+#define CHNL_RT_5G_FCC6_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 -+#define CHNL_RT_5G_FCC7_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 -+#define CHNL_RT_5G_IC1_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 -+#define CHNL_RT_5G_KCC1_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 -+#define CHNL_RT_5G_MKK1_SCAN_TYPE \ -+ {36,40,44,48,52,56,60,64}, 8 -+#define CHNL_RT_5G_MKK2_SCAN_TYPE \ -+ {100,104,108,112,116,120,124,128,132,136,140}, 11 -+#define CHNL_RT_5G_MKK3_SCAN_TYPE \ -+ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 -+#define CHNL_RT_5G_NCC1_SCAN_TYPE \ -+ {56,60,64,149,153,157,161,165}, 8 -+ -+// -+// Global Regulation -+// -+typedef enum _RT_REGULATION_COMMON -+{ -+ RT_WORLD, -+ RT_FCC, -+ RT_MKK, -+ RT_ETSI, -+ RT_IC, -+ RT_CE, -+ RT_NCC, -+ -+}RT_REGULATION_CMN, *PRT_REGULATION_CMN; -+ -+ -+ -+// -+// Special requirement for different regulation domain. -+// For internal test or customerize special request. -+// -+typedef enum _RT_CHNLPLAN_SREQ -+{ -+ RT_SREQ_NA = 0x0, -+ RT_SREQ_2G_ADHOC_11N = 0x00000001, -+ RT_SREQ_2G_ADHOC_11B = 0x00000002, -+ RT_SREQ_2G_ALL_PASS = 0x00000004, -+ RT_SREQ_2G_ALL_ACT = 0x00000008, -+ RT_SREQ_5G_ADHOC_11N = 0x00000010, -+ RT_SREQ_5G_ADHOC_11AC = 0x00000020, -+ RT_SREQ_5G_ALL_PASS = 0x00000040, -+ RT_SREQ_5G_ALL_ACT = 0x00000080, -+ RT_SREQ_C1_PLAN = 0x00000100, -+ RT_SREQ_C2_PLAN = 0x00000200, -+ RT_SREQ_C3_PLAN = 0x00000400, -+ RT_SREQ_C4_PLAN = 0x00000800, -+ RT_SREQ_NFC_ON = 0x00001000, -+ RT_SREQ_MASK = 0x0000FFFF, /* Requirements bit mask */ -+ -+}RT_CHNLPLAN_SREQ, *PRT_CHNLPLAN_SREQ; -+ -+ -+// -+// RT_COUNTRY_NAME & RT_REGULATION_2G & RT_REGULATION_5G transfer table -+// -+// -+typedef struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE -+{ -+ // -+ // Define countery domain and corresponding -+ // -+ RT_COUNTRY_NAME Country_Enum; -+ char Country_Name[3]; -+ -+ //char Domain_Name[12]; -+ RT_REGULATION_2G Domain_2G; -+ -+ RT_REGULATION_5G Domain_5G; -+ -+ RT_CHANNEL_DOMAIN RtChDomain; -+ //u1Byte Country_Area; -+ -+}RT_CHNL_CTRY_TBL, *PRT_CHNL_CTRY_TBL; -+ -+ -+#define RT_MAX_CHNL_NUM_2G 13 -+#define RT_MAX_CHNL_NUM_5G 44 -+ -+// Power table sample. -+ -+typedef struct _RT_CHNL_PLAN_PWR_LIMIT -+{ -+ u2Byte Chnl_Start; -+ u2Byte Chnl_end; -+ u1Byte dB_Max; -+ u2Byte mW_Max; -+}RT_CHNL_PWR_LIMIT, *PRT_CHNL_PWR_LIMIT; -+ -+ -+#define RT_MAX_BAND_NUM 5 -+ -+typedef struct _RT_CHANNEL_PLAN_MAXPWR -+{ -+// STRING_T -+ RT_CHNL_PWR_LIMIT Chnl[RT_MAX_BAND_NUM]; -+ u1Byte Band_Useful_Num; -+ -+ -+}RT_CHANNEL_PLAN_MAXPWR, *PRT_CHANNEL_PLAN_MAXPWR; -+ -+ -+// -+// Power By Rate Table. -+// -+ -+ -+ -+typedef struct _RT_CHANNEL_PLAN_NEW -+{ -+ // -+ // Define countery domain and corresponding -+ // -+ //char Country_Name[36]; -+ //u1Byte Country_Enum; -+ -+ //char Domain_Name[12]; -+ -+ -+ PRT_CHNL_CTRY_TBL pCtryTransfer; -+ -+ RT_CHANNEL_DOMAIN RtChDomain; -+ -+ RT_REGULATION_2G Domain_2G; -+ -+ RT_REGULATION_5G Domain_5G; -+ -+ RT_REGULATION_CMN Regulator; -+ -+ RT_CHNLPLAN_SREQ ChnlSreq; -+ -+ //RT_CHNL_PLAN_LIMIT RtChnl; -+ -+ u1Byte Chnl2G[MAX_CHANNEL_NUM]; // CHNL_RT_2G_WORLD -+ u1Byte Len2G; -+ u1Byte Chnl2GScanTp[MAX_CHANNEL_NUM]; // CHNL_RT_2G_WORLD_SCAN_TYPE -+ //u1Byte Freq2G[2]; // FREQ_RT_2G_WORLD -+ -+ u1Byte Chnl5G[MAX_CHANNEL_NUM]; -+ u1Byte Len5G; -+ u1Byte Chnl5GScanTp[MAX_CHANNEL_NUM]; -+ //u1Byte Freq2G[2]; // FREQ_RT_2G_WORLD -+ -+ RT_CHANNEL_PLAN_MAXPWR ChnlMaxPwr; -+ -+ -+}RT_CHANNEL_PLAN_NEW, *PRT_CHANNEL_PLAN_NEW; -+ -+ -+#endif // __RT_CHANNELPLAN_H__ -+ -+ -+ -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __RT_CHANNELPLAN_H__ ++#define __RT_CHANNELPLAN_H__ ++ ++typedef enum _RT_CHANNEL_DOMAIN_NEW ++{ ++ ++ //===== Add new channel plan above this line ===============// ++ ++ // For new architecture we define different 2G/5G CH area for all country. ++ // 2.4 G only ++ RT_CHANNEL_DOMAIN_2G_WORLD_5G_NULL = 0x20, ++ RT_CHANNEL_DOMAIN_2G_ETSI1_5G_NULL = 0x21, ++ RT_CHANNEL_DOMAIN_2G_FCC1_5G_NULL = 0x22, ++ RT_CHANNEL_DOMAIN_2G_MKK1_5G_NULL = 0x23, ++ RT_CHANNEL_DOMAIN_2G_ETSI2_5G_NULL = 0x24, ++ // 2.4 G + 5G type 1 ++ RT_CHANNEL_DOMAIN_2G_FCC1_5G_FCC1 = 0x25, ++ RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1 = 0x26, ++ //RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1 = 0x27, ++ // ..... ++ ++ RT_CHANNEL_DOMAIN_MAX_NEW, ++ ++}RT_CHANNEL_DOMAIN_NEW, *PRT_CHANNEL_DOMAIN_NEW; ++ ++ ++#if 0 ++#define DOMAIN_CODE_2G_WORLD \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define DOMAIN_CODE_2G_ETSI1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define DOMAIN_CODE_2G_ETSI2 \ ++ {1,2,3,4,5,6,7,8,9,10,11}, 11 ++#define DOMAIN_CODE_2G_FCC1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14}, 14 ++#define DOMAIN_CODE_2G_MKK1 \ ++ {10,11,12,13}, 4 ++ ++#define DOMAIN_CODE_5G_ETSI1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define DOMAIN_CODE_5G_ETSI2 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define DOMAIN_CODE_5G_ETSI3 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 ++#define DOMAIN_CODE_5G_FCC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define DOMAIN_CODE_5G_FCC2 \ ++ {36,40,44,48,149,153,157,161,165}, 9 ++#define DOMAIN_CODE_5G_FCC3 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 ++#define DOMAIN_CODE_5G_FCC4 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 ++#define DOMAIN_CODE_5G_FCC5 \ ++ {149,153,157,161,165}, 5 ++#define DOMAIN_CODE_5G_FCC6 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define DOMAIN_CODE_5G_FCC7 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define DOMAIN_CODE_5G_IC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define DOMAIN_CODE_5G_KCC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 ++#define DOMAIN_CODE_5G_MKK1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define DOMAIN_CODE_5G_MKK2 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define DOMAIN_CODE_5G_MKK3 \ ++ {100,104,108,112,116,120,124,128,132,136,140}, 11 ++#define DOMAIN_CODE_5G_NCC1 \ ++ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 ++#define DOMAIN_CODE_5G_NCC2 \ ++ {56,60,64,149,153,157,161,165}, 8 ++#define UNDEFINED \ ++ {0}, 0 ++#endif ++ ++// ++// ++// ++/* ++ ++Countries "Country Abbreviation" Domain Code SKU's Ch# of 20MHz ++ 2G 5G Ch# of 40MHz ++"Albaniaªüº¸¤Ú¥§¨È" AL Local Test ++ ++"Algeriaªüº¸¤Î§Q¨È" DZ CE TCF ++ ++"Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F" AG 2G_WORLD FCC TCF ++ ++"Argentinaªü®Ú§Ê" AR 2G_WORLD Local Test ++ ++"Armenia¨È¬ü¥§¨È" AM 2G_WORLD ETSI ++ ++"Arubaªü¾|¤Ú®q" AW 2G_WORLD FCC TCF ++ ++"Australia¿D¬w" AU 2G_WORLD 5G_ETSI2 ++ ++"Austria¶ø¦a§Q" AT 2G_WORLD 5G_ETSI1 CE ++ ++"Azerbaijanªü¶ë«ô¾Ê" AZ 2G_WORLD CE TCF ++ ++"Bahamas¤Ú«¢°¨" BS 2G_WORLD ++ ++"Barbados¤Ú¤Ú¦h´µ" BB 2G_WORLD FCC TCF ++ ++"Belgium¤ñ§Q®É" BE 2G_WORLD 5G_ETSI1 CE ++ ++"Bermuda¦Ê¼}¹F" BM 2G_WORLD FCC TCF ++ ++"Brazil¤Ú¦è" BR 2G_WORLD Local Test ++ ++"Bulgaria«O¥[§Q¨È" BG 2G_WORLD 5G_ETSI1 CE ++ ++"Canada¥[®³¤j" CA 2G_FCC1 5G_FCC7 IC / FCC IC / FCC ++ ++"Cayman Islands¶}°Ò¸s®q" KY 2G_WORLD 5G_ETSI1 CE ++ ++"Chile´¼§Q" CL 2G_WORLD FCC TCF ++ ++"China¤¤°ê" CN 2G_WORLD 5G_FCC5 «H³¡?¡i2002¡j353? ++ ++"Columbia­ô­Û¤ñ¨È" CO 2G_WORLD Voluntary ++ ++"Costa Rica­ô´µ¹F¾¤¥[" CR 2G_WORLD FCC TCF ++ ++"Cyprus¶ë®ú¸ô´µ" CY 2G_WORLD 5G_ETSI1 CE ++ ++"Czech ±¶§J" CZ 2G_WORLD 5G_ETSI1 CE ++ ++"Denmark¤¦³Á" DK 2G_WORLD 5G_ETSI1 CE ++ ++"Dominican Republic¦h©ú¥§¥[¦@©M°ê" DO 2G_WORLD FCC TCF ++ ++"Egypt®J¤Î" EG 2G_WORLD CE T CF ++ ++"El SalvadorÂĺ¸¥Ë¦h" SV 2G_WORLD Voluntary ++ ++"Estonia·R¨F¥§¨È" EE 2G_WORLD 5G_ETSI1 CE ++ ++"FinlandªâÄõ" FI 2G_WORLD 5G_ETSI1 CE ++ ++"Franceªk°ê" FR 5G_E TSI1 CE ++ ++"Germany¼w°ê" DE 2G_WORLD 5G_ETSI1 CE ++ ++"Greece §Æþ" GR 2G_WORLD 5G_ETSI1 CE ++ ++"GuamÃö®q" GU 2G_WORLD ++ ++"Guatemala¥Ê¦a°¨©Ô" GT 2G_WORLD ++ ++"Haiti®ü¦a" HT 2G_WORLD FCC TCF ++ ++"Honduras§»³£©Ô´µ" HN 2G_WORLD FCC TCF ++ ++"Hungary¦I¤ú§Q" HU 2G_WORLD 5G_ETSI1 CE ++ ++"Iceland¦B®q" IS 2G_WORLD 5G_ETSI1 CE ++ ++"India¦L«×" IN 2G_WORLD 5G_FCC3 FCC/CE TCF ++ ++"Ireland·Rº¸Äõ" IE 2G_WORLD 5G_ETSI1 CE ++ ++"Israel¥H¦â¦C" IL 5G_F CC6 CE TCF ++ ++"Italy¸q¤j§Q" IT 2G_WORLD 5G_ETSI1 CE ++ ++"Japan¤é¥»" JP 2G_MKK1 5G_MKK1 MKK MKK ++ ++"KoreaÁú°ê" KR 2G_WORLD 5G_KCC1 KCC KCC ++ ++"Latvia©Ô²æºû¨È" LV 2G_WORLD 5G_ETSI1 CE ++ ++"Lithuania¥ß³³©{" LT 2G_WORLD 5G_ETSI1 CE ++ ++"Luxembourg¿c´Ë³ù" LU 2G_WORLD 5G_ETSI1 CE ++ ++"Malaysia°¨¨Ó¦è¨È" MY 2G_WORLD Local Test ++ ++"Malta°¨º¸¥L" MT 2G_WORLD 5G_ETSI1 CE ++ ++"Mexico¾¥¦è­ô" MX 2G_WORLD 5G_FCC3 Local Test ++ ++"Morocco¼¯¬¥­ô" MA CE TCF ++ ++"Netherlands²üÄõ" NL 2G_WORLD 5G_ETSI1 CE ++ ++"New Zealand¯Ã¦èÄõ" NZ 2G_WORLD 5G_ETSI2 ++ ++"Norway®¿«Â" NO 2G_WORLD 5G_ETSI1 CE ++ ++"Panama¤Ú®³°¨ " PA 2G_FCC1 Voluntary ++ ++"Philippinesµá«ß»«" PH 2G_WORLD FCC TCF ++ ++"PolandªiÄõ" PL 2G_WORLD 5G_ETSI1 CE ++ ++"Portugal¸²µå¤ú" PT 2G_WORLD 5G_ETSI1 CE ++ ++"Romaniaù°¨¥§¨È" RO 2G_WORLD 5G_ETSI1 CE ++ ++"Russia«Xù´µ" RU 2G_WORLD 5G_ETSI3 CE TCF ++ ++"Saudi Arabia¨F¦aªü©Ô§B" SA 2G_WORLD CE TCF ++ ++"Singapore·s¥[©Y" SG 2G_WORLD ++ ++"Slovakia´µ¬¥¥ï§J" SK 2G_WORLD 5G_ETSI1 CE ++ ++"Slovenia´µ¬¥ºû¥§¨È" SI 2G_WORLD 5G_ETSI1 CE ++ ++"South Africa«n«D" ZA 2G_WORLD CE TCF ++ ++"Spain¦è¯Z¤ú" ES 5G_ETSI1 CE ++ ++"Sweden·ç¨å" SE 2G_WORLD 5G_ETSI1 CE ++ ++"Switzerland·ç¤h" CH 2G_WORLD 5G_ETSI1 CE ++ ++"Taiwan»OÆW" TW 2G_FCC1 5G_NCC1 NCC ++ ++"Thailand®õ°ê" TH 2G_WORLD FCC/CE TCF ++ ++"Turkey¤g¦Õ¨ä" TR 2G_WORLD ++ ++"Ukraine¯Q§JÄõ" UA 2G_WORLD Local Test ++ ++"United Kingdom­^°ê" GB 2G_WORLD 5G_ETSI1 CE ETSI ++ ++"United States¬ü°ê" US 2G_FCC1 5G_FCC7 FCC FCC ++ ++"Venezuela©e¤º·ç©Ô" VE 2G_WORLD 5G_FCC4 FCC TCF ++ ++"Vietnam¶V«n" VN 2G_WORLD FCC/CE TCF ++ ++ ++ ++*/ ++ ++// Counter abbervation. ++typedef enum _RT_COUNTRY_DEFINE_NUM ++{ ++ RT_CTRY_AL, // "Albaniaªüº¸¤Ú¥§¨È" ++ RT_CTRY_DZ, // "Algeriaªüº¸¤Î§Q¨È" ++ RT_CTRY_AG, // "Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F" ++ RT_CTRY_AR, // "Argentinaªü®Ú§Ê" ++ RT_CTRY_AM, // "Armenia¨È¬ü¥§¨È" ++ RT_CTRY_AW, // "Arubaªü¾|¤Ú®q" ++ RT_CTRY_AU, // "Australia¿D¬w" ++ RT_CTRY_AT, // "Austria¶ø¦a§Q" ++ RT_CTRY_AZ, // "Azerbaijanªü¶ë«ô¾Ê" ++ RT_CTRY_BS, // "Bahamas¤Ú«¢°¨" ++ RT_CTRY_BB, // "Barbados¤Ú¤Ú¦h´µ" ++ RT_CTRY_BE, // "Belgium¤ñ§Q®É" ++ RT_CTRY_BM, // "Bermuda¦Ê¼}¹F" ++ RT_CTRY_BR, // "Brazil¤Ú¦è" ++ RT_CTRY_BG, // "Bulgaria«O¥[§Q¨È" ++ RT_CTRY_CA, // "Canada¥[®³¤j" ++ RT_CTRY_KY, // "Cayman Islands¶}°Ò¸s®q" ++ RT_CTRY_CL, // "Chile´¼§Q" ++ RT_CTRY_CN, // "China¤¤°ê" ++ RT_CTRY_CO, // "Columbia­ô­Û¤ñ¨È" ++ RT_CTRY_CR, // "Costa Rica­ô´µ¹F¾¤¥[" ++ RT_CTRY_CY, // "Cyprus¶ë®ú¸ô´µ" ++ RT_CTRY_CZ, // "Czech ±¶§J" ++ RT_CTRY_DK, // "Denmark¤¦³Á" ++ RT_CTRY_DO, // "Dominican Republic¦h©ú¥§¥[¦@©M°ê" ++ RT_CTRY_CE, // "Egypt®J¤Î" EG 2G_WORLD ++ RT_CTRY_SV, // "El SalvadorÂĺ¸¥Ë¦h" ++ RT_CTRY_EE, // "Estonia·R¨F¥§¨È" ++ RT_CTRY_FI, // "FinlandªâÄõ" ++ RT_CTRY_FR, // "Franceªk°ê" ++ RT_CTRY_DE, // "Germany¼w°ê" ++ RT_CTRY_GR, // "Greece §Æþ" ++ RT_CTRY_GU, // "GuamÃö®q" ++ RT_CTRY_GT, // "Guatemala¥Ê¦a°¨©Ô" ++ RT_CTRY_HT, // "Haiti®ü¦a" ++ RT_CTRY_HN, // "Honduras§»³£©Ô´µ" ++ RT_CTRY_HU, // "Hungary¦I¤ú§Q" ++ RT_CTRY_IS, // "Iceland¦B®q" ++ RT_CTRY_IN, // "India¦L«×" ++ RT_CTRY_IE, // "Ireland·Rº¸Äõ" ++ RT_CTRY_IL, // "Israel¥H¦â¦C" ++ RT_CTRY_IT, // "Italy¸q¤j§Q" ++ RT_CTRY_JP, // "Japan¤é¥»" ++ RT_CTRY_KR, // "KoreaÁú°ê" ++ RT_CTRY_LV, // "Latvia©Ô²æºû¨È" ++ RT_CTRY_LT, // "Lithuania¥ß³³©{" ++ RT_CTRY_LU, // "Luxembourg¿c´Ë³ù" ++ RT_CTRY_MY, // "Malaysia°¨¨Ó¦è¨È" ++ RT_CTRY_MT, // "Malta°¨º¸¥L" ++ RT_CTRY_MX, // "Mexico¾¥¦è­ô" ++ RT_CTRY_MA, // "Morocco¼¯¬¥­ô" ++ RT_CTRY_NL, // "Netherlands²üÄõ" ++ RT_CTRY_NZ, // "New Zealand¯Ã¦èÄõ" ++ RT_CTRY_NO, // "Norway®¿«Â" ++ RT_CTRY_PA, // "Panama¤Ú®³°¨ " ++ RT_CTRY_PH, // "Philippinesµá«ß»«" ++ RT_CTRY_PL, // "PolandªiÄõ" ++ RT_CTRY_PT, // "Portugal¸²µå¤ú" ++ RT_CTRY_RO, // "Romaniaù°¨¥§¨È" ++ RT_CTRY_RU, // "Russia«Xù´µ" ++ RT_CTRY_SA, // "Saudi Arabia¨F¦aªü©Ô§B" ++ RT_CTRY_SG, // "Singapore·s¥[©Y" ++ RT_CTRY_SK, // "Slovakia´µ¬¥¥ï§J" ++ RT_CTRY_SI, // "Slovenia´µ¬¥ºû¥§¨È" ++ RT_CTRY_ZA, // "South Africa«n«D" ++ RT_CTRY_ES, // "Spain¦è¯Z¤ú" ++ RT_CTRY_SE, // "Sweden·ç¨å" ++ RT_CTRY_CH, // "Switzerland·ç¤h" ++ RT_CTRY_TW, // "Taiwan»OÆW" ++ RT_CTRY_TH, // "Thailand®õ°ê" ++ RT_CTRY_TR, // "Turkey¤g¦Õ¨ä" ++ RT_CTRY_UA, // "Ukraine¯Q§JÄõ" ++ RT_CTRY_GB, // "United Kingdom­^°ê" ++ RT_CTRY_US, // "United States¬ü°ê" ++ RT_CTRY_VE, // "Venezuela©e¤º·ç©Ô" ++ RT_CTRY_VN, // "Vietnam¶V«n" ++ RT_CTRY_MAX, // ++ ++}RT_COUNTRY_NAME, *PRT_COUNTRY_NAME; ++ ++// Scan type including active and passive scan. ++typedef enum _RT_SCAN_TYPE_NEW ++{ ++ SCAN_NULL, ++ SCAN_ACT, ++ SCAN_PAS, ++ SCAN_BOTH, ++}RT_SCAN_TYPE_NEW, *PRT_SCAN_TYPE_NEW; ++ ++ ++// Power table sample. ++ ++typedef struct _RT_CHNL_PLAN_LIMIT ++{ ++ u2Byte Chnl_Start; ++ u2Byte Chnl_end; ++ ++ u2Byte Freq_Start; ++ u2Byte Freq_end; ++}RT_CHNL_PLAN_LIMIT, *PRT_CHNL_PLAN_LIMIT; ++ ++ ++// ++// 2.4G Regulatory Domains ++// ++typedef enum _RT_REGULATION_DOMAIN_2G ++{ ++ RT_2G_NULL, ++ RT_2G_WORLD, ++ RT_2G_ETSI1, ++ RT_2G_FCC1, ++ RT_2G_MKK1, ++ RT_2G_ETSI2 ++ ++}RT_REGULATION_2G, *PRT_REGULATION_2G; ++ ++ ++//typedef struct _RT_CHANNEL_BEHAVIOR ++//{ ++// u1Byte Chnl; ++// RT_SCAN_TYPE_NEW ++// ++//}RT_CHANNEL_BEHAVIOR, *PRT_CHANNEL_BEHAVIOR; ++ ++//typedef struct _RT_CHANNEL_PLAN_TYPE ++//{ ++// RT_CHANNEL_BEHAVIOR ++// u1Byte Chnl_num; ++//}RT_CHNL_PLAN_TYPE, *PRT_CHNL_PLAN_TYPE; ++ ++// ++// 2.4G Channel Number ++// Channel definition & number ++// ++#define CHNL_RT_2G_NULL \ ++ {0}, 0 ++#define CHNL_RT_2G_WORLD \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define CHNL_RT_2G_WORLD_TEST \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++ ++#define CHNL_RT_2G_EFSI1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define CHNL_RT_2G_FCC1 \ ++ {1,2,3,4,5,6,7,8,9,10,11}, 11 ++#define CHNL_RT_2G_MKK1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14}, 14 ++#define CHNL_RT_2G_ETSI2 \ ++ {10,11,12,13}, 4 ++ ++// ++// 2.4G Channel Active or passive scan. ++// ++#define CHNL_RT_2G_NULL_SCAN_TYPE \ ++ {SCAN_NULL} ++#define CHNL_RT_2G_WORLD_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,0,0} ++#define CHNL_RT_2G_EFSI1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_2G_FCC1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_2G_MKK1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_2G_ETSI2_SCAN_TYPE \ ++ {1,1,1,1} ++ ++ ++// ++// 2.4G Band & Frequency Section ++// Freqency start & end / band number ++// ++#define FREQ_RT_2G_NULL \ ++ {0}, 0 ++ // Passive scan CH 12, 13 ++#define FREQ_RT_2G_WORLD \ ++ {2412, 2472}, 1 ++#define FREQ_RT_2G_EFSI1 \ ++ {2412, 2472}, 1 ++#define FREQ_RT_2G_FCC1 \ ++ {2412, 2462}, 1 ++#define FREQ_RT_2G_MKK1 \ ++ {2412, 2484}, 1 ++#define FREQ_RT_2G_ETSI2 \ ++ {2457, 2472}, 1 ++ ++ ++// ++// 5G Regulatory Domains ++// ++typedef enum _RT_REGULATION_DOMAIN_5G ++{ ++ RT_5G_NULL, ++ RT_5G_WORLD, ++ RT_5G_ETSI1, ++ RT_5G_ETSI2, ++ RT_5G_ETSI3, ++ RT_5G_FCC1, ++ RT_5G_FCC2, ++ RT_5G_FCC3, ++ RT_5G_FCC4, ++ RT_5G_FCC5, ++ RT_5G_FCC6, ++ RT_5G_FCC7, ++ RT_5G_IC1, ++ RT_5G_KCC1, ++ RT_5G_MKK1, ++ RT_5G_MKK2, ++ RT_5G_MKK3, ++ RT_5G_NCC1, ++ ++}RT_REGULATION_5G, *PRT_REGULATION_5G; ++ ++// ++// 5G Channel Number ++// ++#define CHNL_RT_5G_NULL \ ++ {0}, 0 ++#define CHNL_RT_5G_WORLD \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define CHNL_RT_5G_ETSI1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_ETSI2 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 ++#define CHNL_RT_5G_ETSI3 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_FCC1 \ ++ {36,40,44,48,149,153,157,161,165}, 9 ++#define CHNL_RT_5G_FCC2 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 ++#define CHNL_RT_5G_FCC3 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 ++#define CHNL_RT_5G_FCC4 \ ++ {149,153,157,161,165}, 5 ++#define CHNL_RT_5G_FCC5 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_FCC6 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_FCC7 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_IC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_KCC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define CHNL_RT_5G_MKK1 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_MKK2 \ ++ {100,104,108,112,116,120,124,128,132,136,140}, 11 ++#define CHNL_RT_5G_MKK3 \ ++ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_NCC1 \ ++ {56,60,64,149,153,157,161,165}, 8 ++ ++// ++// 5G Channel Active or passive scan. ++// ++#define CHNL_RT_5G_NULL_SCAN_TYPE \ ++ {SCAN_NULL} ++#define CHNL_RT_5G_WORLD_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_5G_ETSI1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_5G_ETSI2_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 ++#define CHNL_RT_5G_ETSI3_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_FCC1_SCAN_TYPE \ ++ {36,40,44,48,149,153,157,161,165}, 9 ++#define CHNL_RT_5G_FCC2_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 ++#define CHNL_RT_5G_FCC3_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 ++#define CHNL_RT_5G_FCC4_SCAN_TYPE \ ++ {149,153,157,161,165}, 5 ++#define CHNL_RT_5G_FCC5_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_FCC6_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_FCC7_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_IC1_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_KCC1_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define CHNL_RT_5G_MKK1_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_MKK2_SCAN_TYPE \ ++ {100,104,108,112,116,120,124,128,132,136,140}, 11 ++#define CHNL_RT_5G_MKK3_SCAN_TYPE \ ++ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_NCC1_SCAN_TYPE \ ++ {56,60,64,149,153,157,161,165}, 8 ++ ++// ++// Global Regulation ++// ++typedef enum _RT_REGULATION_COMMON ++{ ++ RT_WORLD, ++ RT_FCC, ++ RT_MKK, ++ RT_ETSI, ++ RT_IC, ++ RT_CE, ++ RT_NCC, ++ ++}RT_REGULATION_CMN, *PRT_REGULATION_CMN; ++ ++ ++ ++// ++// Special requirement for different regulation domain. ++// For internal test or customerize special request. ++// ++typedef enum _RT_CHNLPLAN_SREQ ++{ ++ RT_SREQ_NA = 0x0, ++ RT_SREQ_2G_ADHOC_11N = 0x00000001, ++ RT_SREQ_2G_ADHOC_11B = 0x00000002, ++ RT_SREQ_2G_ALL_PASS = 0x00000004, ++ RT_SREQ_2G_ALL_ACT = 0x00000008, ++ RT_SREQ_5G_ADHOC_11N = 0x00000010, ++ RT_SREQ_5G_ADHOC_11AC = 0x00000020, ++ RT_SREQ_5G_ALL_PASS = 0x00000040, ++ RT_SREQ_5G_ALL_ACT = 0x00000080, ++ RT_SREQ_C1_PLAN = 0x00000100, ++ RT_SREQ_C2_PLAN = 0x00000200, ++ RT_SREQ_C3_PLAN = 0x00000400, ++ RT_SREQ_C4_PLAN = 0x00000800, ++ RT_SREQ_NFC_ON = 0x00001000, ++ RT_SREQ_MASK = 0x0000FFFF, /* Requirements bit mask */ ++ ++}RT_CHNLPLAN_SREQ, *PRT_CHNLPLAN_SREQ; ++ ++ ++// ++// RT_COUNTRY_NAME & RT_REGULATION_2G & RT_REGULATION_5G transfer table ++// ++// ++typedef struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE ++{ ++ // ++ // Define countery domain and corresponding ++ // ++ RT_COUNTRY_NAME Country_Enum; ++ char Country_Name[3]; ++ ++ //char Domain_Name[12]; ++ RT_REGULATION_2G Domain_2G; ++ ++ RT_REGULATION_5G Domain_5G; ++ ++ RT_CHANNEL_DOMAIN RtChDomain; ++ //u1Byte Country_Area; ++ ++}RT_CHNL_CTRY_TBL, *PRT_CHNL_CTRY_TBL; ++ ++ ++#define RT_MAX_CHNL_NUM_2G 13 ++#define RT_MAX_CHNL_NUM_5G 44 ++ ++// Power table sample. ++ ++typedef struct _RT_CHNL_PLAN_PWR_LIMIT ++{ ++ u2Byte Chnl_Start; ++ u2Byte Chnl_end; ++ u1Byte dB_Max; ++ u2Byte mW_Max; ++}RT_CHNL_PWR_LIMIT, *PRT_CHNL_PWR_LIMIT; ++ ++ ++#define RT_MAX_BAND_NUM 5 ++ ++typedef struct _RT_CHANNEL_PLAN_MAXPWR ++{ ++// STRING_T ++ RT_CHNL_PWR_LIMIT Chnl[RT_MAX_BAND_NUM]; ++ u1Byte Band_Useful_Num; ++ ++ ++}RT_CHANNEL_PLAN_MAXPWR, *PRT_CHANNEL_PLAN_MAXPWR; ++ ++ ++// ++// Power By Rate Table. ++// ++ ++ ++ ++typedef struct _RT_CHANNEL_PLAN_NEW ++{ ++ // ++ // Define countery domain and corresponding ++ // ++ //char Country_Name[36]; ++ //u1Byte Country_Enum; ++ ++ //char Domain_Name[12]; ++ ++ ++ PRT_CHNL_CTRY_TBL pCtryTransfer; ++ ++ RT_CHANNEL_DOMAIN RtChDomain; ++ ++ RT_REGULATION_2G Domain_2G; ++ ++ RT_REGULATION_5G Domain_5G; ++ ++ RT_REGULATION_CMN Regulator; ++ ++ RT_CHNLPLAN_SREQ ChnlSreq; ++ ++ //RT_CHNL_PLAN_LIMIT RtChnl; ++ ++ u1Byte Chnl2G[MAX_CHANNEL_NUM]; // CHNL_RT_2G_WORLD ++ u1Byte Len2G; ++ u1Byte Chnl2GScanTp[MAX_CHANNEL_NUM]; // CHNL_RT_2G_WORLD_SCAN_TYPE ++ //u1Byte Freq2G[2]; // FREQ_RT_2G_WORLD ++ ++ u1Byte Chnl5G[MAX_CHANNEL_NUM]; ++ u1Byte Len5G; ++ u1Byte Chnl5GScanTp[MAX_CHANNEL_NUM]; ++ //u1Byte Freq2G[2]; // FREQ_RT_2G_WORLD ++ ++ RT_CHANNEL_PLAN_MAXPWR ChnlMaxPwr; ++ ++ ++}RT_CHANNEL_PLAN_NEW, *PRT_CHANNEL_PLAN_NEW; ++ ++ ++#endif // __RT_CHANNELPLAN_H__ ++ ++ ++ ++ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188erateadaptive.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188erateadaptive.c +new file mode 100644 +index 0000000..50fa153 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188erateadaptive.c +@@ -0,0 +1,1279 @@ ++/*++ ++Copyright (c) Realtek Semiconductor Corp. All rights reserved. ++ ++Module Name: ++ RateAdaptive.c ++ ++Abstract: ++ Implement Rate Adaptive functions for common operations. ++ ++Major Change History: ++ When Who What ++ ---------- --------------- ------------------------------- ++ 2011-08-12 Page Create. ++ ++--*/ ++#include "mp_precomp.h" ++ ++#include "../phydm_precomp.h" ++ ++ ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++// Rate adaptive parameters ++#define RA_RATE_LEVEL 2 ++ ++ ++static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {{5,4,3,2,0,3},//92 , idx=0 ++ {6,5,4,3,0,4},//86 , idx=1 ++ {6,5,4,2,0,4},//81 , idx=2 ++ {8,7,6,4,0,6},//75 , idx=3 ++ {10,9,8,6,0,8},//71 , idx=4 ++ {10,9,8,4,0,8},//66 , idx=5 ++ {10,9,8,2,0,8},//62 , idx=6 ++ {10,9,8,0,0,8},//59 , idx=7 ++ {18,17,16,8,0,16},//53 , idx=8 ++ {26,25,24,16,0,24},//50 , idx=9 ++ {34,33,32,24,0,32},//47 , idx=0x0a ++ //{34,33,32,16,0,32},//43 , idx=0x0b ++ //{34,33,32,8,0,32},//40 , idx=0x0c ++ //{34,33,28,8,0,32},//37 , idx=0x0d ++ //{34,33,20,8,0,32},//32 , idx=0x0e ++ //{34,32,24,8,0,32},//26 , idx=0x0f ++ //{49,48,32,16,0,48},//20 , idx=0x10 ++ //{49,48,24,0,0,48},//17 , idx=0x11 ++ //{49,47,16,16,0,48},//15 , idx=0x12 ++ //{49,44,16,16,0,48},//12 , idx=0x13 ++ //{49,40,16,0,0,48},//9 , idx=0x14 ++ {34,31,28,20,0,32},//43 , idx=0x0b ++ {34,31,27,18,0,32},//40 , idx=0x0c ++ {34,31,26,16,0,32},//37 , idx=0x0d ++ {34,30,22,16,0,32},//32 , idx=0x0e ++ {34,30,24,16,0,32},//26 , idx=0x0f ++ {49,46,40,16,0,48},//20 , idx=0x10 ++ {49,45,32,0,0,48},//17 , idx=0x11 ++ {49,45,22,18,0,48},//15 , idx=0x12 ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ {49,40,28,18,0,48},//12 , idx=0x13 ++ {49,34,20,16,0,48},//9 , idx=0x14 ++#else ++ {49,40,24,16,0,48},//12 , idx=0x13 ++ {49,32,18,12,0,48},//9 , idx=0x14 ++#endif ++ {49,22,18,14,0,48},//6 , idx=0x15 ++ {49,16,16,0,0,48}};//3 //3, idx=0x16 ++ ++static u1Byte RETRY_PENALTY_UP[RETRYSIZE+1]={49,44,16,16,0,48}; // 12% for rate up ++ ++static u1Byte PT_PENALTY[RETRYSIZE+1]={34,31,30,24,0,32}; ++ ++#if 0 ++static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH ++ 4,4,4,4,6,0x0a,0x0b,0x0d, ++ 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 ++ {4,4,4,5,7,7,9,9,0x0c,0x0e,0x10,0x12, // SSTH ++ 4,4,4,4,6,0x0a,0x0b,0x0d, ++ 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 ++ {0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13, // SSTH ++ 0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15, ++ 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; ++ ++static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, ++ 0,0,0,0,0,0x24,0x26,0x2a, ++ 0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f, ++ 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; ++#else ++ ++// wilson modify ++/*static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH ++ 4,4,4,4,6,0x0a,0x0b,0x0d, ++ 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 ++ {0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14, // SSTH ++ 4,4,4,4,6,0x0a,0x0b,0x0d, ++ 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 ++ {0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x13, // SSTH ++ 0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15, ++ 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; ++#elif (RA_RATE_LEVEL == 1) ++static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x13, // SS>TH ++ 0x0f,0x10,0x10,0x12,0x12,0x13,0x13,0x14, ++ 0x11,0x11,0x12,0x13,0x13,0x13,0x13,0x14}; ++#elif (RA_RATE_LEVEL == 2) ++static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x13, // SS>TH ++ 0x0f,0x10,0x10,0x12,0x12,0x12,0x12,0x13, ++ 0x11,0x11,0x12,0x12,0x12,0x12,0x12,0x13}; ++#endif ++ ++static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, ++ 0,0,0,0,0,0x24,0x26,0x2a, ++ 0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a, ++ 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; ++ ++#endif ++ ++/*static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, ++ 0,0,0,0,0,0x24,0x26,0x2a, ++ 0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d, ++ 0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/ ++/*static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16, ++ 24,36,48,72,96,144,192,216, ++ 60,80,100,160,240,400,560,640, ++ 300,320,480,720,1000,1200,1600,2000}; ++static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8, ++ 12,18,24,36,48,72,96,108, ++ 30,40,50,80,120,200,280,320, ++ 150,160,240,360,500,600,800,1000};*/ ++static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16, ++ 24,36,48,72,96,144,192,216, ++ 60,80,100,160,240,400,600,800, ++ 300,320,480,720,1000,1200,1600,2000}; ++static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8, ++ 12,18,24,36,48,72,96,108, ++ 30,40,50,80,120,200,300,400, ++ 150,160,240,360,500,600,800,1000}; ++ ++static u1Byte TRYING_NECESSARY[RATESIZE] = {2,2,2,2, ++ 2,2,3,3,4,4,5,7, ++ 4,4,7,10,10,12,12,18, ++ 5,7,7,8,11,18,36,60}; // 0329 // 1207 ++#if 0 ++static u1Byte POOL_RETRY_TH[RATESIZE] = {30,30,30,30, ++ 30,30,25,25,20,15,15,10, ++ 30,25,25,20,15,10,10,10, ++ 30,25,25,20,15,10,10,10}; ++#endif ++ ++static u1Byte DROPING_NECESSARY[RATESIZE] = {1,1,1,1, ++ 1,2,3,4,5,6,7,8, ++ 1,2,3,4,5,6,7,8, ++ 5,6,7,8,9,10,11,12}; ++ ++ ++static u4Byte INIT_RATE_FALLBACK_TABLE[16]={0x0f8ff015, // 0: 40M BGN mode ++ 0x0f8ff010, // 1: 40M GN mode ++ 0x0f8ff005, // 2: BN mode/ 40M BGN mode ++ 0x0f8ff000, // 3: N mode ++ 0x00000ff5, // 4: BG mode ++ 0x00000ff0, // 5: G mode ++ 0x0000000d, // 6: B mode ++ 0, // 7: ++ 0, // 8: ++ 0, // 9: ++ 0, // 10: ++ 0, // 11: ++ 0, // 12: ++ 0, // 13: ++ 0, // 14: ++ 0, // 15: ++ ++ }; ++static u1Byte PendingForRateUpFail[5]={2,10,24,36,48}; ++static u2Byte DynamicTxRPTTiming[6]={0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 ,0x927c}; // 200ms 400 / 600 / 8000 / 1000 -1200ms ++ ++// End Rate adaptive parameters ++ ++static void ++odm_SetTxRPTTiming_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN PODM_RA_INFO_T pRaInfo, ++ IN u1Byte extend ++ ) ++{ ++ u1Byte idx = 0; ++ ++ for(idx=0; idx<5; idx++) ++ if(DynamicTxRPTTiming[idx] == pRaInfo->RptTime) ++ break; ++ ++ if (extend==0) // back to default timing ++ idx=0; //200ms ++ else if (extend==1) {// increase the timing ++ idx+=1; ++ if (idx>5) ++ idx=5; ++ } ++ else if (extend==2) {// decrease the timing ++ if(idx!=0) ++ idx-=1; ++ } ++ pRaInfo->RptTime=DynamicTxRPTTiming[idx]; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime=0x%x\n", pRaInfo->RptTime)); ++} ++ ++static int ++odm_RateDown_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN PODM_RA_INFO_T pRaInfo ++ ) ++{ ++ u1Byte RateID, LowestRate, HighestRate; ++ u1Byte i; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n")); ++ if(NULL == pRaInfo) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n")); ++ return -1; ++ } ++ RateID = pRaInfo->PreRate; ++ LowestRate = pRaInfo->LowestRate; ++ HighestRate = pRaInfo->HighestRate; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ (" RateID=%d LowestRate=%d HighestRate=%d RateSGI=%d\n", ++ RateID, LowestRate, HighestRate, pRaInfo->RateSGI)); ++ if (RateID > HighestRate) ++ { ++ RateID=HighestRate; ++ } ++ else if(pRaInfo->RateSGI) ++ { ++ pRaInfo->RateSGI=0; ++ } ++ else if (RateID > LowestRate) ++ { ++ if (RateID > 0) ++ { ++ for (i=RateID-1; i>LowestRate;i--) ++ { ++ if (pRaInfo->RAUseRate & BIT(i)) ++ { ++ RateID=i; ++ goto RateDownFinish; ++ ++ } ++ } ++ } ++ } ++ else if (RateID <= LowestRate) ++ { ++ RateID = LowestRate; ++ } ++RateDownFinish: ++ if (pRaInfo->RAWaitingCounter==1){ ++ pRaInfo->RAWaitingCounter+=1; ++ pRaInfo->RAPendingCounter+=1; ++ } ++ else if(pRaInfo->RAWaitingCounter==0){ ++ } ++ else{ ++ pRaInfo->RAWaitingCounter=0; ++ pRaInfo->RAPendingCounter=0; ++ } ++ ++ if(pRaInfo->RAPendingCounter>=4) ++ pRaInfo->RAPendingCounter=4; ++ ++ pRaInfo->DecisionRate=RateID; ++ odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 2); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDown_8188E() \n")); ++ return 0; ++} ++ ++static int ++odm_RateUp_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN PODM_RA_INFO_T pRaInfo ++ ) ++{ ++ u1Byte RateID, HighestRate; ++ u1Byte i; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E() \n")); ++ if(NULL == pRaInfo) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n")); ++ return -1; ++ } ++ RateID = pRaInfo->PreRate; ++ HighestRate = pRaInfo->HighestRate; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ (" RateID=%d HighestRate=%d\n", ++ RateID, HighestRate)); ++ if (pRaInfo->RAWaitingCounter==1){ ++ pRaInfo->RAWaitingCounter=0; ++ pRaInfo->RAPendingCounter=0; ++ } ++ else if (pRaInfo->RAWaitingCounter>1){ ++ pRaInfo->PreRssiStaRA=pRaInfo->RssiStaRA; ++ goto RateUpfinish; ++ } ++ odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 0); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n")); ++ ++ if (RateID < HighestRate) ++ { ++ for (i=RateID+1; i<=HighestRate; i++) ++ { ++ if (pRaInfo->RAUseRate & BIT(i)) ++ { ++ RateID=i; ++ goto RateUpfinish; ++ } ++ } ++ } ++ else if(RateID == HighestRate) ++ { ++ if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1)) ++ pRaInfo->RateSGI = 1; ++ else if((pRaInfo->SGIEnable) !=1 ) ++ pRaInfo->RateSGI = 0; ++ } ++ else //if((sta_info_ra->Decision_rate) > (sta_info_ra->Highest_rate)) ++ { ++ RateID = HighestRate; ++ ++ } ++RateUpfinish: ++ //if(pRaInfo->RAWaitingCounter==10) ++ if(pRaInfo->RAWaitingCounter==(4+PendingForRateUpFail[pRaInfo->RAPendingCounter])) ++ pRaInfo->RAWaitingCounter=0; ++ else ++ pRaInfo->RAWaitingCounter++; ++ ++ pRaInfo->DecisionRate=RateID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateUp_8188E() \n")); ++ return 0; ++} ++ ++static void odm_ResetRaCounter_8188E( IN PODM_RA_INFO_T pRaInfo){ ++ u1Byte RateID; ++ RateID=pRaInfo->DecisionRate; ++ pRaInfo->NscUp=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; ++ pRaInfo->NscDown=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; ++} ++ ++static void ++odm_RateDecision_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN PODM_RA_INFO_T pRaInfo ++ ) ++{ ++ u1Byte RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0; ++ //u4Byte pool_retry; ++ static u1Byte DynamicTxRPTTimingCounter=0; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E() \n")); ++ ++ if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) // STA used and data packet exits ++ { ++ if ( (pRaInfo->RssiStaRA<(pRaInfo->PreRssiStaRA-3))|| (pRaInfo->RssiStaRA>(pRaInfo->PreRssiStaRA+3))){ ++ pRaInfo->RAWaitingCounter=0; ++ pRaInfo->RAPendingCounter=0; ++ } ++ // Start RA decision ++ if (pRaInfo->PreRate > pRaInfo->HighestRate) ++ RateID = pRaInfo->HighestRate; ++ else ++ RateID = pRaInfo->PreRate; ++ if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID]) ++ RtyPtID=0; ++ else ++ RtyPtID=1; ++ PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; //TODO by page ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ (" NscDown init is %d\n", pRaInfo->NscDown)); ++ //pool_retry=pRaInfo->RTY[2]+pRaInfo->RTY[3]+pRaInfo->RTY[4]+pRaInfo->DROP; ++ pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0]; ++ pRaInfo->NscDown += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID1][1]; ++ pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2]; ++ pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3]; ++ pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ (" NscDown is %d, total*penalty[5] is %d\n", ++ pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))); ++ if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])) ++ pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]; ++ else ++ pRaInfo->NscDown=0; ++ ++ // rate up ++ PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ (" NscUp init is %d\n", pRaInfo->NscUp)); ++ pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0]; ++ pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1]; ++ pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2]; ++ pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3]; ++ pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ ("NscUp is %d, total*up[5] is %d\n", ++ pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))); ++ if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])) ++ pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]; ++ else ++ pRaInfo->NscUp = 0; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD, ++ (" RssiStaRa= %d RtyPtID=%d PenaltyID1=0x%x PenaltyID2=0x%x RateID=%d NscDown=%d NscUp=%d SGI=%d\n", ++ pRaInfo->RssiStaRA,RtyPtID, PenaltyID1,PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI)); ++ if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||(pRaInfo->DROP>DROPING_NECESSARY[RateID])) ++ odm_RateDown_8188E(pDM_Odm,pRaInfo); ++ //else if ((pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])&&(pool_retryNscUp > N_THRESHOLD_HIGH[RateID]) ++ odm_RateUp_8188E(pDM_Odm,pRaInfo); ++ ++ if(pRaInfo->DecisionRate > pRaInfo->HighestRate) ++ pRaInfo->DecisionRate = pRaInfo->HighestRate; ++ ++ if ((pRaInfo->DecisionRate)==(pRaInfo->PreRate)) ++ DynamicTxRPTTimingCounter+=1; ++ else ++ DynamicTxRPTTimingCounter=0; ++ ++ if (DynamicTxRPTTimingCounter>=4) { ++ odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 1); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<=====Rate don't change 4 times, Extend RPT Timing\n")); ++ DynamicTxRPTTimingCounter=0; ++ } ++ ++ pRaInfo->PreRate = pRaInfo->DecisionRate; //YJ,add,120120 ++ ++ odm_ResetRaCounter_8188E( pRaInfo); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDecision_8188E() \n")); ++} ++ ++static int ++odm_ARFBRefresh_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN PODM_RA_INFO_T pRaInfo ++ ) ++{ // Wilson 2011/10/26 ++ u4Byte MaskFromReg; ++ s1Byte i; ++ ++ switch(pRaInfo->RateID){ ++ case RATR_INX_WIRELESS_NGB: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff015; ++ break; ++ case RATR_INX_WIRELESS_NG: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff010; ++ break; ++ case RATR_INX_WIRELESS_NB: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff005; ++ break; ++ case RATR_INX_WIRELESS_N: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff000; ++ break; ++ case RATR_INX_WIRELESS_GB: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x00000ff5; ++ break; ++ case RATR_INX_WIRELESS_G: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x00000ff0; ++ break; ++ case RATR_INX_WIRELESS_B: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0000000d; ++ break; ++ case 12: ++ MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR0); ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; ++ break; ++ case 13: ++ MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR1); ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; ++ break; ++ case 14: ++ MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR2); ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; ++ break; ++ case 15: ++ MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR3); ++ pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; ++ break; ++ ++ default: ++ pRaInfo->RAUseRate=(pRaInfo->RateMask); ++ break; ++ } ++ // Highest rate ++ if (pRaInfo->RAUseRate){ ++ for (i=RATESIZE-1;i>=0;i--) ++ { ++ if((pRaInfo->RAUseRate)&BIT(i)){ ++ pRaInfo->HighestRate=i; ++ break; ++ } ++ } ++ } ++ else{ ++ pRaInfo->HighestRate=0; ++ } ++ // Lowest rate ++ if (pRaInfo->RAUseRate){ ++ for (i=0;iRAUseRate)&BIT(i)) ++ { ++ pRaInfo->LowestRate=i; ++ break; ++ } ++ } ++ } ++ else{ ++ pRaInfo->LowestRate=0; ++ } ++ ++#if POWER_TRAINING_ACTIVE == 1 ++ if (pRaInfo->HighestRate >0x13) ++ pRaInfo->PTModeSS=3; ++ else if(pRaInfo->HighestRate >0x0b) ++ pRaInfo->PTModeSS=2; ++ else if(pRaInfo->HighestRate >0x0b) ++ pRaInfo->PTModeSS=1; ++ else ++ pRaInfo->PTModeSS=0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ++ ("ODM_ARFBRefresh_8188E(): PTModeSS=%d\n", pRaInfo->PTModeSS)); ++ ++#endif ++ ++ if(pRaInfo->DecisionRate > pRaInfo->HighestRate) ++ pRaInfo->DecisionRate = pRaInfo->HighestRate; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ++ ("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d \n", ++ pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate,pRaInfo->DecisionRate)); ++ return 0; ++} ++ ++#if POWER_TRAINING_ACTIVE == 1 ++static void ++odm_PTTryState_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN PODM_RA_INFO_T pRaInfo ++ ) ++{ ++ pRaInfo->PTTryState=0; ++ switch (pRaInfo->PTModeSS) ++ { ++ case 3: ++ if (pRaInfo->DecisionRate>=0x19) ++ pRaInfo->PTTryState=1; ++ break; ++ case 2: ++ if (pRaInfo->DecisionRate>=0x11) ++ pRaInfo->PTTryState=1; ++ break; ++ case 1: ++ if (pRaInfo->DecisionRate>=0x0a) ++ pRaInfo->PTTryState=1; ++ break; ++ case 0: ++ if (pRaInfo->DecisionRate>=0x03) ++ pRaInfo->PTTryState=1; ++ break; ++ default: ++ pRaInfo->PTTryState=0; ++ } ++ ++ if (pRaInfo->RssiStaRA<48) ++ { ++ pRaInfo->PTStage=0; ++ } ++ else if (pRaInfo->PTTryState==1) ++ { ++ if ((pRaInfo->PTStopCount>=10)||(pRaInfo->PTPreRssi>pRaInfo->RssiStaRA+5) ++ ||(pRaInfo->PTPreRssiRssiStaRA-5)||(pRaInfo->DecisionRate!=pRaInfo->PTPreRate)) ++ { ++ if (pRaInfo->PTStage==0) ++ pRaInfo->PTStage=1; ++ else if(pRaInfo->PTStage==1) ++ pRaInfo->PTStage=3; ++ else ++ pRaInfo->PTStage=5; ++ ++ pRaInfo->PTPreRssi=pRaInfo->RssiStaRA; ++ pRaInfo->PTStopCount=0; ++ ++ } ++ else{ ++ pRaInfo->RAstage=0; ++ pRaInfo->PTStopCount++; ++ } ++ } ++ else{ ++ pRaInfo->PTStage=0; ++ pRaInfo->RAstage=0; ++ } ++ pRaInfo->PTPreRate=pRaInfo->DecisionRate; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ // Disable power training when noisy environment ++ if(pDM_Odm->bDisablePowerTraining) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_PTTryState_8188E(): Disable power training when noisy environment\n")); ++ pRaInfo->PTStage = 0; ++ pRaInfo->RAstage = 0; ++ pRaInfo->PTStopCount = 0; ++ } ++#endif ++} ++ ++static void ++odm_PTDecision_8188E( ++ IN PODM_RA_INFO_T pRaInfo ++ ) ++{ ++ u1Byte stage_BUF; ++ u1Byte j; ++ u1Byte temp_stage; ++ u4Byte numsc; ++ u4Byte num_total; ++ u1Byte stage_id; ++ ++ stage_BUF=pRaInfo->PTStage; ++ numsc = 0; ++ num_total= pRaInfo->TOTAL* PT_PENALTY[5]; ++ for(j=0;j<=4;j++) ++ { ++ numsc += pRaInfo->RTY[j] * PT_PENALTY[j]; ++ if(numsc>num_total) ++ break; ++ } ++ ++ j=j>>1; ++ temp_stage= (pRaInfo->PTStage +1)>>1; ++ if (temp_stage>j) ++ stage_id=temp_stage-j; ++ else ++ stage_id=0; ++ ++ pRaInfo->PTSmoothFactor=(pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2; ++ if (pRaInfo->PTSmoothFactor>192) ++ pRaInfo->PTSmoothFactor=192; ++ stage_id =pRaInfo->PTSmoothFactor>>6; ++ temp_stage=stage_id*2; ++ if (temp_stage!=0) ++ temp_stage-=1; ++ if (pRaInfo->DROP>3) ++ temp_stage=0; ++ pRaInfo->PTStage=temp_stage; ++ ++} ++#endif ++ ++static VOID ++odm_RATxRPTTimerSetting( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte minRptTime ++) ++{ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" =====>odm_RATxRPTTimerSetting()\n")); ++ ++ ++ if(pDM_Odm->CurrminRptTime != minRptTime){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ++ (" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime)); ++ #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP)) ++ ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime); ++ #else ++ rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime); ++ #endif ++ pDM_Odm->CurrminRptTime = minRptTime; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n")); ++} ++ ++ ++VOID ++ODM_RASupport_Init( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n")); ++ ++ // 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ pDM_Odm->RaSupport88E = TRUE; ++ ++ } ++ ++ ++ ++int ++ODM_RAInfo_Init( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ) ++{ ++ PODM_RA_INFO_T pRaInfo = &pDM_Odm->RAInfo[MacID]; ++ #if 1 ++ u1Byte WirelessMode=0xFF; //invalid value ++ u1Byte max_rate_idx = 0x13; //MCS7 ++ if(pDM_Odm->pWirelessMode!=NULL){ ++ WirelessMode=*(pDM_Odm->pWirelessMode); ++ } ++ ++ if(WirelessMode != 0xFF ){ ++ if(WirelessMode & ODM_WM_N24G) ++ max_rate_idx = 0x13; ++ else if(WirelessMode & ODM_WM_G) ++ max_rate_idx = 0x0b; ++ else if(WirelessMode & ODM_WM_B) ++ max_rate_idx = 0x03; ++ } ++ ++ //printk("%s ==>WirelessMode:0x%08x ,max_raid_idx:0x%02x\n ",__FUNCTION__,WirelessMode,max_rate_idx); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ++ ("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x \n", ++ WirelessMode,max_rate_idx)); ++ ++ pRaInfo->DecisionRate = max_rate_idx; ++ pRaInfo->PreRate = max_rate_idx; ++ pRaInfo->HighestRate=max_rate_idx; ++ #else ++ pRaInfo->DecisionRate = 0x13; ++ pRaInfo->PreRate = 0x13; ++ pRaInfo->HighestRate=0x13; ++ #endif ++ pRaInfo->LowestRate=0; ++ pRaInfo->RateID=0; ++ pRaInfo->RateMask=0xffffffff; ++ pRaInfo->RssiStaRA=0; ++ pRaInfo->PreRssiStaRA=0; ++ pRaInfo->SGIEnable=0; ++ pRaInfo->RAUseRate=0xffffffff; ++ pRaInfo->NscDown=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; ++ pRaInfo->NscUp=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; ++ pRaInfo->RateSGI=0; ++ pRaInfo->Active=1; //Active is not used at present. by page, 110819 ++ pRaInfo->RptTime = 0x927c; ++ pRaInfo->DROP=0; ++ pRaInfo->RTY[0]=0; ++ pRaInfo->RTY[1]=0; ++ pRaInfo->RTY[2]=0; ++ pRaInfo->RTY[3]=0; ++ pRaInfo->RTY[4]=0; ++ pRaInfo->TOTAL=0; ++ pRaInfo->RAWaitingCounter=0; ++ pRaInfo->RAPendingCounter=0; ++#if POWER_TRAINING_ACTIVE == 1 ++ pRaInfo->PTActive=1; // Active when this STA is use ++ pRaInfo->PTTryState=0; ++ pRaInfo->PTStage=5; // Need to fill into HW_PWR_STATUS ++ pRaInfo->PTSmoothFactor=192; ++ pRaInfo->PTStopCount=0; ++ pRaInfo->PTPreRate=0; ++ pRaInfo->PTPreRssi=0; ++ pRaInfo->PTModeSS=0; ++ pRaInfo->RAstage=0; ++#endif ++ return 0; ++} ++ ++int ++ODM_RAInfo_Init_all( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u1Byte MacID = 0; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n")); ++ pDM_Odm->CurrminRptTime = 0; ++ ++ for(MacID=0; MacIDCutVersion == ODM_CUT_I) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ u1Byte i; ++ u1Byte RETRY_PENALTY_IDX_S[2][RATESIZE] = {{4,4,4,5, ++ 4,4,5,7,7,7,8,0x0a, // SS>TH ++ 4,4,4,4,6,0x0a,0x0b,0x0d, ++ 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 ++ {0x0a,0x0a,0x0b,0x0c, ++ 0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x13, // SSTH ++ 0x0b,0x0b,0x11,0x11,0x12,0x12,0x12,0x12, ++ 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; ++ ++ for( i=0; iAdapter; ++ ++ //DbgPrint("Adapter->MgntInfo.RegRALvl = %d\n", Adapter->MgntInfo.RegRALvl); ++ ++ // ++ // 2012/09/14 MH Add for different Ra pattern init. For TPLINK case, we ++ // need to to adjust different RA pattern for middle range RA. 20-30dB degarde ++ // 88E rate adptve will raise too slow. ++ // ++ if (Adapter->MgntInfo.RegRALvl == 0) ++ { ++ RETRY_PENALTY_UP_IDX[11] = 0x14; ++ ++ RETRY_PENALTY_UP_IDX[17] = 0x13; ++ RETRY_PENALTY_UP_IDX[18] = 0x14; ++ RETRY_PENALTY_UP_IDX[19] = 0x15; ++ ++ RETRY_PENALTY_UP_IDX[23] = 0x13; ++ RETRY_PENALTY_UP_IDX[24] = 0x13; ++ RETRY_PENALTY_UP_IDX[25] = 0x13; ++ RETRY_PENALTY_UP_IDX[26] = 0x14; ++ RETRY_PENALTY_UP_IDX[27] = 0x15; ++ } ++ else if (Adapter->MgntInfo.RegRALvl == 1) ++ { ++ RETRY_PENALTY_UP_IDX[17] = 0x13; ++ RETRY_PENALTY_UP_IDX[18] = 0x13; ++ RETRY_PENALTY_UP_IDX[19] = 0x14; ++ ++ RETRY_PENALTY_UP_IDX[23] = 0x12; ++ RETRY_PENALTY_UP_IDX[24] = 0x13; ++ RETRY_PENALTY_UP_IDX[25] = 0x13; ++ RETRY_PENALTY_UP_IDX[26] = 0x13; ++ RETRY_PENALTY_UP_IDX[27] = 0x14; ++ } ++ else if (Adapter->MgntInfo.RegRALvl == 2) ++ { ++ // Compile flag default is lvl2, we need not to update. ++ } ++ else if (Adapter->MgntInfo.RegRALvl >= 0x80) ++ { ++ u1Byte index = 0, offset = Adapter->MgntInfo.RegRALvl - 0x80; ++ ++ // Reset to default rate adaptive value. ++ RETRY_PENALTY_UP_IDX[11] = 0x14; ++ ++ RETRY_PENALTY_UP_IDX[17] = 0x13; ++ RETRY_PENALTY_UP_IDX[18] = 0x14; ++ RETRY_PENALTY_UP_IDX[19] = 0x15; ++ ++ RETRY_PENALTY_UP_IDX[23] = 0x13; ++ RETRY_PENALTY_UP_IDX[24] = 0x13; ++ RETRY_PENALTY_UP_IDX[25] = 0x13; ++ RETRY_PENALTY_UP_IDX[26] = 0x14; ++ RETRY_PENALTY_UP_IDX[27] = 0x15; ++ ++ if (Adapter->MgntInfo.RegRALvl >= 0x90) ++ { ++ offset = Adapter->MgntInfo.RegRALvl - 0x90; ++ // Lazy mode. ++ for (index = 0; index < 28; index++) ++ { ++ RETRY_PENALTY_UP_IDX[index] += (offset); ++ } ++ } ++ else ++ { ++ // Aggrasive side. ++ for (index = 0; index < 28; index++) ++ { ++ RETRY_PENALTY_UP_IDX[index] -= (offset); ++ } ++ } ++ ++ } ++} ++#endif ++ ++ return 0; ++} ++ ++ ++u1Byte ++ODM_RA_GetShortGI_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++) ++{ ++ if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) ++ return 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ ("MacID=%d SGI=%d\n", MacID, pDM_Odm->RAInfo[MacID].RateSGI)); ++ return pDM_Odm->RAInfo[MacID].RateSGI; ++} ++ ++u1Byte ++ODM_RA_GetDecisionRate_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ) ++{ ++ u1Byte DecisionRate = 0; ++ ++ if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) ++ return 0; ++ DecisionRate = (pDM_Odm->RAInfo[MacID].DecisionRate); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ (" MacID=%d DecisionRate=0x%x\n", MacID, DecisionRate)); ++ return DecisionRate; ++} ++ ++u1Byte ++ODM_RA_GetHwPwrStatus_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ) ++{ ++ u1Byte PTStage = 5; ++ if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) ++ return 0; ++ PTStage = (pDM_Odm->RAInfo[MacID].PTStage); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ ("MacID=%d PTStage=0x%x\n", MacID, PTStage)); ++ return PTStage; ++} ++ ++VOID ++ODM_RA_UpdateRateInfo_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID, ++ IN u1Byte RateID, ++ IN u4Byte RateMask, ++ IN u1Byte SGIEnable ++ ) ++{ ++ PODM_RA_INFO_T pRaInfo = NULL; ++ ++ if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ++ ("MacID=%d RateID=0x%x RateMask=0x%x SGIEnable=%d\n", ++ MacID, RateID, RateMask, SGIEnable)); ++ ++ pRaInfo = &(pDM_Odm->RAInfo[MacID]); ++ pRaInfo->RateID = RateID; ++ pRaInfo->RateMask = RateMask; ++ pRaInfo->SGIEnable = SGIEnable; ++ odm_ARFBRefresh_8188E(pDM_Odm, pRaInfo); ++} ++ ++VOID ++ODM_RA_SetRSSI_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID, ++ IN u1Byte Rssi ++ ) ++{ ++ PODM_RA_INFO_T pRaInfo = NULL; ++ ++ if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ++ (" MacID=%d Rssi=%d\n", MacID, Rssi)); ++ ++ pRaInfo = &(pDM_Odm->RAInfo[MacID]); ++ pRaInfo->RssiStaRA = Rssi; ++} ++ ++VOID ++ODM_RA_Set_TxRPT_Time( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte minRptTime ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ if (minRptTime != 0xffff) ++ { ++#if defined(CONFIG_PCI_HCI) ++ ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime); ++#elif defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++ notify_tx_report_interval_change(pDM_Odm->priv, minRptTime); ++#endif ++ } ++#else ++ ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime); ++#endif ++ ++} ++ ++ ++VOID ++ODM_RA_TxRPT2Handle_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte TxRPT_Buf, ++ IN u2Byte TxRPT_Len, ++ IN u4Byte MacIDValidEntry0, ++ IN u4Byte MacIDValidEntry1 ++ ) ++{ ++ PODM_RA_INFO_T pRAInfo = NULL; ++ u1Byte MacId = 0; ++ pu1Byte pBuffer = NULL; ++ u4Byte valid = 0, ItemNum = 0; ++ u2Byte minRptTime = 0x927c; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0=%d valid1=%d BufferLength=%d\n", ++ MacIDValidEntry0, MacIDValidEntry1, TxRPT_Len)); ++ ++ ItemNum = TxRPT_Len >> 3; ++ pBuffer = TxRPT_Buf; ++ ++ do ++ { ++ valid = 0; ++ if(MacId < 32) ++ valid = (1<= ODM_ASSOCIATE_ENTRY_NUM) ++ valid = 0; ++ ++ if(valid) ++ { ++ pRAInfo = &(pDM_Odm->RAInfo[MacId]); ++ ++ pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); ++ pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); ++ pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); ++ pRAInfo->RTY[3] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer); ++ pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); ++ pRAInfo->DROP = (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); ++ ++ pRAInfo->TOTAL = pRAInfo->RTY[0] + \ ++ pRAInfo->RTY[1] + \ ++ pRAInfo->RTY[2] + \ ++ pRAInfo->RTY[3] + \ ++ pRAInfo->RTY[4] + \ ++ pRAInfo->DROP; ++#if defined(TXRETRY_CNT) ++ extern struct stat_info *get_macidinfo(struct rtl8192cd_priv *priv, unsigned int aid); ++ ++ { ++ struct stat_info *pstat = get_macidinfo(pDM_Odm->priv, MacId); ++ if (pstat) { ++ pstat->cur_tx_ok += pRAInfo->RTY[0]; ++ pstat->cur_tx_retry_pkts += pRAInfo->RTY[1] + pRAInfo->RTY[2] + pRAInfo->RTY[3] + pRAInfo->RTY[4]; ++ pstat->cur_tx_retry_cnt += pRAInfo->RTY[1] + pRAInfo->RTY[2] * 2 + pRAInfo->RTY[3] * 3 + pRAInfo->RTY[4] * 4; ++ pstat->total_tx_retry_cnt += pstat->cur_tx_retry_cnt; ++ pstat->total_tx_retry_pkts += pstat->cur_tx_retry_pkts; ++ pstat->cur_tx_fail += pRAInfo->DROP; ++ } ++ } ++#endif ++ if(pRAInfo->TOTAL != 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ++ ("macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n", ++ MacId, ++ pRAInfo->TOTAL, ++ pRAInfo->RTY[0], ++ pRAInfo->RTY[1], ++ pRAInfo->RTY[2], ++ pRAInfo->RTY[3], ++ pRAInfo->RTY[4], ++ pRAInfo->DROP, ++ MacIDValidEntry0 , ++ MacIDValidEntry1)); ++#if POWER_TRAINING_ACTIVE == 1 ++ if (pRAInfo->PTActive){ ++ if(pRAInfo->RAstage<5){ ++ odm_RateDecision_8188E(pDM_Odm,pRAInfo); ++ } ++ else if(pRAInfo->RAstage==5){ // Power training try state ++ odm_PTTryState_8188E(pDM_Odm, pRAInfo); ++ } ++ else {// RAstage==6 ++ odm_PTDecision_8188E(pRAInfo); ++ } ++ ++ // Stage_RA counter ++ if (pRAInfo->RAstage<=5) ++ pRAInfo->RAstage++; ++ else ++ pRAInfo->RAstage=0; ++ } ++ else{ ++ odm_RateDecision_8188E(pDM_Odm,pRAInfo); ++ } ++#else ++ odm_RateDecision_8188E(pDM_Odm, pRAInfo); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ extern void RTL8188E_SetStationTxRateInfo(PDM_ODM_T, PODM_RA_INFO_T, int); ++ RTL8188E_SetStationTxRateInfo(pDM_Odm, pRAInfo, MacId); ++#ifdef DETECT_STA_EXISTANCE ++ void RTL8188E_DetectSTAExistance(PDM_ODM_T pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID); ++ RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId); ++#endif ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n", ++ MacId, ++ pRAInfo->RTY[0], ++ pRAInfo->RTY[1], ++ pRAInfo->RTY[2], ++ pRAInfo->RTY[3], ++ pRAInfo->RTY[4], ++ pRAInfo->DROP, ++ MacIDValidEntry0, ++ pRAInfo->DecisionRate, ++ pRAInfo->RateSGI)); ++ ++ if(minRptTime > pRAInfo->RptTime) ++ minRptTime = pRAInfo->RptTime; ++ } ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL=0!!!!\n")); ++ } ++ ++ pBuffer += TX_RPT2_ITEM_SIZE; ++ MacId++; ++ }while(MacId < ItemNum); ++ ++ odm_RATxRPTTimerSetting(pDM_Odm,minRptTime); ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n")); ++} ++ ++#else ++ ++static VOID ++odm_RATxRPTTimerSetting( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte minRptTime ++) ++{ ++ return; ++} ++ ++ ++VOID ++ODM_RASupport_Init( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ return; ++} ++ ++int ++ODM_RAInfo_Init( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ) ++{ ++ return 0; ++} ++ ++int ++ODM_RAInfo_Init_all( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ return 0; ++} ++ ++u1Byte ++ODM_RA_GetShortGI_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ) ++{ ++ return 0; ++} ++ ++u1Byte ++ODM_RA_GetDecisionRate_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ) ++{ ++ return 0; ++} ++u1Byte ++ODM_RA_GetHwPwrStatus_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ) ++{ ++ return 0; ++} ++ ++VOID ++ODM_RA_UpdateRateInfo_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID, ++ IN u1Byte RateID, ++ IN u4Byte RateMask, ++ IN u1Byte SGIEnable ++ ) ++{ ++ return; ++} ++ ++VOID ++ODM_RA_SetRSSI_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID, ++ IN u1Byte Rssi ++ ) ++{ ++ return; ++} ++ ++VOID ++ODM_RA_Set_TxRPT_Time( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte minRptTime ++ ) ++{ ++ return; ++} ++ ++VOID ++ODM_RA_TxRPT2Handle_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte TxRPT_Buf, ++ IN u2Byte TxRPT_Len, ++ IN u4Byte MacIDValidEntry0, ++ IN u4Byte MacIDValidEntry1 ++ ) ++{ ++ return; ++} ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188erateadaptive.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188erateadaptive.h +new file mode 100644 +index 0000000..d11f228 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188erateadaptive.h +@@ -0,0 +1,108 @@ ++#ifndef __INC_RA_H ++#define __INC_RA_H ++/*++ ++Copyright (c) Realtek Semiconductor Corp. All rights reserved. ++ ++Module Name: ++ RateAdaptive.h ++ ++Abstract: ++ Prototype of RA and related data structure. ++ ++Major Change History: ++ When Who What ++ ---------- --------------- ------------------------------- ++ 2011-08-12 Page Create. ++--*/ ++ ++// Rate adaptive define ++#define PERENTRY 23 ++#define RETRYSIZE 5 ++#define RATESIZE 28 ++#define TX_RPT2_ITEM_SIZE 8 ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) ++// ++// TX report 2 format in Rx desc ++// ++#define GET_TX_RPT2_DESC_PKT_LEN_88E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 9) ++#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 0, 32) ++#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_TX_REPORT_TYPE1_RERTY_0(__pAddr) LE_BITS_TO_4BYTE( __pAddr, 0, 16) ++#define GET_TX_REPORT_TYPE1_RERTY_1(__pAddr) LE_BITS_TO_1BYTE( __pAddr+2, 0, 8) ++#define GET_TX_REPORT_TYPE1_RERTY_2(__pAddr) LE_BITS_TO_1BYTE( __pAddr+3, 0, 8) ++#define GET_TX_REPORT_TYPE1_RERTY_3(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4, 0, 8) ++#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+1, 0, 8) ++#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+2, 0, 8) ++#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+3, 0, 8) ++#endif ++ ++// End rate adaptive define ++ ++VOID ++ODM_RASupport_Init( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++int ++ODM_RAInfo_Init_all( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++int ++ODM_RAInfo_Init( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ); ++ ++u1Byte ++ODM_RA_GetShortGI_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ); ++ ++u1Byte ++ODM_RA_GetDecisionRate_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ); ++ ++u1Byte ++ODM_RA_GetHwPwrStatus_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID ++ ); ++VOID ++ODM_RA_UpdateRateInfo_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID, ++ IN u1Byte RateID, ++ IN u4Byte RateMask, ++ IN u1Byte SGIEnable ++ ); ++ ++VOID ++ODM_RA_SetRSSI_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte MacID, ++ IN u1Byte Rssi ++ ); ++ ++VOID ++ODM_RA_TxRPT2Handle_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte TxRPT_Buf, ++ IN u2Byte TxRPT_Len, ++ IN u4Byte MacIDValidEntry0, ++ IN u4Byte MacIDValidEntry1 ++ ); ++ ++ ++VOID ++ODM_RA_Set_TxRPT_Time( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte minRptTime ++ ); ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188ereg.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188ereg.h +new file mode 100644 +index 0000000..c695870 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/hal8188ereg.h +@@ -0,0 +1,57 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// File Name: hal8188ereg.h ++// ++// Description: ++// ++// This file is for RTL8188E register definition. ++// ++// ++//============================================================ ++#ifndef __HAL_8188E_REG_H__ ++#define __HAL_8188E_REG_H__ ++ ++// ++// Register Definition ++// ++#define TRX_ANTDIV_PATH 0x860 ++#define RX_ANTDIV_PATH 0xb2c ++#define ODM_R_A_AGC_CORE1_8188E 0xc50 ++ ++ ++// ++// Bitmap Definition ++// ++#define BIT_FA_RESET_8188E BIT0 ++#define REG_ADAPTIVE_DATA_RATE_0 0x2B0 ++#define REG_DBI_WDATA_8188 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8188 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8188 0x0350 // DBI Address ++#define REG_DBI_FLAG_8188 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8188E 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8188E 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8188E 0x0358 // MDIO for Control ++ ++// [0-63] ++#define REG_MACID_NO_LINK 0x484 // No Link register (bit[x] enabled means dropping packets for MACID in HW queue) ++ ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_bb.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_bb.c +new file mode 100644 +index 0000000..27c08ec +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_bb.c +@@ -0,0 +1,1094 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188E_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* AGC_TAB.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188E_AGC_TAB[] = { ++ 0x88000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xF6000001, ++ 0xC78, 0xF5010001, ++ 0xC78, 0xF4020001, ++ 0xC78, 0xF3030001, ++ 0xC78, 0xF2040001, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xF7000001, ++ 0xC78, 0xF6010001, ++ 0xC78, 0xF5020001, ++ 0xC78, 0xF4030001, ++ 0xC78, 0xF3040001, ++ 0xA0000000, 0x00000000, ++ 0xC78, 0xFB000001, ++ 0xC78, 0xFB010001, ++ 0xC78, 0xFB020001, ++ 0xC78, 0xFB030001, ++ 0xC78, 0xFB040001, ++ 0xB0000000, 0x00000000, ++ 0x88000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xF1050001, ++ 0xC78, 0xF0060001, ++ 0xC78, 0xEF070001, ++ 0xC78, 0xEE080001, ++ 0xC78, 0xED090001, ++ 0xC78, 0xEC0A0001, ++ 0xC78, 0xEB0B0001, ++ 0xC78, 0xEA0C0001, ++ 0xC78, 0xE90D0001, ++ 0xC78, 0xE80E0001, ++ 0xC78, 0xE70F0001, ++ 0xC78, 0xE6100001, ++ 0xC78, 0xE5110001, ++ 0xC78, 0xE4120001, ++ 0xC78, 0xE3130001, ++ 0xC78, 0xE2140001, ++ 0xC78, 0xC5150001, ++ 0xC78, 0xC4160001, ++ 0xC78, 0xC3170001, ++ 0xC78, 0xC2180001, ++ 0xC78, 0x88190001, ++ 0xC78, 0x871A0001, ++ 0xC78, 0x861B0001, ++ 0xC78, 0x851C0001, ++ 0xC78, 0x841D0001, ++ 0xC78, 0x831E0001, ++ 0xC78, 0x821F0001, ++ 0xC78, 0x81200001, ++ 0xC78, 0x80210001, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xF2050001, ++ 0xC78, 0xF1060001, ++ 0xC78, 0xF0070001, ++ 0xC78, 0xEF080001, ++ 0xC78, 0xEE090001, ++ 0xC78, 0xED0A0001, ++ 0xC78, 0xEC0B0001, ++ 0xC78, 0xEB0C0001, ++ 0xC78, 0xEA0D0001, ++ 0xC78, 0xE90E0001, ++ 0xC78, 0xE80F0001, ++ 0xC78, 0xE7100001, ++ 0xC78, 0xE6110001, ++ 0xC78, 0xE5120001, ++ 0xC78, 0xE4130001, ++ 0xC78, 0xE3140001, ++ 0xC78, 0xE2150001, ++ 0xC78, 0xE1160001, ++ 0xC78, 0x89170001, ++ 0xC78, 0x88180001, ++ 0xC78, 0x87190001, ++ 0xC78, 0x861A0001, ++ 0xC78, 0x851B0001, ++ 0xC78, 0x841C0001, ++ 0xC78, 0x831D0001, ++ 0xC78, 0x821E0001, ++ 0xC78, 0x811F0001, ++ 0xC78, 0x6B200001, ++ 0xC78, 0x6A210001, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xFA050001, ++ 0xC78, 0xF9060001, ++ 0xC78, 0xF8070001, ++ 0xC78, 0xF7080001, ++ 0xC78, 0xF6090001, ++ 0xC78, 0xF50A0001, ++ 0xC78, 0xF40B0001, ++ 0xC78, 0xF30C0001, ++ 0xC78, 0xF20D0001, ++ 0xC78, 0xF10E0001, ++ 0xC78, 0xF00F0001, ++ 0xC78, 0xEF100001, ++ 0xC78, 0xEE110001, ++ 0xC78, 0xED120001, ++ 0xC78, 0xEC130001, ++ 0xC78, 0xEB140001, ++ 0xC78, 0xEA150001, ++ 0xC78, 0xE9160001, ++ 0xC78, 0xE8170001, ++ 0xC78, 0xE7180001, ++ 0xC78, 0xE6190001, ++ 0xC78, 0xE51A0001, ++ 0xC78, 0xE41B0001, ++ 0xC78, 0xC71C0001, ++ 0xC78, 0xC61D0001, ++ 0xC78, 0xC51E0001, ++ 0xC78, 0xC41F0001, ++ 0xC78, 0xC3200001, ++ 0xC78, 0xC2210001, ++ 0xA0000000, 0x00000000, ++ 0xC78, 0xFB050001, ++ 0xC78, 0xFA060001, ++ 0xC78, 0xF9070001, ++ 0xC78, 0xF8080001, ++ 0xC78, 0xF7090001, ++ 0xC78, 0xF60A0001, ++ 0xC78, 0xF50B0001, ++ 0xC78, 0xF40C0001, ++ 0xC78, 0xF30D0001, ++ 0xC78, 0xF20E0001, ++ 0xC78, 0xF10F0001, ++ 0xC78, 0xF0100001, ++ 0xC78, 0xEF110001, ++ 0xC78, 0xEE120001, ++ 0xC78, 0xED130001, ++ 0xC78, 0xEC140001, ++ 0xC78, 0xEB150001, ++ 0xC78, 0xEA160001, ++ 0xC78, 0xE9170001, ++ 0xC78, 0xE8180001, ++ 0xC78, 0xE7190001, ++ 0xC78, 0xE61A0001, ++ 0xC78, 0xE51B0001, ++ 0xC78, 0xE41C0001, ++ 0xC78, 0xE31D0001, ++ 0xC78, 0xE21E0001, ++ 0xC78, 0xE11F0001, ++ 0xC78, 0x8A200001, ++ 0xC78, 0x89210001, ++ 0xB0000000, 0x00000000, ++ 0x88000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x66220001, ++ 0xC78, 0x65230001, ++ 0xC78, 0x64240001, ++ 0xC78, 0x63250001, ++ 0xC78, 0x62260001, ++ 0xC78, 0x61270001, ++ 0xC78, 0x60280001, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x69220001, ++ 0xC78, 0x68230001, ++ 0xC78, 0x67240001, ++ 0xC78, 0x66250001, ++ 0xC78, 0x65260001, ++ 0xC78, 0x64270001, ++ 0xC78, 0x63280001, ++ 0xA0000000, 0x00000000, ++ 0xC78, 0x88220001, ++ 0xC78, 0x87230001, ++ 0xC78, 0x86240001, ++ 0xC78, 0x85250001, ++ 0xC78, 0x84260001, ++ 0xC78, 0x83270001, ++ 0xC78, 0x82280001, ++ 0xB0000000, 0x00000000, ++ 0x88000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x4A290001, ++ 0xC78, 0x492A0001, ++ 0xC78, 0x482B0001, ++ 0xC78, 0x472C0001, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x62290001, ++ 0xC78, 0x612A0001, ++ 0xC78, 0x462B0001, ++ 0xC78, 0x452C0001, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x81290001, ++ 0xC78, 0x242A0001, ++ 0xC78, 0x232B0001, ++ 0xC78, 0x222C0001, ++ 0xA0000000, 0x00000000, ++ 0xC78, 0x6B290001, ++ 0xC78, 0x6A2A0001, ++ 0xC78, 0x692B0001, ++ 0xC78, 0x682C0001, ++ 0xB0000000, 0x00000000, ++ 0x88000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x462D0001, ++ 0xC78, 0x452E0001, ++ 0xC78, 0x442F0001, ++ 0xC78, 0x43300001, ++ 0xC78, 0x42310001, ++ 0xC78, 0x41320001, ++ 0xC78, 0x40330001, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x442D0001, ++ 0xC78, 0x432E0001, ++ 0xC78, 0x422F0001, ++ 0xC78, 0x41300001, ++ 0xC78, 0x40310001, ++ 0xC78, 0x40320001, ++ 0xC78, 0x40330001, ++ 0xA0000000, 0x00000000, ++ 0xC78, 0x672D0001, ++ 0xC78, 0x662E0001, ++ 0xC78, 0x652F0001, ++ 0xC78, 0x64300001, ++ 0xC78, 0x63310001, ++ 0xC78, 0x62320001, ++ 0xC78, 0x61330001, ++ 0xB0000000, 0x00000000, ++ 0x88000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x40340001, ++ 0xC78, 0x40350001, ++ 0xC78, 0x40360001, ++ 0xC78, 0x40370001, ++ 0xC78, 0x40380001, ++ 0xC78, 0x40390001, ++ 0xC78, 0x403A0001, ++ 0xC78, 0x403B0001, ++ 0xC78, 0x403C0001, ++ 0xC78, 0x403D0001, ++ 0xC78, 0x403E0001, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x40340001, ++ 0xC78, 0x40350001, ++ 0xC78, 0x40360001, ++ 0xC78, 0x40370001, ++ 0xC78, 0x40380001, ++ 0xC78, 0x40390001, ++ 0xC78, 0x403A0001, ++ 0xC78, 0x403B0001, ++ 0xC78, 0x403C0001, ++ 0xC78, 0x403D0001, ++ 0xC78, 0x403E0001, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0x60340001, ++ 0xC78, 0x4A350001, ++ 0xC78, 0x49360001, ++ 0xC78, 0x48370001, ++ 0xC78, 0x47380001, ++ 0xC78, 0x46390001, ++ 0xC78, 0x453A0001, ++ 0xC78, 0x443B0001, ++ 0xC78, 0x433C0001, ++ 0xC78, 0x423D0001, ++ 0xC78, 0x413E0001, ++ 0xA0000000, 0x00000000, ++ 0xC78, 0x46340001, ++ 0xC78, 0x45350001, ++ 0xC78, 0x44360001, ++ 0xC78, 0x43370001, ++ 0xC78, 0x42380001, ++ 0xC78, 0x41390001, ++ 0xC78, 0x403A0001, ++ 0xC78, 0x403B0001, ++ 0xC78, 0x403C0001, ++ 0xC78, 0x403D0001, ++ 0xC78, 0x403E0001, ++ 0xB0000000, 0x00000000, ++ 0xC78, 0x403F0001, ++ 0x88000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xFB400001, ++ 0xC78, 0xFA410001, ++ 0xC78, 0xF9420001, ++ 0xC78, 0xF8430001, ++ 0xC78, 0xF7440001, ++ 0xC78, 0xF6450001, ++ 0xC78, 0xF5460001, ++ 0xC78, 0xF4470001, ++ 0xC78, 0xF3480001, ++ 0xC78, 0xF2490001, ++ 0xC78, 0xF14A0001, ++ 0xC78, 0xF04B0001, ++ 0xC78, 0xEF4C0001, ++ 0xC78, 0xEE4D0001, ++ 0xC78, 0xED4E0001, ++ 0xC78, 0xEC4F0001, ++ 0xC78, 0xEB500001, ++ 0xC78, 0xEA510001, ++ 0xC78, 0xE9520001, ++ 0xC78, 0xE8530001, ++ 0xC78, 0xE7540001, ++ 0xC78, 0xE6550001, ++ 0xC78, 0xE5560001, ++ 0xC78, 0xC6570001, ++ 0xC78, 0xC5580001, ++ 0xC78, 0xC4590001, ++ 0xC78, 0xC35A0001, ++ 0xC78, 0xC25B0001, ++ 0xC78, 0xC15C0001, ++ 0xC78, 0xC05D0001, ++ 0xC78, 0xA35E0001, ++ 0xC78, 0xA25F0001, ++ 0xC78, 0xA1600001, ++ 0xC78, 0x88610001, ++ 0xC78, 0x87620001, ++ 0xC78, 0x86630001, ++ 0xC78, 0x85640001, ++ 0xC78, 0x84650001, ++ 0xC78, 0x83660001, ++ 0xC78, 0x82670001, ++ 0xC78, 0x66680001, ++ 0xC78, 0x65690001, ++ 0xC78, 0x646A0001, ++ 0xC78, 0x636B0001, ++ 0xC78, 0x626C0001, ++ 0xC78, 0x616D0001, ++ 0xC78, 0x486E0001, ++ 0xC78, 0x476F0001, ++ 0xC78, 0x46700001, ++ 0xC78, 0x45710001, ++ 0xC78, 0x44720001, ++ 0xC78, 0x43730001, ++ 0xC78, 0x42740001, ++ 0xC78, 0x41750001, ++ 0xC78, 0x40760001, ++ 0xC78, 0x40770001, ++ 0xC78, 0x40780001, ++ 0xC78, 0x40790001, ++ 0xC78, 0x407A0001, ++ 0xC78, 0x407B0001, ++ 0xC78, 0x407C0001, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xFB400001, ++ 0xC78, 0xFA410001, ++ 0xC78, 0xF9420001, ++ 0xC78, 0xF8430001, ++ 0xC78, 0xF7440001, ++ 0xC78, 0xF6450001, ++ 0xC78, 0xF5460001, ++ 0xC78, 0xF4470001, ++ 0xC78, 0xF3480001, ++ 0xC78, 0xF2490001, ++ 0xC78, 0xF14A0001, ++ 0xC78, 0xF04B0001, ++ 0xC78, 0xEF4C0001, ++ 0xC78, 0xEE4D0001, ++ 0xC78, 0xED4E0001, ++ 0xC78, 0xEC4F0001, ++ 0xC78, 0xEB500001, ++ 0xC78, 0xEA510001, ++ 0xC78, 0xE9520001, ++ 0xC78, 0xE8530001, ++ 0xC78, 0xE7540001, ++ 0xC78, 0xE6550001, ++ 0xC78, 0xE5560001, ++ 0xC78, 0xE4570001, ++ 0xC78, 0xE3580001, ++ 0xC78, 0xE2590001, ++ 0xC78, 0xC35A0001, ++ 0xC78, 0xC25B0001, ++ 0xC78, 0xC15C0001, ++ 0xC78, 0x8B5D0001, ++ 0xC78, 0x8A5E0001, ++ 0xC78, 0x895F0001, ++ 0xC78, 0x88600001, ++ 0xC78, 0x87610001, ++ 0xC78, 0x86620001, ++ 0xC78, 0x85630001, ++ 0xC78, 0x84640001, ++ 0xC78, 0x67650001, ++ 0xC78, 0x66660001, ++ 0xC78, 0x65670001, ++ 0xC78, 0x64680001, ++ 0xC78, 0x63690001, ++ 0xC78, 0x626A0001, ++ 0xC78, 0x616B0001, ++ 0xC78, 0x606C0001, ++ 0xC78, 0x466D0001, ++ 0xC78, 0x456E0001, ++ 0xC78, 0x446F0001, ++ 0xC78, 0x43700001, ++ 0xC78, 0x42710001, ++ 0xC78, 0x41720001, ++ 0xC78, 0x40730001, ++ 0xC78, 0x40740001, ++ 0xC78, 0x40750001, ++ 0xC78, 0x40760001, ++ 0xC78, 0x40770001, ++ 0xC78, 0x40780001, ++ 0xC78, 0x40790001, ++ 0xC78, 0x407A0001, ++ 0xC78, 0x407B0001, ++ 0xC78, 0x407C0001, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0xC78, 0xFB400001, ++ 0xC78, 0xFB410001, ++ 0xC78, 0xFB420001, ++ 0xC78, 0xFB430001, ++ 0xC78, 0xFB440001, ++ 0xC78, 0xFB450001, ++ 0xC78, 0xFA460001, ++ 0xC78, 0xF9470001, ++ 0xC78, 0xF8480001, ++ 0xC78, 0xF7490001, ++ 0xC78, 0xF64A0001, ++ 0xC78, 0xF54B0001, ++ 0xC78, 0xF44C0001, ++ 0xC78, 0xF34D0001, ++ 0xC78, 0xF24E0001, ++ 0xC78, 0xF14F0001, ++ 0xC78, 0xF0500001, ++ 0xC78, 0xEF510001, ++ 0xC78, 0xEE520001, ++ 0xC78, 0xED530001, ++ 0xC78, 0xEC540001, ++ 0xC78, 0xEB550001, ++ 0xC78, 0xEA560001, ++ 0xC78, 0xE9570001, ++ 0xC78, 0xE8580001, ++ 0xC78, 0xE7590001, ++ 0xC78, 0xE65A0001, ++ 0xC78, 0xE55B0001, ++ 0xC78, 0xC65C0001, ++ 0xC78, 0xC55D0001, ++ 0xC78, 0xC45E0001, ++ 0xC78, 0xC35F0001, ++ 0xC78, 0xC2600001, ++ 0xC78, 0xC1610001, ++ 0xC78, 0xC0620001, ++ 0xC78, 0xA3630001, ++ 0xC78, 0xA2640001, ++ 0xC78, 0xA1650001, ++ 0xC78, 0x88660001, ++ 0xC78, 0x87670001, ++ 0xC78, 0x86680001, ++ 0xC78, 0x85690001, ++ 0xC78, 0x846A0001, ++ 0xC78, 0x836B0001, ++ 0xC78, 0x826C0001, ++ 0xC78, 0x666D0001, ++ 0xC78, 0x656E0001, ++ 0xC78, 0x646F0001, ++ 0xC78, 0x63700001, ++ 0xC78, 0x62710001, ++ 0xC78, 0x61720001, ++ 0xC78, 0x48730001, ++ 0xC78, 0x47740001, ++ 0xC78, 0x46750001, ++ 0xC78, 0x45760001, ++ 0xC78, 0x44770001, ++ 0xC78, 0x43780001, ++ 0xC78, 0x42790001, ++ 0xC78, 0x417A0001, ++ 0xC78, 0x407B0001, ++ 0xC78, 0x407C0001, ++ 0xA0000000, 0x00000000, ++ 0xC78, 0xFB400001, ++ 0xC78, 0xFB410001, ++ 0xC78, 0xFB420001, ++ 0xC78, 0xFB430001, ++ 0xC78, 0xFB440001, ++ 0xC78, 0xFB450001, ++ 0xC78, 0xFB460001, ++ 0xC78, 0xFB470001, ++ 0xC78, 0xFB480001, ++ 0xC78, 0xFA490001, ++ 0xC78, 0xF94A0001, ++ 0xC78, 0xF84B0001, ++ 0xC78, 0xF74C0001, ++ 0xC78, 0xF64D0001, ++ 0xC78, 0xF54E0001, ++ 0xC78, 0xF44F0001, ++ 0xC78, 0xF3500001, ++ 0xC78, 0xF2510001, ++ 0xC78, 0xF1520001, ++ 0xC78, 0xF0530001, ++ 0xC78, 0xEF540001, ++ 0xC78, 0xEE550001, ++ 0xC78, 0xED560001, ++ 0xC78, 0xEC570001, ++ 0xC78, 0xEB580001, ++ 0xC78, 0xEA590001, ++ 0xC78, 0xE95A0001, ++ 0xC78, 0xE85B0001, ++ 0xC78, 0xE75C0001, ++ 0xC78, 0xE65D0001, ++ 0xC78, 0xE55E0001, ++ 0xC78, 0xE45F0001, ++ 0xC78, 0xE3600001, ++ 0xC78, 0xE2610001, ++ 0xC78, 0xC3620001, ++ 0xC78, 0xC2630001, ++ 0xC78, 0xC1640001, ++ 0xC78, 0x8B650001, ++ 0xC78, 0x8A660001, ++ 0xC78, 0x89670001, ++ 0xC78, 0x88680001, ++ 0xC78, 0x87690001, ++ 0xC78, 0x866A0001, ++ 0xC78, 0x856B0001, ++ 0xC78, 0x846C0001, ++ 0xC78, 0x676D0001, ++ 0xC78, 0x666E0001, ++ 0xC78, 0x656F0001, ++ 0xC78, 0x64700001, ++ 0xC78, 0x63710001, ++ 0xC78, 0x62720001, ++ 0xC78, 0x61730001, ++ 0xC78, 0x60740001, ++ 0xC78, 0x46750001, ++ 0xC78, 0x45760001, ++ 0xC78, 0x44770001, ++ 0xC78, 0x43780001, ++ 0xC78, 0x42790001, ++ 0xC78, 0x417A0001, ++ 0xC78, 0x407B0001, ++ 0xC78, 0x407C0001, ++ 0xB0000000, 0x00000000, ++ 0xC78, 0x407D0001, ++ 0xC78, 0x407E0001, ++ 0xC78, 0x407F0001, ++ 0xC50, 0x69553422, ++ 0xC50, 0x69553420, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188E_AGC_TAB( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188E_AGC_TAB)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188E_AGC_TAB; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188E_AGC_TAB\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188E_AGC_TAB(void) ++{ ++ return 63; ++} ++ ++/****************************************************************************** ++* PHY_REG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188E_PHY_REG[] = { ++ 0x800, 0x80040000, ++ 0x804, 0x00000003, ++ 0x808, 0x0000FC00, ++ 0x80C, 0x0000000A, ++ 0x810, 0x10001331, ++ 0x814, 0x020C3D10, ++ 0x818, 0x02200385, ++ 0x81C, 0x00000000, ++ 0x820, 0x01000100, ++ 0x824, 0x00390204, ++ 0x828, 0x00000000, ++ 0x82C, 0x00000000, ++ 0x830, 0x00000000, ++ 0x834, 0x00000000, ++ 0x838, 0x00000000, ++ 0x83C, 0x00000000, ++ 0x840, 0x00010000, ++ 0x844, 0x00000000, ++ 0x848, 0x00000000, ++ 0x84C, 0x00000000, ++ 0x850, 0x00000000, ++ 0x854, 0x00000000, ++ 0x858, 0x569A11A9, ++ 0x85C, 0x01000014, ++ 0x860, 0x66F60110, ++ 0x864, 0x061F0649, ++ 0x868, 0x00000000, ++ 0x86C, 0x27272700, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x870, 0x07000300, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x870, 0x07000300, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x870, 0x07000300, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x870, 0x07000300, ++ 0xA0000000, 0x00000000, ++ 0x870, 0x07000760, ++ 0xB0000000, 0x00000000, ++ 0x874, 0x25004000, ++ 0x878, 0x00000808, ++ 0x87C, 0x00000000, ++ 0x880, 0xB0000C1C, ++ 0x884, 0x00000001, ++ 0x888, 0x00000000, ++ 0x88C, 0xCCC000C0, ++ 0x890, 0x00000800, ++ 0x894, 0xFFFFFFFE, ++ 0x898, 0x40302010, ++ 0x89C, 0x00706050, ++ 0x900, 0x00000000, ++ 0x904, 0x00000023, ++ 0x908, 0x00000000, ++ 0x90C, 0x81121111, ++ 0x910, 0x00000002, ++ 0x914, 0x00000201, ++ 0xA00, 0x00D047C8, ++ 0xA04, 0x80FF800C, ++ 0xA08, 0x8C838300, ++ 0xA0C, 0x2E7F120F, ++ 0xA10, 0x9500BB78, ++ 0xA14, 0x1114D028, ++ 0xA18, 0x00881117, ++ 0xA1C, 0x89140F00, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xA20, 0x13130000, ++ 0xA24, 0x060A0D10, ++ 0xA28, 0x00000103, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xA20, 0x13130000, ++ 0xA24, 0x060A0D10, ++ 0xA28, 0x00000103, ++ 0xA0000000, 0x00000000, ++ 0xA20, 0x1A1B0000, ++ 0xA24, 0x090E1317, ++ 0xA28, 0x00000204, ++ 0xB0000000, 0x00000000, ++ 0xA2C, 0x00D30000, ++ 0xA70, 0x101FBF00, ++ 0xA74, 0x00000007, ++ 0xA78, 0x00000900, ++ 0xA7C, 0x225B0606, ++ 0xA80, 0x218075B1, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xB2C, 0x00000000, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xB2C, 0x00000000, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xB2C, 0x00000000, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xB2C, 0x00000000, ++ 0xA0000000, 0x00000000, ++ 0xB2C, 0x80000000, ++ 0xB0000000, 0x00000000, ++ 0xC00, 0x48071D40, ++ 0xC04, 0x03A05611, ++ 0xC08, 0x000000E4, ++ 0xC0C, 0x6C6C6C6C, ++ 0xC10, 0x08800000, ++ 0xC14, 0x40000100, ++ 0xC18, 0x08800000, ++ 0xC1C, 0x40000100, ++ 0xC20, 0x00000000, ++ 0xC24, 0x00000000, ++ 0xC28, 0x00000000, ++ 0xC2C, 0x00000000, ++ 0xC30, 0x69E9AC47, ++ 0xC34, 0x469652AF, ++ 0xC38, 0x49795994, ++ 0xC3C, 0x0A97971C, ++ 0xC40, 0x1F7C403F, ++ 0xC44, 0x000100B7, ++ 0xC48, 0xEC020107, ++ 0xC4C, 0x007F037F, ++ 0xC50, 0x69553420, ++ 0xC54, 0x43BC0094, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xC58, 0x00013159, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC58, 0x00013159, ++ 0x98000400, 0x00000000, 0x40000000, 0x00000000, ++ 0xC58, 0x00013159, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0xC58, 0x00013159, ++ 0xA0000000, 0x00000000, ++ 0xC58, 0x00013169, ++ 0xB0000000, 0x00000000, ++ 0xC5C, 0x00250492, ++ 0xC60, 0x00000000, ++ 0xC64, 0x7112848B, ++ 0xC68, 0x47C00BFF, ++ 0xC6C, 0x00000036, ++ 0xC70, 0x2C7F000D, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xC74, 0x028610DB, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xC74, 0x028610DB, ++ 0x98000400, 0x00000000, 0x40000000, 0x00000000, ++ 0xC74, 0x028610DB, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0xC74, 0x028610DB, ++ 0xA0000000, 0x00000000, ++ 0xC74, 0x020610DB, ++ 0xB0000000, 0x00000000, ++ 0xC78, 0x0000001F, ++ 0xC7C, 0x00B91612, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xC80, 0x2D4000B5, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xC80, 0x2D4000B5, ++ 0xA0000000, 0x00000000, ++ 0xC80, 0x390000E4, ++ 0xB0000000, 0x00000000, ++ 0xC84, 0x21F60000, ++ 0xC88, 0x40000100, ++ 0xC8C, 0x20200000, ++ 0xC90, 0x00091521, ++ 0xC94, 0x00000000, ++ 0xC98, 0x00121820, ++ 0xC9C, 0x00007F7F, ++ 0xCA0, 0x00000000, ++ 0xCA4, 0x000300A0, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xCA8, 0xFFFF0000, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xCA8, 0xFFFF0000, ++ 0x98000400, 0x00000000, 0x40000000, 0x00000000, ++ 0xCA8, 0xFFFF0000, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0xCA8, 0xFFFF0000, ++ 0xA0000000, 0x00000000, ++ 0xCA8, 0x00000000, ++ 0xB0000000, 0x00000000, ++ 0xCAC, 0x00000000, ++ 0xCB0, 0x00000000, ++ 0xCB4, 0x00000000, ++ 0xCB8, 0x00000000, ++ 0xCBC, 0x28000000, ++ 0xCC0, 0x00000000, ++ 0xCC4, 0x00000000, ++ 0xCC8, 0x00000000, ++ 0xCCC, 0x00000000, ++ 0xCD0, 0x00000000, ++ 0xCD4, 0x00000000, ++ 0xCD8, 0x64B22427, ++ 0xCDC, 0x00766932, ++ 0xCE0, 0x00222222, ++ 0xCE4, 0x00000000, ++ 0xCE8, 0x37644302, ++ 0xCEC, 0x2F97D40C, ++ 0xD00, 0x00000740, ++ 0xD04, 0x00020401, ++ 0xD08, 0x0000907F, ++ 0xD0C, 0x20010201, ++ 0xD10, 0xA0633333, ++ 0xD14, 0x3333BC43, ++ 0xD18, 0x7A8F5B6F, ++ 0xD2C, 0xCC979975, ++ 0xD30, 0x00000000, ++ 0xD34, 0x80608000, ++ 0xD38, 0x00000000, ++ 0xD3C, 0x00127353, ++ 0xD40, 0x00000000, ++ 0xD44, 0x00000000, ++ 0xD48, 0x00000000, ++ 0xD4C, 0x00000000, ++ 0xD50, 0x6437140A, ++ 0xD54, 0x00000000, ++ 0xD58, 0x00000282, ++ 0xD5C, 0x30032064, ++ 0xD60, 0x4653DE68, ++ 0xD64, 0x04518A3C, ++ 0xD68, 0x00002101, ++ 0xD6C, 0x2A201C16, ++ 0xD70, 0x1812362E, ++ 0xD74, 0x322C2220, ++ 0xD78, 0x000E3C24, ++ 0xE00, 0x2D2D2D2D, ++ 0xE04, 0x2D2D2D2D, ++ 0xE08, 0x0390272D, ++ 0xE10, 0x2D2D2D2D, ++ 0xE14, 0x2D2D2D2D, ++ 0xE18, 0x2D2D2D2D, ++ 0xE1C, 0x2D2D2D2D, ++ 0xE28, 0x00000000, ++ 0xE30, 0x1000DC1F, ++ 0xE34, 0x10008C1F, ++ 0xE38, 0x02140102, ++ 0xE3C, 0x681604C2, ++ 0xE40, 0x01007C00, ++ 0xE44, 0x01004800, ++ 0xE48, 0xFB000000, ++ 0xE4C, 0x000028D1, ++ 0xE50, 0x1000DC1F, ++ 0xE54, 0x10008C1F, ++ 0xE58, 0x02140102, ++ 0xE5C, 0x28160D05, ++ 0xE60, 0x00000048, ++ 0xE68, 0x001B25A4, ++ 0xE6C, 0x00C00014, ++ 0xE70, 0x00C00014, ++ 0xE74, 0x01000014, ++ 0xE78, 0x01000014, ++ 0xE7C, 0x01000014, ++ 0xE80, 0x01000014, ++ 0xE84, 0x00C00014, ++ 0xE88, 0x01000014, ++ 0xE8C, 0x00C00014, ++ 0xED0, 0x00C00014, ++ 0xED4, 0x00C00014, ++ 0xED8, 0x00C00014, ++ 0xEDC, 0x00000014, ++ 0xEE0, 0x00000014, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xEE8, 0x32555448, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xEE8, 0x32555448, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0xEE8, 0x32555448, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0xEE8, 0x32555448, ++ 0xA0000000, 0x00000000, ++ 0xEE8, 0x21555448, ++ 0xB0000000, 0x00000000, ++ 0xEEC, 0x01C00014, ++ 0xF14, 0x00000003, ++ 0xF4C, 0x00000000, ++ 0xF00, 0x00000300, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188E_PHY_REG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188E_PHY_REG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188E_PHY_REG; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188E_PHY_REG\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188E_PHY_REG(void) ++{ ++ return 63; ++} ++ ++/****************************************************************************** ++* PHY_REG_PG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188E_PHY_REG_PG[] = { ++ 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003800, ++ 0, 0, 0, 0x0000086c, 0xffffff00, 0x32343600, ++ 0, 0, 0, 0x00000e00, 0xffffffff, 0x40424446, ++ 0, 0, 0, 0x00000e04, 0xffffffff, 0x28323638, ++ 0, 0, 0, 0x00000e10, 0xffffffff, 0x38404244, ++ 0, 0, 0, 0x00000e14, 0xffffffff, 0x26303436 ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188E_PHY_REG_PG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u4Byte ArrayLen = sizeof(Array_MP_8188E_PHY_REG_PG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188E_PHY_REG_PG; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformZeroMemory(pHalData->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesReadPwrByRate = ArrayLen/6; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188E_PHY_REG_PG\n")); ++ ++ pDM_Odm->PhyRegPgVersion = 1; ++ pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; ++ ++ for (i = 0; i < ArrayLen; i += 6) { ++ u4Byte v1 = Array[i]; ++ u4Byte v2 = Array[i+1]; ++ u4Byte v3 = Array[i+2]; ++ u4Byte v4 = Array[i+3]; ++ u4Byte v5 = Array[i+4]; ++ u4Byte v6 = Array[i+5]; ++ ++ odm_ConfigBB_PHY_REG_PG_8188E(pDM_Odm, v1, v2, v3, v4, v5, v6); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ rsprintf(pHalData->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", ++ (v1 == 0?"2.4G":" 5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6); ++#endif ++ } ++} ++ ++ ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_bb.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_bb.h +new file mode 100644 +index 0000000..01e5f71 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_bb.h +@@ -0,0 +1,59 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#if (RTL8188E_SUPPORT == 1) ++#ifndef __INC_MP_BB_HW_IMG_8188E_H ++#define __INC_MP_BB_HW_IMG_8188E_H ++ ++ ++/****************************************************************************** ++* AGC_TAB.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_AGC_TAB(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_AGC_TAB(void); ++ ++/****************************************************************************** ++* PHY_REG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_PHY_REG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_PHY_REG(void); ++ ++/****************************************************************************** ++* PHY_REG_PG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_PHY_REG_PG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_PHY_REG_PG(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_mac.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_mac.c +new file mode 100644 +index 0000000..a10c500 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_mac.c +@@ -0,0 +1,286 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188E_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* MAC_REG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188E_MAC_REG[] = { ++ 0x026, 0x00000041, ++ 0x027, 0x00000035, ++ 0x80000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x040, 0x0000000C, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x040, 0x0000000C, ++ 0xA0000000, 0x00000000, ++ 0x040, 0x00000000, ++ 0xB0000000, 0x00000000, ++ 0x421, 0x0000000F, ++ 0x428, 0x0000000A, ++ 0x429, 0x00000010, ++ 0x430, 0x00000000, ++ 0x431, 0x00000001, ++ 0x432, 0x00000002, ++ 0x433, 0x00000004, ++ 0x434, 0x00000005, ++ 0x435, 0x00000006, ++ 0x436, 0x00000007, ++ 0x437, 0x00000008, ++ 0x438, 0x00000000, ++ 0x439, 0x00000000, ++ 0x43A, 0x00000001, ++ 0x43B, 0x00000002, ++ 0x43C, 0x00000004, ++ 0x43D, 0x00000005, ++ 0x43E, 0x00000006, ++ 0x43F, 0x00000007, ++ 0x440, 0x0000005D, ++ 0x441, 0x00000001, ++ 0x442, 0x00000000, ++ 0x444, 0x00000015, ++ 0x445, 0x000000F0, ++ 0x446, 0x0000000F, ++ 0x447, 0x00000000, ++ 0x458, 0x00000041, ++ 0x459, 0x000000A8, ++ 0x45A, 0x00000072, ++ 0x45B, 0x000000B9, ++ 0x460, 0x00000066, ++ 0x461, 0x00000066, ++ 0x480, 0x00000008, ++ 0x4C8, 0x000000FF, ++ 0x4C9, 0x00000008, ++ 0x4CC, 0x000000FF, ++ 0x4CD, 0x000000FF, ++ 0x4CE, 0x00000001, ++ 0x4D3, 0x00000001, ++ 0x500, 0x00000026, ++ 0x501, 0x000000A2, ++ 0x502, 0x0000002F, ++ 0x503, 0x00000000, ++ 0x504, 0x00000028, ++ 0x505, 0x000000A3, ++ 0x506, 0x0000005E, ++ 0x507, 0x00000000, ++ 0x508, 0x0000002B, ++ 0x509, 0x000000A4, ++ 0x50A, 0x0000005E, ++ 0x50B, 0x00000000, ++ 0x50C, 0x0000004F, ++ 0x50D, 0x000000A4, ++ 0x50E, 0x00000000, ++ 0x50F, 0x00000000, ++ 0x512, 0x0000001C, ++ 0x514, 0x0000000A, ++ 0x516, 0x0000000A, ++ 0x525, 0x0000004F, ++ 0x550, 0x00000010, ++ 0x551, 0x00000010, ++ 0x559, 0x00000002, ++ 0x55D, 0x000000FF, ++ 0x605, 0x00000030, ++ 0x608, 0x0000000E, ++ 0x609, 0x0000002A, ++ 0x620, 0x000000FF, ++ 0x621, 0x000000FF, ++ 0x622, 0x000000FF, ++ 0x623, 0x000000FF, ++ 0x624, 0x000000FF, ++ 0x625, 0x000000FF, ++ 0x626, 0x000000FF, ++ 0x627, 0x000000FF, ++ 0x63C, 0x00000008, ++ 0x63D, 0x00000008, ++ 0x63E, 0x0000000C, ++ 0x63F, 0x0000000C, ++ 0x640, 0x00000040, ++ 0x652, 0x00000020, ++ 0x66E, 0x00000005, ++ 0x700, 0x00000021, ++ 0x701, 0x00000043, ++ 0x702, 0x00000065, ++ 0x703, 0x00000087, ++ 0x708, 0x00000021, ++ 0x709, 0x00000043, ++ 0x70A, 0x00000065, ++ 0x70B, 0x00000087, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188E_MAC_REG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188E_MAC_REG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188E_MAC_REG; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188E_MAC_REG\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188E_MAC_REG(void) ++{ ++ return 63; ++} ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_mac.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_mac.h +new file mode 100644 +index 0000000..5c8365b +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_mac.h +@@ -0,0 +1,39 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#if (RTL8188E_SUPPORT == 1) ++#ifndef __INC_MP_MAC_HW_IMG_8188E_H ++#define __INC_MP_MAC_HW_IMG_8188E_H ++ ++ ++/****************************************************************************** ++* MAC_REG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_MAC_REG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_MAC_REG(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_rf.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_rf.c +new file mode 100644 +index 0000000..10fac60 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_rf.c +@@ -0,0 +1,1822 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188E_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* RadioA.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188E_RadioA[] = { ++ 0x000, 0x00030000, ++ 0x008, 0x00084000, ++ 0x018, 0x00000407, ++ 0x019, 0x00000012, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x01B, 0x00000084, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x01B, 0x00000084, ++ 0x98000400, 0x00000000, 0x40000000, 0x00000000, ++ 0x01B, 0x00000084, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0x01B, 0x00000084, ++ 0x90000400, 0x00000000, 0x40000000, 0x00000000, ++ 0xA0000000, 0x00000000, ++ 0xB0000000, 0x00000000, ++ 0x01E, 0x00080009, ++ 0x01F, 0x00000880, ++ 0x02F, 0x0001A060, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x03F, 0x000C0000, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x03F, 0x000C0000, ++ 0x98000400, 0x00000000, 0x40000000, 0x00000000, ++ 0x03F, 0x000C0000, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x03F, 0x00000000, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x03F, 0x00000000, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0x03F, 0x000C0000, ++ 0x90000400, 0x00000000, 0x40000000, 0x00000000, ++ 0x03F, 0x00000000, ++ 0xA0000000, 0x00000000, ++ 0x03F, 0x00000000, ++ 0xB0000000, 0x00000000, ++ 0x042, 0x000060C0, ++ 0x057, 0x000D0000, ++ 0x058, 0x000BE180, ++ 0x067, 0x00001552, ++ 0x083, 0x00000000, ++ 0x0B0, 0x000FF8FC, ++ 0x0B1, 0x00054400, ++ 0x0B2, 0x000CCC19, ++ 0x0B4, 0x00043003, ++ 0x0B6, 0x0004953E, ++ 0x0B7, 0x0001C718, ++ 0x0B8, 0x000060FF, ++ 0x0B9, 0x00080001, ++ 0x0BA, 0x00040000, ++ 0x0BB, 0x00000400, ++ 0x0BF, 0x000C0000, ++ 0x0C2, 0x00002400, ++ 0x0C3, 0x00000009, ++ 0x0C4, 0x00040C91, ++ 0x0C5, 0x00099999, ++ 0x0C6, 0x000000A3, ++ 0x0C7, 0x00088820, ++ 0x0C8, 0x00076C06, ++ 0x0C9, 0x00000000, ++ 0x0CA, 0x00080000, ++ 0x0DF, 0x00000180, ++ 0x0EF, 0x000001A0, ++ 0x051, 0x0006B27D, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x052, 0x0007E49D, ++ 0x98000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x052, 0x0007E49D, ++ 0x98000400, 0x00000000, 0x40000000, 0x00000000, ++ 0x052, 0x0007E4DD, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x052, 0x0007E49D, ++ 0x90000001, 0x00000000, 0x40000000, 0x00000000, ++ 0x052, 0x0007E49D, ++ 0x98000000, 0x00000000, 0x40000000, 0x00000000, ++ 0x052, 0x0007E49D, ++ 0x90000400, 0x00000000, 0x40000000, 0x00000000, ++ 0x052, 0x0007E4DD, ++ 0xA0000000, 0x00000000, ++ 0x052, 0x0007E49D, ++ 0xB0000000, 0x00000000, ++ 0x053, 0x00000073, ++ 0x056, 0x00051FF3, ++ 0x035, 0x00000086, ++ 0x035, 0x00000186, ++ 0x035, 0x00000286, ++ 0x036, 0x00001C25, ++ 0x036, 0x00009C25, ++ 0x036, 0x00011C25, ++ 0x036, 0x00019C25, ++ 0x0B6, 0x00048538, ++ 0x018, 0x00000C07, ++ 0x05A, 0x0004BD00, ++ 0x019, 0x000739D0, ++ 0x88000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x034, 0x0000A093, ++ 0x034, 0x0000908F, ++ 0x034, 0x0000808C, ++ 0x034, 0x0000704F, ++ 0x034, 0x0000604C, ++ 0x034, 0x00005049, ++ 0x034, 0x0000400C, ++ 0x034, 0x00003009, ++ 0x034, 0x00002006, ++ 0x034, 0x00001003, ++ 0x034, 0x00000000, ++ 0x90000003, 0x00000000, 0x40000000, 0x00000000, ++ 0x034, 0x0000A093, ++ 0x034, 0x0000908F, ++ 0x034, 0x0000808C, ++ 0x034, 0x0000704F, ++ 0x034, 0x0000604C, ++ 0x034, 0x00005049, ++ 0x034, 0x0000400C, ++ 0x034, 0x00003009, ++ 0x034, 0x00002006, ++ 0x034, 0x00001003, ++ 0x034, 0x00000000, ++ 0xA0000000, 0x00000000, ++ 0x034, 0x0000ADF3, ++ 0x034, 0x00009DF0, ++ 0x034, 0x00008DED, ++ 0x034, 0x00007DEA, ++ 0x034, 0x00006DE7, ++ 0x034, 0x000054EE, ++ 0x034, 0x000044EB, ++ 0x034, 0x000034E8, ++ 0x034, 0x0000246B, ++ 0x034, 0x00001468, ++ 0x034, 0x0000006D, ++ 0xB0000000, 0x00000000, ++ 0x000, 0x00030159, ++ 0x084, 0x00068200, ++ 0x086, 0x000000CE, ++ 0x087, 0x00048A00, ++ 0x08E, 0x00065540, ++ 0x08F, 0x00088000, ++ 0x0EF, 0x000020A0, ++ 0x03B, 0x000F02B0, ++ 0x03B, 0x000EF7B0, ++ 0x03B, 0x000D4FB0, ++ 0x03B, 0x000CF060, ++ 0x03B, 0x000B0090, ++ 0x03B, 0x000A0080, ++ 0x03B, 0x00090080, ++ 0x03B, 0x0008F780, ++ 0x03B, 0x000722B0, ++ 0x03B, 0x0006F7B0, ++ 0x03B, 0x00054FB0, ++ 0x03B, 0x0004F060, ++ 0x03B, 0x00030090, ++ 0x03B, 0x00020080, ++ 0x03B, 0x00010080, ++ 0x03B, 0x0000F780, ++ 0x0EF, 0x000000A0, ++ 0x000, 0x00010159, ++ 0x018, 0x0000F407, ++ 0xFFE, 0x00000000, ++ 0xFFE, 0x00000000, ++ 0x01F, 0x00080003, ++ 0xFFE, 0x00000000, ++ 0xFFE, 0x00000000, ++ 0x01E, 0x00000001, ++ 0x01F, 0x00080000, ++ 0x000, 0x00033E60, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188E_RadioA( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188E_RadioA)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188E_RadioA; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188E_RadioA\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188E_RadioA(void) ++{ ++ return 63; ++} ++ ++/****************************************************************************** ++* TxPowerTrack_AP.TXT ++******************************************************************************/ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8188E[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8188E[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8188E[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8188E[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8188E[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8188E[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8188E[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8188E[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_AP( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8188E, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_PCIE.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_PCIE_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_PCIE_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_PCIE_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_PCIE_8188E[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_PCIE_8188E[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_PCIE_8188E[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_PCIE_8188E[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_PCIE_8188E[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_PCIE_8188E[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_PCIE_8188E[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_PCIE_8188E[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_PCIE( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8188E, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_SDIO.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8188E[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8188E[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8188E[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8188E[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8188E[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8188E[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8188E[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8188E[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_SDIO( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8188E, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_USB.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8188E[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8188E[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8188E[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8188E[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8188E[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8188E[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8188E[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8188E[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8188E[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_USB( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8188E, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TXPWR_LMT.TXT ++******************************************************************************/ ++ ++const char *Array_MP_8188E_TXPWR_LMT[] = { ++ "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "01", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "02", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "03", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "03", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "04", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "04", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "05", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "05", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "06", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "06", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "07", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "07", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "08", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "08", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "09", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "10", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "11", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "12", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "13", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "01", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "01", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "02", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "02", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "09", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "09", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "10", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "10", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "11", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "11", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "12", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "13", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "1T", "01", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "01", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "01", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "02", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "02", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "02", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "03", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "03", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "03", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "04", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "04", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "04", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "05", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "05", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "05", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "06", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "06", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "06", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "07", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "07", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "07", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "08", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "08", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "08", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "09", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "09", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "09", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "10", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "10", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "10", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "11", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "11", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "11", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "12", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "12", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "13", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "13", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "2T", "01", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "01", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "01", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "02", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "02", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "02", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "03", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "03", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "03", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "04", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "04", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "04", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "05", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "05", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "05", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "06", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "06", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "06", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "07", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "07", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "07", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "08", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "08", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "08", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "09", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "09", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "09", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "10", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "10", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "10", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "11", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "11", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "11", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "12", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "12", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "13", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "13", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "2T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "03", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "03", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "03", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "04", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "04", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "04", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "05", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "05", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "05", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "06", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "06", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "06", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "07", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "07", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "07", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "08", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "08", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "08", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "09", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "09", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "09", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "10", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "10", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "10", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "11", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "11", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "11", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "12", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "12", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "13", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "13", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "03", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "03", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "03", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "04", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "04", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "04", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "05", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "05", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "05", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "06", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "06", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "06", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "07", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "07", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "07", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "08", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "08", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "08", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "09", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "09", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "09", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "10", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "10", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "10", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "11", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "11", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "11", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "12", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "12", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "13", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "13", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "14", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "36", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "36", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "36", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "40", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "40", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "40", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "44", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "44", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "44", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "48", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "48", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "48", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "52", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "52", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "52", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "56", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "56", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "56", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "60", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "60", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "60", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "64", "28", ++ "ETSI", "5G", "20M", "OFDM", "1T", "64", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "64", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "100", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "100", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "100", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "114", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "114", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "114", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "108", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "108", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "108", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "112", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "112", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "112", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "116", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "116", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "116", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "120", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "120", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "120", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "124", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "124", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "124", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "128", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "128", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "128", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "132", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "132", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "132", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "136", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "136", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "136", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "140", "28", ++ "ETSI", "5G", "20M", "OFDM", "1T", "140", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "140", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "149", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "149", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "149", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "153", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "153", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "153", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "157", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "157", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "157", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "161", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "161", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "161", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "165", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "165", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "165", "63", ++ "FCC", "5G", "20M", "HT", "1T", "36", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "36", "32", ++ "MKK", "5G", "20M", "HT", "1T", "36", "32", ++ "FCC", "5G", "20M", "HT", "1T", "40", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "40", "32", ++ "MKK", "5G", "20M", "HT", "1T", "40", "32", ++ "FCC", "5G", "20M", "HT", "1T", "44", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "44", "32", ++ "MKK", "5G", "20M", "HT", "1T", "44", "32", ++ "FCC", "5G", "20M", "HT", "1T", "48", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "48", "32", ++ "MKK", "5G", "20M", "HT", "1T", "48", "32", ++ "FCC", "5G", "20M", "HT", "1T", "52", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "52", "32", ++ "MKK", "5G", "20M", "HT", "1T", "52", "32", ++ "FCC", "5G", "20M", "HT", "1T", "56", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "56", "32", ++ "MKK", "5G", "20M", "HT", "1T", "56", "32", ++ "FCC", "5G", "20M", "HT", "1T", "60", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "60", "32", ++ "MKK", "5G", "20M", "HT", "1T", "60", "32", ++ "FCC", "5G", "20M", "HT", "1T", "64", "28", ++ "ETSI", "5G", "20M", "HT", "1T", "64", "32", ++ "MKK", "5G", "20M", "HT", "1T", "64", "32", ++ "FCC", "5G", "20M", "HT", "1T", "100", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "100", "32", ++ "MKK", "5G", "20M", "HT", "1T", "100", "32", ++ "FCC", "5G", "20M", "HT", "1T", "114", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "114", "32", ++ "MKK", "5G", "20M", "HT", "1T", "114", "32", ++ "FCC", "5G", "20M", "HT", "1T", "108", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "108", "32", ++ "MKK", "5G", "20M", "HT", "1T", "108", "32", ++ "FCC", "5G", "20M", "HT", "1T", "112", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "112", "32", ++ "MKK", "5G", "20M", "HT", "1T", "112", "32", ++ "FCC", "5G", "20M", "HT", "1T", "116", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "116", "32", ++ "MKK", "5G", "20M", "HT", "1T", "116", "32", ++ "FCC", "5G", "20M", "HT", "1T", "120", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "120", "32", ++ "MKK", "5G", "20M", "HT", "1T", "120", "32", ++ "FCC", "5G", "20M", "HT", "1T", "124", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "124", "32", ++ "MKK", "5G", "20M", "HT", "1T", "124", "32", ++ "FCC", "5G", "20M", "HT", "1T", "128", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "128", "32", ++ "MKK", "5G", "20M", "HT", "1T", "128", "32", ++ "FCC", "5G", "20M", "HT", "1T", "132", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "132", "32", ++ "MKK", "5G", "20M", "HT", "1T", "132", "32", ++ "FCC", "5G", "20M", "HT", "1T", "136", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "136", "32", ++ "MKK", "5G", "20M", "HT", "1T", "136", "32", ++ "FCC", "5G", "20M", "HT", "1T", "140", "28", ++ "ETSI", "5G", "20M", "HT", "1T", "140", "32", ++ "MKK", "5G", "20M", "HT", "1T", "140", "32", ++ "FCC", "5G", "20M", "HT", "1T", "149", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "149", "32", ++ "MKK", "5G", "20M", "HT", "1T", "149", "63", ++ "FCC", "5G", "20M", "HT", "1T", "153", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "153", "32", ++ "MKK", "5G", "20M", "HT", "1T", "153", "63", ++ "FCC", "5G", "20M", "HT", "1T", "157", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "157", "32", ++ "MKK", "5G", "20M", "HT", "1T", "157", "63", ++ "FCC", "5G", "20M", "HT", "1T", "161", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "161", "32", ++ "MKK", "5G", "20M", "HT", "1T", "161", "63", ++ "FCC", "5G", "20M", "HT", "1T", "165", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "165", "32", ++ "MKK", "5G", "20M", "HT", "1T", "165", "63", ++ "FCC", "5G", "20M", "HT", "2T", "36", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "36", "30", ++ "MKK", "5G", "20M", "HT", "2T", "36", "30", ++ "FCC", "5G", "20M", "HT", "2T", "40", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "40", "30", ++ "MKK", "5G", "20M", "HT", "2T", "40", "30", ++ "FCC", "5G", "20M", "HT", "2T", "44", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "44", "30", ++ "MKK", "5G", "20M", "HT", "2T", "44", "30", ++ "FCC", "5G", "20M", "HT", "2T", "48", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "48", "30", ++ "MKK", "5G", "20M", "HT", "2T", "48", "30", ++ "FCC", "5G", "20M", "HT", "2T", "52", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "52", "30", ++ "MKK", "5G", "20M", "HT", "2T", "52", "30", ++ "FCC", "5G", "20M", "HT", "2T", "56", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "56", "30", ++ "MKK", "5G", "20M", "HT", "2T", "56", "30", ++ "FCC", "5G", "20M", "HT", "2T", "60", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "60", "30", ++ "MKK", "5G", "20M", "HT", "2T", "60", "30", ++ "FCC", "5G", "20M", "HT", "2T", "64", "26", ++ "ETSI", "5G", "20M", "HT", "2T", "64", "30", ++ "MKK", "5G", "20M", "HT", "2T", "64", "30", ++ "FCC", "5G", "20M", "HT", "2T", "100", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "100", "30", ++ "MKK", "5G", "20M", "HT", "2T", "100", "30", ++ "FCC", "5G", "20M", "HT", "2T", "114", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "114", "30", ++ "MKK", "5G", "20M", "HT", "2T", "114", "30", ++ "FCC", "5G", "20M", "HT", "2T", "108", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "108", "30", ++ "MKK", "5G", "20M", "HT", "2T", "108", "30", ++ "FCC", "5G", "20M", "HT", "2T", "112", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "112", "30", ++ "MKK", "5G", "20M", "HT", "2T", "112", "30", ++ "FCC", "5G", "20M", "HT", "2T", "116", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "116", "30", ++ "MKK", "5G", "20M", "HT", "2T", "116", "30", ++ "FCC", "5G", "20M", "HT", "2T", "120", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "120", "30", ++ "MKK", "5G", "20M", "HT", "2T", "120", "30", ++ "FCC", "5G", "20M", "HT", "2T", "124", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "124", "30", ++ "MKK", "5G", "20M", "HT", "2T", "124", "30", ++ "FCC", "5G", "20M", "HT", "2T", "128", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "128", "30", ++ "MKK", "5G", "20M", "HT", "2T", "128", "30", ++ "FCC", "5G", "20M", "HT", "2T", "132", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "132", "30", ++ "MKK", "5G", "20M", "HT", "2T", "132", "30", ++ "FCC", "5G", "20M", "HT", "2T", "136", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "136", "30", ++ "MKK", "5G", "20M", "HT", "2T", "136", "30", ++ "FCC", "5G", "20M", "HT", "2T", "140", "26", ++ "ETSI", "5G", "20M", "HT", "2T", "140", "30", ++ "MKK", "5G", "20M", "HT", "2T", "140", "30", ++ "FCC", "5G", "20M", "HT", "2T", "149", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "149", "30", ++ "MKK", "5G", "20M", "HT", "2T", "149", "63", ++ "FCC", "5G", "20M", "HT", "2T", "153", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "153", "30", ++ "MKK", "5G", "20M", "HT", "2T", "153", "63", ++ "FCC", "5G", "20M", "HT", "2T", "157", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "157", "30", ++ "MKK", "5G", "20M", "HT", "2T", "157", "63", ++ "FCC", "5G", "20M", "HT", "2T", "161", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "161", "30", ++ "MKK", "5G", "20M", "HT", "2T", "161", "63", ++ "FCC", "5G", "20M", "HT", "2T", "165", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "165", "30", ++ "MKK", "5G", "20M", "HT", "2T", "165", "63", ++ "FCC", "5G", "40M", "HT", "1T", "38", "30", ++ "ETSI", "5G", "40M", "HT", "1T", "38", "32", ++ "MKK", "5G", "40M", "HT", "1T", "38", "32", ++ "FCC", "5G", "40M", "HT", "1T", "46", "30", ++ "ETSI", "5G", "40M", "HT", "1T", "46", "32", ++ "MKK", "5G", "40M", "HT", "1T", "46", "32", ++ "FCC", "5G", "40M", "HT", "1T", "54", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "54", "32", ++ "MKK", "5G", "40M", "HT", "1T", "54", "32", ++ "FCC", "5G", "40M", "HT", "1T", "62", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "62", "32", ++ "MKK", "5G", "40M", "HT", "1T", "62", "32", ++ "FCC", "5G", "40M", "HT", "1T", "102", "28", ++ "ETSI", "5G", "40M", "HT", "1T", "102", "32", ++ "MKK", "5G", "40M", "HT", "1T", "102", "32", ++ "FCC", "5G", "40M", "HT", "1T", "110", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "110", "32", ++ "MKK", "5G", "40M", "HT", "1T", "110", "32", ++ "FCC", "5G", "40M", "HT", "1T", "118", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "118", "32", ++ "MKK", "5G", "40M", "HT", "1T", "118", "32", ++ "FCC", "5G", "40M", "HT", "1T", "126", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "126", "32", ++ "MKK", "5G", "40M", "HT", "1T", "126", "32", ++ "FCC", "5G", "40M", "HT", "1T", "134", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "134", "32", ++ "MKK", "5G", "40M", "HT", "1T", "134", "32", ++ "FCC", "5G", "40M", "HT", "1T", "151", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "151", "32", ++ "MKK", "5G", "40M", "HT", "1T", "151", "63", ++ "FCC", "5G", "40M", "HT", "1T", "159", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "159", "32", ++ "MKK", "5G", "40M", "HT", "1T", "159", "63", ++ "FCC", "5G", "40M", "HT", "2T", "38", "28", ++ "ETSI", "5G", "40M", "HT", "2T", "38", "30", ++ "MKK", "5G", "40M", "HT", "2T", "38", "30", ++ "FCC", "5G", "40M", "HT", "2T", "46", "28", ++ "ETSI", "5G", "40M", "HT", "2T", "46", "30", ++ "MKK", "5G", "40M", "HT", "2T", "46", "30", ++ "FCC", "5G", "40M", "HT", "2T", "54", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "54", "30", ++ "MKK", "5G", "40M", "HT", "2T", "54", "30", ++ "FCC", "5G", "40M", "HT", "2T", "62", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "62", "30", ++ "MKK", "5G", "40M", "HT", "2T", "62", "30", ++ "FCC", "5G", "40M", "HT", "2T", "102", "26", ++ "ETSI", "5G", "40M", "HT", "2T", "102", "30", ++ "MKK", "5G", "40M", "HT", "2T", "102", "30", ++ "FCC", "5G", "40M", "HT", "2T", "110", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "110", "30", ++ "MKK", "5G", "40M", "HT", "2T", "110", "30", ++ "FCC", "5G", "40M", "HT", "2T", "118", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "118", "30", ++ "MKK", "5G", "40M", "HT", "2T", "118", "30", ++ "FCC", "5G", "40M", "HT", "2T", "126", "32", ++ "ETSI", "5G", "40M", "HT", "2T", "126", "30", ++ "MKK", "5G", "40M", "HT", "2T", "126", "30", ++ "FCC", "5G", "40M", "HT", "2T", "134", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "134", "30", ++ "MKK", "5G", "40M", "HT", "2T", "134", "30", ++ "FCC", "5G", "40M", "HT", "2T", "151", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "151", "30", ++ "MKK", "5G", "40M", "HT", "2T", "151", "63", ++ "FCC", "5G", "40M", "HT", "2T", "159", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "159", "30", ++ "MKK", "5G", "40M", "HT", "2T", "159", "63", ++ "FCC", "5G", "80M", "VHT", "1T", "42", "30", ++ "ETSI", "5G", "80M", "VHT", "1T", "42", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "42", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "58", "28", ++ "ETSI", "5G", "80M", "VHT", "1T", "58", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "58", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "106", "30", ++ "ETSI", "5G", "80M", "VHT", "1T", "106", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "106", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "122", "34", ++ "ETSI", "5G", "80M", "VHT", "1T", "122", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "122", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "155", "34", ++ "ETSI", "5G", "80M", "VHT", "1T", "155", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "155", "63", ++ "FCC", "5G", "80M", "VHT", "2T", "42", "28", ++ "ETSI", "5G", "80M", "VHT", "2T", "42", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "42", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "58", "26", ++ "ETSI", "5G", "80M", "VHT", "2T", "58", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "58", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "106", "28", ++ "ETSI", "5G", "80M", "VHT", "2T", "106", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "106", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "122", "32", ++ "ETSI", "5G", "80M", "VHT", "2T", "122", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "122", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "155", "34", ++ "ETSI", "5G", "80M", "VHT", "2T", "155", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "155", "63" ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188E_TXPWR_LMT( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u4Byte ArrayLen = sizeof(Array_MP_8188E_TXPWR_LMT)/sizeof(pu1Byte); ++ pu1Byte *Array = (pu1Byte *)Array_MP_8188E_TXPWR_LMT; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesReadPwrLmt = ArrayLen/7; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188E_TXPWR_LMT\n")); ++ ++ for (i = 0; i < ArrayLen; i += 7) { ++ pu1Byte regulation = Array[i]; ++ pu1Byte band = Array[i+1]; ++ pu1Byte bandwidth = Array[i+2]; ++ pu1Byte rate = Array[i+3]; ++ pu1Byte rfPath = Array[i+4]; ++ pu1Byte chnl = Array[i+5]; ++ pu1Byte val = Array[i+6]; ++ ++ odm_ConfigBB_TXPWR_LMT_8188E(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ rsprintf(pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", ++ regulation, band, bandwidth, rate, rfPath, chnl, val); ++#endif ++ } ++ ++} ++ ++/****************************************************************************** ++* TXPWR_LMT_88EE_M2_for_MSI.TXT ++******************************************************************************/ ++ ++const char *Array_MP_8188E_TXPWR_LMT_88EE_M2_for_MSI[] = { ++ "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "03", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "04", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "05", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "06", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "07", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "08", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", ++ "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "01", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "28", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "01", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "02", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "28", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "02", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "09", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "09", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "10", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "10", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "11", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "11", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "12", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "13", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "1T", "01", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "01", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "01", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "02", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "02", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "02", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "03", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "03", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "03", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "04", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "04", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "04", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "05", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "05", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "05", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "06", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "06", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "06", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "07", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "07", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "07", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "08", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "08", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "08", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "09", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "09", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "09", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "10", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "10", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "10", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "11", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "11", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "11", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "12", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "12", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "13", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "13", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "2T", "01", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "01", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "01", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "02", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "02", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "02", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "03", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "03", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "03", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "04", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "04", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "04", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "05", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "05", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "05", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "06", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "06", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "06", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "07", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "07", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "07", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "08", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "08", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "08", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "09", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "09", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "09", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "10", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "10", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "10", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "11", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "11", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "11", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "12", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "12", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "13", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "13", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "2T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "03", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "03", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "03", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "04", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "04", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "04", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "05", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "05", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "05", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "06", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "06", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "06", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "07", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "07", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "07", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "08", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "08", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "08", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "09", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "09", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "09", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "10", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "10", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "10", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "11", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "11", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "11", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "12", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "12", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "13", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "13", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "03", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "03", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "03", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "04", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "04", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "04", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "05", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "05", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "05", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "06", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "06", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "06", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "07", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "07", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "07", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "08", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "08", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "08", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "09", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "09", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "09", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "10", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "10", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "10", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "11", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "11", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "11", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "12", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "12", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "13", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "13", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "14", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "36", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "36", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "36", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "40", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "40", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "40", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "44", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "44", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "44", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "48", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "48", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "48", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "52", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "52", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "52", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "56", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "56", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "56", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "60", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "60", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "60", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "64", "28", ++ "ETSI", "5G", "20M", "OFDM", "1T", "64", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "64", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "100", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "100", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "100", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "114", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "114", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "114", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "108", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "108", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "108", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "112", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "112", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "112", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "116", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "116", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "116", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "120", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "120", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "120", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "124", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "124", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "124", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "128", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "128", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "128", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "132", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "132", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "132", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "136", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "136", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "136", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "140", "28", ++ "ETSI", "5G", "20M", "OFDM", "1T", "140", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "140", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "149", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "149", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "149", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "153", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "153", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "153", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "157", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "157", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "157", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "161", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "161", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "161", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "165", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "165", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "165", "63", ++ "FCC", "5G", "20M", "HT", "1T", "36", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "36", "32", ++ "MKK", "5G", "20M", "HT", "1T", "36", "32", ++ "FCC", "5G", "20M", "HT", "1T", "40", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "40", "32", ++ "MKK", "5G", "20M", "HT", "1T", "40", "32", ++ "FCC", "5G", "20M", "HT", "1T", "44", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "44", "32", ++ "MKK", "5G", "20M", "HT", "1T", "44", "32", ++ "FCC", "5G", "20M", "HT", "1T", "48", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "48", "32", ++ "MKK", "5G", "20M", "HT", "1T", "48", "32", ++ "FCC", "5G", "20M", "HT", "1T", "52", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "52", "32", ++ "MKK", "5G", "20M", "HT", "1T", "52", "32", ++ "FCC", "5G", "20M", "HT", "1T", "56", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "56", "32", ++ "MKK", "5G", "20M", "HT", "1T", "56", "32", ++ "FCC", "5G", "20M", "HT", "1T", "60", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "60", "32", ++ "MKK", "5G", "20M", "HT", "1T", "60", "32", ++ "FCC", "5G", "20M", "HT", "1T", "64", "28", ++ "ETSI", "5G", "20M", "HT", "1T", "64", "32", ++ "MKK", "5G", "20M", "HT", "1T", "64", "32", ++ "FCC", "5G", "20M", "HT", "1T", "100", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "100", "32", ++ "MKK", "5G", "20M", "HT", "1T", "100", "32", ++ "FCC", "5G", "20M", "HT", "1T", "114", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "114", "32", ++ "MKK", "5G", "20M", "HT", "1T", "114", "32", ++ "FCC", "5G", "20M", "HT", "1T", "108", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "108", "32", ++ "MKK", "5G", "20M", "HT", "1T", "108", "32", ++ "FCC", "5G", "20M", "HT", "1T", "112", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "112", "32", ++ "MKK", "5G", "20M", "HT", "1T", "112", "32", ++ "FCC", "5G", "20M", "HT", "1T", "116", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "116", "32", ++ "MKK", "5G", "20M", "HT", "1T", "116", "32", ++ "FCC", "5G", "20M", "HT", "1T", "120", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "120", "32", ++ "MKK", "5G", "20M", "HT", "1T", "120", "32", ++ "FCC", "5G", "20M", "HT", "1T", "124", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "124", "32", ++ "MKK", "5G", "20M", "HT", "1T", "124", "32", ++ "FCC", "5G", "20M", "HT", "1T", "128", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "128", "32", ++ "MKK", "5G", "20M", "HT", "1T", "128", "32", ++ "FCC", "5G", "20M", "HT", "1T", "132", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "132", "32", ++ "MKK", "5G", "20M", "HT", "1T", "132", "32", ++ "FCC", "5G", "20M", "HT", "1T", "136", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "136", "32", ++ "MKK", "5G", "20M", "HT", "1T", "136", "32", ++ "FCC", "5G", "20M", "HT", "1T", "140", "28", ++ "ETSI", "5G", "20M", "HT", "1T", "140", "32", ++ "MKK", "5G", "20M", "HT", "1T", "140", "32", ++ "FCC", "5G", "20M", "HT", "1T", "149", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "149", "32", ++ "MKK", "5G", "20M", "HT", "1T", "149", "63", ++ "FCC", "5G", "20M", "HT", "1T", "153", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "153", "32", ++ "MKK", "5G", "20M", "HT", "1T", "153", "63", ++ "FCC", "5G", "20M", "HT", "1T", "157", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "157", "32", ++ "MKK", "5G", "20M", "HT", "1T", "157", "63", ++ "FCC", "5G", "20M", "HT", "1T", "161", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "161", "32", ++ "MKK", "5G", "20M", "HT", "1T", "161", "63", ++ "FCC", "5G", "20M", "HT", "1T", "165", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "165", "32", ++ "MKK", "5G", "20M", "HT", "1T", "165", "63", ++ "FCC", "5G", "20M", "HT", "2T", "36", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "36", "30", ++ "MKK", "5G", "20M", "HT", "2T", "36", "30", ++ "FCC", "5G", "20M", "HT", "2T", "40", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "40", "30", ++ "MKK", "5G", "20M", "HT", "2T", "40", "30", ++ "FCC", "5G", "20M", "HT", "2T", "44", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "44", "30", ++ "MKK", "5G", "20M", "HT", "2T", "44", "30", ++ "FCC", "5G", "20M", "HT", "2T", "48", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "48", "30", ++ "MKK", "5G", "20M", "HT", "2T", "48", "30", ++ "FCC", "5G", "20M", "HT", "2T", "52", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "52", "30", ++ "MKK", "5G", "20M", "HT", "2T", "52", "30", ++ "FCC", "5G", "20M", "HT", "2T", "56", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "56", "30", ++ "MKK", "5G", "20M", "HT", "2T", "56", "30", ++ "FCC", "5G", "20M", "HT", "2T", "60", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "60", "30", ++ "MKK", "5G", "20M", "HT", "2T", "60", "30", ++ "FCC", "5G", "20M", "HT", "2T", "64", "26", ++ "ETSI", "5G", "20M", "HT", "2T", "64", "30", ++ "MKK", "5G", "20M", "HT", "2T", "64", "30", ++ "FCC", "5G", "20M", "HT", "2T", "100", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "100", "30", ++ "MKK", "5G", "20M", "HT", "2T", "100", "30", ++ "FCC", "5G", "20M", "HT", "2T", "114", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "114", "30", ++ "MKK", "5G", "20M", "HT", "2T", "114", "30", ++ "FCC", "5G", "20M", "HT", "2T", "108", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "108", "30", ++ "MKK", "5G", "20M", "HT", "2T", "108", "30", ++ "FCC", "5G", "20M", "HT", "2T", "112", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "112", "30", ++ "MKK", "5G", "20M", "HT", "2T", "112", "30", ++ "FCC", "5G", "20M", "HT", "2T", "116", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "116", "30", ++ "MKK", "5G", "20M", "HT", "2T", "116", "30", ++ "FCC", "5G", "20M", "HT", "2T", "120", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "120", "30", ++ "MKK", "5G", "20M", "HT", "2T", "120", "30", ++ "FCC", "5G", "20M", "HT", "2T", "124", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "124", "30", ++ "MKK", "5G", "20M", "HT", "2T", "124", "30", ++ "FCC", "5G", "20M", "HT", "2T", "128", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "128", "30", ++ "MKK", "5G", "20M", "HT", "2T", "128", "30", ++ "FCC", "5G", "20M", "HT", "2T", "132", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "132", "30", ++ "MKK", "5G", "20M", "HT", "2T", "132", "30", ++ "FCC", "5G", "20M", "HT", "2T", "136", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "136", "30", ++ "MKK", "5G", "20M", "HT", "2T", "136", "30", ++ "FCC", "5G", "20M", "HT", "2T", "140", "26", ++ "ETSI", "5G", "20M", "HT", "2T", "140", "30", ++ "MKK", "5G", "20M", "HT", "2T", "140", "30", ++ "FCC", "5G", "20M", "HT", "2T", "149", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "149", "30", ++ "MKK", "5G", "20M", "HT", "2T", "149", "63", ++ "FCC", "5G", "20M", "HT", "2T", "153", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "153", "30", ++ "MKK", "5G", "20M", "HT", "2T", "153", "63", ++ "FCC", "5G", "20M", "HT", "2T", "157", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "157", "30", ++ "MKK", "5G", "20M", "HT", "2T", "157", "63", ++ "FCC", "5G", "20M", "HT", "2T", "161", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "161", "30", ++ "MKK", "5G", "20M", "HT", "2T", "161", "63", ++ "FCC", "5G", "20M", "HT", "2T", "165", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "165", "30", ++ "MKK", "5G", "20M", "HT", "2T", "165", "63", ++ "FCC", "5G", "40M", "HT", "1T", "38", "30", ++ "ETSI", "5G", "40M", "HT", "1T", "38", "32", ++ "MKK", "5G", "40M", "HT", "1T", "38", "32", ++ "FCC", "5G", "40M", "HT", "1T", "46", "30", ++ "ETSI", "5G", "40M", "HT", "1T", "46", "32", ++ "MKK", "5G", "40M", "HT", "1T", "46", "32", ++ "FCC", "5G", "40M", "HT", "1T", "54", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "54", "32", ++ "MKK", "5G", "40M", "HT", "1T", "54", "32", ++ "FCC", "5G", "40M", "HT", "1T", "62", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "62", "32", ++ "MKK", "5G", "40M", "HT", "1T", "62", "32", ++ "FCC", "5G", "40M", "HT", "1T", "102", "28", ++ "ETSI", "5G", "40M", "HT", "1T", "102", "32", ++ "MKK", "5G", "40M", "HT", "1T", "102", "32", ++ "FCC", "5G", "40M", "HT", "1T", "110", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "110", "32", ++ "MKK", "5G", "40M", "HT", "1T", "110", "32", ++ "FCC", "5G", "40M", "HT", "1T", "118", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "118", "32", ++ "MKK", "5G", "40M", "HT", "1T", "118", "32", ++ "FCC", "5G", "40M", "HT", "1T", "126", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "126", "32", ++ "MKK", "5G", "40M", "HT", "1T", "126", "32", ++ "FCC", "5G", "40M", "HT", "1T", "134", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "134", "32", ++ "MKK", "5G", "40M", "HT", "1T", "134", "32", ++ "FCC", "5G", "40M", "HT", "1T", "151", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "151", "32", ++ "MKK", "5G", "40M", "HT", "1T", "151", "63", ++ "FCC", "5G", "40M", "HT", "1T", "159", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "159", "32", ++ "MKK", "5G", "40M", "HT", "1T", "159", "63", ++ "FCC", "5G", "40M", "HT", "2T", "38", "28", ++ "ETSI", "5G", "40M", "HT", "2T", "38", "30", ++ "MKK", "5G", "40M", "HT", "2T", "38", "30", ++ "FCC", "5G", "40M", "HT", "2T", "46", "28", ++ "ETSI", "5G", "40M", "HT", "2T", "46", "30", ++ "MKK", "5G", "40M", "HT", "2T", "46", "30", ++ "FCC", "5G", "40M", "HT", "2T", "54", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "54", "30", ++ "MKK", "5G", "40M", "HT", "2T", "54", "30", ++ "FCC", "5G", "40M", "HT", "2T", "62", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "62", "30", ++ "MKK", "5G", "40M", "HT", "2T", "62", "30", ++ "FCC", "5G", "40M", "HT", "2T", "102", "26", ++ "ETSI", "5G", "40M", "HT", "2T", "102", "30", ++ "MKK", "5G", "40M", "HT", "2T", "102", "30", ++ "FCC", "5G", "40M", "HT", "2T", "110", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "110", "30", ++ "MKK", "5G", "40M", "HT", "2T", "110", "30", ++ "FCC", "5G", "40M", "HT", "2T", "118", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "118", "30", ++ "MKK", "5G", "40M", "HT", "2T", "118", "30", ++ "FCC", "5G", "40M", "HT", "2T", "126", "32", ++ "ETSI", "5G", "40M", "HT", "2T", "126", "30", ++ "MKK", "5G", "40M", "HT", "2T", "126", "30", ++ "FCC", "5G", "40M", "HT", "2T", "134", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "134", "30", ++ "MKK", "5G", "40M", "HT", "2T", "134", "30", ++ "FCC", "5G", "40M", "HT", "2T", "151", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "151", "30", ++ "MKK", "5G", "40M", "HT", "2T", "151", "63", ++ "FCC", "5G", "40M", "HT", "2T", "159", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "159", "30", ++ "MKK", "5G", "40M", "HT", "2T", "159", "63", ++ "FCC", "5G", "80M", "VHT", "1T", "42", "30", ++ "ETSI", "5G", "80M", "VHT", "1T", "42", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "42", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "58", "28", ++ "ETSI", "5G", "80M", "VHT", "1T", "58", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "58", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "106", "30", ++ "ETSI", "5G", "80M", "VHT", "1T", "106", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "106", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "122", "34", ++ "ETSI", "5G", "80M", "VHT", "1T", "122", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "122", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "155", "34", ++ "ETSI", "5G", "80M", "VHT", "1T", "155", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "155", "63", ++ "FCC", "5G", "80M", "VHT", "2T", "42", "28", ++ "ETSI", "5G", "80M", "VHT", "2T", "42", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "42", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "58", "26", ++ "ETSI", "5G", "80M", "VHT", "2T", "58", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "58", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "106", "28", ++ "ETSI", "5G", "80M", "VHT", "2T", "106", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "106", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "122", "32", ++ "ETSI", "5G", "80M", "VHT", "2T", "122", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "122", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "155", "34", ++ "ETSI", "5G", "80M", "VHT", "2T", "155", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "155", "63" ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188E_TXPWR_LMT_88EE_M2_for_MSI( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u4Byte ArrayLen = sizeof(Array_MP_8188E_TXPWR_LMT_88EE_M2_for_MSI)/sizeof(pu1Byte); ++ pu1Byte *Array = (pu1Byte *)Array_MP_8188E_TXPWR_LMT_88EE_M2_for_MSI; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesReadPwrLmt = ArrayLen/7; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188E_TXPWR_LMT_88EE_M2_for_MSI\n")); ++ ++ for (i = 0; i < ArrayLen; i += 7) { ++ pu1Byte regulation = Array[i]; ++ pu1Byte band = Array[i+1]; ++ pu1Byte bandwidth = Array[i+2]; ++ pu1Byte rate = Array[i+3]; ++ pu1Byte rfPath = Array[i+4]; ++ pu1Byte chnl = Array[i+5]; ++ pu1Byte val = Array[i+6]; ++ ++ odm_ConfigBB_TXPWR_LMT_8188E(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ rsprintf(pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", ++ regulation, band, bandwidth, rate, rfPath, chnl, val); ++#endif ++ } ++ ++} ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_rf.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_rf.h +new file mode 100644 +index 0000000..0d2a326 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_rf.h +@@ -0,0 +1,99 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#if (RTL8188E_SUPPORT == 1) ++#ifndef __INC_MP_RF_HW_IMG_8188E_H ++#define __INC_MP_RF_HW_IMG_8188E_H ++ ++ ++/****************************************************************************** ++* RadioA.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_RadioA(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_RadioA(void); ++ ++/****************************************************************************** ++* TxPowerTrack_AP.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_AP(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_TxPowerTrack_AP(void); ++ ++/****************************************************************************** ++* TxPowerTrack_PCIE.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_PCIE(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_TxPowerTrack_PCIE(void); ++ ++/****************************************************************************** ++* TxPowerTrack_SDIO.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_SDIO(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_TxPowerTrack_SDIO(void); ++ ++/****************************************************************************** ++* TxPowerTrack_USB.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_TxPowerTrack_USB(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_TxPowerTrack_USB(void); ++ ++/****************************************************************************** ++* TXPWR_LMT.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_TXPWR_LMT(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_TXPWR_LMT(void); ++ ++/****************************************************************************** ++* TXPWR_LMT_88EE_M2_for_MSI.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188E_TXPWR_LMT_88EE_M2_for_MSI(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188E_TXPWR_LMT_88EE_M2_for_MSI(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_s_fw.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_s_fw.c +new file mode 100644 +index 0000000..2178104 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_s_fw.c +@@ -0,0 +1,3685 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.7*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188E_S_SUPPORT == 1) ++#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) ++ ++ ++u1Byte Array_MP_8188E_S_FW_AP[] = { ++0xE3, 0x88, 0x20, 0x00, 0x16, 0x00, 0x00, 0x00, 0x03, 0x03, 0x11, 0x56, 0x0A, 0x3D, 0x02, 0x00, ++0x28, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x47, 0x3E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x48, 0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x57, 0xF5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xE1, 0xEA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4F, 0xF9, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x43, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x47, 0xE4, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x47, 0xE4, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x43, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x43, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x43, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xE7, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, ++0x46, 0xE7, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x3E, 0x88, 0x82, 0x8C, 0x83, 0xE7, 0x09, 0xF0, ++0xA3, 0xDF, 0xFA, 0x80, 0x32, 0xE3, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x78, 0xE3, 0x09, 0xF2, ++0x08, 0xDF, 0xFA, 0x80, 0x70, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, ++0x64, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x58, 0x89, 0x82, 0x8A, ++0x83, 0xE0, 0xA3, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x4C, 0x80, 0xD2, 0x80, 0xFA, 0x80, 0xC6, 0x80, ++0xD4, 0x80, 0x69, 0x80, 0xF2, 0x80, 0x33, 0x80, 0x10, 0x80, 0xA6, 0x80, 0xEA, 0x80, 0x9A, 0x80, ++0xA8, 0x80, 0xDA, 0x80, 0xE2, 0x80, 0xCA, 0x80, 0x33, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, ++0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, ++0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0x0D, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, ++0xA3, 0xF6, 0x08, 0xDF, 0xF9, 0xEC, 0xFA, 0xA9, 0xF0, 0xED, 0xFB, 0x22, 0x89, 0x82, 0x8A, 0x83, ++0xEC, 0xFA, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xEA, 0xDE, 0xE8, 0x80, 0xDB, 0x89, 0x82, 0x8A, 0x83, ++0xE4, 0x93, 0xA3, 0xF2, 0x08, 0xDF, 0xF9, 0x80, 0xCC, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, ++0x60, 0xC3, 0x88, 0xF0, 0xED, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0xB9, 0xF5, 0x82, 0xEB, 0x24, ++0x02, 0xB4, 0x04, 0x00, 0x50, 0xAF, 0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x45, 0xF9, 0x73, 0xC5, ++0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, 0x02, 0x15, ++0x83, 0xE0, 0x38, 0xF0, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, ++0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xA4, 0x25, ++0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, ++0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, ++0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, ++0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, ++0x80, 0xDF, 0xEF, 0x4E, 0x60, 0x12, 0xEF, 0x60, 0x01, 0x0E, 0xED, 0xBB, 0x01, 0x0B, 0x89, 0x82, ++0x8A, 0x83, 0xF0, 0xA3, 0xDF, 0xFC, 0xDE, 0xFA, 0x22, 0x89, 0xF0, 0x50, 0x07, 0xF7, 0x09, 0xDF, ++0xFC, 0xA9, 0xF0, 0x22, 0xBB, 0xFE, 0xFC, 0xF3, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0x02, 0x47, ++0x7C, 0x02, 0x43, 0xDD, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, ++0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, ++0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, ++0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x47, 0xC1, 0xE4, ++0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, ++0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, ++0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, ++0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, ++0xBE, 0x41, 0x82, 0xDB, 0x00, 0x41, 0x82, 0xDC, 0x00, 0x41, 0x82, 0xE9, 0x00, 0x41, 0x82, 0xEC, ++0x00, 0x44, 0x82, 0xAF, 0x41, 0x4E, 0x59, 0x00, 0x44, 0x82, 0xAB, 0x61, 0x6E, 0x79, 0x00, 0x41, ++0x82, 0xED, 0x00, 0x00, 0x5F, 0xEF, 0x60, 0xEA, 0x67, 0x14, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, ++0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xEA, 0xF0, 0x74, 0x47, 0xA3, ++0xF0, 0x11, 0x5B, 0xE5, 0x3C, 0x30, 0xE7, 0x02, 0x11, 0x40, 0x74, 0xEA, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x47, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0x7F, 0x01, 0x7E, 0x00, 0x12, 0x32, 0x06, 0x90, 0x00, 0xF2, 0xE0, 0x20, 0xE6, 0x0C, 0x90, 0x00, ++0x05, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x05, 0x12, 0x32, 0x1E, 0x22, 0x90, 0x00, 0x54, 0xE0, 0x55, ++0x35, 0xF5, 0x39, 0xA3, 0xE0, 0x55, 0x36, 0xF5, 0x3A, 0xA3, 0xE0, 0x55, 0x37, 0xF5, 0x3B, 0xA3, ++0xE0, 0x55, 0x38, 0xF5, 0x3C, 0xAD, 0x39, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0xAD, 0x3A, 0x7F, 0x55, ++0x12, 0x32, 0x1E, 0xAD, 0x3B, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0xAD, 0x3C, 0x7F, 0x57, 0x12, 0x32, ++0x1E, 0x53, 0x91, 0xEF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x95, 0xF0, 0x74, 0x48, 0xA3, 0xF0, 0x12, 0x6E, 0xCC, 0xE5, ++0x41, 0x30, 0xE3, 0x03, 0x12, 0x6F, 0x29, 0xE5, 0x41, 0x30, 0xE4, 0x02, 0x31, 0x44, 0xE5, 0x43, ++0x30, 0xE0, 0x03, 0x12, 0x5D, 0x89, 0xE5, 0x43, 0x30, 0xE1, 0x03, 0x12, 0x65, 0x82, 0xE5, 0x43, ++0x30, 0xE2, 0x03, 0x12, 0x6F, 0x72, 0xE5, 0x43, 0x30, 0xE3, 0x03, 0x12, 0x6F, 0x8A, 0xE5, 0x43, ++0x30, 0xE4, 0x03, 0x12, 0x63, 0x54, 0xE5, 0x43, 0x30, 0xE5, 0x03, 0x12, 0x63, 0x10, 0xE5, 0x43, ++0x30, 0xE6, 0x03, 0x12, 0x62, 0x47, 0xE5, 0x43, 0x30, 0xE7, 0x03, 0x12, 0x67, 0xBE, 0xE5, 0x44, ++0x30, 0xE0, 0x03, 0x12, 0x67, 0xAE, 0xE5, 0x44, 0x30, 0xE1, 0x03, 0x12, 0x6F, 0xA6, 0x74, 0x95, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x48, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, ++0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, ++0xF0, 0xD0, 0xE0, 0x32, 0x31, 0x57, 0x7F, 0x02, 0x8F, 0x0D, 0x7F, 0x02, 0x12, 0x45, 0x27, 0x90, ++0x80, 0x01, 0xE0, 0x45, 0x0D, 0xF0, 0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x82, 0xDD, ++0xF0, 0x90, 0x82, 0xDD, 0xE0, 0xFD, 0x70, 0x02, 0x41, 0x50, 0x90, 0x80, 0xA1, 0xE0, 0xFF, 0x70, ++0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x80, 0xA2, 0xE0, 0xB5, 0x07, ++0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, ++0xF0, 0x22, 0x90, 0x82, 0xDB, 0x12, 0x67, 0xD7, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x41, 0x32, 0xE4, 0x90, 0x82, 0xDE, 0xF0, 0x90, 0x82, 0xDE, ++0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x31, 0x71, 0x2A, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, ++0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0x91, 0x08, 0x90, 0x80, 0x51, 0x71, 0xE7, 0x71, 0x2A, ++0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, 0x91, 0x08, 0x90, 0x80, 0x55, 0x71, 0xE7, ++0x90, 0x82, 0xDE, 0xE0, 0x04, 0xF0, 0x80, 0xC5, 0x90, 0x82, 0xDD, 0xE0, 0xFF, 0x90, 0x82, 0xDB, ++0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, ++0x82, 0xDD, 0xF0, 0x90, 0x82, 0xDB, 0x51, 0x57, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, ++0xCC, 0xF0, 0x90, 0x82, 0xDB, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x80, 0xA2, 0xF1, ++0xF2, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x21, 0x61, 0xE4, 0x90, 0x80, 0xA2, 0xF0, ++0x21, 0x61, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x82, 0xDB, 0xE0, 0x44, 0x80, 0x90, ++0x00, 0x8A, 0xF0, 0x71, 0x2A, 0x90, 0x01, 0xD0, 0x12, 0x46, 0xCE, 0xE0, 0x90, 0x01, 0xC3, 0xF0, ++0x22, 0x12, 0x32, 0x1E, 0x90, 0x82, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xE0, 0xED, 0xF0, 0x90, 0x82, 0xDF, 0xEF, 0xF0, ++0xD3, 0x94, 0x07, 0x50, 0x4B, 0x51, 0x57, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, ++0x00, 0x47, 0xE0, 0x5F, 0xFD, 0x7F, 0x47, 0x51, 0x51, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, ++0x90, 0x00, 0x46, 0xE0, 0x4F, 0xFD, 0x7F, 0x46, 0x71, 0xD3, 0x60, 0x10, 0x51, 0x54, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x45, 0xE0, 0x4F, 0x80, 0x0F, 0x51, 0x54, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x45, 0xE0, 0x5F, 0xFD, 0x7F, 0x45, 0x80, 0x62, ++0x90, 0x82, 0xDF, 0xE0, 0x24, 0xF8, 0xF0, 0xE0, 0x24, 0x04, 0x51, 0x58, 0x80, 0x02, 0xC3, 0x33, ++0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, 0xFD, 0x7F, 0x43, 0x51, 0x51, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x4F, 0xFD, 0x7F, 0x43, 0x71, 0xD3, 0x60, ++0x19, 0x90, 0x82, 0xDF, 0xE0, 0x24, 0x04, 0x51, 0x58, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, ++0x90, 0x00, 0x42, 0xE0, 0x4F, 0xFD, 0x7F, 0x42, 0x80, 0x18, 0x90, 0x82, 0xDF, 0xE0, 0x24, 0x04, ++0x51, 0x58, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x42, 0xE0, 0x5F, 0xFD, ++0x7F, 0x42, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0xDB, 0xE0, 0x75, 0xF0, ++0x04, 0x22, 0xAD, 0x07, 0x90, 0x81, 0xE6, 0xE0, 0x75, 0xF0, 0x20, 0xA4, 0xFF, 0x90, 0x82, 0xB9, ++0xE5, 0xF0, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x81, 0xE7, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0xAE, 0xF0, ++0x90, 0x82, 0xBB, 0xF0, 0xEE, 0xA3, 0xF0, 0x71, 0xCB, 0x90, 0x82, 0xBD, 0xF0, 0xEE, 0xA3, 0xF0, ++0xED, 0x64, 0x01, 0x60, 0x5E, 0x90, 0x81, 0xE4, 0xE0, 0xFE, 0xF1, 0xEB, 0x30, 0xE0, 0x54, 0xEE, ++0x71, 0xFC, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x71, 0xC4, 0xFE, 0x54, 0x0F, 0xFF, 0xEE, 0xC4, 0x13, ++0x13, 0x54, 0x01, 0xFD, 0x71, 0xC4, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x21, 0xA3, 0xE0, 0x30, ++0xE0, 0x0D, 0x90, 0x82, 0xBE, 0xE0, 0xF5, 0x1D, 0x90, 0x82, 0xBD, 0x71, 0xDB, 0x80, 0x0F, 0x71, ++0xCB, 0xFF, 0x12, 0x32, 0xAA, 0x71, 0xF7, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x51, 0x5F, 0x90, 0x81, ++0xE4, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0B, 0x90, 0x82, 0xBC, 0xE0, 0xF5, 0x1D, 0x90, 0x82, ++0xBB, 0x71, 0xDB, 0x22, 0x51, 0x5F, 0x90, 0x81, 0xE4, 0xE0, 0x22, 0x90, 0x82, 0xB9, 0xE0, 0xFE, ++0xA3, 0xE0, 0x22, 0x12, 0x32, 0x1E, 0x90, 0x82, 0xE0, 0xE0, 0x22, 0xE0, 0xF5, 0x1E, 0xE4, 0xFB, ++0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x80, 0x67, 0x12, 0x46, 0xCE, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE4, ++0x35, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x90, 0x81, 0xE4, 0xE0, 0xFE, 0x54, 0x0F, 0xFF, 0xEE, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x7D, 0x00, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, ++0xE0, 0xFF, 0x90, 0x80, 0xA2, 0xE0, 0x75, 0xF0, 0x08, 0x22, 0x90, 0x81, 0xE4, 0xF1, 0xE9, 0x30, ++0xE0, 0x1A, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x12, 0x6A, 0x42, 0x90, 0x81, 0xE5, 0xE0, ++0x30, 0xE0, 0x09, 0x71, 0xF7, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x51, 0x5F, 0x22, 0xF0, 0xE4, 0xF5, ++0x1D, 0x90, 0x81, 0xCD, 0xE0, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, 0x19, 0x8F, 0x1A, 0xE5, 0x1E, 0x91, 0xA3, 0x85, 0x19, 0x83, ++0x85, 0x1A, 0x82, 0xF0, 0xE5, 0x1D, 0x91, 0xA3, 0xFF, 0xE5, 0x1E, 0x13, 0x13, 0x13, 0x54, 0x1F, ++0x4F, 0xA3, 0xF0, 0xEB, 0x91, 0xA3, 0xFF, 0xE5, 0x1D, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0x91, ++0xAA, 0xF0, 0xBD, 0x01, 0x0D, 0x85, 0x1A, 0x82, 0x8E, 0x83, 0xA3, 0xA3, 0xA3, 0x74, 0x03, 0xF0, ++0x80, 0x06, 0x91, 0xAA, 0xA3, 0x74, 0x01, 0xF0, 0x91, 0xAA, 0xA3, 0x74, 0x05, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x54, 0x07, 0xC4, 0x33, 0x54, 0xE0, 0x22, 0x85, 0x1A, 0x82, 0x85, 0x19, 0x83, ++0xA3, 0xA3, 0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x6D, 0x12, 0x52, 0xED, 0x70, ++0x68, 0x12, 0x51, 0xBC, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, 0x81, 0x76, ++0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x81, 0x78, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, ++0x90, 0x81, 0x75, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x4E, 0x01, 0xE5, 0x4E, 0x60, 0x3A, 0x12, ++0x7C, 0xF8, 0x90, 0x81, 0x78, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x11, 0xE4, 0xF5, 0x1D, 0x90, ++0x81, 0x78, 0xE0, 0xF1, 0xE2, 0x91, 0x45, 0x90, 0x81, 0x78, 0xE0, 0x80, 0x0D, 0xE4, 0xF5, 0x1D, ++0x12, 0x7C, 0xD4, 0xF1, 0xE2, 0x91, 0x45, 0x12, 0x7C, 0xD4, 0xF1, 0xE2, 0x90, 0x81, 0x88, 0xF0, ++0x90, 0x81, 0x72, 0xE0, 0x20, 0xE2, 0x02, 0xB1, 0x2A, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xE8, 0xED, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0xFE, 0xC4, ++0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xC1, 0x7A, 0xEE, 0xF1, 0xEB, 0x30, 0xE0, 0x02, 0xC1, ++0x7A, 0x90, 0x81, 0x72, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xC1, 0x7A, 0xEF, 0x70, 0x02, 0xA1, 0xED, ++0x24, 0xFE, 0x70, 0x02, 0xC1, 0x28, 0x24, 0xFE, 0x60, 0x4A, 0x24, 0xFC, 0x70, 0x02, 0xC1, 0x64, ++0x24, 0xFC, 0x60, 0x02, 0xC1, 0x74, 0xEE, 0xB4, 0x0E, 0x02, 0xD1, 0xD7, 0x90, 0x81, 0x72, 0xE0, ++0x70, 0x04, 0x7F, 0x01, 0xF1, 0x15, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0xF3, 0x90, ++0x81, 0x72, 0xE0, 0xB4, 0x04, 0x0F, 0x90, 0x82, 0xE8, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0x73, 0x40, ++0x80, 0x03, 0x12, 0x54, 0x68, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x08, 0x60, 0x02, 0xC1, 0x74, 0x12, ++0x73, 0x86, 0xC1, 0x74, 0x90, 0x81, 0x72, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xF1, 0x15, 0x90, 0x81, ++0x72, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0xF3, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0E, 0x07, 0xD1, 0x7F, ++0xBF, 0x01, 0x02, 0xD1, 0xD7, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0xC1, 0x74, 0xD1, ++0x7F, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xC1, 0x74, 0x12, 0x52, 0xF5, 0xC1, 0x74, 0x90, 0x81, 0x72, ++0xE0, 0xB4, 0x0E, 0x07, 0xD1, 0x7F, 0xBF, 0x01, 0x02, 0xD1, 0xD7, 0x90, 0x81, 0x72, 0xE0, 0xB4, ++0x06, 0x02, 0xD1, 0xF3, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0C, 0x08, 0xD1, 0x7F, 0xBF, 0x01, 0x03, ++0x12, 0x52, 0xF5, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x04, 0x70, 0x59, 0x12, 0x61, 0xC5, 0xEF, 0x64, ++0x01, 0x70, 0x51, 0x12, 0x69, 0xFE, 0x80, 0x4C, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0E, 0x07, 0xD1, ++0x7F, 0xBF, 0x01, 0x02, 0xD1, 0xD7, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0xF3, 0x90, ++0x81, 0x72, 0xE0, 0xB4, 0x0C, 0x08, 0xD1, 0x7F, 0xBF, 0x01, 0x03, 0x12, 0x52, 0xF5, 0x90, 0x81, ++0x72, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xF1, 0x15, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x04, 0x15, 0x12, ++0x73, 0x78, 0x80, 0x10, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0C, 0x09, 0x12, 0x67, 0xCD, 0x30, 0xE0, ++0x03, 0x12, 0x69, 0xF3, 0x90, 0x81, 0x72, 0x12, 0x7C, 0x84, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x72, 0xFA, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, ++0x01, 0x80, 0x31, 0x12, 0x66, 0x02, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x02, 0x80, 0x26, 0x90, 0x81, ++0x71, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, 0x80, 0x18, 0x90, 0x81, 0xD3, 0xE0, ++0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x11, 0x80, 0x05, 0x12, ++0x61, 0xBD, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0E, 0xF0, ++0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x6B, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, ++0x7D, 0x0C, 0x80, 0x05, 0x12, 0x72, 0xEE, 0x7D, 0x04, 0x7F, 0x01, 0xF1, 0x2A, 0xE4, 0xFD, 0xFF, ++0x02, 0x5D, 0xC0, 0x90, 0x81, 0x6B, 0xE0, 0x90, 0x06, 0x04, 0x20, 0xE0, 0x08, 0xE0, 0x44, 0x40, ++0xF0, 0x7D, 0x04, 0x80, 0x06, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, 0x0C, 0x7F, 0x01, 0xF1, 0x2A, 0xE4, ++0xFD, 0xFF, 0x02, 0x5D, 0xC0, 0x90, 0x82, 0xE7, 0xEF, 0xF0, 0x12, 0x54, 0x74, 0x90, 0x82, 0xE7, ++0xE0, 0x60, 0x03, 0x12, 0x54, 0xD3, 0x7D, 0x04, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0xAC, 0x07, 0xEF, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1A, 0xED, 0x54, ++0x01, 0xFE, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0x80, 0x0C, 0x90, 0x81, 0x72, 0xED, ++0xF0, 0x80, 0x05, 0x90, 0x81, 0x71, 0xED, 0xF0, 0x90, 0x00, 0x8F, 0xE0, 0x30, 0xE4, 0x2E, 0xEC, ++0x14, 0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, 0x23, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0x01, ++0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0x81, 0x72, 0xE0, 0x54, 0x7F, 0x4F, 0xFD, 0x7F, ++0x88, 0x80, 0x07, 0x90, 0x81, 0x71, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x48, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x1A, ++0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xD5, 0x91, 0x44, 0x12, 0x54, 0xD3, 0x12, 0x7C, 0x92, 0x30, 0xE0, ++0x06, 0x7D, 0x0C, 0x7F, 0x01, 0xF1, 0x2A, 0x02, 0x67, 0x84, 0x90, 0x81, 0xD3, 0xE0, 0x13, 0x13, ++0x54, 0x3F, 0x30, 0xE0, 0x1C, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xD6, 0x91, 0x44, 0x12, 0x7C, 0xE8, ++0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x06, 0x7D, 0x04, 0x7F, 0x01, 0xE1, 0x2A, 0x7D, 0x31, 0x12, 0x69, ++0x54, 0x22, 0xFF, 0x90, 0x81, 0x77, 0xE0, 0x2F, 0x22, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x13, 0x54, ++0x01, 0x22, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, ++0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, ++0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xF9, 0xF0, 0x74, 0x4F, 0xA3, 0xF0, ++0x12, 0x6E, 0xF9, 0xE5, 0x49, 0x30, 0xE1, 0x02, 0x11, 0x99, 0xE5, 0x49, 0x30, 0xE2, 0x03, 0x12, ++0x62, 0xCB, 0xE5, 0x49, 0x30, 0xE3, 0x03, 0x12, 0x65, 0x02, 0xE5, 0x4A, 0x30, 0xE0, 0x03, 0x12, ++0x6F, 0xCC, 0xE5, 0x4B, 0x30, 0xE5, 0x03, 0x12, 0x66, 0x0C, 0xE5, 0x4C, 0x30, 0xE1, 0x05, 0x7F, ++0x04, 0x12, 0x49, 0x48, 0xE5, 0x4C, 0x30, 0xE4, 0x02, 0x11, 0x91, 0xE5, 0x4C, 0x30, 0xE5, 0x03, ++0x12, 0x63, 0x71, 0xE5, 0x4C, 0x30, 0xE6, 0x03, 0x12, 0x63, 0xEC, 0x74, 0xF9, 0x04, 0x90, 0x01, ++0xC4, 0xF0, 0x74, 0x4F, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, ++0x32, 0x71, 0x25, 0x7D, 0x02, 0x7F, 0x02, 0x80, 0x15, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x02, 0x51, ++0x7B, 0x02, 0x4F, 0x92, 0x7D, 0x01, 0x7F, 0x02, 0x11, 0xAE, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x3D, ++0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0x2B, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xFB, ++0xF0, 0xE4, 0x90, 0x81, 0x78, 0xF0, 0xA3, 0xF0, 0x90, 0x81, 0x73, 0xF0, 0x90, 0x81, 0x6B, 0xE0, ++0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x11, 0xA4, 0x7D, 0x10, 0x7F, 0x03, 0x74, 0x45, 0x12, 0x7D, ++0x00, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, ++0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, 0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, ++0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x81, 0xEA, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x51, 0xED, 0x60, ++0x02, 0x21, 0xBB, 0x90, 0x81, 0x6F, 0xE0, 0x70, 0x02, 0x21, 0xBB, 0x31, 0xBC, 0x64, 0x01, 0x70, ++0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x81, 0x76, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x81, 0x75, ++0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x81, 0x75, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0x81, ++0x76, 0xEF, 0xF0, 0xE4, 0x90, 0x81, 0x78, 0x12, 0x70, 0xE9, 0x12, 0x6F, 0x9B, 0x12, 0x7C, 0x70, ++0x54, 0xEF, 0xF0, 0x90, 0x81, 0x6D, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x24, 0xFD, 0x50, 0x02, 0x80, ++0x03, 0x12, 0x62, 0x66, 0x12, 0x7C, 0xC9, 0x30, 0xE0, 0x4E, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x20, 0xE0, 0x21, 0x31, 0xC4, 0x6F, 0x70, 0x40, 0x90, 0x81, 0x6B, 0xE0, 0x44, 0x40, 0xF0, 0x12, ++0x7C, 0xF0, 0x31, 0xCC, 0x12, 0x71, 0xCB, 0x12, 0x67, 0x7D, 0x31, 0xD7, 0x90, 0x81, 0x76, 0xE0, ++0x14, 0xF0, 0x80, 0x24, 0x31, 0xBC, 0x64, 0x01, 0x70, 0x1E, 0x31, 0xC4, 0xFE, 0x6F, 0x60, 0x18, ++0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x0F, 0x12, 0x67, 0xCD, 0x30, 0xE0, 0x09, 0xEF, ++0x54, 0xBF, 0x31, 0xCC, 0x11, 0xDC, 0x11, 0xA4, 0x12, 0x7C, 0xB5, 0x22, 0x90, 0x81, 0x6D, 0xE0, ++0xC4, 0x54, 0x0F, 0x22, 0x90, 0x81, 0x75, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0xF0, 0x90, 0x01, 0x3F, ++0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x3D, 0x12, 0x7D, 0x00, ++0xFE, 0xF6, 0x74, 0x30, 0x01, 0xE5, 0xEF, 0x70, 0x33, 0x7D, 0x78, 0x7F, 0x02, 0x31, 0xDB, 0x7D, ++0x02, 0x7F, 0x03, 0x31, 0xDB, 0x7D, 0xC8, 0x7F, 0x02, 0x11, 0xDC, 0x12, 0x6F, 0x9B, 0xF0, 0xE4, ++0xFF, 0x51, 0x55, 0xEF, 0x70, 0x0A, 0x71, 0x5D, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x07, ++0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x4D, 0x2E, 0x71, 0x61, 0x02, 0x72, 0xE6, 0x90, 0x01, 0x36, 0x74, ++0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0x11, 0xAE, 0x7D, 0x02, 0x7F, 0x03, 0x11, ++0xAE, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0x12, 0x70, 0xE9, 0xE4, 0xFF, 0x51, 0x55, 0xBF, 0x01, ++0x10, 0x51, 0xE5, 0x90, 0x81, 0x72, 0xE0, 0x20, 0xE2, 0x0A, 0x7D, 0x01, 0x7F, 0x04, 0x02, 0x4D, ++0x2E, 0x12, 0x7C, 0xB5, 0x22, 0x12, 0x7C, 0xBD, 0x74, 0x60, 0x2E, 0x12, 0x6E, 0x49, 0xFD, 0x7C, ++0x00, 0x12, 0x67, 0xD9, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, ++0xFE, 0xEF, 0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0x12, 0x7C, 0xC9, 0x30, 0xE0, ++0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0x31, 0xD7, 0x90, 0x81, 0x6A, 0x12, ++0x67, 0xD0, 0x30, 0xE0, 0x0A, 0xEF, 0x12, 0x7C, 0x6E, 0x54, 0x07, 0x70, 0x47, 0x80, 0x42, 0x90, ++0x81, 0x78, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x73, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x81, 0xCC, 0xE0, ++0xFF, 0x90, 0x81, 0x78, 0xE0, 0xD3, 0x9F, 0x40, 0x28, 0x51, 0xED, 0x70, 0x27, 0xF1, 0x1E, 0x70, ++0x02, 0x80, 0x22, 0x90, 0x81, 0x79, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0x51, ++0xE5, 0xE4, 0x90, 0x81, 0x79, 0xF0, 0x80, 0x03, 0x12, 0x62, 0xBA, 0xE4, 0x90, 0x81, 0x78, 0xF0, ++0x22, 0x12, 0x62, 0x3D, 0x22, 0x90, 0x81, 0x6B, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0xE4, 0xFF, 0x51, ++0x55, 0xEF, 0x64, 0x01, 0x22, 0x51, 0xED, 0x70, 0x2B, 0x90, 0x81, 0x6B, 0xE0, 0x54, 0xFD, 0xF0, ++0x7D, 0x2C, 0x7F, 0x6F, 0x12, 0x5D, 0xC0, 0x7D, 0x08, 0x7F, 0x01, 0x12, 0x5E, 0x31, 0xBF, 0x01, ++0x0E, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0x7F, 0x01, 0x02, 0x4F, 0x2A, 0x12, ++0x64, 0xF8, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0xEE, 0xF0, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x2C, ++0x51, 0xED, 0x70, 0x28, 0x12, 0x7C, 0xF0, 0xF0, 0x90, 0x81, 0xEE, 0x74, 0x01, 0xF0, 0xE4, 0x90, ++0x81, 0x76, 0xF0, 0x04, 0x60, 0x16, 0x12, 0x7C, 0xF8, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x77, 0x12, ++0x4C, 0x44, 0x90, 0x81, 0x72, 0xE0, 0x20, 0xE2, 0x03, 0x12, 0x4D, 0x2A, 0x22, 0x91, 0x74, 0x91, ++0x68, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, 0xD1, ++0x88, 0xFF, 0xF5, 0x54, 0x12, 0x1F, 0xA4, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x06, 0xF1, 0x27, 0xF5, ++0x55, 0x80, 0x02, 0x8F, 0x55, 0x85, 0x54, 0x53, 0xE5, 0x53, 0xD3, 0x95, 0x55, 0x50, 0x26, 0xAB, ++0x50, 0xAA, 0x51, 0xA9, 0x52, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFD, 0xAF, 0x53, 0x12, 0x5A, 0xF1, ++0xAF, 0x53, 0x51, 0x55, 0xEF, 0xAF, 0x53, 0x70, 0x05, 0x12, 0x64, 0xED, 0x80, 0x03, 0x12, 0x6D, ++0xF4, 0x05, 0x53, 0x80, 0xD3, 0xE5, 0x54, 0x70, 0x0E, 0xFF, 0x51, 0x55, 0xEF, 0x70, 0x08, 0x71, ++0x5D, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x82, 0x05, 0x12, 0x46, 0xE3, 0x90, 0x82, ++0x04, 0xEF, 0xF0, 0x12, 0x46, 0xEC, 0x54, 0x0A, 0x00, 0x54, 0x0F, 0x01, 0x54, 0x13, 0x02, 0x54, ++0x18, 0x03, 0x54, 0x1D, 0x04, 0x54, 0x21, 0x08, 0x54, 0x25, 0x09, 0x54, 0x29, 0x0A, 0x54, 0x2D, ++0x12, 0x54, 0x32, 0x13, 0x54, 0x37, 0x14, 0x54, 0x3C, 0x20, 0x54, 0x40, 0x21, 0x54, 0x44, 0x23, ++0x54, 0x49, 0x25, 0x54, 0x4E, 0x26, 0x00, 0x00, 0x54, 0x52, 0x91, 0x62, 0x02, 0x6C, 0x5E, 0x91, ++0x62, 0x61, 0x69, 0x91, 0x62, 0x02, 0x6C, 0xAC, 0x91, 0x62, 0x02, 0x73, 0xEC, 0x91, 0x62, 0xE1, ++0x2D, 0x91, 0x62, 0xA1, 0x87, 0x91, 0x62, 0xE1, 0x74, 0x91, 0x62, 0xE1, 0x9C, 0x91, 0x62, 0x02, ++0x6B, 0xE7, 0x91, 0x62, 0x02, 0x6C, 0xE9, 0x91, 0x62, 0x02, 0x6D, 0x65, 0x91, 0x62, 0xC1, 0xBE, ++0x91, 0x62, 0xE1, 0xBD, 0x91, 0x62, 0x02, 0x6D, 0x74, 0x91, 0x62, 0x02, 0x6D, 0x7C, 0x91, 0x62, ++0x81, 0xD9, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x82, 0x04, 0xE0, 0x90, 0x01, 0xC2, ++0xF0, 0x22, 0x90, 0x82, 0x05, 0x02, 0x46, 0xDA, 0x12, 0x72, 0x7C, 0x91, 0xD3, 0x7D, 0x0C, 0x7F, ++0x01, 0x02, 0x4F, 0x2A, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, ++0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, ++0xB4, 0x74, 0x86, 0xF0, 0x12, 0x69, 0xDF, 0x54, 0x7F, 0xFC, 0x90, 0x82, 0xCC, 0x12, 0x20, 0xCE, ++0x90, 0x82, 0xCC, 0x12, 0x68, 0xCB, 0x7F, 0x7C, 0x12, 0x69, 0xB4, 0x12, 0x20, 0xDA, 0xCC, 0xC0, ++0x00, 0xC0, 0x12, 0x69, 0xB2, 0x12, 0x20, 0xDA, 0x00, 0xC0, 0x00, 0x14, 0x12, 0x69, 0xE8, 0x12, ++0x20, 0xDA, 0x00, 0x03, 0x3E, 0x60, 0xE4, 0xFD, 0xFF, 0x12, 0x69, 0xBD, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x91, 0x74, 0xE4, 0xFD, 0xFF, 0x02, 0x5D, 0xC0, 0xF1, 0x6E, 0xB1, 0x81, 0x12, 0x74, 0x0B, ++0x90, 0x81, 0xD3, 0x12, 0x74, 0x13, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x12, 0x6D, 0x5D, 0x54, ++0x04, 0x25, 0xE0, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0x81, 0xD3, 0xF0, 0xEE, 0x54, 0x08, ++0x25, 0xE0, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xD1, 0x87, 0xFB, 0xFF, 0x90, 0x05, 0x54, 0xE0, 0xC3, ++0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, 0x7C, 0x00, 0x7D, 0x05, 0x12, 0x20, 0x30, 0x90, 0x81, 0xD5, ++0xEF, 0xF0, 0xEB, 0x75, 0xF0, 0x05, 0x84, 0xA3, 0xF0, 0xB1, 0x81, 0x12, 0x1F, 0xA4, 0x20, 0xE0, ++0x09, 0x91, 0xD1, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x80, 0x0A, 0x7D, 0x0C, 0x7F, 0x01, 0x12, 0x4F, ++0x2A, 0x12, 0x67, 0x84, 0x12, 0x67, 0xA5, 0x20, 0xE0, 0x04, 0xEF, 0x54, 0xDF, 0xF0, 0x12, 0x7C, ++0x95, 0x30, 0xE0, 0x15, 0x90, 0x81, 0x6F, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x71, 0xF0, 0x12, ++0x7C, 0xB5, 0x90, 0x05, 0x58, 0x74, 0x05, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0x6F, 0xF0, 0x90, 0x81, ++0x71, 0x74, 0x0C, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0, 0x54, 0xFB, 0xF0, ++0x22, 0x90, 0x82, 0x08, 0x02, 0x46, 0xDA, 0xF1, 0x6E, 0x12, 0x1F, 0xA4, 0xFC, 0x54, 0x02, 0xFE, ++0x90, 0x81, 0x3D, 0xE0, 0x54, 0xFD, 0x4E, 0xF0, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x08, 0xB1, ++0x81, 0xF1, 0x96, 0x90, 0x81, 0x40, 0xF0, 0xEC, 0x30, 0xE0, 0x14, 0x12, 0x66, 0x6D, 0x90, 0x80, ++0x07, 0xE0, 0x64, 0x01, 0x70, 0x1D, 0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x14, 0x12, ++0x65, 0x4B, 0x12, 0x67, 0x6F, 0x30, 0xE0, 0x0B, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE2, 0x04, 0xE0, ++0x54, 0xFB, 0xF0, 0xB1, 0x81, 0xD1, 0x88, 0x90, 0x81, 0x3E, 0xF1, 0x26, 0x90, 0x81, 0x3F, 0xF0, ++0x12, 0x65, 0xFA, 0x30, 0xE0, 0x3C, 0xB1, 0x81, 0x12, 0x1F, 0xA4, 0xFE, 0x54, 0x04, 0xFD, 0xEF, ++0x54, 0xFB, 0x4D, 0xFF, 0x90, 0x81, 0x3D, 0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, ++0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0x90, 0x81, 0x41, 0xF0, 0x70, 0x03, 0x74, 0x14, 0xF0, ++0xB1, 0x81, 0x90, 0x00, 0x05, 0x12, 0x1F, 0xBD, 0x90, 0x81, 0x42, 0x12, 0x6C, 0xA5, 0x90, 0x81, ++0x43, 0xF0, 0x90, 0x81, 0x3E, 0xE0, 0x54, 0x01, 0x90, 0x81, 0x4B, 0xF0, 0x90, 0x81, 0x3E, 0xE0, ++0x54, 0x02, 0x90, 0x81, 0x4C, 0xF0, 0x90, 0x81, 0x3E, 0xE0, 0x54, 0x04, 0x90, 0x81, 0x4D, 0xF0, ++0x90, 0x81, 0x3E, 0xE0, 0x54, 0x08, 0x90, 0x81, 0x4E, 0xF0, 0x90, 0x81, 0x3E, 0xE0, 0x54, 0x10, ++0x90, 0x81, 0x4F, 0xF0, 0x90, 0x81, 0x3F, 0xE0, 0x54, 0x01, 0x90, 0x81, 0x50, 0xF0, 0x90, 0x81, ++0x3F, 0xE0, 0x54, 0x02, 0x90, 0x81, 0x51, 0xF0, 0x90, 0x81, 0x3F, 0xE0, 0x54, 0x04, 0x90, 0x81, ++0x52, 0xF0, 0x90, 0x81, 0x3F, 0xE0, 0x54, 0x08, 0x90, 0x81, 0x53, 0xF0, 0x90, 0x81, 0x3F, 0xE0, ++0x54, 0x10, 0x90, 0x81, 0x54, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x1F, 0xBD, 0x90, 0x82, ++0x0B, 0x12, 0x46, 0xE3, 0x11, 0xBA, 0x90, 0x81, 0x6F, 0xE0, 0xFF, 0x31, 0xE6, 0x90, 0x81, 0x6F, ++0xE0, 0x60, 0x1A, 0x90, 0x82, 0x0B, 0x12, 0x46, 0xDA, 0xD1, 0x88, 0x54, 0x0F, 0xFF, 0xF1, 0x27, ++0xFD, 0x12, 0x73, 0x13, 0x12, 0x70, 0xF4, 0x74, 0x01, 0xF0, 0x12, 0x70, 0x13, 0x22, 0xF1, 0x6E, ++0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0x6F, 0xF0, 0xEF, 0x12, 0x4F, 0xEB, 0xA3, 0xD1, ++0x87, 0xFF, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0x81, 0x6D, 0xE0, 0x54, 0xF0, 0x4E, 0xF1, ++0x95, 0x54, 0x01, 0x25, 0xE0, 0xFE, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xFD, 0x4E, 0xF0, 0xEF, 0x54, ++0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0xF1, 0x1E, 0xF1, 0x25, 0x90, 0x81, 0x6E, 0xF0, 0x90, 0x00, 0x04, ++0x12, 0x1F, 0xBD, 0xFD, 0x7F, 0x02, 0x12, 0x4F, 0x2A, 0xB1, 0x81, 0xD1, 0x8E, 0x12, 0x64, 0xF8, ++0xF0, 0x90, 0x81, 0x6F, 0x12, 0x7C, 0x84, 0xF1, 0x1E, 0x90, 0x01, 0xBE, 0xF0, 0x22, 0x90, 0x81, ++0x6D, 0xE0, 0x54, 0x0F, 0x22, 0x4F, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x1F, 0xBD, 0xF1, 0x6E, 0x12, ++0x74, 0x53, 0xB1, 0x81, 0x12, 0x74, 0x0B, 0x12, 0x64, 0x16, 0x4E, 0xF0, 0xEF, 0xC3, 0x13, 0x30, ++0xE0, 0x2B, 0xD1, 0x88, 0x90, 0x81, 0xDD, 0xF1, 0x26, 0x90, 0x81, 0xDE, 0xF0, 0x12, 0x1F, 0xA4, ++0xFF, 0x54, 0x04, 0xFE, 0x90, 0x81, 0xDC, 0xE0, 0x54, 0xFB, 0x4E, 0xF1, 0x95, 0x90, 0x81, 0xDF, ++0xF0, 0xEF, 0x54, 0x08, 0xFF, 0x90, 0x81, 0xDC, 0xE0, 0x54, 0xF7, 0x4F, 0xF0, 0x22, 0x90, 0x82, ++0x08, 0x02, 0x46, 0xE3, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0x55, 0xD1, 0x87, 0x90, 0x81, 0x56, 0xF1, ++0x26, 0x90, 0x81, 0x57, 0xF1, 0x95, 0x90, 0x81, 0x58, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, ++0x90, 0x81, 0x59, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x1F, 0xBD, 0x12, 0x1F, 0xA4, 0x90, ++0x81, 0x5A, 0xD1, 0x87, 0x90, 0x81, 0x5B, 0xF1, 0x26, 0x90, 0x81, 0x5C, 0xF1, 0x95, 0x90, 0x81, ++0x5D, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0x90, 0x81, 0x5E, 0xF0, 0x22, 0xF1, 0x27, 0xFF, ++0x30, 0xE0, 0x1C, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xCC, 0xD1, 0x87, 0x90, 0x81, 0xCD, 0xF0, 0xEF, ++0x54, 0xFE, 0xFF, 0xA3, 0xE0, 0x54, 0x01, 0x4F, 0xF1, 0x95, 0x90, 0x81, 0xCF, 0xF0, 0x22, 0x90, ++0x81, 0xCC, 0x74, 0x02, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, ++0xA3, 0x74, 0x07, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, ++0xC0, 0x05, 0xC0, 0x07, 0x7D, 0xF5, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x57, 0xFF, 0xA3, 0xF0, ++0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, ++0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0x90, 0x00, 0xF7, 0xE0, 0x20, 0xE7, 0x09, 0xE0, 0x7F, 0x01, ++0x20, 0xE6, 0x0C, 0x7F, 0x02, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x30, 0xE6, 0x02, 0x7F, 0x03, 0x22, ++0x11, 0x26, 0x90, 0x80, 0x07, 0xEF, 0xF0, 0x11, 0x60, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, ++0x00, 0x12, 0xE0, 0x54, 0xC7, 0x44, 0x20, 0xFD, 0x7F, 0x12, 0x12, 0x32, 0x1E, 0x02, 0x2D, 0xA7, ++0x11, 0x90, 0x11, 0xE0, 0x12, 0x6E, 0x52, 0x12, 0x6E, 0x71, 0xE4, 0xF5, 0x35, 0xF5, 0x36, 0xF5, ++0x37, 0x75, 0x38, 0x80, 0xAD, 0x35, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xAD, 0x36, 0x7F, 0x51, 0x12, ++0x32, 0x1E, 0xAD, 0x37, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xAD, 0x38, 0x7F, 0x53, 0x02, 0x32, 0x1E, ++0x90, 0x01, 0x30, 0xE4, 0x11, 0xB8, 0x90, 0x01, 0x38, 0x11, 0xB8, 0xFD, 0x7F, 0x50, 0x12, 0x32, ++0x1E, 0xE4, 0xFD, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xE4, ++0xFD, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, ++0x90, 0x81, 0x3D, 0xE0, 0x54, 0xFE, 0x71, 0x4B, 0x90, 0x81, 0x3D, 0xE0, 0x54, 0xFD, 0xF0, 0x54, ++0xFB, 0xF0, 0x54, 0xF7, 0xF0, 0x54, 0xEF, 0xF0, 0xE4, 0x90, 0x81, 0x40, 0x11, 0xB6, 0x80, 0xD9, ++0x90, 0x01, 0x34, 0x74, 0xFF, 0x11, 0xB8, 0x90, 0x01, 0x3C, 0x11, 0xB8, 0xFD, 0x7F, 0x54, 0x12, ++0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x55, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x56, 0x12, 0x32, 0x1E, ++0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x32, 0x1E, 0x90, 0x82, 0x8B, 0x71, 0xA8, 0xE4, 0x11, 0xB9, 0xFC, ++0xA3, 0xF0, 0x31, 0xB4, 0x90, 0x82, 0x90, 0xEF, 0xF0, 0x51, 0x8F, 0xA3, 0xE0, 0x04, 0xFD, 0x31, ++0xB4, 0xAC, 0x07, 0x90, 0x82, 0x90, 0xE0, 0x30, 0xE7, 0x08, 0x90, 0x82, 0x8E, 0x74, 0x02, 0xF0, ++0x80, 0x05, 0xE4, 0x90, 0x82, 0x8E, 0xF0, 0xEC, 0x30, 0xE6, 0x34, 0x51, 0x8F, 0x7D, 0x02, 0x31, ++0xB4, 0xEF, 0x54, 0x70, 0xC4, 0x54, 0x0F, 0x90, 0x82, 0x91, 0xF0, 0x14, 0x60, 0x11, 0x14, 0x60, ++0x16, 0x24, 0xFE, 0x60, 0x12, 0x14, 0x60, 0x07, 0x14, 0x60, 0x04, 0x24, 0x06, 0x80, 0x10, 0x90, ++0x82, 0x8F, 0x74, 0x04, 0xF0, 0x80, 0x0D, 0x90, 0x82, 0x8F, 0x74, 0x08, 0xF0, 0x80, 0x05, 0xE4, ++0x90, 0x82, 0x8F, 0xF0, 0x90, 0x82, 0x8E, 0xE0, 0x24, 0x18, 0xFF, 0xA3, 0xE0, 0x2F, 0xFF, 0x22, ++0x90, 0x82, 0x87, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x31, 0x07, 0x90, 0x82, 0x8A, ++0xEF, 0xF0, 0x90, 0x82, 0x89, 0xE0, 0xFD, 0x90, 0x82, 0x88, 0xE0, 0x2D, 0xFD, 0x90, 0x82, 0x87, ++0xE0, 0x34, 0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xFF, 0xEE, 0x3C, 0xCF, 0x24, 0x06, 0xCF, 0x34, ++0x00, 0xFE, 0xE4, 0xFD, 0xAB, 0x07, 0xAA, 0x06, 0xED, 0x2B, 0xFB, 0xE4, 0x3A, 0xFA, 0xC3, 0x90, ++0x81, 0x3C, 0xE0, 0x9B, 0x90, 0x81, 0x3B, 0xE0, 0x9A, 0x50, 0x0A, 0xA3, 0x12, 0x7C, 0x9C, 0xEB, ++0x9F, 0xFB, 0xEA, 0x9E, 0xFA, 0xEA, 0x90, 0xFD, 0x11, 0xF0, 0xAF, 0x03, 0x74, 0x00, 0x2F, 0x12, ++0x7C, 0xDF, 0xFF, 0x22, 0x31, 0x80, 0xEF, 0x64, 0x08, 0x70, 0x34, 0x51, 0x22, 0x24, 0x07, 0x31, ++0xAE, 0xEF, 0x70, 0x2B, 0x51, 0x22, 0x24, 0x1D, 0x31, 0xAE, 0xBF, 0x44, 0x0B, 0x51, 0x22, 0x24, ++0x1F, 0x31, 0xAE, 0xEF, 0x64, 0x43, 0x60, 0x14, 0x51, 0x22, 0x24, 0x1D, 0x31, 0xAE, 0xEF, 0x64, ++0x43, 0x70, 0x0C, 0x51, 0x22, 0x24, 0x1F, 0x31, 0xAE, 0xBF, 0x44, 0x03, 0x7F, 0x01, 0x22, 0x7F, ++0x00, 0x22, 0x90, 0x82, 0x89, 0xE0, 0xFF, 0x90, 0x82, 0x88, 0xE0, 0x2F, 0xFF, 0x90, 0x82, 0x87, ++0xE0, 0x34, 0x00, 0xFE, 0x90, 0x82, 0x8A, 0xE0, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x3E, 0xCF, 0x22, ++0x31, 0x80, 0xEF, 0x64, 0x08, 0x70, 0x20, 0x51, 0x22, 0x24, 0x07, 0x31, 0xAE, 0xEF, 0x64, 0x06, ++0x70, 0x15, 0x51, 0x22, 0x24, 0x0E, 0x31, 0xAE, 0xEF, 0x70, 0x0C, 0x51, 0x22, 0x24, 0x0F, 0x31, ++0xAE, 0xBF, 0x01, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x24, 0x0A, 0xFC, 0xED, 0x2C, 0xFD, ++0x31, 0xB4, 0x90, 0x82, 0x08, 0xA3, 0xE0, 0xFE, 0x90, 0x82, 0x0E, 0xE0, 0x2E, 0x24, 0x24, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x82, 0x0E, 0xE0, 0x04, 0xF0, 0x22, 0x90, ++0x82, 0x8B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x24, 0x19, 0xFD, 0x31, 0xB4, 0x90, 0x82, 0x25, ++0x22, 0x24, 0x04, 0xFD, 0x90, 0x82, 0x0E, 0xE0, 0x2D, 0xFD, 0x21, 0xB4, 0x24, 0x1A, 0xFC, 0xED, ++0x2C, 0xFD, 0x31, 0xB4, 0x90, 0x82, 0x0E, 0xE0, 0x24, 0x26, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x22, ++0x51, 0xEE, 0x12, 0x6D, 0xE6, 0x12, 0x71, 0xD4, 0x71, 0x52, 0x71, 0x3B, 0x12, 0x74, 0x53, 0x11, ++0xC0, 0x90, 0x81, 0xE4, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, ++0xF0, 0xE4, 0x90, 0x81, 0xE6, 0xF0, 0x90, 0x81, 0xE4, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xE4, 0xFD, ++0xFF, 0x12, 0x7C, 0xBD, 0xED, 0x70, 0x14, 0x71, 0x32, 0xF5, 0x83, 0xC0, 0x83, 0xC0, 0x82, 0x71, ++0x2A, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x11, 0x71, 0x32, 0xF5, 0x83, 0xC0, ++0x83, 0xC0, 0x82, 0x71, 0x2A, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, 0x83, ++0xF0, 0x12, 0x6D, 0xF5, 0x90, 0x81, 0x68, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, ++0x08, 0x22, 0x74, 0x60, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0x22, 0x90, 0x81, 0xD8, 0xE0, 0x54, ++0xFE, 0xF0, 0x54, 0x7F, 0xF0, 0x54, 0xFB, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, ++0xF0, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0xE4, 0xA3, 0xF0, 0x12, ++0x7C, 0xE8, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x82, 0x87, 0x71, 0xA8, 0x31, 0xB4, 0xEF, 0x54, 0x0C, ++0x64, 0x08, 0x70, 0x2B, 0x90, 0x82, 0x8A, 0xF0, 0x90, 0x82, 0x8A, 0xE0, 0xFD, 0xC3, 0x94, 0x06, ++0x50, 0x1D, 0x90, 0x82, 0x87, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, 0x24, 0x10, 0x71, 0xA2, ++0xEF, 0xF4, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x82, 0x8A, 0xE0, 0x04, 0xF0, 0x80, 0xD9, 0x7F, ++0x00, 0x22, 0xFC, 0xED, 0x2C, 0xFD, 0x21, 0xB4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xC4, 0xEE, 0xF0, 0xA3, 0xEF, 0x71, ++0x4B, 0x90, 0x82, 0xC4, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x60, 0x24, 0xC3, ++0x90, 0x82, 0xC7, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0xC6, 0xE0, 0x94, 0x03, 0x40, 0x0B, 0x90, 0x01, ++0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x0C, 0x90, 0x82, 0xC6, 0x71, 0xFD, 0x12, 0x67, ++0x76, 0x80, 0xCE, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0x85, 0xE4, 0x75, 0xF0, ++0x01, 0x02, 0x46, 0x9F, 0x90, 0x82, 0x00, 0xEF, 0x71, 0x4B, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, ++0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x82, 0x00, 0xE0, 0x6F, 0x60, 0x35, 0xC3, 0x90, 0x82, 0x02, ++0xE0, 0x94, 0x88, 0x90, 0x82, 0x01, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x10, 0xF0, 0x22, 0x90, 0x82, 0x01, 0x71, 0xFD, 0x12, 0x60, 0x9C, 0xD3, 0x90, 0x82, 0x02, 0xE0, ++0x94, 0x32, 0x90, 0x82, 0x01, 0xE0, 0x94, 0x00, 0x40, 0xC0, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, ++0xB9, 0x22, 0xE4, 0x90, 0x81, 0xF0, 0x11, 0xB8, 0x90, 0x00, 0x9E, 0xE0, 0x90, 0x81, 0xF4, 0xF0, ++0x90, 0x00, 0x9F, 0xE0, 0x90, 0x81, 0xF5, 0xF0, 0xE0, 0xFD, 0xFE, 0x90, 0x81, 0xF4, 0xE0, 0xFC, ++0xFB, 0xEB, 0xFF, 0x90, 0x81, 0xF0, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x00, 0x9E, 0xE0, 0xFF, ++0xEC, 0xB5, 0x07, 0x09, 0xA3, 0xE0, 0xFF, 0xED, 0xB5, 0x07, 0x02, 0x80, 0x12, 0xC3, 0x90, 0x81, ++0xF3, 0xE0, 0x94, 0x64, 0x90, 0x81, 0xF2, 0xE0, 0x94, 0x00, 0x40, 0x0C, 0x12, 0x71, 0x59, 0x90, ++0x81, 0xF0, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x81, 0xF2, 0x71, 0xFD, 0x80, 0xA9, 0xE4, ++0xFD, 0xFB, 0xFA, 0x12, 0x67, 0x6F, 0x30, 0xE0, 0x74, 0x90, 0x00, 0xB6, 0xE0, 0xFC, 0x90, 0x00, ++0xBF, 0xE0, 0xFE, 0x90, 0x00, 0xBE, 0xE0, 0x24, 0x00, 0xFB, 0xEA, 0x3E, 0xFA, 0xC4, 0xF8, 0x54, ++0xF0, 0xC8, 0xEB, 0xC4, 0x54, 0x0F, 0x48, 0x54, 0x1E, 0xFF, 0xEC, 0xC4, 0x54, 0x01, 0x4F, 0x90, ++0x81, 0xEA, 0xF0, 0x12, 0x7C, 0x5D, 0xEC, 0x30, 0xE4, 0x0A, 0x90, 0x81, 0x55, 0xE0, 0xFD, 0x12, ++0x67, 0x94, 0x80, 0x35, 0xEB, 0x30, 0xE5, 0x09, 0x90, 0x81, 0x56, 0xB1, 0x7A, 0x04, 0xF0, 0x80, ++0x28, 0xEB, 0x30, 0xE6, 0x0A, 0x90, 0x81, 0x57, 0xB1, 0x7A, 0x74, 0x02, 0xF0, 0x80, 0x1A, 0xEB, ++0x30, 0xE7, 0x0A, 0x90, 0x81, 0x58, 0xB1, 0x7A, 0x74, 0x03, 0xF0, 0x80, 0x0C, 0xEA, 0x30, 0xE0, ++0x08, 0x90, 0x81, 0x59, 0xB1, 0x7A, 0x74, 0x04, 0xF0, 0xAF, 0x05, 0x80, 0x56, 0x90, 0x81, 0x48, ++0xE0, 0xFD, 0x7C, 0x00, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x20, 0x30, 0xED, 0x4C, 0x70, ++0x05, 0x90, 0x81, 0x55, 0x80, 0x2A, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x05, 0x90, 0x81, 0x56, 0x80, ++0x1F, 0xED, 0x64, 0x02, 0x4C, 0x70, 0x05, 0x90, 0x81, 0x57, 0x80, 0x14, 0xED, 0x64, 0x03, 0x4C, ++0x70, 0x05, 0x90, 0x81, 0x58, 0x80, 0x09, 0xED, 0x64, 0x04, 0x4C, 0x70, 0x0C, 0x90, 0x81, 0x59, ++0xE0, 0xFF, 0xB1, 0x83, 0x90, 0x81, 0x49, 0x71, 0xFD, 0x22, 0xE0, 0xFD, 0x90, 0x81, 0x49, 0xE4, ++0xF0, 0xA3, 0x22, 0x90, 0x04, 0x24, 0xEF, 0xF0, 0x22, 0x12, 0x4C, 0xB3, 0x90, 0x81, 0x3D, 0xE0, ++0x30, 0xE0, 0x02, 0x91, 0xAF, 0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x19, 0x90, 0x01, 0x57, 0xE4, ++0xF0, 0xFD, 0xFF, 0xB1, 0xC0, 0x12, 0x7C, 0x92, 0x30, 0xE0, 0x07, 0x7D, 0x0C, 0x7F, 0x01, 0x12, ++0x4F, 0x2A, 0x12, 0x67, 0x84, 0x22, 0xE4, 0xFD, 0x7F, 0x0C, 0x12, 0x4D, 0x2E, 0xE4, 0xFD, 0xFF, ++0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, 0x80, 0x05, 0xED, 0xF0, 0x22, 0x7F, 0xFF, 0xB1, 0xC0, 0xE4, ++0x90, 0x82, 0xD8, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x82, 0xDA, 0xF0, 0x7D, 0x47, ++0x7F, 0xFF, 0xB1, 0xC0, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x11, 0xA3, 0xE0, 0x70, 0x0D, 0xA3, 0xE0, ++0x70, 0x09, 0xA3, 0xE0, 0x70, 0x05, 0xD1, 0x24, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x82, 0xD9, 0xE0, ++0x94, 0xE8, 0x90, 0x82, 0xD8, 0xE0, 0x94, 0x03, 0x40, 0x0C, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, ++0xF0, 0xD1, 0x24, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x90, 0x82, 0xD8, ++0x71, 0xFD, 0x80, 0xC0, 0x90, 0x82, 0xDA, 0xE0, 0xFF, 0x7D, 0x48, 0x80, 0x93, 0x7D, 0x08, 0xE4, ++0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xBF, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, ++0x90, 0x80, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x21, 0x90, 0x05, 0x22, 0xE0, ++0x90, 0x82, 0xC3, 0xF0, 0x7D, 0x26, 0xB1, 0xCB, 0xEF, 0x64, 0x01, 0x70, 0x02, 0xD1, 0x98, 0x90, ++0x82, 0xC3, 0xE0, 0xFF, 0x7D, 0x27, 0xB1, 0xC0, 0x12, 0x72, 0x84, 0x80, 0x05, 0x12, 0x72, 0x84, ++0xD1, 0x98, 0x12, 0x63, 0x4D, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF1, 0x2C, 0x54, 0x3F, ++0xF0, 0xEF, 0x60, 0x0A, 0xF1, 0x40, 0x44, 0x10, 0xF1, 0x2B, 0x44, 0x80, 0xF0, 0x22, 0xF1, 0x40, ++0x54, 0xEF, 0xF1, 0x2B, 0x44, 0x40, 0xF0, 0x22, 0x90, 0x80, 0x4C, 0xE0, 0xFF, 0x90, 0x82, 0xC0, ++0xE0, 0xFB, 0x90, 0x82, 0xCB, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0xF1, 0x4C, 0x90, 0x82, 0xC1, 0xEE, ++0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x82, 0xBF, 0xE0, 0xFF, 0xD1, 0x7C, 0x90, 0x82, 0xC1, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, 0x07, 0x12, 0x7C, ++0xA9, 0x44, 0x01, 0xF0, 0x12, 0x7C, 0xA9, 0x54, 0xFB, 0xF0, 0xAC, 0x07, 0x74, 0x16, 0x2C, 0x12, ++0x7C, 0x7C, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, 0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, ++0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, 0xF1, 0x38, 0xE0, 0x54, ++0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0xF1, 0x38, 0xED, 0xF0, 0x22, 0xF0, 0x74, 0x1F, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, ++0x74, 0x21, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xC9, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x82, 0xC8, 0xEF, 0xF0, ++0xE4, 0xFD, 0xFC, 0x12, 0x73, 0xD8, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0x82, 0xC8, 0xE0, 0x90, 0x04, ++0x25, 0xF0, 0x90, 0x82, 0xC9, 0xE0, 0x60, 0x0E, 0x74, 0x0F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x08, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, ++0xF0, 0xF0, 0xAF, 0x05, 0x12, 0x7C, 0x79, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x82, 0xCA, 0xE0, 0x25, ++0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0x12, 0x7C, 0x79, 0xEE, 0xF0, 0x90, 0x82, ++0xCB, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x1E, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, ++0xF0, 0x74, 0x21, 0x2E, 0xF1, 0x43, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xE4, 0x90, 0x80, 0x01, 0x01, 0xB6, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x84, 0x22, 0x90, ++0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, 0x90, 0xFD, 0x00, 0xE0, 0x54, ++0xBF, 0xF0, 0x11, 0xAD, 0x12, 0x32, 0x77, 0x11, 0xBA, 0x12, 0x5F, 0xE2, 0x7F, 0x01, 0x12, 0x44, ++0x15, 0x90, 0x81, 0xD7, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x44, 0x15, 0x90, 0x81, 0xD7, 0xE0, 0x04, ++0xF0, 0x12, 0x58, 0x40, 0x12, 0x5A, 0xC0, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x80, ++0x12, 0x32, 0x1E, 0x75, 0x20, 0xFF, 0x12, 0x5F, 0xE8, 0x11, 0x42, 0x11, 0xA3, 0xE4, 0xFF, 0x02, ++0x44, 0x9E, 0xE4, 0x90, 0x81, 0xFD, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x98, 0xE0, 0x7F, 0x00, 0x30, ++0xE4, 0x02, 0x7F, 0x01, 0xEF, 0x64, 0x01, 0x60, 0x3C, 0xC3, 0x90, 0x81, 0xFE, 0xE0, 0x94, 0x88, ++0x90, 0x81, 0xFD, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, ++0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1E, 0x90, 0x81, 0xFD, 0x12, 0x5B, 0xFD, 0x11, 0x9C, 0xD3, ++0x90, 0x81, 0xFE, 0xE0, 0x94, 0x32, 0x90, 0x81, 0xFD, 0xE0, 0x94, 0x00, 0x40, 0xBB, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE3, 0xB4, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x7F, 0x14, 0x7E, 0x00, ++0x02, 0x32, 0xAA, 0x90, 0x01, 0xE4, 0x74, 0x16, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x94, ++0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, ++0xF0, 0x90, 0x01, 0x9C, 0x74, 0x7E, 0xF0, 0xA3, 0x74, 0x92, 0xF0, 0xA3, 0x74, 0xA0, 0xF0, 0xA3, ++0x74, 0x24, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x49, 0xF0, 0x90, 0x01, 0x9A, 0x74, 0xE0, 0xF0, 0x90, ++0x01, 0x99, 0xE4, 0xF0, 0x90, 0x01, 0x98, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0xFF, 0xF0, 0x90, ++0x81, 0xFF, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xEA, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x60, 0xA3, 0xF0, ++0x90, 0x81, 0x6F, 0xE0, 0x60, 0x0E, 0x90, 0x81, 0x72, 0xE0, 0xFF, 0x90, 0x81, 0x71, 0xE0, 0x6F, ++0x60, 0x02, 0x51, 0x3D, 0xC2, 0xAF, 0x12, 0x6E, 0x90, 0xBF, 0x01, 0x02, 0x31, 0x27, 0xD2, 0xAF, ++0x31, 0xBC, 0x12, 0x43, 0x4D, 0x80, 0xC8, 0x90, 0x81, 0x6A, 0xE0, 0x30, 0xE0, 0x02, 0x31, 0x31, ++0x22, 0x90, 0x81, 0x72, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0D, 0x31, 0x76, 0xBF, 0x01, 0x08, ++0x31, 0x49, 0x90, 0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x12, 0x71, 0x7E, 0x31, 0x5A, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x71, 0x61, 0x90, 0x00, 0x08, ++0xE0, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, 0xE4, 0xFF, 0x12, 0x5C, 0x04, 0x90, 0x81, ++0x6B, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01, ++0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, 0x75, 0x4F, 0x01, 0x80, 0x22, 0x90, 0x02, 0x96, 0xE0, 0x60, ++0x05, 0x75, 0x4F, 0x10, 0x80, 0x17, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, ++0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x4F, 0x04, 0x80, 0x02, 0x80, 0x10, 0x90, 0x01, 0xB9, ++0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x4F, 0xF0, 0x7F, 0x00, 0x22, 0x22, 0x90, 0x01, 0xB8, ++0xE4, 0xF0, 0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x72, 0xFA, 0xEF, ++0x64, 0x01, 0x60, 0x05, 0x75, 0x0F, 0x01, 0x80, 0x51, 0x90, 0x81, 0x73, 0xE0, 0xFF, 0x54, 0x03, ++0x60, 0x05, 0x75, 0x0F, 0x02, 0x80, 0x43, 0x90, 0x81, 0x71, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, ++0x05, 0x75, 0x0F, 0x04, 0x80, 0x34, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, 0x80, 0x2B, 0x90, ++0x81, 0x73, 0xE0, 0x30, 0xE4, 0x05, 0x75, 0x0F, 0x10, 0x80, 0x1F, 0x90, 0x81, 0x6B, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05, 0x75, 0x0F, 0x20, 0x80, 0x0F, 0x90, 0x81, 0xD2, 0xE0, 0x60, ++0x05, 0x75, 0x0F, 0x80, 0x80, 0x04, 0x31, 0xBD, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, ++0x90, 0x01, 0xB8, 0xE5, 0x0F, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x71, ++0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x4D, 0x2E, 0xE4, 0xFF, 0x12, 0x52, 0x55, 0xBF, 0x01, 0x0E, 0x90, ++0x81, 0x6F, 0xE0, 0x60, 0x08, 0x51, 0x5E, 0x54, 0x07, 0x70, 0x02, 0x51, 0x3D, 0x22, 0x90, 0x81, ++0x73, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x4E, 0x54, ++0xC0, 0x70, 0x07, 0x51, 0x5E, 0x54, 0xFD, 0xF0, 0x80, 0xC3, 0xE5, 0x4E, 0x30, 0xE6, 0x1E, 0x90, ++0x81, 0x6F, 0xE0, 0x64, 0x01, 0x70, 0x18, 0x90, 0x81, 0x73, 0xE0, 0x44, 0x01, 0xF0, 0x12, 0x57, ++0x1E, 0x64, 0x02, 0x60, 0x04, 0x71, 0x2A, 0x80, 0x06, 0x51, 0xBA, 0x80, 0x02, 0x51, 0x5E, 0xE5, ++0x4E, 0x90, 0x81, 0x73, 0x30, 0xE7, 0x0E, 0xE0, 0x44, 0x02, 0x12, 0x4C, 0x3D, 0x90, 0x81, 0x6A, ++0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x51, 0xE4, 0x90, 0x81, 0x72, 0xE0, ++0x64, 0x0C, 0x60, 0x06, 0x12, 0x5D, 0xB6, 0x12, 0x5E, 0x2D, 0x22, 0x90, 0x81, 0x6F, 0xE0, 0x60, ++0x10, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x04, 0x51, 0xE4, 0x80, 0x05, 0x12, 0x53, 0x61, 0x51, ++0x3D, 0x02, 0x4C, 0x1A, 0xD1, 0x02, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, ++0x92, 0x74, 0x02, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xCE, ++0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x12, 0x4B, 0xDC, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x08, 0xF0, 0x22, ++0xE4, 0xFF, 0x12, 0x52, 0x55, 0xBF, 0x01, 0x11, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x0B, 0x12, 0x57, ++0x1E, 0x64, 0x02, 0x60, 0x02, 0x80, 0x03, 0x51, 0xBA, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1C, ++0x90, 0x80, 0x4B, 0xE0, 0xFF, 0x90, 0x82, 0xCB, 0x74, 0x09, 0xF0, 0x7B, 0x18, 0xE4, 0xFD, 0x12, ++0x5F, 0x4C, 0x90, 0x81, 0xEC, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x71, 0x4D, 0x22, 0x90, 0x04, 0x1F, ++0x74, 0x20, 0xF0, 0x22, 0x12, 0x52, 0xED, 0x70, 0x17, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x11, 0x12, ++0x6F, 0x9B, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0x12, 0x7C, 0x6E, 0x54, 0x07, 0x70, 0x02, 0x51, 0x3D, ++0x22, 0x90, 0x81, 0x6A, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x18, 0xEF, 0x54, ++0xBF, 0x91, 0xEE, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFE, 0x91, ++0xF7, 0x74, 0x04, 0xF0, 0x51, 0x3D, 0xE4, 0xFF, 0x90, 0x81, 0xDC, 0xE0, 0xFD, 0x30, 0xE0, 0x4B, ++0x90, 0x81, 0xE1, 0xE0, 0xFC, 0x60, 0x44, 0xF1, 0xD9, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0xFF, 0x90, 0x04, 0xE0, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x0B, 0xE4, 0x90, 0x81, 0xE1, ++0xF0, 0x90, 0x81, 0xE3, 0x04, 0xF0, 0x22, 0x90, 0x81, 0xDE, 0xE0, 0xD3, 0x9C, 0x50, 0x13, 0xED, ++0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x04, 0x91, 0xE5, 0x80, 0x02, 0x91, 0x9F, 0x91, 0x16, ++0xF0, 0x22, 0x12, 0x5E, 0x2D, 0x90, 0x81, 0xE1, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x6A, 0x12, ++0x4F, 0xE9, 0x30, 0xE0, 0x1D, 0xEF, 0x54, 0x7F, 0x91, 0xEE, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, ++0xF0, 0x80, 0x07, 0xE0, 0x54, 0xFD, 0x91, 0xF7, 0x04, 0xF0, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x02, ++0x51, 0x3D, 0x7F, 0x01, 0x80, 0x82, 0x90, 0x81, 0xDC, 0xE0, 0x54, 0xFE, 0x22, 0x90, 0x81, 0xDC, ++0xE0, 0x30, 0xE0, 0x7A, 0x90, 0x81, 0xE0, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0xE3, 0xE0, 0x64, 0x01, ++0x70, 0x2F, 0x90, 0x81, 0xDC, 0xF1, 0xD0, 0x30, 0xE0, 0x27, 0x90, 0x81, 0xE2, 0xE0, 0x70, 0x21, ++0x90, 0x81, 0xDF, 0xE0, 0xFE, 0xA3, 0xE0, 0xC3, 0x9E, 0x40, 0x16, 0xEF, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x30, 0xE0, 0x07, 0x91, 0xE5, 0x91, 0x16, 0xF0, 0x80, 0x06, 0x91, 0x9F, 0x91, 0x16, 0xF0, ++0x22, 0x90, 0x81, 0xE0, 0xE0, 0xFF, 0x90, 0x81, 0xDD, 0xE0, 0xD3, 0x9F, 0x50, 0x30, 0x90, 0x06, ++0x92, 0xE0, 0x20, 0xE2, 0x1A, 0x90, 0x81, 0xE2, 0xE0, 0x70, 0x14, 0x7D, 0x08, 0xFF, 0x12, 0x5E, ++0x31, 0x90, 0x81, 0xE1, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0xDB, 0xE0, 0x04, 0xF0, 0x80, 0x06, 0x90, ++0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0x81, 0xE0, 0xF0, 0x90, 0x81, 0xE2, 0xF0, 0x22, 0x90, ++0x01, 0xC7, 0x74, 0x10, 0xF0, 0x7F, 0x01, 0x90, 0x82, 0xEB, 0xEF, 0xF0, 0x90, 0x80, 0x07, 0xE0, ++0xB4, 0x02, 0x12, 0x90, 0x82, 0xEB, 0xE0, 0xFF, 0x64, 0x01, 0x60, 0x25, 0x90, 0x01, 0x4D, 0xE0, ++0x64, 0x80, 0xF0, 0x80, 0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x7F, 0x64, 0x7E, 0x00, 0x12, ++0x32, 0xAA, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x82, 0xEB, 0xE0, 0xFF, 0x12, 0x4B, ++0x32, 0x91, 0x16, 0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0x12, 0x5A, 0xF1, 0xE4, 0xFF, 0x22, 0xF0, 0x90, ++0x04, 0xE0, 0xE0, 0x90, 0x81, 0x6B, 0x22, 0xF0, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, ++0xB8, 0x22, 0xB1, 0xFA, 0x30, 0xE0, 0x16, 0xE4, 0x90, 0x81, 0x40, 0xF0, 0x90, 0x81, 0x3D, 0xE0, ++0x30, 0xE0, 0x0A, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x04, 0xB1, 0x1E, 0x91, 0xA7, 0x22, 0xB1, 0x4B, ++0x90, 0x01, 0xC7, 0x74, 0x66, 0xF0, 0xE4, 0xFF, 0x22, 0xB1, 0xFA, 0x30, 0xE0, 0x1C, 0xEF, 0x30, ++0xE0, 0x18, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x10, 0x90, 0x81, 0x41, 0xE0, 0x70, 0x04, ++0xB1, 0x1E, 0x81, 0xA7, 0x90, 0x81, 0x41, 0xE0, 0x14, 0xF0, 0x22, 0xC2, 0xAF, 0x90, 0x81, 0x3D, ++0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x51, 0xDB, 0x90, 0x02, 0x09, 0xE0, 0x90, ++0x04, 0x24, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0xF1, 0x94, 0xD2, 0xAF, 0x22, ++0x90, 0x81, 0x40, 0xE0, 0x60, 0x08, 0x90, 0x81, 0x3D, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0xB1, 0x1E, ++0x81, 0xA7, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x2B, 0x90, 0x81, 0x6B, 0xD1, 0x05, 0x30, 0xE0, 0x0C, ++0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x05, 0x12, 0x51, 0xD7, 0xF1, 0x7D, 0x90, 0x82, 0xE5, 0xE0, ++0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, ++0x44, 0x01, 0xF0, 0xF1, 0x8C, 0xBF, 0x03, 0x0D, 0x90, 0x01, 0xB8, 0xE0, 0x04, 0xF0, 0x90, 0x05, ++0x21, 0xE0, 0x44, 0x80, 0xF0, 0x91, 0x1D, 0xD1, 0x31, 0xE4, 0x90, 0x81, 0xDB, 0xF0, 0xB1, 0x29, ++0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x0B, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xD5, 0x12, 0x4C, 0x44, ++0xF1, 0x84, 0x90, 0x80, 0x07, 0xE0, 0xB4, 0x01, 0x10, 0xF1, 0xA5, 0x20, 0xE0, 0x0B, 0xEF, 0xC4, ++0x13, 0x54, 0x07, 0x20, 0xE0, 0x03, 0x12, 0x73, 0x90, 0x22, 0x90, 0x81, 0x3D, 0xE0, 0xFF, 0xC3, ++0x13, 0x22, 0x90, 0x81, 0x6A, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0x12, 0x5C, 0x52, 0x90, ++0x81, 0xEE, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xB1, 0xFA, 0x30, 0xE0, 0x14, 0x90, 0x81, 0xEF, 0xE0, ++0x20, 0xE0, 0x0D, 0xB1, 0x4B, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE2, 0x04, 0xE0, 0x54, 0xFB, 0xF0, ++0x22, 0x90, 0x81, 0xD8, 0xE0, 0x30, 0xE0, 0x34, 0x12, 0x52, 0xED, 0x70, 0x2F, 0x90, 0x82, 0xEC, ++0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x0A, 0x0B, 0x90, 0x81, 0xDA, 0xE0, 0x04, 0xF0, 0xE4, 0x90, 0x82, ++0xEC, 0xF0, 0x90, 0x81, 0xDA, 0xE0, 0xFF, 0x90, 0x81, 0xD9, 0xE0, 0xD3, 0x9F, 0x50, 0x0D, 0x90, ++0x81, 0xDB, 0xE0, 0x70, 0x07, 0xE4, 0x90, 0x81, 0xDA, 0xF0, 0xF1, 0x68, 0x22, 0x90, 0x01, 0x17, ++0xE0, 0xFE, 0x90, 0x01, 0x16, 0xF1, 0x9C, 0x90, 0x81, 0x3B, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, ++0x86, 0xE0, 0x44, 0x04, 0xF0, 0xB1, 0xFA, 0x30, 0xE0, 0x2B, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0xD1, ++0xE0, 0x90, 0x81, 0x3D, 0xE0, 0xBF, 0x01, 0x05, 0x54, 0xEF, 0xF0, 0x80, 0x03, 0x44, 0x10, 0xF0, ++0x90, 0x81, 0x40, 0xE0, 0xFF, 0x60, 0x0E, 0xE4, 0xF5, 0x1D, 0x8F, 0x1E, 0xFB, 0xFD, 0x7F, 0x5C, ++0x7E, 0x01, 0x12, 0x4C, 0x4E, 0x90, 0x81, 0x3D, 0xE0, 0x44, 0x01, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, ++0x12, 0x50, 0xAE, 0x90, 0x05, 0x52, 0xE0, 0x54, 0x07, 0x04, 0x90, 0x81, 0x48, 0x12, 0x5B, 0x4B, ++0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0, 0xF1, 0x6F, 0x30, 0xE0, 0x03, 0x12, 0x7C, 0x5D, 0x22, ++0xE4, 0x90, 0x82, 0xE1, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x23, 0xC3, 0x90, ++0x82, 0xE2, 0xE0, 0x94, 0xD0, 0x90, 0x82, 0xE1, 0xE0, 0x94, 0x07, 0x40, 0x0A, 0x90, 0x01, 0xC1, ++0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x00, 0x22, 0x90, 0x82, 0xE1, 0x12, 0x5B, 0xFD, 0xF1, 0x76, 0x80, ++0xD6, 0x7F, 0x01, 0x22, 0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x45, 0x4E, 0x90, 0x82, 0x03, ++0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x80, 0x01, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, ++0xAF, 0xEF, 0x30, 0xE1, 0x0A, 0x90, 0x80, 0x01, 0xE0, 0x54, 0xFD, 0xF0, 0x12, 0x6D, 0x84, 0xF1, ++0x5E, 0x30, 0xE2, 0x06, 0x54, 0xFB, 0xF0, 0x12, 0x6B, 0x7F, 0xF1, 0x5E, 0x30, 0xE5, 0x0B, 0x54, ++0xDF, 0xF0, 0xD1, 0xE0, 0xBF, 0x01, 0x03, 0x12, 0x74, 0xD2, 0xD2, 0xAF, 0x80, 0xC6, 0xD2, 0xAF, ++0xC2, 0xAF, 0x90, 0x80, 0x01, 0xE0, 0xFF, 0x22, 0x7D, 0x08, 0xE4, 0xFF, 0x02, 0x5E, 0x31, 0x90, ++0x81, 0x3D, 0xE0, 0xC3, 0x13, 0x22, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x7D, 0x01, 0x7F, ++0x02, 0x02, 0x51, 0xDB, 0x90, 0x81, 0xD3, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x01, 0x02, 0xE0, ++0x54, 0x03, 0xFF, 0x22, 0xE4, 0x90, 0x81, 0x49, 0xF0, 0xA3, 0xF0, 0x22, 0xE0, 0x7C, 0x00, 0x24, ++0x00, 0xFF, 0xEC, 0x3E, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0xF1, 0x8C, ++0xBF, 0x03, 0x02, 0xF1, 0xB6, 0x22, 0x90, 0x05, 0x21, 0xE0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x05, ++0x50, 0xE0, 0x44, 0x01, 0xF0, 0xF1, 0x8C, 0xBF, 0x03, 0x02, 0xF1, 0xB6, 0x22, 0x90, 0x81, 0x6B, ++0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, ++0x22, 0x90, 0x82, 0x92, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, ++0x00, 0xE4, 0x90, 0x82, 0xA0, 0xF0, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x90, 0x82, 0x98, ++0x12, 0x20, 0xCE, 0x90, 0x82, 0x92, 0xE0, 0xFB, 0x70, 0x04, 0x11, 0xC5, 0x80, 0x06, 0xEB, 0x11, ++0xD4, 0x12, 0x2D, 0x5C, 0x90, 0x82, 0x9C, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x93, 0xE0, 0xFF, 0xE4, ++0xFC, 0xFD, 0xFE, 0x78, 0x17, 0x31, 0x48, 0x90, 0x82, 0x9C, 0x12, 0x46, 0xC2, 0xED, 0x54, 0x7F, ++0xFD, 0xEC, 0x54, 0x80, 0xFC, 0x12, 0x46, 0xB5, 0xEC, 0x44, 0x80, 0xFC, 0x90, 0x82, 0x9C, 0x12, ++0x20, 0xCE, 0x11, 0xC5, 0xEC, 0x54, 0x7F, 0xFC, 0x11, 0xCE, 0x11, 0xE7, 0x11, 0xD4, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x82, 0x9C, 0x11, 0xCB, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x2E, 0xA2, 0x11, 0xC5, ++0xEC, 0x44, 0x80, 0xFC, 0x11, 0xCE, 0x11, 0xE7, 0x70, 0x04, 0x7F, 0x20, 0x80, 0x09, 0x90, 0x82, ++0x92, 0xE0, 0xB4, 0x01, 0x16, 0x7F, 0x28, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x78, 0x08, 0x12, 0x20, ++0xA8, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0x90, 0x82, 0xA0, 0xEF, 0xF0, 0x90, 0x82, 0xA0, 0xE0, 0x90, ++0x82, 0x92, 0x60, 0x0E, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x87, ++0x80, 0x0C, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x11, 0xDF, ++0x12, 0x2D, 0x5C, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x90, 0x82, 0x94, 0x12, 0x20, 0xCE, 0x90, ++0x82, 0x94, 0x02, 0x46, 0xC2, 0x90, 0x82, 0x98, 0x02, 0x46, 0xC2, 0x12, 0x46, 0xC2, 0x90, 0x85, ++0xBB, 0x02, 0x20, 0xCE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xF5, ++0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x82, ++0x92, 0xE0, 0x22, 0x90, 0x82, 0xA1, 0xEF, 0xF0, 0xAB, 0x05, 0x90, 0x82, 0xA7, 0x12, 0x20, 0xDA, ++0x00, 0x00, 0x00, 0x00, 0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x14, 0x31, 0x48, 0x90, 0x82, ++0xA3, 0x12, 0x46, 0xC2, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x12, 0x46, 0xB5, 0xEC, 0x54, 0x0F, ++0xFC, 0x90, 0x82, 0xA7, 0x12, 0x20, 0xCE, 0x90, 0x82, 0xA1, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, ++0x60, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x11, 0xDF, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0xA7, 0x11, ++0xCB, 0xD0, 0x07, 0xD0, 0x06, 0x02, 0x2E, 0xA2, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, ++0x06, 0xAB, 0x07, 0x22, 0x7F, 0xFF, 0x12, 0x5D, 0xC0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x12, 0x5D, 0xCF, 0x90, 0x85, 0xBB, 0x12, 0x20, 0xDA, 0xCC, 0xF0, 0x00, 0xC0, 0x31, 0xB2, 0x12, ++0x20, 0xDA, 0x00, 0x00, 0x00, 0x14, 0x31, 0xE8, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, 0xE4, ++0xFD, 0xFF, 0x31, 0xBD, 0x31, 0xDF, 0x44, 0x80, 0xFC, 0x90, 0x82, 0xD0, 0x12, 0x20, 0xCE, 0x90, ++0x82, 0xD0, 0x11, 0xCB, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x01, 0x00, 0x74, 0x3F, ++0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x7F, 0x8C, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x85, 0xBB, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xC0, 0x07, 0xC0, 0x05, 0x90, 0x82, 0xB5, 0x12, 0x46, 0xC2, 0x90, 0x82, ++0xA3, 0x12, 0x20, 0xCE, 0xD0, 0x05, 0xD0, 0x07, 0x11, 0xF3, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, ++0x7C, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0xEC, 0x22, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2E, 0xA2, 0x90, ++0x82, 0xB5, 0x22, 0x7D, 0x2F, 0x31, 0x54, 0x7D, 0x08, 0x7F, 0x01, 0x02, 0x4F, 0x2A, 0x7D, 0x2D, ++0x12, 0x5D, 0xCB, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, 0x50, 0xAE, 0x31, ++0x59, 0xE4, 0xFD, 0x7F, 0x01, 0x02, 0x4F, 0x2A, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, ++0x67, 0xE1, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0xE3, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x45, ++0x27, 0x90, 0x80, 0x01, 0xE0, 0xFF, 0x90, 0x82, 0xE3, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x80, 0x01, ++0xF0, 0x22, 0xE4, 0x90, 0x81, 0xF0, 0xF0, 0x90, 0x81, 0xEE, 0x74, 0x14, 0xF0, 0x90, 0x81, 0xFC, ++0x74, 0x01, 0xF0, 0xFB, 0x7A, 0x81, 0x79, 0xEE, 0x71, 0x15, 0x7F, 0x04, 0x80, 0xC9, 0x90, 0x82, ++0x13, 0x74, 0x12, 0xF0, 0x90, 0x82, 0x21, 0x74, 0x05, 0xF0, 0x90, 0x82, 0x15, 0xEF, 0xF0, 0xA3, ++0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x82, 0x11, 0xE0, 0x90, 0x82, 0x18, 0xF0, 0x90, 0x82, 0x12, ++0xE0, 0x90, 0x82, 0x19, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x13, 0x71, 0x15, 0x7F, 0x04, 0x80, ++0x96, 0x71, 0x0E, 0x7F, 0xF5, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x06, 0x90, 0x82, 0x08, ++0xE0, 0xA3, 0xF0, 0x71, 0x0E, 0x7F, 0xF6, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, ++0x82, 0x08, 0xE0, 0x90, 0x82, 0x0A, 0xF0, 0x71, 0x0E, 0x7F, 0xF4, 0x7E, 0x00, 0x12, 0x2B, 0x27, ++0xBF, 0x01, 0x08, 0x90, 0x82, 0x08, 0xE0, 0x90, 0x82, 0x0B, 0xF0, 0x71, 0x0E, 0x7F, 0xF3, 0x7E, ++0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x08, 0xE0, 0x90, 0x82, 0x0C, 0xF0, 0x71, ++0x0E, 0x7F, 0xF2, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x08, 0xE0, 0x90, ++0x82, 0x0D, 0xF0, 0x90, 0x82, 0x09, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, ++0x90, 0x82, 0x11, 0xF0, 0x90, 0x82, 0x0D, 0xE0, 0x90, 0x82, 0x12, 0xF0, 0x41, 0x5E, 0x7B, 0x01, ++0x7A, 0x82, 0x79, 0x08, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x39, 0xE0, ++0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x81, 0x3A, 0xE0, ++0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, ++0x44, 0x02, 0xF0, 0x80, 0x29, 0xC0, 0x01, 0x90, 0x81, 0x3A, 0xE0, 0x71, 0x73, 0xA8, 0x01, 0xFC, ++0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x46, 0x79, 0x90, 0x81, 0x3A, 0x12, 0x4F, ++0xF2, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x81, 0x3A, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xA3, 0xF9, 0x74, 0x80, 0x35, 0xF0, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0x81, 0x3A, 0xE0, 0xFE, 0x90, 0x81, 0x39, ++0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x42, ++0x90, 0x01, 0xAF, 0xE0, 0x70, 0x0A, 0xED, 0x71, 0x73, 0xFA, 0x7B, 0x01, 0x71, 0xFA, 0x7F, 0x01, ++0xEF, 0x60, 0x2F, 0x90, 0x81, 0x39, 0x12, 0x4F, 0xF2, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, ++0x05, 0xE4, 0x90, 0x81, 0x39, 0xF0, 0x90, 0x81, 0x3A, 0xE0, 0xFF, 0x90, 0x81, 0x39, 0xE0, 0xB5, ++0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, 0x80, 0x01, 0xE0, 0x44, ++0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x5F, 0xF0, 0xBF, ++0x01, 0x07, 0x51, 0x91, 0xE4, 0x90, 0x81, 0x5F, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x82, 0x04, 0x12, 0x46, 0xE3, 0x90, 0x82, 0xDC, 0xE0, 0xFF, 0x04, 0xF0, 0x90, 0x00, ++0x01, 0xEF, 0x12, 0x1F, 0xFC, 0x7F, 0xAF, 0x7E, 0x01, 0x12, 0x5B, 0xB1, 0xEF, 0x60, 0x3A, 0x90, ++0x82, 0x04, 0x12, 0x46, 0xDA, 0x8B, 0x13, 0x8A, 0x14, 0x89, 0x15, 0x90, 0x00, 0x0E, 0x12, 0x1F, ++0xBD, 0x24, 0x02, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, 0x2B, 0xED, 0x90, 0x82, ++0x04, 0x12, 0x46, 0xDA, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x90, 0x01, 0xAE, 0xF0, 0xA3, 0x74, ++0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x02, ++0x09, 0xE0, 0xF5, 0x50, 0x12, 0x1F, 0xA4, 0x25, 0x50, 0x90, 0x80, 0x4A, 0x12, 0x56, 0x87, 0x25, ++0x50, 0x90, 0x80, 0x4B, 0x12, 0x57, 0x26, 0x25, 0x50, 0x90, 0x80, 0x4C, 0x12, 0x57, 0x95, 0x25, ++0x50, 0x90, 0x80, 0x4D, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0x25, 0x50, 0x90, 0x80, 0x4E, ++0xF0, 0x90, 0x00, 0x05, 0x12, 0x1F, 0xBD, 0x25, 0x50, 0x90, 0x80, 0x4F, 0x91, 0xA5, 0x25, 0x50, ++0x90, 0x80, 0x50, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x06, 0x02, 0x1F, 0xBD, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x69, ++0xF0, 0xBF, 0x01, 0x0D, 0x12, 0x56, 0x88, 0x64, 0x01, 0x60, 0x19, 0x7D, 0x13, 0x7F, 0x6F, 0x80, ++0x10, 0xAB, 0x50, 0xAA, 0x51, 0xA9, 0x52, 0x12, 0x56, 0x88, 0x64, 0x01, 0x60, 0x06, 0xE4, 0xFD, ++0xFF, 0x12, 0x5D, 0xC0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x80, 0xFE, ++0x90, 0x81, 0xE4, 0xE0, 0x54, 0x7F, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x40, 0xFF, 0xEE, 0x54, 0xBF, ++0xB1, 0x5D, 0x54, 0x20, 0xFD, 0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x90, 0x81, 0xE4, 0xF0, 0xEE, 0x54, ++0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x1F, 0xA4, 0x54, 0x0F, 0xFE, 0xEF, 0x54, ++0xF0, 0x4E, 0x90, 0x81, 0xE4, 0x12, 0x56, 0x87, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0xE6, 0xF0, 0xEF, ++0x54, 0x80, 0x12, 0x4F, 0xEB, 0xFF, 0x90, 0x81, 0xE5, 0xE0, 0x54, 0xFE, 0x12, 0x57, 0x25, 0x90, ++0x81, 0xE7, 0x12, 0x57, 0x95, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x81, 0xE5, 0xE0, 0x54, 0xFD, ++0x4F, 0xF0, 0x12, 0x4B, 0xF7, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x02, 0x4A, 0x5F, 0x4F, 0xFF, 0xF0, ++0x12, 0x1F, 0xA4, 0xFE, 0x22, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFF, 0x90, 0x81, 0xE9, 0xE0, 0x54, ++0xFE, 0x4F, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0x7A, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, ++0x81, 0xD2, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x80, 0xA2, 0xE0, 0xFF, ++0x90, 0x80, 0xA1, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x41, ++0x90, 0x80, 0xA1, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x51, 0x12, 0x46, 0xCE, 0xE0, 0xFD, ++0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x52, 0xF9, 0x74, 0x80, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, ++0x05, 0x12, 0x53, 0xC8, 0x90, 0x80, 0xA1, 0x12, 0x4F, 0xF2, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, ++0x60, 0x05, 0xE4, 0x90, 0x80, 0xA1, 0xF0, 0x12, 0x49, 0x57, 0x90, 0x80, 0x01, 0xE0, 0x44, 0x02, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, 0x81, 0x39, 0xF0, 0xA3, 0xF0, 0x90, 0x80, 0xA1, ++0xF0, 0xA3, 0xF0, 0x22, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7D, 0x08, 0xED, 0x14, ++0xF9, 0x24, 0x60, 0xD1, 0x49, 0x60, 0x39, 0x7C, 0x08, 0xEC, 0x14, 0x90, 0x82, 0xE4, 0xF0, 0x74, ++0x60, 0x29, 0xD1, 0x49, 0xFB, 0x7A, 0x00, 0x90, 0x82, 0xE4, 0x12, 0x67, 0xD7, 0x80, 0x05, 0xC3, ++0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x60, 0x0F, 0xE9, ++0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0x82, 0xE4, 0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, 0xDC, 0xC9, ++0xDD, 0xBC, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, ++0xE0, 0x22, 0x75, 0x3D, 0x10, 0xE4, 0xF5, 0x3E, 0x75, 0x3F, 0x87, 0x75, 0x40, 0x03, 0x90, 0x01, ++0x30, 0xE5, 0x3D, 0xF0, 0xA3, 0xE5, 0x3E, 0xF0, 0xA3, 0xE5, 0x3F, 0xF0, 0xA3, 0xE5, 0x40, 0xF0, ++0x22, 0x75, 0x45, 0x0E, 0x75, 0x46, 0x01, 0x75, 0x47, 0x23, 0x75, 0x48, 0x62, 0x90, 0x01, 0x38, ++0xE5, 0x45, 0xF0, 0xA3, 0xE5, 0x46, 0xF0, 0xA3, 0xE5, 0x47, 0xF0, 0xA3, 0xE5, 0x48, 0xF0, 0x22, ++0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0x90, 0xF0, 0x74, 0x6E, 0xA3, 0xF0, 0x90, 0x81, 0xD7, 0xE0, ++0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x0B, ++0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE, 0x74, 0x90, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x6E, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x01, 0x34, 0xE0, ++0x55, 0x3D, 0xF5, 0x41, 0xA3, 0xE0, 0x55, 0x3E, 0xF5, 0x42, 0xA3, 0xE0, 0x55, 0x3F, 0xF5, 0x43, ++0xA3, 0xE0, 0x55, 0x40, 0xF5, 0x44, 0x90, 0x01, 0x34, 0xE5, 0x41, 0xF0, 0xA3, 0xE5, 0x42, 0xF0, ++0xA3, 0xE5, 0x43, 0xF0, 0xA3, 0xE5, 0x44, 0xF0, 0x22, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x45, 0xF5, ++0x49, 0xA3, 0xE0, 0x55, 0x46, 0xF5, 0x4A, 0xA3, 0xE0, 0x55, 0x47, 0xF5, 0x4B, 0xA3, 0xE0, 0x55, ++0x48, 0xF5, 0x4C, 0x90, 0x01, 0x3C, 0xE5, 0x49, 0xF0, 0xA3, 0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, ++0xF0, 0xA3, 0xE5, 0x4C, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, 0x81, 0x3D, 0xE0, 0x30, 0xE0, 0x05, ++0x7F, 0x20, 0x12, 0x49, 0x48, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x82, 0xE6, 0xF0, 0xE0, 0xFF, ++0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, ++0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, ++0x12, 0x58, 0x90, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x32, 0x1E, 0x80, ++0xFE, 0x22, 0x90, 0x81, 0xE2, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x02, 0x60, 0x09, ++0x12, 0x50, 0xF0, 0x90, 0x01, 0xE6, 0xE0, 0x04, 0xF0, 0x22, 0x12, 0x52, 0xED, 0x70, 0x0B, 0x90, ++0x81, 0x6F, 0xE0, 0x60, 0x05, 0xF1, 0x9B, 0x12, 0x4C, 0x3D, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, ++0x90, 0x01, 0x3C, 0x74, 0x02, 0x22, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x02, 0xF1, 0xAF, 0x22, 0x90, ++0x81, 0x6F, 0xE0, 0x64, 0x01, 0x70, 0x14, 0x12, 0x57, 0x1E, 0x60, 0x06, 0x12, 0x5D, 0xB6, 0x02, ++0x62, 0xE4, 0x90, 0x81, 0x72, 0xE0, 0x70, 0x03, 0x12, 0x4D, 0x2A, 0x22, 0x12, 0x71, 0x1B, 0x90, ++0x81, 0xEE, 0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, ++0x4F, 0x2A, 0x90, 0x81, 0xEE, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, ++0xE4, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0x90, 0x04, ++0xEC, 0x30, 0xE0, 0x06, 0xE0, 0x54, 0xDD, 0xF0, 0x80, 0x04, 0xE0, 0x44, 0x22, 0xF0, 0x11, 0xF4, ++0x74, 0x02, 0xF0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0x90, 0x81, 0x6B, 0xE0, ++0x12, 0x4F, 0xEB, 0x30, 0xE0, 0x02, 0x01, 0xD2, 0x90, 0x81, 0x6A, 0xE0, 0x30, 0xE0, 0x16, 0x90, ++0x81, 0x8C, 0xE0, 0x24, 0x04, 0x90, 0x81, 0x84, 0xF0, 0x90, 0x81, 0x8C, 0xE0, 0x24, 0x03, 0x90, ++0x81, 0x83, 0xF0, 0x80, 0x0D, 0x90, 0x81, 0x84, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x83, 0x14, 0xF0, ++0x0B, 0x0B, 0x90, 0x81, 0x83, 0xE0, 0xFA, 0x90, 0x81, 0x82, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, ++0x81, 0x77, 0xEB, 0xF0, 0x90, 0x81, 0x84, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, ++0x2B, 0x90, 0x81, 0x77, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x81, ++0x87, 0xF0, 0x90, 0x81, 0x84, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0x87, ++0x11, 0xDE, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, 0x81, 0x87, 0xE0, 0xFF, 0x24, 0x23, 0xFD, ++0xE4, 0x33, 0xFC, 0x90, 0x81, 0x77, 0x11, 0xDE, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x81, ++0x87, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x81, 0x7B, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, ++0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0x11, 0xEA, 0x90, 0x81, 0x6C, 0xE0, 0x54, 0xFE, 0xF0, ++0x80, 0x07, 0x90, 0x81, 0x6C, 0xE0, 0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xD3, ++0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0xF0, 0x90, 0x81, 0x7B, 0xA3, 0xE0, 0x90, ++0x05, 0x58, 0xF0, 0x22, 0x90, 0x81, 0x81, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x81, 0x88, 0xE0, ++0xFB, 0x90, 0x82, 0xD7, 0x22, 0xEF, 0x90, 0x02, 0x86, 0x60, 0x06, 0xE0, 0x44, 0x04, 0xF0, 0x80, ++0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x80, 0x06, 0xED, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0xEF, 0xF0, ++0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x00, 0x83, 0xE0, 0x90, 0x81, 0xEF, 0xF0, 0x90, 0x00, 0x83, 0xE0, ++0xFE, 0x90, 0x81, 0xEF, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x81, 0xF1, 0xE0, 0x94, ++0x64, 0x90, 0x81, 0xF0, 0xE0, 0x94, 0x00, 0x40, 0x08, 0x31, 0x59, 0x90, 0x81, 0xEF, 0xE0, 0xFF, ++0x22, 0x90, 0x81, 0xF0, 0x12, 0x5B, 0xFD, 0x80, 0xCB, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, ++0x22, 0x90, 0x01, 0xC4, 0x74, 0x61, 0xF0, 0x74, 0x71, 0xA3, 0xF0, 0x90, 0x00, 0x90, 0xE0, 0x20, ++0xE0, 0xF9, 0x74, 0x61, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x71, 0xA3, 0xF0, 0x22, 0x90, 0x81, ++0x6B, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x81, 0x7A, 0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x32, 0x1E, 0x90, ++0x81, 0x70, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, ++0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, 0x00, 0x08, 0xE0, 0x44, 0x10, 0xFD, 0x7F, 0x08, ++0x12, 0x32, 0x1E, 0x7F, 0x01, 0x12, 0x5C, 0x04, 0x90, 0x00, 0x90, 0xE0, 0x44, 0x01, 0xFD, 0x7F, ++0x90, 0x12, 0x32, 0x1E, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x74, 0x45, 0x2F, 0xF8, 0xE6, ++0x4D, 0x02, 0x50, 0xE1, 0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0x6A, ++0x12, 0x47, 0x12, 0x90, 0x81, 0x6E, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x75, 0x14, 0xF0, 0xA3, 0xF0, ++0xA3, 0x74, 0x0A, 0xF0, 0x90, 0x81, 0x7B, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x51, 0x6D, 0xE4, ++0xFD, 0xFF, 0x12, 0x4F, 0x2A, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x4F, 0x2A, 0x7D, 0x0C, 0x7F, 0x01, ++0x12, 0x4F, 0x2A, 0x90, 0x80, 0x07, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x81, 0x7A, 0x74, 0x99, ++0xF0, 0x80, 0x29, 0xEF, 0xB4, 0x03, 0x08, 0x90, 0x81, 0x7A, 0x74, 0x90, 0xF0, 0x80, 0x1D, 0x90, ++0x81, 0x7A, 0x74, 0x40, 0xF0, 0x90, 0x00, 0x2C, 0xE0, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, 0x90, ++0x81, 0x8C, 0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x81, 0x8C, 0xF0, 0x12, 0x57, 0xDF, 0x51, ++0x6D, 0x7E, 0x00, 0x7F, 0x02, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xD0, 0x12, 0x47, 0x12, ++0x51, 0x7C, 0x51, 0xE6, 0x12, 0x54, 0xD3, 0xE4, 0x90, 0x81, 0xD2, 0xF0, 0x22, 0x90, 0x81, 0x8C, ++0xE0, 0x24, 0x04, 0x90, 0x81, 0x87, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0x7F, 0xF0, 0x22, 0x90, 0x82, 0xBF, 0xE0, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x82, 0xEA, 0xEF, 0xF0, 0x90, 0x80, 0x4C, 0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, ++0x40, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x0E, 0x70, 0x18, 0x90, 0x82, 0xEA, 0xE0, 0x70, 0x32, 0x90, ++0x81, 0x6A, 0xE0, 0x54, 0x7F, 0xF0, 0x51, 0x7C, 0x7D, 0x0C, 0x7F, 0x01, 0x12, 0x4F, 0x2A, 0x80, ++0x1D, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x06, 0x70, 0x18, 0x90, 0x82, 0xEA, 0xE0, 0x60, 0x12, 0x90, ++0x81, 0x6A, 0xE0, 0x54, 0xBF, 0xF0, 0x51, 0xEE, 0x90, 0x81, 0x72, 0x74, 0x04, 0xF0, 0x12, 0x54, ++0xD3, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0x06, ++0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, ++0x03, 0x7F, 0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, ++0x7F, 0x00, 0x22, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x24, 0x90, 0x81, 0x75, 0x74, 0x02, ++0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, 0x90, 0x81, 0xCF, 0xE0, 0x80, 0x02, 0xED, 0x14, 0x90, 0x81, ++0x75, 0xF0, 0x90, 0x81, 0x75, 0xE0, 0xA3, 0xF0, 0x90, 0x81, 0x6B, 0xE0, 0x44, 0x08, 0xF0, 0x22, ++0xEF, 0x60, 0x34, 0x12, 0x52, 0xED, 0x70, 0x2F, 0x90, 0x81, 0x6B, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, ++0x2B, 0x7F, 0x0F, 0x12, 0x5D, 0xC0, 0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x5E, 0x2D, ++0xBF, 0x01, 0x0E, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x02, 0x4F, ++0x2A, 0x12, 0x64, 0xF8, 0x74, 0x08, 0xF0, 0x22, 0x7D, 0x2E, 0x7F, 0x6F, 0x12, 0x5D, 0xC0, 0x7D, ++0x02, 0x7F, 0x01, 0x02, 0x4F, 0x2A, 0x12, 0x54, 0xD1, 0x7D, 0x0C, 0x7F, 0x01, 0x02, 0x4F, 0x2A, ++0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x34, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x2D, 0x90, 0x82, ++0xE9, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0xC8, 0x40, 0x21, 0x90, 0x81, 0xD3, 0xE0, 0x44, 0x20, ++0xF0, 0xE4, 0x90, 0x82, 0xE9, 0xF0, 0x90, 0x81, 0xD3, 0xE0, 0x13, 0x30, 0xE0, 0x0D, 0x90, 0x81, ++0x6A, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x81, 0x7A, 0x74, 0xD0, 0xF0, 0x22, 0x74, 0x67, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFF, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, ++0xE0, 0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x91, 0x0B, 0x90, 0x81, ++0xD8, 0x91, 0x13, 0x54, 0x04, 0xFF, 0xEE, 0x54, 0xFB, 0x4F, 0xF0, 0x12, 0x1F, 0xA4, 0xC3, 0x13, ++0x30, 0xE0, 0x07, 0x12, 0x56, 0x88, 0x90, 0x81, 0xD9, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x54, ++0x01, 0xFE, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x22, 0x90, 0x82, 0x04, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x90, 0x02, 0x84, 0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0xA3, 0xE0, 0x44, 0x01, 0xF0, ++0x22, 0x7D, 0x7F, 0xEF, 0x5D, 0xC3, 0x60, 0x0A, 0x91, 0x46, 0x24, 0x80, 0xFF, 0xE4, 0x3E, 0xFE, ++0x80, 0x03, 0x91, 0x46, 0xFF, 0x22, 0x74, 0xFF, 0x9D, 0xFD, 0x74, 0xFF, 0x94, 0x00, 0x5E, 0xFE, ++0xED, 0x5F, 0x22, 0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xDC, 0x12, ++0x47, 0x12, 0x90, 0x81, 0xDD, 0x74, 0x08, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0x90, 0x82, 0x87, ++0x12, 0x46, 0xE3, 0xE4, 0xFF, 0x90, 0x82, 0x8D, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x1E, 0x90, ++0x82, 0x8A, 0x12, 0x46, 0xDA, 0x8F, 0x82, 0x91, 0xB6, 0xFE, 0x90, 0x82, 0x87, 0x12, 0x46, 0xDA, ++0x8F, 0x82, 0x91, 0xB6, 0x6E, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xD8, 0x7F, 0x01, 0x22, ++0x75, 0xF0, 0x03, 0xA4, 0x24, 0x58, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x12, 0x46, 0xDA, ++0x90, 0x82, 0x0E, 0xE0, 0xF5, 0x82, 0x75, 0x83, 0x00, 0x02, 0x1F, 0xBD, 0x74, 0x03, 0xF0, 0x7A, ++0x82, 0x79, 0xAF, 0x91, 0x6D, 0xEF, 0x22, 0x74, 0x03, 0xF0, 0x7A, 0x82, 0x79, 0xAB, 0x91, 0x6D, ++0xEF, 0x22, 0x12, 0x65, 0xFA, 0x30, 0xE0, 0x0A, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x02, ++0x7B, 0x28, 0x90, 0x81, 0x5A, 0xE0, 0x90, 0x82, 0x67, 0xF0, 0x90, 0x81, 0x5B, 0xE0, 0x90, 0x82, ++0x68, 0xF0, 0x90, 0x81, 0x5C, 0xE0, 0x90, 0x82, 0x69, 0xF0, 0x90, 0x81, 0x5D, 0xE0, 0x90, 0x82, ++0x6A, 0xF0, 0x90, 0x81, 0x5E, 0xE0, 0x90, 0x82, 0x6B, 0xF0, 0x90, 0x81, 0x4B, 0xE0, 0x90, 0x82, ++0x6C, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x90, 0x82, 0x6D, 0xF0, 0x90, 0x81, 0x4D, 0xE0, 0x90, 0x82, ++0x6E, 0xF0, 0x90, 0x81, 0x4E, 0xE0, 0x90, 0x82, 0x6F, 0xF0, 0x90, 0x81, 0x4F, 0xE0, 0x90, 0x82, ++0x70, 0xF0, 0x90, 0x81, 0x50, 0xE0, 0x90, 0x82, 0x71, 0xF0, 0x90, 0x81, 0x51, 0xE0, 0x90, 0x82, ++0x72, 0xF0, 0x90, 0x81, 0x52, 0xE0, 0x90, 0x82, 0x73, 0xF0, 0x90, 0x81, 0x53, 0xE0, 0x90, 0x82, ++0x74, 0xF0, 0x90, 0x81, 0x54, 0xE0, 0x90, 0x82, 0x75, 0xF0, 0x12, 0x7B, 0xD7, 0x12, 0x58, 0xB6, ++0x90, 0x82, 0x0F, 0xF0, 0x12, 0x7B, 0x58, 0x50, 0x05, 0x12, 0x7B, 0x44, 0x80, 0xF6, 0x90, 0x01, ++0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, 0x12, 0x67, 0x9C, 0x90, 0x82, 0x04, 0xF0, 0xA3, 0x12, 0x7B, ++0xCF, 0x12, 0x7B, 0x58, 0x50, 0x4D, 0x71, 0xCC, 0x90, 0x82, 0x0F, 0xE0, 0xFE, 0x24, 0x76, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0x12, 0x7C, 0x4D, 0x24, 0x45, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0xFF, 0x74, 0x11, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x12, 0x7C, 0x4D, 0x24, 0x46, 0xF9, ++0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xEE, 0x12, 0x7B, 0xEF, 0x12, 0x46, 0xE3, 0x12, 0x7C, 0x51, ++0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0xEE, 0x12, 0x7B, 0xE0, 0x12, 0x46, 0xE3, 0x12, 0x7B, ++0x51, 0x80, 0xAE, 0x90, 0x02, 0x87, 0xE0, 0x70, 0x03, 0x02, 0x7B, 0x28, 0x90, 0x81, 0x3D, 0xE0, ++0x20, 0xE0, 0x03, 0x02, 0x7B, 0x28, 0xC3, 0x13, 0x30, 0xE0, 0x0A, 0xE0, 0xC4, 0x54, 0x0F, 0x30, ++0xE0, 0x03, 0x02, 0x7B, 0x28, 0xE4, 0x90, 0x82, 0x80, 0x12, 0x58, 0xB6, 0x90, 0x82, 0x04, 0xE0, ++0xFF, 0xA3, 0xE0, 0xA3, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x82, 0x06, 0xE0, 0xFC, 0xA3, 0xE0, ++0xFD, 0xEC, 0x90, 0xFD, 0x11, 0xF0, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, ++0xE0, 0xFE, 0x74, 0x00, 0x2D, 0x12, 0x7C, 0xDF, 0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x54, ++0x3F, 0x90, 0x82, 0x08, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, ++0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90, 0x82, 0x0B, 0xF0, 0xFC, 0x74, ++0x07, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x90, 0x82, 0x0D, 0xF0, ++0xEC, 0x24, 0x18, 0x90, 0x82, 0x0A, 0xF0, 0xFD, 0x90, 0x82, 0x06, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x12, 0x59, 0xB4, 0xEF, 0x54, 0xFC, 0x90, 0x82, 0x0C, 0xF0, 0x90, 0x82, 0x0B, 0xE0, 0x24, 0x18, ++0xFF, 0xE4, 0x33, 0x90, 0x82, 0x08, 0x8F, 0xF0, 0x12, 0x46, 0x9F, 0x90, 0x82, 0x08, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x91, 0x31, 0x90, 0x82, 0x04, 0xEE, 0x8F, 0xF0, 0x12, 0x46, 0x9F, 0x90, 0x81, ++0x3B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x82, 0x04, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xD3, 0x9F, ++0xEC, 0x9E, 0x40, 0x12, 0x90, 0x81, 0x3C, 0x12, 0x7C, 0x9C, 0xED, 0x9F, 0xFF, 0xEC, 0x9E, 0x90, ++0x82, 0x04, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x0A, 0x13, 0x13, 0x54, ++0x3F, 0x20, 0xE0, 0x03, 0x02, 0x7B, 0x22, 0x12, 0x67, 0x6F, 0x20, 0xE0, 0x03, 0x02, 0x79, 0x03, ++0xE4, 0x90, 0x82, 0x10, 0xF0, 0x90, 0x82, 0x0F, 0xF0, 0x12, 0x7B, 0x58, 0x50, 0x38, 0x71, 0xCC, ++0xE4, 0x90, 0x82, 0x0E, 0xF0, 0x12, 0x7B, 0x7A, 0x94, 0x06, 0x50, 0x16, 0x12, 0x7B, 0x29, 0x24, ++0x04, 0x12, 0x5B, 0xA2, 0x90, 0x82, 0x0F, 0xE0, 0x91, 0xA0, 0xB5, 0x07, 0x05, 0x12, 0x5A, 0x88, ++0x80, 0xE3, 0x90, 0x82, 0x0E, 0xE0, 0xB4, 0x06, 0x08, 0x90, 0x82, 0x10, 0x74, 0x01, 0xF0, 0x80, ++0x05, 0x12, 0x7B, 0x51, 0x80, 0xC3, 0x90, 0x82, 0x0C, 0xE0, 0x24, 0x60, 0x70, 0x03, 0x02, 0x78, ++0xAE, 0x24, 0xFC, 0x70, 0x03, 0x02, 0x78, 0xAE, 0x24, 0xF4, 0x70, 0x03, 0x02, 0x78, 0xA3, 0x24, ++0xF0, 0x70, 0x03, 0x02, 0x78, 0xAE, 0x24, 0x80, 0x60, 0x03, 0x02, 0x78, 0xC2, 0x12, 0x7B, 0x29, ++0x24, 0x18, 0xFD, 0x12, 0x59, 0xB4, 0xEF, 0x60, 0x03, 0x02, 0x7A, 0x48, 0x12, 0x7B, 0x29, 0x12, ++0x5A, 0x98, 0x12, 0x7B, 0x9B, 0x12, 0x7B, 0x75, 0x9F, 0x50, 0x0B, 0x12, 0x7B, 0x29, 0x12, 0x5A, ++0xAC, 0x12, 0x5A, 0x84, 0x80, 0xEF, 0x90, 0x82, 0x25, 0xE0, 0x70, 0x03, 0x02, 0x78, 0x08, 0xE4, ++0x90, 0x82, 0x0F, 0xF0, 0x12, 0x7B, 0x58, 0x50, 0x67, 0x71, 0xCC, 0x12, 0x7C, 0x0D, 0x70, 0x1E, ++0x12, 0x7B, 0xEE, 0x12, 0x46, 0xDA, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x12, 0x7B, 0x65, 0xED, ++0xF0, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x91, 0x6D, 0xEF, 0x60, 0x02, 0x80, 0x28, 0x90, 0x82, ++0x25, 0xE0, 0x64, 0x03, 0x70, 0x2D, 0x12, 0x7B, 0x65, 0x91, 0xBC, 0x70, 0x07, 0x12, 0x7B, 0x65, ++0x91, 0xC7, 0x60, 0x1A, 0x12, 0x7B, 0xFD, 0x60, 0x02, 0x80, 0x06, 0x12, 0x7B, 0x81, 0xE0, 0x60, ++0x05, 0x74, 0x80, 0x2F, 0x80, 0x10, 0x12, 0x7B, 0x36, 0x74, 0x01, 0xF0, 0x80, 0x0D, 0x12, 0x7B, ++0xA3, 0x80, 0x03, 0x12, 0x7B, 0xA3, 0x12, 0x7B, 0x3C, 0xE4, 0xF0, 0x12, 0x7B, 0x51, 0x80, 0x94, ++0x90, 0x82, 0x80, 0xE0, 0x70, 0x50, 0xA3, 0xE0, 0x70, 0x4C, 0xA3, 0xE0, 0x70, 0x48, 0xA3, 0xE0, ++0x70, 0x44, 0xA3, 0xE0, 0x70, 0x40, 0x41, 0x48, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x71, 0x58, 0x50, ++0x1D, 0x74, 0x6C, 0x2E, 0x71, 0x88, 0xE0, 0x60, 0x09, 0x74, 0x80, 0x2E, 0x71, 0x3C, 0xE4, 0xF0, ++0x80, 0x08, 0x74, 0x80, 0x2E, 0x71, 0x3C, 0x74, 0x01, 0xF0, 0x71, 0x51, 0x80, 0xDF, 0x90, 0x82, ++0x80, 0xE0, 0x70, 0x12, 0xA3, 0xE0, 0x70, 0x0E, 0xA3, 0xE0, 0x70, 0x0A, 0xA3, 0xE0, 0x70, 0x06, ++0xA3, 0xE0, 0x70, 0x02, 0x41, 0x48, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x71, 0x58, 0x40, 0x02, 0x41, ++0x48, 0x12, 0x73, 0xCC, 0x71, 0x36, 0xE0, 0x60, 0x46, 0x71, 0xAA, 0x90, 0x04, 0x1D, 0xE0, 0x60, ++0x1B, 0xD3, 0x90, 0x82, 0x86, 0xE0, 0x94, 0x28, 0x90, 0x82, 0x85, 0xE0, 0x94, 0x00, 0x50, 0x0C, ++0x7F, 0xFA, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x12, 0x5B, 0xFA, 0x80, 0xDF, 0x90, 0x04, 0x1D, 0xE0, ++0x70, 0x1D, 0x71, 0xBC, 0x74, 0x0A, 0xF0, 0xE4, 0xFB, 0x71, 0x90, 0x71, 0x7A, 0x94, 0x06, 0x50, ++0x07, 0x71, 0x29, 0x12, 0x5A, 0x6A, 0x80, 0xF3, 0x12, 0x63, 0x4D, 0x90, 0x06, 0x35, 0xF0, 0x71, ++0x51, 0x80, 0xA8, 0x90, 0x82, 0x10, 0xE0, 0xB4, 0x01, 0x02, 0x80, 0x4F, 0x61, 0x22, 0x90, 0x82, ++0x10, 0xE0, 0xB4, 0x01, 0x0B, 0x90, 0x81, 0x3D, 0x12, 0x67, 0xD0, 0x30, 0xE0, 0x02, 0x80, 0x3B, ++0x61, 0x22, 0x90, 0x82, 0x0D, 0xE0, 0x70, 0x12, 0x90, 0x82, 0x10, 0xE0, 0xB4, 0x01, 0x0B, 0x90, ++0x81, 0x3D, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x02, 0x61, 0x22, 0x71, 0x29, 0xFD, 0x12, ++0x5B, 0x66, 0xEF, 0x60, 0x02, 0x80, 0x14, 0x71, 0x29, 0xFD, 0x12, 0x5A, 0x40, 0xEF, 0x60, 0x02, ++0x80, 0x09, 0x71, 0x29, 0xFD, 0x12, 0x59, 0xE4, 0xEF, 0x60, 0x06, 0x12, 0x65, 0x70, 0x02, 0x75, ++0xD3, 0x61, 0x22, 0x90, 0x82, 0x0C, 0xE0, 0x24, 0xC0, 0x60, 0x02, 0x41, 0x54, 0x71, 0x29, 0x24, ++0x18, 0xFD, 0x12, 0x59, 0xB4, 0xEF, 0x60, 0x02, 0x41, 0x48, 0x71, 0x29, 0x12, 0x5A, 0x98, 0x71, ++0x9B, 0x71, 0x75, 0x9F, 0x50, 0x0A, 0x71, 0x29, 0x12, 0x5A, 0xAC, 0x12, 0x5A, 0x84, 0x80, 0xF1, ++0x90, 0x82, 0x25, 0xE0, 0x70, 0x02, 0x21, 0xB8, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x71, 0x58, 0x50, ++0x5F, 0x12, 0x73, 0xCC, 0x91, 0x0D, 0x70, 0x1D, 0x71, 0xEE, 0x12, 0x46, 0xDA, 0xC0, 0x03, 0xC0, ++0x02, 0xC0, 0x01, 0x71, 0x65, 0xED, 0xF0, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x74, 0x6D, ++0xEF, 0x60, 0x02, 0x80, 0x26, 0x90, 0x82, 0x25, 0xE0, 0x64, 0x03, 0x70, 0x29, 0x71, 0x65, 0x12, ++0x74, 0xBC, 0x70, 0x07, 0x71, 0x65, 0x12, 0x74, 0xC7, 0x60, 0x17, 0x71, 0xFD, 0x60, 0x02, 0x80, ++0x05, 0x71, 0x81, 0xE0, 0x60, 0x05, 0x74, 0x80, 0x2F, 0x80, 0x0D, 0x71, 0x36, 0x74, 0x01, 0xF0, ++0x80, 0x0A, 0x71, 0xA3, 0x80, 0x02, 0x71, 0xA3, 0x71, 0x3C, 0xE4, 0xF0, 0x71, 0x51, 0x80, 0x9D, ++0x90, 0x82, 0x80, 0xE0, 0x70, 0x4E, 0xA3, 0xE0, 0x70, 0x4A, 0xA3, 0xE0, 0x70, 0x46, 0xA3, 0xE0, ++0x70, 0x42, 0xA3, 0xE0, 0x70, 0x3E, 0x41, 0x48, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x71, 0x58, 0x50, ++0x1D, 0x74, 0x6C, 0x2E, 0x71, 0x88, 0xE0, 0x60, 0x09, 0x74, 0x80, 0x2E, 0x71, 0x3C, 0xE4, 0xF0, ++0x80, 0x08, 0x74, 0x80, 0x2E, 0x71, 0x3C, 0x74, 0x01, 0xF0, 0x71, 0x51, 0x80, 0xDF, 0x90, 0x82, ++0x80, 0xE0, 0x70, 0x10, 0xA3, 0xE0, 0x70, 0x0C, 0xA3, 0xE0, 0x70, 0x08, 0xA3, 0xE0, 0x70, 0x04, ++0xA3, 0xE0, 0x60, 0x54, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x71, 0x58, 0x50, 0x4B, 0x12, 0x73, 0xCC, ++0x71, 0x36, 0xE0, 0x60, 0x3F, 0x71, 0xAA, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x14, 0xD3, 0x90, 0x82, ++0x86, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0x85, 0xE0, 0x94, 0x03, 0x50, 0x05, 0x12, 0x5B, 0xFA, 0x80, ++0xE6, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1D, 0x71, 0xBC, 0x74, 0x06, 0xF0, 0x7B, 0x08, 0x71, 0x90, ++0x71, 0x7A, 0x94, 0x06, 0x50, 0x07, 0x71, 0x29, 0x12, 0x5A, 0x6A, 0x80, 0xF3, 0x12, 0x63, 0x4D, ++0x90, 0x06, 0x35, 0xF0, 0x71, 0x51, 0x80, 0xB1, 0x12, 0x74, 0x1B, 0x90, 0x06, 0x36, 0x74, 0xDD, ++0xF0, 0x02, 0x75, 0xD3, 0x90, 0x82, 0x0D, 0xE0, 0x60, 0x02, 0x61, 0x22, 0x71, 0x29, 0x24, 0x16, ++0xFD, 0x12, 0x59, 0xB4, 0x90, 0x06, 0x34, 0xEF, 0xF0, 0x71, 0x29, 0x24, 0x17, 0xFD, 0x12, 0x59, ++0xB4, 0x90, 0x06, 0x37, 0x71, 0xCF, 0x71, 0x58, 0x50, 0x62, 0x12, 0x73, 0xCC, 0xE4, 0x90, 0x82, ++0x0E, 0xF0, 0x90, 0x82, 0x0E, 0xE0, 0xFF, 0xC3, 0x94, 0x06, 0x50, 0x4C, 0xEF, 0x60, 0x04, 0x64, ++0x01, 0x70, 0x22, 0x71, 0x29, 0x12, 0x5A, 0xA1, 0x90, 0x82, 0x0E, 0xE0, 0xFE, 0x24, 0x44, 0x71, ++0xB2, 0x90, 0x82, 0x0F, 0xE0, 0x71, 0xE0, 0x12, 0x46, 0xDA, 0x8E, 0x82, 0x12, 0x74, 0xB6, 0xFF, ++0x74, 0x46, 0x2E, 0x71, 0xB2, 0x71, 0x29, 0x12, 0x5A, 0xA1, 0x90, 0x82, 0x0F, 0xE0, 0xFE, 0x12, ++0x74, 0xA0, 0x6F, 0x60, 0x0E, 0x74, 0x7B, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE4, ++0xF0, 0x80, 0x05, 0x12, 0x5A, 0x88, 0x80, 0xAA, 0x71, 0x51, 0x80, 0x9A, 0x90, 0x82, 0x7B, 0xE0, ++0x64, 0x01, 0x60, 0x17, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x11, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x0B, ++0xA3, 0xE0, 0x64, 0x01, 0x60, 0x05, 0xA3, 0xE0, 0xB4, 0x01, 0x06, 0x90, 0x82, 0x10, 0x74, 0x01, ++0xF0, 0x90, 0x82, 0x10, 0xE0, 0xB4, 0x01, 0x09, 0x12, 0x65, 0x1E, 0x12, 0x64, 0xA7, 0x02, 0x75, ++0xD3, 0x71, 0xD7, 0x12, 0x58, 0xB6, 0x90, 0x82, 0x0F, 0xF0, 0x71, 0x58, 0x50, 0x04, 0x71, 0x44, ++0x80, 0xF8, 0x12, 0x74, 0x1B, 0x02, 0x75, 0xD3, 0x22, 0x90, 0x82, 0x06, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0x90, 0x82, 0x0A, 0xE0, 0x22, 0x90, 0x82, 0x0F, 0xE0, 0x24, 0x80, 0xF5, 0x82, 0xE4, 0x34, ++0x82, 0xF5, 0x83, 0x22, 0x74, 0x7B, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x74, 0x01, ++0xF0, 0x90, 0x82, 0x0F, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x48, 0xE0, 0xFF, 0x90, 0x82, 0x0F, ++0xE0, 0xFE, 0xC3, 0x9F, 0x22, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x26, 0x90, 0x82, 0x8A, 0x12, 0x46, ++0xE3, 0x90, 0x82, 0x8D, 0x22, 0x90, 0x82, 0x25, 0xE0, 0xFF, 0x90, 0x82, 0x0E, 0xE0, 0xFD, 0xC3, ++0x22, 0x90, 0x82, 0x0F, 0xE0, 0xFF, 0x24, 0x6C, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, ++0x7D, 0x01, 0x12, 0x5F, 0x4C, 0x90, 0x82, 0x08, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x82, ++0x0E, 0xF0, 0x22, 0x90, 0x82, 0x0F, 0xE0, 0x24, 0x80, 0x22, 0xE4, 0x90, 0x82, 0x85, 0xF0, 0xA3, ++0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x90, 0x82, 0x0F, 0xE0, ++0x24, 0x67, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x82, 0xCB, 0x22, 0xEF, ++0xF0, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x22, 0xE4, 0x90, 0x82, 0x10, 0xF0, 0x90, 0x82, 0x7B, 0x22, ++0x75, 0xF0, 0x03, 0xA4, 0x24, 0x58, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xEF, 0x75, ++0xF0, 0x03, 0xA4, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x90, 0x82, 0x0F, ++0xE0, 0xFF, 0x24, 0x71, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x82, 0x0F, ++0xE0, 0xFF, 0x24, 0x11, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFE, 0x90, 0x82, 0x25, ++0xE0, 0xFD, 0xEE, 0x6D, 0x22, 0xEF, 0x30, 0xE7, 0x04, 0x7E, 0x02, 0x80, 0x02, 0xE4, 0xFE, 0xED, ++0x30, 0xE6, 0x12, 0xEB, 0x20, 0xE0, 0x07, 0x90, 0x81, 0x42, 0xE0, 0xFC, 0x80, 0x09, 0x90, 0x81, ++0x43, 0xE0, 0xFC, 0x80, 0x02, 0xE4, 0xFC, 0xEE, 0x24, 0x18, 0x2C, 0xFF, 0x22, 0xF5, 0x83, 0xEF, ++0xF0, 0x74, 0x76, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x00, 0xB6, ++0x74, 0x10, 0xF0, 0x90, 0x00, 0xBE, 0x74, 0xE0, 0xF0, 0xA3, 0x74, 0x01, 0xF0, 0x22, 0x54, 0xFB, ++0xF0, 0x90, 0x81, 0x73, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x81, 0x71, 0xE0, 0x90, 0x01, 0xBB, ++0xF0, 0x22, 0x12, 0x54, 0x74, 0x90, 0x81, 0xD3, 0xE0, 0xC3, 0x13, 0x22, 0xE0, 0x24, 0x01, 0xFF, ++0x90, 0x81, 0x3B, 0xE0, 0x34, 0x00, 0xFE, 0xC3, 0x22, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x81, 0x6B, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xEF, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0xFE, 0xEF, 0x54, 0x07, 0xFF, 0x22, 0x90, 0x81, 0x6B, 0xE0, 0xFF, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0x22, 0x90, 0x81, 0x78, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0x22, 0xF5, ++0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0x54, 0xFB, 0xF0, 0x22, ++0x90, 0x81, 0x75, 0xE0, 0x90, 0x05, 0x73, 0x22, 0x90, 0x81, 0x73, 0xE0, 0x44, 0x10, 0xF0, 0x22, ++0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0xE1, 0xF6, ++}; ++u4Byte ArrayLength_MP_8188E_S_FW_AP = 15658; ++ ++ ++void ++ODM_ReadFirmware_MP_8188E_S_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188E_S_FW_AP; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188E_S_FW_AP, ArrayLength_MP_8188E_S_FW_AP); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188E_S_FW_AP; ++} ++ ++ ++#endif /* #if (defined(CONFIG_AP_WOWLAN)||(DM_ODM_SUPPORT_TYPE & (ODM_AP)) */ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++ ++u1Byte Array_MP_8188E_S_FW_NIC[] = { ++0xE3, 0x88, 0x10, 0x00, 0x16, 0x00, 0x00, 0x00, 0x03, 0x03, 0x11, 0x56, 0xA4, 0x4B, 0x02, 0x00, ++0x28, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x48, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x49, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x57, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x48, 0xEF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x50, 0x02, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x05, 0x04, 0x03, 0x02, 0x00, 0x03, 0x06, 0x05, 0x04, 0x03, 0x00, 0x04, 0x06, 0x05, 0x04, 0x02, ++0x00, 0x04, 0x08, 0x07, 0x06, 0x04, 0x00, 0x06, 0x0A, 0x09, 0x08, 0x06, 0x00, 0x08, 0x0A, 0x09, ++0x08, 0x04, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x02, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x00, 0x00, 0x08, ++0x12, 0x11, 0x10, 0x08, 0x00, 0x10, 0x1A, 0x19, 0x18, 0x10, 0x00, 0x18, 0x22, 0x21, 0x20, 0x18, ++0x00, 0x20, 0x22, 0x21, 0x20, 0x10, 0x00, 0x20, 0x22, 0x21, 0x20, 0x08, 0x00, 0x20, 0x22, 0x21, ++0x1C, 0x08, 0x00, 0x20, 0x22, 0x21, 0x14, 0x08, 0x00, 0x20, 0x22, 0x20, 0x18, 0x08, 0x00, 0x20, ++0x31, 0x30, 0x20, 0x10, 0x00, 0x30, 0x31, 0x30, 0x18, 0x00, 0x00, 0x30, 0x31, 0x2F, 0x10, 0x10, ++0x00, 0x30, 0x31, 0x2C, 0x10, 0x10, 0x00, 0x30, 0x31, 0x28, 0x10, 0x00, 0x00, 0x30, 0x31, 0x20, ++0x10, 0x00, 0x00, 0x30, 0x31, 0x10, 0x10, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04, ++0x05, 0x07, 0x07, 0x07, 0x08, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x06, 0x0A, 0x0B, 0x0D, 0x05, 0x05, ++0x07, 0x07, 0x08, 0x0B, 0x0D, 0x0F, 0x04, 0x04, 0x04, 0x05, 0x07, 0x07, 0x09, 0x09, 0x0C, 0x0E, ++0x10, 0x12, 0x07, 0x07, 0x08, 0x08, 0x0B, 0x0F, 0x10, 0x12, 0x09, 0x09, 0x09, 0x09, 0x0C, 0x0E, ++0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x18, 0x1A, ++0x1D, 0x1F, 0x21, 0x27, 0x29, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x23, 0x28, 0x2A, 0x2C, 0x00, 0x04, ++0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, ++0x00, 0x90, 0x00, 0xC0, 0x00, 0xD8, 0x00, 0x50, 0x00, 0x64, 0x00, 0xA0, 0x00, 0xDC, 0x01, 0x18, ++0x01, 0x90, 0x01, 0xE0, 0x02, 0x30, 0x01, 0x2C, 0x01, 0x40, 0x01, 0xE0, 0x02, 0xD0, 0x03, 0xE8, ++0x04, 0xB0, 0x06, 0x40, 0x07, 0xD0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x04, 0x00, 0x08, 0x00, 0x0C, ++0x00, 0x12, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, 0x00, 0x6C, 0x00, 0x28, ++0x00, 0x32, 0x00, 0x50, 0x00, 0x6E, 0x00, 0x8C, 0x00, 0xC8, 0x00, 0xF0, 0x01, 0x18, 0x00, 0x64, ++0x00, 0xA0, 0x00, 0xF0, 0x01, 0x68, 0x01, 0xF4, 0x02, 0x58, 0x03, 0x20, 0x03, 0xE8, 0x02, 0x02, ++0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x07, 0x04, 0x05, 0x08, 0x08, 0x0C, 0x0E, ++0x10, 0x12, 0x05, 0x07, 0x07, 0x08, 0x0B, 0x12, 0x24, 0x3C, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x05, 0x06, ++0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x20, 0x1E, 0x1C, 0x18, 0x10, 0x18, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x43, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x48, 0xE9, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x48, 0xE9, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x43, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x43, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x43, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xE7, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, ++0x46, 0xE7, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x3E, 0x88, 0x82, 0x8C, 0x83, 0xE7, 0x09, 0xF0, ++0xA3, 0xDF, 0xFA, 0x80, 0x32, 0xE3, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x78, 0xE3, 0x09, 0xF2, ++0x08, 0xDF, 0xFA, 0x80, 0x70, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, ++0x64, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x58, 0x89, 0x82, 0x8A, ++0x83, 0xE0, 0xA3, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x4C, 0x80, 0xD2, 0x80, 0xFA, 0x80, 0xC6, 0x80, ++0xD4, 0x80, 0x69, 0x80, 0xF2, 0x80, 0x33, 0x80, 0x10, 0x80, 0xA6, 0x80, 0xEA, 0x80, 0x9A, 0x80, ++0xA8, 0x80, 0xDA, 0x80, 0xE2, 0x80, 0xCA, 0x80, 0x33, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, ++0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, ++0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0x0D, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, ++0xA3, 0xF6, 0x08, 0xDF, 0xF9, 0xEC, 0xFA, 0xA9, 0xF0, 0xED, 0xFB, 0x22, 0x89, 0x82, 0x8A, 0x83, ++0xEC, 0xFA, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xEA, 0xDE, 0xE8, 0x80, 0xDB, 0x89, 0x82, 0x8A, 0x83, ++0xE4, 0x93, 0xA3, 0xF2, 0x08, 0xDF, 0xF9, 0x80, 0xCC, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, ++0x60, 0xC3, 0x88, 0xF0, 0xED, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0xB9, 0xF5, 0x82, 0xEB, 0x24, ++0x02, 0xB4, 0x04, 0x00, 0x50, 0xAF, 0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x45, 0xF9, 0x73, 0xC5, ++0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, 0x02, 0x15, ++0x83, 0xE0, 0x38, 0xF0, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0xF0, 0xA3, ++0xE0, 0x22, 0x50, 0x06, 0x87, 0xF0, 0x09, 0xE7, 0x19, 0x22, 0xBB, 0xFE, 0x07, 0xE3, 0xF5, 0xF0, ++0x09, 0xE3, 0x19, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0x74, 0x01, 0x93, 0x22, ++0xBB, 0x01, 0x10, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, 0xF5, 0xF0, ++0xA3, 0xE0, 0x22, 0x50, 0x09, 0xE9, 0x25, 0x82, 0xF8, 0x86, 0xF0, 0x08, 0xE6, 0x22, 0xBB, 0xFE, ++0x0A, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0xF5, 0xF0, 0x08, 0xE2, 0x22, 0xE5, 0x83, 0x2A, 0xF5, 0x83, ++0xE9, 0x93, 0xF5, 0xF0, 0xA3, 0xE9, 0x93, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, 0x83, 0xF0, ++0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x06, 0xF7, 0x09, 0xA7, 0xF0, 0x19, 0x22, 0xBB, 0xFE, 0x06, ++0xF3, 0xE5, 0xF0, 0x09, 0xF3, 0x19, 0x22, 0xF8, 0xBB, 0x01, 0x11, 0xE5, 0x82, 0x29, 0xF5, 0x82, ++0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x09, 0xE9, 0x25, ++0x82, 0xC8, 0xF6, 0x08, 0xA6, 0xF0, 0x22, 0xBB, 0xFE, 0x09, 0xE9, 0x25, 0x82, 0xC8, 0xF2, 0xE5, ++0xF0, 0x08, 0xF2, 0x22, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xFE, 0xED, 0x99, 0xFD, 0xEC, 0x98, ++0xFC, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, 0xEC, 0x58, 0xFC, 0x22, 0xEF, ++0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, 0xEB, 0x9F, 0xF5, 0xF0, ++0xEA, 0x9E, 0x42, 0xF0, 0xE9, 0x9D, 0x42, 0xF0, 0xE8, 0x9C, 0x45, 0xF0, 0x22, 0xE0, 0xFC, 0xA3, ++0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE2, 0xFC, 0x08, 0xE2, 0xFD, 0x08, 0xE2, ++0xFE, 0x08, 0xE2, 0xFF, 0x22, 0xE0, 0xF8, 0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, ++0x22, 0xE2, 0xFB, 0x08, 0xE2, 0xF9, 0x08, 0xE2, 0xFA, 0x08, 0xE2, 0xCB, 0xF8, 0x22, 0xEC, 0xF2, ++0x08, 0xED, 0xF2, 0x08, 0xEE, 0xF2, 0x08, 0xEF, 0xF2, 0x22, 0xA4, 0x25, 0x82, 0xF5, 0x82, 0xE5, ++0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, ++0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, ++0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, ++0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xEF, 0x4E, ++0x60, 0x12, 0xEF, 0x60, 0x01, 0x0E, 0xED, 0xBB, 0x01, 0x0B, 0x89, 0x82, 0x8A, 0x83, 0xF0, 0xA3, ++0xDF, 0xFC, 0xDE, 0xFA, 0x22, 0x89, 0xF0, 0x50, 0x07, 0xF7, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, ++0xBB, 0xFE, 0xFC, 0xF3, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0x02, 0x48, 0x88, 0x02, 0x43, 0xDD, ++0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, ++0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, ++0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, ++0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x48, 0xCD, 0xE4, 0x7E, 0x01, 0x93, 0x60, ++0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, ++0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, ++0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, ++0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x82, 0xDC, ++0x00, 0x41, 0x82, 0xDD, 0x00, 0x48, 0x91, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x41, 0x82, 0xE6, 0x00, 0x41, 0x82, 0xE9, 0x00, 0x00, 0x59, 0x2E, 0x61, 0x3C, 0x67, 0xEB, 0xC0, ++0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, ++0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, ++0xEF, 0xF0, 0x74, 0x48, 0xA3, 0xF0, 0x31, 0x60, 0xE5, 0x3C, 0x30, 0xE7, 0x02, 0x31, 0x45, 0x74, ++0xEF, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x48, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, ++0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, ++0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x32, 0x06, 0x90, 0x00, 0xF2, 0xE0, ++0x20, 0xE6, 0x0C, 0x90, 0x00, 0x05, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x05, 0x12, 0x32, 0x1E, 0x22, ++0x90, 0x00, 0x54, 0xE0, 0x55, 0x35, 0xF5, 0x39, 0xA3, 0xE0, 0x55, 0x36, 0xF5, 0x3A, 0xA3, 0xE0, ++0x55, 0x37, 0xF5, 0x3B, 0xA3, 0xE0, 0x55, 0x38, 0xF5, 0x3C, 0xAD, 0x39, 0x7F, 0x54, 0x12, 0x32, ++0x1E, 0xAD, 0x3A, 0x7F, 0x55, 0x12, 0x32, 0x1E, 0xAD, 0x3B, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0xAD, ++0x3C, 0x7F, 0x57, 0x12, 0x32, 0x1E, 0x53, 0x91, 0xEF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, ++0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x9A, 0xF0, 0x74, 0x49, 0xA3, ++0xF0, 0x12, 0x82, 0xB2, 0xE5, 0x41, 0x30, 0xE4, 0x03, 0x12, 0x6F, 0x7A, 0xE5, 0x41, 0x30, 0xE6, ++0x03, 0x12, 0x83, 0x0F, 0xE5, 0x43, 0x30, 0xE0, 0x03, 0x12, 0x83, 0x1C, 0xE5, 0x43, 0x30, 0xE1, ++0x02, 0x51, 0x41, 0xE5, 0x43, 0x30, 0xE2, 0x03, 0x12, 0x83, 0xBB, 0xE5, 0x43, 0x30, 0xE3, 0x03, ++0x12, 0x7A, 0x1B, 0xE5, 0x43, 0x30, 0xE4, 0x03, 0x12, 0x79, 0x75, 0xE5, 0x43, 0x30, 0xE5, 0x03, ++0x12, 0x83, 0xE4, 0xE5, 0x43, 0x30, 0xE6, 0x03, 0x12, 0x86, 0xCD, 0xE5, 0x44, 0x30, 0xE1, 0x03, ++0x12, 0x86, 0xE5, 0xE5, 0x44, 0x30, 0xE5, 0x03, 0x12, 0x76, 0x59, 0x74, 0x9A, 0x04, 0x90, 0x01, ++0xC4, 0xF0, 0x74, 0x49, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, ++0x32, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x81, 0x85, 0x74, 0x01, 0xF0, 0x90, 0x81, ++0x8D, 0xE0, 0x70, 0x02, 0x41, 0xDF, 0x90, 0x81, 0xA4, 0xE0, 0x04, 0x51, 0xF8, 0x12, 0x47, 0x7F, ++0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x71, 0x12, 0x78, 0x10, 0x12, ++0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, ++0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x71, 0x12, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x47, 0x7F, 0x90, 0x81, 0xD8, 0x12, 0x20, 0xCE, 0x90, 0x81, ++0x89, 0xE0, 0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x0C, 0x12, 0x7D, 0x9D, 0x74, 0x05, 0xF0, ++0x12, 0x7A, 0x7B, 0x12, 0x7F, 0x90, 0x90, 0x81, 0x89, 0x12, 0x79, 0x63, 0x30, 0xE0, 0x09, 0x90, ++0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0xB1, 0xFD, 0x90, 0x82, 0xE2, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, ++0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x7F, ++0x01, 0x12, 0x6F, 0x7E, 0x12, 0x89, 0xAA, 0x90, 0x81, 0xF5, 0xE0, 0x30, 0xE0, 0x09, 0x90, 0x01, ++0x3B, 0xE0, 0x30, 0xE4, 0x02, 0xB1, 0xFD, 0x22, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0xFF, 0xE4, 0xFC, ++0xFD, 0xFE, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, ++0x05, 0x60, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0xE4, 0x90, 0x82, 0x28, 0xF0, 0x90, 0x87, ++0x5F, 0xE0, 0x90, 0x82, 0x27, 0xF0, 0xE4, 0x90, 0x82, 0x34, 0xF0, 0x90, 0x82, 0x24, 0xF0, 0x90, ++0x82, 0x24, 0xE0, 0xFF, 0xC3, 0x94, 0x40, 0x50, 0x11, 0x74, 0x37, 0x2F, 0x12, 0x8B, 0x9A, 0x74, ++0xFF, 0xF0, 0x90, 0x82, 0x24, 0xE0, 0x04, 0xF0, 0x80, 0xE5, 0xE4, 0x90, 0x82, 0x24, 0xF0, 0x90, ++0x82, 0x27, 0xE0, 0xFF, 0x90, 0x82, 0x24, 0xE0, 0xFE, 0xC3, 0x9F, 0x40, 0x02, 0x81, 0x1B, 0x74, ++0xDF, 0x2E, 0xF9, 0xE4, 0x34, 0x86, 0x12, 0x8A, 0xA7, 0x75, 0x16, 0x0A, 0x7B, 0x01, 0x7A, 0x82, ++0x79, 0x19, 0x12, 0x2B, 0xED, 0x90, 0x82, 0x1A, 0xE0, 0xFF, 0x12, 0x2F, 0x27, 0xEF, 0x04, 0x90, ++0x82, 0x34, 0xF0, 0x90, 0x82, 0x19, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x31, 0xEA, 0xEF, 0x24, ++0xC8, 0x90, 0x82, 0x36, 0xF0, 0x75, 0xF0, 0x08, 0xA4, 0xF0, 0x90, 0x82, 0x1A, 0xE0, 0x54, 0x0F, ++0x90, 0x82, 0x35, 0xF0, 0xE4, 0x90, 0x82, 0x23, 0xF0, 0x90, 0x82, 0x25, 0xF0, 0x90, 0x82, 0x25, ++0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x57, 0x90, 0x82, 0x35, 0xE0, 0xFE, 0xA8, 0x07, 0x08, 0x80, ++0x02, 0xC3, 0x13, 0xD8, 0xFC, 0x20, 0xE0, 0x3E, 0x90, 0x82, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x90, ++0x82, 0x36, 0xE0, 0x2F, 0x24, 0x37, 0xF9, 0xE4, 0x34, 0x82, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, ++0x01, 0x90, 0x82, 0x23, 0xE0, 0x75, 0xF0, 0x02, 0xA4, 0x24, 0x1B, 0xF9, 0x74, 0x82, 0x35, 0xF0, ++0x8B, 0x13, 0xF5, 0x14, 0x89, 0x15, 0x75, 0x16, 0x02, 0xD0, 0x01, 0xD0, 0x03, 0x12, 0x2B, 0xED, ++0x90, 0x82, 0x23, 0xE0, 0x04, 0xF0, 0x90, 0x82, 0x25, 0xE0, 0x04, 0xF0, 0x80, 0x9F, 0x90, 0x82, ++0x34, 0xE0, 0xFF, 0x90, 0x82, 0x24, 0xE0, 0x2F, 0xF0, 0x61, 0x4F, 0xE4, 0x90, 0x82, 0x28, 0xF0, ++0x90, 0x82, 0x28, 0xE0, 0xC3, 0x94, 0x40, 0x40, 0x02, 0xA1, 0xE1, 0xE0, 0xFF, 0x24, 0x37, 0x12, ++0x8B, 0x9A, 0xE0, 0x90, 0x82, 0x2A, 0xF0, 0xE0, 0xFE, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFD, 0x90, ++0x82, 0x29, 0xF0, 0xEE, 0x54, 0x0F, 0xFE, 0xA3, 0xF0, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0x82, 0xF5, 0x83, 0xE0, 0x90, 0x82, 0x2B, 0xF0, 0xFC, 0xEE, 0xFE, 0xEC, 0xFB, 0xEB, 0xFF, 0x90, ++0x82, 0x30, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xED, 0x12, 0x47, 0xF8, 0x4C, 0x90, 0x00, 0x4C, 0xBC, ++0x01, 0x4D, 0x35, 0x02, 0x4D, 0xD2, 0x03, 0x4D, 0x45, 0x04, 0x4D, 0x5B, 0x05, 0x4D, 0x5B, 0x06, ++0x4D, 0x5B, 0x07, 0x4D, 0x5B, 0x08, 0x4D, 0xAB, 0x09, 0x4D, 0xBE, 0x0A, 0x00, 0x00, 0x4D, 0xE1, ++0x90, 0x82, 0x28, 0xE0, 0xFD, 0x12, 0x8A, 0xB3, 0xE0, 0xFE, 0x74, 0x39, 0x2D, 0xB1, 0xF5, 0xE0, ++0xFD, 0xED, 0xFF, 0x90, 0x82, 0x32, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0x90, 0x82, 0x2B, 0xE0, ++0xFF, 0x12, 0x2F, 0x96, 0x90, 0x82, 0x26, 0x74, 0x02, 0xF0, 0xA1, 0xD2, 0x12, 0x8A, 0xAF, 0x71, ++0x12, 0xB1, 0xE2, 0x71, 0x12, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x82, 0x28, 0xE0, 0x24, 0x3B, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x71, 0x12, 0x78, ++0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x47, 0x7F, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0x28, 0xE0, 0x24, 0x3C, 0xF5, 0x82, 0xE4, ++0x34, 0x82, 0xF5, 0x83, 0x71, 0x12, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x8B, 0x3F, 0x90, 0x82, 0x2C, 0x12, 0x47, 0x9D, 0x90, 0x85, 0x96, 0x12, ++0x20, 0xCE, 0x90, 0x82, 0x30, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x2E, 0xE4, 0x90, 0x82, 0x26, ++0x74, 0x04, 0xF0, 0xA1, 0xD2, 0x90, 0x82, 0x2B, 0xE0, 0xFD, 0xB1, 0xEF, 0xE0, 0xFB, 0xE4, 0xFF, ++0x12, 0x30, 0xC7, 0x80, 0x0E, 0x90, 0x82, 0x2B, 0xE0, 0xFD, 0xB1, 0xEF, 0xE0, 0xFB, 0xE4, 0xFF, ++0x12, 0x30, 0x6A, 0x90, 0x82, 0x26, 0x74, 0x01, 0xF0, 0x80, 0x77, 0x90, 0x82, 0x26, 0x74, 0x02, ++0xF0, 0x12, 0x8A, 0xAF, 0x71, 0x12, 0xB1, 0xE2, 0x71, 0x12, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, ++0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0x2A, 0x71, 0x12, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x8B, 0x3F, 0x90, 0x82, 0x29, 0xE0, 0x24, 0xFB, ++0xFF, 0xC0, 0x07, 0x90, 0x82, 0x2C, 0x12, 0x47, 0x9D, 0x90, 0x82, 0xB8, 0x12, 0x20, 0xCE, 0x90, ++0x82, 0x2B, 0xE0, 0xFD, 0xD0, 0x07, 0x12, 0x74, 0xFA, 0x80, 0x27, 0x90, 0x82, 0x26, 0x74, 0x01, ++0x12, 0x8A, 0x9C, 0x75, 0x16, 0x01, 0x12, 0x8A, 0x84, 0xF0, 0x7B, 0x04, 0x80, 0x11, 0x90, 0x82, ++0x26, 0x74, 0x04, 0x12, 0x8A, 0x9C, 0x75, 0x16, 0x04, 0x12, 0x8A, 0x84, 0xF0, 0x7B, 0x06, 0x12, ++0x73, 0x6F, 0x90, 0x82, 0x26, 0xE0, 0x24, 0x02, 0xFF, 0x90, 0x82, 0x28, 0xE0, 0x2F, 0xF0, 0x81, ++0x20, 0x22, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, ++0x82, 0x28, 0xE0, 0x24, 0x39, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x7D, 0x02, 0x7F, ++0x02, 0xD1, 0x07, 0x7D, 0x01, 0x7F, 0x02, 0x74, 0x3D, 0x12, 0x8B, 0x92, 0xFE, 0xF6, 0x74, 0x30, ++0xE1, 0xF7, 0xE4, 0xF5, 0x4E, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x02, 0xC1, 0xE8, 0xF1, 0xE5, 0x60, ++0x02, 0xC1, 0xE8, 0x51, 0xF9, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x05, 0x62, 0x71, 0x12, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x71, 0x12, ++0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x8A, 0xBD, ++0x12, 0x67, 0x16, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, 0x81, 0x94, 0xE0, ++0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x81, 0x96, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, 0x90, ++0x81, 0x93, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x4E, 0x01, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, ++0x12, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x03, 0xE4, 0xF5, 0x4E, 0x12, 0x64, 0xFC, 0xEF, 0x70, ++0x02, 0xF5, 0x4E, 0xE5, 0x4E, 0x60, 0x41, 0x12, 0x8B, 0x7A, 0x90, 0x81, 0x96, 0xE0, 0x60, 0x04, ++0x64, 0x01, 0x70, 0x12, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x96, 0xE0, 0xD1, 0xF3, 0x12, 0x51, 0x2D, ++0x90, 0x81, 0x96, 0xE0, 0x80, 0x12, 0xE4, 0xF5, 0x1D, 0xD1, 0xE9, 0x12, 0x51, 0x2D, 0x90, 0x81, ++0x96, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xD1, 0xF3, 0x90, 0x81, 0xA6, 0xF0, 0x90, 0x81, ++0x90, 0xE0, 0x20, 0xE2, 0x03, 0x12, 0x52, 0xD1, 0x22, 0x90, 0x81, 0x96, 0xE0, 0x75, 0xF0, 0x03, ++0xA4, 0x24, 0xFE, 0xFF, 0x90, 0x81, 0x95, 0xE0, 0x2F, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0xEF, 0x64, 0x01, 0x70, 0x1A, 0x12, 0x8B, 0x6A, 0x60, 0x0A, 0xF1, 0x46, 0x12, 0x65, 0x0C, ++0x12, 0x8B, 0x48, 0x80, 0x06, 0xF1, 0x46, 0xF1, 0xEE, 0xB1, 0xFD, 0x12, 0x55, 0x07, 0x80, 0x1D, ++0x12, 0x8B, 0x6A, 0x60, 0x07, 0xF1, 0x46, 0x12, 0x65, 0x0C, 0x80, 0x04, 0xF1, 0x46, 0xF1, 0xEE, ++0x12, 0x65, 0x2A, 0x7D, 0x01, 0x7F, 0x02, 0x12, 0x65, 0x2E, 0x12, 0x56, 0x0B, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x22, 0xE4, 0x90, 0x82, ++0x0B, 0xF0, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x02, 0xE1, 0xE4, 0xF1, 0xE5, 0x60, 0x02, 0xE1, 0xE4, ++0x12, 0x8B, 0x72, 0x51, 0xF8, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x05, 0x62, 0x71, 0x12, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x71, 0x12, ++0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x8A, 0xBD, ++0x90, 0x82, 0x0B, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x94, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0x30, ++0xE0, 0x16, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x05, 0xE4, 0x90, 0x82, 0x0B, 0xF0, 0x12, 0x64, ++0xFC, 0xEF, 0x70, 0x04, 0x90, 0x82, 0x0B, 0xF0, 0x90, 0x82, 0x0B, 0xE0, 0x60, 0x16, 0x12, 0x8B, ++0x7A, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x95, 0x12, 0x51, 0x2C, 0x90, 0x81, 0x90, 0xE0, 0x20, 0xE2, ++0x03, 0x12, 0x52, 0xD1, 0x22, 0xE4, 0xFF, 0x12, 0x67, 0x39, 0xEF, 0x64, 0x01, 0x22, 0x74, 0x45, ++0x12, 0x8B, 0x92, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, ++0xF0, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, ++0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x01, 0xC4, 0x74, 0x02, 0xF0, 0x74, 0x50, 0xA3, 0xF0, 0x12, 0x82, 0xDF, 0xE5, 0x49, 0x30, 0xE1, ++0x02, 0x11, 0xCD, 0xE5, 0x49, 0x30, 0xE2, 0x03, 0x12, 0x78, 0x6A, 0xE5, 0x4A, 0x30, 0xE0, 0x03, ++0x12, 0x7B, 0x4B, 0xE5, 0x4A, 0x30, 0xE4, 0x03, 0x12, 0x87, 0x06, 0xE5, 0x4B, 0x30, 0xE1, 0x03, ++0x12, 0x79, 0xBD, 0xE5, 0x4B, 0x30, 0xE0, 0x03, 0x12, 0x83, 0x74, 0xE5, 0x4B, 0x30, 0xE4, 0x03, ++0x12, 0x87, 0x1C, 0xE5, 0x4C, 0x30, 0xE1, 0x05, 0x7F, 0x04, 0x12, 0x6F, 0x7E, 0xE5, 0x4C, 0x30, ++0xE4, 0x02, 0x11, 0xAA, 0xE5, 0x4C, 0x30, 0xE5, 0x03, 0x12, 0x87, 0x1D, 0xE5, 0x4C, 0x30, 0xE6, ++0x03, 0x12, 0x87, 0x49, 0x74, 0x02, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x50, 0xA3, 0xF0, 0xD0, ++0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, ++0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x12, 0x4F, 0x4D, 0x12, 0x65, 0x2A, ++0x90, 0x81, 0xF5, 0xE0, 0x30, 0xE0, 0x15, 0x12, 0x8B, 0x48, 0x90, 0x81, 0xF8, 0xE0, 0x60, 0x04, ++0x14, 0xF0, 0xA1, 0x07, 0x12, 0x8B, 0x2E, 0xE4, 0xFF, 0x12, 0x4E, 0xFA, 0x22, 0x90, 0x81, 0x8D, ++0xE0, 0x60, 0x03, 0x12, 0x67, 0x5D, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x44, 0x13, 0x13, 0x54, ++0x3F, 0x20, 0xE0, 0x17, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF3, 0x31, 0x2C, 0x51, 0xB5, 0xD1, 0x16, ++0x12, 0x8B, 0x38, 0x30, 0xE0, 0x02, 0x31, 0x9F, 0x02, 0x89, 0xD3, 0x90, 0x81, 0xF1, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1B, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF4, 0x31, 0x2C, 0x12, 0x89, ++0xA2, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x06, 0x7D, 0x04, 0x7F, 0x01, 0x21, 0xA3, 0x7D, 0x31, 0xF1, ++0x2A, 0x22, 0xE0, 0x44, 0x02, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xEB, 0xE0, 0xF5, 0x1E, 0xE4, ++0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, 0x19, 0x8F, ++0x1A, 0xE5, 0x1E, 0x31, 0x8B, 0x85, 0x19, 0x83, 0x85, 0x1A, 0x82, 0xF0, 0xE5, 0x1D, 0x31, 0x8B, ++0xFF, 0xE5, 0x1E, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0xA3, 0xF0, 0xEB, 0x31, 0x8B, 0xFF, 0xE5, ++0x1D, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0x31, 0x92, 0xF0, 0xBD, 0x01, 0x0D, 0x85, 0x1A, 0x82, ++0x8E, 0x83, 0xA3, 0xA3, 0xA3, 0x74, 0x03, 0xF0, 0x80, 0x06, 0x31, 0x92, 0xA3, 0x74, 0x01, 0xF0, ++0x31, 0x92, 0xA3, 0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x54, 0x07, 0xC4, 0x33, 0x54, ++0xE0, 0x22, 0x85, 0x1A, 0x82, 0x85, 0x19, 0x83, 0xA3, 0xA3, 0x22, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, ++0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0xEF, 0x14, 0x60, 0x15, ++0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1A, 0xED, 0x54, 0x01, 0xFE, 0x90, 0x81, 0x88, 0xE0, 0x54, ++0xFE, 0x4E, 0xF0, 0x80, 0x0C, 0x90, 0x81, 0x90, 0xED, 0xF0, 0x80, 0x05, 0x90, 0x81, 0x8F, 0xED, ++0xF0, 0x90, 0x00, 0x8F, 0xE0, 0x30, 0xE4, 0x2E, 0xEC, 0x14, 0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, ++0x02, 0x70, 0x23, 0x90, 0x81, 0x88, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, ++0x90, 0x81, 0x90, 0xE0, 0x54, 0x7F, 0x4F, 0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, 0x81, 0x8F, 0xE0, ++0xFD, 0x7F, 0x89, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7E, 0x00, 0x7F, 0x62, 0x7D, ++0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0x88, 0x12, 0x48, 0x1E, 0x12, 0x8A, 0xEB, 0x12, 0x48, 0x1E, ++0x90, 0x81, 0x8C, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x93, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, ++0xF0, 0x90, 0x81, 0x99, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x12, 0x8A, 0xCE, 0x12, 0x89, 0x78, ++0xE4, 0xFD, 0xFF, 0x31, 0xA3, 0x7D, 0x0C, 0x7F, 0x02, 0x31, 0xA3, 0x31, 0x9F, 0x90, 0x80, 0x42, ++0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x81, 0x98, 0x74, 0x99, 0xF0, 0x80, 0x29, 0xEF, 0xB4, 0x03, ++0x08, 0x90, 0x81, 0x98, 0x74, 0x90, 0xF0, 0x80, 0x1D, 0x90, 0x81, 0x98, 0x74, 0x40, 0xF0, 0x90, ++0x00, 0x2C, 0xE0, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, 0x90, 0x81, 0xAA, 0x74, 0x02, 0xF0, 0x80, ++0x05, 0xE4, 0x90, 0x81, 0xAA, 0xF0, 0x12, 0x6E, 0x66, 0x12, 0x8A, 0xCE, 0x7F, 0x01, 0x12, 0x7D, ++0xAE, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x7E, 0x00, 0xFF, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, ++0x79, 0xEE, 0x12, 0x48, 0x1E, 0x12, 0x8B, 0x62, 0x12, 0x79, 0x58, 0x51, 0xB5, 0xE4, 0x90, 0x81, ++0xF0, 0xF0, 0x22, 0xD1, 0x16, 0xE4, 0xFD, 0xFF, 0x81, 0xCC, 0x90, 0x82, 0xE4, 0xEF, 0xF0, 0xD1, ++0x16, 0x90, 0x82, 0xE4, 0xE0, 0x60, 0x02, 0x51, 0xB5, 0x7D, 0x04, 0xB1, 0x13, 0x74, 0x04, 0xF0, ++0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xE5, 0xED, ++0xF0, 0x90, 0x81, 0x88, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0x81, 0x1D, ++0xEE, 0x12, 0x6F, 0x8E, 0x30, 0xE0, 0x02, 0x81, 0x1D, 0x90, 0x81, 0x90, 0xE0, 0xFE, 0x6F, 0x70, ++0x02, 0x81, 0x1D, 0xEF, 0x70, 0x02, 0x61, 0x91, 0x24, 0xFE, 0x70, 0x02, 0x61, 0xCA, 0x24, 0xFE, ++0x60, 0x47, 0x24, 0xFC, 0x70, 0x02, 0x81, 0x04, 0x24, 0xFC, 0x60, 0x02, 0x81, 0x16, 0xEE, 0xB4, ++0x0E, 0x02, 0x91, 0x7A, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x51, 0xBA, 0x90, 0x81, ++0x90, 0xE0, 0xB4, 0x06, 0x02, 0x91, 0x9E, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x04, 0x0D, 0x90, 0x82, ++0xE5, 0xE0, 0xFF, 0x60, 0x04, 0xB1, 0x1B, 0x80, 0x02, 0xD1, 0x00, 0x90, 0x81, 0x90, 0xE0, 0x64, ++0x08, 0x60, 0x02, 0x81, 0x16, 0xD1, 0x0B, 0x81, 0x16, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, ++0x01, 0x51, 0xBA, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0x91, 0x9E, 0x90, 0x81, 0x90, 0xE0, ++0xB4, 0x0E, 0x07, 0x91, 0x22, 0xBF, 0x01, 0x02, 0x91, 0x7A, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x0C, ++0x60, 0x02, 0x81, 0x16, 0x91, 0x22, 0xEF, 0x64, 0x01, 0x60, 0x02, 0x81, 0x16, 0x91, 0xD7, 0x81, ++0x16, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0E, 0x07, 0x91, 0x22, 0xBF, 0x01, 0x02, 0x91, 0x7A, 0x90, ++0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0x91, 0x9E, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, 0x07, 0x91, ++0x22, 0xBF, 0x01, 0x02, 0x91, 0xD7, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x04, 0x70, 0x58, 0x12, 0x88, ++0x99, 0xEF, 0x64, 0x01, 0x70, 0x50, 0xD1, 0xB2, 0x80, 0x4C, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0E, ++0x07, 0x91, 0x22, 0xBF, 0x01, 0x02, 0x91, 0x7A, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0x91, ++0x9E, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, 0x07, 0x91, 0x22, 0xBF, 0x01, 0x02, 0x91, 0xD7, 0x90, ++0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x51, 0xBA, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x04, 0x16, ++0xD1, 0x81, 0x80, 0x12, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, 0x0B, 0x90, 0x81, 0x89, 0x12, 0x7A, ++0x08, 0x30, 0xE0, 0x02, 0xB1, 0x07, 0x90, 0x81, 0x90, 0x12, 0x8A, 0xF8, 0xF0, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x88, 0x77, 0xEF, 0x64, 0x01, 0x60, ++0x05, 0x75, 0x0E, 0x01, 0x80, 0x31, 0x12, 0x79, 0x60, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x02, 0x80, ++0x26, 0x90, 0x81, 0x8F, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, 0x80, 0x18, 0x90, ++0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x11, ++0x80, 0x05, 0x12, 0x7F, 0x88, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, ++0xE5, 0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x89, 0xE0, 0xC3, 0x13, ++0x20, 0xE0, 0x04, 0x31, 0x9F, 0x80, 0x12, 0x12, 0x8B, 0x18, 0xF1, 0xDB, 0x90, 0x05, 0x27, 0xE0, ++0x44, 0x80, 0xF0, 0x90, 0x81, 0x87, 0x74, 0x04, 0xF0, 0xE4, 0xFD, 0xFF, 0x80, 0x2E, 0x90, 0x81, ++0x89, 0xE0, 0x90, 0x06, 0x04, 0x20, 0xE0, 0x07, 0xE0, 0x44, 0x40, 0xF1, 0xDB, 0x80, 0x0F, 0x31, ++0x9B, 0x90, 0x05, 0x27, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x81, 0x87, 0x74, 0x0C, 0xF0, 0xE4, 0xFD, ++0xFF, 0x80, 0x09, 0xE4, 0xFD, 0x7F, 0x0C, 0x51, 0xD5, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, ++0xF0, 0x90, 0x80, 0x40, 0xED, 0xF0, 0x22, 0x12, 0x4F, 0xE5, 0x70, 0x2A, 0x90, 0x81, 0x89, 0xE0, ++0x54, 0xFD, 0xF0, 0x7D, 0x2C, 0x7F, 0x6F, 0x91, 0xCC, 0x7D, 0x08, 0x7F, 0x01, 0xB1, 0x56, 0xBF, ++0x01, 0x0F, 0x90, 0x81, 0x88, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0xB1, 0x13, 0x74, 0x0E, 0xF0, ++0x22, 0x12, 0x87, 0x74, 0x04, 0xF0, 0x22, 0x7D, 0x2F, 0xF1, 0x2A, 0x7D, 0x08, 0xB1, 0x13, 0x74, ++0x08, 0xF0, 0x22, 0x7F, 0x01, 0x31, 0xA3, 0x90, 0x81, 0x87, 0x22, 0xEF, 0x60, 0x33, 0x12, 0x4F, ++0xE5, 0x70, 0x2E, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, 0x0F, 0x91, 0xCC, ++0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0xB1, 0x52, 0xBF, 0x01, 0x0F, 0x90, 0x81, 0x88, 0xE0, ++0x44, 0x40, 0xF0, 0x7D, 0x06, 0xB1, 0x13, 0x74, 0x06, 0xF0, 0x22, 0x12, 0x87, 0x74, 0x74, 0x08, ++0xF0, 0x22, 0x7D, 0x08, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xBC, ++0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x80, 0x3E, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, ++0x21, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x82, 0xC0, 0xF0, 0x7D, 0x26, 0xD1, 0xD0, 0xEF, 0x64, 0x01, ++0x70, 0x03, 0x12, 0x84, 0xBF, 0x90, 0x82, 0xC0, 0xE0, 0xFF, 0x7D, 0x27, 0x91, 0xCC, 0xB1, 0xA1, ++0x80, 0x05, 0xB1, 0xA1, 0x12, 0x84, 0xBF, 0x12, 0x86, 0xAA, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x90, 0x82, 0xBC, 0xE0, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xE8, ++0xEF, 0xF0, 0x90, 0x80, 0x87, 0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x3D, 0x90, 0x81, ++0x90, 0xE0, 0x64, 0x0E, 0x70, 0x14, 0x90, 0x82, 0xE8, 0xE0, 0x70, 0x2F, 0x90, 0x81, 0x88, 0xE0, ++0x54, 0x7F, 0xF0, 0x90, 0x06, 0x04, 0x31, 0x9B, 0x80, 0x1F, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x06, ++0x70, 0x19, 0x90, 0x82, 0xE8, 0xE0, 0x60, 0x13, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xBF, 0xF0, 0x12, ++0x8B, 0x18, 0xF0, 0x90, 0x81, 0x90, 0x74, 0x04, 0xF0, 0x51, 0xB5, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x12, 0x8B, 0x62, 0x51, 0xB5, 0x7D, 0x0C, 0x7F, 0x01, 0x21, 0xA3, 0x51, 0xB3, 0x31, 0x9F, 0x90, ++0x81, 0x87, 0x74, 0x0C, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, ++0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, ++0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x12, 0x8B, 0x51, 0x54, 0x7F, 0xFC, 0x90, 0x82, 0xC9, 0x12, ++0x20, 0xCE, 0x90, 0x82, 0xC9, 0x12, 0x70, 0xCA, 0x7F, 0x7C, 0xF1, 0x95, 0x12, 0x20, 0xDA, 0xCC, ++0xC0, 0x00, 0xC0, 0xF1, 0x93, 0x12, 0x20, 0xDA, 0x00, 0xC0, 0x00, 0x14, 0x12, 0x8B, 0x23, 0x12, ++0x20, 0xDA, 0x00, 0x03, 0x3E, 0x60, 0xE4, 0xFD, 0xFF, 0x12, 0x74, 0xFA, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x12, 0x78, 0x7F, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x0C, 0x60, 0x04, 0x91, 0xC3, 0xB1, 0x52, ++0x22, 0x7D, 0x2E, 0x7F, 0x6F, 0x91, 0xCC, 0x7D, 0x02, 0x7F, 0x01, 0x31, 0xA3, 0x12, 0x8A, 0x5A, ++0x90, 0x81, 0x87, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x81, 0x8D, 0xE0, 0x64, 0x01, 0x70, 0x12, 0x12, ++0x6F, 0x66, 0x60, 0x05, 0x91, 0xC3, 0x02, 0x78, 0x7F, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x02, 0x51, ++0xD1, 0x22, 0x7D, 0x2D, 0xD1, 0xD0, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, ++0x65, 0x2E, 0xF1, 0x2E, 0xE4, 0xFD, 0x7F, 0x01, 0x31, 0xA3, 0xE4, 0x90, 0x81, 0x87, 0xF0, 0x22, ++0x7F, 0xFF, 0x91, 0xCC, 0xE4, 0x90, 0x82, 0xD9, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, ++0x82, 0xDB, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x91, 0xCC, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x11, 0xA3, ++0xE0, 0x70, 0x0D, 0xA3, 0xE0, 0x70, 0x09, 0xA3, 0xE0, 0x70, 0x05, 0xF1, 0x8A, 0x7F, 0x01, 0x22, ++0xD3, 0x90, 0x82, 0xDA, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0xD9, 0xE0, 0x94, 0x03, 0x40, 0x0C, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0xF1, 0x8A, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, ++0x32, 0xAA, 0x90, 0x82, 0xD9, 0x12, 0x7D, 0xDD, 0x80, 0xBF, 0x7F, 0xFF, 0x91, 0xCC, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0xD4, 0x90, 0x85, 0xBB, 0x12, 0x20, 0xDA, 0xCC, 0xF0, 0x00, ++0xC0, 0xF1, 0x93, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x14, 0x12, 0x8B, 0x23, 0x12, 0x20, 0xDA, ++0x00, 0x00, 0x00, 0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x74, 0xFA, 0x12, 0x8B, 0x51, 0x44, 0x80, 0xFC, ++0x90, 0x82, 0xCD, 0x12, 0x20, 0xCE, 0x90, 0x82, 0xCD, 0x12, 0x70, 0xCA, 0x7F, 0x7C, 0x7E, 0x08, ++0x12, 0x2E, 0xA2, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, ++0x53, 0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0xDB, 0xE0, 0xFF, 0x7D, ++0x48, 0x81, 0xCC, 0x7F, 0x8C, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x85, 0xBB, 0x22, 0x90, 0x81, ++0xF1, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0xFD, 0xFF, 0x91, 0xCC, 0xD1, 0x16, ++0x12, 0x8B, 0x38, 0x30, 0xE0, 0x02, 0x31, 0x9F, 0x12, 0x89, 0xD3, 0x22, 0x7D, 0x20, 0x7F, 0xFF, ++0x91, 0xCC, 0xF1, 0x2E, 0x90, 0x81, 0x86, 0x74, 0x02, 0xF0, 0x22, 0x51, 0xB3, 0x90, 0x81, 0x86, ++0x74, 0x01, 0xF0, 0x22, 0x12, 0x89, 0x4D, 0x7D, 0x23, 0x80, 0xE3, 0xF0, 0x7D, 0x04, 0x7F, 0x01, ++0x21, 0xA3, 0x51, 0xB5, 0x12, 0x89, 0x4D, 0x80, 0xE4, 0x80, 0xD7, 0x7D, 0x1F, 0x7F, 0x6F, 0x91, ++0xCC, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x90, 0x81, 0x86, 0x74, 0x04, 0xF0, 0x22, 0xC0, ++0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0xFF, ++0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x57, 0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, ++0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, ++0x90, 0x01, 0xC8, 0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x0F, 0x7F, ++0xFF, 0xFE, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x09, 0x90, 0x82, 0x0F, 0xE0, 0x64, 0x03, 0x60, 0x03, ++0x22, 0x01, 0xF2, 0xE4, 0x90, 0x82, 0x14, 0xF0, 0x90, 0x82, 0x14, 0xE0, 0xFF, 0xC3, 0x94, 0x02, ++0x40, 0x02, 0x21, 0x2D, 0xC3, 0x74, 0xFE, 0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, 0x7B, 0x01, 0x7A, ++0x82, 0x79, 0x10, 0x12, 0x2B, 0x27, 0xEF, 0x64, 0x01, 0x70, 0x77, 0x90, 0x82, 0x10, 0xE0, 0xFF, ++0x54, 0xC0, 0xFE, 0x60, 0x05, 0xEF, 0x54, 0x0C, 0x70, 0x16, 0x90, 0x82, 0x10, 0xE0, 0xFF, 0x54, ++0x30, 0x60, 0x67, 0xEF, 0x54, 0x03, 0x60, 0x62, 0x90, 0x82, 0x11, 0x74, 0x01, 0xF0, 0x80, 0x05, ++0xE4, 0x90, 0x82, 0x11, 0xF0, 0x90, 0x82, 0x11, 0xE0, 0x90, 0x82, 0x10, 0x70, 0x16, 0xE0, 0xFF, ++0xEE, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x82, 0x12, 0xF0, 0xEF, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, ++0xA3, 0xF0, 0x80, 0x0D, 0xE0, 0xFE, 0x54, 0x30, 0x90, 0x82, 0x12, 0xF0, 0xEE, 0x54, 0x03, 0xA3, ++0xF0, 0x90, 0x82, 0x12, 0xE0, 0x64, 0x30, 0x70, 0x54, 0xA3, 0xE0, 0x64, 0x02, 0x70, 0x4E, 0x90, ++0x00, 0xF5, 0xE0, 0x54, 0x40, 0x90, 0x82, 0x15, 0xF0, 0xE0, 0x70, 0x41, 0xA3, 0x74, 0x02, 0xF0, ++0x80, 0x10, 0x90, 0x82, 0x16, 0x74, 0x01, 0xF0, 0x80, 0x08, 0x90, 0x82, 0x14, 0xE0, 0x04, 0xF0, ++0x01, 0x58, 0x90, 0x01, 0xC4, 0x74, 0x30, 0xF0, 0x74, 0x58, 0xA3, 0xF0, 0x90, 0x82, 0x16, 0xE0, ++0x90, 0x01, 0xC8, 0xF0, 0x90, 0x82, 0x10, 0xE0, 0x90, 0x01, 0xC9, 0xF0, 0x90, 0x82, 0x11, 0xE0, ++0x90, 0x01, 0xCA, 0xF0, 0xE4, 0xFD, 0x7F, 0x1F, 0x12, 0x32, 0x1E, 0x80, 0xD5, 0x22, 0x90, 0x00, ++0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xBF, ++0xF0, 0x11, 0x30, 0x12, 0x81, 0xD4, 0x12, 0x32, 0x77, 0x12, 0x81, 0xE1, 0x31, 0x85, 0x7F, 0x01, ++0x12, 0x44, 0x15, 0x90, 0x81, 0xF9, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x44, 0x15, 0x90, 0x81, 0xF9, ++0xE0, 0x04, 0xF0, 0x12, 0x60, 0x15, 0x31, 0x96, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, ++0x80, 0x12, 0x32, 0x1E, 0x75, 0x20, 0xFF, 0x12, 0x61, 0x35, 0x12, 0x82, 0x11, 0x12, 0x82, 0xA8, ++0xE4, 0xFF, 0x02, 0x44, 0x9E, 0xE4, 0x90, 0x80, 0x3C, 0xF0, 0x31, 0x8E, 0xF0, 0x22, 0xA3, 0xF0, ++0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0x22, 0x12, 0x79, 0x53, 0x12, 0x80, 0x0F, 0x31, 0xAD, 0x12, 0x8A, ++0x20, 0x12, 0x52, 0x0B, 0x12, 0x89, 0x8F, 0x12, 0x8A, 0xEB, 0x02, 0x48, 0x1E, 0x90, 0x04, 0x44, ++0x74, 0x11, 0xF0, 0xA3, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE4, 0xF0, 0x90, 0x82, ++0x0F, 0xF0, 0x90, 0x81, 0x81, 0xE0, 0xFF, 0x90, 0x82, 0x0F, 0xE0, 0xC3, 0x9F, 0x40, 0x02, 0x41, ++0x8D, 0xE0, 0xFF, 0x75, 0xF0, 0x0A, 0x90, 0x89, 0x00, 0x51, 0x8E, 0x90, 0x89, 0x02, 0x51, 0x8E, ++0x90, 0x89, 0x04, 0x51, 0x8E, 0x90, 0x89, 0x06, 0x51, 0x8E, 0x90, 0x89, 0x08, 0x12, 0x47, 0xDA, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x51, 0x9A, 0x24, 0x4B, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0x51, 0xB3, ++0x12, 0x77, 0xB1, 0x51, 0xB3, 0x24, 0x0C, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x51, 0xB3, 0x24, 0x8C, ++0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x8C, 0x2F, 0x12, 0x8B, ++0x8A, 0xE4, 0xF0, 0x90, 0x41, 0xFC, 0xD1, 0xA3, 0x90, 0x41, 0xC4, 0x12, 0x8A, 0xDD, 0xFF, 0x90, ++0x82, 0x0F, 0xE0, 0xFD, 0xB1, 0x34, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x08, 0xED, 0x12, ++0x8B, 0x10, 0x44, 0x20, 0xF0, 0x74, 0x81, 0x2D, 0x12, 0x6F, 0x95, 0x74, 0x0C, 0xF0, 0x75, 0xF0, ++0x08, 0xED, 0x90, 0x8F, 0x49, 0x12, 0x47, 0xDA, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x08, ++0xED, 0x90, 0x8F, 0x47, 0x12, 0x47, 0xDA, 0xE4, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0x75, 0xF0, 0x08, ++0xED, 0xD1, 0xE3, 0x74, 0x13, 0xF0, 0x75, 0xF0, 0x08, 0xED, 0xF1, 0xE2, 0xE4, 0xF0, 0x74, 0xB0, ++0x2D, 0xF1, 0xDA, 0xE4, 0xF0, 0x90, 0x82, 0x0F, 0xE0, 0x04, 0xF0, 0x21, 0xC2, 0x22, 0x12, 0x47, ++0xDA, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x22, 0x25, 0xE0, 0x24, 0x80, 0xF5, 0x82, ++0xE4, 0x34, 0x8C, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x4B, 0xF5, 0x82, ++0xE4, 0x34, 0x91, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x22, 0xE4, 0x90, 0x82, ++0x7C, 0xF0, 0x90, 0x81, 0x81, 0xE0, 0xFE, 0x90, 0x82, 0x7C, 0xE0, 0xFF, 0xC3, 0x9E, 0x40, 0x02, ++0x81, 0xDC, 0x12, 0x67, 0x39, 0xEF, 0x70, 0x02, 0x81, 0xD4, 0x90, 0x82, 0x7C, 0x12, 0x8B, 0x05, ++0x12, 0x6F, 0x8D, 0x30, 0xE0, 0x02, 0x81, 0xD4, 0x12, 0x76, 0x4C, 0xE0, 0xFE, 0xA3, 0xE0, 0xD3, ++0x94, 0x00, 0xEE, 0x94, 0x00, 0x50, 0x02, 0x81, 0xD4, 0x90, 0x82, 0x7C, 0xE0, 0x75, 0xF0, 0x0A, ++0xA4, 0x24, 0x00, 0xF9, 0x74, 0x89, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90, 0x82, 0x81, 0x12, 0x47, ++0xEF, 0x90, 0x82, 0x7C, 0xE0, 0xFF, 0x12, 0x76, 0x4D, 0xE0, 0xFD, 0xA3, 0xE0, 0x90, 0x82, 0x86, ++0xCD, 0xF0, 0xA3, 0xED, 0xF0, 0xEF, 0x12, 0x77, 0x71, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x82, 0x88, ++0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x82, 0x7C, 0xE0, 0xFD, 0x24, 0xB0, 0xF1, 0xDA, 0xE0, 0x54, ++0x3F, 0x90, 0x82, 0x7D, 0xF0, 0xE0, 0xFF, 0x54, 0x1F, 0xFE, 0x75, 0xF0, 0x08, 0xED, 0xD1, 0xE3, ++0xE0, 0xFD, 0x90, 0x82, 0x7C, 0xE0, 0xF9, 0x24, 0x8C, 0x12, 0x8B, 0x8A, 0xE0, 0xC3, 0x94, 0x05, ++0x40, 0x02, 0x81, 0x71, 0xEE, 0x9D, 0x40, 0x0B, 0xAE, 0x05, 0xEF, 0x54, 0x40, 0x90, 0x82, 0x7D, ++0xF0, 0x4D, 0xF0, 0xEE, 0x90, 0x41, 0x82, 0x93, 0xFF, 0x74, 0xCB, 0x29, 0x12, 0x8B, 0x82, 0xE0, ++0xC3, 0x9F, 0xEE, 0x40, 0x05, 0x90, 0x41, 0x4A, 0x80, 0x03, 0x90, 0x41, 0x66, 0x93, 0x90, 0x82, ++0x8A, 0xF0, 0x90, 0x82, 0x8A, 0xE0, 0x75, 0xF0, 0x06, 0xA4, 0x24, 0xC0, 0xF9, 0x74, 0x40, 0x35, ++0xF0, 0xFA, 0x7B, 0xFF, 0x90, 0x82, 0x7E, 0x12, 0x47, 0xEF, 0x90, 0x82, 0x7D, 0xE0, 0x90, 0x42, ++0x2A, 0x93, 0xFF, 0xD3, 0x90, 0x82, 0x89, 0xE0, 0x9F, 0x90, 0x82, 0x88, 0xE0, 0x94, 0x00, 0x40, ++0x02, 0x81, 0x68, 0x90, 0x82, 0x7C, 0xE0, 0xB1, 0x34, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x82, 0x84, ++0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x91, 0xFB, 0x12, 0x1F, 0xA4, 0x91, 0xE0, 0x12, 0x46, 0xB5, 0x91, ++0xEC, 0x12, 0x6D, 0x6B, 0x91, 0xE0, 0x90, 0x00, 0x02, 0x91, 0xE9, 0x90, 0x00, 0x02, 0x91, 0xDD, ++0x90, 0x00, 0x04, 0x91, 0xE9, 0x90, 0x00, 0x03, 0x91, 0xDD, 0x90, 0x00, 0x06, 0x91, 0xE9, 0x90, ++0x00, 0x04, 0x91, 0xDD, 0x90, 0x00, 0x08, 0x91, 0xE9, 0x12, 0x6F, 0x6D, 0xFF, 0x7E, 0x00, 0x90, ++0x82, 0x86, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x20, 0x1E, 0xD1, 0x8A, 0x40, 0x0C, 0xA3, 0xE0, ++0x9F, 0xF0, 0x90, 0x82, 0x84, 0xE0, 0x9E, 0xF0, 0x80, 0x07, 0xE4, 0x90, 0x82, 0x84, 0xF0, 0xA3, ++0xF0, 0x90, 0x82, 0x84, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x90, 0x82, 0x7C, 0xE0, 0xFF, 0xB1, 0x34, ++0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x12, 0x75, 0xD0, 0x90, 0x82, 0x7D, 0xE0, 0xD1, 0x75, 0xD1, 0xA0, ++0xD1, 0x8A, 0x40, 0x09, 0x90, 0x82, 0x7C, 0xE0, 0xFF, 0xB1, 0x40, 0x80, 0x14, 0x90, 0x82, 0x7D, ++0xE0, 0xD1, 0x97, 0xC3, 0xD1, 0x8B, 0x50, 0x09, 0x90, 0x82, 0x7C, 0xE0, 0xFF, 0x7D, 0x01, 0xD1, ++0xE9, 0x91, 0xE3, 0xE4, 0xF5, 0xF0, 0x12, 0x47, 0x18, 0x91, 0xE3, 0x90, 0x00, 0x02, 0xB1, 0x01, ++0x90, 0x00, 0x04, 0xB1, 0x01, 0x90, 0x00, 0x06, 0xB1, 0x01, 0x90, 0x00, 0x08, 0xB1, 0x01, 0x90, ++0x82, 0x7C, 0xE0, 0xFF, 0x51, 0x9A, 0x12, 0x77, 0xB1, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x90, ++0x82, 0x7D, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0xD6, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, ++0x93, 0xFC, 0x74, 0x01, 0x93, 0xFD, 0xEF, 0xD1, 0x75, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2D, 0xFF, ++0xE4, 0x93, 0x3C, 0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF, 0x90, 0x82, 0x7C, 0xE0, 0xB1, 0x34, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x82, 0x7C, 0xE0, 0x04, 0xF0, 0x41, 0xC2, 0x22, 0x12, 0x1F, 0xBD, ++0xFF, 0x7E, 0x00, 0x90, 0x82, 0x81, 0x02, 0x47, 0xE6, 0x12, 0x46, 0xE0, 0xFD, 0xAC, 0xF0, 0x12, ++0x20, 0x1E, 0x90, 0x82, 0x84, 0xEE, 0x8F, 0xF0, 0x12, 0x46, 0x9F, 0x90, 0x82, 0x7E, 0x02, 0x47, ++0xE6, 0xE4, 0xF5, 0xF0, 0x02, 0x47, 0x37, 0x25, 0xE0, 0x24, 0xD6, 0xF5, 0x82, 0xE4, 0x34, 0x41, ++0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0xED, 0x25, 0xE0, 0x24, 0x9E, 0xF5, 0x82, ++0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93, 0x3E, 0xC3, 0x13, 0xFE, ++0xEF, 0x13, 0xFF, 0xE9, 0x25, 0xE0, 0x24, 0xC1, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22, ++0xF1, 0xD5, 0xE0, 0x54, 0x7F, 0x90, 0x82, 0x8B, 0xF0, 0xE0, 0x54, 0x1F, 0xFD, 0xD1, 0xDF, 0xE0, ++0xFF, 0x90, 0x82, 0x8C, 0xF0, 0xE9, 0x12, 0x6C, 0xA6, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x82, 0x8D, ++0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xE9, 0x12, 0x6C, 0x90, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x82, 0x8F, ++0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xED, 0xD1, 0x75, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, ++0xFB, 0xB1, 0x33, 0xEA, 0xF0, 0xA3, 0xEB, 0xF0, 0xED, 0xC3, 0x9F, 0x50, 0x76, 0xD1, 0x7F, 0xED, ++0xF0, 0x04, 0xFC, 0x90, 0x82, 0x8C, 0xE0, 0xFF, 0xEC, 0xD3, 0x9F, 0x40, 0x02, 0xC1, 0x30, 0xEC, ++0xC3, 0x94, 0x10, 0x40, 0x15, 0xEC, 0x12, 0x69, 0xA6, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0xFF, 0x90, 0x82, 0x8D, 0xF1, 0xCD, 0x70, 0x1E, 0xEC, 0xC3, 0x94, 0x10, 0x50, 0x40, ++0x74, 0x01, 0x7E, 0x00, 0xA8, 0x04, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0x90, 0x82, 0x8F, 0xF1, 0xCD, 0x60, 0x28, 0xEC, 0xB4, 0x11, 0x09, 0x90, 0x82, 0x8E, 0xE0, ++0x30, 0xE7, 0x02, 0x7C, 0x17, 0xEC, 0x64, 0x13, 0x60, 0x04, 0xEC, 0xB4, 0x12, 0x09, 0x90, 0x82, ++0x8D, 0xE0, 0x30, 0xE0, 0x02, 0x7C, 0x18, 0xAD, 0x04, 0x90, 0x82, 0x8B, 0xED, 0xF0, 0x80, 0x30, ++0x0C, 0x80, 0x90, 0x90, 0x82, 0x8C, 0xE0, 0xFC, 0x6D, 0x70, 0x2F, 0xD1, 0x7F, 0xED, 0xF0, 0x75, ++0xF0, 0x08, 0xE9, 0x12, 0x8B, 0x10, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x0D, 0x90, 0x82, 0x8B, ++0xE0, 0x20, 0xE6, 0x06, 0xED, 0x44, 0x40, 0xF0, 0x80, 0x06, 0x90, 0x82, 0x8B, 0xE0, 0xFF, 0x22, ++0xED, 0xB1, 0x07, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x20, 0xED, 0xD3, 0x9C, 0x40, 0x1B, 0x90, ++0x82, 0x8C, 0xE0, 0xFF, 0xD1, 0x7F, 0xEF, 0xF0, 0xAD, 0x07, 0x90, 0x82, 0x8B, 0xEF, 0xF0, 0xFC, ++0xB1, 0x07, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x04, 0x22, 0x74, 0x01, 0x29, 0x12, 0x88, 0x49, ++0xE4, 0xF0, 0xAF, 0x01, 0x90, 0x82, 0x8B, 0xE0, 0x44, 0x80, 0xFD, 0xF1, 0xE8, 0x90, 0x82, 0x8B, ++0xE0, 0x44, 0x80, 0xFF, 0x22, 0x25, 0xE0, 0x24, 0x9E, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0x22, 0x74, ++0xCD, 0x29, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0x22, 0xD3, 0x90, 0x82, 0x85, 0xE0, 0x9F, ++0x90, 0x82, 0x84, 0xE0, 0x9E, 0x22, 0xEC, 0x25, 0xE0, 0x24, 0xD6, 0xF5, 0x82, 0xE4, 0x34, 0x41, ++0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0x22, 0xAD, 0x07, 0x75, 0xF0, 0x08, 0xED, ++0xD1, 0xE3, 0xE0, 0xFF, 0x74, 0xCD, 0x2D, 0xD1, 0x82, 0xE0, 0x54, 0x1F, 0xFC, 0xD3, 0x9F, 0x40, ++0x02, 0xAC, 0x07, 0xD1, 0x96, 0xEC, 0xD1, 0x75, 0xF5, 0x83, 0x12, 0x8A, 0xDD, 0xFF, 0xED, 0xB1, ++0x34, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x05, 0xAD, 0x04, 0xF1, 0xE8, 0xAF, 0x04, 0x22, 0x75, ++0xF0, 0x08, 0xE9, 0x90, 0x8F, 0x43, 0x02, 0x47, 0xDA, 0xF1, 0xD5, 0xE0, 0x54, 0x7F, 0xFC, 0x54, ++0x1F, 0xFF, 0x75, 0xF0, 0x08, 0xE9, 0xF1, 0xE2, 0xE0, 0x90, 0x82, 0x8D, 0xF0, 0xD1, 0xDF, 0xE0, ++0xFE, 0xE9, 0x12, 0x6C, 0x90, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x82, 0x8E, 0xCB, 0xF0, 0xA3, 0xEB, ++0xF0, 0xE9, 0x12, 0x6C, 0xA6, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x82, 0x90, 0xCB, 0xF0, 0xA3, 0xEB, ++0xF0, 0xEF, 0xD3, 0x9E, 0x40, 0x04, 0xAF, 0x06, 0xAC, 0x06, 0xED, 0x70, 0x02, 0xE1, 0xBF, 0x90, ++0x82, 0x8C, 0xED, 0xF0, 0xEC, 0x30, 0xE6, 0x05, 0xAC, 0x07, 0xE0, 0x14, 0xF0, 0x90, 0x82, 0x8C, ++0xE0, 0x60, 0x7C, 0xEF, 0xD3, 0x94, 0x00, 0x40, 0x76, 0xE4, 0x90, 0x82, 0x8B, 0xF0, 0xEF, 0x14, ++0xFD, 0x90, 0x82, 0x8D, 0xE0, 0xFF, 0xED, 0xD3, 0x9F, 0x40, 0x4D, 0xED, 0x94, 0x10, 0x40, 0x15, ++0xED, 0x12, 0x69, 0xA6, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x82, ++0x90, 0xF1, 0xCD, 0x70, 0x1E, 0xED, 0xC3, 0x94, 0x10, 0x50, 0x2A, 0x74, 0x01, 0x7E, 0x00, 0xA8, ++0x05, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x82, 0x8E, 0xF1, ++0xCD, 0x60, 0x12, 0xAC, 0x05, 0x90, 0x82, 0x8B, 0xE0, 0x04, 0xF0, 0xA3, 0xE0, 0xFF, 0x90, 0x82, ++0x8B, 0xE0, 0x6F, 0x60, 0x03, 0x1D, 0x80, 0xA9, 0x90, 0x82, 0x8C, 0xE0, 0xFF, 0x90, 0x82, 0x8B, ++0xE0, 0xC3, 0x9F, 0x50, 0x0A, 0x90, 0x82, 0x8D, 0xE0, 0xFF, 0xB5, 0x05, 0x02, 0xAC, 0x07, 0xD1, ++0x96, 0xEC, 0xB1, 0x1A, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x01, 0xC1, 0xD8, 0xE0, 0x5E, 0xFE, ++0xA3, 0xE0, 0x5F, 0x4E, 0x22, 0xA9, 0x07, 0x74, 0xB0, 0x29, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, ++0x83, 0x22, 0x90, 0x8F, 0x44, 0x02, 0x47, 0xDA, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x74, ++0xB0, 0x2F, 0xF1, 0xDA, 0xED, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x20, ++0xE7, 0x09, 0xE0, 0x7F, 0x01, 0x20, 0xE6, 0x0C, 0x7F, 0x02, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x30, ++0xE6, 0x02, 0x7F, 0x03, 0x22, 0x12, 0x5F, 0xFB, 0x90, 0x80, 0x42, 0xEF, 0xF0, 0x11, 0x36, 0x90, ++0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x00, 0x12, 0xE0, 0x54, 0xC7, 0x44, 0x20, 0xFD, 0x7F, 0x12, ++0x12, 0x32, 0x1E, 0x02, 0x2D, 0xA7, 0x11, 0xA5, 0x11, 0xCF, 0x11, 0x64, 0x11, 0x83, 0xE4, 0xF5, ++0x35, 0xF5, 0x36, 0xF5, 0x37, 0x75, 0x38, 0x80, 0xAD, 0x35, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xAD, ++0x36, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xAD, 0x37, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xAD, 0x38, 0x7F, ++0x53, 0x02, 0x32, 0x1E, 0x75, 0x3D, 0x10, 0xE4, 0xF5, 0x3E, 0x75, 0x3F, 0x07, 0x75, 0x40, 0x22, ++0x90, 0x01, 0x30, 0xE5, 0x3D, 0xF0, 0xA3, 0xE5, 0x3E, 0xF0, 0xA3, 0xE5, 0x3F, 0xF0, 0xA3, 0xE5, ++0x40, 0xF0, 0x22, 0x75, 0x45, 0x06, 0x75, 0x46, 0x01, 0x43, 0x46, 0x10, 0x75, 0x47, 0x03, 0x75, ++0x48, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x45, 0xF0, 0xA3, 0xE5, 0x46, 0xF0, 0xA3, 0xE5, 0x47, 0xF0, ++0xA3, 0xE5, 0x48, 0xF0, 0x22, 0x90, 0x01, 0x30, 0xE4, 0x12, 0x59, 0x8F, 0xF0, 0x90, 0x01, 0x38, ++0x12, 0x59, 0x8F, 0xF0, 0xFD, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x51, 0x12, 0x32, ++0x1E, 0xE4, 0xFD, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0x90, ++0x01, 0x34, 0x74, 0xFF, 0x12, 0x59, 0x8F, 0xF0, 0x90, 0x01, 0x3C, 0x12, 0x59, 0x8F, 0xF0, 0xFD, ++0x7F, 0x54, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x55, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x56, ++0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x32, 0x1E, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x82, ++0xE3, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, ++0xE5, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, ++0xF5, 0xA8, 0xF5, 0xE8, 0x11, 0xA5, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, ++0x32, 0x1E, 0x80, 0xFE, 0x22, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x84, 0x22, 0xE4, 0x90, 0x82, 0x17, ++0xF0, 0x90, 0x82, 0x17, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0x3C, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x61, ++0xA3, 0xF0, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x0E, 0x90, 0x81, 0x90, 0xE0, 0xFF, 0x90, 0x81, 0x8F, ++0xE0, 0x6F, 0x60, 0x02, 0x31, 0x83, 0xC2, 0xAF, 0x12, 0x82, 0x6C, 0xBF, 0x01, 0x03, 0x12, 0x7E, ++0xC6, 0xD2, 0xAF, 0xF1, 0xE2, 0x12, 0x32, 0x9E, 0xBF, 0x01, 0x03, 0x12, 0x75, 0x2B, 0x12, 0x43, ++0x4D, 0x80, 0xBE, 0x90, 0x81, 0x83, 0xE0, 0x90, 0x81, 0x8F, 0x30, 0xE0, 0x04, 0xE0, 0xFF, 0xE1, ++0x1F, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x52, 0xD5, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, ++0x6F, 0xD8, 0x90, 0x05, 0x27, 0xE0, 0xF5, 0x58, 0x12, 0x8B, 0x5A, 0x90, 0x81, 0x83, 0x12, 0x8A, ++0x75, 0x91, 0xCE, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x91, 0xD5, 0x54, 0x08, 0xFE, 0xEF, 0x54, ++0xF7, 0x91, 0xCD, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x91, 0xD5, 0x54, 0x20, 0xFE, 0xEF, 0x54, ++0xDF, 0x91, 0xCD, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x4D, 0x90, 0x81, 0x83, 0xF0, 0xEE, 0xC3, ++0x13, 0x20, 0xE0, 0x02, 0x41, 0x66, 0xE0, 0x30, 0xE0, 0x6B, 0xB1, 0x08, 0x75, 0x58, 0x21, 0x91, ++0xDD, 0x30, 0xE0, 0x04, 0xB1, 0x15, 0x80, 0x0D, 0xE4, 0x90, 0x81, 0x84, 0xF0, 0xA3, 0xF0, 0x7D, ++0x40, 0xFF, 0x12, 0x4E, 0x07, 0x90, 0x81, 0x83, 0x91, 0xF4, 0x30, 0xE0, 0x03, 0x43, 0x58, 0x12, ++0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x58, 0x14, 0x90, 0x81, 0x83, 0xE0, 0xC4, 0x13, ++0x54, 0x07, 0x30, 0xE0, 0x03, 0x43, 0x58, 0x80, 0x12, 0x77, 0xB9, 0x20, 0xE0, 0x03, 0x43, 0x58, ++0x40, 0x71, 0xA9, 0x90, 0x81, 0x86, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x71, 0xB0, 0x91, 0xE6, 0x30, ++0xE0, 0x04, 0x7F, 0x04, 0x80, 0x0B, 0x91, 0xFC, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x02, 0x71, 0xB0, 0x80, 0x7E, 0x71, 0xA6, 0x90, 0x81, 0x86, 0xE0, 0x64, 0x04, 0x60, 0x02, 0x61, ++0x03, 0xFF, 0x71, 0xB0, 0x61, 0x03, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x6E, 0xB1, 0x08, 0x43, ++0x58, 0x31, 0x91, 0xDD, 0x30, 0xE0, 0x04, 0xB1, 0x15, 0x80, 0x07, 0x7D, 0x40, 0xE4, 0xFF, 0x12, ++0x4E, 0x07, 0x90, 0x81, 0x83, 0x91, 0xF4, 0x30, 0xE0, 0x03, 0x43, 0x58, 0x02, 0xEF, 0xC4, 0x54, ++0x0F, 0x30, 0xE0, 0x03, 0x43, 0x58, 0x04, 0x71, 0xA9, 0x91, 0xE6, 0x30, 0xE0, 0x0A, 0xF1, 0xBC, ++0x60, 0x31, 0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x1E, 0x12, 0x89, 0x4D, 0x90, 0x81, 0x87, 0xE0, 0xB4, ++0x02, 0x19, 0x12, 0x89, 0x3E, 0x91, 0xFC, 0xBF, 0x01, 0x09, 0x90, 0x81, 0x8F, 0xE0, 0xFF, 0x7D, ++0x01, 0x80, 0x03, 0xE4, 0xFD, 0xFF, 0x12, 0x52, 0xD5, 0x80, 0x08, 0x90, 0x81, 0x90, 0xE0, 0x90, ++0x81, 0x87, 0xF0, 0x90, 0x05, 0x40, 0x74, 0x22, 0xF0, 0x80, 0x28, 0x71, 0xA6, 0x90, 0x81, 0x87, ++0xE0, 0xB4, 0x02, 0x06, 0x7D, 0x01, 0x7F, 0x04, 0x80, 0x0B, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x08, ++0x07, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x52, 0xD5, 0x12, 0x88, 0x90, 0x90, 0x81, 0x8F, 0x31, 0x91, ++0x12, 0x8A, 0x20, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0x7D, 0x12, 0x47, 0xEF, 0x90, 0x82, ++0x7C, 0xEF, 0xF0, 0x12, 0x47, 0xF8, 0x63, 0x47, 0x00, 0x63, 0x4C, 0x01, 0x63, 0x51, 0x02, 0x63, ++0x56, 0x12, 0x63, 0x5B, 0x14, 0x63, 0x60, 0x20, 0x63, 0x65, 0x21, 0x63, 0x6A, 0x23, 0x63, 0x6F, ++0x24, 0x63, 0x73, 0x25, 0x63, 0x78, 0x26, 0x63, 0x7C, 0x27, 0x63, 0x81, 0x40, 0x63, 0x86, 0x42, ++0x63, 0x8B, 0xC0, 0x00, 0x00, 0x63, 0x90, 0x71, 0xA0, 0x02, 0x6F, 0x16, 0x71, 0xA0, 0x02, 0x77, ++0xC3, 0x71, 0xA0, 0x02, 0x6D, 0xBB, 0x71, 0xA0, 0x02, 0x7F, 0xCD, 0x71, 0xA0, 0x02, 0x7F, 0xE1, ++0x71, 0xA0, 0x02, 0x6E, 0xAB, 0x71, 0xA0, 0x02, 0x6E, 0x42, 0x71, 0xA0, 0x02, 0x7F, 0xF0, 0x71, ++0xA0, 0x21, 0x98, 0x71, 0xA0, 0x02, 0x7F, 0xF8, 0x71, 0xA0, 0xC1, 0x64, 0x71, 0xA0, 0x02, 0x6E, ++0x20, 0x71, 0xA0, 0x02, 0x6D, 0xAB, 0x71, 0xA0, 0x02, 0x6E, 0x00, 0x71, 0xA0, 0x02, 0x80, 0x00, ++0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x82, 0x7C, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, ++0x90, 0x82, 0x7D, 0x02, 0x47, 0xE6, 0x75, 0x58, 0x01, 0x90, 0x05, 0x27, 0xE5, 0x58, 0xF0, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x86, 0xE0, 0x90, 0x82, 0xE7, 0xF0, 0x6F, ++0x70, 0x02, 0x81, 0xC8, 0xEF, 0x14, 0x60, 0x46, 0x14, 0x60, 0x73, 0x14, 0x70, 0x02, 0x81, 0x6D, ++0x14, 0x70, 0x02, 0x81, 0x9C, 0x24, 0x04, 0x60, 0x02, 0x81, 0xC8, 0x90, 0x82, 0xE7, 0xE0, 0xB4, ++0x04, 0x05, 0x12, 0x8A, 0x4A, 0x81, 0xC8, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0x8A, ++0x4F, 0x81, 0xC8, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0x8A, 0x46, 0x81, 0xC8, 0x90, ++0x82, 0xE7, 0xE0, 0x64, 0x01, 0x60, 0x02, 0x81, 0xC8, 0x12, 0x8A, 0x3E, 0x81, 0xC8, 0x90, 0x82, ++0xE7, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0x57, 0xE2, 0x81, 0xC8, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x02, ++0x05, 0x12, 0x57, 0xCB, 0x81, 0xC8, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0x8A, 0x54, ++0x81, 0xC8, 0x90, 0x82, 0xE7, 0xE0, 0x60, 0x02, 0x81, 0xC8, 0xF1, 0xE3, 0x81, 0xC8, 0x90, 0x82, ++0xE7, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0x57, 0xD4, 0x80, 0x7E, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x01, ++0x05, 0x12, 0x57, 0xBC, 0x80, 0x72, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0x57, 0xE9, ++0x80, 0x66, 0x90, 0x82, 0xE7, 0xE0, 0x70, 0x60, 0x12, 0x8A, 0x62, 0x80, 0x5B, 0x90, 0x82, 0xE7, ++0xE0, 0xB4, 0x04, 0x05, 0x12, 0x89, 0x55, 0x80, 0x4F, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x01, 0x05, ++0x12, 0x89, 0x6A, 0x80, 0x43, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0x89, 0x65, 0x80, ++0x37, 0x90, 0x82, 0xE7, 0xE0, 0x70, 0x31, 0x12, 0x89, 0x73, 0x80, 0x2C, 0x90, 0x82, 0xE7, 0xE0, ++0xB4, 0x03, 0x05, 0x12, 0x8A, 0x70, 0x80, 0x20, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x01, 0x05, 0x12, ++0x57, 0xEB, 0x80, 0x14, 0x90, 0x82, 0xE7, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0x8A, 0x68, 0x80, 0x08, ++0x90, 0x82, 0xE7, 0xE0, 0x70, 0x02, 0xF1, 0xE6, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x4E, 0xFF, 0xF0, ++0x12, 0x1F, 0xA4, 0xFE, 0x22, 0x4D, 0xFF, 0x90, 0x81, 0x83, 0xF0, 0xEE, 0x22, 0x90, 0x81, 0x83, ++0xE0, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x22, 0x90, 0x81, 0x89, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0x90, 0x05, 0x43, 0xE0, ++0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, 0x7D, 0x03, 0x7F, 0x02, 0x74, 0x45, 0x2F, 0xF8, ++0xE6, 0x4D, 0x02, 0x4F, 0xF3, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0xB1, 0x2E, ++0x43, 0x58, 0x08, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0xB1, 0x2E, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x3D, ++0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x02, 0x4F, 0xF7, 0x90, 0x05, 0x62, 0xE0, 0xFE, ++0x90, 0x05, 0x61, 0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, ++0x90, 0x81, 0xFD, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x4F, 0xE5, 0x60, 0x02, 0xC1, 0x18, 0x90, ++0x81, 0x8D, 0xE0, 0x70, 0x02, 0xC1, 0x18, 0xF1, 0x16, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, ++0xE0, 0x90, 0x81, 0x94, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x81, 0x93, 0xF0, 0xA3, 0xE0, 0xFF, ++0x70, 0x08, 0x90, 0x81, 0x93, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0x81, 0x94, 0xEF, 0xF0, 0x12, ++0x7B, 0xD5, 0xE4, 0x90, 0x81, 0x96, 0x12, 0x7F, 0x98, 0x12, 0x79, 0x6A, 0x12, 0x79, 0xB4, 0x54, ++0xEF, 0xF0, 0xF1, 0x16, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x0F, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, ++0x05, 0x12, 0x85, 0xF1, 0x80, 0x03, 0x12, 0x86, 0x64, 0x91, 0xF1, 0x30, 0xE0, 0x58, 0xEF, 0xC4, ++0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x21, 0xF1, 0x05, 0x6F, 0x70, 0x4A, 0x90, 0x81, 0x89, 0xE0, ++0x44, 0x40, 0xF0, 0x12, 0x8B, 0x72, 0x12, 0x4F, 0x42, 0xB1, 0x0C, 0x12, 0x4E, 0x03, 0xF1, 0xDB, ++0x90, 0x81, 0x94, 0xE0, 0x14, 0xF0, 0x80, 0x2E, 0x90, 0x81, 0x8B, 0xE0, 0xC4, 0x54, 0x0F, 0x64, ++0x01, 0x70, 0x23, 0xF1, 0x05, 0xFE, 0x6F, 0x60, 0x1D, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, ++0x60, 0x14, 0x90, 0x81, 0x89, 0x12, 0x7A, 0x08, 0x30, 0xE0, 0x0B, 0xEF, 0x54, 0xBF, 0x12, 0x4F, ++0x42, 0x12, 0x4F, 0xEE, 0xB1, 0x24, 0xD1, 0x24, 0x90, 0x81, 0x83, 0xE0, 0xC3, 0x13, 0x20, 0xE0, ++0x02, 0xD1, 0x24, 0x22, 0x90, 0x81, 0x89, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x01, 0x36, 0x74, ++0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0xB1, 0x2E, 0x7D, 0x02, 0x7F, 0x03, 0xB1, ++0x2E, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0x12, 0x7F, 0x98, 0xE4, 0xFF, 0xF1, 0x39, 0xBF, 0x01, ++0x10, 0xF1, 0xB4, 0x90, 0x81, 0x90, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, 0x7F, 0x04, 0x02, 0x52, ++0xD5, 0xD1, 0x24, 0x22, 0x90, 0x82, 0x80, 0x12, 0x47, 0xEF, 0xF1, 0x0D, 0xFF, 0x54, 0x01, 0xFE, ++0x90, 0x81, 0xF1, 0x12, 0x8A, 0x75, 0x91, 0xCE, 0x54, 0x04, 0x25, 0xE0, 0xFD, 0xEF, 0x54, 0xF7, ++0x4D, 0xFF, 0x90, 0x81, 0xF1, 0xF0, 0xEE, 0x54, 0x08, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, ++0xF0, 0x12, 0x6D, 0x6B, 0xFB, 0xFF, 0x90, 0x05, 0x54, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94, 0x00, ++0xFE, 0x7C, 0x00, 0x7D, 0x05, 0x12, 0x20, 0x30, 0x90, 0x81, 0xF3, 0xEF, 0xF0, 0xEB, 0x75, 0xF0, ++0x05, 0x84, 0xA3, 0xF0, 0xF1, 0x0D, 0x20, 0xE0, 0x0A, 0x12, 0x52, 0xB3, 0x90, 0x01, 0x57, 0xE4, ++0xF0, 0x80, 0x06, 0x12, 0x51, 0x9F, 0x12, 0x89, 0xD3, 0x12, 0x89, 0xDB, 0x20, 0xE0, 0x04, 0xEF, ++0x54, 0xDF, 0xF0, 0x12, 0x8B, 0x38, 0x30, 0xE0, 0x14, 0x90, 0x81, 0x8D, 0x74, 0x01, 0xF0, 0xE4, ++0x90, 0x81, 0x8F, 0xF0, 0xD1, 0x24, 0x90, 0x05, 0x58, 0x74, 0x05, 0xF0, 0x22, 0xE4, 0x90, 0x81, ++0x8D, 0xF0, 0x90, 0x81, 0x8F, 0x74, 0x0C, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, ++0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x81, 0x93, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x90, 0x82, 0x80, ++0x12, 0x47, 0xE6, 0x02, 0x1F, 0xA4, 0x90, 0x81, 0x8B, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0xAE, ++0x07, 0x91, 0xFC, 0xBF, 0x01, 0x10, 0x12, 0x77, 0xB9, 0x20, 0xE0, 0x0A, 0xAF, 0x06, 0x7D, 0x01, ++0x12, 0x52, 0xD5, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x12, 0x7A, 0x0F, 0x12, 0x78, 0xEF, 0xE0, ++0xFD, 0x7C, 0x00, 0x12, 0x69, 0xA9, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, ++0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0x91, 0xF1, 0x30, ++0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xF1, 0xDB, 0x12, 0x7A, 0x05, ++0x30, 0xE0, 0x09, 0x12, 0x79, 0xB1, 0x54, 0x07, 0x70, 0x39, 0x80, 0x35, 0x12, 0x7A, 0x2C, 0x40, ++0x30, 0x12, 0x4F, 0xE5, 0x70, 0x2D, 0x12, 0x6F, 0x66, 0x70, 0x05, 0x12, 0x7A, 0x45, 0x80, 0x24, ++0x12, 0x7A, 0x45, 0x90, 0x81, 0x97, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0xF1, ++0xB4, 0xE4, 0x90, 0x81, 0x97, 0xF0, 0x80, 0x03, 0x12, 0x56, 0x71, 0xE4, 0x90, 0x81, 0x96, 0xF0, ++0x22, 0x31, 0x83, 0x22, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x81, 0x87, 0xE0, ++0x64, 0x02, 0x22, 0x91, 0xE6, 0x30, 0xE0, 0x0B, 0xF1, 0xBC, 0x60, 0x07, 0x7D, 0x01, 0x7F, 0x02, ++0x12, 0x52, 0xD5, 0xF1, 0xBC, 0x60, 0x03, 0x12, 0x6F, 0xB8, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, ++0x4E, 0x07, 0x22, 0x02, 0x57, 0xCD, 0xF1, 0xE3, 0x02, 0x57, 0xEB, 0xE4, 0xFB, 0xFA, 0xFD, 0x7F, ++0x01, 0x12, 0x45, 0x4E, 0x90, 0x82, 0x7B, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x80, 0x3C, 0xE0, 0xFF, ++0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0A, 0x90, 0x80, 0x3C, 0xE0, ++0x54, 0xFE, 0xF0, 0x12, 0x5A, 0xBD, 0x11, 0x2F, 0x30, 0xE1, 0x05, 0x54, 0xFD, 0xF0, 0x11, 0x39, ++0x11, 0x2F, 0x30, 0xE2, 0x06, 0x54, 0xFB, 0xF0, 0x12, 0x80, 0x7D, 0xD2, 0xAF, 0x80, 0xCC, 0xD2, ++0xAF, 0xC2, 0xAF, 0x90, 0x80, 0x3C, 0xE0, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x80, 0xDD, 0xE0, 0xFF, 0x90, 0x80, 0xDC, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, ++0x7F, 0x00, 0xEF, 0x70, 0x3F, 0x90, 0x80, 0xDC, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x8C, ++0x12, 0x47, 0xDA, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x8D, 0xF9, 0x74, 0x80, 0x35, ++0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x63, 0x08, 0x90, 0x80, 0xDC, 0xF1, 0x73, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x80, 0xDC, 0xF0, 0x11, 0x99, 0x90, 0x80, 0x3C, ++0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, ++0x82, 0xDE, 0xF0, 0x90, 0x82, 0xDE, 0xE0, 0xFD, 0x70, 0x02, 0x21, 0x9D, 0x90, 0x80, 0xDC, 0xE0, ++0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x80, 0xDD, 0xE0, ++0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, ++0x44, 0x01, 0xF0, 0x22, 0x90, 0x82, 0xDC, 0xE0, 0x31, 0xA8, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x21, 0x7F, 0xE4, 0x90, 0x82, 0xDF, 0xF0, 0x90, ++0x82, 0xDF, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x37, 0x31, 0x9E, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, ++0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0xB1, 0x8C, 0x75, 0xF0, 0x08, 0x90, 0x80, ++0x8C, 0xB1, 0x9B, 0x31, 0x9E, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, 0xB1, 0x8C, ++0x75, 0xF0, 0x08, 0x90, 0x80, 0x90, 0xB1, 0x9B, 0x90, 0x82, 0xDF, 0xE0, 0x04, 0xF0, 0x80, 0xBF, ++0x90, 0x82, 0xDE, 0xE0, 0xFF, 0x90, 0x82, 0xDC, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, ++0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0x82, 0xDE, 0xF0, 0x90, 0x82, 0xDC, 0xE0, 0xFF, ++0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, ++0x82, 0xDC, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x80, 0xDD, 0xF1, 0x73, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x01, 0xA3, 0xE4, 0x90, 0x80, 0xDD, 0xF0, 0x01, 0xA3, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x82, 0xDC, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0xF0, ++0x31, 0x9E, 0x90, 0x01, 0xD0, 0x12, 0x47, 0xDA, 0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0x90, 0x82, ++0xDC, 0xE0, 0x75, 0xF0, 0x04, 0x22, 0x24, 0xF0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, ++0x22, 0x8F, 0x55, 0xEF, 0x75, 0xF0, 0x02, 0xA4, 0xFF, 0xAE, 0xF0, 0x24, 0x0C, 0xF9, 0x74, 0x94, ++0x3E, 0xFA, 0x7B, 0x01, 0x90, 0x82, 0x8E, 0x12, 0x47, 0xEF, 0x74, 0x01, 0x2F, 0xF9, 0x74, 0x8E, ++0x3E, 0xFA, 0x90, 0x82, 0x91, 0x12, 0x47, 0xEF, 0xE5, 0x55, 0xF1, 0xA9, 0x90, 0x82, 0x94, 0xF1, ++0x9D, 0x90, 0x82, 0x97, 0x12, 0x47, 0xEF, 0x74, 0x81, 0x25, 0x55, 0xF1, 0x95, 0xE0, 0x12, 0x47, ++0xF8, 0x6A, 0x16, 0x00, 0x6A, 0x20, 0x01, 0x6A, 0x2A, 0x02, 0x6A, 0x34, 0x03, 0x6A, 0x47, 0x04, ++0x6A, 0x51, 0x05, 0x6A, 0x5B, 0x06, 0x6A, 0x6B, 0x0C, 0x6A, 0x89, 0x0D, 0x6A, 0xA7, 0x0E, 0x6A, ++0xC5, 0x0F, 0x00, 0x00, 0x6A, 0xE8, 0x91, 0x8E, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x15, 0x80, 0x1B, ++0x91, 0x8E, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x10, 0x80, 0x11, 0x91, 0x8E, 0x74, 0xF0, 0xF0, 0xA3, ++0x74, 0x05, 0x80, 0x07, 0x91, 0x8E, 0x74, 0xF0, 0xF0, 0xA3, 0xE4, 0xF0, 0x91, 0xA4, 0x74, 0x0F, ++0xF0, 0xA3, 0x74, 0x8F, 0xF0, 0x41, 0xE8, 0x91, 0x8E, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xF5, 0x80, ++0x11, 0x91, 0x8E, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xF0, 0x80, 0x07, 0x91, 0x8E, 0xE4, 0xF0, 0xA3, ++0x74, 0x0D, 0xF0, 0x91, 0xA4, 0xE4, 0xF0, 0xA3, 0xF0, 0x80, 0x7D, 0x90, 0x04, 0x47, 0xE0, 0xFF, ++0x90, 0x82, 0x91, 0x91, 0x9C, 0x90, 0x04, 0x46, 0x91, 0xB2, 0x90, 0x04, 0x45, 0xE0, 0xFF, 0x90, ++0x82, 0x8E, 0x91, 0x9C, 0x90, 0x04, 0x44, 0x80, 0x58, 0x90, 0x04, 0x4B, 0xE0, 0xFF, 0x90, 0x82, ++0x91, 0x91, 0x9C, 0x90, 0x04, 0x4A, 0x91, 0xB2, 0x90, 0x04, 0x49, 0xE0, 0xFF, 0x90, 0x82, 0x8E, ++0x91, 0x9C, 0x90, 0x04, 0x48, 0x80, 0x3A, 0x90, 0x04, 0x4F, 0xE0, 0xFF, 0x90, 0x82, 0x91, 0x91, ++0x9C, 0x90, 0x04, 0x4E, 0x91, 0xB2, 0x90, 0x04, 0x4D, 0xE0, 0xFF, 0x90, 0x82, 0x8E, 0x91, 0x9C, ++0x90, 0x04, 0x4C, 0x80, 0x1C, 0x90, 0x04, 0x53, 0xE0, 0xFF, 0x90, 0x82, 0x91, 0x91, 0x9C, 0x90, ++0x04, 0x52, 0x91, 0xB2, 0x90, 0x04, 0x51, 0xE0, 0xFF, 0x90, 0x82, 0x8E, 0x91, 0x9C, 0x90, 0x04, ++0x50, 0xE0, 0xFF, 0x90, 0x82, 0x8E, 0x91, 0xB7, 0x90, 0x82, 0x91, 0x12, 0x47, 0xE6, 0xC0, 0x03, ++0xC0, 0x02, 0xC0, 0x01, 0xB1, 0x79, 0x12, 0x67, 0x10, 0x5F, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, ++0x12, 0x1F, 0xEA, 0x90, 0x82, 0x91, 0xB1, 0x81, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xB1, 0x79, ++0xB1, 0x68, 0x5F, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x1F, 0xEA, 0x90, 0x82, 0x8E, 0x12, ++0x47, 0xE6, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xB1, 0x71, 0x12, 0x67, 0x10, 0x5F, 0xD0, 0x01, ++0xD0, 0x02, 0xD0, 0x03, 0x12, 0x1F, 0xEA, 0x90, 0x82, 0x8E, 0xB1, 0x81, 0xC0, 0x03, 0xC0, 0x02, ++0xC0, 0x01, 0xB1, 0x71, 0xB1, 0x68, 0x5F, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x1F, 0xEA, ++0x91, 0xA4, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x2E, 0x90, 0x82, 0x8D, 0x74, 0x0B, 0xF0, 0xB1, ++0x61, 0x94, 0x00, 0x40, 0x5C, 0x31, 0xA9, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0x91, 0xA3, 0x12, 0x5F, 0xCD, 0x60, 0x08, 0x90, 0x82, 0x8D, 0xE0, 0x24, 0x10, 0x80, 0x3E, 0x90, ++0x82, 0x8D, 0xE0, 0x14, 0xF0, 0x80, 0xD8, 0x91, 0x8E, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x2C, ++0x90, 0x82, 0x8D, 0x74, 0x0F, 0xF0, 0xB1, 0x61, 0x94, 0x00, 0x40, 0x25, 0x31, 0xA9, 0x80, 0x05, ++0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x91, 0x8D, 0x12, 0x5F, 0xCD, 0x60, 0x06, 0x90, 0x82, ++0x8D, 0xE0, 0x80, 0x09, 0x90, 0x82, 0x8D, 0xE0, 0x14, 0xF0, 0x80, 0xDA, 0xE4, 0x90, 0x82, 0x9A, ++0xF0, 0x91, 0x8E, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x2B, 0xE4, 0x90, 0x82, 0x8D, 0xF0, 0xB1, ++0x61, 0x94, 0x10, 0x50, 0x5B, 0x31, 0xA9, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0x91, 0x8D, 0x12, 0x5F, 0xCD, 0x60, 0x06, 0x90, 0x82, 0x8D, 0xE0, 0x80, 0x3F, 0x90, 0x82, 0x8D, ++0xE0, 0x04, 0xF0, 0x80, 0xDA, 0x91, 0xA4, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x2D, 0xE4, 0x90, ++0x82, 0x8D, 0xF0, 0xB1, 0x61, 0x94, 0x0C, 0x50, 0x27, 0x31, 0xA9, 0x80, 0x05, 0xC3, 0x33, 0xCE, ++0x33, 0xCE, 0xD8, 0xF9, 0x91, 0xA3, 0x12, 0x5F, 0xCD, 0x60, 0x08, 0x90, 0x82, 0x8D, 0xE0, 0x24, ++0x10, 0x80, 0x09, 0x90, 0x82, 0x8D, 0xE0, 0x04, 0xF0, 0x80, 0xD8, 0xE4, 0x90, 0x82, 0x9B, 0xF0, ++0x90, 0x82, 0x9A, 0xE0, 0xFF, 0x75, 0xF0, 0x08, 0xE5, 0x55, 0x12, 0x5E, 0xE3, 0xEF, 0xF0, 0x90, ++0x82, 0x9B, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0xE5, 0x55, 0x12, 0x5F, 0xE2, 0xEE, 0xF0, 0x90, 0x81, ++0x81, 0xE0, 0xFD, 0xE5, 0x55, 0xC3, 0x9D, 0x50, 0x2A, 0x74, 0xB0, 0x25, 0x55, 0x12, 0x5F, 0xDA, ++0xE0, 0xD3, 0x9F, 0x40, 0x02, 0x80, 0x14, 0x74, 0xB0, 0x25, 0x55, 0x12, 0x5F, 0xDA, 0xE0, 0xC3, ++0x9E, 0x50, 0x08, 0x90, 0x82, 0x9B, 0xE0, 0xA3, 0xF0, 0x80, 0x08, 0x90, 0x82, 0x9A, 0xE0, 0x90, ++0x82, 0x9C, 0xF0, 0x90, 0x82, 0x9C, 0xE0, 0xFD, 0xAF, 0x55, 0x02, 0x5F, 0xE8, 0xFF, 0xE5, 0x55, ++0x25, 0xE0, 0x24, 0x0C, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0x22, 0x12, 0x47, 0xE6, 0xEF, ++0x02, 0x1F, 0xEA, 0xFF, 0xE5, 0x55, 0x25, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, ++0x83, 0x22, 0xE0, 0xFF, 0x90, 0x82, 0x91, 0x12, 0x47, 0xE6, 0x90, 0x00, 0x01, 0xEF, 0x02, 0x1F, ++0xFC, 0x90, 0x82, 0x80, 0xF1, 0xD1, 0x12, 0x47, 0xEF, 0xB1, 0x6B, 0x54, 0x0F, 0x90, 0x82, 0x85, ++0xB1, 0xF9, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x82, 0x86, 0xF0, 0x90, 0x82, 0x80, ++0xE0, 0xF1, 0xA9, 0x7B, 0x01, 0x90, 0x82, 0x87, 0xF1, 0x9D, 0x90, 0x82, 0x8A, 0x12, 0x47, 0xEF, ++0xB1, 0x5B, 0x90, 0x00, 0x06, 0x12, 0x1F, 0xBD, 0xFF, 0x90, 0x82, 0x8A, 0x91, 0x9C, 0xB1, 0x5B, ++0xF1, 0x6D, 0xFF, 0x90, 0x82, 0x8A, 0x91, 0xB7, 0xB1, 0x5B, 0xF1, 0x59, 0xFF, 0x90, 0x82, 0x87, ++0x91, 0x9C, 0xB1, 0x5B, 0xF1, 0x10, 0xFF, 0x90, 0x82, 0x87, 0x91, 0xB7, 0x90, 0x82, 0x85, 0xE0, ++0xFF, 0x90, 0x82, 0x80, 0xE0, 0xFE, 0x24, 0x81, 0xF1, 0x95, 0xEF, 0xF0, 0x90, 0x82, 0x81, 0xE0, ++0x54, 0x01, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x75, 0xF0, 0x08, 0xEE, 0x12, 0x8B, 0x10, 0x54, 0xDF, ++0x4F, 0xF0, 0x90, 0x82, 0x86, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0xFE, 0x90, 0x82, ++0x80, 0x12, 0x8B, 0x05, 0xE0, 0x54, 0xBF, 0x4E, 0xF0, 0x21, 0xB1, 0x90, 0x82, 0x82, 0x02, 0x47, ++0xE6, 0x90, 0x82, 0x8D, 0xE0, 0xFF, 0xC3, 0x22, 0x12, 0x47, 0xE6, 0x90, 0x00, 0x01, 0x02, 0x1F, ++0xBD, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x82, 0x94, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x82, 0x97, ++0x22, 0x12, 0x47, 0xE6, 0xE9, 0x24, 0x01, 0xF9, 0xE4, 0x3A, 0xFA, 0x22, 0x2F, 0xF5, 0x82, 0x74, ++0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x80, 0xDD, 0xE0, 0x22, 0x12, 0x47, 0xDA, 0xE5, 0x82, ++0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x54, 0x3F, ++0xFF, 0xB1, 0x6B, 0x54, 0x80, 0xF1, 0x8E, 0xFE, 0xFD, 0x81, 0xC1, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0xF1, 0xD8, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x82, 0xF0, 0xBF, 0x01, 0x08, 0xB1, ++0x6B, 0x64, 0x01, 0x60, 0x1F, 0x80, 0x1A, 0xAB, 0x55, 0xAA, 0x56, 0xA9, 0x57, 0xB1, 0x6B, 0x64, ++0x01, 0x60, 0x11, 0x90, 0x81, 0x83, 0xE0, 0x20, 0xE0, 0x07, 0xE4, 0xFF, 0x12, 0x63, 0xB0, 0x80, ++0x03, 0x12, 0x83, 0x4E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x1F, 0xBD, ++0x12, 0x1F, 0xA4, 0xFF, 0xC3, 0x94, 0x40, 0x50, 0x0C, 0xB1, 0xFA, 0xFE, 0x74, 0xCB, 0x2F, 0x12, ++0x8B, 0x82, 0xEE, 0xF0, 0x22, 0xEF, 0xB4, 0x40, 0x06, 0xB1, 0xFA, 0x90, 0x8F, 0x41, 0xF0, 0x22, ++0x12, 0x8B, 0x5A, 0x90, 0x81, 0xF5, 0x12, 0x8A, 0x75, 0xF0, 0xB1, 0x6B, 0x90, 0x81, 0xF6, 0xB1, ++0xF9, 0x90, 0x81, 0xF7, 0xF0, 0x12, 0x8B, 0x2E, 0x90, 0x81, 0xF5, 0xE0, 0x54, 0x01, 0xFF, 0x02, ++0x4E, 0xFA, 0xB1, 0xFA, 0xFF, 0x30, 0xE0, 0x1E, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xEA, 0xF0, 0xB1, ++0x6B, 0x90, 0x81, 0xEB, 0xF0, 0xEF, 0x54, 0xFE, 0xFF, 0xA3, 0xE0, 0x54, 0x01, 0x4F, 0xF0, 0xF1, ++0x10, 0x90, 0x81, 0xED, 0xF0, 0x22, 0x90, 0x81, 0xEA, 0x74, 0x02, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, ++0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x22, 0x90, 0x82, 0x83, 0x12, ++0x47, 0xEF, 0x12, 0x88, 0x51, 0x90, 0x81, 0x8D, 0xE0, 0xFF, 0x12, 0x78, 0x2F, 0x90, 0x81, 0x8D, ++0xE0, 0x60, 0x17, 0x90, 0x82, 0x83, 0xB1, 0x68, 0x54, 0x0F, 0xFF, 0xB1, 0xFA, 0xFD, 0x12, 0x89, ++0x11, 0x12, 0x7D, 0x9D, 0x74, 0x01, 0xF0, 0x12, 0x7A, 0x7B, 0x22, 0x90, 0x82, 0x80, 0x12, 0x47, ++0xEF, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0x8D, 0xF0, 0xEF, 0xF1, 0x8E, 0xA3, 0xF0, ++0xB1, 0x6B, 0xFF, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0x81, 0x8B, 0xE0, 0x54, 0xF0, 0x4E, ++0xF0, 0xF1, 0x10, 0x54, 0x01, 0x25, 0xE0, 0xFE, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFD, 0x4E, 0xF0, ++0xEF, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0xF1, 0x66, 0x4F, 0xB1, 0xF9, 0x90, 0x81, 0x8C, 0xF1, ++0x58, 0xFD, 0x7F, 0x02, 0x12, 0x51, 0xA3, 0x90, 0x82, 0x80, 0x12, 0x47, 0xE6, 0xD1, 0x7C, 0x12, ++0x87, 0x74, 0xF0, 0x90, 0x81, 0x8D, 0x12, 0x8A, 0xF8, 0xF1, 0x65, 0x90, 0x01, 0xBE, 0xF0, 0x22, ++0x90, 0x00, 0x03, 0x02, 0x1F, 0xBD, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x55, 0x12, 0x1F, 0xA4, 0x25, ++0x55, 0x90, 0x80, 0x85, 0xF0, 0xB1, 0x6B, 0x25, 0x55, 0x90, 0x80, 0x86, 0xB1, 0xF9, 0x25, 0x55, ++0x90, 0x80, 0x87, 0xF0, 0xF1, 0x10, 0x25, 0x55, 0x90, 0x80, 0x88, 0xF1, 0x58, 0x25, 0x55, 0x90, ++0x80, 0x89, 0xF0, 0xF1, 0x6D, 0x25, 0x55, 0x90, 0x80, 0x8A, 0xF0, 0x90, 0x00, 0x06, 0x12, 0x1F, ++0xBD, 0x25, 0x55, 0x90, 0x80, 0x8B, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x1F, 0xBD, 0x90, ++0x81, 0x91, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x81, 0x8B, 0xE0, 0x54, 0x0F, 0x22, 0x90, 0x00, 0x05, ++0x02, 0x1F, 0xBD, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0x22, 0x11, 0x99, 0x7F, 0x02, 0x8F, 0x0D, ++0x7F, 0x02, 0x12, 0x45, 0x27, 0x90, 0x80, 0x3C, 0xE0, 0x45, 0x0D, 0xF0, 0x22, 0xE0, 0xC4, 0x13, ++0x13, 0x13, 0x54, 0x01, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22, 0x12, 0x47, 0xEF, ++0x74, 0x47, 0x2F, 0xF9, 0x74, 0x8F, 0x3E, 0xFA, 0x22, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0xAE, 0xF0, ++0x24, 0x49, 0xF9, 0x74, 0x8F, 0x3E, 0xFA, 0x22, 0x90, 0x81, 0x8D, 0xE0, 0x64, 0x02, 0x60, 0x10, ++0xF1, 0x66, 0x60, 0x0C, 0x12, 0x88, 0x77, 0xEF, 0x70, 0x06, 0xFD, 0x7F, 0x0C, 0x12, 0x52, 0xD5, ++0x22, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x22, 0x8B, 0x55, 0x8A, 0x56, 0x89, 0x57, 0x22, 0x90, ++0x82, 0x9D, 0xF1, 0xD1, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x90, 0x82, 0xAB, 0xF0, ++0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x90, 0x82, 0xA3, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x9D, ++0xE0, 0xFB, 0x70, 0x04, 0x11, 0xC4, 0x80, 0x07, 0xEB, 0x11, 0xD3, 0xFF, 0x12, 0x2D, 0x5C, 0x90, ++0x82, 0xA7, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x9E, 0x12, 0x4B, 0x12, 0x78, 0x17, 0x12, 0x20, 0xBB, ++0xA8, 0x04, 0x31, 0x4C, 0x90, 0x82, 0xA7, 0x12, 0x47, 0x9D, 0xED, 0x54, 0x7F, 0xFD, 0xEC, 0x54, ++0x80, 0xFC, 0x12, 0x47, 0x7F, 0xEC, 0x44, 0x80, 0xFC, 0x90, 0x82, 0xA7, 0x12, 0x20, 0xCE, 0x11, ++0xC4, 0xEC, 0x54, 0x7F, 0xFC, 0x11, 0xCD, 0x11, 0xE5, 0x11, 0xD3, 0xFF, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x82, 0xA7, 0x11, 0xCA, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x2E, 0xA2, 0x11, 0xC4, 0xEC, 0x44, ++0x80, 0xFC, 0x11, 0xCD, 0x11, 0xE5, 0x70, 0x04, 0x7F, 0x20, 0x80, 0x09, 0x90, 0x82, 0x9D, 0xE0, ++0xB4, 0x01, 0x16, 0x7F, 0x28, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x78, 0x08, 0x12, 0x20, 0xA8, 0xEF, ++0x54, 0x01, 0xFF, 0xE4, 0x90, 0x82, 0xAB, 0xEF, 0xF0, 0x90, 0x82, 0xAB, 0xE0, 0x90, 0x82, 0x9D, ++0x60, 0x0E, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x80, 0x0C, ++0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x11, 0xDE, 0xFF, 0x12, ++0x2D, 0x5C, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x90, 0x82, 0x9F, 0x12, 0x20, 0xCE, 0x90, 0x82, ++0x9F, 0x02, 0x47, 0x9D, 0x90, 0x82, 0xA3, 0x02, 0x47, 0x9D, 0x12, 0x47, 0x9D, 0x90, 0x85, 0xBB, ++0x02, 0x20, 0xCE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xF5, 0x83, ++0xE0, 0xFE, 0xA3, 0xE0, 0x22, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x82, 0x9D, 0xE0, ++0x22, 0x90, 0x82, 0xAC, 0xEF, 0xF0, 0xAB, 0x05, 0x90, 0x82, 0xB2, 0x12, 0x20, 0xDA, 0x00, 0x00, ++0x00, 0x00, 0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x14, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0x31, ++0x4C, 0x90, 0x82, 0xAE, 0x12, 0x47, 0x9D, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x12, 0x47, 0x7F, ++0xEC, 0x54, 0x0F, 0xFC, 0x90, 0x82, 0xB2, 0x12, 0x20, 0xCE, 0x90, 0x82, 0xAC, 0xE0, 0x75, 0xF0, ++0x08, 0xA4, 0x24, 0x60, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x11, 0xDE, 0xFF, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x82, 0xB2, 0x11, 0xCA, 0xD0, 0x07, 0xD0, 0x06, 0x02, 0x2E, 0xA2, 0xA9, 0x05, 0xAA, 0x06, ++0xAB, 0x07, 0x22, 0x78, 0x10, 0x74, 0x01, 0xF2, 0x90, 0x02, 0x09, 0xE0, 0x78, 0x00, 0xF2, 0x08, ++0x74, 0x20, 0xF2, 0x18, 0xE2, 0xFF, 0x30, 0xE0, 0x05, 0x08, 0xE2, 0x24, 0x80, 0xF2, 0xEF, 0xC3, ++0x13, 0x90, 0xFD, 0x10, 0xF0, 0x78, 0x01, 0xE2, 0x91, 0xBD, 0x78, 0x03, 0xF2, 0x64, 0x04, 0x60, ++0x0D, 0xE2, 0xFF, 0x64, 0x08, 0x60, 0x07, 0xEF, 0x64, 0x0C, 0x60, 0x02, 0x61, 0x65, 0xE4, 0x78, ++0x02, 0xF2, 0x78, 0x03, 0xE2, 0xFF, 0x18, 0xE2, 0xC3, 0x9F, 0x50, 0x25, 0xE2, 0xFD, 0x18, 0xE2, ++0x2D, 0x90, 0x82, 0x18, 0xF0, 0xE0, 0xFF, 0x91, 0xBD, 0xFE, 0x74, 0x04, 0x2D, 0xF8, 0xEE, 0xF2, ++0xEF, 0xB4, 0xFF, 0x06, 0x90, 0xFD, 0x10, 0xE0, 0x04, 0xF0, 0x78, 0x02, 0xE2, 0x04, 0xF2, 0x80, ++0xD1, 0x78, 0x04, 0xE2, 0x78, 0x12, 0xF2, 0xFF, 0x78, 0x05, 0xE2, 0x78, 0x11, 0xF2, 0x78, 0x06, ++0xE2, 0x78, 0x13, 0xF2, 0x78, 0x07, 0xE2, 0x78, 0x14, 0xF2, 0x78, 0x08, 0xE2, 0x78, 0x33, 0xF2, ++0x78, 0x09, 0xE2, 0x78, 0x34, 0xF2, 0x78, 0x0A, 0xE2, 0x78, 0x35, 0xF2, 0x78, 0x0B, 0xE2, 0x78, ++0x36, 0xF2, 0x78, 0x0C, 0xE2, 0x78, 0x37, 0xF2, 0x78, 0x0D, 0xE2, 0x78, 0x38, 0xF2, 0x78, 0x0E, ++0xE2, 0x78, 0x39, 0xF2, 0x78, 0x0F, 0xE2, 0x78, 0x3A, 0xF2, 0xE4, 0x78, 0x15, 0xF2, 0xEF, 0x24, ++0xF8, 0x60, 0x56, 0x24, 0xFC, 0x60, 0x4D, 0x24, 0x08, 0x60, 0x02, 0x61, 0x47, 0x78, 0x11, 0xE2, ++0xB4, 0x01, 0x05, 0x12, 0x29, 0xC5, 0x61, 0x4C, 0x78, 0x11, 0xE2, 0xB4, 0x02, 0x05, 0x12, 0x11, ++0xBD, 0x61, 0x4C, 0x78, 0x11, 0xE2, 0xB4, 0x03, 0x05, 0x12, 0x4B, 0x19, 0x61, 0x4C, 0x78, 0x11, ++0xE2, 0xB4, 0x10, 0x07, 0x91, 0xE7, 0x12, 0x32, 0xAA, 0x61, 0x4C, 0x78, 0x11, 0xE2, 0xB4, 0x11, ++0x07, 0x91, 0xE7, 0x12, 0x32, 0x06, 0x61, 0x4C, 0x78, 0x11, 0xE2, 0xF4, 0x60, 0x02, 0x61, 0x4C, ++0x18, 0xF2, 0x61, 0x4C, 0x78, 0x15, 0x74, 0x01, 0xF2, 0x78, 0x11, 0xE2, 0x64, 0x07, 0x60, 0x02, ++0x61, 0x31, 0x78, 0x34, 0x71, 0x68, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xC0, 0x04, 0x31, 0x4C, 0x78, ++0x33, 0x71, 0x68, 0xD0, 0x00, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x78, 0x35, 0x71, 0x68, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, ++0x00, 0x91, 0x9C, 0x78, 0x15, 0xE2, 0x60, 0x73, 0x18, 0xE2, 0xFF, 0x18, 0xE2, 0xFD, 0xB1, 0x1C, ++0x78, 0x1C, 0x12, 0x47, 0xCE, 0x78, 0x38, 0x71, 0x68, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xC0, 0x04, ++0x31, 0x4C, 0x78, 0x37, 0x71, 0x68, 0xD0, 0x00, 0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0x78, 0x39, 0x71, 0x68, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0x12, 0x47, 0x7F, 0x78, 0x20, 0x12, 0x47, 0xCE, 0x78, 0x20, 0x12, 0x47, ++0xA9, 0x12, 0x20, 0x9B, 0x78, 0x1C, 0x12, 0x47, 0xC1, 0x12, 0x47, 0x72, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x78, 0x18, 0x12, 0x47, 0xA9, 0x78, 0x20, 0x12, 0x47, 0xC1, 0x12, 0x47, ++0x72, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x91, 0x9C, 0x78, 0x18, 0x12, 0x47, 0xA9, ++0x90, 0x82, 0xB8, 0x12, 0x20, 0xCE, 0x78, 0x13, 0xE2, 0xFD, 0x08, 0xE2, 0xFF, 0x91, 0xFA, 0x80, ++0x1B, 0x78, 0x13, 0xE2, 0xFF, 0x08, 0xE2, 0xFD, 0x78, 0x11, 0xE2, 0xFB, 0x78, 0x15, 0xE2, 0x90, ++0x82, 0x7A, 0xF0, 0x71, 0x6F, 0x80, 0x05, 0x78, 0x10, 0x74, 0x02, 0xF2, 0x78, 0x10, 0xE2, 0xFF, ++0xC3, 0x94, 0x02, 0x50, 0x10, 0xEF, 0x60, 0x0A, 0x78, 0x02, 0xE2, 0xFF, 0x18, 0xE2, 0x2F, 0xF2, ++0x21, 0x75, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xE2, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0xAC, ++0x07, 0xED, 0xAD, 0x04, 0x78, 0x24, 0xF2, 0xED, 0x08, 0xF2, 0xEB, 0xB4, 0x04, 0x07, 0x78, 0x27, ++0x74, 0x01, 0xF2, 0x80, 0x0E, 0xEB, 0x78, 0x27, 0xB4, 0x05, 0x05, 0x74, 0x02, 0xF2, 0x80, 0x03, ++0x74, 0x04, 0xF2, 0x91, 0xB4, 0x94, 0x00, 0x50, 0x44, 0xE4, 0x78, 0x26, 0xF2, 0x91, 0x85, 0x40, ++0x02, 0x81, 0x84, 0x91, 0x8F, 0x60, 0x1F, 0x74, 0x37, 0x2E, 0xF8, 0xE2, 0x78, 0x32, 0xF2, 0xEE, ++0xFF, 0x78, 0x25, 0xE2, 0x2F, 0xFF, 0x18, 0xE2, 0x34, 0x00, 0x8F, 0x82, 0xF5, 0x83, 0xE0, 0x78, ++0x29, 0xF2, 0x78, 0x32, 0x91, 0xD6, 0x78, 0x24, 0x08, 0xE2, 0xFF, 0x08, 0xE2, 0x2F, 0xFF, 0x78, ++0x28, 0xE2, 0xFD, 0x12, 0x32, 0x1E, 0x78, 0x26, 0xE2, 0x04, 0xF2, 0x80, 0xC0, 0x91, 0xB4, 0x94, ++0x07, 0x50, 0x2F, 0xE4, 0x78, 0x26, 0xF2, 0x91, 0x85, 0x40, 0x02, 0x81, 0x84, 0x91, 0x8F, 0x60, ++0x14, 0x78, 0x26, 0xE2, 0xFF, 0x91, 0xC8, 0xE0, 0x78, 0x29, 0xF2, 0x74, 0x37, 0x2F, 0xF8, 0xE2, ++0x78, 0x32, 0xF2, 0x91, 0xD6, 0x91, 0xAC, 0x91, 0xC8, 0xEF, 0xF0, 0x78, 0x26, 0xE2, 0x04, 0xF2, ++0x80, 0xD5, 0x90, 0x82, 0x7A, 0xE0, 0x60, 0x0A, 0x91, 0xA4, 0x12, 0x2D, 0x5C, 0x78, 0x2E, 0x12, ++0x47, 0xCE, 0xE4, 0x78, 0x26, 0xF2, 0x91, 0x85, 0x50, 0x4E, 0x91, 0x8F, 0x60, 0x2B, 0x78, 0x2E, ++0x12, 0x47, 0xA9, 0x78, 0x26, 0xE2, 0xFB, 0x75, 0xF0, 0x08, 0xA4, 0xF9, 0xF8, 0x12, 0x20, 0xA8, ++0x78, 0x29, 0xEF, 0xF2, 0x74, 0x37, 0x2B, 0xF8, 0xE2, 0x78, 0x32, 0xF2, 0xE2, 0xFE, 0xF4, 0x5F, ++0xFF, 0x78, 0x28, 0xE2, 0xFD, 0xEE, 0x5D, 0x4F, 0xF2, 0x91, 0xAC, 0xFD, 0xC3, 0x74, 0x03, 0x9D, ++0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x7B, 0xFE, 0x74, 0x2A, 0x2D, 0xF9, 0x74, 0x80, 0x3C, 0xFA, 0xEF, ++0x12, 0x1F, 0xEA, 0xE2, 0x04, 0xF2, 0x80, 0xAE, 0x78, 0x2A, 0x12, 0x47, 0xA9, 0x11, 0xCD, 0x91, ++0xA4, 0x12, 0x2E, 0xA2, 0x22, 0x78, 0x27, 0xE2, 0xFF, 0x18, 0xE2, 0xFE, 0xC3, 0x9F, 0x22, 0x74, ++0x33, 0x2E, 0xF8, 0xE2, 0x78, 0x28, 0xF2, 0x90, 0x82, 0x7A, 0xE0, 0x22, 0x12, 0x47, 0x7F, 0x78, ++0x18, 0x02, 0x47, 0xCE, 0x78, 0x24, 0xE2, 0xFE, 0x08, 0xE2, 0xFF, 0x22, 0x78, 0x28, 0xE2, 0xFF, ++0x78, 0x26, 0xE2, 0x22, 0xD3, 0x78, 0x25, 0xE2, 0x94, 0xFF, 0x18, 0xE2, 0x22, 0x24, 0x00, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xFD, 0x18, 0xE2, 0x2D, 0xFD, 0x18, 0xE2, 0x34, ++0x00, 0x8D, 0x82, 0xF5, 0x83, 0x22, 0xE2, 0xFF, 0xF4, 0xFE, 0x78, 0x29, 0xE2, 0x5E, 0xFE, 0x18, ++0xE2, 0xFD, 0xEF, 0x5D, 0x4E, 0xF2, 0x22, 0x78, 0x14, 0xE2, 0xFE, 0x18, 0xE2, 0xFD, 0xED, 0xFF, ++0x78, 0x16, 0xEE, 0xF2, 0xFE, 0x08, 0xEF, 0xF2, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0xC0, 0x07, 0xC0, 0x05, 0x90, 0x82, 0xB8, 0x12, 0x47, 0x9D, 0x90, 0x82, 0xAE, 0x12, 0x20, ++0xCE, 0xD0, 0x05, 0xD0, 0x07, 0x11, 0xF1, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x12, 0x6F, 0xDF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x12, 0x2D, 0xA7, 0xE4, 0xF5, 0x54, 0x12, 0x32, 0x9E, 0xEF, 0x60, 0x72, 0x63, 0x54, ++0x01, 0xE5, 0x54, 0x24, 0x2B, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x75, 0xA3, 0xF0, 0x90, 0x00, 0x88, ++0xE0, 0xF5, 0x52, 0xF5, 0x53, 0x54, 0x0F, 0x60, 0xDF, 0xE5, 0x52, 0x30, 0xE0, 0x0B, 0x20, 0xE4, ++0x03, 0x12, 0x29, 0xC5, 0x53, 0x53, 0xEE, 0x80, 0x3E, 0xE5, 0x52, 0x30, 0xE1, 0x16, 0x20, 0xE5, ++0x0E, 0x12, 0x11, 0xBD, 0xEF, 0x70, 0x03, 0x43, 0x53, 0x20, 0x90, 0x01, 0x06, 0xE4, 0xF0, 0x53, ++0x53, 0xFD, 0x80, 0x23, 0xE5, 0x52, 0x30, 0xE2, 0x0B, 0x20, 0xE6, 0x03, 0x12, 0x4B, 0x19, 0x53, ++0x53, 0xFB, 0x80, 0x13, 0xE5, 0x52, 0x30, 0xE3, 0x0E, 0x20, 0xE7, 0x08, 0x31, 0x53, 0xEF, 0x70, ++0x03, 0x43, 0x53, 0x80, 0x53, 0x53, 0xF7, 0xAD, 0x53, 0x7F, 0x88, 0x12, 0x32, 0x1E, 0x80, 0x88, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0xE0, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x45, 0x27, 0x90, ++0x80, 0x3C, 0xE0, 0xFF, 0x90, 0x82, 0xE0, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x80, 0x3C, 0xF0, 0x22, ++0xAD, 0x07, 0x90, 0x82, 0x8B, 0x74, 0x13, 0xF0, 0x90, 0x82, 0x99, 0x74, 0x0C, 0xF0, 0x90, 0x82, ++0x8D, 0xED, 0xF0, 0x12, 0x5D, 0x34, 0xD1, 0x3C, 0x90, 0x82, 0x8E, 0xF0, 0xA3, 0xEB, 0xF0, 0xED, ++0xD1, 0x4D, 0xD1, 0x3C, 0x90, 0x82, 0x90, 0xD1, 0x43, 0x90, 0x89, 0x00, 0xD1, 0x39, 0x90, 0x82, ++0x92, 0xD1, 0x43, 0x90, 0x89, 0x02, 0xD1, 0x39, 0x90, 0x82, 0x94, 0xD1, 0x43, 0x90, 0x89, 0x04, ++0x12, 0x47, 0xDA, 0xE0, 0x90, 0x82, 0x96, 0xF0, 0x75, 0xF0, 0x0A, 0xED, 0x90, 0x89, 0x06, 0x12, ++0x47, 0xDA, 0xE0, 0x90, 0x82, 0x97, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x89, 0x08, 0x12, 0x47, ++0xDA, 0xE0, 0x90, 0x82, 0x98, 0xF1, 0x7D, 0xA1, 0xB5, 0x12, 0x47, 0xDA, 0xE0, 0xFA, 0xA3, 0xE0, ++0xFB, 0xEA, 0x22, 0xF0, 0xA3, 0xEB, 0xF0, 0x75, 0xF0, 0x0A, 0xED, 0x22, 0xEF, 0x25, 0xE0, 0x24, ++0x80, 0xF5, 0x82, 0xE4, 0x34, 0x8C, 0xF5, 0x83, 0x22, 0x90, 0x81, 0xFD, 0xE5, 0xD1, 0xF0, 0xA3, ++0xE5, 0xD2, 0xF0, 0xA3, 0xE5, 0xD3, 0xF0, 0xA3, 0xE5, 0xD4, 0xF0, 0xA3, 0xE5, 0xD5, 0xF0, 0xA3, ++0xE5, 0xD6, 0xF0, 0xA3, 0xE5, 0xD7, 0xF0, 0xA3, 0xE5, 0xD9, 0xF0, 0x75, 0x13, 0x01, 0x75, 0x14, ++0x81, 0x75, 0x15, 0xFD, 0x75, 0x16, 0x08, 0x7B, 0x01, 0x7A, 0x91, 0x79, 0x43, 0x12, 0x2B, 0xED, ++0x90, 0x91, 0x44, 0xE0, 0xFF, 0x12, 0x6F, 0x8E, 0x30, 0xE0, 0x02, 0xE1, 0x57, 0xEF, 0x54, 0x3F, ++0xFF, 0x90, 0x82, 0x05, 0xF0, 0x90, 0x91, 0x45, 0xE0, 0x54, 0x3F, 0xFE, 0x90, 0x82, 0x06, 0xF1, ++0x58, 0xFD, 0xD1, 0x4C, 0xF1, 0x60, 0xD3, 0x94, 0x04, 0x40, 0x06, 0x90, 0x82, 0x06, 0x74, 0x04, ++0xF0, 0x90, 0x91, 0x44, 0xF1, 0xBC, 0x30, 0xE0, 0x6C, 0x90, 0x82, 0x05, 0xE0, 0xF1, 0x68, 0xC0, ++0x83, 0xC0, 0x82, 0x90, 0x82, 0x06, 0xE0, 0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x02, 0x12, 0x47, ++0xDA, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF1, 0x59, 0x2F, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x82, 0x05, ++0xE0, 0xFC, 0xF1, 0x68, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0x82, 0x06, 0xE0, 0xFB, 0xD0, 0x82, 0xD0, ++0x83, 0x75, 0xF0, 0x02, 0x12, 0x47, 0xDA, 0xEE, 0xF0, 0xA3, 0xEF, 0xF1, 0x58, 0xFA, 0xFF, 0xEC, ++0x25, 0xE0, 0xF1, 0xB1, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x46, 0x9F, 0x90, 0x91, 0x46, 0xE0, ++0xFD, 0x12, 0x6F, 0x8E, 0x30, 0xE0, 0x30, 0x90, 0x82, 0x05, 0xE0, 0xFF, 0xED, 0x54, 0x7F, 0xFD, ++0x8A, 0x51, 0x02, 0x87, 0xFF, 0xF1, 0x59, 0xFD, 0x90, 0x82, 0x05, 0xE0, 0xFE, 0xF1, 0x71, 0xF1, ++0x60, 0xF1, 0x71, 0xA3, 0xE0, 0x90, 0x07, 0x00, 0xF0, 0x90, 0x91, 0x46, 0x12, 0x6F, 0x8D, 0x30, ++0xE0, 0x05, 0xAF, 0x06, 0x12, 0x5E, 0xAA, 0x22, 0xF0, 0x90, 0x91, 0x47, 0xE0, 0x54, 0x1F, 0x22, ++0xE4, 0x8D, 0xF0, 0x12, 0x46, 0x9F, 0xEE, 0x22, 0x75, 0xF0, 0x0A, 0x90, 0x89, 0x00, 0x02, 0x47, ++0xDA, 0x25, 0xE0, 0x24, 0x4B, 0xF5, 0x82, 0xE4, 0x34, 0x91, 0xF5, 0x83, 0x22, 0xF0, 0x7B, 0x01, ++0x7A, 0x82, 0x79, 0x8B, 0x12, 0x80, 0xF1, 0x7F, 0x04, 0x22, 0x90, 0x82, 0x8B, 0x74, 0x12, 0xF0, ++0x90, 0x82, 0x99, 0x74, 0x05, 0xF0, 0x90, 0x82, 0x8D, 0x12, 0x6F, 0xD1, 0xEB, 0xF0, 0x90, 0x82, ++0x89, 0xE0, 0x90, 0x82, 0x90, 0xF0, 0x90, 0x82, 0x8A, 0xE0, 0x90, 0x82, 0x91, 0xF1, 0x7D, 0xA1, ++0xB5, 0x24, 0xCB, 0xF5, 0x82, 0xE4, 0x34, 0x91, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x22, 0x12, 0x6F, 0xD8, 0x12, 0x6D, 0x6B, 0xFF, 0xF5, 0x59, 0x12, 0x1F, 0xA4, 0xFE, ++0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x6D, 0xFA, 0xF5, 0x5A, 0x80, 0x02, 0x8F, 0x5A, 0x85, 0x59, ++0x58, 0xE5, 0x58, 0xD3, 0x95, 0x5A, 0x50, 0x25, 0xAB, 0x55, 0xAA, 0x56, 0xA9, 0x57, 0x12, 0x1F, ++0xA4, 0x54, 0x01, 0xFD, 0xAF, 0x58, 0x12, 0x78, 0xB4, 0xAF, 0x58, 0x12, 0x67, 0x39, 0xEF, 0xAF, ++0x58, 0x70, 0x04, 0x31, 0x52, 0x80, 0x02, 0x31, 0x51, 0x05, 0x58, 0x80, 0xD4, 0xE5, 0x59, 0x70, ++0x0F, 0xFF, 0x12, 0x67, 0x39, 0xEF, 0x70, 0x08, 0x11, 0x21, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, ++0x22, 0x12, 0x56, 0x16, 0x12, 0x56, 0x00, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0xEF, ++0x70, 0x35, 0x7D, 0x78, 0x7F, 0x02, 0x12, 0x4E, 0x07, 0x7D, 0x02, 0x7F, 0x03, 0x12, 0x4E, 0x07, ++0x7D, 0xC8, 0x7F, 0x02, 0x12, 0x4F, 0xEE, 0x31, 0x6A, 0xF0, 0xE4, 0xFF, 0x12, 0x67, 0x39, 0xEF, ++0x70, 0x0A, 0x11, 0x21, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x07, 0x7D, 0x01, 0x7F, 0x0C, ++0x12, 0x52, 0xD5, 0x11, 0x27, 0x21, 0x58, 0x02, 0x66, 0x2C, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x0E, ++0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x02, 0x80, 0x06, 0x11, 0x27, 0x12, 0x61, 0x83, 0x22, 0x31, ++0x60, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, 0x90, ++0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xEC, 0xE0, 0xC3, 0x13, 0x54, 0x7F, ++0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12, 0x51, 0x36, 0x90, 0x81, 0x88, 0xE0, ++0x44, 0x08, 0xF0, 0x22, 0x51, 0x0F, 0xED, 0x70, 0x12, 0x11, 0xEF, 0xC0, 0x83, 0xC0, 0x82, 0x11, ++0xE7, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x0F, 0x11, 0xEF, 0xC0, 0x83, 0xC0, ++0x82, 0x11, 0xE7, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x11, ++0xFA, 0x90, 0x81, 0x81, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x74, ++0x79, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x7D, 0x08, 0xED, 0x14, 0xF9, 0x24, 0x79, 0x11, 0xF2, 0xE0, 0x60, 0x3B, 0x7C, 0x08, 0xEC, ++0x14, 0x90, 0x82, 0xE1, 0xF0, 0x74, 0x79, 0x29, 0x11, 0xF2, 0xE0, 0xFB, 0x7A, 0x00, 0x90, 0x82, ++0xE1, 0xE0, 0x12, 0x69, 0xA8, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, ++0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x60, 0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0x82, 0xE1, ++0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, 0xDC, 0xC7, 0xDD, 0xB9, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x22, 0x22, 0xE4, 0xFD, 0xFF, 0x01, 0xB4, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, ++0x90, 0x81, 0x88, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, ++0x01, 0x3C, 0x74, 0x02, 0x22, 0x12, 0x4F, 0xE5, 0x70, 0x16, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x10, ++0x31, 0x6A, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x31, 0xB2, 0x54, 0x07, 0x70, 0x03, 0x12, 0x61, 0x83, ++0x22, 0x90, 0x01, 0x57, 0xE0, 0x60, 0x19, 0x31, 0x6D, 0xF0, 0x51, 0x05, 0x30, 0xE0, 0x02, 0x80, ++0x10, 0x51, 0x2C, 0x40, 0x0B, 0xE4, 0xFF, 0x12, 0x67, 0x39, 0xBF, 0x01, 0x03, 0x12, 0x67, 0xB4, ++0x22, 0xEF, 0x54, 0xFB, 0xF0, 0x90, 0x81, 0x91, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x81, 0x83, ++0xE0, 0xFF, 0x30, 0xE0, 0x3F, 0x90, 0x81, 0x87, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, ++0x90, 0x81, 0x86, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x25, 0xEF, ++0xC3, 0x13, 0x30, 0xE0, 0x03, 0x02, 0x83, 0x4E, 0x31, 0x91, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x0C, ++0x06, 0xE4, 0xFD, 0x7F, 0x08, 0x80, 0x0A, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x04, 0x06, 0xE4, 0xFD, ++0xFF, 0x12, 0x52, 0xD5, 0x22, 0x90, 0x81, 0x88, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0xEF, ++0x13, 0x13, 0x13, 0x54, 0x1F, 0xFE, 0xEF, 0x54, 0x07, 0xFF, 0x22, 0x12, 0x4F, 0xE5, 0x70, 0x0B, ++0x90, 0x81, 0x8D, 0xE0, 0x60, 0x05, 0x31, 0x6A, 0x12, 0x51, 0x25, 0x22, 0x90, 0x81, 0x96, 0xE0, ++0x04, 0xF0, 0x90, 0x81, 0x91, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x81, 0xEA, 0xE0, 0xFF, 0x90, 0x81, ++0x96, 0xE0, 0xD3, 0x9F, 0x22, 0x51, 0x39, 0x40, 0x31, 0x90, 0x81, 0xA7, 0xE0, 0x04, 0xF0, 0x90, ++0x81, 0xE9, 0xE0, 0xFF, 0x90, 0x81, 0xA7, 0xE0, 0xD3, 0x9F, 0x50, 0x1E, 0x90, 0x81, 0x9F, 0xE0, ++0x04, 0xF0, 0x12, 0x4E, 0xE9, 0x90, 0x81, 0xA6, 0xF0, 0xFB, 0x90, 0x81, 0x9F, 0xE0, 0xFF, 0xA3, ++0xE0, 0xFD, 0x90, 0x82, 0xD4, 0x74, 0x04, 0xF0, 0x51, 0x7B, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0xAC, 0x07, 0x90, 0x81, 0x89, 0x12, 0x6F, 0x8D, 0x30, 0xE0, 0x02, 0x61, 0x34, 0x90, ++0x81, 0x88, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x81, 0xAA, 0xE0, 0x24, 0x04, 0x90, 0x81, 0xA2, 0xF0, ++0x90, 0x81, 0xAA, 0xE0, 0x24, 0x03, 0x90, 0x81, 0xA1, 0xF0, 0x80, 0x0D, 0x90, 0x81, 0xA2, 0x74, ++0x02, 0xF0, 0x90, 0x81, 0xA1, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x81, 0xA1, 0xE0, 0xFA, 0x90, 0x81, ++0xA0, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x81, 0x95, 0xEB, 0xF0, 0x90, 0x81, 0xA2, 0xE0, 0xC3, ++0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x81, 0x95, 0xF0, 0x90, 0x81, 0xA1, 0xE0, ++0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x81, 0xA5, 0xF0, 0x90, 0x81, 0xA2, 0xE0, 0xFF, 0x24, 0x0A, ++0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0xA5, 0x71, 0x40, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, ++0x81, 0xA5, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0x95, 0x71, 0x40, 0x40, ++0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x81, 0xA5, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x81, 0x99, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0xF1, 0x99, ++0xF1, 0x90, 0x80, 0x07, 0x90, 0x81, 0x8A, 0xE0, 0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0x71, 0x93, 0x90, 0x82, 0x0B, ++0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x51, 0xA3, ++0x90, 0x82, 0x0B, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, ++0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x90, 0x04, 0xEC, 0x30, ++0xE0, 0x06, 0xE0, 0x54, 0xDD, 0xF0, 0x80, 0x04, 0xE0, 0x44, 0x22, 0xF0, 0xB1, 0x9D, 0x74, 0x02, ++0xF0, 0x41, 0x7B, 0xE4, 0x90, 0x82, 0x0C, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x00, 0x83, 0xE0, ++0x90, 0x82, 0x0C, 0xF0, 0x90, 0x00, 0x83, 0xE0, 0xFE, 0x90, 0x82, 0x0C, 0xE0, 0xFF, 0xB5, 0x06, ++0x01, 0x22, 0xC3, 0x90, 0x82, 0x0E, 0xE0, 0x94, 0x64, 0x90, 0x82, 0x0D, 0xE0, 0x94, 0x00, 0x40, ++0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x82, 0x0C, 0xE0, 0xFF, 0x22, 0x90, 0x82, ++0x0D, 0xB1, 0xDD, 0x80, 0xC7, 0xE4, 0x90, 0x81, 0xFF, 0xF0, 0xA3, 0xF0, 0xA3, 0x12, 0x4A, 0xF8, ++0x12, 0x47, 0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x4B, ++0x12, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x47, ++0x7F, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x4B, 0x12, 0x78, 0x18, 0x12, ++0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x47, 0x7F, 0x90, 0x81, 0xDC, ++0x12, 0x20, 0xCE, 0x90, 0x81, 0xE0, 0x12, 0x47, 0x9D, 0x90, 0x81, 0xDC, 0x12, 0x47, 0xB5, 0xC3, ++0x12, 0x47, 0x8C, 0x40, 0x3F, 0x90, 0x81, 0x88, 0xE0, 0x90, 0x81, 0xE0, 0x30, 0xE0, 0x0F, 0xB1, ++0x80, 0x90, 0x81, 0xAA, 0xE0, 0x24, 0x04, 0x2F, 0xFF, 0x90, 0x81, 0xE4, 0x80, 0x05, 0xB1, 0x80, ++0x90, 0x81, 0xE5, 0xE0, 0xFE, 0xC3, 0xEF, 0x9E, 0x90, 0x82, 0x00, 0xF0, 0x90, 0x82, 0x00, 0xE0, ++0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x0E, 0x74, 0xAB, 0x2F, 0xB1, 0xD5, 0xE0, 0x04, 0xF0, 0x90, 0x81, ++0xA3, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0xA3, 0xE0, 0xFF, 0xD3, 0x90, 0x81, 0xE7, 0xE0, 0x9F, 0x90, ++0x81, 0xE6, 0xE0, 0x94, 0x00, 0x40, 0x02, 0xA1, 0x4C, 0xB1, 0x5E, 0xB1, 0x55, 0x50, 0x1C, 0xB1, ++0x68, 0x90, 0x82, 0x01, 0xE0, 0xD3, 0x9F, 0x40, 0x0A, 0x90, 0x81, 0xFF, 0xE0, 0x90, 0x82, 0x02, ++0xF0, 0x80, 0x08, 0x90, 0x81, 0xFF, 0xE0, 0x04, 0xF0, 0x80, 0xE0, 0xB1, 0x5E, 0xB1, 0x55, 0x50, ++0x2C, 0xB1, 0x68, 0xC3, 0x90, 0x81, 0xE7, 0xE0, 0x9F, 0xFF, 0x90, 0x81, 0xE6, 0xE0, 0x94, 0x00, ++0xFE, 0x90, 0x82, 0x01, 0xE0, 0xD3, 0x9F, 0xE4, 0x9E, 0x40, 0x0A, 0x90, 0x81, 0xFF, 0xE0, 0x90, ++0x82, 0x03, 0xF0, 0x80, 0x08, 0x90, 0x81, 0xFF, 0xE0, 0x04, 0xF0, 0x80, 0xD0, 0x90, 0x82, 0x02, ++0xE0, 0x90, 0x81, 0xA8, 0xF0, 0x90, 0x82, 0x03, 0xE0, 0x90, 0x81, 0xA9, 0xB1, 0x4D, 0x94, 0x0A, ++0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, 0x81, 0xA0, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x81, 0xA0, ++0xB1, 0x4D, 0x74, 0x0A, 0x9F, 0x90, 0x81, 0x9F, 0xF0, 0x90, 0x81, 0xA8, 0xE0, 0xFF, 0xA3, 0xE0, ++0xC3, 0x9F, 0x90, 0x81, 0xA6, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x81, 0xE4, ++0x80, 0x03, 0x90, 0x81, 0xE5, 0xE0, 0xFF, 0x90, 0x81, 0xA6, 0xE0, 0x2F, 0x04, 0xF0, 0x90, 0x81, ++0xA6, 0xE0, 0xC3, 0x94, 0x0A, 0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x81, 0xA6, 0xE0, 0x24, 0x02, ++0xF0, 0xB1, 0x9D, 0x74, 0x03, 0xF0, 0x51, 0x7B, 0xE4, 0xFF, 0xB1, 0xAE, 0x22, 0xF0, 0x90, 0x81, ++0xA8, 0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x81, 0xFF, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x22, 0xE4, 0x90, ++0x82, 0x01, 0xF0, 0x90, 0x81, 0xFF, 0xF0, 0x22, 0x74, 0xAB, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x81, ++0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x82, 0x01, 0xE0, 0x2F, 0xF0, 0x90, 0x81, 0xE8, 0xE0, 0xFF, 0x22, ++0x12, 0x47, 0xB5, 0x90, 0x81, 0xDC, 0x12, 0x47, 0x9D, 0x12, 0x47, 0x64, 0x78, 0x0A, 0x12, 0x20, ++0xA8, 0x90, 0x81, 0xA5, 0xE0, 0xFE, 0xC3, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x22, 0x90, 0x81, 0x9F, ++0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x81, 0xA6, 0xE0, 0xFB, 0x90, 0x82, 0xD4, 0x22, 0xE4, 0xFE, ++0x74, 0xAB, 0x2E, 0xB1, 0xD5, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF4, 0xE4, 0x90, 0x81, 0xA4, ++0xF0, 0x90, 0x81, 0xA3, 0xF0, 0x90, 0x81, 0xA7, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0x2D, ++0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0xE4, 0x75, 0xF0, ++0x01, 0x02, 0x46, 0x9F, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xC1, 0xEE, 0xF0, ++0xA3, 0xD1, 0x7C, 0x90, 0x82, 0xC1, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x60, ++0x28, 0xC3, 0x90, 0x82, 0xC4, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0xC3, 0xE0, 0x94, 0x03, 0x40, 0x0B, ++0x90, 0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x10, 0x90, 0x82, 0xC3, 0xB1, 0xDD, ++0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x80, 0xCA, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0x82, 0x18, 0xD1, 0x7C, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, ++0x90, 0x82, 0x18, 0xE0, 0x6F, 0x60, 0x34, 0xC3, 0x90, 0x82, 0x1A, 0xE0, 0x94, 0x88, 0x90, 0x82, ++0x19, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x82, ++0x19, 0xB1, 0xDD, 0xF1, 0x81, 0xD3, 0x90, 0x82, 0x1A, 0xE0, 0x94, 0x32, 0x90, 0x82, 0x19, 0xE0, ++0x94, 0x00, 0x40, 0xC1, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xBA, 0x22, 0xEF, 0xF0, 0xE4, 0xA3, ++0xF0, 0xA3, 0xF0, 0x22, 0xF1, 0xB0, 0x90, 0x00, 0x08, 0xE0, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, ++0x32, 0x1E, 0xE4, 0xFF, 0xD1, 0x30, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0xE6, 0xD1, 0x84, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, ++0x90, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0D, 0xF1, 0x32, 0xBF, 0x01, 0x08, 0xD1, 0x9E, 0x90, ++0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x88, 0xE0, 0x30, 0xE0, 0x18, 0x90, 0x81, 0x83, ++0xE0, 0xFF, 0x30, 0xE0, 0x0E, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0xF1, 0xA3, 0xBF, 0x01, 0x06, 0x80, ++0x02, 0x80, 0x00, 0xD1, 0xAE, 0x22, 0x90, 0x81, 0x89, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x81, 0x98, ++0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x32, 0x1E, 0x90, 0x81, 0x8E, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, ++0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, ++0x00, 0x08, 0xE0, 0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, 0x7F, 0x01, 0xD1, 0x30, 0x90, ++0x00, 0x90, 0xE0, 0x44, 0x01, 0xFD, 0x7F, 0x90, 0x12, 0x32, 0x1E, 0x7F, 0x14, 0x7E, 0x00, 0x02, ++0x32, 0xAA, 0x90, 0x81, 0xF5, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x35, 0x90, 0x02, 0x87, 0xE0, 0x60, ++0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, 0x75, 0x52, 0x01, 0x80, 0x22, ++0x90, 0x02, 0x96, 0xE0, 0x60, 0x05, 0x75, 0x52, 0x10, 0x80, 0x17, 0x90, 0x02, 0x86, 0xE0, 0x20, ++0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x52, 0x04, 0x80, 0x02, ++0x80, 0x16, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x52, 0xF0, 0x7F, 0x00, ++0x22, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x22, ++0x90, 0x81, 0x8A, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xF0, 0x90, 0x81, 0x99, 0xA3, 0xE0, 0x90, 0x05, ++0x58, 0xF0, 0x22, 0x90, 0x81, 0x86, 0xE0, 0x64, 0x02, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, ++0x90, 0x01, 0xC4, 0x74, 0xB0, 0xF0, 0x74, 0x7F, 0xA3, 0xF0, 0x90, 0x00, 0x90, 0xE0, 0x20, 0xE0, ++0xF9, 0x74, 0xB0, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x7F, 0xA3, 0xF0, 0x22, 0x12, 0x1F, 0xA4, ++0xFF, 0x90, 0x81, 0x78, 0xF0, 0xBF, 0x01, 0x08, 0x12, 0x81, 0x4F, 0xE4, 0x90, 0x81, 0x78, 0xF0, ++0x22, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFF, 0x90, 0x81, 0xFC, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, ++0x12, 0x1F, 0xA4, 0x90, 0x81, 0x98, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xF0, 0xF0, 0x22, ++0x12, 0x1F, 0xA4, 0x90, 0x81, 0xFA, 0xF0, 0x12, 0x6D, 0x6B, 0x90, 0x81, 0xFB, 0xF0, 0x22, 0xE4, ++0x90, 0x81, 0x74, 0xF0, 0xA3, 0xF0, 0x90, 0x80, 0xDC, 0xF0, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0x7C, 0x12, 0x47, 0xEF, 0x90, 0x82, 0xDD, 0xE0, 0xFF, 0x04, ++0xF0, 0x12, 0x6C, 0xBA, 0x7F, 0xAF, 0x7E, 0x01, 0x12, 0x7D, 0xE4, 0xEF, 0x60, 0x3A, 0x90, 0x82, ++0x7C, 0x12, 0x47, 0xE6, 0x8B, 0x13, 0x8A, 0x14, 0x89, 0x15, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, ++0x24, 0x02, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, 0x2B, 0xED, 0x90, 0x82, 0x7C, ++0x12, 0x47, 0xE6, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x90, 0x01, 0xAE, 0xF0, 0xA3, 0x74, 0xFF, ++0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0x81, 0x75, 0xE0, 0xFE, 0x90, 0x81, 0x74, 0xE0, 0xFD, ++0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x42, 0x90, 0x01, ++0xAF, 0xE0, 0x70, 0x0A, 0xED, 0x11, 0xE5, 0xFA, 0x7B, 0x01, 0x11, 0x1D, 0x7F, 0x01, 0xEF, 0x60, ++0x2F, 0x90, 0x81, 0x74, 0x12, 0x6F, 0x73, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, ++0x90, 0x81, 0x74, 0xF0, 0x90, 0x81, 0x75, 0xE0, 0xFF, 0x90, 0x81, 0x74, 0xE0, 0xB5, 0x07, 0x04, ++0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, 0x80, 0x3C, 0xE0, 0x44, 0x04, 0xF0, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xDE, 0xF9, 0x74, 0x80, 0x35, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x74, 0xE0, 0xFF, 0x70, 0x06, 0xA3, ++0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x81, 0x75, 0xE0, 0xB5, 0x07, 0x04, 0x7F, ++0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x80, ++0x29, 0xC0, 0x01, 0x90, 0x81, 0x75, 0xE0, 0x11, 0xE5, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, ++0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x46, 0x79, 0x90, 0x81, 0x75, 0x12, 0x6F, 0x73, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x81, 0x75, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x31, ++0xCD, 0x7F, 0xF5, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x06, 0x90, 0x82, 0x80, 0xE0, 0xA3, ++0xF0, 0x31, 0xCD, 0x7F, 0xF6, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x80, ++0xE0, 0x90, 0x82, 0x82, 0xF0, 0x31, 0xCD, 0x7F, 0xF4, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, ++0x08, 0x90, 0x82, 0x80, 0xE0, 0x90, 0x82, 0x83, 0xF0, 0x31, 0xCD, 0x7F, 0xF3, 0x7E, 0x00, 0x12, ++0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x80, 0xE0, 0x90, 0x82, 0x84, 0xF0, 0x31, 0xCD, 0x7F, ++0xF2, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x80, 0xE0, 0x90, 0x82, 0x85, ++0xF0, 0x90, 0x82, 0x81, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x82, ++0x89, 0xF0, 0x90, 0x82, 0x85, 0xE0, 0x90, 0x82, 0x8A, 0xF0, 0x02, 0x77, 0x8A, 0x7B, 0x01, 0x7A, ++0x82, 0x79, 0x80, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, ++0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9C, 0x74, 0x7E, 0xF0, 0xA3, 0x74, ++0x92, 0xF0, 0xA3, 0x74, 0xA0, 0xF0, 0xA3, 0x74, 0x24, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x49, 0xF0, ++0x90, 0x01, 0x9A, 0x74, 0xE0, 0xF0, 0x90, 0x01, 0x99, 0xE4, 0xF0, 0x90, 0x01, 0x98, 0x04, 0xF0, ++0x22, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x98, 0xE0, 0x7F, 0x00, 0x30, 0xE4, ++0x02, 0x7F, 0x01, 0xEF, 0x64, 0x01, 0x60, 0x3D, 0xC3, 0x90, 0x82, 0x10, 0xE0, 0x94, 0x88, 0x90, ++0x82, 0x0F, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, ++0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1F, 0x90, 0x82, 0x0F, 0x12, 0x7D, 0xDD, 0x12, 0x7F, 0x81, 0xD3, ++0x90, 0x82, 0x10, 0xE0, 0x94, 0x32, 0x90, 0x82, 0x0F, 0xE0, 0x94, 0x00, 0x40, 0xBA, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE3, 0xB3, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, ++0xC4, 0x74, 0x6C, 0xF0, 0x74, 0x82, 0xA3, 0xF0, 0x90, 0x81, 0xF9, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, ++0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, ++0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE, 0x74, 0x6C, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x82, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x16, 0xF0, 0xA3, 0xE4, ++0xF0, 0x22, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x3D, 0xF5, 0x41, 0xA3, 0xE0, 0x55, 0x3E, 0xF5, 0x42, ++0xA3, 0xE0, 0x55, 0x3F, 0xF5, 0x43, 0xA3, 0xE0, 0x55, 0x40, 0xF5, 0x44, 0x90, 0x01, 0x34, 0xE5, ++0x41, 0xF0, 0xA3, 0xE5, 0x42, 0xF0, 0xA3, 0xE5, 0x43, 0xF0, 0xA3, 0xE5, 0x44, 0xF0, 0x22, 0x90, ++0x01, 0x3C, 0xE0, 0x55, 0x45, 0xF5, 0x49, 0xA3, 0xE0, 0x55, 0x46, 0xF5, 0x4A, 0xA3, 0xE0, 0x55, ++0x47, 0xF5, 0x4B, 0xA3, 0xE0, 0x55, 0x48, 0xF5, 0x4C, 0x90, 0x01, 0x3C, 0xE5, 0x49, 0xF0, 0xA3, ++0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, 0xF0, 0xA3, 0xE5, 0x4C, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, ++0x81, 0x83, 0xE0, 0x30, 0xE0, 0x05, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x81, 0xFB, 0xE0, ++0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x05, 0xFC, 0xE0, 0x04, ++0xF0, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x10, 0xA3, 0x74, 0x01, 0xF0, 0x90, 0x81, 0x83, 0xE0, ++0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x02, 0x71, 0x4E, 0x12, 0x4E, 0x12, 0x02, 0x57, 0x9E, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x82, 0xE0, 0xB4, 0x01, 0x04, 0x7F, 0x04, 0x80, 0x0C, ++0x12, 0x64, 0xFC, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x12, 0x63, 0xB0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x3E, 0x90, 0x81, 0x87, 0xE0, ++0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0x81, 0x86, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, ++0x7D, 0x01, 0xED, 0x4E, 0x70, 0x24, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x02, 0x80, 0xB0, 0x12, 0x67, ++0xC3, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x08, 0x06, 0xE4, 0xFD, 0x7F, 0x0C, 0x80, 0x09, 0x90, 0x81, ++0x87, 0xE0, 0x70, 0x06, 0xFD, 0x7F, 0x04, 0x12, 0x52, 0xD5, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xFF, ++0x30, 0xE0, 0x05, 0x12, 0x67, 0xBC, 0x60, 0x1B, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x04, 0xEF, 0x30, ++0xE0, 0x0B, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x02, 0x60, 0x09, 0x12, 0x65, 0x3B, 0x90, 0x01, 0xE6, ++0xE0, 0x04, 0xF0, 0x22, 0xE4, 0xFF, 0x12, 0x67, 0x39, 0xBF, 0x01, 0x12, 0x90, 0x81, 0x8D, 0xE0, ++0x60, 0x0C, 0x12, 0x6F, 0x66, 0x64, 0x02, 0x60, 0x02, 0x80, 0x04, 0x12, 0x56, 0x71, 0x22, 0x90, ++0x04, 0x1D, 0xE0, 0x70, 0x1B, 0x90, 0x80, 0x86, 0xE0, 0xFF, 0x90, 0x82, 0xC8, 0x74, 0x09, 0xF0, ++0x7B, 0x18, 0xE4, 0xFD, 0x91, 0x21, 0x90, 0x82, 0x00, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xD1, 0xAA, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xC6, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, ++0x90, 0x82, 0xC5, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0xD1, 0xB9, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0x82, ++0xC5, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x82, 0xC6, 0xE0, 0x60, 0x0E, 0x74, 0x0F, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x08, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0xAF, 0x05, 0x91, 0xB4, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x82, ++0xC7, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0x91, 0xB4, 0xEE, 0xF0, ++0x90, 0x82, 0xC8, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x1E, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xEF, 0xF0, 0x74, 0x21, 0x2E, 0xB1, 0xC7, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, ++0x80, 0x87, 0xE0, 0xFF, 0x90, 0x82, 0xBD, 0xE0, 0xFB, 0x90, 0x82, 0xC8, 0x74, 0x0A, 0xF0, 0x7D, ++0x01, 0x91, 0x21, 0x90, 0x82, 0xBE, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x82, 0xBC, ++0xE0, 0xFF, 0xB1, 0x6F, 0x90, 0x82, 0xBE, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x04, 0x80, 0xE0, ++0x54, 0x0F, 0xFD, 0xAC, 0x07, 0xB1, 0xE5, 0x44, 0x01, 0xF0, 0xB1, 0xE5, 0x54, 0xFB, 0xF0, 0xAC, ++0x07, 0x74, 0x16, 0x2C, 0x91, 0xB7, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x15, 0x2C, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, 0xE4, 0xF0, 0x90, 0x04, 0x52, ++0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, ++0xB1, 0xDD, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0xB1, 0xDD, 0xED, 0xF0, 0x22, 0x90, ++0x80, 0x88, 0xE0, 0xFF, 0x90, 0x82, 0xC8, 0x74, 0x0B, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x91, 0x21, ++0x90, 0x82, 0xD6, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x82, 0xD5, 0xE0, 0xFF, 0xB1, ++0xD1, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x0A, 0xB1, 0xC4, 0x44, 0x10, 0xB1, 0xD0, 0x44, 0x80, 0xF0, ++0x22, 0xB1, 0xC4, 0x54, 0xEF, 0xB1, 0xD0, 0x44, 0x40, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x82, 0xD5, 0xEF, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1E, 0x90, 0x05, 0x22, ++0xE0, 0x90, 0x82, 0xD8, 0xF0, 0x7D, 0x29, 0x12, 0x56, 0xD0, 0xBF, 0x01, 0x02, 0xB1, 0x4F, 0x90, ++0x82, 0xD8, 0xE0, 0xFF, 0x7D, 0x2A, 0x12, 0x54, 0xCC, 0x80, 0x02, 0xB1, 0x4F, 0xD1, 0xAA, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x74, 0x21, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, ++0xF0, 0x74, 0x1F, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, ++0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0x81, 0xFF, 0xF0, 0xE0, 0xFD, 0x54, 0xC0, 0x70, 0x04, 0xD1, ++0x5C, 0x80, 0x55, 0xED, 0x30, 0xE6, 0x3F, 0x90, 0x81, 0x8D, 0xE0, 0x64, 0x02, 0x70, 0x27, 0x90, ++0x81, 0x88, 0xE0, 0xFF, 0xC3, 0x13, 0x20, 0xE0, 0x09, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x01, 0xF0, ++0x80, 0x1B, 0x12, 0x6F, 0x66, 0x64, 0x01, 0x70, 0x1F, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x04, 0xF0, ++0x7F, 0x01, 0xB1, 0x8B, 0x80, 0x12, 0x12, 0x6F, 0x5F, 0x64, 0x02, 0x60, 0x04, 0x71, 0xFF, 0x80, ++0x07, 0x12, 0x56, 0x71, 0x80, 0x02, 0xD1, 0x5C, 0x90, 0x81, 0xFF, 0xE0, 0x90, 0x81, 0x91, 0x30, ++0xE7, 0x05, 0x12, 0x51, 0x22, 0x80, 0x5A, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x81, 0x91, 0xE0, ++0x54, 0xFE, 0xF0, 0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x4E, 0x54, 0xC0, 0x70, ++0x08, 0xD1, 0x5C, 0x54, 0xFD, 0xF0, 0x02, 0x61, 0x83, 0xE5, 0x4E, 0x30, 0xE6, 0x18, 0x90, 0x81, ++0x8D, 0xE0, 0x64, 0x01, 0x70, 0x12, 0x12, 0x6F, 0x5F, 0x64, 0x02, 0x60, 0x04, 0x71, 0xFF, 0x80, ++0x07, 0x12, 0x56, 0x71, 0x80, 0x02, 0xD1, 0x5C, 0xE5, 0x4E, 0x90, 0x81, 0x91, 0x30, 0xE7, 0x05, ++0x12, 0x51, 0x22, 0x80, 0x0C, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, ++0x22, 0x90, 0x81, 0x88, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, ++0x30, 0xE0, 0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0xE4, 0xFF, 0x12, ++0x67, 0x39, 0xBF, 0x01, 0x0F, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x09, 0xD1, 0x5C, 0x54, 0x07, 0x70, ++0x03, 0x12, 0x61, 0x83, 0x22, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x07, 0x90, 0x81, 0x83, 0xE0, 0x30, ++0xE0, 0x13, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x09, 0x12, 0x64, 0xFC, 0xBF, 0x01, 0x06, 0x02, ++0x6F, 0xB8, 0x12, 0x56, 0x97, 0x22, 0x90, 0x81, 0xFA, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, ++0x53, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x05, 0xFD, 0xE0, 0x04, 0xF0, 0x22, 0x22, 0x90, 0x81, 0x88, ++0x12, 0x64, 0xE9, 0x30, 0xE0, 0x19, 0xEF, 0x54, 0xBF, 0xF1, 0x40, 0x30, 0xE0, 0x06, 0xE0, 0x44, ++0x01, 0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFE, 0xF1, 0x73, 0x74, 0x04, 0xF0, 0x12, 0x61, 0x83, 0x22, ++0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x81, 0x89, 0x22, 0x90, 0x81, 0x88, 0xE0, 0xFF, 0x12, 0x6F, ++0x8E, 0x30, 0xE0, 0x1E, 0xEF, 0x54, 0x7F, 0xF1, 0x40, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, ++0x80, 0x07, 0xE0, 0x54, 0xFD, 0xF1, 0x73, 0x04, 0xF0, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x03, 0x12, ++0x61, 0x83, 0x22, 0xF0, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0xEF, 0x90, ++0x02, 0x86, 0x60, 0x06, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x80, ++0x41, 0xED, 0xF0, 0x22, 0xE4, 0xFE, 0xEF, 0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0xFD, 0xEF, 0x54, ++0x1F, 0xFF, 0xED, 0x60, 0x2C, 0x14, 0x60, 0x1E, 0x24, 0xFD, 0x60, 0x0F, 0x24, 0xFE, 0x70, 0x2A, ++0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0xDE, 0x9F, 0xFE, 0x80, 0x1F, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, ++0x74, 0xF2, 0x9F, 0xFE, 0x80, 0x14, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x06, 0x9F, 0xFE, 0x80, ++0x09, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x10, 0x9F, 0xFE, 0xAF, 0x06, 0x22, 0xD3, 0xEF, 0x64, ++0x80, 0x94, 0x1C, 0x40, 0x07, 0xEF, 0x64, 0x80, 0x94, 0x94, 0x40, 0x03, 0x7F, 0x00, 0x22, 0xC3, ++0xEF, 0x64, 0x80, 0x94, 0x80, 0x40, 0x03, 0x7F, 0x64, 0x22, 0xEF, 0x24, 0x64, 0xFF, 0x22, 0xAA, ++0x07, 0xED, 0x54, 0x1F, 0x90, 0x82, 0x09, 0xF0, 0x11, 0x46, 0xE0, 0x90, 0x82, 0x07, 0xF0, 0x90, ++0x82, 0x0A, 0x74, 0x01, 0xF0, 0xEB, 0xC3, 0x94, 0x01, 0x40, 0x03, 0x02, 0x5E, 0xAA, 0x90, 0x82, ++0x07, 0xE0, 0x25, 0x51, 0xFF, 0xA3, 0xF0, 0xA3, 0xE0, 0x90, 0x42, 0x0E, 0x93, 0xFE, 0xEF, 0xD3, ++0x9E, 0x40, 0x09, 0x11, 0x46, 0xE4, 0xF0, 0xAF, 0x02, 0x02, 0x5F, 0xE8, 0x90, 0x82, 0x08, 0xE0, ++0xFF, 0x11, 0x46, 0xEF, 0xF0, 0x22, 0x74, 0x01, 0x2A, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83, ++0x22, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x81, 0x96, 0xF0, 0xA3, 0xF0, 0x90, ++0x81, 0x91, 0xF0, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x12, 0x65, 0x24, ++0x7D, 0x10, 0x7F, 0x03, 0x02, 0x4F, 0xEE, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, 0x03, 0x7F, 0x00, ++0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, ++0x11, 0x77, 0xEF, 0x70, 0x03, 0x12, 0x56, 0x97, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x11, 0x77, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0F, 0x01, 0x80, 0x52, 0x90, 0x81, 0x91, 0xE0, ++0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, 0x02, 0x80, 0x44, 0x90, 0x81, 0x8F, 0xE0, 0xFE, 0xE4, ++0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, 0x80, 0x35, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, ++0x80, 0x2C, 0x90, 0x81, 0x91, 0xE0, 0x30, 0xE4, 0x05, 0x75, 0x0F, 0x10, 0x80, 0x20, 0x90, 0x81, ++0x89, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05, 0x75, 0x0F, 0x20, 0x80, 0x10, 0x90, 0x81, ++0xF0, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, 0x80, 0x05, 0x12, 0x7F, 0x88, 0x80, 0x0E, 0x90, 0x01, ++0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0F, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x24, 0x90, 0x81, 0x93, 0x74, 0x02, 0xF0, 0x80, ++0x13, 0xED, 0x70, 0x06, 0x90, 0x81, 0xED, 0xE0, 0x80, 0x02, 0xED, 0x14, 0x90, 0x81, 0x93, 0xF0, ++0x90, 0x81, 0x93, 0xE0, 0xA3, 0xF0, 0x90, 0x81, 0x89, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x12, 0x52, ++0xB5, 0x12, 0x57, 0xDC, 0x31, 0x4D, 0x90, 0x81, 0x87, 0x74, 0x04, 0xF0, 0x22, 0x90, 0x05, 0x27, ++0xE0, 0x44, 0x40, 0xF0, 0x22, 0x7D, 0x22, 0x7F, 0xFF, 0x12, 0x54, 0xCC, 0x31, 0x4D, 0x90, 0x81, ++0x86, 0x74, 0x03, 0xF0, 0x22, 0x12, 0x56, 0x16, 0x80, 0xF4, 0x7D, 0x21, 0x7F, 0xFF, 0x12, 0x54, ++0xCC, 0x80, 0xEB, 0x12, 0x67, 0xE3, 0x80, 0xF2, 0x90, 0x81, 0xE4, 0x74, 0x04, 0xF0, 0xA3, 0x14, ++0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x90, ++0x81, 0xF1, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0xE4, 0xA3, 0xF0, 0x31, 0xA2, 0x44, 0x10, ++0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, ++0x0B, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF3, 0x12, 0x51, 0x2C, 0x31, 0xD3, 0x90, 0x80, 0x42, 0xE0, ++0xB4, 0x01, 0x0F, 0x31, 0xDB, 0x20, 0xE0, 0x0A, 0xEF, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x02, ++0x31, 0xE4, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0xFF, ++0xC4, 0x54, 0x0F, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x34, 0xC4, 0x13, 0x54, 0x07, 0x20, ++0xE0, 0x2D, 0x90, 0x82, 0xE6, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0xC8, 0x40, 0x21, 0x90, 0x81, ++0xF1, 0xE0, 0x44, 0x20, 0xF0, 0xE4, 0x90, 0x82, 0xE6, 0xF0, 0x90, 0x81, 0xF1, 0xE0, 0x13, 0x30, ++0xE0, 0x0D, 0x90, 0x81, 0x88, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x81, 0x98, 0x74, 0xD0, 0xF0, 0x22, ++0x7E, 0x00, 0x7F, 0x01, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0x83, 0x12, 0x48, 0x1E, 0x90, ++0x81, 0x83, 0xE0, 0x54, 0xFD, 0xF0, 0xE4, 0x12, 0x59, 0x8E, 0x74, 0x0C, 0xF0, 0x22, 0x51, 0x5A, ++0xE4, 0x90, 0x81, 0x86, 0xF0, 0x22, 0x51, 0x54, 0x80, 0xF4, 0x12, 0x57, 0xE2, 0x80, 0xEF, 0x12, ++0x57, 0xCB, 0x80, 0xEA, 0x12, 0x52, 0xB5, 0x02, 0x57, 0xCD, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, ++0xF0, 0x22, 0x12, 0x67, 0xE3, 0x02, 0x57, 0xBC, 0x12, 0x56, 0x16, 0x7D, 0x24, 0x02, 0x57, 0xED, ++0x7D, 0x25, 0x02, 0x57, 0xED, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, ++0x54, 0xFD, 0x4F, 0x22, 0x7B, 0xFE, 0x7A, 0x80, 0x79, 0x33, 0x12, 0x2B, 0xED, 0x90, 0x82, 0x2B, ++0xE0, 0xFF, 0x90, 0x82, 0x2A, 0xE0, 0xFD, 0xE4, 0x90, 0x82, 0x7A, 0x22, 0xF0, 0x90, 0x82, 0x28, ++0xE0, 0x24, 0x39, 0xF9, 0xE4, 0x34, 0x82, 0x75, 0x13, 0x01, 0xF5, 0x14, 0x89, 0x15, 0x22, 0x90, ++0x82, 0x28, 0xE0, 0x24, 0x3A, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x12, 0x47, 0x7F, ++0x90, 0x81, 0xE0, 0x12, 0x20, 0xCE, 0x90, 0x81, 0x89, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x90, 0x81, ++0xAA, 0xE0, 0x24, 0x04, 0x90, 0x81, 0xA5, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0x74, 0x01, 0x93, ++0x2F, 0xFF, 0xE4, 0x93, 0x3E, 0xC3, 0x13, 0xFE, 0xEF, 0x13, 0x22, 0x7E, 0x00, 0x7F, 0x04, 0x7D, ++0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xF5, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x81, 0x8F, ++0xE0, 0x90, 0x01, 0xBB, 0x22, 0xE0, 0xFF, 0x75, 0xF0, 0x08, 0x90, 0x8F, 0x46, 0x02, 0x47, 0xDA, ++0x90, 0x8F, 0x45, 0x12, 0x47, 0xDA, 0xE0, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, ++0x44, 0x80, 0x22, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2E, 0xA2, 0x90, 0x82, 0xB8, 0x22, 0x90, 0x81, ++0xF6, 0xE0, 0x14, 0x90, 0x81, 0xF8, 0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0xC3, 0x13, 0x22, 0x12, ++0x47, 0x7F, 0x90, 0x82, 0x2C, 0x02, 0x20, 0xCE, 0x90, 0x81, 0xF7, 0xE0, 0x90, 0x05, 0x73, 0xF0, ++0x22, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0xEC, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x01, ++0xFE, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x81, 0xF7, 0xE0, 0x90, 0x01, ++0x3F, 0x22, 0x90, 0x81, 0x93, 0xE0, 0x90, 0x05, 0x73, 0x22, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x10, ++0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, ++0x83, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, ++0x83, 0x22, 0x92, 0x98, ++}; ++u4Byte ArrayLength_MP_8188E_S_FW_NIC = 19396; ++ ++ ++void ++ODM_ReadFirmware_MP_8188E_S_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188E_S_FW_NIC; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188E_S_FW_NIC, ArrayLength_MP_8188E_S_FW_NIC); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188E_S_FW_NIC; ++} ++ ++ ++u1Byte Array_MP_8188E_S_FW_WoWLAN[] = { ++0xE3, 0x88, 0x30, 0x00, 0x16, 0x00, 0x00, 0x00, 0x03, 0x03, 0x11, 0x56, 0xBE, 0x56, 0x02, 0x00, ++0x28, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x49, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x4A, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x57, 0xF1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x49, 0xBA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4F, 0xFB, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, ++0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xE7, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x46, 0xE7, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x3E, ++0x88, 0x82, 0x8C, 0x83, 0xE7, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, 0x32, 0xE3, 0x09, 0xF6, 0x08, ++0xDF, 0xFA, 0x80, 0x78, 0xE3, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x70, 0x88, 0x82, 0x8C, 0x83, ++0xE3, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, 0x64, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF6, 0x08, ++0xDF, 0xFA, 0x80, 0x58, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x4C, ++0x80, 0xD2, 0x80, 0xFA, 0x80, 0xC6, 0x80, 0xD4, 0x80, 0x69, 0x80, 0xF2, 0x80, 0x33, 0x80, 0x10, ++0x80, 0xA6, 0x80, 0xEA, 0x80, 0x9A, 0x80, 0xA8, 0x80, 0xDA, 0x80, 0xE2, 0x80, 0xCA, 0x80, 0x33, ++0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, ++0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, ++0x0D, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xA3, 0xF6, 0x08, 0xDF, 0xF9, 0xEC, 0xFA, 0xA9, 0xF0, ++0xED, 0xFB, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, ++0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xEA, 0xDE, ++0xE8, 0x80, 0xDB, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xA3, 0xF2, 0x08, 0xDF, 0xF9, 0x80, 0xCC, ++0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, 0x60, 0xC3, 0x88, 0xF0, 0xED, 0x24, 0x02, 0xB4, 0x04, ++0x00, 0x50, 0xB9, 0xF5, 0x82, 0xEB, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0xAF, 0x23, 0x23, 0x45, ++0x82, 0x23, 0x90, 0x43, 0x50, 0x73, 0xC5, 0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, ++0xE5, 0x82, 0x15, 0x82, 0x70, 0x02, 0x15, 0x83, 0xE0, 0x38, 0xF0, 0x22, 0xEF, 0x2B, 0xFF, 0xEE, ++0x3A, 0xFE, 0xED, 0x39, 0xFD, 0xEC, 0x38, 0xFC, 0x22, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xFE, ++0xED, 0x99, 0xFD, 0xEC, 0x98, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, ++0xEC, 0x48, 0xFC, 0x22, 0xEB, 0x9F, 0xF5, 0xF0, 0xEA, 0x9E, 0x42, 0xF0, 0xE9, 0x9D, 0x42, 0xF0, ++0xE8, 0x9C, 0x45, 0xF0, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x22, 0xE0, 0xF8, 0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, 0xA4, 0x25, 0x82, ++0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, ++0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, ++0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, ++0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, ++0xDF, 0xE3, 0xF5, 0xF0, 0x09, 0xE2, 0x08, 0xB5, 0xF0, 0x6B, 0xDF, 0xF5, 0x80, 0x67, 0xE3, 0xF5, ++0xF0, 0x09, 0xE6, 0x08, 0xB5, 0xF0, 0x5E, 0xDF, 0xF5, 0x80, 0x5A, 0x87, 0xF0, 0x09, 0xE6, 0x08, ++0xB5, 0xF0, 0x52, 0xDF, 0xF6, 0x80, 0x4E, 0x87, 0xF0, 0x09, 0xE2, 0x08, 0xB5, 0xF0, 0x46, 0xDF, ++0xF6, 0x80, 0x42, 0x88, 0x82, 0x8C, 0x83, 0x87, 0xF0, 0x09, 0xE0, 0xA3, 0xB5, 0xF0, 0x36, 0xDF, ++0xF6, 0x80, 0x32, 0x88, 0x82, 0x8C, 0x83, 0x87, 0xF0, 0x09, 0xE4, 0x93, 0xA3, 0xB5, 0xF0, 0x25, ++0xDF, 0xF5, 0x80, 0x21, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0xF5, 0xF0, 0x09, 0xE0, 0xA3, 0xB5, 0xF0, ++0x14, 0xDF, 0xF5, 0x80, 0x10, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0xF5, 0xF0, 0x09, 0xE4, 0x93, 0xA3, ++0xB5, 0xF0, 0x02, 0xDF, 0xF4, 0x02, 0x45, 0xD0, 0x80, 0x87, 0x80, 0xE9, 0x80, 0x90, 0x80, 0xD4, ++0x80, 0x3E, 0x80, 0x15, 0x80, 0x6E, 0x80, 0x7E, 0x80, 0x9D, 0x80, 0xB7, 0x80, 0x8D, 0x80, 0xA3, ++0x80, 0x51, 0x80, 0x74, 0x80, 0x3C, 0x02, 0x45, 0xDC, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, ++0x93, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE4, 0x93, 0xA3, 0xC8, ++0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0x76, 0xDF, 0xE3, 0xDE, 0xE1, 0x80, 0x70, ++0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xE2, 0x08, 0xB5, 0xF0, 0x62, 0xDF, 0xF4, ++0x80, 0x5E, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0xF0, 0xA3, 0xE6, 0x08, 0xB5, 0xF0, 0x51, 0xDF, ++0xF5, 0x80, 0x4D, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0xF0, 0xA3, 0xE2, 0x08, 0xB5, 0xF0, 0x40, ++0xDF, 0xF5, 0x80, 0x3C, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xE6, 0x08, 0xB5, ++0xF0, 0x2E, 0xDF, 0xF4, 0x80, 0x2A, 0x80, 0x02, 0x80, 0x57, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, ++0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE0, 0xA3, 0xC8, ++0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0x06, 0xDF, 0xE4, 0xDE, 0xE2, 0x80, 0x00, ++0x7F, 0xFF, 0xB5, 0xF0, 0x02, 0x0F, 0x22, 0x40, 0x02, 0x7F, 0x01, 0x22, 0x89, 0x82, 0x8A, 0x83, ++0xEC, 0xFA, 0xE0, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE0, 0xA3, ++0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0xD5, 0xDF, 0xE5, 0xDE, 0xE3, 0x80, ++0xCF, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE0, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, ++0xC5, 0x83, 0xCC, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, ++0xAF, 0xDF, 0xE4, 0xDE, 0xE2, 0x80, 0xA9, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, 0x60, 0xAB, ++0xED, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0x98, 0xF5, 0x82, 0xEB, 0x24, 0x02, 0xB4, 0x04, 0x00, ++0x50, 0x8E, 0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x45, 0x18, 0x73, 0xEF, 0x4E, 0x60, 0x12, 0xEF, ++0x60, 0x01, 0x0E, 0xED, 0xBB, 0x01, 0x0B, 0x89, 0x82, 0x8A, 0x83, 0xF0, 0xA3, 0xDF, 0xFC, 0xDE, ++0xFA, 0x22, 0x89, 0xF0, 0x50, 0x07, 0xF7, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0xBB, 0xFE, 0xFC, ++0xF3, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x46, 0x7B, 0x85, ++0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, 0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, ++0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, 0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, ++0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, 0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, ++0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, 0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, ++0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, 0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, ++0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, 0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, ++0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, 0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, ++0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, 0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, ++0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, 0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, 0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, ++0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, 0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, ++0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, 0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, ++0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, 0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, ++0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, 0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, ++0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, 0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, ++0x30, 0x90, 0x49, 0xB4, 0x74, 0x01, 0x93, 0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, ++0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, 0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, ++0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, 0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, ++0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, 0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, ++0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, ++0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, 0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, ++0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, 0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, ++0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, 0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, ++0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, 0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, ++0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, 0x04, 0x90, 0x49, 0xB4, 0x93, 0xF6, 0x08, 0xEF, 0x2F, ++0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, ++0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, ++0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, 0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x46, 0xC4, 0x50, 0x2E, ++0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, ++0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, 0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, ++0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, 0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, ++0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, 0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, ++0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, 0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, ++0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, 0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, ++0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, 0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, ++0x01, 0x0F, 0x02, 0x46, 0xC3, 0x8F, 0xF0, 0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, ++0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, 0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, ++0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, 0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, ++0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, 0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, ++0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, 0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x46, 0xC4, 0x7F, 0x08, ++0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, 0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, ++0x02, 0x49, 0x5E, 0x02, 0x47, 0x54, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, ++0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, ++0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, ++0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x49, ++0xA3, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, ++0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, ++0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, ++0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, ++0xE7, 0x80, 0xBE, 0x41, 0x84, 0x87, 0x00, 0x41, 0x84, 0x88, 0x00, 0x41, 0x84, 0x97, 0x00, 0x41, ++0x84, 0x98, 0x00, 0x00, 0x59, 0x54, 0x5F, 0xEF, 0x6F, 0xE0, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, ++0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xBA, 0xF0, 0x74, 0x49, 0xA3, ++0xF0, 0x51, 0x2B, 0xE5, 0x3C, 0x30, 0xE7, 0x02, 0x51, 0x10, 0x74, 0xBA, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x49, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0x7F, 0x01, 0x7E, 0x00, 0x12, 0x32, 0x06, 0x90, 0x00, 0xF2, 0xE0, 0x20, 0xE6, 0x0C, 0x90, 0x00, ++0x05, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x05, 0x12, 0x32, 0x1E, 0x22, 0x90, 0x00, 0x54, 0xE0, 0x55, ++0x35, 0xF5, 0x39, 0xA3, 0xE0, 0x55, 0x36, 0xF5, 0x3A, 0xA3, 0xE0, 0x55, 0x37, 0xF5, 0x3B, 0xA3, ++0xE0, 0x55, 0x38, 0xF5, 0x3C, 0xAD, 0x39, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0xAD, 0x3A, 0x7F, 0x55, ++0x12, 0x32, 0x1E, 0xAD, 0x3B, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0xAD, 0x3C, 0x7F, 0x57, 0x12, 0x32, ++0x1E, 0x53, 0x91, 0xEF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x65, 0xF0, 0x74, 0x4A, 0xA3, 0xF0, 0x12, 0x81, 0xBE, 0xE5, ++0x41, 0x30, 0xE3, 0x03, 0x12, 0x82, 0x1B, 0xE5, 0x41, 0x30, 0xE4, 0x03, 0x12, 0x77, 0x51, 0xE5, ++0x43, 0x30, 0xE0, 0x02, 0x71, 0x04, 0xE5, 0x43, 0x30, 0xE1, 0x03, 0x12, 0x52, 0xDC, 0xE5, 0x43, ++0x30, 0xE2, 0x03, 0x12, 0x82, 0x28, 0xE5, 0x43, 0x30, 0xE3, 0x03, 0x12, 0x7A, 0x0A, 0xE5, 0x43, ++0x30, 0xE4, 0x03, 0x12, 0x82, 0x40, 0xE5, 0x43, 0x30, 0xE5, 0x03, 0x12, 0x7B, 0x5F, 0xE5, 0x43, ++0x30, 0xE6, 0x03, 0x12, 0x82, 0x72, 0xE5, 0x44, 0x30, 0xE1, 0x03, 0x12, 0x7F, 0xC4, 0x74, 0x65, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x4A, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, ++0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, ++0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0xF5, 0x4E, 0x90, 0x81, 0x4C, 0xE0, 0x70, 0x02, 0x61, 0xBA, 0xF1, ++0xC2, 0x60, 0x02, 0x61, 0xBA, 0x12, 0x57, 0x86, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x12, 0x53, 0xF4, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0x12, 0x44, 0x27, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x53, 0xF7, 0x78, ++0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x95, 0xC7, 0x44, ++0x80, 0xF0, 0x12, 0x96, 0x9C, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, 0x81, ++0x53, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x81, 0x55, 0xE0, 0x60, 0x0E, 0xEF, 0x70, ++0x08, 0x90, 0x81, 0x52, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x4E, 0x01, 0xE5, 0x4E, 0x60, 0x3A, ++0x12, 0x96, 0xA4, 0x90, 0x81, 0x55, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x10, 0xE4, 0xF5, 0x1D, ++0x90, 0x81, 0x55, 0xE0, 0x12, 0x79, 0x91, 0x90, 0x81, 0x55, 0xE0, 0x80, 0x0C, 0xE4, 0xF5, 0x1D, ++0x12, 0x7C, 0xD6, 0x12, 0x79, 0x91, 0x12, 0x7C, 0xD6, 0x12, 0x7F, 0xD7, 0xF0, 0x90, 0x81, 0x4F, ++0xE0, 0x20, 0xE2, 0x06, 0x7D, 0x01, 0x7F, 0x04, 0x71, 0xBF, 0x22, 0xE4, 0xFD, 0x7F, 0x0C, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x94, 0xED, 0xF0, 0x90, 0x81, 0x47, 0xE0, 0xFE, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xA1, 0x0A, 0xEE, 0x12, 0x5F, 0x85, 0x30, 0xE0, ++0x02, 0xA1, 0x0A, 0x90, 0x81, 0x4F, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xA1, 0x0A, 0xEF, 0x70, 0x02, ++0x81, 0x7C, 0x24, 0xFE, 0x70, 0x02, 0x81, 0xB5, 0x24, 0xFE, 0x60, 0x48, 0x24, 0xFC, 0x70, 0x02, ++0x81, 0xEF, 0x24, 0xFC, 0x60, 0x02, 0xA1, 0x00, 0xEE, 0xB4, 0x0E, 0x02, 0xB1, 0x5B, 0x90, 0x81, ++0x4F, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xB1, 0x9A, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x06, 0x02, 0xB1, ++0x79, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x04, 0x0E, 0x90, 0x84, 0x94, 0xE0, 0xFF, 0x60, 0x05, 0x12, ++0x82, 0xFC, 0x80, 0x02, 0xF1, 0xE8, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x08, 0x60, 0x02, 0xA1, 0x00, ++0xF1, 0x21, 0xA1, 0x00, 0x90, 0x81, 0x4F, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xB1, 0x9A, 0x90, 0x81, ++0x4F, 0xE0, 0xB4, 0x06, 0x02, 0xB1, 0x79, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x0E, 0x07, 0xB1, 0x0F, ++0xBF, 0x01, 0x02, 0xB1, 0x5B, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0xA1, 0x00, 0xB1, ++0x0F, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xA1, 0x00, 0xB1, 0xB0, 0xA1, 0x00, 0x90, 0x81, 0x4F, 0xE0, ++0xB4, 0x0E, 0x07, 0xB1, 0x0F, 0xBF, 0x01, 0x02, 0xB1, 0x5B, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x06, ++0x02, 0xB1, 0x79, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x0C, 0x07, 0xB1, 0x0F, 0xBF, 0x01, 0x02, 0xB1, ++0xB0, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x04, 0x70, 0x57, 0x12, 0x8A, 0x51, 0xEF, 0x64, 0x01, 0x70, ++0x4F, 0xF1, 0x09, 0x80, 0x4B, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x0E, 0x07, 0xB1, 0x0F, 0xBF, 0x01, ++0x02, 0xB1, 0x5B, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x06, 0x02, 0xB1, 0x79, 0x90, 0x81, 0x4F, 0xE0, ++0xB4, 0x0C, 0x07, 0xB1, 0x0F, 0xBF, 0x01, 0x02, 0xB1, 0xB0, 0x90, 0x81, 0x4F, 0xE0, 0x70, 0x04, ++0x7F, 0x01, 0xB1, 0x9A, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x04, 0x15, 0xF1, 0xD6, 0x80, 0x11, 0x90, ++0x81, 0x4F, 0xE0, 0xB4, 0x0C, 0x0A, 0x12, 0x52, 0xD4, 0x54, 0x3F, 0x30, 0xE0, 0x02, 0xF1, 0x29, ++0x90, 0x81, 0x4F, 0x12, 0x96, 0x20, 0x90, 0x01, 0xBB, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x8A, 0x38, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, ++0x01, 0x80, 0x25, 0x90, 0x81, 0x47, 0x12, 0x7D, 0x3B, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x02, 0x80, ++0x17, 0x90, 0x81, 0x4E, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, 0x80, 0x09, 0x90, ++0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, ++0xB8, 0xE5, 0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x48, 0xE0, 0xC3, ++0x13, 0x20, 0xE0, 0x04, 0x7D, 0x0C, 0x80, 0x08, 0x12, 0x8A, 0x03, 0x44, 0x80, 0xF0, 0x7D, 0x04, ++0x7F, 0x01, 0xD1, 0xA1, 0xE4, 0xFD, 0xFF, 0x80, 0x6A, 0x90, 0x81, 0x48, 0xE0, 0x90, 0x06, 0x04, ++0x20, 0xE0, 0x08, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x04, 0x80, 0x06, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, ++0x0C, 0x7F, 0x01, 0xD1, 0xA1, 0xE4, 0xFD, 0xFF, 0x80, 0x49, 0x90, 0x84, 0x93, 0xEF, 0xF0, 0x12, ++0x56, 0x71, 0x90, 0x84, 0x93, 0xE0, 0x60, 0x02, 0xF1, 0xE3, 0x7D, 0x04, 0x7F, 0x01, 0xC1, 0xA1, ++0xF1, 0xC2, 0x70, 0x28, 0x90, 0x81, 0x48, 0xE0, 0x54, 0xFD, 0xF0, 0x7D, 0x2C, 0x7F, 0x6F, 0xB1, ++0xE3, 0x7D, 0x08, 0x7F, 0x01, 0xD1, 0x50, 0xBF, 0x01, 0x0D, 0x90, 0x81, 0x47, 0xE0, 0x44, 0x80, ++0xF0, 0x7D, 0x0E, 0x7F, 0x01, 0xC1, 0xA1, 0x12, 0x82, 0xF2, 0x04, 0xF0, 0x22, 0x12, 0x56, 0x71, ++0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, 0x80, 0x05, 0xED, 0xF0, 0x22, 0x7F, 0xFF, ++0xB1, 0xE3, 0xE4, 0x90, 0x84, 0x81, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x84, 0x83, ++0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0xB1, 0xE3, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x13, 0xA3, 0xE0, 0x70, ++0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xF1, 0xF3, 0xB1, 0xE3, 0x7F, 0x01, 0x22, ++0xD3, 0x90, 0x84, 0x82, 0xE0, 0x94, 0xE8, 0x90, 0x84, 0x81, 0xE0, 0x94, 0x03, 0x40, 0x0E, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0xF1, 0xF3, 0xB1, 0xE3, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, ++0x00, 0x12, 0x32, 0xAA, 0x90, 0x84, 0x81, 0x12, 0x61, 0x19, 0x80, 0xBB, 0x7D, 0x08, 0xE4, 0xFF, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x64, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, ++0x80, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x22, 0x90, 0x05, 0x22, 0xE0, 0x90, ++0x84, 0x68, 0xF0, 0x7D, 0x26, 0xB1, 0xEE, 0xEF, 0x64, 0x01, 0x70, 0x03, 0x12, 0x6D, 0xD5, 0x90, ++0x84, 0x68, 0xE0, 0xFF, 0x7D, 0x27, 0xB1, 0xE3, 0x12, 0x89, 0x99, 0x80, 0x06, 0x12, 0x89, 0x99, ++0x12, 0x6D, 0xD5, 0x12, 0x64, 0xCC, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7D, 0x0C, 0x7F, ++0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0xEF, 0x14, 0x60, 0x15, 0x14, 0x60, ++0x19, 0x24, 0x02, 0x70, 0x1A, 0xED, 0x54, 0x01, 0xFE, 0x90, 0x81, 0x47, 0xE0, 0x54, 0xFE, 0x4E, ++0xF0, 0x80, 0x0C, 0x90, 0x81, 0x4F, 0xED, 0xF0, 0x80, 0x05, 0x90, 0x81, 0x4E, 0xED, 0xF0, 0x90, ++0x00, 0x8F, 0xE0, 0x30, 0xE4, 0x2E, 0xEC, 0x14, 0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, ++0x23, 0x90, 0x81, 0x47, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0x81, ++0x4F, 0xE0, 0x54, 0x7F, 0x4F, 0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, 0x81, 0x4E, 0xE0, 0xFD, 0x7F, ++0x89, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7D, 0x2D, 0xB1, 0xEE, 0x90, 0x01, 0x37, ++0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, 0x50, 0xB2, 0xF1, 0x37, 0xE4, 0xFD, 0x7F, 0x01, 0x80, ++0x80, 0xB1, 0xDD, 0x7D, 0x0C, 0x7F, 0x01, 0xC1, 0xA1, 0x7D, 0x2F, 0xF1, 0x33, 0x7D, 0x08, 0x7F, ++0x01, 0xC1, 0xA1, 0x7F, 0xFF, 0xB1, 0xE3, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xB1, 0xF2, ++0x90, 0x85, 0xBB, 0x12, 0x20, 0xDA, 0xCC, 0xF0, 0x00, 0xC0, 0x12, 0x57, 0x7A, 0x12, 0x20, 0xDA, ++0x00, 0x00, 0x00, 0x14, 0x12, 0x96, 0xB4, 0x90, 0x84, 0x5A, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, ++0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x79, 0x6F, 0x12, 0x96, 0x7B, 0x44, 0x80, 0xFC, 0x90, 0x84, 0x75, ++0x12, 0x20, 0xCE, 0x90, 0x84, 0x75, 0x12, 0x78, 0xDC, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2E, 0xA2, ++0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, ++0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF1, 0xB6, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x0B, 0xF1, ++0xCB, 0xE0, 0x44, 0x10, 0xF1, 0xB5, 0x44, 0x80, 0xF0, 0x22, 0xF1, 0xCB, 0xE0, 0x54, 0xEF, 0xF1, ++0xB5, 0x44, 0x40, 0xF0, 0x22, 0xF0, 0x74, 0x1F, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x22, 0xE4, 0xFF, 0x12, 0x52, 0x30, 0xEF, 0x64, 0x01, 0x22, 0x74, 0x21, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x7D, 0x2E, 0x7F, 0x6F, 0xB1, 0xE3, 0x7D, 0x02, 0x7F, 0x01, ++0xC1, 0xA1, 0xF0, 0xE4, 0xFD, 0xFF, 0xA1, 0xE3, 0x12, 0x89, 0x92, 0xF1, 0xE2, 0x7D, 0x0C, 0x7F, ++0x01, 0xC1, 0xA1, 0x90, 0x84, 0x83, 0xE0, 0xFF, 0x7D, 0x48, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, ++0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, ++0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xFB, 0xF0, 0x74, 0x4F, ++0xA3, 0xF0, 0x12, 0x81, 0xEB, 0xE5, 0x49, 0x30, 0xE1, 0x02, 0x11, 0x82, 0xE5, 0x49, 0x30, 0xE2, ++0x02, 0x11, 0x93, 0xE5, 0x4A, 0x30, 0xE0, 0x03, 0x12, 0x7C, 0xE1, 0xE5, 0x4C, 0x30, 0xE1, 0x05, ++0x7F, 0x04, 0x12, 0x77, 0x55, 0xE5, 0x4C, 0x30, 0xE4, 0x02, 0x11, 0x8B, 0xE5, 0x4C, 0x30, 0xE5, ++0x03, 0x12, 0x82, 0x8C, 0xE5, 0x4C, 0x30, 0xE6, 0x03, 0x12, 0x82, 0xC3, 0x74, 0xFB, 0x04, 0x90, ++0x01, 0xC4, 0xF0, 0x74, 0x4F, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, ++0xE0, 0x32, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x02, 0x51, 0x59, 0x22, 0x71, 0xFE, 0x7D, 0x02, 0x7F, ++0x02, 0x80, 0x1F, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x0E, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x03, ++0x02, 0x7A, 0x1D, 0xF1, 0xBD, 0xF1, 0xE7, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0x11, 0xB2, 0x7D, 0x02, ++0x7F, 0x02, 0x74, 0x3D, 0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0x25, 0x90, 0x81, ++0x47, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x81, 0x55, 0xF0, 0xA3, 0xF0, 0x90, 0x81, 0x50, 0xF0, ++0x90, 0x81, 0x48, 0xD1, 0x0E, 0x11, 0xA8, 0x7D, 0x10, 0x7F, 0x03, 0x74, 0x45, 0xF1, 0xD5, 0xFE, ++0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x90, 0x05, ++0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, 0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, ++0xD8, 0xF9, 0xFF, 0x12, 0x6F, 0x83, 0x12, 0x4F, 0xC2, 0x60, 0x02, 0x21, 0xB9, 0x90, 0x81, 0x4C, ++0xE0, 0x70, 0x02, 0x21, 0xB9, 0x71, 0xEB, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, ++0x81, 0x53, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x81, 0x52, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, ++0x90, 0x81, 0x52, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0x81, 0x53, 0xEF, 0xF0, 0x91, 0x74, 0xE4, ++0x90, 0x81, 0x55, 0x12, 0x95, 0xF0, 0x12, 0x82, 0x66, 0x12, 0x82, 0x5E, 0x54, 0xEF, 0xF0, 0x71, ++0xEB, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x03, 0x12, 0x7A, 0x7E, 0x51, 0xD4, 0x13, 0x54, 0x1F, 0x30, ++0xE0, 0x55, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x24, 0x71, 0xD3, 0x6F, 0x70, 0x47, ++0x90, 0x81, 0x48, 0xE0, 0x44, 0x40, 0xF0, 0xF1, 0xCD, 0x71, 0xE2, 0x7F, 0x03, 0xF1, 0xDD, 0x7D, ++0x01, 0x71, 0xDB, 0x7F, 0x02, 0x31, 0xBA, 0x90, 0x81, 0x53, 0xE0, 0x14, 0xF0, 0x80, 0x28, 0x12, ++0x96, 0x9C, 0x64, 0x01, 0x70, 0x21, 0x71, 0xD3, 0xFE, 0x6F, 0x60, 0x1B, 0x90, 0x05, 0x73, 0xE0, ++0xFF, 0xEE, 0x6F, 0x60, 0x12, 0x51, 0xD4, 0x54, 0x3F, 0x30, 0xE0, 0x0B, 0xEF, 0x54, 0xBF, 0x71, ++0xE2, 0x7F, 0x03, 0x11, 0xDB, 0x11, 0xA8, 0xF1, 0xC5, 0x22, 0x74, 0x3D, 0xF1, 0xD5, 0xFE, 0xF6, ++0x74, 0x30, 0x01, 0xE3, 0xEF, 0x70, 0x30, 0x7D, 0x78, 0x71, 0xDB, 0x7F, 0x03, 0x31, 0xBA, 0x7D, ++0xC8, 0x7F, 0x02, 0x11, 0xDB, 0x12, 0x82, 0x66, 0xE4, 0xFF, 0x51, 0x30, 0xEF, 0x70, 0x07, 0xD1, ++0x06, 0x54, 0x7F, 0xF0, 0x80, 0x07, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x4B, 0xBF, 0xF1, 0xBD, 0x90, ++0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0x01, 0x36, 0x74, 0x78, 0xF0, 0xA3, 0x74, 0x02, ++0xF0, 0x7D, 0x78, 0xFF, 0x11, 0xB2, 0x7D, 0x02, 0x7F, 0x03, 0x11, 0xB2, 0x90, 0x06, 0x0A, 0xE0, ++0x44, 0x07, 0x12, 0x95, 0xF0, 0xE4, 0xFF, 0x51, 0x30, 0xBF, 0x01, 0x11, 0x51, 0xCD, 0xF0, 0x90, ++0x81, 0x4F, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, 0x7F, 0x04, 0x02, 0x4B, 0xBF, 0xF1, 0xC5, 0x22, ++0x12, 0x5F, 0x9A, 0xFE, 0xEF, 0x54, 0x07, 0xFF, 0x12, 0x5A, 0x18, 0xE0, 0xFD, 0x7C, 0x00, 0x12, ++0x95, 0xD7, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, ++0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0x51, 0xD4, 0x13, 0x54, 0x1F, 0x30, 0xE0, ++0x0F, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x06, 0x7D, 0x02, 0x7F, 0x02, 0x31, 0xBA, ++0x90, 0x81, 0x47, 0x12, 0x87, 0xB8, 0x30, 0xE0, 0x0A, 0xEF, 0x12, 0x82, 0x5B, 0x54, 0x07, 0x70, ++0x4B, 0x80, 0x47, 0x90, 0x81, 0x55, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x50, 0xE0, 0x54, 0xEF, 0xF0, ++0x12, 0x7F, 0xCD, 0xD3, 0x9F, 0x40, 0x33, 0x12, 0x4F, 0xC2, 0x70, 0x30, 0x12, 0x7A, 0x77, 0x70, ++0x07, 0x12, 0x7C, 0xA0, 0x51, 0xCD, 0xF0, 0x22, 0x12, 0x7C, 0xA0, 0x90, 0x81, 0x56, 0xE0, 0x04, ++0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x0A, 0x51, 0xCD, 0xF0, 0xE4, 0x90, 0x81, 0x56, 0xF0, 0x80, ++0x03, 0x12, 0x7B, 0x4B, 0xE4, 0x90, 0x81, 0x55, 0xF0, 0x22, 0xF1, 0xE7, 0x22, 0x90, 0x81, 0x48, ++0xE0, 0x54, 0xFB, 0x22, 0x90, 0x81, 0x48, 0xE0, 0xFF, 0x13, 0x13, 0x22, 0x90, 0x81, 0x4C, 0xE0, ++0x70, 0x02, 0x61, 0x6C, 0x90, 0x81, 0x63, 0xE0, 0x04, 0xF1, 0x85, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0x71, 0xF4, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x44, 0x27, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x71, 0xF7, ++0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0x27, ++0x90, 0x81, 0x97, 0x12, 0x95, 0xCD, 0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x0C, 0x12, 0x7D, ++0x2A, 0x74, 0x05, 0xF0, 0x12, 0x7B, 0xCE, 0x12, 0x7F, 0xB3, 0x51, 0xD4, 0x13, 0x54, 0x1F, 0x30, ++0xE0, 0x13, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x0C, 0x7D, 0x02, 0x7F, 0x02, 0x31, 0xBA, 0x7D, ++0x01, 0x7F, 0x02, 0x31, 0xBA, 0x90, 0x84, 0x91, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, ++0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x12, 0x5A, 0xD9, 0x12, ++0x8B, 0x7B, 0xE4, 0x90, 0x83, 0xFB, 0xF0, 0x12, 0x96, 0x19, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x52, ++0x90, 0x83, 0x8F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7C, 0x00, 0x7D, 0x64, 0x12, 0x20, 0x30, 0x90, ++0x83, 0xE3, 0xE0, 0x6E, 0x70, 0x03, 0xA3, 0xE0, 0x6F, 0x60, 0x0A, 0x90, 0x83, 0xE3, 0xE4, 0x75, ++0xF0, 0x01, 0x02, 0x43, 0xF6, 0x90, 0x83, 0x93, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x83, 0xA1, ++0xE0, 0xB5, 0x06, 0x14, 0xA3, 0xE0, 0xB5, 0x07, 0x0F, 0xEF, 0x4E, 0x60, 0x0B, 0x90, 0x01, 0xC7, ++0x74, 0x31, 0xF0, 0x7F, 0x01, 0x02, 0x5B, 0x63, 0x12, 0x6D, 0x0E, 0xE4, 0x90, 0x83, 0xE3, 0xF0, ++0xA3, 0xF0, 0x22, 0x90, 0x81, 0x52, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x7F, 0x02, 0x31, 0xBA, 0x7D, ++0x02, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x22, 0x90, 0x81, 0x4A, 0xE0, 0xFF, ++0xC4, 0x54, 0x0F, 0x22, 0x90, 0x05, 0x62, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0xE4, 0x90, ++0x89, 0x07, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x6A, 0x12, 0x4F, 0xC2, 0x70, 0x65, 0xF1, 0xCD, ++0xF1, 0x85, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x71, 0xF4, 0x78, 0x10, 0x12, 0x20, ++0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0x27, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x71, 0xF7, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0x12, 0x95, 0xC7, 0x44, 0x80, 0xF0, 0x90, 0x89, 0x07, 0x74, 0x01, 0xF0, ++0xE4, 0x90, 0x81, 0x53, 0xF0, 0x04, 0x60, 0x1B, 0x12, 0x96, 0xA4, 0xE4, 0xF5, 0x1D, 0x90, 0x81, ++0x54, 0xE0, 0x12, 0x79, 0x97, 0x90, 0x81, 0x4F, 0xE0, 0x20, 0xE2, 0x07, 0x7D, 0x01, 0x7F, 0x04, ++0x12, 0x4B, 0xBF, 0x22, 0xE4, 0x90, 0x89, 0x02, 0xF0, 0xA3, 0xF0, 0xA3, 0xF1, 0x85, 0xC0, 0x04, ++0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x71, 0xF4, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0x27, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0xA3, 0x71, 0xF7, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0x12, 0x44, 0x27, 0x90, 0x81, 0x9B, 0x12, 0x20, 0xCE, 0x90, 0x81, 0x9F, 0x12, 0x44, 0x45, 0x90, ++0x81, 0x9B, 0x12, 0x44, 0x51, 0xC3, 0x12, 0x44, 0x34, 0x40, 0x42, 0x90, 0x81, 0x47, 0xE0, 0x90, ++0x81, 0x9F, 0x30, 0xE0, 0x10, 0x12, 0x95, 0x7F, 0x90, 0x81, 0x69, 0xE0, 0x24, 0x04, 0x2F, 0xFF, ++0x90, 0x81, 0xA3, 0x80, 0x06, 0x12, 0x95, 0x7F, 0x90, 0x81, 0xA4, 0xE0, 0xFE, 0xC3, 0xEF, 0x9E, ++0x90, 0x89, 0x03, 0xF0, 0x90, 0x89, 0x03, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x0F, 0x74, 0x6A, ++0x2F, 0x12, 0x89, 0xFB, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x62, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x62, ++0xE0, 0xFF, 0xD3, 0x90, 0x81, 0xA6, 0xE0, 0x9F, 0x90, 0x81, 0xA5, 0xE0, 0x94, 0x00, 0x40, 0x02, ++0xA1, 0xEA, 0xB1, 0xFC, 0xB1, 0xF3, 0x50, 0x1D, 0x12, 0x95, 0x9C, 0x90, 0x89, 0x04, 0xE0, 0xD3, ++0x9F, 0x40, 0x0A, 0x90, 0x89, 0x02, 0xE0, 0x90, 0x89, 0x05, 0xF0, 0x80, 0x08, 0x90, 0x89, 0x02, ++0xE0, 0x04, 0xF0, 0x80, 0xDF, 0xB1, 0xFC, 0xB1, 0xF3, 0x50, 0x2D, 0x12, 0x95, 0x9C, 0xC3, 0x90, ++0x81, 0xA6, 0xE0, 0x9F, 0xFF, 0x90, 0x81, 0xA5, 0xE0, 0x94, 0x00, 0xFE, 0x90, 0x89, 0x04, 0xE0, ++0xD3, 0x9F, 0xE4, 0x9E, 0x40, 0x0A, 0x90, 0x89, 0x02, 0xE0, 0x90, 0x89, 0x06, 0xF0, 0x80, 0x08, ++0x90, 0x89, 0x02, 0xE0, 0x04, 0xF0, 0x80, 0xCF, 0x90, 0x89, 0x05, 0xE0, 0x90, 0x81, 0x67, 0xF0, ++0x90, 0x89, 0x06, 0xE0, 0x90, 0x81, 0x68, 0xB1, 0xEB, 0x94, 0x0A, 0x40, 0x0A, 0xEF, 0x24, 0xF6, ++0x90, 0x81, 0x5F, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x81, 0x5F, 0xB1, 0xEB, 0x74, 0x0A, 0x9F, ++0x90, 0x81, 0x5E, 0xF0, 0x90, 0x81, 0x67, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x81, 0x65, ++0xF0, 0x90, 0x81, 0x47, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x81, 0xA3, 0x80, 0x03, 0x90, 0x81, 0xA4, ++0xE0, 0xFF, 0x90, 0x81, 0x65, 0xE0, 0x2F, 0x04, 0xF0, 0x90, 0x81, 0x65, 0xE0, 0xC3, 0x94, 0x0A, ++0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x81, 0x65, 0xE0, 0x24, 0x02, 0xF0, 0x12, 0x7D, 0x2A, 0x74, ++0x03, 0xF0, 0x12, 0x7B, 0xCE, 0xE4, 0xFF, 0x12, 0x89, 0x6B, 0x22, 0xF0, 0x90, 0x81, 0x67, 0xE0, ++0xFF, 0xC3, 0x22, 0x90, 0x89, 0x02, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x22, 0xE4, 0x90, 0x89, 0x04, ++0xF0, 0x90, 0x89, 0x02, 0xF0, 0x22, 0xD1, 0x71, 0x12, 0x4F, 0xE8, 0x90, 0x81, 0x47, 0xE0, 0x54, ++0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x22, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, 0xF1, 0xB7, 0xFF, 0xF5, ++0x54, 0x12, 0x1F, 0xA4, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x76, 0x8E, 0xF5, 0x55, 0x80, ++0x02, 0x8F, 0x55, 0x85, 0x54, 0x53, 0xE5, 0x53, 0xD3, 0x95, 0x55, 0x50, 0x24, 0xAB, 0x50, 0xAA, ++0x51, 0xA9, 0x52, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFD, 0xAF, 0x53, 0x12, 0x59, 0xD8, 0xAF, 0x53, ++0x51, 0x30, 0xEF, 0xAF, 0x53, 0x70, 0x04, 0xF1, 0xE6, 0x80, 0x02, 0xF1, 0xE5, 0x05, 0x53, 0x80, ++0xD5, 0xE5, 0x54, 0x70, 0x0B, 0xFF, 0x51, 0x30, 0xEF, 0x70, 0x05, 0xD1, 0x06, 0x54, 0x7F, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, ++0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, ++0xF0, 0x12, 0x96, 0x7B, 0x54, 0x7F, 0xFC, 0x90, 0x84, 0x71, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x71, ++0x12, 0x78, 0xDC, 0x7F, 0x7C, 0xF1, 0x7C, 0x12, 0x20, 0xDA, 0xCC, 0xC0, 0x00, 0xC0, 0xF1, 0x7A, ++0x12, 0x20, 0xDA, 0x00, 0xC0, 0x00, 0x14, 0x12, 0x96, 0xB4, 0x90, 0x84, 0x5A, 0x12, 0x20, 0xDA, ++0x00, 0x03, 0x3E, 0x60, 0xE4, 0xFD, 0xFF, 0x12, 0x79, 0x6F, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, ++0x60, 0x47, 0x90, 0x04, 0xEC, 0xE0, 0x54, 0xDD, 0xF0, 0x90, 0x83, 0xE7, 0xE0, 0xFF, 0x60, 0x03, ++0x12, 0x6F, 0xA8, 0x90, 0x01, 0xC7, 0xE4, 0x12, 0x96, 0x0F, 0x12, 0x6F, 0xC6, 0x12, 0x96, 0x84, ++0x90, 0x06, 0x09, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x35, 0x12, 0x4F, 0x33, 0x90, 0x02, 0x86, 0xE0, ++0x44, 0x04, 0xF0, 0x12, 0x8C, 0xB3, 0xF1, 0xA8, 0x12, 0x4D, 0xDD, 0x12, 0x8F, 0x79, 0x90, 0x01, ++0x34, 0x74, 0x08, 0xF0, 0xFD, 0xE4, 0xFF, 0x01, 0xB2, 0x90, 0x04, 0xEC, 0xE0, 0x44, 0x22, 0xF0, ++0x7D, 0x08, 0xE4, 0xFF, 0x31, 0xBA, 0x90, 0x06, 0x90, 0xE0, 0x54, 0xF0, 0xF0, 0x90, 0x02, 0x86, ++0xE0, 0x54, 0xFB, 0xF0, 0x12, 0x8D, 0x59, 0xF1, 0xA9, 0x7E, 0x00, 0x7F, 0x25, 0x7D, 0x00, 0x7B, ++0x01, 0x7A, 0x81, 0x79, 0xB0, 0x12, 0x46, 0x4B, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x20, 0xF0, 0x12, ++0x8D, 0x46, 0x12, 0x5B, 0xAB, 0xE4, 0x90, 0x83, 0xF1, 0xF1, 0x72, 0x90, 0x83, 0x8F, 0xF1, 0x70, ++0xA3, 0xF1, 0x70, 0x90, 0x83, 0xA1, 0xF0, 0xA3, 0xF0, 0x90, 0x83, 0xE3, 0xF0, 0xA3, 0xF0, 0x22, ++0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x7F, 0x8C, 0x7E, 0x08, 0x12, 0x2E, ++0xA2, 0x90, 0x85, 0xBB, 0x22, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, ++0x08, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x02, 0x44, 0x27, 0x22, 0x90, 0x81, 0xB0, 0x12, 0x82, 0xB2, 0x30, ++0xE0, 0x02, 0xF1, 0x52, 0x22, 0x4E, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x1F, 0xBD, 0x90, 0x81, 0x47, ++0xE0, 0x54, 0xF7, 0xF0, 0x22, 0x90, 0x81, 0x48, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x52, ++0xE0, 0x90, 0x05, 0x73, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0x74, 0x45, 0x2F, ++0xF8, 0xE6, 0x4D, 0x01, 0xDF, 0x22, 0x22, 0x90, 0x81, 0x4E, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x4B, ++0xBF, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, ++0x7D, 0xF1, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x57, 0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, ++0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, ++0xE0, 0x32, 0x90, 0x00, 0xF7, 0xE0, 0x20, 0xE7, 0x09, 0xE0, 0x7F, 0x01, 0x20, 0xE6, 0x0C, 0x7F, ++0x02, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x30, 0xE6, 0x02, 0x7F, 0x03, 0x22, 0x11, 0x22, 0x90, 0x80, ++0x07, 0xEF, 0xF0, 0x11, 0x5C, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x00, 0x12, 0xE0, 0x54, ++0xC7, 0x44, 0x20, 0xFD, 0x7F, 0x12, 0x12, 0x32, 0x1E, 0x02, 0x2D, 0xA7, 0x11, 0xC8, 0x11, 0xF0, ++0x11, 0x8A, 0x11, 0xA9, 0xE4, 0xF5, 0x35, 0xF5, 0x36, 0xF5, 0x37, 0x75, 0x38, 0x80, 0xAD, 0x35, ++0x7F, 0x50, 0x12, 0x32, 0x1E, 0xAD, 0x36, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xAD, 0x37, 0x7F, 0x52, ++0x12, 0x32, 0x1E, 0xAD, 0x38, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0x75, 0x3D, 0x10, 0xE4, 0xF5, 0x3E, ++0x75, 0x3F, 0x07, 0x75, 0x40, 0x02, 0x90, 0x01, 0x30, 0xE5, 0x3D, 0xF0, 0xA3, 0xE5, 0x3E, 0xF0, ++0xA3, 0xE5, 0x3F, 0xF0, 0xA3, 0xE5, 0x40, 0xF0, 0x22, 0x75, 0x45, 0x06, 0x75, 0x46, 0x01, 0x75, ++0x47, 0x03, 0x75, 0x48, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x45, 0xF0, 0xA3, 0xE5, 0x46, 0xF0, 0xA3, ++0xE5, 0x47, 0xF0, 0xA3, 0xE5, 0x48, 0xF0, 0x22, 0x90, 0x01, 0x30, 0xE4, 0x12, 0x57, 0x72, 0x90, ++0x01, 0x38, 0x12, 0x57, 0x72, 0xFD, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x51, 0x12, ++0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x32, 0x1E, ++0x90, 0x01, 0x34, 0x74, 0xFF, 0x12, 0x57, 0x72, 0x90, 0x01, 0x3C, 0x12, 0x57, 0x72, 0xFD, 0x7F, ++0x54, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x55, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x56, 0x12, ++0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x32, 0x1E, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x84, 0x92, ++0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, ++0x22, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, ++0xA8, 0xF5, 0xE8, 0x11, 0xC8, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x32, ++0x1E, 0x80, 0xFE, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, ++0x90, 0xFD, 0x00, 0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x80, 0xD3, 0x12, 0x32, 0x77, 0x12, 0x80, 0xE0, ++0x12, 0x81, 0xAD, 0x7F, 0x01, 0x12, 0x47, 0x8C, 0x90, 0x83, 0xF7, 0x74, 0x02, 0xF0, 0xFF, 0x12, ++0x47, 0x8C, 0x90, 0x83, 0xF7, 0xE0, 0x04, 0xF0, 0x11, 0x3C, 0x31, 0xA8, 0x90, 0x00, 0x80, 0xE0, ++0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, 0x75, 0x20, 0xFF, 0xF1, 0xE8, 0x12, 0x81, 0x10, ++0x12, 0x81, 0xB4, 0xE4, 0xFF, 0x02, 0x48, 0x15, 0x31, 0xD5, 0x12, 0x80, 0x58, 0x12, 0x88, 0xB8, ++0x12, 0x57, 0x39, 0x12, 0x8B, 0x64, 0x51, 0x79, 0x90, 0x84, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x54, ++0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4, 0x90, 0x84, 0x06, 0xF0, 0x90, 0x84, 0x04, ++0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0xF1, 0x9A, 0xFE, 0xEF, 0x54, 0x07, 0xFF, 0xED, ++0x70, 0x12, 0x51, 0x18, 0xC0, 0x83, 0xC0, 0x82, 0x51, 0x10, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xF4, 0x5E, 0x80, 0x0F, 0x51, 0x18, 0xC0, 0x83, 0xC0, 0x82, 0x51, 0x10, 0x80, 0x02, 0xC3, 0x33, ++0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x51, 0x23, 0x90, 0x81, 0x45, 0xEF, 0xF0, 0x22, ++0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x74, 0x3D, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x81, ++0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7D, 0x08, 0xED, 0x14, 0xF9, 0x24, ++0x3D, 0x51, 0x1B, 0xE0, 0x60, 0x3A, 0x7C, 0x08, 0xEC, 0x14, 0x90, 0x84, 0x90, 0xF0, 0x74, 0x3D, ++0x29, 0x51, 0x1B, 0xE0, 0xFB, 0x7A, 0x00, 0x90, 0x84, 0x90, 0x12, 0x95, 0xD5, 0x80, 0x05, 0xC3, ++0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x60, 0x0F, 0xE9, ++0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0x84, 0x90, 0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, 0xDC, 0xC8, ++0xDD, 0xBA, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x96, 0x60, 0x7A, 0x83, 0x79, 0xFC, ++0x12, 0x46, 0x4B, 0x90, 0x83, 0xFD, 0x74, 0x08, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0x90, 0x89, ++0x16, 0x12, 0x44, 0x72, 0x51, 0x79, 0x12, 0x75, 0x54, 0xFE, 0x51, 0xD2, 0x4E, 0xF0, 0xEF, 0xC3, ++0x13, 0x30, 0xE0, 0x2D, 0x12, 0x57, 0xB7, 0x90, 0x83, 0xFD, 0x12, 0x76, 0x8D, 0x90, 0x83, 0xFE, ++0xF0, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x04, 0xFE, 0x90, 0x83, 0xFC, 0xE0, 0x54, 0xFB, 0x12, 0x77, ++0x64, 0x90, 0x83, 0xFF, 0xF0, 0xEF, 0x54, 0x08, 0xFF, 0x90, 0x83, 0xFC, 0xE0, 0x54, 0xF7, 0x4F, ++0xF0, 0x22, 0x90, 0x83, 0xFC, 0xE0, 0x54, 0xFE, 0x22, 0x90, 0x83, 0xFC, 0xE0, 0x30, 0xE0, 0x7A, ++0x90, 0x84, 0x00, 0xE0, 0x04, 0xF0, 0x90, 0x84, 0x03, 0xE0, 0x64, 0x01, 0x70, 0x2F, 0x90, 0x83, ++0xFC, 0x12, 0x87, 0xB8, 0x30, 0xE0, 0x26, 0x90, 0x84, 0x02, 0xE0, 0x70, 0x20, 0x90, 0x83, 0xFF, ++0xE0, 0xFE, 0xA3, 0xE0, 0xC3, 0x9E, 0x40, 0x15, 0xF1, 0x9A, 0x30, 0xE0, 0x0A, 0xF1, 0x79, 0x12, ++0x57, 0xE6, 0x51, 0xD2, 0xF0, 0x80, 0x06, 0x71, 0x5B, 0x51, 0xD2, 0xF0, 0x22, 0x90, 0x84, 0x00, ++0xE0, 0xFF, 0x90, 0x83, 0xFD, 0xE0, 0xD3, 0x9F, 0x50, 0x30, 0x90, 0x06, 0x92, 0xE0, 0x20, 0xE2, ++0x1A, 0x90, 0x84, 0x02, 0xE0, 0x70, 0x14, 0x7D, 0x08, 0xFF, 0x12, 0x4E, 0x50, 0x90, 0x84, 0x01, ++0xE0, 0x04, 0xF0, 0x90, 0x83, 0xFB, 0xE0, 0x04, 0xF0, 0x80, 0x06, 0x90, 0x06, 0x92, 0x74, 0x04, ++0xF0, 0xE4, 0x90, 0x84, 0x00, 0xF0, 0x90, 0x84, 0x02, 0xF0, 0x22, 0x90, 0x01, 0xC7, 0x74, 0x10, ++0xF0, 0x7F, 0x01, 0x90, 0x84, 0x96, 0xEF, 0xF0, 0x90, 0x80, 0x07, 0xE0, 0x64, 0x02, 0x70, 0x1D, ++0x90, 0x84, 0x96, 0xE0, 0xFD, 0x64, 0x01, 0x70, 0x2F, 0xD1, 0x6E, 0xF1, 0x81, 0x30, 0xE0, 0x09, ++0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80, 0x1F, 0xAF, 0x05, 0x80, 0x19, 0x90, 0x01, 0x00, ++0x74, 0xFF, 0xF0, 0x7F, 0x64, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, ++0xF0, 0x90, 0x84, 0x96, 0xE0, 0xFF, 0xD1, 0xCE, 0x51, 0xD2, 0xF0, 0x90, 0x81, 0xB0, 0xE0, 0x54, ++0xBF, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x89, 0x1A, 0x74, 0x08, 0xF0, ++0xE4, 0x12, 0x57, 0x71, 0x90, 0x89, 0x21, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x12, 0x8D, 0x08, 0x12, ++0x6F, 0xC6, 0xF1, 0xD8, 0x90, 0x02, 0x82, 0xE0, 0x90, 0x89, 0x19, 0xF0, 0x90, 0x81, 0xB0, 0xE0, ++0x20, 0xE0, 0x02, 0xC1, 0x5E, 0x90, 0x81, 0xB9, 0xE0, 0x20, 0xE0, 0x07, 0x90, 0x01, 0x3F, 0xE0, ++0x30, 0xE2, 0x19, 0x90, 0x80, 0x07, 0xE0, 0xB4, 0x01, 0x0E, 0x90, 0xFD, 0x01, 0xE0, 0x20, 0xE6, ++0x07, 0x90, 0xFD, 0x00, 0xE0, 0x44, 0x10, 0xF0, 0x7F, 0x01, 0x71, 0x63, 0xE4, 0x90, 0x89, 0x18, ++0xF0, 0x90, 0x89, 0x19, 0xE0, 0xFF, 0x90, 0x89, 0x18, 0xE0, 0xC3, 0x9F, 0x40, 0x02, 0xC1, 0x5E, ++0x12, 0x96, 0x94, 0xFD, 0xEC, 0xFF, 0x90, 0xFD, 0x11, 0xF0, 0xAE, 0x05, 0xAA, 0x06, 0x90, 0x89, ++0x1C, 0xEF, 0xF0, 0x74, 0x02, 0x2A, 0x12, 0x8D, 0x20, 0xFF, 0x74, 0x03, 0x2A, 0x12, 0x8C, 0xFF, ++0x54, 0x03, 0xFE, 0xEF, 0x24, 0x18, 0x2E, 0x90, 0x89, 0x21, 0xF0, 0xE0, 0xFF, 0x2A, 0x90, 0x89, ++0x14, 0xF0, 0x7E, 0x00, 0x12, 0x96, 0x94, 0x2F, 0xFF, 0xEE, 0x3C, 0x90, 0x89, 0x15, 0xF0, 0xA3, ++0xEF, 0xF0, 0x90, 0x89, 0x14, 0xE0, 0xFD, 0x24, 0x00, 0x12, 0x87, 0x8A, 0xFE, 0x54, 0xFC, 0x90, ++0x89, 0x17, 0xF0, 0xAF, 0x06, 0x12, 0x8C, 0x82, 0xFD, 0x90, 0x89, 0x14, 0xE0, 0xF1, 0xE0, 0x12, ++0x67, 0x8B, 0x90, 0x89, 0x1B, 0xEF, 0xF0, 0x74, 0x01, 0x2A, 0x12, 0x8C, 0x85, 0xFE, 0x74, 0x00, ++0x2A, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0x12, 0x6F, 0xC4, 0x54, 0x3F, 0xFE, 0x90, 0x89, 0x1D, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0x89, 0x21, 0xE0, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0x12, 0x8C, 0x8E, 0x74, ++0x0F, 0x2A, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0xFD, 0x90, 0x89, 0x12, 0x12, 0x8D, ++0x11, 0x90, 0x89, 0x12, 0xE0, 0xFA, 0xA3, 0xE0, 0xD3, 0x9F, 0xEA, 0x9E, 0x40, 0x1D, 0x90, 0x89, ++0x12, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x81, 0x3B, 0xE0, 0xFA, 0xA3, 0xE0, 0x24, 0x01, 0xFB, ++0xE4, 0x3A, 0xFA, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xF1, 0xD8, 0xED, 0x30, 0xE7, 0x06, 0x90, ++0x01, 0xC7, 0x74, 0x21, 0xF0, 0xED, 0x30, 0xE6, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x22, 0xF0, 0xED, ++0x30, 0xE5, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x23, 0xF0, 0x90, 0x89, 0x17, 0xE0, 0x24, 0x40, 0x60, ++0x04, 0x24, 0x20, 0x70, 0x1F, 0x90, 0x81, 0xB3, 0xE0, 0xFF, 0xF1, 0x85, 0x20, 0xE0, 0x02, 0xA1, ++0xFF, 0x90, 0x89, 0x14, 0xF1, 0xA1, 0x70, 0x02, 0xA1, 0xFF, 0x90, 0x89, 0x17, 0xE0, 0xFF, 0x12, ++0x8E, 0x11, 0xA1, 0xFF, 0x12, 0x96, 0x19, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x5A, 0x90, 0x89, 0x1B, ++0xE0, 0xFF, 0x90, 0x89, 0x14, 0xE0, 0x2F, 0xFF, 0xE4, 0x33, 0xCF, 0x24, 0x08, 0xCF, 0x34, 0x00, ++0x90, 0x89, 0x1F, 0xF0, 0xA3, 0xEF, 0xF0, 0x24, 0x00, 0x12, 0x87, 0x8A, 0x64, 0x45, 0x70, 0x37, ++0xD1, 0x64, 0x12, 0x94, 0x22, 0xEF, 0x64, 0x01, 0x70, 0x2D, 0xD1, 0x64, 0x12, 0x94, 0x3F, 0xEF, ++0x64, 0x01, 0x70, 0x23, 0x90, 0x89, 0x23, 0x04, 0xD1, 0x63, 0x90, 0x89, 0x1C, 0xE0, 0xFD, 0x12, ++0x87, 0x29, 0x90, 0x89, 0x1C, 0xE0, 0xFD, 0x90, 0xFD, 0x11, 0xD1, 0x63, 0x12, 0x83, 0x86, 0x90, ++0x89, 0x1C, 0xE0, 0x90, 0xFD, 0x11, 0xF0, 0x90, 0x89, 0x14, 0xF1, 0xA1, 0x60, 0x1B, 0xF1, 0x8C, ++0x90, 0x89, 0x1A, 0xE0, 0xFB, 0x90, 0x89, 0x1C, 0xE0, 0x90, 0x89, 0x28, 0xF0, 0x12, 0x7D, 0x42, ++0xEF, 0x60, 0x06, 0x90, 0x89, 0x23, 0x74, 0x01, 0xF0, 0x90, 0x81, 0xB0, 0xE0, 0xC3, 0x13, 0x30, ++0xE0, 0x0E, 0xF1, 0x8C, 0x12, 0x83, 0xDF, 0xEF, 0x60, 0x06, 0x90, 0x89, 0x23, 0x74, 0x01, 0xF0, ++0x90, 0x81, 0xB0, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0F, 0x90, 0x89, 0x14, 0xE0, 0xFF, ++0x7E, 0x00, 0x90, 0x89, 0x1B, 0xE0, 0xFD, 0x12, 0x85, 0x16, 0x90, 0x81, 0xB0, 0xE0, 0xFF, 0xF1, ++0x85, 0x30, 0xE0, 0x0B, 0x90, 0x89, 0x23, 0xE0, 0x70, 0x05, 0xF1, 0x8C, 0x12, 0x7E, 0xBB, 0x90, ++0x81, 0xB9, 0xE0, 0x20, 0xE0, 0x07, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x04, 0x7F, 0x01, 0x71, ++0x63, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x02, 0xD1, 0x6E, 0x12, 0x8D, 0xE6, 0xEF, 0x64, 0x01, ++0x70, 0x3C, 0x12, 0x8D, 0x30, 0x90, 0x89, 0x22, 0xEF, 0xF0, 0x64, 0x01, 0x60, 0x22, 0xD1, 0x6E, ++0x90, 0x89, 0x22, 0xE0, 0xFF, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x42, 0xF0, 0x80, 0x0A, ++0xEF, 0xB4, 0x04, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x43, 0xF0, 0x7F, 0x01, 0x71, 0x63, 0x80, 0x0E, ++0x90, 0x89, 0x12, 0x12, 0x8B, 0xB8, 0x90, 0x89, 0x18, 0xE0, 0x04, 0xF0, 0x81, 0x11, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xF0, 0x90, 0x89, 0x1F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xF0, 0x90, 0x81, ++0xB9, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x83, 0xFC, 0xE0, 0xFD, 0x30, 0xE0, 0x4F, 0x90, 0x84, ++0x01, 0xE0, 0xFC, 0x60, 0x48, 0x12, 0x95, 0xD7, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x04, 0xE0, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x0B, 0xE4, 0x90, 0x84, 0x01, 0xF0, ++0x90, 0x84, 0x03, 0x04, 0xF0, 0x22, 0x90, 0x83, 0xFE, 0xE0, 0xD3, 0x9C, 0x50, 0x16, 0xED, 0x13, ++0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0xF1, 0x79, 0x12, 0x57, 0xE6, 0x80, 0x02, 0x71, 0x5B, ++0x51, 0xD2, 0xF0, 0x22, 0x12, 0x4E, 0x4C, 0x90, 0x84, 0x01, 0xE0, 0x04, 0xF0, 0x22, 0xAD, 0x07, ++0x90, 0x81, 0xB5, 0xE0, 0x75, 0xF0, 0x40, 0xA4, 0xFF, 0x90, 0x84, 0x79, 0xE5, 0xF0, 0x12, 0x96, ++0xAC, 0x90, 0x81, 0xB6, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x90, 0x84, 0x7C, 0xF0, 0xED, 0x64, 0x01, ++0x70, 0x6D, 0x90, 0x84, 0x79, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x60, 0x0B, 0x90, 0x84, 0x79, 0x74, ++0xFF, 0x75, 0xF0, 0xD0, 0x12, 0x43, 0xF6, 0xF1, 0x6B, 0x13, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, ++0x02, 0x7D, 0x01, 0x12, 0x74, 0x4B, 0xF1, 0x6B, 0x12, 0x74, 0x47, 0x90, 0x81, 0xB6, 0xE0, 0x30, ++0xE0, 0x3D, 0xF1, 0x60, 0x13, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x12, 0x74, ++0x4B, 0xE4, 0x90, 0x84, 0x7B, 0xF0, 0x90, 0x84, 0x7C, 0xE0, 0xFF, 0x90, 0x84, 0x7B, 0xE0, 0xC3, ++0x9F, 0x50, 0x1C, 0xF1, 0x60, 0x12, 0x74, 0x47, 0xF1, 0x60, 0x13, 0x54, 0x07, 0x7D, 0x00, 0x20, ++0xE0, 0x02, 0x7D, 0x01, 0x12, 0x74, 0x4B, 0x90, 0x84, 0x7B, 0xE0, 0x04, 0xF0, 0x80, 0xD7, 0x22, ++0x90, 0x84, 0x79, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x32, 0xAA, 0x90, 0x81, 0xB4, 0xE0, 0x54, ++0x7F, 0xFF, 0x90, 0x81, 0xB3, 0xE0, 0xFE, 0xC4, 0x22, 0xE4, 0xFD, 0xFF, 0x31, 0xD8, 0xE4, 0xFF, ++0x22, 0x90, 0x81, 0xB4, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0x90, 0x89, 0x15, 0xE0, ++0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x89, 0x1B, 0xE0, 0xFD, 0x22, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, ++0x22, 0xE0, 0xFF, 0xF1, 0xA7, 0xEF, 0x22, 0xE4, 0xFE, 0xEF, 0x2E, 0xF1, 0xE0, 0xF5, 0x83, 0xE0, ++0xFD, 0x74, 0x34, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xED, 0xF0, 0x0E, 0xEE, 0xB4, ++0x06, 0xE7, 0x78, 0xBA, 0x7C, 0x81, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x34, 0x12, 0x87, ++0xBF, 0x7F, 0x00, 0x70, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x89, 0x12, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, ++0x24, 0x04, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0x22, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x84, 0x22, 0xE4, ++0x90, 0x89, 0x0D, 0xF0, 0x90, 0x89, 0x0D, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xEF, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x0F, 0x90, 0x81, 0x4F, 0xE0, 0xFF, ++0x90, 0x81, 0x4E, 0xE0, 0x6F, 0x60, 0x03, 0x12, 0x57, 0xE7, 0xC2, 0xAF, 0x12, 0x81, 0x71, 0xBF, ++0x01, 0x02, 0x11, 0x2D, 0xD2, 0xAF, 0xF1, 0xD9, 0x12, 0x46, 0xC4, 0x80, 0xC7, 0x90, 0x81, 0x47, ++0xE0, 0x30, 0xE0, 0x02, 0x11, 0x37, 0x22, 0x90, 0x81, 0x4F, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, ++0x0E, 0x12, 0x8A, 0xFA, 0xBF, 0x01, 0x08, 0x11, 0x50, 0x90, 0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x11, 0x7B, 0x11, 0x60, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x12, 0x88, 0x30, 0x90, 0x00, 0x08, 0xE0, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, 0xE4, ++0xFF, 0x11, 0xC7, 0x90, 0x81, 0x48, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x81, 0x48, 0xE0, 0x44, ++0x10, 0xF0, 0x90, 0x81, 0x57, 0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x32, 0x1E, 0x90, 0x81, 0x4D, 0xE0, ++0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, ++0x2F, 0x74, 0x90, 0xF0, 0x90, 0x00, 0x08, 0xE0, 0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, ++0x7F, 0x01, 0x11, 0xC7, 0x90, 0x00, 0x90, 0xE0, 0x44, 0x01, 0xFD, 0x7F, 0x90, 0x12, 0x32, 0x1E, ++0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x90, 0x89, 0x0E, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, ++0xF0, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x89, 0x0E, 0xE0, ++0x6F, 0x60, 0x35, 0xC3, 0x90, 0x89, 0x10, 0xE0, 0x94, 0x88, 0x90, 0x89, 0x0F, 0xE0, 0x94, 0x13, ++0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x89, 0x0F, 0x31, 0x19, 0x12, ++0x81, 0x6A, 0xD3, 0x90, 0x89, 0x10, 0xE0, 0x94, 0x32, 0x90, 0x89, 0x0F, 0xE0, 0x94, 0x00, 0x40, ++0xC0, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xB9, 0x22, 0xE4, 0x75, 0xF0, 0x01, 0x02, 0x43, 0xF6, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x89, 0xD5, 0x12, 0x44, 0x72, 0x90, 0x89, 0xD8, ++0xED, 0xF0, 0xE4, 0x90, 0x8A, 0x24, 0xF0, 0x12, 0x96, 0x57, 0x50, 0x07, 0x71, 0x11, 0x12, 0x96, ++0x2A, 0x80, 0xF4, 0x71, 0x4B, 0x12, 0x95, 0xDF, 0x90, 0x89, 0xE0, 0xF0, 0x71, 0x44, 0x94, 0x40, ++0x50, 0x0A, 0x71, 0x11, 0xE0, 0x64, 0x36, 0xF0, 0x51, 0xFF, 0x80, 0xF0, 0x51, 0xF6, 0x90, 0x89, ++0xDC, 0x12, 0x96, 0x8C, 0x74, 0x80, 0x12, 0x1F, 0xFC, 0xEF, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, ++0xFF, 0xE5, 0xF0, 0x34, 0x02, 0xFC, 0x90, 0x00, 0x7E, 0x12, 0x1F, 0xFC, 0xEF, 0x90, 0x00, 0x7F, ++0x12, 0x96, 0x05, 0xF0, 0x12, 0x96, 0x4E, 0xC3, 0x94, 0xC0, 0xEE, 0x94, 0x00, 0x50, 0x64, 0xF1, ++0xD1, 0x50, 0x09, 0x12, 0x95, 0x37, 0xF1, 0xC1, 0x7B, 0x01, 0x80, 0x05, 0x12, 0x94, 0x6C, 0xF1, ++0xC9, 0x12, 0x95, 0xB4, 0xE4, 0x90, 0x8A, 0x25, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x8C, 0xE0, 0x30, ++0xE4, 0x0C, 0x71, 0x1C, 0x94, 0x03, 0x50, 0x06, 0x71, 0x06, 0x31, 0x19, 0x80, 0xED, 0x71, 0x35, ++0x40, 0x08, 0x90, 0x06, 0x31, 0xE0, 0x44, 0x01, 0x71, 0x2E, 0x12, 0x96, 0x45, 0x70, 0x1F, 0x90, ++0x8A, 0x25, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x8C, 0xE0, 0x20, 0xE5, 0x0C, 0x71, 0x1C, 0x94, 0x03, ++0x50, 0x06, 0x71, 0x06, 0x31, 0x19, 0x80, 0xED, 0x71, 0x35, 0x40, 0x02, 0x71, 0x28, 0x12, 0x6F, ++0x9E, 0x80, 0x91, 0x12, 0x94, 0xE9, 0x7D, 0x84, 0x12, 0x2A, 0x8F, 0xE4, 0x90, 0x8A, 0x24, 0xF0, ++0x12, 0x96, 0x57, 0x50, 0x07, 0x71, 0x11, 0x12, 0x96, 0x2A, 0x80, 0xF4, 0x71, 0x4B, 0x12, 0x95, ++0xDF, 0x90, 0x89, 0xE0, 0xF0, 0x71, 0x44, 0x94, 0x40, 0x50, 0x0A, 0x71, 0x11, 0xE0, 0x64, 0x5C, ++0xF0, 0x51, 0xFF, 0x80, 0xF0, 0xE4, 0x90, 0x89, 0xE0, 0xF0, 0x12, 0x95, 0x31, 0x90, 0x89, 0xE0, ++0x12, 0x96, 0x8C, 0x12, 0x1F, 0xBD, 0xFE, 0x51, 0xF6, 0x8F, 0x82, 0x75, 0x83, 0x00, 0xEE, 0x51, ++0xFC, 0xE0, 0xB4, 0x14, 0xE5, 0x51, 0xF6, 0x90, 0x00, 0x14, 0x74, 0x80, 0x12, 0x1F, 0xFC, 0x90, ++0x89, 0xE0, 0x74, 0x15, 0xF0, 0x71, 0x44, 0x94, 0x3E, 0x50, 0x0C, 0x51, 0xF6, 0x8F, 0x82, 0x75, ++0x83, 0x00, 0xE4, 0x51, 0xFC, 0x80, 0xEE, 0x51, 0xF6, 0x90, 0x00, 0x3E, 0x74, 0x02, 0x12, 0x1F, ++0xFC, 0x90, 0x00, 0x3F, 0x74, 0xA0, 0x12, 0x96, 0x05, 0xF0, 0x12, 0x96, 0x4E, 0xC3, 0x94, 0x80, ++0xEE, 0x94, 0x00, 0x50, 0x64, 0xF1, 0xD1, 0x50, 0x09, 0x12, 0x95, 0x37, 0xF1, 0xC1, 0x7B, 0x01, ++0x80, 0x05, 0x12, 0x94, 0x6C, 0xF1, 0xC9, 0x12, 0x95, 0xB4, 0xE4, 0x90, 0x8A, 0x25, 0xF0, 0xA3, ++0xF0, 0x90, 0x01, 0x8C, 0xE0, 0x30, 0xE4, 0x0C, 0x71, 0x1C, 0x94, 0x03, 0x50, 0x06, 0x71, 0x06, ++0x31, 0x19, 0x80, 0xED, 0x71, 0x35, 0x40, 0x08, 0x90, 0x06, 0x31, 0xE0, 0x44, 0x01, 0x71, 0x2E, ++0x12, 0x96, 0x45, 0x70, 0x1F, 0x90, 0x8A, 0x25, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x8C, 0xE0, 0x20, ++0xE5, 0x0C, 0x71, 0x1C, 0x94, 0x03, 0x50, 0x06, 0x71, 0x06, 0x31, 0x19, 0x80, 0xED, 0x71, 0x35, ++0x40, 0x02, 0x71, 0x28, 0x12, 0x6F, 0x9E, 0x80, 0x91, 0x12, 0x94, 0xE9, 0x7D, 0x84, 0x12, 0x2A, ++0x8F, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x89, 0xD9, 0x02, 0x44, 0x69, 0x12, 0x1F, 0xFC, 0x90, ++0x89, 0xE0, 0xE0, 0x04, 0xF0, 0x22, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x90, 0x8A, 0x25, ++0x22, 0x74, 0xE1, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x22, 0xC3, 0x90, 0x8A, 0x26, ++0xE0, 0x94, 0xE8, 0x90, 0x8A, 0x25, 0xE0, 0x22, 0x90, 0x06, 0x31, 0xE0, 0x44, 0x02, 0xF0, 0xEE, ++0x90, 0x06, 0x36, 0xF0, 0x22, 0x90, 0x8A, 0x25, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0x94, 0xE8, ++0xEE, 0x94, 0x03, 0x22, 0x90, 0x89, 0xE0, 0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x89, 0xD5, 0x12, 0x44, ++0x69, 0x8B, 0x13, 0x8A, 0x14, 0x89, 0x15, 0x22, 0x90, 0x89, 0x51, 0x12, 0x44, 0x72, 0x90, 0x05, ++0x22, 0xE0, 0x90, 0x89, 0x62, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x0C, 0x7D, 0x39, 0x12, 0x4D, ++0xEE, 0xEF, 0x64, 0x01, 0x70, 0x17, 0x80, 0x00, 0x90, 0x83, 0xE9, 0xE0, 0xFF, 0x90, 0x84, 0x70, ++0x74, 0x11, 0x12, 0x6C, 0x60, 0x90, 0x89, 0x5F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x89, 0x5F, ++0xF1, 0x69, 0x90, 0x89, 0x61, 0xEF, 0xF0, 0x90, 0x89, 0x5F, 0xF1, 0xE1, 0x90, 0x89, 0x5D, 0xE0, ++0xFD, 0x12, 0x6E, 0x98, 0x90, 0x89, 0x5E, 0xE0, 0x60, 0x02, 0x81, 0x33, 0xD1, 0x05, 0xC0, 0x03, ++0xC0, 0x02, 0xC0, 0x01, 0x90, 0x89, 0x54, 0x71, 0x4E, 0x75, 0x16, 0x06, 0xD0, 0x01, 0xD0, 0x02, ++0xD0, 0x03, 0x91, 0xD3, 0xF1, 0xB7, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x89, 0x51, 0x71, ++0x4E, 0x75, 0x16, 0x10, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x91, 0xD3, 0xD1, 0x08, 0xC0, 0x03, ++0xC0, 0x02, 0xC0, 0x01, 0x90, 0x89, 0x57, 0x71, 0x4E, 0x75, 0x16, 0x10, 0xD0, 0x01, 0xD0, 0x02, ++0xD0, 0x03, 0x91, 0xD3, 0x24, 0x58, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, ++0x02, 0xC0, 0x01, 0x90, 0x89, 0x57, 0x71, 0x4E, 0x75, 0x16, 0x10, 0xD0, 0x01, 0xD0, 0x02, 0xD0, ++0x03, 0x91, 0xD3, 0x24, 0x6A, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, ++0xC0, 0x01, 0x90, 0x89, 0x5A, 0x71, 0x4E, 0x75, 0x16, 0x06, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, ++0x12, 0x2B, 0xED, 0x90, 0x89, 0x57, 0x12, 0x44, 0x69, 0x90, 0x89, 0x8E, 0x12, 0x44, 0x72, 0x90, ++0x89, 0x91, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x20, 0x90, 0x89, 0x95, 0x74, 0x3A, 0xF0, 0x90, ++0x89, 0x51, 0x12, 0x44, 0x69, 0x12, 0x8E, 0x7C, 0x91, 0xD6, 0x24, 0x28, 0xF9, 0xE4, 0x34, 0xFC, ++0xD1, 0x85, 0x75, 0x16, 0x28, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x63, 0x91, 0xD3, 0x12, 0x95, 0xFB, ++0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, 0x82, 0x75, 0x15, 0x59, 0x75, 0x16, 0x28, 0xD0, 0x03, 0x12, ++0x2B, 0xED, 0x90, 0x89, 0x61, 0xE0, 0xFF, 0x90, 0x89, 0x60, 0xE0, 0x2F, 0xFF, 0x90, 0x89, 0x5F, ++0xE0, 0x34, 0x00, 0xCF, 0x24, 0x28, 0xFD, 0xE4, 0x3F, 0xFC, 0x90, 0x83, 0xE9, 0xE0, 0xFB, 0x7F, ++0x3A, 0x12, 0x6A, 0x5A, 0x91, 0xD6, 0x12, 0x95, 0xFB, 0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, 0x89, ++0x75, 0x15, 0x63, 0x75, 0x16, 0x28, 0xD0, 0x03, 0x12, 0x2B, 0xED, 0x90, 0x06, 0x33, 0xE0, 0x44, ++0x02, 0xF0, 0x90, 0x89, 0x62, 0xE0, 0xFF, 0x7D, 0x3A, 0x12, 0x4D, 0xE3, 0x90, 0x04, 0x1F, 0x74, ++0x20, 0xF0, 0x22, 0x12, 0x2B, 0xED, 0x90, 0x89, 0x5F, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, 0x2F, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x0A, 0x12, 0x44, 0x72, 0x78, 0x16, 0x7C, ++0x84, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0xCE, 0xF1, 0xDA, 0x90, 0x05, 0x22, 0xE0, 0x90, ++0x84, 0x15, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x0C, 0x7D, 0x33, 0x12, 0x4D, 0xEE, 0xEF, 0x64, ++0x01, 0x70, 0x17, 0x80, 0x00, 0x90, 0x83, 0xE8, 0xE0, 0xFF, 0x90, 0x84, 0x70, 0x74, 0x10, 0x12, ++0x6C, 0x60, 0x90, 0x84, 0x12, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x84, 0x12, 0xF1, 0x69, 0x90, ++0x84, 0x14, 0xEF, 0xF0, 0x90, 0x84, 0x12, 0xF1, 0xE1, 0x90, 0x84, 0x10, 0xE0, 0xFD, 0x12, 0x6E, ++0x98, 0x90, 0x84, 0x11, 0xE0, 0x70, 0x55, 0xD1, 0x05, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, ++0x84, 0x0D, 0x71, 0x4E, 0x75, 0x16, 0x06, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x2B, 0xED, ++0x90, 0x84, 0x12, 0x91, 0xD9, 0xF1, 0xB0, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, ++0x90, 0x84, 0x0D, 0x71, 0x4E, 0x75, 0x16, 0x06, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x2B, ++0xED, 0x90, 0x84, 0x12, 0x91, 0xD9, 0xF1, 0xB7, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x84, ++0x0A, 0x71, 0x4E, 0x75, 0x16, 0x04, 0xD0, 0x01, 0xD0, 0x02, 0x80, 0x4C, 0x90, 0x84, 0x11, 0xE0, ++0x64, 0x01, 0x70, 0x49, 0xD1, 0x05, 0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, 0x81, 0x75, 0x15, 0xD5, ++0x75, 0x16, 0x06, 0xD0, 0x03, 0x12, 0x2B, 0xED, 0x90, 0x84, 0x12, 0x91, 0xD9, 0xF1, 0xB0, 0xFA, ++0x7B, 0x01, 0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, 0x81, 0x75, 0x15, 0xDF, 0x75, 0x16, 0x06, 0xD0, ++0x03, 0x12, 0x2B, 0xED, 0x90, 0x84, 0x12, 0x91, 0xD9, 0xF1, 0xB7, 0xC0, 0x03, 0x8B, 0x13, 0x75, ++0x14, 0x81, 0x75, 0x15, 0xE5, 0x75, 0x16, 0x04, 0xD0, 0x03, 0x12, 0x2B, 0xED, 0x90, 0x06, 0x30, ++0xE0, 0x44, 0x10, 0xF0, 0x90, 0x84, 0x15, 0xE0, 0xFF, 0x7D, 0x34, 0x12, 0x4D, 0xE3, 0x91, 0xCC, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xA3, 0xA3, 0xE0, 0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, ++0x01, 0x22, 0xF1, 0x44, 0x90, 0x84, 0x84, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x84, 0x84, 0xF1, ++0x69, 0x90, 0x84, 0x86, 0xEF, 0xF0, 0x90, 0x84, 0x84, 0xA3, 0xE0, 0x24, 0x30, 0xF9, 0xE4, 0x34, ++0xFC, 0xD1, 0x85, 0x75, 0x16, 0x06, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xD5, 0xF1, 0x62, 0x91, 0xD9, ++0x24, 0x36, 0xF9, 0xE4, 0x34, 0xFC, 0xD1, 0x85, 0x75, 0x16, 0x04, 0x7B, 0x01, 0x7A, 0x81, 0x79, ++0xDB, 0xF1, 0x62, 0x91, 0xD9, 0xF1, 0xB0, 0xD1, 0x85, 0x75, 0x16, 0x06, 0x7B, 0x01, 0x7A, 0x81, ++0x79, 0xDF, 0xF1, 0x62, 0x91, 0xD9, 0x24, 0x40, 0xF9, 0xE4, 0x34, 0xFC, 0xD1, 0x85, 0x75, 0x16, ++0x04, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xE5, 0x02, 0x2B, 0xED, 0xF1, 0x44, 0x7E, 0x00, 0x74, 0x00, ++0x2F, 0xF9, 0xE4, 0x34, 0xFC, 0x75, 0x13, 0x01, 0xF5, 0x14, 0x89, 0x15, 0x22, 0x90, 0x83, 0xF2, ++0xF1, 0x58, 0xE0, 0xFE, 0x24, 0x20, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, ++0x21, 0x2E, 0x12, 0x4F, 0xCE, 0xE0, 0xFD, 0x90, 0x89, 0x16, 0xE0, 0x24, 0x24, 0xF1, 0x86, 0x90, ++0x89, 0x16, 0xE0, 0x2F, 0x24, 0x28, 0xA3, 0xF0, 0xE0, 0xFD, 0x24, 0x04, 0x12, 0x6F, 0x6B, 0xE0, ++0xFE, 0x74, 0x05, 0x2D, 0x12, 0x6F, 0xBF, 0x90, 0x83, 0x99, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x89, ++0x17, 0xE0, 0x24, 0x0C, 0xF9, 0xE4, 0x34, 0xFC, 0xD1, 0x85, 0x75, 0x16, 0x04, 0x7B, 0x01, 0x7A, ++0x83, 0x79, 0x9B, 0x12, 0x2B, 0xED, 0x90, 0x89, 0x17, 0xE0, 0x24, 0x14, 0xF0, 0xE0, 0xFD, 0x24, ++0x01, 0x12, 0x6C, 0x25, 0xE0, 0xFE, 0x74, 0x00, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0x12, 0x6F, ++0xC4, 0x90, 0x83, 0x9F, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x83, 0xF3, 0xF1, 0x58, 0x90, 0x83, 0x95, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x4E, 0x60, 0x13, 0x90, 0x89, 0x16, 0xE0, 0x24, 0x00, 0xD1, 0x81, ++0x8F, 0x16, 0x7B, 0x01, 0x7A, 0x83, 0x79, 0xA3, 0x12, 0x2B, 0xED, 0x90, 0x83, 0xF4, 0xF1, 0x58, ++0x24, 0x00, 0xD1, 0x81, 0x90, 0x83, 0x97, 0xA3, 0xE0, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x83, 0x79, ++0xC3, 0x02, 0x2B, 0xED, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, 0xE0, 0x02, 0x7E, 0x80, ++0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0xE0, 0xFF, 0xF1, 0x44, 0x90, 0x89, 0x16, 0xEF, ++0xF0, 0x22, 0x12, 0x2B, 0xED, 0x90, 0x84, 0x84, 0x22, 0xA3, 0xE0, 0xFE, 0x24, 0x20, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x21, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0xFD, 0x74, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, ++0xFE, 0xEF, 0x30, 0xE7, 0x04, 0x7C, 0x02, 0x80, 0x02, 0xE4, 0xFC, 0xED, 0x30, 0xE6, 0x09, 0xAF, ++0x03, 0x12, 0x8E, 0x23, 0xAE, 0x07, 0x80, 0x02, 0xE4, 0xFE, 0xEC, 0x24, 0x18, 0x2E, 0xFF, 0x22, ++0x24, 0x3A, 0xF9, 0xE4, 0x34, 0xFC, 0x22, 0x24, 0x40, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, ++0x22, 0x24, 0xED, 0xF9, 0xE4, 0x34, 0x89, 0xFA, 0x22, 0x24, 0xCC, 0xF9, 0xEA, 0x34, 0xFF, 0xFA, ++0x22, 0xC3, 0xEF, 0x94, 0x40, 0xEE, 0x94, 0x00, 0x22, 0x22, 0x7E, 0x00, 0x7F, 0x06, 0x02, 0x43, ++0xD0, 0xA3, 0xE0, 0x24, 0x20, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x89, 0x32, 0x12, 0x6F, 0xB6, 0x90, 0x89, 0x4A, 0x74, 0x18, 0xF0, ++0x7E, 0x00, 0x7F, 0x80, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x52, 0x12, 0x46, 0x4B, 0x90, ++0x01, 0xC4, 0x74, 0xED, 0xF0, 0x74, 0x67, 0xA3, 0xF0, 0x90, 0x83, 0xEA, 0xE0, 0xFF, 0x12, 0x67, ++0x44, 0x90, 0x89, 0x49, 0xEF, 0xF0, 0xF9, 0xE0, 0xFE, 0x24, 0x21, 0x12, 0x4F, 0xCE, 0x74, 0x41, ++0xF0, 0xEE, 0x24, 0x20, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x89, 0x4A, 0xE0, 0x7A, 0x00, 0x2D, 0xFE, ++0xEA, 0x3C, 0x90, 0x89, 0x4E, 0xF0, 0xA3, 0xCE, 0xF0, 0x74, 0x20, 0x29, 0x12, 0x67, 0xE5, 0x90, ++0x89, 0x34, 0xE0, 0xFD, 0xD1, 0x98, 0x91, 0x4C, 0x90, 0x89, 0x4E, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, ++0x89, 0x4C, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x89, 0x52, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0x03, ++0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0x74, 0x5F, 0xF0, 0x90, 0x89, 0x4E, 0xE4, 0x75, 0xF0, 0x04, 0x12, ++0x43, 0xF6, 0x90, 0x82, 0xC7, 0xE0, 0xFF, 0x7E, 0x02, 0xB4, 0xFE, 0x02, 0x7E, 0xFE, 0x90, 0x89, ++0x4E, 0xA3, 0xE0, 0xFD, 0x51, 0x50, 0xEE, 0xF0, 0x74, 0x00, 0x2D, 0x51, 0x52, 0xE0, 0x90, 0x89, ++0x56, 0xF0, 0x90, 0x89, 0x4E, 0x12, 0x61, 0x19, 0x90, 0x83, 0x5C, 0xE0, 0x90, 0x89, 0x32, 0xB4, ++0x01, 0x0B, 0xE0, 0x44, 0x03, 0xFC, 0xA3, 0xE0, 0x44, 0x10, 0xFD, 0x80, 0x09, 0xE0, 0x44, 0x03, ++0xFC, 0xA3, 0xE0, 0x44, 0x20, 0xFD, 0x90, 0x89, 0x50, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x89, ++0x57, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x12, 0xF0, 0xB1, 0x95, 0x12, 0x43, 0xF6, 0xEF, 0x64, 0xFE, ++0x70, 0x24, 0x90, 0x89, 0x4E, 0xA3, 0xE0, 0x24, 0x00, 0xF1, 0x3F, 0xC0, 0x03, 0x8B, 0x13, 0xB1, ++0xB6, 0xD0, 0x03, 0x12, 0x2B, 0xED, 0x75, 0x13, 0x01, 0xB1, 0xB6, 0x7B, 0x01, 0x7A, 0x89, 0x79, ++0x59, 0x12, 0x2B, 0xED, 0x80, 0x56, 0x90, 0x83, 0xE5, 0xE0, 0xFF, 0xB4, 0x02, 0x26, 0x90, 0x89, ++0x4E, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x24, 0x00, 0xF5, 0x82, 0x74, 0xFC, 0x3C, 0xF5, 0x83, 0xE4, ++0xF0, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0x74, 0xFC, 0x3C, 0xF5, 0x83, 0x74, 0x20, 0xB1, 0x9D, 0x74, ++0x20, 0xF0, 0x80, 0x28, 0xEF, 0xB4, 0x04, 0x24, 0x90, 0x89, 0x4E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x24, 0x00, 0xF5, 0x82, 0x74, 0xFC, 0x3E, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x01, 0x2F, 0xF5, 0x82, ++0x74, 0xFC, 0x3E, 0xF5, 0x83, 0x74, 0x10, 0xB1, 0x9D, 0x74, 0x10, 0xF0, 0xB1, 0x95, 0x12, 0x43, ++0xF6, 0xE4, 0x90, 0x89, 0x4B, 0xF0, 0xD1, 0x77, 0xE0, 0xFE, 0x90, 0x89, 0x4E, 0xA3, 0xE0, 0xFD, ++0xEF, 0x2D, 0x51, 0x50, 0xEE, 0xF0, 0xD1, 0x77, 0xE0, 0xFE, 0x74, 0x5B, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0x89, 0xF5, 0x83, 0xEE, 0xB1, 0x8D, 0xE0, 0xB4, 0x08, 0xDB, 0x91, 0x56, 0x90, 0x89, 0x4E, ++0xE4, 0x75, 0xF0, 0x20, 0x12, 0x43, 0xF6, 0x90, 0x89, 0x4E, 0xF1, 0xA1, 0x91, 0x4C, 0x7B, 0x01, ++0x7A, 0x89, 0x79, 0x52, 0x90, 0x89, 0xD9, 0x12, 0x44, 0x72, 0x90, 0x89, 0xDC, 0x74, 0x63, 0xF0, ++0x7A, 0x89, 0x79, 0x35, 0xA3, 0x12, 0x44, 0x72, 0x7A, 0x82, 0x79, 0x83, 0x7D, 0x10, 0x12, 0x61, ++0x20, 0xE4, 0x90, 0x89, 0x4B, 0xF0, 0x90, 0x89, 0x4B, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x3A, ++0x90, 0x89, 0x4F, 0xE0, 0x2F, 0xFF, 0x90, 0x89, 0x4E, 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x89, 0xD2, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x83, 0xEA, 0xE0, 0xFD, 0xF1, 0xCF, 0x90, 0x89, 0x49, 0xEF, 0xF0, ++0x90, 0x89, 0x4B, 0xE0, 0x24, 0x35, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFF, 0x90, ++0x89, 0x49, 0xE0, 0x51, 0x50, 0xEF, 0xB1, 0x8D, 0x80, 0xBC, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1F, ++0x90, 0x05, 0x22, 0xE0, 0x90, 0x89, 0xD4, 0xF0, 0x7D, 0x1D, 0x12, 0x4D, 0xEE, 0xBF, 0x01, 0x03, ++0x91, 0xF0, 0xF0, 0x90, 0x89, 0xD4, 0xE0, 0xFF, 0x7D, 0x1E, 0x12, 0x4D, 0xE3, 0x80, 0x03, 0x91, ++0xF0, 0xF0, 0x12, 0x64, 0xCC, 0x90, 0x81, 0x4F, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x4D, 0x9A, ++0x74, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x67, 0xA3, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x84, 0x39, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0xAA, 0x07, 0x90, 0x84, ++0x40, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, 0xB1, 0xC0, 0xF0, 0xEA, 0x24, 0xEF, 0x60, 0x30, ++0x24, 0xD7, 0x70, 0x02, 0x61, 0xB2, 0x24, 0x3A, 0x60, 0x02, 0x61, 0xE7, 0x91, 0x2D, 0x24, 0x0A, ++0x91, 0x0C, 0xE4, 0xF0, 0xFE, 0x74, 0x00, 0x2F, 0xB1, 0xA5, 0x7D, 0x14, 0x7C, 0x00, 0x91, 0x03, ++0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0xD1, 0x86, 0x7D, 0x14, 0x7C, 0x00, 0xE4, 0xFF, 0x61, 0xAD, ++0x90, 0x84, 0x39, 0xE4, 0x75, 0xF0, 0x14, 0x12, 0x43, 0xF6, 0x90, 0x84, 0x39, 0xA3, 0xE0, 0xFB, ++0xFF, 0x24, 0x06, 0xFC, 0xE4, 0x33, 0x90, 0x84, 0x44, 0xF0, 0xA3, 0xCC, 0xF0, 0x90, 0x84, 0x44, ++0xA3, 0xE0, 0x91, 0x16, 0xE4, 0xF0, 0x74, 0x04, 0x2F, 0xF1, 0x6B, 0xE0, 0xFE, 0xA9, 0x03, 0x74, ++0x05, 0x29, 0xF1, 0xBF, 0xFE, 0x90, 0x84, 0x3E, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x84, 0x39, 0xE0, ++0xFC, 0xA3, 0xE0, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0xD3, 0xEF, 0x94, 0x00, 0xEE, 0x94, 0x01, 0x90, ++0x84, 0x39, 0x40, 0x6B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xE9, 0x7C, 0x00, 0x24, 0x00, 0xF9, 0xEC, ++0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC3, 0xE4, 0x9F, 0xFD, 0x74, 0x01, 0x9E, 0xFC, 0x91, 0x03, 0x90, ++0x84, 0x3B, 0xE0, 0x24, 0x01, 0xFF, 0xE4, 0x33, 0xA2, 0xE7, 0x13, 0xEF, 0x13, 0x90, 0xFD, 0x10, ++0xF0, 0x91, 0x46, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0x7B, 0x01, 0x7A, 0xFC, 0x79, ++0x00, 0x90, 0x84, 0x39, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0xE4, 0x9F, 0xFF, 0x74, 0x01, 0x9E, ++0xFE, 0x91, 0x34, 0xE0, 0xC3, 0x9F, 0xFD, 0xEC, 0x9E, 0xFC, 0x12, 0x24, 0xE4, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0x0C, 0x91, 0x06, 0xB1, 0xC0, 0xF0, 0x80, 0x0E, 0xA3, ++0xE0, 0x7E, 0x00, 0x24, 0x00, 0xB1, 0xA5, 0x91, 0x34, 0xE0, 0xFD, 0x91, 0x03, 0x90, 0x84, 0x39, ++0x74, 0xFF, 0x75, 0xF0, 0xEC, 0x12, 0x43, 0xF6, 0x91, 0x2D, 0x7E, 0x00, 0x24, 0x0C, 0xF9, 0xEE, ++0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC0, 0x02, 0xC0, 0x01, 0x74, 0x10, 0x2F, 0xF9, 0xEE, 0x34, 0xFC, ++0xFA, 0xD1, 0x86, 0x91, 0x34, 0xE0, 0xFD, 0xD0, 0x01, 0xD0, 0x02, 0x7F, 0x11, 0x12, 0x1C, 0x34, ++0x80, 0x2D, 0x91, 0x2D, 0x24, 0x2A, 0x91, 0x0C, 0xE4, 0xF0, 0x74, 0x00, 0x2F, 0xF1, 0x3F, 0x7D, ++0x48, 0x7C, 0x00, 0x91, 0x03, 0x91, 0x3B, 0x12, 0x44, 0x0C, 0xE4, 0xFD, 0xFC, 0x91, 0x06, 0x91, ++0x3B, 0x12, 0x44, 0x0C, 0x91, 0x06, 0x90, 0x84, 0x40, 0x12, 0x44, 0x45, 0x12, 0x20, 0x9B, 0x90, ++0x84, 0x3C, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x84, 0x3C, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xEC, ++0xFF, 0x90, 0x84, 0x44, 0xA3, 0xE0, 0xFE, 0x51, 0x50, 0xEF, 0x91, 0x21, 0xED, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x12, 0x24, 0xE4, 0x90, 0x84, 0x40, 0x02, 0x20, 0xCE, 0xFD, 0xE4, 0x33, 0x90, ++0x84, 0x44, 0xF0, 0xA3, 0xED, 0xF0, 0xFE, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE4, 0xF0, 0x74, 0x01, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0x84, 0x39, ++0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x84, 0x3E, 0xE0, 0xFC, 0xA3, 0x22, 0x90, 0x84, 0x40, 0x12, 0x44, ++0x45, 0x78, 0x10, 0x12, 0x20, 0xA8, 0x90, 0x84, 0x40, 0x02, 0x44, 0x51, 0x90, 0x89, 0x4E, 0xE4, ++0x75, 0xF0, 0x08, 0x12, 0x43, 0xF6, 0x90, 0x89, 0x4E, 0xE4, 0x75, 0xF0, 0x08, 0x02, 0x43, 0xF6, ++0xF0, 0x7B, 0x18, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x6E, 0xED, ++0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x84, 0x6D, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0x67, 0x44, 0x7C, ++0x00, 0xAD, 0x07, 0x90, 0x84, 0x6D, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x84, 0x6E, 0xE0, 0x60, ++0x0E, 0x74, 0x0F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, ++0x05, 0x74, 0x08, 0x2F, 0xF1, 0x7B, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF1, 0x8C, 0x54, 0xF0, 0xF0, ++0xAF, 0x05, 0xB1, 0xCA, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x84, 0x6F, 0xE0, 0x25, 0xE0, 0x25, 0xE0, ++0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0xB1, 0xCA, 0xEE, 0xF0, 0x90, 0x84, 0x70, 0xE0, 0xFF, 0xAE, ++0x05, 0x74, 0x1E, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x21, 0x2E, ++0x12, 0x4F, 0xCE, 0xE0, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0x83, 0xEA, 0xE0, 0xFF, 0x90, 0x84, 0x70, 0x74, 0x08, 0xF0, 0x7B, 0x18, 0x7D, 0x01, 0x91, ++0x65, 0x90, 0x89, 0x49, 0xEF, 0xF0, 0x90, 0x83, 0xEA, 0xE0, 0x90, 0x04, 0x25, 0x22, 0xE4, 0x90, ++0x89, 0x03, 0xF0, 0xA3, 0xF0, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x20, 0xF0, 0x12, 0x83, 0x33, 0xEF, ++0x64, 0x01, 0x70, 0x68, 0x90, 0x83, 0xF2, 0xE0, 0xFF, 0x90, 0x84, 0x70, 0x74, 0x0D, 0xF0, 0x7B, ++0x08, 0x7D, 0x01, 0x91, 0x65, 0xF1, 0x83, 0x90, 0x89, 0x00, 0x12, 0x67, 0x69, 0x90, 0x89, 0x02, ++0xEF, 0xF0, 0x90, 0x89, 0x00, 0x12, 0x67, 0xE1, 0xE4, 0xFD, 0xD1, 0x98, 0x90, 0x89, 0x02, 0xE0, ++0xFF, 0x90, 0x89, 0x01, 0xE0, 0x2F, 0xFF, 0x90, 0x89, 0x00, 0xE0, 0x34, 0x00, 0xCF, 0x24, 0x28, ++0xCF, 0x34, 0x00, 0xFE, 0x90, 0x89, 0x03, 0xF0, 0xA3, 0xEF, 0xF0, 0xF1, 0x47, 0xB1, 0xAD, 0x90, ++0x83, 0xF2, 0xE0, 0xFB, 0xE4, 0xFF, 0x51, 0x5A, 0xB1, 0xAD, 0x90, 0x83, 0xEE, 0xE0, 0xFB, 0x7F, ++0x11, 0x51, 0x5A, 0x12, 0x64, 0xCC, 0x90, 0x83, 0xA1, 0x12, 0x61, 0x19, 0x22, 0xF0, 0x90, 0x89, ++0x4B, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x89, 0x4E, 0xE4, 0x75, 0xF0, 0x02, 0x22, 0xF0, 0xE4, 0x90, ++0x89, 0x59, 0xF0, 0xA3, 0x22, 0xF9, 0xEE, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, 0x90, 0x89, 0x03, ++0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x22, 0x75, 0x14, 0x82, 0x75, 0x15, 0xCA, 0x75, 0x16, 0x02, 0x22, ++0x90, 0x84, 0x3B, 0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0x22, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0x80, 0x4C, 0xE0, 0xFF, 0x90, 0x84, 0x65, 0xE0, 0xFB, 0x90, ++0x84, 0x70, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x91, 0x65, 0x90, 0x84, 0x66, 0xEE, 0xF0, 0xFC, 0xA3, ++0xEF, 0xF0, 0xFD, 0x90, 0x84, 0x64, 0xE0, 0xFF, 0x12, 0x4F, 0x97, 0x90, 0x84, 0x66, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, 0x07, 0xD1, 0x6E, 0xF5, 0x83, ++0xE0, 0x44, 0x01, 0xF0, 0xD1, 0x6E, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF0, 0xAC, 0x07, 0x74, 0x16, ++0x2C, 0xB1, 0xCD, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF1, 0x95, 0x44, 0x0F, 0xF0, 0x90, ++0x04, 0x53, 0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, ++0x50, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, 0xD1, 0x66, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, 0x14, ++0x2F, 0xD1, 0x66, 0xED, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x11, ++0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0x22, 0x90, 0x89, 0x4B, 0xE0, 0xFF, 0x24, 0xCC, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x90, 0x86, 0x55, 0x12, 0x44, 0x72, 0x90, 0x84, 0x40, 0x12, ++0x44, 0x45, 0x90, 0x86, 0x58, 0x02, 0x20, 0xCE, 0x90, 0x84, 0x61, 0xED, 0xF0, 0x90, 0x84, 0x5E, ++0x12, 0x44, 0x72, 0xE4, 0x90, 0x84, 0x62, 0xF0, 0xA3, 0xF0, 0x12, 0x1F, 0xA4, 0xFF, 0x12, 0x57, ++0xB7, 0xFD, 0xF1, 0x32, 0xFB, 0x12, 0x67, 0x8F, 0x90, 0x84, 0x62, 0xEF, 0xF0, 0x90, 0x84, 0x5E, ++0x12, 0x44, 0x69, 0xF1, 0x32, 0xFF, 0x12, 0x8E, 0x23, 0x90, 0x84, 0x63, 0xEF, 0xF0, 0x90, 0x83, ++0x8E, 0xE0, 0x24, 0xFE, 0x60, 0x1A, 0x24, 0xFE, 0x60, 0x16, 0x14, 0x60, 0x07, 0x14, 0x60, 0x04, ++0x24, 0x05, 0x70, 0x4C, 0xF1, 0x38, 0x90, 0x84, 0x61, 0xE0, 0xFD, 0x12, 0x93, 0xBE, 0x80, 0x12, ++0xF1, 0x38, 0x90, 0x84, 0x61, 0xE0, 0xFD, 0x90, 0x83, 0x8E, 0xE0, 0x90, 0x84, 0x2F, 0xF0, 0x12, ++0x92, 0xD4, 0x90, 0x84, 0x63, 0xE0, 0xFF, 0x90, 0x84, 0x5E, 0x12, 0x44, 0x69, 0x90, 0x84, 0x62, ++0xE0, 0x7C, 0x00, 0x29, 0xF9, 0xEC, 0x3A, 0xFA, 0xC3, 0xE9, 0x9F, 0xF9, 0xEA, 0x94, 0x00, 0xFA, ++0x75, 0x13, 0x01, 0x75, 0x14, 0x83, 0x75, 0x15, 0x5D, 0xA3, 0xE0, 0xF5, 0x16, 0x12, 0x2B, 0xED, ++0x22, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x1F, 0xBD, 0x7B, 0x01, 0x7A, 0x83, 0x79, 0x5D, 0x22, 0xF9, ++0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, 0xAD, 0x07, 0x90, 0x83, 0x99, 0x12, 0x61, 0x19, 0x90, ++0x83, 0x99, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x04, 0x2E, 0xF1, 0x6B, 0xEF, 0xF0, 0x90, 0x83, 0x99, ++0xA3, 0xE0, 0xFF, 0x74, 0x05, 0x2E, 0xF1, 0x73, 0xEF, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0x22, 0x90, 0x89, 0x00, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x8A, ++0x21, 0xE4, 0x75, 0xF0, 0x10, 0x02, 0x43, 0xF6, 0x12, 0x66, 0x7A, 0x75, 0x16, 0x08, 0xF1, 0x38, ++0x02, 0x2B, 0xED, 0x90, 0x89, 0x24, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x22, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, 0xC3, ++0xEE, 0x94, 0x01, 0x40, 0x0A, 0x0D, 0xED, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0xE4, 0x2F, 0xFF, 0x22, ++0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x48, 0xC5, 0x90, 0x89, 0x11, 0xEF, 0xF0, 0x60, 0xF0, ++0x90, 0x80, 0x01, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE1, ++0x09, 0x90, 0x80, 0x01, 0xE0, 0x54, 0xFD, 0xF0, 0x11, 0x66, 0x11, 0x28, 0x30, 0xE2, 0x05, 0x54, ++0xFB, 0xF0, 0x11, 0xC9, 0x11, 0x28, 0x30, 0xE4, 0x0B, 0x54, 0xEF, 0xF0, 0x11, 0x32, 0xBF, 0x01, ++0x03, 0x12, 0x5B, 0xB3, 0xD2, 0xAF, 0x80, 0xC8, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x80, 0x01, 0xE0, ++0xFF, 0x22, 0xE4, 0x90, 0x84, 0x8D, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x23, ++0xC3, 0x90, 0x84, 0x8E, 0xE0, 0x94, 0xD0, 0x90, 0x84, 0x8D, 0xE0, 0x94, 0x07, 0x40, 0x0A, 0x90, ++0x01, 0xC1, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x00, 0x22, 0x90, 0x84, 0x8D, 0x12, 0x61, 0x19, 0x31, ++0xD9, 0x80, 0xD6, 0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x80, 0xA2, ++0xE0, 0xFF, 0x90, 0x80, 0xA1, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, ++0x70, 0x42, 0x90, 0x80, 0xA1, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x51, 0x12, 0x44, 0x5D, ++0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x52, 0xF9, 0x74, 0x80, 0x35, 0xF0, 0xFA, 0x7B, ++0x01, 0xAF, 0x05, 0x31, 0xE0, 0x90, 0x80, 0xA1, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x80, 0xA1, 0xF0, 0xB1, 0x61, 0x90, 0x80, 0x01, ++0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0xE4, 0xFF, 0x90, 0x81, 0x3A, 0xE0, 0xFE, 0x90, 0x81, 0x39, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, ++0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x48, 0x90, 0x01, 0xAF, 0xE0, 0x70, 0x0D, ++0xED, 0x12, 0x80, 0xC9, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x31, 0x37, 0x7F, 0x01, 0xEF, 0x60, 0x32, ++0x90, 0x81, 0x39, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, ++0x05, 0xE4, 0x90, 0x81, 0x39, 0xF0, 0x90, 0x81, 0x3A, 0xE0, 0xFF, 0x90, 0x81, 0x39, 0xE0, 0xB5, ++0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, 0x80, 0x01, 0xE0, 0x44, ++0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x89, ++0x12, 0x12, 0x44, 0x72, 0x90, 0x84, 0x88, 0xE0, 0xFF, 0x04, 0xF0, 0x12, 0x93, 0xB7, 0x7F, 0xAF, ++0x7E, 0x01, 0x31, 0x90, 0xEF, 0x60, 0x34, 0x90, 0x89, 0x12, 0x12, 0x63, 0x4E, 0x90, 0x00, 0x0E, ++0x12, 0x1F, 0xBD, 0x24, 0x02, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, 0x2B, 0xED, ++0x90, 0x89, 0x12, 0x12, 0x44, 0x69, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x90, 0x01, 0xAE, 0xF0, ++0xA3, 0x74, 0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x69, 0xEE, 0x12, 0x96, 0xAC, 0xA3, 0xF0, ++0x90, 0x84, 0x69, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x60, 0x24, 0xC3, 0x90, ++0x84, 0x6C, 0xE0, 0x94, 0xE8, 0x90, 0x84, 0x6B, 0xE0, 0x94, 0x03, 0x40, 0x0B, 0x90, 0x01, 0xC0, ++0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x0C, 0x90, 0x84, 0x6B, 0x12, 0x61, 0x19, 0x31, 0xD9, ++0x80, 0xCE, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x32, 0xAA, ++0x90, 0x89, 0x13, 0x12, 0x44, 0x72, 0x90, 0x89, 0x12, 0xEF, 0xF0, 0x12, 0x44, 0x7B, 0x72, 0x22, ++0x00, 0x72, 0x2A, 0x01, 0x72, 0x33, 0x02, 0x72, 0x3C, 0x03, 0x72, 0x44, 0x04, 0x72, 0x4D, 0x14, ++0x72, 0x56, 0x20, 0x72, 0x5F, 0x21, 0x72, 0x67, 0x23, 0x72, 0x70, 0x25, 0x72, 0x81, 0x80, 0x72, ++0x79, 0x81, 0x72, 0x89, 0x82, 0x72, 0x92, 0x83, 0x72, 0x9B, 0x84, 0x72, 0xA4, 0x88, 0x00, 0x00, ++0x72, 0xAD, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0xE1, 0x94, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, ++0x02, 0x56, 0x16, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, 0x7F, 0xFC, 0x90, 0x89, 0x13, 0x12, ++0x44, 0x69, 0xA1, 0x34, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, 0x5A, 0x8E, 0x90, 0x89, 0x13, ++0x12, 0x44, 0x69, 0x02, 0x80, 0x39, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, 0x7A, 0xDC, 0x90, ++0x89, 0x13, 0x12, 0x44, 0x69, 0xE1, 0x6C, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, 0x80, 0x48, ++0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, 0x80, 0x50, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x80, ++0x3C, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x61, 0x71, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, ++0x8E, 0xBB, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, 0x8E, 0xD1, 0x90, 0x89, 0x13, 0x12, 0x44, ++0x69, 0x02, 0x8F, 0x15, 0x90, 0x89, 0x13, 0x12, 0x44, 0x69, 0x02, 0x8F, 0x67, 0x90, 0x01, 0xC0, ++0xE0, 0x44, 0x01, 0xF0, 0x90, 0x89, 0x12, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xB1, 0x5A, 0xFE, 0x90, 0x81, 0xB0, 0xB1, 0x24, 0xF1, 0xD2, 0x71, 0x6A, ++0x12, 0x96, 0x3C, 0x90, 0x81, 0xB0, 0x12, 0x96, 0x72, 0x71, 0x69, 0xF1, 0xE0, 0x90, 0x81, 0xB0, ++0x71, 0x61, 0x12, 0x96, 0x33, 0x90, 0x81, 0xB0, 0x12, 0x96, 0x69, 0x4E, 0xD1, 0x8D, 0xFF, 0x54, ++0x01, 0xFE, 0x90, 0x81, 0xB2, 0xE0, 0x54, 0xFE, 0x12, 0x57, 0xB5, 0xFE, 0x54, 0x01, 0xFD, 0x90, ++0x81, 0xB1, 0xE0, 0x54, 0xFE, 0x4D, 0xFD, 0xF0, 0xEE, 0x54, 0x04, 0xFE, 0xED, 0x54, 0xFB, 0x4E, ++0xF0, 0xEF, 0x54, 0x10, 0xFF, 0xA3, 0xE0, 0x54, 0xEF, 0x4F, 0x12, 0x96, 0x0F, 0x12, 0x6F, 0xC6, ++0x12, 0x96, 0x84, 0x90, 0x81, 0xB0, 0xE0, 0xC3, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x8F, 0xAD, 0x90, ++0x81, 0xB0, 0xE0, 0x13, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x8E, 0x71, 0x90, 0x81, 0xB0, 0xE0, 0x13, ++0x13, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x8F, 0xB9, 0x12, 0x96, 0x19, 0x13, 0x54, 0x01, 0xFF, 0x12, ++0x8F, 0xE6, 0x90, 0x81, 0xB0, 0xE0, 0x54, 0x01, 0xFF, 0x12, 0x56, 0xCF, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xF0, 0xEE, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0xFF, 0xF0, 0x12, 0x1F, 0xA4, 0xFE, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x89, 0x16, 0xF1, 0xDA, 0x20, 0xE0, 0x05, ++0x12, 0x8D, 0x59, 0x81, 0x42, 0xB1, 0x54, 0xFE, 0x90, 0x81, 0xB3, 0xB1, 0x24, 0xF1, 0xD2, 0x71, ++0x6A, 0x12, 0x96, 0x3C, 0x90, 0x81, 0xB3, 0x12, 0x96, 0x72, 0x71, 0x69, 0xF1, 0xE0, 0x90, 0x81, ++0xB3, 0x71, 0x61, 0x12, 0x96, 0x33, 0x90, 0x81, 0xB3, 0x12, 0x96, 0x69, 0x12, 0x57, 0xB5, 0x54, ++0x80, 0xFF, 0x90, 0x81, 0xB4, 0xE0, 0x54, 0x7F, 0x4F, 0xF0, 0x12, 0x1F, 0xA4, 0x13, 0x13, 0x54, ++0x3F, 0x30, 0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x89, 0x16, 0x12, 0x44, ++0x69, 0x12, 0x1F, 0xA4, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, ++0x44, 0x08, 0xF0, 0x90, 0x80, 0x07, 0xE0, 0xB4, 0x02, 0x06, 0x12, 0x5F, 0x81, 0x20, 0xE0, 0x34, ++0x12, 0x57, 0xB7, 0x54, 0x7F, 0xFF, 0x90, 0x81, 0xB4, 0xE0, 0x54, 0x80, 0x4F, 0xD1, 0x8D, 0x90, ++0x81, 0xB5, 0xF1, 0x65, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x81, 0xB6, 0xB1, 0x24, 0x54, 0xFE, 0xFF, ++0xEE, 0x54, 0x01, 0x4F, 0xF0, 0x12, 0x5F, 0x6B, 0x13, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, ++0x7D, 0x01, 0x91, 0x4B, 0x90, 0x80, 0x07, 0xE0, 0xB4, 0x01, 0x17, 0x90, 0xFE, 0x10, 0xE0, 0x44, ++0x04, 0xF0, 0x90, 0x83, 0x8D, 0x74, 0x05, 0xF0, 0x12, 0x96, 0x60, 0x7A, 0x82, 0x79, 0xCC, 0x12, ++0x46, 0x4B, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x13, 0x54, 0x01, 0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x84, 0x8C, 0xED, 0xF0, 0x90, 0x84, 0x8B, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, ++0x4B, 0xB1, 0x1C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x5F, ++0xFD, 0x7F, 0x47, 0xB1, 0x16, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x46, 0xE0, ++0x4F, 0xFD, 0x7F, 0x46, 0xB1, 0x2C, 0x60, 0x10, 0xB1, 0x19, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xFF, 0x90, 0x00, 0x45, 0xE0, 0x4F, 0x80, 0x0F, 0xB1, 0x19, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xF4, 0xFF, 0x90, 0x00, 0x45, 0xE0, 0x5F, 0xFD, 0x7F, 0x45, 0x80, 0x62, 0x90, 0x84, 0x8B, 0xE0, ++0x24, 0xF8, 0xF0, 0xE0, 0x24, 0x04, 0xB1, 0x1D, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, ++0x90, 0x00, 0x43, 0xE0, 0x5F, 0xFD, 0x7F, 0x43, 0xB1, 0x16, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xFF, 0x90, 0x00, 0x43, 0xE0, 0x4F, 0xFD, 0x7F, 0x43, 0xB1, 0x2C, 0x60, 0x19, 0x90, 0x84, 0x8B, ++0xE0, 0x24, 0x04, 0xB1, 0x1D, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x42, 0xE0, ++0x4F, 0xFD, 0x7F, 0x42, 0x80, 0x18, 0x90, 0x84, 0x8B, 0xE0, 0x24, 0x04, 0xB1, 0x1D, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x42, 0xE0, 0x5F, 0xFD, 0x7F, 0x42, 0x12, 0x32, ++0x1E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x32, 0x1E, 0x90, 0x84, 0x8B, 0xE0, 0xFF, 0x74, 0x01, ++0xA8, 0x07, 0x08, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x22, 0x12, 0x32, 0x1E, 0x90, ++0x84, 0x8C, 0xE0, 0x22, 0xB1, 0x5A, 0xFE, 0x90, 0x83, 0xF8, 0xB1, 0x24, 0x54, 0x04, 0xFF, 0xEE, ++0x54, 0xFB, 0x4F, 0xF0, 0x12, 0x1F, 0xA4, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x57, 0xB7, 0x90, ++0x83, 0xF9, 0xF0, 0x22, 0x90, 0x89, 0x16, 0x12, 0x44, 0x69, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x01, ++0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x84, 0x89, 0xF0, 0x90, 0x84, 0x89, 0xE0, 0xFD, ++0x70, 0x02, 0xC1, 0x61, 0x90, 0x80, 0xA1, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, ++0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x80, 0xA2, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x84, 0x87, 0x12, ++0x95, 0xD5, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, ++0xC1, 0x3E, 0xE4, 0x90, 0x84, 0x8A, 0xF0, 0x90, 0x84, 0x8A, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, ++0x2F, 0xD1, 0x62, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, ++0xD1, 0x7B, 0x90, 0x80, 0x51, 0xD1, 0x6B, 0xD1, 0x62, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, ++0xF0, 0xD1, 0x7B, 0x90, 0x80, 0x55, 0xD1, 0x6B, 0x90, 0x84, 0x8A, 0xE0, 0x04, 0xF0, 0x80, 0xC7, ++0x90, 0x84, 0x89, 0xE0, 0xFF, 0x90, 0x84, 0x87, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, ++0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0x84, 0x89, 0xF0, 0x90, 0x84, 0x87, 0xB1, 0x1C, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x84, 0x87, 0xE0, 0x04, 0xF0, ++0xE0, 0x54, 0x03, 0xF0, 0x90, 0x80, 0xA2, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x70, 0x02, 0xA1, 0x6B, 0xE4, 0x90, 0x80, 0xA2, 0xF0, 0xA1, 0x6B, 0x90, 0x01, ++0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x84, 0x87, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0xF0, 0x90, ++0x84, 0x87, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD0, 0x12, 0x44, 0x5D, 0xE0, 0x90, 0x01, 0xC3, ++0xF0, 0x22, 0x90, 0x84, 0x87, 0xE0, 0x75, 0xF0, 0x04, 0xA4, 0x22, 0x12, 0x44, 0x5D, 0xE5, 0x82, ++0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, ++0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x80, 0xA2, 0xE0, 0x75, 0xF0, 0x08, 0x22, 0xF0, 0x90, 0x00, ++0x02, 0x02, 0x1F, 0xBD, 0xFF, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x6B, 0x12, 0x1F, 0xA4, 0x90, 0x06, ++0x74, 0x12, 0x57, 0xB6, 0x90, 0x06, 0x75, 0xD1, 0x8D, 0x90, 0x06, 0x76, 0xF1, 0x65, 0x90, 0x06, ++0x77, 0xF0, 0x90, 0x06, 0x70, 0xEF, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x04, 0xF0, 0xA3, 0x74, 0x80, ++0xF0, 0x7F, 0x01, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x90, 0x89, 0x67, 0xEF, 0xF0, 0xA3, 0x12, 0x44, ++0x72, 0x90, 0x89, 0x68, 0x12, 0x63, 0x4E, 0xF1, 0x36, 0x24, 0x02, 0xD1, 0x94, 0xF1, 0x4B, 0xE9, ++0x24, 0x04, 0xF1, 0x2D, 0x24, 0x03, 0xD1, 0x94, 0xF1, 0x4B, 0xE9, 0x24, 0x08, 0xF1, 0x2D, 0x24, ++0x04, 0xD1, 0x94, 0xF1, 0x4B, 0xE9, 0x24, 0x0C, 0xF1, 0x2D, 0x24, 0x05, 0xD1, 0x94, 0x90, 0x89, ++0x67, 0xE0, 0xFE, 0x44, 0x50, 0x90, 0x89, 0x6B, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0xA3, 0x74, 0xFF, ++0xF0, 0xA3, 0xF0, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0xD1, 0x94, 0x90, 0x89, 0x6B, 0x74, 0xFF, 0x12, ++0x57, 0x72, 0xF1, 0x42, 0x04, 0xD1, 0x94, 0x90, 0x06, 0x72, 0xE4, 0xF0, 0x22, 0xF9, 0xE4, 0x3A, ++0x8B, 0x13, 0xF5, 0x14, 0x89, 0x15, 0x75, 0x16, 0x04, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x6B, 0x12, ++0x2B, 0xED, 0x90, 0x89, 0x67, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x22, 0x90, 0x89, 0x68, 0x02, 0x44, ++0x69, 0xB1, 0x61, 0x7F, 0x02, 0x8F, 0x0D, 0x7F, 0x02, 0x12, 0x48, 0x9E, 0x90, 0x80, 0x01, 0xE0, ++0x45, 0x0D, 0xF0, 0x22, 0x4E, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x1F, 0xBD, 0xD1, 0x8E, 0xFF, 0x30, ++0xE0, 0x1D, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xA9, 0x12, 0x57, 0xB6, 0x90, 0x81, 0xAA, 0xF0, 0xEF, ++0x54, 0xFE, 0xFF, 0xA3, 0xE0, 0x54, 0x01, 0x4F, 0xF1, 0x65, 0x90, 0x81, 0xAC, 0xF0, 0x22, 0x12, ++0x8A, 0x0C, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x50, 0x12, 0x1F, 0xA4, 0x25, 0x50, 0x90, ++0x80, 0x4A, 0x12, 0x57, 0xB6, 0x25, 0x50, 0x90, 0x80, 0x4B, 0xD1, 0x8D, 0x25, 0x50, 0x90, 0x80, ++0x4C, 0xF1, 0x65, 0x25, 0x50, 0x90, 0x80, 0x4D, 0x12, 0x6F, 0x31, 0x25, 0x50, 0x90, 0x80, 0x4E, ++0x12, 0x8F, 0x52, 0x25, 0x50, 0x90, 0x80, 0x4F, 0x12, 0x8F, 0x0E, 0x25, 0x50, 0x90, 0x80, 0x50, ++0xF0, 0x22, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0x22, 0x12, 0x44, 0x72, 0x02, 0x1F, 0xA4, ++0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x4D, 0xFF, 0x22, 0x90, 0x84, 0x1C, 0xEF, 0xF0, 0xA3, 0xED, ++0xF0, 0xA3, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x90, 0x84, 0x2A, 0xF0, 0x7F, 0x24, ++0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x90, 0x84, 0x22, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x1C, 0xE0, 0xFB, ++0x70, 0x04, 0x11, 0xD6, 0x80, 0x06, 0xEB, 0x11, 0xE5, 0x12, 0x2D, 0x5C, 0x90, 0x84, 0x26, 0x12, ++0x20, 0xCE, 0x90, 0x84, 0x1D, 0x12, 0x53, 0xF7, 0x78, 0x17, 0x31, 0x58, 0xAA, 0x06, 0xAB, 0x07, ++0x90, 0x84, 0x26, 0x12, 0x44, 0x45, 0xED, 0x54, 0x7F, 0xFD, 0xEC, 0x54, 0x80, 0xFC, 0x12, 0x44, ++0x27, 0xEC, 0x44, 0x80, 0xFC, 0x90, 0x84, 0x26, 0x12, 0x20, 0xCE, 0x11, 0xD6, 0xEC, 0x54, 0x7F, ++0xFC, 0x11, 0xDF, 0x11, 0xF8, 0x90, 0x84, 0x1C, 0xE0, 0x11, 0xE5, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x84, 0x26, 0x11, 0xDC, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x2E, 0xA2, 0x11, 0xD6, 0xEC, 0x44, 0x80, ++0xFC, 0x11, 0xDF, 0x11, 0xF8, 0x90, 0x84, 0x1C, 0xE0, 0x70, 0x04, 0x7F, 0x20, 0x80, 0x09, 0x90, ++0x84, 0x1C, 0xE0, 0xB4, 0x01, 0x16, 0x7F, 0x28, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x78, 0x08, 0x12, ++0x20, 0xA8, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0x90, 0x84, 0x2A, 0xEF, 0xF0, 0x90, 0x84, 0x2A, 0xE0, ++0x90, 0x84, 0x1C, 0x60, 0x0E, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, ++0x87, 0x80, 0x0C, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x11, ++0xF0, 0x12, 0x2D, 0x5C, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x90, 0x84, 0x1E, 0x12, 0x20, 0xCE, ++0x90, 0x84, 0x1E, 0x02, 0x44, 0x45, 0x90, 0x84, 0x22, 0x02, 0x44, 0x45, 0x12, 0x44, 0x45, 0x90, ++0x85, 0xBB, 0x02, 0x20, 0xCE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x87, ++0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x7F, 0x24, 0x7E, 0x08, 0x02, 0x2E, 0xA2, 0x90, ++0x84, 0x46, 0xEF, 0xF0, 0xAB, 0x05, 0x90, 0x84, 0x4C, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, ++0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x14, 0x31, 0x58, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x84, ++0x48, 0x12, 0x44, 0x45, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x12, 0x44, 0x27, 0xEC, 0x54, 0x0F, ++0xFC, 0x90, 0x84, 0x4C, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x46, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, ++0x60, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x11, 0xF0, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x84, 0x4C, 0x11, ++0xDC, 0xD0, 0x07, 0xD0, 0x06, 0x02, 0x2E, 0xA2, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x77, 0xE9, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xC0, 0x07, 0xC0, 0x05, 0x90, 0x84, 0x5A, 0x12, 0x44, 0x45, ++0x90, 0x84, 0x48, 0x12, 0x20, 0xCE, 0xD0, 0x05, 0xD0, 0x07, 0x11, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xFF, 0x90, 0x81, 0x54, 0xE0, 0x2F, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, 0x19, 0x8F, 0x1A, 0xE5, 0x1E, 0x31, 0xF9, 0x85, ++0x19, 0x83, 0x85, 0x1A, 0x82, 0xF0, 0xE5, 0x1D, 0x31, 0xF9, 0xFF, 0xE5, 0x1E, 0x13, 0x13, 0x13, ++0x54, 0x1F, 0x4F, 0xA3, 0xF0, 0xEB, 0x31, 0xF9, 0xFF, 0xE5, 0x1D, 0x13, 0x13, 0x13, 0x54, 0x1F, ++0x4F, 0x85, 0x1A, 0x82, 0x85, 0x19, 0x83, 0xA3, 0xA3, 0xF0, 0xBD, 0x01, 0x0D, 0x85, 0x1A, 0x82, ++0x8E, 0x83, 0xA3, 0xA3, 0xA3, 0x74, 0x03, 0xF0, 0x80, 0x05, 0x51, 0x00, 0x74, 0x01, 0xF0, 0x51, ++0x00, 0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x54, 0x07, 0xC4, 0x33, 0x54, 0xE0, 0x22, ++0x85, 0x1A, 0x82, 0x85, 0x19, 0x83, 0xA3, 0xA3, 0xA3, 0x22, 0x12, 0x4F, 0xC2, 0x70, 0x0D, 0x90, ++0x81, 0x4C, 0xE0, 0x60, 0x07, 0x12, 0x82, 0x66, 0x71, 0x43, 0x31, 0x97, 0x22, 0x90, 0x81, 0x47, ++0xB1, 0x3B, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, ++0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xAB, 0xE0, 0xC3, 0x13, 0x54, ++0x7F, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x31, 0xA0, 0x90, 0x81, 0x47, 0xE0, ++0x44, 0x08, 0xF0, 0x22, 0x90, 0x81, 0x4C, 0xE0, 0x64, 0x01, 0x70, 0x19, 0x51, 0x77, 0x60, 0x08, ++0x12, 0x4B, 0xBB, 0x12, 0x4F, 0xE3, 0x80, 0xB5, 0x90, 0x81, 0x4F, 0xE0, 0x70, 0x07, 0x7D, 0x01, ++0x7F, 0x04, 0x12, 0x4B, 0xBF, 0x22, 0xF0, 0x90, 0x81, 0x4A, 0xE0, 0x54, 0x0F, 0x22, 0xE4, 0xF5, ++0x4E, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x4E, 0x54, 0xC0, 0x70, 0x09, 0x51, 0xD5, 0xF0, 0x54, 0xFD, ++0xF0, 0x02, 0x57, 0xE7, 0xE5, 0x4E, 0x30, 0xE6, 0x1C, 0x90, 0x81, 0x4C, 0xE0, 0x64, 0x01, 0x70, ++0x17, 0x90, 0x81, 0x50, 0xE0, 0x44, 0x01, 0x51, 0x76, 0x64, 0x02, 0x60, 0x04, 0x71, 0x78, 0x80, ++0x07, 0x71, 0x4B, 0x80, 0x03, 0x51, 0xD5, 0xF0, 0xE5, 0x4E, 0x90, 0x81, 0x50, 0x30, 0xE7, 0x10, ++0xE0, 0x44, 0x02, 0xF0, 0x71, 0x43, 0x31, 0x97, 0x90, 0x81, 0x47, 0xE0, 0x44, 0x04, 0xF0, 0x22, ++0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x81, 0x50, 0xE0, 0x54, 0xFE, 0x22, 0x90, 0x89, 0x16, 0x12, ++0x77, 0xDA, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0x4C, 0xF0, 0xEF, 0x12, 0x5F, 0x85, 0xA3, 0x12, 0x57, ++0xB6, 0xFF, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0x81, 0x4A, 0xE0, 0x54, 0xF0, 0x12, 0x77, ++0x64, 0x54, 0x01, 0x25, 0xE0, 0xFE, 0x90, 0x81, 0x47, 0xE0, 0x54, 0xFD, 0x4E, 0xF0, 0xEF, 0x54, ++0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x51, 0x77, 0x4F, 0x12, 0x76, 0x8D, 0x90, 0x81, 0x4B, 0x12, 0x6F, ++0x31, 0xFD, 0x7F, 0x02, 0x12, 0x4E, 0xA1, 0x90, 0x89, 0x16, 0x12, 0x44, 0x69, 0x71, 0x9C, 0x12, ++0x82, 0xF2, 0xF0, 0x90, 0x81, 0x4C, 0x12, 0x96, 0x20, 0x90, 0x01, 0xBB, 0x51, 0x76, 0x90, 0x01, ++0xBE, 0xF0, 0x22, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xAA, 0xE0, 0x22, 0x51, 0x1D, 0x90, 0x81, 0x4F, ++0xE0, 0x64, 0x0C, 0x60, 0x09, 0x12, 0x4B, 0xBB, 0x12, 0x4F, 0xE3, 0x12, 0x4E, 0x4C, 0x22, 0xE4, ++0xFF, 0x12, 0x52, 0x30, 0xBF, 0x01, 0x10, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x0A, 0x51, 0x77, 0x64, ++0x02, 0x60, 0x02, 0x80, 0x03, 0x71, 0x4B, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1D, 0x90, 0x80, ++0x4B, 0xE0, 0xFF, 0x90, 0x84, 0x70, 0x74, 0x09, 0xF0, 0x7B, 0x18, 0xE4, 0xFD, 0x12, 0x6C, 0x65, ++0x90, 0x89, 0x02, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x64, 0xCC, 0x22, 0x90, 0x89, 0x19, 0x12, ++0x44, 0x72, 0x12, 0x50, 0xBE, 0x90, 0x81, 0x4C, 0xE0, 0xFF, 0x12, 0x51, 0xC4, 0x90, 0x81, 0x4C, ++0xE0, 0x60, 0x1A, 0x90, 0x89, 0x19, 0x12, 0x44, 0x69, 0x12, 0x57, 0xB7, 0x54, 0x0F, 0xFF, 0x12, ++0x76, 0x8E, 0xFD, 0x12, 0x8A, 0xCD, 0xB1, 0x2A, 0x74, 0x01, 0xF0, 0x71, 0xCE, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0x90, 0x81, 0x48, 0x12, 0x5F, 0x84, 0x30, 0xE0, 0x02, ++0x81, 0x8A, 0x90, 0x81, 0x47, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x81, 0x69, 0xE0, 0x24, 0x04, 0x90, ++0x81, 0x61, 0xF0, 0x90, 0x81, 0x69, 0xE0, 0x24, 0x03, 0x90, 0x81, 0x60, 0xF0, 0x80, 0x0D, 0x90, ++0x81, 0x61, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x60, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x81, 0x60, 0xE0, ++0xFA, 0x90, 0x81, 0x5F, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x81, 0x54, 0xEB, 0xF0, 0x90, 0x81, ++0x61, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x81, 0x54, 0xF0, 0x90, ++0x81, 0x60, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x81, 0x64, 0xF0, 0x90, 0x81, 0x61, 0xE0, ++0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0x64, 0x91, 0x96, 0x98, 0x40, 0x04, 0xEF, ++0x24, 0x0A, 0xF0, 0x90, 0x81, 0x64, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, ++0x54, 0x91, 0x96, 0x98, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x81, 0x64, 0xE0, 0xFF, 0x7E, ++0x00, 0x90, 0x81, 0x58, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, ++0xE4, 0x60, 0x03, 0x12, 0x95, 0xF1, 0xF1, 0xB3, 0x80, 0x07, 0x90, 0x81, 0x49, 0xE0, 0x44, 0x01, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x22, ++0xF1, 0xCD, 0xD3, 0x9F, 0x40, 0x2F, 0x90, 0x81, 0x66, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0xA8, 0xE0, ++0xFF, 0x90, 0x81, 0x66, 0xE0, 0xD3, 0x9F, 0x50, 0x1C, 0x90, 0x81, 0x5E, 0xE0, 0x04, 0xF0, 0x91, ++0xD6, 0xF1, 0xD7, 0xF0, 0xFB, 0x90, 0x81, 0x5E, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x84, 0x80, ++0x74, 0x04, 0xF0, 0x71, 0xCE, 0x22, 0x90, 0x81, 0x55, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, ++0x22, 0x12, 0x87, 0xED, 0x90, 0x89, 0x07, 0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, ++0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x4E, 0xA1, 0x90, 0x89, 0x07, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, ++0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0x90, ++0x81, 0x47, 0xE0, 0x90, 0x04, 0xEC, 0x30, 0xE0, 0x06, 0xE0, 0x54, 0xDD, 0xF0, 0x80, 0x04, 0xE0, ++0x44, 0x22, 0xF0, 0xB1, 0x2A, 0x74, 0x02, 0xF0, 0x61, 0xCE, 0x90, 0x81, 0x5E, 0xE0, 0xFF, 0xA3, ++0xE0, 0xFD, 0x90, 0x81, 0x65, 0xE0, 0xFB, 0x90, 0x84, 0x80, 0x22, 0xE0, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x22, 0x90, 0x89, 0x26, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x89, 0x24, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xE4, 0x90, 0x89, 0x29, 0xF0, 0x90, 0x89, 0x28, 0xF0, 0xFD, 0xB1, 0xEE, 0xEF, 0x54, ++0x0C, 0x64, 0x08, 0x70, 0x61, 0xD1, 0x96, 0xA3, 0xE0, 0xD1, 0xA8, 0x64, 0x88, 0x70, 0x57, 0xD1, ++0x96, 0xA3, 0xE0, 0x24, 0x07, 0xFD, 0xB1, 0xEE, 0xEF, 0x64, 0x8E, 0x70, 0x49, 0x90, 0x89, 0x29, ++0x04, 0xD1, 0x95, 0xF1, 0x67, 0x2D, 0x04, 0xFD, 0xB1, 0xEE, 0xEF, 0x64, 0x03, 0x70, 0x37, 0xD1, ++0x96, 0xF1, 0x67, 0x2D, 0xD1, 0xA8, 0x30, 0xE3, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x01, 0x80, 0x23, ++0x90, 0x81, 0xB0, 0xB1, 0x3B, 0x30, 0xE0, 0x0A, 0xD1, 0x96, 0xA3, 0xE0, 0xFD, 0x12, 0x90, 0x98, ++0x80, 0x14, 0x90, 0x81, 0xB3, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x08, 0x90, 0x01, ++0xC7, 0x74, 0x02, 0x12, 0x5E, 0x6D, 0x90, 0x89, 0x29, 0xE0, 0xFF, 0x22, 0x90, 0x89, 0x26, 0xE0, ++0xFD, 0x90, 0x89, 0x25, 0xE0, 0x2D, 0xFD, 0x90, 0x89, 0x24, 0xE0, 0x34, 0x00, 0xCD, 0x24, 0x10, ++0xCD, 0x34, 0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xFF, 0xEE, 0x3C, 0xFE, 0xE4, 0xFD, 0xAB, 0x07, ++0xAA, 0x06, 0xED, 0x2B, 0xFB, 0xE4, 0x3A, 0xFA, 0xC3, 0x90, 0x81, 0x3C, 0xE0, 0x9B, 0x90, 0x81, ++0x3B, 0xE0, 0x9A, 0x50, 0x0D, 0xA3, 0xF1, 0xBB, 0x34, 0x00, 0xFE, 0xC3, 0xEB, 0x9F, 0xFB, 0xEA, ++0x9E, 0xFA, 0xF1, 0xAB, 0x12, 0x87, 0x87, 0xFF, 0x22, 0x90, 0x89, 0x34, 0xEE, 0xF0, 0xA3, 0xEF, ++0xF0, 0x7D, 0x09, 0xB1, 0xEE, 0xEF, 0x64, 0x06, 0x70, 0x24, 0xD1, 0x9F, 0x7D, 0x14, 0xB1, 0xEE, ++0xEF, 0x70, 0x1B, 0xD1, 0x9F, 0x7D, 0x15, 0xB1, 0xEE, 0xEF, 0x64, 0x50, 0x70, 0x10, 0xD1, 0x9F, ++0x7D, 0x21, 0xB1, 0xEE, 0xEF, 0x20, 0xE0, 0x03, 0x30, 0xE2, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x81, ++0xB1, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x39, 0xD1, 0x9F, 0x7D, 0x09, 0xB1, 0xEE, 0xEF, ++0x64, 0x11, 0x70, 0x2E, 0x90, 0x89, 0x35, 0xE0, 0x24, 0x14, 0xFF, 0x90, 0x89, 0x34, 0xE0, 0x34, ++0x00, 0xFE, 0x90, 0x89, 0x36, 0xF0, 0xA3, 0xEF, 0xF0, 0x7D, 0x02, 0xB1, 0xEE, 0xEF, 0x70, 0x12, ++0x90, 0x89, 0x36, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7D, 0x03, 0xB1, 0xEE, 0xBF, 0x89, 0x03, 0x7F, ++0x01, 0x22, 0x7F, 0x00, 0x22, 0xF0, 0x90, 0x89, 0x24, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, ++0x89, 0x34, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x24, 0x06, 0xFD, 0xB1, 0xEE, 0xEF, 0x22, 0xFF, ++0x90, 0x89, 0x2D, 0xE0, 0x34, 0x00, 0xFE, 0xE4, 0xFD, 0xA1, 0xEE, 0x12, 0x6F, 0xB3, 0xF1, 0xA4, ++0x7B, 0xFF, 0x7A, 0x40, 0x79, 0xFA, 0x12, 0x67, 0xDA, 0x78, 0x2E, 0x7C, 0x89, 0x7D, 0x01, 0x7B, ++0xFF, 0x7A, 0x41, 0x79, 0x00, 0x7E, 0x00, 0x7F, 0x04, 0x12, 0x43, 0xD0, 0x90, 0x89, 0x24, 0xA3, ++0x12, 0x5F, 0xA1, 0x70, 0x02, 0xE1, 0x66, 0x12, 0x83, 0xCD, 0xFE, 0x90, 0x89, 0x32, 0xF0, 0xA3, ++0xEF, 0xF0, 0x24, 0x06, 0xFF, 0xE4, 0x3E, 0xD1, 0xB6, 0xEF, 0x64, 0x08, 0x70, 0x68, 0x90, 0x89, ++0x33, 0xE0, 0x24, 0x07, 0xFF, 0x90, 0x89, 0x32, 0xD1, 0xB3, 0xEF, 0x70, 0x59, 0x90, 0x89, 0x2D, ++0xF0, 0x90, 0x89, 0x2D, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x24, 0x90, 0x89, 0x33, 0xE0, 0x24, ++0x18, 0xFD, 0x90, 0x89, 0x32, 0xE0, 0xB1, 0xE1, 0x90, 0x89, 0x2D, 0xE0, 0x24, 0x2E, 0xF5, 0x82, ++0xE4, 0x34, 0x89, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x89, 0x2D, 0xE0, 0x04, 0xF0, 0x80, 0xD2, 0x78, ++0x2E, 0x7C, 0x89, 0x12, 0x87, 0xC8, 0xEF, 0x70, 0x1D, 0x90, 0x89, 0x33, 0xE0, 0x24, 0x08, 0xFF, ++0x90, 0x89, 0x32, 0xE0, 0x34, 0x00, 0xFE, 0xD1, 0x19, 0xEF, 0x64, 0x01, 0x60, 0x08, 0x90, 0x01, ++0xC7, 0x74, 0x22, 0x12, 0x5E, 0x6D, 0x22, 0x90, 0x89, 0x27, 0xE0, 0xFD, 0x90, 0x89, 0x26, 0xE0, ++0x22, 0x90, 0x89, 0x51, 0x12, 0x6F, 0xB6, 0x2F, 0xFF, 0xE4, 0x3E, 0xCF, 0x24, 0x06, 0xCF, 0xD1, ++0xB4, 0xBF, 0x86, 0x1D, 0x90, 0x89, 0x53, 0xE0, 0xFF, 0x90, 0x89, 0x52, 0xE0, 0x2F, 0xFF, 0x90, ++0x89, 0x51, 0xE0, 0x34, 0x00, 0xCF, 0x24, 0x07, 0xCF, 0xD1, 0xB4, 0xBF, 0xDD, 0x03, 0x7F, 0x01, ++0x22, 0x7F, 0x00, 0x22, 0x78, 0x27, 0x7C, 0x89, 0x7D, 0x01, 0x22, 0xEA, 0x90, 0xFD, 0x11, 0xF0, ++0xAF, 0x03, 0x22, 0x90, 0x81, 0x49, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xE0, 0x24, 0x01, 0xFF, 0x90, ++0x81, 0x3B, 0xE0, 0x22, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x02, 0x51, 0x54, 0x22, 0x90, 0x81, 0xA9, ++0xE0, 0xFF, 0x90, 0x81, 0x55, 0xE0, 0x22, 0xFF, 0x90, 0x81, 0x54, 0xE0, 0x2F, 0x90, 0x81, 0x65, ++0x22, 0x90, 0x84, 0x8F, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x48, 0x9E, 0x90, 0x80, 0x01, 0xE0, 0xFF, ++0x90, 0x84, 0x8F, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x80, 0x01, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x46, ++0xF0, 0xBF, 0x01, 0x0D, 0x12, 0x57, 0xB7, 0x64, 0x01, 0x60, 0x19, 0x7D, 0x13, 0x7F, 0x6F, 0x80, ++0x10, 0xAB, 0x50, 0xAA, 0x51, 0xA9, 0x52, 0x12, 0x57, 0xB7, 0x64, 0x01, 0x60, 0x06, 0xE4, 0xFD, ++0xFF, 0x12, 0x4D, 0xE3, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFF, 0x90, ++0x84, 0x09, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0x57, 0xF0, 0x22, ++0x12, 0x1F, 0xA4, 0x90, 0x81, 0xAF, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0x39, 0xF0, 0xA3, 0xF0, 0x90, ++0x80, 0xA1, 0xF0, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x39, ++0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x81, 0x3A, ++0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, ++0xE0, 0x44, 0x02, 0xF0, 0x80, 0x2E, 0xC0, 0x01, 0x90, 0x81, 0x3A, 0xE0, 0x11, 0xC9, 0x35, 0xF0, ++0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x43, 0xD0, 0x90, 0x81, ++0x3A, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, ++0x90, 0x81, 0x3A, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xA3, 0xF9, ++0x74, 0x80, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, ++0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9C, 0x74, 0x7E, 0xF0, 0xA3, 0x74, 0x92, ++0xF0, 0xA3, 0x74, 0xA0, 0xF0, 0xA3, 0x74, 0x24, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x49, 0xF0, 0x90, ++0x01, 0x9A, 0x74, 0xE0, 0xF0, 0x90, 0x01, 0x99, 0xE4, 0xF0, 0x90, 0x01, 0x98, 0x04, 0xF0, 0x22, ++0xE4, 0x90, 0x89, 0x0B, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x98, 0xE0, 0x7F, 0x00, 0x30, 0xE4, 0x02, ++0x7F, 0x01, 0xEF, 0x64, 0x01, 0x60, 0x3C, 0xC3, 0x90, 0x89, 0x0C, 0xE0, 0x94, 0x88, 0x90, 0x89, ++0x0B, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, 0xC7, ++0x74, 0xFD, 0xF0, 0x80, 0x1E, 0x90, 0x89, 0x0B, 0x12, 0x61, 0x19, 0x31, 0x6A, 0xD3, 0x90, 0x89, ++0x0C, 0xE0, 0x94, 0x32, 0x90, 0x89, 0x0B, 0xE0, 0x94, 0x00, 0x40, 0xBB, 0x90, 0x01, 0xC6, 0xE0, ++0x30, 0xE3, 0xB4, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, ++0xAA, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0x71, 0xF0, 0x74, 0x81, 0xA3, 0xF0, 0x90, 0x83, 0xF7, ++0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, ++0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE, 0x74, ++0x71, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x81, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0xE4, 0x90, 0x80, ++0x01, 0x02, 0x57, 0x70, 0x90, 0x01, 0xE4, 0x74, 0x16, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, ++0x34, 0xE0, 0x55, 0x3D, 0xF5, 0x41, 0xA3, 0xE0, 0x55, 0x3E, 0xF5, 0x42, 0xA3, 0xE0, 0x55, 0x3F, ++0xF5, 0x43, 0xA3, 0xE0, 0x55, 0x40, 0xF5, 0x44, 0x90, 0x01, 0x34, 0xE5, 0x41, 0xF0, 0xA3, 0xE5, ++0x42, 0xF0, 0xA3, 0xE5, 0x43, 0xF0, 0xA3, 0xE5, 0x44, 0xF0, 0x22, 0x90, 0x01, 0x3C, 0xE0, 0x55, ++0x45, 0xF5, 0x49, 0xA3, 0xE0, 0x55, 0x46, 0xF5, 0x4A, 0xA3, 0xE0, 0x55, 0x47, 0xF5, 0x4B, 0xA3, ++0xE0, 0x55, 0x48, 0xF5, 0x4C, 0x90, 0x01, 0x3C, 0xE5, 0x49, 0xF0, 0xA3, 0xE5, 0x4A, 0xF0, 0xA3, ++0xE5, 0x4B, 0xF0, 0xA3, 0xE5, 0x4C, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, 0x81, 0xB0, 0xE0, 0x30, ++0xE0, 0x05, 0x7F, 0x10, 0x12, 0x77, 0x55, 0x22, 0x90, 0x84, 0x02, 0xE0, 0x04, 0xF0, 0x90, 0x81, ++0x4F, 0xE0, 0x64, 0x02, 0x60, 0x09, 0x12, 0x50, 0xEE, 0x90, 0x01, 0xE6, 0xE0, 0x04, 0xF0, 0x22, ++0x12, 0x4F, 0xC2, 0x70, 0x15, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x0F, 0x51, 0x66, 0x90, 0x81, 0x47, ++0xE0, 0x51, 0x5B, 0x54, 0x07, 0x70, 0x03, 0x12, 0x57, 0xE7, 0x22, 0x54, 0xFB, 0xF0, 0x90, 0x81, ++0x50, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, ++0xF0, 0x22, 0xE4, 0xFF, 0x12, 0x52, 0x30, 0xBF, 0x01, 0x11, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x0B, ++0x12, 0x7A, 0xD5, 0xF0, 0x54, 0x07, 0x70, 0x03, 0x12, 0x57, 0xE7, 0x22, 0x90, 0x81, 0x47, 0x51, ++0xB2, 0x30, 0xE0, 0x19, 0xEF, 0x54, 0xBF, 0x51, 0xBA, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, ++0x80, 0x08, 0xE0, 0x54, 0xFE, 0x51, 0xF1, 0x74, 0x04, 0xF0, 0x12, 0x57, 0xE7, 0xE4, 0xFF, 0x02, ++0x5E, 0x76, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, ++0x81, 0x48, 0x22, 0x90, 0x81, 0x47, 0xE0, 0xFF, 0x12, 0x5F, 0x85, 0x30, 0xE0, 0x1E, 0xEF, 0x54, ++0x7F, 0x51, 0xBA, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x07, 0xE0, 0x54, 0xFD, 0x51, ++0xF1, 0x04, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x03, 0x12, 0x57, 0xE7, 0x7F, 0x01, 0x02, 0x5E, ++0x76, 0xF0, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0xEF, 0x60, 0x33, 0x12, ++0x4F, 0xC2, 0x70, 0x2E, 0x90, 0x81, 0x48, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, 0x0F, 0x12, ++0x4D, 0xE3, 0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x4E, 0x4C, 0xBF, 0x01, 0x0E, 0x90, ++0x81, 0x47, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x02, 0x4E, 0xA1, 0x51, 0xF2, 0x74, ++0x08, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1A, ++0x90, 0x05, 0x22, 0xE0, 0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x08, 0xF0, 0x90, ++0x01, 0xC6, 0xE0, 0x30, 0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xC3, 0xEE, 0x94, 0x01, 0x40, 0x1E, 0x90, 0xFD, 0x11, 0xE0, 0xB5, 0x05, 0x14, 0x90, 0x01, ++0x17, 0xE0, 0xB5, 0x05, 0x07, 0x90, 0xFD, 0x11, 0xE4, 0xF0, 0x80, 0x06, 0xED, 0x04, 0x90, 0xFD, ++0x11, 0xF0, 0xE4, 0x2F, 0xFF, 0x22, 0x12, 0x6F, 0xB3, 0xE4, 0xA3, 0xF0, 0x90, 0x89, 0x27, 0xE0, ++0xFF, 0xC3, 0x94, 0x02, 0x50, 0x1F, 0xF1, 0x7B, 0x71, 0xD8, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xF1, ++0x19, 0x24, 0xC3, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xF1, 0x83, 0xB5, 0x06, 0x1D, 0x90, 0x89, 0x27, ++0xE0, 0x04, 0xF0, 0x80, 0xD7, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x01, 0xC7, 0x74, ++0x30, 0xF0, 0x7F, 0x01, 0x12, 0x5B, 0x63, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x89, 0x26, ++0xE0, 0xFF, 0x90, 0x89, 0x25, 0xE0, 0x2F, 0xFF, 0x90, 0x89, 0x24, 0xE0, 0x34, 0x00, 0x22, 0x12, ++0x6F, 0xB3, 0xF1, 0x10, 0x7A, 0x40, 0x79, 0xC0, 0x12, 0x67, 0xDA, 0x78, 0x33, 0x7C, 0x89, 0x7D, ++0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0xC6, 0x7E, 0x00, 0x7F, 0x04, 0x12, 0x43, 0xD0, 0x78, 0x37, ++0x7C, 0x89, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0xCA, 0x7E, 0x00, 0x7F, 0x04, 0x12, 0x43, ++0xD0, 0xE4, 0x90, 0x89, 0x3C, 0xF0, 0x71, 0xCD, 0xCF, 0x24, 0x06, 0xCF, 0x12, 0x7E, 0xB4, 0xEF, ++0x64, 0x08, 0x60, 0x02, 0xA1, 0x05, 0x71, 0xCD, 0xCF, 0x24, 0x07, 0xCF, 0x12, 0x7E, 0xB4, 0xEF, ++0x64, 0x06, 0x60, 0x02, 0xA1, 0x05, 0x90, 0x89, 0x3C, 0x04, 0xF0, 0xE4, 0x90, 0x89, 0x3B, 0xF0, ++0xD1, 0xF5, 0x50, 0x17, 0x90, 0x89, 0x25, 0xE0, 0x24, 0x0A, 0xFD, 0x90, 0x89, 0x24, 0xE0, 0x12, ++0x7D, 0xE1, 0x90, 0x89, 0x3B, 0xF1, 0x07, 0xB1, 0x0B, 0x80, 0xE5, 0x12, 0x7F, 0xA4, 0x7B, 0x01, ++0x7A, 0x81, 0x79, 0xC0, 0xF1, 0xBF, 0x60, 0x02, 0xA1, 0x05, 0x90, 0x89, 0x3B, 0xF0, 0xD1, 0xEC, ++0x50, 0x19, 0xD1, 0xAD, 0x71, 0xD8, 0xCD, 0x24, 0x20, 0x12, 0x7D, 0xE0, 0x90, 0x89, 0x3B, 0xE0, ++0x24, 0x37, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xB1, 0x0B, 0x80, 0xE3, 0x78, 0x37, 0x7C, 0x89, 0xF1, ++0xC8, 0xEF, 0x70, 0x68, 0x90, 0x06, 0x30, 0xE0, 0x44, 0x01, 0x54, 0xDF, 0xF0, 0x90, 0x81, 0xB2, ++0xE0, 0x30, 0xE0, 0x0A, 0x90, 0x01, 0xC7, 0x74, 0x09, 0x12, 0x5E, 0x6D, 0x80, 0x57, 0xE4, 0x90, ++0x89, 0x3B, 0xF0, 0xD1, 0xF5, 0x50, 0x0C, 0x12, 0x7D, 0xCC, 0x90, 0x89, 0x3B, 0xD1, 0xFE, 0xB1, ++0x0B, 0x80, 0xF0, 0xE4, 0x90, 0x89, 0x3B, 0xF0, 0xD1, 0xEC, 0x50, 0x19, 0xD1, 0xAD, 0x71, 0xD8, ++0xCD, 0x24, 0x16, 0x12, 0x7D, 0xE0, 0x90, 0x89, 0x3B, 0xE0, 0x24, 0x33, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xB1, 0x0B, 0x80, 0xE3, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x2D, 0xF1, 0x93, 0x90, 0x84, 0x10, ++0xF0, 0xA3, 0xF0, 0x7A, 0x89, 0x79, 0x33, 0x12, 0x64, 0xE0, 0x80, 0x09, 0x90, 0x06, 0x30, 0xE0, ++0x44, 0x21, 0x54, 0xEF, 0xF0, 0x90, 0x89, 0x3C, 0xE0, 0xFF, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, ++0x89, 0x3B, 0xE0, 0x04, 0xF0, 0x22, 0x12, 0x6F, 0xB3, 0x12, 0x7F, 0xA4, 0x7B, 0xFF, 0x7A, 0x40, ++0x79, 0xD4, 0x12, 0x67, 0xDA, 0xF1, 0x10, 0x7A, 0x40, 0x79, 0xDA, 0xD1, 0xCB, 0x78, 0x3D, 0x7C, ++0x89, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0xEA, 0xD1, 0xCB, 0xE4, 0x90, 0x89, 0x50, 0x12, ++0x7E, 0x95, 0xA3, 0xE0, 0xFD, 0x12, 0x7F, 0x71, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xC1, 0xA7, 0x71, ++0xCD, 0xCF, 0x24, 0x0E, 0xCF, 0x12, 0x7E, 0xB4, 0xEF, 0x64, 0x3A, 0x60, 0x02, 0xC1, 0xA7, 0x71, ++0xCD, 0xCF, 0x24, 0x30, 0xCF, 0x12, 0x7E, 0xB4, 0xEF, 0x64, 0x87, 0x60, 0x02, 0xC1, 0xA7, 0x90, ++0x89, 0x50, 0x04, 0xF0, 0xE4, 0x90, 0x89, 0x4D, 0xF0, 0xD1, 0xB9, 0x94, 0x10, 0x50, 0x19, 0xD1, ++0xAD, 0x71, 0xD8, 0xCD, 0x24, 0x38, 0x12, 0x7D, 0xE0, 0x90, 0x89, 0x4D, 0xE0, 0x24, 0x3D, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xD1, 0xC0, 0x80, 0xE1, 0xE4, 0x90, 0x89, 0x4E, 0xF0, 0x90, 0x89, 0x4E, ++0xE0, 0xFF, 0xC3, 0x94, 0x02, 0x40, 0x02, 0xC1, 0xA7, 0x75, 0xF0, 0x38, 0xEF, 0xD1, 0xD2, 0x20, ++0xE0, 0x02, 0xC1, 0xA7, 0xE4, 0x90, 0x89, 0x4F, 0xF0, 0xD1, 0xE3, 0x90, 0x81, 0xEA, 0x12, 0x44, ++0x5D, 0xE0, 0xFE, 0x90, 0x89, 0x4F, 0xE0, 0xC3, 0x9E, 0x40, 0x02, 0xC1, 0x9F, 0xEF, 0x75, 0xF0, ++0x38, 0xA4, 0x24, 0x01, 0xF9, 0x74, 0x82, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xE0, 0x75, 0xF0, 0x10, ++0xA4, 0x29, 0xF9, 0xEA, 0x35, 0xF0, 0xFA, 0x78, 0x3D, 0x7C, 0x89, 0xD1, 0xDA, 0xEF, 0x60, 0x02, ++0xC1, 0x90, 0x90, 0x06, 0x33, 0xE0, 0x44, 0x01, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x89, 0x4D, 0xF0, ++0xD1, 0xB9, 0x94, 0x06, 0x50, 0x13, 0xD1, 0xAD, 0x71, 0xD8, 0xCD, 0x24, 0x4A, 0x12, 0x7D, 0xE0, ++0x90, 0x89, 0x4D, 0xF1, 0x07, 0xD1, 0xC0, 0x80, 0xE7, 0xE4, 0x90, 0x89, 0x4D, 0xF0, 0xD1, 0xB9, ++0x94, 0x10, 0x50, 0x0C, 0x12, 0x7D, 0xCC, 0x90, 0x89, 0x4D, 0xD1, 0xFE, 0xD1, 0xC0, 0x80, 0xEE, ++0xD1, 0xE3, 0xD1, 0xD2, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x1A, 0xEF, 0x75, 0xF0, 0x38, 0xA4, 0x24, ++0xF1, 0xF9, 0x74, 0x81, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x78, 0x2D, 0x7C, 0x89, 0xD1, 0xDA, 0xEF, ++0x70, 0x45, 0x80, 0x00, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x27, 0x90, 0x89, 0x54, 0x12, 0x44, 0x72, ++0x7A, 0x89, 0x79, 0x3D, 0x90, 0x89, 0x57, 0x12, 0x44, 0x72, 0x90, 0x89, 0x4E, 0xE0, 0x75, 0xF0, ++0x38, 0xA4, 0x24, 0xEB, 0xF9, 0x74, 0x81, 0x35, 0xF0, 0xFA, 0x90, 0x89, 0x5A, 0x12, 0x44, 0x72, ++0xE4, 0x90, 0x89, 0x5D, 0xF0, 0xA3, 0xF0, 0x7A, 0x89, 0x79, 0x2D, 0x12, 0x63, 0x58, 0x80, 0x07, ++0x90, 0x06, 0x33, 0xE0, 0x44, 0x05, 0xF0, 0x90, 0x89, 0x4F, 0xE0, 0x04, 0xF0, 0xA1, 0xB9, 0x90, ++0x89, 0x4E, 0xE0, 0x04, 0xF0, 0xA1, 0x9D, 0x90, 0x89, 0x50, 0xE0, 0xFF, 0x22, 0x90, 0x89, 0x26, ++0xE0, 0xFD, 0x90, 0x89, 0x25, 0xE0, 0x2D, 0xFD, 0x22, 0x90, 0x89, 0x4D, 0xE0, 0xFF, 0xC3, 0x22, ++0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x89, 0x4D, 0xE0, 0x04, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x10, 0x02, ++0x43, 0xD0, 0x90, 0x81, 0xE9, 0x12, 0x44, 0x5D, 0xE0, 0x22, 0x7D, 0x01, 0x7E, 0x00, 0x7F, 0x10, ++0x02, 0x46, 0x27, 0x90, 0x89, 0x4E, 0xE0, 0xFF, 0x75, 0xF0, 0x38, 0x22, 0x90, 0x89, 0x3B, 0xE0, ++0xFF, 0xC3, 0x94, 0x04, 0x22, 0x90, 0x89, 0x3B, 0xE0, 0xFF, 0xC3, 0x94, 0x06, 0x22, 0xE0, 0x24, ++0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0x22, 0xE0, 0x24, 0x27, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0x22, ++0x78, 0x2D, 0x7C, 0x89, 0x7D, 0x01, 0x7B, 0xFF, 0x22, 0xFF, 0xEE, 0x3C, 0xFE, 0x90, 0x89, 0x26, ++0xE0, 0xFD, 0x71, 0x61, 0x90, 0x89, 0x27, 0xE0, 0x22, 0x12, 0x6F, 0xB3, 0x90, 0x83, 0x95, 0xE0, ++0x70, 0x02, 0xA3, 0xE0, 0x60, 0x31, 0xE4, 0x90, 0x89, 0x27, 0xF0, 0x90, 0x89, 0x27, 0xE0, 0xFE, ++0xC3, 0x94, 0x02, 0x50, 0x25, 0xF1, 0x7B, 0x71, 0xD8, 0xFC, 0xEE, 0x7E, 0x00, 0x2D, 0xF1, 0x19, ++0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xF1, 0x83, 0x6E, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, ++0x89, 0x27, 0xE0, 0x04, 0xF0, 0x80, 0xD4, 0x7F, 0x00, 0x22, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x40, ++0xF0, 0xE4, 0x90, 0x83, 0xA1, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x89, 0x25, 0xE0, 0x24, ++0x1C, 0xFD, 0x22, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x00, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, ++0x83, 0xE0, 0x22, 0x90, 0x84, 0x0D, 0x12, 0x44, 0x72, 0xE4, 0x22, 0x90, 0x83, 0xF8, 0xF1, 0xB8, ++0x30, 0xE0, 0x12, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0xF1, 0x93, 0x90, 0x84, 0x10, 0xF0, 0xA3, ++0x04, 0xF0, 0x02, 0x64, 0xE0, 0x02, 0x4E, 0x4C, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x7E, ++0x00, 0x7F, 0x06, 0x12, 0x46, 0x27, 0xEF, 0x22, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xDB, ++0x7E, 0x00, 0x7F, 0x04, 0x02, 0x46, 0x27, 0xEF, 0x90, 0x02, 0x86, 0x60, 0x06, 0xE0, 0x44, 0x04, ++0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x80, 0x06, 0xED, 0xF0, 0x22, 0xE4, 0x90, 0x89, ++0x08, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x00, 0x83, 0xE0, 0x90, 0x89, 0x08, 0xF0, 0x90, 0x00, ++0x83, 0xE0, 0xFE, 0x90, 0x89, 0x08, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x89, 0x0A, ++0xE0, 0x94, 0x64, 0x90, 0x89, 0x09, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x40, 0xF0, 0x90, 0x89, 0x08, 0xE0, 0xFF, 0x22, 0x90, 0x89, 0x09, 0x12, 0x61, 0x19, 0x80, 0xC6, ++0x90, 0x01, 0xC4, 0x74, 0x30, 0xF0, 0x74, 0x88, 0xA3, 0xF0, 0x90, 0x00, 0x90, 0xE0, 0x20, 0xE0, ++0xF9, 0x74, 0x30, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x88, 0xA3, 0xF0, 0x22, 0xE4, 0xFE, 0xEF, ++0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0xFD, 0xEF, 0x54, 0x1F, 0xFF, 0xED, 0x60, 0x2C, 0x14, 0x60, ++0x1E, 0x24, 0xFD, 0x60, 0x0F, 0x24, 0xFE, 0x70, 0x2A, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0xDE, ++0x9F, 0xFE, 0x80, 0x1F, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0xF2, 0x9F, 0xFE, 0x80, 0x14, 0xEF, ++0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x06, 0x9F, 0xFE, 0x80, 0x09, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, ++0x10, 0x9F, 0xFE, 0xAF, 0x06, 0x22, 0xD3, 0xEF, 0x64, 0x80, 0x94, 0x1C, 0x40, 0x07, 0xEF, 0x64, ++0x80, 0x94, 0x94, 0x40, 0x03, 0x7F, 0x00, 0x22, 0xC3, 0xEF, 0x64, 0x80, 0x94, 0x80, 0x40, 0x03, ++0x7F, 0x64, 0x22, 0xEF, 0x24, 0x64, 0xFF, 0x22, 0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B, 0x01, ++0x7A, 0x81, 0x79, 0x47, 0x12, 0x46, 0x4B, 0x90, 0x81, 0x4B, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x52, ++0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x90, 0x81, 0x58, 0xE4, 0xF0, 0xA3, 0x74, 0x02, ++0x31, 0x5B, 0x51, 0x21, 0xE4, 0xFD, 0xFF, 0x12, 0x4E, 0xA1, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x4E, ++0xA1, 0x12, 0x4E, 0x9D, 0x90, 0x80, 0x07, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x81, 0x57, 0x74, ++0x99, 0xF0, 0x80, 0x29, 0xEF, 0xB4, 0x03, 0x08, 0x90, 0x81, 0x57, 0x74, 0x90, 0xF0, 0x80, 0x1D, ++0x90, 0x81, 0x57, 0x74, 0x40, 0xF0, 0x90, 0x00, 0x2C, 0xE0, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, ++0x90, 0x81, 0x69, 0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x81, 0x69, 0xF0, 0x51, 0x0C, 0x31, ++0x5B, 0x7F, 0x01, 0x31, 0x6B, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x7E, 0x00, 0xFF, 0x7D, 0x00, ++0x7B, 0x01, 0x7A, 0x81, 0x79, 0xAD, 0x12, 0x46, 0x4B, 0x31, 0x92, 0xF0, 0x90, 0x06, 0x0A, 0xE0, ++0x54, 0xF8, 0x12, 0x4F, 0xE2, 0xE4, 0x90, 0x81, 0xAF, 0xF0, 0x22, 0xF0, 0x90, 0x81, 0x69, 0xE0, ++0x24, 0x04, 0x90, 0x81, 0x64, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0xE4, 0xFE, 0x74, 0x6A, 0x2E, ++0x31, 0xFB, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF4, 0xE4, 0x90, 0x81, 0x63, 0xF0, 0x90, 0x81, ++0x62, 0xF0, 0x90, 0x81, 0x66, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0x2D, 0xF0, 0xE4, 0xA3, ++0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0x22, 0x90, 0x84, 0x64, 0xE0, 0xFF, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x95, 0xEF, 0xF0, 0x90, 0x80, 0x4C, 0xE0, 0xFF, 0x90, ++0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x40, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x0E, 0x70, 0x15, 0x90, 0x84, ++0x95, 0xE0, 0x70, 0x32, 0x90, 0x81, 0x47, 0xE0, 0x54, 0x7F, 0xF0, 0x31, 0x92, 0xF0, 0x12, 0x4E, ++0x9D, 0x80, 0x20, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x06, 0x70, 0x1B, 0x90, 0x84, 0x95, 0xE0, 0x60, ++0x15, 0x90, 0x81, 0x47, 0xE0, 0x54, 0xBF, 0xF0, 0x51, 0x03, 0x44, 0x80, 0xF0, 0x90, 0x81, 0x4F, ++0x74, 0x04, 0xF0, 0x12, 0x4F, 0xE3, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x81, ++0xF5, 0x83, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x22, 0x90, 0x81, 0xA9, 0x74, ++0x03, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, ++0x22, 0x90, 0x81, 0xA3, 0x74, 0x04, 0xF0, 0xA3, 0x14, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, ++0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, 0x03, 0x7F, ++0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x51, 0x38, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, ++0x0F, 0x01, 0x80, 0x56, 0x90, 0x81, 0x50, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, 0x02, ++0x80, 0x48, 0x90, 0x81, 0x4E, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, 0x80, ++0x39, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, 0x80, 0x30, 0x90, 0x81, 0x50, 0xE0, 0x30, 0xE4, ++0x05, 0x75, 0x0F, 0x10, 0x80, 0x24, 0x90, 0x81, 0x48, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, ++0x05, 0x75, 0x0F, 0x20, 0x80, 0x14, 0x90, 0x81, 0xAF, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, 0x80, ++0x09, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, ++0x90, 0x01, 0xB8, 0xE5, 0x0F, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x24, 0xFE, ++0x60, 0x0B, 0x04, 0x70, 0x24, 0x90, 0x81, 0x52, 0x74, 0x02, 0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, ++0x90, 0x81, 0xAC, 0xE0, 0x80, 0x02, 0xED, 0x14, 0x90, 0x81, 0x52, 0xF0, 0x90, 0x81, 0x52, 0xE0, ++0xA3, 0xF0, 0x90, 0x81, 0x48, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, ++0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, 0x75, 0x4F, 0x01, 0x80, 0x46, 0x90, ++0x81, 0xB0, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x02, 0x82, 0xE0, 0x60, 0x05, 0x75, 0x4F, 0x02, 0x80, ++0x34, 0x90, 0x81, 0xB9, 0xE0, 0x30, 0xE0, 0x05, 0x75, 0x4F, 0x08, 0x80, 0x28, 0x90, 0x02, 0x86, ++0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x4F, 0x04, ++0x80, 0x13, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x05, 0x75, 0x4F, 0x40, 0x80, 0x08, 0x90, 0x01, 0xB8, ++0xE4, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x4F, ++0xF0, 0x7F, 0x00, 0x22, 0x90, 0x83, 0xF8, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0x7F, 0xF0, 0x54, 0xFB, ++0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x83, 0xF8, 0xE0, 0x30, ++0xE0, 0x35, 0x12, 0x4F, 0xC2, 0x70, 0x30, 0x90, 0x84, 0x97, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x0A, ++0x0B, 0x90, 0x83, 0xFA, 0xE0, 0x04, 0xF0, 0xE4, 0x90, 0x84, 0x97, 0xF0, 0x90, 0x83, 0xFA, 0xE0, ++0xFF, 0x90, 0x83, 0xF9, 0xE0, 0xD3, 0x9F, 0x50, 0x0E, 0x90, 0x83, 0xFB, 0xE0, 0x70, 0x08, 0xE4, ++0x90, 0x83, 0xFA, 0xF0, 0x12, 0x87, 0x9B, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x02, 0x84, ++0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0xA3, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0xB1, 0x08, 0x12, 0x6F, 0xC6, ++0x90, 0x89, 0x16, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x87, 0xE0, 0x90, 0x89, 0x1A, 0xF0, 0x90, ++0x81, 0xB0, 0xE0, 0x20, 0xE0, 0x02, 0x81, 0x81, 0x90, 0x89, 0x1A, 0xE0, 0xFF, 0xEC, 0xC3, 0x9F, ++0x40, 0x02, 0x81, 0x81, 0x90, 0x89, 0x16, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x12, 0x7F, 0xAB, 0xAD, ++0x07, 0x74, 0x02, 0x2D, 0xB1, 0x20, 0xF9, 0x91, 0x82, 0xFE, 0x74, 0x00, 0x2D, 0x12, 0x87, 0x8A, ++0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x54, 0x3F, 0x90, 0x89, 0x18, 0xF0, 0xA3, 0xEF, 0xF0, ++0x74, 0x03, 0x2D, 0x91, 0xFF, 0x54, 0x03, 0xFF, 0x7E, 0x00, 0xAD, 0x01, 0xED, 0x24, 0x18, 0xFB, ++0xEA, 0x33, 0xCB, 0x2F, 0xFF, 0xEE, 0x3B, 0x90, 0x89, 0x18, 0x8F, 0xF0, 0x12, 0x43, 0xF6, 0x90, ++0x89, 0x18, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x91, 0x8E, 0x90, 0x89, 0x18, 0xEE, 0xF0, 0xA3, 0xEF, ++0xF0, 0x90, 0x89, 0x16, 0xB1, 0x11, 0xD3, 0x90, 0x89, 0x17, 0xE0, 0x9F, 0x90, 0x89, 0x16, 0xE0, ++0x9E, 0x40, 0x16, 0x90, 0x81, 0x3C, 0x12, 0x7F, 0xBB, 0x34, 0x00, 0xFE, 0xC3, 0x90, 0x89, 0x17, ++0xE0, 0x9F, 0xF0, 0x90, 0x89, 0x16, 0xE0, 0x9E, 0xF0, 0x90, 0x89, 0x16, 0x71, 0xB8, 0x0C, 0x61, ++0xE8, 0x22, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, 0x7D, 0x7F, ++0xEF, 0x5D, 0xC3, 0x60, 0x0D, 0x91, 0xA9, 0xFE, 0xED, 0x5F, 0x24, 0x80, 0xFF, 0xE4, 0x3E, 0xFE, ++0x80, 0x06, 0x91, 0xA9, 0xFE, 0xED, 0x5F, 0xFF, 0x22, 0x74, 0xFF, 0x9D, 0xFD, 0x74, 0xFF, 0x94, ++0x00, 0x5E, 0x22, 0xB1, 0x30, 0xAD, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xB3, 0xF0, 0x74, 0x8C, 0xA3, ++0xF0, 0xED, 0x64, 0x01, 0x60, 0x1E, 0x12, 0x5E, 0x6E, 0xED, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, ++0x74, 0x40, 0xF0, 0x80, 0x0A, 0xED, 0xB4, 0x04, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x41, 0xF0, 0x7F, ++0x01, 0x02, 0x5B, 0x63, 0x71, 0xCB, 0x90, 0x02, 0x87, 0xE0, 0x70, 0xF8, 0x90, 0x06, 0x90, 0xE0, ++0x44, 0x02, 0xF0, 0x74, 0xB3, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x8C, 0xA3, 0xF0, 0x22, 0xF5, ++0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, ++0x22, 0xEE, 0x8F, 0xF0, 0x12, 0x43, 0xF6, 0x90, 0x81, 0x3B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, ++0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x22, ++0x90, 0x02, 0x86, 0xE0, 0x20, 0xE2, 0x03, 0x7F, 0x04, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x7F, 0x01, ++0x20, 0xE1, 0x02, 0x7F, 0x02, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFD, 0x7F, ++0x8F, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xB1, 0x46, 0x90, 0x83, 0xF6, 0xE0, 0xFF, ++0xB1, 0x83, 0x90, 0x01, 0x3F, 0x74, 0x04, 0xF0, 0x90, 0x80, 0x07, 0xE0, 0xFF, 0xB4, 0x01, 0x07, ++0x90, 0xFD, 0x00, 0xE0, 0x54, 0xEF, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0x90, 0xFE, 0x10, 0xE0, 0x54, ++0xFB, 0xF0, 0x22, 0x90, 0x89, 0x19, 0xEF, 0xF0, 0xE4, 0xFF, 0x74, 0x5D, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0x83, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0xA4, 0x12, 0x50, 0xE3, 0x0F, 0xEF, 0xB4, 0x08, 0xEA, ++0x90, 0x83, 0x8D, 0xE0, 0x90, 0x04, 0x4C, 0xF0, 0x75, 0x13, 0x01, 0x75, 0x14, 0x82, 0x75, 0x15, ++0xCC, 0x75, 0x16, 0x08, 0x7B, 0x01, 0x7A, 0x83, 0x79, 0x65, 0x12, 0x2B, 0xED, 0x90, 0x83, 0xF6, ++0xE0, 0x60, 0x22, 0x90, 0x89, 0x19, 0xE0, 0xFF, 0x12, 0x67, 0x44, 0x7E, 0x00, 0x74, 0x00, 0x2F, ++0x12, 0x6F, 0x3F, 0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, 0x83, 0x75, 0x15, 0x5D, 0x75, 0x16, 0x32, ++0xD0, 0x03, 0x12, 0x2B, 0xED, 0x22, 0x90, 0x81, 0xB2, 0xE0, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x0A, ++0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x03, 0x12, 0x5E, 0x6E, 0x90, 0x81, 0xB9, 0xE0, 0x30, 0xE0, ++0x0D, 0x90, 0x81, 0xB3, 0xE0, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x01, ++0x22, 0xEF, 0x90, 0x01, 0xC7, 0xB4, 0xA0, 0x05, 0x74, 0x04, 0xF0, 0x80, 0x03, 0x74, 0x08, 0xF0, ++0x02, 0x5E, 0x6E, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x20, 0xE0, 0x05, 0x90, 0x83, ++0xE5, 0x80, 0x03, 0x90, 0x83, 0xE6, 0xE0, 0x90, 0x83, 0x8E, 0xF0, 0x90, 0x83, 0x8E, 0xE0, 0x14, ++0x60, 0x13, 0x14, 0x60, 0x14, 0x24, 0xFE, 0x60, 0x10, 0x14, 0x60, 0x09, 0x14, 0x60, 0x06, 0x24, ++0x06, 0xE4, 0xFE, 0x80, 0x06, 0x7E, 0x04, 0x80, 0x02, 0x7E, 0x08, 0xAF, 0x06, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x12, 0x66, 0x7A, 0x75, 0x16, 0x70, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xE9, 0x02, 0x2B, ++0xED, 0xEF, 0x60, 0x07, 0x90, 0x83, 0xED, 0xE0, 0xFF, 0xD1, 0x62, 0x22, 0x90, 0x89, 0x8B, 0x12, ++0x44, 0x72, 0x90, 0x89, 0x8E, 0x12, 0x63, 0x4E, 0x75, 0x16, 0x10, 0x7B, 0x01, 0x7A, 0x82, 0x79, ++0x59, 0x12, 0x2B, 0xED, 0x90, 0x89, 0x8B, 0x12, 0x63, 0x4E, 0x75, 0x16, 0x10, 0x7B, 0x01, 0x7A, ++0x82, 0x79, 0x69, 0x12, 0x2B, 0xED, 0x90, 0x89, 0x91, 0x12, 0x44, 0x45, 0x90, 0x82, 0x79, 0x12, ++0x20, 0xCE, 0x90, 0x89, 0x95, 0xE0, 0x90, 0x82, 0x80, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0x90, ++0x89, 0x16, 0xF0, 0x12, 0x1F, 0xA4, 0x90, 0x83, 0xE5, 0x12, 0x57, 0xB6, 0x90, 0x83, 0xE6, 0xF0, ++0x22, 0xF1, 0x59, 0x90, 0x83, 0xE7, 0x12, 0x57, 0xB6, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0xE8, 0x12, ++0x76, 0x8D, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0xE9, 0x12, 0x77, 0x65, 0xFF, 0xED, 0x2F, 0x90, 0x83, ++0xEA, 0x12, 0x6F, 0x31, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0xEB, 0xF1, 0x52, 0xFF, 0xED, 0x2F, 0x90, ++0x83, 0xEC, 0xF1, 0x0E, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x83, 0xED, 0xF0, 0x22, 0xF0, 0x90, ++0x00, 0x06, 0x02, 0x1F, 0xBD, 0xF1, 0x59, 0x90, 0x83, 0xEE, 0x12, 0x57, 0xB6, 0xFF, 0xED, 0x2F, ++0x90, 0x83, 0xEF, 0x12, 0x76, 0x8D, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0xF0, 0x12, 0x77, 0x65, 0xFF, ++0xED, 0x2F, 0x90, 0x83, 0xF1, 0x12, 0x6F, 0x31, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0xF2, 0xF1, 0x52, ++0xFF, 0xED, 0x2F, 0x90, 0x83, 0xF3, 0xF1, 0x0E, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x83, 0xF4, ++0xF0, 0x22, 0xF0, 0x90, 0x00, 0x05, 0x02, 0x1F, 0xBD, 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x1F, ++0xA4, 0xFE, 0xAF, 0x05, 0xED, 0x2E, 0x22, 0xF1, 0x59, 0x90, 0x83, 0xF5, 0x12, 0x57, 0xB6, 0xFF, ++0xAE, 0x05, 0xED, 0x2F, 0x90, 0x83, 0xF6, 0xF0, 0x22, 0xE4, 0xFF, 0x74, 0x18, 0xF1, 0xA3, 0xFE, ++0x74, 0xC0, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xEE, 0xF0, 0x74, 0x10, 0xF1, 0xA3, ++0xFE, 0x74, 0xBA, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xEE, 0xF0, 0x0F, 0xEF, 0xB4, ++0x06, 0xD9, 0x22, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x06, 0xF5, 0x83, 0xE0, 0x22, 0xEF, 0x60, 0x08, ++0x90, 0x83, 0xE8, 0xE0, 0xFF, 0x12, 0x66, 0x12, 0x22, 0xE4, 0xFD, 0xFC, 0xEF, 0x60, 0x26, 0x90, ++0x83, 0xEB, 0x12, 0x90, 0x90, 0xAD, 0x07, 0x74, 0x00, 0x2F, 0x12, 0x6F, 0x3F, 0x90, 0x89, 0x16, ++0x12, 0x44, 0x72, 0x90, 0x89, 0x16, 0x12, 0x63, 0x4E, 0x75, 0x16, 0x42, 0x7B, 0x01, 0x7A, 0x82, ++0x79, 0x81, 0x12, 0x2B, 0xED, 0x22, 0xEF, 0x60, 0x05, 0xF1, 0xEF, 0x12, 0x66, 0x8D, 0x22, 0xE4, ++0xFD, 0xFC, 0x90, 0x83, 0xF1, 0x12, 0x90, 0x90, 0xAD, 0x07, 0xAB, 0x05, 0x74, 0x01, 0x2B, 0x12, ++0x6C, 0x25, 0xE0, 0xFE, 0x74, 0x00, 0x2B, 0x12, 0x6A, 0x52, 0xE0, 0x7A, 0x00, 0x24, 0x00, 0xFF, ++0xEA, 0x3E, 0x90, 0x83, 0x8F, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x03, 0x2B, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x02, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, ++0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x83, 0x91, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x05, 0x2B, 0x12, ++0x6F, 0x73, 0xE0, 0xFE, 0x74, 0x04, 0x2B, 0x12, 0x6F, 0x6B, 0xE0, 0x24, 0x00, 0xFF, 0xEA, 0x3E, ++0x90, 0x83, 0x93, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x07, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0xFE, 0x74, 0x06, 0x2B, 0x12, 0x6F, 0x95, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x83, ++0x95, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x09, 0x2B, 0x12, 0x6F, 0x8C, 0xFE, 0x74, 0x08, 0x2B, 0x12, ++0x6F, 0x7B, 0xE0, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x90, 0x83, 0x97, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, ++0xE0, 0xFF, 0x12, 0x67, 0x44, 0x7C, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x06, 0x31, 0xE0, 0x54, 0xEF, 0x44, 0x08, 0xF0, 0xED, 0x2F, 0xFF, 0xE4, 0x3E, 0xFE, 0x7C, 0x00, ++0xEF, 0x24, 0x08, 0xFF, 0xEC, 0x3E, 0x90, 0x89, 0x2D, 0xF0, 0xA3, 0xEF, 0xF0, 0x7E, 0x00, 0x7F, ++0x83, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0xC3, 0x12, 0x46, 0x4B, 0x90, 0x89, 0x2E, 0xE0, ++0x24, 0x01, 0x12, 0x7E, 0xAF, 0x90, 0x82, 0xC4, 0x31, 0xC6, 0x24, 0x04, 0x12, 0x7E, 0xAF, 0x90, ++0x82, 0xC7, 0x31, 0xC6, 0x24, 0x05, 0x12, 0x7E, 0xAF, 0x90, 0x82, 0xC8, 0x31, 0xC6, 0x24, 0x06, ++0x12, 0x7E, 0xAF, 0x90, 0x82, 0xC9, 0x31, 0xC6, 0x24, 0x07, 0x12, 0x7E, 0xAF, 0x90, 0x82, 0xCA, ++0x31, 0xC6, 0x24, 0x08, 0x12, 0x7E, 0xAF, 0x90, 0x82, 0xCB, 0xEF, 0xF0, 0xE4, 0x90, 0x89, 0x2C, ++0xF0, 0x90, 0x89, 0x2C, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x50, 0x1A, 0x90, 0x89, 0x2E, 0xE0, 0x24, ++0x09, 0xFD, 0x90, 0x89, 0x2D, 0xE0, 0x12, 0x7D, 0xE1, 0x90, 0x89, 0x2C, 0xE0, 0x12, 0x6E, 0x7C, ++0x31, 0xCD, 0xF0, 0x80, 0xDC, 0xE4, 0x90, 0x89, 0x2C, 0xF0, 0x90, 0x89, 0x2C, 0xE0, 0xFF, 0xC3, ++0x94, 0x20, 0x50, 0x20, 0x90, 0x89, 0x2E, 0xE0, 0x24, 0x63, 0xFD, 0x90, 0x89, 0x2D, 0xE0, 0x12, ++0x7D, 0xE1, 0x90, 0x89, 0x2C, 0xE0, 0x24, 0x26, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xF5, 0x83, 0x31, ++0xCD, 0xF0, 0x80, 0xD6, 0x90, 0x82, 0xC8, 0x51, 0xCC, 0x90, 0x89, 0x2A, 0xEE, 0xF0, 0xA3, 0xEF, ++0xF0, 0x30, 0xE3, 0x0D, 0x7F, 0x01, 0x12, 0x5B, 0x63, 0x90, 0x01, 0xC7, 0x74, 0x03, 0xF0, 0x80, ++0x3E, 0x90, 0x89, 0x2A, 0xA3, 0xE0, 0xFF, 0x7C, 0x00, 0x54, 0x07, 0xFD, 0x64, 0x01, 0x60, 0x05, ++0xED, 0x64, 0x02, 0x70, 0x2A, 0xED, 0x64, 0x02, 0x4C, 0x70, 0x24, 0xEF, 0x54, 0x30, 0xFF, 0xE4, ++0xC4, 0xF8, 0x54, 0xF0, 0xC8, 0xEF, 0xC4, 0x54, 0x0F, 0x48, 0x90, 0x83, 0x5C, 0xF0, 0xAE, 0x04, ++0xAF, 0x05, 0xE4, 0xFD, 0x31, 0xD5, 0x90, 0x06, 0x31, 0xE0, 0x54, 0xF7, 0x44, 0x10, 0xF0, 0x7F, ++0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0xF0, 0x90, 0x89, 0x2E, 0xE0, 0x22, 0xEF, 0xF0, 0x90, ++0x89, 0x2C, 0xE0, 0x04, 0x22, 0x90, 0x89, 0x31, 0xED, 0xF0, 0x90, 0x89, 0x2F, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0x31, 0xF2, 0x90, 0x89, 0x2F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x02, ++0x67, 0xED, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x83, 0xE6, 0xE0, 0xFD, 0xB4, 0x02, ++0x07, 0x51, 0xC4, 0x74, 0x08, 0xF0, 0x80, 0x09, 0xED, 0xB4, 0x04, 0x05, 0x51, 0xC4, 0x74, 0x10, ++0xF0, 0xEF, 0x64, 0x02, 0x4E, 0x60, 0x02, 0x41, 0xBF, 0x90, 0x82, 0xC4, 0xE0, 0xFF, 0x64, 0xFE, ++0x70, 0x02, 0x41, 0xBF, 0xEF, 0x64, 0x02, 0x60, 0x07, 0xEF, 0x64, 0x03, 0x60, 0x02, 0x41, 0xBF, ++0x90, 0x83, 0x24, 0x51, 0xCC, 0x90, 0x89, 0x65, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7E, 0x00, 0x7F, ++0x20, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x43, 0x12, 0x46, 0x4B, 0x7B, 0x01, 0x7A, 0x83, ++0x79, 0x26, 0x90, 0x86, 0x67, 0x12, 0x44, 0x72, 0x7A, 0x89, 0x79, 0x43, 0x90, 0x86, 0x6A, 0x12, ++0x44, 0x72, 0x7A, 0x82, 0x79, 0x93, 0x7D, 0x03, 0x12, 0x02, 0x00, 0x75, 0x13, 0x01, 0x75, 0x14, ++0x89, 0x75, 0x15, 0x4B, 0x75, 0x16, 0x10, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x32, 0x12, 0x2B, 0xED, ++0x90, 0x89, 0x49, 0xE0, 0x54, 0x03, 0x90, 0x89, 0x42, 0xF0, 0xC3, 0x94, 0x04, 0x50, 0x1C, 0xE0, ++0x90, 0x83, 0x8D, 0xF0, 0x75, 0x13, 0x01, 0x75, 0x14, 0x89, 0x75, 0x15, 0x32, 0x75, 0x16, 0x10, ++0x7B, 0x01, 0x7A, 0x83, 0x79, 0x6D, 0x12, 0x2B, 0xED, 0x80, 0x06, 0x90, 0x83, 0x8D, 0x74, 0x05, ++0xF0, 0x90, 0x89, 0x42, 0xE0, 0xFF, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0x32, 0x12, 0x76, 0xC8, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x89, 0x63, 0x74, 0x80, 0xF0, 0xA3, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFD, 0xED, 0xFF, 0x22, 0x90, 0x84, 0x2B, 0x12, 0x77, 0xDA, 0x90, 0x84, 0x30, 0x12, 0x57, 0xB6, ++0x90, 0x84, 0x31, 0x12, 0x6F, 0x31, 0x90, 0x84, 0x32, 0x12, 0x8F, 0x52, 0x90, 0x84, 0x33, 0x12, ++0x8F, 0x0E, 0x90, 0x84, 0x34, 0xF0, 0x90, 0x00, 0x07, 0x12, 0x1F, 0xBD, 0x90, 0x84, 0x35, 0x12, ++0x77, 0x65, 0x90, 0x84, 0x38, 0xF0, 0xED, 0x70, 0x19, 0xFF, 0x71, 0xA4, 0xE0, 0xB4, 0xFF, 0x06, ++0x71, 0xA4, 0xE4, 0xF0, 0x80, 0x07, 0x71, 0xA4, 0xE0, 0x04, 0xF0, 0x80, 0x05, 0x0F, 0xEF, 0xB4, ++0x06, 0xE8, 0x90, 0x84, 0x2F, 0xE0, 0xFF, 0xB4, 0x04, 0x18, 0xA3, 0xE0, 0xFE, 0x71, 0x9E, 0xEE, ++0x71, 0xAF, 0xFE, 0x71, 0x9E, 0x90, 0x00, 0x01, 0xEE, 0x12, 0x1F, 0xFC, 0x90, 0x00, 0x02, 0xE4, ++0x80, 0x1C, 0xEF, 0xB4, 0x02, 0x1B, 0x90, 0x84, 0x31, 0xE0, 0x71, 0x9D, 0xEF, 0x71, 0xAF, 0x44, ++0x20, 0x54, 0x7F, 0x71, 0x9D, 0x71, 0xB7, 0x90, 0x84, 0x30, 0xE0, 0x90, 0x00, 0x02, 0x12, 0x1F, ++0xFC, 0x71, 0x9E, 0xE9, 0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x1F, 0xA4, 0x44, 0x20, 0x12, ++0x1F, 0xEA, 0x90, 0x84, 0x32, 0xE0, 0x71, 0x9D, 0x90, 0x00, 0x04, 0xEF, 0x12, 0x1F, 0xFC, 0x90, ++0x84, 0x33, 0xE0, 0x90, 0x00, 0x05, 0x12, 0x1F, 0xFC, 0x90, 0x84, 0x34, 0xE0, 0x90, 0x00, 0x06, ++0x12, 0x1F, 0xFC, 0x90, 0x84, 0x35, 0xE0, 0x90, 0x00, 0x07, 0x02, 0x1F, 0xFC, 0xFF, 0x90, 0x84, ++0x2B, 0x02, 0x44, 0x69, 0x74, 0x30, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5, 0x83, 0x22, 0x12, ++0x1F, 0xEA, 0x90, 0x84, 0x31, 0xE0, 0x22, 0x90, 0x00, 0x01, 0xEF, 0x02, 0x1F, 0xFC, 0x90, 0x84, ++0x53, 0xED, 0xF0, 0x90, 0x84, 0x50, 0x12, 0x44, 0x72, 0x12, 0x77, 0x66, 0x90, 0x84, 0x57, 0xF0, ++0x90, 0x84, 0x50, 0x12, 0x63, 0x4E, 0x75, 0x16, 0x03, 0x7B, 0x01, 0x7A, 0x84, 0x79, 0x54, 0x12, ++0x2B, 0xED, 0x90, 0x84, 0x53, 0xE0, 0x70, 0x2E, 0xFF, 0x91, 0x17, 0xE0, 0xB4, 0xFF, 0x06, 0x91, ++0x17, 0xE4, 0xF0, 0x80, 0x07, 0x91, 0x17, 0xE0, 0x04, 0xF0, 0x80, 0x05, 0x0F, 0xEF, 0xB4, 0x03, ++0xE8, 0x75, 0x13, 0x01, 0x75, 0x14, 0x84, 0x75, 0x15, 0x54, 0x75, 0x16, 0x03, 0x90, 0x84, 0x50, ++0x12, 0x44, 0x69, 0x12, 0x2B, 0xED, 0x22, 0x74, 0x54, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5, ++0x83, 0x22, 0x74, 0x10, 0x2F, 0xF9, 0xE4, 0x34, 0xFB, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0x7B, 0x01, ++0x7A, 0x83, 0x79, 0x9B, 0x12, 0x87, 0xD0, 0xEF, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0xAD, ++0x07, 0xAB, 0x05, 0x74, 0x17, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0xFE, 0x74, ++0x16, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0x12, 0x6F, 0xC4, 0xFE, 0x90, 0x83, 0x9F, 0xE0, 0x6E, ++0x70, 0x03, 0xA3, 0xE0, 0x6F, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0xE4, 0x90, 0x8A, 0x23, ++0xF0, 0x90, 0x89, 0xD9, 0x12, 0x44, 0x69, 0x90, 0x8A, 0x21, 0xE0, 0xFE, 0xA3, 0xE0, 0x29, 0xF9, ++0xEA, 0x3E, 0xFA, 0xE9, 0x24, 0xC0, 0xF9, 0xEA, 0x34, 0xFF, 0xFA, 0x74, 0x88, 0xFD, 0x12, 0x28, ++0x08, 0x90, 0x89, 0xD9, 0x12, 0x44, 0x69, 0x90, 0x8A, 0x21, 0xE0, 0xFE, 0xA3, 0xE0, 0x29, 0xF9, ++0xEA, 0x3E, 0xFA, 0xE9, 0x24, 0xC4, 0xF9, 0xEA, 0x34, 0xFF, 0xFA, 0xA3, 0xE0, 0x44, 0x89, 0xFD, ++0x12, 0x28, 0x08, 0x90, 0x89, 0xD9, 0x12, 0x44, 0x69, 0x90, 0x8A, 0x21, 0xE0, 0xFE, 0xA3, 0xE0, ++0x29, 0xF9, 0xEA, 0x3E, 0xFA, 0xE9, 0x24, 0xC8, 0xF9, 0xEA, 0x34, 0xFF, 0xFA, 0xA3, 0xE0, 0x44, ++0x8A, 0xFD, 0x12, 0x28, 0x08, 0x90, 0x89, 0xD9, 0x12, 0x44, 0x69, 0x90, 0x8A, 0x21, 0xE0, 0xFE, ++0xA3, 0xE0, 0x29, 0xF9, 0xEA, 0x3E, 0xFA, 0xE9, 0x22, 0x90, 0x89, 0xDD, 0x12, 0x44, 0x69, 0xE9, ++0x24, 0x10, 0xF9, 0xE4, 0x3A, 0xFA, 0x7D, 0x80, 0x12, 0x2A, 0x8F, 0x90, 0x89, 0xDD, 0x12, 0x44, ++0x69, 0xE9, 0x24, 0x0C, 0xF9, 0xE4, 0x3A, 0xFA, 0x7D, 0x81, 0x12, 0x2A, 0x8F, 0x90, 0x89, 0xDD, ++0x12, 0x44, 0x69, 0xE9, 0x24, 0x08, 0xF9, 0xE4, 0x3A, 0xFA, 0x7D, 0x82, 0x12, 0x2A, 0x8F, 0x90, ++0x89, 0xDD, 0x12, 0x44, 0x69, 0xE9, 0x24, 0x04, 0xF9, 0xE4, 0x3A, 0xFA, 0x7D, 0x83, 0x12, 0x2A, ++0x8F, 0x90, 0x89, 0xDD, 0x02, 0x44, 0x69, 0xA3, 0x74, 0x40, 0xF0, 0x74, 0xE1, 0x2F, 0xF9, 0xE4, ++0x34, 0x89, 0xFA, 0x7B, 0x01, 0x74, 0x40, 0x44, 0x88, 0xFD, 0x12, 0x28, 0x08, 0x90, 0x8A, 0x21, ++0xA3, 0xE0, 0x24, 0xE5, 0xF9, 0xE4, 0x34, 0x89, 0xFA, 0x7B, 0x01, 0xA3, 0xE0, 0x44, 0x89, 0xFD, ++0x12, 0x28, 0x08, 0x90, 0x8A, 0x21, 0xA3, 0xE0, 0x24, 0xE9, 0xF9, 0xE4, 0x34, 0x89, 0xFA, 0x7B, ++0x01, 0xA3, 0xE0, 0x44, 0x8A, 0xFD, 0x12, 0x28, 0x08, 0x90, 0x8A, 0x21, 0xA3, 0xE0, 0x22, 0x12, ++0x44, 0x51, 0x90, 0x81, 0x9B, 0x12, 0x44, 0x45, 0x12, 0x44, 0x19, 0x78, 0x0A, 0x12, 0x20, 0xA8, ++0x90, 0x81, 0x64, 0xE0, 0xFE, 0xC3, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x22, 0x74, 0x6A, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x89, 0x04, 0xE0, 0x2F, 0xF0, 0x90, 0x81, ++0xA7, 0xE0, 0xFF, 0x22, 0xA3, 0xE0, 0x44, 0x8B, 0xFD, 0x12, 0x28, 0x08, 0x90, 0x8A, 0x23, 0xE0, ++0x44, 0x90, 0x90, 0x01, 0x8C, 0xF0, 0x22, 0x12, 0x44, 0x27, 0x90, 0x81, 0x9F, 0x12, 0x20, 0xCE, ++0x90, 0x81, 0x48, 0xE0, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x22, 0x90, ++0x89, 0xD8, 0xE0, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x89, 0x79, 0xE1, 0x12, 0x2B, 0xED, 0xE4, 0x22, ++0xF0, 0x90, 0x81, 0x58, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x24, 0x28, 0xF9, 0xE4, 0x34, ++0xFC, 0xFA, 0x7B, 0x01, 0x22, 0x12, 0x1F, 0xFC, 0xE4, 0x90, 0x8A, 0x21, 0xF0, 0xA3, 0x22, 0xF0, ++0x90, 0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0x22, 0x90, 0x81, 0xB0, 0xE0, 0xC4, 0x13, 0x22, ++0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x81, 0x4E, 0xE0, 0x22, 0xE4, 0xF0, 0x90, 0x8A, 0x24, 0xE0, ++0x04, 0xF0, 0x22, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x4D, 0xFF, 0x22, 0x54, 0x04, 0xFD, 0xEF, ++0x54, 0xFB, 0x4D, 0xFF, 0x22, 0x90, 0x8A, 0x22, 0xE0, 0x54, 0x3F, 0x64, 0x30, 0x22, 0x90, 0x8A, ++0x21, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x8A, 0x24, 0xE0, 0xFF, 0xC3, 0x94, 0x40, 0x22, ++0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, 0x7B, 0x01, 0x22, 0xF0, 0xEE, 0x54, 0x80, 0xFE, 0xEF, 0x54, ++0x7F, 0x22, 0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x22, 0x7F, 0x7C, 0x7E, 0x08, 0x12, ++0x2D, 0x5C, 0xEC, 0x22, 0x90, 0x81, 0x3B, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xE0, 0xFF, 0xF5, 0x82, ++0x75, 0x83, 0x00, 0x22, 0x90, 0x89, 0x12, 0xE0, 0xFC, 0xA3, 0xE0, 0x22, 0x90, 0x81, 0x4A, 0xE0, ++0xC4, 0x54, 0x0F, 0x22, 0x90, 0x81, 0x50, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE4, 0xA3, 0xF0, 0x22, 0x7F, 0x70, 0x7E, 0x0E, 0x02, 0x2E, 0xA2, 0x00, 0x71, 0x07, ++}; ++u4Byte ArrayLength_MP_8188E_S_FW_WoWLAN = 22238; ++ ++ ++void ++ODM_ReadFirmware_MP_8188E_S_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188E_S_FW_WoWLAN; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188E_S_FW_WoWLAN, ArrayLength_MP_8188E_S_FW_WoWLAN); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188E_S_FW_WoWLAN; ++} ++ ++ ++ ++#endif /* end of (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))*/ ++ ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_s_fw.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_s_fw.h +new file mode 100644 +index 0000000..2f6a65a +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_s_fw.h +@@ -0,0 +1,62 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.7*/ ++#if (RTL8188E_S_SUPPORT == 1) ++#ifndef __INC_MP_FW_HW_IMG_8188E_S_H ++#define __INC_MP_FW_HW_IMG_8188E_S_H ++ ++ ++/****************************************************************************** ++* FW_AP.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188E_S_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_NIC.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188E_S_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_WoWLAN.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188E_S_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_t_fw.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_t_fw.c +new file mode 100644 +index 0000000..ebd60f3 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_t_fw.c +@@ -0,0 +1,3956 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.7*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188E_T_SUPPORT == 1) ++#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) ++ ++ ++u1Byte Array_MP_8188E_T_FW_AP[] = { ++0xE1, 0x88, 0x20, 0x00, 0x16, 0x00, 0x00, 0x00, 0x03, 0x03, 0x11, 0x58, 0xDA, 0x3A, 0x00, 0x00, ++0x28, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x45, 0x3E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xC1, 0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xA1, 0xEA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE1, 0xF6, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x41, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x45, 0xE4, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x45, 0xE4, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x41, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x41, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x41, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xE7, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, ++0x46, 0xE7, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x3E, 0x88, 0x82, 0x8C, 0x83, 0xE7, 0x09, 0xF0, ++0xA3, 0xDF, 0xFA, 0x80, 0x32, 0xE3, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x78, 0xE3, 0x09, 0xF2, ++0x08, 0xDF, 0xFA, 0x80, 0x70, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, ++0x64, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x58, 0x89, 0x82, 0x8A, ++0x83, 0xE0, 0xA3, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x4C, 0x80, 0xD2, 0x80, 0xFA, 0x80, 0xC6, 0x80, ++0xD4, 0x80, 0x69, 0x80, 0xF2, 0x80, 0x33, 0x80, 0x10, 0x80, 0xA6, 0x80, 0xEA, 0x80, 0x9A, 0x80, ++0xA8, 0x80, 0xDA, 0x80, 0xE2, 0x80, 0xCA, 0x80, 0x33, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, ++0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, ++0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0x0D, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, ++0xA3, 0xF6, 0x08, 0xDF, 0xF9, 0xEC, 0xFA, 0xA9, 0xF0, 0xED, 0xFB, 0x22, 0x89, 0x82, 0x8A, 0x83, ++0xEC, 0xFA, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xEA, 0xDE, 0xE8, 0x80, 0xDB, 0x89, 0x82, 0x8A, 0x83, ++0xE4, 0x93, 0xA3, 0xF2, 0x08, 0xDF, 0xF9, 0x80, 0xCC, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, ++0x60, 0xC3, 0x88, 0xF0, 0xED, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0xB9, 0xF5, 0x82, 0xEB, 0x24, ++0x02, 0xB4, 0x04, 0x00, 0x50, 0xAF, 0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x43, 0xF9, 0x73, 0xC5, ++0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, 0x02, 0x15, ++0x83, 0xE0, 0x38, 0xF0, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, ++0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xA4, 0x25, ++0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, ++0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, ++0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, ++0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, ++0x80, 0xDF, 0xEF, 0x4E, 0x60, 0x12, 0xEF, 0x60, 0x01, 0x0E, 0xED, 0xBB, 0x01, 0x0B, 0x89, 0x82, ++0x8A, 0x83, 0xF0, 0xA3, 0xDF, 0xFC, 0xDE, 0xFA, 0x22, 0x89, 0xF0, 0x50, 0x07, 0xF7, 0x09, 0xDF, ++0xFC, 0xA9, 0xF0, 0x22, 0xBB, 0xFE, 0xFC, 0xF3, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0x02, 0x45, ++0x7C, 0x02, 0x41, 0xDD, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, ++0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, ++0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, ++0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x45, 0xC1, 0xE4, ++0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, ++0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, ++0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, ++0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, ++0xBE, 0x41, 0x82, 0xDB, 0x00, 0x41, 0x82, 0xDC, 0x00, 0x41, 0x82, 0xE9, 0x00, 0x41, 0x82, 0xEC, ++0x00, 0x44, 0x82, 0xAF, 0x41, 0x4E, 0x59, 0x00, 0x44, 0x82, 0xAB, 0x61, 0x6E, 0x79, 0x00, 0x41, ++0x82, 0xED, 0x00, 0x00, 0x57, 0xF0, 0x58, 0xF1, 0x5F, 0xE3, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, ++0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xEA, 0xF0, 0x74, 0x45, 0xA3, ++0xF0, 0xD1, 0x5B, 0xE5, 0x3C, 0x30, 0xE7, 0x02, 0xD1, 0x40, 0x74, 0xEA, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x45, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0x7F, 0x01, 0x7E, 0x00, 0x12, 0x32, 0x06, 0x90, 0x00, 0xF2, 0xE0, 0x20, 0xE6, 0x0C, 0x90, 0x00, ++0x05, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x05, 0x12, 0x32, 0x1E, 0x22, 0x90, 0x00, 0x54, 0xE0, 0x55, ++0x35, 0xF5, 0x39, 0xA3, 0xE0, 0x55, 0x36, 0xF5, 0x3A, 0xA3, 0xE0, 0x55, 0x37, 0xF5, 0x3B, 0xA3, ++0xE0, 0x55, 0x38, 0xF5, 0x3C, 0xAD, 0x39, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0xAD, 0x3A, 0x7F, 0x55, ++0x12, 0x32, 0x1E, 0xAD, 0x3B, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0xAD, 0x3C, 0x7F, 0x57, 0x12, 0x32, ++0x1E, 0x53, 0x91, 0xEF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x95, 0xF0, 0x74, 0x46, 0xA3, 0xF0, 0x12, 0x6F, 0x85, 0xE5, ++0x41, 0x30, 0xE3, 0x02, 0xF1, 0x65, 0xE5, 0x41, 0x30, 0xE4, 0x02, 0xF1, 0x40, 0xE5, 0x43, 0x30, ++0xE0, 0x02, 0xF1, 0x71, 0xE5, 0x43, 0x30, 0xE1, 0x03, 0x12, 0x6C, 0x7D, 0xE5, 0x43, 0x30, 0xE2, ++0x03, 0x12, 0x6D, 0xCD, 0xE5, 0x43, 0x30, 0xE3, 0x03, 0x12, 0x4D, 0x05, 0xE5, 0x43, 0x30, 0xE4, ++0x03, 0x12, 0x6D, 0x8D, 0xE5, 0x43, 0x30, 0xE5, 0x03, 0x12, 0x70, 0x1E, 0xE5, 0x43, 0x30, 0xE6, ++0x03, 0x12, 0x59, 0x3A, 0xE5, 0x43, 0x30, 0xE7, 0x03, 0x12, 0x70, 0x3A, 0xE5, 0x44, 0x30, 0xE0, ++0x02, 0xF1, 0x53, 0xE5, 0x44, 0x30, 0xE1, 0x02, 0xF1, 0x5C, 0x74, 0x95, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x46, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0x12, 0x60, 0xC9, 0x7F, 0x02, 0x8F, 0x0D, 0x7F, 0x02, 0x71, 0x27, 0x90, 0x80, 0x01, 0xE0, 0x45, ++0x0D, 0xF0, 0x22, 0xF1, 0xEE, 0xBF, 0x03, 0x03, 0x12, 0x70, 0x4A, 0x22, 0x90, 0x81, 0x6F, 0xE0, ++0x60, 0x02, 0xF1, 0xB3, 0x22, 0x90, 0x81, 0x3D, 0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x20, 0xF1, 0x45, ++0x22, 0x12, 0x49, 0x63, 0x90, 0x81, 0x3D, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x54, 0x83, 0x90, 0x81, ++0xD3, 0xE0, 0x30, 0xE0, 0x18, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0xFD, 0xFF, 0xF1, 0xA8, 0x12, 0x6D, ++0x6E, 0x30, 0xE0, 0x07, 0x7D, 0x0C, 0x7F, 0x01, 0x12, 0x4B, 0xCE, 0xF1, 0xE6, 0x22, 0xE4, 0xFD, ++0x7F, 0x0C, 0x12, 0x49, 0xDA, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, 0x80, 0x05, ++0xED, 0xF0, 0x22, 0x90, 0x81, 0x6F, 0xE0, 0x64, 0x01, 0x70, 0x12, 0xF1, 0xDF, 0x60, 0x05, 0xF1, ++0x9E, 0x02, 0x5B, 0x86, 0x90, 0x81, 0x72, 0xE0, 0x70, 0x03, 0x12, 0x49, 0xD6, 0x22, 0x12, 0x5B, ++0x86, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x0C, 0x60, 0x05, 0xF1, 0x9E, 0x12, 0x5D, 0x9F, 0x22, 0x90, ++0x81, 0x6D, 0xE0, 0x54, 0x0F, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x01, ++0x02, 0xE0, 0x54, 0x03, 0xFF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, ++0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xF6, 0xF0, 0x74, 0x47, 0xA3, 0xF0, 0x12, 0x6F, 0xB2, ++0xE5, 0x49, 0x30, 0xE1, 0x02, 0x11, 0x96, 0xE5, 0x49, 0x30, 0xE2, 0x03, 0x12, 0x59, 0xAE, 0xE5, ++0x49, 0x30, 0xE3, 0x03, 0x12, 0x57, 0xAE, 0xE5, 0x4A, 0x30, 0xE0, 0x03, 0x12, 0x69, 0xCC, 0xE5, ++0x4B, 0x30, 0xE5, 0x03, 0x12, 0x55, 0xA0, 0xE5, 0x4C, 0x30, 0xE1, 0x05, 0x7F, 0x04, 0x12, 0x47, ++0x45, 0xE5, 0x4C, 0x30, 0xE4, 0x02, 0x11, 0x8E, 0xE5, 0x4C, 0x30, 0xE5, 0x03, 0x12, 0x5C, 0xA8, ++0xE5, 0x4C, 0x30, 0xE6, 0x03, 0x12, 0x5C, 0x2D, 0x74, 0xF6, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, ++0x47, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x91, 0x6C, ++0x7D, 0x02, 0x7F, 0x02, 0xE1, 0x83, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x02, 0xB1, 0x15, 0x90, 0x81, ++0xD3, 0xE0, 0x30, 0xE0, 0x47, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x19, 0xE4, 0xF5, 0x1D, 0x90, ++0x81, 0xD5, 0x11, 0xF4, 0xD1, 0x19, 0x12, 0x6D, 0x6E, 0x30, 0xE0, 0x06, 0x7D, 0x0C, 0x7F, 0x01, ++0x71, 0xCE, 0x02, 0x47, 0xE6, 0x90, 0x81, 0xD3, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1C, ++0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xD6, 0x11, 0xF4, 0x12, 0x7A, 0xD0, 0xE0, 0xC3, 0x13, 0x30, 0xE0, ++0x06, 0x7D, 0x04, 0x7F, 0x01, 0x61, 0xCE, 0x7D, 0x31, 0x12, 0x66, 0x61, 0x22, 0xF0, 0xE4, 0xF5, ++0x1D, 0x90, 0x81, 0xCD, 0xE0, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, 0x19, 0x8F, 0x1A, 0xE5, 0x1E, 0x31, 0x53, 0x85, 0x19, 0x83, ++0x85, 0x1A, 0x82, 0xF0, 0xE5, 0x1D, 0x31, 0x53, 0xFF, 0xE5, 0x1E, 0x13, 0x13, 0x13, 0x54, 0x1F, ++0x4F, 0xA3, 0xF0, 0xEB, 0x31, 0x53, 0xFF, 0xE5, 0x1D, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0x31, ++0x5A, 0xF0, 0xBD, 0x01, 0x0D, 0x85, 0x1A, 0x82, 0x8E, 0x83, 0xA3, 0xA3, 0xA3, 0x74, 0x03, 0xF0, ++0x80, 0x06, 0x31, 0x5A, 0xA3, 0x74, 0x01, 0xF0, 0x31, 0x5A, 0xA3, 0x74, 0x05, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x54, 0x07, 0xC4, 0x33, 0x54, 0xE0, 0x22, 0x85, 0x1A, 0x82, 0x85, 0x19, 0x83, ++0xA3, 0xA3, 0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x69, 0x91, 0xA1, 0x70, 0x65, ++0x12, 0x6C, 0x50, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, 0x81, 0x76, 0xE0, ++0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x81, 0x78, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, 0x90, ++0x81, 0x75, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x4E, 0x01, 0xE5, 0x4E, 0x60, 0x37, 0xF1, 0xE9, ++0x90, 0x81, 0x78, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x11, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x78, ++0xE0, 0x91, 0x65, 0x11, 0xF5, 0x90, 0x81, 0x78, 0xE0, 0x80, 0x0B, 0xE4, 0xF5, 0x1D, 0xF1, 0x9A, ++0x91, 0x65, 0x11, 0xF5, 0xF1, 0x9A, 0x91, 0x65, 0x90, 0x81, 0x88, 0xF0, 0x90, 0x81, 0x72, 0xE0, ++0x20, 0xE2, 0x02, 0x31, 0xD6, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x82, 0xE8, 0xED, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x30, 0xE0, 0x02, 0x61, 0x20, 0xEE, 0x12, 0x5C, 0x26, 0x30, 0xE0, 0x02, 0x61, 0x20, 0x90, 0x81, ++0x72, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0x61, 0x20, 0xEF, 0x70, 0x02, 0x41, 0x96, 0x24, 0xFE, 0x70, ++0x02, 0x41, 0xCF, 0x24, 0xFE, 0x60, 0x47, 0x24, 0xFC, 0x70, 0x02, 0x61, 0x0A, 0x24, 0xFC, 0x60, ++0x02, 0x61, 0x1A, 0xEE, 0xB4, 0x0E, 0x02, 0x71, 0x7D, 0x90, 0x81, 0x72, 0xE0, 0x70, 0x04, 0x7F, ++0x01, 0x71, 0xBB, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x06, 0x02, 0x71, 0x99, 0x90, 0x81, 0x72, 0xE0, ++0xB4, 0x04, 0x0D, 0x90, 0x82, 0xE8, 0xE0, 0xFF, 0x60, 0x04, 0x91, 0xCF, 0x80, 0x02, 0xD1, 0x82, ++0x90, 0x81, 0x72, 0xE0, 0x64, 0x08, 0x60, 0x02, 0x61, 0x1A, 0xD1, 0x1F, 0x61, 0x1A, 0x90, 0x81, ++0x72, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x71, 0xBB, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x06, 0x02, 0x71, ++0x99, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0E, 0x07, 0x71, 0x25, 0xBF, 0x01, 0x02, 0x71, 0x7D, 0x90, ++0x81, 0x72, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0x61, 0x1A, 0x71, 0x25, 0xEF, 0x64, 0x01, 0x60, 0x02, ++0x61, 0x1A, 0x91, 0x36, 0x61, 0x1A, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0E, 0x07, 0x71, 0x25, 0xBF, ++0x01, 0x02, 0x71, 0x7D, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x06, 0x02, 0x71, 0x99, 0x90, 0x81, 0x72, ++0xE0, 0xB4, 0x0C, 0x07, 0x71, 0x25, 0xBF, 0x01, 0x02, 0x91, 0x36, 0x90, 0x81, 0x72, 0xE0, 0x64, ++0x04, 0x70, 0x57, 0x12, 0x70, 0xEB, 0xEF, 0x64, 0x01, 0x70, 0x4F, 0xF1, 0xA5, 0x80, 0x4B, 0x90, ++0x81, 0x72, 0xE0, 0xB4, 0x0E, 0x07, 0x71, 0x25, 0xBF, 0x01, 0x02, 0x71, 0x7D, 0x90, 0x81, 0x72, ++0xE0, 0xB4, 0x06, 0x02, 0x71, 0x99, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0C, 0x07, 0x71, 0x25, 0xBF, ++0x01, 0x02, 0x91, 0x36, 0x90, 0x81, 0x72, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x71, 0xBB, 0x90, 0x81, ++0x72, 0xE0, 0xB4, 0x04, 0x15, 0x12, 0x71, 0xB0, 0x80, 0x10, 0x90, 0x81, 0x72, 0xE0, 0xB4, 0x0C, ++0x09, 0x12, 0x6D, 0x64, 0x30, 0xE0, 0x03, 0x12, 0x67, 0x5B, 0x90, 0x81, 0x72, 0x12, 0x6D, 0xBF, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x70, 0xD2, 0xEF, ++0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, 0x01, 0x80, 0x31, 0x12, 0x6D, 0x78, 0x30, 0xE0, 0x05, 0x75, ++0x0E, 0x02, 0x80, 0x26, 0x90, 0x81, 0x71, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, ++0x80, 0x18, 0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, ++0x75, 0x0E, 0x11, 0x80, 0x05, 0x12, 0x71, 0x62, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, ++0x90, 0x01, 0xB8, 0xE5, 0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x6B, ++0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0x7D, 0x0C, 0x80, 0x05, 0x12, 0x72, 0x2C, 0x7D, 0x04, 0x7F, ++0x01, 0x71, 0xCE, 0xE4, 0xFD, 0xFF, 0x02, 0x47, 0xA8, 0x90, 0x81, 0x6B, 0xE0, 0x90, 0x06, 0x04, ++0x20, 0xE0, 0x08, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x04, 0x80, 0x06, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, ++0x0C, 0x7F, 0x01, 0x71, 0xCE, 0xE4, 0xFD, 0xFF, 0x02, 0x47, 0xA8, 0x90, 0x82, 0xE7, 0xEF, 0xF0, ++0xD1, 0x27, 0x90, 0x82, 0xE7, 0xE0, 0x60, 0x02, 0xD1, 0x19, 0x7D, 0x04, 0x7F, 0x01, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0xEF, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, ++0x70, 0x1A, 0xED, 0x54, 0x01, 0xFE, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0x80, 0x0C, ++0x90, 0x81, 0x72, 0xED, 0xF0, 0x80, 0x05, 0x90, 0x81, 0x71, 0xED, 0xF0, 0x90, 0x00, 0x8F, 0xE0, ++0x30, 0xE4, 0x2E, 0xEC, 0x14, 0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, 0x23, 0x90, 0x81, ++0x6A, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0x81, 0x72, 0xE0, 0x54, ++0x7F, 0x4F, 0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, 0x81, 0x71, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x32, ++0x1E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x91, 0xA1, 0x70, 0x2A, 0x90, 0x81, 0x6B, 0xE0, 0x54, 0xFD, ++0xF0, 0x7D, 0x2C, 0x7F, 0x6F, 0x12, 0x47, 0xA8, 0x7D, 0x08, 0x7F, 0x01, 0x12, 0x5D, 0xA3, 0xBF, ++0x01, 0x0D, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0x7F, 0x01, 0x61, 0xCE, 0x12, ++0x5F, 0xA3, 0x04, 0xF0, 0x22, 0xFF, 0x90, 0x81, 0x77, 0xE0, 0x2F, 0x22, 0xE4, 0x90, 0x81, 0xEE, ++0xF0, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x29, 0x91, 0xA1, 0x70, 0x25, 0x12, 0x6D, 0x43, 0xF0, 0x90, ++0x81, 0xEE, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x76, 0xF0, 0x04, 0x60, 0x13, 0xF1, 0xE9, 0xE4, ++0xF5, 0x1D, 0x90, 0x81, 0x77, 0x11, 0xF4, 0x90, 0x81, 0x72, 0xE0, 0x20, 0xE2, 0x02, 0x31, 0xD6, ++0x22, 0xE4, 0xFF, 0x91, 0xA9, 0xEF, 0x64, 0x01, 0x22, 0x12, 0x7A, 0xBB, 0x74, 0x60, 0x2E, 0x12, ++0x63, 0xA5, 0xFD, 0x7C, 0x00, 0x12, 0x63, 0x4A, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0xEF, ++0x60, 0x32, 0x91, 0xA1, 0x70, 0x2E, 0x90, 0x81, 0x6B, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, ++0x0F, 0x12, 0x47, 0xA8, 0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x5D, 0x9F, 0xBF, 0x01, ++0x0D, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x61, 0xCE, 0x12, 0x5F, ++0xA3, 0x74, 0x08, 0xF0, 0x22, 0x91, 0xA1, 0x70, 0x0B, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x05, 0x12, ++0x6D, 0x82, 0x11, 0xED, 0x22, 0x12, 0x6D, 0xB4, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, ++0x03, 0x30, 0xE0, 0x02, 0xF1, 0x6B, 0x90, 0x81, 0x6A, 0x12, 0x6D, 0x67, 0x30, 0xE0, 0x0A, 0xEF, ++0x12, 0x6D, 0xA9, 0x54, 0x07, 0x70, 0x48, 0x80, 0x43, 0x90, 0x81, 0x78, 0xE0, 0x04, 0xF0, 0x90, ++0x81, 0x73, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x81, 0xCC, 0xE0, 0xFF, 0x90, 0x81, 0x78, 0xE0, 0xD3, ++0x9F, 0x40, 0x29, 0x91, 0xA1, 0x70, 0x28, 0x12, 0x47, 0xDF, 0x70, 0x02, 0xE1, 0x63, 0x90, 0x81, ++0x79, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0xF1, 0x63, 0xE4, 0x90, 0x81, 0x79, ++0xF0, 0x80, 0x03, 0x12, 0x47, 0xCE, 0xE4, 0x90, 0x81, 0x78, 0xF0, 0x22, 0x12, 0x59, 0x30, 0x22, ++0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0x6A, 0x12, 0x45, 0x12, 0x90, ++0x81, 0x6E, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x75, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, ++0x90, 0x81, 0x7B, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x12, 0x7A, 0x98, 0xE4, 0xFD, 0xFF, 0x71, ++0xCE, 0x7D, 0x0C, 0x7F, 0x02, 0x71, 0xCE, 0x7D, 0x0C, 0x7F, 0x01, 0x71, 0xCE, 0x90, 0x80, 0x07, ++0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x81, 0x7A, 0x74, 0x99, 0xF0, 0x80, 0x29, 0xEF, 0xB4, 0x03, ++0x08, 0x90, 0x81, 0x7A, 0x74, 0x90, 0xF0, 0x80, 0x1D, 0x90, 0x81, 0x7A, 0x74, 0x40, 0xF0, 0x90, ++0x00, 0x2C, 0xE0, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, 0x90, 0x81, 0x8C, 0x74, 0x02, 0xF0, 0x80, ++0x05, 0xE4, 0x90, 0x81, 0x8C, 0xF0, 0x12, 0x6E, 0xD7, 0x12, 0x7A, 0x98, 0x7E, 0x00, 0x7F, 0x02, ++0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xD0, 0x12, 0x45, 0x12, 0xF1, 0xD8, 0xF1, 0xE0, 0xD1, ++0x19, 0xE4, 0x90, 0x81, 0xD2, 0xF0, 0x22, 0xD1, 0x27, 0xE4, 0xFD, 0xFF, 0x02, 0x47, 0xA8, 0xD1, ++0x17, 0x7D, 0x0C, 0x7F, 0x01, 0x61, 0xCE, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, ++0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, ++0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x12, 0x67, 0x47, 0x54, 0x7F, 0xFC, 0x90, 0x82, 0xCC, ++0x12, 0x20, 0xCE, 0x90, 0x82, 0xCC, 0x12, 0x65, 0xD8, 0x7F, 0x7C, 0xF1, 0x91, 0x12, 0x20, 0xDA, ++0xCC, 0xC0, 0x00, 0xC0, 0xF1, 0x8F, 0x12, 0x20, 0xDA, 0x00, 0xC0, 0x00, 0x14, 0x12, 0x67, 0x50, ++0x12, 0x20, 0xDA, 0x00, 0x03, 0x3E, 0x60, 0xE4, 0xFD, 0xFF, 0x12, 0x66, 0xBF, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xF1, 0xD8, 0xD1, 0x19, 0x7D, 0x0C, 0x7F, 0x01, 0x61, 0xCE, 0xEF, 0x70, 0x31, 0x7D, ++0x78, 0x7F, 0x02, 0xF1, 0x6F, 0x7D, 0x02, 0x7F, 0x03, 0xF1, 0x6F, 0x7D, 0xC8, 0x7F, 0x02, 0xF1, ++0xC5, 0x12, 0x6D, 0x82, 0xF0, 0xE4, 0xFF, 0x91, 0xA9, 0xEF, 0x70, 0x0A, 0xD1, 0xF8, 0x54, 0xBF, ++0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x06, 0x7D, 0x01, 0x7F, 0x0C, 0x31, 0xDA, 0xD1, 0xFC, 0xE1, 0xE0, ++0x90, 0x01, 0x36, 0x74, 0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0xF1, 0x83, 0x7D, ++0x02, 0x7F, 0x03, 0xF1, 0x83, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0x12, 0x6C, 0x6B, 0xE4, 0xFF, ++0x91, 0xA9, 0xBF, 0x01, 0x0F, 0xF1, 0x63, 0x90, 0x81, 0x72, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, ++0x7F, 0x04, 0x21, 0xDA, 0x12, 0x6B, 0x81, 0x22, 0xD1, 0x27, 0xD1, 0x82, 0x90, 0x81, 0x6A, 0xE0, ++0x54, 0xF7, 0xF0, 0x22, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, 0xF1, 0xBF, 0xFF, 0xF5, 0x54, 0x12, ++0x1F, 0xA4, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x67, 0xC9, 0xF5, 0x55, 0x80, 0x02, 0x8F, ++0x55, 0x85, 0x54, 0x53, 0xE5, 0x53, 0xD3, 0x95, 0x55, 0x50, 0x25, 0xAB, 0x50, 0xAA, 0x51, 0xA9, ++0x52, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFD, 0xAF, 0x53, 0x12, 0x52, 0xC5, 0xAF, 0x53, 0x91, 0xA9, ++0xEF, 0xAF, 0x53, 0x70, 0x05, 0x12, 0x5F, 0x98, 0x80, 0x02, 0xF1, 0xE8, 0x05, 0x53, 0x80, 0xD4, ++0xE5, 0x54, 0x70, 0x0E, 0xFF, 0x91, 0xA9, 0xEF, 0x70, 0x08, 0xD1, 0xF8, 0x54, 0xBF, 0xF0, 0x54, ++0x7F, 0xF0, 0x22, 0x90, 0x81, 0x6B, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x74, ++0x3D, 0xF1, 0xF1, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0x54, 0x7D, 0x01, 0x7F, 0x02, 0xF1, 0x83, 0x7D, ++0x02, 0x7F, 0x02, 0x74, 0x3D, 0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0x3E, 0x7F, ++0x8C, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x85, 0xBB, 0x22, 0x90, 0x81, 0x78, 0xE0, 0x75, 0xF0, ++0x03, 0xA4, 0x24, 0xFE, 0x22, 0x7D, 0x2D, 0x12, 0x66, 0xE1, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, ++0xFD, 0x7F, 0x03, 0xF1, 0x83, 0x12, 0x66, 0x66, 0xE4, 0xFD, 0x7F, 0x01, 0x61, 0xCE, 0xF0, 0x90, ++0x00, 0x01, 0x02, 0x1F, 0xBD, 0x74, 0x45, 0xF1, 0xF1, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x22, ++0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x22, 0x90, 0x81, 0x73, 0xE0, 0x44, 0x10, 0xF0, ++0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x20, 0xE7, 0x09, ++0xE0, 0x7F, 0x01, 0x20, 0xE6, 0x0C, 0x7F, 0x02, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x30, 0xE6, 0x02, ++0x7F, 0x03, 0x22, 0x12, 0x4F, 0xF9, 0x90, 0x80, 0x07, 0xEF, 0xF0, 0x11, 0x34, 0x90, 0x01, 0x64, ++0x74, 0x01, 0xF0, 0x90, 0x00, 0x12, 0xE0, 0x54, 0xC7, 0x44, 0x20, 0xFD, 0x7F, 0x12, 0x12, 0x32, ++0x1E, 0x02, 0x2D, 0xA7, 0x11, 0x64, 0x11, 0xB4, 0x12, 0x6F, 0x0B, 0x12, 0x6F, 0x2A, 0xE4, 0xF5, ++0x35, 0xF5, 0x36, 0xF5, 0x37, 0x75, 0x38, 0x80, 0xAD, 0x35, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xAD, ++0x36, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xAD, 0x37, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xAD, 0x38, 0x7F, ++0x53, 0x02, 0x32, 0x1E, 0x90, 0x01, 0x30, 0xE4, 0x11, 0x8C, 0x90, 0x01, 0x38, 0x11, 0x8C, 0xFD, ++0x7F, 0x50, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x52, ++0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x81, 0x3D, 0xE0, 0x54, 0xFE, 0x71, 0x1F, 0x90, 0x81, 0x3D, 0xE0, ++0x54, 0xFD, 0xF0, 0x54, 0xFB, 0xF0, 0x54, 0xF7, 0xF0, 0x54, 0xEF, 0xF0, 0xE4, 0x90, 0x81, 0x40, ++0x11, 0x8A, 0x80, 0xD9, 0x90, 0x01, 0x34, 0x74, 0xFF, 0x11, 0x8C, 0x90, 0x01, 0x3C, 0x11, 0x8C, ++0xFD, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x55, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, ++0x56, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x32, 0x1E, 0x90, 0x82, 0x8B, 0x71, 0x7C, ++0xE4, 0x11, 0x8D, 0xFC, 0xA3, 0xF0, 0x31, 0x88, 0x90, 0x82, 0x90, 0xEF, 0xF0, 0x51, 0x63, 0xA3, ++0xE0, 0x04, 0xFD, 0x31, 0x88, 0xAC, 0x07, 0x90, 0x82, 0x90, 0xE0, 0x30, 0xE7, 0x08, 0x90, 0x82, ++0x8E, 0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x82, 0x8E, 0xF0, 0xEC, 0x30, 0xE6, 0x34, 0x51, ++0x63, 0x7D, 0x02, 0x31, 0x88, 0xEF, 0x54, 0x70, 0xC4, 0x54, 0x0F, 0x90, 0x82, 0x91, 0xF0, 0x14, ++0x60, 0x11, 0x14, 0x60, 0x16, 0x24, 0xFE, 0x60, 0x12, 0x14, 0x60, 0x07, 0x14, 0x60, 0x04, 0x24, ++0x06, 0x80, 0x10, 0x90, 0x82, 0x8F, 0x74, 0x04, 0xF0, 0x80, 0x0D, 0x90, 0x82, 0x8F, 0x74, 0x08, ++0xF0, 0x80, 0x05, 0xE4, 0x90, 0x82, 0x8F, 0xF0, 0x90, 0x82, 0x8E, 0xE0, 0x24, 0x18, 0xFF, 0xA3, ++0xE0, 0x2F, 0xFF, 0x22, 0x90, 0x82, 0x87, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x11, ++0xDB, 0x90, 0x82, 0x8A, 0xEF, 0xF0, 0x90, 0x82, 0x89, 0xE0, 0xFD, 0x90, 0x82, 0x88, 0xE0, 0x2D, ++0xFD, 0x90, 0x82, 0x87, 0xE0, 0x34, 0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xFF, 0xEE, 0x3C, 0xCF, ++0x24, 0x06, 0xCF, 0x34, 0x00, 0xFE, 0xE4, 0xFD, 0xAB, 0x07, 0xAA, 0x06, 0xED, 0x2B, 0xFB, 0xE4, ++0x3A, 0xFA, 0xC3, 0x90, 0x81, 0x3C, 0xE0, 0x9B, 0x90, 0x81, 0x3B, 0xE0, 0x9A, 0x50, 0x0A, 0xA3, ++0x12, 0x7A, 0xAE, 0xEB, 0x9F, 0xFB, 0xEA, 0x9E, 0xFA, 0xEA, 0x90, 0xFD, 0x11, 0xF0, 0xAF, 0x03, ++0x74, 0x00, 0x2F, 0x12, 0x7A, 0xC7, 0xFF, 0x22, 0x31, 0x54, 0xEF, 0x64, 0x08, 0x70, 0x34, 0x31, ++0xF6, 0x24, 0x07, 0x31, 0x82, 0xEF, 0x70, 0x2B, 0x31, 0xF6, 0x24, 0x1D, 0x31, 0x82, 0xBF, 0x44, ++0x0B, 0x31, 0xF6, 0x24, 0x1F, 0x31, 0x82, 0xEF, 0x64, 0x43, 0x60, 0x14, 0x31, 0xF6, 0x24, 0x1D, ++0x31, 0x82, 0xEF, 0x64, 0x43, 0x70, 0x0C, 0x31, 0xF6, 0x24, 0x1F, 0x31, 0x82, 0xBF, 0x44, 0x03, ++0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x82, 0x89, 0xE0, 0xFF, 0x90, 0x82, 0x88, 0xE0, 0x2F, ++0xFF, 0x90, 0x82, 0x87, 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x82, 0x8A, 0xE0, 0x7C, 0x00, 0x2F, 0xFF, ++0xEC, 0x3E, 0xCF, 0x22, 0x31, 0x54, 0xEF, 0x64, 0x08, 0x70, 0x20, 0x31, 0xF6, 0x24, 0x07, 0x31, ++0x82, 0xEF, 0x64, 0x06, 0x70, 0x15, 0x31, 0xF6, 0x24, 0x0E, 0x31, 0x82, 0xEF, 0x70, 0x0C, 0x31, ++0xF6, 0x24, 0x0F, 0x31, 0x82, 0xBF, 0x01, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x24, 0x0A, ++0xFC, 0xED, 0x2C, 0xFD, 0x31, 0x88, 0x90, 0x82, 0x08, 0xA3, 0xE0, 0xFE, 0x90, 0x82, 0x0E, 0xE0, ++0x2E, 0x24, 0x24, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x82, 0x0E, 0xE0, ++0x04, 0xF0, 0x22, 0x90, 0x82, 0x8B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x24, 0x19, 0xFD, 0x31, ++0x88, 0x90, 0x82, 0x25, 0x22, 0x24, 0x04, 0xFD, 0x90, 0x82, 0x0E, 0xE0, 0x2D, 0xFD, 0x21, 0x88, ++0x24, 0x1A, 0xFC, 0xED, 0x2C, 0xFD, 0x31, 0x88, 0x90, 0x82, 0x0E, 0xE0, 0x24, 0x26, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0x22, 0x51, 0xC2, 0x12, 0x6E, 0xFD, 0x12, 0x4D, 0x80, 0x71, 0x26, 0x71, 0x0F, ++0x12, 0x6D, 0xE4, 0x11, 0x94, 0x90, 0x81, 0xE4, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, ++0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4, 0x90, 0x81, 0xE6, 0xF0, 0x90, 0x81, 0xE4, 0xE0, 0x54, 0xEF, ++0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0x12, 0x7A, 0xBB, 0xED, 0x70, 0x14, 0x71, 0x06, 0xF5, 0x83, 0xC0, ++0x83, 0xC0, 0x82, 0x51, 0xFE, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x11, 0x71, ++0x06, 0xF5, 0x83, 0xC0, 0x83, 0xC0, 0x82, 0x51, 0xFE, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, ++0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x12, 0x63, 0x52, 0x90, 0x81, 0x68, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, ++0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x74, 0x60, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0x22, 0x90, ++0x81, 0xD8, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0x7F, 0xF0, 0x54, 0xFB, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, ++0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, ++0xE4, 0xA3, 0xF0, 0x12, 0x7A, 0xD0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x82, 0x87, 0x71, 0x7C, 0x31, ++0x88, 0xEF, 0x54, 0x0C, 0x64, 0x08, 0x70, 0x2B, 0x90, 0x82, 0x8A, 0xF0, 0x90, 0x82, 0x8A, 0xE0, ++0xFD, 0xC3, 0x94, 0x06, 0x50, 0x1D, 0x90, 0x82, 0x87, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, ++0x24, 0x10, 0x71, 0x76, 0xEF, 0xF4, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x82, 0x8A, 0xE0, 0x04, ++0xF0, 0x80, 0xD9, 0x7F, 0x00, 0x22, 0xFC, 0xED, 0x2C, 0xFD, 0x21, 0x88, 0xEE, 0xF0, 0xA3, 0xEF, ++0xF0, 0xA3, 0xED, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xC4, 0xEE, ++0xF0, 0xA3, 0xEF, 0x71, 0x1F, 0x90, 0x82, 0xC4, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, ++0xE0, 0x60, 0x24, 0xC3, 0x90, 0x82, 0xC7, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0xC6, 0xE0, 0x94, 0x03, ++0x40, 0x0B, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x0C, 0x90, 0x82, 0xC6, ++0x71, 0xD1, 0x12, 0x63, 0x38, 0x80, 0xCE, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, ++0x85, 0xE4, 0x75, 0xF0, 0x01, 0x02, 0x44, 0x9F, 0x90, 0x82, 0x00, 0xEF, 0x71, 0x1F, 0x90, 0x01, ++0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x82, 0x00, 0xE0, 0x6F, 0x60, 0x35, ++0xC3, 0x90, 0x82, 0x02, 0xE0, 0x94, 0x88, 0x90, 0x82, 0x01, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x82, 0x01, 0x71, 0xD1, 0x12, 0x58, 0xA3, 0xD3, ++0x90, 0x82, 0x02, 0xE0, 0x94, 0x32, 0x90, 0x82, 0x01, 0xE0, 0x94, 0x00, 0x40, 0xC0, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE0, 0xB9, 0x22, 0xE4, 0x90, 0x81, 0xF0, 0x11, 0x8C, 0x90, 0x00, 0x9E, 0xE0, ++0x90, 0x81, 0xF4, 0xF0, 0x90, 0x00, 0x9F, 0xE0, 0x90, 0x81, 0xF5, 0xF0, 0xE0, 0xFD, 0xFE, 0x90, ++0x81, 0xF4, 0xE0, 0xFC, 0xFB, 0xEB, 0xFF, 0x90, 0x81, 0xF0, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0x00, 0x9E, 0xE0, 0xFF, 0xEC, 0xB5, 0x07, 0x09, 0xA3, 0xE0, 0xFF, 0xED, 0xB5, 0x07, 0x02, 0x80, ++0x12, 0xC3, 0x90, 0x81, 0xF3, 0xE0, 0x94, 0x64, 0x90, 0x81, 0xF2, 0xE0, 0x94, 0x00, 0x40, 0x0C, ++0x12, 0x6D, 0x4B, 0x90, 0x81, 0xF0, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x81, 0xF2, 0x71, ++0xD1, 0x80, 0xA9, 0xE4, 0xFD, 0xFB, 0xFA, 0xF1, 0x97, 0x30, 0xE0, 0x73, 0x90, 0x00, 0xB6, 0xE0, ++0xFC, 0x90, 0x00, 0xBF, 0xE0, 0xFE, 0x90, 0x00, 0xBE, 0xE0, 0x24, 0x00, 0xFB, 0xEA, 0x3E, 0xFA, ++0xC4, 0xF8, 0x54, 0xF0, 0xC8, 0xEB, 0xC4, 0x54, 0x0F, 0x48, 0x54, 0x1E, 0xFF, 0xEC, 0xC4, 0x54, ++0x01, 0x4F, 0x90, 0x81, 0xEA, 0xF0, 0x12, 0x63, 0xAE, 0xEC, 0x30, 0xE4, 0x09, 0x90, 0x81, 0x55, ++0xE0, 0xFD, 0xF1, 0xA6, 0x80, 0x35, 0xEB, 0x30, 0xE5, 0x09, 0x90, 0x81, 0x56, 0xB1, 0x4C, 0x04, ++0xF0, 0x80, 0x28, 0xEB, 0x30, 0xE6, 0x0A, 0x90, 0x81, 0x57, 0xB1, 0x4C, 0x74, 0x02, 0xF0, 0x80, ++0x1A, 0xEB, 0x30, 0xE7, 0x0A, 0x90, 0x81, 0x58, 0xB1, 0x4C, 0x74, 0x03, 0xF0, 0x80, 0x0C, 0xEA, ++0x30, 0xE0, 0x08, 0x90, 0x81, 0x59, 0xB1, 0x4C, 0x74, 0x04, 0xF0, 0xAF, 0x05, 0x80, 0x56, 0x90, ++0x81, 0x48, 0xE0, 0xFD, 0x7C, 0x00, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x20, 0x30, 0xED, ++0x4C, 0x70, 0x05, 0x90, 0x81, 0x55, 0x80, 0x2A, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x05, 0x90, 0x81, ++0x56, 0x80, 0x1F, 0xED, 0x64, 0x02, 0x4C, 0x70, 0x05, 0x90, 0x81, 0x57, 0x80, 0x14, 0xED, 0x64, ++0x03, 0x4C, 0x70, 0x05, 0x90, 0x81, 0x58, 0x80, 0x09, 0xED, 0x64, 0x04, 0x4C, 0x70, 0x0C, 0x90, ++0x81, 0x59, 0xE0, 0xFF, 0xB1, 0x55, 0x90, 0x81, 0x49, 0x71, 0xD1, 0x22, 0xE0, 0xFD, 0x90, 0x81, ++0x49, 0xE4, 0xF0, 0xA3, 0x22, 0x90, 0x04, 0x24, 0xEF, 0xF0, 0x22, 0x12, 0x70, 0x68, 0x90, 0x00, ++0x08, 0xE0, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, 0xE4, 0xFF, 0x71, 0xD8, 0x90, 0x81, ++0x6B, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x70, 0x85, ++0xB1, 0x5B, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x72, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, ++0x0E, 0x12, 0x71, 0x6A, 0xBF, 0x01, 0x08, 0xB1, 0x76, 0x90, 0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, ++0x91, 0x26, 0x90, 0x81, 0xEE, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xF1, 0x9E, 0x30, 0xE0, 0x14, 0x90, ++0x81, 0xEF, 0xE0, 0x20, 0xE0, 0x0D, 0xB1, 0xC4, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE2, 0x04, 0xE0, ++0x54, 0xFB, 0xF0, 0x22, 0xC2, 0xAF, 0x90, 0x81, 0x3D, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x08, 0xE4, ++0xFF, 0x12, 0x4F, 0x6F, 0x90, 0x02, 0x09, 0xE0, 0x90, 0x04, 0x24, 0xF0, 0x90, 0x02, 0x09, 0xE0, ++0x90, 0x04, 0x25, 0xF0, 0xF1, 0xA6, 0xD2, 0xAF, 0x22, 0x12, 0x6A, 0x63, 0x12, 0x1F, 0xA4, 0xFC, ++0x54, 0x02, 0xFE, 0x90, 0x81, 0x3D, 0xE0, 0x54, 0xFD, 0x4E, 0xF0, 0xE0, 0xFF, 0xC3, 0x13, 0x30, ++0xE0, 0x09, 0xF1, 0x91, 0x12, 0x67, 0xBA, 0x90, 0x81, 0x40, 0xF0, 0xEC, 0x30, 0xE0, 0x14, 0x12, ++0x62, 0xC4, 0x90, 0x80, 0x07, 0xE0, 0x64, 0x01, 0x70, 0x1B, 0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, ++0xF0, 0x80, 0x12, 0xB1, 0xC4, 0xF1, 0x97, 0x30, 0xE0, 0x0B, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE2, ++0x04, 0xE0, 0x54, 0xFB, 0xF0, 0xF1, 0x91, 0x12, 0x4F, 0xBF, 0x90, 0x81, 0x3E, 0x12, 0x67, 0xC8, ++0x90, 0x81, 0x3F, 0xF0, 0xF1, 0x9E, 0x30, 0xE0, 0x3C, 0xF1, 0x91, 0x12, 0x1F, 0xA4, 0xFE, 0x54, ++0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x4D, 0xFF, 0x90, 0x81, 0x3D, 0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, ++0x54, 0xF7, 0x4E, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0x90, 0x81, 0x41, 0xF0, 0x70, 0x03, ++0x74, 0x14, 0xF0, 0xF1, 0x91, 0x90, 0x00, 0x05, 0x12, 0x1F, 0xBD, 0x90, 0x81, 0x42, 0x12, 0x67, ++0xC0, 0x90, 0x81, 0x43, 0xF0, 0x90, 0x81, 0x3E, 0xE0, 0x54, 0x01, 0x90, 0x81, 0x4B, 0xF0, 0x90, ++0x81, 0x3E, 0xE0, 0x54, 0x02, 0x90, 0x81, 0x4C, 0xF0, 0x90, 0x81, 0x3E, 0xE0, 0x54, 0x04, 0x90, ++0x81, 0x4D, 0xF0, 0x90, 0x81, 0x3E, 0xE0, 0x54, 0x08, 0x90, 0x81, 0x4E, 0xF0, 0x90, 0x81, 0x3E, ++0xE0, 0x54, 0x10, 0x90, 0x81, 0x4F, 0xF0, 0x90, 0x81, 0x3F, 0xE0, 0x54, 0x01, 0x90, 0x81, 0x50, ++0xF0, 0x90, 0x81, 0x3F, 0xE0, 0x54, 0x02, 0x90, 0x81, 0x51, 0xF0, 0x90, 0x81, 0x3F, 0xE0, 0x54, ++0x04, 0x90, 0x81, 0x52, 0xF0, 0x90, 0x81, 0x3F, 0xE0, 0x54, 0x08, 0x90, 0x81, 0x53, 0xF0, 0x90, ++0x81, 0x3F, 0xE0, 0x54, 0x10, 0x90, 0x81, 0x54, 0xF0, 0x22, 0x90, 0x82, 0x05, 0x12, 0x44, 0xE3, ++0x90, 0x82, 0x04, 0xEF, 0xF0, 0x12, 0x44, 0xEC, 0x57, 0x2C, 0x00, 0x57, 0x31, 0x01, 0x57, 0x36, ++0x02, 0x57, 0x3B, 0x03, 0x57, 0x40, 0x04, 0x57, 0x45, 0x08, 0x57, 0x49, 0x09, 0x57, 0x4E, 0x0A, ++0x57, 0x53, 0x12, 0x57, 0x58, 0x13, 0x57, 0x5D, 0x14, 0x57, 0x62, 0x20, 0x57, 0x67, 0x21, 0x57, ++0x6C, 0x23, 0x57, 0x71, 0x25, 0x57, 0x76, 0x26, 0x00, 0x00, 0x57, 0x7B, 0xF1, 0x8B, 0x02, 0x67, ++0x74, 0xF1, 0x8B, 0x02, 0x4F, 0x04, 0xF1, 0x8B, 0x02, 0x67, 0xF1, 0xF1, 0x8B, 0x02, 0x6B, 0x5A, ++0xF1, 0x8B, 0x02, 0x6A, 0x69, 0xF1, 0x8B, 0xA1, 0xE9, 0xF1, 0x8B, 0x02, 0x67, 0xCF, 0xF1, 0x8B, ++0x02, 0x68, 0x2E, 0xF1, 0x8B, 0x02, 0x64, 0x77, 0xF1, 0x8B, 0x02, 0x5B, 0xB2, 0xF1, 0x8B, 0x02, ++0x68, 0x52, 0xF1, 0x8B, 0x02, 0x68, 0x61, 0xF1, 0x8B, 0x02, 0x6E, 0xB2, 0xF1, 0x8B, 0x02, 0x6E, ++0xED, 0xF1, 0x8B, 0x02, 0x6E, 0xF5, 0xF1, 0x8B, 0x02, 0x6A, 0xAC, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x01, 0xF0, 0x90, 0x82, 0x04, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90, 0x82, 0x05, 0x02, 0x44, ++0xDA, 0x90, 0x82, 0x08, 0x02, 0x44, 0xDA, 0x90, 0x81, 0x3D, 0xE0, 0xC3, 0x13, 0x22, 0x90, 0x81, ++0x3D, 0xE0, 0xFF, 0xC3, 0x13, 0x22, 0xE4, 0x90, 0x81, 0x49, 0xF0, 0xA3, 0xF0, 0x22, 0xF1, 0x9E, ++0x30, 0xE0, 0x17, 0xE4, 0x90, 0x81, 0x40, 0xF0, 0x90, 0x81, 0x3D, 0xE0, 0x30, 0xE0, 0x0B, 0xC4, ++0x54, 0x0F, 0x30, 0xE0, 0x05, 0xF1, 0xCB, 0x12, 0x5C, 0xD9, 0x22, 0xB1, 0xC4, 0x90, 0x01, 0xC7, ++0x74, 0x66, 0xF0, 0xE4, 0xFF, 0x22, 0x90, 0x81, 0x40, 0xE0, 0x60, 0x08, 0x90, 0x81, 0x3D, 0xE0, ++0x44, 0x10, 0xF0, 0x22, 0xF1, 0xCB, 0x02, 0x5C, 0xD9, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x84, 0x22, ++0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, 0x90, 0xFD, 0x00, 0xE0, ++0x54, 0xBF, 0xF0, 0x11, 0xB4, 0x12, 0x32, 0x77, 0x11, 0xC1, 0x11, 0x9C, 0x7F, 0x01, 0x12, 0x42, ++0x15, 0x90, 0x81, 0xD7, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x42, 0x15, 0x90, 0x81, 0xD7, 0xE0, 0x04, ++0xF0, 0x12, 0x50, 0x13, 0x12, 0x52, 0x94, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x80, ++0x12, 0x32, 0x1E, 0x75, 0x20, 0xFF, 0x12, 0x57, 0xE9, 0x11, 0x42, 0x11, 0xAA, 0xE4, 0xFF, 0x02, ++0x42, 0x9E, 0xE4, 0x90, 0x81, 0xFD, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x98, 0xE0, 0x7F, 0x00, 0x30, ++0xE4, 0x02, 0x7F, 0x01, 0xEF, 0x64, 0x01, 0x60, 0x3C, 0xC3, 0x90, 0x81, 0xFE, 0xE0, 0x94, 0x88, ++0x90, 0x81, 0xFD, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, ++0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1E, 0x90, 0x81, 0xFD, 0x12, 0x53, 0xD1, 0x11, 0xA3, 0xD3, ++0x90, 0x81, 0xFE, 0xE0, 0x94, 0x32, 0x90, 0x81, 0xFD, 0xE0, 0x94, 0x00, 0x40, 0xBB, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE3, 0xB4, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0xE4, 0x90, 0x80, 0x01, ++0x02, 0x50, 0x8A, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x90, 0x01, 0xE4, 0x74, 0x16, 0xF0, ++0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, ++0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9C, 0x74, 0x7E, 0xF0, 0xA3, 0x74, ++0x92, 0xF0, 0xA3, 0x74, 0xA0, 0xF0, 0xA3, 0x74, 0x24, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x49, 0xF0, ++0x90, 0x01, 0x9A, 0x74, 0xE0, 0xF0, 0x90, 0x01, 0x99, 0xE4, 0xF0, 0x90, 0x01, 0x98, 0x04, 0xF0, ++0x22, 0xE4, 0x90, 0x81, 0xFF, 0xF0, 0x90, 0x81, 0xFF, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xF1, 0x90, ++0x01, 0xC4, 0xF0, 0x74, 0x58, 0xA3, 0xF0, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x0E, 0x90, 0x81, 0x72, ++0xE0, 0xFF, 0x90, 0x81, 0x71, 0xE0, 0x6F, 0x60, 0x02, 0x31, 0x30, 0xC2, 0xAF, 0x12, 0x6F, 0x49, ++0xBF, 0x01, 0x03, 0x12, 0x71, 0xBE, 0xD2, 0xAF, 0x31, 0x2F, 0x12, 0x41, 0x4D, 0x80, 0xC7, 0x22, ++0x90, 0x81, 0x71, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x49, 0xDA, 0xE4, 0xFF, 0x12, 0x4C, 0xA9, 0xBF, ++0x01, 0x0E, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x08, 0x31, 0x51, 0x54, 0x07, 0x70, 0x02, 0x31, 0x30, ++0x22, 0x90, 0x81, 0x73, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x06, 0xA9, 0xE0, ++0xF5, 0x4E, 0x54, 0xC0, 0x70, 0x07, 0x31, 0x51, 0x54, 0xFD, 0xF0, 0x80, 0xC3, 0xE5, 0x4E, 0x30, ++0xE6, 0x1F, 0x90, 0x81, 0x6F, 0xE0, 0x64, 0x01, 0x70, 0x19, 0x90, 0x81, 0x73, 0xE0, 0x44, 0x01, ++0xF0, 0x12, 0x47, 0xDF, 0x64, 0x02, 0x60, 0x04, 0xF1, 0x67, 0x80, 0x07, 0x12, 0x47, 0xCE, 0x80, ++0x02, 0x31, 0x51, 0xE5, 0x4E, 0x90, 0x81, 0x73, 0x30, 0xE7, 0x0E, 0xE0, 0x44, 0x02, 0x12, 0x48, ++0xED, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x81, ++0x6F, 0xE0, 0x60, 0x10, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x04, 0x71, 0x86, 0x80, 0x05, 0x12, ++0x4E, 0xFC, 0x31, 0x30, 0x90, 0x81, 0xE4, 0x91, 0x24, 0x30, 0xE0, 0x19, 0xEF, 0xC4, 0x54, 0x0F, ++0x30, 0xE0, 0x02, 0xF1, 0xAD, 0x90, 0x81, 0xE5, 0xE0, 0x30, 0xE0, 0x09, 0x71, 0x58, 0x20, 0xE0, ++0x02, 0x7D, 0x01, 0x31, 0xE6, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xE0, ++0xED, 0xF0, 0x90, 0x82, 0xDF, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x4B, 0x51, 0xB7, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x5F, 0xFD, 0x7F, 0x47, 0x51, 0xB1, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x46, 0xE0, 0x4F, 0xFD, 0x7F, 0x46, 0x71, ++0x71, 0x60, 0x10, 0x51, 0xB4, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x45, 0xE0, ++0x4F, 0x80, 0x0F, 0x51, 0xB4, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x45, ++0xE0, 0x5F, 0xFD, 0x7F, 0x45, 0x80, 0x62, 0x90, 0x82, 0xDF, 0xE0, 0x24, 0xF8, 0xF0, 0xE0, 0x24, ++0x04, 0x51, 0xB8, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, ++0xFD, 0x7F, 0x43, 0x51, 0xB1, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x43, 0xE0, ++0x4F, 0xFD, 0x7F, 0x43, 0x71, 0x71, 0x60, 0x19, 0x90, 0x82, 0xDF, 0xE0, 0x24, 0x04, 0x51, 0xB8, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x42, 0xE0, 0x4F, 0xFD, 0x7F, 0x42, 0x80, ++0x18, 0x90, 0x82, 0xDF, 0xE0, 0x24, 0x04, 0x51, 0xB8, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, ++0xFF, 0x90, 0x00, 0x42, 0xE0, 0x5F, 0xFD, 0x7F, 0x42, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x12, 0x32, 0x1E, 0x90, 0x82, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0xAD, ++0x07, 0x90, 0x81, 0xE6, 0xE0, 0x75, 0xF0, 0x20, 0xA4, 0xFF, 0x90, 0x82, 0xB9, 0xE5, 0xF0, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0x81, 0xE7, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0xAE, 0xF0, 0x90, 0x82, 0xBB, ++0xF0, 0xEE, 0xA3, 0xF0, 0x71, 0x69, 0x90, 0x82, 0xBD, 0xF0, 0xEE, 0xA3, 0xF0, 0xED, 0x64, 0x01, ++0x60, 0x5E, 0x90, 0x81, 0xE4, 0xE0, 0xFE, 0x91, 0x26, 0x30, 0xE0, 0x54, 0xEE, 0x71, 0x5D, 0x20, ++0xE0, 0x02, 0x7D, 0x01, 0x71, 0x51, 0xFE, 0x54, 0x0F, 0xFF, 0xEE, 0xC4, 0x13, 0x13, 0x54, 0x01, ++0xFD, 0x71, 0x51, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x21, 0xA3, 0xE0, 0x30, 0xE0, 0x0D, 0x90, ++0x82, 0xBE, 0xE0, 0xF5, 0x1D, 0x90, 0x82, 0xBD, 0x71, 0x79, 0x80, 0x0F, 0x71, 0x69, 0xFF, 0x12, ++0x32, 0xAA, 0x71, 0x58, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x31, 0xE6, 0x90, 0x81, 0xE4, 0xE0, 0xC4, ++0x54, 0x0F, 0x30, 0xE0, 0x0B, 0x90, 0x82, 0xBC, 0xE0, 0xF5, 0x1D, 0x90, 0x82, 0xBB, 0x71, 0x79, ++0x22, 0x31, 0xE6, 0x90, 0x81, 0xE4, 0xE0, 0x22, 0x90, 0x81, 0xE4, 0xE0, 0xFE, 0x54, 0x0F, 0xFF, ++0xEE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x7D, 0x00, 0x22, 0x90, 0x82, 0xB9, 0xE0, 0xFE, 0xA3, 0xE0, ++0x22, 0x12, 0x32, 0x1E, 0x90, 0x82, 0xE0, 0xE0, 0x22, 0xE0, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, ++0x58, 0x7E, 0x01, 0x02, 0x48, 0xFE, 0x12, 0x6D, 0x78, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, ++0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0xF5, 0x1D, ++0x90, 0x81, 0xCE, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x71, 0x7A, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x08, ++0xF0, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x80, 0xFE, 0x90, 0x81, 0xE4, 0xE0, 0x54, 0x7F, 0x4E, ++0xFE, 0xF0, 0xEF, 0x54, 0x40, 0xFF, 0xEE, 0x54, 0xBF, 0x12, 0x6D, 0x53, 0x54, 0x20, 0xFD, 0xEF, ++0x54, 0xDF, 0x4D, 0xFF, 0x90, 0x81, 0xE4, 0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, ++0xFF, 0xF0, 0x12, 0x1F, 0xA4, 0x54, 0x0F, 0xFE, 0xEF, 0x54, 0xF0, 0x4E, 0x90, 0x81, 0xE4, 0x12, ++0x4F, 0xBE, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0xE6, 0xF0, 0xEF, 0x54, 0x80, 0x91, 0x26, 0xFF, 0x90, ++0x81, 0xE5, 0xE0, 0x54, 0xFE, 0x12, 0x67, 0xC7, 0x90, 0x81, 0xE7, 0x12, 0x67, 0xB9, 0x54, 0x01, ++0x25, 0xE0, 0xFF, 0x90, 0x81, 0xE5, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0x71, 0x58, 0x20, 0xE0, 0x02, ++0x7D, 0x01, 0x21, 0xE6, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0x90, 0x81, 0x6A, ++0x91, 0x24, 0x30, 0xE0, 0x1D, 0xEF, 0x54, 0x7F, 0xF1, 0x99, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, ++0xF0, 0x80, 0x07, 0xE0, 0x54, 0xFD, 0xF1, 0xA2, 0x04, 0xF0, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x02, ++0x31, 0x30, 0x7F, 0x01, 0x90, 0x81, 0xDC, 0xE0, 0xFD, 0x30, 0xE0, 0x4B, 0x90, 0x81, 0xE1, 0xE0, ++0xFC, 0x60, 0x44, 0x12, 0x63, 0x4A, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, ++0x90, 0x04, 0xE0, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x0B, 0xE4, 0x90, 0x81, 0xE1, 0xF0, 0x90, 0x81, ++0xE3, 0x04, 0xF0, 0x22, 0x90, 0x81, 0xDE, 0xE0, 0xD3, 0x9C, 0x50, 0x13, 0xED, 0x13, 0x13, 0x13, ++0x54, 0x1F, 0x30, 0xE0, 0x04, 0xF1, 0x90, 0x80, 0x02, 0x91, 0xD1, 0xB1, 0x16, 0xF0, 0x22, 0xB1, ++0x9F, 0x90, 0x81, 0xE1, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x6A, 0xE0, 0xFF, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x30, 0xE0, 0x18, 0xEF, 0x54, 0xBF, 0xF1, 0x99, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, ++0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFE, 0xF1, 0xA2, 0x74, 0x04, 0xF0, 0x31, 0x30, 0xE4, 0xFF, 0x80, ++0x83, 0x90, 0x01, 0xC7, 0x74, 0x10, 0xF0, 0x7F, 0x01, 0x90, 0x82, 0xEB, 0xEF, 0xF0, 0x90, 0x80, ++0x07, 0xE0, 0xB4, 0x02, 0x12, 0x90, 0x82, 0xEB, 0xE0, 0xFF, 0x64, 0x01, 0x60, 0x24, 0x90, 0x01, ++0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80, 0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x7F, 0x64, 0x7E, ++0x00, 0x12, 0x32, 0xAA, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x82, 0xEB, 0xE0, 0xFF, ++0x51, 0xBF, 0xB1, 0x16, 0xF0, 0x22, 0x90, 0x81, 0xDC, 0xE0, 0x54, 0xFE, 0x22, 0x90, 0x81, 0xDC, ++0xE0, 0x30, 0xE0, 0x7A, 0x90, 0x81, 0xE0, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0xE3, 0xE0, 0x64, 0x01, ++0x70, 0x30, 0x90, 0x81, 0xDC, 0x12, 0x6D, 0x67, 0x30, 0xE0, 0x27, 0x90, 0x81, 0xE2, 0xE0, 0x70, ++0x21, 0x90, 0x81, 0xDF, 0xE0, 0xFE, 0xA3, 0xE0, 0xC3, 0x9E, 0x40, 0x16, 0xEF, 0x13, 0x13, 0x13, ++0x54, 0x1F, 0x30, 0xE0, 0x07, 0xF1, 0x90, 0xB1, 0x16, 0xF0, 0x80, 0x06, 0x91, 0xD1, 0xB1, 0x16, ++0xF0, 0x22, 0x90, 0x81, 0xE0, 0xE0, 0xFF, 0x90, 0x81, 0xDD, 0xE0, 0xD3, 0x9F, 0x50, 0x2F, 0x90, ++0x06, 0x92, 0xE0, 0x20, 0xE2, 0x19, 0x90, 0x81, 0xE2, 0xE0, 0x70, 0x13, 0x7D, 0x08, 0xFF, 0xB1, ++0xA3, 0x90, 0x81, 0xE1, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0xDB, 0xE0, 0x04, 0xF0, 0x80, 0x06, 0x90, ++0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0x81, 0xE0, 0xF0, 0x90, 0x81, 0xE2, 0xF0, 0x22, 0x7D, ++0x08, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xBF, 0xEF, 0xF0, 0xA3, ++0xED, 0xF0, 0x90, 0x80, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x23, 0x90, 0x05, ++0x22, 0xE0, 0x90, 0x82, 0xC3, 0xF0, 0x7D, 0x26, 0x12, 0x66, 0xE1, 0xEF, 0x64, 0x01, 0x70, 0x02, ++0xD1, 0x0B, 0x90, 0x82, 0xC3, 0xE0, 0xFF, 0x7D, 0x27, 0x12, 0x47, 0xA8, 0x12, 0x71, 0xC9, 0x80, ++0x05, 0x12, 0x71, 0xC9, 0xD1, 0x0B, 0xF1, 0x89, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF1, ++0x47, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x0A, 0xF1, 0x3A, 0x44, 0x10, 0xF1, 0x46, 0x44, 0x80, 0xF0, ++0x22, 0xF1, 0x3A, 0x54, 0xEF, 0xF1, 0x46, 0x44, 0x40, 0xF0, 0x22, 0x90, 0x80, 0x4C, 0xE0, 0xFF, ++0x90, 0x82, 0xC0, 0xE0, 0xFB, 0x90, 0x82, 0xCB, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0xD1, 0x9B, 0x90, ++0x82, 0xC1, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x82, 0xBF, 0xE0, 0xFF, 0xB1, 0xEF, ++0x90, 0x82, 0xC1, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, ++0x07, 0xF1, 0x5B, 0x44, 0x01, 0xF0, 0xF1, 0x5B, 0x54, 0xFB, 0xF0, 0xAC, 0x07, 0x74, 0x16, 0x2C, ++0xF1, 0x32, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, 0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, ++0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, 0xF1, 0x53, 0xE0, 0x54, ++0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0xF1, 0x53, 0xED, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x82, 0xC9, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x82, 0xC8, 0xEF, 0xF0, 0xE4, ++0xFD, 0xFC, 0x12, 0x72, 0x44, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0x82, 0xC8, 0xE0, 0x90, 0x04, 0x25, ++0xF0, 0x90, 0x82, 0xC9, 0xE0, 0x60, 0x0E, 0x74, 0x0F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x08, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xF0, ++0xF0, 0xAF, 0x05, 0xF1, 0x2F, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x82, 0xCA, 0xE0, 0x25, 0xE0, 0x25, ++0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0xF1, 0x2F, 0xEE, 0xF0, 0x90, 0x82, 0xCB, 0xE0, 0xFF, ++0xAE, 0x05, 0x74, 0x1E, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x21, ++0x2E, 0xF1, 0x3D, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x74, ++0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x21, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF0, 0x74, 0x1F, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x11, 0x2C, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1B, 0x90, 0x80, 0x4B, ++0xE0, 0xFF, 0x90, 0x82, 0xCB, 0x74, 0x09, 0xF0, 0x7B, 0x18, 0xE4, 0xFD, 0xD1, 0x9B, 0x90, 0x81, ++0xEC, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xF1, 0x89, 0x22, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x22, ++0xE4, 0xFD, 0xFF, 0x12, 0x52, 0xC5, 0xE4, 0xFF, 0x22, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x81, ++0x6B, 0x22, 0xF0, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0xE4, 0x90, 0x81, ++0xF0, 0xF0, 0x90, 0x81, 0xEE, 0x74, 0x14, 0xF0, 0x90, 0x81, 0xFC, 0x74, 0x01, 0xF0, 0xFB, 0x7A, ++0x81, 0x79, 0xEE, 0x12, 0x62, 0x5B, 0x7F, 0x04, 0x90, 0x82, 0xE3, 0xEF, 0xF0, 0x7F, 0x02, 0x12, ++0x43, 0x27, 0x90, 0x80, 0x01, 0xE0, 0xFF, 0x90, 0x82, 0xE3, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x80, ++0x01, 0xF0, 0x22, 0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x43, 0x4E, 0x90, 0x82, 0x03, 0xEF, ++0xF0, 0x60, 0xF0, 0x90, 0x80, 0x01, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, ++0xEF, 0x30, 0xE1, 0x09, 0x90, 0x80, 0x01, 0xE0, 0x54, 0xFD, 0xF0, 0x11, 0x69, 0x11, 0x2B, 0x30, ++0xE2, 0x05, 0x54, 0xFB, 0xF0, 0x31, 0xF4, 0x11, 0x2B, 0x30, 0xE5, 0x0B, 0x54, 0xDF, 0xF0, 0x11, ++0x35, 0xBF, 0x01, 0x03, 0x12, 0x72, 0xF5, 0xD2, 0xAF, 0x80, 0xC8, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, ++0x80, 0x01, 0xE0, 0xFF, 0x22, 0xE4, 0x90, 0x82, 0xE1, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0, ++0x20, 0xE1, 0x23, 0xC3, 0x90, 0x82, 0xE2, 0xE0, 0x94, 0xD0, 0x90, 0x82, 0xE1, 0xE0, 0x94, 0x07, ++0x40, 0x0A, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x00, 0x22, 0x90, 0x82, 0xE1, 0x12, ++0x53, 0xD1, 0x71, 0x38, 0x80, 0xD6, 0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x80, 0xA2, 0xE0, 0xFF, 0x90, 0x80, 0xA1, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, ++0x7F, 0x00, 0xEF, 0x70, 0x3F, 0x90, 0x80, 0xA1, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x51, ++0x12, 0x44, 0xCE, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x52, 0xF9, 0x74, 0x80, 0x35, ++0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x56, 0xEA, 0x90, 0x80, 0xA1, 0x31, 0xED, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x80, 0xA1, 0xF0, 0x11, 0xC9, 0x90, 0x80, 0x01, ++0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, ++0x82, 0xDD, 0xF0, 0x90, 0x82, 0xDD, 0xE0, 0xFD, 0x70, 0x02, 0x21, 0xC2, 0x90, 0x80, 0xA1, 0xE0, ++0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x80, 0xA2, 0xE0, ++0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, ++0x44, 0x01, 0xF0, 0x22, 0x90, 0x82, 0xDB, 0x71, 0x48, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x21, 0xA4, 0xE4, 0x90, 0x82, 0xDE, 0xF0, 0x90, 0x82, ++0xDE, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x31, 0x31, 0xC3, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, ++0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0x31, 0xDB, 0x90, 0x80, 0x51, 0x31, 0xCB, 0x31, ++0xC3, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, 0x31, 0xDB, 0x90, 0x80, 0x55, 0x31, ++0xCB, 0x90, 0x82, 0xDE, 0xE0, 0x04, 0xF0, 0x80, 0xC5, 0x90, 0x82, 0xDD, 0xE0, 0xFF, 0x90, 0x82, ++0xDB, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, ++0x90, 0x82, 0xDD, 0xF0, 0x90, 0x82, 0xDB, 0x12, 0x5A, 0xB7, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0x90, 0x01, 0xCC, 0xF0, 0x90, 0x82, 0xDB, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x80, ++0xA2, 0x31, 0xED, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x01, 0xD3, 0xE4, 0x90, 0x80, ++0xA2, 0xF0, 0x01, 0xD3, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x82, 0xDB, 0xE0, 0x44, ++0x80, 0x90, 0x00, 0x8A, 0xF0, 0x31, 0xC3, 0x90, 0x01, 0xD0, 0x12, 0x44, 0xCE, 0xE0, 0x90, 0x01, ++0xC3, 0xF0, 0x22, 0x90, 0x82, 0xDB, 0xE0, 0x75, 0xF0, 0x04, 0x22, 0x12, 0x44, 0xCE, 0xE5, 0x82, ++0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, ++0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x80, 0xA2, 0xE0, 0x75, 0xF0, 0x08, 0x22, 0xE0, 0x04, 0xF0, ++0xE0, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0x81, 0x3A, ++0xE0, 0xFE, 0x90, 0x81, 0x39, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, ++0xEE, 0x64, 0x01, 0x60, 0x41, 0x90, 0x01, 0xAF, 0xE0, 0x70, 0x0A, 0xED, 0x51, 0xB8, 0xFA, 0x7B, ++0x01, 0x91, 0x8A, 0x7F, 0x01, 0xEF, 0x60, 0x2E, 0x90, 0x81, 0x39, 0x31, 0xED, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x81, 0x39, 0xF0, 0x90, 0x81, 0x3A, 0xE0, 0xFF, 0x90, ++0x81, 0x39, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, ++0x80, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x81, 0x39, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, ++0x14, 0xFF, 0x90, 0x81, 0x3A, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, ++0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x28, 0xC0, 0x01, 0x90, 0x81, 0x3A, ++0xE0, 0x51, 0xB8, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x44, ++0x79, 0x90, 0x81, 0x3A, 0x31, 0xED, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, ++0x81, 0x3A, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xA3, 0xF9, 0x74, ++0x80, 0x35, 0xF0, 0x22, 0x90, 0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0x71, 0x3F, 0x90, 0x81, ++0x3B, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x12, 0x57, 0x9E, 0x30, ++0xE0, 0x2B, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x11, 0x35, 0x90, 0x81, 0x3D, 0xE0, 0xBF, 0x01, 0x05, ++0x54, 0xEF, 0xF0, 0x80, 0x03, 0x44, 0x10, 0xF0, 0x90, 0x81, 0x40, 0xE0, 0xFF, 0x60, 0x0E, 0xE4, ++0xF5, 0x1D, 0x8F, 0x1E, 0xFB, 0xFD, 0x7F, 0x5C, 0x7E, 0x01, 0x12, 0x48, 0xFE, 0x90, 0x81, 0x3D, ++0xE0, 0x44, 0x01, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x4F, 0x83, 0x90, 0x05, 0x52, 0xE0, 0x54, ++0x07, 0x04, 0x90, 0x81, 0x48, 0x12, 0x53, 0x1F, 0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0, 0x12, ++0x57, 0x97, 0x30, 0xE0, 0x02, 0x71, 0xAE, 0x22, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0xE0, ++0x7C, 0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, ++0x08, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7D, 0x08, 0xED, 0x14, 0xF9, 0x24, 0x60, ++0x71, 0xA5, 0x60, 0x38, 0x7C, 0x08, 0xEC, 0x14, 0x90, 0x82, 0xE4, 0xF0, 0x74, 0x60, 0x29, 0x71, ++0xA5, 0xFB, 0x7A, 0x00, 0x90, 0x82, 0xE4, 0x71, 0x48, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0xFF, 0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x60, 0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, ++0xFF, 0x90, 0x82, 0xE4, 0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, 0xDC, 0xCA, 0xDD, 0xBD, 0x7F, 0x00, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x00, ++0xB6, 0x74, 0x10, 0xF0, 0x90, 0x00, 0xBE, 0x74, 0xE0, 0xF0, 0xA3, 0x74, 0x01, 0xF0, 0x22, 0x90, ++0x82, 0x13, 0x74, 0x12, 0xF0, 0x90, 0x82, 0x21, 0x74, 0x05, 0xF0, 0x90, 0x82, 0x15, 0xEF, 0xF0, ++0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x82, 0x11, 0xE0, 0x90, 0x82, 0x18, 0xF0, 0x90, 0x82, ++0x12, 0xE0, 0x90, 0x82, 0x19, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x13, 0x51, 0x5B, 0x7F, 0x04, ++0x02, 0x5F, 0xC8, 0x91, 0x70, 0x7F, 0xF5, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x06, 0x90, ++0x82, 0x08, 0xE0, 0xA3, 0xF0, 0x91, 0x70, 0x7F, 0xF6, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, ++0x08, 0x90, 0x82, 0x08, 0xE0, 0x90, 0x82, 0x0A, 0xF0, 0x91, 0x70, 0x7F, 0xF4, 0x7E, 0x00, 0x12, ++0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x08, 0xE0, 0x90, 0x82, 0x0B, 0xF0, 0x91, 0x70, 0x7F, ++0xF3, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x08, 0xE0, 0x90, 0x82, 0x0C, ++0xF0, 0x91, 0x70, 0x7F, 0xF2, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x08, ++0xE0, 0x90, 0x82, 0x0D, 0xF0, 0x90, 0x82, 0x09, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, ++0xA3, 0xE0, 0x90, 0x82, 0x11, 0xF0, 0x90, 0x82, 0x0D, 0xE0, 0x90, 0x82, 0x12, 0xF0, 0x61, 0xBF, ++0x7B, 0x01, 0x7A, 0x82, 0x79, 0x08, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x5F, 0xF0, 0xBF, ++0x01, 0x07, 0x71, 0xF3, 0xE4, 0x90, 0x81, 0x5F, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x82, 0x04, 0x12, 0x44, 0xE3, 0x90, 0x82, 0xDC, 0xE0, 0xFF, 0x04, 0xF0, 0x90, 0x00, ++0x01, 0xEF, 0x12, 0x1F, 0xFC, 0x7F, 0xAF, 0x7E, 0x01, 0x12, 0x53, 0x85, 0xEF, 0x60, 0x3A, 0x90, ++0x82, 0x04, 0x12, 0x44, 0xDA, 0x8B, 0x13, 0x8A, 0x14, 0x89, 0x15, 0x90, 0x00, 0x0E, 0x12, 0x1F, ++0xBD, 0x24, 0x02, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, 0x2B, 0xED, 0x90, 0x82, ++0x04, 0x12, 0x44, 0xDA, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x90, 0x01, 0xAE, 0xF0, 0xA3, 0x74, ++0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, ++0x92, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x90, ++0x82, 0xA0, 0xF0, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x90, 0x82, 0x98, 0x12, 0x20, 0xCE, ++0x90, 0x82, 0x92, 0xE0, 0xFB, 0x70, 0x04, 0xB1, 0xD2, 0x80, 0x06, 0xEB, 0xB1, 0xE1, 0x12, 0x2D, ++0x5C, 0x90, 0x82, 0x9C, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x93, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, ++0x78, 0x17, 0xD1, 0x55, 0x90, 0x82, 0x9C, 0x12, 0x44, 0xC2, 0xED, 0x54, 0x7F, 0xFD, 0xEC, 0x54, ++0x80, 0xFC, 0x12, 0x44, 0xB5, 0xEC, 0x44, 0x80, 0xFC, 0x90, 0x82, 0x9C, 0x12, 0x20, 0xCE, 0xB1, ++0xD2, 0xEC, 0x54, 0x7F, 0xFC, 0xB1, 0xDB, 0xB1, 0xF4, 0xB1, 0xE1, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x82, 0x9C, 0xB1, 0xD8, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x2E, 0xA2, 0xB1, 0xD2, 0xEC, 0x44, 0x80, ++0xFC, 0xB1, 0xDB, 0xB1, 0xF4, 0x70, 0x04, 0x7F, 0x20, 0x80, 0x09, 0x90, 0x82, 0x92, 0xE0, 0xB4, ++0x01, 0x16, 0x7F, 0x28, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x78, 0x08, 0x12, 0x20, 0xA8, 0xEF, 0x54, ++0x01, 0xFF, 0xE4, 0x90, 0x82, 0xA0, 0xEF, 0xF0, 0x90, 0x82, 0xA0, 0xE0, 0x90, 0x82, 0x92, 0x60, ++0x0E, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x80, 0x0C, 0xE0, ++0x75, 0xF0, 0x08, 0xA4, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xB1, 0xEC, 0x12, 0x2D, 0x5C, ++0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x90, 0x82, 0x94, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x94, 0x02, ++0x44, 0xC2, 0x90, 0x82, 0x98, 0x02, 0x44, 0xC2, 0x12, 0x44, 0xC2, 0x90, 0x85, 0xBB, 0x02, 0x20, ++0xCE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xF5, 0x83, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x22, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x82, 0x92, 0xE0, 0x22, ++0x90, 0x82, 0xA1, 0xEF, 0xF0, 0xAB, 0x05, 0x90, 0x82, 0xA7, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, ++0x00, 0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x14, 0xD1, 0x55, 0x90, 0x82, 0xA3, 0x12, 0x44, ++0xC2, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x12, 0x44, 0xB5, 0xEC, 0x54, 0x0F, 0xFC, 0x90, 0x82, ++0xA7, 0x12, 0x20, 0xCE, 0x90, 0x82, 0xA1, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x60, 0xF5, 0x82, ++0xE4, 0x34, 0x87, 0xB1, 0xEC, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0xA7, 0xB1, 0xD8, 0xD0, 0x07, ++0xD0, 0x06, 0x02, 0x2E, 0xA2, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, ++0x22, 0x7F, 0xFF, 0x12, 0x47, 0xA8, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0xE6, 0x90, ++0x85, 0xBB, 0x12, 0x20, 0xDA, 0xCC, 0xF0, 0x00, 0xC0, 0x12, 0x4F, 0x8F, 0x12, 0x20, 0xDA, 0x00, ++0x00, 0x00, 0x14, 0xF1, 0x50, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, 0xE4, 0xFD, 0xFF, 0xD1, ++0xBF, 0xF1, 0x47, 0x44, 0x80, 0xFC, 0x90, 0x82, 0xD0, 0x12, 0x20, 0xCE, 0x90, 0x82, 0xD0, 0xB1, ++0xD8, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, ++0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xC0, 0x07, 0xC0, 0x05, 0x90, 0x82, 0xB5, 0x12, 0x44, 0xC2, ++0x90, 0x82, 0xA3, 0x12, 0x20, 0xCE, 0xD0, 0x05, 0xD0, 0x07, 0xD1, 0x00, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x7F, 0xFF, 0x12, 0x47, 0xA8, 0xE4, 0x90, 0x82, 0xD8, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, ++0xE0, 0x90, 0x82, 0xDA, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x12, 0x47, 0xA8, 0x90, 0x05, 0xF8, 0xE0, ++0x70, 0x11, 0xA3, 0xE0, 0x70, 0x0D, 0xA3, 0xE0, 0x70, 0x09, 0xA3, 0xE0, 0x70, 0x05, 0xF1, 0x3D, ++0x7F, 0x01, 0x22, 0xD3, 0x90, 0x82, 0xD9, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0xD8, 0xE0, 0x94, 0x03, ++0x40, 0x0C, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0xF1, 0x3D, 0x7F, 0x00, 0x22, 0x7F, 0x32, ++0x7E, 0x00, 0x12, 0x32, 0xAA, 0x90, 0x82, 0xD8, 0x12, 0x53, 0xD1, 0x80, 0xBF, 0x90, 0x82, 0xDA, ++0xE0, 0xFF, 0x7D, 0x48, 0x02, 0x47, 0xA8, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0xEC, 0x22, ++0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2E, 0xA2, 0x90, 0x82, 0xB5, 0x22, 0x7D, 0x2F, 0xD1, 0x61, 0x7D, ++0x08, 0x7F, 0x01, 0x02, 0x4B, 0xCE, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x91, 0xEE, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x50, 0x12, 0x1F, 0xA4, 0x25, 0x50, 0x90, ++0x80, 0x4A, 0x12, 0x4F, 0xBE, 0x25, 0x50, 0x90, 0x80, 0x4B, 0xF1, 0xC8, 0x25, 0x50, 0x90, 0x80, ++0x4C, 0xF1, 0xB9, 0x25, 0x50, 0x90, 0x80, 0x4D, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0x25, ++0x50, 0x90, 0x80, 0x4E, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x1F, 0xBD, 0x25, 0x50, 0x90, 0x80, 0x4F, ++0xF1, 0xC0, 0x25, 0x50, 0x90, 0x80, 0x50, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x1F, 0xBD, ++0xF0, 0x90, 0x00, 0x06, 0x02, 0x1F, 0xBD, 0x4F, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x1F, 0xBD, 0x12, ++0x1F, 0xA4, 0x90, 0x81, 0x55, 0x12, 0x4F, 0xBE, 0x90, 0x81, 0x56, 0xF1, 0xC8, 0x90, 0x81, 0x57, ++0xF1, 0xB9, 0x90, 0x81, 0x58, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0x90, 0x81, 0x59, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, 0x12, 0x1F, ++0xA4, 0xFF, 0x90, 0x81, 0x69, 0xF0, 0xBF, 0x01, 0x0D, 0x12, 0x4F, 0xBF, 0x64, 0x01, 0x60, 0x19, ++0x7D, 0x13, 0x7F, 0x6F, 0x80, 0x10, 0xAB, 0x50, 0xAA, 0x51, 0xA9, 0x52, 0x12, 0x4F, 0xBF, 0x64, ++0x01, 0x60, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x47, 0xA8, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x1F, ++0xA4, 0x90, 0x81, 0x5A, 0x12, 0x4F, 0xBE, 0x90, 0x81, 0x5B, 0x12, 0x67, 0xC8, 0x90, 0x81, 0x5C, ++0x12, 0x67, 0xB9, 0x90, 0x81, 0x5D, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0x90, 0x81, 0x5E, ++0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFF, 0x90, 0x81, 0xE9, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, ++0x22, 0x51, 0x63, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0x6F, 0xF0, 0xEF, 0x12, 0x5C, ++0x26, 0xA3, 0x12, 0x4F, 0xBE, 0xFF, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0x81, 0x6D, 0xE0, ++0x54, 0xF0, 0x4E, 0x12, 0x67, 0xB9, 0x54, 0x01, 0x25, 0xE0, 0xFE, 0x90, 0x81, 0x6A, 0xE0, 0x54, ++0xFD, 0x4E, 0xF0, 0xEF, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x12, 0x47, 0xDF, 0x12, 0x67, 0xC7, ++0x90, 0x81, 0x6E, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x1F, 0xBD, 0xFD, 0x7F, 0x02, 0x12, 0x4B, 0xCE, ++0x12, 0x57, 0x91, 0x11, 0xC6, 0x12, 0x5F, 0xA3, 0xF0, 0x90, 0x81, 0x6F, 0xB1, 0xBF, 0x12, 0x47, ++0xDF, 0x90, 0x01, 0xBE, 0xF0, 0x22, 0x90, 0x82, 0x0B, 0x12, 0x44, 0xE3, 0xD1, 0x23, 0x90, 0x81, ++0x6F, 0xE0, 0xFF, 0x12, 0x4E, 0x8C, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x19, 0x90, 0x82, 0x0B, 0x12, ++0x44, 0xDA, 0x12, 0x4F, 0xBF, 0x54, 0x0F, 0xFF, 0x12, 0x67, 0xC9, 0xFD, 0xD1, 0x49, 0x51, 0x14, ++0x74, 0x01, 0xF0, 0x11, 0xF6, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0x90, ++0x81, 0x6B, 0xE0, 0x12, 0x5C, 0x26, 0x30, 0xE0, 0x02, 0x21, 0xB5, 0x90, 0x81, 0x6A, 0xE0, 0x30, ++0xE0, 0x16, 0x90, 0x81, 0x8C, 0xE0, 0x24, 0x04, 0x90, 0x81, 0x84, 0xF0, 0x90, 0x81, 0x8C, 0xE0, ++0x24, 0x03, 0x90, 0x81, 0x83, 0xF0, 0x80, 0x0D, 0x90, 0x81, 0x84, 0x74, 0x02, 0xF0, 0x90, 0x81, ++0x83, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x81, 0x83, 0xE0, 0xFA, 0x90, 0x81, 0x82, 0xE0, 0xD3, 0x9A, ++0x50, 0x0E, 0x90, 0x81, 0x77, 0xEB, 0xF0, 0x90, 0x81, 0x84, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, 0x11, ++0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x81, 0x77, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, ++0x9F, 0x90, 0x81, 0x87, 0xF0, 0x90, 0x81, 0x84, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, 0xFC, ++0x90, 0x81, 0x87, 0x31, 0xC1, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, 0x81, 0x87, 0xE0, 0xFF, ++0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0x77, 0x31, 0xC1, 0x40, 0x04, 0xEF, 0x24, 0x23, ++0xF0, 0x90, 0x81, 0x87, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x81, 0x7B, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0x91, 0x6C, 0x90, 0x81, 0x6C, 0xE0, ++0x54, 0xFE, 0xF0, 0x80, 0x07, 0x90, 0x81, 0x6C, 0xE0, 0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0x51, 0x25, 0x90, 0x81, ++0xEE, 0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x4B, ++0xCE, 0x90, 0x81, 0xEE, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, ++0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0x90, 0x04, 0xEC, ++0x30, 0xE0, 0x06, 0xE0, 0x54, 0xDD, 0xF0, 0x80, 0x04, 0xE0, 0x44, 0x22, 0xF0, 0x51, 0x14, 0x74, ++0x02, 0xF0, 0x01, 0xF6, 0x90, 0x81, 0x81, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x81, 0x88, 0xE0, ++0xFB, 0x90, 0x82, 0xD7, 0x22, 0xE4, 0x90, 0x81, 0xEF, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x00, ++0x83, 0xE0, 0x90, 0x81, 0xEF, 0xF0, 0x90, 0x00, 0x83, 0xE0, 0xFE, 0x90, 0x81, 0xEF, 0xE0, 0xFF, ++0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x81, 0xF1, 0xE0, 0x94, 0x64, 0x90, 0x81, 0xF0, 0xE0, 0x94, ++0x00, 0x40, 0x08, 0xB1, 0x4B, 0x90, 0x81, 0xEF, 0xE0, 0xFF, 0x22, 0x90, 0x81, 0xF0, 0x12, 0x53, ++0xD1, 0x80, 0xCB, 0x90, 0x82, 0x08, 0x02, 0x44, 0xE3, 0x51, 0x63, 0xB1, 0xE4, 0x12, 0x57, 0x91, ++0x71, 0x52, 0x12, 0x5D, 0x16, 0x4E, 0xF0, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x2E, 0x12, 0x4F, 0xBF, ++0x90, 0x81, 0xDD, 0x12, 0x67, 0xC8, 0x90, 0x81, 0xDE, 0xF0, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x04, ++0xFE, 0x90, 0x81, 0xDC, 0xE0, 0x54, 0xFB, 0x4E, 0x12, 0x67, 0xB9, 0x90, 0x81, 0xDF, 0xF0, 0xEF, ++0x54, 0x08, 0xFF, 0x90, 0x81, 0xDC, 0xE0, 0x54, 0xF7, 0x4F, 0xF0, 0x22, 0x51, 0x63, 0x12, 0x57, ++0x91, 0x71, 0x52, 0x90, 0x81, 0xD3, 0x71, 0x79, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0xB1, 0x53, ++0x54, 0x04, 0x25, 0xE0, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0x81, 0xD3, 0xF0, 0xEE, 0x54, ++0x08, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0x12, 0x4F, 0xBE, 0xFB, 0xFF, 0x90, 0x05, 0x54, ++0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, 0x7C, 0x00, 0x7D, 0x05, 0x12, 0x20, 0x30, 0x90, ++0x81, 0xD5, 0xEF, 0xF0, 0xEB, 0x75, 0xF0, 0x05, 0x84, 0xA3, 0xF0, 0x12, 0x57, 0x91, 0x12, 0x1F, ++0xA4, 0x20, 0xE0, 0x0A, 0x12, 0x4E, 0x17, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x80, 0x0A, 0x7D, 0x0C, ++0x7F, 0x01, 0x12, 0x4B, 0xCE, 0x12, 0x47, 0xE6, 0x91, 0xF7, 0x20, 0xE0, 0x04, 0xEF, 0x54, 0xDF, ++0xF0, 0xB1, 0x71, 0x30, 0xE0, 0x14, 0x90, 0x81, 0x6F, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x71, ++0xF0, 0x71, 0x81, 0x90, 0x05, 0x58, 0x74, 0x05, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0x6F, 0xF0, 0x90, ++0x81, 0x71, 0x74, 0x0C, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0, 0x54, 0xFB, ++0xF0, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x01, 0xFE, 0x22, 0x71, 0x52, 0x90, 0x81, 0xD8, 0x71, ++0x79, 0x54, 0x04, 0xFF, 0xEE, 0x54, 0xFB, 0x4F, 0xF0, 0x12, 0x1F, 0xA4, 0xC3, 0x13, 0x30, 0xE0, ++0x07, 0x12, 0x4F, 0xBF, 0x90, 0x81, 0xD9, 0xF0, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, ++0x22, 0x90, 0x81, 0x6B, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, ++0x61, 0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x81, ++0xEA, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x4C, 0xA1, 0x60, 0x02, 0x81, 0x4F, 0x90, 0x81, 0x6F, ++0xE0, 0x70, 0x02, 0x81, 0x4F, 0x91, 0x50, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, ++0x81, 0x76, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x81, 0x75, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, ++0x90, 0x81, 0x75, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0x81, 0x76, 0xEF, 0xF0, 0xE4, 0x90, 0x81, ++0x78, 0x91, 0x6B, 0xB1, 0x82, 0xB1, 0xAB, 0x54, 0xEF, 0xF0, 0x90, 0x81, 0x6D, 0xE0, 0xFF, 0xC4, ++0x54, 0x0F, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x03, 0x12, 0x59, 0x59, 0xB1, 0xB4, 0x30, 0xE0, 0x4D, ++0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x1F, 0x91, 0x58, 0x6F, 0x70, 0x3F, 0x90, 0x81, ++0x6B, 0xE0, 0x44, 0x40, 0xF0, 0xB1, 0x43, 0x91, 0x60, 0xB1, 0x5B, 0x91, 0x76, 0x12, 0x4F, 0x6B, ++0x90, 0x81, 0x76, 0xE0, 0x14, 0xF0, 0x80, 0x25, 0x91, 0x50, 0x64, 0x01, 0x70, 0x1F, 0x91, 0x58, ++0xFE, 0x6F, 0x60, 0x19, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x10, 0xB1, 0x64, 0x30, ++0xE0, 0x0B, 0xEF, 0x54, 0xBF, 0x91, 0x60, 0x12, 0x4F, 0xC5, 0x12, 0x4F, 0x79, 0x71, 0x81, 0x22, ++0x90, 0x81, 0x6D, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x81, 0x75, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, ++0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x22, 0xF0, 0x90, 0x81, 0x7B, 0xA3, ++0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x4F, 0x6F, 0x90, 0x81, 0x6F, ++0xE0, 0x60, 0x2B, 0x90, 0x81, 0x6B, 0xB1, 0x7B, 0x30, 0xE0, 0x0C, 0x90, 0x01, 0x3B, 0xE0, 0x30, ++0xE4, 0x05, 0x12, 0x4F, 0x6B, 0x91, 0x76, 0x90, 0x82, 0xE5, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, ++0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x12, 0x47, ++0xEE, 0xBF, 0x03, 0x0D, 0x90, 0x01, 0xB8, 0xE0, 0x04, 0xF0, 0x90, 0x05, 0x21, 0xE0, 0x44, 0x80, ++0xF0, 0x12, 0x5D, 0x1D, 0xB1, 0x00, 0xE4, 0x90, 0x81, 0xDB, 0xF0, 0xB1, 0xFE, 0x90, 0x81, 0xD3, ++0xE0, 0x30, 0xE0, 0x0C, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xD5, 0x12, 0x48, 0xF4, 0x12, 0x47, 0xE6, ++0x90, 0x80, 0x07, 0xE0, 0xB4, 0x01, 0x0F, 0x91, 0xF7, 0x20, 0xE0, 0x0A, 0xEF, 0xC4, 0x13, 0x54, ++0x07, 0x20, 0xE0, 0x02, 0xD1, 0x76, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, ++0x90, 0x81, 0xD8, 0xE0, 0x30, 0xE0, 0x34, 0x12, 0x4C, 0xA1, 0x70, 0x2F, 0x90, 0x82, 0xEC, 0xE0, ++0x04, 0xF0, 0xE0, 0xB4, 0x0A, 0x0B, 0x90, 0x81, 0xDA, 0xE0, 0x04, 0xF0, 0xE4, 0x90, 0x82, 0xEC, ++0xF0, 0x90, 0x81, 0xDA, 0xE0, 0xFF, 0x90, 0x81, 0xD9, 0xE0, 0xD3, 0x9F, 0x50, 0x0D, 0x90, 0x81, ++0xDB, 0xE0, 0x70, 0x07, 0xE4, 0x90, 0x81, 0xDA, 0xF0, 0xB1, 0x3C, 0x22, 0x7D, 0x08, 0xE4, 0xFF, ++0x02, 0x5D, 0xA3, 0x90, 0x81, 0x75, 0xE0, 0x90, 0x05, 0x73, 0x22, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x40, 0xF0, 0x22, 0x4F, 0xFF, 0xF0, 0x12, 0x1F, 0xA4, 0xFE, 0x22, 0x74, 0x45, 0x2F, 0xF8, 0xE6, ++0x4D, 0x02, 0x4F, 0xC9, 0x90, 0x81, 0x6B, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x12, 0x4E, ++0x27, 0x90, 0x81, 0xD3, 0xE0, 0xC3, 0x13, 0x22, 0x90, 0x81, 0x6A, 0xE0, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x22, 0x12, 0x4C, 0xA1, ++0x70, 0x16, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x10, 0xB1, 0x82, 0xF0, 0x90, 0x81, 0x6A, 0xE0, 0xB1, ++0xA9, 0x54, 0x07, 0x70, 0x03, 0x12, 0x59, 0x30, 0x22, 0x54, 0xFB, 0xF0, 0x90, 0x81, 0x73, 0xE0, ++0x54, 0xFD, 0xF0, 0x22, 0x90, 0x81, 0x6B, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0xE0, ++0x90, 0x01, 0xBA, 0xF0, 0x90, 0x81, 0x71, 0xE0, 0x90, 0x01, 0xBB, 0xF0, 0x22, 0x90, 0x81, 0xE2, ++0xE0, 0x04, 0xF0, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x02, 0x60, 0x08, 0x71, 0x89, 0x90, 0x01, 0xE6, ++0xE0, 0x04, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xDC, ++0x12, 0x45, 0x12, 0x90, 0x81, 0xDD, 0x74, 0x08, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0x12, 0x57, ++0x9E, 0x30, 0xE0, 0x1E, 0xEF, 0x30, 0xE0, 0x1A, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x12, ++0x90, 0x81, 0x41, 0xE0, 0x70, 0x06, 0x12, 0x57, 0xCB, 0x02, 0x5C, 0xD9, 0x90, 0x81, 0x41, 0xE0, ++0x14, 0xF0, 0x22, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x81, 0x78, 0xF0, 0xA3, ++0xF0, 0x90, 0x81, 0x73, 0xF0, 0x90, 0x81, 0x6B, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x12, ++0x4F, 0x79, 0x7D, 0x10, 0x7F, 0x03, 0x02, 0x4F, 0xC5, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, ++0x24, 0x90, 0x81, 0x75, 0x74, 0x02, 0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, 0x90, 0x81, 0xCF, 0xE0, ++0x80, 0x02, 0xED, 0x14, 0x90, 0x81, 0x75, 0xF0, 0x90, 0x81, 0x75, 0xE0, 0xA3, 0xF0, 0x90, 0x81, ++0x6B, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x34, 0xC4, 0x13, 0x54, ++0x07, 0x20, 0xE0, 0x2D, 0x90, 0x82, 0xE9, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0xC8, 0x40, 0x21, ++0x90, 0x81, 0xD3, 0xE0, 0x44, 0x20, 0xF0, 0xE4, 0x90, 0x82, 0xE9, 0xF0, 0x90, 0x81, 0xD3, 0xE0, ++0x13, 0x30, 0xE0, 0x0D, 0x90, 0x81, 0x6A, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x81, 0x7A, 0x74, 0xD0, ++0xF0, 0x22, 0x12, 0x67, 0xC9, 0xFF, 0x30, 0xE0, 0x1E, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xCC, 0x12, ++0x4F, 0xBE, 0x90, 0x81, 0xCD, 0xF0, 0xEF, 0x54, 0xFE, 0xFF, 0xA3, 0xE0, 0x54, 0x01, 0x4F, 0x12, ++0x67, 0xB9, 0x90, 0x81, 0xCF, 0xF0, 0x22, 0x90, 0x81, 0xCC, 0x74, 0x02, 0xF0, 0xA3, 0x74, 0x0F, ++0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x22, 0x12, 0x1F, 0xA4, ++0x90, 0x81, 0x7A, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xD2, 0xF0, 0x22, 0xE4, 0x90, 0x81, ++0x39, 0xF0, 0xA3, 0xF0, 0x90, 0x80, 0xA1, 0xF0, 0xA3, 0xF0, 0x22, 0x75, 0x3D, 0x10, 0xE4, 0xF5, ++0x3E, 0x75, 0x3F, 0x87, 0x75, 0x40, 0x03, 0x90, 0x01, 0x30, 0xE5, 0x3D, 0xF0, 0xA3, 0xE5, 0x3E, ++0xF0, 0xA3, 0xE5, 0x3F, 0xF0, 0xA3, 0xE5, 0x40, 0xF0, 0x22, 0x75, 0x45, 0x0E, 0x75, 0x46, 0x01, ++0x75, 0x47, 0x23, 0x75, 0x48, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x45, 0xF0, 0xA3, 0xE5, 0x46, 0xF0, ++0xA3, 0xE5, 0x47, 0xF0, 0xA3, 0xE5, 0x48, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0x49, ++0xF0, 0x74, 0x6F, 0xA3, 0xF0, 0x90, 0x81, 0xD7, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, ++0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, ++0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE, 0x74, 0x49, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x6F, ++0xA3, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x3D, 0xF5, 0x41, 0xA3, 0xE0, 0x55, ++0x3E, 0xF5, 0x42, 0xA3, 0xE0, 0x55, 0x3F, 0xF5, 0x43, 0xA3, 0xE0, 0x55, 0x40, 0xF5, 0x44, 0x90, ++0x01, 0x34, 0xE5, 0x41, 0xF0, 0xA3, 0xE5, 0x42, 0xF0, 0xA3, 0xE5, 0x43, 0xF0, 0xA3, 0xE5, 0x44, ++0xF0, 0x22, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x45, 0xF5, 0x49, 0xA3, 0xE0, 0x55, 0x46, 0xF5, 0x4A, ++0xA3, 0xE0, 0x55, 0x47, 0xF5, 0x4B, 0xA3, 0xE0, 0x55, 0x48, 0xF5, 0x4C, 0x90, 0x01, 0x3C, 0xE5, ++0x49, 0xF0, 0xA3, 0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, 0xF0, 0xA3, 0xE5, 0x4C, 0xF0, 0x53, 0x91, ++0xDF, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x82, 0xE6, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, ++0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, ++0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x50, 0x64, 0x90, ++0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x32, 0x1E, 0x80, 0xFE, 0x22, 0xE4, 0xFF, ++0x12, 0x4C, 0xA9, 0xBF, 0x01, 0x13, 0x90, 0x81, 0x6F, 0xE0, 0x60, 0x0D, 0x12, 0x47, 0xDF, 0x64, ++0x02, 0x60, 0x03, 0x02, 0x5F, 0x67, 0x12, 0x47, 0xCE, 0x22, 0x90, 0x05, 0x50, 0xE0, 0x44, 0x01, ++0xF0, 0x12, 0x47, 0xEE, 0xBF, 0x03, 0x02, 0x11, 0x4A, 0x22, 0x90, 0x05, 0x21, 0xE0, 0x54, 0x7F, ++0xF0, 0x22, 0xEF, 0x90, 0x02, 0x86, 0x60, 0x06, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x04, 0xE0, 0x54, ++0xFB, 0xF0, 0x90, 0x80, 0x06, 0xED, 0xF0, 0x22, 0x90, 0x01, 0xC4, 0x74, 0x68, 0xF0, 0x74, 0x70, ++0xA3, 0xF0, 0x90, 0x00, 0x90, 0xE0, 0x20, 0xE0, 0xF9, 0x74, 0x68, 0x04, 0x90, 0x01, 0xC4, 0xF0, ++0x74, 0x70, 0xA3, 0xF0, 0x22, 0x90, 0x81, 0x6B, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x81, 0x7A, 0xE0, ++0xFD, 0x7F, 0x93, 0x12, 0x32, 0x1E, 0x90, 0x81, 0x70, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, ++0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, 0x00, ++0x08, 0xE0, 0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, 0x7F, 0x01, 0x12, 0x53, 0xD8, 0x90, ++0x00, 0x90, 0xE0, 0x44, 0x01, 0xFD, 0x7F, 0x90, 0x12, 0x32, 0x1E, 0x7F, 0x14, 0x7E, 0x00, 0x02, ++0x32, 0xAA, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, ++0x54, 0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x11, 0xD2, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0F, 0x01, 0x80, 0x51, 0x90, 0x81, ++0x73, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, 0x02, 0x80, 0x43, 0x90, 0x81, 0x71, 0xE0, ++0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, 0x80, 0x34, 0xEF, 0x30, 0xE2, 0x05, 0x75, ++0x0F, 0x08, 0x80, 0x2B, 0x90, 0x81, 0x73, 0xE0, 0x30, 0xE4, 0x05, 0x75, 0x0F, 0x10, 0x80, 0x1F, ++0x90, 0x81, 0x6B, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05, 0x75, 0x0F, 0x20, 0x80, 0x0F, ++0x90, 0x81, 0xD2, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, 0x80, 0x04, 0x31, 0x62, 0x80, 0x0E, 0x90, ++0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0F, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, ++0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, 0x75, 0x4F, 0x01, 0x80, 0x22, 0x90, ++0x02, 0x96, 0xE0, 0x60, 0x05, 0x75, 0x4F, 0x10, 0x80, 0x17, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, ++0x02, 0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x4F, 0x04, 0x80, 0x02, 0x80, ++0xC1, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x4F, 0xF0, 0x7F, 0x00, 0x22, ++0x7D, 0x2E, 0x7F, 0x6F, 0x12, 0x47, 0xA8, 0x7D, 0x02, 0x7F, 0x01, 0x02, 0x4B, 0xCE, 0x90, 0x81, ++0x6A, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x55, 0x87, 0x22, 0x90, 0x82, 0xBF, 0xE0, 0xFF, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xEA, 0xEF, 0xF0, 0x90, 0x80, 0x4C, 0xE0, 0xFF, 0x90, ++0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x41, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x0E, 0x70, 0x19, 0x90, 0x82, ++0xEA, 0xE0, 0x70, 0x33, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0x7F, 0xF0, 0x12, 0x4F, 0xD8, 0x7D, 0x0C, ++0x7F, 0x01, 0x12, 0x4B, 0xCE, 0x80, 0x1D, 0x90, 0x81, 0x72, 0xE0, 0x64, 0x06, 0x70, 0x18, 0x90, ++0x82, 0xEA, 0xE0, 0x60, 0x12, 0x90, 0x81, 0x6A, 0xE0, 0x54, 0xBF, 0xF0, 0x51, 0x2C, 0x90, 0x81, ++0x72, 0x74, 0x04, 0xF0, 0x12, 0x4E, 0x19, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x74, 0x67, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, ++0xF5, 0x83, 0xE0, 0xFF, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, 0xE0, 0x02, 0x7E, 0x80, ++0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x90, 0x82, 0x04, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x90, 0x02, 0x84, 0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0xA3, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x7D, 0x7F, ++0xEF, 0x5D, 0xC3, 0x60, 0x0A, 0x51, 0x83, 0x24, 0x80, 0xFF, 0xE4, 0x3E, 0xFE, 0x80, 0x03, 0x51, ++0x83, 0xFF, 0x22, 0x74, 0xFF, 0x9D, 0xFD, 0x74, 0xFF, 0x94, 0x00, 0x5E, 0xFE, 0xED, 0x5F, 0x22, ++0x90, 0x82, 0x87, 0x12, 0x44, 0xE3, 0xE4, 0xFF, 0x90, 0x82, 0x8D, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, ++0x50, 0x1E, 0x90, 0x82, 0x8A, 0x12, 0x44, 0xDA, 0x8F, 0x82, 0x51, 0xD9, 0xFE, 0x90, 0x82, 0x87, ++0x12, 0x44, 0xDA, 0x8F, 0x82, 0x51, 0xD9, 0x6E, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xD8, ++0x7F, 0x01, 0x22, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0x58, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, ++0x12, 0x44, 0xDA, 0x90, 0x82, 0x0E, 0xE0, 0xF5, 0x82, 0x75, 0x83, 0x00, 0x02, 0x1F, 0xBD, 0x74, ++0x03, 0xF0, 0x7A, 0x82, 0x79, 0xAF, 0x51, 0x90, 0xEF, 0x22, 0x74, 0x03, 0xF0, 0x7A, 0x82, 0x79, ++0xAB, 0x51, 0x90, 0xEF, 0x22, 0x12, 0x57, 0x9E, 0x30, 0xE0, 0x0A, 0xEF, 0xC4, 0x54, 0x0F, 0x30, ++0xE0, 0x03, 0x02, 0x79, 0x6A, 0x90, 0x81, 0x5A, 0xE0, 0x90, 0x82, 0x67, 0xF0, 0x90, 0x81, 0x5B, ++0xE0, 0x90, 0x82, 0x68, 0xF0, 0x90, 0x81, 0x5C, 0xE0, 0x90, 0x82, 0x69, 0xF0, 0x90, 0x81, 0x5D, ++0xE0, 0x90, 0x82, 0x6A, 0xF0, 0x90, 0x81, 0x5E, 0xE0, 0x90, 0x82, 0x6B, 0xF0, 0x90, 0x81, 0x4B, ++0xE0, 0x90, 0x82, 0x6C, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x90, 0x82, 0x6D, 0xF0, 0x90, 0x81, 0x4D, ++0xE0, 0x90, 0x82, 0x6E, 0xF0, 0x90, 0x81, 0x4E, 0xE0, 0x90, 0x82, 0x6F, 0xF0, 0x90, 0x81, 0x4F, ++0xE0, 0x90, 0x82, 0x70, 0xF0, 0x90, 0x81, 0x50, 0xE0, 0x90, 0x82, 0x71, 0xF0, 0x90, 0x81, 0x51, ++0xE0, 0x90, 0x82, 0x72, 0xF0, 0x90, 0x81, 0x52, 0xE0, 0x90, 0x82, 0x73, 0xF0, 0x90, 0x81, 0x53, ++0xE0, 0x90, 0x82, 0x74, 0xF0, 0x90, 0x81, 0x54, 0xE0, 0x90, 0x82, 0x75, 0xF0, 0x12, 0x79, 0xEF, ++0x12, 0x50, 0x8A, 0x90, 0x82, 0x0F, 0xF0, 0x12, 0x79, 0x78, 0x50, 0x05, 0x12, 0x79, 0x85, 0x80, ++0xF6, 0x90, 0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, 0x12, 0x63, 0x3F, 0x90, 0x82, 0x04, 0xF0, ++0xA3, 0x12, 0x79, 0xDF, 0x12, 0x79, 0x78, 0x50, 0x4D, 0x51, 0x38, 0x90, 0x82, 0x0F, 0xE0, 0xFE, ++0x24, 0x76, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x12, 0x7A, 0x78, 0x24, 0x45, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x11, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x12, 0x7A, 0x78, ++0x24, 0x46, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xEE, 0x12, 0x7A, 0x52, 0x12, 0x44, 0xE3, ++0x12, 0x7A, 0x7C, 0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0xEE, 0x12, 0x79, 0xF8, 0x12, 0x44, ++0xE3, 0x12, 0x79, 0x92, 0x80, 0xAE, 0x90, 0x02, 0x87, 0xE0, 0x70, 0x03, 0x02, 0x79, 0x6A, 0x90, ++0x81, 0x3D, 0xE0, 0x20, 0xE0, 0x03, 0x02, 0x79, 0x6A, 0xC3, 0x13, 0x30, 0xE0, 0x0A, 0xE0, 0xC4, ++0x54, 0x0F, 0x30, 0xE0, 0x03, 0x02, 0x79, 0x6A, 0xE4, 0x90, 0x82, 0x80, 0x12, 0x50, 0x8A, 0x90, ++0x82, 0x04, 0xE0, 0xFF, 0xA3, 0xE0, 0xA3, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x82, 0x06, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0x90, 0xFD, 0x11, 0xF0, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0xFB, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x00, 0x2D, 0x12, 0x7A, 0xC7, 0x7A, 0x00, 0x24, 0x00, 0xFF, ++0xEA, 0x3E, 0x54, 0x3F, 0x90, 0x82, 0x08, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90, 0x82, 0x0B, ++0xF0, 0xFC, 0x74, 0x07, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x90, ++0x82, 0x0D, 0xF0, 0xEC, 0x24, 0x18, 0x90, 0x82, 0x0A, 0xF0, 0xFD, 0x90, 0x82, 0x06, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x12, 0x51, 0x88, 0xEF, 0x54, 0xFC, 0x90, 0x82, 0x0C, 0xF0, 0x90, 0x82, 0x0B, ++0xE0, 0x24, 0x18, 0xFF, 0xE4, 0x33, 0x90, 0x82, 0x08, 0x8F, 0xF0, 0x12, 0x44, 0x9F, 0x90, 0x82, ++0x08, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x51, 0x6E, 0x90, 0x82, 0x04, 0xEE, 0x8F, 0xF0, 0x12, 0x44, ++0x9F, 0x90, 0x81, 0x3B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x82, 0x04, 0xE0, 0xFC, 0xA3, 0xE0, ++0xFD, 0xD3, 0x9F, 0xEC, 0x9E, 0x40, 0x12, 0x90, 0x81, 0x3C, 0x12, 0x7A, 0xAE, 0xED, 0x9F, 0xFF, ++0xEC, 0x9E, 0x90, 0x82, 0x04, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x81, 0xD3, 0xE0, 0x30, 0xE0, 0x0A, ++0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x03, 0x02, 0x79, 0x64, 0x12, 0x57, 0x97, 0x20, 0xE0, 0x02, ++0xE1, 0x34, 0xE4, 0x90, 0x82, 0x10, 0xF0, 0x90, 0x82, 0x0F, 0xF0, 0x12, 0x79, 0x78, 0x50, 0x38, ++0x51, 0x38, 0xE4, 0x90, 0x82, 0x0E, 0xF0, 0x12, 0x79, 0xB6, 0x94, 0x06, 0x50, 0x16, 0x12, 0x79, ++0x6B, 0x24, 0x04, 0x12, 0x53, 0x76, 0x90, 0x82, 0x0F, 0xE0, 0x51, 0xC3, 0xB5, 0x07, 0x05, 0x12, ++0x52, 0x5C, 0x80, 0xE3, 0x90, 0x82, 0x0E, 0xE0, 0xB4, 0x06, 0x08, 0x90, 0x82, 0x10, 0x74, 0x01, ++0xF0, 0x80, 0x05, 0x12, 0x79, 0x92, 0x80, 0xC3, 0x90, 0x82, 0x0C, 0xE0, 0x24, 0x60, 0x70, 0x02, ++0xC1, 0xDA, 0x24, 0xFC, 0x70, 0x02, 0xC1, 0xDA, 0x24, 0xF4, 0x70, 0x02, 0xC1, 0xCE, 0x24, 0xF0, ++0x70, 0x02, 0xC1, 0xDA, 0x24, 0x80, 0x60, 0x02, 0xC1, 0xEF, 0x12, 0x79, 0x6B, 0x24, 0x18, 0xFD, ++0x12, 0x51, 0x88, 0xEF, 0x60, 0x03, 0x02, 0x78, 0x8A, 0x12, 0x79, 0x6B, 0x12, 0x52, 0x6C, 0x12, ++0x79, 0xD7, 0x12, 0x79, 0xB1, 0x9F, 0x50, 0x0B, 0x12, 0x79, 0x6B, 0x12, 0x52, 0x80, 0x12, 0x52, ++0x58, 0x80, 0xEF, 0x90, 0x82, 0x25, 0xE0, 0x70, 0x02, 0xC1, 0x25, 0xE4, 0x90, 0x82, 0x0F, 0xF0, ++0x12, 0x79, 0x78, 0x50, 0x67, 0x51, 0x38, 0x12, 0x7A, 0x60, 0x70, 0x1E, 0x12, 0x7A, 0x51, 0x12, ++0x44, 0xDA, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x12, 0x7A, 0x41, 0xED, 0xF0, 0xD0, 0x01, 0xD0, ++0x02, 0xD0, 0x03, 0x51, 0x90, 0xEF, 0x60, 0x02, 0x80, 0x28, 0x90, 0x82, 0x25, 0xE0, 0x64, 0x03, ++0x70, 0x2D, 0x12, 0x7A, 0x41, 0x51, 0xDF, 0x70, 0x07, 0x12, 0x7A, 0x41, 0x51, 0xEA, 0x60, 0x1A, ++0x12, 0x7A, 0x88, 0x60, 0x02, 0x80, 0x06, 0x12, 0x79, 0xBD, 0xE0, 0x60, 0x05, 0x74, 0x80, 0x2F, ++0x80, 0x10, 0x12, 0x79, 0x99, 0x74, 0x01, 0xF0, 0x80, 0x0D, 0x12, 0x7A, 0xA7, 0x80, 0x03, 0x12, ++0x7A, 0xA7, 0x12, 0x79, 0x9F, 0xE4, 0xF0, 0x12, 0x79, 0x92, 0x80, 0x94, 0x90, 0x82, 0x80, 0xE0, ++0x70, 0x57, 0xA3, 0xE0, 0x70, 0x53, 0xA3, 0xE0, 0x70, 0x4F, 0xA3, 0xE0, 0x70, 0x4B, 0xA3, 0xE0, ++0x70, 0x47, 0x02, 0x78, 0x8A, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x12, 0x79, 0x78, 0x50, 0x21, 0x74, ++0x6C, 0x2E, 0x12, 0x79, 0xC4, 0xE0, 0x60, 0x0A, 0x74, 0x80, 0x2E, 0x12, 0x79, 0x9F, 0xE4, 0xF0, ++0x80, 0x09, 0x74, 0x80, 0x2E, 0x12, 0x79, 0x9F, 0x74, 0x01, 0xF0, 0x12, 0x79, 0x92, 0x80, 0xDA, ++0x90, 0x82, 0x80, 0xE0, 0x70, 0x13, 0xA3, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, ++0x70, 0x07, 0xA3, 0xE0, 0x70, 0x03, 0x02, 0x78, 0x8A, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x12, 0x79, ++0x78, 0x40, 0x03, 0x02, 0x78, 0x8A, 0x51, 0x38, 0x12, 0x79, 0x99, 0xE0, 0x60, 0x4B, 0x12, 0x79, ++0xE7, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1B, 0xD3, 0x90, 0x82, 0x86, 0xE0, 0x94, 0x28, 0x90, 0x82, ++0x85, 0xE0, 0x94, 0x00, 0x50, 0x0C, 0x7F, 0xFA, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x12, 0x53, 0xCE, ++0x80, 0xDF, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x21, 0x12, 0x7A, 0x06, 0x74, 0x0A, 0xF0, 0xE4, 0xFB, ++0x12, 0x79, 0xCC, 0x12, 0x79, 0xB6, 0x94, 0x06, 0x50, 0x08, 0x12, 0x79, 0x6B, 0x12, 0x52, 0x3E, ++0x80, 0xF1, 0x12, 0x5F, 0x89, 0x90, 0x06, 0x35, 0xF0, 0x12, 0x79, 0x92, 0x80, 0xA0, 0x90, 0x82, ++0x10, 0xE0, 0xB4, 0x01, 0x02, 0x80, 0x55, 0x02, 0x79, 0x64, 0x90, 0x82, 0x10, 0xE0, 0xB4, 0x01, ++0x0B, 0x90, 0x81, 0x3D, 0x12, 0x6D, 0x67, 0x30, 0xE0, 0x02, 0x80, 0x40, 0x02, 0x79, 0x64, 0x90, ++0x82, 0x0D, 0xE0, 0x70, 0x12, 0x90, 0x82, 0x10, 0xE0, 0xB4, 0x01, 0x0B, 0x90, 0x81, 0x3D, 0xE0, ++0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x03, 0x02, 0x79, 0x64, 0x12, 0x79, 0x6B, 0xFD, 0x12, 0x53, ++0x3A, 0xEF, 0x60, 0x02, 0x80, 0x16, 0x12, 0x79, 0x6B, 0xFD, 0x12, 0x52, 0x14, 0xEF, 0x60, 0x02, ++0x80, 0x0A, 0x12, 0x79, 0x6B, 0xFD, 0x12, 0x51, 0xB8, 0xEF, 0x60, 0x05, 0x12, 0x57, 0xD6, 0x61, ++0xF6, 0x02, 0x79, 0x64, 0x90, 0x82, 0x0C, 0xE0, 0x24, 0xC0, 0x60, 0x03, 0x02, 0x78, 0x96, 0x12, ++0x79, 0x6B, 0x24, 0x18, 0xFD, 0x12, 0x51, 0x88, 0xEF, 0x60, 0x03, 0x02, 0x78, 0x8A, 0x12, 0x79, ++0x6B, 0x12, 0x52, 0x6C, 0x12, 0x79, 0xD7, 0x12, 0x79, 0xB1, 0x9F, 0x50, 0x0B, 0x12, 0x79, 0x6B, ++0x12, 0x52, 0x80, 0x12, 0x52, 0x58, 0x80, 0xEF, 0x90, 0x82, 0x25, 0xE0, 0x70, 0x02, 0xE1, 0xFA, ++0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x12, 0x79, 0x78, 0x50, 0x67, 0x51, 0x38, 0x12, 0x7A, 0x60, 0x70, ++0x1E, 0x12, 0x7A, 0x51, 0x12, 0x44, 0xDA, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x12, 0x7A, 0x41, ++0xED, 0xF0, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x51, 0x90, 0xEF, 0x60, 0x02, 0x80, 0x28, 0x90, ++0x82, 0x25, 0xE0, 0x64, 0x03, 0x70, 0x2D, 0x12, 0x7A, 0x41, 0x51, 0xDF, 0x70, 0x07, 0x12, 0x7A, ++0x41, 0x51, 0xEA, 0x60, 0x1A, 0x12, 0x7A, 0x88, 0x60, 0x02, 0x80, 0x06, 0x12, 0x79, 0xBD, 0xE0, ++0x60, 0x05, 0x74, 0x80, 0x2F, 0x80, 0x10, 0x12, 0x79, 0x99, 0x74, 0x01, 0xF0, 0x80, 0x0D, 0x12, ++0x7A, 0xA7, 0x80, 0x03, 0x12, 0x7A, 0xA7, 0x12, 0x79, 0x9F, 0xE4, 0xF0, 0x12, 0x79, 0x92, 0x80, ++0x94, 0x90, 0x82, 0x80, 0xE0, 0x70, 0x4F, 0xA3, 0xE0, 0x70, 0x4B, 0xA3, 0xE0, 0x70, 0x47, 0xA3, ++0xE0, 0x70, 0x43, 0xA3, 0xE0, 0x70, 0x3F, 0x02, 0x78, 0x8A, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x31, ++0x78, 0x50, 0x1D, 0x74, 0x6C, 0x2E, 0x31, 0xC4, 0xE0, 0x60, 0x09, 0x74, 0x80, 0x2E, 0x31, 0x9F, ++0xE4, 0xF0, 0x80, 0x08, 0x74, 0x80, 0x2E, 0x31, 0x9F, 0x74, 0x01, 0xF0, 0x31, 0x92, 0x80, 0xDF, ++0x90, 0x82, 0x80, 0xE0, 0x70, 0x10, 0xA3, 0xE0, 0x70, 0x0C, 0xA3, 0xE0, 0x70, 0x08, 0xA3, 0xE0, ++0x70, 0x04, 0xA3, 0xE0, 0x60, 0x54, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x31, 0x78, 0x50, 0x4B, 0x12, ++0x72, 0x38, 0x31, 0x99, 0xE0, 0x60, 0x3F, 0x31, 0xE7, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x14, 0xD3, ++0x90, 0x82, 0x86, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0x85, 0xE0, 0x94, 0x03, 0x50, 0x05, 0x12, 0x53, ++0xCE, 0x80, 0xE6, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1D, 0x51, 0x06, 0x74, 0x06, 0xF0, 0x7B, 0x08, ++0x31, 0xCC, 0x31, 0xB6, 0x94, 0x06, 0x50, 0x07, 0x31, 0x6B, 0x12, 0x52, 0x3E, 0x80, 0xF3, 0x12, ++0x5F, 0x89, 0x90, 0x06, 0x35, 0xF0, 0x31, 0x92, 0x80, 0xB1, 0x12, 0x72, 0x58, 0x90, 0x06, 0x36, ++0x74, 0xDD, 0xF0, 0x02, 0x73, 0xF6, 0x90, 0x82, 0x0D, 0xE0, 0x60, 0x02, 0x21, 0x64, 0x31, 0x6B, ++0x24, 0x16, 0xFD, 0x12, 0x51, 0x88, 0x90, 0x06, 0x34, 0xEF, 0xF0, 0x31, 0x6B, 0x24, 0x17, 0xFD, ++0x12, 0x51, 0x88, 0x90, 0x06, 0x37, 0x31, 0xDF, 0x31, 0x78, 0x50, 0x62, 0x12, 0x72, 0x38, 0xE4, ++0x90, 0x82, 0x0E, 0xF0, 0x90, 0x82, 0x0E, 0xE0, 0xFF, 0xC3, 0x94, 0x06, 0x50, 0x4C, 0xEF, 0x60, ++0x04, 0x64, 0x01, 0x70, 0x22, 0x31, 0x6B, 0x12, 0x52, 0x75, 0x90, 0x82, 0x0E, 0xE0, 0xFE, 0x24, ++0x44, 0x31, 0xA7, 0x90, 0x82, 0x0F, 0xE0, 0x31, 0xF8, 0x12, 0x44, 0xDA, 0x8E, 0x82, 0x12, 0x72, ++0xD9, 0xFF, 0x74, 0x46, 0x2E, 0x31, 0xA7, 0x31, 0x6B, 0x12, 0x52, 0x75, 0x90, 0x82, 0x0F, 0xE0, ++0xFE, 0x12, 0x72, 0xC3, 0x6F, 0x60, 0x0E, 0x74, 0x7B, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, ++0x83, 0xE4, 0xF0, 0x80, 0x05, 0x12, 0x52, 0x5C, 0x80, 0xAA, 0x31, 0x92, 0x80, 0x9A, 0x90, 0x82, ++0x7B, 0xE0, 0x64, 0x01, 0x60, 0x17, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x11, 0xA3, 0xE0, 0x64, 0x01, ++0x60, 0x0B, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x05, 0xA3, 0xE0, 0xB4, 0x01, 0x06, 0x90, 0x82, 0x10, ++0x74, 0x01, 0xF0, 0x90, 0x82, 0x10, 0xE0, 0xB4, 0x01, 0x09, 0x12, 0x57, 0xCB, 0x12, 0x5C, 0xD9, ++0x02, 0x73, 0xF6, 0x31, 0xEF, 0x12, 0x50, 0x8A, 0x90, 0x82, 0x0F, 0xF0, 0x31, 0x78, 0x50, 0x04, ++0x31, 0x85, 0x80, 0xF8, 0x12, 0x72, 0x58, 0x02, 0x73, 0xF6, 0x22, 0x90, 0x82, 0x06, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x90, 0x82, 0x0A, 0xE0, 0x22, 0x90, 0x81, 0x48, 0xE0, 0xFF, 0x90, 0x82, 0x0F, ++0xE0, 0xFE, 0xC3, 0x9F, 0x22, 0x74, 0x7B, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x74, ++0x01, 0xF0, 0x90, 0x82, 0x0F, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x82, 0x0F, 0xE0, 0x24, 0x80, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xEF, 0xF0, ++0x22, 0x90, 0x82, 0x25, 0xE0, 0xFF, 0x90, 0x82, 0x0E, 0xE0, 0xFD, 0xC3, 0x22, 0x90, 0x82, 0x0F, ++0xE0, 0xFF, 0x24, 0x6C, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x7D, 0x01, 0x12, 0x5E, ++0x9B, 0x90, 0x82, 0x08, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x82, 0x0E, 0xF0, 0x22, 0xEF, ++0xF0, 0xE4, 0x90, 0x82, 0x0F, 0xF0, 0x22, 0xE4, 0x90, 0x82, 0x85, 0xF0, 0xA3, 0xF0, 0x22, 0xE4, ++0x90, 0x82, 0x10, 0xF0, 0x90, 0x82, 0x7B, 0x22, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0x58, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x90, 0x82, 0x0F, 0xE0, 0x24, 0x67, 0xF5, 0x82, 0xE4, 0x34, ++0x82, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x82, 0xCB, 0x22, 0xEF, 0x30, 0xE7, 0x04, 0x7E, 0x02, 0x80, ++0x02, 0xE4, 0xFE, 0xED, 0x30, 0xE6, 0x12, 0xEB, 0x20, 0xE0, 0x07, 0x90, 0x81, 0x42, 0xE0, 0xFC, ++0x80, 0x09, 0x90, 0x81, 0x43, 0xE0, 0xFC, 0x80, 0x02, 0xE4, 0xFC, 0xEE, 0x24, 0x18, 0x2C, 0xFF, ++0x22, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x26, 0x90, 0x82, 0x8A, 0x12, 0x44, 0xE3, 0x90, 0x82, 0x8D, ++0x22, 0xEF, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, ++0x90, 0x82, 0x0F, 0xE0, 0xFF, 0x24, 0x11, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFE, ++0x90, 0x82, 0x25, 0xE0, 0xFD, 0xEE, 0x6D, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x76, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x82, 0x0F, 0xE0, 0xFF, 0x24, 0x71, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x81, 0x8C, 0xE0, 0x24, 0x04, 0x90, 0x81, ++0x87, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0x90, 0x82, 0x0F, 0xE0, 0x24, 0x80, 0x22, 0xE0, 0x24, ++0x01, 0xFF, 0x90, 0x81, 0x3B, 0xE0, 0x34, 0x00, 0xFE, 0xC3, 0x22, 0xEF, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0xFE, 0xEF, 0x54, 0x07, 0xFF, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, ++0x90, 0x81, 0xD3, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x68, 0x28, ++}; ++u4Byte ArrayLength_MP_8188E_T_FW_AP = 15098; ++ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188E_T_FW_AP; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188E_T_FW_AP, ArrayLength_MP_8188E_T_FW_AP); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188E_T_FW_AP; ++} ++ ++ ++#endif /* #if (defined(CONFIG_AP_WOWLAN)||(DM_ODM_SUPPORT_TYPE & (ODM_AP)) */ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++ ++u1Byte Array_MP_8188E_T_FW_NIC[] = { ++0xE1, 0x88, 0x10, 0x00, 0x16, 0x00, 0x00, 0x00, 0x03, 0x03, 0x11, 0x58, 0x16, 0x3C, 0x00, 0x00, ++0x28, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x45, 0x9B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xC1, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xC1, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE1, 0xFC, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x41, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x46, 0x2F, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x46, 0x2F, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x41, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x41, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x41, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xE7, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, ++0x46, 0xE7, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x3E, 0x88, 0x82, 0x8C, 0x83, 0xE7, 0x09, 0xF0, ++0xA3, 0xDF, 0xFA, 0x80, 0x32, 0xE3, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x78, 0xE3, 0x09, 0xF2, ++0x08, 0xDF, 0xFA, 0x80, 0x70, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, ++0x64, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x58, 0x89, 0x82, 0x8A, ++0x83, 0xE0, 0xA3, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x4C, 0x80, 0xD2, 0x80, 0xFA, 0x80, 0xC6, 0x80, ++0xD4, 0x80, 0x69, 0x80, 0xF2, 0x80, 0x33, 0x80, 0x10, 0x80, 0xA6, 0x80, 0xEA, 0x80, 0x9A, 0x80, ++0xA8, 0x80, 0xDA, 0x80, 0xE2, 0x80, 0xCA, 0x80, 0x33, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, ++0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, ++0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0x0D, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, ++0xA3, 0xF6, 0x08, 0xDF, 0xF9, 0xEC, 0xFA, 0xA9, 0xF0, 0xED, 0xFB, 0x22, 0x89, 0x82, 0x8A, 0x83, ++0xEC, 0xFA, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xEA, 0xDE, 0xE8, 0x80, 0xDB, 0x89, 0x82, 0x8A, 0x83, ++0xE4, 0x93, 0xA3, 0xF2, 0x08, 0xDF, 0xF9, 0x80, 0xCC, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, ++0x60, 0xC3, 0x88, 0xF0, 0xED, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0xB9, 0xF5, 0x82, 0xEB, 0x24, ++0x02, 0xB4, 0x04, 0x00, 0x50, 0xAF, 0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x43, 0xF9, 0x73, 0xC5, ++0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, 0x02, 0x15, ++0x83, 0xE0, 0x38, 0xF0, 0x22, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xFE, 0xED, 0x99, 0xFD, 0xEC, ++0x98, 0xFC, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, 0xEC, 0x58, 0xFC, 0x22, ++0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, 0xEB, 0x9F, 0xF5, ++0xF0, 0xEA, 0x9E, 0x42, 0xF0, 0xE9, 0x9D, 0x42, 0xF0, 0xE8, 0x9C, 0x45, 0xF0, 0x22, 0xE0, 0xFC, ++0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE2, 0xFC, 0x08, 0xE2, 0xFD, 0x08, ++0xE2, 0xFE, 0x08, 0xE2, 0xFF, 0x22, 0xE0, 0xF8, 0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, ++0xFB, 0x22, 0xE2, 0xFB, 0x08, 0xE2, 0xF9, 0x08, 0xE2, 0xFA, 0x08, 0xE2, 0xCB, 0xF8, 0x22, 0xEC, ++0xF2, 0x08, 0xED, 0xF2, 0x08, 0xEE, 0xF2, 0x08, 0xEF, 0xF2, 0x22, 0xA4, 0x25, 0x82, 0xF5, 0x82, ++0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, ++0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, ++0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, ++0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xEF, ++0x4E, 0x60, 0x12, 0xEF, 0x60, 0x01, 0x0E, 0xED, 0xBB, 0x01, 0x0B, 0x89, 0x82, 0x8A, 0x83, 0xF0, ++0xA3, 0xDF, 0xFC, 0xDE, 0xFA, 0x22, 0x89, 0xF0, 0x50, 0x07, 0xF7, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, ++0x22, 0xBB, 0xFE, 0xFC, 0xF3, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0x02, 0x45, 0xD9, 0x02, 0x41, ++0xDD, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, 0xF2, 0x08, 0xDF, ++0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, 0xC4, 0x54, ++0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, 0xE4, 0x80, ++0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x46, 0x1E, 0xE4, 0x7E, 0x01, 0x93, ++0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, 0xA3, 0x60, ++0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, 0xA3, 0xFA, 0xE4, ++0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, ++0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x82, ++0xD2, 0x00, 0x41, 0x82, 0xD3, 0x00, 0x41, 0x82, 0xDC, 0x00, 0x41, 0x82, 0xDF, 0x00, 0x00, 0x58, ++0xEC, 0x5F, 0xF7, 0x67, 0xC0, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x35, 0xF0, 0x74, 0x46, 0xA3, 0xF0, 0xD1, 0xA6, 0xE5, 0x3C, ++0x30, 0xE7, 0x02, 0xD1, 0x8B, 0x74, 0x35, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x46, 0xA3, 0xF0, ++0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x7F, 0x01, 0x7E, 0x00, 0x12, ++0x32, 0x06, 0x90, 0x00, 0xF2, 0xE0, 0x20, 0xE6, 0x0C, 0x90, 0x00, 0x05, 0xE0, 0x44, 0x80, 0xFD, ++0x7F, 0x05, 0x12, 0x32, 0x1E, 0x22, 0x90, 0x00, 0x54, 0xE0, 0x55, 0x35, 0xF5, 0x39, 0xA3, 0xE0, ++0x55, 0x36, 0xF5, 0x3A, 0xA3, 0xE0, 0x55, 0x37, 0xF5, 0x3B, 0xA3, 0xE0, 0x55, 0x38, 0xF5, 0x3C, ++0xAD, 0x39, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0xAD, 0x3A, 0x7F, 0x55, 0x12, 0x32, 0x1E, 0xAD, 0x3B, ++0x7F, 0x56, 0x12, 0x32, 0x1E, 0xAD, 0x3C, 0x7F, 0x57, 0x12, 0x32, 0x1E, 0x53, 0x91, 0xEF, 0x22, ++0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, ++0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, ++0x74, 0xE0, 0xF0, 0x74, 0x46, 0xA3, 0xF0, 0x12, 0x70, 0x7C, 0xE5, 0x41, 0x30, 0xE4, 0x02, 0xF1, ++0x7D, 0xE5, 0x41, 0x30, 0xE6, 0x03, 0x12, 0x71, 0x15, 0xE5, 0x43, 0x30, 0xE0, 0x03, 0x12, 0x6F, ++0x33, 0xE5, 0x43, 0x30, 0xE1, 0x03, 0x12, 0x6D, 0x1E, 0xE5, 0x43, 0x30, 0xE2, 0x03, 0x12, 0x71, ++0x22, 0xE5, 0x43, 0x30, 0xE3, 0x02, 0xF1, 0x90, 0xE5, 0x43, 0x30, 0xE4, 0x02, 0xF1, 0xA8, 0xE5, ++0x43, 0x30, 0xE5, 0x03, 0x12, 0x5D, 0xC1, 0xE5, 0x43, 0x30, 0xE6, 0x03, 0x12, 0x5C, 0x17, 0xE5, ++0x44, 0x30, 0xE1, 0x03, 0x12, 0x6F, 0xB8, 0x74, 0xE0, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x46, ++0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x12, 0x68, 0x61, ++0x7F, 0x02, 0x8F, 0x0D, 0x7F, 0x02, 0x71, 0x27, 0x90, 0x80, 0x3C, 0xE0, 0x45, 0x0D, 0xF0, 0x22, ++0xF1, 0xA0, 0x70, 0x0B, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x05, 0xF1, 0xE7, 0x12, 0x52, 0x80, 0x22, ++0xE4, 0xFF, 0xF1, 0xC4, 0xEF, 0x64, 0x01, 0x22, 0xF1, 0xA0, 0x70, 0x17, 0x90, 0x81, 0x8D, 0xE0, ++0x60, 0x11, 0xF1, 0xE7, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x12, 0x5F, 0xAD, 0x54, 0x07, 0x70, 0x03, ++0x12, 0x5C, 0x01, 0x22, 0x12, 0x7B, 0x98, 0x12, 0x59, 0xA3, 0xE0, 0xFD, 0x7C, 0x00, 0xF1, 0xF4, ++0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, ++0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, ++0x02, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, ++0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, ++0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xFC, 0xF0, 0x74, ++0x47, 0xA3, 0xF0, 0x12, 0x70, 0xA9, 0xE5, 0x49, 0x30, 0xE1, 0x03, 0x12, 0x76, 0x2E, 0xE5, 0x49, ++0x30, 0xE2, 0x03, 0x12, 0x5B, 0xED, 0xE5, 0x4A, 0x30, 0xE0, 0x03, 0x12, 0x6E, 0xA7, 0xE5, 0x4A, ++0x30, 0xE4, 0x03, 0x12, 0x76, 0x3A, 0xE5, 0x4B, 0x30, 0xE1, 0x03, 0x12, 0x76, 0x50, 0xE5, 0x4B, ++0x30, 0xE0, 0x03, 0x12, 0x75, 0x6F, 0xE5, 0x4B, 0x30, 0xE4, 0x02, 0xF1, 0xF0, 0xE5, 0x4C, 0x30, ++0xE1, 0x05, 0x7F, 0x04, 0x12, 0x47, 0x82, 0xE5, 0x4C, 0x30, 0xE4, 0x02, 0x11, 0xA4, 0xE5, 0x4C, ++0x30, 0xE5, 0x03, 0x12, 0x71, 0x8C, 0xE5, 0x4C, 0x30, 0xE6, 0x03, 0x12, 0x71, 0xB7, 0x74, 0xFC, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x47, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, ++0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, ++0xF0, 0xD0, 0xE0, 0x32, 0x12, 0x56, 0xCE, 0x31, 0x1A, 0x90, 0x81, 0xF5, 0xE0, 0x30, 0xE0, 0x15, ++0x12, 0x7B, 0xAF, 0x90, 0x81, 0xF8, 0xE0, 0x60, 0x04, 0x14, 0xF0, 0xC1, 0xC4, 0x12, 0x7B, 0xB8, ++0xF0, 0xE4, 0xFF, 0x11, 0xC6, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x64, 0x01, ++0x70, 0x18, 0x12, 0x7B, 0xDB, 0x60, 0x09, 0x31, 0x0D, 0x51, 0x2D, 0x12, 0x7B, 0xAF, 0x80, 0x06, ++0x31, 0x0D, 0x51, 0x15, 0x51, 0x35, 0xD1, 0xC4, 0x80, 0x1A, 0x12, 0x7B, 0xDB, 0x60, 0x06, 0x31, ++0x0D, 0x51, 0x2D, 0x80, 0x04, 0x31, 0x0D, 0x51, 0x15, 0x31, 0x1A, 0x7D, 0x01, 0x7F, 0x02, 0x31, ++0x1E, 0x12, 0x7A, 0xAD, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, ++0xFD, 0x7F, 0x03, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0x31, 0x1E, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x3D, ++0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x41, 0x1E, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, ++0x05, 0x61, 0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, ++0x81, 0xFD, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x47, 0xA0, 0x60, 0x02, 0x41, 0x08, 0x90, 0x81, ++0x8D, 0xE0, 0x70, 0x02, 0x41, 0x08, 0x12, 0x7B, 0x69, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, ++0xE0, 0x90, 0x81, 0x94, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x81, 0x93, 0xF0, 0xA3, 0xE0, 0xFF, ++0x70, 0x08, 0x90, 0x81, 0x93, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0x81, 0x94, 0xEF, 0xF0, 0x12, ++0x78, 0x31, 0xE4, 0x90, 0x81, 0x96, 0x12, 0x6F, 0x09, 0x12, 0x47, 0xE7, 0x12, 0x5F, 0xAF, 0x54, ++0xEF, 0xF0, 0x12, 0x7B, 0x69, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x0F, 0x90, 0x81, 0x83, 0xE0, 0x30, ++0xE0, 0x05, 0x12, 0x5C, 0x79, 0x80, 0x03, 0x12, 0x5C, 0x36, 0xF1, 0xE5, 0x30, 0xE0, 0x56, 0xEF, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x21, 0x12, 0x7B, 0xEB, 0x6F, 0x70, 0x47, 0x90, 0x81, ++0x89, 0xE0, 0x44, 0x40, 0xF0, 0x12, 0x7B, 0xF3, 0x31, 0x09, 0x51, 0x2D, 0x51, 0x3B, 0x12, 0x5F, ++0xD6, 0x90, 0x81, 0x94, 0xE0, 0x14, 0xF0, 0x80, 0x2C, 0x90, 0x81, 0x8B, 0xE0, 0xC4, 0x54, 0x0F, ++0x64, 0x01, 0x70, 0x21, 0x12, 0x7B, 0xEB, 0xFE, 0x6F, 0x60, 0x1A, 0x90, 0x05, 0x73, 0xE0, 0xFF, ++0xEE, 0x6F, 0x60, 0x11, 0x12, 0x7B, 0xD3, 0x54, 0x3F, 0x30, 0xE0, 0x09, 0xEF, 0x54, 0xBF, 0x31, ++0x09, 0x51, 0x15, 0x31, 0x14, 0xF1, 0xD7, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0xC3, 0x13, 0x20, 0xE0, ++0x03, 0xF1, 0xD7, 0xF0, 0x22, 0x74, 0x45, 0x12, 0x7C, 0x03, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x7D, 0x03, 0x7F, 0x02, 0x74, 0x45, 0x2F, ++0xF8, 0xE6, 0x4D, 0x80, 0xE5, 0x7D, 0x02, 0x7F, 0x02, 0x51, 0x3F, 0x7D, 0x01, 0x7F, 0x02, 0x74, ++0x3D, 0x12, 0x7C, 0x03, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0xD4, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x8B, 0x52, 0x8A, 0x53, 0x89, 0x54, 0x90, 0x05, 0x27, 0xE0, 0xF5, 0x55, 0x12, 0x6F, 0x01, ++0x90, 0x81, 0x83, 0x12, 0x6C, 0xCE, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x12, 0x7C, 0x0B, 0x54, ++0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0x12, 0x6C, 0xDC, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x12, ++0x7C, 0x0B, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x12, 0x6C, 0xDC, 0x54, 0x40, 0xFD, 0xEF, ++0x54, 0xBF, 0x4D, 0x90, 0x81, 0x83, 0xF0, 0xEE, 0xC3, 0x13, 0x20, 0xE0, 0x02, 0x61, 0x2D, 0xE0, ++0x30, 0xE0, 0x75, 0x51, 0x29, 0x75, 0x55, 0x21, 0x12, 0x7B, 0xCA, 0x30, 0xE0, 0x08, 0x12, 0x7B, ++0x8C, 0x43, 0x55, 0x08, 0x80, 0x0C, 0xE4, 0x90, 0x81, 0x84, 0xF0, 0xA3, 0xF0, 0x7D, 0x40, 0xFF, ++0x51, 0x3F, 0x90, 0x81, 0x83, 0xF1, 0xE8, 0x30, 0xE0, 0x03, 0x43, 0x55, 0x12, 0xEF, 0xC4, 0x54, ++0x0F, 0x30, 0xE0, 0x03, 0x43, 0x55, 0x14, 0x90, 0x81, 0x83, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, ++0xE0, 0x03, 0x43, 0x55, 0x80, 0x12, 0x6F, 0xB0, 0x54, 0x03, 0x20, 0xE0, 0x03, 0x43, 0x55, 0x40, ++0x91, 0x67, 0x90, 0x81, 0x86, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x50, 0x68, 0x12, 0x71, 0x68, ++0x30, 0xE0, 0x04, 0x7F, 0x04, 0x80, 0x0C, 0x12, 0x6F, 0x89, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0x80, ++0x02, 0x7F, 0x02, 0x12, 0x50, 0x68, 0x61, 0xA0, 0x75, 0x55, 0x01, 0x91, 0x67, 0x90, 0x81, 0x86, ++0xE0, 0x64, 0x04, 0x60, 0x02, 0x61, 0xD3, 0xFF, 0x12, 0x50, 0x68, 0x61, 0xD3, 0x90, 0x81, 0x83, ++0xE0, 0x30, 0xE0, 0x74, 0x51, 0x29, 0x43, 0x55, 0x31, 0x12, 0x7B, 0xCA, 0x30, 0xE0, 0x08, 0x12, ++0x7B, 0x8C, 0x43, 0x55, 0x08, 0x80, 0x06, 0x7D, 0x40, 0xE4, 0xFF, 0x51, 0x3F, 0x90, 0x81, 0x83, ++0xF1, 0xE8, 0x30, 0xE0, 0x03, 0x43, 0x55, 0x02, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, ++0x55, 0x04, 0x91, 0x67, 0x12, 0x71, 0x68, 0x30, 0xE0, 0x0B, 0x12, 0x71, 0x4A, 0x60, 0x31, 0xE4, ++0xFD, 0x7F, 0x02, 0x80, 0x1F, 0x12, 0x57, 0xCE, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x19, 0x12, ++0x7A, 0x86, 0x12, 0x6F, 0x89, 0xBF, 0x01, 0x09, 0x90, 0x81, 0x8F, 0xE0, 0xFF, 0x7D, 0x01, 0x80, ++0x03, 0xE4, 0xFD, 0xFF, 0x91, 0x72, 0x80, 0x08, 0x90, 0x81, 0x90, 0xE0, 0x90, 0x81, 0x87, 0xF0, ++0x90, 0x05, 0x40, 0x74, 0x22, 0xF0, 0x80, 0x2B, 0x75, 0x55, 0x01, 0x91, 0x67, 0x90, 0x81, 0x87, ++0xE0, 0xB4, 0x02, 0x06, 0x7D, 0x01, 0x7F, 0x04, 0x80, 0x0B, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x08, ++0x06, 0x7D, 0x01, 0x7F, 0x0C, 0x91, 0x72, 0x12, 0x75, 0x46, 0x90, 0x81, 0x8F, 0x12, 0x5C, 0x10, ++0x12, 0x5A, 0x18, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0x76, 0x12, 0x45, 0x40, 0x90, 0x82, ++0x75, 0xEF, 0xF0, 0x12, 0x45, 0x49, 0x4C, 0x11, 0x00, 0x4C, 0x16, 0x01, 0x4C, 0x1B, 0x02, 0x4C, ++0x20, 0x12, 0x4C, 0x25, 0x14, 0x4C, 0x2A, 0x20, 0x4C, 0x2F, 0x21, 0x4C, 0x34, 0x23, 0x4C, 0x39, ++0x24, 0x4C, 0x3D, 0x25, 0x4C, 0x42, 0x26, 0x4C, 0x47, 0x27, 0x4C, 0x4C, 0xC0, 0x00, 0x00, 0x4C, ++0x51, 0x91, 0x61, 0x02, 0x5F, 0x0E, 0x91, 0x61, 0x02, 0x5B, 0x2C, 0x91, 0x61, 0x02, 0x5B, 0x91, ++0x91, 0x61, 0x02, 0x6B, 0xF2, 0x91, 0x61, 0x02, 0x6C, 0x05, 0x91, 0x61, 0x02, 0x5C, 0xF0, 0x91, ++0x61, 0x02, 0x5E, 0x3A, 0x91, 0x61, 0x02, 0x6C, 0x14, 0x91, 0x61, 0x41, 0x4A, 0x91, 0x61, 0x02, ++0x6C, 0x1C, 0x91, 0x61, 0x02, 0x6C, 0x24, 0x91, 0x61, 0x02, 0x5E, 0x72, 0x91, 0x61, 0x02, 0x6F, ++0xD8, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x82, 0x75, 0xE0, 0x90, 0x01, 0xC2, 0xF0, ++0x22, 0x90, 0x82, 0x76, 0x02, 0x45, 0x37, 0x90, 0x05, 0x27, 0xE5, 0x55, 0xF0, 0x22, 0x7D, 0x01, ++0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xDB, 0xED, 0xF0, 0x90, 0x81, ++0x88, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xA1, 0xBE, 0xEE, 0x12, 0x5F, ++0xC8, 0x30, 0xE0, 0x02, 0xA1, 0xBE, 0x90, 0x81, 0x90, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xA1, 0xBE, ++0xEF, 0x70, 0x02, 0xA1, 0x31, 0x24, 0xFE, 0x70, 0x02, 0xA1, 0x6B, 0x24, 0xFE, 0x60, 0x4A, 0x24, ++0xFC, 0x70, 0x02, 0xA1, 0xA6, 0x24, 0xFC, 0x60, 0x02, 0xA1, 0xB7, 0xEE, 0xB4, 0x0E, 0x02, 0xD1, ++0x1D, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xD1, 0x66, 0x90, 0x81, 0x90, 0xE0, 0xB4, ++0x06, 0x02, 0xD1, 0x41, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x04, 0x0F, 0x90, 0x82, 0xDB, 0xE0, 0xFF, ++0x60, 0x05, 0x12, 0x71, 0xEC, 0x80, 0x03, 0x12, 0x5B, 0xD3, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x08, ++0x60, 0x02, 0xA1, 0xB7, 0x12, 0x7A, 0xAD, 0xA1, 0xB7, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, ++0x01, 0xD1, 0x66, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0x41, 0x90, 0x81, 0x90, 0xE0, ++0xB4, 0x0E, 0x07, 0xB1, 0xC3, 0xBF, 0x01, 0x02, 0xD1, 0x1D, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x0C, ++0x60, 0x02, 0xA1, 0xB7, 0xB1, 0xC3, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xA1, 0xB7, 0xD1, 0x7F, 0xA1, ++0xB7, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0E, 0x07, 0xB1, 0xC3, 0xBF, 0x01, 0x02, 0xD1, 0x1D, 0x90, ++0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0x41, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, 0x07, 0xB1, ++0xC3, 0xBF, 0x01, 0x02, 0xD1, 0x7F, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x04, 0x70, 0x59, 0x12, 0x75, ++0xB6, 0xEF, 0x64, 0x01, 0x70, 0x51, 0x12, 0x75, 0x4F, 0x80, 0x4C, 0x90, 0x81, 0x90, 0xE0, 0xB4, ++0x0E, 0x07, 0xB1, 0xC3, 0xBF, 0x01, 0x02, 0xD1, 0x1D, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, ++0xD1, 0x41, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, 0x07, 0xB1, 0xC3, 0xBF, 0x01, 0x02, 0xD1, 0x7F, ++0x90, 0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xD1, 0x66, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x04, ++0x16, 0x12, 0x7A, 0x67, 0x80, 0x11, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, 0x0A, 0x12, 0x7B, 0xD3, ++0x54, 0x3F, 0x30, 0xE0, 0x02, 0xD1, 0xC4, 0x90, 0x81, 0x90, 0x12, 0x7B, 0x7F, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x75, 0x2D, 0xEF, 0x64, 0x01, ++0x60, 0x05, 0x75, 0x0E, 0x01, 0x80, 0x33, 0x12, 0x7B, 0xFB, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x75, ++0x0E, 0x02, 0x80, 0x26, 0x90, 0x81, 0x8F, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, ++0x80, 0x18, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, ++0x75, 0x0E, 0x11, 0x80, 0x05, 0x12, 0x67, 0x4A, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, ++0x90, 0x01, 0xB8, 0xE5, 0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x89, ++0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0xD1, 0xD5, 0x80, 0x12, 0x12, 0x75, 0x0E, 0xF1, 0xDE, 0x90, ++0x05, 0x27, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x81, 0x87, 0x74, 0x04, 0xF0, 0xE4, 0xFD, 0xFF, 0x80, ++0x78, 0x90, 0x81, 0x89, 0xE0, 0x90, 0x06, 0x04, 0x20, 0xE0, 0x07, 0xE0, 0x44, 0x40, 0xF1, 0xDE, ++0x80, 0x0F, 0xD1, 0xD1, 0x90, 0x05, 0x27, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x81, 0x87, 0x74, 0x0C, ++0xF0, 0xE4, 0xFD, 0xFF, 0x80, 0x53, 0x90, 0x82, 0xDA, 0xEF, 0xF0, 0x12, 0x52, 0x16, 0x90, 0x82, ++0xDA, 0xE0, 0x60, 0x03, 0x12, 0x51, 0xBE, 0x7D, 0x04, 0xF1, 0xB4, 0x74, 0x04, 0xF0, 0x22, 0x12, ++0x47, 0xA0, 0x70, 0x2B, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xFD, 0xF0, 0x7D, 0x2C, 0x7F, 0x6F, 0xD1, ++0xB9, 0x7D, 0x08, 0x7F, 0x01, 0x12, 0x72, 0x28, 0xBF, 0x01, 0x0F, 0x90, 0x81, 0x88, 0xE0, 0x44, ++0x80, 0xF0, 0x7D, 0x0E, 0xF1, 0xB4, 0x74, 0x0E, 0xF0, 0x22, 0x12, 0x71, 0xE2, 0x04, 0xF0, 0x22, ++0xE4, 0xFD, 0x7F, 0x0C, 0x91, 0x72, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, 0x80, ++0x40, 0xED, 0xF0, 0x22, 0x7D, 0x2F, 0x12, 0x50, 0x03, 0x7D, 0x08, 0xF1, 0xB4, 0x74, 0x08, 0xF0, ++0x22, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, 0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0xAC, 0x07, 0xEF, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1A, 0xED, 0x54, 0x01, ++0xFE, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0x80, 0x0C, 0x90, 0x81, 0x90, 0xED, 0xF0, ++0x80, 0x05, 0x90, 0x81, 0x8F, 0xED, 0xF0, 0x90, 0x00, 0x8F, 0xE0, 0x30, 0xE4, 0x2E, 0xEC, 0x14, ++0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, 0x23, 0x90, 0x81, 0x88, 0xE0, 0x54, 0x01, 0xC4, ++0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0x81, 0x90, 0xE0, 0x54, 0x7F, 0x4F, 0xFD, 0x7F, 0x88, ++0x80, 0x07, 0x90, 0x81, 0x8F, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xEF, 0x70, 0x35, 0x7D, 0x78, 0x7F, 0x02, 0x51, 0x3F, 0x7D, 0x02, 0x7F, 0x03, 0x51, 0x3F, ++0x7D, 0xC8, 0x7F, 0x02, 0x51, 0x15, 0x12, 0x47, 0xE7, 0xF0, 0xE4, 0xFF, 0x12, 0x47, 0xC4, 0xEF, ++0x70, 0x0B, 0x12, 0x5B, 0xE0, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x06, 0x7D, 0x01, 0x7F, ++0x0C, 0x91, 0x72, 0x12, 0x5B, 0xE5, 0x02, 0x7A, 0x04, 0x90, 0x01, 0x36, 0x74, 0x78, 0xF0, 0xA3, ++0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0x31, 0x1E, 0x7D, 0x02, 0x7F, 0x03, 0x31, 0x1E, 0x90, 0x06, ++0x0A, 0xE0, 0x44, 0x07, 0x12, 0x6F, 0x09, 0xE4, 0xFF, 0x12, 0x47, 0xC4, 0xBF, 0x01, 0x11, 0x12, ++0x5D, 0xBA, 0xF0, 0x90, 0x81, 0x90, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, 0x7F, 0x04, 0x81, 0x72, ++0xF1, 0xD7, 0xF0, 0x22, 0x7F, 0x01, 0xD1, 0xD9, 0x90, 0x81, 0x87, 0x22, 0x90, 0x81, 0x8D, 0xE0, ++0x64, 0x01, 0x70, 0x12, 0x12, 0x5C, 0xE9, 0x60, 0x05, 0xD1, 0xB0, 0x02, 0x5E, 0x9F, 0x90, 0x81, ++0x90, 0xE0, 0x70, 0x02, 0x91, 0x6E, 0x22, 0x90, 0x81, 0x89, 0xE0, 0x44, 0x04, 0x22, 0xF0, 0x7D, ++0x04, 0x7F, 0x01, 0xC1, 0xD9, 0x90, 0x81, 0x89, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, ++0x22, 0x7D, 0x20, 0x7F, 0xFF, 0xD1, 0xB9, 0x12, 0x50, 0x08, 0x90, 0x81, 0x86, 0x74, 0x02, 0xF0, ++0x22, 0x80, 0xF4, 0x7F, 0xFF, 0x12, 0x4E, 0xB9, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, ++0x74, 0x4D, 0x90, 0x85, 0xBB, 0x12, 0x20, 0xDA, 0xCC, 0xF0, 0x00, 0xC0, 0x7F, 0x8C, 0x51, 0x74, ++0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x14, 0x12, 0x7B, 0xA4, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, ++0x00, 0xE4, 0xFD, 0xFF, 0xF1, 0x9F, 0x12, 0x7B, 0xC1, 0x44, 0x80, 0xFC, 0x90, 0x82, 0xC3, 0x12, ++0x20, 0xCE, 0x90, 0x82, 0xC3, 0x12, 0x44, 0xEE, 0xF1, 0xC8, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2E, ++0xA2, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, ++0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x81, 0x86, 0xE0, 0x90, 0x82, 0xDD, 0xF0, 0x6F, 0x70, 0x02, 0x21, 0x73, 0xEF, 0x14, 0x60, 0x42, ++0x14, 0x60, 0x6C, 0x14, 0x70, 0x02, 0x21, 0x1B, 0x14, 0x70, 0x02, 0x21, 0x48, 0x24, 0x04, 0x60, ++0x02, 0x21, 0x73, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x04, 0x04, 0x31, 0xAE, 0x21, 0x73, 0x90, 0x82, ++0xDD, 0xE0, 0xB4, 0x02, 0x04, 0x31, 0xA3, 0x21, 0x73, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x03, 0x04, ++0x31, 0xC4, 0x21, 0x73, 0x90, 0x82, 0xDD, 0xE0, 0x64, 0x01, 0x60, 0x02, 0x21, 0x73, 0x31, 0xA5, ++0x21, 0x73, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x04, 0x04, 0x31, 0xB2, 0x21, 0x73, 0x90, 0x82, 0xDD, ++0xE0, 0xB4, 0x02, 0x04, 0x31, 0x9F, 0x21, 0x73, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x03, 0x04, 0x31, ++0xB8, 0x21, 0x73, 0x90, 0x82, 0xDD, 0xE0, 0x60, 0x02, 0x21, 0x73, 0x31, 0x7F, 0x21, 0x73, 0x90, ++0x82, 0xDD, 0xE0, 0xB4, 0x04, 0x04, 0x31, 0x78, 0x80, 0x79, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x01, ++0x05, 0x12, 0x4F, 0xF1, 0x80, 0x6D, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x03, 0x04, 0x11, 0x01, 0x80, ++0x62, 0x90, 0x82, 0xDD, 0xE0, 0x70, 0x5C, 0xF1, 0xC2, 0x80, 0x58, 0x90, 0x82, 0xDD, 0xE0, 0xB4, ++0x04, 0x05, 0x12, 0x7A, 0xF6, 0x80, 0x4C, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x01, 0x04, 0x31, 0x91, ++0x80, 0x41, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0x7B, 0x28, 0x80, 0x35, 0x90, 0x82, ++0xDD, 0xE0, 0x70, 0x2F, 0x31, 0x8F, 0x80, 0x2B, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x03, 0x05, 0x12, ++0x7B, 0x22, 0x80, 0x1F, 0x90, 0x82, 0xDD, 0xE0, 0xB4, 0x01, 0x04, 0x31, 0x88, 0x80, 0x14, 0x90, ++0x82, 0xDD, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0x7B, 0x07, 0x80, 0x08, 0x90, 0x82, 0xDD, 0xE0, 0x70, ++0x02, 0x31, 0x86, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF1, 0xCE, 0x7D, 0x23, 0x02, 0x4F, 0xF3, 0x90, ++0x81, 0x86, 0x74, 0x01, 0xF0, 0x22, 0x31, 0x7F, 0x7D, 0x1F, 0x12, 0x7B, 0x10, 0xF0, 0x22, 0x31, ++0x7F, 0x7D, 0x21, 0x7F, 0xFF, 0x12, 0x4E, 0xB9, 0x90, 0x81, 0x86, 0x74, 0x03, 0xF0, 0x22, 0x31, ++0xBC, 0x80, 0xDC, 0x31, 0x9F, 0x12, 0x7A, 0x7E, 0xE4, 0x90, 0x81, 0x86, 0xF0, 0x22, 0x31, 0xB2, ++0x80, 0xF3, 0x31, 0xBE, 0xF1, 0xCE, 0x80, 0xC7, 0x31, 0xBE, 0x80, 0xC3, 0x51, 0x16, 0xE4, 0xFD, ++0xFF, 0x02, 0x4E, 0xB9, 0x31, 0xB8, 0x80, 0xDD, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x46, 0x13, ++0x13, 0x54, 0x3F, 0x20, 0xE0, 0x18, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF3, 0x51, 0x87, 0x31, 0xBE, ++0xF1, 0xE6, 0x13, 0x30, 0xE0, 0x03, 0x12, 0x4E, 0xD5, 0x12, 0x6C, 0xE3, 0xF0, 0x22, 0x90, 0x81, ++0xF1, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1C, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF4, 0x51, ++0x87, 0x12, 0x7B, 0xE3, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0x7D, 0x04, 0x7F, 0x01, 0x02, 0x4E, ++0xD9, 0x7D, 0x31, 0x11, 0x03, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, ++0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, ++0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x12, 0x7B, 0xC1, 0x54, 0x7F, 0xFC, 0x90, 0x82, 0xBF, 0x12, ++0x20, 0xCE, 0x90, 0x82, 0xBF, 0x12, 0x44, 0xEE, 0xF1, 0xC8, 0x7F, 0x7C, 0x51, 0x74, 0x12, 0x20, ++0xDA, 0xCC, 0xC0, 0x00, 0xC0, 0x7F, 0x8C, 0x51, 0x74, 0x12, 0x20, 0xDA, 0x00, 0xC0, 0x00, 0x14, ++0x12, 0x7B, 0xA4, 0x12, 0x20, 0xDA, 0x00, 0x03, 0x3E, 0x60, 0xE4, 0xFD, 0xFF, 0xF1, 0x9F, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x85, 0xBB, 0x22, 0xE0, 0x44, 0x02, ++0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xEB, 0xE0, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, ++0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, 0x19, 0x8F, 0x1A, 0xE5, 0x1E, 0x54, 0x07, ++0xC4, 0x33, 0x54, 0xE0, 0x85, 0x19, 0x83, 0x85, 0x1A, 0x82, 0xF0, 0xE5, 0x1D, 0xF1, 0x65, 0xE5, ++0x1E, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0xA3, 0xF0, 0xEB, 0xF1, 0x65, 0xE5, 0x1D, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0x4F, 0x51, 0xE8, 0xF0, 0xBD, 0x01, 0x0D, 0x85, 0x1A, 0x82, 0x8E, 0x83, 0xA3, ++0xA3, 0xA3, 0x74, 0x03, 0xF0, 0x80, 0x06, 0x51, 0xE8, 0xA3, 0x74, 0x01, 0xF0, 0x51, 0xE8, 0xA3, ++0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x85, 0x1A, 0x82, 0x85, 0x19, 0x83, 0xA3, 0xA3, ++0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x02, 0x61, 0xC5, 0x12, 0x47, 0xA0, 0x60, ++0x02, 0x61, 0xC5, 0x71, 0xC7, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x05, 0x62, 0x71, 0xE0, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x71, 0xE0, ++0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x7B, 0x4A, ++0x12, 0x7B, 0x69, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, 0x81, 0x94, 0xE0, ++0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x81, 0x96, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, 0x90, ++0x81, 0x93, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x4E, 0x01, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, ++0x12, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x03, 0xE4, 0xF5, 0x4E, 0x12, 0x6F, 0x89, 0xEF, 0x70, ++0x02, 0xF5, 0x4E, 0xE5, 0x4E, 0x60, 0x3E, 0xF1, 0xD6, 0x90, 0x81, 0x96, 0xE0, 0x60, 0x04, 0x64, ++0x01, 0x70, 0x11, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x96, 0xE0, 0xF1, 0x85, 0x51, 0x88, 0x90, 0x81, ++0x96, 0xE0, 0x80, 0x11, 0xE4, 0xF5, 0x1D, 0xF1, 0x7B, 0x51, 0x88, 0x90, 0x81, 0x96, 0xE0, 0x75, ++0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xF1, 0x85, 0x90, 0x81, 0xA6, 0xF0, 0x90, 0x81, 0x90, 0xE0, 0x20, ++0xE2, 0x03, 0x12, 0x4C, 0x6E, 0x22, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, ++0x78, 0x08, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, ++0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0xE4, 0x90, 0x82, 0x21, 0xF0, 0x90, 0x87, 0x5F, 0xE0, ++0x90, 0x82, 0x20, 0xF0, 0xE4, 0x90, 0x82, 0x2D, 0xF0, 0x90, 0x82, 0x1D, 0xF0, 0x90, 0x82, 0x1D, ++0xE0, 0xFF, 0xC3, 0x94, 0x40, 0x50, 0x10, 0x74, 0x30, 0x2F, 0xF1, 0xDE, 0x74, 0xFF, 0xF0, 0x90, ++0x82, 0x1D, 0xE0, 0x04, 0xF0, 0x80, 0xE6, 0xE4, 0x90, 0x82, 0x1D, 0xF0, 0x90, 0x82, 0x20, 0xE0, ++0xFF, 0x90, 0x82, 0x1D, 0xE0, 0xFE, 0xC3, 0x9F, 0x40, 0x02, 0x81, 0xE7, 0x74, 0xDF, 0x2E, 0xF9, ++0xE4, 0x34, 0x86, 0xF1, 0x97, 0x75, 0x16, 0x0A, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x12, 0x12, 0x2B, ++0xED, 0x90, 0x82, 0x13, 0xE0, 0xFF, 0x12, 0x2F, 0x27, 0xEF, 0x04, 0x90, 0x82, 0x2D, 0xF0, 0x90, ++0x82, 0x12, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x31, 0xEA, 0xEF, 0x24, 0xC8, 0x90, 0x82, 0x2F, ++0xF0, 0x75, 0xF0, 0x08, 0xA4, 0xF0, 0x90, 0x82, 0x13, 0xE0, 0x54, 0x0F, 0x90, 0x82, 0x2E, 0xF0, ++0xE4, 0x90, 0x82, 0x1C, 0xF0, 0x90, 0x82, 0x1E, 0xF0, 0x90, 0x82, 0x1E, 0xE0, 0xFF, 0xC3, 0x94, ++0x04, 0x50, 0x57, 0x90, 0x82, 0x2E, 0xE0, 0xFE, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x13, 0xD8, ++0xFC, 0x20, 0xE0, 0x3E, 0x90, 0x82, 0x1E, 0xE0, 0x25, 0xE0, 0xFF, 0x90, 0x82, 0x2F, 0xE0, 0x2F, ++0x24, 0x30, 0xF9, 0xE4, 0x34, 0x82, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x01, 0x90, 0x82, 0x1C, ++0xE0, 0x75, 0xF0, 0x02, 0xA4, 0x24, 0x14, 0xF9, 0x74, 0x82, 0x35, 0xF0, 0x8B, 0x13, 0xF5, 0x14, ++0x89, 0x15, 0x75, 0x16, 0x02, 0xD0, 0x01, 0xD0, 0x03, 0x12, 0x2B, 0xED, 0x90, 0x82, 0x1C, 0xE0, ++0x04, 0xF0, 0x90, 0x82, 0x1E, 0xE0, 0x04, 0xF0, 0x80, 0x9F, 0x90, 0x82, 0x2D, 0xE0, 0xFF, 0x90, ++0x82, 0x1D, 0xE0, 0x2F, 0xF0, 0x81, 0x1C, 0xE4, 0x90, 0x82, 0x21, 0xF0, 0x90, 0x82, 0x21, 0xE0, ++0xC3, 0x94, 0x40, 0x40, 0x02, 0xC1, 0xB2, 0xE0, 0xFF, 0x24, 0x30, 0xF1, 0xDE, 0xE0, 0x90, 0x82, ++0x23, 0xF0, 0xE0, 0xFE, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFD, 0x90, 0x82, 0x22, 0xF0, 0xEE, 0x54, ++0x0F, 0xFE, 0xA3, 0xF0, 0x74, 0x31, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0x90, ++0x82, 0x24, 0xF0, 0xFC, 0xEE, 0xFE, 0xEC, 0xFB, 0xEB, 0xFF, 0x90, 0x82, 0x29, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xED, 0x12, 0x45, 0x49, 0x55, 0x5B, 0x00, 0x55, 0x86, 0x01, 0x56, 0x04, 0x02, 0x56, ++0xA3, 0x03, 0x56, 0x14, 0x04, 0x56, 0x2A, 0x05, 0x56, 0x2A, 0x06, 0x56, 0x2A, 0x07, 0x56, 0x2A, ++0x08, 0x56, 0x7E, 0x09, 0x56, 0x90, 0x0A, 0x00, 0x00, 0x56, 0xB2, 0x90, 0x82, 0x21, 0xE0, 0xFD, ++0xF1, 0x71, 0xE0, 0xFE, 0x74, 0x32, 0x2D, 0xD1, 0xC6, 0xE0, 0xFD, 0xED, 0xFF, 0x90, 0x82, 0x2B, ++0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0x90, 0x82, 0x24, 0xE0, 0xFF, 0x12, 0x2F, 0x96, 0x90, 0x82, ++0x1F, 0x74, 0x02, 0xF0, 0xC1, 0xA3, 0xF1, 0x6D, 0x71, 0xE0, 0xD1, 0xB3, 0x71, 0xE0, 0x12, 0x44, ++0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0x21, 0xE0, 0x24, 0x34, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x71, 0xE0, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x82, 0x21, 0xE0, 0x24, 0x35, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x71, 0xE0, 0x78, ++0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0x90, ++0x82, 0x25, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x25, 0x12, 0x44, 0xEE, 0x90, 0x85, 0x96, 0x12, 0x20, ++0xCE, 0x90, 0x82, 0x29, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x2E, 0xE4, 0x90, 0x82, 0x1F, 0x74, ++0x04, 0xF0, 0xC1, 0xA3, 0x90, 0x82, 0x24, 0xE0, 0xFD, 0xD1, 0xC0, 0xE0, 0xFB, 0xE4, 0xFF, 0x12, ++0x30, 0xC7, 0x80, 0x0E, 0x90, 0x82, 0x24, 0xE0, 0xFD, 0xD1, 0xC0, 0xE0, 0xFB, 0xE4, 0xFF, 0x12, ++0x30, 0x6A, 0x90, 0x82, 0x1F, 0x74, 0x01, 0xF0, 0x80, 0x79, 0x90, 0x82, 0x1F, 0x74, 0x02, 0xF0, ++0xF1, 0x6D, 0x71, 0xE0, 0xD1, 0xB3, 0x71, 0xE0, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0x90, 0x82, 0x23, 0x71, 0xE0, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0x90, 0x82, 0x25, 0x12, 0x20, 0xCE, 0x90, 0x82, ++0x22, 0xE0, 0x24, 0xFB, 0xFF, 0xC0, 0x07, 0x90, 0x82, 0x25, 0x12, 0x44, 0xEE, 0x90, 0x82, 0xAE, ++0x12, 0x20, 0xCE, 0x90, 0x82, 0x24, 0xE0, 0xFD, 0xD0, 0x07, 0xF1, 0x9F, 0x80, 0x25, 0x90, 0x82, ++0x1F, 0x74, 0x01, 0xF1, 0x8C, 0x75, 0x16, 0x01, 0x12, 0x7B, 0x32, 0xF0, 0x7B, 0x04, 0x80, 0x10, ++0x90, 0x82, 0x1F, 0x74, 0x04, 0xF1, 0x8C, 0x75, 0x16, 0x04, 0x12, 0x7B, 0x32, 0xF0, 0x7B, 0x06, ++0x12, 0x64, 0x5C, 0x90, 0x82, 0x1F, 0xE0, 0x24, 0x02, 0xFF, 0x90, 0x82, 0x21, 0xE0, 0x2F, 0xF0, ++0x81, 0xEC, 0x22, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, ++0x90, 0x82, 0x21, 0xE0, 0x24, 0x32, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xE4, 0x90, ++0x82, 0x04, 0xF0, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x02, 0xE1, 0x64, 0x12, 0x47, 0xA0, 0x60, 0x02, ++0xE1, 0x64, 0x12, 0x7B, 0xF3, 0x71, 0xC6, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x05, 0x62, 0x71, 0xE0, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, ++0x71, 0xE0, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, ++0x7B, 0x4A, 0x90, 0x82, 0x04, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x94, 0xF0, 0x90, 0x81, 0x83, ++0xE0, 0x30, 0xE0, 0x16, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x05, 0xE4, 0x90, 0x82, 0x04, 0xF0, ++0x12, 0x6F, 0x89, 0xEF, 0x70, 0x04, 0x90, 0x82, 0x04, 0xF0, 0x90, 0x82, 0x04, 0xE0, 0x60, 0x14, ++0xF1, 0xD6, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x95, 0x51, 0x87, 0x90, 0x81, 0x90, 0xE0, 0x20, 0xE2, ++0x03, 0x12, 0x4C, 0x6E, 0x22, 0x54, 0x07, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x22, 0x90, 0x82, 0x21, ++0xE0, 0x24, 0x33, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x90, 0x81, 0x96, 0xE0, 0x75, ++0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xFF, 0x90, 0x81, 0x95, 0xE0, 0x2F, 0x22, 0xF0, 0x90, 0x82, 0x21, ++0xE0, 0x24, 0x32, 0xF9, 0xE4, 0x34, 0x82, 0x75, 0x13, 0x01, 0xF5, 0x14, 0x89, 0x15, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xC0, 0x07, 0xC0, 0x05, 0x90, 0x82, 0xAE, 0x12, 0x44, 0xEE, ++0x90, 0x82, 0xA4, 0x12, 0x20, 0xCE, 0xD0, 0x05, 0xD0, 0x07, 0x12, 0x66, 0xE4, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x31, 0x7F, 0x02, 0x4F, 0xF1, 0xFC, 0x90, 0x85, 0xBB, 0x02, 0x20, 0xCE, 0x90, 0x05, ++0x27, 0xE0, 0x44, 0x40, 0xF0, 0x22, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x51, 0x16, 0x90, 0x81, 0xF1, 0xE0, 0xC3, 0x22, 0x90, 0x01, ++0xC8, 0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x08, 0x7F, 0xFF, 0xFE, ++0x12, 0x2B, 0x27, 0xBF, 0x01, 0x09, 0x90, 0x82, 0x08, 0xE0, 0x64, 0x03, 0x60, 0x03, 0x22, 0x01, ++0xB0, 0xE4, 0x90, 0x82, 0x0D, 0xF0, 0x90, 0x82, 0x0D, 0xE0, 0xFF, 0xC3, 0x94, 0x02, 0x40, 0x02, ++0x01, 0xEB, 0xC3, 0x74, 0xFE, 0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, 0x7B, 0x01, 0x7A, 0x82, 0x79, ++0x09, 0x12, 0x2B, 0x27, 0xEF, 0x64, 0x01, 0x70, 0x77, 0x90, 0x82, 0x09, 0xE0, 0xFF, 0x54, 0xC0, ++0xFE, 0x60, 0x05, 0xEF, 0x54, 0x0C, 0x70, 0x16, 0x90, 0x82, 0x09, 0xE0, 0xFF, 0x54, 0x30, 0x60, ++0x67, 0xEF, 0x54, 0x03, 0x60, 0x62, 0x90, 0x82, 0x0A, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, ++0x82, 0x0A, 0xF0, 0x90, 0x82, 0x0A, 0xE0, 0x90, 0x82, 0x09, 0x70, 0x16, 0xE0, 0xFF, 0xEE, 0x13, ++0x13, 0x54, 0x3F, 0x90, 0x82, 0x0B, 0xF0, 0xEF, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0xA3, 0xF0, ++0x80, 0x0D, 0xE0, 0xFE, 0x54, 0x30, 0x90, 0x82, 0x0B, 0xF0, 0xEE, 0x54, 0x03, 0xA3, 0xF0, 0x90, ++0x82, 0x0B, 0xE0, 0x64, 0x30, 0x70, 0x54, 0xA3, 0xE0, 0x64, 0x02, 0x70, 0x4E, 0x90, 0x00, 0xF5, ++0xE0, 0x54, 0x40, 0x90, 0x82, 0x0E, 0xF0, 0xE0, 0x70, 0x41, 0xA3, 0x74, 0x02, 0xF0, 0x80, 0x10, ++0x90, 0x82, 0x0F, 0x74, 0x01, 0xF0, 0x80, 0x08, 0x90, 0x82, 0x0D, 0xE0, 0x04, 0xF0, 0x01, 0x16, ++0x90, 0x01, 0xC4, 0x74, 0xEE, 0xF0, 0x74, 0x57, 0xA3, 0xF0, 0x90, 0x82, 0x0F, 0xE0, 0x90, 0x01, ++0xC8, 0xF0, 0x90, 0x82, 0x09, 0xE0, 0x90, 0x01, 0xC9, 0xF0, 0x90, 0x82, 0x0A, 0xE0, 0x90, 0x01, ++0xCA, 0xF0, 0xE4, 0xFD, 0x7F, 0x1F, 0x12, 0x32, 0x1E, 0x80, 0xD5, 0x22, 0x90, 0x00, 0x80, 0xE0, ++0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xBF, 0xF0, 0x12, ++0x57, 0xEE, 0x12, 0x70, 0x35, 0x12, 0x32, 0x77, 0x12, 0x70, 0x42, 0x31, 0x41, 0x7F, 0x01, 0x12, ++0x42, 0x15, 0x90, 0x81, 0xF9, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x42, 0x15, 0x90, 0x81, 0xF9, 0xE0, ++0x04, 0xF0, 0x51, 0x36, 0x31, 0x52, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, ++0x32, 0x1E, 0x75, 0x20, 0xFF, 0xF1, 0xBA, 0x51, 0xD3, 0x12, 0x70, 0x72, 0xE4, 0xFF, 0x02, 0x42, ++0x9E, 0xE4, 0x90, 0x80, 0x3C, 0x31, 0x4A, 0xA3, 0xF0, 0x22, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, ++0xF0, 0x22, 0x31, 0x64, 0x12, 0x6F, 0xE6, 0x51, 0x18, 0x12, 0x77, 0x5D, 0x51, 0x04, 0x12, 0x7B, ++0x72, 0x02, 0x45, 0x6F, 0xE4, 0xFD, 0xFF, 0x12, 0x7B, 0x98, 0xED, 0x70, 0x12, 0x31, 0xA3, 0xC0, ++0x83, 0xC0, 0x82, 0x31, 0x9B, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x0F, 0x31, ++0xA3, 0xC0, 0x83, 0xC0, 0x82, 0x31, 0x9B, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, ++0xD0, 0x83, 0xF0, 0x31, 0xAE, 0x90, 0x81, 0x81, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, ++0x07, 0x08, 0x22, 0x74, 0x79, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7D, 0x08, 0xED, 0x14, 0xF9, 0x24, 0x79, 0x31, 0xA6, 0xE0, 0x60, ++0x3A, 0x7C, 0x08, 0xEC, 0x14, 0x90, 0x82, 0xD7, 0xF0, 0x74, 0x79, 0x29, 0x31, 0xA6, 0xE0, 0xFB, ++0x7A, 0x00, 0x90, 0x82, 0xD7, 0x12, 0x47, 0xF2, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x60, 0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, 0xFF, ++0x90, 0x82, 0xD7, 0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, 0xDC, 0xC8, 0xDD, 0xBA, 0x7F, 0x00, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0xE4, 0xA3, ++0xF0, 0x12, 0x7B, 0xE3, 0x44, 0x10, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x01, 0x7D, 0x00, 0x7B, 0x01, ++0x7A, 0x81, 0x79, 0x83, 0x12, 0x45, 0x6F, 0x90, 0x81, 0x83, 0xE0, 0x54, 0xFD, 0xF0, 0xE4, 0x31, ++0x4B, 0xA3, 0x74, 0x0C, 0xF0, 0x22, 0xF1, 0xDD, 0x90, 0x80, 0x42, 0xEF, 0xF0, 0x51, 0x56, 0x90, ++0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x00, 0x12, 0xE0, 0x54, 0xC7, 0x44, 0x20, 0xFD, 0x7F, 0x12, ++0x12, 0x32, 0x1E, 0x02, 0x2D, 0xA7, 0x51, 0x86, 0x51, 0xAC, 0x12, 0x6F, 0xF4, 0x12, 0x70, 0x13, ++0xE4, 0xF5, 0x35, 0xF5, 0x36, 0xF5, 0x37, 0x75, 0x38, 0x80, 0xAD, 0x35, 0x7F, 0x50, 0x12, 0x32, ++0x1E, 0xAD, 0x36, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xAD, 0x37, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xAD, ++0x38, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0x90, 0x01, 0x30, 0xE4, 0x31, 0x4A, 0x90, 0x01, 0x38, 0x31, ++0x4A, 0xFD, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xE4, 0xFD, ++0x7F, 0x52, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0x90, 0x01, 0x34, 0x74, ++0xFF, 0x31, 0x4A, 0x90, 0x01, 0x3C, 0x31, 0x4A, 0xFD, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0x7D, 0xFF, ++0x7F, 0x55, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x57, ++0x02, 0x32, 0x1E, 0xE4, 0x90, 0x82, 0x08, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x98, 0xE0, 0x7F, 0x00, ++0x30, 0xE4, 0x02, 0x7F, 0x01, 0xEF, 0x64, 0x01, 0x60, 0x3B, 0xC3, 0x90, 0x82, 0x09, 0xE0, 0x94, ++0x88, 0x90, 0x82, 0x08, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, ++0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1D, 0x90, 0x82, 0x08, 0xF1, 0xC1, 0xF1, 0xCF, 0xD3, ++0x90, 0x82, 0x09, 0xE0, 0x94, 0x32, 0x90, 0x82, 0x08, 0xE0, 0x94, 0x00, 0x40, 0xBC, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE3, 0xB5, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x8B, 0x52, 0x8A, 0x53, ++0x89, 0x54, 0x71, 0x8B, 0xFF, 0xF5, 0x56, 0x12, 0x1F, 0xA4, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x06, ++0xD1, 0x34, 0xF5, 0x57, 0x80, 0x02, 0x8F, 0x57, 0x85, 0x56, 0x55, 0xE5, 0x55, 0xD3, 0x95, 0x57, ++0x50, 0x24, 0xAB, 0x52, 0xAA, 0x53, 0xA9, 0x54, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFD, 0xAF, 0x55, ++0x31, 0x67, 0xAF, 0x55, 0x12, 0x47, 0xC4, 0xEF, 0xAF, 0x55, 0x70, 0x04, 0xF1, 0xB9, 0x80, 0x02, ++0xF1, 0xB8, 0x05, 0x55, 0x80, 0xD5, 0xE5, 0x56, 0x70, 0x0F, 0xFF, 0x12, 0x47, 0xC4, 0xEF, 0x70, ++0x08, 0x71, 0xE0, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x1F, ++0xBD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x52, 0x8A, 0x53, 0x89, 0x54, 0x12, 0x1F, ++0xA4, 0xFF, 0x90, 0x81, 0x82, 0xF0, 0xBF, 0x01, 0x08, 0x71, 0x8B, 0x64, 0x01, 0x60, 0x1F, 0x80, ++0x1A, 0xAB, 0x52, 0xAA, 0x53, 0xA9, 0x54, 0x71, 0x8B, 0x64, 0x01, 0x60, 0x11, 0x90, 0x81, 0x83, ++0xE0, 0x20, 0xE0, 0x07, 0xE4, 0xFF, 0x12, 0x50, 0x68, 0x80, 0x03, 0x12, 0x6F, 0x64, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x12, 0x7A, 0x0C, 0x12, 0x51, 0xBE, 0x7D, 0x0C, 0x7F, 0x01, 0x02, 0x4E, 0xD9, ++0x12, 0x52, 0x16, 0x71, 0xD3, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0x90, 0x81, 0x8D, ++0xE0, 0x60, 0x0D, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x02, 0xC1, 0x9F, 0x71, 0xE5, 0x91, 0x01, ++0x22, 0x90, 0x81, 0x83, 0xE0, 0x90, 0x81, 0x8F, 0x30, 0xE0, 0x05, 0xE0, 0xFF, 0x02, 0x6F, 0x95, ++0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x4C, 0x72, 0xE4, 0xFF, 0x12, 0x47, 0xC4, 0xBF, 0x01, 0x0E, 0x90, ++0x81, 0x8D, 0xE0, 0x60, 0x08, 0x91, 0x2E, 0x54, 0x07, 0x70, 0x02, 0x91, 0x01, 0x22, 0x90, 0x81, ++0x91, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x4E, 0x54, ++0xC0, 0x70, 0x07, 0x91, 0x2E, 0x54, 0xFD, 0xF0, 0x80, 0xB7, 0xE5, 0x4E, 0x30, 0xE6, 0x16, 0x90, ++0x81, 0x8D, 0xE0, 0x64, 0x01, 0x70, 0x10, 0x91, 0xE2, 0x64, 0x02, 0x60, 0x04, 0xB1, 0xDA, 0x80, ++0x06, 0xB1, 0x53, 0x80, 0x02, 0x91, 0x2E, 0xE5, 0x4E, 0x90, 0x81, 0x91, 0x30, 0xE7, 0x05, 0x12, ++0x52, 0x7D, 0xE1, 0x60, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0x81, 0xFF, ++0xF0, 0xE0, 0xFD, 0x54, 0xC0, 0x70, 0x04, 0x91, 0x2E, 0x80, 0x53, 0xED, 0x30, 0xE6, 0x3D, 0x90, ++0x81, 0x8D, 0xE0, 0x64, 0x02, 0x70, 0x27, 0x90, 0x81, 0x88, 0xE0, 0xFF, 0xC3, 0x13, 0x20, 0xE0, ++0x09, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x1A, 0x91, 0xE9, 0x64, 0x01, 0x70, 0x1E, ++0x90, 0x81, 0x91, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x01, 0x12, 0x73, 0xD4, 0x80, 0x10, 0x91, 0xE2, ++0x64, 0x02, 0x60, 0x04, 0xB1, 0xDA, 0x80, 0x06, 0xB1, 0x53, 0x80, 0x02, 0x91, 0x2E, 0x90, 0x81, ++0xFF, 0xE0, 0x90, 0x81, 0x91, 0x30, 0xE7, 0x05, 0x12, 0x52, 0x7D, 0xE1, 0x60, 0xE0, 0x54, 0xFD, ++0xF0, 0x22, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x81, 0x8B, 0xE0, 0x54, 0x0F, 0x22, ++0x90, 0x82, 0x79, 0x12, 0x45, 0x40, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0x8D, 0xF0, ++0xEF, 0xF1, 0xC8, 0xA3, 0x71, 0x8A, 0xFF, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0x81, 0x8B, ++0xE0, 0x54, 0xF0, 0x4E, 0xF1, 0x52, 0x54, 0x01, 0x25, 0xE0, 0xFE, 0x90, 0x81, 0x88, 0xE0, 0x54, ++0xFD, 0x4E, 0xF0, 0xEF, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x91, 0xE9, 0x4F, 0xD1, 0x33, 0x90, ++0x81, 0x8C, 0xF1, 0x59, 0xFD, 0x7F, 0x02, 0x12, 0x4E, 0xD9, 0x90, 0x82, 0x79, 0x12, 0x45, 0x37, ++0xD1, 0x01, 0x12, 0x71, 0xE2, 0xF0, 0x90, 0x81, 0x8D, 0x12, 0x7B, 0x7F, 0x91, 0xE8, 0x90, 0x01, ++0xBE, 0xF0, 0x22, 0xD1, 0x9F, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x0C, 0x60, 0x06, 0x12, 0x4E, 0xB0, ++0x12, 0x72, 0x24, 0x22, 0x12, 0x4F, 0xE5, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x30, 0xE0, 0x02, 0xF1, 0xD6, 0xF1, 0xA4, 0x54, 0x3F, 0x30, 0xE0, 0x08, 0xF1, 0xAC, 0x54, 0x07, ++0x70, 0x37, 0x80, 0x33, 0xF1, 0x68, 0x40, 0x2F, 0x12, 0x47, 0xA0, 0x70, 0x2C, 0x91, 0xE9, 0x70, ++0x06, 0xD1, 0xD7, 0xB1, 0xBA, 0xF0, 0x22, 0xD1, 0xD7, 0x90, 0x81, 0x97, 0xE0, 0x04, 0xF0, 0xE0, ++0xD3, 0x94, 0x02, 0x40, 0x0A, 0xB1, 0xBA, 0xF0, 0xE4, 0x90, 0x81, 0x97, 0xF0, 0x80, 0x02, 0xB1, ++0x53, 0xE4, 0x90, 0x81, 0x96, 0xF0, 0x22, 0x91, 0x01, 0x22, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xFB, ++0x22, 0xE4, 0xFF, 0x12, 0x47, 0xC4, 0xBF, 0x01, 0x10, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x0A, 0x91, ++0xE9, 0x64, 0x02, 0x60, 0x02, 0x80, 0x03, 0xB1, 0x53, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x20, ++0x90, 0x80, 0x86, 0xE0, 0xFF, 0x90, 0x82, 0xBE, 0x74, 0x09, 0xF0, 0x7B, 0x18, 0xE4, 0xFD, 0x12, ++0x72, 0xB1, 0x90, 0x82, 0x00, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, ++0x22, 0x90, 0x82, 0x7C, 0x12, 0x45, 0x40, 0x12, 0x7A, 0x14, 0x90, 0x81, 0x8D, 0xE0, 0xFF, 0x12, ++0x4F, 0x41, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x1A, 0x90, 0x82, 0x7C, 0x12, 0x45, 0x37, 0x71, 0x8B, ++0x54, 0x0F, 0xFF, 0xD1, 0x34, 0xFD, 0x12, 0x7A, 0x3A, 0x12, 0x6E, 0xF0, 0x74, 0x01, 0xF0, 0x12, ++0x6D, 0xCE, 0x22, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x1F, 0xBD, 0xD1, 0x34, 0xFF, 0x30, 0xE0, 0x1C, ++0x12, 0x1F, 0xA4, 0x90, 0x81, 0xEA, 0x71, 0x8A, 0x90, 0x81, 0xEB, 0xF0, 0xEF, 0x54, 0xFE, 0xFF, ++0xA3, 0xE0, 0x54, 0x01, 0x4F, 0xF1, 0x52, 0x90, 0x81, 0xED, 0xF0, 0x22, 0x90, 0x81, 0xEA, 0x74, ++0x02, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, ++0xF0, 0x22, 0x12, 0x6F, 0x01, 0x90, 0x81, 0xF5, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, ++0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0x71, 0x8A, 0x90, 0x81, 0xF6, 0xD1, 0x33, 0x90, 0x81, 0xF7, ++0xF0, 0x12, 0x7B, 0xB8, 0xF0, 0x90, 0x81, 0xF5, 0xE0, 0x54, 0x01, 0xFF, 0x02, 0x48, 0xC6, 0x12, ++0x7B, 0xFB, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, 0x92, 0x74, ++0x02, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xEC, 0xE0, 0xC3, ++0x13, 0x54, 0x7F, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12, 0x52, 0x91, 0x90, ++0x81, 0x88, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0xF1, 0x75, 0x40, 0x32, 0x90, 0x81, 0xA7, 0xE0, 0x04, ++0xF0, 0x90, 0x81, 0xE9, 0xE0, 0xFF, 0x90, 0x81, 0xA7, 0xE0, 0xD3, 0x9F, 0x50, 0x1F, 0x90, 0x81, ++0x9F, 0xE0, 0x04, 0xF0, 0x12, 0x57, 0x7B, 0x90, 0x81, 0xA6, 0xF0, 0xFB, 0x90, 0x81, 0x9F, 0xE0, ++0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x82, 0xCA, 0x74, 0x04, 0xF0, 0x12, 0x6D, 0xCE, 0x22, 0x90, 0x02, ++0x09, 0xE0, 0xF5, 0x52, 0x12, 0x1F, 0xA4, 0x25, 0x52, 0x90, 0x80, 0x85, 0x71, 0x8A, 0x25, 0x52, ++0x90, 0x80, 0x86, 0xD1, 0x33, 0x25, 0x52, 0x90, 0x80, 0x87, 0xF1, 0x52, 0x25, 0x52, 0x90, 0x80, ++0x88, 0xF1, 0x59, 0x25, 0x52, 0x90, 0x80, 0x89, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x1F, 0xBD, 0x25, ++0x52, 0x90, 0x80, 0x8A, 0xF0, 0x90, 0x00, 0x06, 0x12, 0x1F, 0xBD, 0x25, 0x52, 0x90, 0x80, 0x8B, ++0xF0, 0x22, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x1F, 0xBD, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x1F, 0xBD, ++0x90, 0x81, 0x88, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x96, 0xE0, 0x04, 0xF0, 0x90, 0x81, ++0x91, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x81, 0xEA, 0xE0, 0xFF, 0x90, 0x81, 0x96, 0xE0, 0xD3, 0x9F, ++0x22, 0x90, 0x01, 0x57, 0xE0, 0x60, 0x1C, 0x12, 0x47, 0xEA, 0xF0, 0xF1, 0xA4, 0x54, 0x3F, 0x30, ++0xE0, 0x02, 0x80, 0x18, 0xF1, 0x68, 0x40, 0x0B, 0xE4, 0xFF, 0x12, 0x47, 0xC4, 0xBF, 0x01, 0x03, ++0xB1, 0xBA, 0xF0, 0x22, 0x90, 0x81, 0x88, 0xE0, 0xFF, 0x13, 0x13, 0x22, 0xEF, 0x54, 0xFB, 0xF0, ++0x90, 0x81, 0x91, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x22, 0x22, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x84, ++0x22, 0xE4, 0x75, 0xF0, 0x01, 0x02, 0x44, 0x9F, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0x7F, ++0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x4A, 0x3F, 0x90, 0x00, 0xF7, ++0xE0, 0x20, 0xE7, 0x09, 0xE0, 0x7F, 0x01, 0x20, 0xE6, 0x0C, 0x7F, 0x02, 0x22, 0x90, 0x00, 0xF7, ++0xE0, 0x30, 0xE6, 0x02, 0x7F, 0x03, 0x22, 0xE4, 0x90, 0x82, 0x10, 0xF0, 0x90, 0x82, 0x10, 0xE0, ++0x64, 0x01, 0xF0, 0x24, 0xF7, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0x90, 0x81, 0x8D, ++0xE0, 0x60, 0x0F, 0x90, 0x81, 0x90, 0xE0, 0xFF, 0x90, 0x81, 0x8F, 0xE0, 0x6F, 0x60, 0x03, 0x12, ++0x5C, 0x01, 0xC2, 0xAF, 0xF1, 0x84, 0xBF, 0x01, 0x02, 0x11, 0x3C, 0xD2, 0xAF, 0xF1, 0x49, 0x12, ++0x32, 0x9E, 0xBF, 0x01, 0x02, 0x31, 0x87, 0x12, 0x41, 0x4D, 0x80, 0xC0, 0x90, 0x81, 0x88, 0xE0, ++0x30, 0xE0, 0x18, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x0E, 0xC3, 0x13, 0x30, 0xE0, 0x07, ++0xF1, 0x5A, 0xBF, 0x01, 0x06, 0x80, 0x02, 0x80, 0x00, 0x11, 0x5C, 0x22, 0x90, 0x81, 0x90, 0xE0, ++0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0D, 0x31, 0x38, 0xBF, 0x01, 0x08, 0x11, 0x74, 0x90, 0x01, 0xE5, ++0xE0, 0x04, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x11, 0x9E, 0x11, 0x84, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xF1, 0x67, 0x90, 0x00, 0x08, 0xE0, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, ++0x32, 0x1E, 0xE4, 0xFF, 0x11, 0xEA, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x81, ++0x89, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x81, 0x98, 0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x32, 0x1E, 0x90, ++0x81, 0x8E, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, ++0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, 0x00, 0x08, 0xE0, 0x44, 0x10, 0xFD, 0x7F, 0x08, ++0x12, 0x32, 0x1E, 0x7F, 0x01, 0x11, 0xEA, 0x90, 0x00, 0x90, 0xE0, 0x44, 0x01, 0xFD, 0x7F, 0x90, ++0x12, 0x32, 0x1E, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x90, 0x82, 0x11, 0xF1, 0x52, 0x90, ++0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x82, 0x11, 0xE0, 0x6F, 0x60, ++0x36, 0xC3, 0x90, 0x82, 0x13, 0xE0, 0x94, 0x88, 0x90, 0x82, 0x12, 0xE0, 0x94, 0x13, 0x40, 0x08, ++0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x82, 0x12, 0x12, 0x5F, 0xC1, 0x12, 0x5F, ++0xCF, 0xD3, 0x90, 0x82, 0x13, 0xE0, 0x94, 0x32, 0x90, 0x82, 0x12, 0xE0, 0x94, 0x00, 0x40, 0xBF, ++0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xB8, 0x22, 0x90, 0x81, 0xF5, 0xE0, 0xC3, 0x13, 0x20, 0xE0, ++0x35, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60, ++0x05, 0x75, 0x4F, 0x01, 0x80, 0x22, 0x90, 0x02, 0x96, 0xE0, 0x60, 0x05, 0x75, 0x4F, 0x10, 0x80, ++0x17, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, ++0x05, 0x75, 0x4F, 0x04, 0x80, 0x02, 0xE1, 0x4A, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, ++0xB8, 0xE5, 0x4F, 0xF0, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x2D, ++0xA7, 0xE4, 0xF5, 0x51, 0x12, 0x32, 0x9E, 0xEF, 0x60, 0x72, 0x63, 0x51, 0x01, 0xE5, 0x51, 0x24, ++0x87, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x61, 0xA3, 0xF0, 0x90, 0x00, 0x88, 0xE0, 0xF5, 0x4F, 0xF5, ++0x50, 0x54, 0x0F, 0x60, 0xDF, 0xE5, 0x4F, 0x30, 0xE0, 0x0B, 0x20, 0xE4, 0x03, 0x12, 0x29, 0xC5, ++0x53, 0x50, 0xEE, 0x80, 0x3E, 0xE5, 0x4F, 0x30, 0xE1, 0x16, 0x20, 0xE5, 0x0E, 0x12, 0x11, 0xBD, ++0xEF, 0x70, 0x03, 0x43, 0x50, 0x20, 0x90, 0x01, 0x06, 0xE4, 0xF0, 0x53, 0x50, 0xFD, 0x80, 0x23, ++0xE5, 0x4F, 0x30, 0xE2, 0x0B, 0x20, 0xE6, 0x03, 0x12, 0x53, 0xE7, 0x53, 0x50, 0xFB, 0x80, 0x13, ++0xE5, 0x4F, 0x30, 0xE3, 0x0E, 0x20, 0xE7, 0x08, 0x51, 0x11, 0xEF, 0x70, 0x03, 0x43, 0x50, 0x80, ++0x53, 0x50, 0xF7, 0xAD, 0x50, 0x7F, 0x88, 0x12, 0x32, 0x1E, 0x80, 0x88, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x78, 0x10, 0x74, 0x01, 0xF2, 0x90, 0x02, 0x09, 0xE0, 0x78, 0x00, 0xF2, 0x08, 0x74, 0x20, ++0xF2, 0x18, 0xE2, 0xFF, 0x30, 0xE0, 0x05, 0x08, 0xE2, 0x24, 0x80, 0xF2, 0xEF, 0xC3, 0x13, 0x90, ++0xFD, 0x10, 0xF0, 0x78, 0x01, 0xE2, 0x91, 0x3E, 0x78, 0x03, 0xF2, 0x64, 0x04, 0x60, 0x0D, 0xE2, ++0xFF, 0x64, 0x08, 0x60, 0x07, 0xEF, 0x64, 0x0C, 0x60, 0x02, 0x81, 0x2C, 0xE4, 0x78, 0x02, 0xF2, ++0x78, 0x03, 0xE2, 0xFF, 0x18, 0xE2, 0xC3, 0x9F, 0x50, 0x25, 0xE2, 0xFD, 0x18, 0xE2, 0x2D, 0x90, ++0x82, 0x11, 0xF0, 0xE0, 0xFF, 0x91, 0x3E, 0xFE, 0x74, 0x04, 0x2D, 0xF8, 0xEE, 0xF2, 0xEF, 0xB4, ++0xFF, 0x06, 0x90, 0xFD, 0x10, 0xE0, 0x04, 0xF0, 0x78, 0x02, 0xE2, 0x04, 0xF2, 0x80, 0xD1, 0x78, ++0x04, 0xE2, 0x78, 0x12, 0xF2, 0xFF, 0x78, 0x05, 0xE2, 0x78, 0x11, 0xF2, 0x78, 0x06, 0xE2, 0x78, ++0x13, 0xF2, 0x78, 0x07, 0xE2, 0x78, 0x14, 0xF2, 0x78, 0x08, 0xE2, 0x78, 0x33, 0xF2, 0x78, 0x09, ++0xE2, 0x78, 0x34, 0xF2, 0x78, 0x0A, 0xE2, 0x78, 0x35, 0xF2, 0x78, 0x0B, 0xE2, 0x78, 0x36, 0xF2, ++0x78, 0x0C, 0xE2, 0x78, 0x37, 0xF2, 0x78, 0x0D, 0xE2, 0x78, 0x38, 0xF2, 0x78, 0x0E, 0xE2, 0x78, ++0x39, 0xF2, 0x78, 0x0F, 0xE2, 0x78, 0x3A, 0xF2, 0xE4, 0x78, 0x15, 0xF2, 0xEF, 0x24, 0xF8, 0x60, ++0x56, 0x24, 0xFC, 0x60, 0x4D, 0x24, 0x08, 0x60, 0x02, 0x81, 0x0E, 0x78, 0x11, 0xE2, 0xB4, 0x01, ++0x05, 0x12, 0x29, 0xC5, 0x81, 0x13, 0x78, 0x11, 0xE2, 0xB4, 0x02, 0x05, 0x12, 0x11, 0xBD, 0x81, ++0x13, 0x78, 0x11, 0xE2, 0xB4, 0x03, 0x05, 0x12, 0x53, 0xE7, 0x81, 0x13, 0x78, 0x11, 0xE2, 0xB4, ++0x10, 0x07, 0x91, 0x49, 0x12, 0x32, 0xAA, 0x81, 0x13, 0x78, 0x11, 0xE2, 0xB4, 0x11, 0x07, 0x91, ++0x49, 0x12, 0x32, 0x06, 0x81, 0x13, 0x78, 0x11, 0xE2, 0xF4, 0x60, 0x02, 0x81, 0x13, 0x18, 0xF2, ++0x81, 0x13, 0x78, 0x15, 0x74, 0x01, 0xF2, 0x78, 0x11, 0xE2, 0x64, 0x07, 0x60, 0x02, 0x61, 0xF8, ++0x78, 0x34, 0x91, 0x2F, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xC0, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, ++0x07, 0x78, 0x33, 0x91, 0x2F, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x78, 0x35, 0x91, 0x2F, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x91, 0x36, 0x78, 0x15, 0xE2, 0x60, 0x77, 0x18, 0xE2, 0xFF, 0x18, 0xE2, 0xFD, ++0xB1, 0xC4, 0x78, 0x1C, 0x12, 0x45, 0x1F, 0x78, 0x38, 0x91, 0x2F, 0x78, 0x08, 0x12, 0x20, 0xBB, ++0xC0, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x78, 0x37, 0x91, 0x2F, 0xD0, 0x00, 0x12, 0x44, ++0xD0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x78, 0x39, 0x91, 0x2F, 0x78, 0x10, 0x12, ++0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0x78, 0x20, 0x12, ++0x45, 0x1F, 0x78, 0x20, 0x12, 0x44, 0xFA, 0x12, 0x20, 0x9B, 0x78, 0x1C, 0x12, 0x45, 0x12, 0x12, ++0x44, 0xC3, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x78, 0x18, 0x12, 0x44, 0xFA, 0x78, ++0x20, 0x12, 0x45, 0x12, 0x12, 0x44, 0xC3, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x91, ++0x36, 0x78, 0x18, 0x12, 0x44, 0xFA, 0x90, 0x82, 0xAE, 0x12, 0x20, 0xCE, 0x78, 0x13, 0xE2, 0xFD, ++0x08, 0xE2, 0xFF, 0x12, 0x57, 0x9F, 0x80, 0x1B, 0x78, 0x13, 0xE2, 0xFF, 0x08, 0xE2, 0xFD, 0x78, ++0x11, 0xE2, 0xFB, 0x78, 0x15, 0xE2, 0x90, 0x82, 0x73, 0xF0, 0x91, 0x5C, 0x80, 0x05, 0x78, 0x10, ++0x74, 0x02, 0xF2, 0x78, 0x10, 0xE2, 0xFF, 0xC3, 0x94, 0x02, 0x50, 0x10, 0xEF, 0x60, 0x0A, 0x78, ++0x02, 0xE2, 0xFF, 0x18, 0xE2, 0x2F, 0xF2, 0x41, 0x33, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xE2, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0x12, 0x44, 0xD0, 0x78, 0x18, 0x02, 0x45, 0x1F, 0x24, 0x00, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x78, 0x14, 0xE2, 0xFE, 0x18, 0xE2, 0xFD, ++0xED, 0xFF, 0x78, 0x16, 0xEE, 0xF2, 0xFE, 0x08, 0xEF, 0xF2, 0xFF, 0x22, 0xAC, 0x07, 0xED, 0xAD, ++0x04, 0x78, 0x24, 0xF2, 0xED, 0x08, 0xF2, 0xEB, 0xB4, 0x04, 0x07, 0x78, 0x27, 0x74, 0x01, 0xF2, ++0x80, 0x0E, 0xEB, 0x78, 0x27, 0xB4, 0x05, 0x05, 0x74, 0x02, 0xF2, 0x80, 0x03, 0x74, 0x04, 0xF2, ++0xB1, 0x9C, 0x94, 0x00, 0x50, 0x45, 0xE4, 0x78, 0x26, 0xF2, 0xB1, 0x76, 0x9F, 0x40, 0x02, 0xA1, ++0x75, 0xB1, 0x7F, 0x60, 0x1F, 0x74, 0x37, 0x2E, 0xF8, 0xE2, 0x78, 0x32, 0xF2, 0xEE, 0xFF, 0x78, ++0x25, 0xE2, 0x2F, 0xFF, 0x18, 0xE2, 0x34, 0x00, 0x8F, 0x82, 0xF5, 0x83, 0xE0, 0x78, 0x29, 0xF2, ++0x78, 0x32, 0xB1, 0xB3, 0x78, 0x24, 0x08, 0xE2, 0xFF, 0x08, 0xE2, 0x2F, 0xFF, 0x78, 0x28, 0xE2, ++0xFD, 0x12, 0x32, 0x1E, 0x78, 0x26, 0xE2, 0x04, 0xF2, 0x80, 0xBF, 0xB1, 0x9C, 0x94, 0x07, 0x50, ++0x30, 0xE4, 0x78, 0x26, 0xF2, 0xB1, 0x76, 0x9F, 0x40, 0x02, 0xA1, 0x75, 0xB1, 0x7F, 0x60, 0x14, ++0x78, 0x26, 0xE2, 0xFF, 0xB1, 0xA5, 0xE0, 0x78, 0x29, 0xF2, 0x74, 0x37, 0x2F, 0xF8, 0xE2, 0x78, ++0x32, 0xF2, 0xB1, 0xB3, 0xB1, 0x94, 0xB1, 0xA5, 0xEF, 0xF0, 0x78, 0x26, 0xE2, 0x04, 0xF2, 0x80, ++0xD4, 0x90, 0x82, 0x73, 0xE0, 0x60, 0x0A, 0xB1, 0x8C, 0x12, 0x2D, 0x5C, 0x78, 0x2E, 0x12, 0x45, ++0x1F, 0xE4, 0x78, 0x26, 0xF2, 0xB1, 0x76, 0x9F, 0x50, 0x4E, 0xB1, 0x7F, 0x60, 0x2B, 0x78, 0x2E, ++0x12, 0x44, 0xFA, 0x78, 0x26, 0xE2, 0xFB, 0x75, 0xF0, 0x08, 0xA4, 0xF9, 0xF8, 0x12, 0x20, 0xA8, ++0x78, 0x29, 0xEF, 0xF2, 0x74, 0x37, 0x2B, 0xF8, 0xE2, 0x78, 0x32, 0xF2, 0xE2, 0xFE, 0xF4, 0x5F, ++0xFF, 0x78, 0x28, 0xE2, 0xFD, 0xEE, 0x5D, 0x4F, 0xF2, 0xB1, 0x94, 0xFD, 0xC3, 0x74, 0x03, 0x9D, ++0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x7B, 0xFE, 0x74, 0x2A, 0x2D, 0xF9, 0x74, 0x80, 0x3C, 0xFA, 0xEF, ++0x12, 0x1F, 0xEA, 0xE2, 0x04, 0xF2, 0x80, 0xAD, 0x78, 0x2A, 0x12, 0x44, 0xFA, 0x12, 0x57, 0xC8, ++0xB1, 0x8C, 0x12, 0x2E, 0xA2, 0x22, 0x78, 0x27, 0xE2, 0xFF, 0x18, 0xE2, 0xFE, 0xC3, 0x22, 0x74, ++0x33, 0x2E, 0xF8, 0xE2, 0x78, 0x28, 0xF2, 0x90, 0x82, 0x73, 0xE0, 0x22, 0x78, 0x24, 0xE2, 0xFE, ++0x08, 0xE2, 0xFF, 0x22, 0x78, 0x28, 0xE2, 0xFF, 0x78, 0x26, 0xE2, 0x22, 0xD3, 0x78, 0x25, 0xE2, ++0x94, 0xFF, 0x18, 0xE2, 0x22, 0xFD, 0x18, 0xE2, 0x2D, 0xFD, 0x18, 0xE2, 0x34, 0x00, 0x8D, 0x82, ++0xF5, 0x83, 0x22, 0xE2, 0xFF, 0xF4, 0xFE, 0x78, 0x29, 0xE2, 0x5E, 0xFE, 0x18, 0xE2, 0xFD, 0xEF, ++0x5D, 0x4E, 0xF2, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xB1, 0xD2, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x82, 0x93, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x20, 0xDA, 0x00, 0x00, ++0x00, 0x00, 0xE4, 0x90, 0x82, 0xA1, 0xF0, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x90, 0x82, ++0x99, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x93, 0xE0, 0xFB, 0x70, 0x08, 0x90, 0x82, 0x99, 0x12, 0x44, ++0xEE, 0x80, 0x06, 0xEB, 0xD1, 0xBD, 0x12, 0x2D, 0x5C, 0x90, 0x82, 0x9D, 0x12, 0x20, 0xCE, 0x90, ++0x82, 0x94, 0x12, 0x53, 0xE0, 0x78, 0x17, 0xF1, 0x41, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x82, 0x9D, ++0x12, 0x44, 0xEE, 0xED, 0x54, 0x7F, 0xFD, 0xEC, 0x54, 0x80, 0xFC, 0x12, 0x44, 0xD0, 0xEC, 0x44, ++0x80, 0xFC, 0x90, 0x82, 0x9D, 0x12, 0x20, 0xCE, 0xD1, 0xD0, 0x54, 0x7F, 0x12, 0x57, 0xC7, 0xD1, ++0xD8, 0xD1, 0xBD, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0x9D, 0x12, 0x44, 0xEE, 0x12, 0x57, 0xC8, ++0xD0, 0x07, 0xD0, 0x06, 0x12, 0x2E, 0xA2, 0xD1, 0xD0, 0x44, 0x80, 0x12, 0x57, 0xC7, 0xD1, 0xD8, ++0x70, 0x04, 0x7F, 0x20, 0x80, 0x09, 0x90, 0x82, 0x93, 0xE0, 0xB4, 0x01, 0x16, 0x7F, 0x28, 0x7E, ++0x08, 0x12, 0x2D, 0x5C, 0x78, 0x08, 0x12, 0x20, 0xA8, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0x90, 0x82, ++0xA1, 0xEF, 0xF0, 0x90, 0x82, 0xA1, 0xE0, 0x90, 0x82, 0x93, 0x60, 0x0E, 0xE0, 0x75, 0xF0, 0x08, ++0xA4, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x80, 0x0C, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, ++0x64, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xD1, 0xC8, 0x12, 0x2D, 0x5C, 0xED, 0x54, 0x0F, 0xFD, 0xE4, ++0xFC, 0x90, 0x82, 0x95, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x95, 0x02, 0x44, 0xEE, 0x75, 0xF0, 0x08, ++0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, ++0x90, 0x82, 0x99, 0x12, 0x44, 0xEE, 0xEC, 0x22, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, ++0x82, 0x93, 0xE0, 0x22, 0x90, 0x82, 0xA2, 0xEF, 0xF0, 0xAB, 0x05, 0x90, 0x82, 0xA8, 0x12, 0x20, ++0xDA, 0x00, 0x00, 0x00, 0x00, 0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x14, 0xF1, 0x41, 0xAA, ++0x06, 0xAB, 0x07, 0x90, 0x82, 0xA4, 0x12, 0x44, 0xEE, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x12, ++0x44, 0xD0, 0xEC, 0x54, 0x0F, 0xFC, 0x90, 0x82, 0xA8, 0x12, 0x20, 0xCE, 0x90, 0x82, 0xA2, 0xE0, ++0x75, 0xF0, 0x08, 0xA4, 0x24, 0x60, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xD1, 0xC8, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x82, 0xA8, 0x12, 0x44, 0xEE, 0x12, 0x57, 0xC8, 0xD0, 0x07, 0xD0, 0x06, 0x02, 0x2E, ++0xA2, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0x22, 0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, ++0x01, 0x22, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x81, 0x86, 0xE0, 0x64, 0x02, ++0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0x90, 0x01, 0xC4, 0x74, 0x67, 0xF0, 0x74, 0x67, 0xA3, ++0xF0, 0x90, 0x00, 0x90, 0xE0, 0x20, 0xE0, 0xF9, 0x74, 0x67, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, ++0x67, 0xA3, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0x84, 0xF0, 0x74, 0x67, 0xA3, 0xF0, ++0x90, 0x81, 0xF9, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, ++0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, ++0x80, 0xDE, 0x74, 0x84, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x67, 0xA3, 0xF0, 0x7F, 0x01, 0x22, ++0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x43, 0x4E, 0x90, 0x82, 0x74, 0xEF, 0xF0, 0x60, 0xF0, ++0x90, 0x80, 0x3C, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE1, ++0x0A, 0x90, 0x80, 0x3C, 0xE0, 0x54, 0xFD, 0xF0, 0x12, 0x68, 0x01, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, ++0x80, 0x3C, 0xE0, 0xFF, 0x30, 0xE2, 0x06, 0x54, 0xFB, 0xF0, 0x12, 0x69, 0x94, 0xD2, 0xAF, 0x80, ++0xCF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x80, 0xDD, 0xE0, 0xFF, 0x90, 0x80, 0xDC, ++0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x3F, 0x90, 0x80, 0xDC, ++0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x8C, 0x12, 0x45, 0x2B, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, ++0x08, 0xA4, 0x24, 0x8D, 0xF9, 0x74, 0x80, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x4B, ++0xD8, 0x90, 0x80, 0xDC, 0x31, 0x8D, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, ++0x80, 0xDC, 0xF0, 0x11, 0x61, 0x90, 0x80, 0x3C, 0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x82, 0xD4, 0xF0, 0x90, 0x82, 0xD4, 0xE0, 0xFD, ++0x70, 0x02, 0x21, 0x65, 0x90, 0x80, 0xDC, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, ++0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x80, 0xDD, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x82, 0xD2, 0x12, ++0x47, 0xF2, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, ++0x21, 0x48, 0xE4, 0x90, 0x82, 0xD5, 0xF0, 0x90, 0x82, 0xD5, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, ++0x38, 0x31, 0x67, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, ++0xD0, 0x31, 0x7E, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x8C, 0x31, 0x6F, 0x31, 0x66, 0xA4, 0x2D, 0xFF, ++0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, 0x31, 0x7E, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x90, 0x31, 0x6F, ++0xF0, 0x90, 0x82, 0xD5, 0xE0, 0x04, 0xF0, 0x80, 0xBE, 0x90, 0x82, 0xD4, 0xE0, 0xFF, 0x90, 0x82, ++0xD2, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, ++0x90, 0x82, 0xD4, 0xF0, 0x90, 0x82, 0xD2, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x82, 0xD2, 0xE0, 0x04, 0xF0, 0xE0, 0x54, ++0x03, 0xF0, 0x90, 0x80, 0xDD, 0x31, 0x8D, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x01, ++0x6B, 0xE4, 0x90, 0x80, 0xDD, 0xF0, 0x01, 0x6B, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, ++0x82, 0xD2, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x31, 0x66, 0x90, 0x01, 0xD0, 0x12, 0x45, 0x2B, ++0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0xF0, 0x90, 0x82, 0xD2, 0xE0, 0x75, 0xF0, 0x04, 0x22, 0x12, ++0x45, 0x2B, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0x22, 0x2F, 0xF5, ++0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x80, 0xDD, 0xE0, 0x22, 0xE0, 0x04, 0xF0, ++0xE0, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0x81, 0x75, ++0xE0, 0xFE, 0x90, 0x81, 0x74, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, ++0xEE, 0x64, 0x01, 0x60, 0x41, 0x90, 0x01, 0xAF, 0xE0, 0x70, 0x0A, 0xED, 0x51, 0x58, 0xFA, 0x7B, ++0x01, 0x51, 0xB0, 0x7F, 0x01, 0xEF, 0x60, 0x2E, 0x90, 0x81, 0x74, 0x31, 0x8D, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x81, 0x74, 0xF0, 0x90, 0x81, 0x75, 0xE0, 0xFF, 0x90, ++0x81, 0x74, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, ++0x80, 0x3C, 0xE0, 0x44, 0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x81, 0x74, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, ++0x14, 0xFF, 0x90, 0x81, 0x75, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, ++0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x28, 0xC0, 0x01, 0x90, 0x81, 0x75, ++0xE0, 0x51, 0x58, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x44, ++0x79, 0x90, 0x81, 0x75, 0x31, 0x8D, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, ++0x81, 0x75, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xDE, 0xF9, 0x74, ++0x80, 0x35, 0xF0, 0x22, 0x90, 0x82, 0x84, 0x74, 0x12, 0xF0, 0x90, 0x82, 0x92, 0x74, 0x05, 0xF0, ++0x90, 0x82, 0x86, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x82, 0x82, 0xE0, 0x90, ++0x82, 0x89, 0xF0, 0x90, 0x82, 0x83, 0xE0, 0x90, 0x82, 0x8A, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, ++0x84, 0x31, 0xFB, 0x7F, 0x04, 0x90, 0x82, 0xD6, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x43, 0x27, 0x90, ++0x80, 0x3C, 0xE0, 0xFF, 0x90, 0x82, 0xD6, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x80, 0x3C, 0xF0, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0x75, 0x12, 0x45, 0x40, 0x90, 0x82, 0xD3, ++0xE0, 0xFF, 0x04, 0xF0, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x1F, 0xFC, 0x7F, 0xAF, 0x7E, 0x01, 0x71, ++0x13, 0xEF, 0x60, 0x3A, 0x90, 0x82, 0x75, 0x12, 0x45, 0x37, 0x8B, 0x13, 0x8A, 0x14, 0x89, 0x15, ++0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x24, 0x02, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, ++0x12, 0x2B, 0xED, 0x90, 0x82, 0x75, 0x12, 0x45, 0x37, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x90, ++0x01, 0xAE, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xB7, 0xEE, 0xF0, 0xA3, ++0x12, 0x67, 0x52, 0x90, 0x82, 0xB7, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x60, ++0x29, 0xC3, 0x90, 0x82, 0xBA, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0xB9, 0xE0, 0x94, 0x03, 0x40, 0x0B, ++0x90, 0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x11, 0x90, 0x82, 0xB9, 0x12, 0x5F, ++0xC1, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x80, 0xC9, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x79, 0x7F, 0xF5, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, ++0x06, 0x90, 0x82, 0x79, 0xE0, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x79, 0x7F, 0xF6, 0x7E, ++0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x79, 0xE0, 0x90, 0x82, 0x7B, 0xF0, 0x7B, ++0x01, 0x7A, 0x82, 0x79, 0x79, 0x7F, 0xF4, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, ++0x82, 0x79, 0xE0, 0x90, 0x82, 0x7C, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x79, 0x7F, 0xF3, 0x7E, ++0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x79, 0xE0, 0x90, 0x82, 0x7D, 0xF0, 0x7B, ++0x01, 0x7A, 0x82, 0x79, 0x79, 0x7F, 0xF2, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, ++0x82, 0x79, 0xE0, 0x90, 0x82, 0x7E, 0xF0, 0x90, 0x82, 0x7A, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, ++0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x82, 0x82, 0xF0, 0x90, 0x82, 0x7E, 0xE0, 0x90, 0x82, 0x83, 0xF0, ++0x41, 0x64, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x78, 0xF0, 0xBF, 0x01, 0x07, 0x71, 0x61, 0xE4, ++0x90, 0x81, 0x78, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFF, 0x90, 0x81, 0xFC, 0xE0, 0x54, ++0xFE, 0x4F, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0x98, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, ++0x81, 0xF0, 0xF0, 0x22, 0x90, 0x82, 0x79, 0x12, 0x45, 0x40, 0x90, 0x82, 0x79, 0x12, 0x45, 0x37, ++0xF1, 0x01, 0x90, 0x81, 0xF1, 0x91, 0xCE, 0x54, 0x04, 0x25, 0xE0, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, ++0xFF, 0x90, 0x81, 0xF1, 0xF0, 0xEE, 0x54, 0x08, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0x12, ++0x5B, 0x8A, 0xFB, 0xFF, 0x90, 0x05, 0x54, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, 0x7C, ++0x00, 0x7D, 0x05, 0x12, 0x20, 0x30, 0x90, 0x81, 0xF3, 0xEF, 0xF0, 0xEB, 0x75, 0xF0, 0x05, 0x84, ++0xA3, 0xF0, 0x90, 0x82, 0x79, 0x12, 0x45, 0x37, 0x12, 0x1F, 0xA4, 0x20, 0xE0, 0x0A, 0x12, 0x51, ++0xBC, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x80, 0x06, 0x12, 0x4E, 0xD5, 0x91, 0xE3, 0xF0, 0xB1, 0x15, ++0x20, 0xE0, 0x04, 0xEF, 0x54, 0xDF, 0xF0, 0x90, 0x81, 0xF1, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x16, ++0x90, 0x81, 0x8D, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x8F, 0xF0, 0x12, 0x4F, 0xD7, 0xF0, 0x90, ++0x05, 0x58, 0x74, 0x05, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0x8D, 0xF0, 0x90, 0x81, 0x8F, 0x74, 0x0C, ++0xF0, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0xE0, 0x54, ++0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x12, 0x1F, ++0xA4, 0xFE, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x44, 0x04, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, ++0x0C, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF3, 0x12, 0x52, 0x87, 0x91, 0xE3, 0xF0, 0x90, 0x80, 0x42, ++0xE0, 0xB4, 0x01, 0x10, 0xB1, 0x15, 0x20, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, ++0x03, 0x12, 0x7A, 0xBA, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x81, ++0x83, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x81, 0x85, 0x74, 0x01, 0xF0, 0x90, 0x81, 0x8D, 0xE0, 0x70, ++0x02, 0xA1, 0xBA, 0x90, 0x81, 0xA4, 0xE0, 0x04, 0x12, 0x53, 0xC6, 0x12, 0x44, 0xD0, 0xC0, 0x04, ++0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x53, 0xE0, 0x78, 0x10, 0x12, 0x20, ++0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x53, 0xE0, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0x90, 0x81, 0xD8, 0x12, 0x20, 0xCE, 0x90, 0x81, ++0x89, 0xE0, 0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x09, 0xD1, 0xF0, 0x74, 0x05, 0xF0, 0xB1, ++0xCE, 0xD1, 0x9F, 0x12, 0x4F, 0xE5, 0x30, 0xE0, 0x0A, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x03, ++0x12, 0x4A, 0x35, 0x90, 0x82, 0xD8, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, ++0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x91, 0xEA, 0x90, 0x81, 0xF5, 0xE0, ++0x30, 0xE0, 0x0A, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x03, 0x12, 0x4A, 0x35, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0x90, 0x81, 0x89, 0xE0, 0x12, 0x5F, 0xC8, 0x30, 0xE0, ++0x02, 0xC1, 0x88, 0x90, 0x81, 0x88, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x81, 0xAA, 0xE0, 0x24, 0x04, ++0x90, 0x81, 0xA2, 0xF0, 0x90, 0x81, 0xAA, 0xE0, 0x24, 0x03, 0x90, 0x81, 0xA1, 0xF0, 0x80, 0x0D, ++0x90, 0x81, 0xA2, 0x74, 0x02, 0xF0, 0x90, 0x81, 0xA1, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x81, 0xA1, ++0xE0, 0xFA, 0x90, 0x81, 0xA0, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x81, 0x95, 0xEB, 0xF0, 0x90, ++0x81, 0xA2, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x81, 0x95, 0xF0, ++0x90, 0x81, 0xA1, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x81, 0xA5, 0xF0, 0x90, 0x81, 0xA2, ++0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0xA5, 0xD1, 0x94, 0x40, 0x04, 0xEF, ++0x24, 0x0A, 0xF0, 0x90, 0x81, 0xA5, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, ++0x95, 0xD1, 0x94, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x81, 0xA5, 0xE0, 0xFF, 0x7E, 0x00, ++0x90, 0x81, 0x99, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, ++0x60, 0x02, 0xF1, 0x0A, 0xD1, 0x9F, 0x80, 0x07, 0x90, 0x81, 0x8A, 0xE0, 0x44, 0x01, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0x90, ++0x81, 0x8A, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x12, 0x76, 0xAF, 0x90, 0x82, 0x04, 0xEF, 0xF0, 0x30, ++0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x4E, 0xD9, 0x90, 0x82, 0x04, ++0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, ++0x01, 0x2F, 0x74, 0x80, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x90, 0x04, 0xEC, 0x30, 0xE0, 0x06, 0xE0, ++0x54, 0xDD, 0xF0, 0x80, 0x04, 0xE0, 0x44, 0x22, 0xF0, 0xD1, 0xF0, 0x74, 0x02, 0xF0, 0xA1, 0xCE, ++0x90, 0x81, 0x9F, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x81, 0xA6, 0xE0, 0xFB, 0x90, 0x82, 0xCA, ++0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x01, 0xFE, 0x22, 0xF0, 0x90, 0x81, 0x99, 0xA3, 0xE0, 0x90, ++0x05, 0x58, 0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x17, 0x90, 0x01, 0x57, 0xE4, 0xF0, ++0xFD, 0xFF, 0x12, 0x4E, 0xB9, 0x12, 0x57, 0xE6, 0x13, 0x30, 0xE0, 0x03, 0x12, 0x4E, 0xD5, 0x91, ++0xE3, 0xF0, 0x22, 0x90, 0x81, 0xFB, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, ++0x02, 0xF0, 0x90, 0x05, 0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x10, 0xA3, ++0x74, 0x01, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x02, 0xF1, 0x64, 0x12, ++0x52, 0xF1, 0x80, 0xB0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x82, 0xE0, 0xB4, ++0x01, 0x04, 0x7F, 0x04, 0x80, 0x0B, 0xF1, 0x89, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x02, 0x12, 0x50, 0x68, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x05, 0x43, 0xE0, 0x7F, 0x00, 0x30, ++0xE7, 0x02, 0x7F, 0x01, 0x22, 0xAE, 0x07, 0xF1, 0x89, 0xBF, 0x01, 0x11, 0xF1, 0xB0, 0x54, 0x03, ++0x20, 0xE0, 0x0A, 0xAF, 0x06, 0x7D, 0x01, 0x12, 0x4C, 0x72, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, ++0x90, 0x81, 0x83, 0xE0, 0xC4, 0x13, 0x13, 0x22, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x07, 0x90, 0x81, ++0x83, 0xE0, 0x30, 0xE0, 0x12, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x08, 0xF1, 0x89, 0xBF, 0x01, ++0x06, 0x02, 0x71, 0x73, 0x12, 0x4F, 0xBC, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xFA, 0x12, 0x5B, ++0x8A, 0x90, 0x81, 0xFB, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0x74, 0xF0, 0xA3, 0xF0, 0x90, 0x80, 0xDC, ++0xF0, 0xA3, 0xF0, 0x22, 0x75, 0x3D, 0x10, 0xE4, 0xF5, 0x3E, 0x75, 0x3F, 0x07, 0x75, 0x40, 0x02, ++0x90, 0x01, 0x30, 0xE5, 0x3D, 0xF0, 0xA3, 0xE5, 0x3E, 0xF0, 0xA3, 0xE5, 0x3F, 0xF0, 0xA3, 0xE5, ++0x40, 0xF0, 0x22, 0x75, 0x45, 0x06, 0x75, 0x46, 0x01, 0x43, 0x46, 0x10, 0x75, 0x47, 0x03, 0x75, ++0x48, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x45, 0xF0, 0xA3, 0xE5, 0x46, 0xF0, 0xA3, 0xE5, 0x47, 0xF0, ++0xA3, 0xE5, 0x48, 0xF0, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, ++0xF0, 0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9C, 0x74, 0x7E, 0xF0, 0xA3, ++0x74, 0x92, 0xF0, 0xA3, 0x74, 0xA0, 0xF0, 0xA3, 0x74, 0x24, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x49, ++0xF0, 0x90, 0x01, 0x9A, 0x74, 0xE0, 0xF0, 0x90, 0x01, 0x99, 0xE4, 0xF0, 0x90, 0x01, 0x98, 0x04, ++0xF0, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x16, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x34, 0xE0, ++0x55, 0x3D, 0xF5, 0x41, 0xA3, 0xE0, 0x55, 0x3E, 0xF5, 0x42, 0xA3, 0xE0, 0x55, 0x3F, 0xF5, 0x43, ++0xA3, 0xE0, 0x55, 0x40, 0xF5, 0x44, 0x90, 0x01, 0x34, 0xE5, 0x41, 0xF0, 0xA3, 0xE5, 0x42, 0xF0, ++0xA3, 0xE5, 0x43, 0xF0, 0xA3, 0xE5, 0x44, 0xF0, 0x22, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x45, 0xF5, ++0x49, 0xA3, 0xE0, 0x55, 0x46, 0xF5, 0x4A, 0xA3, 0xE0, 0x55, 0x47, 0xF5, 0x4B, 0xA3, 0xE0, 0x55, ++0x48, 0xF5, 0x4C, 0x90, 0x01, 0x3C, 0xE5, 0x49, 0xF0, 0xA3, 0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, ++0xF0, 0xA3, 0xE5, 0x4C, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x82, 0xD9, ++0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, ++0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, ++0xA8, 0xF5, 0xE8, 0x12, 0x5A, 0x86, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, ++0x32, 0x1E, 0x80, 0xFE, 0x22, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x05, 0xE4, 0xA3, 0xF0, 0xA3, ++0xF0, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x04, 0x31, 0x4A, 0x60, 0x1B, 0x90, 0x81, ++0x8D, 0xE0, 0x70, 0x04, 0xEF, 0x30, 0xE0, 0x0B, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x02, 0x60, 0x09, ++0x12, 0x49, 0x2A, 0x90, 0x01, 0xE6, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x87, 0xE0, 0x64, 0x02, ++0x22, 0x31, 0x68, 0x30, 0xE0, 0x0B, 0x31, 0x4A, 0x60, 0x07, 0x7D, 0x01, 0x7F, 0x02, 0x12, 0x4C, ++0x72, 0x31, 0x4A, 0x60, 0x02, 0x31, 0x73, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x22, 0x90, 0x81, 0x8D, 0xE0, 0x64, 0x02, 0x60, 0x10, 0x12, 0x5C, 0xE9, 0x60, 0x0B, ++0xB1, 0x2D, 0xEF, 0x70, 0x06, 0xFD, 0x7F, 0x0C, 0x12, 0x4C, 0x72, 0x22, 0x90, 0x81, 0x88, 0x31, ++0x6B, 0x30, 0xE0, 0x19, 0xEF, 0x54, 0xBF, 0x31, 0xAE, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, ++0x80, 0x08, 0xE0, 0x54, 0xFE, 0x31, 0xE1, 0x74, 0x04, 0xF0, 0x12, 0x5C, 0x01, 0x22, 0xF0, 0x90, ++0x04, 0xE0, 0xE0, 0x90, 0x81, 0x89, 0x22, 0x90, 0x81, 0x88, 0xE0, 0xFF, 0x12, 0x5F, 0xC8, 0x30, ++0xE0, 0x1E, 0xEF, 0x54, 0x7F, 0x31, 0xAE, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x07, ++0xE0, 0x54, 0xFD, 0x31, 0xE1, 0x04, 0xF0, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x03, 0x12, 0x5C, 0x01, ++0x22, 0xF0, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0xEF, 0x60, 0x34, 0x12, ++0x47, 0xA0, 0x70, 0x2F, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, 0x0F, 0x12, ++0x4E, 0xB9, 0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0x51, 0x24, 0xBF, 0x01, 0x10, 0x90, 0x81, ++0x88, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x06, 0x12, 0x4F, 0xB4, 0x74, 0x06, 0xF0, 0x22, 0x31, 0xE2, ++0x74, 0x08, 0xF0, 0x22, 0x7D, 0x08, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x82, 0xB2, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x80, 0x3E, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, ++0xE0, 0x60, 0x21, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x82, 0xB6, 0xF0, 0x7D, 0x26, 0x91, 0x48, 0xEF, ++0x64, 0x01, 0x70, 0x02, 0x71, 0x44, 0x90, 0x82, 0xB6, 0xE0, 0xFF, 0x7D, 0x27, 0x12, 0x4E, 0xB9, ++0x91, 0xAE, 0x80, 0x04, 0x91, 0xAE, 0x71, 0x44, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x7F, 0x01, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x80, 0x88, 0xE0, 0xFF, 0x90, 0x82, 0xBE, 0x74, 0x0B, 0xF0, ++0x7B, 0x08, 0x7D, 0x01, 0x51, 0xB1, 0x90, 0x82, 0xCC, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, ++0x90, 0x82, 0xCB, 0xE0, 0xFF, 0x91, 0x28, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x0A, 0x91, 0x1B, 0x44, ++0x10, 0x91, 0x27, 0x44, 0x80, 0xF0, 0x22, 0x91, 0x1B, 0x54, 0xEF, 0x91, 0x27, 0x44, 0x40, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xBC, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, ++0x90, 0x82, 0xBB, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0xB1, 0x19, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0x82, ++0xBB, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x82, 0xBC, 0xE0, 0x60, 0x0E, 0x74, 0x0F, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x08, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0xAF, 0x05, 0x91, 0x10, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x82, ++0xBD, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0x91, 0x10, 0xEE, 0xF0, ++0x90, 0x82, 0xBE, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x1E, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xEF, 0xF0, 0x74, 0x21, 0x2E, 0x91, 0x1E, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x80, 0x87, 0xE0, 0xFF, 0x90, 0x82, 0xB3, 0xE0, 0xFB, 0x90, 0x82, ++0xBE, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x51, 0xB1, 0x90, 0x82, 0xB4, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, ++0xF0, 0xFD, 0x90, 0x82, 0xB2, 0xE0, 0xFF, 0x51, 0x95, 0x90, 0x82, 0xB4, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, 0x07, 0x91, 0x3C, 0x44, 0x01, 0xF0, 0x91, ++0x3C, 0x54, 0xFB, 0xF0, 0xAC, 0x07, 0x74, 0x16, 0x2C, 0x91, 0x13, 0xE0, 0x44, 0xFA, 0xF0, 0x74, ++0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, ++0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, ++0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, ++0xFD, 0xF0, 0x74, 0x14, 0x2C, 0x91, 0x34, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0x91, ++0x34, 0xED, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xCB, 0xEF, 0xF0, ++0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1D, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x82, 0xCE, 0xF0, 0x7D, 0x29, ++0x91, 0x48, 0xBF, 0x01, 0x02, 0x51, 0x75, 0x90, 0x82, 0xCE, 0xE0, 0xFF, 0x7D, 0x2A, 0x12, 0x4E, ++0xB9, 0x80, 0x02, 0x51, 0x75, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x21, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF0, 0x74, 0x1F, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x11, 0x2C, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x7F, 0xFF, 0x12, 0x4E, 0xB9, 0xE4, 0x90, 0x82, ++0xCF, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x82, 0xD1, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, ++0x12, 0x4E, 0xB9, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x11, 0xA3, 0xE0, 0x70, 0x0D, 0xA3, 0xE0, 0x70, ++0x09, 0xA3, 0xE0, 0x70, 0x05, 0x91, 0xA4, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x82, 0xD0, 0xE0, 0x94, ++0xE8, 0x90, 0x82, 0xCF, 0xE0, 0x94, 0x03, 0x40, 0x0C, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, ++0x91, 0xA4, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x90, 0x82, 0xCF, 0x12, ++0x5F, 0xC1, 0x80, 0xBF, 0x90, 0x82, 0xD1, 0xE0, 0xFF, 0x7D, 0x48, 0x02, 0x4E, 0xB9, 0x90, 0x82, ++0xB2, 0xE0, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xDE, 0xEF, 0xF0, 0x90, ++0x80, 0x87, 0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x3E, 0x90, 0x81, 0x90, 0xE0, 0x64, ++0x0E, 0x70, 0x15, 0x90, 0x82, 0xDE, 0xE0, 0x70, 0x30, 0x90, 0x81, 0x88, 0xE0, 0x54, 0x7F, 0xF0, ++0x90, 0x06, 0x04, 0x12, 0x4E, 0xD1, 0x80, 0x1E, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x06, 0x70, 0x19, ++0x90, 0x82, 0xDE, 0xE0, 0x60, 0x13, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xBF, 0xF0, 0xB1, 0x0E, 0xF0, ++0x90, 0x81, 0x90, 0x74, 0x04, 0xF0, 0x12, 0x51, 0xBE, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, ++0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0x22, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, ++0x30, 0xE0, 0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x90, 0x04, 0x1A, ++0xE0, 0xF4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, ++0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0xB1, 0x2D, 0xEF, 0x70, 0x03, 0x12, 0x4F, 0xBC, 0x22, 0x7D, ++0x2D, 0x91, 0x48, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, 0x49, 0x1E, 0x12, ++0x50, 0x08, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x4E, 0xD9, 0xE4, 0x90, 0x81, 0x87, 0xF0, 0x22, 0x90, ++0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x3E, 0x90, 0x81, 0x87, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, ++0x7E, 0x01, 0x90, 0x81, 0x86, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, ++0x24, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x02, 0x6F, 0x64, 0x31, 0x51, 0x90, 0x81, 0x87, 0xE0, ++0xB4, 0x08, 0x06, 0xE4, 0xFD, 0x7F, 0x0C, 0x80, 0x09, 0x90, 0x81, 0x87, 0xE0, 0x70, 0x06, 0xFD, ++0x7F, 0x04, 0x12, 0x4C, 0x72, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xB1, 0x2D, 0xEF, ++0x64, 0x01, 0x60, 0x05, 0x75, 0x0F, 0x01, 0x80, 0x52, 0x90, 0x81, 0x91, 0xE0, 0xFF, 0x54, 0x03, ++0x60, 0x05, 0x75, 0x0F, 0x02, 0x80, 0x44, 0x90, 0x81, 0x8F, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, ++0x05, 0x75, 0x0F, 0x04, 0x80, 0x35, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, 0x80, 0x2C, 0x90, ++0x81, 0x91, 0xE0, 0x30, 0xE4, 0x05, 0x75, 0x0F, 0x10, 0x80, 0x20, 0x90, 0x81, 0x89, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05, 0x75, 0x0F, 0x20, 0x80, 0x10, 0x90, 0x81, 0xF0, 0xE0, 0x60, ++0x05, 0x75, 0x0F, 0x80, 0x80, 0x05, 0x12, 0x67, 0x4A, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, ++0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0F, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, ++0x8D, 0xE0, 0x60, 0x03, 0x12, 0x5D, 0x64, 0x02, 0x51, 0xC8, 0x90, 0x81, 0xFA, 0xE0, 0x60, 0x0F, ++0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x05, 0xFD, 0xE0, 0x04, 0xF0, 0x22, ++0x90, 0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x40, 0x90, 0x81, 0x87, 0xE0, 0x7E, 0x00, 0xB4, 0x02, ++0x02, 0x7E, 0x01, 0x90, 0x81, 0x86, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, ++0x70, 0x26, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x02, 0x6F, 0x64, 0x12, 0x5F, 0x81, 0x90, 0x81, ++0x87, 0xE0, 0xB4, 0x0C, 0x06, 0xE4, 0xFD, 0x7F, 0x08, 0x80, 0x0A, 0x90, 0x81, 0x87, 0xE0, 0xB4, ++0x04, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x4C, 0x72, 0x22, 0xEF, 0x90, 0x02, 0x86, 0x60, 0x06, 0xE0, ++0x44, 0x04, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x80, 0x41, 0xED, 0xF0, 0x22, 0xE4, ++0x90, 0x82, 0x05, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x00, 0x83, 0xE0, 0x90, 0x82, 0x05, 0xF0, ++0x90, 0x00, 0x83, 0xE0, 0xFE, 0x90, 0x82, 0x05, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, ++0x82, 0x07, 0xE0, 0x94, 0x64, 0x90, 0x82, 0x06, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, ++0xE0, 0x44, 0x40, 0xF0, 0x90, 0x82, 0x05, 0xE0, 0xFF, 0x22, 0x90, 0x82, 0x06, 0x12, 0x5F, 0xC1, ++0x80, 0xC6, 0xE4, 0xFE, 0xEF, 0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0xFD, 0xEF, 0x54, 0x1F, 0xFF, ++0xED, 0x60, 0x2C, 0x14, 0x60, 0x1E, 0x24, 0xFD, 0x60, 0x0F, 0x24, 0xFE, 0x70, 0x2A, 0xEF, 0x25, ++0xE0, 0xFF, 0xC3, 0x74, 0xDE, 0x9F, 0xFE, 0x80, 0x1F, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0xF2, ++0x9F, 0xFE, 0x80, 0x14, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x06, 0x9F, 0xFE, 0x80, 0x09, 0xEF, ++0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x10, 0x9F, 0xFE, 0xAF, 0x06, 0x22, 0xD3, 0xEF, 0x64, 0x80, 0x94, ++0x1C, 0x40, 0x07, 0xEF, 0x64, 0x80, 0x94, 0x94, 0x40, 0x03, 0x7F, 0x00, 0x22, 0xC3, 0xEF, 0x64, ++0x80, 0x94, 0x80, 0x40, 0x03, 0x7F, 0x64, 0x22, 0xEF, 0x24, 0x64, 0xFF, 0x22, 0x7E, 0x00, 0x7F, ++0x62, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0x88, 0x12, 0x45, 0x6F, 0x12, 0x7B, 0x72, 0x12, ++0x45, 0x6F, 0x90, 0x81, 0x8C, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x93, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, ++0x74, 0x0A, 0xF0, 0x90, 0x81, 0x99, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x12, 0x7B, 0x5B, 0xF0, ++0x12, 0x7A, 0x96, 0xE4, 0xFD, 0xFF, 0x12, 0x4E, 0xD9, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x4E, 0xD9, ++0x12, 0x4E, 0xD5, 0x90, 0x80, 0x42, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x81, 0x98, 0x74, 0x99, ++0xF0, 0x80, 0x29, 0xEF, 0xB4, 0x03, 0x08, 0x90, 0x81, 0x98, 0x74, 0x90, 0xF0, 0x80, 0x1D, 0x90, ++0x81, 0x98, 0x74, 0x40, 0xF0, 0x90, 0x00, 0x2C, 0xE0, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, 0x90, ++0x81, 0xAA, 0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x81, 0xAA, 0xF0, 0x12, 0x5E, 0x5C, 0x12, ++0x7B, 0x5B, 0xF0, 0x7F, 0x01, 0x12, 0x78, 0x0A, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x7E, 0x00, ++0xFF, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xEE, 0x12, 0x45, 0x6F, 0x12, 0x7A, 0x0C, 0x51, ++0x04, 0x12, 0x51, 0xBE, 0xE4, 0x90, 0x81, 0xF0, 0xF0, 0x22, 0xE4, 0xFE, 0x74, 0xAB, 0x2E, 0x31, ++0xFC, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF4, 0xE4, 0x90, 0x81, 0xA4, 0xF0, 0x90, 0x81, 0xA3, ++0xF0, 0x90, 0x81, 0xA7, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0x2D, 0xF0, 0xE4, 0xA3, 0xF0, ++0x22, 0xE4, 0x90, 0x81, 0xFF, 0xF0, 0xA3, 0xF0, 0xA3, 0x12, 0x53, 0xC6, 0x12, 0x44, 0xD0, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x53, 0xE0, 0x78, 0x10, 0x12, ++0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0xC0, 0x04, 0xC0, ++0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x53, 0xE0, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xD0, 0x90, 0x81, 0xDC, 0x12, 0x20, 0xCE, 0x90, ++0x81, 0xE0, 0x12, 0x44, 0xEE, 0x90, 0x81, 0xDC, 0x12, 0x45, 0x06, 0xC3, 0x12, 0x44, 0xDD, 0x40, ++0x3F, 0x90, 0x81, 0x88, 0xE0, 0x90, 0x81, 0xE0, 0x30, 0xE0, 0x0F, 0x31, 0xDF, 0x90, 0x81, 0xAA, ++0xE0, 0x24, 0x04, 0x2F, 0xFF, 0x90, 0x81, 0xE4, 0x80, 0x05, 0x31, 0xDF, 0x90, 0x81, 0xE5, 0xE0, ++0xFE, 0xC3, 0xEF, 0x9E, 0x90, 0x82, 0x00, 0xF0, 0x90, 0x82, 0x00, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, ++0x50, 0x0E, 0x74, 0xAB, 0x2F, 0x31, 0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0xA3, 0xE0, 0x04, 0xF0, ++0x90, 0x81, 0xA3, 0xE0, 0xFF, 0xD3, 0x90, 0x81, 0xE7, 0xE0, 0x9F, 0x90, 0x81, 0xE6, 0xE0, 0x94, ++0x00, 0x40, 0x02, 0x21, 0xAC, 0x31, 0xBE, 0xF0, 0x31, 0xB5, 0x50, 0x1C, 0x31, 0xC7, 0x90, 0x82, ++0x01, 0xE0, 0xD3, 0x9F, 0x40, 0x0A, 0x90, 0x81, 0xFF, 0xE0, 0x90, 0x82, 0x02, 0xF0, 0x80, 0x08, ++0x90, 0x81, 0xFF, 0xE0, 0x04, 0xF0, 0x80, 0xE0, 0x31, 0xBE, 0xF0, 0x31, 0xB5, 0x50, 0x2C, 0x31, ++0xC7, 0xC3, 0x90, 0x81, 0xE7, 0xE0, 0x9F, 0xFF, 0x90, 0x81, 0xE6, 0xE0, 0x94, 0x00, 0xFE, 0x90, ++0x82, 0x01, 0xE0, 0xD3, 0x9F, 0xE4, 0x9E, 0x40, 0x0A, 0x90, 0x81, 0xFF, 0xE0, 0x90, 0x82, 0x03, ++0xF0, 0x80, 0x08, 0x90, 0x81, 0xFF, 0xE0, 0x04, 0xF0, 0x80, 0xD0, 0x90, 0x82, 0x02, 0xE0, 0x90, ++0x81, 0xA8, 0xF0, 0x90, 0x82, 0x03, 0xE0, 0x90, 0x81, 0xA9, 0x31, 0xAD, 0x94, 0x0A, 0x40, 0x0A, ++0xEF, 0x24, 0xF6, 0x90, 0x81, 0xA0, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x81, 0xA0, 0x31, 0xAD, ++0x74, 0x0A, 0x9F, 0x90, 0x81, 0x9F, 0xF0, 0x90, 0x81, 0xA8, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, ++0x90, 0x81, 0xA6, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x81, 0xE4, 0x80, 0x03, ++0x90, 0x81, 0xE5, 0xE0, 0xFF, 0x90, 0x81, 0xA6, 0xE0, 0x2F, 0x04, 0xF0, 0x90, 0x81, 0xA6, 0xE0, ++0xC3, 0x94, 0x0A, 0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x81, 0xA6, 0xE0, 0x24, 0x02, 0xF0, 0x12, ++0x6E, 0xF0, 0x74, 0x03, 0xF0, 0x12, 0x6D, 0xCE, 0xE4, 0xFF, 0x11, 0x0A, 0x22, 0xF0, 0x90, 0x81, ++0xA8, 0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x81, 0xFF, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x22, 0xE4, 0x90, ++0x82, 0x01, 0xF0, 0x90, 0x81, 0xFF, 0x22, 0x74, 0xAB, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, ++0x83, 0xE0, 0xFF, 0x90, 0x82, 0x01, 0xE0, 0x2F, 0xF0, 0x90, 0x81, 0xE8, 0xE0, 0xFF, 0x22, 0x12, ++0x45, 0x06, 0x90, 0x81, 0xDC, 0x12, 0x44, 0xEE, 0x12, 0x44, 0xB5, 0x78, 0x0A, 0x12, 0x20, 0xA8, ++0x90, 0x81, 0xA5, 0xE0, 0xFE, 0xC3, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x22, 0xF5, 0x82, 0xE4, 0x34, ++0x81, 0xF5, 0x83, 0x22, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0x7F, 0xF0, 0x22, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x81, 0x96, 0xF0, ++0xA3, 0xF0, 0x90, 0x81, 0x91, 0xF0, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, ++0x12, 0x49, 0x14, 0x7D, 0x10, 0x7F, 0x03, 0x02, 0x4A, 0x15, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, ++0x70, 0x24, 0x90, 0x81, 0x93, 0x74, 0x02, 0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, 0x90, 0x81, 0xED, ++0xE0, 0x80, 0x02, 0xED, 0x14, 0x90, 0x81, 0x93, 0xF0, 0x90, 0x81, 0x93, 0xE0, 0xA3, 0xF0, 0x90, ++0x81, 0x89, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x7D, 0x2E, 0x7F, 0x6F, 0x12, 0x4E, 0xB9, 0x7D, 0x02, ++0x7F, 0x01, 0x12, 0x4E, 0xD9, 0x51, 0x7E, 0x90, 0x81, 0x87, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, ++0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x22, 0x12, 0x51, 0xBE, 0x12, 0x4F, 0xDF, 0x12, 0x57, 0xCE, 0x90, ++0x81, 0x87, 0x74, 0x04, 0xF0, 0x22, 0x90, 0x81, 0xE4, 0x74, 0x04, 0xF0, 0xA3, 0x14, 0xF0, 0xA3, ++0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x12, 0x51, 0xBC, ++0x12, 0x4E, 0xD5, 0x90, 0x81, 0x87, 0x74, 0x0C, 0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, ++0x34, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x2D, 0x90, 0x82, 0xDC, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, ++0x94, 0xC8, 0x40, 0x21, 0x90, 0x81, 0xF1, 0xE0, 0x44, 0x20, 0xF0, 0xE4, 0x90, 0x82, 0xDC, 0xF0, ++0x90, 0x81, 0xF1, 0xE0, 0x13, 0x30, 0xE0, 0x0D, 0x90, 0x81, 0x88, 0xE0, 0x44, 0x01, 0xF0, 0x90, ++0x81, 0x98, 0x74, 0xD0, 0xF0, 0x22, 0x7D, 0x22, 0x7F, 0xFF, 0x12, 0x4E, 0xB9, 0x12, 0x57, 0xCE, ++0x90, 0x81, 0x86, 0x74, 0x03, 0xF0, 0x22, 0x12, 0x52, 0x16, 0x7D, 0x24, 0x71, 0x10, 0xF0, 0x22, ++0x7F, 0x6F, 0x12, 0x4E, 0xB9, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x90, 0x81, 0x86, 0x74, ++0x04, 0x22, 0x7D, 0x25, 0x71, 0x10, 0xF0, 0x22, 0x12, 0x52, 0x16, 0x90, 0x81, 0x86, 0x74, 0x03, ++0xF0, 0x22, 0x7B, 0xFE, 0x7A, 0x80, 0x79, 0x33, 0x12, 0x2B, 0xED, 0x90, 0x82, 0x24, 0xE0, 0xFF, ++0x90, 0x82, 0x23, 0xE0, 0xFD, 0xE4, 0x90, 0x82, 0x73, 0x22, 0x12, 0x44, 0xD0, 0x90, 0x81, 0xE0, ++0x12, 0x20, 0xCE, 0x90, 0x81, 0x89, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x90, 0x81, 0xAA, 0xE0, 0x24, ++0x04, 0x90, 0x81, 0xA5, 0xF0, 0xA3, 0x74, 0x0A, 0x22, 0x90, 0x81, 0x8B, 0xE0, 0xFF, 0xC4, 0x54, ++0x0F, 0x22, 0x7E, 0x00, 0x7F, 0x04, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xF5, 0x22, 0xE0, ++0x90, 0x01, 0xBA, 0xF0, 0x90, 0x81, 0x8F, 0xE0, 0x90, 0x01, 0xBB, 0x22, 0x90, 0x01, 0x34, 0x74, ++0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x02, 0x49, 0x1E, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFE, 0xEF, ++0x54, 0x07, 0xFF, 0x22, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2E, 0xA2, 0x90, 0x82, 0xAE, 0x22, 0x90, ++0x81, 0xF7, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0x90, 0x81, 0xF6, 0xE0, 0x14, 0x90, 0x81, 0xF8, ++0x22, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0xEC, 0x22, 0x90, 0x81, 0x83, 0xE0, 0x13, 0x13, ++0x54, 0x3F, 0x22, 0x90, 0x81, 0x89, 0xE0, 0xFF, 0x13, 0x13, 0x22, 0x90, 0x81, 0xF7, 0xE0, 0x90, ++0x01, 0x3F, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x81, 0x93, 0xE0, 0xFF, ++0xA3, 0xE0, 0x22, 0x90, 0x81, 0x93, 0xE0, 0x90, 0x05, 0x73, 0x22, 0x90, 0x81, 0x88, 0xE0, 0x13, ++0x13, 0x13, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0x4D, 0xFF, 0x90, 0x81, 0x83, ++0xF0, 0xEE, 0x22, 0x00, 0xFC, 0x97, ++}; ++u4Byte ArrayLength_MP_8188E_T_FW_NIC = 15414; ++ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188E_T_FW_NIC; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188E_T_FW_NIC, ArrayLength_MP_8188E_T_FW_NIC); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188E_T_FW_NIC; ++} ++ ++ ++u1Byte Array_MP_8188E_T_FW_NIC_89EM[] = { ++0xE1, 0x88, 0x40, 0x00, 0x16, 0x00, 0x00, 0x00, 0x03, 0x03, 0x11, 0x59, 0x72, 0x38, 0x00, 0x00, ++0x28, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x45, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xC1, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xC1, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE1, 0xFA, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x41, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x46, 0x04, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x46, 0x04, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x41, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x41, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x41, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xE7, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, ++0x46, 0xE7, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x3E, 0x88, 0x82, 0x8C, 0x83, 0xE7, 0x09, 0xF0, ++0xA3, 0xDF, 0xFA, 0x80, 0x32, 0xE3, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x78, 0xE3, 0x09, 0xF2, ++0x08, 0xDF, 0xFA, 0x80, 0x70, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, ++0x64, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x58, 0x89, 0x82, 0x8A, ++0x83, 0xE0, 0xA3, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x4C, 0x80, 0xD2, 0x80, 0xFA, 0x80, 0xC6, 0x80, ++0xD4, 0x80, 0x69, 0x80, 0xF2, 0x80, 0x33, 0x80, 0x10, 0x80, 0xA6, 0x80, 0xEA, 0x80, 0x9A, 0x80, ++0xA8, 0x80, 0xDA, 0x80, 0xE2, 0x80, 0xCA, 0x80, 0x33, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, ++0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, ++0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0x0D, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, ++0xA3, 0xF6, 0x08, 0xDF, 0xF9, 0xEC, 0xFA, 0xA9, 0xF0, 0xED, 0xFB, 0x22, 0x89, 0x82, 0x8A, 0x83, ++0xEC, 0xFA, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xEA, 0xDE, 0xE8, 0x80, 0xDB, 0x89, 0x82, 0x8A, 0x83, ++0xE4, 0x93, 0xA3, 0xF2, 0x08, 0xDF, 0xF9, 0x80, 0xCC, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, ++0x60, 0xC3, 0x88, 0xF0, 0xED, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0xB9, 0xF5, 0x82, 0xEB, 0x24, ++0x02, 0xB4, 0x04, 0x00, 0x50, 0xAF, 0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x43, 0xF9, 0x73, 0xC5, ++0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, 0x02, 0x15, ++0x83, 0xE0, 0x38, 0xF0, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, 0xEC, 0x58, ++0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE2, 0xFC, 0x08, 0xE2, 0xFD, ++0x08, 0xE2, 0xFE, 0x08, 0xE2, 0xFF, 0x22, 0xE2, 0xFB, 0x08, 0xE2, 0xF9, 0x08, 0xE2, 0xFA, 0x08, ++0xE2, 0xCB, 0xF8, 0x22, 0xEC, 0xF2, 0x08, 0xED, 0xF2, 0x08, 0xEE, 0xF2, 0x08, 0xEF, 0xF2, 0x22, ++0xA4, 0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, ++0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, ++0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, ++0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, ++0xA3, 0xA3, 0x80, 0xDF, 0xEF, 0x4E, 0x60, 0x12, 0xEF, 0x60, 0x01, 0x0E, 0xED, 0xBB, 0x01, 0x0B, ++0x89, 0x82, 0x8A, 0x83, 0xF0, 0xA3, 0xDF, 0xFC, 0xDE, 0xFA, 0x22, 0x89, 0xF0, 0x50, 0x07, 0xF7, ++0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0xBB, 0xFE, 0xFC, 0xF3, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, ++0x02, 0x45, 0xAE, 0x02, 0x41, 0xDD, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, ++0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, ++0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, ++0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x45, ++0xF3, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, ++0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, ++0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, ++0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, ++0xE7, 0x80, 0xBE, 0x41, 0x82, 0xD0, 0x00, 0x41, 0x82, 0xD1, 0x00, 0x41, 0x82, 0xDA, 0x00, 0x41, ++0x82, 0xDD, 0x00, 0x00, 0x50, 0xEB, 0x57, 0xF6, 0x5F, 0xDA, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, ++0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x0A, 0xF0, 0x74, 0x46, 0xA3, ++0xF0, 0xD1, 0x7B, 0xE5, 0x3C, 0x30, 0xE7, 0x02, 0xD1, 0x60, 0x74, 0x0A, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x46, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0x7F, 0x01, 0x7E, 0x00, 0x12, 0x32, 0x06, 0x90, 0x00, 0xF2, 0xE0, 0x20, 0xE6, 0x0C, 0x90, 0x00, ++0x05, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x05, 0x12, 0x32, 0x1E, 0x22, 0x90, 0x00, 0x54, 0xE0, 0x55, ++0x35, 0xF5, 0x39, 0xA3, 0xE0, 0x55, 0x36, 0xF5, 0x3A, 0xA3, 0xE0, 0x55, 0x37, 0xF5, 0x3B, 0xA3, ++0xE0, 0x55, 0x38, 0xF5, 0x3C, 0xAD, 0x39, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0xAD, 0x3A, 0x7F, 0x55, ++0x12, 0x32, 0x1E, 0xAD, 0x3B, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0xAD, 0x3C, 0x7F, 0x57, 0x12, 0x32, ++0x1E, 0x53, 0x91, 0xEF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xB5, 0xF0, 0x74, 0x46, 0xA3, 0xF0, 0x12, 0x71, 0xDC, 0xE5, ++0x41, 0x30, 0xE4, 0x02, 0xF1, 0x51, 0xE5, 0x41, 0x30, 0xE6, 0x03, 0x12, 0x72, 0x75, 0xE5, 0x43, ++0x30, 0xE0, 0x03, 0x12, 0x72, 0x82, 0xE5, 0x43, 0x30, 0xE1, 0x03, 0x12, 0x73, 0x6F, 0xE5, 0x43, ++0x30, 0xE2, 0x03, 0x12, 0x73, 0xBE, 0xE5, 0x43, 0x30, 0xE3, 0x02, 0xF1, 0x64, 0xE5, 0x43, 0x30, ++0xE4, 0x02, 0xF1, 0x7C, 0xE5, 0x43, 0x30, 0xE5, 0x03, 0x12, 0x69, 0xAD, 0xE5, 0x43, 0x30, 0xE6, ++0x02, 0xF1, 0xC6, 0xE5, 0x44, 0x30, 0xE1, 0x03, 0x12, 0x6C, 0x1D, 0x74, 0xB5, 0x04, 0x90, 0x01, ++0xC4, 0xF0, 0x74, 0x46, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, ++0x32, 0x12, 0x60, 0x79, 0x7F, 0x02, 0x8F, 0x0D, 0x7F, 0x02, 0x71, 0x27, 0x90, 0x80, 0x3C, 0xE0, ++0x45, 0x0D, 0xF0, 0x22, 0xF1, 0x74, 0x70, 0x0B, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x05, 0xF1, 0xBB, ++0x12, 0x56, 0x87, 0x22, 0xE4, 0xFF, 0xF1, 0x97, 0xEF, 0x64, 0x01, 0x22, 0xF1, 0x74, 0x70, 0x16, ++0x90, 0x81, 0x8D, 0xE0, 0x60, 0x10, 0xF1, 0xBB, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x12, 0x6C, 0xBD, ++0x54, 0x07, 0x70, 0x02, 0xF1, 0xDC, 0x22, 0x12, 0x78, 0x11, 0x12, 0x51, 0xA2, 0xE0, 0xFD, 0x7C, ++0x00, 0x12, 0x62, 0xC6, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, ++0xFE, 0xEF, 0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, ++0x90, 0x01, 0x3C, 0x74, 0x02, 0x22, 0xE4, 0xFF, 0xF1, 0x97, 0xBF, 0x01, 0x0E, 0x90, 0x81, 0x8D, ++0xE0, 0x60, 0x08, 0xF1, 0xF2, 0x54, 0x07, 0x70, 0x02, 0xF1, 0xDC, 0x22, 0x90, 0x81, 0x83, 0xE0, ++0x90, 0x81, 0x8F, 0x30, 0xE0, 0x05, 0xE0, 0xFF, 0x02, 0x6C, 0x48, 0xE0, 0xFF, 0x7D, 0x01, 0x02, ++0x4C, 0x66, 0x90, 0x81, 0x91, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, ++0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xFA, 0xF0, 0x74, 0x47, 0xA3, ++0xF0, 0x12, 0x72, 0x09, 0xE5, 0x49, 0x30, 0xE1, 0x03, 0x12, 0x73, 0xE7, 0xE5, 0x49, 0x30, 0xE2, ++0x03, 0x12, 0x73, 0xF3, 0xE5, 0x4A, 0x30, 0xE0, 0x03, 0x12, 0x6E, 0x59, 0xE5, 0x4A, 0x30, 0xE4, ++0x03, 0x12, 0x74, 0x0A, 0xE5, 0x4B, 0x30, 0xE1, 0x03, 0x12, 0x74, 0x68, 0xE5, 0x4B, 0x30, 0xE0, ++0x03, 0x12, 0x74, 0x20, 0xE5, 0x4B, 0x30, 0xE4, 0x02, 0xF1, 0xEF, 0xE5, 0x4C, 0x30, 0xE1, 0x05, ++0x7F, 0x04, 0x12, 0x47, 0x56, 0xE5, 0x4C, 0x30, 0xE4, 0x02, 0x11, 0xA2, 0xE5, 0x4C, 0x30, 0xE5, ++0x03, 0x12, 0x6C, 0x63, 0xE5, 0x4C, 0x30, 0xE6, 0x03, 0x12, 0x6C, 0xE0, 0x74, 0xFA, 0x04, 0x90, ++0x01, 0xC4, 0xF0, 0x74, 0x47, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, ++0xE0, 0x32, 0x12, 0x6E, 0xB3, 0x31, 0x18, 0x90, 0x81, 0xF5, 0xE0, 0x30, 0xE0, 0x15, 0x12, 0x78, ++0x1D, 0x90, 0x81, 0xF8, 0xE0, 0x60, 0x04, 0x14, 0xF0, 0xC1, 0xB8, 0x12, 0x70, 0xEA, 0xF0, 0xE4, ++0xFF, 0x11, 0xC4, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x64, 0x01, 0x70, 0x18, ++0x12, 0x78, 0x37, 0x60, 0x09, 0x31, 0x0B, 0x51, 0x23, 0x12, 0x78, 0x1D, 0x80, 0x06, 0x31, 0x0B, ++0x51, 0x0B, 0x51, 0x2B, 0xD1, 0xB8, 0x80, 0x1A, 0x12, 0x78, 0x37, 0x60, 0x06, 0x31, 0x0B, 0x51, ++0x23, 0x80, 0x04, 0x31, 0x0B, 0x51, 0x0B, 0x31, 0x18, 0x7D, 0x01, 0x7F, 0x02, 0x31, 0x1C, 0x12, ++0x57, 0xB2, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, ++0x03, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0x31, 0x1C, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x3D, 0x2F, 0xF8, ++0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x41, 0x14, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, ++0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x81, 0xFD, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x47, 0x74, 0x60, 0x02, 0x21, 0xFE, 0x90, 0x81, 0x8D, 0xE0, ++0x70, 0x02, 0x21, 0xFE, 0x12, 0x78, 0x47, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, ++0x81, 0x94, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x81, 0x93, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, ++0x90, 0x81, 0x93, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0x81, 0x94, 0xEF, 0xF0, 0xE4, 0x90, 0x81, ++0x96, 0x12, 0x77, 0xEC, 0x12, 0x47, 0xBB, 0x12, 0x6C, 0xBF, 0x54, 0xEF, 0xF0, 0x12, 0x73, 0x66, ++0x24, 0xFD, 0x50, 0x02, 0x80, 0x0F, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x05, 0x12, 0x69, 0x2A, ++0x80, 0x03, 0x12, 0x69, 0xEC, 0xF1, 0xD9, 0x30, 0xE0, 0x51, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x20, 0xE0, 0x20, 0x12, 0x78, 0x3F, 0x6F, 0x70, 0x42, 0x90, 0x81, 0x89, 0xE0, 0x44, 0x40, 0xF0, ++0x12, 0x6F, 0xD1, 0x31, 0x07, 0x51, 0x23, 0x51, 0x31, 0xF1, 0xF0, 0x90, 0x81, 0x94, 0xE0, 0x14, ++0xF0, 0x80, 0x28, 0x12, 0x78, 0x47, 0x64, 0x01, 0x70, 0x21, 0x12, 0x78, 0x3F, 0xFE, 0x6F, 0x60, ++0x1A, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x11, 0x12, 0x78, 0x2F, 0x54, 0x3F, 0x30, ++0xE0, 0x09, 0xEF, 0x54, 0xBF, 0x31, 0x07, 0x51, 0x0B, 0x31, 0x12, 0xF1, 0xCB, 0xF0, 0x90, 0x81, ++0x83, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x03, 0xF1, 0xCB, 0xF0, 0x22, 0x74, 0x45, 0x12, 0x78, 0x57, ++0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x7D, ++0x03, 0x7F, 0x02, 0x74, 0x45, 0x2F, 0xF8, 0xE6, 0x4D, 0x80, 0xE5, 0x7D, 0x02, 0x7F, 0x02, 0x51, ++0x35, 0x7D, 0x01, 0x7F, 0x02, 0x74, 0x3D, 0x12, 0x78, 0x57, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0xD4, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x52, 0x8A, 0x53, 0x89, 0x54, 0x90, 0x05, 0x27, ++0xE0, 0xF5, 0x55, 0x12, 0x70, 0xB5, 0x90, 0x81, 0x83, 0x12, 0x70, 0xA0, 0x54, 0x04, 0xFD, 0xEF, ++0x54, 0xFB, 0x12, 0x78, 0x5F, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0x12, 0x70, 0xAE, 0x54, ++0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x12, 0x78, 0x5F, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x12, ++0x70, 0xAE, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x4D, 0x90, 0x81, 0x83, 0xF0, 0xEE, 0xC3, 0x13, ++0x20, 0xE0, 0x02, 0x61, 0x22, 0xE0, 0x30, 0xE0, 0x74, 0x51, 0x1F, 0x75, 0x55, 0x21, 0x12, 0x78, ++0x26, 0x30, 0xE0, 0x07, 0xF1, 0xE4, 0x43, 0x55, 0x08, 0x80, 0x0C, 0xE4, 0x90, 0x81, 0x84, 0xF0, ++0xA3, 0xF0, 0x7D, 0x40, 0xFF, 0x51, 0x35, 0x90, 0x81, 0x83, 0xF1, 0xDC, 0x30, 0xE0, 0x03, 0x43, ++0x55, 0x12, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x55, 0x14, 0x90, 0x81, 0x83, 0xE0, ++0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x03, 0x43, 0x55, 0x80, 0x12, 0x6F, 0xC9, 0x54, 0x03, 0x20, ++0xE0, 0x03, 0x43, 0x55, 0x40, 0x91, 0x5B, 0x90, 0x81, 0x86, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, ++0x53, 0xD1, 0x12, 0x6C, 0x12, 0x30, 0xE0, 0x04, 0x7F, 0x04, 0x80, 0x0C, 0x12, 0x6C, 0x3C, 0xEF, ++0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x12, 0x53, 0xD1, 0x61, 0x94, 0x75, 0x55, 0x01, ++0x91, 0x5B, 0x90, 0x81, 0x86, 0xE0, 0x64, 0x04, 0x60, 0x02, 0x61, 0xC7, 0xFF, 0x12, 0x53, 0xD1, ++0x61, 0xC7, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x73, 0x51, 0x1F, 0x43, 0x55, 0x31, 0x12, 0x78, ++0x26, 0x30, 0xE0, 0x07, 0xF1, 0xE4, 0x43, 0x55, 0x08, 0x80, 0x06, 0x7D, 0x40, 0xE4, 0xFF, 0x51, ++0x35, 0x90, 0x81, 0x83, 0xF1, 0xDC, 0x30, 0xE0, 0x03, 0x43, 0x55, 0x02, 0xEF, 0xC4, 0x54, 0x0F, ++0x30, 0xE0, 0x03, 0x43, 0x55, 0x04, 0x91, 0x5B, 0x12, 0x6C, 0x12, 0x30, 0xE0, 0x0B, 0x12, 0x6C, ++0x0B, 0x60, 0x31, 0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x1F, 0x12, 0x57, 0x2D, 0x90, 0x81, 0x87, 0xE0, ++0xB4, 0x02, 0x19, 0x12, 0x57, 0xBE, 0x12, 0x6C, 0x3C, 0xBF, 0x01, 0x09, 0x90, 0x81, 0x8F, 0xE0, ++0xFF, 0x7D, 0x01, 0x80, 0x03, 0xE4, 0xFD, 0xFF, 0x91, 0x66, 0x80, 0x08, 0x90, 0x81, 0x90, 0xE0, ++0x90, 0x81, 0x87, 0xF0, 0x90, 0x05, 0x40, 0x74, 0x22, 0xF0, 0x80, 0x2B, 0x75, 0x55, 0x01, 0x91, ++0x5B, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x06, 0x7D, 0x01, 0x7F, 0x04, 0x80, 0x0B, 0x90, 0x81, ++0x87, 0xE0, 0xB4, 0x08, 0x06, 0x7D, 0x01, 0x7F, 0x0C, 0x91, 0x66, 0x12, 0x76, 0x50, 0x90, 0x81, ++0x8F, 0x12, 0x47, 0xEB, 0x12, 0x52, 0x16, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x82, 0x74, 0x12, ++0x45, 0x15, 0x90, 0x82, 0x73, 0xEF, 0xF0, 0x12, 0x45, 0x1E, 0x4C, 0x05, 0x00, 0x4C, 0x0A, 0x01, ++0x4C, 0x0F, 0x02, 0x4C, 0x14, 0x12, 0x4C, 0x19, 0x14, 0x4C, 0x1E, 0x20, 0x4C, 0x23, 0x21, 0x4C, ++0x28, 0x23, 0x4C, 0x2D, 0x24, 0x4C, 0x31, 0x25, 0x4C, 0x36, 0x26, 0x4C, 0x3B, 0x27, 0x4C, 0x40, ++0xC0, 0x00, 0x00, 0x4C, 0x45, 0x91, 0x55, 0x02, 0x68, 0x31, 0x91, 0x55, 0x02, 0x53, 0x2C, 0x91, ++0x55, 0x02, 0x53, 0x91, 0x91, 0x55, 0x02, 0x63, 0xC3, 0x91, 0x55, 0x02, 0x6F, 0xD9, 0x91, 0x55, ++0x02, 0x68, 0xB8, 0x91, 0x55, 0x02, 0x68, 0x7E, 0x91, 0x55, 0x02, 0x6F, 0xE8, 0x91, 0x55, 0x41, ++0x40, 0x91, 0x55, 0x02, 0x6F, 0xF0, 0x91, 0x55, 0x02, 0x6F, 0xF8, 0x91, 0x55, 0x02, 0x70, 0xBD, ++0x91, 0x55, 0x02, 0x70, 0xFC, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x82, 0x73, 0xE0, ++0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90, 0x82, 0x74, 0x02, 0x45, 0x0C, 0x90, 0x05, 0x27, 0xE5, 0x55, ++0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xD9, ++0xED, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xA1, ++0xB2, 0xEE, 0x12, 0x6D, 0x09, 0x30, 0xE0, 0x02, 0xA1, 0xB2, 0x90, 0x81, 0x90, 0xE0, 0xFE, 0x6F, ++0x70, 0x02, 0xA1, 0xB2, 0xEF, 0x70, 0x02, 0xA1, 0x25, 0x24, 0xFE, 0x70, 0x02, 0xA1, 0x5F, 0x24, ++0xFE, 0x60, 0x4A, 0x24, 0xFC, 0x70, 0x02, 0xA1, 0x9A, 0x24, 0xFC, 0x60, 0x02, 0xA1, 0xAB, 0xEE, ++0xB4, 0x0E, 0x02, 0xD1, 0x11, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xD1, 0x5A, 0x90, ++0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0x35, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x04, 0x0F, 0x90, ++0x82, 0xD9, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0x76, 0x86, 0x80, 0x03, 0x12, 0x57, 0x11, 0x90, 0x81, ++0x90, 0xE0, 0x64, 0x08, 0x60, 0x02, 0xA1, 0xAB, 0x12, 0x57, 0xB2, 0xA1, 0xAB, 0x90, 0x81, 0x90, ++0xE0, 0x70, 0x04, 0x7F, 0x01, 0xD1, 0x5A, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0x35, ++0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0E, 0x07, 0xB1, 0xB7, 0xBF, 0x01, 0x02, 0xD1, 0x11, 0x90, 0x81, ++0x90, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0xA1, 0xAB, 0xB1, 0xB7, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xA1, ++0xAB, 0xD1, 0x73, 0xA1, 0xAB, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0E, 0x07, 0xB1, 0xB7, 0xBF, 0x01, ++0x02, 0xD1, 0x11, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x06, 0x02, 0xD1, 0x35, 0x90, 0x81, 0x90, 0xE0, ++0xB4, 0x0C, 0x07, 0xB1, 0xB7, 0xBF, 0x01, 0x02, 0xD1, 0x73, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x04, ++0x70, 0x59, 0x12, 0x75, 0xD1, 0xEF, 0x64, 0x01, 0x70, 0x51, 0x12, 0x76, 0xC0, 0x80, 0x4C, 0x90, ++0x81, 0x90, 0xE0, 0xB4, 0x0E, 0x07, 0xB1, 0xB7, 0xBF, 0x01, 0x02, 0xD1, 0x11, 0x90, 0x81, 0x90, ++0xE0, 0xB4, 0x06, 0x02, 0xD1, 0x35, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, 0x07, 0xB1, 0xB7, 0xBF, ++0x01, 0x02, 0xD1, 0x73, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0xD1, 0x5A, 0x90, 0x81, ++0x90, 0xE0, 0xB4, 0x04, 0x16, 0x12, 0x76, 0xE1, 0x80, 0x11, 0x90, 0x81, 0x90, 0xE0, 0xB4, 0x0C, ++0x0A, 0x12, 0x78, 0x2F, 0x54, 0x3F, 0x30, 0xE0, 0x02, 0xD1, 0xB8, 0x90, 0x81, 0x90, 0x12, 0x78, ++0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x75, ++0xB8, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, 0x01, 0x80, 0x33, 0x12, 0x78, 0x4F, 0x54, 0x1F, ++0x30, 0xE0, 0x05, 0x75, 0x0E, 0x02, 0x80, 0x26, 0x90, 0x81, 0x8F, 0xE0, 0xD3, 0x94, 0x04, 0x40, ++0x05, 0x75, 0x0E, 0x08, 0x80, 0x18, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, ++0x3F, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x11, 0x80, 0x05, 0x12, 0x76, 0x48, 0x80, 0x0E, 0x90, 0x01, ++0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x90, 0x81, 0x89, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0xD1, 0xC9, 0x80, 0x12, 0x12, 0x77, ++0xBA, 0xF1, 0xD2, 0x90, 0x05, 0x27, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x81, 0x87, 0x74, 0x04, 0xF0, ++0xE4, 0xFD, 0xFF, 0x80, 0x78, 0x90, 0x81, 0x89, 0xE0, 0x90, 0x06, 0x04, 0x20, 0xE0, 0x07, 0xE0, ++0x44, 0x40, 0xF1, 0xD2, 0x80, 0x0F, 0xD1, 0xC5, 0x90, 0x05, 0x27, 0xE0, 0x54, 0x7F, 0xF0, 0x90, ++0x81, 0x87, 0x74, 0x0C, 0xF0, 0xE4, 0xFD, 0xFF, 0x80, 0x53, 0x90, 0x82, 0xD8, 0xEF, 0xF0, 0x12, ++0x55, 0xD3, 0x90, 0x82, 0xD8, 0xE0, 0x60, 0x03, 0x12, 0x55, 0xCD, 0x7D, 0x04, 0xF1, 0xA8, 0x74, ++0x04, 0xF0, 0x22, 0x12, 0x47, 0x74, 0x70, 0x2B, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xFD, 0xF0, 0x7D, ++0x2C, 0x7F, 0x6F, 0xD1, 0xAD, 0x7D, 0x08, 0x7F, 0x01, 0x12, 0x5F, 0x82, 0xBF, 0x01, 0x0F, 0x90, ++0x81, 0x88, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0xF1, 0xA8, 0x74, 0x0E, 0xF0, 0x22, 0x12, 0x6C, ++0x86, 0x04, 0xF0, 0x22, 0xE4, 0xFD, 0x7F, 0x0C, 0x91, 0x66, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, ++0xEF, 0xF0, 0x90, 0x80, 0x40, 0xED, 0xF0, 0x22, 0x7D, 0x2F, 0x12, 0x55, 0x34, 0x7D, 0x08, 0xF1, ++0xA8, 0x74, 0x08, 0xF0, 0x22, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, 0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0xEF, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, ++0x1A, 0xED, 0x54, 0x01, 0xFE, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0x80, 0x0C, 0x90, ++0x81, 0x90, 0xED, 0xF0, 0x80, 0x05, 0x90, 0x81, 0x8F, 0xED, 0xF0, 0x90, 0x00, 0x8F, 0xE0, 0x30, ++0xE4, 0x2E, 0xEC, 0x14, 0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, 0x23, 0x90, 0x81, 0x88, ++0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0x81, 0x90, 0xE0, 0x54, 0x7F, ++0x4F, 0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, 0x81, 0x8F, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x32, 0x1E, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x70, 0x35, 0x7D, 0x78, 0x7F, 0x02, 0x51, 0x35, 0x7D, 0x02, ++0x7F, 0x03, 0x51, 0x35, 0x7D, 0xC8, 0x7F, 0x02, 0x51, 0x0B, 0x12, 0x47, 0xBB, 0xF0, 0xE4, 0xFF, ++0x12, 0x47, 0x97, 0xEF, 0x70, 0x0B, 0x12, 0x57, 0x1D, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, ++0x06, 0x7D, 0x01, 0x7F, 0x0C, 0x91, 0x66, 0x12, 0x57, 0x21, 0x02, 0x6F, 0xB9, 0x90, 0x01, 0x36, ++0x74, 0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0x31, 0x1C, 0x7D, 0x02, 0x7F, 0x03, ++0x31, 0x1C, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0x12, 0x77, 0xEC, 0xE4, 0xFF, 0x12, 0x47, 0x97, ++0xBF, 0x01, 0x11, 0x12, 0x6A, 0x87, 0xF0, 0x90, 0x81, 0x90, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, ++0x7F, 0x04, 0x81, 0x66, 0xF1, 0xCB, 0xF0, 0x22, 0x7F, 0x01, 0xD1, 0xCD, 0x90, 0x81, 0x87, 0x22, ++0x90, 0x81, 0x8D, 0xE0, 0x64, 0x01, 0x70, 0x12, 0x12, 0x69, 0x23, 0x60, 0x05, 0xD1, 0xA4, 0x02, ++0x6E, 0x21, 0x90, 0x81, 0x90, 0xE0, 0x70, 0x02, 0x91, 0x62, 0x22, 0x90, 0x81, 0x89, 0xE0, 0x44, ++0x04, 0x22, 0xF0, 0x7D, 0x04, 0x7F, 0x01, 0xC1, 0xCD, 0x90, 0x81, 0x89, 0xE0, 0xFF, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0x22, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x21, 0x1C, 0x22, ++0x7D, 0x02, 0x7F, 0x02, 0x41, 0x35, 0x90, 0x01, 0xC8, 0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x7B, ++0x01, 0x7A, 0x82, 0x79, 0x06, 0x7F, 0xFF, 0xFE, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x0A, 0x90, 0x82, ++0x06, 0xE0, 0x64, 0x03, 0x60, 0x04, 0x01, 0xA7, 0x01, 0xAF, 0xE4, 0x90, 0x82, 0x0B, 0xF0, 0x90, ++0x82, 0x0B, 0xE0, 0xFF, 0xC3, 0x94, 0x02, 0x40, 0x02, 0x01, 0xEA, 0xC3, 0x74, 0xFE, 0x9F, 0xFF, ++0xE4, 0x94, 0x00, 0xFE, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x07, 0x12, 0x2B, 0x27, 0xEF, 0x64, 0x01, ++0x70, 0x6D, 0x90, 0x82, 0x07, 0xE0, 0xFF, 0x54, 0xC0, 0xFE, 0x60, 0x05, 0xEF, 0x54, 0x0C, 0x70, ++0x16, 0x90, 0x82, 0x07, 0xE0, 0xFF, 0x54, 0x30, 0x60, 0x5D, 0xEF, 0x54, 0x03, 0x60, 0x58, 0x90, ++0x82, 0x08, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x82, 0x08, 0xF0, 0x90, 0x82, 0x08, 0xE0, ++0x90, 0x82, 0x07, 0x70, 0x16, 0xE0, 0xFF, 0xEE, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x82, 0x09, 0xF0, ++0xEF, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0xA3, 0xF0, 0x80, 0x0D, 0xE0, 0xFE, 0x54, 0x30, 0x90, ++0x82, 0x09, 0xF0, 0xEE, 0x54, 0x03, 0xA3, 0xF0, 0x90, 0x82, 0x0A, 0xE0, 0xB4, 0x01, 0x08, 0x90, ++0x82, 0x09, 0xE0, 0x64, 0x30, 0x60, 0x43, 0x90, 0x82, 0x0D, 0x74, 0x02, 0xF0, 0x80, 0x10, 0x90, ++0x82, 0x0D, 0x74, 0x01, 0xF0, 0x80, 0x08, 0x90, 0x82, 0x0B, 0xE0, 0x04, 0xF0, 0x01, 0x1F, 0x90, ++0x01, 0xC4, 0x74, 0xF6, 0xF0, 0x74, 0x4F, 0xA3, 0xF0, 0x90, 0x82, 0x0D, 0xE0, 0x90, 0x01, 0xC8, ++0xF0, 0x90, 0x82, 0x07, 0xE0, 0x90, 0x01, 0xC9, 0xF0, 0x90, 0x82, 0x08, 0xE0, 0x90, 0x01, 0xCA, ++0xF0, 0xE4, 0xFD, 0x7F, 0x1F, 0x12, 0x32, 0x1E, 0x80, 0xD5, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44, ++0x80, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x4F, ++0xF6, 0x12, 0x71, 0x59, 0x12, 0x32, 0x77, 0x12, 0x71, 0x66, 0x31, 0x40, 0x7F, 0x01, 0x12, 0x42, ++0x15, 0x90, 0x81, 0xF9, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x42, 0x15, 0x90, 0x81, 0xF9, 0xE0, 0x04, ++0xF0, 0x51, 0x34, 0x31, 0x51, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x32, ++0x1E, 0x75, 0x20, 0xFF, 0xF1, 0xCE, 0x51, 0xD1, 0x12, 0x71, 0xD2, 0xE4, 0xFF, 0x02, 0x42, 0x9E, ++0xE4, 0x90, 0x80, 0x3C, 0x31, 0x49, 0xA3, 0xF0, 0x22, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0x22, 0x31, 0x63, 0x12, 0x71, 0x0A, 0x51, 0x16, 0x12, 0x6F, 0x0A, 0x51, 0x03, 0x12, 0x77, 0xF7, ++0x02, 0x45, 0x44, 0xE4, 0xFD, 0xFF, 0x12, 0x78, 0x11, 0xED, 0x70, 0x12, 0x31, 0xA2, 0xC0, 0x83, ++0xC0, 0x82, 0x31, 0x9A, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x0F, 0x31, 0xA2, ++0xC0, 0x83, 0xC0, 0x82, 0x31, 0x9A, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, ++0x83, 0xF0, 0x31, 0xAD, 0x90, 0x81, 0x81, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, ++0x08, 0x22, 0x74, 0x79, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x7D, 0x08, 0xED, 0x14, 0xF9, 0x24, 0x79, 0x31, 0xA5, 0xE0, 0x60, 0x3A, ++0x7C, 0x08, 0xEC, 0x14, 0x90, 0x82, 0xD5, 0xF0, 0x74, 0x79, 0x29, 0x31, 0xA5, 0xE0, 0xFB, 0x7A, ++0x00, 0x90, 0x82, 0xD5, 0x12, 0x62, 0xC4, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x60, 0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, ++0x82, 0xD5, 0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, 0xDC, 0xC8, 0xDD, 0xBA, 0x7F, 0x00, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0xE4, 0xA3, 0xF0, ++0xF1, 0x35, 0x44, 0x10, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x01, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, ++0x79, 0x83, 0x12, 0x45, 0x44, 0x90, 0x81, 0x83, 0xE0, 0x54, 0xFD, 0xF0, 0xE4, 0x31, 0x4A, 0xA3, ++0x74, 0x0C, 0xF0, 0x22, 0xF1, 0xDC, 0x90, 0x80, 0x42, 0xEF, 0xF0, 0x51, 0x54, 0x90, 0x01, 0x64, ++0x74, 0x01, 0xF0, 0x90, 0x00, 0x12, 0xE0, 0x54, 0xC7, 0x44, 0x20, 0xFD, 0x7F, 0x12, 0x12, 0x32, ++0x1E, 0x02, 0x2D, 0xA7, 0x51, 0x84, 0x51, 0xAA, 0x12, 0x71, 0x18, 0x12, 0x71, 0x37, 0xE4, 0xF5, ++0x35, 0xF5, 0x36, 0xF5, 0x37, 0x75, 0x38, 0x80, 0xAD, 0x35, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xAD, ++0x36, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xAD, 0x37, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xAD, 0x38, 0x7F, ++0x53, 0x02, 0x32, 0x1E, 0x90, 0x01, 0x30, 0xE4, 0x31, 0x49, 0x90, 0x01, 0x38, 0x31, 0x49, 0xFD, ++0x7F, 0x50, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x52, ++0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0x90, 0x01, 0x34, 0x74, 0xFF, 0x31, ++0x49, 0x90, 0x01, 0x3C, 0x31, 0x49, 0xFD, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x55, ++0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x32, ++0x1E, 0xE4, 0x90, 0x82, 0x06, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x98, 0xE0, 0x7F, 0x00, 0x30, 0xE4, ++0x02, 0x7F, 0x01, 0xEF, 0x64, 0x01, 0x60, 0x3D, 0xC3, 0x90, 0x82, 0x07, 0xE0, 0x94, 0x88, 0x90, ++0x82, 0x06, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, ++0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1F, 0x90, 0x82, 0x06, 0x12, 0x5E, 0x2C, 0x12, 0x5F, 0xD3, 0xD3, ++0x90, 0x82, 0x07, 0xE0, 0x94, 0x32, 0x90, 0x82, 0x06, 0xE0, 0x94, 0x00, 0x40, 0xBA, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE3, 0xB3, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x8B, 0x52, 0x8A, 0x53, ++0x89, 0x54, 0x71, 0x8B, 0xFF, 0xF5, 0x56, 0x12, 0x1F, 0xA4, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x06, ++0xF1, 0xD6, 0xF5, 0x57, 0x80, 0x02, 0x8F, 0x57, 0x85, 0x56, 0x55, 0xE5, 0x55, 0xD3, 0x95, 0x57, ++0x50, 0x24, 0xAB, 0x52, 0xAA, 0x53, 0xA9, 0x54, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFD, 0xAF, 0x55, ++0x31, 0x66, 0xAF, 0x55, 0x12, 0x47, 0x97, 0xEF, 0xAF, 0x55, 0x70, 0x04, 0xF1, 0xCD, 0x80, 0x02, ++0xF1, 0xCC, 0x05, 0x55, 0x80, 0xD5, 0xE5, 0x56, 0x70, 0x0F, 0xFF, 0x12, 0x47, 0x97, 0xEF, 0x70, ++0x08, 0xF1, 0x1D, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x1F, ++0xBD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x52, 0x8A, 0x53, 0x89, 0x54, 0x12, 0x1F, ++0xA4, 0xFF, 0x90, 0x81, 0x82, 0xF0, 0xBF, 0x01, 0x08, 0x71, 0x8B, 0x64, 0x01, 0x60, 0x1D, 0x80, ++0x19, 0xAB, 0x52, 0xAA, 0x53, 0xA9, 0x54, 0x71, 0x8B, 0x64, 0x01, 0x60, 0x0F, 0x90, 0x81, 0x83, ++0xE0, 0x20, 0xE0, 0x06, 0xE4, 0xFF, 0x71, 0xD1, 0x80, 0x02, 0x91, 0xDD, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x86, 0xE0, 0x90, 0x82, 0xDB, 0xF0, ++0x6F, 0x70, 0x02, 0x81, 0xD8, 0xEF, 0x14, 0x60, 0x42, 0x14, 0x60, 0x6C, 0x14, 0x70, 0x02, 0x81, ++0x83, 0x14, 0x70, 0x02, 0x81, 0xAF, 0x24, 0x04, 0x60, 0x02, 0x81, 0xD8, 0x90, 0x82, 0xDB, 0xE0, ++0xB4, 0x04, 0x04, 0xB1, 0xBD, 0x81, 0xD8, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x02, 0x04, 0xB1, 0xB2, ++0x81, 0xD8, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x03, 0x04, 0xD1, 0xF8, 0x81, 0xD8, 0x90, 0x82, 0xDB, ++0xE0, 0x64, 0x01, 0x60, 0x02, 0x81, 0xD8, 0xB1, 0xB4, 0x81, 0xD8, 0x90, 0x82, 0xDB, 0xE0, 0xB4, ++0x04, 0x04, 0xB1, 0xC1, 0x81, 0xD8, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x02, 0x04, 0xB1, 0xAE, 0x81, ++0xD8, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x03, 0x04, 0xB1, 0xC7, 0x81, 0xD8, 0x90, 0x82, 0xDB, 0xE0, ++0x60, 0x02, 0x81, 0xD8, 0xB1, 0x02, 0x81, 0xD8, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x04, 0x04, 0xB1, ++0x98, 0x80, 0x75, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x01, 0x04, 0xB1, 0x22, 0x80, 0x6A, 0x90, 0x82, ++0xDB, 0xE0, 0xB4, 0x03, 0x04, 0xB1, 0x32, 0x80, 0x5F, 0x90, 0x82, 0xDB, 0xE0, 0x70, 0x59, 0xB1, ++0x20, 0x80, 0x55, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0x77, 0x3C, 0x80, 0x49, 0x90, ++0x82, 0xDB, 0xE0, 0xB4, 0x01, 0x04, 0xB1, 0xA0, 0x80, 0x3E, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x02, ++0x04, 0xF1, 0x46, 0x80, 0x33, 0x90, 0x82, 0xDB, 0xE0, 0x70, 0x2D, 0xB1, 0x9E, 0x80, 0x29, 0x90, ++0x82, 0xDB, 0xE0, 0xB4, 0x03, 0x04, 0xF1, 0x29, 0x80, 0x1E, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x01, ++0x04, 0xB1, 0x0B, 0x80, 0x13, 0x90, 0x82, 0xDB, 0xE0, 0xB4, 0x02, 0x04, 0xF1, 0x03, 0x80, 0x08, ++0x90, 0x82, 0xDB, 0xE0, 0x70, 0x02, 0xB1, 0x09, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x82, 0xE0, 0xB4, 0x01, 0x04, 0x7F, 0x04, 0x80, 0x0C, 0x12, ++0x6C, 0x3C, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x71, 0xD1, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x81, 0x86, 0x74, 0x01, 0xF0, 0x22, 0xB1, 0x02, 0x7D, 0x1F, 0x7F, 0x6F, 0x12, ++0x4E, 0xAD, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x90, 0x81, 0x86, 0x74, 0x04, 0xF0, 0x22, ++0xB1, 0x02, 0x7D, 0x20, 0x7F, 0xFF, 0x12, 0x4E, 0xAD, 0xB1, 0x39, 0x90, 0x81, 0x86, 0x74, 0x02, ++0xF0, 0x22, 0x80, 0xF5, 0x7F, 0xFF, 0x12, 0x4E, 0xAD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x12, 0x5E, 0x8C, 0x90, 0x85, 0xBB, 0x12, 0x20, 0xDA, 0xCC, 0xF0, 0x00, 0xC0, 0x7F, 0x8C, 0xD1, ++0x30, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x14, 0xF1, 0xA7, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, ++0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x5D, 0xB0, 0xF1, 0x3D, 0x44, 0x80, 0xFC, 0x90, 0x82, 0xC1, 0x12, ++0x20, 0xCE, 0x90, 0x82, 0xC1, 0x12, 0x44, 0xCF, 0xD1, 0xFD, 0x7F, 0x7C, 0x7E, 0x08, 0x12, 0x2E, ++0xA2, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, ++0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF1, 0x2D, 0x7D, 0x23, 0x80, 0x86, 0xB1, 0x02, ++0x7D, 0x21, 0x7F, 0xFF, 0x12, 0x4E, 0xAD, 0x90, 0x81, 0x86, 0x74, 0x03, 0xF0, 0x22, 0xB1, 0xCB, ++0xA1, 0x02, 0xB1, 0xAE, 0x12, 0x76, 0xF8, 0xE4, 0x90, 0x81, 0x86, 0xF0, 0x22, 0xB1, 0xC1, 0x80, ++0xF3, 0xB1, 0xCD, 0xF1, 0x2D, 0xA1, 0x02, 0xB1, 0xCD, 0xA1, 0x02, 0xB1, 0xD3, 0xE4, 0xFD, 0xFF, ++0x02, 0x4E, 0xAD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, ++0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, ++0x74, 0x86, 0xF0, 0xF1, 0x3D, 0x54, 0x7F, 0xFC, 0x90, 0x82, 0xBD, 0x12, 0x20, 0xCE, 0x90, 0x82, ++0xBD, 0x12, 0x44, 0xCF, 0xD1, 0xFD, 0x7F, 0x7C, 0xD1, 0x30, 0x12, 0x20, 0xDA, 0xCC, 0xC0, 0x00, ++0xC0, 0x7F, 0x8C, 0xD1, 0x30, 0x12, 0x20, 0xDA, 0x00, 0xC0, 0x00, 0x14, 0xF1, 0xA7, 0x12, 0x20, ++0xDA, 0x00, 0x03, 0x3E, 0x60, 0xE4, 0xFD, 0xFF, 0x12, 0x5D, 0xB0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x85, 0xBB, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x43, ++0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x16, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF3, 0xD1, 0x8E, 0xB1, ++0xCD, 0xF1, 0x4F, 0x30, 0xE0, 0x03, 0x12, 0x4E, 0xC9, 0xF1, 0x75, 0xF0, 0x22, 0x90, 0x81, 0xF1, ++0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1B, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF4, 0xD1, 0x8E, ++0xF1, 0x35, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0x7D, 0x04, 0x7F, 0x01, 0x02, 0x4E, 0xCD, 0x7D, ++0x31, 0xB1, 0x34, 0x22, 0xE0, 0x44, 0x02, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xEB, 0xE0, 0xF5, ++0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, ++0x19, 0x8F, 0x1A, 0xE5, 0x1E, 0x54, 0x07, 0xC4, 0x33, 0x54, 0xE0, 0x85, 0x19, 0x83, 0x85, 0x1A, ++0x82, 0xF0, 0xE5, 0x1D, 0xF1, 0x09, 0xE5, 0x1E, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0xA3, 0xF0, ++0xEB, 0xF1, 0x09, 0xE5, 0x1D, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0xD1, 0xEF, 0xF0, 0xBD, 0x01, ++0x0D, 0x85, 0x1A, 0x82, 0x8E, 0x83, 0xA3, 0xA3, 0xA3, 0x74, 0x03, 0xF0, 0x80, 0x06, 0xD1, 0xEF, ++0xA3, 0x74, 0x01, 0xF0, 0xD1, 0xEF, 0xA3, 0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x85, ++0x1A, 0x82, 0x85, 0x19, 0x83, 0xA3, 0xA3, 0x22, 0xB1, 0xC7, 0xA1, 0xB4, 0xFC, 0x90, 0x85, 0xBB, ++0x02, 0x20, 0xCE, 0xB1, 0xD3, 0x7D, 0x24, 0xA1, 0x0D, 0x54, 0x07, 0xC4, 0x33, 0x54, 0xE0, 0xFF, ++0x22, 0x12, 0x6F, 0xC1, 0xB1, 0xCD, 0x7D, 0x0C, 0x7F, 0x01, 0x02, 0x4E, 0xCD, 0xB1, 0xD3, 0xF1, ++0x11, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0x7D, 0x25, 0xA1, 0x0D, 0x90, 0x05, 0x27, ++0xE0, 0x44, 0x40, 0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x7F, 0x7C, 0x7E, ++0x08, 0x12, 0x2D, 0x5C, 0xEC, 0x22, 0xB1, 0xD3, 0x90, 0x81, 0x86, 0x74, 0x03, 0xF0, 0x22, 0xB1, ++0xD3, 0x90, 0x81, 0xF1, 0xE0, 0xC3, 0x13, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x15, 0x90, ++0x01, 0x57, 0xE4, 0xF0, 0xFD, 0xFF, 0x12, 0x4E, 0xAD, 0xF1, 0x4F, 0x30, 0xE0, 0x03, 0x12, 0x4E, ++0xC9, 0xF1, 0x75, 0xF0, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0x44, 0x04, 0x22, 0x90, 0x81, 0xF1, 0xE0, ++0x30, 0xE0, 0x0B, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xF3, 0xD1, 0x8E, 0xF1, 0x75, 0xF0, 0x90, 0x80, ++0x42, 0xE0, 0xB4, 0x01, 0x11, 0x12, 0x70, 0xF3, 0x20, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x54, 0x07, ++0x20, 0xE0, 0x03, 0x12, 0x77, 0x00, 0x22, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2E, 0xA2, 0x90, 0x82, ++0xAC, 0x22, 0xB1, 0xCB, 0x12, 0x4E, 0xC9, 0x90, 0x81, 0x87, 0x74, 0x0C, 0xF0, 0x22, 0xB1, 0xCD, ++0x12, 0x4F, 0xD3, 0xF1, 0x2D, 0x90, 0x81, 0x87, 0x74, 0x04, 0xF0, 0x22, 0x22, 0x22, 0x75, 0xE8, ++0x03, 0x75, 0xA8, 0x84, 0x22, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x1F, 0xBD, 0x90, 0x00, 0xF7, 0xE0, ++0x20, 0xE7, 0x09, 0xE0, 0x7F, 0x01, 0x20, 0xE6, 0x0C, 0x7F, 0x02, 0x22, 0x90, 0x00, 0xF7, 0xE0, ++0x30, 0xE6, 0x02, 0x7F, 0x03, 0x22, 0xE4, 0x90, 0x82, 0x0E, 0xF0, 0x90, 0x82, 0x0E, 0xE0, 0x64, ++0x01, 0xF0, 0x24, 0xF6, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x57, 0xA3, 0xF0, 0x90, 0x81, 0x8D, 0xE0, ++0x60, 0x0F, 0x90, 0x81, 0x90, 0xE0, 0xFF, 0x90, 0x81, 0x8F, 0xE0, 0x6F, 0x60, 0x03, 0x12, 0x47, ++0xDC, 0xC2, 0xAF, 0x12, 0x71, 0x96, 0xBF, 0x01, 0x02, 0x11, 0x3C, 0xD2, 0xAF, 0xD1, 0x2B, 0x12, ++0x32, 0x9E, 0xBF, 0x01, 0x02, 0x31, 0x88, 0x12, 0x41, 0x4D, 0x80, 0xBF, 0x90, 0x81, 0x88, 0xE0, ++0x30, 0xE0, 0x19, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x0F, 0xC3, 0x13, 0x30, 0xE0, 0x08, ++0x12, 0x77, 0x4D, 0xBF, 0x01, 0x06, 0x80, 0x02, 0x80, 0x00, 0x11, 0x5D, 0x22, 0x90, 0x81, 0x90, ++0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0D, 0x31, 0x38, 0xBF, 0x01, 0x08, 0x11, 0x75, 0x90, 0x01, ++0xE5, 0xE0, 0x04, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x11, 0xA0, 0x11, 0x85, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x75, 0x0A, 0x90, 0x00, 0x08, 0xE0, 0x54, 0xEF, 0xFD, 0x7F, ++0x08, 0x12, 0x32, 0x1E, 0xE4, 0xFF, 0x11, 0xEC, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xEF, 0xF0, 0x22, ++0x90, 0x81, 0x89, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x81, 0x98, 0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x32, ++0x1E, 0x90, 0x81, 0x8E, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, ++0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, 0x00, 0x08, 0xE0, 0x44, 0x10, 0xFD, ++0x7F, 0x08, 0x12, 0x32, 0x1E, 0x7F, 0x01, 0x11, 0xEC, 0x90, 0x00, 0x90, 0xE0, 0x44, 0x01, 0xFD, ++0x7F, 0x90, 0x12, 0x32, 0x1E, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x90, 0x82, 0x0F, 0xD1, ++0x7F, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x82, 0x0F, 0xE0, ++0x6F, 0x60, 0x34, 0xC3, 0x90, 0x82, 0x11, 0xE0, 0x94, 0x88, 0x90, 0x82, 0x10, 0xE0, 0x94, 0x13, ++0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x82, 0x10, 0xD1, 0x2C, 0xF1, ++0xD3, 0xD3, 0x90, 0x82, 0x11, 0xE0, 0x94, 0x32, 0x90, 0x82, 0x10, 0xE0, 0x94, 0x00, 0x40, 0xC1, ++0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xBA, 0x22, 0x90, 0x81, 0xF5, 0xE0, 0xC3, 0x13, 0x20, 0xE0, ++0x35, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60, ++0x05, 0x75, 0x4F, 0x01, 0x80, 0x23, 0x90, 0x02, 0x96, 0xE0, 0x60, 0x05, 0x75, 0x4F, 0x10, 0x80, ++0x18, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, ++0x05, 0x75, 0x4F, 0x04, 0x80, 0x03, 0x02, 0x76, 0x48, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, ++0x01, 0xB8, 0xE5, 0x4F, 0xF0, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, ++0x2D, 0xA7, 0xE4, 0xF5, 0x51, 0x12, 0x32, 0x9E, 0xEF, 0x60, 0x72, 0x63, 0x51, 0x01, 0xE5, 0x51, ++0x24, 0x88, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x59, 0xA3, 0xF0, 0x90, 0x00, 0x88, 0xE0, 0xF5, 0x4F, ++0xF5, 0x50, 0x54, 0x0F, 0x60, 0xDF, 0xE5, 0x4F, 0x30, 0xE0, 0x0B, 0x20, 0xE4, 0x03, 0x12, 0x29, ++0xC5, 0x53, 0x50, 0xEE, 0x80, 0x3E, 0xE5, 0x4F, 0x30, 0xE1, 0x16, 0x20, 0xE5, 0x0E, 0x12, 0x11, ++0xBD, 0xEF, 0x70, 0x03, 0x43, 0x50, 0x20, 0x90, 0x01, 0x06, 0xE4, 0xF0, 0x53, 0x50, 0xFD, 0x80, ++0x23, 0xE5, 0x4F, 0x30, 0xE2, 0x0B, 0x20, 0xE6, 0x03, 0x12, 0x65, 0x3E, 0x53, 0x50, 0xFB, 0x80, ++0x13, 0xE5, 0x4F, 0x30, 0xE3, 0x0E, 0x20, 0xE7, 0x08, 0x51, 0x12, 0xEF, 0x70, 0x03, 0x43, 0x50, ++0x80, 0x53, 0x50, 0xF7, 0xAD, 0x50, 0x7F, 0x88, 0x12, 0x32, 0x1E, 0x80, 0x88, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x78, 0x10, 0x74, 0x01, 0xF2, 0x90, 0x02, 0x09, 0xE0, 0x78, 0x00, 0xF2, 0x08, 0x74, ++0x20, 0xF2, 0x18, 0xE2, 0xFF, 0x30, 0xE0, 0x05, 0x08, 0xE2, 0x24, 0x80, 0xF2, 0xEF, 0xC3, 0x13, ++0x90, 0xFD, 0x10, 0xF0, 0x78, 0x01, 0xE2, 0x91, 0x37, 0x78, 0x03, 0xF2, 0x64, 0x04, 0x60, 0x0D, ++0xE2, 0xFF, 0x64, 0x08, 0x60, 0x07, 0xEF, 0x64, 0x0C, 0x60, 0x02, 0x81, 0x25, 0xE4, 0x78, 0x02, ++0xF2, 0x78, 0x03, 0xE2, 0xFF, 0x18, 0xE2, 0xC3, 0x9F, 0x50, 0x25, 0xE2, 0xFD, 0x18, 0xE2, 0x2D, ++0x90, 0x82, 0x0F, 0xF0, 0xE0, 0xFF, 0x91, 0x37, 0xFE, 0x74, 0x04, 0x2D, 0xF8, 0xEE, 0xF2, 0xEF, ++0xB4, 0xFF, 0x06, 0x90, 0xFD, 0x10, 0xE0, 0x04, 0xF0, 0x78, 0x02, 0xE2, 0x04, 0xF2, 0x80, 0xD1, ++0x78, 0x04, 0xE2, 0x78, 0x12, 0xF2, 0xFF, 0x78, 0x05, 0xE2, 0x78, 0x11, 0xF2, 0x78, 0x06, 0xE2, ++0x78, 0x13, 0xF2, 0x78, 0x07, 0xE2, 0x78, 0x14, 0xF2, 0x78, 0x08, 0xE2, 0x78, 0x33, 0xF2, 0x78, ++0x09, 0xE2, 0x78, 0x34, 0xF2, 0x78, 0x0A, 0xE2, 0x78, 0x35, 0xF2, 0x78, 0x0B, 0xE2, 0x78, 0x36, ++0xF2, 0x78, 0x0C, 0xE2, 0x78, 0x37, 0xF2, 0x78, 0x0D, 0xE2, 0x78, 0x38, 0xF2, 0x78, 0x0E, 0xE2, ++0x78, 0x39, 0xF2, 0x78, 0x0F, 0xE2, 0x78, 0x3A, 0xF2, 0xE4, 0x78, 0x15, 0xF2, 0xEF, 0x24, 0xF8, ++0x60, 0x56, 0x24, 0xFC, 0x60, 0x4D, 0x24, 0x08, 0x60, 0x02, 0x81, 0x07, 0x78, 0x11, 0xE2, 0xB4, ++0x01, 0x05, 0x12, 0x29, 0xC5, 0x81, 0x0C, 0x78, 0x11, 0xE2, 0xB4, 0x02, 0x05, 0x12, 0x11, 0xBD, ++0x81, 0x0C, 0x78, 0x11, 0xE2, 0xB4, 0x03, 0x05, 0x12, 0x65, 0x3E, 0x81, 0x0C, 0x78, 0x11, 0xE2, ++0xB4, 0x10, 0x07, 0x91, 0x4E, 0x12, 0x32, 0xAA, 0x81, 0x0C, 0x78, 0x11, 0xE2, 0xB4, 0x11, 0x07, ++0x91, 0x4E, 0x12, 0x32, 0x06, 0x81, 0x0C, 0x78, 0x11, 0xE2, 0xF4, 0x60, 0x02, 0x81, 0x0C, 0x18, ++0xF2, 0x81, 0x0C, 0x78, 0x15, 0x74, 0x01, 0xF2, 0x78, 0x11, 0xE2, 0x64, 0x07, 0x60, 0x02, 0x61, ++0xF0, 0x78, 0x34, 0x91, 0x28, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xC0, 0x04, 0x91, 0x47, 0x78, 0x33, ++0x91, 0x28, 0xD0, 0x00, 0x12, 0x44, 0xC2, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x78, ++0x35, 0x91, 0x28, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0x91, 0x2F, 0x78, 0x15, 0xE2, 0x60, 0x73, 0x18, 0xE2, 0xFF, 0x18, 0xE2, 0xFD, 0xB1, 0xA2, 0x78, ++0x1C, 0x12, 0x44, 0xF4, 0x78, 0x38, 0x91, 0x28, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xC0, 0x04, 0x91, ++0x47, 0x78, 0x37, 0x91, 0x28, 0xD0, 0x00, 0x12, 0x44, 0xC2, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x78, 0x39, 0x91, 0x28, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x44, 0xC2, 0x78, 0x20, 0x12, 0x44, 0xF4, 0x78, 0x20, 0x12, 0x44, 0xDB, ++0x12, 0x20, 0x9B, 0x78, 0x1C, 0x12, 0x44, 0xE7, 0x12, 0x44, 0xB5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0x78, 0x18, 0x12, 0x44, 0xDB, 0x78, 0x20, 0x12, 0x44, 0xE7, 0x12, 0x44, 0xB5, ++0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x91, 0x2F, 0x78, 0x18, 0x12, 0x44, 0xDB, 0x90, ++0x82, 0xAC, 0x12, 0x20, 0xCE, 0x78, 0x13, 0xE2, 0xFD, 0x08, 0xE2, 0xFF, 0xB1, 0xB0, 0x80, 0x1C, ++0x78, 0x13, 0xE2, 0xFF, 0x08, 0xE2, 0xFD, 0x78, 0x11, 0xE2, 0xFB, 0x78, 0x15, 0xE2, 0x90, 0x82, ++0x71, 0xF0, 0x12, 0x63, 0xD6, 0x80, 0x05, 0x78, 0x10, 0x74, 0x02, 0xF2, 0x78, 0x10, 0xE2, 0xFF, ++0xC3, 0x94, 0x02, 0x50, 0x10, 0xEF, 0x60, 0x0A, 0x78, 0x02, 0xE2, 0xFF, 0x18, 0xE2, 0x2F, 0xF2, ++0x41, 0x34, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xE2, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0x12, ++0x44, 0xC2, 0x78, 0x18, 0x02, 0x44, 0xF4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x22, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x22, 0x78, 0x14, ++0xE2, 0xFE, 0x18, 0xE2, 0xFD, 0xED, 0xFF, 0x78, 0x16, 0xEE, 0xF2, 0xFE, 0x08, 0xEF, 0xF2, 0xFF, ++0x22, 0x90, 0x82, 0x91, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, ++0x00, 0xE4, 0x90, 0x82, 0x9F, 0xF0, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x90, 0x82, 0x97, ++0x12, 0x20, 0xCE, 0x90, 0x82, 0x91, 0xE0, 0xFB, 0x70, 0x08, 0x90, 0x82, 0x97, 0x12, 0x44, 0xCF, ++0x80, 0x06, 0xEB, 0xB1, 0x47, 0x12, 0x2D, 0x5C, 0x90, 0x82, 0x9B, 0x12, 0x20, 0xCE, 0x90, 0x82, ++0x92, 0xB1, 0x9B, 0x78, 0x17, 0x91, 0x42, 0x90, 0x82, 0x9B, 0x12, 0x44, 0xCF, 0xED, 0x54, 0x7F, ++0xFD, 0xEC, 0x54, 0x80, 0xFC, 0x12, 0x44, 0xC2, 0xEC, 0x44, 0x80, 0xFC, 0x90, 0x82, 0x9B, 0x12, ++0x20, 0xCE, 0xB1, 0x5A, 0x54, 0x7F, 0x12, 0x56, 0xFC, 0xB1, 0x62, 0xB1, 0x47, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x82, 0x9B, 0x12, 0x44, 0xCF, 0x12, 0x56, 0xFD, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x2E, ++0xA2, 0xB1, 0x5A, 0x44, 0x80, 0x12, 0x56, 0xFC, 0xB1, 0x62, 0x70, 0x04, 0x7F, 0x20, 0x80, 0x09, ++0x90, 0x82, 0x91, 0xE0, 0xB4, 0x01, 0x16, 0x7F, 0x28, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x78, 0x08, ++0x12, 0x20, 0xA8, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0x90, 0x82, 0x9F, 0xEF, 0xF0, 0x90, 0x82, 0x9F, ++0xE0, 0x90, 0x82, 0x91, 0x60, 0x0E, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x66, 0xF5, 0x82, 0xE4, ++0x34, 0x87, 0x80, 0x0C, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x87, ++0xB1, 0x52, 0x12, 0x2D, 0x5C, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x90, 0x82, 0x93, 0x12, 0x20, ++0xCE, 0x90, 0x82, 0x93, 0x02, 0x44, 0xCF, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, ++0x34, 0x87, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x82, 0x97, 0x12, 0x44, 0xCF, ++0xEC, 0x22, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x82, 0x91, 0xE0, 0x22, 0x90, 0x82, ++0x1F, 0xE0, 0x24, 0x31, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, ++0xFE, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x82, ++0x1F, 0xE0, 0x24, 0x30, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, ++0xFE, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x91, 0x61, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xC0, 0x07, 0xC0, 0x05, 0x90, 0x82, 0xAC, 0x12, 0x44, ++0xCF, 0x90, 0x82, 0xA2, 0x12, 0x20, 0xCE, 0xD0, 0x05, 0xD0, 0x07, 0xB1, 0xD2, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x82, 0xA0, 0xEF, 0xF0, 0xAB, 0x05, 0x90, 0x82, 0xA6, 0x12, 0x20, 0xDA, 0x00, ++0x00, 0x00, 0x00, 0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x14, 0x91, 0x42, 0x90, 0x82, 0xA2, ++0x12, 0x44, 0xCF, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x12, 0x44, 0xC2, 0xEC, 0x54, 0x0F, 0xFC, ++0x90, 0x82, 0xA6, 0x12, 0x20, 0xCE, 0x90, 0x82, 0xA0, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x60, ++0xF5, 0x82, 0xE4, 0x34, 0x87, 0xB1, 0x52, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0xA6, 0x12, 0x44, ++0xCF, 0x12, 0x56, 0xFD, 0xD0, 0x07, 0xD0, 0x06, 0x02, 0x2E, 0xA2, 0x22, 0xE4, 0x75, 0xF0, 0x01, ++0x02, 0x44, 0x9F, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xB5, 0xEE, 0xF0, 0xA3, ++0xD1, 0x7F, 0x90, 0x82, 0xB5, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x60, 0x28, ++0xC3, 0x90, 0x82, 0xB8, 0xE0, 0x94, 0xE8, 0x90, 0x82, 0xB7, 0xE0, 0x94, 0x03, 0x40, 0x0B, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x10, 0x90, 0x82, 0xB7, 0xD1, 0x2C, 0x7F, ++0x0A, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x80, 0xCA, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, ++0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x7F, 0xFF, 0x12, 0x4E, 0xAD, 0xE4, 0x90, 0x82, 0xCD, ++0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x82, 0xCF, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x12, ++0x4E, 0xAD, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x11, 0xA3, 0xE0, 0x70, 0x0D, 0xA3, 0xE0, 0x70, 0x09, ++0xA3, 0xE0, 0x70, 0x05, 0xD1, 0xE2, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x82, 0xCE, 0xE0, 0x94, 0xE8, ++0x90, 0x82, 0xCD, 0xE0, 0x94, 0x03, 0x40, 0x0C, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0xD1, ++0xE2, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x90, 0x82, 0xCD, 0xD1, 0x2C, ++0x80, 0xC0, 0x90, 0x82, 0xCF, 0xE0, 0xFF, 0x7D, 0x48, 0x02, 0x4E, 0xAD, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xC9, 0xEF, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1D, 0x90, 0x05, ++0x22, 0xE0, 0x90, 0x82, 0xCC, 0xF0, 0x7D, 0x29, 0xD1, 0x87, 0xBF, 0x01, 0x02, 0xF1, 0x28, 0x90, ++0x82, 0xCC, 0xE0, 0xFF, 0x7D, 0x2A, 0x12, 0x4E, 0xAD, 0x80, 0x02, 0xF1, 0x28, 0x90, 0x04, 0x1F, ++0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x80, 0x88, 0xE0, 0xFF, 0x90, 0x82, 0xBC, ++0x74, 0x0B, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x12, 0x6A, 0x8E, 0x90, 0x82, 0xCA, 0xEE, 0xF0, 0xFC, ++0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x82, 0xC9, 0xE0, 0xFF, 0xF1, 0x66, 0x54, 0x3F, 0xF0, 0xEF, 0x60, ++0x0A, 0xF1, 0x72, 0x44, 0x10, 0xF1, 0x65, 0x44, 0x80, 0xF0, 0x22, 0xF1, 0x72, 0x54, 0xEF, 0xF1, ++0x65, 0x44, 0x40, 0xF0, 0x22, 0xF0, 0x74, 0x1F, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x22, 0x74, 0x21, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x7D, 0x08, ++0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xB0, 0xEF, 0xF0, 0xA3, 0xED, ++0xF0, 0x90, 0x80, 0x3E, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x23, 0x90, 0x05, 0x22, ++0xE0, 0x90, 0x82, 0xB4, 0xF0, 0x7D, 0x26, 0xD1, 0x87, 0xEF, 0x64, 0x01, 0x70, 0x03, 0x12, 0x6B, ++0x2E, 0x90, 0x82, 0xB4, 0xE0, 0xFF, 0x7D, 0x27, 0x12, 0x4E, 0xAD, 0x12, 0x77, 0x5A, 0x80, 0x06, ++0x12, 0x77, 0x5A, 0x12, 0x6B, 0x2E, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x7F, 0x01, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, ++0x12, 0x43, 0x4E, 0x90, 0x82, 0x72, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x80, 0x3C, 0xE0, 0xFF, 0x70, ++0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE1, 0x09, 0x90, 0x80, 0x3C, 0xE0, 0x54, ++0xFD, 0xF0, 0x11, 0x19, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x80, 0x3C, 0xE0, 0xFF, 0x30, 0xE2, 0x05, ++0x54, 0xFB, 0xF0, 0x31, 0xA8, 0xD2, 0xAF, 0x80, 0xD1, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x80, 0xDD, 0xE0, 0xFF, 0x90, 0x80, 0xDC, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, ++0x7F, 0x00, 0xEF, 0x70, 0x3F, 0x90, 0x80, 0xDC, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x8C, ++0x12, 0x45, 0x00, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x8D, 0xF9, 0x74, 0x80, 0x35, ++0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x4B, 0xCC, 0x90, 0x80, 0xDC, 0x31, 0xA1, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x80, 0xDC, 0xF0, 0x11, 0x79, 0x90, 0x80, 0x3C, ++0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, ++0x82, 0xD2, 0xF0, 0x90, 0x82, 0xD2, 0xE0, 0xFD, 0x70, 0x02, 0x21, 0x76, 0x90, 0x80, 0xDC, 0xE0, ++0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x80, 0xDD, 0xE0, ++0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, ++0x44, 0x01, 0xF0, 0x22, 0x90, 0x82, 0xD0, 0x51, 0xC4, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x21, 0x59, 0xE4, 0x90, 0x82, 0xD3, 0xF0, 0x90, 0x82, ++0xD3, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x32, 0x31, 0x78, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, ++0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0x31, 0x8F, 0x90, 0x80, 0x8C, 0x31, 0x80, 0x31, ++0x77, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, 0x31, 0x8F, 0x90, 0x80, 0x90, 0x31, ++0x80, 0xF0, 0x90, 0x82, 0xD3, 0xE0, 0x04, 0xF0, 0x80, 0xC4, 0x90, 0x82, 0xD2, 0xE0, 0xFF, 0x90, ++0x82, 0xD0, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, ++0x5F, 0x90, 0x82, 0xD2, 0xF0, 0x90, 0x82, 0xD0, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, ++0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x82, 0xD0, 0xE0, 0x04, 0xF0, 0xE0, ++0x54, 0x03, 0xF0, 0x90, 0x80, 0xDD, 0x31, 0xA1, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, ++0x01, 0x83, 0xE4, 0x90, 0x80, 0xDD, 0xF0, 0x01, 0x83, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, ++0x90, 0x82, 0xD0, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x31, 0x77, 0x90, 0x01, 0xD0, 0x12, 0x45, ++0x00, 0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0xF0, 0x90, 0x82, 0xD0, 0xE0, 0x75, 0xF0, 0x04, 0x22, ++0x12, 0x45, 0x00, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0x22, 0x2F, ++0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x80, 0xDD, 0xE0, 0x75, 0xF0, 0x08, ++0x22, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, ++0xFF, 0x90, 0x81, 0x75, 0xE0, 0xFE, 0x90, 0x81, 0x74, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, ++0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x41, 0x90, 0x01, 0xAF, 0xE0, 0x70, 0x0A, 0xED, ++0x51, 0x6C, 0xFA, 0x7B, 0x01, 0x51, 0xCE, 0x7F, 0x01, 0xEF, 0x60, 0x2E, 0x90, 0x81, 0x74, 0x31, ++0xA1, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x81, 0x74, 0xF0, 0x90, 0x81, ++0x75, 0xE0, 0xFF, 0x90, 0x81, 0x74, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, ++0xEF, 0x70, 0x07, 0x90, 0x80, 0x3C, 0xE0, 0x44, 0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x81, 0x74, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, ++0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x81, 0x75, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, ++0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x28, 0xC0, ++0x01, 0x90, 0x81, 0x75, 0xE0, 0x51, 0x6C, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, ++0x7F, 0x0F, 0x12, 0x44, 0x79, 0x90, 0x81, 0x75, 0x31, 0xA1, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, ++0x60, 0x05, 0xE4, 0x90, 0x81, 0x75, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0F, 0xA4, ++0x24, 0xDE, 0xF9, 0x74, 0x80, 0x35, 0xF0, 0x22, 0x90, 0x82, 0x82, 0x74, 0x12, 0xF0, 0x90, 0x82, ++0x90, 0x74, 0x05, 0xF0, 0x90, 0x82, 0x84, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, ++0x82, 0x80, 0xE0, 0x90, 0x82, 0x87, 0xF0, 0x90, 0x82, 0x81, 0xE0, 0x90, 0x82, 0x88, 0xF0, 0x7B, ++0x01, 0x7A, 0x82, 0x79, 0x82, 0x51, 0x0F, 0x7F, 0x04, 0x90, 0x82, 0xD4, 0xEF, 0xF0, 0x7F, 0x02, ++0x12, 0x43, 0x27, 0x90, 0x80, 0x3C, 0xE0, 0xFF, 0x90, 0x82, 0xD4, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, ++0x80, 0x3C, 0xF0, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0x73, 0x12, 0x45, 0x15, 0x90, 0x82, 0xD1, 0xE0, 0xFF, ++0x04, 0xF0, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x1F, 0xFC, 0x7F, 0xAF, 0x7E, 0x01, 0x12, 0x5E, 0x33, ++0xEF, 0x60, 0x3A, 0x90, 0x82, 0x73, 0x12, 0x45, 0x0C, 0x8B, 0x13, 0x8A, 0x14, 0x89, 0x15, 0x90, ++0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x24, 0x02, 0xF5, 0x16, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, ++0x2B, 0xED, 0x90, 0x82, 0x73, 0x12, 0x45, 0x0C, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x90, 0x01, ++0xAE, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x77, 0x7F, 0xF5, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, ++0x01, 0x06, 0x90, 0x82, 0x77, 0xE0, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x77, 0x7F, 0xF6, ++0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x77, 0xE0, 0x90, 0x82, 0x79, 0xF0, ++0x7B, 0x01, 0x7A, 0x82, 0x79, 0x77, 0x7F, 0xF4, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, ++0x90, 0x82, 0x77, 0xE0, 0x90, 0x82, 0x7A, 0xF0, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x77, 0x7F, 0xF3, ++0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, 0x90, 0x82, 0x77, 0xE0, 0x90, 0x82, 0x7B, 0xF0, ++0x7B, 0x01, 0x7A, 0x82, 0x79, 0x77, 0x7F, 0xF2, 0x7E, 0x00, 0x12, 0x2B, 0x27, 0xBF, 0x01, 0x08, ++0x90, 0x82, 0x77, 0xE0, 0x90, 0x82, 0x7C, 0xF0, 0x90, 0x82, 0x78, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, ++0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x82, 0x80, 0xF0, 0x90, 0x82, 0x7C, 0xE0, 0x90, 0x82, 0x81, ++0xF0, 0x41, 0x78, 0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x78, 0xF0, 0xBF, 0x01, 0x07, 0x71, 0x32, ++0xE4, 0x90, 0x81, 0x78, 0xF0, 0x22, 0xAC, 0x07, 0xED, 0xAD, 0x04, 0x78, 0x24, 0xF2, 0xED, 0x08, ++0xF2, 0xEB, 0xB4, 0x04, 0x07, 0x78, 0x27, 0x74, 0x01, 0xF2, 0x80, 0x0E, 0xEB, 0x78, 0x27, 0xB4, ++0x05, 0x05, 0x74, 0x02, 0xF2, 0x80, 0x03, 0x74, 0x04, 0xF2, 0xB1, 0x16, 0x94, 0x00, 0x50, 0x45, ++0xE4, 0x78, 0x26, 0xF2, 0x91, 0xF0, 0x9F, 0x40, 0x02, 0x81, 0xEF, 0x91, 0xF9, 0x60, 0x1F, 0x74, ++0x37, 0x2E, 0xF8, 0xE2, 0x78, 0x32, 0xF2, 0xEE, 0xFF, 0x78, 0x25, 0xE2, 0x2F, 0xFF, 0x18, 0xE2, ++0x34, 0x00, 0x8F, 0x82, 0xF5, 0x83, 0xE0, 0x78, 0x29, 0xF2, 0x78, 0x32, 0xB1, 0x2D, 0x78, 0x24, ++0x08, 0xE2, 0xFF, 0x08, 0xE2, 0x2F, 0xFF, 0x78, 0x28, 0xE2, 0xFD, 0x12, 0x32, 0x1E, 0x78, 0x26, ++0xE2, 0x04, 0xF2, 0x80, 0xBF, 0xB1, 0x16, 0x94, 0x07, 0x50, 0x30, 0xE4, 0x78, 0x26, 0xF2, 0x91, ++0xF0, 0x9F, 0x40, 0x02, 0x81, 0xEF, 0x91, 0xF9, 0x60, 0x14, 0x78, 0x26, 0xE2, 0xFF, 0xB1, 0x1F, ++0xE0, 0x78, 0x29, 0xF2, 0x74, 0x37, 0x2F, 0xF8, 0xE2, 0x78, 0x32, 0xF2, 0xB1, 0x2D, 0xB1, 0x0E, ++0xB1, 0x1F, 0xEF, 0xF0, 0x78, 0x26, 0xE2, 0x04, 0xF2, 0x80, 0xD4, 0x90, 0x82, 0x71, 0xE0, 0x60, ++0x0A, 0xB1, 0x06, 0x12, 0x2D, 0x5C, 0x78, 0x2E, 0x12, 0x44, 0xF4, 0xE4, 0x78, 0x26, 0xF2, 0x91, ++0xF0, 0x9F, 0x50, 0x4E, 0x91, 0xF9, 0x60, 0x2B, 0x78, 0x2E, 0x12, 0x44, 0xDB, 0x78, 0x26, 0xE2, ++0xFB, 0x75, 0xF0, 0x08, 0xA4, 0xF9, 0xF8, 0x12, 0x20, 0xA8, 0x78, 0x29, 0xEF, 0xF2, 0x74, 0x37, ++0x2B, 0xF8, 0xE2, 0x78, 0x32, 0xF2, 0xE2, 0xFE, 0xF4, 0x5F, 0xFF, 0x78, 0x28, 0xE2, 0xFD, 0xEE, ++0x5D, 0x4F, 0xF2, 0xB1, 0x0E, 0xFD, 0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x7B, ++0xFE, 0x74, 0x2A, 0x2D, 0xF9, 0x74, 0x80, 0x3C, 0xFA, 0xEF, 0x12, 0x1F, 0xEA, 0xE2, 0x04, 0xF2, ++0x80, 0xAD, 0x78, 0x2A, 0x12, 0x44, 0xDB, 0x12, 0x56, 0xFD, 0xB1, 0x06, 0x12, 0x2E, 0xA2, 0x22, ++0x78, 0x27, 0xE2, 0xFF, 0x18, 0xE2, 0xFE, 0xC3, 0x22, 0x74, 0x33, 0x2E, 0xF8, 0xE2, 0x78, 0x28, ++0xF2, 0x90, 0x82, 0x71, 0xE0, 0x22, 0x78, 0x24, 0xE2, 0xFE, 0x08, 0xE2, 0xFF, 0x22, 0x78, 0x28, ++0xE2, 0xFF, 0x78, 0x26, 0xE2, 0x22, 0xD3, 0x78, 0x25, 0xE2, 0x94, 0xFF, 0x18, 0xE2, 0x22, 0xFD, ++0x18, 0xE2, 0x2D, 0xFD, 0x18, 0xE2, 0x34, 0x00, 0x8D, 0x82, 0xF5, 0x83, 0x22, 0xE2, 0xFF, 0xF4, ++0xFE, 0x78, 0x29, 0xE2, 0x5E, 0xFE, 0x18, 0xE2, 0xFD, 0xEF, 0x5D, 0x4E, 0xF2, 0x22, 0xE4, 0x90, ++0x82, 0x1F, 0xF0, 0x90, 0x87, 0x5F, 0xE0, 0x90, 0x82, 0x1E, 0xF0, 0xE4, 0x90, 0x82, 0x2B, 0xF0, ++0x90, 0x82, 0x1B, 0xF0, 0x90, 0x82, 0x1B, 0xE0, 0xFF, 0xC3, 0x94, 0x40, 0x50, 0x11, 0x74, 0x2E, ++0x2F, 0x12, 0x78, 0x67, 0x74, 0xFF, 0xF0, 0x90, 0x82, 0x1B, 0xE0, 0x04, 0xF0, 0x80, 0xE5, 0xE4, ++0x90, 0x82, 0x1B, 0xF0, 0x90, 0x82, 0x1E, 0xE0, 0xFF, 0x90, 0x82, 0x1B, 0xE0, 0xFE, 0xC3, 0x9F, ++0x40, 0x02, 0xC1, 0x40, 0x74, 0xDF, 0x2E, 0xF9, 0xE4, 0x34, 0x86, 0x12, 0x68, 0x11, 0x75, 0x16, ++0x0A, 0x7B, 0x01, 0x7A, 0x82, 0x79, 0x10, 0x12, 0x2B, 0xED, 0x90, 0x82, 0x11, 0xE0, 0xFF, 0x12, ++0x2F, 0x27, 0xEF, 0x04, 0x90, 0x82, 0x2B, 0xF0, 0x90, 0x82, 0x10, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, ++0x12, 0x31, 0xEA, 0xEF, 0x24, 0xC8, 0x90, 0x82, 0x2D, 0xF0, 0x75, 0xF0, 0x08, 0xA4, 0xF0, 0x90, ++0x82, 0x11, 0xE0, 0x54, 0x0F, 0x90, 0x82, 0x2C, 0xF0, 0xE4, 0x90, 0x82, 0x1A, 0xF0, 0x90, 0x82, ++0x1C, 0xF0, 0x90, 0x82, 0x1C, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x57, 0x90, 0x82, 0x2C, 0xE0, ++0xFE, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x13, 0xD8, 0xFC, 0x20, 0xE0, 0x3E, 0x90, 0x82, 0x1C, ++0xE0, 0x25, 0xE0, 0xFF, 0x90, 0x82, 0x2D, 0xE0, 0x2F, 0x24, 0x2E, 0xF9, 0xE4, 0x34, 0x82, 0xFA, ++0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x01, 0x90, 0x82, 0x1A, 0xE0, 0x75, 0xF0, 0x02, 0xA4, 0x24, 0x12, ++0xF9, 0x74, 0x82, 0x35, 0xF0, 0x8B, 0x13, 0xF5, 0x14, 0x89, 0x15, 0x75, 0x16, 0x02, 0xD0, 0x01, ++0xD0, 0x03, 0x12, 0x2B, 0xED, 0x90, 0x82, 0x1A, 0xE0, 0x04, 0xF0, 0x90, 0x82, 0x1C, 0xE0, 0x04, ++0xF0, 0x80, 0x9F, 0x90, 0x82, 0x2B, 0xE0, 0xFF, 0x90, 0x82, 0x1B, 0xE0, 0x2F, 0xF0, 0xA1, 0x74, ++0xE4, 0x90, 0x82, 0x1F, 0xF0, 0x90, 0x82, 0x1F, 0xE0, 0xC3, 0x94, 0x40, 0x40, 0x03, 0x02, 0x68, ++0x05, 0xE0, 0xFF, 0x24, 0x2E, 0x12, 0x78, 0x67, 0xE0, 0x90, 0x82, 0x21, 0xF0, 0xE0, 0xFE, 0x54, ++0xF0, 0xC4, 0x54, 0x0F, 0xFD, 0x90, 0x82, 0x20, 0xF0, 0xEE, 0x54, 0x0F, 0xFE, 0xA3, 0xF0, 0x74, ++0x2F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0x90, 0x82, 0x22, 0xF0, 0xFC, 0xEE, ++0xFE, 0xEC, 0xFB, 0xEB, 0xFF, 0x90, 0x82, 0x27, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xED, 0x12, 0x45, ++0x1E, 0x66, 0xB6, 0x00, 0x66, 0xE9, 0x01, 0x67, 0x60, 0x02, 0x67, 0xF5, 0x03, 0x67, 0x6C, 0x04, ++0x67, 0x7E, 0x05, 0x67, 0x7E, 0x06, 0x67, 0x7E, 0x07, 0x67, 0x7E, 0x08, 0x67, 0xCF, 0x09, 0x67, ++0xE2, 0x0A, 0x00, 0x00, 0x68, 0x05, 0x90, 0x82, 0x1F, 0xE0, 0xFD, 0x24, 0x31, 0xF5, 0x82, 0xE4, ++0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x30, 0x2D, 0x12, 0x77, 0xE4, 0xE0, 0xFD, 0xED, 0xFF, ++0x90, 0x82, 0x29, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0x90, 0x82, 0x22, 0xE0, 0xFF, 0x12, 0x2F, ++0x96, 0x90, 0x82, 0x1D, 0x74, 0x02, 0xF0, 0xE1, 0xF5, 0x12, 0x5D, 0x6E, 0x12, 0x44, 0xC2, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0x1F, 0xE0, 0x24, 0x32, 0xF5, 0x82, 0xE4, ++0x34, 0x82, 0x12, 0x5D, 0x99, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x44, 0xC2, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x82, 0x1F, ++0xE0, 0x24, 0x33, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x12, 0x5D, 0x99, 0x78, 0x18, 0x12, 0x20, 0xBB, ++0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xC2, 0x90, 0x82, 0x23, 0x12, 0x20, ++0xCE, 0x90, 0x82, 0x23, 0x12, 0x44, 0xCF, 0x90, 0x85, 0x96, 0x12, 0x20, 0xCE, 0x90, 0x82, 0x27, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x2E, 0xE4, 0x90, 0x82, 0x1D, 0x74, 0x04, 0xF0, 0xE1, 0xF5, ++0x12, 0x77, 0xD9, 0xE0, 0xFB, 0xE4, 0xFF, 0x12, 0x30, 0xC7, 0x80, 0x0A, 0x12, 0x77, 0xD9, 0xE0, ++0xFB, 0xE4, 0xFF, 0x12, 0x30, 0x6A, 0x90, 0x82, 0x1D, 0x74, 0x01, 0xF0, 0x80, 0x77, 0x90, 0x82, ++0x1D, 0x74, 0x02, 0xF0, 0x12, 0x5D, 0x6E, 0x12, 0x44, 0xC2, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x82, 0x21, 0x12, 0x5D, 0x9B, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x44, 0xC2, 0x90, 0x82, 0x23, 0x12, 0x20, 0xCE, 0x90, 0x82, ++0x20, 0xE0, 0x24, 0xFB, 0xFF, 0xC0, 0x07, 0x90, 0x82, 0x23, 0x12, 0x44, 0xCF, 0x90, 0x82, 0xAC, ++0x12, 0x20, 0xCE, 0x90, 0x82, 0x22, 0xE0, 0xFD, 0xD0, 0x07, 0x12, 0x5D, 0xB0, 0x80, 0x26, 0x90, ++0x82, 0x1D, 0x74, 0x01, 0x12, 0x68, 0x06, 0x75, 0x16, 0x01, 0x12, 0x68, 0x19, 0xF0, 0x7B, 0x04, ++0x80, 0x11, 0x90, 0x82, 0x1D, 0x74, 0x04, 0x12, 0x68, 0x06, 0x75, 0x16, 0x04, 0x12, 0x68, 0x19, ++0xF0, 0x7B, 0x06, 0x71, 0xD6, 0x90, 0x82, 0x1D, 0xE0, 0x24, 0x02, 0xFF, 0x90, 0x82, 0x1F, 0xE0, ++0x2F, 0xF0, 0x02, 0x66, 0x45, 0x22, 0xF0, 0x90, 0x82, 0x1F, 0xE0, 0x24, 0x30, 0xF9, 0xE4, 0x34, ++0x82, 0x75, 0x13, 0x01, 0xF5, 0x14, 0x89, 0x15, 0x22, 0x7B, 0xFE, 0x7A, 0x80, 0x79, 0x33, 0x12, ++0x2B, 0xED, 0x90, 0x82, 0x22, 0xE0, 0xFF, 0x90, 0x82, 0x21, 0xE0, 0xFD, 0xE4, 0x90, 0x82, 0x71, ++0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x52, 0x12, 0x1F, 0xA4, 0x25, 0x52, 0x90, 0x80, 0x85, 0x12, ++0x53, 0x8A, 0x25, 0x52, 0x90, 0x80, 0x86, 0x12, 0x57, 0xD5, 0x25, 0x52, 0x90, 0x80, 0x87, 0x11, ++0x77, 0x25, 0x52, 0x90, 0x80, 0x88, 0x31, 0x95, 0x25, 0x52, 0x90, 0x80, 0x89, 0xF0, 0x90, 0x00, ++0x05, 0x12, 0x1F, 0xBD, 0x25, 0x52, 0x90, 0x80, 0x8A, 0xF0, 0x90, 0x00, 0x06, 0x12, 0x1F, 0xBD, ++0x25, 0x52, 0x90, 0x80, 0x8B, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x1F, 0xBD, 0x12, 0x57, ++0xD6, 0xFF, 0x30, 0xE0, 0x1D, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xEA, 0x12, 0x53, 0x8A, 0x90, 0x81, ++0xEB, 0xF0, 0xEF, 0x54, 0xFE, 0xFF, 0xA3, 0xE0, 0x54, 0x01, 0x4F, 0x11, 0x77, 0x90, 0x81, 0xED, ++0xF0, 0x22, 0x90, 0x81, 0xEA, 0x74, 0x02, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, ++0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x22, 0x90, 0x82, 0x77, 0x12, 0x45, 0x15, 0x12, 0x1F, ++0xA4, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0x8D, 0xF0, 0xEF, 0xB1, 0x09, 0xA3, 0x12, 0x53, 0x8A, 0xFF, ++0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0x81, 0x8B, 0xE0, 0x54, 0xF0, 0x4E, 0x11, 0x77, 0x54, ++0x01, 0x25, 0xE0, 0xFE, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFD, 0x4E, 0xF0, 0xEF, 0x54, 0x0F, 0xC4, ++0x54, 0xF0, 0xFF, 0x31, 0x23, 0x4F, 0x12, 0x57, 0xD5, 0x90, 0x81, 0x8C, 0x31, 0x95, 0xFD, 0x7F, ++0x02, 0x12, 0x4E, 0xCD, 0x90, 0x82, 0x77, 0x12, 0x45, 0x0C, 0xB1, 0x19, 0x91, 0x86, 0xF0, 0x90, ++0x81, 0x8D, 0x12, 0x78, 0x04, 0x31, 0x22, 0x90, 0x01, 0xBE, 0xF0, 0x22, 0x90, 0x81, 0x91, 0xE0, ++0x44, 0x01, 0xF0, 0x90, 0x81, 0x8B, 0xE0, 0x54, 0x0F, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0x81, ++0xFF, 0xF0, 0xE0, 0xFD, 0x54, 0xC0, 0x70, 0x05, 0x12, 0x47, 0xF2, 0x80, 0x54, 0xED, 0x30, 0xE6, ++0x3D, 0x90, 0x81, 0x8D, 0xE0, 0x64, 0x02, 0x70, 0x27, 0x90, 0x81, 0x88, 0xE0, 0xFF, 0xC3, 0x13, ++0x20, 0xE0, 0x09, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x1A, 0x31, 0x23, 0x64, 0x01, ++0x70, 0x1F, 0x90, 0x81, 0x91, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x01, 0x12, 0x5E, 0xEC, 0x80, 0x11, ++0x31, 0x1C, 0x64, 0x02, 0x60, 0x04, 0x31, 0xC6, 0x80, 0x07, 0x31, 0x9C, 0x80, 0x03, 0x12, 0x47, ++0xF2, 0x90, 0x81, 0xFF, 0xE0, 0x90, 0x81, 0x91, 0x30, 0xE7, 0x05, 0x12, 0x56, 0x84, 0x61, 0xD3, ++0xE0, 0x54, 0xFD, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x1F, 0xBD, 0xD1, 0x21, 0x90, 0x81, ++0x90, 0xE0, 0x64, 0x0C, 0x60, 0x06, 0x12, 0x4E, 0xA4, 0x12, 0x5F, 0x7E, 0x22, 0xE4, 0xFF, 0x12, ++0x47, 0x97, 0xBF, 0x01, 0x10, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x0A, 0x31, 0x23, 0x64, 0x02, 0x60, ++0x02, 0x80, 0x03, 0x31, 0x9C, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1F, 0x90, 0x80, 0x86, 0xE0, ++0xFF, 0x90, 0x82, 0xBC, 0x74, 0x09, 0xF0, 0x7B, 0x18, 0xE4, 0xFD, 0x51, 0x8E, 0x90, 0x82, 0x00, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x22, 0xE4, 0xF5, 0x4E, 0x90, ++0x06, 0xA9, 0xE0, 0xF5, 0x4E, 0x54, 0xC0, 0x70, 0x09, 0x12, 0x47, 0xF2, 0x54, 0xFD, 0xF0, 0x02, ++0x47, 0xDC, 0xE5, 0x4E, 0x30, 0xE6, 0x16, 0x90, 0x81, 0x8D, 0xE0, 0x64, 0x01, 0x70, 0x11, 0x31, ++0x1C, 0x64, 0x02, 0x60, 0x04, 0x31, 0xC6, 0x80, 0x07, 0x31, 0x9C, 0x80, 0x03, 0x12, 0x47, 0xF2, ++0xE5, 0x4E, 0x90, 0x81, 0x91, 0x30, 0xE7, 0x05, 0x12, 0x56, 0x84, 0x61, 0xD3, 0xE0, 0x54, 0xFD, ++0xF0, 0x22, 0x12, 0x4F, 0xD9, 0x30, 0xE0, 0x0C, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, ++0x03, 0x12, 0x4F, 0xF0, 0x91, 0xB4, 0x54, 0x3F, 0x30, 0xE0, 0x08, 0x91, 0xBC, 0x54, 0x07, 0x70, ++0x35, 0x80, 0x30, 0x91, 0xC8, 0x9F, 0x40, 0x2B, 0x12, 0x47, 0x74, 0x70, 0x29, 0x31, 0x23, 0x70, ++0x04, 0x51, 0x87, 0xF0, 0x22, 0x90, 0x81, 0x97, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, ++0x0A, 0x51, 0x87, 0xF0, 0xE4, 0x90, 0x81, 0x97, 0xF0, 0x80, 0x02, 0x31, 0x9C, 0xE4, 0x90, 0x81, ++0x96, 0xF0, 0x22, 0x12, 0x47, 0xDC, 0x22, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xFB, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xBA, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x82, 0xB9, ++0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0x77, 0xC5, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0x82, 0xB9, 0xE0, ++0x90, 0x04, 0x25, 0xF0, 0x90, 0x82, 0xBA, 0xE0, 0x60, 0x0E, 0x74, 0x0F, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x08, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x54, 0xF0, 0xF0, 0xAF, 0x05, 0x71, 0x23, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x82, 0xBB, 0xE0, ++0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0x71, 0x23, 0xEE, 0xF0, 0x90, 0x82, ++0xBC, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x1E, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, ++0xF0, 0x74, 0x21, 0x2E, 0x12, 0x5F, 0x75, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0x80, ++0x87, 0xE0, 0xFF, 0x90, 0x82, 0xB1, 0xE0, 0xFB, 0x90, 0x82, 0xBC, 0x74, 0x0A, 0xF0, 0x7D, 0x01, ++0x51, 0x8E, 0x90, 0x82, 0xB2, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x82, 0xB0, 0xE0, ++0xFF, 0x12, 0x5F, 0x49, 0x90, 0x82, 0xB2, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x04, 0x80, 0xE0, ++0x54, 0x0F, 0xFD, 0xAC, 0x07, 0x71, 0xC7, 0x44, 0x01, 0xF0, 0x71, 0xC7, 0x54, 0xFB, 0xF0, 0xAC, ++0x07, 0x74, 0x16, 0x2C, 0x71, 0x26, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x15, 0x2C, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, 0xE4, 0xF0, 0x90, 0x04, 0x52, ++0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, ++0x71, 0xBF, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0x71, 0xBF, 0xED, 0xF0, 0x22, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x22, 0x90, 0x81, 0x88, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x8D, 0xE0, 0x64, ++0x02, 0x60, 0x10, 0x31, 0x23, 0x60, 0x0C, 0x12, 0x75, 0xB8, 0xEF, 0x70, 0x06, 0xFD, 0x7F, 0x0C, ++0x12, 0x4C, 0x66, 0x22, 0x91, 0x12, 0x30, 0xE0, 0x0B, 0x91, 0x0B, 0x60, 0x07, 0x7D, 0x01, 0x7F, ++0x02, 0x12, 0x4C, 0x66, 0x91, 0x0B, 0x60, 0x02, 0x71, 0xDB, 0x22, 0x90, 0x81, 0x87, 0xE0, 0x64, ++0x02, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0x90, 0x81, 0x8D, ++0xE0, 0x70, 0x07, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x11, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, ++0x07, 0x91, 0x3C, 0xBF, 0x01, 0x05, 0x80, 0xA3, 0x12, 0x4F, 0xB0, 0x22, 0x90, 0x05, 0x43, 0xE0, ++0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, 0xAE, 0x07, 0x91, 0x3C, 0xBF, 0x01, 0x11, 0xF1, ++0xC9, 0x54, 0x03, 0x20, 0xE0, 0x0A, 0xAF, 0x06, 0x7D, 0x01, 0x12, 0x4C, 0x66, 0x7F, 0x01, 0x22, ++0x7F, 0x00, 0x22, 0x90, 0x81, 0x88, 0x91, 0x15, 0x30, 0xE0, 0x19, 0xEF, 0x54, 0xBF, 0xB1, 0x10, ++0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFE, 0x91, 0x85, 0x74, 0x04, ++0xF0, 0x12, 0x47, 0xDC, 0x22, 0xF0, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, ++0x90, 0x01, 0x57, 0xE0, 0x60, 0x1D, 0x12, 0x47, 0xBE, 0xF0, 0x91, 0xB4, 0x54, 0x3F, 0x30, 0xE0, ++0x02, 0x80, 0x19, 0x91, 0xC8, 0x9F, 0x40, 0x0B, 0xE4, 0xFF, 0x12, 0x47, 0x97, 0xBF, 0x01, 0x03, ++0x51, 0x87, 0xF0, 0x22, 0x90, 0x81, 0x88, 0xE0, 0xFF, 0x13, 0x13, 0x22, 0xEF, 0x54, 0xFB, 0xF0, ++0x90, 0x81, 0x91, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x81, 0x96, 0xE0, 0x04, 0xF0, 0x90, 0x81, ++0x91, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x81, 0xEA, 0xE0, 0xFF, 0x90, 0x81, 0x96, 0xE0, 0xD3, 0x22, ++0x90, 0x81, 0x88, 0xE0, 0xFF, 0xB1, 0x09, 0x30, 0xE0, 0x1E, 0xEF, 0x54, 0x7F, 0xB1, 0x10, 0x30, ++0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x07, 0xE0, 0x54, 0xFD, 0x91, 0x85, 0x04, 0xF0, 0x90, ++0x81, 0x8D, 0xE0, 0x60, 0x03, 0x12, 0x47, 0xDC, 0x22, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, ++0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x81, 0x89, 0x22, 0x90, 0x82, 0x7A, 0x12, 0x45, 0x15, 0x12, ++0x75, 0x92, 0x90, 0x81, 0x8D, 0xE0, 0xFF, 0x12, 0x4F, 0x35, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x1A, ++0x90, 0x82, 0x7A, 0x12, 0x45, 0x0C, 0x12, 0x53, 0x8B, 0x54, 0x0F, 0xFF, 0x12, 0x57, 0xD6, 0xFD, ++0x12, 0x76, 0x59, 0xD1, 0xA2, 0x74, 0x01, 0xF0, 0xB1, 0x4B, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0xAC, 0x07, 0x90, 0x81, 0x89, 0xE0, 0xB1, 0x09, 0x30, 0xE0, 0x02, 0xC1, 0x0A, 0x90, ++0x81, 0x88, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x81, 0xAA, 0xE0, 0x24, 0x04, 0x90, 0x81, 0xA2, 0xF0, ++0x90, 0x81, 0xAA, 0xE0, 0x24, 0x03, 0x90, 0x81, 0xA1, 0xF0, 0x80, 0x0D, 0x90, 0x81, 0xA2, 0x74, ++0x02, 0xF0, 0x90, 0x81, 0xA1, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x81, 0xA1, 0xE0, 0xFA, 0x90, 0x81, ++0xA0, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x81, 0x95, 0xEB, 0xF0, 0x90, 0x81, 0xA2, 0xE0, 0xC3, ++0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x81, 0x95, 0xF0, 0x90, 0x81, 0xA1, 0xE0, ++0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x81, 0xA5, 0xF0, 0x90, 0x81, 0xA2, 0xE0, 0xFF, 0x24, 0x0A, ++0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0xA5, 0xD1, 0x16, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, ++0x81, 0xA5, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0x95, 0xD1, 0x16, 0x40, ++0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x81, 0xA5, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x81, 0x99, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x03, 0x12, 0x77, ++0xED, 0x90, 0x81, 0x8A, 0xE0, 0x54, 0xFE, 0xF0, 0x80, 0x07, 0x90, 0x81, 0x8A, 0xE0, 0x44, 0x01, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, ++0x22, 0x12, 0x78, 0x4F, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, ++0x92, 0x74, 0x02, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0xEC, ++0xE0, 0xC3, 0x13, 0x54, 0x7F, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12, 0x56, ++0x98, 0x90, 0x81, 0x88, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x12, 0x74, 0xC7, 0x90, 0x82, 0x02, 0xEF, ++0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x4E, 0xCD, 0x90, ++0x82, 0x02, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, ++0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x90, 0x04, 0xEC, 0x30, 0xE0, ++0x06, 0xE0, 0x54, 0xDD, 0xF0, 0x80, 0x04, 0xE0, 0x44, 0x22, 0xF0, 0xD1, 0xA2, 0x74, 0x02, 0xF0, ++0xA1, 0x4B, 0x90, 0x81, 0x9F, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x81, 0xA6, 0xE0, 0xFB, 0x90, ++0x82, 0xC8, 0x22, 0xE4, 0x90, 0x82, 0x02, 0xF0, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x4B, 0x12, 0x47, ++0x74, 0x70, 0x46, 0xF1, 0xD1, 0xF0, 0x90, 0x82, 0x02, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x94, ++0xF0, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x15, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x05, 0xE4, ++0x90, 0x82, 0x02, 0xF0, 0x91, 0x3C, 0xEF, 0x70, 0x04, 0x90, 0x82, 0x02, 0xF0, 0x90, 0x82, 0x02, ++0xE0, 0x60, 0x16, 0x12, 0x73, 0x5E, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x95, 0x12, 0x56, 0x8E, 0x90, ++0x81, 0x90, 0xE0, 0x20, 0xE2, 0x03, 0x12, 0x4C, 0x62, 0x22, 0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, ++0x7B, 0x01, 0x7A, 0x81, 0x79, 0x88, 0x12, 0x45, 0x44, 0x12, 0x77, 0xF7, 0x12, 0x45, 0x44, 0x90, ++0x81, 0x8C, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x93, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, ++0x90, 0x81, 0x99, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0xF1, 0xAB, 0xF0, 0xE4, 0xFD, 0xFF, 0x12, ++0x4E, 0xCD, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x4E, 0xCD, 0x12, 0x4E, 0xC9, 0x90, 0x80, 0x42, 0xE0, ++0xFF, 0xB4, 0x01, 0x08, 0x90, 0x81, 0x98, 0x74, 0x99, 0xF0, 0x80, 0x29, 0xEF, 0xB4, 0x03, 0x08, ++0x90, 0x81, 0x98, 0x74, 0x90, 0xF0, 0x80, 0x1D, 0x90, 0x81, 0x98, 0x74, 0x40, 0xF0, 0x90, 0x00, ++0x2C, 0xE0, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, 0x90, 0x81, 0xAA, 0x74, 0x02, 0xF0, 0x80, 0x05, ++0xE4, 0x90, 0x81, 0xAA, 0xF0, 0x11, 0xA2, 0xF1, 0xAB, 0xF0, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, ++0x7E, 0x00, 0xFF, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xEE, 0x12, 0x45, 0x44, 0xF1, 0xC1, ++0xF1, 0xB9, 0x12, 0x55, 0xCD, 0xE4, 0x90, 0x81, 0xF0, 0xF0, 0x22, 0x90, 0x81, 0xAA, 0xE0, 0x24, ++0x04, 0x90, 0x81, 0xA5, 0xF0, 0xA3, 0x74, 0x0A, 0x22, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, ++0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xC4, 0x13, 0x13, ++0x22, 0x90, 0x81, 0x93, 0xE0, 0x90, 0x05, 0x73, 0x22, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFF, 0x90, ++0x81, 0xFC, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0x98, 0xF0, 0x22, ++0x12, 0x1F, 0xA4, 0x90, 0x81, 0xF0, 0xF0, 0x22, 0x90, 0x82, 0x77, 0x12, 0x45, 0x15, 0x90, 0x82, ++0x77, 0x12, 0x45, 0x0C, 0x11, 0xB5, 0x90, 0x81, 0xF1, 0x11, 0xA0, 0x54, 0x04, 0x25, 0xE0, 0xFD, ++0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0x81, 0xF1, 0xF0, 0xEE, 0x54, 0x08, 0x25, 0xE0, 0xFE, 0xEF, ++0x54, 0xEF, 0x4E, 0x12, 0x53, 0x8A, 0xFB, 0xFF, 0x90, 0x05, 0x54, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, ++0x94, 0x00, 0xFE, 0x7C, 0x00, 0x7D, 0x05, 0x12, 0x20, 0x30, 0x90, 0x81, 0xF3, 0xEF, 0xF0, 0xEB, ++0x75, 0xF0, 0x05, 0x84, 0xA3, 0xF0, 0x90, 0x82, 0x77, 0x12, 0x45, 0x0C, 0x12, 0x1F, 0xA4, 0x20, ++0xE0, 0x0A, 0x12, 0x55, 0xCB, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x80, 0x07, 0x12, 0x4E, 0xC9, 0x12, ++0x57, 0x75, 0xF0, 0x11, 0xF3, 0x20, 0xE0, 0x04, 0xEF, 0x54, 0xDF, 0xF0, 0x12, 0x57, 0x51, 0x30, ++0xE0, 0x16, 0x90, 0x81, 0x8D, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x8F, 0xF0, 0x12, 0x4F, 0xCB, ++0xF0, 0x90, 0x05, 0x58, 0x74, 0x05, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0x8D, 0xF0, 0x90, 0x81, 0x8F, ++0x74, 0x0C, 0xF0, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0, 0x54, 0xFB, 0xF0, 0x22, ++0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, ++0x12, 0x1F, 0xA4, 0xFE, 0x22, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x01, 0xFE, 0x22, 0x11, 0xB5, 0x90, ++0x81, 0xF5, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, ++0x12, 0x53, 0x8A, 0x90, 0x81, 0xF6, 0x12, 0x57, 0xD5, 0x90, 0x81, 0xF7, 0xF0, 0x11, 0xEA, 0xF0, ++0x90, 0x81, 0xF5, 0xE0, 0x54, 0x01, 0xFF, 0x02, 0x48, 0xC4, 0x90, 0x81, 0xF6, 0xE0, 0x14, 0x90, ++0x81, 0xF8, 0x22, 0x90, 0x81, 0xF1, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x12, 0x1F, 0xA4, 0x90, ++0x81, 0xFA, 0x12, 0x53, 0x8A, 0x90, 0x81, 0xFB, 0xF0, 0x22, 0xE4, 0x90, 0x81, 0x74, 0xF0, 0xA3, ++0xF0, 0x90, 0x80, 0xDC, 0xF0, 0xA3, 0xF0, 0x22, 0x75, 0x3D, 0x10, 0xE4, 0xF5, 0x3E, 0x75, 0x3F, ++0x07, 0x75, 0x40, 0x02, 0x90, 0x01, 0x30, 0xE5, 0x3D, 0xF0, 0xA3, 0xE5, 0x3E, 0xF0, 0xA3, 0xE5, ++0x3F, 0xF0, 0xA3, 0xE5, 0x40, 0xF0, 0x22, 0x75, 0x45, 0x06, 0x75, 0x46, 0x01, 0x43, 0x46, 0x10, ++0x75, 0x47, 0x03, 0x75, 0x48, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x45, 0xF0, 0xA3, 0xE5, 0x46, 0xF0, ++0xA3, 0xE5, 0x47, 0xF0, 0xA3, 0xE5, 0x48, 0xF0, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, ++0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9C, ++0x74, 0x7E, 0xF0, 0xA3, 0x74, 0x92, 0xF0, 0xA3, 0x74, 0xA0, 0xF0, 0xA3, 0x74, 0x24, 0xF0, 0x90, ++0x01, 0x9B, 0x74, 0x49, 0xF0, 0x90, 0x01, 0x9A, 0x74, 0xE0, 0xF0, 0x90, 0x01, 0x99, 0xE4, 0xF0, ++0x90, 0x01, 0x98, 0x04, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0x96, 0xF0, 0x74, 0x71, ++0xA3, 0xF0, 0x90, 0x81, 0xF9, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, ++0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, ++0x22, 0x0D, 0x80, 0xDE, 0x74, 0x96, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x71, 0xA3, 0xF0, 0x7F, ++0x01, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x16, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x34, 0xE0, ++0x55, 0x3D, 0xF5, 0x41, 0xA3, 0xE0, 0x55, 0x3E, 0xF5, 0x42, 0xA3, 0xE0, 0x55, 0x3F, 0xF5, 0x43, ++0xA3, 0xE0, 0x55, 0x40, 0xF5, 0x44, 0x90, 0x01, 0x34, 0xE5, 0x41, 0xF0, 0xA3, 0xE5, 0x42, 0xF0, ++0xA3, 0xE5, 0x43, 0xF0, 0xA3, 0xE5, 0x44, 0xF0, 0x22, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x45, 0xF5, ++0x49, 0xA3, 0xE0, 0x55, 0x46, 0xF5, 0x4A, 0xA3, 0xE0, 0x55, 0x47, 0xF5, 0x4B, 0xA3, 0xE0, 0x55, ++0x48, 0xF5, 0x4C, 0x90, 0x01, 0x3C, 0xE5, 0x49, 0xF0, 0xA3, 0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, ++0xF0, 0xA3, 0xE5, 0x4C, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x82, 0xD7, ++0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, ++0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, ++0xA8, 0xF5, 0xE8, 0x12, 0x52, 0x84, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, ++0x32, 0x1E, 0x80, 0xFE, 0x22, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x05, 0xE4, 0xA3, 0xF0, 0xA3, ++0xF0, 0x22, 0x90, 0x81, 0xFB, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x02, ++0xF0, 0x90, 0x05, 0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0x30, 0xE0, 0x11, 0xA3, 0x74, ++0x01, 0xF0, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x12, 0x54, 0xDD, 0x51, ++0xB4, 0x02, 0x57, 0x58, 0xE4, 0xF5, 0x4E, 0x90, 0x81, 0x8D, 0xE0, 0x70, 0x02, 0x61, 0x52, 0x12, ++0x47, 0x74, 0x60, 0x02, 0x61, 0x52, 0x71, 0x66, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, ++0x1E, 0x90, 0x81, 0x94, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x81, 0x96, 0xE0, 0x60, ++0x0E, 0xEF, 0x70, 0x08, 0x90, 0x81, 0x93, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x4E, 0x01, 0x90, ++0x81, 0x83, 0xE0, 0x30, 0xE0, 0x12, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x02, 0x03, 0xE4, 0xF5, 0x4E, ++0x12, 0x6C, 0x3C, 0xEF, 0x70, 0x02, 0xF5, 0x4E, 0xE5, 0x4E, 0x60, 0x46, 0x71, 0x5E, 0x90, 0x81, ++0x96, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x16, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x96, 0xE0, 0xFF, ++0x90, 0x81, 0x95, 0xE0, 0x2F, 0x12, 0x56, 0x8F, 0x90, 0x81, 0x96, 0xE0, 0x80, 0x10, 0xE4, 0xF5, ++0x1D, 0x71, 0x53, 0xFF, 0x90, 0x81, 0x95, 0xE0, 0x2F, 0x12, 0x56, 0x8F, 0x71, 0x53, 0xFF, 0x90, ++0x81, 0x95, 0xE0, 0x2F, 0x90, 0x81, 0xA6, 0xF0, 0x90, 0x81, 0x90, 0xE0, 0x20, 0xE2, 0x03, 0x12, ++0x4C, 0x62, 0x22, 0x90, 0x81, 0x96, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0x22, 0x90, 0x81, ++0x91, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x81, 0x8B, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x90, ++0x81, 0x83, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x81, 0x85, 0x74, 0x01, 0xF0, 0x90, 0x81, 0x8D, 0xE0, ++0x60, 0x27, 0x12, 0x4F, 0xD9, 0x30, 0xE0, 0x0A, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x03, 0x12, ++0x4A, 0x2B, 0x90, 0x82, 0xD6, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, ++0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x12, 0x57, 0x7C, 0x90, 0x81, 0xF5, 0xE0, ++0x30, 0xE0, 0x0A, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x03, 0x12, 0x4A, 0x2B, 0x22, 0x90, 0x81, ++0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x05, 0x12, 0x6C, 0x0B, 0x60, 0x1B, 0x90, 0x81, 0x8D, 0xE0, 0x70, ++0x04, 0xEF, 0x30, 0xE0, 0x0B, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x02, 0x60, 0x09, 0x12, 0x49, 0x28, ++0x90, 0x01, 0xE6, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x03, 0x12, 0x6A, 0x32, ++0x02, 0x56, 0x39, 0x90, 0x81, 0x8D, 0xE0, 0x60, 0x10, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x03, ++0x02, 0x6E, 0x21, 0x12, 0x57, 0x21, 0x12, 0x47, 0xDC, 0x22, 0x90, 0x81, 0xFA, 0xE0, 0x60, 0x0F, ++0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x05, 0xFD, 0xE0, 0x04, 0xF0, 0x22, ++0x90, 0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x3F, 0x90, 0x81, 0x87, 0xE0, 0x7E, 0x00, 0xB4, 0x02, ++0x02, 0x7E, 0x01, 0x90, 0x81, 0x86, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, ++0x70, 0x25, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x02, 0x54, 0xDD, 0x12, 0x6B, 0xF4, 0x90, 0x81, ++0x87, 0xE0, 0xB4, 0x08, 0x06, 0xE4, 0xFD, 0x7F, 0x0C, 0x80, 0x09, 0x90, 0x81, 0x87, 0xE0, 0x70, ++0x06, 0xFD, 0x7F, 0x04, 0x12, 0x4C, 0x66, 0x22, 0x90, 0x81, 0x83, 0xE0, 0xFF, 0x30, 0xE0, 0x40, ++0x90, 0x81, 0x87, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0x81, 0x86, 0xE0, 0x7D, ++0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x26, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x03, ++0x02, 0x54, 0xDD, 0x12, 0x6C, 0x90, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x0C, 0x06, 0xE4, 0xFD, 0x7F, ++0x08, 0x80, 0x0A, 0x90, 0x81, 0x87, 0xE0, 0xB4, 0x04, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x4C, 0x66, ++0x22, 0xEF, 0x90, 0x02, 0x86, 0x60, 0x06, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, ++0xF0, 0x90, 0x80, 0x41, 0xED, 0xF0, 0x22, 0xE4, 0x90, 0x82, 0x03, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0x90, 0x00, 0x83, 0xE0, 0x90, 0x82, 0x03, 0xF0, 0x90, 0x00, 0x83, 0xE0, 0xFE, 0x90, 0x82, 0x03, ++0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x82, 0x05, 0xE0, 0x94, 0x64, 0x90, 0x82, 0x04, ++0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x82, 0x03, 0xE0, ++0xFF, 0x22, 0x90, 0x82, 0x04, 0x12, 0x5E, 0x2C, 0x80, 0xC6, 0x90, 0x01, 0xC4, 0x74, 0x0A, 0xF0, ++0x74, 0x75, 0xA3, 0xF0, 0x90, 0x00, 0x90, 0xE0, 0x20, 0xE0, 0xF9, 0x74, 0x0A, 0x04, 0x90, 0x01, ++0xC4, 0xF0, 0x74, 0x75, 0xA3, 0xF0, 0x22, 0xE4, 0xFE, 0xEF, 0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, ++0xFD, 0xEF, 0x54, 0x1F, 0xFF, 0xED, 0x60, 0x2C, 0x14, 0x60, 0x1E, 0x24, 0xFD, 0x60, 0x0F, 0x24, ++0xFE, 0x70, 0x2A, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0xDE, 0x9F, 0xFE, 0x80, 0x1F, 0xEF, 0x25, ++0xE0, 0xFF, 0xC3, 0x74, 0xF2, 0x9F, 0xFE, 0x80, 0x14, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x06, ++0x9F, 0xFE, 0x80, 0x09, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x10, 0x9F, 0xFE, 0xAF, 0x06, 0x22, ++0xD3, 0xEF, 0x64, 0x80, 0x94, 0x1C, 0x40, 0x07, 0xEF, 0x64, 0x80, 0x94, 0x94, 0x40, 0x03, 0x7F, ++0x00, 0x22, 0xC3, 0xEF, 0x64, 0x80, 0x94, 0x80, 0x40, 0x03, 0x7F, 0x64, 0x22, 0xEF, 0x24, 0x64, ++0xFF, 0x22, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x81, 0x96, 0xF0, 0xA3, 0xF0, ++0x90, 0x81, 0x91, 0xF0, 0x90, 0x81, 0x89, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x12, 0x49, ++0x12, 0x7D, 0x10, 0x7F, 0x03, 0x02, 0x4A, 0x0B, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, 0x03, 0x7F, ++0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xB1, 0xB8, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, ++0x0F, 0x01, 0x80, 0x51, 0x90, 0x81, 0x91, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, 0x02, ++0x80, 0x43, 0x90, 0x81, 0x8F, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, 0x80, ++0x34, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, 0x80, 0x2B, 0x90, 0x81, 0x91, 0xE0, 0x30, 0xE4, ++0x05, 0x75, 0x0F, 0x10, 0x80, 0x1F, 0x90, 0x81, 0x89, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, ++0x05, 0x75, 0x0F, 0x20, 0x80, 0x0F, 0x90, 0x81, 0xF0, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, 0x80, ++0x04, 0xD1, 0x48, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0F, ++0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x22, ++0xB1, 0xB8, 0xEF, 0x70, 0x03, 0x12, 0x4F, 0xB0, 0x22, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, ++0x24, 0x90, 0x81, 0x93, 0x74, 0x02, 0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, 0x90, 0x81, 0xED, 0xE0, ++0x80, 0x02, 0xED, 0x14, 0x90, 0x81, 0x93, 0xF0, 0x90, 0x81, 0x93, 0xE0, 0xA3, 0xF0, 0x90, 0x81, ++0x89, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0xEF, 0x60, 0x36, 0x12, 0x47, 0x74, 0x70, 0x31, 0x90, 0x81, ++0x89, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, 0x0F, 0x12, 0x4E, 0xAD, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0xBF, 0xF0, 0x12, 0x5F, 0x7E, 0xBF, 0x01, 0x10, 0x90, 0x81, 0x88, 0xE0, 0x44, 0x40, 0xF0, ++0x7D, 0x06, 0x12, 0x4F, 0xA8, 0x74, 0x06, 0xF0, 0x22, 0x12, 0x6C, 0x86, 0x74, 0x08, 0xF0, 0x22, ++0x7D, 0x2D, 0x12, 0x5E, 0x87, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, 0x49, ++0x1C, 0x12, 0x55, 0x39, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x4E, 0xCD, 0xE4, 0x90, 0x81, 0x87, 0xF0, ++0x22, 0x7D, 0x2E, 0x7F, 0x6F, 0x12, 0x4E, 0xAD, 0x7D, 0x02, 0x7F, 0x01, 0x12, 0x4E, 0xCD, 0xD1, ++0xF8, 0x90, 0x81, 0x87, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x22, ++0x90, 0x81, 0xF1, 0xE0, 0x30, 0xE0, 0x34, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x2D, 0x90, 0x82, ++0xDA, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0xC8, 0x40, 0x21, 0x90, 0x81, 0xF1, 0xE0, 0x44, 0x20, ++0xF0, 0xE4, 0x90, 0x82, 0xDA, 0xF0, 0x90, 0x81, 0xF1, 0xE0, 0x13, 0x30, 0xE0, 0x0D, 0x90, 0x81, ++0x88, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x81, 0x98, 0x74, 0xD0, 0xF0, 0x22, 0x7D, 0x22, 0x7F, 0xFF, ++0x12, 0x4E, 0xAD, 0x12, 0x57, 0x2D, 0x90, 0x81, 0x86, 0x74, 0x03, 0xF0, 0x22, 0x90, 0x81, 0x86, ++0xE0, 0x64, 0x02, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0x90, 0x82, 0xB0, 0xE0, 0xFF, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x82, 0xDC, 0xEF, 0xF0, 0x90, 0x80, 0x87, 0xE0, 0xFF, ++0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x3E, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x0E, 0x70, 0x15, 0x90, ++0x82, 0xDC, 0xE0, 0x70, 0x30, 0x90, 0x81, 0x88, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, 0x04, 0x12, ++0x4E, 0xC5, 0x80, 0x1E, 0x90, 0x81, 0x90, 0xE0, 0x64, 0x06, 0x70, 0x19, 0x90, 0x82, 0xDC, 0xE0, ++0x60, 0x13, 0x90, 0x81, 0x88, 0xE0, 0x54, 0xBF, 0xF0, 0xF1, 0xBA, 0xF0, 0x90, 0x81, 0x90, 0x74, ++0x04, 0xF0, 0x12, 0x55, 0xCD, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x40, ++0xF0, 0xE0, 0x44, 0x80, 0x22, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, 0xE0, 0x02, 0x7E, ++0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x90, 0x82, 0x22, 0xE0, 0xFD, 0x90, 0x82, ++0x1F, 0xE0, 0x24, 0x30, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xF0, 0x90, 0x81, 0x99, ++0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x04, 0x7D, 0x00, 0x7B, 0x01, 0x7A, ++0x81, 0x79, 0xF5, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x81, 0x8F, 0xE0, 0x90, 0x01, 0xBB, ++0x22, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFE, 0xEF, 0x54, 0x07, 0xFF, 0x22, 0x90, 0x81, 0xF7, ++0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0x90, 0x81, 0x83, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, ++0x81, 0x89, 0xE0, 0xFF, 0x13, 0x13, 0x22, 0x90, 0x81, 0xF7, 0xE0, 0x90, 0x01, 0x3F, 0x22, 0x90, ++0x81, 0x93, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x90, 0x81, 0x8B, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0x90, ++0x81, 0x88, 0xE0, 0x13, 0x13, 0x13, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0x4D, ++0xFF, 0x90, 0x81, 0x83, 0xF0, 0xEE, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x00, ++0x5B, 0xC3, ++}; ++u4Byte ArrayLength_MP_8188E_T_FW_NIC_89EM = 14482; ++ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_NIC_89EM( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188E_T_FW_NIC_89EM; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188E_T_FW_NIC_89EM, ArrayLength_MP_8188E_T_FW_NIC_89EM); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188E_T_FW_NIC_89EM; ++} ++ ++ ++u1Byte Array_MP_8188E_T_FW_WoWLAN[] = { ++0xE1, 0x88, 0x30, 0x00, 0x16, 0x00, 0x00, 0x00, 0x03, 0x03, 0x11, 0x59, 0x72, 0x3F, 0x00, 0x00, ++0x28, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x47, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x48, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0xE1, 0xAD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x50, 0x03, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, ++0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xE7, 0x09, 0xF6, 0x08, 0xDF, 0xFA, 0x80, 0x46, 0xE7, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x3E, ++0x88, 0x82, 0x8C, 0x83, 0xE7, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, 0x32, 0xE3, 0x09, 0xF6, 0x08, ++0xDF, 0xFA, 0x80, 0x78, 0xE3, 0x09, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x70, 0x88, 0x82, 0x8C, 0x83, ++0xE3, 0x09, 0xF0, 0xA3, 0xDF, 0xFA, 0x80, 0x64, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF6, 0x08, ++0xDF, 0xFA, 0x80, 0x58, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xA3, 0xF2, 0x08, 0xDF, 0xFA, 0x80, 0x4C, ++0x80, 0xD2, 0x80, 0xFA, 0x80, 0xC6, 0x80, 0xD4, 0x80, 0x69, 0x80, 0xF2, 0x80, 0x33, 0x80, 0x10, ++0x80, 0xA6, 0x80, 0xEA, 0x80, 0x9A, 0x80, 0xA8, 0x80, 0xDA, 0x80, 0xE2, 0x80, 0xCA, 0x80, 0x33, ++0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, ++0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, ++0x0D, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xA3, 0xF6, 0x08, 0xDF, 0xF9, 0xEC, 0xFA, 0xA9, 0xF0, ++0xED, 0xFB, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, ++0xC5, 0x83, 0xCC, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xDF, 0xEA, 0xDE, ++0xE8, 0x80, 0xDB, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xA3, 0xF2, 0x08, 0xDF, 0xF9, 0x80, 0xCC, ++0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, 0x60, 0xC3, 0x88, 0xF0, 0xED, 0x24, 0x02, 0xB4, 0x04, ++0x00, 0x50, 0xB9, 0xF5, 0x82, 0xEB, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0xAF, 0x23, 0x23, 0x45, ++0x82, 0x23, 0x90, 0x41, 0x50, 0x73, 0xC5, 0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, ++0xE5, 0x82, 0x15, 0x82, 0x70, 0x02, 0x15, 0x83, 0xE0, 0x38, 0xF0, 0x22, 0xC3, 0xEF, 0x9B, 0xFF, ++0xEE, 0x9A, 0xFE, 0xED, 0x99, 0xFD, 0xEC, 0x98, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, ++0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, 0xEB, 0x9F, 0xF5, 0xF0, 0xEA, 0x9E, 0x42, 0xF0, 0xE9, ++0x9D, 0x42, 0xF0, 0xE8, 0x9C, 0x45, 0xF0, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x22, 0xE0, 0xF8, 0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, ++0xA4, 0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, ++0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, ++0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, ++0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, ++0xA3, 0xA3, 0x80, 0xDF, 0xE3, 0xF5, 0xF0, 0x09, 0xE2, 0x08, 0xB5, 0xF0, 0x6B, 0xDF, 0xF5, 0x80, ++0x67, 0xE3, 0xF5, 0xF0, 0x09, 0xE6, 0x08, 0xB5, 0xF0, 0x5E, 0xDF, 0xF5, 0x80, 0x5A, 0x87, 0xF0, ++0x09, 0xE6, 0x08, 0xB5, 0xF0, 0x52, 0xDF, 0xF6, 0x80, 0x4E, 0x87, 0xF0, 0x09, 0xE2, 0x08, 0xB5, ++0xF0, 0x46, 0xDF, 0xF6, 0x80, 0x42, 0x88, 0x82, 0x8C, 0x83, 0x87, 0xF0, 0x09, 0xE0, 0xA3, 0xB5, ++0xF0, 0x36, 0xDF, 0xF6, 0x80, 0x32, 0x88, 0x82, 0x8C, 0x83, 0x87, 0xF0, 0x09, 0xE4, 0x93, 0xA3, ++0xB5, 0xF0, 0x25, 0xDF, 0xF5, 0x80, 0x21, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0xF5, 0xF0, 0x09, 0xE0, ++0xA3, 0xB5, 0xF0, 0x14, 0xDF, 0xF5, 0x80, 0x10, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0xF5, 0xF0, 0x09, ++0xE4, 0x93, 0xA3, 0xB5, 0xF0, 0x02, 0xDF, 0xF4, 0x02, 0x43, 0xC3, 0x80, 0x87, 0x80, 0xE9, 0x80, ++0x90, 0x80, 0xD4, 0x80, 0x3E, 0x80, 0x15, 0x80, 0x6E, 0x80, 0x7E, 0x80, 0x9D, 0x80, 0xB7, 0x80, ++0x8D, 0x80, 0xA3, 0x80, 0x51, 0x80, 0x74, 0x80, 0x3C, 0x02, 0x43, 0xCF, 0x89, 0x82, 0x8A, 0x83, ++0xEC, 0xFA, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE4, ++0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0x76, 0xDF, 0xE3, 0xDE, ++0xE1, 0x80, 0x70, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xE2, 0x08, 0xB5, 0xF0, ++0x62, 0xDF, 0xF4, 0x80, 0x5E, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0xF0, 0xA3, 0xE6, 0x08, 0xB5, ++0xF0, 0x51, 0xDF, 0xF5, 0x80, 0x4D, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0xF0, 0xA3, 0xE2, 0x08, ++0xB5, 0xF0, 0x40, 0xDF, 0xF5, 0x80, 0x3C, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, ++0xE6, 0x08, 0xB5, 0xF0, 0x2E, 0xDF, 0xF4, 0x80, 0x2A, 0x80, 0x02, 0x80, 0x57, 0x89, 0x82, 0x8A, ++0x83, 0xEC, 0xFA, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, ++0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0x06, 0xDF, 0xE4, 0xDE, ++0xE2, 0x80, 0x00, 0x7F, 0xFF, 0xB5, 0xF0, 0x02, 0x0F, 0x22, 0x40, 0x02, 0x7F, 0x01, 0x22, 0x89, ++0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE0, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, ++0xCC, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0xD5, 0xDF, 0xE5, ++0xDE, 0xE3, 0x80, 0xCF, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE0, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, ++0xCC, 0xB5, 0xF0, 0xAF, 0xDF, 0xE4, 0xDE, 0xE2, 0x80, 0xA9, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, ++0x4E, 0x60, 0xAB, 0xED, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0x98, 0xF5, 0x82, 0xEB, 0x24, 0x02, ++0xB4, 0x04, 0x00, 0x50, 0x8E, 0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x43, 0x0B, 0x73, 0xEF, 0x4E, ++0x60, 0x12, 0xEF, 0x60, 0x01, 0x0E, 0xED, 0xBB, 0x01, 0x0B, 0x89, 0x82, 0x8A, 0x83, 0xF0, 0xA3, ++0xDF, 0xFC, 0xDE, 0xFA, 0x22, 0x89, 0xF0, 0x50, 0x07, 0xF7, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, ++0xBB, 0xFE, 0xFC, 0xF3, 0x09, 0xDF, 0xFC, 0xA9, 0xF0, 0x22, 0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, ++0x44, 0x6E, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, 0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, ++0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, 0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, ++0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, 0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, ++0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, 0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, ++0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, 0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, ++0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, 0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, ++0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, 0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, ++0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, 0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, ++0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, 0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, ++0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, 0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, ++0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, 0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, ++0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, 0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, ++0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, 0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, ++0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, 0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, ++0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, 0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, ++0x78, 0x81, 0x76, 0x30, 0x90, 0x47, 0xA7, 0x74, 0x01, 0x93, 0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, ++0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, 0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, ++0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, 0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, ++0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, 0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, ++0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, ++0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, 0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, ++0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, 0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, ++0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, 0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, ++0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, 0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, ++0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, 0x04, 0x90, 0x47, 0xA7, 0x93, 0xF6, ++0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, ++0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, ++0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, 0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x44, ++0xB7, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, ++0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, 0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, ++0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, 0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, ++0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, 0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, ++0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, 0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, ++0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, 0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, ++0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, ++0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, 0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, ++0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x44, 0xB6, 0x8F, 0xF0, 0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, ++0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, 0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, ++0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, 0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, ++0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, 0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, ++0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, 0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x44, ++0xB7, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, 0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, ++0x4F, 0xFF, 0x22, 0x02, 0x47, 0x51, 0x02, 0x45, 0x47, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, ++0x40, 0x03, 0xF6, 0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, ++0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, ++0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, ++0x80, 0x90, 0x47, 0x96, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, ++0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, ++0xA8, 0x40, 0xB8, 0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, ++0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x84, 0x61, 0x00, 0x41, 0x84, 0x62, 0x00, 0x41, 0x84, ++0x71, 0x00, 0x41, 0x84, 0x72, 0x00, 0x00, 0x60, 0x0B, 0x67, 0xEC, 0x6F, 0xED, 0xC0, 0xE0, 0xC0, ++0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, ++0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xAD, 0xF0, ++0x74, 0x47, 0xA3, 0xF0, 0x12, 0x75, 0xF8, 0xE5, 0x3C, 0x30, 0xE7, 0x03, 0x12, 0x78, 0x16, 0x74, ++0xAD, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x47, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, ++0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, ++0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x05, 0xF0, 0x74, 0x48, 0xA3, 0xF0, 0x12, 0x76, 0x32, 0xE5, ++0x41, 0x30, 0xE3, 0x03, 0x12, 0x72, 0x91, 0xE5, 0x41, 0x30, 0xE4, 0x03, 0x12, 0x71, 0xFC, 0xE5, ++0x43, 0x30, 0xE0, 0x02, 0xF1, 0xE9, 0xE5, 0x43, 0x30, 0xE1, 0x02, 0x11, 0xA1, 0xE5, 0x43, 0x30, ++0xE2, 0x03, 0x12, 0x76, 0xCB, 0xE5, 0x43, 0x30, 0xE3, 0x02, 0xB1, 0xF4, 0xE5, 0x43, 0x30, 0xE4, ++0x03, 0x12, 0x6A, 0x77, 0xE5, 0x43, 0x30, 0xE5, 0x02, 0xF1, 0x59, 0xE5, 0x43, 0x30, 0xE6, 0x03, ++0x12, 0x6A, 0x01, 0xE5, 0x44, 0x30, 0xE1, 0x03, 0x12, 0x76, 0xE3, 0x74, 0x05, 0x04, 0x90, 0x01, ++0xC4, 0xF0, 0x74, 0x48, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, ++0x32, 0x90, 0x81, 0x4C, 0xE0, 0x70, 0x02, 0x21, 0x33, 0x90, 0x81, 0x63, 0xE0, 0x04, 0x31, 0x3F, ++0x12, 0x42, 0x1A, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x31, 0x59, ++0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x42, 0x1A, ++0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x31, 0x59, 0x78, 0x18, 0x12, 0x20, 0xBB, ++0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x42, 0x1A, 0x90, 0x81, 0x97, 0xF1, 0xE1, ++0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x0F, 0x12, 0x7B, 0xC8, 0x90, 0x84, 0x5A, 0x74, 0x05, ++0xF0, 0x12, 0x77, 0x38, 0x12, 0x78, 0x03, 0xF1, 0xEB, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0D, 0x90, ++0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x06, 0x12, 0x51, 0x55, 0x12, 0x57, 0xC9, 0x90, 0x84, 0x6B, 0xE0, ++0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, ++0x44, 0x01, 0xF0, 0x12, 0x61, 0xDB, 0x12, 0x7C, 0xBF, 0xE4, 0x90, 0x83, 0xA5, 0xF0, 0x22, 0xF0, ++0x90, 0x05, 0x61, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x08, 0x12, 0x20, 0xBB, 0xA8, 0x04, ++0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, ++0xE4, 0x90, 0x83, 0xBB, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x6A, 0xB1, 0x94, 0x64, 0x01, 0x70, ++0x64, 0x12, 0x7F, 0x50, 0x31, 0x3F, 0x12, 0x42, 0x1A, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x05, 0x62, 0x31, 0x59, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x42, 0x1A, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x31, ++0x59, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xF1, 0xDB, ++0x44, 0x80, 0xF0, 0x90, 0x83, 0xBB, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x81, 0x53, 0xF0, 0x04, 0x60, ++0x14, 0xF1, 0xFB, 0xE4, 0xF5, 0x1D, 0x90, 0x81, 0x54, 0xE0, 0xB1, 0x2B, 0x90, 0x81, 0x4F, 0xE0, ++0x20, 0xE2, 0x02, 0x31, 0xD6, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x84, 0x6E, 0xED, 0xF0, 0x90, 0x81, 0x47, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x30, 0xE0, 0x02, 0x61, 0x25, 0xEE, 0x12, 0x5E, 0xE7, 0x30, 0xE0, 0x02, 0x61, 0x25, 0x90, 0x81, ++0x4F, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0x61, 0x25, 0xEF, 0x70, 0x02, 0x41, 0x98, 0x24, 0xFE, 0x70, ++0x02, 0x41, 0xD1, 0x24, 0xFE, 0x60, 0x49, 0x24, 0xFC, 0x70, 0x02, 0x61, 0x0B, 0x24, 0xFC, 0x60, ++0x02, 0x61, 0x1B, 0xEE, 0xB4, 0x0E, 0x02, 0x71, 0x6F, 0x90, 0x81, 0x4F, 0xE0, 0x70, 0x04, 0x7F, ++0x01, 0x71, 0xAB, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x06, 0x02, 0x71, 0x8A, 0x90, 0x81, 0x4F, 0xE0, ++0xB4, 0x04, 0x0E, 0x90, 0x84, 0x6E, 0xE0, 0xFF, 0x60, 0x04, 0xB1, 0xBE, 0x80, 0x03, 0x12, 0x51, ++0x49, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x08, 0x60, 0x02, 0x61, 0x1B, 0x12, 0x7C, 0x2C, 0x61, 0x1B, ++0x90, 0x81, 0x4F, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x71, 0xAB, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x06, ++0x02, 0x71, 0x8A, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x0E, 0x07, 0x71, 0x2A, 0xBF, 0x01, 0x02, 0x71, ++0x6F, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0x61, 0x1B, 0x71, 0x2A, 0xEF, 0x64, 0x01, ++0x60, 0x02, 0x61, 0x1B, 0x71, 0xC2, 0x61, 0x1B, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x0E, 0x07, 0x71, ++0x2A, 0xBF, 0x01, 0x02, 0x71, 0x6F, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x06, 0x02, 0x71, 0x8A, 0x90, ++0x81, 0x4F, 0xE0, 0xB4, 0x0C, 0x07, 0x71, 0x2A, 0xBF, 0x01, 0x02, 0x71, 0xC2, 0x90, 0x81, 0x4F, ++0xE0, 0x64, 0x04, 0x70, 0x56, 0x12, 0x69, 0x7F, 0xEF, 0x64, 0x01, 0x70, 0x4E, 0xD1, 0xB7, 0x80, ++0x4A, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x0E, 0x07, 0x71, 0x2A, 0xBF, 0x01, 0x02, 0x71, 0x6F, 0x90, ++0x81, 0x4F, 0xE0, 0xB4, 0x06, 0x02, 0x71, 0x8A, 0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x0C, 0x07, 0x71, ++0x2A, 0xBF, 0x01, 0x02, 0x71, 0xC2, 0x90, 0x81, 0x4F, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x71, 0xAB, ++0x90, 0x81, 0x4F, 0xE0, 0xB4, 0x04, 0x14, 0xF1, 0xCF, 0x80, 0x10, 0x90, 0x81, 0x4F, 0xE0, 0xB4, ++0x0C, 0x09, 0xF1, 0xEB, 0x54, 0x3F, 0x30, 0xE0, 0x02, 0xD1, 0xDB, 0x90, 0x81, 0x4F, 0x12, 0x7F, ++0x1C, 0x90, 0x01, 0xBB, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x12, 0x79, 0x94, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, 0x01, 0x80, 0x1E, 0x12, 0x79, ++0x8A, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x02, 0x80, 0x13, 0x90, 0x81, 0x4E, 0xE0, 0xD3, 0x94, 0x04, ++0x40, 0x05, 0x75, 0x0E, 0x08, 0x80, 0x05, 0x12, 0x69, 0x77, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, ++0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0x81, 0x48, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0x7D, 0x0C, 0x80, 0x05, 0x12, 0x7C, 0x9C, 0x7D, ++0x04, 0x7F, 0x01, 0x91, 0x09, 0xE4, 0xFD, 0xFF, 0x80, 0x70, 0x90, 0x81, 0x48, 0xE0, 0x90, 0x06, ++0x04, 0x20, 0xE0, 0x08, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x04, 0x80, 0x06, 0xE0, 0x54, 0x7F, 0xF0, ++0x7D, 0x0C, 0x7F, 0x01, 0x91, 0x09, 0xE4, 0xFD, 0xFF, 0x80, 0x4F, 0x90, 0x84, 0x6D, 0xEF, 0xF0, ++0x12, 0x52, 0xBC, 0x90, 0x84, 0x6D, 0xE0, 0x60, 0x03, 0x12, 0x57, 0x4E, 0x7D, 0x04, 0x7F, 0x01, ++0x80, 0x47, 0xB1, 0x94, 0x64, 0x01, 0x70, 0x28, 0x90, 0x81, 0x48, 0xE0, 0x54, 0xFD, 0xF0, 0x7D, ++0x2C, 0x7F, 0x6F, 0x71, 0xFA, 0x7D, 0x08, 0x7F, 0x01, 0xD1, 0x0D, 0xBF, 0x01, 0x0D, 0x90, 0x81, ++0x47, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0x7F, 0x01, 0x80, 0x1E, 0x12, 0x6E, 0x6C, 0x04, 0xF0, ++0x22, 0xE4, 0xFD, 0x7F, 0x0C, 0x31, 0xDA, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, ++0x80, 0x05, 0xED, 0xF0, 0x22, 0x7D, 0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0xAC, 0x07, 0xEF, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1A, 0xED, 0x54, 0x01, ++0xFE, 0x90, 0x81, 0x47, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0x80, 0x0C, 0x90, 0x81, 0x4F, 0xED, 0xF0, ++0x80, 0x05, 0x90, 0x81, 0x4E, 0xED, 0xF0, 0x90, 0x00, 0x8F, 0xE0, 0x30, 0xE4, 0x2E, 0xEC, 0x14, ++0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, 0x23, 0x90, 0x81, 0x47, 0xE0, 0x54, 0x01, 0xC4, ++0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0x81, 0x4F, 0xE0, 0x54, 0x7F, 0x4F, 0xFD, 0x7F, 0x88, ++0x80, 0x07, 0x90, 0x81, 0x4E, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xE4, 0xF5, 0x4E, 0x90, 0x81, 0x4C, 0xE0, 0x70, 0x02, 0xA1, 0x24, 0xB1, 0x94, 0x64, 0x01, ++0x60, 0x02, 0xA1, 0x24, 0x31, 0x40, 0x12, 0x42, 0x1A, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x05, 0x62, 0x31, 0x59, 0x78, 0x10, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x42, 0x1A, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x31, ++0x59, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xF1, 0xDB, ++0x44, 0x80, 0xF0, 0x12, 0x7F, 0x48, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, ++0x81, 0x53, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x81, 0x55, 0xE0, 0x60, 0x0E, 0xEF, ++0x70, 0x08, 0x90, 0x81, 0x52, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x4E, 0x01, 0xE5, 0x4E, 0x60, ++0x33, 0xF1, 0xFB, 0x90, 0x81, 0x55, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x0F, 0xE4, 0xF5, 0x1D, ++0x90, 0x81, 0x55, 0xE0, 0xB1, 0x25, 0x90, 0x81, 0x55, 0xE0, 0x80, 0x0B, 0xE4, 0xF5, 0x1D, 0x12, ++0x7C, 0x0B, 0xB1, 0x25, 0x12, 0x7C, 0x0B, 0x12, 0x7C, 0x16, 0xF0, 0x90, 0x81, 0x4F, 0xE0, 0x20, ++0xE2, 0x02, 0x31, 0xD6, 0x22, 0xFF, 0x90, 0x81, 0x54, 0xE0, 0x2F, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, ++0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, 0x19, 0x8F, 0x1A, 0xE5, ++0x1E, 0xB1, 0x8C, 0x85, 0x19, 0x83, 0x85, 0x1A, 0x82, 0xF0, 0xE5, 0x1D, 0xB1, 0x8C, 0xFF, 0xE5, ++0x1E, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x4F, 0xA3, 0xF0, 0xEB, 0xB1, 0x8C, 0xFF, 0xE5, 0x1D, 0x13, ++0x13, 0x13, 0x54, 0x1F, 0x4F, 0xD1, 0xD3, 0xA3, 0xF0, 0xBD, 0x01, 0x0D, 0x85, 0x1A, 0x82, 0x8E, ++0x83, 0xA3, 0xA3, 0xA3, 0x74, 0x03, 0xF0, 0x80, 0x07, 0xD1, 0xD3, 0xA3, 0xA3, 0x74, 0x01, 0xF0, ++0xD1, 0xD3, 0xA3, 0xA3, 0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x54, 0x07, 0xC4, 0x33, ++0x54, 0xE0, 0x22, 0xF0, 0xE4, 0xFF, 0xB1, 0x9A, 0xEF, 0x22, 0x12, 0x7F, 0x06, 0x12, 0x60, 0xCA, ++0xE0, 0xFD, 0x7C, 0x00, 0x12, 0x72, 0x7D, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0xEF, 0x60, ++0x32, 0xB1, 0x94, 0x64, 0x01, 0x70, 0x2C, 0x90, 0x81, 0x48, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, ++0x7F, 0x0F, 0x71, 0xFA, 0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0xD1, 0x09, 0xBF, 0x01, 0x0D, ++0x90, 0x81, 0x47, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x81, 0x09, 0x12, 0x6E, 0x6C, ++0x74, 0x08, 0xF0, 0x22, 0xB1, 0x94, 0x64, 0x01, 0x70, 0x0E, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x08, ++0x12, 0x7E, 0xE0, 0x12, 0x6F, 0xDD, 0xB1, 0x2B, 0x22, 0x7D, 0x08, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x3E, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x80, 0x03, 0xE0, ++0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1F, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x84, 0x42, 0xF0, ++0x7D, 0x26, 0xF1, 0xC5, 0x70, 0x03, 0x12, 0x6B, 0x56, 0x90, 0x84, 0x42, 0xE0, 0xFF, 0x7D, 0x27, ++0x71, 0xFA, 0x12, 0x7C, 0x36, 0x80, 0x06, 0x12, 0x7C, 0x36, 0x12, 0x6B, 0x56, 0x12, 0x6D, 0xBA, ++0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, 0x84, 0x5B, 0xF0, 0xA3, 0xF0, 0x90, 0x05, ++0x22, 0xE0, 0x90, 0x84, 0x5D, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x71, 0xFA, 0x90, 0x05, 0xF8, 0xE0, ++0x70, 0x14, 0xA3, 0xE0, 0x70, 0x10, 0xA3, 0xE0, 0x70, 0x0C, 0xA3, 0xE0, 0x70, 0x08, 0x12, 0x7F, ++0x60, 0x71, 0xFA, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x84, 0x5C, 0xE0, 0x94, 0xE8, 0x90, 0x84, 0x5B, ++0xE0, 0x94, 0x03, 0x40, 0x0F, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x12, 0x7F, 0x60, 0x71, ++0xFA, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x32, 0xAA, 0x90, 0x84, 0x5B, 0xE4, 0x75, ++0xF0, 0x01, 0x12, 0x41, 0xF6, 0x80, 0xB5, 0x7D, 0x2D, 0x7F, 0xFF, 0x71, 0xFA, 0xD1, 0x57, 0x90, ++0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, 0x51, 0x3D, 0xD1, 0xE9, 0xE4, 0xFD, 0x7F, ++0x01, 0x81, 0x09, 0x85, 0x1A, 0x82, 0x85, 0x19, 0x83, 0xA3, 0x22, 0x7D, 0x2F, 0xD1, 0xE5, 0x7D, ++0x08, 0x7F, 0x01, 0x81, 0x09, 0x7F, 0xFF, 0x71, 0xFA, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0xD1, 0x57, 0x90, 0x85, 0xBB, 0x12, 0x20, 0xDA, 0xCC, 0xF0, 0x00, 0xC0, 0x12, 0x57, 0x54, 0x12, ++0x20, 0xDA, 0x00, 0x00, 0x00, 0x14, 0x12, 0x7F, 0x68, 0x90, 0x84, 0x34, 0x12, 0x20, 0xDA, 0x00, ++0x00, 0x00, 0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x74, 0x96, 0x12, 0x7F, 0x2F, 0x44, 0x80, 0xFC, 0x90, ++0x84, 0x4F, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x4F, 0x12, 0x73, 0xF9, 0x7F, 0x7C, 0x7E, 0x08, 0x12, ++0x2E, 0xA2, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, ++0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x79, 0x55, 0x90, 0x81, 0x4F, 0xE0, ++0x64, 0x0C, 0x60, 0x04, 0x71, 0xF1, 0xD1, 0x09, 0x22, 0xE4, 0xFF, 0xB1, 0x9A, 0xBF, 0x01, 0x11, ++0x90, 0x81, 0x4C, 0xE0, 0x60, 0x0B, 0xF1, 0xF4, 0x64, 0x02, 0x60, 0x03, 0x02, 0x6A, 0x94, 0xF1, ++0x49, 0x22, 0x90, 0x81, 0x4C, 0xE0, 0x64, 0x01, 0x70, 0x11, 0xF1, 0xF4, 0x60, 0x05, 0x71, 0xF1, ++0x02, 0x79, 0x55, 0x90, 0x81, 0x4F, 0xE0, 0x70, 0x02, 0x31, 0xD6, 0x22, 0xF1, 0xB1, 0x54, 0x3F, ++0xF0, 0xEF, 0x60, 0x0E, 0x74, 0x21, 0x2D, 0xF1, 0xBD, 0xE0, 0x44, 0x10, 0xF1, 0xB0, 0x44, 0x80, ++0xF0, 0x22, 0x74, 0x21, 0x2D, 0xF1, 0xBD, 0xE0, 0x54, 0xEF, 0xF1, 0xB0, 0x44, 0x40, 0xF0, 0x22, ++0xF0, 0x74, 0x1F, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0x22, 0x7F, 0xFF, 0x71, 0xFA, 0xD1, 0x57, 0xEF, 0x64, 0x01, 0x22, 0x7D, ++0x2E, 0x7F, 0x6F, 0x71, 0xFA, 0x7D, 0x02, 0x7F, 0x01, 0x81, 0x09, 0x12, 0x42, 0x1A, 0x90, 0x81, ++0x9F, 0x12, 0x20, 0xCE, 0x90, 0x81, 0x48, 0xE0, 0x22, 0x81, 0x71, 0x90, 0x81, 0x48, 0xE0, 0xFF, ++0x13, 0x13, 0x22, 0xF0, 0x90, 0x81, 0x4A, 0xE0, 0x54, 0x0F, 0x22, 0x90, 0x81, 0x50, 0xE0, 0x44, ++0x10, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, ++0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x01, 0xC4, 0x74, 0x03, 0xF0, 0x74, 0x50, 0xA3, 0xF0, 0x12, 0x76, 0x5F, 0xE5, 0x49, 0x30, ++0xE1, 0x02, 0x11, 0x8A, 0xE5, 0x49, 0x30, 0xE2, 0x02, 0x11, 0x9D, 0xE5, 0x4A, 0x30, 0xE0, 0x03, ++0x12, 0x76, 0xED, 0xE5, 0x4C, 0x30, 0xE1, 0x05, 0x7F, 0x04, 0x12, 0x72, 0x00, 0xE5, 0x4C, 0x30, ++0xE4, 0x02, 0x11, 0x94, 0xE5, 0x4C, 0x30, 0xE5, 0x03, 0x12, 0x6E, 0x0B, 0xE5, 0x4C, 0x30, 0xE6, ++0x03, 0x12, 0x6E, 0x35, 0x74, 0x03, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x50, 0xA3, 0xF0, 0xD0, ++0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, ++0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x03, ++0x12, 0x6F, 0x5C, 0x22, 0x12, 0x49, 0x60, 0x7D, 0x02, 0x7F, 0x02, 0x21, 0x3D, 0x90, 0x81, 0x4C, ++0xE0, 0x60, 0x0F, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x03, 0x02, 0x79, 0x55, 0x11, 0xB7, 0x12, ++0x69, 0xF7, 0x22, 0x51, 0xBC, 0x31, 0x49, 0x90, 0x81, 0x47, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0xEF, ++0x70, 0x37, 0x7D, 0x78, 0x7F, 0x02, 0x31, 0x59, 0x7D, 0x02, 0x7F, 0x03, 0x31, 0x59, 0x7D, 0xC8, ++0x7F, 0x02, 0x51, 0x37, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x12, 0x4D, ++0x93, 0x70, 0x0A, 0x11, 0xB3, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x07, 0x7D, 0x01, 0x7F, ++0x0C, 0x12, 0x49, 0xDA, 0x11, 0xB7, 0x02, 0x7F, 0x38, 0x90, 0x01, 0x36, 0x74, 0x78, 0xF0, 0xA3, ++0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0x31, 0x3D, 0x7D, 0x02, 0x7F, 0x03, 0x31, 0x3D, 0x90, 0x06, ++0x0A, 0xE0, 0x44, 0x07, 0x12, 0x78, 0x0B, 0xE4, 0xFF, 0x12, 0x4D, 0x9A, 0xBF, 0x01, 0x11, 0x12, ++0x6F, 0xCA, 0x90, 0x81, 0x4F, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, 0x7F, 0x04, 0x02, 0x49, 0xDA, ++0xF1, 0xF2, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0x31, 0x3D, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x3D, 0x2F, ++0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x41, 0x40, 0x12, 0x7C, 0x94, 0xF1, 0x4E, 0x7D, 0x0C, ++0x7F, 0x01, 0x02, 0x4C, 0x09, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x3D, 0x12, 0x7F, 0x58, 0xFE, 0xF6, ++0x74, 0x30, 0x41, 0x40, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, 0xE0, 0xFD, 0xED, 0x78, ++0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x83, 0xB4, 0xEE, 0xF0, 0xA3, 0xEF, ++0x12, 0x4D, 0x93, 0x64, 0x01, 0x60, 0x02, 0x41, 0x36, 0x90, 0x81, 0x4C, 0xE0, 0x70, 0x02, 0x41, ++0x36, 0x51, 0x5C, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x81, 0x53, 0xF0, 0x90, ++0x06, 0xAA, 0xE0, 0x90, 0x81, 0x52, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x81, 0x52, 0xE0, ++0xFE, 0xFF, 0x80, 0x00, 0x90, 0x81, 0x53, 0xEF, 0xF0, 0x12, 0x79, 0xF1, 0xE4, 0x90, 0x81, 0x55, ++0x12, 0x78, 0x0B, 0x12, 0x7E, 0xE0, 0x12, 0x6F, 0xD5, 0x54, 0xEF, 0xF0, 0x51, 0x5C, 0x24, 0xFD, ++0x50, 0x02, 0x80, 0x03, 0x12, 0x6A, 0x20, 0x12, 0x4F, 0xEB, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x54, ++0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x22, 0x51, 0x4B, 0x6F, 0x70, 0x46, 0x90, 0x81, ++0x48, 0xE0, 0x44, 0x40, 0xF0, 0x12, 0x7F, 0x50, 0x51, 0x53, 0x7F, 0x03, 0x12, 0x78, 0xE1, 0xF1, ++0xC9, 0x31, 0x55, 0x90, 0x81, 0x53, 0xE0, 0x14, 0xF0, 0x80, 0x29, 0x12, 0x7F, 0x48, 0x64, 0x01, ++0x70, 0x22, 0x51, 0x4B, 0xFE, 0x6F, 0x60, 0x1C, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, ++0x13, 0x12, 0x4F, 0xEB, 0x54, 0x3F, 0x30, 0xE0, 0x0B, 0xEF, 0x54, 0xBF, 0x51, 0x53, 0x7F, 0x03, ++0x51, 0x37, 0x31, 0x33, 0xF1, 0xF2, 0x22, 0x74, 0x45, 0x12, 0x7F, 0x58, 0xFE, 0xF6, 0x74, 0x38, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x90, 0x81, 0x52, 0xE0, 0xFF, ++0xA3, 0xE0, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x22, 0x90, 0x81, 0x4A, 0xE0, ++0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x81, 0x47, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x81, 0x55, ++0xF0, 0xA3, 0xF0, 0x90, 0x81, 0x50, 0xF0, 0x90, 0x81, 0x48, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, ++0xF0, 0x31, 0x33, 0x7D, 0x10, 0x7F, 0x03, 0x80, 0xAE, 0x90, 0x83, 0xCD, 0x12, 0x42, 0x65, 0x51, ++0x65, 0x90, 0x81, 0x4C, 0xE0, 0xFF, 0x11, 0xBF, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x1D, 0x90, 0x83, ++0xCD, 0x12, 0x42, 0x5C, 0x91, 0x09, 0x54, 0x0F, 0xFF, 0xF1, 0x0B, 0xFD, 0x12, 0x79, 0xAD, 0x12, ++0x7B, 0xC8, 0x90, 0x84, 0x5A, 0x74, 0x01, 0xF0, 0x12, 0x77, 0x38, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, ++0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x12, 0x7F, 0x2F, 0x54, ++0x7F, 0xFC, 0x90, 0x84, 0x4B, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x4B, 0x12, 0x73, 0xF9, 0x7F, 0x7C, ++0xF1, 0x56, 0x12, 0x20, 0xDA, 0xCC, 0xC0, 0x00, 0xC0, 0xF1, 0x54, 0x12, 0x20, 0xDA, 0x00, 0xC0, ++0x00, 0x14, 0x12, 0x7F, 0x68, 0x90, 0x84, 0x34, 0x12, 0x20, 0xDA, 0x00, 0x03, 0x3E, 0x60, 0xE4, ++0xFD, 0xFF, 0x12, 0x74, 0x96, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, ++0x91, 0x09, 0xFF, 0xF5, 0x54, 0x12, 0x1F, 0xA4, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x06, 0xF1, 0x0B, ++0xF5, 0x55, 0x80, 0x02, 0x8F, 0x55, 0x85, 0x54, 0x53, 0xE5, 0x53, 0xD3, 0x95, 0x55, 0x50, 0x26, ++0xAB, 0x50, 0xAA, 0x51, 0xA9, 0x52, 0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFD, 0xAF, 0x53, 0x12, 0x60, ++0x8E, 0xAF, 0x53, 0x12, 0x4D, 0x9A, 0xEF, 0xAF, 0x53, 0x70, 0x05, 0x12, 0x62, 0x67, 0x80, 0x02, ++0xF1, 0xEF, 0x05, 0x53, 0x80, 0xD3, 0xE5, 0x54, 0x70, 0x0F, 0xFF, 0x12, 0x4D, 0x9A, 0xEF, 0x70, ++0x08, 0x11, 0xB3, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0xEF, 0x60, 0x42, 0x90, 0x04, 0xEC, ++0xE0, 0x54, 0xDD, 0xF0, 0x90, 0x83, 0x91, 0xE0, 0xFF, 0x60, 0x03, 0x12, 0x6D, 0xD5, 0x90, 0x01, ++0xC7, 0xE4, 0x12, 0x7D, 0xC5, 0xF1, 0xE7, 0x90, 0x06, 0x09, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x35, ++0x12, 0x4E, 0xE5, 0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x12, 0x5F, 0x0E, 0xF1, 0xF0, 0xF1, ++0x4C, 0x12, 0x7E, 0xA0, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0xFD, 0xE4, 0xFF, 0x21, 0x3D, 0x90, ++0x04, 0xEC, 0xE0, 0x44, 0x22, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x31, 0x59, 0x90, 0x06, 0x90, 0xE0, ++0x54, 0xF0, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x54, 0xFB, 0xF0, 0xF1, 0x19, 0xF1, 0xF1, 0x7E, 0x00, ++0x7F, 0x25, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xB0, 0x12, 0x44, 0x3E, 0x90, 0x06, 0x90, ++0xE0, 0x44, 0x20, 0xF0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFD, 0x7F, 0x8F, 0x12, ++0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x4E, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x1F, 0xBD, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x64, 0x53, 0x90, 0x81, 0xB0, 0x91, 0x99, 0x54, 0x04, ++0xFD, 0xEF, 0x54, 0xFB, 0x91, 0x91, 0xF1, 0xD7, 0x91, 0xA7, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, ++0x91, 0x91, 0xF1, 0xDF, 0x91, 0xA7, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x91, 0x91, 0x54, 0x80, ++0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0xF1, 0x0A, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x81, 0xB2, 0xE0, 0x54, ++0xFE, 0x91, 0x07, 0xFE, 0x54, 0x01, 0xFD, 0x90, 0x81, 0xB1, 0xE0, 0x54, 0xFE, 0x4D, 0xFD, 0xF0, ++0xEE, 0x54, 0x04, 0xFE, 0xED, 0x54, 0xFB, 0x4E, 0xF0, 0xEF, 0x54, 0x10, 0xFF, 0xA3, 0xE0, 0x54, ++0xEF, 0x4F, 0x12, 0x7D, 0xC5, 0xF1, 0xE7, 0x90, 0x81, 0xB0, 0xE0, 0xC3, 0x13, 0x54, 0x01, 0xFF, ++0x12, 0x7E, 0xD4, 0x90, 0x81, 0xB0, 0xE0, 0x54, 0x01, 0xFF, 0x71, 0x7A, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x4D, 0xFF, 0x90, 0x81, 0xB0, 0xF0, 0xEE, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, ++0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x12, 0x1F, 0xA4, 0xFE, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x83, 0xCA, 0xF1, 0xC3, 0x20, 0xE0, 0x04, 0xF1, 0x19, 0xA1, ++0x81, 0x12, 0x64, 0x4D, 0x90, 0x81, 0xB3, 0x91, 0x99, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0xF1, ++0x11, 0xF1, 0xD7, 0x91, 0xA7, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0xF1, 0x11, 0xF1, 0xDF, 0x91, ++0xA7, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0xF1, 0x11, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x91, ++0x07, 0x54, 0x80, 0xFF, 0x90, 0x81, 0xB4, 0xE0, 0x54, 0x7F, 0x4F, 0xF0, 0x12, 0x1F, 0xA4, 0x13, ++0x13, 0x54, 0x3F, 0x30, 0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x83, 0xCA, ++0x12, 0x42, 0x5C, 0x12, 0x1F, 0xA4, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x06, ++0x90, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x80, 0x07, 0xE0, 0xB4, 0x02, 0x06, 0x12, 0x5E, 0xE3, 0x20, ++0xE0, 0x31, 0x91, 0x09, 0x54, 0x7F, 0xFF, 0x90, 0x81, 0xB4, 0xE0, 0x54, 0x80, 0xF1, 0x09, 0x90, ++0x81, 0xB5, 0xF1, 0xD0, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x81, 0xB6, 0x12, 0x7F, 0x40, 0x54, 0xFE, ++0xFF, 0xEE, 0x54, 0x01, 0x4F, 0xF0, 0xD1, 0xFA, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, ++0x01, 0xB1, 0x86, 0x90, 0x80, 0x07, 0xE0, 0xB4, 0x01, 0x17, 0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, ++0xF0, 0x90, 0x83, 0x8D, 0x74, 0x05, 0xF0, 0x12, 0x7F, 0x26, 0x7A, 0x82, 0x79, 0xCC, 0x12, 0x44, ++0x3E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x66, ++0xED, 0xF0, 0x90, 0x84, 0x65, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x4B, 0xD1, 0x57, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x5F, 0xFD, 0x7F, 0x47, 0xD1, 0x51, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x46, 0xE0, 0x4F, 0xFD, 0x7F, 0x46, 0xF1, ++0x44, 0x60, 0x10, 0xD1, 0x54, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x45, 0xE0, ++0x4F, 0x80, 0x0F, 0xD1, 0x54, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x45, ++0xE0, 0x5F, 0xFD, 0x7F, 0x45, 0x80, 0x62, 0x90, 0x84, 0x65, 0xE0, 0x24, 0xF8, 0xF0, 0xE0, 0x24, ++0x04, 0xD1, 0x58, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, ++0xFD, 0x7F, 0x43, 0xD1, 0x51, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x43, 0xE0, ++0x4F, 0xFD, 0x7F, 0x43, 0xF1, 0x44, 0x60, 0x19, 0x90, 0x84, 0x65, 0xE0, 0x24, 0x04, 0xD1, 0x58, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x42, 0xE0, 0x4F, 0xFD, 0x7F, 0x42, 0x80, ++0x18, 0x90, 0x84, 0x65, 0xE0, 0x24, 0x04, 0xD1, 0x58, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, ++0xFF, 0x90, 0x00, 0x42, 0xE0, 0x5F, 0xFD, 0x7F, 0x42, 0x12, 0x32, 0x1E, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x12, 0x32, 0x1E, 0x90, 0x84, 0x65, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0xAD, ++0x07, 0x90, 0x81, 0xB5, 0xE0, 0x75, 0xF0, 0x40, 0xA4, 0xFF, 0x90, 0x84, 0x53, 0xE5, 0xF0, 0x12, ++0x6F, 0xE5, 0x90, 0x81, 0xB6, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x90, 0x84, 0x56, 0xF0, 0xED, 0x64, ++0x01, 0x70, 0x6B, 0x90, 0x84, 0x53, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x60, 0x0B, 0x90, 0x84, 0x53, ++0x74, 0xFF, 0x75, 0xF0, 0xD0, 0x12, 0x41, 0xF6, 0xD1, 0xFA, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, ++0x02, 0x7D, 0x01, 0xB1, 0x86, 0xD1, 0xFA, 0x54, 0x01, 0xFD, 0xB1, 0x86, 0x90, 0x81, 0xB6, 0xE0, ++0x30, 0xE0, 0x3B, 0xD1, 0xEF, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0xB1, 0x86, ++0xE4, 0x90, 0x84, 0x55, 0xF0, 0x90, 0x84, 0x56, 0xE0, 0xFF, 0x90, 0x84, 0x55, 0xE0, 0xC3, 0x9F, ++0x50, 0x1C, 0xD1, 0xEF, 0x54, 0x01, 0xFD, 0xB1, 0x86, 0xD1, 0xEF, 0x54, 0x07, 0x7D, 0x00, 0x20, ++0xE0, 0x02, 0x7D, 0x01, 0xB1, 0x86, 0x90, 0x84, 0x55, 0xE0, 0x04, 0xF0, 0x80, 0xD7, 0x22, 0x90, ++0x84, 0x53, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x32, 0xAA, 0x90, 0x81, 0xB4, 0xE0, 0x54, 0x7F, ++0xFF, 0x90, 0x81, 0xB3, 0xE0, 0xFE, 0xC4, 0x13, 0x22, 0x4F, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x1F, ++0xBD, 0x4D, 0xFF, 0x90, 0x81, 0xB3, 0xF0, 0xEE, 0x22, 0x71, 0xF4, 0x90, 0x83, 0xA0, 0xE0, 0xFF, ++0x12, 0x6E, 0x76, 0x90, 0x01, 0x3F, 0x74, 0x04, 0xF0, 0x90, 0x80, 0x07, 0xE0, 0xFF, 0xB4, 0x01, ++0x07, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xEF, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0x90, 0xFE, 0x10, 0xE0, ++0x54, 0xFB, 0xF0, 0x22, 0x12, 0x32, 0x1E, 0x90, 0x84, 0x66, 0xE0, 0x22, 0x51, 0xBC, 0xE4, 0xFD, ++0xFF, 0x02, 0x4B, 0xFA, 0x7F, 0x8C, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x85, 0xBB, 0x22, 0x90, ++0x83, 0xCA, 0xF1, 0xC3, 0xFF, 0x54, 0x7F, 0x90, 0x81, 0x4C, 0xF0, 0xEF, 0x12, 0x5E, 0xE7, 0xA3, ++0x91, 0x08, 0xFF, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0x81, 0x4A, 0xE0, 0x54, 0xF0, 0xF1, ++0xCF, 0x54, 0x01, 0x25, 0xE0, 0xFE, 0x90, 0x81, 0x47, 0xE0, 0x54, 0xFD, 0x4E, 0xF0, 0xEF, 0x54, ++0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x12, 0x4F, 0xF4, 0xF1, 0x09, 0x90, 0x81, 0x4B, 0x12, 0x64, 0xD3, ++0xFD, 0x7F, 0x02, 0x12, 0x4C, 0x09, 0x90, 0x83, 0xCA, 0x12, 0x42, 0x5C, 0x51, 0x89, 0x12, 0x6E, ++0x6C, 0xF0, 0x90, 0x81, 0x4C, 0x12, 0x7F, 0x1C, 0x90, 0x01, 0xBB, 0x12, 0x4F, 0xF3, 0x90, 0x01, ++0xBE, 0xF0, 0x22, 0x12, 0x42, 0x65, 0x02, 0x1F, 0xA4, 0x7D, 0x01, 0x7F, 0x02, 0x21, 0x59, 0x4E, ++0xF0, 0x90, 0x00, 0x03, 0x02, 0x1F, 0xBD, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0x22, 0x54, ++0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x22, 0x90, 0x81, 0x3B, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x22, ++0x22, 0x22, 0x90, 0x81, 0x48, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x20, 0xE7, ++0x09, 0xE0, 0x7F, 0x01, 0x20, 0xE6, 0x0C, 0x7F, 0x02, 0x22, 0x90, 0x00, 0xF7, 0xE0, 0x30, 0xE6, ++0x02, 0x7F, 0x03, 0x22, 0x12, 0x57, 0xFA, 0x90, 0x80, 0x07, 0xEF, 0xF0, 0x11, 0x35, 0x90, 0x01, ++0x64, 0x74, 0x01, 0xF0, 0x90, 0x00, 0x12, 0xE0, 0x54, 0xC7, 0x44, 0x20, 0xFD, 0x7F, 0x12, 0x12, ++0x32, 0x1E, 0x02, 0x2D, 0xA7, 0x11, 0x65, 0x11, 0x93, 0x12, 0x75, 0x2D, 0x12, 0x75, 0x4C, 0xE4, ++0xF5, 0x35, 0xF5, 0x36, 0xF5, 0x37, 0x75, 0x38, 0x80, 0xAD, 0x35, 0x7F, 0x50, 0x12, 0x32, 0x1E, ++0xAD, 0x36, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xAD, 0x37, 0x7F, 0x52, 0x12, 0x32, 0x1E, 0xAD, 0x38, ++0x7F, 0x53, 0x02, 0x32, 0x1E, 0x90, 0x01, 0x30, 0xE4, 0x11, 0x8B, 0x90, 0x01, 0x38, 0x11, 0x8B, ++0xFD, 0x7F, 0x50, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x51, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, ++0x52, 0x12, 0x32, 0x1E, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x32, 0x1E, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0x22, 0x90, 0x01, 0x34, 0x74, 0xFF, 0x11, 0x8B, 0x90, 0x01, 0x3C, 0x11, 0x8B, 0xFD, ++0x7F, 0x54, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x55, 0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x56, ++0x12, 0x32, 0x1E, 0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x32, 0x1E, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x83, 0xCE, 0x74, 0x08, 0xF0, 0xE4, 0xA3, 0x11, 0x8B, 0x90, 0x83, 0xD5, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0x12, 0x7E, 0x03, 0x12, 0x7D, 0xCE, 0xF1, 0xBE, 0x90, 0x02, 0x82, 0xE0, 0x90, ++0x83, 0xCD, 0xF0, 0x90, 0x81, 0xB0, 0xE0, 0x20, 0xE0, 0x02, 0x41, 0xDD, 0x90, 0x81, 0xB9, 0xE0, ++0x20, 0xE0, 0x07, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x19, 0x90, 0x80, 0x07, 0xE0, 0xB4, 0x01, ++0x0E, 0x90, 0xFD, 0x01, 0xE0, 0x20, 0xE6, 0x07, 0x90, 0xFD, 0x00, 0xE0, 0x44, 0x10, 0xF0, 0x7F, ++0x01, 0x51, 0xEA, 0xE4, 0x90, 0x83, 0xCC, 0xF0, 0x90, 0x83, 0xCD, 0xE0, 0xFF, 0x90, 0x83, 0xCC, ++0xE0, 0xC3, 0x9F, 0x40, 0x02, 0x41, 0xDD, 0xF1, 0xCE, 0xFD, 0xEC, 0xFF, 0x90, 0xFD, 0x11, 0xF0, ++0xAE, 0x05, 0xAA, 0x06, 0x90, 0x83, 0xD0, 0xEF, 0xF0, 0x74, 0x02, 0x2A, 0x12, 0x7E, 0x27, 0xFF, ++0x74, 0x03, 0x2A, 0x12, 0x7D, 0xFA, 0x54, 0x03, 0xFE, 0xEF, 0x24, 0x18, 0x2E, 0x90, 0x83, 0xD5, ++0xF0, 0xE0, 0xFF, 0x2A, 0x90, 0x83, 0xC8, 0xF0, 0x7E, 0x00, 0xF1, 0xCE, 0x2F, 0xFF, 0xEE, 0x3C, ++0x90, 0x83, 0xC9, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x83, 0xC8, 0xE0, 0xFD, 0x24, 0x00, 0xD1, 0xA4, ++0xE0, 0xFE, 0x54, 0xFC, 0x90, 0x83, 0xCB, 0xF0, 0xAF, 0x06, 0xF1, 0xDF, 0xFD, 0x90, 0x83, 0xC8, ++0xE0, 0xF1, 0xC6, 0x12, 0x67, 0x6B, 0x90, 0x83, 0xCF, 0xEF, 0xF0, 0x74, 0x01, 0x2A, 0xF1, 0xE2, ++0xFE, 0x74, 0x00, 0x2A, 0xD1, 0xA4, 0x12, 0x7D, 0xCE, 0x54, 0x3F, 0xFE, 0x90, 0x83, 0xD1, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0x83, 0xD5, 0xE0, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0x12, 0x7D, 0xD7, 0x74, ++0x0F, 0x2A, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0xFD, 0x90, 0x83, 0xC6, 0x12, 0x7E, ++0x18, 0x90, 0x83, 0xC6, 0xE0, 0xFA, 0xA3, 0xE0, 0xD3, 0x9F, 0xEA, 0x9E, 0x40, 0x1D, 0x90, 0x83, ++0xC6, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x81, 0x3B, 0xE0, 0xFA, 0xA3, 0xE0, 0x24, 0x01, 0xFB, ++0xE4, 0x3A, 0xFA, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xF1, 0xBE, 0xED, 0x30, 0xE7, 0x06, 0x90, ++0x01, 0xC7, 0x74, 0x21, 0xF0, 0xED, 0x30, 0xE6, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x22, 0xF0, 0xED, ++0x30, 0xE5, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x23, 0xF0, 0x90, 0x83, 0xCB, 0xE0, 0x24, 0x40, 0x60, ++0x04, 0x24, 0x20, 0x70, 0x1B, 0x90, 0x81, 0xB3, 0xE0, 0xFF, 0xD1, 0xE7, 0x30, 0xE0, 0x5F, 0x90, ++0x83, 0xC8, 0xD1, 0x6E, 0x60, 0x58, 0x90, 0x83, 0xCB, 0xE0, 0xFF, 0x12, 0x7E, 0x78, 0x80, 0x4E, ++0x90, 0x83, 0xC8, 0xD1, 0x6E, 0x60, 0x1B, 0xD1, 0xEE, 0xFD, 0x90, 0x83, 0xCE, 0xE0, 0xFB, 0x90, ++0x83, 0xD0, 0xE0, 0x90, 0x83, 0xDC, 0xF0, 0x71, 0x3D, 0xEF, 0x60, 0x06, 0x90, 0x83, 0xD7, 0x74, ++0x01, 0xF0, 0x90, 0x81, 0xB0, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0xD1, 0xEE, 0xFD, 0x71, 0xE2, ++0xEF, 0x60, 0x06, 0x90, 0x83, 0xD7, 0x74, 0x01, 0xF0, 0x90, 0x81, 0xB0, 0xE0, 0xFF, 0xD1, 0xE7, ++0x30, 0xE0, 0x0B, 0x90, 0x83, 0xD7, 0xE0, 0x70, 0x05, 0xD1, 0xEE, 0xFD, 0xB1, 0xA5, 0x90, 0x81, ++0xB9, 0xE0, 0x20, 0xE0, 0x07, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x04, 0x7F, 0x01, 0x51, 0xEA, ++0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x02, 0x71, 0x35, 0x12, 0x7E, 0x4D, 0xEF, 0x64, 0x01, 0x70, ++0x3C, 0x12, 0x7E, 0x37, 0x90, 0x83, 0xD6, 0xEF, 0xF0, 0x64, 0x01, 0x60, 0x22, 0x71, 0x35, 0x90, ++0x83, 0xD6, 0xE0, 0xFF, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x42, 0xF0, 0x80, 0x0A, 0xEF, ++0xB4, 0x04, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x43, 0xF0, 0x7F, 0x01, 0x51, 0xEA, 0x80, 0x0E, 0x90, ++0x83, 0xC6, 0x12, 0x7C, 0xFE, 0x90, 0x83, 0xCC, 0xE0, 0x04, 0xF0, 0x21, 0x18, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x01, 0xC7, 0x74, 0x10, 0xF0, 0x7F, 0x01, 0x90, 0x84, 0x70, 0xEF, 0xF0, 0x90, ++0x80, 0x07, 0xE0, 0x64, 0x02, 0x70, 0x1D, 0x90, 0x84, 0x70, 0xE0, 0xFD, 0x64, 0x01, 0x70, 0x30, ++0x71, 0x35, 0xD1, 0xE3, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80, 0x20, ++0xAF, 0x05, 0x80, 0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x7F, 0x64, 0x7E, 0x00, 0x12, 0x32, ++0xAA, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x84, 0x70, 0xE0, 0xFF, 0x12, 0x56, 0x5F, ++0xF1, 0x5A, 0xF0, 0x22, 0xF0, 0x90, 0x81, 0xB9, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x83, 0xDA, ++0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0xD1, 0xBF, 0xF0, 0xE4, 0x90, 0x83, 0xDD, 0xF0, 0x90, 0x83, 0xDC, ++0xF0, 0xFD, 0x71, 0xB6, 0xEF, 0x54, 0x0C, 0x64, 0x08, 0x70, 0x47, 0xD1, 0xD9, 0xE0, 0xD1, 0xAC, ++0x64, 0x88, 0x70, 0x3E, 0xD1, 0xD9, 0xE0, 0x24, 0x07, 0xFD, 0x71, 0xB6, 0xEF, 0x64, 0x8E, 0x70, ++0x31, 0x90, 0x83, 0xDD, 0x04, 0xF0, 0xD1, 0xFB, 0x04, 0xFD, 0x71, 0xB6, 0xEF, 0x64, 0x03, 0x70, ++0x21, 0xD1, 0xFB, 0xD1, 0xAC, 0x30, 0xE3, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x01, 0x80, 0x11, 0x90, ++0x81, 0xB3, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x02, ++0x71, 0x34, 0x90, 0x83, 0xDD, 0xE0, 0xFF, 0x22, 0xCD, 0x34, 0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, ++0xFF, 0xEE, 0x3C, 0xFE, 0xE4, 0xFD, 0xAB, 0x07, 0xAA, 0x06, 0xED, 0x2B, 0xFB, 0xE4, 0x3A, 0xFA, ++0xC3, 0x90, 0x81, 0x3C, 0xE0, 0x9B, 0x90, 0x81, 0x3B, 0xE0, 0x9A, 0x50, 0x0B, 0xA3, 0x12, 0x7E, ++0x0C, 0xC3, 0xEB, 0x9F, 0xFB, 0xEA, 0x9E, 0xFA, 0xF1, 0xEB, 0x74, 0x00, 0x2F, 0xD1, 0xA4, 0xE0, ++0xFF, 0x22, 0xD1, 0xBF, 0xF0, 0xA3, 0xED, 0xF0, 0x78, 0xE1, 0x7C, 0x83, 0x7D, 0x01, 0x7B, 0xFF, ++0x7A, 0x40, 0x79, 0xC0, 0xF1, 0xB7, 0x78, 0xE7, 0x7C, 0x83, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, ++0x79, 0xC6, 0xD1, 0x67, 0x78, 0xEB, 0x7C, 0x83, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0xCA, ++0xD1, 0x67, 0xE4, 0x90, 0x83, 0xF0, 0xF0, 0xB1, 0x93, 0xCF, 0x24, 0x06, 0xD1, 0x5D, 0x64, 0x08, ++0x60, 0x02, 0xA1, 0x11, 0xB1, 0x93, 0xCF, 0x24, 0x07, 0xD1, 0x5D, 0x64, 0x06, 0x60, 0x02, 0xA1, ++0x11, 0x90, 0x83, 0xF0, 0x04, 0xF0, 0xE4, 0x90, 0x83, 0xEF, 0xF0, 0xD1, 0xD0, 0x50, 0x1D, 0x90, ++0x83, 0xD9, 0xE0, 0x24, 0x0A, 0xFD, 0x90, 0x83, 0xD8, 0xE0, 0x71, 0xA9, 0x90, 0x83, 0xEF, 0xE0, ++0x24, 0xDB, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xD1, 0x53, 0xF0, 0x80, 0xDF, 0x78, 0xDB, 0x7C, 0x83, ++0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xC0, 0xF1, 0xD6, 0x60, 0x02, 0xA1, 0x11, 0x90, 0x83, ++0xEF, 0xF0, 0xD1, 0xC7, 0x50, 0x19, 0xD1, 0xB3, 0xB1, 0x9E, 0xCD, 0x24, 0x20, 0x71, 0xA8, 0x90, ++0x83, 0xEF, 0xE0, 0x24, 0xEB, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xD1, 0x53, 0xF0, 0x80, 0xE3, 0x78, ++0xEB, 0x7C, 0x83, 0xF1, 0xF3, 0x70, 0x71, 0x90, 0x06, 0x30, 0xE0, 0x44, 0x01, 0x54, 0xDF, 0xF0, ++0x90, 0x81, 0xB2, 0xE0, 0x30, 0xE0, 0x09, 0x90, 0x01, 0xC7, 0x74, 0x09, 0x71, 0x34, 0x80, 0x61, ++0xE4, 0x90, 0x83, 0xEF, 0xF0, 0xD1, 0xD0, 0x50, 0x19, 0xD1, 0xB3, 0xB1, 0x9E, 0xCD, 0x24, 0x10, ++0x71, 0xA8, 0x90, 0x83, 0xEF, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xD1, 0x53, 0xF0, ++0x80, 0xE3, 0xE4, 0x90, 0x83, 0xEF, 0xF0, 0xD1, 0xC7, 0x50, 0x19, 0xD1, 0xB3, 0xB1, 0x9E, 0xCD, ++0x24, 0x16, 0x71, 0xA8, 0x90, 0x83, 0xEF, 0xE0, 0x24, 0xE7, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xD1, ++0x53, 0xF0, 0x80, 0xE3, 0x7B, 0x01, 0x7A, 0x83, 0x79, 0xE1, 0x12, 0x7E, 0xFA, 0xA3, 0xF0, 0x7A, ++0x83, 0x79, 0xE7, 0x12, 0x6B, 0xFB, 0x80, 0x09, 0x90, 0x06, 0x30, 0xE0, 0x44, 0x21, 0x54, 0xEF, ++0xF0, 0x90, 0x83, 0xF0, 0xE0, 0xFF, 0x22, 0x90, 0x83, 0xE8, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7D, ++0x09, 0x71, 0xB6, 0xEF, 0x64, 0x06, 0x70, 0x24, 0xD1, 0x4A, 0x7D, 0x14, 0x71, 0xB6, 0xEF, 0x70, ++0x1B, 0xD1, 0x4A, 0x7D, 0x15, 0x71, 0xB6, 0xEF, 0x64, 0x50, 0x70, 0x10, 0xD1, 0x4A, 0x7D, 0x21, ++0x71, 0xB6, 0xEF, 0x20, 0xE0, 0x03, 0x30, 0xE2, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x81, 0xB1, 0xE0, ++0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x39, 0xD1, 0x4A, 0x7D, 0x09, 0x71, 0xB6, 0xEF, 0x64, 0x11, ++0x70, 0x2E, 0x90, 0x83, 0xE9, 0xE0, 0x24, 0x14, 0xFF, 0x90, 0x83, 0xE8, 0xE0, 0x34, 0x00, 0xFE, ++0x90, 0x83, 0xEA, 0xF0, 0xA3, 0xEF, 0xF0, 0x7D, 0x02, 0x71, 0xB6, 0xEF, 0x70, 0x12, 0x90, 0x83, ++0xEA, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7D, 0x03, 0x71, 0xB6, 0xBF, 0x89, 0x03, 0x7F, 0x01, 0x22, ++0x7F, 0x00, 0x22, 0x90, 0x83, 0xDA, 0xE0, 0xFF, 0x90, 0x83, 0xD9, 0xE0, 0x2F, 0xFF, 0x90, 0x83, ++0xD8, 0xE0, 0x34, 0x00, 0x22, 0xD1, 0xBF, 0xF0, 0xA3, 0xED, 0xF0, 0x78, 0xDB, 0x7C, 0x83, 0x7D, ++0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0xD4, 0xF1, 0xB7, 0x78, 0xE2, 0x7C, 0x83, 0x7D, 0x01, 0x7B, ++0xFF, 0x7A, 0x40, 0x79, 0xDA, 0xD1, 0x67, 0x90, 0x83, 0xD8, 0xA3, 0xD1, 0x6E, 0x60, 0x7A, 0xB1, ++0x93, 0xFE, 0x90, 0x83, 0xE6, 0xF0, 0xA3, 0xEF, 0xF0, 0x24, 0x06, 0xFF, 0xE4, 0x3E, 0xD1, 0x60, ++0x64, 0x08, 0x70, 0x65, 0x90, 0x83, 0xE7, 0xE0, 0x24, 0x07, 0xFF, 0x90, 0x83, 0xE6, 0xE0, 0xD1, ++0x5E, 0x70, 0x56, 0x90, 0x83, 0xE1, 0xF0, 0x90, 0x83, 0xE1, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, ++0x24, 0x90, 0x83, 0xE7, 0xE0, 0x24, 0x18, 0xFD, 0x90, 0x83, 0xE6, 0xE0, 0x71, 0xA9, 0x90, 0x83, ++0xE1, 0xE0, 0x24, 0xE2, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x83, 0xE1, ++0xE0, 0x04, 0xF0, 0x80, 0xD2, 0x78, 0xE2, 0x7C, 0x83, 0xF1, 0xF3, 0x70, 0x1C, 0x90, 0x83, 0xE7, ++0xE0, 0x24, 0x08, 0xFF, 0x90, 0x83, 0xE6, 0xE0, 0x34, 0x00, 0xFE, 0xB1, 0x17, 0xEF, 0x64, 0x01, ++0x60, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x22, 0x71, 0x34, 0x22, 0x90, 0x83, 0xE8, 0xE0, 0xFE, 0xA3, ++0xE0, 0xFF, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x83, 0xEF, 0xE0, 0x04, 0x22, 0xCF, 0x34, 0x00, ++0xFE, 0xE4, 0xFD, 0x71, 0xB6, 0xEF, 0x22, 0x7E, 0x00, 0x7F, 0x04, 0x02, 0x41, 0xD0, 0xE0, 0xFF, ++0xD1, 0x74, 0xEF, 0x22, 0xE4, 0xFE, 0xEF, 0x2E, 0xF1, 0xC6, 0xF5, 0x83, 0xE0, 0xFD, 0x74, 0xE8, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x83, 0xF5, 0x83, 0xED, 0xF0, 0x0E, 0xEE, 0xB4, 0x06, 0xE7, 0x78, ++0xBA, 0x7C, 0x81, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x83, 0x79, 0xE8, 0xF1, 0xD6, 0x7F, 0x00, 0x70, ++0x02, 0x7F, 0x01, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0x22, 0x24, 0x06, 0xFD, 0x71, ++0xB6, 0xEF, 0x22, 0x90, 0x83, 0xDA, 0xE0, 0xFD, 0x90, 0x83, 0xD9, 0xE0, 0x2D, 0xFD, 0x22, 0x90, ++0x83, 0xD8, 0xEE, 0xF0, 0xA3, 0xEF, 0x22, 0x90, 0x83, 0xEF, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x22, ++0x90, 0x83, 0xEF, 0xE0, 0xFF, 0xC3, 0x94, 0x06, 0x22, 0x90, 0x83, 0xD8, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0xA3, 0x22, 0x90, 0x81, 0xB4, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0x90, 0x83, ++0xC9, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x83, 0xCF, 0xE0, 0x22, 0x90, 0x83, 0xD8, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x90, 0x83, 0xDB, 0xE0, 0xFD, 0x90, 0x83, 0xDA, 0xE0, 0x2D, 0x22, 0x12, 0x7E, ++0x37, 0xAD, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x0E, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0xED, 0x64, 0x01, ++0x60, 0x1C, 0x71, 0x35, 0xED, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x40, 0xF0, 0x80, 0x0A, ++0xED, 0xB4, 0x04, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x41, 0xF0, 0x7F, 0x01, 0x41, 0xEA, 0x12, 0x7D, ++0x11, 0x90, 0x02, 0x87, 0xE0, 0x70, 0xF7, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x02, 0xF0, 0x74, 0x0E, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0x22, 0x90, 0x83, 0xA6, 0xE0, 0x54, 0xFE, ++0x22, 0x90, 0x83, 0xA6, 0xE0, 0xFD, 0x30, 0xE0, 0x4D, 0x90, 0x83, 0xAB, 0xE0, 0xFC, 0x60, 0x46, ++0x12, 0x72, 0x7D, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x04, 0xE0, ++0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x0B, 0xE4, 0x90, 0x83, 0xAB, 0xF0, 0x90, 0x83, 0xAD, 0x04, 0xF0, ++0x22, 0x90, 0x83, 0xA8, 0xE0, 0xD3, 0x9C, 0x50, 0x14, 0xED, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, ++0xE0, 0x05, 0x12, 0x62, 0x60, 0x80, 0x02, 0x51, 0xE2, 0xF1, 0x5A, 0xF0, 0x22, 0x12, 0x4E, 0x09, ++0x90, 0x83, 0xAB, 0xE0, 0x04, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x06, 0x02, 0x41, 0xD0, 0x90, 0x83, ++0xC6, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x24, 0x04, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0x22, 0x90, 0x83, ++0xC6, 0xE0, 0xFC, 0xA3, 0xE0, 0x22, 0x7E, 0x00, 0x7F, 0x06, 0x12, 0x44, 0x1A, 0xEF, 0x22, 0x74, ++0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, 0xEA, 0x90, 0xFD, 0x11, 0xF0, ++0xAF, 0x03, 0x22, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xDB, 0x7E, 0x00, 0x7F, 0x04, 0x12, ++0x44, 0x1A, 0xEF, 0x22, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x84, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44, ++0x80, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x75, ++0x6B, 0x12, 0x32, 0x77, 0x12, 0x75, 0x78, 0x12, 0x75, 0xE4, 0x7F, 0x01, 0x12, 0x45, 0x7F, 0x90, ++0x83, 0xA1, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x45, 0x7F, 0x90, 0x83, 0xA1, 0xE0, 0x04, 0xF0, 0x12, ++0x58, 0x14, 0x11, 0x5F, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x32, 0x1E, ++0x75, 0x20, 0xFF, 0x11, 0x04, 0x31, 0x83, 0x12, 0x75, 0xEE, 0xE4, 0xFF, 0x02, 0x46, 0x08, 0x11, ++0x8B, 0x12, 0x75, 0x1F, 0x51, 0x68, 0x12, 0x53, 0xDE, 0x12, 0x7C, 0xA8, 0x31, 0x2B, 0x90, 0x83, ++0xAE, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4, 0x90, ++0x83, 0xB0, 0xF0, 0x90, 0x83, 0xAE, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0x12, 0x7F, ++0x06, 0xED, 0x70, 0x12, 0x11, 0xCA, 0xC0, 0x83, 0xC0, 0x82, 0x11, 0xC2, 0x80, 0x02, 0xC3, 0x33, ++0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x0F, 0x11, 0xCA, 0xC0, 0x83, 0xC0, 0x82, 0x11, 0xC2, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x11, 0xD5, 0x90, 0x81, 0x45, 0xEF, ++0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x74, 0x3D, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0x81, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7D, 0x08, 0xED, 0x14, ++0xF9, 0x24, 0x3D, 0x11, 0xCD, 0xE0, 0x60, 0x3A, 0x7C, 0x08, 0xEC, 0x14, 0x90, 0x84, 0x6A, 0xF0, ++0x74, 0x3D, 0x29, 0x11, 0xCD, 0xE0, 0xFB, 0x7A, 0x00, 0x90, 0x84, 0x6A, 0x12, 0x72, 0x7B, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x60, ++0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0x84, 0x6A, 0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, ++0xDC, 0xC8, 0xDD, 0xBA, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x7F, 0x26, 0x7A, 0x83, ++0x79, 0xA6, 0x12, 0x44, 0x3E, 0x90, 0x83, 0xA7, 0x74, 0x08, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, ++0x90, 0x83, 0xCA, 0x12, 0x42, 0x65, 0x31, 0x2B, 0x91, 0x4D, 0x12, 0x5F, 0x5A, 0x4E, 0xF0, 0xEF, ++0xC3, 0x13, 0x30, 0xE0, 0x2D, 0x12, 0x54, 0x09, 0x90, 0x83, 0xA7, 0x12, 0x57, 0x0A, 0x90, 0x83, ++0xA8, 0xF0, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x04, 0xFE, 0x90, 0x83, 0xA6, 0xE0, 0x54, 0xFB, 0x12, ++0x57, 0xCF, 0x90, 0x83, 0xA9, 0xF0, 0xEF, 0x54, 0x08, 0xFF, 0x90, 0x83, 0xA6, 0xE0, 0x54, 0xF7, ++0x4F, 0xF0, 0x22, 0xE4, 0x90, 0x83, 0xBF, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x98, 0xE0, 0x7F, 0x00, ++0x30, 0xE4, 0x02, 0x7F, 0x01, 0xEF, 0x64, 0x01, 0x60, 0x3A, 0xC3, 0x90, 0x83, 0xC0, 0xE0, 0x94, ++0x88, 0x90, 0x83, 0xBF, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, ++0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1C, 0x90, 0x83, 0xBF, 0x12, 0x7E, 0xEC, 0xD3, 0x90, ++0x83, 0xC0, 0xE0, 0x94, 0x32, 0x90, 0x83, 0xBF, 0xE0, 0x94, 0x00, 0x40, 0xBD, 0x90, 0x01, 0xC6, ++0xE0, 0x30, 0xE3, 0xB6, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x90, 0x83, 0xA6, 0xE0, 0x30, ++0xE0, 0x7D, 0x90, 0x83, 0xAA, 0xE0, 0x04, 0xF0, 0x90, 0x83, 0xAD, 0xE0, 0x64, 0x01, 0x70, 0x32, ++0x90, 0x83, 0xA6, 0xF1, 0xCE, 0x30, 0xE0, 0x2A, 0x90, 0x83, 0xAC, 0xE0, 0x70, 0x24, 0x90, 0x83, ++0xA9, 0xE0, 0xFE, 0xA3, 0xE0, 0xC3, 0x9E, 0x40, 0x19, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, ++0xE0, 0x08, 0x51, 0x60, 0x12, 0x5F, 0x5A, 0xF0, 0x80, 0x08, 0x12, 0x5A, 0xE2, 0x12, 0x5F, 0x5A, ++0xF0, 0x22, 0x90, 0x83, 0xAA, 0xE0, 0xFF, 0x90, 0x83, 0xA7, 0xE0, 0xD3, 0x9F, 0x50, 0x30, 0x90, ++0x06, 0x92, 0xE0, 0x20, 0xE2, 0x1A, 0x90, 0x83, 0xAC, 0xE0, 0x70, 0x14, 0x7D, 0x08, 0xFF, 0x12, ++0x4E, 0x0D, 0x90, 0x83, 0xAB, 0xE0, 0x04, 0xF0, 0x90, 0x83, 0xA5, 0xE0, 0x04, 0xF0, 0x80, 0x06, ++0x90, 0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0x83, 0xAA, 0xF0, 0x90, 0x83, 0xAC, 0xF0, 0x22, ++0xE4, 0xFD, 0xFF, 0x11, 0x8E, 0xE4, 0xFF, 0x22, 0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B, 0x01, ++0x7A, 0x81, 0x79, 0x47, 0x12, 0x44, 0x3E, 0x90, 0x81, 0x4B, 0x74, 0x02, 0xF0, 0x90, 0x81, 0x52, ++0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x90, 0x81, 0x58, 0xE4, 0xF0, 0xA3, 0x74, 0x02, ++0xF0, 0x71, 0x0A, 0x12, 0x79, 0xDA, 0xE4, 0xFD, 0xFF, 0x12, 0x4C, 0x09, 0x7D, 0x0C, 0x7F, 0x02, ++0x12, 0x4C, 0x09, 0x12, 0x4C, 0x05, 0x90, 0x80, 0x07, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x81, ++0x57, 0x74, 0x99, 0xF0, 0x80, 0x29, 0xEF, 0xB4, 0x03, 0x08, 0x90, 0x81, 0x57, 0x74, 0x90, 0xF0, ++0x80, 0x1D, 0x90, 0x81, 0x57, 0x74, 0x40, 0xF0, 0x90, 0x00, 0x2C, 0xE0, 0x54, 0x0F, 0xFF, 0xBF, ++0x05, 0x08, 0x90, 0x81, 0x69, 0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x81, 0x69, 0xF0, 0x91, ++0x80, 0x71, 0x0A, 0x7F, 0x01, 0x71, 0x19, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x7E, 0x00, 0xFF, ++0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xAD, 0x12, 0x44, 0x3E, 0x12, 0x7C, 0x94, 0x12, 0x7F, ++0x38, 0x12, 0x57, 0x4E, 0xE4, 0x90, 0x81, 0xAF, 0xF0, 0x22, 0x90, 0x81, 0x69, 0xE0, 0x24, 0x04, ++0x90, 0x81, 0x64, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0xE4, 0xFE, 0x74, 0x6A, 0x2E, 0x12, 0x7B, ++0xC0, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF3, 0xE4, 0x90, 0x81, 0x63, 0xF0, 0x90, 0x81, 0x62, ++0xF0, 0x90, 0x81, 0x66, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0x2D, 0xF0, 0xE4, 0xA3, 0xF0, ++0x22, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x65, 0x90, 0x83, 0xC6, 0xEF, 0xF0, 0x12, 0x42, 0x6E, 0x63, ++0x83, 0x00, 0x63, 0x8B, 0x01, 0x63, 0x94, 0x02, 0x63, 0x9D, 0x03, 0x63, 0xA5, 0x04, 0x63, 0xAD, ++0x14, 0x63, 0xB6, 0x20, 0x63, 0xBF, 0x21, 0x63, 0xC7, 0x23, 0x63, 0xCF, 0x25, 0x63, 0xE0, 0x80, ++0x63, 0xD7, 0x81, 0x63, 0xE9, 0x82, 0x63, 0xF2, 0x83, 0x63, 0xFA, 0x84, 0x64, 0x02, 0x88, 0x00, ++0x00, 0x64, 0x0A, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x81, 0x96, 0x90, 0x83, 0xC7, 0x12, 0x42, ++0x5C, 0x02, 0x53, 0x1A, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x02, 0x74, 0xD3, 0x90, 0x83, 0xC7, ++0x12, 0x42, 0x5C, 0x81, 0x2D, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x21, 0x40, 0x90, 0x83, 0xC7, ++0x12, 0x42, 0x5C, 0x02, 0x75, 0x10, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x02, 0x57, 0x5F, 0x90, ++0x83, 0xC7, 0x12, 0x42, 0x5C, 0x81, 0x5B, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0xE1, 0xDC, 0x90, ++0x83, 0xC7, 0x12, 0x42, 0x5C, 0xE1, 0xE4, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x02, 0x54, 0x0F, ++0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x02, 0x54, 0xAE, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x02, ++0x7E, 0x8A, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0xC1, 0x50, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, ++0xC1, 0x94, 0x90, 0x83, 0xC7, 0x12, 0x42, 0x5C, 0x80, 0x10, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, ++0xF0, 0x90, 0x83, 0xC6, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0xD1, 0xD8, 0x2E, 0x90, 0x83, 0x9F, ++0x12, 0x54, 0x08, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x83, 0xA0, 0xF0, 0x22, 0x91, 0x53, 0x90, ++0x83, 0xA2, 0x12, 0x7F, 0x40, 0x54, 0x04, 0xFF, 0xEE, 0x54, 0xFB, 0x4F, 0xF0, 0x12, 0x1F, 0xA4, ++0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x54, 0x09, 0x90, 0x83, 0xA3, 0xF0, 0x22, 0x90, 0x83, 0xCA, ++0x12, 0x42, 0x5C, 0x12, 0x1F, 0xA4, 0xFF, 0x54, 0x01, 0xFE, 0x22, 0x12, 0x57, 0x0B, 0xFF, 0x30, ++0xE0, 0x1E, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xA9, 0x12, 0x54, 0x08, 0x90, 0x81, 0xAA, 0xF0, 0xEF, ++0x54, 0xFE, 0xFF, 0xA3, 0xE0, 0x54, 0x01, 0x4F, 0x12, 0x57, 0xD0, 0x90, 0x81, 0xAC, 0xF0, 0x22, ++0x90, 0x81, 0xA9, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, ++0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x50, 0x12, 0x1F, 0xA4, 0x25, ++0x50, 0x90, 0x80, 0x4A, 0x12, 0x54, 0x08, 0x25, 0x50, 0x90, 0x80, 0x4B, 0x12, 0x57, 0x0A, 0x25, ++0x50, 0x90, 0x80, 0x4C, 0x12, 0x57, 0xD0, 0x25, 0x50, 0x90, 0x80, 0x4D, 0x91, 0xD3, 0x25, 0x50, ++0x90, 0x80, 0x4E, 0xD1, 0xD1, 0x25, 0x50, 0x90, 0x80, 0x4F, 0xD1, 0x8D, 0x25, 0x50, 0x90, 0x80, ++0x50, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x1F, 0xBD, 0x90, 0x84, 0x12, 0x12, 0x57, 0xC3, ++0x90, 0x84, 0x17, 0x12, 0x54, 0x08, 0x90, 0x84, 0x18, 0x91, 0xD3, 0x90, 0x84, 0x19, 0xD1, 0xD1, ++0x90, 0x84, 0x1A, 0xD1, 0x8D, 0x90, 0x84, 0x1B, 0xF0, 0x90, 0x00, 0x07, 0x12, 0x1F, 0xBD, 0x90, ++0x84, 0x1C, 0x12, 0x57, 0xD0, 0x90, 0x84, 0x1F, 0xF0, 0xED, 0x70, 0x19, 0xFF, 0xB1, 0xA6, 0xE0, ++0xB4, 0xFF, 0x06, 0xB1, 0xA6, 0xE4, 0xF0, 0x80, 0x07, 0xB1, 0xA6, 0xE0, 0x04, 0xF0, 0x80, 0x05, ++0x0F, 0xEF, 0xB4, 0x06, 0xE8, 0x90, 0x84, 0x16, 0xE0, 0xFF, 0xB4, 0x04, 0x18, 0xA3, 0xE0, 0xFE, ++0xB1, 0xA0, 0xEE, 0xD1, 0x3C, 0xFE, 0xB1, 0xA0, 0x90, 0x00, 0x01, 0xEE, 0x12, 0x1F, 0xFC, 0x90, ++0x00, 0x02, 0xE4, 0x80, 0x1B, 0xEF, 0xB4, 0x02, 0x1A, 0x90, 0x84, 0x18, 0xB1, 0x9E, 0xEF, 0xD1, ++0x3C, 0x44, 0x20, 0x54, 0x7F, 0xB1, 0x9F, 0xF1, 0xD5, 0x90, 0x84, 0x17, 0xE0, 0x90, 0x00, 0x02, ++0x12, 0x1F, 0xFC, 0xB1, 0xA0, 0xE9, 0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x1F, 0xA4, 0x44, ++0x20, 0x12, 0x1F, 0xEA, 0x90, 0x84, 0x19, 0xB1, 0x9E, 0x90, 0x00, 0x04, 0xEF, 0x12, 0x1F, 0xFC, ++0x90, 0x84, 0x1A, 0xE0, 0x90, 0x00, 0x05, 0x12, 0x1F, 0xFC, 0x90, 0x84, 0x1B, 0xE0, 0x90, 0x00, ++0x06, 0x12, 0x1F, 0xFC, 0x90, 0x84, 0x1C, 0xE0, 0x90, 0x00, 0x07, 0x02, 0x1F, 0xFC, 0xE0, 0xFF, ++0x90, 0x84, 0x12, 0x02, 0x42, 0x5C, 0x74, 0x17, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5, 0x83, ++0x22, 0x90, 0x84, 0x3B, 0xED, 0xF0, 0x90, 0x84, 0x38, 0x12, 0x42, 0x65, 0xE4, 0x90, 0x84, 0x3C, ++0xF0, 0xA3, 0xF0, 0x12, 0x1F, 0xA4, 0xFF, 0x12, 0x54, 0x09, 0xFD, 0x91, 0xD4, 0xFB, 0xF1, 0x6F, ++0x90, 0x84, 0x3C, 0xEF, 0xF0, 0x90, 0x84, 0x38, 0x12, 0x42, 0x5C, 0x91, 0xD4, 0xFF, 0xF1, 0x8F, ++0x90, 0x84, 0x3D, 0xEF, 0xF0, 0x90, 0x83, 0x8E, 0xE0, 0x24, 0xFE, 0x60, 0x14, 0x24, 0xFE, 0x60, ++0x10, 0x14, 0x60, 0x07, 0x14, 0x60, 0x04, 0x24, 0x05, 0x70, 0x40, 0xD1, 0x44, 0xD1, 0xE5, 0x80, ++0x0C, 0xD1, 0x44, 0x90, 0x83, 0x8E, 0xE0, 0x90, 0x84, 0x16, 0xF0, 0x91, 0xDA, 0x90, 0x84, 0x3D, ++0xE0, 0xFF, 0x90, 0x84, 0x38, 0x12, 0x42, 0x5C, 0x90, 0x84, 0x3C, 0xE0, 0x7C, 0x00, 0x29, 0xF9, ++0xEC, 0x3A, 0xFA, 0xC3, 0xE9, 0x9F, 0xF9, 0xEA, 0x94, 0x00, 0xFA, 0x75, 0x13, 0x01, 0x75, 0x14, ++0x83, 0x75, 0x15, 0x5D, 0xA3, 0xE0, 0xF5, 0x16, 0x12, 0x2B, 0xED, 0x22, 0x12, 0x1F, 0xEA, 0x90, ++0x84, 0x18, 0xE0, 0x22, 0x7B, 0x01, 0x7A, 0x83, 0x79, 0x5D, 0x90, 0x84, 0x3B, 0xE0, 0xFD, 0x22, ++0xD1, 0xD8, 0x2E, 0x90, 0x83, 0x91, 0x12, 0x54, 0x08, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0x92, 0x12, ++0x57, 0x0A, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0x93, 0x12, 0x57, 0xD0, 0xFF, 0xED, 0x2F, 0x90, 0x83, ++0x94, 0x91, 0xD3, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0x95, 0xD1, 0xD1, 0xFF, 0xED, 0x2F, 0x90, 0x83, ++0x96, 0xD1, 0x8D, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x83, 0x97, 0xF0, 0x22, 0xF0, 0x90, 0x00, ++0x06, 0x02, 0x1F, 0xBD, 0xD1, 0xD8, 0x2E, 0x90, 0x83, 0x98, 0x12, 0x54, 0x08, 0xFF, 0xED, 0x2F, ++0x90, 0x83, 0x99, 0x12, 0x57, 0x0A, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0x9A, 0x12, 0x57, 0xD0, 0xFF, ++0xED, 0x2F, 0x90, 0x83, 0x9B, 0x91, 0xD3, 0xFF, 0xED, 0x2F, 0x90, 0x83, 0x9C, 0xD1, 0xD1, 0xFF, ++0xED, 0x2F, 0x90, 0x83, 0x9D, 0xD1, 0x8D, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x83, 0x9E, 0xF0, ++0x22, 0xF0, 0x90, 0x00, 0x05, 0x02, 0x1F, 0xBD, 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x1F, 0xA4, ++0xFE, 0xAF, 0x05, 0xED, 0x22, 0x90, 0x84, 0x2D, 0xED, 0xF0, 0x90, 0x84, 0x2A, 0x12, 0x42, 0x65, ++0x12, 0x57, 0xD1, 0x90, 0x84, 0x31, 0xF0, 0x90, 0x84, 0x2A, 0x12, 0x6D, 0xB0, 0x75, 0x16, 0x03, ++0x7B, 0x01, 0x7A, 0x84, 0x79, 0x2E, 0x12, 0x2B, 0xED, 0x90, 0x84, 0x2D, 0xE0, 0x70, 0x2E, 0xFF, ++0xF1, 0x3E, 0xE0, 0xB4, 0xFF, 0x06, 0xF1, 0x3E, 0xE4, 0xF0, 0x80, 0x07, 0xF1, 0x3E, 0xE0, 0x04, ++0xF0, 0x80, 0x05, 0x0F, 0xEF, 0xB4, 0x03, 0xE8, 0x75, 0x13, 0x01, 0x75, 0x14, 0x84, 0x75, 0x15, ++0x2E, 0x75, 0x16, 0x03, 0x90, 0x84, 0x2A, 0x12, 0x42, 0x5C, 0x12, 0x2B, 0xED, 0x22, 0x74, 0x2E, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5, 0x83, 0x22, 0xA3, 0xE0, 0xFE, 0x24, 0x20, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x21, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0xFD, 0x74, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, ++0xFE, 0xEF, 0x30, 0xE7, 0x04, 0x7C, 0x02, 0x80, 0x02, 0xE4, 0xFC, 0xED, 0x30, 0xE6, 0x08, 0xAF, ++0x03, 0xF1, 0x8F, 0xAE, 0x07, 0x80, 0x02, 0xE4, 0xFE, 0xEC, 0x24, 0x18, 0x2E, 0xFF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x20, 0xE0, 0x05, 0x90, 0x83, 0x8F, 0x80, 0x03, 0x90, ++0x83, 0x90, 0xE0, 0x90, 0x83, 0x8E, 0xF0, 0x90, 0x83, 0x8E, 0xE0, 0x14, 0x60, 0x13, 0x14, 0x60, ++0x14, 0x24, 0xFE, 0x60, 0x10, 0x14, 0x60, 0x09, 0x14, 0x60, 0x06, 0x24, 0x06, 0xE4, 0xFE, 0x80, ++0x06, 0x7E, 0x04, 0x80, 0x02, 0x7E, 0x08, 0xAF, 0x06, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFF, ++0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, 0x00, 0x01, 0xEF, 0x02, 0x1F, 0xFC, 0x12, 0x1F, 0xA4, 0x90, ++0x81, 0x57, 0xF0, 0x22, 0x12, 0x1F, 0xA4, 0x90, 0x81, 0xAF, 0xF0, 0x22, 0xE4, 0x90, 0x83, 0xC1, ++0xF0, 0x90, 0x83, 0xC1, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xEC, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x67, ++0xA3, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x0E, 0x90, 0x81, 0x4F, 0xE0, 0xFF, 0x90, 0x81, 0x4E, ++0xE0, 0x6F, 0x60, 0x02, 0x31, 0xF7, 0xC2, 0xAF, 0x12, 0x75, 0xA8, 0xBF, 0x01, 0x02, 0x11, 0x29, ++0xD2, 0xAF, 0x31, 0x76, 0x12, 0x44, 0xB7, 0x80, 0xC8, 0x90, 0x81, 0x47, 0xE0, 0x30, 0xE0, 0x02, ++0x11, 0x33, 0x22, 0x90, 0x81, 0x4F, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0D, 0x31, 0x12, 0xBF, ++0x01, 0x08, 0x11, 0x4B, 0x90, 0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x11, 0x76, 0x11, 0x5B, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x78, 0xC4, 0x90, 0x00, ++0x08, 0xE0, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, 0xE4, 0xFF, 0x11, 0xC2, 0x90, 0x81, ++0x48, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x81, 0x48, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x81, 0x57, ++0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x32, 0x1E, 0x90, 0x81, 0x4D, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, ++0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, ++0x00, 0x08, 0xE0, 0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, 0x32, 0x1E, 0x7F, 0x01, 0x11, 0xC2, 0x90, ++0x00, 0x90, 0xE0, 0x44, 0x01, 0xFD, 0x7F, 0x90, 0x12, 0x32, 0x1E, 0x7F, 0x14, 0x7E, 0x00, 0x02, ++0x32, 0xAA, 0x90, 0x83, 0xC2, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x09, 0xE0, ++0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x83, 0xC2, 0xE0, 0x6F, 0x60, 0x33, 0xC3, 0x90, ++0x83, 0xC4, 0xE0, 0x94, 0x88, 0x90, 0x83, 0xC3, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, ++0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x83, 0xC3, 0x12, 0x7E, 0xEC, 0xD3, 0x90, 0x83, 0xC4, 0xE0, ++0x94, 0x32, 0x90, 0x83, 0xC3, 0xE0, 0x94, 0x00, 0x40, 0xC2, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, ++0xBB, 0x22, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, ++0x60, 0x05, 0x75, 0x4F, 0x01, 0x80, 0x40, 0x90, 0x81, 0xB0, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x02, ++0x82, 0xE0, 0x60, 0x05, 0x75, 0x4F, 0x02, 0x80, 0x2E, 0x90, 0x81, 0xB9, 0xE0, 0x30, 0xE0, 0x05, ++0x75, 0x4F, 0x08, 0x80, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, ++0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x4F, 0x04, 0x80, 0x0D, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x05, ++0x75, 0x4F, 0x40, 0x80, 0x02, 0x80, 0x10, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, ++0xE5, 0x4F, 0xF0, 0x7F, 0x00, 0x22, 0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x79, 0x94, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0F, ++0x01, 0x80, 0x51, 0x90, 0x81, 0x50, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, 0x02, 0x80, ++0x43, 0x90, 0x81, 0x4E, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, 0x80, 0x34, ++0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, 0x80, 0x2B, 0x90, 0x81, 0x50, 0xE0, 0x30, 0xE4, 0x05, ++0x75, 0x0F, 0x10, 0x80, 0x1F, 0x90, 0x81, 0x48, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05, ++0x75, 0x0F, 0x20, 0x80, 0x0F, 0x90, 0x81, 0xAF, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, 0x80, 0x04, ++0x31, 0x77, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0F, 0xF0, ++0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x81, 0x4E, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x49, ++0xDA, 0xE4, 0xFF, 0x12, 0x4D, 0x9A, 0xBF, 0x01, 0x0E, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x08, 0x51, ++0x18, 0x54, 0x07, 0x70, 0x02, 0x31, 0xF7, 0x22, 0x90, 0x81, 0x50, 0xE0, 0x54, 0xFE, 0xF0, 0x22, ++0xE4, 0xF5, 0x4E, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x4E, 0x54, 0xC0, 0x70, 0x07, 0x51, 0x18, 0x54, ++0xFD, 0xF0, 0x80, 0xC3, 0xE5, 0x4E, 0x30, 0xE6, 0x1E, 0x90, 0x81, 0x4C, 0xE0, 0x64, 0x01, 0x70, ++0x18, 0x90, 0x81, 0x50, 0xE0, 0x44, 0x01, 0x12, 0x4F, 0xF3, 0x64, 0x02, 0x60, 0x04, 0x51, 0x94, ++0x80, 0x07, 0x12, 0x4F, 0x49, 0x80, 0x02, 0x51, 0x18, 0xE5, 0x4E, 0x90, 0x81, 0x50, 0x30, 0xE7, ++0x11, 0xE0, 0x44, 0x02, 0xF0, 0xF1, 0xDD, 0x12, 0x4D, 0x2B, 0x90, 0x81, 0x47, 0xE0, 0x44, 0x04, ++0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x12, 0x4D, 0x94, 0x64, 0x01, 0x70, 0x15, 0x90, 0x81, ++0x4C, 0xE0, 0x60, 0x0F, 0x12, 0x7E, 0xE0, 0x90, 0x81, 0x47, 0xE0, 0xF1, 0xD2, 0x54, 0x07, 0x70, ++0x02, 0x31, 0xF7, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1B, 0x90, 0x80, 0x4B, 0xE0, 0xFF, 0x90, ++0x84, 0x4A, 0x74, 0x09, 0xF0, 0x7B, 0x18, 0xE4, 0xFD, 0x51, 0xB6, 0x90, 0x83, 0xB6, 0xEE, 0xF0, ++0xA3, 0xEF, 0xF0, 0xB1, 0xBA, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x48, ++0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x84, 0x47, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0xB1, 0xC1, 0x7C, ++0x00, 0xAD, 0x07, 0x90, 0x84, 0x47, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x84, 0x48, 0xE0, 0x60, ++0x0E, 0x74, 0x0F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, ++0x05, 0x74, 0x08, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0xAF, 0x05, 0x71, 0x4B, 0xE0, ++0x54, 0x01, 0xFE, 0x90, 0x84, 0x49, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, ++0xFE, 0x71, 0x4B, 0xEE, 0xF0, 0x90, 0x84, 0x4A, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x1E, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x21, 0x2E, 0x12, 0x4F, 0xBD, 0xE0, 0x54, ++0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x74, 0x16, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0x80, 0x4C, 0xE0, 0xFF, 0x90, 0x84, 0x3F, 0xE0, 0xFB, ++0x90, 0x84, 0x4A, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x51, 0xB6, 0x90, 0x84, 0x40, 0xEE, 0xF0, 0xFC, ++0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x84, 0x3E, 0xE0, 0xFF, 0x12, 0x4F, 0x8C, 0x90, 0x84, 0x40, 0xE0, ++0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, 0x07, 0x71, 0xEF, 0x44, ++0x01, 0xF0, 0x71, 0xEF, 0x54, 0xFB, 0xF0, 0xAC, 0x07, 0x74, 0x16, 0x2C, 0x71, 0x4E, 0xE0, 0x44, ++0xFA, 0xF0, 0x74, 0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, ++0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, ++0x90, 0x04, 0x53, 0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, ++0x04, 0x50, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, 0x71, 0xE7, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, ++0x14, 0x2F, 0x71, 0xE7, 0xED, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, ++0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x83, 0xF1, 0x12, 0x42, 0x65, 0x78, 0xFD, 0x7C, 0x83, 0x7D, 0x01, 0x7B, 0xFF, ++0x7A, 0x40, 0x79, 0xCE, 0x12, 0x5F, 0xB7, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x83, 0xFC, 0xF0, 0x90, ++0x04, 0x1D, 0xE0, 0x60, 0x09, 0x7D, 0x33, 0x12, 0x4F, 0xC5, 0x70, 0x1B, 0x80, 0x00, 0x90, 0x83, ++0x92, 0xE0, 0xFF, 0x90, 0x84, 0x4A, 0x74, 0x10, 0xF0, 0x7B, 0x18, 0x7D, 0x01, 0x51, 0xB6, 0x90, ++0x83, 0xF9, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x83, 0xF9, 0x12, 0x67, 0x49, 0x90, 0x83, 0xFB, ++0xEF, 0xF0, 0x90, 0x83, 0xF9, 0xA3, 0xE0, 0x24, 0x20, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, ++0x90, 0x83, 0xF7, 0xE0, 0xFD, 0x12, 0x65, 0xB1, 0x90, 0x83, 0xF8, 0xE0, 0x70, 0x49, 0xB1, 0xA3, ++0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xB1, 0xAD, 0x75, 0x16, 0x06, 0xD0, 0x01, ++0xD0, 0x02, 0xD0, 0x03, 0xB1, 0x1A, 0xB1, 0x8E, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, ++0x01, 0xB1, 0xAD, 0x75, 0x16, 0x06, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0xB1, 0x1A, 0xB1, 0x95, ++0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x83, 0xF1, 0xB1, 0xB0, 0x75, 0x16, ++0x04, 0xD0, 0x01, 0xD0, 0x02, 0x80, 0x46, 0x90, 0x83, 0xF8, 0xE0, 0x64, 0x01, 0x70, 0x43, 0xB1, ++0xA3, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, 0x81, 0x75, 0x15, 0xD5, 0x75, 0x16, ++0x06, 0xD0, 0x03, 0xB1, 0x1A, 0xB1, 0x8E, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, ++0x81, 0x75, 0x15, 0xDF, 0x75, 0x16, 0x06, 0xD0, 0x03, 0xB1, 0x1A, 0xB1, 0x95, 0xFA, 0x7B, 0x01, ++0xC0, 0x03, 0x8B, 0x13, 0x75, 0x14, 0x81, 0x75, 0x15, 0xE5, 0x75, 0x16, 0x04, 0xD0, 0x03, 0x12, ++0x2B, 0xED, 0x90, 0x06, 0x30, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x83, 0xFC, 0xE0, 0xFF, 0x7D, 0x34, ++0x12, 0x4B, 0xFA, 0xB1, 0xBA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x2B, 0xED, 0x90, 0x83, 0xF9, ++0xA3, 0xE0, 0xFF, 0xA3, 0xE0, 0x2F, 0x22, 0xB1, 0xC1, 0x90, 0x84, 0x5E, 0xE4, 0xF0, 0xA3, 0xEF, ++0xF0, 0x90, 0x84, 0x5E, 0x12, 0x67, 0x49, 0x90, 0x84, 0x60, 0xEF, 0xF0, 0x90, 0x84, 0x5E, 0xB1, ++0xA4, 0xB1, 0x86, 0x75, 0x16, 0x06, 0x7B, 0x01, 0x7A, 0x81, 0x79, 0xD5, 0xB1, 0x9C, 0xB1, 0x20, ++0x24, 0x36, 0xF9, 0xE4, 0x34, 0xFC, 0xB1, 0x86, 0x75, 0x16, 0x04, 0x7B, 0x01, 0x7A, 0x81, 0x79, ++0xDB, 0xB1, 0x9C, 0xB1, 0x20, 0xB1, 0x8E, 0xB1, 0x86, 0x75, 0x16, 0x06, 0x7B, 0x01, 0x7A, 0x81, ++0x79, 0xDF, 0xB1, 0x9C, 0xB1, 0x20, 0xB1, 0x95, 0xB1, 0x86, 0x75, 0x16, 0x04, 0x7B, 0x01, 0x7A, ++0x81, 0x79, 0xE5, 0x02, 0x2B, 0xED, 0x75, 0x13, 0x01, 0xF5, 0x14, 0x89, 0x15, 0x22, 0x24, 0x3A, ++0xF9, 0xE4, 0x34, 0xFC, 0x22, 0x24, 0x40, 0xF9, 0xE4, 0x34, 0xFC, 0x22, 0x12, 0x2B, 0xED, 0x90, ++0x84, 0x5E, 0x22, 0xA3, 0xA3, 0xE0, 0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC, 0x22, 0x90, 0x83, 0xF4, ++0x12, 0x42, 0x5C, 0x8B, 0x13, 0x8A, 0x14, 0x89, 0x15, 0x22, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, ++0x22, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, 0xE0, 0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, ++0xED, 0xF0, 0xAF, 0x06, 0x22, 0xB1, 0xE8, 0xE4, 0x34, 0xFC, 0xB1, 0x86, 0x75, 0x16, 0x08, 0x7B, ++0x01, 0x7A, 0x83, 0x79, 0x5D, 0x02, 0x2B, 0xED, 0xB1, 0xC1, 0x7E, 0x00, 0x74, 0x00, 0x2F, 0xF9, ++0x22, 0x90, 0x83, 0xA2, 0x12, 0x67, 0xCE, 0x30, 0xE0, 0x0E, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, ++0x12, 0x7E, 0xFA, 0xA3, 0x04, 0xF0, 0x61, 0xFB, 0x02, 0x4E, 0x09, 0x90, 0x81, 0x47, 0xE0, 0xFF, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x18, 0xEF, 0x54, 0xBF, 0xD1, 0x62, 0x30, 0xE0, 0x06, ++0xE0, 0x44, 0x01, 0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFE, 0xD1, 0x6B, 0x74, 0x04, 0xF0, 0x31, 0xF7, ++0xE4, 0xFF, 0x02, 0x5F, 0x61, 0x90, 0x81, 0x47, 0xE0, 0xFF, 0x12, 0x5E, 0xE7, 0x30, 0xE0, 0x1D, ++0xEF, 0x54, 0x7F, 0xD1, 0x62, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x07, 0xE0, 0x54, ++0xFD, 0xD1, 0x6B, 0x04, 0xF0, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x02, 0x31, 0xF7, 0x7F, 0x01, 0x02, ++0x5F, 0x61, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x81, 0x48, 0x22, 0xF0, 0x90, 0x01, 0xB9, 0x74, ++0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0xE4, 0xFE, 0x74, 0x5D, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x83, ++0xF5, 0x83, 0xE0, 0xFD, 0x74, 0xA4, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xED, 0xF0, ++0x0E, 0xEE, 0xB4, 0x08, 0xE3, 0x90, 0x83, 0x8D, 0xE0, 0x90, 0x04, 0x4C, 0xF0, 0x90, 0x83, 0xA0, ++0xE0, 0x60, 0x1A, 0xB1, 0xE8, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0x8B, 0x13, 0x75, ++0x14, 0x83, 0x75, 0x15, 0x5D, 0x75, 0x16, 0x32, 0xD0, 0x03, 0x12, 0x2B, 0xED, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x83, 0xC6, 0x12, 0x42, 0x65, 0x90, 0x84, 0x62, 0xE0, 0xFF, ++0x04, 0xF0, 0x12, 0x67, 0xD5, 0x7F, 0xAF, 0x7E, 0x01, 0xF1, 0x16, 0xEF, 0x60, 0x33, 0x90, 0x83, ++0xC6, 0xB1, 0xB0, 0x90, 0x00, 0x0E, 0x12, 0x1F, 0xBD, 0x24, 0x02, 0xF5, 0x16, 0x7B, 0x01, 0x7A, ++0x01, 0x79, 0xA0, 0x12, 0x2B, 0xED, 0x90, 0x83, 0xC6, 0x12, 0x42, 0x5C, 0x90, 0x00, 0x0E, 0x12, ++0x1F, 0xBD, 0x90, 0x01, 0xAE, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x84, 0x43, ++0xEE, 0xF1, 0xE5, 0xA3, 0xF0, 0x90, 0x84, 0x43, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, ++0xE0, 0x60, 0x22, 0xC3, 0x90, 0x84, 0x46, 0xE0, 0x94, 0xE8, 0x90, 0x84, 0x45, 0xE0, 0x94, 0x03, ++0x40, 0x0B, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x0A, 0x90, 0x84, 0x45, ++0x12, 0x72, 0x9D, 0x80, 0xD0, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x4F, 0xEB, 0x13, ++0x54, 0x1F, 0x30, 0xE0, 0x0C, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x03, 0x12, 0x51, ++0x55, 0x90, 0x81, 0x47, 0x12, 0x67, 0xCE, 0x30, 0xE0, 0x09, 0xEF, 0xF1, 0xD2, 0x54, 0x07, 0x70, ++0x48, 0x80, 0x44, 0x90, 0x81, 0x55, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x50, 0xE0, 0x54, 0xEF, 0xF0, ++0x12, 0x7C, 0x20, 0x40, 0x32, 0x12, 0x4D, 0x94, 0x64, 0x01, 0x70, 0x2D, 0x12, 0x4F, 0xF4, 0x70, ++0x05, 0x12, 0x7B, 0xD6, 0x80, 0x24, 0x12, 0x7B, 0xD6, 0x90, 0x81, 0x56, 0xE0, 0x04, 0xF0, 0xE0, ++0xD3, 0x94, 0x02, 0x40, 0x09, 0xF1, 0xCA, 0xE4, 0x90, 0x81, 0x56, 0xF0, 0x80, 0x03, 0x12, 0x4F, ++0x49, 0xE4, 0x90, 0x81, 0x55, 0xF0, 0x22, 0x31, 0xF7, 0x22, 0x90, 0x81, 0x48, 0xE0, 0x54, 0xFB, ++0xF0, 0x22, 0x54, 0xFB, 0xF0, 0x90, 0x81, 0x50, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0xE4, 0xF5, 0x1D, ++0x90, 0x81, 0xAA, 0xE0, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0xE4, 0xFB, 0xFA, ++0xFD, 0x7F, 0x01, 0x12, 0x46, 0xB8, 0x90, 0x83, 0xC5, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x80, 0x01, ++0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE1, 0x09, 0x90, 0x80, ++0x01, 0xE0, 0x54, 0xFD, 0xF0, 0x11, 0x70, 0x11, 0x35, 0x30, 0xE2, 0x05, 0x54, 0xFB, 0xF0, 0x51, ++0x0F, 0x11, 0x35, 0x30, 0xE4, 0x0B, 0x54, 0xEF, 0xF0, 0x11, 0x3F, 0xBF, 0x01, 0x03, 0x12, 0x58, ++0xBA, 0xD2, 0xAF, 0x80, 0xC8, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x80, 0x01, 0xE0, 0xFF, 0x22, 0xE4, ++0x90, 0x84, 0x67, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x20, 0xC3, 0x90, 0x84, ++0x68, 0xE0, 0x94, 0xD0, 0x90, 0x84, 0x67, 0xE0, 0x94, 0x07, 0x40, 0x0A, 0x90, 0x01, 0xC1, 0xE0, ++0x44, 0x04, 0xF0, 0x7F, 0x00, 0x22, 0x90, 0x84, 0x67, 0x51, 0x9D, 0x80, 0xD9, 0x7F, 0x01, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x80, 0xA2, 0xE0, 0xFF, 0x90, 0x80, 0xA1, 0xE0, ++0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x43, 0x90, 0x80, 0xA1, 0xE0, ++0xFE, 0x75, 0xF0, 0x08, 0x90, 0x80, 0x51, 0x12, 0x42, 0x50, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, ++0xA4, 0x24, 0x52, 0xF9, 0x74, 0x80, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x63, 0x41, ++0x90, 0x80, 0xA1, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, ++0x05, 0xE4, 0x90, 0x80, 0xA1, 0xF0, 0x11, 0xD4, 0x90, 0x80, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x84, 0x63, 0xF0, 0x90, 0x84, ++0x63, 0xE0, 0xFD, 0x70, 0x02, 0x21, 0xD1, 0x90, 0x80, 0xA1, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, ++0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x80, 0xA2, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, ++0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, ++0x84, 0x61, 0x51, 0x7B, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, ++0x70, 0x02, 0x21, 0xB3, 0xE4, 0x90, 0x84, 0x64, 0xF0, 0x90, 0x84, 0x64, 0xE0, 0xF9, 0xC3, 0x94, ++0x04, 0x50, 0x31, 0x31, 0xD2, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, ++0xFE, 0x74, 0xD0, 0x31, 0xEA, 0x90, 0x80, 0x51, 0x31, 0xDA, 0x31, 0xD2, 0xA4, 0x2D, 0xFF, 0xEC, ++0x35, 0xF0, 0xFE, 0x74, 0xF0, 0x31, 0xEA, 0x90, 0x80, 0x55, 0x31, 0xDA, 0x90, 0x84, 0x64, 0xE0, ++0x04, 0xF0, 0x80, 0xC5, 0x90, 0x84, 0x63, 0xE0, 0xFF, 0x90, 0x84, 0x61, 0xE0, 0xFE, 0x74, 0x01, ++0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0x84, 0x63, 0xF0, 0x90, ++0x84, 0x61, 0x12, 0x56, 0x57, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, ++0x84, 0x61, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x80, 0xA2, 0xE0, 0x04, 0xF0, 0xE0, ++0x7F, 0x00, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x01, 0xDE, 0xE4, 0x90, 0x80, 0xA2, ++0xF0, 0x01, 0xDE, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x84, 0x61, 0xE0, 0x44, 0x80, ++0x90, 0x00, 0x8A, 0xF0, 0x31, 0xD2, 0x90, 0x01, 0xD0, 0x12, 0x42, 0x50, 0xE0, 0x90, 0x01, 0xC3, ++0xF0, 0x22, 0x90, 0x84, 0x61, 0xE0, 0x75, 0xF0, 0x04, 0x22, 0x12, 0x42, 0x50, 0xE5, 0x82, 0x29, ++0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, ++0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x80, 0xA2, 0xE0, 0x75, 0xF0, 0x08, 0x22, 0x11, 0xD4, 0x7F, 0x02, ++0x8F, 0x0D, 0x7F, 0x02, 0x12, 0x46, 0x91, 0x90, 0x80, 0x01, 0xE0, 0x45, 0x0D, 0xF0, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0x81, 0x3A, 0xE0, 0xFE, 0x90, 0x81, 0x39, ++0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x46, ++0x90, 0x01, 0xAF, 0xE0, 0x70, 0x0B, 0xED, 0x51, 0x85, 0xFA, 0x7B, 0x01, 0x12, 0x6E, 0xBE, 0x7F, ++0x01, 0xEF, 0x60, 0x32, 0x90, 0x81, 0x39, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x81, 0x39, 0xF0, 0x90, 0x81, 0x3A, 0xE0, 0xFF, 0x90, ++0x81, 0x39, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, ++0x80, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, ++0x00, 0xA8, 0x07, 0x08, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xA3, 0xF9, 0x74, 0x80, 0x35, 0xF0, ++0x22, 0x90, 0x81, 0xB0, 0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x10, 0x51, 0x00, 0x22, 0xE4, 0x75, 0xF0, ++0x01, 0x12, 0x41, 0xF6, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x81, 0x39, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, ++0x14, 0xFF, 0x90, 0x81, 0x3A, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, ++0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x2C, 0xC0, 0x01, 0x90, 0x81, 0x3A, ++0xE0, 0x51, 0x85, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x41, ++0xD0, 0x90, 0x81, 0x3A, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, ++0x60, 0x05, 0xE4, 0x90, 0x81, 0x3A, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x84, 0x03, 0xEF, ++0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x90, 0x84, 0x11, ++0xF0, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x90, 0x84, 0x09, 0x12, 0x20, 0xCE, 0x90, 0x84, ++0x03, 0xE0, 0xFB, 0x70, 0x04, 0x71, 0xF3, 0x80, 0x08, 0xEB, 0x91, 0x0E, 0xE0, 0xFF, 0x12, 0x2D, ++0x5C, 0x90, 0x84, 0x0D, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x04, 0x12, 0x49, 0x59, 0x78, 0x17, 0x91, ++0x7E, 0xAB, 0x07, 0x90, 0x84, 0x0D, 0x12, 0x42, 0x38, 0xED, 0x54, 0x7F, 0xFD, 0xEC, 0x54, 0x80, ++0xFC, 0x12, 0x42, 0x1A, 0xEC, 0x44, 0x80, 0xFC, 0x90, 0x84, 0x0D, 0x12, 0x20, 0xCE, 0x71, 0xF3, ++0xEC, 0x54, 0x7F, 0xFC, 0x71, 0xFC, 0x91, 0x02, 0x91, 0x0E, 0xE0, 0xFF, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x84, 0x0D, 0x71, 0xF9, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x2E, 0xA2, 0x71, 0xF3, 0xEC, 0x44, ++0x80, 0xFC, 0x71, 0xFC, 0x91, 0x02, 0x70, 0x04, 0x7F, 0x20, 0x80, 0x09, 0x90, 0x84, 0x03, 0xE0, ++0xB4, 0x01, 0x16, 0x7F, 0x28, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0x78, 0x08, 0x12, 0x20, 0xA8, 0xEF, ++0x54, 0x01, 0xFF, 0xE4, 0x90, 0x84, 0x11, 0xEF, 0xF0, 0x90, 0x84, 0x11, 0xE0, 0x90, 0x84, 0x03, ++0x60, 0x0E, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x80, 0x0C, ++0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0x91, 0x76, 0x12, 0x2D, ++0x5C, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x90, 0x84, 0x05, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x05, ++0x02, 0x42, 0x38, 0x90, 0x84, 0x09, 0x02, 0x42, 0x38, 0x12, 0x42, 0x38, 0x90, 0x85, 0xBB, 0x02, ++0x20, 0xCE, 0x7F, 0x24, 0x7E, 0x08, 0x12, 0x2E, 0xA2, 0x90, 0x84, 0x03, 0xE0, 0x22, 0x75, 0xF0, ++0x08, 0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x87, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0x22, 0x90, ++0x84, 0x20, 0xEF, 0xF0, 0xAB, 0x05, 0x90, 0x84, 0x26, 0x12, 0x20, 0xDA, 0x00, 0x00, 0x00, 0x00, ++0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x14, 0x91, 0x7E, 0xAB, 0x07, 0x90, 0x84, 0x22, 0x12, ++0x42, 0x38, 0xED, 0x54, 0x0F, 0xFD, 0xE4, 0xFC, 0x12, 0x42, 0x1A, 0xEC, 0x54, 0x0F, 0xFC, 0x90, ++0x84, 0x26, 0x12, 0x20, 0xCE, 0x90, 0x84, 0x20, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x60, 0xF5, ++0x82, 0xE4, 0x34, 0x87, 0x91, 0x76, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x84, 0x26, 0x71, 0xF9, 0xD0, ++0x07, 0xD0, 0x06, 0x02, 0x2E, 0xA2, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x12, 0x20, ++0xBB, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x71, ++0x0C, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xC0, 0x07, 0xC0, ++0x05, 0x90, 0x84, 0x34, 0x12, 0x42, 0x38, 0x90, 0x84, 0x22, 0x12, 0x20, 0xCE, 0xD0, 0x05, 0xD0, ++0x07, 0x91, 0x1F, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x84, 0x69, 0xEF, 0xF0, 0x7F, 0x02, 0x12, ++0x46, 0x91, 0x90, 0x80, 0x01, 0xE0, 0xFF, 0x90, 0x84, 0x69, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x80, ++0x01, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x50, 0x8A, 0x51, 0x89, 0x52, ++0x12, 0x1F, 0xA4, 0xFF, 0x90, 0x81, 0x46, 0xF0, 0xBF, 0x01, 0x0D, 0x12, 0x54, 0x09, 0x64, 0x01, ++0x60, 0x19, 0x7D, 0x13, 0x7F, 0x6F, 0x80, 0x10, 0xAB, 0x50, 0xAA, 0x51, 0xA9, 0x52, 0x12, 0x54, ++0x09, 0x64, 0x01, 0x60, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x4B, 0xFA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x12, 0x1F, 0xA4, 0x54, 0x01, 0xFF, 0x90, 0x83, 0xB3, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0xE4, ++0x90, 0x81, 0x39, 0xF0, 0xA3, 0xF0, 0x90, 0x80, 0xA1, 0xF0, 0xA3, 0xF0, 0x22, 0x75, 0x3D, 0x10, ++0xE4, 0xF5, 0x3E, 0x75, 0x3F, 0x07, 0x75, 0x40, 0x02, 0x90, 0x01, 0x30, 0xE5, 0x3D, 0xF0, 0xA3, ++0xE5, 0x3E, 0xF0, 0xA3, 0xE5, 0x3F, 0xF0, 0xA3, 0xE5, 0x40, 0xF0, 0x22, 0x75, 0x45, 0x06, 0x75, ++0x46, 0x01, 0x75, 0x47, 0x03, 0x75, 0x48, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x45, 0xF0, 0xA3, 0xE5, ++0x46, 0xF0, 0xA3, 0xE5, 0x47, 0xF0, 0xA3, 0xE5, 0x48, 0xF0, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, ++0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, ++0x01, 0x9C, 0x74, 0x7E, 0xF0, 0xA3, 0x74, 0x92, 0xF0, 0xA3, 0x74, 0xA0, 0xF0, 0xA3, 0x74, 0x24, ++0xF0, 0x90, 0x01, 0x9B, 0x74, 0x49, 0xF0, 0x90, 0x01, 0x9A, 0x74, 0xE0, 0xF0, 0x90, 0x01, 0x99, ++0xE4, 0xF0, 0x90, 0x01, 0x98, 0x04, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0xA8, 0xF0, ++0x74, 0x75, 0xA3, 0xF0, 0x90, 0x83, 0xA1, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, ++0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, ++0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE, 0x74, 0xA8, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x75, 0xA3, ++0xF0, 0x7F, 0x01, 0x22, 0xE4, 0x90, 0x80, 0x01, 0x12, 0x58, 0x8B, 0xA3, 0xF0, 0x22, 0x90, 0x01, ++0xE4, 0x74, 0x16, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x00, 0x54, 0xE0, 0x55, 0x35, 0xF5, 0x39, ++0xA3, 0xE0, 0x55, 0x36, 0xF5, 0x3A, 0xA3, 0xE0, 0x55, 0x37, 0xF5, 0x3B, 0xA3, 0xE0, 0x55, 0x38, ++0xF5, 0x3C, 0xAD, 0x39, 0x7F, 0x54, 0x12, 0x32, 0x1E, 0xAD, 0x3A, 0x7F, 0x55, 0x12, 0x32, 0x1E, ++0xAD, 0x3B, 0x7F, 0x56, 0x12, 0x32, 0x1E, 0xAD, 0x3C, 0x7F, 0x57, 0x12, 0x32, 0x1E, 0x53, 0x91, ++0xEF, 0x22, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x3D, 0xF5, 0x41, 0xA3, 0xE0, 0x55, 0x3E, 0xF5, 0x42, ++0xA3, 0xE0, 0x55, 0x3F, 0xF5, 0x43, 0xA3, 0xE0, 0x55, 0x40, 0xF5, 0x44, 0x90, 0x01, 0x34, 0xE5, ++0x41, 0xF0, 0xA3, 0xE5, 0x42, 0xF0, 0xA3, 0xE5, 0x43, 0xF0, 0xA3, 0xE5, 0x44, 0xF0, 0x22, 0x90, ++0x01, 0x3C, 0xE0, 0x55, 0x45, 0xF5, 0x49, 0xA3, 0xE0, 0x55, 0x46, 0xF5, 0x4A, 0xA3, 0xE0, 0x55, ++0x47, 0xF5, 0x4B, 0xA3, 0xE0, 0x55, 0x48, 0xF5, 0x4C, 0x90, 0x01, 0x3C, 0xE5, 0x49, 0xF0, 0xA3, ++0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, 0xF0, 0xA3, 0xE5, 0x4C, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, ++0x01, 0xCF, 0xE0, 0x90, 0x84, 0x6C, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, ++0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, ++0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x58, 0x65, 0x90, 0x00, 0x03, 0xE0, ++0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x32, 0x1E, 0x80, 0xFE, 0x22, 0x90, 0x83, 0xAC, 0xE0, 0x04, ++0xF0, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x02, 0x60, 0x09, 0x12, 0x51, 0x64, 0x90, 0x01, 0xE6, 0xE0, ++0x04, 0xF0, 0x22, 0x90, 0x81, 0x4C, 0xE0, 0x60, 0x03, 0x12, 0x4F, 0x72, 0x22, 0x12, 0x78, 0x7D, ++0x90, 0x83, 0xBB, 0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, ++0x12, 0x4C, 0x09, 0x90, 0x83, 0xBB, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, ++0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0x90, 0x81, 0x47, 0xE0, 0x90, ++0x04, 0xEC, 0x30, 0xE0, 0x06, 0xE0, 0x54, 0xDD, 0xF0, 0x80, 0x04, 0xE0, 0x44, 0x22, 0xF0, 0x12, ++0x7B, 0xC8, 0x90, 0x84, 0x5A, 0x74, 0x02, 0xF0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, ++0x07, 0x90, 0x81, 0x48, 0x12, 0x5E, 0xE6, 0x30, 0xE0, 0x02, 0xE1, 0xF7, 0x90, 0x81, 0x47, 0xE0, ++0x30, 0xE0, 0x16, 0x90, 0x81, 0x69, 0xE0, 0x24, 0x04, 0x90, 0x81, 0x61, 0xF0, 0x90, 0x81, 0x69, ++0xE0, 0x24, 0x03, 0x90, 0x81, 0x60, 0xF0, 0x80, 0x0D, 0x90, 0x81, 0x61, 0x74, 0x02, 0xF0, 0x90, ++0x81, 0x60, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x81, 0x60, 0xE0, 0xFA, 0x90, 0x81, 0x5F, 0xE0, 0xD3, ++0x9A, 0x50, 0x0E, 0x90, 0x81, 0x54, 0xEB, 0xF0, 0x90, 0x81, 0x61, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, ++0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x81, 0x54, 0xF0, 0x90, 0x81, 0x60, 0xE0, 0xFF, 0xA3, 0xE0, ++0xC3, 0x9F, 0x90, 0x81, 0x64, 0xF0, 0x90, 0x81, 0x61, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, ++0xFC, 0x90, 0x81, 0x64, 0x12, 0x7F, 0x12, 0x98, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, 0x81, ++0x64, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x81, 0x54, 0x12, 0x7F, 0x12, 0x98, ++0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x81, 0x64, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x81, 0x58, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x03, 0x12, ++0x78, 0x0C, 0x12, 0x78, 0x03, 0x80, 0x07, 0x90, 0x81, 0x49, 0xE0, 0x44, 0x01, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x90, 0x81, 0x49, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xF0, 0x90, 0x81, 0x58, 0xA3, ++0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x32, 0x06, 0x90, 0x00, 0xF2, ++0xE0, 0x20, 0xE6, 0x0C, 0x90, 0x00, 0x05, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x05, 0x12, 0x32, 0x1E, ++0x22, 0xC3, 0xEE, 0x94, 0x01, 0x40, 0x0A, 0x0D, 0xED, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0xE4, 0x2F, ++0xFF, 0x22, 0xC3, 0xEE, 0x94, 0x01, 0x40, 0x1E, 0x90, 0xFD, 0x11, 0xE0, 0xB5, 0x05, 0x14, 0x90, ++0x01, 0x17, 0xE0, 0xB5, 0x05, 0x07, 0x90, 0xFD, 0x11, 0xE4, 0xF0, 0x80, 0x06, 0xED, 0x04, 0x90, ++0xFD, 0x11, 0xF0, 0xE4, 0x2F, 0xFF, 0x22, 0xEF, 0x90, 0x02, 0x86, 0x60, 0x06, 0xE0, 0x44, 0x04, ++0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x80, 0x06, 0xED, 0xF0, 0x22, 0xE4, 0x90, 0x83, ++0xBC, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x00, 0x83, 0xE0, 0x90, 0x83, 0xBC, 0xF0, 0x90, 0x00, ++0x83, 0xE0, 0xFE, 0x90, 0x83, 0xBC, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x83, 0xBE, ++0xE0, 0x94, 0x64, 0x90, 0x83, 0xBD, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x40, 0xF0, 0x90, 0x83, 0xBC, 0xE0, 0xFF, 0x22, 0x90, 0x83, 0xBD, 0xE4, 0x75, 0xF0, 0x01, 0x12, ++0x41, 0xF6, 0x80, 0xC2, 0x90, 0x01, 0xC4, 0x74, 0xC4, 0xF0, 0x74, 0x78, 0xA3, 0xF0, 0x90, 0x00, ++0x90, 0xE0, 0x20, 0xE0, 0xF9, 0x74, 0xC4, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x78, 0xA3, 0xF0, ++0x22, 0x74, 0x45, 0x2F, 0xF8, 0xE6, 0x4D, 0x02, 0x52, 0x3C, 0xE4, 0xFE, 0xEF, 0x54, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0xFD, 0xEF, 0x54, 0x1F, 0xFF, 0xED, 0x60, 0x2C, 0x14, 0x60, 0x1E, 0x24, 0xFD, ++0x60, 0x0F, 0x24, 0xFE, 0x70, 0x2A, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0xDE, 0x9F, 0xFE, 0x80, ++0x1F, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0xF2, 0x9F, 0xFE, 0x80, 0x14, 0xEF, 0x25, 0xE0, 0xFF, ++0xC3, 0x74, 0x06, 0x9F, 0xFE, 0x80, 0x09, 0xEF, 0x25, 0xE0, 0xFF, 0xC3, 0x74, 0x10, 0x9F, 0xFE, ++0xAF, 0x06, 0x22, 0xD3, 0xEF, 0x64, 0x80, 0x94, 0x1C, 0x40, 0x07, 0xEF, 0x64, 0x80, 0x94, 0x94, ++0x40, 0x03, 0x7F, 0x00, 0x22, 0xC3, 0xEF, 0x64, 0x80, 0x94, 0x80, 0x40, 0x03, 0x7F, 0x64, 0x22, ++0xEF, 0x24, 0x64, 0xFF, 0x22, 0x31, 0x8A, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, ++0x06, 0x92, 0x74, 0x02, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0xF5, 0x1D, 0x90, 0x81, ++0xAB, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0xF5, 0x1E, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12, ++0x4D, 0x34, 0x90, 0x81, 0x47, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0x81, 0x47, 0xE0, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0x22, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x04, ++0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0xEF, 0x24, 0xFE, ++0x60, 0x0B, 0x04, 0x70, 0x24, 0x90, 0x81, 0x52, 0x74, 0x02, 0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, ++0x90, 0x81, 0xAC, 0xE0, 0x80, 0x02, 0xED, 0x14, 0x90, 0x81, 0x52, 0xF0, 0x90, 0x81, 0x52, 0xE0, ++0xA3, 0xF0, 0x90, 0x81, 0x48, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0x81, 0xA3, 0x74, 0x04, 0xF0, ++0xA3, 0x14, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, ++0x22, 0xE4, 0x90, 0x83, 0xB6, 0xF0, 0xA3, 0xF0, 0xA3, 0x12, 0x49, 0x3F, 0x12, 0x42, 0x1A, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x49, 0x59, 0x78, 0x10, 0x12, ++0x20, 0xBB, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x42, 0x1A, 0xC0, 0x04, 0xC0, ++0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x49, 0x59, 0x78, 0x18, 0x12, 0x20, 0xBB, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x42, 0x1A, 0x90, 0x81, 0x9B, 0x12, 0x20, 0xCE, 0x90, ++0x81, 0x9F, 0x12, 0x42, 0x38, 0x90, 0x81, 0x9B, 0x12, 0x42, 0x44, 0xC3, 0x12, 0x42, 0x27, 0x40, ++0x3F, 0x90, 0x81, 0x47, 0xE0, 0x90, 0x81, 0x9F, 0x30, 0xE0, 0x0F, 0x71, 0xA3, 0x90, 0x81, 0x69, ++0xE0, 0x24, 0x04, 0x2F, 0xFF, 0x90, 0x81, 0xA3, 0x80, 0x05, 0x71, 0xA3, 0x90, 0x81, 0xA4, 0xE0, ++0xFE, 0xC3, 0xEF, 0x9E, 0x90, 0x83, 0xB7, 0xF0, 0x90, 0x83, 0xB7, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, ++0x50, 0x0E, 0x74, 0x6A, 0x2F, 0x71, 0xC0, 0xE0, 0x04, 0xF0, 0x90, 0x81, 0x62, 0xE0, 0x04, 0xF0, ++0x90, 0x81, 0x62, 0xE0, 0xFF, 0xD3, 0x90, 0x81, 0xA6, 0xE0, 0x9F, 0x90, 0x81, 0xA5, 0xE0, 0x94, ++0x00, 0x40, 0x02, 0x61, 0x71, 0x71, 0x83, 0x71, 0x7A, 0x50, 0x1E, 0x71, 0x8D, 0xE0, 0xFF, 0x90, ++0x83, 0xB8, 0xE0, 0xD3, 0x9F, 0x40, 0x0A, 0x90, 0x83, 0xB6, 0xE0, 0x90, 0x83, 0xB9, 0xF0, 0x80, ++0x08, 0x90, 0x83, 0xB6, 0xE0, 0x04, 0xF0, 0x80, 0xDE, 0x71, 0x83, 0x71, 0x7A, 0x50, 0x2E, 0x71, ++0x8D, 0xE0, 0xFF, 0xC3, 0x90, 0x81, 0xA6, 0xE0, 0x9F, 0xFF, 0x90, 0x81, 0xA5, 0xE0, 0x94, 0x00, ++0xFE, 0x90, 0x83, 0xB8, 0xE0, 0xD3, 0x9F, 0xE4, 0x9E, 0x40, 0x0A, 0x90, 0x83, 0xB6, 0xE0, 0x90, ++0x83, 0xBA, 0xF0, 0x80, 0x08, 0x90, 0x83, 0xB6, 0xE0, 0x04, 0xF0, 0x80, 0xCE, 0x90, 0x83, 0xB9, ++0xE0, 0x90, 0x81, 0x67, 0xF0, 0x90, 0x83, 0xBA, 0xE0, 0x90, 0x81, 0x68, 0x71, 0x72, 0x94, 0x0A, ++0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, 0x81, 0x5F, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x81, 0x5F, ++0x71, 0x72, 0x74, 0x0A, 0x9F, 0x90, 0x81, 0x5E, 0xF0, 0x90, 0x81, 0x67, 0xE0, 0xFF, 0xA3, 0xE0, ++0xC3, 0x9F, 0x90, 0x81, 0x65, 0xF0, 0x90, 0x81, 0x47, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x81, 0xA3, ++0x80, 0x03, 0x90, 0x81, 0xA4, 0xE0, 0xFF, 0x90, 0x81, 0x65, 0xE0, 0x2F, 0x04, 0xF0, 0x90, 0x81, ++0x65, 0xE0, 0xC3, 0x94, 0x0A, 0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x81, 0x65, 0xE0, 0x24, 0x02, ++0xF0, 0x71, 0xC8, 0x90, 0x84, 0x5A, 0x74, 0x03, 0xF0, 0x12, 0x77, 0x38, 0xE4, 0xFF, 0x12, 0x63, ++0x19, 0x22, 0xF0, 0x90, 0x81, 0x67, 0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x83, 0xB6, 0xE0, 0xFF, 0xC3, ++0x94, 0x2D, 0x22, 0xE4, 0x90, 0x83, 0xB8, 0xF0, 0x90, 0x83, 0xB6, 0xF0, 0x22, 0x74, 0x6A, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x83, 0xB8, 0xE0, 0x2F, 0xF0, 0x90, ++0x81, 0xA7, 0x22, 0x12, 0x42, 0x44, 0x90, 0x81, 0x9B, 0x12, 0x42, 0x38, 0x12, 0x42, 0x0C, 0x78, ++0x0A, 0x12, 0x20, 0xA8, 0x90, 0x81, 0x64, 0xE0, 0xFE, 0xC3, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x22, ++0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x90, 0x81, 0x5E, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, ++0x90, 0x81, 0x65, 0xE0, 0xFB, 0x22, 0x91, 0x20, 0x40, 0x30, 0x90, 0x81, 0x66, 0xE0, 0x04, 0xF0, ++0x90, 0x81, 0xA8, 0xE0, 0xFF, 0x90, 0x81, 0x66, 0xE0, 0xD3, 0x9F, 0x50, 0x1D, 0x90, 0x81, 0x5E, ++0xE0, 0x04, 0xF0, 0x91, 0x0B, 0x91, 0x16, 0xF0, 0xFB, 0x90, 0x81, 0x5E, 0xE0, 0xFF, 0xA3, 0xE0, ++0xFD, 0x90, 0x84, 0x5A, 0x74, 0x04, 0xF0, 0x12, 0x77, 0x38, 0x22, 0x90, 0x81, 0x55, 0xE0, 0x75, ++0xF0, 0x03, 0xA4, 0x24, 0xFE, 0x22, 0xFF, 0x90, 0x81, 0x54, 0xE0, 0x2F, 0x90, 0x81, 0x65, 0x22, ++0x90, 0x81, 0xA9, 0xE0, 0xFF, 0x90, 0x81, 0x55, 0xE0, 0xD3, 0x9F, 0x22, 0x12, 0x57, 0x4C, 0x7D, ++0x0C, 0x7F, 0x01, 0x02, 0x4C, 0x09, 0x90, 0x84, 0x3E, 0xE0, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x84, 0x6F, 0xEF, 0xF0, 0x90, 0x80, 0x4C, 0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, ++0x6F, 0x70, 0x3C, 0x90, 0x81, 0x4F, 0xE0, 0x64, 0x0E, 0x70, 0x14, 0x90, 0x84, 0x6F, 0xE0, 0x70, ++0x2E, 0x90, 0x81, 0x47, 0xE0, 0x54, 0x7F, 0xF0, 0x91, 0x94, 0x12, 0x4C, 0x05, 0x80, 0x1D, 0x90, ++0x81, 0x4F, 0xE0, 0x64, 0x06, 0x70, 0x18, 0x90, 0x84, 0x6F, 0xE0, 0x60, 0x12, 0x90, 0x81, 0x47, ++0xE0, 0x54, 0xBF, 0xF0, 0x91, 0x9C, 0x90, 0x81, 0x4F, 0x74, 0x04, 0xF0, 0x12, 0x57, 0x4E, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x90, 0x83, 0xA2, 0xE0, 0x54, 0xFE, 0xF0, 0x54, ++0x7F, 0xF0, 0x54, 0xFB, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, ++0x83, 0xA2, 0xE0, 0x30, 0xE0, 0x37, 0x12, 0x4D, 0x94, 0x64, 0x01, 0x70, 0x30, 0x90, 0x84, 0x71, ++0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x0A, 0x0B, 0x90, 0x83, 0xA4, 0xE0, 0x04, 0xF0, 0xE4, 0x90, 0x84, ++0x71, 0xF0, 0x90, 0x83, 0xA4, 0xE0, 0xFF, 0x90, 0x83, 0xA3, 0xE0, 0xD3, 0x9F, 0x50, 0x0E, 0x90, ++0x83, 0xA5, 0xE0, 0x70, 0x08, 0xE4, 0x90, 0x83, 0xA4, 0xF0, 0x12, 0x6D, 0xF1, 0x22, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x90, 0x02, 0x84, 0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0xA3, 0xE0, 0x44, 0x01, 0xF0, ++0x22, 0xD1, 0x03, 0xB1, 0xCE, 0x90, 0x83, 0xCA, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x87, 0xE0, ++0x90, 0x83, 0xCE, 0xF0, 0x90, 0x81, 0xB0, 0xE0, 0x20, 0xE0, 0x02, 0xA1, 0xC4, 0x90, 0x83, 0xCE, ++0xE0, 0xFF, 0xEC, 0xC3, 0x9F, 0x40, 0x02, 0xA1, 0xC4, 0x90, 0x83, 0xCA, 0xE0, 0xFA, 0xA3, 0xE0, ++0xFB, 0x12, 0x5F, 0xEB, 0xAD, 0x07, 0x74, 0x02, 0x2D, 0xD1, 0x27, 0xF9, 0x12, 0x5F, 0xDF, 0xFE, ++0x74, 0x00, 0x2D, 0x12, 0x5E, 0xA4, 0xE0, 0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x54, 0x3F, ++0x90, 0x83, 0xCC, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x03, 0x2D, 0xB1, 0xFA, 0x54, 0x03, 0xFF, 0x7E, ++0x00, 0xAD, 0x01, 0xED, 0x24, 0x18, 0xFB, 0xEA, 0x33, 0xCB, 0x2F, 0xFF, 0xEE, 0x3B, 0x90, 0x83, ++0xCC, 0x8F, 0xF0, 0x12, 0x41, 0xF6, 0x90, 0x83, 0xCC, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xB1, 0xD7, ++0x90, 0x83, 0xCC, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x83, 0xCA, 0xD1, 0x18, 0xD3, 0x90, 0x83, ++0xCB, 0xE0, 0x9F, 0x90, 0x83, 0xCA, 0xE0, 0x9E, 0x40, 0x12, 0x90, 0x81, 0x3C, 0xD1, 0x0C, 0xC3, ++0x90, 0x83, 0xCB, 0xE0, 0x9F, 0xF0, 0x90, 0x83, 0xCA, 0xE0, 0x9E, 0xF0, 0x90, 0x83, 0xCA, 0x91, ++0xFE, 0x0C, 0xA1, 0x2D, 0x22, 0xF0, 0x90, 0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, ++0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, 0x7D, 0x7F, 0xEF, 0x5D, 0xC3, 0x60, 0x0B, 0xB1, 0xEE, ++0x5F, 0x24, 0x80, 0xFF, 0xE4, 0x3E, 0xFE, 0x80, 0x04, 0xB1, 0xEE, 0x5F, 0xFF, 0x22, 0x74, 0xFF, ++0x9D, 0xFD, 0x74, 0xFF, 0x94, 0x00, 0x5E, 0xFE, 0xED, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, ++0x83, 0xE0, 0x22, 0x90, 0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, 0x22, 0xE0, 0x24, 0x01, 0xFF, ++0x90, 0x81, 0x3B, 0xE0, 0x34, 0x00, 0xFE, 0x22, 0xEE, 0x8F, 0xF0, 0x12, 0x41, 0xF6, 0x90, 0x81, ++0x3B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, ++0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE2, 0x03, 0x7F, 0x04, ++0x22, 0x90, 0x02, 0x86, 0xE0, 0x7F, 0x01, 0x20, 0xE1, 0x02, 0x7F, 0x02, 0x22, 0x90, 0x81, 0xB2, ++0xE0, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x0A, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x03, 0x12, 0x5B, ++0x35, 0x90, 0x81, 0xB9, 0xE0, 0x30, 0xE0, 0x0D, 0x90, 0x81, 0xB3, 0xE0, 0xC4, 0x54, 0x0F, 0x20, ++0xE0, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x01, 0x22, 0xEF, 0x90, 0x01, 0xC7, 0xB4, 0xA0, 0x05, 0x74, ++0x04, 0xF0, 0x80, 0x03, 0x74, 0x08, 0xF0, 0x02, 0x5B, 0x35, 0x90, 0x02, 0x09, 0xE0, 0x90, 0x83, ++0xCA, 0xF0, 0x12, 0x1F, 0xA4, 0x90, 0x83, 0x8F, 0x12, 0x54, 0x08, 0x90, 0x83, 0x90, 0xF0, 0x22, ++0xE4, 0xFF, 0x74, 0x18, 0xD1, 0xCA, 0xFE, 0x74, 0xC0, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, ++0x83, 0xEE, 0xF0, 0x74, 0x10, 0xD1, 0xCA, 0xFE, 0x74, 0xBA, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x81, ++0xF5, 0x83, 0xEE, 0xF0, 0x0F, 0xEF, 0xB4, 0x06, 0xD9, 0x22, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x06, ++0xF5, 0x83, 0xE0, 0x22, 0xEF, 0x60, 0x08, 0x90, 0x83, 0x92, 0xE0, 0xFF, 0x12, 0x6D, 0x27, 0x22, ++0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x22, 0xE4, 0x75, 0xF0, 0x01, ++0x12, 0x41, 0xF6, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x32, 0xAA, 0x90, 0x83, 0xF4, 0x12, 0x42, 0x65, ++0xE4, 0x90, 0x83, 0xF7, 0xF0, 0x22, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFE, 0xEF, 0x54, 0x07, ++0xFF, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x22, 0xE0, 0x90, 0x01, 0xBA, ++0xF0, 0x90, 0x81, 0x4E, 0xE0, 0x22, 0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, 0x7B, 0x01, 0x22, 0x7F, ++0x7C, 0x7E, 0x08, 0x12, 0x2D, 0x5C, 0xEC, 0x22, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, ++0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x22, 0x90, 0x81, 0x4A, 0xE0, 0xC4, 0x54, 0x0F, 0x22, ++0x90, 0x81, 0x52, 0xE0, 0x90, 0x05, 0x73, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, ++0x90, 0x84, 0x5D, 0xE0, 0xFF, 0x7D, 0x48, 0x22, 0x7F, 0x70, 0x7E, 0x0E, 0x02, 0x2E, 0xA2, 0x00, ++0x12, 0x97, ++}; ++u4Byte ArrayLength_MP_8188E_T_FW_WoWLAN = 16274; ++ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188E_T_FW_WoWLAN; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188E_T_FW_WoWLAN, ArrayLength_MP_8188E_T_FW_WoWLAN); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188E_T_FW_WoWLAN; ++} ++ ++ ++ ++#endif /* end of (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))*/ ++ ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_t_fw.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_t_fw.h +new file mode 100644 +index 0000000..8886068 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halhwimg8188e_t_fw.h +@@ -0,0 +1,73 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.7*/ ++#if (RTL8188E_T_SUPPORT == 1) ++#ifndef __INC_MP_FW_HW_IMG_8188E_T_H ++#define __INC_MP_FW_HW_IMG_8188E_T_H ++ ++ ++/****************************************************************************** ++* FW_AP.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_NIC.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_NIC_89EM.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_NIC_89EM( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_WoWLAN.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188E_T_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ap.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ap.c +new file mode 100644 +index 0000000..9642cc4 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ap.c +@@ -0,0 +1,3148 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "../mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++// 2010/04/25 MH Define the max tx power tracking tx agc power. ++#define ODM_TXPWRTRACK_MAX_IDX_88E 6 ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++ ++void setIqkMatrix_8188E( ++ PDM_ODM_T pDM_Odm, ++ u1Byte OFDM_index, ++ u1Byte RFPath, ++ s4Byte IqkResult_X, ++ s4Byte IqkResult_Y ++ ) ++{ ++ s4Byte ele_A=0, ele_D, ele_C=0, /*TempCCk,*/ value32; ++ ++ ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22; ++ ++ //new element A = element D x X ++ if((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) ++ { ++ if ((IqkResult_X & 0x00000200) != 0) //consider minus ++ IqkResult_X = IqkResult_X | 0xFFFFFC00; ++ ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((IqkResult_Y & 0x00000200) != 0) ++ IqkResult_Y = IqkResult_Y | 0xFFFFFC00; ++ ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF; ++ ++ if (RFPath == RF_PATH_A) ++ switch (RFPath) ++ { ++ case RF_PATH_A: ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, value32); ++ break; ++ case RF_PATH_B: ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, value32); ++ ++ break; ++ default: ++ break; ++ } ++ } ++ else ++ { ++ switch (RFPath) ++ { ++ case RF_PATH_A: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, 0x00); ++ break; ++ ++ case RF_PATH_B: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, 0x00); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", ++ (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y)); ++} ++ ++void DoIQK_8188E( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++#endif ++ ++ ODM_ResetIQKResult(pDM_Odm); ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#if USE_WORKITEM ++ PlatformAcquireMutex(&pHalData->mxChnlBwControl); ++#else ++ PlatformAcquireSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); ++#endif ++#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ PlatformAcquireMutex(&pHalData->mxChnlBwControl); ++#endif ++#endif ++ ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_IQCalibrate_8188E(pDM_Odm, FALSE); ++#else ++ PHY_IQCalibrate_8188E(Adapter, FALSE); ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#if USE_WORKITEM ++ PlatformReleaseMutex(&pHalData->mxChnlBwControl); ++#else ++ PlatformReleaseSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); ++#endif ++#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ PlatformReleaseMutex(&pHalData->mxChnlBwControl); ++#endif ++#endif ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: odm_TxPwrTrackSetPwr88E() ++ * ++ * Overview: 88E change all channel tx power accordign to flag. ++ * OFDM & CCK are all different. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 04/23/2012 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++ODM_TxPwrTrackSetPwr88E( ++ PDM_ODM_T pDM_Odm, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ) ++{ ++ if (Method == TXAGC) ++ { ++// u1Byte cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT]; ++// u1Byte BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT]; ++// u1Byte rf = 0; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) ++ u4Byte pwr = 0, TxAGC = 0; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel))); ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) ++ ++ #if (MP_DRIVER != 1) ++ PHY_SetTxPowerLevel8188E(pDM_Odm->Adapter, *pDM_Odm->pChannel); ++ #else ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += (pDM_Odm->BbSwingIdxCck - pDM_Odm->BbSwingIdxCckBase); ++ PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); ++ RTPRINT(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr88E: CCK Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += (pDM_Odm->BbSwingIdxOfdm[RF_PATH_A] - pDM_Odm->BbSwingIdxOfdmBase); ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ RTPRINT(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr88E: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ #endif ++ ++#endif ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); ++ PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); ++#endif ++ ++ } ++ else if (Method == BBSWING) ++ { ++ // Adjust BB swing by OFDM IQ matrix ++ if (RFPath == RF_PATH_A) ++ { ++ setIqkMatrix_8188E(pDM_Odm, pDM_Odm->RFCalibrateInfo.BbSwingIdxOfdm[RF_PATH_A], RF_PATH_A, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ } ++ else if (RFPath == RF_PATH_B) ++ { ++ setIqkMatrix_8188E(pDM_Odm, pDM_Odm->RFCalibrateInfo.BbSwingIdxOfdm[RF_PATH_B], RF_PATH_B, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][4], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][5]); ++ } ++ } ++ else ++ { ++ return; ++ } ++ ++ ++ // Adjust BB swing by CCK filter coefficient ++ if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14){ ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[pDM_Odm->RFCalibrateInfo.BbSwingIdxCck][7]); ++ } ++ ++} // odm_TxPwrTrackSetPwr88E ++ ++void ConfigureTxpowerTrack_8188E( ++ PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE; ++ pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE_92D; ++ pConfig->Threshold_IQK = 8; ++ pConfig->AverageThermalNum = AVG_THERMAL_NUM_88E; ++ pConfig->RfPathCount = 1; ++ pConfig->ThermalRegAddr = RF_T_METER_88E; ++ ++ pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr88E; ++ pConfig->DoIQK = DoIQK_8188E; ++ pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8188E; ++} ++ ++//1 7. IQK ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_IQK_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4; ++ u1Byte result = 0x00; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++#ifndef SMP_SYNC ++ unsigned long x; ++#endif ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ SAVE_INT_AND_CLI(x); ++#endif ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); ++ ++ //1 Tx IQK ++ //path-A IQK setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ SAVE_INT_AND_CLI(x); ++#else ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++#endif ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++// else //if Tx not OK, ignore Rx ++// return result; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++#endif ++ ++#if 0 ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); ++#endif ++ ++ return result; ++ ++ ++ } ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_RxIQK( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4, u4tmp; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++#ifndef SMP_SYNC ++ unsigned long x; ++#endif ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ SAVE_INT_AND_CLI(x); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); ++ ++ //1 Get TXIMR setting ++ //modify RXIQK mode table ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B ); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160804); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ SAVE_INT_AND_CLI(x); ++#else ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++#endif ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else { //if Tx not OK, ignore Rx ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++#endif ++ return result; ++ } ++ ++ u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); ++ ++ ++ //1 RX IQK ++ //modify RXIQK mode table ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa ); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x30008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160c05); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ SAVE_INT_AND_CLI(x); ++#else ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++#endif ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); ++ ++#if 0 ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++#endif ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++#endif ++ return result; ++ ++ ++} ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_IQK_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regEAC, regEB4, regEBC, regEC4, regECC; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); ++ ++ //One shot, path B LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000002); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regEB4 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeb4 = 0x%x\n", regEB4)); ++ regEBC= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xebc = 0x%x\n", regEBC)); ++ regEC4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xec4 = 0x%x\n", regEC4)); ++ regECC= ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xecc = 0x%x\n", regECC)); ++ ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else ++ return result; ++ ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); ++ ++ ++ return result; ++ ++} ++ ++VOID ++_PHY_PathAFillIQKMatrix( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u4Byte Oldval_0, X, TX0_A, reg; ++ s4Byte Y, TX0_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_0 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ ++ TX0_C = (Y * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); ++ ++ if(bTxOnly) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathAFillIQKMatrix only Tx OK\n")); ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++#if (DM_ODM_SUPPORT_TYPE==ODM_AP) ++ if( RTL_ABS(reg ,0x100) >= 16) ++ reg = 0x100; ++#endif ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][3] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); ++ } ++} ++ ++VOID ++_PHY_PathBFillIQKMatrix( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u4Byte Oldval_1, X, TX1_A, reg; ++ s4Byte Y, TX1_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_1 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ TX1_C = (Y * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); ++ ++ if(bTxOnly) ++ return; ++ ++ reg = result[final_candidate][6]; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][7] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ } ++} ++ ++// ++// 2011/07/26 MH Add an API for testing IQK fail case. ++// ++// MP Already declare in odm.c ++#if 0 // !(DM_ODM_SUPPORT_TYPE & ODM_WIN) //0824 ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++/* ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", ++ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++*/ ++ return TRUE; ++} ++#endif ++ ++VOID ++_PHY_SaveADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); ++ for( i = 0 ; i < RegisterNum ; i++){ ++ ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); ++ } ++} ++ ++ ++VOID ++_PHY_SaveMACRegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); ++ for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); ++ } ++ MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); ++ ++} ++ ++ ++VOID ++_PHY_ReloadADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegiesterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); ++ for(i = 0 ; i < RegiesterNum; i++) ++ { ++ ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); ++ } ++} ++ ++VOID ++_PHY_ReloadMACRegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); ++ for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); ++ } ++ ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); ++} ++ ++ ++VOID ++_PHY_PathADDAOn( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ) ++{ ++ u4Byte pathOn; ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); ++ ++ pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; ++ if(FALSE == is2T){ ++ pathOn = 0x0bdb25a0; ++ ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0); ++ } ++ else{ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn); ++ } ++ ++ for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[i], bMaskDWord, pathOn); ++ } ++ ++} ++ ++VOID ++_PHY_MACSettingCalibration( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); ++ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); ++ ++ for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); ++ } ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); ++ ++} ++ ++VOID ++_PHY_PathAStandBy( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++} ++ ++VOID ++_PHY_PIModeSwitch( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN PIMode ++ ) ++{ ++ u4Byte mode; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); ++ ++ mode = PIMode ? 0x01000100 : 0x01000000; ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); ++} ++ ++BOOLEAN ++phy_SimularityCompare_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ u4Byte i, j, diff, SimularityBitMap, bound = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = TRUE; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ BOOLEAN is2T = IS_92C_SERIAL( pHalData->VersionID); ++#else ++ BOOLEAN is2T = 0; ++#endif ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8188E c1 %d c2 %d!!!\n", c1, c2)); ++ ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); ++ if (diff > MAX_TOLERANCE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:phy_SimularityCompare_8188E differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i])); ++ ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1<odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u4Byte i; ++ u1Byte PathAOK, PathBOK; ++ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ //since 92C & 92D have the different define in IQK_BB_REG ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, /*rFPGA0_RFMOD*/ rCCK0_AFESetting ++ }; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#ifndef SMP_SYNC ++ unsigned long x; ++#endif ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ u4Byte retryCount = 2; ++#else ++#if MP_DRIVER ++ const u4Byte retryCount = 9; ++#else ++ const u4Byte retryCount = 2; ++#endif ++#endif ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ //u4Byte bbvalue; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#ifdef MP_TEST ++ if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ retryCount = 9; ++#endif ++ SAVE_INT_AND_CLI(x); ++#endif ++ ++ ++ if(t==0) ++ { ++// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); ++// RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ _PHY_SaveADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); ++#else ++ _PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T); ++#endif ++ ++ ++ if(t==0) ++ { ++ pDM_Odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch(pAdapter, TRUE); ++#else ++ _PHY_PIModeSwitch(pDM_Odm, TRUE); ++#endif ++ } ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++#else ++ _PHY_MACSettingCalibration(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++#endif ++ ++ //BB setting ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0x00); ++ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, bMaskDWord, (0x0f000000 | (ODM_GetBBReg(pDM_Odm, rCCK0_AFESetting, bMaskDWord))) ); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); ++ } ++ ++ //Page B init ++ //AP or IQK ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x0f600000); ++ } ++ ++ // IQ calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++#endif ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_IQK_8188E(pAdapter, is2T); ++#else ++ PathAOK = phy_PathA_IQK_8188E(pDM_Odm, is2T); ++#endif ++// if(PathAOK == 0x03){ ++ if(PathAOK == 0x01){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++#if 0 ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); ++ ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ } ++#endif ++ } ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_RxIQK(pAdapter, is2T); ++#else ++ PathAOK = phy_PathA_RxIQK(pDM_Odm, is2T); ++#endif ++ if(PathAOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); ++// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); ++ } ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ SAVE_INT_AND_CLI(x); ++#endif ++ ++ if(0x00 == PathAOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); ++ } ++ ++ if(is2T){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PathAStandBy(pAdapter); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); ++#else ++ _PHY_PathAStandBy(pDM_Odm); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T); ++#endif ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathBOK = phy_PathB_IQK_8188E(pAdapter); ++#else ++ PathBOK = phy_PathB_IQK_8188E(pDM_Odm); ++#endif ++ if(PathBOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Only Tx IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathBOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ++ if(t!=0) ++ { ++ if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch(pAdapter, FALSE); ++#else ++ _PHY_PIModeSwitch(pDM_Odm, FALSE); ++#endif ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ ++ ++ // Restore RX initial gain ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); ++ if(is2T){ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); ++ } ++ ++ //load 0xe30 IQC default value ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8188E() <==\n")); ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RESTORE_INT(x); ++#endif ++ ++} ++ ++ ++VOID ++phy_LCCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++ u1Byte tmpReg; ++ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++#ifndef SMP_SYNC ++ unsigned long x; ++#endif ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ SAVE_INT_AND_CLI(x); ++#endif ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ //Check continuous TX and Packet TX ++ tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ ;// ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask20Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask20Bits); ++#else ++ RF_Amode = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask20Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = ODM_GetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits); ++#endif ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask20Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask20Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask20Bits); ++#else ++ LC_Cal = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask20Bits); ++#endif ++ ++ //4. Set LC calibration begin bit15 ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask20Bits, LC_Cal|0x08000); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ RESTORE_INT(x); ++ ODM_delay_ms(100); ++ SAVE_INT_AND_CLI(x); ++#else ++ ODM_delay_ms(100); ++#endif ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ //ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask20Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask20Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); ++ } ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ RESTORE_INT(x); ++#endif ++} ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++VOID ++phy_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u4Byte regD[PATH_NUM]; ++ u4Byte tmpReg, index, offset, apkbound; ++ u1Byte path, i, pathbound = PATH_NUM; ++ u4Byte BB_backup[APK_BB_REG_NUM]; ++ u4Byte BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u4Byte APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u4Byte APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u4Byte APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u4Byte APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u4Byte APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u4Byte APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ s4Byte BB_offset, delta_V, delta_offset; ++ ++#if MP_DRIVER == 1 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++#else ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++#endif ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if MP_DRIVER != 1 ++ return; ++#endif ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_SaveMACRegisters(pDM_Odm, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ++ ++ if(path == RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ } ++ else if(path == RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ } ++ ++ //save RF default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); ++#else ++ regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); ++#endif ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_MACSettingCalibration(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ if(path == RF_PATH_A) //Path B to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pDM_Odm->RFCalibrateInfo.bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++ ODM_SetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord, 0x8992e); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); ++#else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); ++#endif ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ { ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ODM_delay_ms(3); ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ++ ODM_delay_ms(20); ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ++ if(path == RF_PATH_A) ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); ++ else ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_ReloadADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, path, 0xd, bMaskDWord, regD[path]); ++ if(path == RF_PATH_B) ++ { ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, path, 0x3, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == RF_PATH_A) ++ ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(!IS_HARDWARE_TYPE_8723A(pAdapter)) ++ ODM_SetRFReg(pDM_Odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord, ++ ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++#endif ++ } ++ ++ pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n")); ++} ++ ++ ++ ++#define DP_BB_REG_NUM 7 ++#define DP_RF_REG_NUM 1 ++#define DP_RETRY_LIMIT 10 ++#define DP_PATH_NUM 2 ++#define DP_DPK_NUM 3 ++#define DP_DPK_VALUE_NUM 2 ++ ++ ++ ++ ++VOID ++PHY_IQCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bReCovery ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ ++ s4Byte result[4][8]; //last is final result ++ u1Byte i, final_candidate, Indexforchannel; ++// u1Byte channelToIQK = 7; ++ BOOLEAN bPathAOK, bPathBOK; ++ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN /*bStartContTx = FALSE,*/ bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) ) ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#else ++#ifndef SMP_SYNC ++ unsigned long x; ++#endif ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++#ifdef MP_TEST ++ if(priv->pshare->rf_ft_var.mp_specific) ++ { ++ if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) ++ return; ++ } ++#endif ++ ++ if(priv->pshare->IQK_88E_done) ++ bReCovery= 1; ++ priv->pshare->IQK_88E_done = 1; ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if MP_DRIVER == 1 ++// bStartContTx = pMptCtx->bStartContTx; ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++#endif ++ ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if(bReCovery) ++#else//for ODM_WIN ++ if(bReCovery && (!pAdapter->bInHctTest)) //YJ,add for PowerTest,120405 ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8188E: Return due to bReCovery!\n")); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#else ++ _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#endif ++ return; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); ++ priv->pshare->IQK_total_cnt++; ++#if 0//Suggested by Edlu,120413 ++ ++ // IQK on channel 7, should switch back when completed. ++ //originChannel = pHalData->CurrentChannel; ++ originChannel = *(pDM_Odm->pChannel); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, channelToIQK); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pAdapter->HalFunc.set_channel_handler(pAdapter, channelToIQK); ++#endif ++ ++#endif ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = FALSE; ++ bPathBOK = FALSE; ++ is12simular = FALSE; ++ is23simular = FALSE; ++ is13simular = FALSE; ++ ++ ++ for (i=0; i<3; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)) ++ { ++ phy_IQCalibrate_8188E(pAdapter, result, i, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_IQCalibrate_8188E(pAdapter, result, i, FALSE); ++#else ++ phy_IQCalibrate_8188E(pDM_Odm, result, i, FALSE); ++#endif ++ } ++ ++ if(i == 1) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is12simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 1); ++#else ++ is12simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 1); ++#endif ++ if(is12simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n",final_candidate)); ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is13simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 2); ++#else ++ is13simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 2); ++#endif ++ if(is13simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n",final_candidate)); ++ ++ break; ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is23simular = phy_SimularityCompare_8188E(pAdapter, result, 1, 2); ++#else ++ is23simular = phy_SimularityCompare_8188E(pDM_Odm, result, 1, 2); ++#endif ++ if(is23simular) ++ { ++ final_candidate = 1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); ++ } ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ SAVE_INT_AND_CLI(x); ++#endif ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pDM_Odm->RFCalibrateInfo.RegE94 = RegE94 = result[final_candidate][0]; ++ pDM_Odm->RFCalibrateInfo.RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pDM_Odm->RFCalibrateInfo.RegEB4 = RegEB4 = result[final_candidate][4]; ++ pDM_Odm->RFCalibrateInfo.RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ bPathAOK = bPathBOK = TRUE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); ++ ++ pDM_Odm->RFCalibrateInfo.RegE94 = pDM_Odm->RFCalibrateInfo.RegEB4 = 0x100; //X default value ++ pDM_Odm->RFCalibrateInfo.RegE9C = pDM_Odm->RFCalibrateInfo.RegEBC = 0x0; //Y default value ++ priv->pshare->IQK_fail_cnt++; ++ } ++ ++ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#else ++ _PHY_PathAFillIQKMatrix(pDM_Odm, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#endif ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) ++ { ++ _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ } ++ } ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); ++#else ++ Indexforchannel = 0; ++#endif ++ ++//To Fix BSOD when final_candidate is 0xff ++//by sherry 20120321 ++ if(final_candidate < 4) ++ { ++ for(i = 0; i < IQK_Matrix_REG_NUM; i++) ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; ++ } ++ //RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#else ++ _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, IQK_BB_REG_NUM); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); ++#if 0 //Suggested by Edlu,120413 ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, originChannel); ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pAdapter->HalFunc.set_channel_handler(pAdapter, originChannel); ++ #endif ++ ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ RESTORE_INT(x); ++#endif ++ ++} ++ ++ ++VOID ++PHY_LCCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ BOOLEAN /*bStartContTx = FALSE,*/ bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte timeout = 2000, timecount = 0; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ ++ ++ ++ ++#if MP_DRIVER == 1 ++// bStartContTx = pMptCtx->bStartContTx; ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++#endif ++ ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++ while(*(pDM_Odm->pbScanInProcess) && timecount < timeout) ++ { ++ ODM_delay_ms(50); ++ timecount += 50; ++ } ++ ++ pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE; ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(IS_2T2R(pHalData->VersionID)) ++ { ++ phy_LCCalibrate_8188E(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_LCCalibrate_8188E(pAdapter, FALSE); ++#else ++ phy_LCCalibrate_8188E(pDM_Odm, FALSE); ++#endif ++ } ++ ++ pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); ++ ++} ++ ++VOID ++PHY_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++#if 0 ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if FOR_BRAZIL_PRETEST != 1 ++ if(pDM_Odm->RFCalibrateInfo.bAPKdone) ++#endif ++ return; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_APCalibrate_8188E(pAdapter, delta, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_APCalibrate_8188E(pAdapter, delta, FALSE); ++#else ++ phy_APCalibrate_8188E(pDM_Odm, delta, FALSE); ++#endif ++ } ++#endif ++} ++VOID phy_SetRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if(!pAdapter->bHWInitReady) ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(pAdapter->hw_init_completed == _FALSE) ++ #endif ++ { ++ u1Byte u1bTmp; ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; ++ ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); ++ //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++#endif ++ ++ if(is2T) //92C ++ { ++ if(bMain) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A ++ else ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT ++ } ++ else //88C ++ { ++ ++ // <20120504, Kordan> [8188E] We should make AntDiversity controlled by HW (0x870[9:8] = 0), ++ // otherwise the following action has no effect. (0x860[9:8] has the effect only if AntDiversity controlled by SW) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT8|BIT9, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0x914, bMaskLWord, 0x0201); // Set up the Ant mapping table ++ ++ if(bMain) ++ { ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); // Tx Main (SW control)(The right antenna) ++ //4 [ Tx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT14|BIT13|BIT12, 0x1); // Tx Main (HW control)(The right antenna) ++ ++ //4 [ Rx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3, 0x1); // AntDivType = TRDiv, right antenna ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ ODM_SetBBReg(pDM_Odm, rConfig_ram64x16, BIT31, 0x1); // RxCG, Default is RxCG. AntDivType = 2RDiv, left antenna ++ ++ } ++ else ++ { ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); // Tx Aux (SW control)(The left antenna) ++ //4 [ Tx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT14|BIT13|BIT12, 0x0); // Tx Aux (HW control)(The left antenna) ++ ++ //4 [ Rx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3, 0x0); // AntDivType = TRDiv, left antenna ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ ODM_SetBBReg(pDM_Odm, rConfig_ram64x16, BIT31, 0x0); // RxCS, AntDivType = 2RDiv, right antenna ++ } ++ ++ } ++} ++VOID PHY_SetRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++#endif ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ phy_SetRFPathSwitch_8188E(pAdapter, bMain, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE); ++#else ++ phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE); ++#endif ++ } ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++//digital predistortion ++VOID ++phy_DigitalPredistortion( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter, ++#else ++ IN PDM_ODM_T pDM_Odm, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if (RT_PLATFORM == PLATFORM_WINDOWS) ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ u4Byte tmpReg, tmpReg2, index, i; ++ u1Byte path, pathbound = PATH_NUM; ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte BB_backup[DP_BB_REG_NUM]; ++ u4Byte BB_REG[DP_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE}; ++ u4Byte BB_settings[DP_BB_REG_NUM] = { ++ 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, ++ 0x0, 0x0, 0x0}; ++ ++ u4Byte RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; ++ u4Byte RF_REG[DP_RF_REG_NUM] = { ++ RF_TXBIAS_A}; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { ++ {0x1e1e1e1e, 0x03901e1e}, ++ {0x18181818, 0x03901818}, ++ {0x0e0e0e0e, 0x03900e0e} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u1Byte RetryCount = 0; ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion()\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion for %s %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ //save BB default value ++ for(index=0; index tx_agc 1f ~11 ++ // PA gain = 11 & PAD2 => tx_agc 10~0e ++ // PA gain = 01 => tx_agc 0b~0d ++ // PA gain = 00 => tx_agc 0a~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ //PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434); ++ ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434); ++ ++ //==================================== ++ // PAGE_B for Path-A DPK setting ++ //==================================== ++ // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //rf_lpbk_setup ++ //1.rf 00:5205a, rf 0d:0e52c ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bMaskDWord, 0x5205a ); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathAOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord); ++ ODM_delay_ms(10); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord); ++ ODM_delay_ms(10); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n")); ++ pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE; ++ break; ++ } ++ } ++ RetryCount = 0; ++ ++ //DPP path A ++ if(pDM_Odm->RFCalibrateInfo.bDPPathAOK) ++ { ++ // DP settings ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ for(i=rPdp_AntA; i<=0xb3c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i)); ++ } ++ ++ //pwsf ++ ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040); ++ ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920); ++ ++ for(i=0xb4c; i<=0xb5c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ //TX_AGC boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000); ++ } ++ ++ //DPK path B ++ if(is2T) ++ { ++ //Path A to standby mode ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ++ // LUTs => tx_agc ++ // PA gain = 11 & PAD1, => tx_agc 1f ~11 ++ // PA gain = 11 & PAD2, => tx_agc 10 ~0e ++ // PA gain = 01 => tx_agc 0b ~0d ++ // PA gain = 00 => tx_agc 0a ~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path B ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ // PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434); ++ ++ // PAGE_B for Path-B DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ // RF lpbk switches on ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103); ++ ++ //Path-B RF lpbk ++ ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x5205a); ++ ++ //----send one shot signal----// ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathBOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n")); ++ pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE; ++ break; ++ } ++ } ++ ++ //DPP path B ++ if(pDM_Odm->RFCalibrateInfo.bDPPathBOK) ++ { ++ // DP setting ++ // LUT by SRAM ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ for(i=0xb60; i<=0xb9c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i)); ++ } ++ ++ // PWSF ++ ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050); ++ ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920); ++ ++ for(i=0xbac; i<=0xbbc; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ // tx_agc boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0); ++ ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000); ++ } ++ } ++ ++ //reload BB default value ++ for(index=0; indexRFCalibrateInfo.bDPdone = TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion()\n")); ++#endif ++} ++ ++VOID ++PHY_DigitalPredistortion_8188E( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter ++#else ++ IN PDM_ODM_T pDM_Odm ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++ ++ if(pDM_Odm->RFCalibrateInfo.bDPdone) ++ return; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_DigitalPredistortion(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++ phy_DigitalPredistortion(pAdapter, FALSE); ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++ ++BOOLEAN phy_QueryRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ if(!pAdapter->bHWInitReady) ++ { ++ u1Byte u1bTmp; ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; ++ ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); ++ //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) // ++ { ++ if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) ++ return TRUE; ++ else ++ return FALSE; ++ } ++ else ++ { ++ if((ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3) == 0x1)) ++ return TRUE; ++ else ++ return FALSE; ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++BOOLEAN PHY_QueryRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++#ifdef DISABLE_BB_RF ++ return TRUE; ++#endif ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ //if(IS_92C_SERIAL( pHalData->VersionID)){ ++ if(IS_2T2R( pHalData->VersionID)){ ++ return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE); ++#else ++ return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE); ++#endif ++ } ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ap.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ap.h +new file mode 100644 +index 0000000..2f05e22 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ap.h +@@ -0,0 +1,136 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL_PHY_RF_8188E_H__ ++#define __HAL_PHY_RF_8188E_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define IQK_DELAY_TIME_88E 10 //ms ++#define index_mapping_NUM_88E 15 ++#define AVG_THERMAL_NUM_88E 4 ++ ++#include "../halphyrf_ap.h" ++ ++void ConfigureTxpowerTrack_8188E( ++ PTXPWRTRACK_CFG pConfig ++ ); ++ ++void DoIQK_8188E( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ); ++ ++VOID ++ODM_TxPwrTrackSetPwr88E( ++ PDM_ODM_T pDM_Odm, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ); ++ ++//1 7. IQK ++ ++void ++PHY_IQCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER Adapter, ++#endif ++ IN BOOLEAN bReCovery); ++ ++ ++// ++// LC calibrate ++// ++void ++PHY_LCCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++); ++ ++// ++// AP calibrate ++// ++void ++PHY_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta); ++void ++PHY_DigitalPredistortion_8188E( IN PADAPTER pAdapter); ++ ++ ++VOID ++_PHY_SaveADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ); ++ ++VOID ++_PHY_PathADDAOn( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ); ++ ++VOID ++_PHY_MACSettingCalibration( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ); ++ ++ ++VOID ++_PHY_PathAStandBy( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ); ++ ++ ++#endif // #ifndef __HAL_PHY_RF_8188E_H__ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ce.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ce.c +new file mode 100644 +index 0000000..22aa1ff +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ce.c +@@ -0,0 +1,3271 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++// 2010/04/25 MH Define the max tx power tracking tx agc power. ++#define ODM_TXPWRTRACK_MAX_IDX_88E 6 ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++ ++void setIqkMatrix_8188E( ++ PDM_ODM_T pDM_Odm, ++ u1Byte OFDM_index, ++ u1Byte RFPath, ++ s4Byte IqkResult_X, ++ s4Byte IqkResult_Y ++ ) ++{ ++ s4Byte ele_A=0, ele_D, ele_C=0, value32; ++ ++ ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22; ++ ++ //new element A = element D x X ++ if((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) ++ { ++ if ((IqkResult_X & 0x00000200) != 0) //consider minus ++ IqkResult_X = IqkResult_X | 0xFFFFFC00; ++ ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((IqkResult_Y & 0x00000200) != 0) ++ IqkResult_Y = IqkResult_Y | 0xFFFFFC00; ++ ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF; ++ ++ //if (RFPath == ODM_RF_PATH_A) ++ switch (RFPath) ++ { ++ case ODM_RF_PATH_A: ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, value32); ++ break; ++ case ODM_RF_PATH_B: ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, value32); ++ ++ break; ++ default: ++ break; ++ } ++ } ++ else ++ { ++ switch (RFPath) ++ { ++ case ODM_RF_PATH_A: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, 0x00); ++ break; ++ ++ case ODM_RF_PATH_B: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, 0x00); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", ++ (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y)); ++} ++ ++void DoIQK_8188E( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++#endif ++ ++ ODM_ResetIQKResult(pDM_Odm); ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#if USE_WORKITEM ++ PlatformAcquireMutex(&pHalData->mxChnlBwControl); ++#else ++ PlatformAcquireSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); ++#endif ++#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ PlatformAcquireMutex(&pHalData->mxChnlBwControl); ++#endif ++#endif ++ ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_IQCalibrate_8188E(pDM_Odm, FALSE); ++#else ++ PHY_IQCalibrate_8188E(Adapter, FALSE); ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#if USE_WORKITEM ++ PlatformReleaseMutex(&pHalData->mxChnlBwControl); ++#else ++ PlatformReleaseSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); ++#endif ++#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ PlatformReleaseMutex(&pHalData->mxChnlBwControl); ++#endif ++#endif ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: odm_TxPwrTrackSetPwr88E() ++ * ++ * Overview: 88E change all channel tx power accordign to flag. ++ * OFDM & CCK are all different. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 04/23/2012 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++ODM_TxPwrTrackSetPwr88E( ++ IN PVOID pDM_VOID, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ u1Byte PwrTrackingLimit_OFDM = 30; //+0dB ++ u1Byte PwrTrackingLimit_CCK= 28; //-2dB ++ u1Byte TxRate = 0xFF; ++ u1Byte Final_OFDM_Swing_Index = 0; ++ u1Byte Final_CCK_Swing_Index = 0; ++ u1Byte i = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ if (pDM_Odm->mp_mode == TRUE) ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); ++ #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ #endif ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++#endif ++ } ++ else ++ { ++ u2Byte rate = *(pDM_Odm->pForcedDataRate); ++ ++ if(!rate) //auto rate ++ { ++ if(pDM_Odm->TxRate != 0xFF) ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ TxRate = HwRateToMRate(pDM_Odm->TxRate); ++ #endif ++ } ++ else //force rate ++ { ++ TxRate = (u1Byte)rate; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>ODM_TxPwrTrackSetPwr8723B\n")); ++ ++ if(TxRate != 0xFF) ++ { ++ //2 CCK ++ if((TxRate >= MGN_1M)&&(TxRate <= MGN_11M)) ++ PwrTrackingLimit_CCK = 28; //-2dB ++ //2 OFDM ++ else if((TxRate >= MGN_6M)&&(TxRate <= MGN_48M)) ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if(TxRate == MGN_54M) ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ //2 HT ++ else if((TxRate >= MGN_MCS0)&&(TxRate <= MGN_MCS2)) //QPSK/BPSK ++ PwrTrackingLimit_OFDM= 38; //+4dB ++ else if((TxRate >= MGN_MCS3)&&(TxRate <= MGN_MCS4)) //16QAM ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if((TxRate >= MGN_MCS5)&&(TxRate <= MGN_MCS7)) //64QAM ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ else ++ PwrTrackingLimit_OFDM = pRFCalibrateInfo->DefaultOfdmIndex; /*Default OFDM index = 30*/ ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxRate=0x%x, PwrTrackingLimit=%d\n", TxRate, PwrTrackingLimit_OFDM)); ++ ++ if (Method == TXAGC) ++ { ++ u4Byte pwr = 0, TxAGC = 0; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; /*Remnant index equal to aboslute compensate value.*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel))); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) ++ ++ if (pDM_Odm->mp_mode == TRUE) ++ { ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A]; ++ PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskH3Bytes, TxAGC); ++ //RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr88E: CCK Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[ODM_RF_PATH_A] - pRFCalibrateInfo->BbSwingIdxOfdmBase[RF_PATH_A]); ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ //RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr88E: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ } ++ else ++ { ++ //PHY_SetTxPowerLevel8188E(pDM_Odm->Adapter, *pDM_Odm->pChannel); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ if (RFPath == ODM_RF_PATH_A) ++ { ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ } ++ } ++ ++ ++#endif ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ //PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); ++ //PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); ++#endif ++ ++ } ++ else if (Method == BBSWING) ++ { ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ if (Final_OFDM_Swing_Index >= PwrTrackingLimit_OFDM) ++ Final_OFDM_Swing_Index = PwrTrackingLimit_OFDM; ++ else if (Final_OFDM_Swing_Index <= 0) ++ Final_OFDM_Swing_Index = 0; ++ ++ if (Final_CCK_Swing_Index >= CCK_TABLE_SIZE) ++ Final_CCK_Swing_Index = CCK_TABLE_SIZE-1; ++ else if (pRFCalibrateInfo->BbSwingIdxCck <= 0) ++ Final_CCK_Swing_Index = 0; ++ ++ // Adjust BB swing by OFDM IQ matrix ++ if (RFPath == ODM_RF_PATH_A) ++ { ++ setIqkMatrix_8188E(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_A, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ // Adjust BB swing by CCK filter coefficient ++ if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14){ ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][7]); ++ } ++ } ++ } ++ else if (Method == MIX_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("pRFCalibrateInfo->DefaultOfdmIndex=%d, pDM_Odm->DefaultCCKIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", ++ pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->DefaultCckIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath)); ++ ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ if(Final_OFDM_Swing_Index > PwrTrackingLimit_OFDM ) //BBSwing higher then Limit ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index - PwrTrackingLimit_OFDM; ++ ++ setIqkMatrix_8188E(pDM_Odm, PwrTrackingLimit_OFDM, ODM_RF_PATH_A, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d\n", PwrTrackingLimit_OFDM, pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else if (Final_OFDM_Swing_Index <= 0) ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index; ++ ++ setIqkMatrix_8188E(pDM_Odm, 0, ODM_RF_PATH_A, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d\n", pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else ++ { ++ setIqkMatrix_8188E(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_A, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d\n", Final_OFDM_Swing_Index)); ++ ++ if (pRFCalibrateInfo->Modify_TxAGC_Flag_PathA) /*If TxAGC has changed, reset TxAGC again*/ ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = 0; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A pDM_Odm->Modify_TxAGC_Flag = FALSE\n")); ++ } ++ } ++ ++ if(Final_CCK_Swing_Index > PwrTrackingLimit_CCK) ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index - PwrTrackingLimit_CCK; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A CCK Over Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d\n", PwrTrackingLimit_CCK, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ ++ // Adjust BB swing by CCK filter coefficient ++ ++ if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][7]); ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK); ++ ++ } ++ else if(Final_CCK_Swing_Index <= 0) // Lowest CCK Index = 0 ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A CCK Under Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d\n", 0, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ ++ if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[0][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[0][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[0][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[0][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[0][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[0][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[0][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[0][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[0][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[0][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[0][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[0][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[0][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[0][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[0][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[0][7]); ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK); ++ ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A CCK Compensate with BBSwing , Final_CCK_Swing_Index = %d \n", Final_CCK_Swing_Index)); ++ ++ if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][7]); ++ } ++ ++ if (pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK) /*If TxAGC has changed, reset TxAGC again*/ ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A pDM_Odm->Modify_TxAGC_Flag_CCK = FALSE\n")); ++ } ++ } ++ } ++ else ++ { ++ return; ++ } ++} // odm_TxPwrTrackSetPwr88E ++ ++VOID ++GetDeltaSwingTable_8188E( ++ IN PVOID pDM_VOID, ++ OUT pu1Byte *TemperatureUP_A, ++ OUT pu1Byte *TemperatureDOWN_A, ++ OUT pu1Byte *TemperatureUP_B, ++ OUT pu1Byte *TemperatureDOWN_B ++ ) ++{ ++ *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; ++ *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; ++ *TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; ++ *TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; ++} ++ ++void ConfigureTxpowerTrack_8188E( ++ PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE; ++ pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE; ++ pConfig->Threshold_IQK = IQK_THRESHOLD; ++ pConfig->AverageThermalNum = AVG_THERMAL_NUM_88E; ++ pConfig->RfPathCount = MAX_PATH_NUM_8188E; ++ pConfig->ThermalRegAddr = RF_T_METER_88E; ++ ++ pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr88E; ++ pConfig->DoIQK = DoIQK_8188E; ++ pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8188E; ++ pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8188E; ++} ++ ++//1 7. IQK ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_IQK_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); ++ ++ //1 Tx IQK ++ //path-A IQK setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++#if 0 ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RT_DISP(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); ++#endif ++ ++ return result; ++ ++ ++ } ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_RxIQK( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4, u4tmp; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); ++ ++ //1 Get TXIMR setting ++ //modify RXIQK mode table ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B ); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160804); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); ++ ++ ++ //1 RX IQK ++ //modify RXIQK mode table ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa ); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x30008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160c05); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); ++ ++#if 0 ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++#endif ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); ++ ++ return result; ++ ++ ++} ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_IQK_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regEAC, regEB4, regEBC, regEC4, regECC; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); ++ ++ //One shot, path B LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000002); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regEB4 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeb4 = 0x%x\n", regEB4)); ++ regEBC= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xebc = 0x%x\n", regEBC)); ++ regEC4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xec4 = 0x%x\n", regEC4)); ++ regECC= ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xecc = 0x%x\n", regECC)); ++ ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else ++ return result; ++ ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); ++ ++ ++ return result; ++ ++} ++ ++VOID ++_PHY_PathAFillIQKMatrix( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u4Byte Oldval_0, X, TX0_A, reg; ++ s4Byte Y, TX0_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_0 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ ++ TX0_C = (Y * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); ++ ++ if(bTxOnly) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathAFillIQKMatrix only Tx OK\n")); ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++#if (DM_ODM_SUPPORT_TYPE==ODM_AP) ++ if( RTL_ABS(reg ,0x100) >= 16) ++ reg = 0x100; ++#endif ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][3] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); ++ } ++} ++ ++VOID ++_PHY_PathBFillIQKMatrix( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u4Byte Oldval_1, X, TX1_A, reg; ++ s4Byte Y, TX1_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_1 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ TX1_C = (Y * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); ++ ++ if(bTxOnly) ++ return; ++ ++ reg = result[final_candidate][6]; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][7] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ } ++} ++ ++// ++// 2011/07/26 MH Add an API for testing IQK fail case. ++// ++// MP Already declare in odm.c ++#if !(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++/* ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ rtw_hal_get_hwreg(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if (rtw_is_drv_stopped(padapter) || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to drv_stop: %s /%d/%d\n", ++ rtw_is_drv_stopped(padapter)?"True":"False", Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++*/ ++ return TRUE; ++} ++#endif ++ ++VOID ++_PHY_SaveADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); ++ for( i = 0 ; i < RegisterNum ; i++){ ++ ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); ++ } ++} ++ ++ ++VOID ++_PHY_SaveMACRegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); ++ for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); ++ } ++ MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); ++ ++} ++ ++ ++VOID ++_PHY_ReloadADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegiesterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); ++ for(i = 0 ; i < RegiesterNum; i++) ++ { ++ ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); ++ } ++} ++ ++VOID ++_PHY_ReloadMACRegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); ++ for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); ++ } ++ ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); ++} ++ ++ ++VOID ++_PHY_PathADDAOn( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ) ++{ ++ u4Byte pathOn; ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); ++ ++ pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; ++ if(FALSE == is2T){ ++ pathOn = 0x0bdb25a0; ++ ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0); ++ } ++ else{ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn); ++ } ++ ++ for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[i], bMaskDWord, pathOn); ++ } ++ ++} ++ ++VOID ++_PHY_MACSettingCalibration( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); ++ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); ++ ++ for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); ++ } ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); ++ ++} ++ ++VOID ++_PHY_PathAStandBy( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++} ++ ++VOID ++_PHY_PIModeSwitch( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN PIMode ++ ) ++{ ++ u4Byte mode; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); ++ ++ mode = PIMode ? 0x01000100 : 0x01000000; ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); ++} ++ ++BOOLEAN ++phy_SimularityCompare_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ u4Byte i, j, diff, SimularityBitMap, bound = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = TRUE; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ BOOLEAN is2T = IS_2T2R( pHalData->VersionID); ++#else ++ BOOLEAN is2T = 0; ++#endif ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8188E c1 %d c2 %d!!!\n", c1, c2)); ++ ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); ++ if (diff > MAX_TOLERANCE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:phy_SimularityCompare_8188E differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i])); ++ ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1<odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u4Byte i; ++ u1Byte PathAOK=0, PathBOK=0; ++ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ //since 92C & 92D have the different define in IQK_BB_REG ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, rCCK0_AFESetting ++ }; ++ ++ u4Byte retryCount = 2; ++ ++ if (pDM_Odm->mp_mode == TRUE) ++ retryCount = 9; ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ //u4Byte bbvalue; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#ifdef MP_TEST ++ if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ retryCount = 9; ++#endif ++#endif ++ ++ ++ if(t==0) ++ { ++// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); ++// RT_DISP(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ _PHY_SaveADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); ++#else ++ _PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T); ++#endif ++ ++ ++ if(t==0) ++ { ++ pDM_Odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch(pAdapter, TRUE); ++#else ++ _PHY_PIModeSwitch(pDM_Odm, TRUE); ++#endif ++ } ++ ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++#else ++ _PHY_MACSettingCalibration(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++#endif ++ ++ //BB setting ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0x00); ++ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, 0x0f000000, 0xf); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); ++ } ++ ++ //Page B init ++ //AP or IQK ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x0f600000); ++ } ++ ++ // IQ calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_IQK_8188E(pAdapter, is2T); ++#else ++ PathAOK = phy_PathA_IQK_8188E(pDM_Odm, is2T); ++#endif ++// if(PathAOK == 0x03){ ++ if(PathAOK == 0x01){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++#if 0 ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ RT_DISP(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); ++ ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ } ++#endif ++ } ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_RxIQK(pAdapter, is2T); ++#else ++ PathAOK = phy_PathA_RxIQK(pDM_Odm, is2T); ++#endif ++ if(PathAOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); ++// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); ++ } ++ } ++ ++ if(0x00 == PathAOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); ++ } ++ ++ if(is2T){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PathAStandBy(pAdapter); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); ++#else ++ _PHY_PathAStandBy(pDM_Odm); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T); ++#endif ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathBOK = phy_PathB_IQK_8188E(pAdapter); ++#else ++ PathBOK = phy_PathB_IQK_8188E(pDM_Odm); ++#endif ++ if(PathBOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Only Tx IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathBOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0); ++ ++ if(t!=0) ++ { ++ if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch(pAdapter, FALSE); ++#else ++ _PHY_PIModeSwitch(pDM_Odm, FALSE); ++#endif ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ ++ ++ // Restore RX initial gain ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); ++ if(is2T){ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); ++ } ++ ++ //load 0xe30 IQC default value ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8188E() <==\n")); ++ ++} ++ ++ ++VOID ++phy_LCCalibrate_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN BOOLEAN is2T ++ ) ++{ ++ u1Byte tmpReg; ++ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++#endif ++ //Check continuous TX and Packet TX ++ tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RF_Amode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#else ++ RF_Amode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#endif ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ LC_Cal = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#else ++ LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#endif ++ ++ //4. Set LC calibration begin bit15 ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); ++ ++ ODM_delay_ms(100); ++ ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); ++ } ++} ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++VOID ++phy_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u4Byte regD[PATH_NUM]; ++ u4Byte tmpReg, index, offset, apkbound; ++ u1Byte path, i, pathbound = PATH_NUM; ++ u4Byte BB_backup[APK_BB_REG_NUM]; ++ u4Byte BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u4Byte APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u4Byte APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u4Byte APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u4Byte APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u4Byte APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u4Byte APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ s4Byte BB_offset, delta_V, delta_offset; ++ ++#if MP_DRIVER == 1 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++#else ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++#endif ++ ++ if (pDM_Odm->mp_mode == TRUE) ++ { ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++ } ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++//#if MP_DRIVER != 1 ++ if (pDM_Odm->mp_mode == FALSE) ++ return; ++//#endif ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_SaveMACRegisters(pDM_Odm, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ++ ++ if(path == ODM_RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ } ++ else if(path == ODM_RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#else ++ PHY_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#endif ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0); ++ } ++ ++ //save RF default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); ++#else ++ regD[path] = ODM_GetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_TXBIAS_A, bMaskDWord); ++#endif ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_MACSettingCalibration(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ if(path == ODM_RF_PATH_A) //Path B to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pDM_Odm->RFCalibrateInfo.bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_IPA_A, bMaskDWord, 0x8992e); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); ++#else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); ++#endif ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); ++ { ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ODM_delay_ms(3); ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ++ ODM_delay_ms(20); ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ if(path == ODM_RF_PATH_A) ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); ++ else ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_ReloadADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]); ++ if(path == ODM_RF_PATH_B) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x3, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == ODM_RF_PATH_A) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(!IS_HARDWARE_TYPE_8723A(pAdapter)) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bMaskDWord, ++ ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++#endif ++ } ++ ++ pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n")); ++} ++ ++ ++ ++#define DP_BB_REG_NUM 7 ++#define DP_RF_REG_NUM 1 ++#define DP_RETRY_LIMIT 10 ++#define DP_PATH_NUM 2 ++#define DP_DPK_NUM 3 ++#define DP_DPK_VALUE_NUM 2 ++ ++ ++ ++ ++ ++VOID ++PHY_IQCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bReCovery ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ ++ s4Byte result[4][8]; //last is final result ++ u1Byte i, final_candidate, Indexforchannel; ++ u1Byte channelToIQK = 7; ++ BOOLEAN bPathAOK, bPathBOK; ++ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++ u4Byte StartTime; ++ s4Byte ProgressingTime; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) ) ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#else ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++#ifdef MP_TEST ++ if(priv->pshare->rf_ft_var.mp_specific) ++ { ++ if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) ++ return; ++ } ++#endif ++ ++ if(priv->pshare->IQK_88E_done) ++ bReCovery= 1; ++ priv->pshare->IQK_88E_done = 1; ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if MP_DRIVER == 1 ++ if (pDM_Odm->mp_mode == TRUE) ++ { ++ bStartContTx = pMptCtx->bStartContTx; ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++ } ++#endif ++ ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if (pDM_Odm->RFCalibrateInfo.bIQKInProgress) ++ return; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if (bReCovery) ++#else//for ODM_WIN ++ if (bReCovery && (!pAdapter->bInHctTest)) /* YJ,add for PowerTest,120405 */ ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8188E: Return due to bReCovery!\n")); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#else ++ _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#endif ++ return; ++ } ++ ++ ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.bIQKInProgress = TRUE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ ++ ++ ++ StartTime = ODM_GetCurrentTime( pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); ++ ++ ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = FALSE; ++ bPathBOK = FALSE; ++ is12simular = FALSE; ++ is23simular = FALSE; ++ is13simular = FALSE; ++ ++ ++ for (i=0; i<3; i++) ++ { ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_IQCalibrate_8188E(pAdapter, result, i, FALSE); ++#else ++ phy_IQCalibrate_8188E(pDM_Odm, result, i, FALSE); ++#endif ++ } ++ ++ if(i == 1) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is12simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 1); ++#else ++ is12simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 1); ++#endif ++ if(is12simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n",final_candidate)); ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is13simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 2); ++#else ++ is13simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 2); ++#endif ++ if(is13simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n",final_candidate)); ++ ++ break; ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is23simular = phy_SimularityCompare_8188E(pAdapter, result, 1, 2); ++#else ++ is23simular = phy_SimularityCompare_8188E(pDM_Odm, result, 1, 2); ++#endif ++ if(is23simular) ++ { ++ final_candidate = 1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); ++ } ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pDM_Odm->RFCalibrateInfo.RegE94 = RegE94 = result[final_candidate][0]; ++ pDM_Odm->RFCalibrateInfo.RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pDM_Odm->RFCalibrateInfo.RegEB4 = RegEB4 = result[final_candidate][4]; ++ pDM_Odm->RFCalibrateInfo.RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ bPathAOK = bPathBOK = TRUE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); ++ ++ pDM_Odm->RFCalibrateInfo.RegE94 = pDM_Odm->RFCalibrateInfo.RegEB4 = 0x100; //X default value ++ pDM_Odm->RFCalibrateInfo.RegE9C = pDM_Odm->RFCalibrateInfo.RegEBC = 0x0; //Y default value ++ } ++ ++ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#else ++ _PHY_PathAFillIQKMatrix(pDM_Odm, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#endif ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); ++#else ++ Indexforchannel = 0; ++#endif ++ ++//To Fix BSOD when final_candidate is 0xff ++//by sherry 20120321 ++ if(final_candidate < 4) ++ { ++ for(i = 0; i < IQK_Matrix_REG_NUM; i++) ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; ++ } ++ //RT_DISP(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#else ++ _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, IQK_BB_REG_NUM); ++#endif ++ ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.bIQKInProgress = FALSE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); ++ ProgressingTime = ODM_GetProgressingTime( pDM_Odm, StartTime); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK ProgressingTime = %d\n", ProgressingTime)); ++ ++} ++ ++ ++VOID ++PHY_LCCalibrate_8188E( ++ PVOID pDM_VOID ++ ) ++{ ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte timeout = 2000, timecount = 0; ++ u4Byte StartTime; ++ s4Byte ProgressingTime; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ ++#if MP_DRIVER == 1 ++ if (pDM_Odm->mp_mode == TRUE) ++ { ++ bStartContTx = pMptCtx->bStartContTx; ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++ } ++#endif ++ ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++ StartTime = ODM_GetCurrentTime( pDM_Odm); ++ while(*(pDM_Odm->pbScanInProcess) && timecount < timeout) ++ { ++ ODM_delay_ms(50); ++ timecount += 50; ++ } ++ ++ pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE; ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount)); ++ phy_LCCalibrate_8188E(pDM_Odm, FALSE); ++ ++ pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); ++ ProgressingTime = ODM_GetProgressingTime( pDM_Odm, StartTime); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK ProgressingTime = %d\n", ProgressingTime)); ++} ++ ++#if 0 ++VOID ++PHY_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if 0 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if FOR_BRAZIL_PRETEST != 1 ++ if(pDM_Odm->RFCalibrateInfo.bAPKdone) ++#endif ++ return; ++ ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_APCalibrate_8188E(pAdapter, delta, FALSE); ++#else ++ phy_APCalibrate_8188E(pDM_Odm, delta, FALSE); ++#endif ++ } ++#endif ++} ++#endif ++ ++VOID phy_SetRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if(!pAdapter->bHWInitReady) ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (!rtw_is_hw_init_completed(pAdapter)) ++ #endif ++ { ++ u1Byte u1bTmp; ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; ++ ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); ++ //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++#endif ++ ++ if(is2T) //92C ++ { ++ if(bMain) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A ++ else ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT ++ } ++ else //88C ++ { ++ ++ // <20120504, Kordan> [8188E] We should make AntDiversity controlled by HW (0x870[9:8] = 0), ++ // otherwise the following action has no effect. (0x860[9:8] has the effect only if AntDiversity controlled by SW) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT8|BIT9, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0x914, bMaskLWord, 0x0201); // Set up the Ant mapping table ++ ++ if(bMain) ++ { ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); // Tx Main (SW control)(The right antenna) ++ //4 [ Tx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT14|BIT13|BIT12, 0x1); // Tx Main (HW control)(The right antenna) ++ ++ //4 [ Rx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3, 0x1); // AntDivType = TRDiv, right antenna ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ ODM_SetBBReg(pDM_Odm, rConfig_ram64x16, BIT31, 0x1); // RxCG, Default is RxCG. AntDivType = 2RDiv, left antenna ++ ++ } ++ else ++ { ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); // Tx Aux (SW control)(The left antenna) ++ //4 [ Tx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT14|BIT13|BIT12, 0x0); // Tx Aux (HW control)(The left antenna) ++ ++ //4 [ Rx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3, 0x0); // AntDivType = TRDiv, left antenna ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ ODM_SetBBReg(pDM_Odm, rConfig_ram64x16, BIT31, 0x0); // RxCS, AntDivType = 2RDiv, right antenna ++ } ++ ++ } ++} ++VOID PHY_SetRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++#endif ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE); ++#else ++ phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE); ++#endif ++ } ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++//digital predistortion ++VOID ++phy_DigitalPredistortion( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter, ++#else ++ IN PDM_ODM_T pDM_Odm, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if (RT_PLATFORM == PLATFORM_WINDOWS) ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ u4Byte tmpReg, tmpReg2, index, i; ++ u1Byte path, pathbound = PATH_NUM; ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte BB_backup[DP_BB_REG_NUM]; ++ u4Byte BB_REG[DP_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE}; ++ u4Byte BB_settings[DP_BB_REG_NUM] = { ++ 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, ++ 0x0, 0x0, 0x0}; ++ ++ u4Byte RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; ++ u4Byte RF_REG[DP_RF_REG_NUM] = { ++ RF_TXBIAS_A}; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { ++ {0x1e1e1e1e, 0x03901e1e}, ++ {0x18181818, 0x03901818}, ++ {0x0e0e0e0e, 0x03900e0e} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u1Byte RetryCount = 0; ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion()\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ //save BB default value ++ for(index=0; index tx_agc 1f ~11 ++ // PA gain = 11 & PAD2 => tx_agc 10~0e ++ // PA gain = 01 => tx_agc 0b~0d ++ // PA gain = 00 => tx_agc 0a~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ //PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434); ++ ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434); ++ ++ //==================================== ++ // PAGE_B for Path-A DPK setting ++ //==================================== ++ // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //rf_lpbk_setup ++ //1.rf 00:5205a, rf 0d:0e52c ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bMaskDWord, 0x5205a ); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathAOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord); ++ ODM_delay_ms(10); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord); ++ ODM_delay_ms(10); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n")); ++ pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE; ++ break; ++ } ++ } ++ RetryCount = 0; ++ ++ //DPP path A ++ if(pDM_Odm->RFCalibrateInfo.bDPPathAOK) ++ { ++ // DP settings ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ++ for(i=rPdp_AntA; i<=0xb3c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i)); ++ } ++ ++ //pwsf ++ ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040); ++ ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920); ++ ++ for(i=0xb4c; i<=0xb5c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ //TX_AGC boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000); ++ } ++ ++ //DPK path B ++ if(is2T) ++ { ++ //Path A to standby mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ++ // LUTs => tx_agc ++ // PA gain = 11 & PAD1, => tx_agc 1f ~11 ++ // PA gain = 11 & PAD2, => tx_agc 10 ~0e ++ // PA gain = 01 => tx_agc 0b ~0d ++ // PA gain = 00 => tx_agc 0a ~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path B ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ // PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434); ++ ++ // PAGE_B for Path-B DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ // RF lpbk switches on ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103); ++ ++ //Path-B RF lpbk ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x5205a); ++ ++ //----send one shot signal----// ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathBOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n")); ++ pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE; ++ break; ++ } ++ } ++ ++ //DPP path B ++ if(pDM_Odm->RFCalibrateInfo.bDPPathBOK) ++ { ++ // DP setting ++ // LUT by SRAM ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ for(i=0xb60; i<=0xb9c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i)); ++ } ++ ++ // PWSF ++ ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050); ++ ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920); ++ ++ for(i=0xbac; i<=0xbbc; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ // tx_agc boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000); ++ } ++ } ++ ++ //reload BB default value ++ for(index=0; indexRFCalibrateInfo.bDPdone = TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion()\n")); ++#endif ++} ++ ++VOID ++PHY_DigitalPredistortion_8188E( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter ++#else ++ IN PDM_ODM_T pDM_Odm ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++ ++ if(pDM_Odm->RFCalibrateInfo.bDPdone) ++ return; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(pDM_Odm->RFType == ODM_2T2R){ ++ phy_DigitalPredistortion(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++ phy_DigitalPredistortion(pAdapter, FALSE); ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++ ++BOOLEAN phy_QueryRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ if(!pAdapter->bHWInitReady) ++ { ++ u1Byte u1bTmp; ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; ++ ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); ++ //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) // ++ { ++ if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) ++ return TRUE; ++ else ++ return FALSE; ++ } ++ else ++ { ++ if((ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3) == 0x1)) ++ return TRUE; ++ else ++ return FALSE; ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++BOOLEAN PHY_QueryRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++#if DISABLE_BB_RF ++ return TRUE; ++#endif ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(IS_2T2R( pHalData->VersionID)){ ++ return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE); ++#else ++ return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE); ++#endif ++ } ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ce.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ce.h +new file mode 100644 +index 0000000..9376cfe +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_ce.h +@@ -0,0 +1,143 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL_PHY_RF_8188E_H__ ++#define __HAL_PHY_RF_8188E_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define IQK_DELAY_TIME_88E 10 //ms ++#define index_mapping_NUM_88E 15 ++#define AVG_THERMAL_NUM_88E 4 ++ ++#include "../halphyrf_ce.h" ++ ++void ConfigureTxpowerTrack_8188E( ++ PTXPWRTRACK_CFG pConfig ++ ); ++ ++VOID ++GetDeltaSwingTable_8188E( ++ IN PVOID pDM_VOID, ++ OUT pu1Byte *TemperatureUP_A, ++ OUT pu1Byte *TemperatureDOWN_A, ++ OUT pu1Byte *TemperatureUP_B, ++ OUT pu1Byte *TemperatureDOWN_B ++ ); ++ ++void DoIQK_8188E( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ); ++ ++VOID ++ODM_TxPwrTrackSetPwr88E( ++ IN PVOID pDM_VOID, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ); ++ ++//1 7. IQK ++ ++void ++PHY_IQCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER Adapter, ++#endif ++ IN BOOLEAN bReCovery); ++ ++ ++// ++// LC calibrate ++// ++void ++PHY_LCCalibrate_8188E( ++ IN PVOID pDM_VOID ++); ++#if 0 ++// ++// AP calibrate ++// ++void ++PHY_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta); ++#endif ++ ++void ++PHY_DigitalPredistortion_8188E( IN PADAPTER pAdapter); ++ ++ ++VOID ++_PHY_SaveADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ); ++ ++VOID ++_PHY_PathADDAOn( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ); ++ ++VOID ++_PHY_MACSettingCalibration( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ); ++ ++ ++VOID ++_PHY_PathAStandBy( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ); ++ ++ ++#endif // #ifndef __HAL_PHY_RF_8188E_H__ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_win.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_win.c +new file mode 100644 +index 0000000..c415778 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_win.c +@@ -0,0 +1,3323 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++// 2010/04/25 MH Define the max tx power tracking tx agc power. ++#define ODM_TXPWRTRACK_MAX_IDX_88E 6 ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++ ++void setIqkMatrix_8188E( ++ PDM_ODM_T pDM_Odm, ++ u1Byte OFDM_index, ++ u1Byte RFPath, ++ s4Byte IqkResult_X, ++ s4Byte IqkResult_Y ++ ) ++{ ++ s4Byte ele_A=0, ele_D, ele_C=0, value32; ++ ++ ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22; ++ ++ //new element A = element D x X ++ if((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) ++ { ++ if ((IqkResult_X & 0x00000200) != 0) //consider minus ++ IqkResult_X = IqkResult_X | 0xFFFFFC00; ++ ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((IqkResult_Y & 0x00000200) != 0) ++ IqkResult_Y = IqkResult_Y | 0xFFFFFC00; ++ ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF; ++ ++ if (RFPath == ODM_RF_PATH_A) ++ switch (RFPath) ++ { ++ case ODM_RF_PATH_A: ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, value32); ++ break; ++ case ODM_RF_PATH_B: ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, value32); ++ ++ break; ++ default: ++ break; ++ } ++ } ++ else ++ { ++ switch (RFPath) ++ { ++ case ODM_RF_PATH_A: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, 0x00); ++ break; ++ ++ case ODM_RF_PATH_B: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, 0x00); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", ++ (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y)); ++} ++ ++void DoIQK_8188E( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#endif ++ ++ ODM_ResetIQKResult(pDM_Odm); ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_IQCalibrate_8188E(pDM_Odm, FALSE); ++#else ++ PHY_IQCalibrate_8188E(Adapter, FALSE); ++#endif ++ ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: odm_TxPwrTrackSetPwr88E() ++ * ++ * Overview: 88E change all channel tx power accordign to flag. ++ * OFDM & CCK are all different. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 04/23/2012 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++ODM_TxPwrTrackSetPwr88E( ++ PDM_ODM_T pDM_Odm, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ) ++{ ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte PwrTrackingLimit_OFDM = 30; //+0dB ++ u1Byte PwrTrackingLimit_CCK= 28; //-2dB ++ u1Byte TxRate = 0xFF; ++ u1Byte Final_OFDM_Swing_Index = 0; ++ u1Byte Final_CCK_Swing_Index = 0; ++ u1Byte i = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ #if (MP_DRIVER==1) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #else ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ if(!pMgntInfo->ForcedDataRate) //auto rate ++ { ++ if(pDM_Odm->TxRate != 0xFF) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ } ++ else //force rate ++ { ++ TxRate = (u1Byte) pMgntInfo->ForcedDataRate; ++ } ++ #endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>ODM_TxPwrTrackSetPwr8723B\n")); ++ ++ if(TxRate != 0xFF) ++ { ++ //2 CCK ++ if((TxRate >= MGN_1M)&&(TxRate <= MGN_11M)) ++ PwrTrackingLimit_CCK = 28; //-2dB ++ //2 OFDM ++ else if((TxRate >= MGN_6M)&&(TxRate <= MGN_48M)) ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if(TxRate == MGN_54M) ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ //2 HT ++ else if((TxRate >= MGN_MCS0)&&(TxRate <= MGN_MCS2)) //QPSK/BPSK ++ PwrTrackingLimit_OFDM= 38; //+4dB ++ else if((TxRate >= MGN_MCS3)&&(TxRate <= MGN_MCS4)) //16QAM ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if((TxRate >= MGN_MCS5)&&(TxRate <= MGN_MCS7)) //64QAM ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ else ++ PwrTrackingLimit_OFDM = pRFCalibrateInfo->DefaultOfdmIndex; //Default OFDM index = 30 ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("TxRate=0x%x, PwrTrackingLimit=%d\n", TxRate, PwrTrackingLimit_OFDM)); ++ ++ if (Method == TXAGC) ++ { ++ u4Byte pwr = 0, TxAGC = 0; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; //Remnant index equal to aboslute compensate value. ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel))); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) ++ ++ #if (MP_DRIVER != 1) ++ //PHY_SetTxPowerLevel8188E(pDM_Odm->Adapter, *pDM_Odm->pChannel); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ if (RFPath == ODM_RF_PATH_A) ++ { ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ } ++ ++ #else ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A]; ++ PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); ++ RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr88E: CCK Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[ODM_RF_PATH_A] - pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A]); ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr88E: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ #endif ++ ++#endif ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ //PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); ++ //PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); ++#endif ++ ++ } ++ else if (Method == BBSWING) ++ { ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ if (Final_OFDM_Swing_Index >= PwrTrackingLimit_OFDM) ++ Final_OFDM_Swing_Index = PwrTrackingLimit_OFDM; ++ else if (Final_OFDM_Swing_Index < 0) ++ Final_OFDM_Swing_Index = 0; ++ ++ if (Final_CCK_Swing_Index >= CCK_TABLE_SIZE) ++ Final_CCK_Swing_Index = CCK_TABLE_SIZE-1; ++ else if (pRFCalibrateInfo->BbSwingIdxCck < 0) ++ Final_CCK_Swing_Index = 0; ++ ++ // Adjust BB swing by OFDM IQ matrix ++ if (RFPath == ODM_RF_PATH_A) ++ { ++ setIqkMatrix_8188E(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_A, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ // Adjust BB swing by CCK filter coefficient ++ if(!pRFCalibrateInfo->bCCKinCH14){ ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][7]); ++ } ++ } ++ } ++ else if (Method == MIX_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pRFCalibrateInfo->DefaultOfdmIndex=%d, pDM_Odm->DefaultCCKIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", ++ pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->DefaultCckIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath],RFPath )); ++ ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ if(Final_OFDM_Swing_Index > PwrTrackingLimit_OFDM ) //BBSwing higher then Limit ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index - PwrTrackingLimit_OFDM; ++ ++ setIqkMatrix_8188E(pDM_Odm, PwrTrackingLimit_OFDM, ODM_RF_PATH_A, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d \n", PwrTrackingLimit_OFDM, pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else if (Final_OFDM_Swing_Index < 0) ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index ; ++ ++ setIqkMatrix_8188E(pDM_Odm, 0, ODM_RF_PATH_A, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d \n", pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else ++ { ++ setIqkMatrix_8188E(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_A, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); ++ ++ if(pRFCalibrateInfo->Modify_TxAGC_Flag_PathA) //If TxAGC has changed, reset TxAGC again ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = 0; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A pDM_Odm->Modify_TxAGC_Flag = FALSE \n")); ++ } ++ } ++ ++ if(Final_CCK_Swing_Index > PwrTrackingLimit_CCK) ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index - PwrTrackingLimit_CCK; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A CCK Over Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d \n", PwrTrackingLimit_CCK, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ ++ // Adjust BB swing by CCK filter coefficient ++ ++ if(!pRFCalibrateInfo->bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[PwrTrackingLimit_CCK][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[PwrTrackingLimit_CCK][7]); ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK ); ++ ++ } ++ else if(Final_CCK_Swing_Index < 0) // Lowest CCK Index = 0 ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A CCK Under Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d \n", 0, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ ++ if(!pRFCalibrateInfo->bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[0][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[0][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[0][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[0][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[0][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[0][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[0][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[0][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[0][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[0][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[0][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[0][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[0][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[0][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[0][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[0][7]); ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK ); ++ ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A CCK Compensate with BBSwing , Final_CCK_Swing_Index = %d \n", Final_CCK_Swing_Index)); ++ ++ if(!pRFCalibrateInfo->bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[Final_CCK_Swing_Index][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[Final_CCK_Swing_Index][7]); ++ } ++ ++ if(pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK) //If TxAGC has changed, reset TxAGC again ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; ++ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK ); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK= FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A pDM_Odm->Modify_TxAGC_Flag_CCK = FALSE \n")); ++ } ++ ++ } ++ } ++ else ++ { ++ return; ++ } ++} // odm_TxPwrTrackSetPwr88E ++ ++VOID ++GetDeltaSwingTable_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ OUT pu1Byte *TemperatureUP_A, ++ OUT pu1Byte *TemperatureDOWN_A, ++ OUT pu1Byte *TemperatureUP_B, ++ OUT pu1Byte *TemperatureDOWN_B ++ ) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u2Byte rate = *(pDM_Odm->pForcedDataRate); ++ u1Byte channel = pHalData->CurrentChannel; ++ ++ if ( 1 <= channel && channel <= 14) { ++ if (IS_CCK_RATE(rate)) { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; ++ } else { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; ++ } ++ } ++ else { ++ *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; ++ *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; ++ } ++} ++ ++void ConfigureTxpowerTrack_8188E( ++ PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE; ++ pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE; ++ pConfig->Threshold_IQK = IQK_THRESHOLD; ++ pConfig->AverageThermalNum = AVG_THERMAL_NUM_88E; ++ pConfig->RfPathCount = MAX_PATH_NUM_8188E; ++ pConfig->ThermalRegAddr = RF_T_METER_88E; ++ ++ pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr88E; ++ pConfig->DoIQK = DoIQK_8188E; ++ pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8188E; ++ pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8188E; ++} ++ ++//1 7. IQK ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_IQK_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB, ++ IN u4Byte Ktimes ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); ++ ++ //1 Tx IQK ++ //path-A IQK setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ff); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); ++ ++ if (Ktimes == 0x0) ++ { ++ //LO calibration on ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); ++ } ++ else ++ { ++ //LO calibration off ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ } ++ ++ //TX IQK mode setting ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0x07f7f ); ++ ++ //PA,PAD gain adjust ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x56, bRFRegOffsetMask, 0x510f0 ); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ if (Ktimes == 0) ++ { ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E*2); ++ ++ } ++ else ++ { ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ } ++ ++ //reload RF 0xdf ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180 ); ++ ++ ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++#if 0 ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RT_DISP(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); ++#endif ++ ++ return result; ++ ++ ++ } ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_RxIQK( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4, u4tmp; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); ++ ++ //1 Get TXIMR setting ++ //modify RXIQK mode table ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117b ); ++ ++ //PA,PAD gain adjust ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x56, bRFRegOffsetMask, 0x510f0 ); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160fff); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ //reload RF 0xdf ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180 ); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); ++ ++ ++ //1 RX IQK ++ //modify RXIQK mode table ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa ); ++ ++ //PA,PAD gain adjust ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000 ); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160fff); ++ ++ //LO calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //One shot, path A LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ //reload RF 0xdf ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180 ); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); ++ ++#if 0 ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++#endif ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); ++ ++ return result; ++ ++ ++} ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_IQK_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regEAC, regEB4, regEBC, regEC4, regECC; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); ++ ++ //One shot, path B LOK & IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000002); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000000); ++ ++ // delay x ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_88E); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ regEB4 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeb4 = 0x%x\n", regEB4)); ++ regEBC= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xebc = 0x%x\n", regEBC)); ++ regEC4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xec4 = 0x%x\n", regEC4)); ++ regECC= ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xecc = 0x%x\n", regECC)); ++ ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else ++ return result; ++ ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); ++ ++ ++ return result; ++ ++} ++ ++VOID ++_PHY_PathAFillIQKMatrix( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u4Byte Oldval_0, X, TX0_A, reg; ++ s4Byte Y, TX0_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_0 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ ++ TX0_C = (Y * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); ++ ++ if(bTxOnly) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathAFillIQKMatrix only Tx OK\n")); ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++#if (DM_ODM_SUPPORT_TYPE==ODM_AP) ++ if( RTL_ABS(reg ,0x100) >= 16) ++ reg = 0x100; ++#endif ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][3] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); ++ } ++} ++ ++VOID ++_PHY_PathBFillIQKMatrix( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u4Byte Oldval_1, X, TX1_A, reg; ++ s4Byte Y, TX1_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_1 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ TX1_C = (Y * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); ++ ++ if(bTxOnly) ++ return; ++ ++ reg = result[final_candidate][6]; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][7] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ } ++} ++ ++// ++// 2011/07/26 MH Add an API for testing IQK fail case. ++// ++// MP Already declare in odm.c ++#if !(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++/* ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", ++ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++*/ ++ return TRUE; ++} ++#endif ++ ++VOID ++_PHY_SaveADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); ++ for( i = 0 ; i < RegisterNum ; i++){ ++ ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); ++ } ++} ++ ++ ++VOID ++_PHY_SaveMACRegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); ++ for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); ++ } ++ MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); ++ ++} ++ ++ ++VOID ++_PHY_ReloadADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegiesterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); ++ for(i = 0 ; i < RegiesterNum; i++) ++ { ++ ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); ++ } ++} ++ ++VOID ++_PHY_ReloadMACRegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); ++ for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); ++ } ++ ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); ++} ++ ++ ++VOID ++_PHY_PathADDAOn( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ) ++{ ++ u4Byte pathOn; ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); ++ ++ pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; ++ if(FALSE == is2T){ ++ pathOn = 0x0bdb25a0; ++ ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0); ++ } ++ else{ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn); ++ } ++ ++ for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[i], bMaskDWord, pathOn); ++ } ++ ++} ++ ++VOID ++_PHY_MACSettingCalibration( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); ++ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); ++ ++ for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); ++ } ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); ++ ++} ++ ++VOID ++_PHY_PathAStandBy( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++} ++ ++VOID ++_PHY_PIModeSwitch( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN PIMode ++ ) ++{ ++ u4Byte mode; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); ++ ++ mode = PIMode ? 0x01000100 : 0x01000000; ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); ++} ++ ++BOOLEAN ++phy_SimularityCompare_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ u4Byte i, j, diff, SimularityBitMap, bound = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = TRUE; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ BOOLEAN is2T = IS_92C_SERIAL( pHalData->VersionID); ++#else ++ BOOLEAN is2T = 0; ++#endif ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8188E c1 %d c2 %d!!!\n", c1, c2)); ++ ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); ++ if (diff > MAX_TOLERANCE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:phy_SimularityCompare_8188E differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i])); ++ ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1<odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u4Byte i; ++ u1Byte PathAOK, PathBOK; ++ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ //since 92C & 92D have the different define in IQK_BB_REG ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, rCCK0_AFESetting ++ }; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ u4Byte retryCount = 2; ++#else ++#if MP_DRIVER ++ const u4Byte retryCount = 2; ++#else ++ const u4Byte retryCount = 2; ++#endif ++#endif ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ //u4Byte bbvalue; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#ifdef MP_TEST ++ if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ retryCount = 9; ++#endif ++#endif ++ ++ ++ if(t==0) ++ { ++// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); ++// RT_DISP(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ _PHY_SaveADDARegisters(pDM_Odm, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pDM_Odm, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); ++#else ++ _PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T); ++#endif ++ ++ ++ if(t==0) ++ { ++ pRFCalibrateInfo->bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pRFCalibrateInfo->bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch(pAdapter, TRUE); ++#else ++ _PHY_PIModeSwitch(pDM_Odm, TRUE); ++#endif ++ } ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++#else ++ _PHY_MACSettingCalibration(pDM_Odm, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++#endif ++ ++ //BB setting ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0x00); ++ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, 0x0f000000, 0xf); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); ++ } ++ ++ ++ ++ ++ //Page B init ++ //AP or IQK ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x0f600000); ++ } ++ ++ // IQ calibration setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); ++ ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_IQK_8188E(pAdapter, is2T, t + i); ++#else ++ PathAOK = phy_PathA_IQK_8188E(pDM_Odm, is2T, t + i); ++#endif ++// if(PathAOK == 0x03){ ++ if(PathAOK == 0x01){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++#if 0 ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ RT_DISP(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); ++ ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ } ++#endif ++ } ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_RxIQK(pAdapter, is2T); ++#else ++ PathAOK = phy_PathA_RxIQK(pDM_Odm, is2T); ++#endif ++ if(PathAOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); ++// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); ++ } ++ } ++ ++ if(0x00 == PathAOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); ++ } ++ ++ if(is2T){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PathAStandBy(pAdapter); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); ++#else ++ _PHY_PathAStandBy(pDM_Odm); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T); ++#endif ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathBOK = phy_PathB_IQK_8188E(pAdapter); ++#else ++ PathBOK = phy_PathB_IQK_8188E(pDM_Odm); ++#endif ++ if(PathBOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Only Tx IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathBOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ if(t!=0) ++ { ++ if(!pRFCalibrateInfo->bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch(pAdapter, FALSE); ++#else ++ _PHY_PIModeSwitch(pDM_Odm, FALSE); ++#endif ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pDM_Odm, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pDM_Odm, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ ++ ++ // Restore RX initial gain ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); ++ if(is2T){ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); ++ } ++ ++ //load 0xe30 IQC default value ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8188E() <==\n")); ++ ++} ++ ++ ++VOID ++phy_LCCalibrate_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN BOOLEAN is2T ++ ) ++{ ++ u1Byte tmpReg; ++ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++#endif ++ //Check continuous TX and Packet TX ++ tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RF_Amode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#else ++ RF_Amode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#endif ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ LC_Cal = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#else ++ LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#endif ++ ++ //4. Set LC calibration begin bit15 ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); ++ ++ ODM_delay_ms(100); ++ ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); ++ } ++} ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++VOID ++phy_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u4Byte regD[PATH_NUM]; ++ u4Byte tmpReg, index, offset, apkbound; ++ u1Byte path, i, pathbound = PATH_NUM; ++ u4Byte BB_backup[APK_BB_REG_NUM]; ++ u4Byte BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u4Byte APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u4Byte APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u4Byte APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u4Byte APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u4Byte APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u4Byte APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ s4Byte BB_offset, delta_V, delta_offset; ++ ++#if MP_DRIVER == 1 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++#else ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++#endif ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if MP_DRIVER != 1 ++ return; ++#endif ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_SaveMACRegisters(pDM_Odm, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ++ ++ if(path == ODM_RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ } ++ else if(path == ODM_RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#else ++ PHY_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#endif ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ } ++ ++ //save RF default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); ++#else ++ regD[path] = ODM_GetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_TXBIAS_A, bMaskDWord); ++#endif ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_MACSettingCalibration(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ if(path == ODM_RF_PATH_A) //Path B to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pRFCalibrateInfo->bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_IPA_A, bMaskDWord, 0x8992e); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); ++#else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); ++#endif ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ { ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ODM_delay_ms(3); ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ++ ODM_delay_ms(20); ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ if(path == ODM_RF_PATH_A) ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); ++ else ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_ReloadADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]); ++ if(path == ODM_RF_PATH_B) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x3, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == ODM_RF_PATH_A) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(!IS_HARDWARE_TYPE_8723A(pAdapter)) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bMaskDWord, ++ ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++#endif ++ } ++ ++ pRFCalibrateInfo->bAPKdone = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n")); ++} ++ ++ ++ ++#define DP_BB_REG_NUM 7 ++#define DP_RF_REG_NUM 1 ++#define DP_RETRY_LIMIT 10 ++#define DP_PATH_NUM 2 ++#define DP_DPK_NUM 3 ++#define DP_DPK_VALUE_NUM 2 ++ ++ ++ ++ ++ ++VOID ++PHY_IQCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bReCovery ++ ) ++{ ++ ++//20131031 ++//V2.0 ++//fine tune TXIQK/RXIQK loop gain for SMIC. ++//LOK only perform 1 time. ++//IQK retry count 10-->2 ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ s4Byte result[4][8]; //last is final result ++ u1Byte i, final_candidate, Indexforchannel; ++ BOOLEAN bPathAOK, bPathBOK; ++ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) ) ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#else ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++#ifdef MP_TEST ++ if(priv->pshare->rf_ft_var.mp_specific) ++ { ++ if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) ++ return; ++ } ++#endif ++ ++ if(priv->pshare->IQK_88E_done) ++ bReCovery= 1; ++ priv->pshare->IQK_88E_done = 1; ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if MP_DRIVER == 1 ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++#endif ++ ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if (pRFCalibrateInfo->bIQKInProgress) ++ return; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if(bReCovery) ++#else//for ODM_WIN ++ if(bReCovery && (!pAdapter->bInHctTest)) //YJ,add for PowerTest,120405 ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8188E: Return due to bReCovery!\n")); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, 9); ++#else ++ _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, 9); ++#endif ++ return; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pRFCalibrateInfo->bIQKInProgress = TRUE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = FALSE; ++ bPathBOK = FALSE; ++ is12simular = FALSE; ++ is23simular = FALSE; ++ is13simular = FALSE; ++ ++ ++ for (i=0; i<3; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)) ++ { ++ phy_IQCalibrate_8188E(pAdapter, result, i, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_IQCalibrate_8188E(pAdapter, result, i, FALSE); ++#else ++ phy_IQCalibrate_8188E(pDM_Odm, result, i, FALSE); ++#endif ++ } ++ ++ if(i == 1) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is12simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 1); ++#else ++ is12simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 1); ++#endif ++ if(is12simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n",final_candidate)); ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is13simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 2); ++#else ++ is13simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 2); ++#endif ++ if(is13simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n",final_candidate)); ++ ++ break; ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is23simular = phy_SimularityCompare_8188E(pAdapter, result, 1, 2); ++#else ++ is23simular = phy_SimularityCompare_8188E(pDM_Odm, result, 1, 2); ++#endif ++ if(is23simular) ++ { ++ final_candidate = 1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); ++ } ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pRFCalibrateInfo->RegE94 = RegE94 = result[final_candidate][0]; ++ pRFCalibrateInfo->RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pRFCalibrateInfo->RegEB4 = RegEB4 = result[final_candidate][4]; ++ pRFCalibrateInfo->RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ bPathAOK = bPathBOK = TRUE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); ++ ++ pRFCalibrateInfo->RegE94 = pRFCalibrateInfo->RegEB4 = 0x100; //X default value ++ pRFCalibrateInfo->RegE9C = pRFCalibrateInfo->RegEBC = 0x0; //Y default value ++ } ++ ++ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#else ++ _PHY_PathAFillIQKMatrix(pDM_Odm, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#endif ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) ++ { ++ _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ } ++ } ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); ++#else ++ Indexforchannel = 0; ++#endif ++ ++//To Fix BSOD when final_candidate is 0xff ++//by sherry 20120321 ++ if(final_candidate < 4) ++ { ++ for(i = 0; i < IQK_Matrix_REG_NUM; i++) ++ pRFCalibrateInfo->IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; ++ pRFCalibrateInfo->IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; ++ } ++ //RT_DISP(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, 9); ++#else ++ _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, IQK_BB_REG_NUM); ++#endif ++ ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pRFCalibrateInfo->bIQKInProgress = FALSE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); ++ ++} ++ ++ ++VOID ++PHY_LCCalibrate_8188E( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ BOOLEAN bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte timeout = 2000, timecount = 0; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if MP_DRIVER == 1 ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++#endif ++ ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++ while(*(pDM_Odm->pbScanInProcess) && timecount < timeout) ++ { ++ ODM_delay_ms(50); ++ timecount += 50; ++ } ++ ++ pRFCalibrateInfo->bLCKInProgress = TRUE; ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount)); ++ phy_LCCalibrate_8188E(pDM_Odm, FALSE); ++ ++ pRFCalibrateInfo->bLCKInProgress = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); ++ ++} ++ ++VOID ++PHY_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if FOR_BRAZIL_PRETEST != 1 ++ if(pRFCalibrateInfo->bAPKdone) ++#endif ++ return; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_APCalibrate_8188E(pAdapter, delta, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_APCalibrate_8188E(pAdapter, delta, FALSE); ++#else ++ phy_APCalibrate_8188E(pDM_Odm, delta, FALSE); ++#endif ++ } ++} ++VOID phy_SetRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if(!pAdapter->bHWInitReady) ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(pAdapter->hw_init_completed == _FALSE) ++ #endif ++ { ++ u1Byte u1bTmp; ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; ++ ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); ++ //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++#endif ++ ++ if(is2T) //92C ++ { ++ if(bMain) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A ++ else ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT ++ } ++ else //88C ++ { ++ ++ // <20120504, Kordan> [8188E] We should make AntDiversity controlled by HW (0x870[9:8] = 0), ++ // otherwise the following action has no effect. (0x860[9:8] has the effect only if AntDiversity controlled by SW) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT8|BIT9, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0x914, bMaskLWord, 0x0201); // Set up the Ant mapping table ++ ++ if(bMain) ++ { ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); // Tx Main (SW control)(The right antenna) ++ //4 [ Tx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT14|BIT13|BIT12, 0x1); // Tx Main (HW control)(The right antenna) ++ ++ //4 [ Rx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3, 0x1); // AntDivType = TRDiv, right antenna ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ ODM_SetBBReg(pDM_Odm, rConfig_ram64x16, BIT31, 0x1); // RxCG, Default is RxCG. AntDivType = 2RDiv, left antenna ++ ++ } ++ else ++ { ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); // Tx Aux (SW control)(The left antenna) ++ //4 [ Tx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT14|BIT13|BIT12, 0x0); // Tx Aux (HW control)(The left antenna) ++ ++ //4 [ Rx ] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3, 0x0); // AntDivType = TRDiv, left antenna ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ ODM_SetBBReg(pDM_Odm, rConfig_ram64x16, BIT31, 0x0); // RxCS, AntDivType = 2RDiv, right antenna ++ } ++ ++ } ++} ++VOID PHY_SetRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++#endif ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ phy_SetRFPathSwitch_8188E(pAdapter, bMain, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE); ++#else ++ phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE); ++#endif ++ } ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++//digital predistortion ++VOID ++phy_DigitalPredistortion( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter, ++#else ++ IN PDM_ODM_T pDM_Odm, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if (RT_PLATFORM == PLATFORM_WINDOWS) ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u4Byte tmpReg, tmpReg2, index, i; ++ u1Byte path, pathbound = PATH_NUM; ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte BB_backup[DP_BB_REG_NUM]; ++ u4Byte BB_REG[DP_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE}; ++ u4Byte BB_settings[DP_BB_REG_NUM] = { ++ 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, ++ 0x0, 0x0, 0x0}; ++ ++ u4Byte RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; ++ u4Byte RF_REG[DP_RF_REG_NUM] = { ++ RF_TXBIAS_A}; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { ++ {0x1e1e1e1e, 0x03901e1e}, ++ {0x18181818, 0x03901818}, ++ {0x0e0e0e0e, 0x03900e0e} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u1Byte RetryCount = 0; ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion()\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ //save BB default value ++ for(index=0; index tx_agc 1f ~11 ++ // PA gain = 11 & PAD2 => tx_agc 10~0e ++ // PA gain = 01 => tx_agc 0b~0d ++ // PA gain = 00 => tx_agc 0a~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ //PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434); ++ ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434); ++ ++ //==================================== ++ // PAGE_B for Path-A DPK setting ++ //==================================== ++ // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //rf_lpbk_setup ++ //1.rf 00:5205a, rf 0d:0e52c ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bMaskDWord, 0x5205a ); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pRFCalibrateInfo->bDPPathAOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord); ++ ODM_delay_ms(10); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord); ++ ODM_delay_ms(10); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n")); ++ pRFCalibrateInfo->bDPPathAOK = TRUE; ++ break; ++ } ++ } ++ RetryCount = 0; ++ ++ //DPP path A ++ if(pRFCalibrateInfo->bDPPathAOK) ++ { ++ // DP settings ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ for(i=rPdp_AntA; i<=0xb3c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i)); ++ } ++ ++ //pwsf ++ ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040); ++ ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920); ++ ++ for(i=0xb4c; i<=0xb5c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ //TX_AGC boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000); ++ } ++ ++ //DPK path B ++ if(is2T) ++ { ++ //Path A to standby mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ++ // LUTs => tx_agc ++ // PA gain = 11 & PAD1, => tx_agc 1f ~11 ++ // PA gain = 11 & PAD2, => tx_agc 10 ~0e ++ // PA gain = 01 => tx_agc 0b ~0d ++ // PA gain = 00 => tx_agc 0a ~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path B ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ // PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434); ++ ++ // PAGE_B for Path-B DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ // RF lpbk switches on ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103); ++ ++ //Path-B RF lpbk ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x5205a); ++ ++ //----send one shot signal----// ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pRFCalibrateInfo->bDPPathBOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n")); ++ pRFCalibrateInfo->bDPPathBOK = TRUE; ++ break; ++ } ++ } ++ ++ //DPP path B ++ if(pRFCalibrateInfo->bDPPathBOK) ++ { ++ // DP setting ++ // LUT by SRAM ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ for(i=0xb60; i<=0xb9c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i)); ++ } ++ ++ // PWSF ++ ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050); ++ ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920); ++ ++ for(i=0xbac; i<=0xbbc; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ // tx_agc boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000); ++ } ++ } ++ ++ //reload BB default value ++ for(index=0; indexbDPdone = TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion()\n")); ++#endif ++} ++ ++VOID ++PHY_DigitalPredistortion_8188E( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter ++#else ++ IN PDM_ODM_T pDM_Odm ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++ ++ if(pRFCalibrateInfo->bDPdone) ++ return; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_DigitalPredistortion(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++ phy_DigitalPredistortion(pAdapter, FALSE); ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++ ++BOOLEAN phy_QueryRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ if(!pAdapter->bHWInitReady) ++ { ++ u1Byte u1bTmp; ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; ++ ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); ++ //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) // ++ { ++ if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) ++ return TRUE; ++ else ++ return FALSE; ++ } ++ else ++ { ++ if((ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3) == 0x1)) ++ return TRUE; ++ else ++ return FALSE; ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++BOOLEAN PHY_QueryRFPathSwitch_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++#if DISABLE_BB_RF ++ return TRUE; ++#endif ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ //if(IS_92C_SERIAL( pHalData->VersionID)){ ++ if(IS_2T2R( pHalData->VersionID)){ ++ return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE); ++#else ++ return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE); ++#endif ++ } ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_win.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_win.h +new file mode 100644 +index 0000000..5d036ee +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/halphyrf_8188e_win.h +@@ -0,0 +1,143 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL_PHY_RF_8188E_H__ ++#define __HAL_PHY_RF_8188E_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define IQK_DELAY_TIME_88E 15 //ms ++#define IQK_DELAY_TIME_8723B 10 //ms ++ ++#define index_mapping_NUM_88E 15 ++#define AVG_THERMAL_NUM_88E 4 ++ ++#include "halphyrf_win.h" ++ ++void ConfigureTxpowerTrack_8188E( ++ PTXPWRTRACK_CFG pConfig ++ ); ++ ++VOID ++GetDeltaSwingTable_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ OUT pu1Byte *TemperatureUP_A, ++ OUT pu1Byte *TemperatureDOWN_A, ++ OUT pu1Byte *TemperatureUP_B, ++ OUT pu1Byte *TemperatureDOWN_B ++ ); ++ ++void DoIQK_8188E( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ); ++ ++VOID ++ODM_TxPwrTrackSetPwr88E( ++ PDM_ODM_T pDM_Odm, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ); ++ ++//1 7. IQK ++ ++void ++PHY_IQCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER Adapter, ++#endif ++ IN BOOLEAN bReCovery); ++ ++ ++// ++// LC calibrate ++// ++void ++PHY_LCCalibrate_8188E( ++ IN PDM_ODM_T pDM_Odm ++); ++ ++// ++// AP calibrate ++// ++void ++PHY_APCalibrate_8188E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta); ++void ++PHY_DigitalPredistortion_8188E( IN PADAPTER pAdapter); ++ ++ ++VOID ++_PHY_SaveADDARegisters( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ); ++ ++VOID ++_PHY_PathADDAOn( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ); ++ ++VOID ++_PHY_MACSettingCalibration( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ); ++ ++ ++VOID ++_PHY_PathAStandBy( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ); ++ ++ ++#endif // #ifndef __HAL_PHY_RF_8188E_H__ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/mp_precomp.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/mp_precomp.h +new file mode 100644 +index 0000000..43ea006 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/mp_precomp.h +@@ -0,0 +1,24 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//#include ++//#include "phydm_precomp.h" ++//#include "../phydm_precomp.h" ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_regconfig8188e.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_regconfig8188e.c +new file mode 100644 +index 0000000..0bbd3e7 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_regconfig8188e.c +@@ -0,0 +1,245 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++ ++#include "../phydm_precomp.h" ++ ++#if (RTL8188E_SUPPORT == 1) ++ ++void ++odm_ConfigRFReg_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data, ++ IN ODM_RF_RADIO_PATH_E RF_PATH, ++ IN u4Byte RegAddr ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#ifndef SMP_SYNC ++ unsigned long x; ++#endif ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++#endif ++ ++ if(Addr == 0xffe) ++ { ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ ODM_sleep_ms(50); ++ #else ++ ODM_delay_ms(50); ++ #endif ++ } ++ else if (Addr == 0xfd) ++ { ++ ODM_delay_ms(5); ++ } ++ else if (Addr == 0xfc) ++ { ++ ODM_delay_ms(1); ++ } ++ else if (Addr == 0xfb) ++ { ++ ODM_delay_us(50); ++ } ++ else if (Addr == 0xfa) ++ { ++ ODM_delay_us(5); ++ } ++ else if (Addr == 0xf9) ++ { ++ ODM_delay_us(1); ++ } ++ else ++ { ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ SAVE_INT_AND_CLI(x); ++ ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ++ RESTORE_INT(x); ++#else ++ ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ++#endif ++ // Add 1us delay between BB/RF register setting. ++ ODM_delay_us(1); ++ } ++} ++ ++ ++void ++odm_ConfigRF_RadioA_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ) ++{ ++ u4Byte content = 0x1000; // RF_Content: radioa_txt ++ u4Byte maskforPhySet= (u4Byte)(content&0xE000); ++ ++ odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); ++} ++ ++void ++odm_ConfigRF_RadioB_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ) ++{ ++ u4Byte content = 0x1001; // RF_Content: radiob_txt ++ u4Byte maskforPhySet= (u4Byte)(content&0xE000); ++ ++ odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); ++ ++} ++ ++void ++odm_ConfigMAC_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u1Byte Data ++ ) ++{ ++ ODM_Write1Byte(pDM_Odm, Addr, Data); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); ++} ++ ++void ++odm_ConfigBB_AGC_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ) ++{ ++ ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); ++ // Add 1us delay between BB/RF register setting. ++ ODM_delay_us(1); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); ++} ++ ++void ++odm_ConfigBB_PHY_REG_PG_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Band, ++ IN u4Byte RfPath, ++ IN u4Byte TxNum, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ) ++{ ++ if (Addr == 0xfe){ ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ ODM_sleep_ms(50); ++ #else ++ ODM_delay_ms(50); ++ #endif ++ } ++ else if (Addr == 0xfd){ ++ ODM_delay_ms(5); ++ } ++ else if (Addr == 0xfc){ ++ ODM_delay_ms(1); ++ } ++ else if (Addr == 0xfb){ ++ ODM_delay_us(50); ++ } ++ else if (Addr == 0xfa){ ++ ODM_delay_us(5); ++ } ++ else if (Addr == 0xf9){ ++ ODM_delay_us(1); ++ } ++ else { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); ++ ++ #if !(DM_ODM_SUPPORT_TYPE&ODM_AP) ++ PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data); ++ #endif ++ } ++} ++ ++void ++odm_ConfigBB_TXPWR_LMT_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte Regulation, ++ IN pu1Byte Band, ++ IN pu1Byte Bandwidth, ++ IN pu1Byte RateSection, ++ IN pu1Byte RfPath, ++ IN pu1Byte Channel, ++ IN pu1Byte PowerLimit ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PHY_SetTxPowerLimit(pDM_Odm, Regulation, Band, ++ Bandwidth, RateSection, RfPath, Channel, PowerLimit); ++#endif ++} ++ ++void ++odm_ConfigBB_PHY_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ) ++{ ++ if (Addr == 0xfe){ ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ ODM_sleep_ms(50); ++ #else ++ ODM_delay_ms(50); ++ #endif ++ } ++ else if (Addr == 0xfd){ ++ ODM_delay_ms(5); ++ } ++ else if (Addr == 0xfc){ ++ ODM_delay_ms(1); ++ } ++ else if (Addr == 0xfb){ ++ ODM_delay_us(50); ++ } ++ else if (Addr == 0xfa){ ++ ODM_delay_us(5); ++ } ++ else if (Addr == 0xf9){ ++ ODM_delay_us(1); ++ } ++ else { ++ if (Addr == 0xa24) ++ pDM_Odm->RFCalibrateInfo.RegA24 = Data; ++ ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); ++ ++ // Add 1us delay between BB/RF register setting. ++ ODM_delay_us(1); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); ++ } ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_regconfig8188e.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_regconfig8188e.h +new file mode 100644 +index 0000000..2cce339 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_regconfig8188e.h +@@ -0,0 +1,96 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_ODM_REGCONFIG_H_8188E ++#define __INC_ODM_REGCONFIG_H_8188E ++ ++#if (RTL8188E_SUPPORT == 1) ++ ++void ++odm_ConfigRFReg_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data, ++ IN ODM_RF_RADIO_PATH_E RF_PATH, ++ IN u4Byte RegAddr ++ ); ++ ++void ++odm_ConfigRF_RadioA_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigRF_RadioB_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigMAC_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u1Byte Data ++ ); ++ ++void ++odm_ConfigBB_AGC_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigBB_PHY_REG_PG_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Band, ++ IN u4Byte RfPath, ++ IN u4Byte TxNum, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigBB_PHY_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigBB_TXPWR_LMT_8188E( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte Regulation, ++ IN pu1Byte Band, ++ IN pu1Byte Bandwidth, ++ IN pu1Byte RateSection, ++ IN pu1Byte RfPath, ++ IN pu1Byte Channel, ++ IN pu1Byte PowerLimit ++ ); ++ ++#endif ++#endif // end of SUPPORT ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_rtl8188e.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_rtl8188e.c +new file mode 100644 +index 0000000..53ed3c9 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_rtl8188e.c +@@ -0,0 +1,479 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++ ++#include "../phydm_precomp.h" ++ ++#if (RTL8188E_SUPPORT == 1) ++ ++VOID ++ODM_DIG_LowerBound_88E( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ { ++ pDM_DigTable->rx_gain_range_min = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); ++ } ++ //If only one Entry connected ++} ++ ++/*============================================================= ++* AntDiv Before Link ++===============================================================*/ ++VOID ++ODM_SwAntDivResetBeforeLink( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ ++} ++ ++ ++//3============================================================ ++//3 Dynamic Primary CCA ++//3============================================================ ++ ++VOID ++odm_PrimaryCCA_Init( ++ IN PDM_ODM_T pDM_Odm) ++{ ++ pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); ++ PrimaryCCA->DupRTS_flag = 0; ++ PrimaryCCA->intf_flag = 0; ++ PrimaryCCA->intf_type = 0; ++ PrimaryCCA->Monitor_flag = 0; ++ PrimaryCCA->PriCCA_flag = 0; ++} ++ ++BOOLEAN ++ODM_DynamicPrimaryCCA_DupRTS( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); ++ ++ return PrimaryCCA->DupRTS_flag; ++} ++ ++VOID ++odm_DynamicPrimaryCCA( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ ++#if(DM_ODM_SUPPORT_TYPE !=ODM_CE) ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; // for NIC ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ PRT_WLAN_STA pEntry; ++#endif ++ ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT); ++ pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); ++ ++ BOOLEAN Is40MHz; ++ BOOLEAN Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW ++ BOOLEAN bConnected = FALSE; // connected or not ++ static u1Byte Client_40MHz_pre = 0; ++ static u8Byte lastTxOkCnt = 0; ++ static u8Byte lastRxOkCnt = 0; ++ static u4Byte Counter = 0; ++ static u1Byte Delay = 1; ++ u8Byte curTxOkCnt; ++ u8Byte curRxOkCnt; ++ u1Byte SecCHOffset; ++ u1Byte i; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PRIMARY_CCA)) ++ return; ++ ++ if(pDM_Odm->SupportICType != ODM_RTL8188E) ++ return; ++ ++ Is40MHz = *(pDM_Odm->pBandWidth); ++ SecCHOffset = *(pDM_Odm->pSecChOffset); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset)); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if(Is40MHz==1) ++ SecCHOffset = SecCHOffset%2+1; // NIC's definition is reverse to AP 1:secondary below, 2: secondary above ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset)); ++ //3 Check Current WLAN Traffic ++ curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; ++ curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; ++ lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; ++ lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ //3 Check Current WLAN Traffic ++ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; ++ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; ++ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); ++ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); ++#endif ++ ++ //==================Debug Message==================== ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("TP = %llu\n", curTxOkCnt+curRxOkCnt)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is40MHz = %d\n", Is40MHz)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_LSC = %d\n", FalseAlmCnt->Cnt_BW_LSC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_USC = %d\n", FalseAlmCnt->Cnt_BW_USC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA OFDM = %d\n", FalseAlmCnt->Cnt_OFDM_CCA)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA CCK = %d\n", FalseAlmCnt->Cnt_CCK_CCA)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("OFDM FA = %d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCK FA = %d\n", FalseAlmCnt->Cnt_Cck_fail)); ++ //================================================ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (ACTING_AS_AP(Adapter)) // primary cca process only do at AP mode ++#endif ++ { ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("ACTING as AP mode=%d\n", ACTING_AS_AP(Adapter))); ++ //3 To get entry's connection and BW infomation status. ++ for(i=0;iBandWidth; // client BW ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Client_BW=%d\n", Client_tmp)); ++ if(Client_tmp>Client_40MHz) ++ Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High ++ ++ if(pEntry->bAssociated) ++ { ++ bConnected=TRUE; // client is connected or not ++ break; ++ } ++ } ++ else ++ { ++ break; ++ } ++ } ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ //3 To get entry's connection and BW infomation status. ++ ++ PSTA_INFO_T pstat; ++ ++ for(i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pstat) ) ++ { ++ Client_tmp = pstat->tx_bw; ++ if(Client_tmp>Client_40MHz) ++ Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High ++ ++ bConnected = TRUE; ++ } ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz)); ++ //1 Monitor whether the interference exists or not ++ if(PrimaryCCA->Monitor_flag == 1) ++ { ++ if(SecCHOffset == 1) // secondary channel is below the primary channel ++ { ++ if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500)) ++ { ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ { ++ PrimaryCCA->intf_type = 1; ++ PrimaryCCA->PriCCA_flag = 1; ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); // USC MF ++ if(PrimaryCCA->DupRTS_flag == 1) ++ PrimaryCCA->DupRTS_flag = 0; ++ } ++ else ++ { ++ PrimaryCCA->intf_type = 2; ++ if(PrimaryCCA->DupRTS_flag == 0) ++ PrimaryCCA->DupRTS_flag = 1; ++ } ++ ++ } ++ else // interferecne disappear ++ { ++ PrimaryCCA->DupRTS_flag = 0; ++ PrimaryCCA->intf_flag = 0; ++ PrimaryCCA->intf_type = 0; ++ } ++ } ++ else if(SecCHOffset == 2) // secondary channel is above the primary channel ++ { ++ if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500)) ++ { ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ { ++ PrimaryCCA->intf_type = 1; ++ PrimaryCCA->PriCCA_flag = 1; ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); // LSC MF ++ if(PrimaryCCA->DupRTS_flag == 1) ++ PrimaryCCA->DupRTS_flag = 0; ++ } ++ else ++ { ++ PrimaryCCA->intf_type = 2; ++ if(PrimaryCCA->DupRTS_flag == 0) ++ PrimaryCCA->DupRTS_flag = 1; ++ } ++ ++ } ++ else // interferecne disappear ++ { ++ PrimaryCCA->DupRTS_flag = 0; ++ PrimaryCCA->intf_flag = 0; ++ PrimaryCCA->intf_type = 0; ++ } ++ ++ ++ } ++ PrimaryCCA->Monitor_flag = 0; ++ } ++ ++ //1 Dynamic Primary CCA Main Function ++ if(PrimaryCCA->Monitor_flag == 0) ++ { ++ if(Is40MHz) // if RFBW==40M mode which require to process primary cca ++ { ++ //2 STA is NOT Connected ++ if(!bConnected) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n")); ++ ++ if(PrimaryCCA->PriCCA_flag == 1) // reset primary cca when STA is disconnected ++ { ++ PrimaryCCA->PriCCA_flag = 0; ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0); ++ } ++ if(PrimaryCCA->DupRTS_flag == 1) // reset Duplicate RTS when STA is disconnected ++ PrimaryCCA->DupRTS_flag = 0; ++ ++ if(SecCHOffset == 1) // secondary channel is below the primary channel ++ { ++ if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9)) ++ { ++ PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!! ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ PrimaryCCA->intf_type = 1; // interference is shift ++ else ++ PrimaryCCA->intf_type = 2; // interference is in-band ++ } ++ else ++ { ++ PrimaryCCA->intf_flag = 0; ++ PrimaryCCA->intf_type = 0; ++ } ++ } ++ else if(SecCHOffset == 2) // secondary channel is above the primary channel ++ { ++ if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9)) ++ { ++ PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!! ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ PrimaryCCA->intf_type = 1; // interference is shift ++ else ++ PrimaryCCA->intf_type = 2; // interference is in-band ++ } ++ else ++ { ++ PrimaryCCA->intf_flag = 0; ++ PrimaryCCA->intf_type = 0; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("PrimaryCCA=%d\n",PrimaryCCA->PriCCA_flag)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Intf_Type=%d\n", PrimaryCCA->intf_type)); ++ } ++ //2 STA is Connected ++ else ++ { ++ if(Client_40MHz == 0) //3 // client BW = 20MHz ++ { ++ if(PrimaryCCA->PriCCA_flag == 0) ++ { ++ PrimaryCCA->PriCCA_flag = 1; ++ if(SecCHOffset==1) ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); ++ else if(SecCHOffset==2) ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag)); ++ } ++ else //3 // client BW = 40MHz ++ { ++ if(PrimaryCCA->intf_flag == 1) // interference is detected!! ++ { ++ if(PrimaryCCA->intf_type == 1) ++ { ++ if(PrimaryCCA->PriCCA_flag!=1) ++ { ++ PrimaryCCA->PriCCA_flag = 1; ++ if(SecCHOffset==1) ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); ++ else if(SecCHOffset==2) ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); ++ } ++ } ++ else if(PrimaryCCA->intf_type == 2) ++ { ++ if(PrimaryCCA->DupRTS_flag!=1) ++ PrimaryCCA->DupRTS_flag = 1; ++ } ++ } ++ else // if intf_flag==0 ++ { ++ if((curTxOkCnt+curRxOkCnt)<10000) //idle mode or TP traffic is very low ++ { ++ if(SecCHOffset == 1) ++ { ++ if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9)) ++ { ++ PrimaryCCA->intf_flag = 1; ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ PrimaryCCA->intf_type = 1; // interference is shift ++ else ++ PrimaryCCA->intf_type = 2; // interference is in-band ++ } ++ } ++ else if(SecCHOffset == 2) ++ { ++ if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9)) ++ { ++ PrimaryCCA->intf_flag = 1; ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ PrimaryCCA->intf_type = 1; // interference is shift ++ else ++ PrimaryCCA->intf_type = 2; // interference is in-band ++ } ++ ++ } ++ } ++ else // TP Traffic is High ++ { ++ if(SecCHOffset == 1) ++ { ++ if(FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500)) ++ { ++ if(Delay == 0) // add delay to avoid interference occurring abruptly, jump one time ++ { ++ PrimaryCCA->intf_flag = 1; ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ PrimaryCCA->intf_type = 1; // interference is shift ++ else ++ PrimaryCCA->intf_type = 2; // interference is in-band ++ Delay = 1; ++ } ++ else ++ Delay = 0; ++ } ++ } ++ else if(SecCHOffset == 2) ++ { ++ if(FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500)) ++ { ++ if(Delay == 0) // add delay to avoid interference occurring abruptly ++ { ++ PrimaryCCA->intf_flag = 1; ++ if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) ++ PrimaryCCA->intf_type = 1; // interference is shift ++ else ++ PrimaryCCA->intf_type = 2; // interference is in-band ++ Delay = 1; ++ } ++ else ++ Delay = 0; ++ } ++ } ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Primary CCA=%d\n", PrimaryCCA->PriCCA_flag)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Duplicate RTS=%d\n", PrimaryCCA->DupRTS_flag)); ++ } ++ ++ }// end of connected ++ } ++ } ++ //1 Dynamic Primary CCA Monitor Counter ++ if((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1)) ++ { ++ if(Client_40MHz == 0) // client=20M no need to monitor primary cca flag ++ { ++ Client_40MHz_pre = Client_40MHz; ++ return; ++ } ++ Counter++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter)); ++ if((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) // Every 60 sec to monitor one time ++ { ++ PrimaryCCA->Monitor_flag = 1; // monitor flag is triggered!!!!! ++ if(PrimaryCCA->PriCCA_flag == 1) ++ { ++ PrimaryCCA->PriCCA_flag = 0; ++ ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0); ++ } ++ Counter = 0; ++ } ++ } ++ } ++ ++ Client_40MHz_pre = Client_40MHz; ++#endif ++} ++#else //#if (RTL8188E_SUPPORT == 1) ++ ++VOID ++odm_PrimaryCCA_Init( ++ IN PDM_ODM_T pDM_Odm) ++{ ++} ++VOID ++odm_DynamicPrimaryCCA( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++} ++BOOLEAN ++ODM_DynamicPrimaryCCA_DupRTS( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ return FALSE; ++} ++#endif //#if (RTL8188E_SUPPORT == 1) ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_rtl8188e.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_rtl8188e.h +new file mode 100644 +index 0000000..6f4211c +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188e/phydm_rtl8188e.h +@@ -0,0 +1,69 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __ODM_RTL8188E_H__ ++#define __ODM_RTL8188E_H__ ++ ++ ++#define MAIN_ANT_CG_TRX 1 ++#define AUX_ANT_CG_TRX 0 ++#define MAIN_ANT_CGCS_RX 0 ++#define AUX_ANT_CGCS_RX 1 ++ ++VOID ++ODM_DIG_LowerBound_88E( ++ IN PDM_ODM_T pDM_Odm ++); ++ ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++#define SwAntDivResetBeforeLink ODM_SwAntDivResetBeforeLink ++ ++VOID ODM_SwAntDivResetBeforeLink(IN PDM_ODM_T pDM_Odm); ++ ++VOID ++ODM_SetTxAntByTxInfo_88E( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++); ++#else// (DM_ODM_SUPPORT_TYPE == ODM_AP) ++VOID ++ODM_SetTxAntByTxInfo_88E( ++ IN PDM_ODM_T pDM_Odm ++); ++#endif ++ ++VOID ++odm_PrimaryCCA_Init( ++ IN PDM_ODM_T pDM_Odm); ++ ++BOOLEAN ++ODM_DynamicPrimaryCCA_DupRTS( ++ IN PDM_ODM_T pDM_Odm); ++ ++VOID ++odm_DynamicPrimaryCCA( ++ IN PDM_ODM_T pDM_Odm); ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/hal8188freg.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/hal8188freg.h new file mode 100644 -index 000000000..40b1a0a4c +index 0000000..40b1a0a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/hal8188freg.h @@ -0,0 +1,862 @@ @@ -227034,5849 +251359,5849 @@ index 000000000..40b1a0a4c +#endif // #ifndef __INC_HAL8188FREG_H diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_bb.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_bb.c new file mode 100644 -index 000000000..7fe8ebf63 +index 0000000..58a5d3e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_bb.c @@ -0,0 +1,590 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.18*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8188F_SUPPORT == 1) -+static BOOLEAN -+CheckPositive( -+ IN PDM_ODM_T pDM_Odm, -+ IN const u4Byte Condition1, -+ IN const u4Byte Condition2, -+ IN const u4Byte Condition3, -+ IN const u4Byte Condition4 -+) -+{ -+ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ -+ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ -+ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ -+ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ -+ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ -+ -+ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; -+ u4Byte driver1 = pDM_Odm->CutVersion << 24 | -+ (pDM_Odm->SupportInterface & 0xF0) << 16 | -+ pDM_Odm->SupportPlatform << 16 | -+ pDM_Odm->PackageType << 12 | -+ (pDM_Odm->SupportInterface & 0x0F) << 8 | -+ _BoardType; -+ -+ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | -+ (pDM_Odm->TypeGPA & 0xFF) << 8 | -+ (pDM_Odm->TypeALNA & 0xFF) << 16 | -+ (pDM_Odm->TypeAPA & 0xFF) << 24; -+ -+u4Byte driver3 = 0; -+ -+ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | -+ (pDM_Odm->TypeGPA & 0xFF00) | -+ (pDM_Odm->TypeALNA & 0xFF00) << 8 | -+ (pDM_Odm->TypeAPA & 0xFF00) << 16; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); -+ -+ -+ /*============== Value Defined Check ===============*/ -+ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ -+ -+ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) -+ return FALSE; -+ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) -+ return FALSE; -+ -+ /*=============== Bit Defined Check ================*/ -+ /* We don't care [31:28] */ -+ -+ cond1 &= 0x00FF0FFF; -+ driver1 &= 0x00FF0FFF; -+ -+ if ((cond1 & driver1) == cond1) { -+ u4Byte bitMask = 0; -+ -+ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ -+ return TRUE; -+ -+ if ((cond1 & BIT0) != 0) /*GLNA*/ -+ bitMask |= 0x000000FF; -+ if ((cond1 & BIT1) != 0) /*GPA*/ -+ bitMask |= 0x0000FF00; -+ if ((cond1 & BIT2) != 0) /*ALNA*/ -+ bitMask |= 0x00FF0000; -+ if ((cond1 & BIT3) != 0) /*APA*/ -+ bitMask |= 0xFF000000; -+ -+ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ -+ return TRUE; -+ else -+ return FALSE; -+ } else -+ return FALSE; -+} -+static BOOLEAN -+CheckNegative( -+ IN PDM_ODM_T pDM_Odm, -+ IN const u4Byte Condition1, -+ IN const u4Byte Condition2 -+) -+{ -+ return TRUE; -+} -+ -+/****************************************************************************** -+* AGC_TAB.TXT -+******************************************************************************/ -+ -+u4Byte Array_MP_8188F_AGC_TAB[] = { -+ 0xC78, 0xFC000001, -+ 0xC78, 0xFB010001, -+ 0xC78, 0xFA020001, -+ 0xC78, 0xF9030001, -+ 0xC78, 0xF8040001, -+ 0xC78, 0xF7050001, -+ 0xC78, 0xF6060001, -+ 0xC78, 0xF5070001, -+ 0xC78, 0xF4080001, -+ 0xC78, 0xF3090001, -+ 0xC78, 0xF20A0001, -+ 0xC78, 0xF10B0001, -+ 0xC78, 0xF00C0001, -+ 0xC78, 0xEF0D0001, -+ 0xC78, 0xEE0E0001, -+ 0xC78, 0xED0F0001, -+ 0xC78, 0xEC100001, -+ 0xC78, 0xEB110001, -+ 0xC78, 0xEA120001, -+ 0xC78, 0xE9130001, -+ 0xC78, 0xE8140001, -+ 0xC78, 0xE7150001, -+ 0xC78, 0xE6160001, -+ 0xC78, 0xE5170001, -+ 0xC78, 0xE4180001, -+ 0xC78, 0xE3190001, -+ 0xC78, 0xE21A0001, -+ 0xC78, 0xE11B0001, -+ 0xC78, 0xE01C0001, -+ 0xC78, 0xC21D0001, -+ 0xC78, 0xC11E0001, -+ 0xC78, 0xC01F0001, -+ 0xC78, 0xA5200001, -+ 0xC78, 0xA4210001, -+ 0xC78, 0xA3220001, -+ 0xC78, 0xA2230001, -+ 0xC78, 0xA1240001, -+ 0xC78, 0xA0250001, -+ 0xC78, 0x65260001, -+ 0xC78, 0x64270001, -+ 0xC78, 0x63280001, -+ 0xC78, 0x62290001, -+ 0xC78, 0x612A0001, -+ 0xC78, 0x442B0001, -+ 0xC78, 0x432C0001, -+ 0xC78, 0x422D0001, -+ 0xC78, 0x412E0001, -+ 0xC78, 0x402F0001, -+ 0xC78, 0x21300001, -+ 0xC78, 0x20310001, -+ 0xC78, 0x05320001, -+ 0xC78, 0x04330001, -+ 0xC78, 0x03340001, -+ 0xC78, 0x02350001, -+ 0xC78, 0x01360001, -+ 0xC78, 0x00370001, -+ 0xC78, 0x00380001, -+ 0xC78, 0x00390001, -+ 0xC78, 0x003A0001, -+ 0xC78, 0x003B0001, -+ 0xC78, 0x003C0001, -+ 0xC78, 0x003D0001, -+ 0xC78, 0x003E0001, -+ 0xC78, 0x003F0001, -+ 0xC50, 0x69553422, -+ 0xC50, 0x69553420, -+ -+}; -+ -+void -+ODM_ReadAndConfig_MP_8188F_AGC_TAB( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u4Byte i = 0; -+ u1Byte cCond; -+ BOOLEAN bMatched = TRUE, bSkipped = FALSE; -+ u4Byte ArrayLen = sizeof(Array_MP_8188F_AGC_TAB)/sizeof(u4Byte); -+ pu4Byte Array = Array_MP_8188F_AGC_TAB; -+ -+ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_AGC_TAB\n")); -+ -+ while ((i + 1) < ArrayLen) { -+ v1 = Array[i]; -+ v2 = Array[i + 1]; -+ -+ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ -+ if (v1 & BIT31) {/* positive condition*/ -+ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); -+ if (cCond == COND_ENDIF) {/*end*/ -+ bMatched = TRUE; -+ bSkipped = FALSE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); -+ } else if (cCond == COND_ELSE) { /*else*/ -+ bMatched = bSkipped?FALSE:TRUE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); -+ } -+ } else if (v1 & BIT30) { /*negative condition*/ -+ if (bSkipped == FALSE) { -+ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { -+ bMatched = TRUE; -+ bSkipped = TRUE; -+ } else { -+ bMatched = FALSE; -+ bSkipped = FALSE; -+ } -+ } else -+ bMatched = FALSE; -+ } -+ } else { -+ if (bMatched) -+ odm_ConfigBB_AGC_8188F(pDM_Odm, v1, bMaskDWord, v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u4Byte -+ODM_GetVersion_MP_8188F_AGC_TAB(void) -+{ -+ return 25; -+} -+ -+/****************************************************************************** -+* PHY_REG.TXT -+******************************************************************************/ -+ -+u4Byte Array_MP_8188F_PHY_REG[] = { -+ 0x800, 0x83045700, -+ 0x804, 0x00000001, -+ 0x808, 0x0000FC00, -+ 0x80C, 0x0000000A, -+ 0x810, 0x10001331, -+ 0x814, 0x020C3D10, -+ 0x818, 0x00200385, -+ 0x81C, 0x00000000, -+ 0x820, 0x01000100, -+ 0x824, 0x00390204, -+ 0x828, 0x00000000, -+ 0x82C, 0x00000000, -+ 0x830, 0x00000000, -+ 0x834, 0x00000000, -+ 0x838, 0x00000000, -+ 0x83C, 0x00000000, -+ 0x840, 0x00010000, -+ 0x844, 0x00000000, -+ 0x848, 0x00000000, -+ 0x84C, 0x00000000, -+ 0x850, 0x00030000, -+ 0x854, 0x00000000, -+ 0x858, 0x569A569A, -+ 0x85C, 0x569A569A, -+ 0x860, 0x00000130, -+ 0x864, 0x00000000, -+ 0x868, 0x00000000, -+ 0x86C, 0x27272700, -+ 0x870, 0x00000000, -+ 0x874, 0x25004000, -+ 0x878, 0x00000808, -+ 0x87C, 0x004F0201, -+ 0x880, 0xB0000B1E, -+ 0x884, 0x00000007, -+ 0x888, 0x00000000, -+ 0x88C, 0xCCC000C0, -+ 0x890, 0x00000800, -+ 0x894, 0xFFFFFFFE, -+ 0x898, 0x40302010, -+ 0x89C, 0x00706050, -+ 0x900, 0x00000000, -+ 0x904, 0x00000023, -+ 0x908, 0x00000000, -+ 0x90C, 0x81121111, -+ 0x910, 0x00000002, -+ 0x914, 0x00000201, -+ 0x948, 0x99000000, -+ 0x94C, 0x00000010, -+ 0x950, 0x20003000, -+ 0x954, 0x4A880000, -+ 0x958, 0x4BC5D87A, -+ 0x95C, 0x04EB9B79, -+ 0x96C, 0x00000003, -+ 0xA00, 0x00D047C8, -+ 0xA04, 0x80FF800C, -+ 0x80000400, 0x00000000, 0x40000000, 0x00000000, -+ 0xA08, 0x8C038300, -+ 0xA0000000, 0x00000000, -+ 0xA08, 0x8CCD8300, -+ 0xB0000000, 0x00000000, -+ 0xA0C, 0x2E7F120F, -+ 0xA10, 0x9500BB78, -+ 0xA14, 0x1114D028, -+ 0xA18, 0x00881117, -+ 0xA1C, 0x89140F00, -+ 0xA20, 0xD1D80000, -+ 0xA24, 0x5A7DA0BD, -+ 0xA28, 0x0000223B, -+ 0xA2C, 0x00D30000, -+ 0xA70, 0x101FBF00, -+ 0xA74, 0x00000007, -+ 0xA78, 0x00008900, -+ 0xA7C, 0x225B0606, -+ 0xA80, 0x218075B1, -+ 0xA84, 0x00120000, -+ 0xA88, 0x040C0000, -+ 0xA8C, 0x12345678, -+ 0xA90, 0xABCDEF00, -+ 0xA94, 0x001B1B89, -+ 0xA98, 0x05100000, -+ 0xA9C, 0x3F000000, -+ 0xAA0, 0x00000000, -+ 0xB2C, 0x00000000, -+ 0xC00, 0x48071D40, -+ 0xC04, 0x03A05611, -+ 0xC08, 0x000000E4, -+ 0xC0C, 0x6C6C6C6C, -+ 0xC10, 0x18800000, -+ 0xC14, 0x40000100, -+ 0xC18, 0x08800000, -+ 0xC1C, 0x40000100, -+ 0xC20, 0x00000000, -+ 0xC24, 0x00000000, -+ 0xC28, 0x00000000, -+ 0xC2C, 0x00000000, -+ 0xC30, 0x69E9CC4A, -+ 0xC34, 0x31000040, -+ 0xC38, 0x21688080, -+ 0xC3C, 0x00001714, -+ 0xC40, 0x1F78403F, -+ 0xC44, 0x00010036, -+ 0xC48, 0xEC020107, -+ 0xC4C, 0x007F037F, -+ 0xC50, 0x69553420, -+ 0xC54, 0x43BC0094, -+ 0xC58, 0x00013169, -+ 0xC5C, 0x00250492, -+ 0xC60, 0x00000000, -+ 0xC64, 0x7112848B, -+ 0xC68, 0x47C07BFF, -+ 0xC6C, 0x00000036, -+ 0xC70, 0x2C7F000D, -+ 0xC74, 0x020600DB, -+ 0xC78, 0x0000001F, -+ 0xC7C, 0x00B91612, -+ 0xC80, 0x390000E4, -+ 0x80000400, 0x00000000, 0x40000000, 0x00000000, -+ 0xC84, 0x21F60000, -+ 0xA0000000, 0x00000000, -+ 0xC84, 0x71F60000, -+ 0xB0000000, 0x00000000, -+ 0xC88, 0x40000100, -+ 0xC8C, 0x20200000, -+ 0xC90, 0x00091521, -+ 0xC94, 0x00000000, -+ 0xC98, 0x00121820, -+ 0xC9C, 0x00007F7F, -+ 0xCA0, 0x00000000, -+ 0xCA4, 0x000300A0, -+ 0xCA8, 0x00000000, -+ 0xCAC, 0x00000000, -+ 0xCB0, 0x00000000, -+ 0xCB4, 0x00000000, -+ 0xCB8, 0x00000000, -+ 0xCBC, 0x28000000, -+ 0xCC0, 0x00000000, -+ 0xCC4, 0x00000000, -+ 0xCC8, 0x00000000, -+ 0xCCC, 0x00000000, -+ 0xCD0, 0x00000000, -+ 0xCD4, 0x00000000, -+ 0xCD8, 0x64B22427, -+ 0xCDC, 0x00766932, -+ 0xCE0, 0x00222222, -+ 0xCE4, 0x10000000, -+ 0xCE8, 0x37644302, -+ 0xCEC, 0x2F97D40C, -+ 0xD00, 0x04030740, -+ 0xD04, 0x40020401, -+ 0xD08, 0x0000907F, -+ 0xD0C, 0x20010201, -+ 0xD10, 0xA0633333, -+ 0xD14, 0x3333BC53, -+ 0xD18, 0x7A8F5B6F, -+ 0xD2C, 0xCB979975, -+ 0xD30, 0x00000000, -+ 0xD34, 0x80608000, -+ 0xD38, 0x98000000, -+ 0xD3C, 0x40127353, -+ 0xD40, 0x00000000, -+ 0xD44, 0x00000000, -+ 0xD48, 0x00000000, -+ 0xD4C, 0x00000000, -+ 0xD50, 0x6437140A, -+ 0xD54, 0x00000000, -+ 0xD58, 0x00000282, -+ 0xD5C, 0x30032064, -+ 0xD60, 0x4653DE68, -+ 0xD64, 0x04518A3C, -+ 0xD68, 0x00002101, -+ 0xD6C, 0x2A201C16, -+ 0xD70, 0x1812362E, -+ 0xD74, 0x322C2220, -+ 0xD78, 0x000E3C24, -+ 0xE00, 0x2D2D2D2D, -+ 0xE04, 0x2D2D2D2D, -+ 0xE08, 0x0390272D, -+ 0xE10, 0x2D2D2D2D, -+ 0xE14, 0x2D2D2D2D, -+ 0xE18, 0x2D2D2D2D, -+ 0xE1C, 0x2D2D2D2D, -+ 0xE28, 0x00000000, -+ 0xE30, 0x1000DC1F, -+ 0xE34, 0x10008C1F, -+ 0xE38, 0x02140102, -+ 0xE3C, 0x681604C2, -+ 0xE40, 0x01007C00, -+ 0xE44, 0x01004800, -+ 0xE48, 0xFB000000, -+ 0xE4C, 0x000028D1, -+ 0xE50, 0x1000DC1F, -+ 0xE54, 0x10008C1F, -+ 0xE58, 0x02140102, -+ 0xE5C, 0x28160D05, -+ 0xE60, 0x00000008, -+ 0xE60, 0x021400A0, -+ 0xE64, 0x281600A0, -+ 0xE6C, 0x01C00010, -+ 0xE70, 0x01C00010, -+ 0xE74, 0x02000010, -+ 0xE78, 0x02000010, -+ 0xE7C, 0x02000010, -+ 0xE80, 0x02000010, -+ 0xE84, 0x01C00010, -+ 0xE88, 0x02000010, -+ 0xE8C, 0x01C00010, -+ 0xED0, 0x01C00010, -+ 0xED4, 0x01C00010, -+ 0xED8, 0x01C00010, -+ 0xEDC, 0x00000010, -+ 0xEE0, 0x00000010, -+ 0xEEC, 0x03C00010, -+ 0xF14, 0x00000003, -+ 0xF4C, 0x00000000, -+ 0xF00, 0x00000300, -+ -+}; -+ -+void -+ODM_ReadAndConfig_MP_8188F_PHY_REG( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u4Byte i = 0; -+ u1Byte cCond; -+ BOOLEAN bMatched = TRUE, bSkipped = FALSE; -+ u4Byte ArrayLen = sizeof(Array_MP_8188F_PHY_REG)/sizeof(u4Byte); -+ pu4Byte Array = Array_MP_8188F_PHY_REG; -+ -+ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_PHY_REG\n")); -+ -+ while ((i + 1) < ArrayLen) { -+ v1 = Array[i]; -+ v2 = Array[i + 1]; -+ -+ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ -+ if (v1 & BIT31) {/* positive condition*/ -+ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); -+ if (cCond == COND_ENDIF) {/*end*/ -+ bMatched = TRUE; -+ bSkipped = FALSE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); -+ } else if (cCond == COND_ELSE) { /*else*/ -+ bMatched = bSkipped?FALSE:TRUE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); -+ } -+ } else if (v1 & BIT30) { /*negative condition*/ -+ if (bSkipped == FALSE) { -+ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { -+ bMatched = TRUE; -+ bSkipped = TRUE; -+ } else { -+ bMatched = FALSE; -+ bSkipped = FALSE; -+ } -+ } else -+ bMatched = FALSE; -+ } -+ } else { -+ if (bMatched) -+ odm_ConfigBB_PHY_8188F(pDM_Odm, v1, bMaskDWord, v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u4Byte -+ODM_GetVersion_MP_8188F_PHY_REG(void) -+{ -+ return 25; -+} -+ -+/****************************************************************************** -+* PHY_REG_PG.TXT -+******************************************************************************/ -+ -+u4Byte Array_MP_8188F_PHY_REG_PG[] = { -+ 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200, -+ 0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200, -+ 0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636, -+ 0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234, -+ 0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434, -+ 0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830 -+}; -+ -+void -+ODM_ReadAndConfig_MP_8188F_PHY_REG_PG( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u4Byte i = 0; -+ u4Byte ArrayLen = sizeof(Array_MP_8188F_PHY_REG_PG)/sizeof(u4Byte); -+ pu4Byte Array = Array_MP_8188F_PHY_REG_PG; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ PlatformZeroMemory(pHalData->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); -+ pHalData->nLinesReadPwrByRate = ArrayLen/6; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_PHY_REG_PG\n")); -+ -+ pDM_Odm->PhyRegPgVersion = 1; -+ pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; -+ -+ for (i = 0; i < ArrayLen; i += 6) { -+ u4Byte v1 = Array[i]; -+ u4Byte v2 = Array[i+1]; -+ u4Byte v3 = Array[i+2]; -+ u4Byte v4 = Array[i+3]; -+ u4Byte v5 = Array[i+4]; -+ u4Byte v6 = Array[i+5]; -+ -+ odm_ConfigBB_PHY_REG_PG_8188F(pDM_Odm, v1, v2, v3, v4, v5, v6); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ rsprintf((char *)pHalData->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", -+ (v1 == 0?"2.4G":" 5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6); -+#endif -+ } -+} -+ -+ -+ -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.18*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188F_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* AGC_TAB.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188F_AGC_TAB[] = { ++ 0xC78, 0xFC000001, ++ 0xC78, 0xFB010001, ++ 0xC78, 0xFA020001, ++ 0xC78, 0xF9030001, ++ 0xC78, 0xF8040001, ++ 0xC78, 0xF7050001, ++ 0xC78, 0xF6060001, ++ 0xC78, 0xF5070001, ++ 0xC78, 0xF4080001, ++ 0xC78, 0xF3090001, ++ 0xC78, 0xF20A0001, ++ 0xC78, 0xF10B0001, ++ 0xC78, 0xF00C0001, ++ 0xC78, 0xEF0D0001, ++ 0xC78, 0xEE0E0001, ++ 0xC78, 0xED0F0001, ++ 0xC78, 0xEC100001, ++ 0xC78, 0xEB110001, ++ 0xC78, 0xEA120001, ++ 0xC78, 0xE9130001, ++ 0xC78, 0xE8140001, ++ 0xC78, 0xE7150001, ++ 0xC78, 0xE6160001, ++ 0xC78, 0xE5170001, ++ 0xC78, 0xE4180001, ++ 0xC78, 0xE3190001, ++ 0xC78, 0xE21A0001, ++ 0xC78, 0xE11B0001, ++ 0xC78, 0xE01C0001, ++ 0xC78, 0xC21D0001, ++ 0xC78, 0xC11E0001, ++ 0xC78, 0xC01F0001, ++ 0xC78, 0xA5200001, ++ 0xC78, 0xA4210001, ++ 0xC78, 0xA3220001, ++ 0xC78, 0xA2230001, ++ 0xC78, 0xA1240001, ++ 0xC78, 0xA0250001, ++ 0xC78, 0x65260001, ++ 0xC78, 0x64270001, ++ 0xC78, 0x63280001, ++ 0xC78, 0x62290001, ++ 0xC78, 0x612A0001, ++ 0xC78, 0x442B0001, ++ 0xC78, 0x432C0001, ++ 0xC78, 0x422D0001, ++ 0xC78, 0x412E0001, ++ 0xC78, 0x402F0001, ++ 0xC78, 0x21300001, ++ 0xC78, 0x20310001, ++ 0xC78, 0x05320001, ++ 0xC78, 0x04330001, ++ 0xC78, 0x03340001, ++ 0xC78, 0x02350001, ++ 0xC78, 0x01360001, ++ 0xC78, 0x00370001, ++ 0xC78, 0x00380001, ++ 0xC78, 0x00390001, ++ 0xC78, 0x003A0001, ++ 0xC78, 0x003B0001, ++ 0xC78, 0x003C0001, ++ 0xC78, 0x003D0001, ++ 0xC78, 0x003E0001, ++ 0xC78, 0x003F0001, ++ 0xC50, 0x69553422, ++ 0xC50, 0x69553420, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188F_AGC_TAB( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188F_AGC_TAB)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188F_AGC_TAB; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_AGC_TAB\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigBB_AGC_8188F(pDM_Odm, v1, bMaskDWord, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188F_AGC_TAB(void) ++{ ++ return 25; ++} ++ ++/****************************************************************************** ++* PHY_REG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188F_PHY_REG[] = { ++ 0x800, 0x83045700, ++ 0x804, 0x00000001, ++ 0x808, 0x0000FC00, ++ 0x80C, 0x0000000A, ++ 0x810, 0x10001331, ++ 0x814, 0x020C3D10, ++ 0x818, 0x00200385, ++ 0x81C, 0x00000000, ++ 0x820, 0x01000100, ++ 0x824, 0x00390204, ++ 0x828, 0x00000000, ++ 0x82C, 0x00000000, ++ 0x830, 0x00000000, ++ 0x834, 0x00000000, ++ 0x838, 0x00000000, ++ 0x83C, 0x00000000, ++ 0x840, 0x00010000, ++ 0x844, 0x00000000, ++ 0x848, 0x00000000, ++ 0x84C, 0x00000000, ++ 0x850, 0x00030000, ++ 0x854, 0x00000000, ++ 0x858, 0x569A569A, ++ 0x85C, 0x569A569A, ++ 0x860, 0x00000130, ++ 0x864, 0x00000000, ++ 0x868, 0x00000000, ++ 0x86C, 0x27272700, ++ 0x870, 0x00000000, ++ 0x874, 0x25004000, ++ 0x878, 0x00000808, ++ 0x87C, 0x004F0201, ++ 0x880, 0xB0000B1E, ++ 0x884, 0x00000007, ++ 0x888, 0x00000000, ++ 0x88C, 0xCCC000C0, ++ 0x890, 0x00000800, ++ 0x894, 0xFFFFFFFE, ++ 0x898, 0x40302010, ++ 0x89C, 0x00706050, ++ 0x900, 0x00000000, ++ 0x904, 0x00000023, ++ 0x908, 0x00000000, ++ 0x90C, 0x81121111, ++ 0x910, 0x00000002, ++ 0x914, 0x00000201, ++ 0x948, 0x99000000, ++ 0x94C, 0x00000010, ++ 0x950, 0x20003000, ++ 0x954, 0x4A880000, ++ 0x958, 0x4BC5D87A, ++ 0x95C, 0x04EB9B79, ++ 0x96C, 0x00000003, ++ 0xA00, 0x00D047C8, ++ 0xA04, 0x80FF800C, ++ 0x80000400, 0x00000000, 0x40000000, 0x00000000, ++ 0xA08, 0x8C038300, ++ 0xA0000000, 0x00000000, ++ 0xA08, 0x8CCD8300, ++ 0xB0000000, 0x00000000, ++ 0xA0C, 0x2E7F120F, ++ 0xA10, 0x9500BB78, ++ 0xA14, 0x1114D028, ++ 0xA18, 0x00881117, ++ 0xA1C, 0x89140F00, ++ 0xA20, 0xD1D80000, ++ 0xA24, 0x5A7DA0BD, ++ 0xA28, 0x0000223B, ++ 0xA2C, 0x00D30000, ++ 0xA70, 0x101FBF00, ++ 0xA74, 0x00000007, ++ 0xA78, 0x00008900, ++ 0xA7C, 0x225B0606, ++ 0xA80, 0x218075B1, ++ 0xA84, 0x00120000, ++ 0xA88, 0x040C0000, ++ 0xA8C, 0x12345678, ++ 0xA90, 0xABCDEF00, ++ 0xA94, 0x001B1B89, ++ 0xA98, 0x05100000, ++ 0xA9C, 0x3F000000, ++ 0xAA0, 0x00000000, ++ 0xB2C, 0x00000000, ++ 0xC00, 0x48071D40, ++ 0xC04, 0x03A05611, ++ 0xC08, 0x000000E4, ++ 0xC0C, 0x6C6C6C6C, ++ 0xC10, 0x18800000, ++ 0xC14, 0x40000100, ++ 0xC18, 0x08800000, ++ 0xC1C, 0x40000100, ++ 0xC20, 0x00000000, ++ 0xC24, 0x00000000, ++ 0xC28, 0x00000000, ++ 0xC2C, 0x00000000, ++ 0xC30, 0x69E9CC4A, ++ 0xC34, 0x31000040, ++ 0xC38, 0x21688080, ++ 0xC3C, 0x00001714, ++ 0xC40, 0x1F78403F, ++ 0xC44, 0x00010036, ++ 0xC48, 0xEC020107, ++ 0xC4C, 0x007F037F, ++ 0xC50, 0x69553420, ++ 0xC54, 0x43BC0094, ++ 0xC58, 0x00013169, ++ 0xC5C, 0x00250492, ++ 0xC60, 0x00000000, ++ 0xC64, 0x7112848B, ++ 0xC68, 0x47C07BFF, ++ 0xC6C, 0x00000036, ++ 0xC70, 0x2C7F000D, ++ 0xC74, 0x020600DB, ++ 0xC78, 0x0000001F, ++ 0xC7C, 0x00B91612, ++ 0xC80, 0x390000E4, ++ 0x80000400, 0x00000000, 0x40000000, 0x00000000, ++ 0xC84, 0x21F60000, ++ 0xA0000000, 0x00000000, ++ 0xC84, 0x71F60000, ++ 0xB0000000, 0x00000000, ++ 0xC88, 0x40000100, ++ 0xC8C, 0x20200000, ++ 0xC90, 0x00091521, ++ 0xC94, 0x00000000, ++ 0xC98, 0x00121820, ++ 0xC9C, 0x00007F7F, ++ 0xCA0, 0x00000000, ++ 0xCA4, 0x000300A0, ++ 0xCA8, 0x00000000, ++ 0xCAC, 0x00000000, ++ 0xCB0, 0x00000000, ++ 0xCB4, 0x00000000, ++ 0xCB8, 0x00000000, ++ 0xCBC, 0x28000000, ++ 0xCC0, 0x00000000, ++ 0xCC4, 0x00000000, ++ 0xCC8, 0x00000000, ++ 0xCCC, 0x00000000, ++ 0xCD0, 0x00000000, ++ 0xCD4, 0x00000000, ++ 0xCD8, 0x64B22427, ++ 0xCDC, 0x00766932, ++ 0xCE0, 0x00222222, ++ 0xCE4, 0x10000000, ++ 0xCE8, 0x37644302, ++ 0xCEC, 0x2F97D40C, ++ 0xD00, 0x04030740, ++ 0xD04, 0x40020401, ++ 0xD08, 0x0000907F, ++ 0xD0C, 0x20010201, ++ 0xD10, 0xA0633333, ++ 0xD14, 0x3333BC53, ++ 0xD18, 0x7A8F5B6F, ++ 0xD2C, 0xCB979975, ++ 0xD30, 0x00000000, ++ 0xD34, 0x80608000, ++ 0xD38, 0x98000000, ++ 0xD3C, 0x40127353, ++ 0xD40, 0x00000000, ++ 0xD44, 0x00000000, ++ 0xD48, 0x00000000, ++ 0xD4C, 0x00000000, ++ 0xD50, 0x6437140A, ++ 0xD54, 0x00000000, ++ 0xD58, 0x00000282, ++ 0xD5C, 0x30032064, ++ 0xD60, 0x4653DE68, ++ 0xD64, 0x04518A3C, ++ 0xD68, 0x00002101, ++ 0xD6C, 0x2A201C16, ++ 0xD70, 0x1812362E, ++ 0xD74, 0x322C2220, ++ 0xD78, 0x000E3C24, ++ 0xE00, 0x2D2D2D2D, ++ 0xE04, 0x2D2D2D2D, ++ 0xE08, 0x0390272D, ++ 0xE10, 0x2D2D2D2D, ++ 0xE14, 0x2D2D2D2D, ++ 0xE18, 0x2D2D2D2D, ++ 0xE1C, 0x2D2D2D2D, ++ 0xE28, 0x00000000, ++ 0xE30, 0x1000DC1F, ++ 0xE34, 0x10008C1F, ++ 0xE38, 0x02140102, ++ 0xE3C, 0x681604C2, ++ 0xE40, 0x01007C00, ++ 0xE44, 0x01004800, ++ 0xE48, 0xFB000000, ++ 0xE4C, 0x000028D1, ++ 0xE50, 0x1000DC1F, ++ 0xE54, 0x10008C1F, ++ 0xE58, 0x02140102, ++ 0xE5C, 0x28160D05, ++ 0xE60, 0x00000008, ++ 0xE60, 0x021400A0, ++ 0xE64, 0x281600A0, ++ 0xE6C, 0x01C00010, ++ 0xE70, 0x01C00010, ++ 0xE74, 0x02000010, ++ 0xE78, 0x02000010, ++ 0xE7C, 0x02000010, ++ 0xE80, 0x02000010, ++ 0xE84, 0x01C00010, ++ 0xE88, 0x02000010, ++ 0xE8C, 0x01C00010, ++ 0xED0, 0x01C00010, ++ 0xED4, 0x01C00010, ++ 0xED8, 0x01C00010, ++ 0xEDC, 0x00000010, ++ 0xEE0, 0x00000010, ++ 0xEEC, 0x03C00010, ++ 0xF14, 0x00000003, ++ 0xF4C, 0x00000000, ++ 0xF00, 0x00000300, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188F_PHY_REG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188F_PHY_REG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188F_PHY_REG; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_PHY_REG\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigBB_PHY_8188F(pDM_Odm, v1, bMaskDWord, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188F_PHY_REG(void) ++{ ++ return 25; ++} ++ ++/****************************************************************************** ++* PHY_REG_PG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188F_PHY_REG_PG[] = { ++ 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200, ++ 0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200, ++ 0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636, ++ 0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234, ++ 0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434, ++ 0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830 ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188F_PHY_REG_PG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u4Byte ArrayLen = sizeof(Array_MP_8188F_PHY_REG_PG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188F_PHY_REG_PG; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformZeroMemory(pHalData->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesReadPwrByRate = ArrayLen/6; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_PHY_REG_PG\n")); ++ ++ pDM_Odm->PhyRegPgVersion = 1; ++ pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; ++ ++ for (i = 0; i < ArrayLen; i += 6) { ++ u4Byte v1 = Array[i]; ++ u4Byte v2 = Array[i+1]; ++ u4Byte v3 = Array[i+2]; ++ u4Byte v4 = Array[i+3]; ++ u4Byte v5 = Array[i+4]; ++ u4Byte v6 = Array[i+5]; ++ ++ odm_ConfigBB_PHY_REG_PG_8188F(pDM_Odm, v1, v2, v3, v4, v5, v6); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ rsprintf((char *)pHalData->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", ++ (v1 == 0?"2.4G":" 5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6); ++#endif ++ } ++} ++ ++ ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_bb.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_bb.h new file mode 100644 -index 000000000..f0a4aa015 +index 0000000..71d15e5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_bb.h @@ -0,0 +1,59 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.18*/ -+#if (RTL8188F_SUPPORT == 1) -+#ifndef __INC_MP_BB_HW_IMG_8188F_H -+#define __INC_MP_BB_HW_IMG_8188F_H -+ -+ -+/****************************************************************************** -+* AGC_TAB.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_AGC_TAB(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_AGC_TAB(void); -+ -+/****************************************************************************** -+* PHY_REG.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_PHY_REG(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_PHY_REG(void); -+ -+/****************************************************************************** -+* PHY_REG_PG.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_PHY_REG_PG(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_PHY_REG_PG(void); -+ -+#endif -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.18*/ ++#if (RTL8188F_SUPPORT == 1) ++#ifndef __INC_MP_BB_HW_IMG_8188F_H ++#define __INC_MP_BB_HW_IMG_8188F_H ++ ++ ++/****************************************************************************** ++* AGC_TAB.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_AGC_TAB(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_AGC_TAB(void); ++ ++/****************************************************************************** ++* PHY_REG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_PHY_REG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_PHY_REG(void); ++ ++/****************************************************************************** ++* PHY_REG_PG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_PHY_REG_PG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_PHY_REG_PG(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_fw.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_fw.c new file mode 100644 -index 000000000..a9a4cd744 +index 0000000..5753255 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_fw.c @@ -0,0 +1,3547 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.16*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8188F_SUPPORT == 1) -+#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) -+ -+ -+u1Byte Array_MP_8188F_FW_AP[] = { -+0xF1, 0x88, 0x20, 0x00, 0x01, 0x00, 0x07, 0x00, 0x10, 0x22, 0x17, 0x28, 0x36, 0x44, 0x02, 0x00, -+0xE7, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x87, 0x32, 0x02, 0xB7, 0xB4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xAC, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xB8, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xB7, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xA9, 0xD2, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xB8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x87, 0xDA, 0x02, 0x96, 0x30, 0x02, 0x80, 0x86, 0x02, 0x80, 0x89, 0x02, 0x80, 0x8C, 0x02, -+0x8D, 0x4D, 0x02, 0x97, 0xD8, 0x02, 0x80, 0x95, 0x02, 0x80, 0x98, 0x02, 0x80, 0x9B, 0x02, 0x80, -+0x9E, 0x02, 0x80, 0xA1, 0x02, 0x80, 0xA4, 0x02, 0x80, 0xA7, 0x02, 0x80, 0xAA, 0x02, 0x80, 0xAD, -+0x02, 0x80, 0xB0, 0x02, 0x89, 0x19, 0x02, 0x80, 0xB6, 0x02, 0x80, 0xB9, 0x02, 0xB2, 0x58, 0x02, -+0xA0, 0x9E, 0x02, 0xA0, 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-+ODM_ReadFirmware_MP_8188F_FW_AP( -+ IN PDM_ODM_T pDM_Odm, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pFirmwareSize -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188F_FW_AP; -+#else -+ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188F_FW_AP, ArrayLength_MP_8188F_FW_AP); -+#endif -+ *pFirmwareSize = ArrayLength_MP_8188F_FW_AP; -+} -+ -+ -+#endif /* #if (defined(CONFIG_AP_WOWLAN)||(DM_ODM_SUPPORT_TYPE & (ODM_AP)) */ -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ -+ -+u1Byte Array_MP_8188F_FW_NIC[] = { -+0xF1, 0x88, 0x10, 0x00, 0x01, 0x00, 0x07, 0x00, 0x10, 0x22, 0x17, 0x28, 0x52, 0x49, 0x02, 0x00, -+0xE7, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x86, 0xAD, 0x02, 0xBC, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xA5, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 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-+void -+ODM_ReadFirmware_MP_8188F_FW_NIC( -+ IN PDM_ODM_T pDM_Odm, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pFirmwareSize -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188F_FW_NIC; -+#else -+ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188F_FW_NIC, ArrayLength_MP_8188F_FW_NIC); -+#endif -+ *pFirmwareSize = ArrayLength_MP_8188F_FW_NIC; -+} -+ -+ -+u1Byte Array_MP_8188F_FW_WoWLAN[] = { -+0xF1, 0x88, 0x30, 0x00, 0x01, 0x00, 0x07, 0x00, 0x10, 0x22, 0x17, 0x28, 0x30, 0x49, 0x02, 0x00, -+0xE7, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x86, 0xAD, 0x02, 0xBD, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xA6, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xBD, 0x56, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x76, 0xE0, -+0xFF, 0x12, 0x65, 0x61, 0x90, 0x92, 0x78, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x02, 0x50, 0xD7, 0x75, -+0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x75, 0xF0, 0x12, -+0x90, 0x89, 0x3C, 0x12, 0x05, 0x28, 0xE0, 0x22, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, -+0xFF, 0x12, 0x7C, 0xA9, 0x43, 0x5E, 0x08, 0x22, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, -+0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xC4, 0x54, 0xF0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x81, -+0xF5, 0x83, 0xE0, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x85, 0xC7, 0xE0, 0x90, 0x01, 0xBB, -+0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x22, 0x12, 0x02, 0xF6, 0xFF, 0x54, 0x01, 0xFE, -+0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF0, 0x74, 0xCC, -+0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, 0x74, 0xBC, 0x25, 0x62, 0xF5, 0x82, 0xE4, -+0x34, 0x8F, 0xF5, 0x83, 0x22, 0x90, 0x92, 0x41, 0xE4, 0xF0, 0xA3, 0x22, 0x90, 0x92, 0x07, 0x12, -+0x87, 0x79, 0x02, 0x02, 0xF6, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0x02, 0x03, 0xED, 0xE0, 0xFF, -+0xA3, 0xE0, 0x90, 0x92, 0x41, 0xCF, 0x22, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0x22, 0x54, -+0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x22, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0x22, 0x12, -+0x02, 0xF6, 0x13, 0x13, 0x54, 0x3F, 0x22, 0xF9, 0xE4, 0x3A, 0xFA, 0x02, 0x02, 0xF6, 0xE5, 0x68, -+0xF0, 0xA3, 0xE5, 0x69, 0xF0, 0x22, 0x90, 0x00, 0x02, 0x12, 0x04, 0x18, 0xFF, 0x22, 0x7D, 0x05, -+0x7F, 0x04, 0x02, 0x96, 0x87, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0x00, 0x55, 0x69, -+ -+}; -+u4Byte ArrayLength_MP_8188F_FW_WoWLAN = 18768; -+ -+ -+void -+ODM_ReadFirmware_MP_8188F_FW_WoWLAN( -+ IN PDM_ODM_T pDM_Odm, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pFirmwareSize -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188F_FW_WoWLAN; -+#else -+ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188F_FW_WoWLAN, ArrayLength_MP_8188F_FW_WoWLAN); -+#endif -+ *pFirmwareSize = ArrayLength_MP_8188F_FW_WoWLAN; -+} -+ -+ -+ -+#endif /* end of (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))*/ -+ -+ -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.16*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188F_SUPPORT == 1) ++#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) ++ ++ ++u1Byte Array_MP_8188F_FW_AP[] = { ++0xF1, 0x88, 0x20, 0x00, 0x01, 0x00, 0x07, 0x00, 0x10, 0x22, 0x17, 0x28, 0x36, 0x44, 0x02, 0x00, ++0xE7, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x87, 0x32, 0x02, 0xB7, 0xB4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xAC, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xB8, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xB7, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xA9, 0xD2, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xB8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x87, 0xDA, 0x02, 0x96, 0x30, 0x02, 0x80, 0x86, 0x02, 0x80, 0x89, 0x02, 0x80, 0x8C, 0x02, ++0x8D, 0x4D, 0x02, 0x97, 0xD8, 0x02, 0x80, 0x95, 0x02, 0x80, 0x98, 0x02, 0x80, 0x9B, 0x02, 0x80, ++0x9E, 0x02, 0x80, 0xA1, 0x02, 0x80, 0xA4, 0x02, 0x80, 0xA7, 0x02, 0x80, 0xAA, 0x02, 0x80, 0xAD, ++0x02, 0x80, 0xB0, 0x02, 0x89, 0x19, 0x02, 0x80, 0xB6, 0x02, 0x80, 0xB9, 0x02, 0xB2, 0x58, 0x02, ++0xA0, 0x9E, 0x02, 0xA0, 0x27, 0x02, 0xA7, 0x15, 0x02, 0xAE, 0x1F, 0x02, 0xB1, 0xEF, 0x02, 0x80, ++0xCE, 0x02, 0x80, 0xD1, 0x02, 0x80, 0xD4, 0x02, 0x80, 0xD7, 0x00, 0x00, 0x00, 0x02, 0x80, 0xDD, ++0x02, 0x80, 0xE0, 0x02, 0x80, 0xE3, 0x02, 0x80, 0xE6, 0x02, 0xC3, 0x1D, 0x02, 0x80, 0xEC, 0x02, ++0x80, 0xEF, 0x02, 0x80, 0xF2, 0x02, 0x80, 0xF5, 0x02, 0x80, 0xF8, 0x02, 0x80, 0xFB, 0x02, 0x80, ++0xFE, 0x02, 0x81, 0x01, 0x02, 0x81, 0x04, 0x02, 0x81, 0x07, 0x02, 0x81, 0x0A, 0x02, 0x81, 0x0D, ++0x02, 0x81, 0x10, 0x02, 0x81, 0x13, 0x02, 0x81, 0x16, 0x02, 0x81, 0x19, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x02, 0x93, 0x32, 0x02, 0xB8, 0xB7, 0x02, 0x90, 0xF4, 0x02, 0x90, 0xE9, ++0x02, 0x81, 0x40, 0x02, 0x8E, 0xAC, 0x02, 0xBF, 0x1A, 0x02, 0x81, 0x49, 0x02, 0x81, 0x4C, 0x02, ++0x81, 0x4F, 0x02, 0x81, 0x52, 0x02, 0x81, 0x55, 0x02, 0x81, 0x58, 0x02, 0x81, 0x5B, 0x02, 0x91, ++0x57, 0x02, 0x81, 0x61, 0x02, 0x81, 0x64, 0x02, 0xBF, 0xE3, 0x02, 0xC2, 0x57, 0x02, 0xC2, 0x8A, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, ++0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, ++0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, ++0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, ++0x08, 0x03, 0x03, 0x00, 0x04, 0x09, 0x07, 0x03, 0x03, 0x00, 0x04, 0x08, 0x06, 0x03, 0x02, 0x00, ++0x04, 0x08, 0x05, 0x03, 0x01, 0x00, 0x04, 0x0D, 0x0A, 0x07, 0x05, 0x00, 0x08, 0x0C, 0x0A, 0x07, ++0x04, 0x00, 0x08, 0x0B, 0x0A, 0x06, 0x05, 0x00, 0x08, 0x0B, 0x0A, 0x05, 0x03, 0x00, 0x08, 0x0B, ++0x0A, 0x03, 0x02, 0x00, 0x08, 0x14, 0x12, 0x0C, 0x04, 0x00, 0x10, 0x14, 0x12, 0x09, 0x04, 0x00, ++0x10, 0x24, 0x22, 0x1C, 0x12, 0x00, 0x20, 0x24, 0x22, 0x18, 0x0C, 0x00, 0x20, 0x24, 0x22, 0x14, ++0x06, 0x00, 0x20, 0x24, 0x22, 0x0F, 0x04, 0x00, 0x20, 0x24, 0x21, 0x0A, 0x04, 0x00, 0x20, 0x23, ++0x21, 0x0C, 0x04, 0x00, 0x20, 0x23, 0x1F, 0x0A, 0x04, 0x00, 0x20, 0x22, 0x1F, 0x0F, 0x04, 0x00, ++0x20, 0x21, 0x1F, 0x16, 0x0C, 0x00, 0x20, 0x31, 0x2F, 0x20, 0x14, 0x00, 0x30, 0x31, 0x2F, 0x18, ++0x10, 0x00, 0x30, 0x31, 0x2C, 0x18, 0x0C, 0x00, 0x30, 0x31, 0x2A, 0x14, 0x0C, 0x00, 0x30, 0x31, ++0x28, 0x14, 0x00, 0x00, 0x30, 0x31, 0x24, 0x14, 0x00, 0x00, 0x30, 0x31, 0x1E, 0x14, 0x00, 0x00, ++0x30, 0x02, 0x02, 0x03, 0x04, 0x04, 0x08, 0x09, 0x09, 0x0C, 0x0E, 0x10, 0x12, 0x02, 0x09, 0x0B, ++0x0E, 0x0D, 0x0F, 0x10, 0x12, 0x00, 0x04, 0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x23, 0x00, ++0x2D, 0x00, 0x50, 0x00, 0x91, 0x00, 0xC3, 0x01, 0x27, 0x01, 0x31, 0x01, 0x5E, 0x00, 0x8C, 0x00, ++0xC8, 0x00, 0xDC, 0x01, 0x5E, 0x01, 0x68, 0x01, 0x9A, 0x01, 0xCC, 0x01, 0xEA, 0x02, 0x02, 0x04, ++0x08, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6C, 0x14, 0x28, 0x32, 0x50, 0x78, 0xA0, 0xC8, ++0xE6, 0x01, 0x01, 0x01, 0x02, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x02, 0x04, 0x06, ++0x07, 0x07, 0x08, 0x08, 0x08, 0x01, 0x01, 0x01, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x02, 0x03, 0x03, 0x04, 0x05, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x03, 0x03, 0x03, ++0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ++0x02, 0x19, 0x06, 0x04, 0x02, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x84, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x87, 0xD4, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x87, 0xD4, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x84, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x84, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x32, 0x50, 0x30, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x27, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x25, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x14, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x15, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0xD2, 0xA9, 0x02, 0x84, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, ++0xC2, 0xAF, 0x56, 0xC6, 0xD2, 0xAF, 0xD2, 0xA9, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xEF, 0x2B, 0xFF, ++0xEE, 0x3A, 0xFE, 0xED, 0x39, 0xFD, 0xEC, 0x38, 0xFC, 0x22, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, ++0xFE, 0xED, 0x99, 0xFD, 0xEC, 0x98, 0xFC, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, ++0xFD, 0xEC, 0x58, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, ++0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE0, 0xF8, ++0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, ++0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, ++0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, ++0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, ++0x80, 0xDF, 0x02, 0x87, 0x70, 0x02, 0x84, 0xDD, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, ++0x03, 0xF6, 0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, ++0x24, 0x0C, 0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, ++0x80, 0x01, 0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, ++0x90, 0x87, 0xB5, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, ++0x54, 0x1F, 0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, ++0x40, 0xB8, 0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, ++0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, ++0xE9, 0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x93, 0x9F, 0x00, 0x41, 0x93, 0xA0, 0x00, 0x41, 0x93, 0xA5, ++0x00, 0x44, 0x93, 0x8B, 0x41, 0x4E, 0x59, 0x00, 0x44, 0x93, 0x87, 0x61, 0x6E, 0x79, 0x00, 0x41, ++0x93, 0xA7, 0x00, 0x00, 0xB2, 0xC6, 0xB6, 0xD6, 0xA7, 0x66, 0x90, 0x93, 0xA3, 0xEF, 0xF0, 0x7F, ++0x02, 0xD1, 0x27, 0x90, 0x84, 0xC1, 0xE0, 0xFF, 0x90, 0x93, 0xA3, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, ++0x84, 0xC1, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x5B, 0x12, 0x02, 0xF6, 0x25, 0x5B, 0x90, ++0x84, 0xC6, 0xF0, 0xF1, 0x11, 0x25, 0x5B, 0x90, 0x84, 0xC7, 0x71, 0xEE, 0x25, 0x5B, 0x90, 0x84, ++0xC8, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x03, 0x0F, 0x25, 0x5B, 0x90, 0x84, 0xC9, 0xF0, 0x90, 0x00, ++0x04, 0x12, 0x03, 0x0F, 0x25, 0x5B, 0x90, 0x84, 0xCA, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x03, 0x0F, ++0x25, 0x5B, 0x90, 0x84, 0xCB, 0xF0, 0x11, 0x3F, 0x25, 0x5B, 0x90, 0x84, 0xCC, 0xF0, 0x22, 0x90, ++0x00, 0x06, 0x02, 0x03, 0x0F, 0xF1, 0xD6, 0x12, 0x02, 0xF6, 0xFF, 0x54, 0x7F, 0x90, 0x85, 0xC5, ++0xF0, 0xEF, 0x71, 0xF9, 0xA3, 0xF0, 0xF1, 0x11, 0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, ++0x85, 0xC3, 0xE0, 0x54, 0xF0, 0x4F, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x03, 0x0F, 0xFC, 0x54, 0x01, ++0x25, 0xE0, 0xFF, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC, 0x54, 0x02, 0x25, 0xE0, ++0xFF, 0x90, 0x93, 0x1F, 0xE0, 0x54, 0xFB, 0x4F, 0xF0, 0xED, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, ++0xF1, 0xE4, 0x71, 0xED, 0x90, 0x85, 0xC4, 0xF0, 0x11, 0x3F, 0x30, 0xE0, 0x52, 0xC3, 0x13, 0x54, ++0x07, 0xFF, 0xC3, 0x94, 0x04, 0x90, 0x85, 0xD8, 0x50, 0x04, 0xEF, 0xF0, 0x80, 0x2A, 0x74, 0x03, ++0xF0, 0x31, 0x13, 0xE9, 0x24, 0x06, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x02, 0xF6, 0xFF, 0x74, 0x03, ++0x24, 0xFD, 0xFE, 0xEF, 0xC4, 0x54, 0x0F, 0xFD, 0xEF, 0x54, 0x0F, 0xFF, 0xED, 0x2E, 0x54, 0x0F, ++0xFE, 0xC4, 0x54, 0xF0, 0x4F, 0x12, 0x03, 0x3C, 0x31, 0x13, 0x11, 0x3F, 0xC4, 0x54, 0x0F, 0xFF, ++0xC3, 0x94, 0x04, 0x90, 0x85, 0xCD, 0x50, 0x05, 0x74, 0x04, 0xF0, 0x80, 0x02, 0xEF, 0xF0, 0x31, ++0x13, 0x90, 0x00, 0x04, 0x12, 0x03, 0x0F, 0xFD, 0x7F, 0x02, 0x12, 0x57, 0x82, 0x31, 0x13, 0x12, ++0x71, 0xCB, 0x12, 0xAA, 0x60, 0xF0, 0x90, 0x85, 0xC5, 0x12, 0xC3, 0xF5, 0xF1, 0xE3, 0x90, 0x01, ++0xBE, 0xF0, 0x22, 0x90, 0x92, 0x07, 0x02, 0x86, 0xFA, 0xF1, 0xD6, 0x31, 0x13, 0x12, 0x02, 0xF6, ++0x54, 0x7F, 0xFD, 0xF1, 0x11, 0xFE, 0x54, 0x1F, 0x90, 0x92, 0x0B, 0x71, 0xF5, 0x90, 0x92, 0x0A, ++0x71, 0xEE, 0xFE, 0x54, 0x03, 0xFC, 0xEE, 0x54, 0x30, 0xC4, 0x54, 0x0F, 0x90, 0x92, 0x0D, 0x71, ++0xEE, 0xFE, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x92, 0x0C, 0x71, 0xF5, 0xFF, 0x71, ++0xEF, 0xFB, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x90, 0x92, 0x0F, 0xF0, 0xFA, 0xEB, 0x54, ++0x04, 0x13, 0x13, 0x54, 0x3F, 0xA3, 0xF0, 0xEF, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, ++0x51, 0x81, 0x54, 0x7F, 0x4F, 0xF0, 0x90, 0x92, 0x0C, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x54, ++0xC0, 0x51, 0x81, 0x54, 0xBF, 0x4F, 0xF0, 0xEA, 0x60, 0x02, 0x41, 0x80, 0x90, 0x92, 0x0B, 0xE0, ++0x54, 0x1F, 0xFF, 0x75, 0xF0, 0x12, 0xED, 0x91, 0x05, 0x54, 0xE0, 0x4F, 0xF0, 0xEC, 0x54, 0x03, ++0x51, 0x81, 0x54, 0xFC, 0x4F, 0xF0, 0xEC, 0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0x51, 0x81, 0x54, ++0xF3, 0x4F, 0xF0, 0x90, 0x92, 0x0A, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x75, 0xF0, ++0x12, 0xED, 0x91, 0x05, 0x54, 0xDF, 0x4F, 0xF0, 0x90, 0x92, 0x0D, 0xE0, 0x54, 0x03, 0xC4, 0x54, ++0xF0, 0x51, 0x81, 0x54, 0xCF, 0x4F, 0xF1, 0xEB, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF1, 0xEB, 0xF5, ++0x83, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x92, 0x10, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFE, ++0xEF, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0x93, 0x19, 0xE0, 0x60, 0x3A, 0x31, 0x13, 0xE9, ++0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x02, 0xF6, 0x54, 0x1F, 0x12, 0x03, 0x3C, 0x90, 0x92, ++0x0E, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x0E, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x19, 0xEF, 0x24, ++0x03, 0xFF, 0xE4, 0x33, 0xFE, 0x31, 0x13, 0x8F, 0x82, 0x8E, 0x83, 0xE4, 0x12, 0x03, 0x4E, 0x90, ++0x92, 0x0E, 0xE0, 0x04, 0xF0, 0x80, 0xDD, 0x90, 0x93, 0x17, 0xE0, 0x54, 0x07, 0xFF, 0xBF, 0x05, ++0x0A, 0xEC, 0xB4, 0x01, 0x06, 0x90, 0x93, 0x1C, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x92, 0x0E, 0xF0, ++0x90, 0x92, 0x0E, 0xE0, 0xFC, 0x24, 0x03, 0xFF, 0xE4, 0x33, 0xFE, 0x31, 0x13, 0x8F, 0x82, 0x8E, ++0x83, 0x12, 0x03, 0x0F, 0xFF, 0xED, 0x12, 0xBC, 0x87, 0xE5, 0x82, 0x2C, 0x12, 0xAE, 0x17, 0xEF, ++0xF0, 0x90, 0x92, 0x0E, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x04, 0xD5, 0xAF, 0x05, 0x12, 0x17, 0x8E, ++0x22, 0xFF, 0x75, 0xF0, 0x12, 0xED, 0x90, 0x89, 0x3F, 0x12, 0x05, 0x28, 0xE0, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xF1, 0xDC, 0x20, 0xE6, 0x02, 0x61, 0xB4, 0x90, 0x00, 0x8C, 0xE0, ++0x90, 0x93, 0x96, 0xF0, 0x7F, 0x8D, 0x12, 0x7B, 0x51, 0x90, 0x93, 0x97, 0xEF, 0xF0, 0x90, 0x00, ++0x8E, 0xE0, 0x90, 0x93, 0x98, 0xF0, 0x90, 0x93, 0x97, 0xE0, 0x24, 0xFC, 0x60, 0x10, 0x24, 0x03, ++0x60, 0x02, 0x61, 0xA8, 0x90, 0x93, 0x96, 0xE0, 0xFF, 0x12, 0xBC, 0x95, 0x61, 0xA8, 0x90, 0x93, ++0x96, 0xE0, 0x24, 0xDC, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFD, 0xFF, ++0x71, 0xE6, 0x75, 0xF0, 0x12, 0x51, 0x86, 0x13, 0x13, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0x71, ++0xE6, 0x75, 0xF0, 0x12, 0x51, 0x86, 0x71, 0xF9, 0xFB, 0x0D, 0xE4, 0xFF, 0x71, 0xE6, 0x75, 0xF0, ++0x12, 0x51, 0x86, 0xC4, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0x71, 0xE6, 0xF1, 0xF7, 0xFB, 0xE4, ++0xFD, 0x0F, 0x71, 0xE6, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x3D, 0x12, 0x05, 0x28, 0x71, 0xE3, 0x75, ++0xF0, 0x12, 0x91, 0x05, 0xC4, 0x13, 0x54, 0x01, 0xFB, 0x0D, 0x7F, 0x01, 0x71, 0xE6, 0x75, 0xF0, ++0x12, 0x91, 0x05, 0x54, 0x1F, 0x71, 0xE4, 0x12, 0xBC, 0x87, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x71, ++0xE6, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x71, 0xE1, 0x75, 0xF0, ++0x08, 0xA4, 0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x71, 0xE1, 0x75, 0xF0, 0x08, 0xA4, 0x24, ++0x03, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x71, 0xE1, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x04, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x71, 0xE6, 0x75, 0xF0, 0x08, 0xA4, ++0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x71, 0xE1, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x06, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0x71, 0xE1, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x07, 0xF5, 0x82, 0xE4, 0x34, ++0x82, 0xF5, 0x83, 0xE0, 0xFB, 0x0D, 0x71, 0xB9, 0xF1, 0xDC, 0x30, 0xE0, 0x07, 0xE4, 0xFD, 0x7F, ++0x8D, 0x12, 0x7B, 0x3E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, ++0xEF, 0xB4, 0x01, 0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, ++0xEF, 0xB4, 0x03, 0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, ++0x22, 0xF5, 0x83, 0xE0, 0xFB, 0x0D, 0x71, 0xB9, 0x90, 0x93, 0x96, 0xE0, 0x22, 0x4F, 0xF0, 0x90, ++0x00, 0x02, 0x02, 0x03, 0x0F, 0xF0, 0xEE, 0x54, 0x80, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, ++0x75, 0xF0, 0x12, 0xE5, 0x6E, 0x90, 0x89, 0x3E, 0x12, 0x05, 0x28, 0xE0, 0x22, 0x8F, 0x6E, 0x8D, ++0x6F, 0xEF, 0xF1, 0xA4, 0xE0, 0xF5, 0x70, 0x54, 0x7F, 0xF5, 0x71, 0xE5, 0x70, 0x54, 0x80, 0xF5, ++0x73, 0x75, 0xF0, 0x12, 0xEF, 0xF1, 0xFA, 0xF5, 0x75, 0x75, 0xF0, 0x12, 0xEF, 0x51, 0x86, 0xC4, ++0x54, 0x03, 0xF5, 0x76, 0xF1, 0x17, 0x74, 0xFF, 0xF0, 0x12, 0xBA, 0xF9, 0xE5, 0x70, 0x45, 0x73, ++0xFF, 0x12, 0xBC, 0x09, 0xEF, 0xF0, 0xE5, 0x6E, 0xF1, 0xBC, 0xE0, 0x54, 0x03, 0xF5, 0x74, 0x74, ++0x4C, 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0xE5, 0x74, 0xF0, 0xE5, 0x71, 0x65, ++0x75, 0x70, 0x42, 0x91, 0x00, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x0C, 0xE5, 0x73, 0x70, 0x08, ++0xE5, 0x71, 0x44, 0x80, 0xF5, 0x70, 0xA1, 0x13, 0x12, 0xBA, 0xF9, 0xE5, 0x6E, 0x12, 0xBB, 0x20, ++0xE0, 0xFF, 0xA3, 0xE0, 0x12, 0xC3, 0x6B, 0xE4, 0xF0, 0xA3, 0xE5, 0x6E, 0xF0, 0xE4, 0x90, 0x92, ++0x49, 0x12, 0x99, 0x30, 0x7B, 0x01, 0xFA, 0x7D, 0x02, 0x7F, 0x04, 0x12, 0x9F, 0x21, 0x7D, 0x07, ++0xAF, 0x6E, 0x02, 0xB9, 0x96, 0xE5, 0x71, 0xC3, 0x95, 0x75, 0x50, 0x5F, 0xAB, 0x6E, 0xAD, 0x75, ++0xAF, 0x71, 0x12, 0x72, 0xEA, 0x8F, 0x72, 0x85, 0x72, 0x70, 0x91, 0x00, 0xC4, 0x13, 0x54, 0x01, ++0xFF, 0x90, 0x92, 0x49, 0xE4, 0x12, 0xC3, 0x6F, 0xE4, 0xF0, 0xA3, 0xE5, 0x72, 0xF0, 0xA3, 0xE4, ++0xF0, 0xA3, 0xE5, 0x71, 0xF0, 0xE5, 0x73, 0x71, 0xF9, 0x12, 0xC3, 0xB5, 0xE4, 0xFB, 0xFA, 0x7D, ++0x05, 0x7F, 0x04, 0x12, 0x9F, 0x21, 0xE5, 0x71, 0xC3, 0x94, 0x0C, 0x40, 0x26, 0x91, 0x00, 0xC4, ++0x13, 0x54, 0x07, 0x30, 0xE0, 0x1D, 0xE5, 0x6F, 0x60, 0x19, 0xE5, 0x73, 0x70, 0x15, 0xE5, 0x71, ++0x44, 0x80, 0xF5, 0x70, 0xF1, 0x17, 0xE5, 0x72, 0xF0, 0x80, 0x08, 0x12, 0xBC, 0x09, 0xE5, 0x75, ++0xF0, 0xF5, 0x70, 0x90, 0x92, 0x45, 0xE4, 0xF0, 0xA3, 0xE5, 0x70, 0xF0, 0xF1, 0x17, 0xE0, 0xFF, ++0x12, 0xC4, 0x0F, 0xEF, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x74, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, ++0xE5, 0x6F, 0xF0, 0x7B, 0x01, 0x7A, 0x00, 0x7D, 0x05, 0x7F, 0x04, 0x12, 0x9F, 0x21, 0x90, 0x91, ++0x0B, 0xE5, 0x74, 0xF0, 0xAB, 0x6F, 0xAD, 0x70, 0xAF, 0x6E, 0x02, 0x27, 0x3D, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0xA6, 0xED, 0xF0, 0x90, 0x85, 0xC1, 0xE0, 0xFE, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xC1, 0xA7, 0xEE, 0x71, 0xF9, 0x30, 0xE0, 0x02, 0xC1, 0xA7, ++0x90, 0x85, 0xC8, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xC1, 0xA7, 0xEF, 0x70, 0x02, 0xC1, 0x12, 0x24, ++0xFE, 0x70, 0x02, 0xC1, 0x4F, 0x24, 0xFE, 0x60, 0x4D, 0x24, 0xFC, 0x70, 0x02, 0xC1, 0x8E, 0x24, ++0xFC, 0x60, 0x02, 0xC1, 0xA0, 0xEE, 0xB4, 0x0E, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, 0xC8, 0xE0, ++0x70, 0x05, 0x7F, 0x01, 0x12, 0x79, 0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, ++0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x04, 0x0F, 0x90, 0x93, 0xA6, 0xE0, 0xFF, 0x60, 0x05, 0x12, ++0x6D, 0x4C, 0x80, 0x03, 0x12, 0x79, 0x61, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x08, 0x60, 0x02, 0xC1, ++0xA0, 0x12, 0x7A, 0xB9, 0xC1, 0xA0, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x79, ++0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, ++0x0E, 0x08, 0xD1, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x0C, ++0x60, 0x02, 0xC1, 0xA0, 0xD1, 0xAC, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xC1, 0xA0, 0x12, 0x70, 0x9E, ++0xC1, 0xA0, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0E, 0x08, 0xD1, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x74, ++0x93, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, ++0x0C, 0x08, 0xD1, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x70, 0x9E, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x04, ++0x70, 0x5E, 0x12, 0xBF, 0x1A, 0xEF, 0x64, 0x01, 0x70, 0x56, 0x12, 0x77, 0xFE, 0x80, 0x51, 0x90, ++0x85, 0xC8, 0xE0, 0xB4, 0x0E, 0x08, 0xD1, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, ++0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0C, 0x08, 0xD1, ++0xAC, 0xBF, 0x01, 0x03, 0x12, 0x70, 0x9E, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, ++0x79, 0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x04, 0x17, 0x12, 0x79, 0xF3, 0x80, 0x12, 0x90, 0x85, ++0xC8, 0xE0, 0xB4, 0x0C, 0x0B, 0x12, 0xAB, 0x19, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0x7A, 0x8A, ++0x90, 0x85, 0xC8, 0x12, 0xC3, 0xF5, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x12, 0x7A, 0x29, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, 0x01, 0x80, 0x3B, ++0x90, 0x85, 0xC1, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x02, 0x80, ++0x2A, 0x90, 0x85, 0xC7, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, 0x80, 0x1C, 0x90, ++0x93, 0x09, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x11, ++0x80, 0x09, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, ++0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x86, ++0xFA, 0x90, 0x00, 0x01, 0x02, 0x03, 0x0F, 0x74, 0x60, 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x93, ++0xF5, 0x83, 0x22, 0x8D, 0x78, 0xEF, 0x30, 0xE6, 0x1A, 0xF1, 0xA2, 0xF1, 0xB8, 0xE0, 0x54, 0x03, ++0x90, 0x91, 0x0B, 0xF0, 0xE4, 0xFB, 0xAF, 0x78, 0x12, 0x27, 0x3D, 0xF1, 0x95, 0xF1, 0xB1, 0x74, ++0x01, 0x80, 0x49, 0xF1, 0xC9, 0x04, 0xF0, 0xF1, 0xC9, 0x64, 0x02, 0x70, 0x1E, 0x74, 0x60, 0x25, ++0x78, 0xF1, 0x1B, 0xE0, 0xFD, 0xF4, 0x60, 0x02, 0x80, 0x04, 0xF1, 0xA2, 0xE0, 0xFD, 0xF1, 0xBA, ++0x12, 0xC3, 0xD9, 0xF1, 0xA2, 0xF1, 0xB1, 0x74, 0x02, 0x80, 0x21, 0xF1, 0xC9, 0xD3, 0x94, 0x03, ++0x40, 0x0D, 0xAF, 0x78, 0x12, 0x6D, 0x94, 0xF1, 0x95, 0xF1, 0xB1, 0x74, 0x03, 0x80, 0x0D, 0xF1, ++0xA2, 0xF1, 0xB8, 0x12, 0xC3, 0xD9, 0xF1, 0xA2, 0xF1, 0xB1, 0x74, 0x02, 0xF0, 0xAB, 0x78, 0xE4, ++0xFD, 0xFF, 0x02, 0x52, 0xC3, 0x74, 0xBC, 0x25, 0x78, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, ++0xE4, 0xF0, 0xE5, 0x78, 0xC4, 0x54, 0xF0, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, ++0x22, 0xE0, 0x90, 0x8A, 0x71, 0xF0, 0xA3, 0x22, 0xE0, 0xFD, 0xE5, 0x78, 0xC4, 0x54, 0xF0, 0x24, ++0x05, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x74, 0xBC, 0x25, 0x78, 0xF5, 0x82, 0xE4, ++0x34, 0x90, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x92, 0x07, 0x02, 0x87, 0x03, 0x7F, 0x8F, 0x12, 0x7B, ++0x51, 0xEF, 0x22, 0xF0, 0x90, 0x85, 0xC3, 0xE0, 0x54, 0x0F, 0x22, 0xF0, 0x74, 0xCC, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0x8F, 0x22, 0x41, 0x8E, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x3C, 0x12, 0x05, 0x28, ++0xE0, 0x22, 0x8B, 0x5B, 0x8A, 0x5C, 0x89, 0x5D, 0x90, 0x93, 0x13, 0xE0, 0x70, 0x10, 0x12, 0x02, ++0xF6, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x06, 0x90, 0x93, 0x19, 0x74, 0x01, 0xF0, 0x90, 0x93, ++0x15, 0xE0, 0x70, 0x0F, 0x11, 0xDD, 0xC4, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x06, 0x90, 0x93, 0x1A, ++0x74, 0x01, 0xF0, 0xAB, 0x5B, 0xAA, 0x5C, 0xA9, 0x5D, 0x12, 0x8F, 0x11, 0xFF, 0xF5, 0x5F, 0x12, ++0x02, 0xF6, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x8B, 0xEF, 0xF5, 0x60, 0x80, 0x02, 0x8F, ++0x60, 0x85, 0x5F, 0x5E, 0xE5, 0x5E, 0xD3, 0x95, 0x60, 0x50, 0x28, 0x11, 0xDD, 0x54, 0x01, 0xFD, ++0xAF, 0x5E, 0x12, 0x6E, 0x5F, 0xAF, 0x5E, 0x12, 0x77, 0x39, 0xEF, 0xAF, 0x5E, 0x70, 0x04, 0x11, ++0xA1, 0x80, 0x02, 0xF1, 0x2E, 0x90, 0x93, 0x1A, 0xE0, 0x60, 0x04, 0xAF, 0x5E, 0x11, 0xA1, 0x05, ++0x5E, 0x80, 0xD1, 0xE5, 0x5F, 0x70, 0x19, 0xFF, 0x12, 0x77, 0x39, 0xEF, 0x70, 0x12, 0x71, 0x32, ++0x12, 0x79, 0x61, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, ++0x22, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x92, 0x07, 0xEF, 0xF0, 0xA3, ++0xED, 0xF0, 0x7D, 0x44, 0x7F, 0x6F, 0x11, 0xE9, 0x11, 0xF4, 0x90, 0x92, 0x08, 0xE0, 0x90, 0x92, ++0x07, 0xB4, 0x01, 0x0A, 0xE0, 0x12, 0x8F, 0xBC, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x08, 0xE0, 0x12, ++0x8F, 0xBC, 0xE0, 0x54, 0xFB, 0xF0, 0x11, 0xE6, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAB, 0x5B, 0xAA, ++0x5C, 0xA9, 0x5D, 0x02, 0x02, 0xF6, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, 0x92, ++0xE1, 0xED, 0xF0, 0x22, 0xE4, 0x90, 0x93, 0x93, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, ++0x93, 0x95, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x11, 0xE9, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x18, 0xA3, ++0xE0, 0x70, 0x14, 0xA3, 0xE0, 0x70, 0x10, 0xA3, 0xE0, 0x70, 0x0C, 0x90, 0x93, 0x95, 0xE0, 0xFF, ++0x7D, 0x48, 0x11, 0xE9, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x93, 0x94, 0xE0, 0x94, 0xE8, 0x90, 0x93, ++0x93, 0xE0, 0x94, 0x03, 0x40, 0x13, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0x93, 0x95, ++0xE0, 0xFF, 0x7D, 0x48, 0x11, 0xE9, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x7C, 0x9F, ++0x90, 0x93, 0x93, 0xF1, 0xE7, 0x80, 0xB2, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x92, ++0xDB, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x84, 0xC3, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, ++0x60, 0x32, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x92, 0xDF, 0xF0, 0x7D, 0x26, 0x7F, 0xFF, 0x11, 0xE9, ++0x11, 0xF4, 0xEF, 0x64, 0x01, 0x70, 0x0A, 0x31, 0xD9, 0xFB, 0x7D, 0x01, 0x12, 0x3A, 0xC2, 0x31, ++0xE3, 0x90, 0x92, 0xDF, 0xE0, 0xFF, 0x7D, 0x27, 0x11, 0xE9, 0x90, 0x92, 0xDB, 0xE0, 0xFF, 0x12, ++0x5C, 0xA3, 0x80, 0x18, 0x90, 0x92, 0xDB, 0xE0, 0xFF, 0x12, 0x5C, 0xA3, 0x31, 0xD9, 0xFB, 0x90, ++0x93, 0x92, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x12, 0xBD, 0x28, 0x31, 0xE3, 0x90, 0x04, 0x1F, 0x74, ++0x20, 0xF0, 0x90, 0x84, 0xBF, 0xA3, 0xE0, 0x24, 0x7F, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, ++0x74, 0x01, 0xF0, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x84, 0xC8, 0xE0, 0xFF, 0x90, 0x92, ++0xDC, 0xE0, 0x22, 0x90, 0x92, 0xDD, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x92, 0xDB, ++0xE0, 0xFF, 0x12, 0x65, 0x61, 0x90, 0x92, 0xDD, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x02, 0x50, 0xD7, ++0x90, 0x93, 0x09, 0xE0, 0x30, 0xE0, 0x4D, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x14, 0xE4, 0x90, ++0x91, 0x6E, 0xF0, 0x90, 0x93, 0x0B, 0x51, 0x6B, 0xE4, 0x51, 0x55, 0x30, 0xE0, 0x02, 0x91, 0x3E, ++0x81, 0x45, 0x90, 0x93, 0x09, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x27, 0xE4, 0x90, 0x91, ++0x6E, 0xF0, 0x90, 0x93, 0x0C, 0x51, 0x6B, 0x90, 0x93, 0x09, 0xE0, 0x54, 0xFB, 0xF0, 0xE0, 0xC3, ++0x13, 0x30, 0xE0, 0x07, 0x7D, 0x04, 0x7F, 0x01, 0x02, 0x57, 0x82, 0x7D, 0x31, 0x7F, 0xFF, 0x11, ++0xE9, 0x12, 0xB8, 0xB7, 0x22, 0xFD, 0xFF, 0x11, 0xE9, 0x71, 0x32, 0x90, 0x93, 0x09, 0xE0, 0xC3, ++0x13, 0x22, 0xF0, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x86, 0x6E, 0xE0, 0x90, 0x91, 0x6F, 0xF0, ++0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x02, 0x61, 0x41, 0xE4, 0xF5, 0x77, 0x90, 0x85, 0xC5, ++0xE0, 0x70, 0x02, 0x61, 0x09, 0xF1, 0x4D, 0x60, 0x02, 0x61, 0x09, 0xF1, 0xF5, 0x90, 0x85, 0xC3, ++0xE0, 0xC4, 0x54, 0x0F, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, 0x85, 0xCC, ++0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x85, 0xCE, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, ++0x90, 0x85, 0xCB, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x77, 0x01, 0xE5, 0x77, 0x60, 0x4A, 0x90, ++0x85, 0xC8, 0xE0, 0x20, 0xE2, 0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x8D, 0x4D, 0x90, 0x85, 0xC9, ++0xE0, 0x44, 0x10, 0xF0, 0x90, 0x85, 0xCE, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x13, 0xE4, 0x90, ++0x91, 0x6E, 0xF0, 0x90, 0x85, 0xCE, 0xE0, 0x71, 0x15, 0x51, 0x6C, 0x90, 0x85, 0xCE, 0xE0, 0x80, ++0x12, 0xE4, 0x90, 0x91, 0x6E, 0x71, 0x0A, 0x51, 0x6C, 0x90, 0x85, 0xCE, 0xE0, 0x75, 0xF0, 0x03, ++0xA4, 0x24, 0xFE, 0x71, 0x15, 0x90, 0x85, 0xDE, 0xF0, 0x22, 0xF0, 0x90, 0x85, 0xCE, 0xE0, 0x75, ++0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xFF, 0x90, 0x85, 0xCD, 0xE0, 0x2F, 0x22, 0x90, 0x93, 0x09, 0xE0, ++0x30, 0xE0, 0x0E, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x51, 0x55, 0x30, 0xE0, 0x02, 0x91, 0x3E, 0x91, ++0x45, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x02, 0x12, 0x7B, 0x51, 0xEF, 0x44, ++0x01, 0xFD, 0x7F, 0x02, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, ++0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x8F, 0xD6, 0x12, 0x02, 0xF6, 0xFF, 0x54, 0x01, 0xFE, 0x90, ++0x93, 0x09, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, ++0xFF, 0xF0, 0x12, 0x02, 0xF6, 0xFE, 0x54, 0x04, 0x25, 0xE0, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, ++0x90, 0x93, 0x09, 0xF0, 0xEE, 0x54, 0x08, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xF0, 0x90, ++0x05, 0x52, 0xE0, 0x54, 0x07, 0xFF, 0x90, 0x92, 0x07, 0x60, 0x13, 0x12, 0x8F, 0x0E, 0xFD, 0x90, ++0x05, 0x56, 0xE0, 0xC3, 0x9D, 0x90, 0x93, 0x0B, 0xF0, 0xA3, 0xED, 0xF0, 0x80, 0x23, 0x12, 0x8F, ++0x0E, 0xFB, 0xFF, 0x90, 0x05, 0x54, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, 0x7C, 0x00, ++0x7D, 0x05, 0x12, 0x03, 0x82, 0x90, 0x93, 0x0B, 0xEF, 0xF0, 0xEB, 0x75, 0xF0, 0x05, 0x84, 0xA3, ++0xF0, 0x12, 0x89, 0x13, 0x12, 0x02, 0xF6, 0x20, 0xE0, 0x0B, 0x71, 0x32, 0x11, 0xE6, 0x90, 0x01, ++0x57, 0xE4, 0xF0, 0x80, 0x04, 0x91, 0x3E, 0x91, 0x45, 0x90, 0x93, 0x09, 0xE0, 0xFF, 0xC4, 0x54, ++0x0F, 0x20, 0xE0, 0x04, 0xEF, 0x54, 0xDF, 0xF0, 0x51, 0x5B, 0x30, 0xE0, 0x19, 0x90, 0x85, 0xC5, ++0x74, 0x01, 0xF0, 0xE4, 0x90, 0x85, 0xC7, 0xF0, 0x90, 0x85, 0xC2, 0xE0, 0x44, 0x04, 0xF0, 0x90, ++0x05, 0x58, 0x74, 0x05, 0xF0, 0x22, 0xE4, 0x90, 0x85, 0xC5, 0xF0, 0x90, 0x85, 0xC7, 0x74, 0x0C, ++0xF0, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x7D, 0x0C, ++0x7F, 0x01, 0x02, 0x57, 0x82, 0x90, 0x93, 0x09, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x51, 0x7A, 0xE4, ++0xFF, 0xF1, 0xA8, 0x90, 0x92, 0xE3, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0xBE, 0x9E, 0x61, 0x1C, 0x90, ++0x93, 0x09, 0xE0, 0x30, 0xE0, 0x0C, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x93, 0x0B, 0x51, 0x6B, ++0x91, 0x45, 0x90, 0x84, 0xC5, 0xE0, 0xB4, 0x01, 0x16, 0x90, 0x93, 0x09, 0xE0, 0xFF, 0xC4, 0x54, ++0x0F, 0x20, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x03, 0x12, 0xC2, 0xE1, 0x22, ++0x7E, 0x00, 0x7F, 0xAC, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x85, 0x79, 0xC1, 0x12, 0x06, 0xDE, 0x90, ++0x85, 0xC4, 0x74, 0x02, 0xF0, 0x90, 0x85, 0xCB, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, ++0x90, 0x85, 0xD1, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0xB1, 0x3F, 0x12, 0xC0, 0xAB, 0xE4, 0xFD, 0xFF, ++0x12, 0x57, 0x82, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x57, 0x82, 0x91, 0x3E, 0x90, 0x84, 0xC5, 0xE0, ++0xFF, 0xB4, 0x01, 0x08, 0x90, 0x85, 0xD0, 0x74, 0xDD, 0xF0, 0x80, 0x0F, 0xEF, 0x90, 0x85, 0xD0, ++0xB4, 0x03, 0x05, 0x74, 0xD4, 0xF0, 0x80, 0x03, 0x74, 0x40, 0xF0, 0x7F, 0x2C, 0x12, 0x7B, 0x51, ++0xEF, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, 0x90, 0x85, 0xFB, 0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, ++0x90, 0x85, 0xFB, 0xF0, 0x90, 0x86, 0x6D, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, ++0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0xB1, 0x3F, 0xE4, 0x90, 0x85, 0xD7, 0xF0, 0xA3, ++0xF0, 0x7F, 0x01, 0x12, 0x69, 0x33, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, 0x0A, ++0xE0, 0x54, 0xF8, 0xF0, 0xE4, 0xFD, 0xFF, 0x11, 0xE9, 0xE4, 0x90, 0x86, 0x71, 0xF0, 0x22, 0xF0, ++0x90, 0x85, 0xFB, 0xE0, 0x24, 0x04, 0x90, 0x85, 0xDD, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0x90, ++0x85, 0xC5, 0xE0, 0x70, 0x02, 0xC1, 0x09, 0x90, 0x85, 0xDC, 0xE0, 0x04, 0xF0, 0x90, 0x05, 0x61, ++0xD1, 0x29, 0x78, 0x08, 0x12, 0x04, 0xD8, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, ++0x05, 0x60, 0xD1, 0x29, 0x12, 0x86, 0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x05, 0x62, 0xD1, 0x29, 0x78, 0x10, 0x12, 0x04, 0xD8, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, ++0x00, 0x12, 0x86, 0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0xD1, 0x29, 0x78, ++0x18, 0x12, 0x04, 0xD8, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0xD5, 0x90, ++0x85, 0xFC, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x1F, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0xC3, ++0x13, 0x30, 0xE0, 0x0D, 0x12, 0xAF, 0xB5, 0x12, 0x51, 0x7D, 0x90, 0x93, 0x1F, 0xE0, 0x54, 0xFD, ++0xF0, 0x90, 0x85, 0xC2, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x15, 0x90, 0x01, 0x3B, ++0xE0, 0x30, 0xE4, 0x0E, 0x7D, 0x02, 0x7F, 0x02, 0x12, 0x7C, 0x41, 0x7D, 0x01, 0x7F, 0x02, 0x12, ++0x7C, 0x41, 0x90, 0x93, 0xA4, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, ++0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0xF1, 0xEE, 0xFF, 0xBF, 0x03, 0x14, 0x90, ++0x93, 0x11, 0xE0, 0xB4, 0x01, 0x0D, 0x90, 0x01, 0xB8, 0xE0, 0x04, 0xF0, 0x90, 0x05, 0x21, 0xE0, ++0x44, 0x80, 0xF0, 0x7F, 0x01, 0xF1, 0xD8, 0x81, 0x5F, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, ++0x90, 0x92, 0x04, 0x12, 0x87, 0x03, 0x90, 0x92, 0x03, 0xEF, 0xF0, 0x12, 0x87, 0x0C, 0x96, 0x7E, ++0x00, 0x96, 0x87, 0x01, 0x96, 0x8F, 0x08, 0x96, 0x98, 0x09, 0x96, 0xA1, 0x0A, 0x96, 0xAA, 0x12, ++0x96, 0xB3, 0x13, 0x96, 0xBC, 0x14, 0x96, 0xC5, 0x20, 0x96, 0xCE, 0x25, 0x96, 0xD7, 0x26, 0x96, ++0xDF, 0x40, 0x96, 0xE8, 0x42, 0x96, 0xF1, 0x43, 0x96, 0xFA, 0x44, 0x97, 0x2D, 0x47, 0x97, 0x2D, ++0x49, 0x97, 0x03, 0xC2, 0x97, 0x0C, 0xC3, 0x97, 0x15, 0xC4, 0x00, 0x00, 0x97, 0x1E, 0x90, 0x92, ++0x04, 0x12, 0x86, 0xFA, 0x02, 0x87, 0xF4, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x01, 0x02, 0x90, ++0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0x98, 0x1D, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0x9F, ++0xF7, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0xA0, 0x13, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, ++0x02, 0xA7, 0xE4, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0xA7, 0xF8, 0x90, 0x92, 0x04, 0x12, ++0x86, 0xFA, 0x02, 0xAF, 0xF6, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0x88, 0x45, 0x90, 0x92, ++0x04, 0x12, 0x86, 0xFA, 0x02, 0xB0, 0x05, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x61, 0x65, 0x90, ++0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0x89, 0x19, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0x4E, ++0x29, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0x28, 0xE6, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, ++0x02, 0x62, 0xFC, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0xB0, 0x0D, 0x90, 0x92, 0x04, 0x12, ++0x86, 0xFA, 0x02, 0xB0, 0x15, 0x90, 0x92, 0x04, 0x12, 0x86, 0xFA, 0x02, 0xB1, 0xDA, 0x90, 0x01, ++0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x92, 0x03, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0xE4, 0xFD, ++0x01, 0xA3, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x03, 0x12, 0xAA, 0x9D, 0x41, 0x00, 0xF1, 0x4D, 0x70, ++0x0B, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x05, 0x12, 0xAC, 0x3C, 0x51, 0x62, 0x22, 0xE4, 0xFF, 0x12, ++0x77, 0x39, 0xEF, 0x64, 0x01, 0x22, 0xE4, 0x90, 0x92, 0xCC, 0xF0, 0x90, 0x85, 0xC5, 0xE0, 0x60, ++0x3B, 0xF1, 0x4D, 0x70, 0x37, 0x90, 0x85, 0xCB, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0xF1, 0xF5, 0x90, ++0x92, 0xCC, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x85, 0xCC, 0xF0, 0x04, 0x60, 0x1F, 0x90, 0x85, 0xC8, ++0xE0, 0x20, 0xE2, 0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x8D, 0x4D, 0x90, 0x85, 0xC9, 0xE0, 0x44, ++0x10, 0xF0, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x85, 0xCD, 0x51, 0x6B, 0x22, 0xF1, 0x56, 0x7D, ++0x02, 0x7F, 0x02, 0x12, 0x7C, 0xA9, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x93, 0x1F, 0xE0, 0xFE, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x18, 0x90, 0x92, 0xCC, 0x74, 0x1E, ++0xF0, 0x90, 0x92, 0xDA, 0x74, 0x01, 0xF0, 0x90, 0x92, 0xCE, 0xEF, 0xF0, 0x7B, 0x01, 0x12, 0xAF, ++0x7F, 0xF1, 0xD8, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x8F, 0x0D, 0x7F, 0x02, 0x12, 0x86, 0x27, 0x90, ++0x84, 0xC1, 0xE0, 0x45, 0x0D, 0xF0, 0x22, 0xE4, 0x75, 0xF0, 0x01, 0x02, 0x07, 0x0A, 0x90, 0x01, ++0x02, 0xE0, 0x54, 0x03, 0x22, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x93, 0x28, 0xF0, 0x90, 0x05, 0x62, ++0xE0, 0x90, 0x93, 0x29, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x93, 0x2A, 0xF0, 0x90, 0x05, 0x60, ++0xE0, 0x90, 0x93, 0x2B, 0xF0, 0x90, 0x93, 0x1F, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x12, 0x8F, 0xD6, ++0x12, 0x02, 0xF6, 0x30, 0xE0, 0x13, 0x11, 0xCD, 0x90, 0x84, 0xC5, 0xE0, 0x64, 0x01, 0x70, 0x28, ++0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x1F, 0x90, 0x93, 0x05, 0xE0, 0x60, 0x16, 0x7D, ++0x10, 0xE4, 0xFF, 0x12, 0x7B, 0xBF, 0x90, 0x01, 0x3C, 0xE0, 0x30, 0xE4, 0x03, 0x74, 0x10, 0xF0, ++0x90, 0x01, 0x63, 0xE4, 0xF0, 0x12, 0xA7, 0xCA, 0x90, 0x92, 0x07, 0x12, 0x8F, 0x0E, 0x90, 0x92, ++0xE4, 0x12, 0x8B, 0xEE, 0x90, 0x92, 0xE5, 0xF0, 0x90, 0x92, 0xE4, 0xE0, 0x54, 0x01, 0x90, 0x92, ++0xF1, 0xF0, 0x90, 0x92, 0xE4, 0xE0, 0x54, 0x02, 0x90, 0x92, 0xF2, 0xF0, 0x90, 0x92, 0xE4, 0xE0, ++0x54, 0x04, 0x90, 0x92, 0xF3, 0xF0, 0x90, 0x92, 0xE4, 0xE0, 0x54, 0x08, 0x90, 0x92, 0xF4, 0xF0, ++0x90, 0x92, 0xE4, 0xE0, 0x54, 0x10, 0x90, 0x92, 0xF5, 0xF0, 0x90, 0x92, 0xE5, 0xE0, 0x54, 0x01, ++0x90, 0x92, 0xF6, 0xF0, 0x90, 0x92, 0xE5, 0xE0, 0x54, 0x02, 0x90, 0x92, 0xF7, 0xF0, 0x90, 0x92, ++0xE5, 0xE0, 0x54, 0x04, 0x90, 0x92, 0xF8, 0xF0, 0x90, 0x92, 0xE5, 0xE0, 0x54, 0x08, 0x90, 0x92, ++0xF9, 0xF0, 0x90, 0x92, 0xE5, 0xE0, 0x54, 0x10, 0x90, 0x92, 0xFA, 0xF0, 0x22, 0x12, 0xA0, 0xFF, ++0x90, 0x85, 0xB7, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x92, ++0xE3, 0xE0, 0x44, 0x01, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x7C, 0xA9, 0x90, 0x05, 0x52, 0xE0, ++0x54, 0x07, 0x04, 0x90, 0x92, 0xEE, 0x31, 0x00, 0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0, 0x22, ++0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x92, 0xE3, 0xE0, 0x54, 0xFE, 0x31, 0x00, 0x90, ++0x92, 0xEA, 0x31, 0x30, 0x90, 0x93, 0x05, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x93, 0x5F, ++0xE0, 0xFF, 0x90, 0x92, 0x45, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x04, 0x85, 0xE0, 0xF5, 0x6B, 0x90, 0x93, ++0x5F, 0xE0, 0x04, 0xF0, 0xE4, 0xF5, 0x62, 0x90, 0x85, 0xBB, 0xE0, 0xFF, 0xE5, 0x62, 0xC3, 0x9F, ++0x40, 0x02, 0xE1, 0x1A, 0xE5, 0x62, 0x12, 0x8F, 0xA4, 0xE0, 0xF5, 0x6D, 0x12, 0xC4, 0x29, 0xF5, ++0x83, 0xE0, 0x65, 0x6D, 0x60, 0x18, 0x90, 0x8A, 0x71, 0xE5, 0x6D, 0xF0, 0xE4, 0xA3, 0xF0, 0xAB, ++0x62, 0xFD, 0xFF, 0x12, 0x52, 0xC3, 0x12, 0xC4, 0x29, 0xF5, 0x83, 0xE5, 0x6D, 0xF0, 0x90, 0x04, ++0xA0, 0xE0, 0x64, 0x01, 0x70, 0x50, 0xA3, 0xE0, 0x65, 0x62, 0x70, 0x4A, 0xA3, 0xE0, 0xF5, 0x63, ++0xA3, 0xE0, 0x90, 0x92, 0x3E, 0xF0, 0xE5, 0x62, 0x12, 0x8F, 0xA4, 0xE0, 0x65, 0x63, 0x70, 0x02, ++0xE1, 0x16, 0xE5, 0x62, 0x12, 0x8F, 0xA4, 0xE5, 0x63, 0xF0, 0xE5, 0x62, 0x12, 0x8F, 0xBC, 0xE0, ++0x54, 0xFC, 0xFF, 0x90, 0x92, 0x3E, 0xE0, 0x54, 0x03, 0x4F, 0xFF, 0xE5, 0x62, 0x12, 0x8F, 0xBC, ++0xEF, 0xF0, 0x90, 0x8A, 0x71, 0xE5, 0x63, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0xAB, 0x62, 0xE4, 0xFD, ++0xFF, 0x12, 0x52, 0xC3, 0xE1, 0x16, 0xAF, 0x62, 0x12, 0x77, 0x39, 0x75, 0xF0, 0x12, 0xE5, 0x62, ++0x12, 0x8A, 0x86, 0x12, 0x8B, 0xF9, 0xFD, 0x12, 0xC4, 0x08, 0xED, 0xF0, 0x90, 0x92, 0x47, 0xE4, ++0x12, 0xC3, 0x6F, 0xE4, 0xF0, 0xA3, 0xE5, 0x62, 0xF0, 0x12, 0xAF, 0x4C, 0x80, 0x05, 0xC3, 0x33, ++0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0xFF, 0x90, 0x92, 0x4B, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x7B, 0x02, 0x7A, 0x00, 0xE4, 0xFD, 0x7F, 0x01, 0xF1, 0x21, 0x12, 0xBA, ++0x0B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0xBA, 0x00, 0xE0, 0xFD, 0xE5, 0x62, 0x12, 0xAF, 0xC3, ++0x54, 0x80, 0xFB, 0x12, 0xC4, 0x08, 0xEB, 0xF0, 0x12, 0xC4, 0x0F, 0xED, 0xF0, 0x90, 0x92, 0x45, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x92, 0x4B, 0xF0, 0xA3, 0xF0, 0x7B, 0x03, 0xFA, 0xFD, ++0x7F, 0x01, 0xF1, 0x21, 0xAF, 0x62, 0x12, 0x77, 0x39, 0xEF, 0x70, 0x02, 0xE1, 0x16, 0x75, 0xF0, ++0x12, 0xE5, 0x62, 0x12, 0x8A, 0x86, 0x12, 0x8B, 0xF9, 0x30, 0xE0, 0x02, 0xE1, 0x16, 0xE5, 0x62, ++0x12, 0xAF, 0x4C, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, ++0xEF, 0x5D, 0x4E, 0x60, 0x02, 0xE1, 0x16, 0x12, 0xBA, 0x0B, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x70, ++0x08, 0x12, 0xBA, 0x00, 0xE0, 0x70, 0x02, 0xE1, 0x16, 0xE5, 0x62, 0x75, 0xF0, 0x12, 0xA4, 0x24, ++0x44, 0xF9, 0x74, 0x89, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90, 0x92, 0x33, 0x12, 0x87, 0x03, 0x12, ++0xC3, 0xCB, 0x12, 0x03, 0xED, 0x2F, 0xFF, 0xF1, 0xD2, 0x2F, 0xFF, 0x12, 0xC4, 0x02, 0x2F, 0xFF, ++0x12, 0xC3, 0x9F, 0x2F, 0xF5, 0x6C, 0x12, 0xBA, 0x0B, 0xE0, 0xF5, 0x68, 0xA3, 0xE0, 0xF5, 0x69, ++0x12, 0xBA, 0x00, 0xE0, 0xFF, 0x90, 0x92, 0x36, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, 0x62, 0x12, ++0x8F, 0xA4, 0xE0, 0xF5, 0x63, 0x54, 0x80, 0xF5, 0x65, 0xE5, 0x63, 0x54, 0x7F, 0xF5, 0x64, 0x12, ++0xC4, 0x20, 0xF1, 0xD8, 0x12, 0xC3, 0xD1, 0x90, 0x92, 0x47, 0xF1, 0xDC, 0xF1, 0xD2, 0xFF, 0x90, ++0x92, 0x49, 0xF1, 0xDC, 0x12, 0xC4, 0x02, 0xFF, 0x90, 0x92, 0x4B, 0xF1, 0xDC, 0x7B, 0x01, 0xF1, ++0xE3, 0x12, 0xC3, 0x99, 0xF1, 0xD8, 0x90, 0x92, 0x36, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x92, 0x47, ++0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xE5, 0x68, 0xF0, 0xA3, 0xE5, 0x69, 0xF0, 0xA3, 0xE4, 0xF0, ++0xA3, 0xE5, 0x63, 0xF0, 0x7B, 0x02, 0xF1, 0xE3, 0x74, 0x7C, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, ++0x90, 0xF5, 0x83, 0xE0, 0xC3, 0x94, 0x05, 0x40, 0x02, 0xA1, 0x7A, 0x75, 0xF0, 0x12, 0xE5, 0x62, ++0x12, 0x8F, 0xFA, 0xFF, 0xE5, 0x64, 0xD3, 0x9F, 0x40, 0x08, 0x8F, 0x64, 0xE5, 0x64, 0x45, 0x65, ++0xF5, 0x63, 0xE5, 0x64, 0x90, 0x82, 0xE1, 0x93, 0xF5, 0x6A, 0xE5, 0x65, 0x60, 0x04, 0x05, 0x6A, ++0x05, 0x6A, 0x90, 0x04, 0x8C, 0xE0, 0x64, 0x01, 0x70, 0x28, 0xE5, 0x64, 0xC3, 0x94, 0x0C, 0x40, ++0x21, 0x74, 0x84, 0x25, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xFF, 0x54, 0x7F, ++0xFE, 0xEF, 0x30, 0xE7, 0x06, 0xE5, 0x6A, 0x2E, 0xFF, 0x80, 0x05, 0xC3, 0xE5, 0x6A, 0x9E, 0xFF, ++0x8F, 0x6A, 0xE5, 0x6A, 0xD3, 0x94, 0x1A, 0xAF, 0x6A, 0x40, 0x02, 0x7F, 0x1A, 0x8F, 0x6A, 0x31, ++0x22, 0x7B, 0x03, 0xFA, 0xF1, 0xE5, 0xE5, 0x63, 0x90, 0x83, 0x59, 0x93, 0xFF, 0xD3, 0x90, 0x92, ++0x37, 0xE0, 0x9F, 0x90, 0x92, 0x36, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x80, 0x6B, 0xC3, 0xE5, 0x69, ++0x94, 0x0A, 0xE5, 0x68, 0x94, 0x00, 0x40, 0x02, 0x81, 0xB1, 0xF1, 0xB9, 0xE0, 0xC3, 0x94, 0x01, ++0x40, 0x05, 0xF1, 0xB9, 0xE0, 0x14, 0xF0, 0x12, 0xC3, 0x99, 0xFF, 0x90, 0x92, 0x37, 0xE0, 0x2F, ++0xFF, 0x90, 0x92, 0x36, 0xE0, 0x12, 0xC3, 0x8A, 0xF1, 0xD1, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0xFC, ++0xE5, 0x68, 0xC3, 0x13, 0xFE, 0xE5, 0x69, 0x13, 0xFF, 0xD3, 0xED, 0x9F, 0xEC, 0x9E, 0x40, 0x31, ++0xE5, 0x62, 0x94, 0x05, 0x50, 0x05, 0xF1, 0xB9, 0x74, 0x03, 0xF0, 0x90, 0x92, 0x45, 0xE5, 0x68, ++0xF0, 0xA3, 0xE5, 0x69, 0xF0, 0xE5, 0x68, 0xC3, 0x13, 0xA3, 0xF0, 0xE5, 0x69, 0x13, 0xA3, 0xF1, ++0x8B, 0x12, 0xC3, 0xB4, 0x7B, 0x01, 0xF1, 0x1B, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0xBB, 0x2C, 0xA1, ++0x7A, 0x12, 0xC4, 0x20, 0x65, 0x6C, 0x70, 0x02, 0xE5, 0xF0, 0x70, 0x55, 0x90, 0x92, 0x45, 0xF0, ++0xA3, 0xE5, 0x6C, 0xF0, 0xC3, 0x13, 0xFF, 0xA3, 0xE4, 0xF0, 0xA3, 0xEF, 0xF1, 0x8B, 0x12, 0xC3, ++0xB4, 0x7B, 0x02, 0xF1, 0x1B, 0xE5, 0x62, 0xC3, 0x94, 0x05, 0x50, 0x0E, 0xF1, 0xB9, 0xE0, 0xD3, ++0x94, 0x00, 0x40, 0x06, 0x31, 0x1D, 0x7B, 0x03, 0x80, 0x0B, 0xE5, 0x6C, 0xC3, 0x94, 0x03, 0x50, ++0x10, 0x31, 0x1D, 0x7B, 0x04, 0xFA, 0xF1, 0x1D, 0x7D, 0x06, 0xAF, 0x62, 0x12, 0xB9, 0x96, 0xE1, ++0x16, 0xE4, 0xFD, 0xAF, 0x62, 0x12, 0x8C, 0x0D, 0x7D, 0x07, 0xAF, 0x62, 0x12, 0xB9, 0x96, 0xA1, ++0x7A, 0x31, 0x1D, 0x7B, 0x08, 0xFA, 0xF1, 0x1D, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0x65, 0xC2, 0xA1, ++0x7A, 0xF1, 0xB9, 0xE4, 0xF0, 0x90, 0x92, 0x43, 0x74, 0x02, 0xF0, 0xAB, 0x6A, 0xAD, 0x62, 0xAF, ++0x69, 0xAE, 0x68, 0x12, 0xBA, 0x16, 0x8E, 0x66, 0x8F, 0x67, 0x12, 0xC3, 0xE7, 0xC3, 0x74, 0x01, ++0x93, 0x95, 0x67, 0xE4, 0x93, 0x95, 0x66, 0x50, 0x1F, 0xF1, 0xC5, 0xE4, 0xF0, 0x7D, 0x01, 0xAF, ++0x62, 0x12, 0x8C, 0x0D, 0x12, 0xC3, 0x58, 0xE5, 0x66, 0xF0, 0xA3, 0xE5, 0x67, 0xF0, 0xE4, 0x90, ++0x92, 0x49, 0x31, 0x30, 0x7B, 0x01, 0x80, 0x28, 0x12, 0xC3, 0xAC, 0xC3, 0xE5, 0x67, 0x9F, 0xE5, ++0x66, 0x94, 0x00, 0x50, 0x24, 0xF1, 0xC5, 0xE4, 0xF0, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0xBB, 0x2C, ++0x90, 0x92, 0x45, 0x12, 0xC3, 0xA5, 0x12, 0xC4, 0x0F, 0xEF, 0xF0, 0xE4, 0x31, 0x2F, 0x7B, 0x02, ++0xFA, 0x7D, 0x05, 0x7F, 0x01, 0xF1, 0x21, 0x80, 0x51, 0x7D, 0x07, 0xAF, 0x62, 0x12, 0xB9, 0x96, ++0x12, 0xC3, 0x58, 0x12, 0xC3, 0xA5, 0x12, 0xC4, 0x08, 0xEF, 0xF0, 0xF1, 0xC5, 0x12, 0xC3, 0xB4, ++0x7B, 0x03, 0x7A, 0x00, 0x7D, 0x05, 0x7F, 0x01, 0xF1, 0x21, 0xF1, 0xC5, 0xE0, 0x04, 0xF0, 0xE5, ++0x64, 0x90, 0x83, 0x6D, 0x93, 0xFF, 0xF1, 0xC5, 0xE0, 0xC3, 0x9F, 0x40, 0x1D, 0xF1, 0xC5, 0xE4, ++0x12, 0xC3, 0xAB, 0x12, 0xC3, 0xE7, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93, 0x34, 0x00, 0xC3, ++0x13, 0xFE, 0xEF, 0x13, 0xFF, 0xE5, 0x62, 0x12, 0xBB, 0x0F, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x90, ++0x89, 0x43, 0x12, 0x05, 0x28, 0xE0, 0x64, 0x01, 0x60, 0x02, 0xC1, 0xFB, 0x12, 0xC3, 0xCB, 0xAE, ++0xF0, 0x12, 0x03, 0xED, 0x2F, 0xFF, 0xE5, 0xF0, 0x3E, 0xF1, 0xD1, 0x2F, 0xFF, 0xEE, 0x12, 0xC3, ++0x8A, 0xFE, 0x90, 0x00, 0x08, 0x12, 0xC3, 0x90, 0x90, 0x92, 0x38, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, ++0x03, 0xED, 0xFF, 0xC3, 0x90, 0x92, 0x39, 0xE0, 0x9F, 0xFE, 0x90, 0x92, 0x38, 0xE0, 0x95, 0xF0, ++0x90, 0x92, 0x3A, 0xF0, 0xA3, 0xCE, 0xF0, 0x12, 0xC4, 0x02, 0xFD, 0xAC, 0xF0, 0x25, 0xE0, 0xFF, ++0xEC, 0x33, 0xFE, 0xEF, 0x2D, 0xFD, 0xEE, 0x3C, 0xFC, 0xF1, 0xD2, 0x25, 0xE0, 0xFF, 0xE5, 0xF0, ++0x33, 0xFE, 0x90, 0x00, 0x02, 0x12, 0xC3, 0x90, 0xCF, 0x2D, 0xFD, 0xEF, 0x3C, 0xFC, 0x12, 0xC3, ++0x99, 0xAE, 0xF0, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x2D, 0xFF, 0xEC, 0x3E, ++0x90, 0x92, 0x3C, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x36, 0x12, 0xC3, 0x77, 0x24, 0x0C, 0xF5, ++0x82, 0xE4, 0x34, 0x90, 0xF1, 0xEB, 0x50, 0x08, 0x90, 0x92, 0x36, 0x12, 0xC3, 0xBF, 0x80, 0x04, ++0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x62, 0x25, 0xE0, 0x24, 0x0C, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0x12, ++0xBB, 0x18, 0x90, 0x92, 0x38, 0x12, 0xC3, 0x77, 0x24, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF1, ++0xEB, 0x50, 0x08, 0x90, 0x92, 0x38, 0x12, 0xC3, 0xBF, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, ++0x62, 0x25, 0xE0, 0x24, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0x12, 0xBB, 0x18, 0x90, 0x92, 0x3C, ++0x12, 0xC3, 0x77, 0x24, 0x5C, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF1, 0xEB, 0x50, 0x08, 0x90, 0x92, ++0x3C, 0x12, 0xC3, 0xBF, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x62, 0x25, 0xE0, 0x24, 0x5C, ++0xF5, 0x82, 0xE4, 0x34, 0x90, 0x12, 0xBB, 0x18, 0xC3, 0x74, 0xFF, 0x95, 0x69, 0xFF, 0x74, 0xFF, ++0x95, 0x68, 0xFE, 0x12, 0xC4, 0x16, 0x34, 0x90, 0xF1, 0xEB, 0x50, 0x0A, 0xE5, 0x69, 0x2D, 0xFF, ++0xE5, 0x68, 0x3C, 0xFE, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0x12, 0xC4, 0x16, 0x34, 0x90, 0x12, ++0xBB, 0x18, 0x90, 0x92, 0x3A, 0xE0, 0xFE, 0xA3, 0xE0, 0xFB, 0xC3, 0x74, 0xFF, 0x9B, 0xFF, 0x74, ++0xFF, 0x9E, 0xFE, 0x74, 0xFF, 0x94, 0x00, 0xFD, 0x74, 0xFF, 0x94, 0x00, 0xFC, 0x90, 0x8F, 0x77, ++0x12, 0x86, 0xEE, 0xD3, 0x12, 0x04, 0xB4, 0x50, 0x16, 0x90, 0x92, 0x3A, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0x90, 0x8F, 0x77, 0x12, 0x86, 0xEE, 0x12, 0x86, 0xAD, 0x80, 0x06, 0x74, ++0xFF, 0xFF, 0xFE, 0xFD, 0xFC, 0x90, 0x8F, 0x77, 0x12, 0x04, 0xEB, 0xE4, 0xF5, 0x6C, 0xFD, 0xAF, ++0x62, 0x12, 0x65, 0xC2, 0xE4, 0x90, 0x92, 0x45, 0xF0, 0x31, 0x2B, 0xA3, 0xF0, 0x7B, 0x01, 0xFA, ++0x7D, 0xFF, 0x7F, 0x01, 0xF1, 0x21, 0x05, 0x62, 0x21, 0x47, 0x22, 0x7A, 0x00, 0x7D, 0x03, 0x7F, ++0x01, 0x90, 0x01, 0xC6, 0xE0, 0xFE, 0x64, 0x80, 0x70, 0x60, 0x90, 0x92, 0x4F, 0xEF, 0xF0, 0xA3, ++0xED, 0xF0, 0xEB, 0xA3, 0xF0, 0xEA, 0xA3, 0xF0, 0x90, 0x92, 0x45, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, ++0x92, 0x53, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x47, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x55, ++0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x49, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x57, 0xF0, 0xEC, ++0xA3, 0xF0, 0x90, 0x92, 0x4B, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x59, 0xF0, 0xEC, 0xA3, 0xF0, ++0x90, 0x92, 0x4D, 0x74, 0xFE, 0xF0, 0x90, 0x92, 0x5B, 0x74, 0x0C, 0xF0, 0x7B, 0x01, 0x7A, 0x92, ++0x79, 0x4D, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x12, 0x87, 0xDA, 0x22, 0xF0, 0x90, 0x92, 0x33, 0x12, ++0x86, 0xFA, 0x90, 0x00, 0x06, 0x12, 0x04, 0x18, 0xFF, 0xAE, 0xF0, 0x90, 0x00, 0x08, 0x12, 0x04, ++0x18, 0x2F, 0xFF, 0xE5, 0xF0, 0x3E, 0xFE, 0x90, 0x00, 0x04, 0x12, 0x04, 0x18, 0x2F, 0xFF, 0xEE, ++0x35, 0xF0, 0x90, 0x92, 0x49, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x70, 0x25, 0x62, 0xF5, 0x82, 0xE4, ++0x34, 0x93, 0xF5, 0x83, 0x22, 0x74, 0xAC, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, ++0x22, 0xFE, 0x90, 0x00, 0x04, 0x02, 0x04, 0x18, 0xFF, 0x90, 0x92, 0x45, 0xE5, 0xF0, 0xF0, 0xA3, ++0xEF, 0xF0, 0x22, 0x7A, 0x00, 0x7D, 0x01, 0x7F, 0x01, 0xE1, 0x21, 0xF5, 0x83, 0xE0, 0xFC, 0xA3, ++0xE0, 0xFD, 0xD3, 0x9F, 0xEC, 0x9E, 0x22, 0x12, 0x8F, 0xD6, 0x12, 0x89, 0x13, 0x12, 0xA0, 0x0C, ++0x75, 0x1E, 0x05, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0xFB, 0x02, 0x6A, 0x21, 0x8B, 0x1B, 0x8A, 0x1C, ++0x89, 0x1D, 0x22, 0x12, 0x8F, 0xD6, 0x12, 0x89, 0x13, 0x11, 0x0C, 0x75, 0x1E, 0x05, 0x7B, 0x01, ++0x7A, 0x93, 0x79, 0x00, 0x02, 0x6A, 0x21, 0x90, 0x92, 0x21, 0xEF, 0xF0, 0xA3, 0x12, 0x87, 0x03, ++0x90, 0x93, 0xA0, 0xE0, 0xFE, 0x04, 0xF0, 0x90, 0x00, 0x01, 0xEE, 0x12, 0x03, 0x4E, 0x74, 0x00, ++0x2F, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x92, ++0x22, 0x12, 0x86, 0xFA, 0x11, 0x0C, 0x75, 0x1E, 0x02, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, ++0x6A, 0x21, 0x90, 0x92, 0x21, 0xE0, 0x24, 0x02, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, ++0x03, 0xC0, 0x02, 0xC0, 0x01, 0xA3, 0x12, 0x86, 0xFA, 0xE9, 0x24, 0x02, 0xF9, 0xE4, 0x3A, 0x8B, ++0x1B, 0xF5, 0x1C, 0x89, 0x1D, 0x90, 0x92, 0x22, 0x11, 0x95, 0xF5, 0x1E, 0xD0, 0x01, 0xD0, 0x02, ++0xD0, 0x03, 0x02, 0x6A, 0x21, 0x12, 0x86, 0xFA, 0x90, 0x00, 0x0E, 0x02, 0x03, 0x0F, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x92, 0x25, 0x12, 0x87, 0x03, 0x7F, 0x96, 0x7E, 0x02, 0x12, ++0x66, 0x80, 0xEF, 0x60, 0x45, 0x11, 0xFF, 0xFE, 0xEF, 0x24, 0x01, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, ++0x92, 0x28, 0xEF, 0xF0, 0xEE, 0xFF, 0x90, 0xFD, 0x11, 0xF0, 0x90, 0x92, 0x28, 0xE0, 0xFD, 0x90, ++0x02, 0x94, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x25, 0x11, 0x95, 0x24, 0x02, 0xFF, 0xE4, 0x33, ++0xFE, 0x12, 0x5A, 0xA5, 0x90, 0x92, 0x28, 0xE0, 0x24, 0x18, 0xFF, 0x90, 0x92, 0x25, 0x12, 0x86, ++0xFA, 0x12, 0x56, 0xF4, 0x90, 0x02, 0x96, 0x74, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, ++0x90, 0x93, 0x00, 0xE0, 0x90, 0x92, 0x96, 0xF0, 0x90, 0x93, 0x01, 0xE0, 0x90, 0x92, 0x97, 0xF0, ++0x90, 0x93, 0x02, 0xE0, 0x90, 0x92, 0x98, 0xF0, 0x90, 0x93, 0x03, 0xE0, 0x90, 0x92, 0x99, 0xF0, ++0x90, 0x93, 0x04, 0xE0, 0x90, 0x92, 0x9A, 0xF0, 0x90, 0x92, 0xF1, 0xE0, 0x90, 0x92, 0x9B, 0xF0, ++0x90, 0x92, 0xF2, 0xE0, 0x90, 0x92, 0x9C, 0xF0, 0x90, 0x92, 0xF3, 0xE0, 0x90, 0x92, 0x9D, 0xF0, ++0x90, 0x92, 0xF4, 0xE0, 0x90, 0x92, 0x9E, 0xF0, 0x90, 0x92, 0xF5, 0xE0, 0x90, 0x92, 0x9F, 0xF0, ++0x90, 0x92, 0xF6, 0xE0, 0x90, 0x92, 0xA0, 0xF0, 0x90, 0x92, 0xF7, 0xE0, 0x90, 0x92, 0xA1, 0xF0, ++0x90, 0x92, 0xF8, 0xE0, 0x90, 0x92, 0xA2, 0xF0, 0x90, 0x92, 0xF9, 0xE0, 0x90, 0x92, 0xA3, 0xF0, ++0x90, 0x92, 0xFA, 0xE0, 0x90, 0x92, 0xA4, 0xF0, 0xE4, 0x90, 0x92, 0x3F, 0xF0, 0x90, 0x92, 0xAA, ++0x12, 0x99, 0x2E, 0x90, 0x92, 0x3E, 0xF0, 0xD1, 0x40, 0x50, 0x04, 0xD1, 0x4D, 0x80, 0xF8, 0x90, ++0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, 0x31, 0x07, 0x90, 0x92, 0x33, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE4, 0x90, 0x92, 0x3E, 0xF0, 0xD1, 0x40, 0x50, 0x4A, 0xD1, 0x6F, 0x90, 0x92, 0x3E, 0xE0, 0xFE, ++0x24, 0xA5, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xD1, 0xD7, 0xE0, 0x24, 0x4D, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x40, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xD1, 0xD7, 0xE0, ++0x24, 0x4E, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xEE, 0xF1, 0x07, 0x12, 0x87, 0x03, 0xD1, ++0xDB, 0xE0, 0x24, 0x38, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0xEE, 0xD1, 0xC9, 0x12, 0x87, 0x03, 0xD1, ++0x5A, 0x80, 0xB2, 0x90, 0x02, 0x87, 0xE0, 0x70, 0x02, 0xC1, 0x32, 0x90, 0x92, 0xE3, 0xE0, 0x20, ++0xE0, 0x02, 0xC1, 0x32, 0xE4, 0x90, 0x92, 0xAF, 0x12, 0x99, 0x2E, 0x90, 0x92, 0x33, 0xE0, 0xFF, ++0xA3, 0xE0, 0xA3, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x35, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, ++0xEC, 0x90, 0xFD, 0x11, 0xF0, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, ++0xFE, 0xD1, 0xF0, 0xE0, 0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x54, 0x3F, 0x90, 0x92, 0x37, ++0xF0, 0xA3, 0xF1, 0x58, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90, 0x92, 0x3A, 0xF0, 0xFC, ++0x74, 0x07, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x90, 0x92, 0x3C, ++0xF0, 0xEC, 0x24, 0x18, 0x90, 0x92, 0x39, 0xF0, 0xFD, 0x90, 0x92, 0x35, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0x12, 0x55, 0x36, 0xEF, 0x54, 0xFC, 0x90, 0x92, 0x3B, 0xF0, 0x90, 0x92, 0x3A, 0xE0, 0x24, ++0x18, 0xFF, 0xE4, 0x33, 0x90, 0x92, 0x37, 0x8F, 0xF0, 0x12, 0x07, 0x0A, 0x90, 0x92, 0x37, 0xE0, ++0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x7A, 0xD0, 0x90, 0x92, 0x33, 0xEE, 0x8F, 0xF0, 0x12, 0x07, 0x0A, ++0x90, 0x85, 0xB7, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x92, 0x33, 0x12, 0x9F, 0xED, 0x40, 0x1B, ++0x90, 0x85, 0xB8, 0xE0, 0x24, 0x01, 0xFF, 0x90, 0x85, 0xB7, 0xE0, 0x34, 0x00, 0xFE, 0xC3, 0xED, ++0x9F, 0xFF, 0xEC, 0x9E, 0x90, 0x92, 0x33, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x09, 0xE0, 0x30, ++0xE0, 0x09, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x02, 0xC1, 0x25, 0x90, 0x92, 0x3B, 0xE0, 0x24, ++0xC0, 0x60, 0x02, 0x81, 0xFB, 0xD1, 0x33, 0x24, 0x18, 0xFD, 0x12, 0x55, 0x36, 0xEF, 0x60, 0x02, ++0x81, 0xE8, 0xD1, 0x33, 0x24, 0x19, 0xFD, 0x12, 0x55, 0x36, 0x90, 0x92, 0x54, 0xEF, 0xF0, 0xE4, ++0x90, 0x92, 0x3D, 0xF0, 0x90, 0x92, 0x54, 0xE0, 0xFF, 0x90, 0x92, 0x3D, 0xE0, 0xFD, 0xC3, 0x9F, ++0x50, 0x1A, 0xD1, 0x33, 0x24, 0x1A, 0xFC, 0xED, 0x2C, 0xFD, 0x12, 0x55, 0x36, 0x90, 0x92, 0x3D, ++0xE0, 0x24, 0x55, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xD1, 0xB2, 0x80, 0xD8, 0x90, 0x92, 0x54, 0xE0, ++0x70, 0x02, 0x81, 0x12, 0xE4, 0x90, 0x92, 0x3E, 0xF0, 0xD1, 0x40, 0x40, 0x02, 0x61, 0xFA, 0xD1, ++0x6F, 0x90, 0x92, 0x3E, 0xE0, 0xFF, 0x24, 0x40, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE0, ++0xFE, 0x90, 0x92, 0x54, 0xE0, 0xFD, 0xEE, 0x6D, 0x70, 0x20, 0xEF, 0xF1, 0x07, 0x12, 0x86, 0xFA, ++0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xD1, 0xBD, 0x90, 0x92, 0xBA, 0xED, 0xF0, 0xD0, 0x01, 0xD0, ++0x02, 0xD0, 0x03, 0xD1, 0x89, 0xEF, 0x60, 0x02, 0x80, 0x53, 0x90, 0x92, 0x54, 0xE0, 0x64, 0x03, ++0x70, 0x5A, 0xD1, 0xBD, 0x90, 0x92, 0xBA, 0x74, 0x03, 0xF0, 0x7A, 0x93, 0x79, 0x8B, 0xD1, 0x89, ++0xEF, 0x70, 0x11, 0xD1, 0xBD, 0x90, 0x92, 0xBA, 0x74, 0x03, 0xF0, 0x7A, 0x93, 0x79, 0x87, 0xD1, ++0x89, 0xEF, 0x60, 0x30, 0x90, 0x92, 0x3E, 0xE0, 0xFF, 0x24, 0xA0, 0xF5, 0x82, 0xE4, 0x34, 0x92, ++0xF5, 0x83, 0xE0, 0x60, 0x02, 0x80, 0x11, 0x90, 0x92, 0x3E, 0xE0, 0xFF, 0x24, 0x9B, 0xF5, 0x82, ++0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE0, 0x60, 0x05, 0x74, 0xAF, 0x2F, 0x80, 0x15, 0xD1, 0x61, 0x74, ++0x01, 0xF0, 0x80, 0x12, 0x90, 0x92, 0x3E, 0xE0, 0x24, 0xAF, 0x80, 0x06, 0x90, 0x92, 0x3E, 0xE0, ++0x24, 0xAF, 0xD1, 0x67, 0xE4, 0xF0, 0xD1, 0x5A, 0x61, 0x49, 0x90, 0x92, 0xAF, 0xE0, 0x70, 0x55, ++0xA3, 0xE0, 0x70, 0x51, 0xA3, 0xE0, 0x70, 0x4D, 0xA3, 0xE0, 0x70, 0x49, 0xA3, 0xE0, 0x70, 0x45, ++0x81, 0xE8, 0xE4, 0x90, 0x92, 0x3E, 0xF0, 0xD1, 0x40, 0x50, 0x22, 0x74, 0x9B, 0x2E, 0xF5, 0x82, ++0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE0, 0x60, 0x09, 0x74, 0xAF, 0x2E, 0xD1, 0x67, 0xE4, 0xF0, 0x80, ++0x08, 0x74, 0xAF, 0x2E, 0xD1, 0x67, 0x74, 0x01, 0xF0, 0xD1, 0x5A, 0x80, 0xDA, 0x90, 0x92, 0xAF, ++0xE0, 0x70, 0x12, 0xA3, 0xE0, 0x70, 0x0E, 0xA3, 0xE0, 0x70, 0x0A, 0xA3, 0xE0, 0x70, 0x06, 0xA3, ++0xE0, 0x70, 0x02, 0x81, 0xE8, 0xE4, 0x90, 0x92, 0x3E, 0xF0, 0xD1, 0x40, 0x40, 0x02, 0x81, 0xE8, ++0xD1, 0x6F, 0xD1, 0x61, 0xE0, 0x60, 0x7D, 0xE4, 0xFF, 0xFE, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x10, ++0xD3, 0xEF, 0x94, 0xE8, 0xEE, 0x94, 0x03, 0x50, 0x07, 0x0F, 0xBF, 0x00, 0x01, 0x0E, 0x80, 0xEA, ++0x90, 0x04, 0x1D, 0xE0, 0x70, 0x5E, 0x90, 0x92, 0x3E, 0xE0, 0x24, 0x96, 0xF5, 0x82, 0xE4, 0x34, ++0x92, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x93, 0x92, 0x74, 0x06, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x12, ++0xBD, 0x28, 0x90, 0x92, 0x37, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x92, 0x3D, 0xF0, 0x90, ++0x92, 0x3D, 0xE0, 0xFD, 0xC3, 0x94, 0x06, 0x50, 0x21, 0xD1, 0x33, 0x24, 0x0A, 0xFC, 0xED, 0x2C, ++0xFD, 0x12, 0x55, 0x36, 0x90, 0x92, 0x37, 0xA3, 0xE0, 0xFE, 0x90, 0x92, 0x3D, 0xE0, 0x2E, 0x24, ++0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xD1, 0xB2, 0x80, 0xD5, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, ++0x90, 0x06, 0x35, 0xF0, 0xD1, 0x5A, 0x81, 0x5A, 0x90, 0x92, 0x33, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x12, 0x7C, 0x0B, 0x90, 0x06, 0x36, 0x74, 0xDD, 0xF0, 0x41, 0x03, 0x90, 0x92, 0x3C, 0xE0, 0x60, ++0x02, 0xC1, 0x25, 0xD1, 0x33, 0x24, 0x16, 0xFD, 0x12, 0x55, 0x36, 0x90, 0x06, 0x34, 0xEF, 0xF0, ++0xD1, 0x33, 0x24, 0x17, 0xFD, 0x12, 0x55, 0x36, 0x90, 0x06, 0x37, 0xEF, 0xF0, 0xE4, 0x90, 0x92, ++0x3E, 0xF0, 0xD1, 0x40, 0x50, 0x67, 0xD1, 0x6F, 0xE4, 0x90, 0x92, 0x3D, 0xF0, 0x90, 0x92, 0x3D, ++0xE0, 0xFF, 0xC3, 0x94, 0x06, 0x50, 0x52, 0xEF, 0x60, 0x04, 0x64, 0x01, 0x70, 0x20, 0xD1, 0x33, ++0xD1, 0xFB, 0x90, 0x92, 0x3D, 0xE0, 0xFE, 0x24, 0xA0, 0xD1, 0xE6, 0x90, 0x92, 0x3E, 0xE0, 0xD1, ++0xC9, 0x12, 0x86, 0xFA, 0x8E, 0x82, 0xD1, 0x83, 0xFF, 0x74, 0xA2, 0x2E, 0xD1, 0xE6, 0xD1, 0x33, ++0xD1, 0xFB, 0x90, 0x92, 0x3E, 0xE0, 0xFE, 0xD1, 0xC9, 0x12, 0x86, 0xFA, 0x90, 0x92, 0x3D, 0xE0, ++0xF5, 0x82, 0xD1, 0x83, 0x6F, 0x60, 0x0E, 0x74, 0xAA, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, ++0x83, 0xE4, 0xF0, 0x80, 0x04, 0xD1, 0xB6, 0x80, 0xA4, 0xD1, 0x5A, 0x80, 0x95, 0x90, 0x92, 0xAA, ++0xE0, 0x64, 0x01, 0x60, 0x17, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x11, 0xA3, 0xE0, 0x64, 0x01, 0x60, ++0x0B, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x05, 0xA3, 0xE0, 0xB4, 0x01, 0x06, 0x90, 0x92, 0x3F, 0x74, ++0x01, 0xF0, 0x90, 0x92, 0x3F, 0xE0, 0x64, 0x01, 0x70, 0x54, 0xF1, 0xCA, 0x90, 0x01, 0xC7, 0x74, ++0x66, 0xF0, 0xE4, 0xFF, 0x12, 0x5F, 0xE9, 0x90, 0x93, 0x05, 0xE0, 0x70, 0x02, 0x41, 0x03, 0x90, ++0x01, 0x3C, 0xE0, 0x30, 0xE4, 0x03, 0x74, 0x10, 0xF0, 0x7D, 0x10, 0xE4, 0xFF, 0x12, 0x7B, 0xFD, ++0x90, 0x93, 0x06, 0xE0, 0x60, 0x08, 0xF5, 0x25, 0xE4, 0xF5, 0x26, 0xFB, 0x80, 0x15, 0x90, 0x93, ++0x07, 0xE0, 0x60, 0x08, 0xFB, 0xE4, 0xF5, 0x25, 0xF5, 0x26, 0x80, 0x07, 0x75, 0x25, 0x20, 0xE4, ++0xF5, 0x26, 0xFB, 0x7D, 0x01, 0x7F, 0x60, 0x7E, 0x01, 0x12, 0x76, 0x3D, 0x41, 0x03, 0xE4, 0x90, ++0x92, 0x3F, 0xF0, 0x90, 0x92, 0xAA, 0x12, 0x99, 0x2E, 0x90, 0x92, 0x3E, 0xF0, 0xD1, 0x40, 0x50, ++0x04, 0xD1, 0x4D, 0x80, 0xF8, 0x90, 0x92, 0x33, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x7C, 0x0B, ++0x41, 0x03, 0x22, 0x90, 0x92, 0x35, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x92, 0x39, 0xE0, 0x22, ++0x90, 0x92, 0xEE, 0xE0, 0xFF, 0x90, 0x92, 0x3E, 0xE0, 0xFE, 0xC3, 0x9F, 0x22, 0x74, 0xAA, 0x2E, ++0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x3E, 0xE0, 0x04, 0xF0, ++0x22, 0x90, 0x92, 0x3E, 0xE0, 0x24, 0xAF, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, 0x74, ++0x96, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE0, 0xFF, 0x02, 0x7B, 0x2A, 0x12, 0x86, ++0xFA, 0x8F, 0x82, 0x75, 0x83, 0x00, 0x02, 0x03, 0x0F, 0x90, 0x92, 0xB4, 0x12, 0x87, 0x03, 0xE4, ++0xFF, 0x90, 0x92, 0xBA, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x14, 0x90, 0x92, 0xB7, 0xD1, 0x7E, ++0xFE, 0x90, 0x92, 0xB4, 0xD1, 0x7E, 0x6E, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xE2, 0x7F, ++0x01, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x92, 0x3D, 0xE0, 0x04, 0xF0, 0x22, 0x7B, 0x01, 0x7A, ++0x92, 0x79, 0x55, 0x90, 0x92, 0xB7, 0x02, 0x87, 0x03, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0x87, 0xF5, ++0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0xA5, 0x2E, 0xF5, 0x82, ++0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xEF, 0xF0, 0x22, ++0x74, 0x00, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0x22, 0x24, 0x04, 0xFD, 0x90, 0x92, ++0x3D, 0xE0, 0x2D, 0xFD, 0x02, 0x55, 0x36, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0x45, 0xF5, 0x82, 0xE4, ++0x34, 0x92, 0xF5, 0x83, 0x22, 0xE4, 0xFC, 0xED, 0x2C, 0x24, 0x00, 0xD1, 0xF3, 0xE4, 0xF0, 0x0C, ++0xEC, 0xB4, 0x18, 0xF3, 0xD1, 0xF0, 0xEF, 0xF0, 0xEE, 0x54, 0x3F, 0xFF, 0x74, 0x01, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xF1, 0x58, 0x54, 0xF0, 0xF0, 0x74, 0x03, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x74, 0x0B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0xFB, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, 0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x86, 0x4E, 0x90, ++0x92, 0x32, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x84, 0xC1, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, ++0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0F, 0x90, 0x84, 0xC1, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, ++0x12, 0x2D, 0xBD, 0x12, 0x99, 0x38, 0xF1, 0xC0, 0x30, 0xE1, 0x06, 0x54, 0xFD, 0xF0, 0x12, 0x60, ++0x5D, 0xF1, 0xC0, 0x30, 0xE2, 0x06, 0x54, 0xFB, 0xF0, 0x12, 0x6A, 0x6D, 0xF1, 0xC0, 0x30, 0xE5, ++0x0B, 0x54, 0xDF, 0xF0, 0x12, 0x6F, 0x22, 0xBF, 0x01, 0x02, 0x31, 0x10, 0xD2, 0xAF, 0x80, 0xB6, ++0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x84, 0xC1, 0xE0, 0xFF, 0x22, 0xC2, 0xAF, 0x90, 0x92, 0xE3, 0xE0, ++0x54, 0xFE, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x7C, 0x41, 0xE4, 0x90, 0x92, 0xEF, 0xF0, 0xA3, ++0xF0, 0xD2, 0xAF, 0x22, 0x12, 0x02, 0xF6, 0xFF, 0x90, 0x93, 0x08, 0xF0, 0xBF, 0x01, 0x08, 0x12, ++0xB1, 0x2A, 0xE4, 0x90, 0x93, 0x08, 0xF0, 0x22, 0x12, 0x02, 0xF6, 0xFF, 0x54, 0x80, 0xFE, 0x90, ++0x89, 0x16, 0xE0, 0x54, 0x7F, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x40, 0xFF, 0xEE, 0x54, 0xBF, 0x4F, ++0xFF, 0xF0, 0x12, 0x02, 0xF6, 0xFE, 0x54, 0x20, 0xFD, 0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x90, 0x89, ++0x16, 0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x02, 0xF6, 0x54, ++0x0F, 0xFE, 0xEF, 0x54, 0xF0, 0x4E, 0x90, 0x89, 0x16, 0xF0, 0x12, 0x8F, 0x11, 0xFF, 0x54, 0x7F, ++0x90, 0x89, 0x18, 0xF0, 0xEF, 0x12, 0x8B, 0xF7, 0xFF, 0x90, 0x89, 0x17, 0xE0, 0x54, 0xFE, 0x12, ++0x8B, 0xED, 0x90, 0x89, 0x19, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x03, 0x0F, 0x54, 0x01, 0x25, 0xE0, ++0xFF, 0x90, 0x89, 0x17, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0x11, 0x73, 0x20, 0xE0, 0x02, 0x7D, 0x01, ++0x02, 0x54, 0x9F, 0x90, 0x89, 0x16, 0xE0, 0xFE, 0x54, 0x0F, 0xFF, 0xEE, 0xC4, 0x13, 0x13, 0x54, ++0x03, 0x7D, 0x00, 0x22, 0x90, 0x89, 0x16, 0xE0, 0xFF, 0x12, 0x8B, 0xF9, 0x30, 0xE0, 0x1A, 0xEF, ++0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x02, 0x11, 0xAA, 0x90, 0x89, 0x17, 0xE0, 0x30, 0xE0, 0x0A, 0x11, ++0x73, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x12, 0x54, 0x9F, 0x22, 0xE4, 0x90, 0x92, 0xCE, 0xF0, 0x90, ++0x92, 0xCC, 0x74, 0x14, 0xF0, 0x90, 0x92, 0xDA, 0x74, 0x01, 0xF0, 0xFB, 0xF1, 0x7F, 0x02, 0x87, ++0xDA, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x15, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x05, 0x12, 0x6B, ++0x98, 0x80, 0x09, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xF7, 0xF0, 0x11, 0xDE, 0x80, 0xA6, 0x90, 0x85, ++0xC7, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x8D, 0x4D, 0xE4, 0xFF, 0x12, 0x77, 0x39, 0xBF, 0x01, 0x0F, ++0x90, 0x85, 0xC5, 0xE0, 0x60, 0x09, 0x31, 0x00, 0xF0, 0x54, 0x07, 0x70, 0x02, 0x11, 0xDE, 0x22, ++0x90, 0x85, 0xC9, 0xE0, 0x54, 0xFE, 0x22, 0xE4, 0xF5, 0x77, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x77, ++0x54, 0xC0, 0x70, 0x08, 0x31, 0x00, 0xF0, 0x54, 0xFD, 0xF0, 0x80, 0xC2, 0xE5, 0x77, 0x30, 0xE6, ++0x1F, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x01, 0x70, 0x1A, 0x90, 0x85, 0xC9, 0xE0, 0x44, 0x01, 0x12, ++0x8F, 0xE3, 0x64, 0x02, 0x60, 0x05, 0x12, 0x77, 0x61, 0x80, 0x08, 0x12, 0x79, 0x41, 0x80, 0x03, ++0x31, 0x00, 0xF0, 0xE5, 0x77, 0x90, 0x85, 0xC9, 0x30, 0xE7, 0x0E, 0xE0, 0x44, 0x02, 0x12, 0x92, ++0x62, 0x90, 0x85, 0xC1, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x12, 0x97, ++0x4D, 0x70, 0x13, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0D, 0x91, 0x3C, 0xF0, 0x90, 0x85, 0xC1, 0xE0, ++0x91, 0x47, 0x70, 0x02, 0x11, 0xDE, 0x22, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, ++0x03, 0x30, 0xE0, 0x1E, 0xEF, 0x54, 0xBF, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x85, 0xC2, 0x30, ++0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFE, 0x51, 0x5F, 0x74, 0x04, 0xF0, ++0x11, 0xDE, 0x22, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0x12, 0x8B, 0xF9, 0x30, 0xE0, 0x23, 0xEF, 0x54, ++0x7F, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x85, 0xC2, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, ++0x80, 0x07, 0xE0, 0x54, 0xFD, 0x51, 0x5F, 0x04, 0xF0, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x02, 0x11, ++0xDE, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, ++0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x01, 0xC4, 0x74, 0xD2, 0xF0, 0x74, 0xA9, 0xA3, 0xF0, 0x12, 0x75, 0x28, 0xE5, 0x56, 0x30, 0xE1, ++0x03, 0x12, 0x97, 0x32, 0xE5, 0x56, 0x30, 0xE2, 0x02, 0x11, 0xC1, 0xE5, 0x56, 0x30, 0xE4, 0x02, ++0xF1, 0x9D, 0xE5, 0x57, 0x30, 0xE0, 0x02, 0x51, 0x6A, 0xE5, 0x59, 0x30, 0xE1, 0x05, 0x7F, 0x04, ++0x12, 0x97, 0xD8, 0xE5, 0x59, 0x30, 0xE4, 0x03, 0x12, 0x97, 0x9D, 0xE5, 0x59, 0x30, 0xE5, 0x02, ++0x31, 0x77, 0xE5, 0x59, 0x30, 0xE6, 0x02, 0x31, 0xA3, 0x74, 0xD2, 0x04, 0x90, 0x01, 0xC4, 0xF0, ++0x74, 0xA9, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xF0, ++0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0x12, 0xBE, 0x4F, 0x90, 0x92, 0xCC, ++0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x57, 0x82, ++0x90, 0x92, 0xCC, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, ++0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0xF1, 0xB5, 0x02, 0x51, 0x7D, 0x71, 0x19, 0x13, ++0x54, 0x1F, 0x30, 0xE0, 0x10, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x07, 0x7D, 0x02, ++0x7F, 0x02, 0x12, 0x7C, 0x41, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, ++0x07, 0xEF, 0x91, 0x47, 0x70, 0x52, 0x80, 0x4E, 0x90, 0x85, 0xCE, 0xE0, 0x04, 0xF0, 0x90, 0x85, ++0xC9, 0xE0, 0x54, 0xEF, 0xF0, 0xF1, 0x89, 0xD3, 0x9F, 0x40, 0x3B, 0x12, 0x97, 0x4D, 0x70, 0x38, ++0x12, 0x8F, 0xE4, 0x70, 0x0B, 0x12, 0x70, 0xDB, 0x90, 0x85, 0xC2, 0xE0, 0x54, 0xFB, 0xF0, 0x22, ++0x12, 0x70, 0xDB, 0x90, 0x85, 0xCF, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x0E, 0x90, ++0x85, 0xC2, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x85, 0xCF, 0xF0, 0x80, 0x03, 0x12, 0x79, 0x41, ++0xE4, 0x90, 0x85, 0xCE, 0xF0, 0x22, 0x11, 0xDE, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0xFF, 0x13, 0x13, ++0x22, 0x12, 0x97, 0x4D, 0x60, 0x02, 0x81, 0x3B, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x02, 0x81, 0x3B, ++0x90, 0x05, 0x63, 0xE0, 0x90, 0x93, 0x24, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x93, 0x25, 0xF0, ++0x90, 0x05, 0x61, 0xE0, 0x90, 0x93, 0x26, 0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x93, 0x27, 0xF0, ++0x91, 0x3C, 0xF0, 0x90, 0x85, 0xC9, 0xE0, 0x54, 0xEC, 0xF0, 0x90, 0x85, 0xC3, 0xE0, 0xFF, 0xC4, ++0x54, 0x0F, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x02, 0x31, 0x07, 0x90, 0x85, 0xC3, 0xE0, 0xFF, 0xC4, ++0x54, 0x0F, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x85, 0xCC, 0xF0, 0x90, 0x06, ++0xAA, 0xE0, 0x90, 0x85, 0xCB, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x85, 0xCB, 0xE0, 0xFE, ++0xFF, 0x80, 0x00, 0x90, 0x85, 0xCC, 0xEF, 0xF0, 0x12, 0xC0, 0xC3, 0xE4, 0x90, 0x85, 0xCE, 0xF0, ++0xF1, 0x93, 0x71, 0x19, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x02, 0x81, 0x34, 0xEF, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x20, 0xE0, 0x3B, 0x90, 0x85, 0xCB, 0xE0, 0xFF, 0xA3, 0xE0, 0x6F, 0x70, 0x75, 0x90, ++0x85, 0xC2, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x85, 0xCB, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x90, 0x01, ++0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x12, 0x7B, 0xFD, 0x7D, 0x01, 0x7F, 0x02, 0x12, 0x7C, ++0x41, 0x7D, 0x02, 0x7F, 0x02, 0x12, 0x7C, 0x41, 0x90, 0x85, 0xCC, 0xE0, 0x14, 0xF0, 0x80, 0x44, ++0x90, 0x85, 0xC3, 0xE0, 0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x39, 0x90, 0x85, 0xCB, 0xE0, 0xFF, ++0xA3, 0xE0, 0xFE, 0x6F, 0x60, 0x2E, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x25, 0x71, ++0x19, 0x54, 0x3F, 0x30, 0xE0, 0x1E, 0xEF, 0x54, 0xBF, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, ++0xFD, 0x7F, 0x03, 0x12, 0x7B, 0xBF, 0x7D, 0x01, 0x7F, 0x02, 0x12, 0x7C, 0xA9, 0x7D, 0x02, 0x7F, ++0x02, 0x12, 0x7C, 0xA9, 0x90, 0x85, 0xC2, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x01, 0x57, 0xE4, ++0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x22, 0x54, 0xFB, 0xF0, 0x90, 0x85, 0xC9, 0xE0, 0x54, 0xFD, ++0xF0, 0x54, 0x07, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, ++0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x01, 0xC4, 0x74, 0x54, 0xF0, 0x74, 0xAC, 0xA3, 0xF0, 0x12, 0x71, 0x90, 0xE5, 0x4C, ++0x30, 0xE1, 0x02, 0xB1, 0x89, 0xE5, 0x4C, 0x30, 0xE3, 0x02, 0xF1, 0xA8, 0xE5, 0x4C, 0x30, 0xE4, ++0x02, 0xF1, 0x77, 0xE5, 0x4C, 0x30, 0xE5, 0x03, 0x12, 0xBC, 0xEC, 0xE5, 0x4E, 0x30, 0xE0, 0x03, ++0x12, 0x94, 0x4D, 0xE5, 0x4E, 0x30, 0xE1, 0x03, 0x12, 0x95, 0x4F, 0xE5, 0x4E, 0x30, 0xE2, 0x02, ++0xF1, 0x3B, 0xE5, 0x4E, 0x30, 0xE3, 0x03, 0x12, 0x97, 0x3D, 0xE5, 0x4E, 0x30, 0xE4, 0x02, 0x31, ++0x5E, 0xE5, 0x4E, 0x30, 0xE5, 0x03, 0x12, 0xB8, 0x37, 0xE5, 0x4E, 0x30, 0xE6, 0x02, 0x11, 0xE8, ++0xE5, 0x4E, 0x30, 0xE7, 0x02, 0xF1, 0xE0, 0xE5, 0x4F, 0x30, 0xE0, 0x02, 0xF1, 0xD1, 0xE5, 0x4F, ++0x30, 0xE1, 0x02, 0xD1, 0x07, 0xE5, 0x4F, 0x30, 0xE4, 0x02, 0xF1, 0x6B, 0xE5, 0x4F, 0x30, 0xE5, ++0x02, 0xB1, 0x19, 0x74, 0x54, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xAC, 0xA3, 0xF0, 0xD0, 0x07, ++0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0xF5, 0x77, 0x90, 0x85, 0xBB, 0xE0, ++0xFF, 0xE5, 0x77, 0xC3, 0x9F, 0x50, 0x61, 0xAF, 0x77, 0x12, 0x77, 0x39, 0xEF, 0x60, 0x55, 0xE5, ++0x77, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFF, 0xE5, 0x77, 0x54, 0x07, 0xFE, 0x74, 0x75, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, 0xFD, 0xAF, 0x06, 0xF1, 0x63, 0x80, 0x05, 0xC3, 0x33, ++0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x60, 0x2A, 0xE5, 0x77, 0xF1, 0xC3, 0x20, 0xE7, ++0x02, 0x80, 0x13, 0xE5, 0x77, 0xC4, 0x54, 0xF0, 0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, ++0x83, 0xE0, 0xFF, 0x20, 0xE7, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x20, 0xF0, 0x80, 0x05, 0xAD, ++0x77, 0x12, 0x8F, 0x23, 0x05, 0x77, 0x80, 0x94, 0x22, 0xE4, 0xFF, 0x90, 0x92, 0xBB, 0xEF, 0xF0, ++0x90, 0x04, 0x7E, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x92, 0xCB, 0xF0, 0xE0, 0xFE, 0x6F, 0x60, 0x66, ++0x90, 0x92, 0xBC, 0x74, 0x03, 0xF0, 0x90, 0x92, 0xCA, 0x74, 0x08, 0xF0, 0xEE, 0x04, 0x54, 0x0F, ++0xFF, 0xE4, 0xFE, 0xEF, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x80, 0xF5, ++0x83, 0xE5, 0x82, 0x2E, 0xD1, 0x17, 0xE0, 0xFD, 0x74, 0xBE, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x92, ++0xF5, 0x83, 0xED, 0xF0, 0x0E, 0xEE, 0xB4, 0x08, 0xDA, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0xBC, 0x12, ++0x5E, 0x10, 0x90, 0x92, 0xCB, 0xE0, 0x04, 0x54, 0x0F, 0xFF, 0xF0, 0xBF, 0x0F, 0x02, 0xE4, 0xF0, ++0x90, 0x92, 0xCB, 0xE0, 0x90, 0x04, 0x7F, 0xF0, 0x90, 0x92, 0xBB, 0xE0, 0x7F, 0x04, 0x70, 0x03, ++0x02, 0x97, 0xD8, 0x12, 0x87, 0xDA, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x03, 0x12, 0xC2, 0xB6, ++0x22, 0x12, 0x05, 0x28, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0x22, 0x90, ++0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x92, 0x01, 0xF0, 0x90, 0x92, 0x01, 0xE0, 0xFD, 0x70, 0x02, ++0xE1, 0x1F, 0x90, 0x85, 0x1D, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, ++0x14, 0xFF, 0x90, 0x85, 0x1E, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, ++0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x93, 0x9F, 0xE0, 0xF1, 0x62, ++0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0xE1, 0x02, ++0xE4, 0x90, 0x92, 0x02, 0xF0, 0x90, 0x92, 0x02, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x34, 0xF1, ++0x21, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0xF1, ++0x29, 0x90, 0x84, 0xCD, 0xD1, 0x11, 0xEF, 0xF1, 0x20, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, ++0x74, 0xF0, 0xF1, 0x29, 0x90, 0x84, 0xD1, 0xD1, 0x11, 0xEF, 0xF0, 0x90, 0x92, 0x02, 0xE0, 0x04, ++0xF0, 0x80, 0xC2, 0x90, 0x92, 0x01, 0xE0, 0xFF, 0x90, 0x93, 0x9F, 0xE0, 0xFE, 0x74, 0x01, 0xA8, ++0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0x92, 0x01, 0xF0, 0x90, 0x93, ++0x9F, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, ++0xCC, 0xF0, 0x90, 0x93, 0x9F, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x85, 0x1E, 0xF1, ++0x70, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0xC1, 0x29, 0xE4, 0x90, 0x85, 0x1E, 0xF0, ++0xC1, 0x29, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x93, 0x9F, 0xE0, 0x44, 0x80, 0x90, ++0x00, 0x8A, 0xF1, 0x20, 0x90, 0x01, 0xD0, 0x12, 0x05, 0x28, 0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, ++0xF0, 0x90, 0x93, 0x9F, 0xE0, 0x75, 0xF0, 0x04, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, ++0x83, 0xE0, 0xFF, 0x90, 0x85, 0x1E, 0xE0, 0x75, 0xF0, 0x08, 0x22, 0x90, 0x85, 0xC8, 0xE0, 0x64, ++0x02, 0x60, 0x08, 0x71, 0x21, 0x90, 0x01, 0xE6, 0xE0, 0x04, 0xF0, 0x22, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, 0xFD, 0x7C, 0x00, 0xE5, 0x62, ++0x54, 0x07, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x22, 0xE4, 0xFF, 0x02, 0x2D, 0xBD, ++0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0x22, 0x12, 0x40, 0xB9, 0x7F, 0x02, 0x02, 0x97, 0xD8, 0x7A, ++0x92, 0x79, 0xCC, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x22, 0x90, 0x86, 0x6D, 0xE0, 0xFF, 0x90, 0x85, ++0xCE, 0xE0, 0x22, 0x90, 0x85, 0xD1, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x90, 0x01, 0xC7, ++0x74, 0x66, 0xF0, 0xE4, 0xFF, 0x02, 0x5F, 0xE9, 0x90, 0x92, 0xE3, 0xE0, 0x30, 0xE0, 0x05, 0x7F, ++0x20, 0x12, 0x97, 0xD8, 0x22, 0x90, 0x85, 0xD7, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x85, 0xDE, ++0xE0, 0xFB, 0x22, 0xC4, 0x54, 0xF0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, ++0x22, 0x12, 0x97, 0xEE, 0xFF, 0xBF, 0x03, 0x07, 0x90, 0x05, 0x21, 0xE0, 0x54, 0x7F, 0xF0, 0x22, ++0xE4, 0xF5, 0x77, 0xF5, 0x78, 0xF5, 0x79, 0x12, 0x97, 0xEE, 0xFF, 0xBF, 0x03, 0x07, 0x90, 0x05, ++0x21, 0xE0, 0x54, 0x7F, 0xF0, 0x22, 0x12, 0x02, 0xF6, 0x54, 0x01, 0xFF, 0x90, 0x93, 0x1E, 0xE0, ++0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, 0x02, 0xF6, 0x90, 0x86, 0x71, 0xF0, 0x22, 0x12, 0x02, 0xF6, ++0x90, 0x93, 0x11, 0xF0, 0x22, 0x12, 0x02, 0xF6, 0xFF, 0x90, 0x93, 0x12, 0xF0, 0xBF, 0x01, 0x07, ++0x11, 0x28, 0xE4, 0x90, 0x93, 0x12, 0xF0, 0x22, 0x31, 0x1C, 0x7F, 0xF4, 0x7E, 0x00, 0x12, 0x64, ++0x37, 0xBF, 0x01, 0x06, 0x90, 0x92, 0x16, 0xE0, 0xA3, 0xF0, 0x31, 0x1C, 0x7F, 0xF5, 0x7E, 0x00, ++0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x18, 0xF0, 0x31, 0x1C, ++0x7F, 0xF6, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, ++0x19, 0xF0, 0x31, 0x1C, 0x7F, 0xF7, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, ++0x16, 0xE0, 0x90, 0x92, 0x1A, 0xF0, 0x31, 0x1C, 0x7F, 0xF8, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, ++0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x1B, 0xF0, 0x31, 0x1C, 0x7F, 0xF9, 0x7E, 0x00, ++0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x1C, 0xF0, 0x31, 0x1C, ++0x7F, 0xFB, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, ++0x1D, 0xF0, 0x31, 0x1C, 0x7F, 0xFD, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, ++0x16, 0xE0, 0x90, 0x92, 0x1E, 0xF0, 0x90, 0x92, 0x07, 0x74, 0x19, 0xF0, 0x90, 0x92, 0x15, 0x74, ++0x08, 0xF0, 0x90, 0x92, 0x17, 0xE0, 0x90, 0x92, 0x09, 0xF0, 0x90, 0x92, 0x18, 0xE0, 0x90, 0x92, ++0x0A, 0xF0, 0x90, 0x92, 0x19, 0xE0, 0x90, 0x92, 0x0B, 0xF0, 0x90, 0x92, 0x1A, 0xE0, 0x90, 0x92, ++0x0C, 0xF0, 0x90, 0x92, 0x1B, 0xE0, 0x90, 0x92, 0x0D, 0xF0, 0x90, 0x92, 0x1C, 0xE0, 0x90, 0x92, ++0x0E, 0xF0, 0x90, 0x92, 0x1D, 0xE0, 0x90, 0x92, 0x0F, 0xF0, 0x90, 0x92, 0x1E, 0xE0, 0x90, 0x92, ++0x10, 0xF0, 0x31, 0x23, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x02, 0x87, 0xDA, 0x7B, 0x01, 0x7A, 0x92, ++0x79, 0x16, 0x22, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x07, 0x22, 0x31, 0x23, 0x7F, 0xF5, 0x7E, 0x01, ++0x12, 0x64, 0x37, 0xBF, 0x01, 0x06, 0x90, 0x92, 0x07, 0xE0, 0xA3, 0xF0, 0x31, 0x23, 0x7F, 0xF6, ++0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, 0x90, 0x92, 0x09, 0xF0, ++0x31, 0x23, 0x7F, 0xF4, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, ++0x90, 0x92, 0x0A, 0xF0, 0x31, 0x23, 0x7F, 0xF3, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, ++0x90, 0x92, 0x07, 0xE0, 0x90, 0x92, 0x0B, 0xF0, 0x31, 0x23, 0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x64, ++0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, 0x90, 0x92, 0x0C, 0xF0, 0x90, 0x92, 0x08, 0xE0, ++0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x92, 0x10, 0xF0, 0x90, 0x92, 0x0C, ++0xE0, 0x90, 0x92, 0x11, 0xF0, 0x90, 0x92, 0x12, 0x74, 0x12, 0xF0, 0x90, 0x92, 0x20, 0x74, 0x05, ++0xF0, 0x90, 0x92, 0x14, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x92, 0x10, 0xE0, ++0x90, 0x92, 0x17, 0xF0, 0x90, 0x92, 0x11, 0xE0, 0x90, 0x92, 0x18, 0xF0, 0x7B, 0x01, 0x7A, 0x92, ++0x79, 0x12, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x02, 0x87, 0xDA, 0x12, 0x02, 0xF6, 0x90, 0x93, 0x05, ++0xF0, 0x12, 0x8F, 0x11, 0x90, 0x93, 0x06, 0x12, 0x8B, 0xEE, 0x90, 0x93, 0x07, 0xF0, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x85, 0x1E, 0xE0, 0xFF, 0x90, 0x85, 0x1D, 0xE0, 0xB5, ++0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x48, 0x90, 0x85, 0x1D, 0xE0, 0xFE, ++0x75, 0xF0, 0x08, 0x90, 0x84, 0xCD, 0x12, 0x05, 0x28, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, ++0x24, 0xCE, 0xF9, 0x74, 0x84, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x96, 0x30, 0x90, ++0x85, 0x1D, 0x12, 0xAF, 0x70, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x85, ++0x1D, 0xF0, 0x7D, 0x68, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x12, 0x40, 0xB9, 0x90, 0x84, 0xC1, 0xE0, ++0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x85, 0xB5, 0xE0, 0xFF, 0x70, 0x06, 0xA3, ++0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x85, 0xB6, 0xE0, 0xB5, 0x07, 0x04, 0x7F, ++0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x22, ++0xC0, 0x01, 0x90, 0x85, 0xB6, 0xE0, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0x1F, 0xF9, 0x74, 0x85, 0x35, ++0xF0, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x02, 0xD0, 0x7D, ++0xCC, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xB6, 0x12, 0xAF, 0x70, 0xB4, 0x0A, 0x02, 0x7F, ++0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x85, 0xB6, 0xF0, 0x22, 0xE4, 0x90, 0x84, 0xC1, 0x12, 0x99, ++0x30, 0x90, 0x92, 0xE1, 0xF0, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, ++0x7B, 0x3E, 0xB1, 0x6A, 0xB1, 0x5D, 0x12, 0x7B, 0x9C, 0xB1, 0xD9, 0x51, 0xBA, 0x7F, 0x01, 0x12, ++0x85, 0x15, 0x90, 0x93, 0x10, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x85, 0x15, 0x90, 0x93, 0x10, 0xE0, ++0x04, 0xF0, 0x91, 0x92, 0x71, 0xC9, 0x90, 0x01, 0xCC, 0x74, 0x0F, 0xF0, 0x90, 0x00, 0x80, 0xE0, ++0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x7B, 0x3E, 0x75, 0x20, 0xFF, 0x12, 0x7C, 0xCD, 0x91, 0xF6, ++0x90, 0x00, 0x81, 0xE0, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x12, 0x7B, 0x3E, 0xB1, 0x52, 0x71, 0x4E, ++0x90, 0x00, 0x00, 0xE0, 0x54, 0xFB, 0xFD, 0xE4, 0xFF, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x01, 0xE0, ++0x44, 0x04, 0xFD, 0x7F, 0x01, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x98, 0x74, 0x80, 0xF0, 0xA3, 0x74, ++0x88, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0xE4, 0xFF, 0x02, 0x85, 0x9E, 0x7E, 0x00, ++0x7F, 0x0B, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x13, 0x12, 0x06, 0xDE, 0x71, 0xC2, 0x7F, ++0xF9, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x1C, 0x90, 0x92, 0x29, 0xE0, 0xFE, 0x54, 0x01, ++0x90, 0x93, 0x13, 0xF0, 0xEE, 0x54, 0x04, 0x90, 0x93, 0x15, 0xF0, 0x90, 0x92, 0x29, 0xE0, 0x54, ++0x08, 0x90, 0x93, 0x14, 0xF0, 0x71, 0xC2, 0x7F, 0xFB, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, ++0x16, 0x90, 0x92, 0x29, 0xE0, 0xFE, 0x54, 0x07, 0x90, 0x93, 0x17, 0xF0, 0xEE, 0x54, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x90, 0x93, 0x16, 0xF0, 0x71, 0xC2, 0x7F, 0xFD, 0x7E, 0x00, 0x12, 0x64, 0x37, ++0xBF, 0x01, 0x0E, 0x90, 0x92, 0x29, 0xE0, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x93, 0x18, ++0xF0, 0x22, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x29, 0x22, 0xB1, 0x4C, 0x12, 0x7B, 0xEF, 0x12, 0x3C, ++0x03, 0xD1, 0x23, 0x12, 0x94, 0x90, 0x71, 0xE4, 0x12, 0x99, 0x07, 0xB1, 0x7F, 0x90, 0x93, 0x11, ++0x74, 0x01, 0xF0, 0x22, 0x90, 0x93, 0x09, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0x54, 0xFB, ++0xF0, 0x44, 0x10, 0xF0, 0x90, 0x84, 0xC5, 0xE0, 0xFF, 0x64, 0x02, 0x70, 0x2D, 0x90, 0xFD, 0x80, ++0xE0, 0x7E, 0x00, 0x30, 0xE0, 0x02, 0x7E, 0x01, 0x90, 0x93, 0x0F, 0x91, 0x8B, 0x7E, 0x00, 0x30, ++0xE1, 0x02, 0x7E, 0x01, 0x90, 0x93, 0x0D, 0x91, 0x8B, 0x7E, 0x00, 0x30, 0xE2, 0x02, 0x7E, 0x01, ++0x90, 0x93, 0x0E, 0x91, 0x8B, 0x90, 0x02, 0xFB, 0xF0, 0x22, 0xEF, 0x64, 0x01, 0x70, 0x21, 0x91, ++0x84, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x0F, 0xEF, 0xF0, 0x91, 0x84, 0x30, 0xE1, 0x02, ++0x7F, 0x01, 0x90, 0x93, 0x0D, 0xEF, 0xF0, 0x91, 0x84, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80, 0x27, ++0x90, 0x84, 0xC5, 0xE0, 0x64, 0x03, 0x70, 0x24, 0x91, 0x7D, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, ++0x93, 0x0F, 0xEF, 0xF0, 0x91, 0x7D, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x0D, 0xEF, 0xF0, ++0x91, 0x7D, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x0E, 0xEF, 0xF0, 0x22, 0x90, 0xFD, 0x78, ++0xE0, 0x7F, 0x00, 0x22, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x22, 0xEE, 0xF0, 0x90, 0xFD, 0x80, ++0xE0, 0x22, 0x12, 0x7C, 0x4E, 0x90, 0x84, 0xC5, 0xEF, 0xF0, 0x91, 0xC6, 0x90, 0x01, 0x64, 0x74, ++0x01, 0xF0, 0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x00, 0x17, 0xE0, 0x54, 0xFC, 0x44, ++0x04, 0xFD, 0x7F, 0x17, 0x12, 0x7B, 0x3E, 0x90, 0x00, 0x38, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x38, ++0x12, 0x7B, 0x3E, 0x02, 0x68, 0xE2, 0x12, 0x75, 0xB6, 0x12, 0x75, 0x58, 0xB1, 0xFC, 0xB1, 0xBA, ++0xE4, 0xF5, 0x40, 0xF5, 0x41, 0xF5, 0x42, 0x75, 0x43, 0x80, 0xAD, 0x40, 0x7F, 0x50, 0x12, 0x7B, ++0x3E, 0xAD, 0x41, 0x7F, 0x51, 0x12, 0x7B, 0x3E, 0xAD, 0x42, 0x7F, 0x52, 0x12, 0x7B, 0x3E, 0xAD, ++0x43, 0x7F, 0x53, 0x02, 0x7B, 0x3E, 0xE4, 0x90, 0x92, 0x29, 0xF0, 0xA3, 0xF0, 0xB1, 0x9C, 0xEF, ++0x64, 0x01, 0x60, 0x41, 0xC3, 0x90, 0x92, 0x2A, 0xE0, 0x94, 0x88, 0x90, 0x92, 0x29, 0xE0, 0x94, ++0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, ++0x80, 0x23, 0x90, 0x92, 0x29, 0x12, 0x97, 0xE7, 0x7F, 0x14, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0xD3, ++0x90, 0x92, 0x2A, 0xE0, 0x94, 0x32, 0x90, 0x92, 0x29, 0xE0, 0x94, 0x00, 0x40, 0xBF, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE3, 0xB8, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0x02, ++0x6E, 0x5F, 0x90, 0x01, 0xE4, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x22, 0x90, 0x01, 0x94, ++0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x84, 0xA1, 0x74, 0x02, 0xF0, ++0xA3, 0x74, 0x10, 0xF0, 0x90, 0x84, 0xA7, 0x74, 0x80, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0x90, ++0x89, 0x16, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4, ++0x90, 0x89, 0x18, 0xF0, 0x90, 0x89, 0x16, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x01, 0x9A, 0xE0, ++0x54, 0xC0, 0x44, 0x0B, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0x90, 0x01, 0x98, 0xE0, ++0x54, 0xC0, 0x7F, 0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01, 0x22, 0x75, 0x52, 0x06, 0x75, 0x53, 0x01, ++0x75, 0x54, 0x03, 0x75, 0x55, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x52, 0xF0, 0xA3, 0xE5, 0x53, 0xF0, ++0xA3, 0xE5, 0x54, 0xF0, 0xA3, 0xE5, 0x55, 0xF0, 0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, ++0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0x90, 0x01, ++0x99, 0xE0, 0x44, 0xC0, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x80, 0xF0, 0x22, 0x75, 0x48, 0x12, 0xE4, ++0xF5, 0x49, 0x75, 0x4A, 0x87, 0x75, 0x4B, 0x33, 0xF5, 0x50, 0x90, 0x01, 0x30, 0xE5, 0x48, 0xF0, ++0xA3, 0xE5, 0x49, 0xF0, 0xA3, 0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, 0xF0, 0x90, 0x01, 0x20, 0xE5, ++0x50, 0xF0, 0x22, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0x90, 0x89, 0x1B, 0x12, 0x87, 0x03, 0x7B, ++0xFF, 0x7A, 0x82, 0x79, 0x00, 0x90, 0x89, 0x1E, 0x12, 0x87, 0x03, 0x7A, 0x82, 0x79, 0x3F, 0x90, ++0x89, 0x21, 0x12, 0x87, 0x03, 0x7A, 0x82, 0x79, 0xE1, 0x90, 0x89, 0x27, 0x12, 0x87, 0x03, 0x7A, ++0x82, 0x79, 0xF5, 0x90, 0x89, 0x2A, 0x12, 0x87, 0x03, 0x7A, 0x83, 0x79, 0x1D, 0x90, 0x89, 0x2D, ++0x12, 0x87, 0x03, 0x7A, 0x83, 0x79, 0x31, 0x90, 0x89, 0x33, 0x12, 0x87, 0x03, 0x7A, 0x83, 0x79, ++0x59, 0x90, 0x89, 0x36, 0x12, 0x87, 0x03, 0x7A, 0x83, 0x79, 0x81, 0x90, 0x89, 0x39, 0x12, 0x87, ++0x03, 0xE4, 0x90, 0x93, 0x5F, 0xF0, 0x90, 0x92, 0x29, 0xF0, 0x90, 0x92, 0x29, 0xE0, 0xFF, 0xC3, ++0x94, 0x05, 0x50, 0x10, 0x74, 0x70, 0x2F, 0x12, 0x9F, 0xBD, 0xE4, 0xF0, 0x90, 0x92, 0x29, 0xE0, ++0x04, 0xF0, 0x80, 0xE6, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0xA5, 0xF0, 0x74, 0xB6, 0xA3, ++0xF0, 0x90, 0x93, 0x10, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, ++0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, ++0x0D, 0x80, 0xDE, 0x7F, 0x01, 0x22, 0xE4, 0x90, 0x92, 0x2B, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, ++0x92, 0x2B, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xD6, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xB6, 0xA3, 0xF0, ++0x12, 0x7C, 0x66, 0xBF, 0x01, 0x03, 0x12, 0x5B, 0x25, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0F, 0x90, ++0x85, 0xC8, 0xE0, 0xFF, 0x90, 0x85, 0xC7, 0xE0, 0x6F, 0x60, 0x03, 0x12, 0xA8, 0xDE, 0xC2, 0xAF, ++0xD1, 0xA5, 0xBF, 0x01, 0x02, 0xF1, 0x3D, 0xD2, 0xAF, 0x12, 0xB8, 0x53, 0x90, 0x92, 0x2C, 0x12, ++0x97, 0xE7, 0x54, 0x7F, 0x45, 0xF0, 0x70, 0x0D, 0x7F, 0xFF, 0x12, 0x7B, 0x51, 0xEF, 0x04, 0xFD, ++0x7F, 0xFF, 0x12, 0x7B, 0x3E, 0x12, 0x8F, 0xF5, 0x12, 0x84, 0x4D, 0x80, 0xA2, 0x90, 0x85, 0xC1, ++0xE0, 0x30, 0xE0, 0x02, 0xF1, 0x47, 0x22, 0x90, 0x85, 0xC8, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, ++0x0E, 0x12, 0xBF, 0x97, 0xBF, 0x01, 0x08, 0xF1, 0x60, 0x90, 0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xB8, 0xEB, 0xF1, 0x71, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xF1, 0x95, 0x7F, 0x08, 0x12, 0x7B, 0x51, 0xEF, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x7B, ++0x3E, 0xE4, 0xFF, 0x12, 0xB9, 0x42, 0x7D, 0x35, 0x7F, 0x27, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xC2, ++0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x01, 0xC4, 0x74, 0x95, 0xF0, 0x74, 0xB7, 0xA3, 0xF0, 0x7F, ++0x90, 0x12, 0x7B, 0x51, 0xEF, 0x20, 0xE0, 0xF7, 0x74, 0x95, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, ++0xB7, 0xA3, 0xF0, 0x22, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xB5, 0xF0, 0x74, 0xB7, 0xA3, 0xF0, 0x12, 0x6C, 0xBC, 0x74, ++0xB5, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xB7, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, ++0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, ++0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x32, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, ++0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x06, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0xB8, 0xFF, 0xA3, ++0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0xE4, 0xFF, 0x12, 0x77, 0x39, 0xBF, 0x01, 0x13, 0x90, ++0x85, 0xC5, 0xE0, 0x60, 0x0D, 0x12, 0x8F, 0xE4, 0x64, 0x02, 0x60, 0x03, 0x02, 0x77, 0x61, 0x12, ++0x79, 0x41, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x19, 0xE0, 0x60, 0x25, ++0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70, 0x61, 0x11, 0xAB, 0xEF, 0x44, 0xFE, 0xFF, 0xEE, 0x44, 0x03, ++0xFE, 0xED, 0x44, 0x04, 0xFD, 0xEC, 0x11, 0xAB, 0x90, 0x91, 0x66, 0x12, 0x04, 0xEB, 0x7F, 0x54, ++0x7E, 0x09, 0x12, 0x71, 0x18, 0x90, 0x93, 0x14, 0xE0, 0x70, 0x04, 0x90, 0x07, 0xCC, 0xF0, 0x90, ++0x93, 0x1C, 0xE0, 0x70, 0x0A, 0x90, 0x93, 0x19, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0x07, 0x90, ++0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x92, 0x2E, 0x12, 0x04, ++0xEB, 0x90, 0x92, 0x2E, 0x02, 0x86, 0xE2, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x02, ++0x12, 0x7B, 0x51, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x00, 0x74, ++0x3F, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0x90, 0x01, 0x01, 0xE0, 0x54, 0xFD, 0xF0, 0x90, ++0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0x44, ++0x10, 0xF0, 0x90, 0x85, 0xD0, 0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xC6, 0xE0, ++0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, ++0x2F, 0x74, 0x90, 0xF0, 0x7F, 0x08, 0x12, 0x7B, 0x51, 0xEF, 0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, ++0x7B, 0x3E, 0x7F, 0x01, 0x31, 0x42, 0x7D, 0x34, 0x7F, 0x27, 0x12, 0x7B, 0x3E, 0x7F, 0x90, 0x12, ++0x7B, 0x51, 0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x90, 0x12, 0x7B, 0x3E, 0x7F, 0x14, 0x7E, 0x00, 0x02, ++0x7C, 0x9F, 0x90, 0x93, 0x99, 0xEF, 0x12, 0x99, 0x00, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, ++0xE7, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x99, 0xE0, 0x6F, 0x60, 0x3A, 0xC3, 0x90, 0x93, 0x9B, 0xE0, ++0x94, 0x88, 0x90, 0x93, 0x9A, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, ++0xF0, 0x22, 0x90, 0x93, 0x9A, 0x12, 0x97, 0xE7, 0x7F, 0x14, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0xD3, ++0x90, 0x93, 0x9B, 0xE0, 0x94, 0x32, 0x90, 0x93, 0x9A, 0xE0, 0x94, 0x00, 0x40, 0xBB, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE0, 0xB4, 0x22, 0xED, 0x30, 0xE0, 0x26, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, ++0x44, 0x31, 0xE7, 0xEF, 0x90, 0x89, 0x46, 0x31, 0xE7, 0xEF, 0x90, 0x89, 0x48, 0x31, 0xE7, 0xEF, ++0x90, 0x89, 0x4A, 0x31, 0xE7, 0xEF, 0x90, 0x89, 0x4C, 0x12, 0x05, 0x28, 0xE4, 0xF0, 0xA3, 0xF0, ++0xED, 0x30, 0xE1, 0x0A, 0x75, 0xF0, 0x12, 0xEF, 0x51, 0x10, 0xE4, 0xF0, 0xA3, 0xF0, 0xED, 0x30, ++0xE2, 0x08, 0x75, 0xF0, 0x12, 0xEF, 0x51, 0x05, 0xE4, 0xF0, 0x31, 0xF2, 0xE0, 0x54, 0xBF, 0x44, ++0x80, 0xFE, 0x31, 0xF2, 0xEE, 0xF0, 0x22, 0x12, 0x05, 0x28, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, ++0x12, 0x22, 0xEF, 0xC4, 0x54, 0xF0, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, ++0x75, 0xF0, 0x12, 0xE5, 0x62, 0x90, 0x89, 0x42, 0x02, 0x05, 0x28, 0x75, 0xF0, 0x12, 0xE5, 0x62, ++0x90, 0x89, 0x40, 0x02, 0x05, 0x28, 0x90, 0x92, 0x3F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, ++0xF0, 0xEB, 0x75, 0xF0, 0x06, 0xA4, 0xFF, 0x90, 0x89, 0x21, 0x12, 0x86, 0xFA, 0xE9, 0x2F, 0xF9, ++0xEA, 0x35, 0xF0, 0xFA, 0x90, 0x92, 0x47, 0x12, 0x87, 0x03, 0x90, 0x92, 0x41, 0xE0, 0x71, 0x20, ++0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x92, 0x44, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, ++0x92, 0x47, 0x12, 0x86, 0xFA, 0x90, 0x92, 0x46, 0xE0, 0xFF, 0xF5, 0x82, 0x12, 0xA6, 0x83, 0xFD, ++0x7C, 0x00, 0x90, 0x92, 0x41, 0xE0, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x44, 0x12, 0x05, 0x28, 0x75, ++0xF0, 0x02, 0xEF, 0x12, 0x05, 0x28, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x92, 0x43, 0xE0, 0xFB, ++0xEF, 0xA8, 0x03, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x12, 0x03, ++0x70, 0x90, 0x92, 0x44, 0xEE, 0x8F, 0xF0, 0x12, 0x07, 0x0A, 0x90, 0x92, 0x46, 0xE0, 0x04, 0xF0, ++0xE0, 0xB4, 0x05, 0xAB, 0x90, 0x92, 0x47, 0x12, 0x86, 0xFA, 0x90, 0x00, 0x05, 0x12, 0x03, 0x0F, ++0xFD, 0x7C, 0x00, 0x90, 0x92, 0x43, 0xE0, 0xFF, 0x90, 0x92, 0x3F, 0xE0, 0xFE, 0xA3, 0xE0, 0xA8, ++0x07, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x12, 0x03, 0x70, 0x90, ++0x92, 0x44, 0x12, 0x9F, 0xED, 0x40, 0x08, 0xED, 0x9F, 0xFF, 0xEC, 0x9E, 0xFE, 0x80, 0x04, 0x7E, ++0x00, 0x7F, 0x00, 0x90, 0x92, 0x44, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x44, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x90, 0x92, 0x41, 0xE0, 0x80, 0x16, 0xE5, 0x71, 0x25, 0xE0, 0x24, 0xF5, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0xE5, 0x6E, 0x25, ++0xE0, 0x24, 0x7B, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, ++0x25, 0xE0, 0x24, 0x7B, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, 0xAC, 0x05, 0x90, 0x92, ++0x3F, 0xEF, 0xF0, 0xFD, 0xE0, 0xFF, 0x12, 0x8F, 0xA4, 0xE0, 0xF5, 0x6E, 0x54, 0x7F, 0xF5, 0x70, ++0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x3D, 0x12, 0x05, 0x28, 0xE0, 0xF9, 0x90, 0x92, 0x3F, 0xE0, ++0x12, 0x8F, 0xF7, 0xFE, 0xEF, 0x12, 0x8F, 0xBC, 0xE0, 0x54, 0x03, 0xF5, 0x6F, 0xE5, 0x70, 0x90, ++0x83, 0x1D, 0x93, 0xFB, 0xED, 0x71, 0x20, 0xE4, 0xF0, 0xA3, 0xEB, 0xF0, 0x12, 0x8A, 0x82, 0xC4, ++0x54, 0x03, 0x90, 0x92, 0x40, 0xF0, 0x74, 0xCC, 0x2D, 0x91, 0x0D, 0xE5, 0x70, 0xF0, 0x74, 0x4C, ++0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0xE5, 0x6F, 0xF0, 0xE5, 0x70, 0xD3, 0x9E, 0x40, ++0x06, 0x8E, 0x70, 0xAF, 0x06, 0x8F, 0x6E, 0x8C, 0x71, 0xE4, 0xFF, 0xEF, 0xC3, 0x95, 0x71, 0x50, ++0x2F, 0xE5, 0x6E, 0x30, 0xE7, 0x09, 0x85, 0x70, 0x6E, 0x1C, 0xEC, 0x70, 0x20, 0x80, 0x21, 0xE5, ++0x70, 0xD3, 0x99, 0x40, 0x14, 0xAD, 0x01, 0x90, 0x92, 0x3F, 0xE0, 0xFB, 0x90, 0x92, 0x44, 0xEC, ++0xF0, 0xAF, 0x70, 0x91, 0x15, 0x8F, 0x6E, 0x80, 0x07, 0x89, 0x6E, 0x80, 0x03, 0x0F, 0x80, 0xCB, ++0x90, 0x92, 0x3F, 0xE0, 0xFF, 0x90, 0x92, 0x45, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xE4, 0xF0, ++0xA3, 0xE5, 0x6E, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x6F, 0x12, 0x99, 0x00, 0x7B, 0x01, 0xFA, ++0x7D, 0x05, 0x7F, 0x08, 0x12, 0x9F, 0x21, 0x90, 0x92, 0x3F, 0xE0, 0xFF, 0x90, 0x91, 0x0B, 0xE5, ++0x6F, 0xF0, 0xE4, 0xFB, 0xAD, 0x6E, 0x02, 0x27, 0x3D, 0x74, 0xCC, 0x25, 0x6E, 0xF5, 0x82, 0xE4, ++0x34, 0x90, 0xF5, 0x83, 0x22, 0xE4, 0xF5, 0x73, 0xEF, 0x14, 0xF5, 0x72, 0xED, 0xFF, 0xE5, 0x72, ++0xF5, 0x82, 0x33, 0x95, 0xE0, 0xF5, 0x83, 0xC3, 0xE5, 0x82, 0x9F, 0x74, 0x80, 0xF8, 0x65, 0x83, ++0x98, 0x40, 0x51, 0xE5, 0x72, 0x78, 0x03, 0xA2, 0xE7, 0x13, 0xD8, 0xFB, 0xFF, 0x33, 0x95, 0xE0, ++0xFE, 0xEB, 0x91, 0x87, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE5, 0x83, 0x3E, 0xF5, 0x83, 0xE0, 0xF5, ++0x82, 0x75, 0x83, 0x00, 0xE5, 0x72, 0x12, 0xAF, 0x60, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0xFF, 0xEE, 0x55, 0x83, 0xFE, 0xEF, 0x55, 0x82, 0x4E, 0x60, 0x13, 0x85, 0x72, 0x74, ++0x05, 0x73, 0x90, 0x92, 0x44, 0xE0, 0x65, 0x73, 0x60, 0x0A, 0xE5, 0x74, 0xD3, 0x9D, 0x40, 0x04, ++0x15, 0x72, 0x80, 0x98, 0xAF, 0x74, 0x22, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, ++0x34, 0x82, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0xA1, 0xEF, ++0xF0, 0x12, 0x8F, 0xDC, 0x30, 0xE6, 0x40, 0x7F, 0x8D, 0x12, 0x7B, 0x51, 0xEF, 0x64, 0x01, 0x70, ++0x36, 0x90, 0x93, 0xA2, 0xF0, 0x90, 0x93, 0xA2, 0xE0, 0xFD, 0x90, 0x93, 0xA1, 0xE0, 0x12, 0x8F, ++0xA4, 0xE5, 0x82, 0x2D, 0x12, 0xAE, 0x17, 0xE0, 0xFB, 0xE4, 0xFF, 0x12, 0x8B, 0xB9, 0x90, 0x93, ++0xA2, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x10, 0x40, 0xDB, 0x12, 0x8F, 0xDC, 0x30, 0xE0, 0x07, ++0xE4, 0xFD, 0x7F, 0x8D, 0x12, 0x7B, 0x3E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0xCF, 0xE0, ++0x90, 0x92, 0xBB, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, ++0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, ++0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x75, 0xB6, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, ++0x7F, 0x03, 0x12, 0x7B, 0x3E, 0x80, 0xFE, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x93, 0x90, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x93, 0x8F, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, ++0x7B, 0x2A, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0x93, 0x8F, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x93, ++0x90, 0xE0, 0x60, 0x0E, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, ++0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, ++0xC0, 0xF0, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, ++0x90, 0x93, 0x92, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x18, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xEF, 0xF0, 0x74, 0x12, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0x01, ++0xFF, 0x90, 0x93, 0x91, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0xEF, 0x44, 0x02, 0x4E, 0xFF, 0xAE, ++0x05, 0x74, 0x12, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x11, 0x2E, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x74, 0x29, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x75, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0x12, 0x70, 0x61, 0x90, 0x93, 0x7F, 0x12, 0x04, 0xEB, 0x90, 0x93, 0x77, 0x12, 0x86, 0xE2, 0x12, ++0x04, 0xA7, 0x90, 0x93, 0x7F, 0x12, 0x86, 0xEE, 0x12, 0x86, 0xC8, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0x90, 0x93, 0x77, 0x12, 0x86, 0xE2, 0x90, 0x93, 0x7B, 0x12, 0x86, 0xEE, 0x12, ++0x86, 0xC8, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0xD5, 0x90, 0x93, 0x83, ++0x12, 0x04, 0xEB, 0x90, 0x93, 0x83, 0x12, 0x86, 0xE2, 0x90, 0x91, 0x66, 0x12, 0x04, 0xEB, 0x90, ++0x93, 0x75, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x71, 0x18, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, ++0x90, 0x92, 0xCE, 0xF0, 0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x51, 0x90, 0x92, 0xCD, 0xEF, 0xF0, ++0x7F, 0x83, 0x12, 0x7B, 0x51, 0xAE, 0x07, 0x90, 0x92, 0xCD, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, ++0xC3, 0x90, 0x92, 0xCF, 0xE0, 0x94, 0x64, 0x90, 0x92, 0xCE, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x92, 0xCD, 0xE0, 0xFF, 0x22, 0x90, 0x92, 0xCE, 0x12, ++0x97, 0xE7, 0x80, 0xC2, 0x90, 0x04, 0x24, 0xEF, 0xF0, 0x90, 0x04, 0x57, 0xF0, 0x22, 0x90, 0x92, ++0xEE, 0xE0, 0xFD, 0x7C, 0x00, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x03, 0x82, 0xED, 0x4C, ++0x70, 0x05, 0x90, 0x92, 0xFB, 0x80, 0x2A, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x05, 0x90, 0x92, 0xFC, ++0x80, 0x1F, 0xED, 0x64, 0x02, 0x4C, 0x70, 0x05, 0x90, 0x92, 0xFD, 0x80, 0x14, 0xED, 0x64, 0x03, ++0x4C, 0x70, 0x05, 0x90, 0x92, 0xFE, 0x80, 0x09, 0xED, 0x64, 0x04, 0x4C, 0x70, 0x0D, 0x90, 0x92, ++0xFF, 0xE0, 0xFF, 0xD1, 0x94, 0x90, 0x92, 0xEF, 0x12, 0x97, 0xE7, 0x22, 0x90, 0x93, 0x9C, 0x12, ++0x87, 0x03, 0x12, 0x71, 0x54, 0x90, 0x85, 0xC5, 0xE0, 0xFF, 0x12, 0x60, 0xD0, 0x90, 0x85, 0xC5, ++0xE0, 0x60, 0x16, 0x90, 0x93, 0x9C, 0x12, 0x8F, 0x0E, 0x54, 0x0F, 0xFF, 0x12, 0x8B, 0xEF, 0xFD, ++0x12, 0x6A, 0xB8, 0x12, 0xAF, 0xB5, 0x12, 0x51, 0x7D, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x12, 0x7A, 0x29, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0F, 0x01, 0x80, 0x56, 0x90, 0x85, ++0xC9, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, 0x02, 0x80, 0x48, 0x90, 0x85, 0xC7, 0xE0, ++0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, 0x80, 0x39, 0xEF, 0x30, 0xE2, 0x05, 0x75, ++0x0F, 0x08, 0x80, 0x30, 0x90, 0x85, 0xC9, 0xE0, 0x30, 0xE4, 0x05, 0x75, 0x0F, 0x10, 0x80, 0x24, ++0x90, 0x85, 0xC2, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05, 0x75, 0x0F, 0x20, 0x80, 0x14, ++0x90, 0x86, 0x71, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, 0x80, 0x09, 0x90, 0x01, 0xB8, 0xE4, 0xF0, ++0x7F, 0x01, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0F, 0xF0, ++0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, ++0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, 0x75, 0x61, 0x01, 0x80, 0x28, 0x90, 0x02, 0x96, 0xE0, ++0x60, 0x05, 0x75, 0x61, 0x10, 0x80, 0x1D, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, ++0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x61, 0x04, 0x80, 0x08, 0x90, 0x01, 0xB8, 0xE4, ++0xF0, 0x7F, 0x01, 0x22, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x61, 0xF0, ++0x7F, 0x00, 0x22, 0xAC, 0x07, 0x90, 0x93, 0x1F, 0xE0, 0xF9, 0x30, 0xE0, 0x03, 0x02, 0xC0, 0x99, ++0x90, 0x85, 0xC1, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x85, 0xFB, 0xE0, 0x24, 0x04, 0x90, 0x85, 0xDA, ++0xF0, 0x90, 0x85, 0xFB, 0xE0, 0x24, 0x03, 0x90, 0x85, 0xD9, 0xF0, 0x80, 0x0D, 0x90, 0x85, 0xDA, ++0x74, 0x02, 0xF0, 0x90, 0x85, 0xD9, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x85, 0xD9, 0xE0, 0xFA, 0x90, ++0x85, 0xD8, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x85, 0xCD, 0xEB, 0xF0, 0x90, 0x85, 0xDA, 0xE0, ++0xC3, 0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x85, 0xCD, 0xF0, 0x90, 0x85, 0xD9, ++0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x85, 0xDD, 0xF0, 0x90, 0x85, 0xDA, 0xE0, 0xFF, 0x24, ++0x0A, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x85, 0xDD, 0x11, 0xA1, 0x98, 0x40, 0x04, 0xEF, 0x24, 0x0A, ++0xF0, 0x90, 0x85, 0xDD, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x85, 0xCD, 0x11, ++0xA1, 0x98, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x85, 0xDD, 0xE0, 0xFF, 0x7E, 0x00, 0x90, ++0x85, 0xD1, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, ++0x03, 0x12, 0xAF, 0x93, 0xE9, 0x54, 0xFD, 0x80, 0x03, 0xE9, 0x44, 0x02, 0x90, 0x93, 0x1F, 0xF0, ++0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x22, 0x90, 0x93, 0x59, 0x74, 0x04, ++0xF0, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, ++0xA3, 0xF0, 0x22, 0xE4, 0x90, 0x92, 0xBB, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x93, 0x28, 0x12, ++0x86, 0xE2, 0x90, 0x93, 0x24, 0x12, 0x86, 0xEE, 0xC3, 0x12, 0x04, 0xB4, 0x40, 0x4B, 0x90, 0x85, ++0xC1, 0xE0, 0x90, 0x93, 0x28, 0x30, 0xE0, 0x0F, 0x51, 0x3A, 0x90, 0x85, 0xFB, 0xE0, 0x24, 0x04, ++0x2F, 0xFF, 0x90, 0x93, 0x59, 0x80, 0x05, 0x51, 0x3A, 0x90, 0x93, 0x5A, 0xE0, 0xFE, 0xC3, 0xEF, ++0x9E, 0x90, 0x92, 0xBC, 0xF0, 0x90, 0x92, 0xBC, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x1A, 0x74, ++0x2C, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x90, 0x85, 0xDB, 0xE0, ++0x04, 0xF0, 0xE0, 0xFD, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xDB, 0xE0, 0xFF, 0xD3, 0x90, ++0x93, 0x5C, 0xE0, 0x9F, 0x90, 0x93, 0x5B, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x41, 0x17, 0x51, 0x18, ++0x90, 0x92, 0xBB, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x1C, 0x51, 0x22, 0x90, 0x92, 0xBD, 0xE0, ++0xD3, 0x9F, 0x40, 0x0A, 0x90, 0x92, 0xBB, 0xE0, 0x90, 0x92, 0xBE, 0xF0, 0x80, 0x08, 0x90, 0x92, ++0xBB, 0xE0, 0x04, 0xF0, 0x80, 0xDA, 0x51, 0x18, 0x90, 0x92, 0xBB, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, ++0x50, 0x2C, 0x51, 0x22, 0xC3, 0x90, 0x93, 0x5C, 0xE0, 0x9F, 0xFF, 0x90, 0x93, 0x5B, 0xE0, 0x94, ++0x00, 0xFE, 0x90, 0x92, 0xBD, 0xE0, 0xD3, 0x9F, 0xE4, 0x9E, 0x40, 0x0A, 0x90, 0x92, 0xBB, 0xE0, ++0x90, 0x92, 0xBF, 0xF0, 0x80, 0x08, 0x90, 0x92, 0xBB, 0xE0, 0x04, 0xF0, 0x80, 0xCA, 0x90, 0x92, ++0xBE, 0xE0, 0x90, 0x85, 0xE0, 0xF0, 0x90, 0x92, 0xBF, 0xE0, 0x90, 0x85, 0xE1, 0xF0, 0x90, 0x85, ++0xE0, 0xE0, 0xFF, 0xC3, 0x94, 0x0A, 0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, 0x85, 0xD8, 0xF0, 0xE4, ++0x80, 0x0E, 0xE4, 0x90, 0x85, 0xD8, 0xF0, 0x90, 0x85, 0xE0, 0xE0, 0xFF, 0xC3, 0x74, 0x0A, 0x9F, ++0x90, 0x85, 0xD7, 0xF0, 0x90, 0x85, 0xE0, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x85, 0xDE, ++0xF0, 0x90, 0x85, 0xC1, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x93, 0x59, 0x80, 0x03, 0x90, 0x93, 0x5A, ++0xE0, 0xFF, 0x90, 0x85, 0xDE, 0xE0, 0x2F, 0x04, 0xF0, 0x90, 0x85, 0xDE, 0xE0, 0xC3, 0x94, 0x0A, ++0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x85, 0xDE, 0xE0, 0x24, 0x02, 0xF0, 0x12, 0xAF, 0xB5, 0x12, ++0x51, 0x7D, 0xE4, 0xFF, 0x12, 0x69, 0x33, 0x22, 0xE4, 0x90, 0x92, 0xBD, 0xF0, 0x90, 0x92, 0xBB, ++0xF0, 0x22, 0x74, 0x2C, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x92, ++0xBD, 0xE0, 0x2F, 0xF0, 0x90, 0x93, 0x5D, 0xE0, 0xFF, 0x22, 0x12, 0x86, 0xEE, 0x90, 0x93, 0x24, ++0x12, 0x86, 0xE2, 0x12, 0x86, 0xBA, 0x78, 0x0A, 0x12, 0x04, 0xC5, 0x90, 0x85, 0xDD, 0xE0, 0xFE, ++0xC3, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x22, 0x12, 0xAF, 0x89, 0xD3, 0x9F, 0x40, 0x2B, 0x90, 0x85, ++0xDF, 0xE0, 0x04, 0xF0, 0x90, 0x93, 0x5E, 0xE0, 0xFF, 0x90, 0x85, 0xDF, 0xE0, 0xD3, 0x9F, 0x50, ++0x18, 0x90, 0x85, 0xD7, 0xE0, 0x04, 0x12, 0x93, 0x0A, 0x90, 0x85, 0xDE, 0xF0, 0xFB, 0x90, 0x85, ++0xD7, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x51, 0x7D, 0x22, 0xE4, 0xFE, 0x74, 0x2C, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xEF, 0xE4, 0x90, 0x85, ++0xDC, 0xF0, 0x90, 0x85, 0xDB, 0xF0, 0x90, 0x85, 0xDF, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, ++0x2D, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x01, 0x70, 0x22, 0x12, 0x8F, ++0xE4, 0x60, 0x10, 0xE4, 0xFD, 0x7F, 0x0C, 0x12, 0x8D, 0x4D, 0xE4, 0xFD, 0xFF, 0x12, 0x90, 0xE9, ++0x02, 0x6B, 0x98, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x8D, 0x4D, ++0x22, 0x90, 0x93, 0x09, 0xE0, 0x30, 0xE0, 0x34, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x2D, 0x90, ++0x93, 0xA7, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0xC8, 0x40, 0x21, 0x90, 0x93, 0x09, 0xE0, 0x44, ++0x20, 0xF0, 0xE4, 0x90, 0x93, 0xA7, 0xF0, 0x90, 0x93, 0x09, 0xE0, 0x13, 0x30, 0xE0, 0x0D, 0x90, ++0x85, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x85, 0xD0, 0x74, 0xD0, 0xF0, 0x22, 0x90, 0x92, 0xE0, ++0xEF, 0xF0, 0x90, 0x84, 0xC5, 0xE0, 0xB4, 0x02, 0x12, 0x90, 0x92, 0xE0, 0xE0, 0xFF, 0x64, 0x01, ++0x60, 0x25, 0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80, 0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, ++0xF0, 0x7F, 0x64, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, ++0x92, 0xE0, 0xE0, 0xFF, 0x12, 0x2A, 0x87, 0x22, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE4, 0x93, 0xFF, 0x74, 0x01, 0x93, 0x90, 0x92, 0x47, 0xCF, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x45, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0x74, 0xFF, 0x9F, ++0xFF, 0x74, 0xFF, 0x9E, 0xFE, 0xE5, 0x62, 0x25, 0xE0, 0x22, 0x35, 0xF0, 0xFE, 0x90, 0x00, 0x06, ++0x12, 0x04, 0x18, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0x22, 0x90, 0x92, 0x33, 0x12, 0x86, 0xFA, 0x90, ++0x00, 0x08, 0x02, 0x04, 0x18, 0xE5, 0x66, 0xF0, 0xA3, 0xE5, 0x67, 0xF0, 0xE5, 0x64, 0x90, 0x83, ++0x1D, 0x93, 0xFF, 0x22, 0xE0, 0xFF, 0x90, 0x92, 0x4B, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xE0, ++0xFE, 0xA3, 0xE0, 0xFF, 0xED, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0x22, 0x90, 0x92, 0x33, 0x12, 0x86, ++0xFA, 0x90, 0x00, 0x02, 0x12, 0x04, 0x18, 0xFF, 0x22, 0xE0, 0x54, 0x03, 0x90, 0x91, 0x0B, 0xF0, ++0x7B, 0x01, 0xAF, 0x78, 0x02, 0x27, 0x3D, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, 0xE4, ++0x34, 0x82, 0xF5, 0x83, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x85, 0xC7, 0xE0, 0x90, 0x01, ++0xBB, 0x22, 0x90, 0x00, 0x06, 0x02, 0x04, 0x18, 0x90, 0x92, 0x49, 0xE4, 0xF0, 0xA3, 0x22, 0x90, ++0x92, 0x47, 0xE4, 0xF0, 0xA3, 0x22, 0xE5, 0x62, 0x25, 0xE0, 0x24, 0x8C, 0xF5, 0x82, 0xE4, 0x22, ++0x90, 0x92, 0x33, 0x12, 0x86, 0xFA, 0x02, 0x03, 0xED, 0x74, 0xBC, 0x25, 0x62, 0xF5, 0x82, 0xE4, ++0x34, 0x8F, 0x22, 0x00, 0x31, 0x70, ++}; ++u4Byte ArrayLength_MP_8188F_FW_AP = 17494; ++ ++ ++void ++ODM_ReadFirmware_MP_8188F_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188F_FW_AP; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188F_FW_AP, ArrayLength_MP_8188F_FW_AP); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188F_FW_AP; ++} ++ ++ ++#endif /* #if (defined(CONFIG_AP_WOWLAN)||(DM_ODM_SUPPORT_TYPE & (ODM_AP)) */ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++ ++u1Byte Array_MP_8188F_FW_NIC[] = { ++0xF1, 0x88, 0x10, 0x00, 0x01, 0x00, 0x07, 0x00, 0x10, 0x22, 0x17, 0x28, 0x52, 0x49, 0x02, 0x00, ++0xE7, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x86, 0xAD, 0x02, 0xBC, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xA5, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xBC, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xBC, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xA4, 0x3F, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xBC, 0xB4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x87, 0xBB, 0x02, 0x89, 0x07, 0x02, 0x80, 0x86, 0x02, 0x80, 0x89, 0x02, 0x80, 0x8C, 0x02, ++0x9A, 0x4C, 0x02, 0xA3, 0x4F, 0x02, 0x80, 0x95, 0x02, 0x80, 0x98, 0x02, 0x80, 0x9B, 0x02, 0x80, ++0x9E, 0x02, 0x80, 0xA1, 0x02, 0x80, 0xA4, 0x02, 0x80, 0xA7, 0x02, 0x80, 0xAA, 0x02, 0x80, 0xAD, ++0x02, 0x80, 0xB0, 0x02, 0x89, 0xDD, 0x02, 0x80, 0xB6, 0x02, 0x80, 0xB9, 0x02, 0xB8, 0x4E, 0x02, ++0xB9, 0x2B, 0x02, 0xB8, 0xB0, 0x02, 0xB6, 0xEC, 0x02, 0xAF, 0xE5, 0x02, 0xB7, 0xE5, 0x02, 0x80, ++0xCE, 0x02, 0x80, 0xD1, 0x02, 0xC6, 0x3E, 0x02, 0x80, 0xD7, 0x00, 0x00, 0x00, 0x02, 0x80, 0xDD, ++0x02, 0x80, 0xE0, 0x02, 0x80, 0xE3, 0x02, 0x80, 0xE6, 0x02, 0xC5, 0xEC, 0x02, 0x80, 0xEC, 0x02, ++0x80, 0xEF, 0x02, 0x80, 0xF2, 0x02, 0x80, 0xF5, 0x02, 0x80, 0xF8, 0x02, 0x80, 0xFB, 0x02, 0x80, ++0xFE, 0x02, 0x81, 0x01, 0x02, 0x81, 0x04, 0x02, 0x81, 0x07, 0x02, 0x81, 0x0A, 0x02, 0x81, 0x0D, ++0x02, 0x81, 0x10, 0x02, 0x81, 0x13, 0x02, 0x81, 0x16, 0x02, 0x81, 0x19, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x02, 0xAE, 0x52, 0x02, 0xC0, 0x1A, 0x02, 0x90, 0xE6, 0x02, 0x90, 0xDB, ++0x02, 0x81, 0x40, 0x02, 0x9B, 0xAC, 0x02, 0xBB, 0x71, 0x02, 0x81, 0x49, 0x02, 0x81, 0x4C, 0x02, ++0x81, 0x4F, 0x02, 0x81, 0x52, 0x02, 0x81, 0x55, 0x02, 0x81, 0x58, 0x02, 0x81, 0x5B, 0x02, 0x91, ++0x44, 0x02, 0x81, 0x61, 0x02, 0x81, 0x64, 0x02, 0xC4, 0xD3, 0x02, 0xC5, 0xBB, 0x02, 0xBF, 0x30, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, ++0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, ++0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, ++0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, ++0x08, 0x03, 0x03, 0x00, 0x04, 0x09, 0x07, 0x03, 0x03, 0x00, 0x04, 0x08, 0x06, 0x03, 0x02, 0x00, ++0x04, 0x08, 0x05, 0x03, 0x01, 0x00, 0x04, 0x0D, 0x0A, 0x07, 0x05, 0x00, 0x08, 0x0C, 0x0A, 0x07, ++0x04, 0x00, 0x08, 0x0B, 0x0A, 0x06, 0x05, 0x00, 0x08, 0x0B, 0x0A, 0x05, 0x03, 0x00, 0x08, 0x0B, ++0x0A, 0x03, 0x02, 0x00, 0x08, 0x14, 0x12, 0x0C, 0x04, 0x00, 0x10, 0x14, 0x12, 0x09, 0x04, 0x00, ++0x10, 0x24, 0x22, 0x1C, 0x12, 0x00, 0x20, 0x24, 0x22, 0x18, 0x0C, 0x00, 0x20, 0x24, 0x22, 0x14, ++0x06, 0x00, 0x20, 0x24, 0x22, 0x0F, 0x04, 0x00, 0x20, 0x24, 0x21, 0x0A, 0x04, 0x00, 0x20, 0x23, ++0x21, 0x0C, 0x04, 0x00, 0x20, 0x23, 0x1F, 0x0A, 0x04, 0x00, 0x20, 0x22, 0x1F, 0x0F, 0x04, 0x00, ++0x20, 0x21, 0x1F, 0x16, 0x0C, 0x00, 0x20, 0x31, 0x2F, 0x20, 0x14, 0x00, 0x30, 0x31, 0x2F, 0x18, ++0x10, 0x00, 0x30, 0x31, 0x2C, 0x18, 0x0C, 0x00, 0x30, 0x31, 0x2A, 0x14, 0x0C, 0x00, 0x30, 0x31, ++0x28, 0x14, 0x00, 0x00, 0x30, 0x31, 0x24, 0x14, 0x00, 0x00, 0x30, 0x31, 0x1E, 0x14, 0x00, 0x00, ++0x30, 0x02, 0x02, 0x03, 0x04, 0x04, 0x08, 0x09, 0x09, 0x0C, 0x0E, 0x10, 0x12, 0x02, 0x09, 0x0B, ++0x0E, 0x0D, 0x0F, 0x10, 0x12, 0x00, 0x04, 0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x23, 0x00, ++0x2D, 0x00, 0x50, 0x00, 0x91, 0x00, 0xC3, 0x01, 0x27, 0x01, 0x31, 0x01, 0x5E, 0x00, 0x8C, 0x00, ++0xC8, 0x00, 0xDC, 0x01, 0x5E, 0x01, 0x68, 0x01, 0x9A, 0x01, 0xCC, 0x01, 0xEA, 0x02, 0x02, 0x04, ++0x08, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6C, 0x14, 0x28, 0x32, 0x50, 0x78, 0xA0, 0xC8, ++0xE6, 0x01, 0x01, 0x01, 0x02, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x02, 0x04, 0x06, ++0x07, 0x07, 0x08, 0x08, 0x08, 0x01, 0x01, 0x01, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x02, 0x03, 0x03, 0x04, 0x05, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x03, 0x03, 0x03, ++0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ++0x02, 0x19, 0x06, 0x04, 0x02, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x84, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x87, 0xB5, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x87, 0xB5, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x84, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x84, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x32, 0x50, 0x30, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x27, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x25, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x14, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x15, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0xD2, 0xA9, 0x02, 0x84, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, ++0xC2, 0xAF, 0x56, 0xC6, 0xD2, 0xAF, 0xD2, 0xA9, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0x02, 0x86, 0xEB, ++0x02, 0x84, 0xDD, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, 0xF2, ++0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, ++0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, ++0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x87, 0xA8, 0xE4, 0x7E, ++0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, ++0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, 0xA3, ++0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, ++0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0xBE, ++0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xFE, 0xED, 0x99, 0xFD, 0xEC, 0x98, 0xFC, 0x22, 0xEF, 0x5B, ++0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, 0xEC, 0x58, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, ++0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x22, 0xE0, 0xF8, 0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, ++0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, ++0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, ++0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, ++0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0x41, 0x93, 0x22, 0x00, 0x41, 0x93, 0x23, 0x00, ++0x41, 0x93, 0x28, 0x00, 0x00, 0xA9, 0x6A, 0xBA, 0x06, 0xBB, 0xFE, 0x90, 0x93, 0x26, 0xEF, 0xF0, ++0x7F, 0x02, 0xD1, 0x27, 0x90, 0x84, 0xC1, 0xE0, 0xFF, 0x90, 0x93, 0x26, 0xE0, 0xFE, 0xEF, 0x4E, ++0x90, 0x84, 0xC1, 0xF0, 0x22, 0x90, 0x92, 0x07, 0x74, 0x10, 0xF0, 0x90, 0x92, 0x15, 0x74, 0x07, ++0xF0, 0x12, 0x02, 0xF6, 0x90, 0x92, 0x09, 0xF1, 0xEB, 0x80, 0xD0, 0xF0, 0x7B, 0x01, 0x7A, 0x92, ++0x79, 0x07, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x5B, 0x12, 0x02, ++0xF6, 0x25, 0x5B, 0x90, 0x84, 0xC6, 0xB1, 0x90, 0x25, 0x5B, 0x90, 0x84, 0xC7, 0x91, 0xA7, 0x25, ++0x5B, 0x90, 0x84, 0xC8, 0xF1, 0xE1, 0x25, 0x5B, 0x90, 0x84, 0xC9, 0xF0, 0x90, 0x00, 0x04, 0x12, ++0x03, 0x0F, 0x25, 0x5B, 0x90, 0x84, 0xCA, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x03, 0x0F, 0x25, 0x5B, ++0x90, 0x84, 0xCB, 0xF0, 0x11, 0x3D, 0x25, 0x5B, 0x90, 0x84, 0xCC, 0xF0, 0x22, 0x90, 0x00, 0x06, ++0x02, 0x03, 0x0F, 0x12, 0xC8, 0xEE, 0xFF, 0x54, 0x7F, 0x90, 0x85, 0xC5, 0xF0, 0xEF, 0xB1, 0x9B, ++0xA3, 0xB1, 0x90, 0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0x85, 0xC3, 0xE0, 0x54, 0xF0, ++0x4F, 0xF1, 0xE1, 0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xFD, 0x4F, ++0xF0, 0xEC, 0x54, 0x02, 0x25, 0xE0, 0xFF, 0x90, 0x92, 0x96, 0xE0, 0x54, 0xFB, 0x4F, 0xF0, 0xED, ++0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x12, 0x9F, 0x13, 0x91, 0xA6, 0x90, 0x85, 0xC4, 0xF0, 0x11, ++0x3D, 0x30, 0xE0, 0x4E, 0xC3, 0x13, 0x54, 0x07, 0xFF, 0xC3, 0x94, 0x04, 0x90, 0x85, 0xD8, 0x50, ++0x04, 0xEF, 0xF0, 0x80, 0x26, 0x74, 0x03, 0xF0, 0x31, 0xD7, 0xE9, 0x24, 0x06, 0x12, 0xC9, 0x31, ++0xFF, 0x74, 0x03, 0x24, 0xFD, 0xFE, 0xEF, 0xC4, 0x54, 0x0F, 0xFD, 0xEF, 0x54, 0x0F, 0xFF, 0xED, ++0x2E, 0x54, 0x0F, 0xFE, 0xC4, 0x54, 0xF0, 0x4F, 0x12, 0x03, 0x3C, 0x31, 0xD7, 0x11, 0x3D, 0xC4, ++0x54, 0x0F, 0xFF, 0xC3, 0x94, 0x04, 0x90, 0x85, 0xCD, 0x50, 0x05, 0x74, 0x04, 0xF0, 0x80, 0x02, ++0xEF, 0xF0, 0x31, 0xD7, 0x90, 0x00, 0x04, 0x12, 0x03, 0x0F, 0xFD, 0x7F, 0x02, 0x12, 0x57, 0x82, ++0x31, 0xD7, 0x12, 0x71, 0xCB, 0x12, 0xA5, 0x40, 0xF0, 0x90, 0x85, 0xC5, 0x12, 0xC8, 0xC2, 0x12, ++0x9F, 0x12, 0x90, 0x01, 0xBE, 0xF0, 0x22, 0x90, 0x92, 0x04, 0x12, 0x87, 0x79, 0x90, 0x92, 0x03, ++0xEF, 0xF0, 0x12, 0x87, 0x82, 0x89, 0x5B, 0x00, 0x89, 0x60, 0x01, 0x89, 0x65, 0x03, 0x89, 0x6A, ++0x04, 0x89, 0x6F, 0x12, 0x89, 0x74, 0x14, 0x89, 0x79, 0x1C, 0x89, 0x7E, 0x20, 0x89, 0x82, 0x24, ++0x89, 0x87, 0x25, 0x89, 0x8C, 0x27, 0x89, 0x91, 0x40, 0x89, 0x95, 0x42, 0x89, 0xCA, 0x47, 0x89, ++0xCA, 0x49, 0x89, 0x9E, 0x80, 0x89, 0x9A, 0x81, 0x89, 0xA2, 0x82, 0x89, 0xA7, 0x83, 0x89, 0xAC, ++0x84, 0x89, 0xB1, 0x88, 0x89, 0xB6, 0xC3, 0x00, 0x00, 0x89, 0xBB, 0x31, 0xCB, 0x02, 0x87, 0xF8, ++0x31, 0xCB, 0x02, 0x90, 0x00, 0x31, 0xCB, 0x02, 0x78, 0x94, 0x31, 0xCB, 0x02, 0x6B, 0x03, 0x31, ++0xCB, 0x02, 0x97, 0xFD, 0x31, 0xCB, 0x02, 0x98, 0xD4, 0x31, 0xCB, 0x02, 0x87, 0xD5, 0x31, 0xCB, ++0x01, 0x43, 0x31, 0xCB, 0x02, 0x98, 0xE3, 0x31, 0xCB, 0x02, 0x9F, 0xFB, 0x31, 0xCB, 0x02, 0xA0, ++0x03, 0x31, 0xCB, 0x80, 0x48, 0x31, 0xCB, 0x02, 0x4E, 0x29, 0x31, 0xCB, 0xA1, 0xAF, 0x31, 0xCB, ++0x81, 0xAE, 0x31, 0xCB, 0x02, 0x7A, 0xFE, 0x31, 0xCB, 0x02, 0x6F, 0x63, 0x31, 0xCB, 0x02, 0x6F, ++0xA4, 0x31, 0xCB, 0x02, 0x7B, 0xD0, 0x31, 0xCB, 0x02, 0xA7, 0xEE, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x01, 0xF0, 0x90, 0x92, 0x03, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90, 0x92, 0x04, 0x02, 0x87, ++0x70, 0x24, 0x03, 0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x92, 0x07, 0x02, 0x87, 0x70, 0x90, 0x92, 0x07, ++0x12, 0x87, 0x79, 0x31, 0xD7, 0x12, 0x02, 0xF6, 0x54, 0x7F, 0xFD, 0xB1, 0x91, 0xFE, 0x54, 0x1F, ++0x90, 0x92, 0x0B, 0xF0, 0xEE, 0x54, 0x80, 0xB1, 0x9B, 0x90, 0x92, 0x0A, 0x91, 0xA7, 0xFE, 0x54, ++0x03, 0xFC, 0xEE, 0x54, 0x30, 0xC4, 0x54, 0x0F, 0x90, 0x92, 0x0D, 0x91, 0xA7, 0xFE, 0x54, 0x40, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x92, 0x0C, 0xF0, 0xEE, 0x54, 0x80, 0xB1, 0x9B, 0xFF, 0x91, ++0xA8, 0xFB, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x90, 0x92, 0x0F, 0xF0, 0xFA, 0xEB, 0x54, ++0x04, 0x13, 0x13, 0x54, 0x3F, 0xA3, 0xF0, 0xEF, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, ++0x71, 0x3F, 0x54, 0x7F, 0x4F, 0xF0, 0x90, 0x92, 0x0C, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x54, ++0xC0, 0x71, 0x3F, 0x54, 0xBF, 0x4F, 0xF0, 0xEA, 0x60, 0x02, 0x61, 0x3E, 0x90, 0x92, 0x0B, 0xE0, ++0x54, 0x1F, 0xFF, 0x75, 0xF0, 0x12, 0xED, 0xB1, 0xA7, 0x54, 0xE0, 0x4F, 0xF0, 0xEC, 0x54, 0x03, ++0x71, 0x3F, 0x54, 0xFC, 0x4F, 0xF0, 0xEC, 0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0x71, 0x3F, 0x54, ++0xF3, 0x4F, 0xF0, 0x90, 0x92, 0x0A, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x75, 0xF0, ++0x12, 0xED, 0xB1, 0xA7, 0x54, 0xDF, 0x4F, 0xF0, 0x90, 0x92, 0x0D, 0xE0, 0x54, 0x03, 0xC4, 0x54, ++0xF0, 0x71, 0x3F, 0x54, 0xCF, 0x4F, 0x12, 0xC8, 0xCF, 0xE0, 0x54, 0xFB, 0x12, 0xC8, 0xCF, 0xC0, ++0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x92, 0x10, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0xEF, 0x4E, ++0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0x92, 0x90, 0xE0, 0x60, 0x30, 0x31, 0xD7, 0xE9, 0x24, 0x03, ++0x12, 0xC9, 0x31, 0x54, 0x1F, 0x12, 0x03, 0x3C, 0x90, 0x92, 0x0E, 0x74, 0x01, 0xF0, 0x90, 0x92, ++0x0E, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x13, 0xEF, 0x31, 0xD1, 0x8F, 0x82, 0x8E, 0x83, 0xE4, ++0x12, 0x03, 0x4E, 0x90, 0x92, 0x0E, 0xE0, 0x04, 0xF0, 0x80, 0xE3, 0x90, 0x92, 0x8E, 0xE0, 0x54, ++0x07, 0xFF, 0xBF, 0x05, 0x0A, 0xEC, 0xB4, 0x01, 0x06, 0x90, 0x92, 0x93, 0x74, 0x01, 0xF0, 0xE4, ++0x90, 0x92, 0x0E, 0xF0, 0x90, 0x92, 0x0E, 0xE0, 0xFC, 0x31, 0xD1, 0x8F, 0x82, 0x8E, 0x83, 0x12, ++0x03, 0x0F, 0xFF, 0xED, 0x12, 0xC8, 0x73, 0xE5, 0x82, 0x2C, 0x12, 0xA7, 0x33, 0xEF, 0xF0, 0x90, ++0x92, 0x0E, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x04, 0xDB, 0xAF, 0x05, 0x12, 0x17, 0x8E, 0x22, 0xFF, ++0x75, 0xF0, 0x12, 0xED, 0x90, 0x89, 0x3F, 0x12, 0x05, 0x28, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0xF1, 0x8B, 0x20, 0xE6, 0x02, 0x81, 0x6D, 0x90, 0x00, 0x8C, 0xE0, 0x90, 0x93, ++0x19, 0xF0, 0x7F, 0x8D, 0x12, 0x7B, 0x51, 0x90, 0x93, 0x1A, 0xEF, 0xF0, 0x90, 0x00, 0x8E, 0xE0, ++0x90, 0x93, 0x1B, 0xF0, 0x90, 0x93, 0x1A, 0xE0, 0x24, 0xFC, 0x60, 0x0F, 0x24, 0x03, 0x60, 0x02, ++0x81, 0x66, 0x90, 0x93, 0x19, 0xE0, 0xFF, 0xF1, 0x92, 0x81, 0x66, 0x90, 0x93, 0x19, 0xE0, 0x24, ++0xDC, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFD, 0xFF, 0x91, 0x9F, 0x75, ++0xF0, 0x12, 0x71, 0x44, 0x13, 0x13, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0x91, 0x9F, 0x75, 0xF0, ++0x12, 0x71, 0x44, 0xB1, 0x9B, 0xFB, 0x0D, 0xE4, 0xFF, 0x91, 0x9F, 0x75, 0xF0, 0x12, 0x71, 0x44, ++0xC4, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0x91, 0x9F, 0x12, 0xC8, 0x8D, 0xFB, 0xE4, 0xFD, 0x0F, ++0x91, 0x9F, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x3D, 0x12, 0x05, 0x28, 0x91, 0x9C, 0x75, 0xF0, 0x12, ++0xB1, 0xA7, 0xC4, 0x13, 0x54, 0x01, 0xFB, 0x0D, 0x7F, 0x01, 0x91, 0x9F, 0x75, 0xF0, 0x12, 0xB1, ++0xA7, 0x54, 0x1F, 0x91, 0x9D, 0x12, 0xC8, 0x73, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x91, 0x9F, 0x75, ++0xF0, 0x08, 0xA4, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x91, 0x9A, 0x75, 0xF0, 0x08, 0xA4, ++0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x91, 0x9A, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x03, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0x91, 0x9A, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x04, 0xF5, 0x82, 0xE4, 0x34, ++0x82, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x91, 0x9F, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x05, ++0xF5, 0x82, 0xE4, 0x34, 0x82, 0x91, 0x9A, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x06, 0xF5, 0x82, 0xE4, ++0x34, 0x82, 0x91, 0x9A, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x07, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, ++0x83, 0xE0, 0xFB, 0x0D, 0x91, 0x72, 0xF1, 0x8B, 0x30, 0xE0, 0x02, 0xF1, 0xF9, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x01, 0x04, 0x74, 0xF4, 0x80, ++0x0E, 0xEF, 0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4, 0x03, 0x0C, 0x74, 0xFC, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0xF5, 0x83, 0xE0, 0xFB, 0x0D, 0x91, ++0x72, 0x90, 0x93, 0x19, 0xE0, 0x22, 0x4F, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x03, 0x0F, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xC8, 0xEE, 0x20, 0xE0, 0x05, 0x12, 0xAD, 0xE9, 0xA1, 0x8A, ++0x31, 0xD7, 0x12, 0xA7, 0xCD, 0x90, 0x86, 0x75, 0xD1, 0x3B, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, ++0xF1, 0xE8, 0x12, 0xC9, 0x09, 0xD1, 0x49, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0xF1, 0xE8, 0x12, ++0xC9, 0x11, 0xD1, 0x49, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0xF1, 0xE8, 0x12, 0xC9, 0x19, 0xB1, ++0x90, 0x54, 0x80, 0xFF, 0x90, 0x86, 0x76, 0xE0, 0x54, 0x7F, 0x4F, 0xF0, 0x12, 0xC9, 0x21, 0x30, ++0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x04, 0xF0, 0x31, 0xD7, 0x12, 0x02, 0xF6, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x84, 0xC5, ++0xE0, 0xB4, 0x02, 0x05, 0xB1, 0x97, 0x20, 0xE0, 0x3E, 0xB1, 0x91, 0x54, 0x7F, 0xFF, 0x90, 0x86, ++0x76, 0xE0, 0x54, 0x80, 0x91, 0xA6, 0x90, 0x86, 0x77, 0xF1, 0xE1, 0xFF, 0x54, 0x01, 0xFE, 0x90, ++0x86, 0x78, 0x12, 0xA7, 0xC5, 0x54, 0xFE, 0xFF, 0xEE, 0x54, 0x01, 0x4F, 0xF0, 0x90, 0x86, 0x76, ++0xE0, 0x54, 0x7F, 0xFF, 0x90, 0x86, 0x75, 0xE0, 0xFE, 0xC4, 0x13, 0x54, 0x07, 0x7D, 0x00, 0x20, ++0xE0, 0x02, 0x7D, 0x01, 0x12, 0x54, 0x9F, 0x90, 0x84, 0xC5, 0xE0, 0xB4, 0x01, 0x07, 0x90, 0xFE, ++0x10, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x87, 0x4A, 0x74, 0x05, 0xF0, 0x7E, 0x00, 0x7F, 0x08, 0x7D, ++0x00, 0x7B, 0x01, 0x7A, 0x87, 0x79, 0x95, 0x12, 0x06, 0xDE, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x4F, ++0xF0, 0x90, 0x00, 0x01, 0x02, 0x03, 0x0F, 0x90, 0x86, 0x76, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, ++0x01, 0x22, 0x75, 0xF0, 0x12, 0xE5, 0x6E, 0x90, 0x89, 0x3E, 0x12, 0x05, 0x28, 0xE0, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xA7, 0xCD, 0x90, 0x86, 0x72, 0xD1, 0x3B, 0x54, 0x04, ++0xFD, 0xEF, 0x54, 0xFB, 0xF1, 0x83, 0x12, 0xC9, 0x09, 0xD1, 0x49, 0x54, 0x10, 0xFD, 0xEF, 0x54, ++0xEF, 0xF1, 0x83, 0x12, 0xC9, 0x11, 0xD1, 0x49, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0xF1, 0x83, ++0x12, 0xC9, 0x19, 0x91, 0xA7, 0x54, 0x01, 0xFF, 0x90, 0x86, 0x74, 0xE0, 0x54, 0xFE, 0xB1, 0x8F, ++0xFF, 0x54, 0x01, 0xFE, 0x90, 0x86, 0x73, 0x12, 0xA7, 0xC5, 0x54, 0x04, 0xFF, 0xEE, 0x54, 0xFB, ++0x4F, 0xF0, 0x90, 0x86, 0x72, 0xE0, 0xC3, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x7C, 0x72, 0xF1, 0xF0, ++0x54, 0x01, 0xFF, 0x12, 0x7C, 0x7E, 0xF1, 0xF0, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x66, 0xDA, 0x90, ++0x86, 0x72, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01, 0xFF, 0x12, 0xAD, 0x29, 0x90, 0x86, 0x72, 0xE0, ++0x54, 0x01, 0xFF, 0x12, 0xAB, 0xEF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, ++0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x12, 0x02, 0xF6, 0xFE, 0x22, ++0x8F, 0x6E, 0x8D, 0x6F, 0xEF, 0x12, 0x92, 0x71, 0xE0, 0xF5, 0x70, 0x54, 0x7F, 0xF5, 0x71, 0xE5, ++0x70, 0x54, 0x80, 0xF5, 0x73, 0x75, 0xF0, 0x12, 0xEF, 0x12, 0xC8, 0x90, 0xF5, 0x75, 0x75, 0xF0, ++0x12, 0xEF, 0x71, 0x44, 0xC4, 0x54, 0x03, 0xF5, 0x76, 0x12, 0xC8, 0x81, 0x74, 0xFF, 0xF0, 0x12, ++0xB2, 0x8E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, 0x70, 0x45, 0x73, 0xFF, 0x12, 0xB2, 0x82, 0xEF, ++0xF0, 0xE5, 0x6E, 0x12, 0x91, 0xD8, 0xE0, 0x54, 0x03, 0xF5, 0x74, 0x74, 0x4C, 0x25, 0x6E, 0x12, ++0xB7, 0xD3, 0xE5, 0x74, 0xF0, 0xE5, 0x71, 0x65, 0x75, 0x70, 0x41, 0xB1, 0xA2, 0xC4, 0x13, 0x54, ++0x07, 0x30, 0xE0, 0x0C, 0xE5, 0x73, 0x70, 0x08, 0xE5, 0x71, 0x44, 0x80, 0xF5, 0x70, 0xE1, 0x53, ++0x12, 0xB2, 0x8E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0xB2, 0xA2, 0x12, 0xC9, 0x00, 0x12, 0xB2, ++0x77, 0xE5, 0x6E, 0xF0, 0xE4, 0x90, 0x92, 0x43, 0x12, 0x96, 0xD2, 0x7B, 0x01, 0xFA, 0x7D, 0x02, ++0x7F, 0x04, 0x12, 0x97, 0x1A, 0x7D, 0x07, 0xAF, 0x6E, 0x02, 0xC0, 0xC9, 0xE5, 0x71, 0xC3, 0x95, ++0x75, 0x50, 0x58, 0xAB, 0x6E, 0xAD, 0x75, 0xAF, 0x71, 0x12, 0x72, 0xEA, 0x8F, 0x72, 0x85, 0x72, ++0x70, 0xB1, 0xA2, 0xC4, 0x13, 0x54, 0x01, 0xFF, 0x90, 0x92, 0x43, 0x12, 0xB2, 0x76, 0xE5, 0x72, ++0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x71, 0xF0, 0xE5, 0x73, 0xB1, 0x9B, 0x12, 0x97, 0xE3, 0xE4, ++0xFB, 0xFA, 0x12, 0xC9, 0x48, 0xE5, 0x71, 0xC3, 0x94, 0x0C, 0x40, 0x27, 0xB1, 0xA2, 0xC4, 0x13, ++0x54, 0x07, 0x30, 0xE0, 0x1E, 0xE5, 0x6F, 0x60, 0x1A, 0xE5, 0x73, 0x70, 0x16, 0xE5, 0x71, 0x44, ++0x80, 0xF5, 0x70, 0x12, 0xC8, 0x81, 0xE5, 0x72, 0xF0, 0x80, 0x08, 0x12, 0xB2, 0x82, 0xE5, 0x75, ++0xF0, 0xF5, 0x70, 0x12, 0xB2, 0x7B, 0xE5, 0x70, 0xF0, 0x12, 0xC8, 0x81, 0xE0, 0xFF, 0x12, 0xC8, ++0xE7, 0xEF, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x74, 0x12, 0xB7, 0xCB, 0xF0, 0x7B, 0x01, 0x7A, ++0x00, 0x12, 0xC9, 0x48, 0x90, 0x91, 0x0B, 0xE5, 0x74, 0xF0, 0xAB, 0x6F, 0xAD, 0x70, 0xAF, 0x6E, ++0x02, 0x27, 0x3D, 0x4D, 0xFF, 0x90, 0x86, 0x72, 0xF0, 0xEE, 0x22, 0x7F, 0x8F, 0x12, 0x7B, 0x51, ++0xEF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x24, 0xEF, 0xF0, 0xF1, 0x8B, ++0x30, 0xE6, 0x39, 0x7F, 0x8D, 0x12, 0x7B, 0x51, 0xEF, 0x64, 0x01, 0x70, 0x2F, 0x90, 0x93, 0x25, ++0xF0, 0x90, 0x93, 0x25, 0xE0, 0xFD, 0x90, 0x93, 0x24, 0xE0, 0x12, 0x92, 0x71, 0xE5, 0x82, 0x2D, ++0x12, 0xA7, 0x33, 0xE0, 0xFB, 0xE4, 0xFF, 0x91, 0x72, 0x90, 0x93, 0x25, 0xE0, 0x04, 0xF0, 0xE0, ++0xC3, 0x94, 0x10, 0x40, 0xDC, 0xF1, 0x8B, 0x30, 0xE0, 0x02, 0xF1, 0xF9, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x03, 0x0F, 0x4D, 0xFF, 0x90, 0x86, 0x75, 0xF0, 0xEE, 0x22, ++0x90, 0x86, 0x72, 0xE0, 0x13, 0x13, 0x22, 0x61, 0x4C, 0xE4, 0xFD, 0x7F, 0x8D, 0x02, 0x7B, 0x3E, ++0x8B, 0x5B, 0x8A, 0x5C, 0x89, 0x5D, 0x90, 0x92, 0x8A, 0xE0, 0x70, 0x0C, 0x12, 0xC9, 0x21, 0x30, ++0xE0, 0x06, 0x90, 0x92, 0x90, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x8C, 0xE0, 0x70, 0x0F, 0x31, 0xC1, ++0xC4, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x06, 0x90, 0x92, 0x91, 0x74, 0x01, 0xF0, 0xAB, 0x5B, 0xAA, ++0x5C, 0xA9, 0x5D, 0x12, 0x8D, 0x91, 0xFF, 0xF5, 0x5F, 0x12, 0x02, 0xF6, 0xFE, 0xC3, 0x13, 0x30, ++0xE0, 0x07, 0x12, 0x8C, 0xA8, 0xF5, 0x60, 0x80, 0x02, 0x8F, 0x60, 0x85, 0x5F, 0x5E, 0xE5, 0x5E, ++0xD3, 0x95, 0x60, 0x50, 0x28, 0x31, 0xC1, 0x54, 0x01, 0xFD, 0xAF, 0x5E, 0x12, 0x6E, 0x5F, 0xAF, ++0x5E, 0x12, 0x77, 0x39, 0xEF, 0xAF, 0x5E, 0x70, 0x04, 0x11, 0x98, 0x80, 0x02, 0xF1, 0xF9, 0x90, ++0x92, 0x91, 0xE0, 0x60, 0x04, 0xAF, 0x5E, 0x11, 0x98, 0x05, 0x5E, 0x80, 0xD1, 0xE5, 0x5F, 0x70, ++0x16, 0xFF, 0x12, 0x77, 0x39, 0xEF, 0x70, 0x0F, 0x12, 0xAE, 0x52, 0x12, 0x79, 0x61, 0x12, 0xA7, ++0xDD, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x92, 0x07, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x7D, 0x44, 0x7F, 0x6F, 0x11, 0xDB, 0x11, ++0xE6, 0x90, 0x92, 0x08, 0xE0, 0x90, 0x92, 0x07, 0xB4, 0x01, 0x09, 0xE0, 0x31, 0xD8, 0xE0, 0x44, ++0x04, 0xF0, 0x80, 0x07, 0xE0, 0x31, 0xD8, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0xFD, 0xFF, 0x11, 0xDB, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0xAE, 0x52, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, ++0x90, 0x92, 0x81, 0xED, 0xF0, 0x22, 0xE4, 0x90, 0x93, 0x16, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, ++0xE0, 0x90, 0x93, 0x18, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x11, 0xDB, 0x90, 0x05, 0xF8, 0xE0, 0x70, ++0x13, 0xA3, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0x31, 0xB9, 0x11, ++0xDB, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x93, 0x17, 0xE0, 0x94, 0xE8, 0x90, 0x93, 0x16, 0xE0, 0x94, ++0x03, 0x40, 0x0E, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x31, 0xB9, 0x11, 0xDB, 0x7F, 0x00, ++0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0x90, 0x93, 0x16, 0xE4, 0x75, 0xF0, 0x01, 0x12, ++0x07, 0x0A, 0x80, 0xB7, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x92, 0x76, 0xEF, 0xF0, ++0xA3, 0xED, 0xF0, 0x90, 0x84, 0xC3, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x2D, 0x90, ++0x05, 0x22, 0xE0, 0x90, 0x92, 0x7A, 0xF0, 0x7D, 0x26, 0x7F, 0xFF, 0x11, 0xDB, 0x11, 0xE6, 0xEF, ++0x64, 0x01, 0x70, 0x0B, 0x31, 0xCA, 0xFB, 0x7D, 0x01, 0x12, 0x3A, 0xC2, 0x12, 0xC8, 0x56, 0x90, ++0x92, 0x7A, 0xE0, 0xFF, 0x7D, 0x27, 0x11, 0xDB, 0x31, 0xB1, 0x80, 0x13, 0x31, 0xB1, 0x31, 0xCA, ++0xFB, 0x90, 0x93, 0x15, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x12, 0xC2, 0x43, 0x12, 0xC8, 0x56, 0x90, ++0x04, 0x1F, 0x74, 0x20, 0xF0, 0x12, 0xC6, 0xDC, 0x74, 0x01, 0xF0, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x90, 0x92, 0x76, 0xE0, 0xFF, 0x02, 0x5C, 0xA3, 0x90, 0x93, 0x18, 0xE0, 0xFF, 0x7D, 0x48, ++0x22, 0xAB, 0x5B, 0xAA, 0x5C, 0xA9, 0x5D, 0x02, 0x02, 0xF6, 0x90, 0x84, 0xC8, 0xE0, 0xFF, 0x90, ++0x92, 0x77, 0xE0, 0x22, 0xE0, 0xFD, 0xE5, 0x78, 0xC4, 0x54, 0xF0, 0x24, 0x05, 0xF5, 0x82, 0xE4, ++0x34, 0x81, 0xF5, 0x83, 0x22, 0x8D, 0x78, 0xEF, 0x30, 0xE6, 0x15, 0x51, 0x6F, 0x31, 0xD4, 0xF1, ++0xD1, 0xE4, 0xFB, 0xAF, 0x78, 0x12, 0x27, 0x3D, 0x51, 0x62, 0xF1, 0x9B, 0x74, 0x01, 0x80, 0x59, ++0xF1, 0xED, 0xE0, 0x04, 0xF0, 0xF1, 0xED, 0xE0, 0x64, 0x02, 0x70, 0x25, 0x74, 0xD7, 0x25, 0x78, ++0x12, 0xC8, 0x85, 0xE0, 0xFD, 0xF4, 0x60, 0x02, 0x80, 0x04, 0x51, 0x6F, 0xE0, 0xFD, 0x31, 0xD6, ++0xF1, 0xD1, 0x7B, 0x01, 0xAF, 0x78, 0x12, 0x27, 0x3D, 0x51, 0x6F, 0xF1, 0x9B, 0x74, 0x02, 0x80, ++0x28, 0xF1, 0xED, 0xE0, 0xD3, 0x94, 0x03, 0x40, 0x0D, 0xAF, 0x78, 0x12, 0x6D, 0x94, 0x51, 0x62, ++0xF1, 0x9B, 0x74, 0x03, 0x80, 0x13, 0x51, 0x6F, 0x31, 0xD4, 0xF1, 0xD1, 0x7B, 0x01, 0xAF, 0x78, ++0x12, 0x27, 0x3D, 0x51, 0x6F, 0xF1, 0x9B, 0x74, 0x02, 0xF0, 0xAB, 0x78, 0xE4, 0xFD, 0xFF, 0x02, ++0x52, 0xC3, 0x74, 0xBC, 0x25, 0x78, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0xE4, 0xF0, 0xE5, ++0x78, 0xC4, 0x54, 0xF0, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x90, 0x04, ++0x85, 0xE0, 0xF5, 0x6B, 0x90, 0x92, 0xD6, 0xE0, 0x04, 0xF0, 0xE4, 0xF5, 0x62, 0x90, 0x85, 0xBB, ++0xE0, 0xFF, 0xE5, 0x62, 0xC3, 0x9F, 0x40, 0x02, 0xC1, 0xBE, 0xE5, 0x62, 0x51, 0x71, 0xE0, 0xF5, ++0x6D, 0x12, 0xC8, 0xDB, 0xE0, 0x65, 0x6D, 0x60, 0x16, 0x90, 0x8A, 0x71, 0xE5, 0x6D, 0xF0, 0xE4, ++0xA3, 0xF0, 0xAB, 0x62, 0xFD, 0xFF, 0x12, 0x52, 0xC3, 0x12, 0xC8, 0xDB, 0xE5, 0x6D, 0xF0, 0x90, ++0x04, 0xA0, 0xE0, 0x64, 0x01, 0x70, 0x4C, 0xA3, 0xE0, 0x65, 0x62, 0x70, 0x46, 0xA3, 0xE0, 0xF5, ++0x63, 0xA3, 0xE0, 0x90, 0x92, 0x38, 0xF0, 0xE5, 0x62, 0x51, 0x71, 0xE0, 0x65, 0x63, 0x70, 0x02, ++0xC1, 0xBA, 0xE5, 0x62, 0x51, 0x71, 0xE5, 0x63, 0xF0, 0xE5, 0x62, 0x31, 0xD8, 0xE0, 0x54, 0xFC, ++0xFF, 0x90, 0x92, 0x38, 0xE0, 0x54, 0x03, 0x4F, 0xFF, 0xE5, 0x62, 0x31, 0xD8, 0xEF, 0xF0, 0x90, ++0x8A, 0x71, 0xE5, 0x63, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0xAB, 0x62, 0xE4, 0xFD, 0xFF, 0x12, 0x52, ++0xC3, 0xC1, 0xBA, 0xAF, 0x62, 0x12, 0x77, 0x39, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0x8B, 0x44, ++0x12, 0x8D, 0x9B, 0xFD, 0xF1, 0xC4, 0xED, 0xF0, 0x90, 0x92, 0x41, 0x12, 0xB2, 0x76, 0xE5, 0x62, ++0xF0, 0x12, 0xB1, 0x13, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, ++0x5C, 0xFE, 0xEF, 0x5D, 0xFF, 0x90, 0x92, 0x45, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7B, 0x02, 0x7A, ++0x00, 0xE4, 0xFD, 0x7F, 0x01, 0xF1, 0x1A, 0x12, 0xB3, 0x9B, 0xFF, 0xF1, 0xD9, 0x12, 0x05, 0x28, ++0xE0, 0xFD, 0xE5, 0x62, 0x12, 0xC8, 0xB4, 0x54, 0x80, 0xFB, 0xF1, 0xC4, 0xEB, 0xF0, 0x12, 0xC8, ++0xE7, 0xED, 0xF0, 0x90, 0x92, 0x3F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x92, 0x45, 0xF0, ++0xA3, 0xF0, 0x7B, 0x03, 0xFA, 0xFD, 0x7F, 0x01, 0xF1, 0x1A, 0xAF, 0x62, 0x12, 0x77, 0x39, 0xEF, ++0x70, 0x02, 0xC1, 0xBA, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0x8B, 0x44, 0x12, 0x8D, 0x9B, 0x30, ++0xE0, 0x02, 0xC1, 0xBA, 0xE5, 0x62, 0x12, 0xB1, 0x13, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x60, 0x02, 0xC1, 0xBA, 0x12, 0xB3, ++0x9B, 0x4E, 0x70, 0x0A, 0xF1, 0xD9, 0x12, 0x05, 0x28, 0xE0, 0x70, 0x02, 0xC1, 0xBA, 0xE5, 0x62, ++0x75, 0xF0, 0x12, 0xA4, 0x24, 0x44, 0xF9, 0x74, 0x89, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90, 0x92, ++0x33, 0x12, 0x87, 0x79, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0x12, 0xC9, 0x40, 0x12, 0x03, 0xED, ++0x2F, 0xFF, 0xF1, 0xB2, 0x2F, 0xFF, 0xF1, 0xB8, 0x2F, 0xFF, 0xF1, 0xBE, 0x2F, 0xF5, 0x6C, 0x75, ++0xF0, 0x12, 0xE5, 0x62, 0x90, 0x89, 0x40, 0x12, 0x05, 0x28, 0xE0, 0xF5, 0x68, 0xA3, 0xE0, 0xF5, ++0x69, 0xF1, 0xD9, 0x12, 0x05, 0x28, 0xE0, 0xFF, 0x90, 0x92, 0x36, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE5, 0x62, 0x51, 0x71, 0xE0, 0xF5, 0x63, 0x54, 0x80, 0xF5, 0x65, 0xE5, 0x63, 0x54, 0x7F, 0xF5, ++0x64, 0x12, 0xC8, 0xF7, 0xF1, 0x90, 0x12, 0xC9, 0x40, 0x90, 0x92, 0x41, 0xF1, 0x94, 0xF1, 0xB2, ++0xFF, 0x90, 0x92, 0x43, 0xF1, 0x94, 0xF1, 0xB8, 0xFF, 0x90, 0x92, 0x45, 0xF1, 0x94, 0x7B, 0x01, ++0xF1, 0xAA, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0xF1, 0xBE, 0xF1, 0x90, 0x90, 0x92, 0x36, 0x12, ++0xC9, 0x00, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0x12, 0xC9, 0x38, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x63, ++0xF0, 0x7B, 0x02, 0xF1, 0xAA, 0x74, 0x7C, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, ++0xE0, 0xC3, 0x94, 0x05, 0x40, 0x02, 0xC1, 0x9F, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0xC8, 0x90, ++0xFF, 0xE5, 0x64, 0xD3, 0x9F, 0x40, 0x08, 0x8F, 0x64, 0xE5, 0x64, 0x45, 0x65, 0xF5, 0x63, 0xE5, ++0x64, 0x90, 0x82, 0xE1, 0x93, 0xF5, 0x6A, 0xE5, 0x65, 0x60, 0x04, 0x05, 0x6A, 0x05, 0x6A, 0x90, ++0x04, 0x8C, 0xE0, 0x64, 0x01, 0x70, 0x28, 0xE5, 0x64, 0xC3, 0x94, 0x0C, 0x40, 0x21, 0x74, 0x84, ++0x25, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xFF, 0x54, 0x7F, 0xFE, 0xEF, 0x30, ++0xE7, 0x06, 0xE5, 0x6A, 0x2E, 0xFF, 0x80, 0x05, 0xC3, 0xE5, 0x6A, 0x9E, 0xFF, 0x8F, 0x6A, 0xE5, ++0x6A, 0xD3, 0x94, 0x1A, 0xAF, 0x6A, 0x40, 0x02, 0x7F, 0x1A, 0x8F, 0x6A, 0xD1, 0xC4, 0x7B, 0x03, ++0xFA, 0xF1, 0xAC, 0xE5, 0x63, 0x90, 0x83, 0x59, 0x93, 0xFF, 0xD3, 0x90, 0x92, 0x37, 0xE0, 0x9F, ++0x90, 0x92, 0x36, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x80, 0x73, 0xC3, 0xE5, 0x69, 0x94, 0x0A, 0xE5, ++0x68, 0x94, 0x00, 0x40, 0x02, 0xA1, 0xED, 0xF1, 0x08, 0xE0, 0xC3, 0x94, 0x01, 0x40, 0x05, 0xF1, ++0x08, 0xE0, 0x14, 0xF0, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0xF1, 0xBE, 0xFF, 0x90, 0x92, 0x37, ++0xE0, 0x2F, 0xFF, 0x90, 0x92, 0x36, 0xE0, 0x35, 0xF0, 0xFE, 0xF1, 0xB8, 0x2F, 0xFF, 0xEE, 0x35, ++0xF0, 0xFE, 0xF1, 0xB2, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0xE5, 0x68, 0xC3, 0x13, 0xFE, 0xE5, ++0x69, 0x13, 0xFF, 0xD3, 0xED, 0x9F, 0xEC, 0x9E, 0x40, 0x28, 0xE5, 0x62, 0x94, 0x05, 0x50, 0x05, ++0xF1, 0x08, 0x74, 0x03, 0xF0, 0x90, 0x92, 0x3F, 0x12, 0xC9, 0x38, 0xE5, 0x68, 0xC3, 0x13, 0xA3, ++0xF0, 0xE5, 0x69, 0x13, 0xA3, 0xD1, 0xDA, 0xF1, 0xE2, 0x7B, 0x01, 0xF1, 0x14, 0x12, 0xB1, 0xA4, ++0xC1, 0x9F, 0x12, 0xC8, 0xF7, 0x65, 0x6C, 0x70, 0x02, 0xE5, 0xF0, 0x70, 0x50, 0x90, 0x92, 0x3F, ++0xF0, 0xA3, 0xE5, 0x6C, 0xF0, 0xC3, 0x13, 0xFF, 0xA3, 0xE4, 0xF0, 0xA3, 0xEF, 0xD1, 0xDA, 0xF1, ++0xE2, 0x7B, 0x02, 0xF1, 0x14, 0xE5, 0x62, 0xC3, 0x94, 0x05, 0x50, 0x0E, 0xF1, 0x08, 0xE0, 0xD3, ++0x94, 0x00, 0x40, 0x06, 0xD1, 0xBF, 0x7B, 0x03, 0x80, 0x0B, 0xE5, 0x6C, 0xC3, 0x94, 0x03, 0x50, ++0x10, 0xD1, 0xBF, 0x7B, 0x04, 0xFA, 0xF1, 0x16, 0x7D, 0x06, 0xAF, 0x62, 0x12, 0xC0, 0xC9, 0xC1, ++0xBA, 0xE4, 0xFD, 0xAF, 0x62, 0x12, 0x8E, 0x50, 0x12, 0xC0, 0xC5, 0xC1, 0x9F, 0xD1, 0xBF, 0x7B, ++0x08, 0xFA, 0xF1, 0x16, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0x65, 0xC2, 0xC1, 0x9F, 0xF1, 0x08, 0xE4, ++0xF0, 0x90, 0x92, 0x3D, 0x74, 0x02, 0xF0, 0xAB, 0x6A, 0xAD, 0x62, 0xAF, 0x69, 0xAE, 0x68, 0x12, ++0xB2, 0xB0, 0x8E, 0x66, 0x8F, 0x67, 0x12, 0xC8, 0xA6, 0xC3, 0x74, 0x01, 0x93, 0x95, 0x67, 0xE4, ++0x93, 0x95, 0x66, 0x50, 0x18, 0xF1, 0x84, 0xE4, 0xF0, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0x8E, 0x50, ++0x12, 0xC8, 0x08, 0xE4, 0x90, 0x92, 0x43, 0xD1, 0xD2, 0x7B, 0x01, 0x80, 0x22, 0xF1, 0xA2, 0xC3, ++0xE5, 0x67, 0x9F, 0xE5, 0x66, 0x94, 0x00, 0x50, 0x1B, 0xF1, 0x84, 0xE4, 0xF0, 0x12, 0xB1, 0xA4, ++0x12, 0xC8, 0x23, 0xF1, 0xA2, 0x12, 0xC8, 0xE7, 0xEF, 0xF0, 0xE4, 0xD1, 0xD1, 0x7B, 0x02, 0xFA, ++0xF1, 0xCB, 0x80, 0x4B, 0x12, 0xC0, 0xC5, 0x12, 0xC8, 0x08, 0xF1, 0xA2, 0xF1, 0xC4, 0xEF, 0xF0, ++0xF1, 0x84, 0xF1, 0xE2, 0x7B, 0x03, 0x7A, 0x00, 0xF1, 0xCB, 0xF1, 0x84, 0xE0, 0x04, 0xF0, 0xE5, ++0x64, 0x90, 0x83, 0x6D, 0x93, 0xFF, 0xF1, 0x84, 0xE0, 0xC3, 0x9F, 0x40, 0x22, 0xF1, 0x84, 0xE4, ++0xF0, 0xF1, 0xA2, 0x12, 0xC8, 0xA6, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93, 0x34, 0x00, 0xC3, ++0x13, 0xFE, 0xEF, 0x13, 0xFF, 0xE5, 0x62, 0x12, 0xB2, 0xA4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, ++0xF5, 0x6C, 0xFD, 0xAF, 0x62, 0x12, 0x65, 0xC2, 0xE4, 0x90, 0x92, 0x3F, 0xF0, 0xD1, 0xCD, 0xA3, ++0xF0, 0x7B, 0x01, 0xFA, 0x7D, 0xFF, 0x7F, 0x01, 0xF1, 0x1A, 0x05, 0x62, 0x41, 0x8D, 0x22, 0x90, ++0x92, 0xD6, 0xE0, 0xFF, 0x90, 0x92, 0x3F, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xF0, 0x90, 0x92, 0x33, 0x12, 0x87, ++0x70, 0x90, 0x00, 0x06, 0x12, 0x04, 0x18, 0xFF, 0xAE, 0xF0, 0x90, 0x00, 0x08, 0x12, 0x04, 0x18, ++0x2F, 0xFF, 0xE5, 0xF0, 0x3E, 0xFE, 0x90, 0x00, 0x04, 0x12, 0x04, 0x18, 0x2F, 0xFF, 0xEE, 0x35, ++0xF0, 0x90, 0x92, 0x43, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0xE7, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, ++0x92, 0xF5, 0x83, 0x22, 0x7A, 0x00, 0x7D, 0x03, 0x7F, 0x01, 0x90, 0x01, 0xC6, 0xE0, 0xFE, 0x64, ++0x80, 0x70, 0x60, 0x90, 0x92, 0x49, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xEB, 0xA3, 0xF0, 0xEA, 0xA3, ++0xF0, 0x90, 0x92, 0x3F, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x4D, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, ++0x92, 0x41, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x4F, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x43, ++0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x51, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x45, 0xE0, 0xFC, ++0xA3, 0xE0, 0x90, 0x92, 0x53, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x47, 0x74, 0xFE, 0xF0, 0x90, ++0x92, 0x55, 0x74, 0x0C, 0xF0, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x47, 0x12, 0x5E, 0x10, 0x7F, 0x04, ++0x12, 0x87, 0xBB, 0x22, 0x74, 0xAC, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, ++0xFF, 0x90, 0x92, 0x3F, 0xE5, 0xF0, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xE0, 0x90, 0x8A, 0x71, 0xF0, ++0xA3, 0x22, 0xE5, 0x64, 0x90, 0x83, 0x1D, 0x93, 0xFF, 0x22, 0x7A, 0x00, 0x7D, 0x01, 0x7F, 0x01, ++0xE1, 0x1A, 0x90, 0x00, 0x04, 0x02, 0x04, 0x18, 0x90, 0x00, 0x06, 0x02, 0x04, 0x18, 0x90, 0x00, ++0x08, 0x02, 0x04, 0x18, 0x90, 0x92, 0x43, 0xE4, 0xF0, 0xA3, 0x22, 0x7D, 0x05, 0x7F, 0x01, 0xE1, ++0x1A, 0xE0, 0x54, 0x03, 0x90, 0x91, 0x0B, 0xF0, 0x22, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x90, 0x89, ++0x42, 0x22, 0xE0, 0xFF, 0x90, 0x92, 0x45, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x74, 0xBC, 0x25, ++0x78, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0x22, 0xE4, 0xFD, 0x01, 0x9A, 0x12, 0x02, 0xF6, ++0xFF, 0x90, 0x92, 0x83, 0xF0, 0xBF, 0x01, 0x07, 0x11, 0x10, 0xE4, 0x90, 0x92, 0x83, 0xF0, 0x22, ++0x7B, 0x01, 0x7A, 0x92, 0x79, 0x07, 0x7F, 0xF5, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x06, ++0x90, 0x92, 0x07, 0xE0, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x07, 0x7F, 0xF6, 0x7E, 0x01, ++0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, 0x90, 0x92, 0x09, 0xF0, 0x7B, 0x01, ++0x7A, 0x92, 0x79, 0x07, 0x7F, 0xF4, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, ++0x07, 0xE0, 0x90, 0x92, 0x0A, 0xF0, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x07, 0x7F, 0xF3, 0x7E, 0x01, ++0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, 0x90, 0x92, 0x0B, 0xF0, 0x7B, 0x01, ++0x7A, 0x92, 0x79, 0x07, 0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, ++0x07, 0xE0, 0x90, 0x92, 0x0C, 0xF0, 0x90, 0x92, 0x08, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, ++0xFB, 0xA3, 0xE0, 0x90, 0x92, 0x10, 0xF0, 0x90, 0x92, 0x0C, 0xE0, 0x90, 0x92, 0x11, 0xF0, 0x90, ++0x92, 0x12, 0x74, 0x12, 0xF0, 0x90, 0x92, 0x20, 0x74, 0x05, 0xF0, 0x90, 0x92, 0x14, 0xEF, 0xF0, ++0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x92, 0x10, 0xE0, 0x90, 0x92, 0x17, 0xF0, 0x90, 0x92, ++0x11, 0xE0, 0x90, 0x92, 0x18, 0xF0, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x12, 0x12, 0x5E, 0x10, 0x7F, ++0x04, 0x02, 0x87, 0xBB, 0x12, 0x02, 0xF6, 0x54, 0x01, 0xFF, 0x90, 0x92, 0x95, 0xE0, 0x54, 0xFE, ++0x4F, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x5B, 0x8A, 0x5C, 0x89, 0x5D, ++0x90, 0x05, 0x27, 0xE0, 0xF5, 0x5E, 0x8B, 0x1B, 0x8A, 0x1C, 0x89, 0x1D, 0x75, 0x1E, 0x01, 0x7B, ++0x01, 0x7A, 0x85, 0x79, 0xBC, 0x12, 0x6A, 0x21, 0x12, 0x91, 0xC1, 0xFF, 0xC3, 0x13, 0x20, 0xE0, ++0x02, 0x21, 0x9B, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x70, 0xB1, 0x13, 0x75, 0x5E, 0x21, 0xB1, ++0x2B, 0x30, 0xE0, 0x04, 0xB1, 0xF0, 0x80, 0x0D, 0xE4, 0x90, 0x85, 0xBD, 0xF0, 0xA3, 0xF0, 0x7D, ++0x40, 0xFF, 0x12, 0x7C, 0x41, 0xB1, 0x22, 0x54, 0x1F, 0x30, 0xE0, 0x03, 0x43, 0x5E, 0x12, 0xEF, ++0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x5E, 0x14, 0x90, 0x85, 0xBC, 0xE0, 0xC4, 0x13, 0x54, ++0x07, 0x30, 0xE0, 0x03, 0x43, 0x5E, 0x80, 0x90, 0x85, 0xBC, 0x12, 0xB7, 0xDE, 0x20, 0xE0, 0x03, ++0x43, 0x5E, 0x40, 0x51, 0x41, 0x90, 0x85, 0xBF, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x71, 0xF7, 0x90, ++0x85, 0xBC, 0xB1, 0x1A, 0x30, 0xE0, 0x04, 0x7F, 0x04, 0x80, 0x0B, 0xB1, 0x34, 0xEF, 0x60, 0x04, ++0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x71, 0xF7, 0x80, 0x7F, 0x51, 0x3E, 0x90, 0x85, 0xBF, 0xE0, ++0x64, 0x04, 0x60, 0x02, 0x41, 0x39, 0xFF, 0x71, 0xF7, 0x41, 0x39, 0x90, 0x85, 0xBC, 0xE0, 0x30, ++0xE0, 0x6F, 0xB1, 0x13, 0x43, 0x5E, 0x31, 0xB1, 0x2B, 0x30, 0xE0, 0x04, 0xB1, 0xF0, 0x80, 0x07, ++0x7D, 0x40, 0xE4, 0xFF, 0x12, 0x7C, 0x41, 0xB1, 0x22, 0x54, 0x1F, 0x30, 0xE0, 0x03, 0x43, 0x5E, ++0x02, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x5E, 0x04, 0x51, 0x41, 0x90, 0x85, 0xBC, ++0xB1, 0x1A, 0x30, 0xE0, 0x0A, 0xD1, 0xAB, 0x60, 0x30, 0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x1E, 0x12, ++0xC0, 0x69, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x02, 0x18, 0x12, 0x7A, 0xA2, 0xB1, 0x34, 0xBF, 0x01, ++0x09, 0x90, 0x85, 0xC7, 0xE0, 0xFF, 0x7D, 0x01, 0x80, 0x03, 0xE4, 0xFD, 0xFF, 0x51, 0x4C, 0x80, ++0x08, 0x90, 0x85, 0xC8, 0xE0, 0x90, 0x85, 0xC0, 0xF0, 0x90, 0x05, 0x40, 0x74, 0x22, 0xF0, 0x80, ++0x28, 0x51, 0x3E, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x02, 0x06, 0x7D, 0x01, 0x7F, 0x04, 0x80, 0x0B, ++0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x08, 0x06, 0x7D, 0x01, 0x7F, 0x0C, 0x51, 0x4C, 0x12, 0xC4, 0xC9, ++0x90, 0x85, 0xC7, 0x12, 0xA3, 0xBB, 0x12, 0xC4, 0x63, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0x5E, ++0x01, 0x90, 0x05, 0x27, 0xE5, 0x5E, 0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x2A, 0xED, 0xF0, 0x90, 0x85, 0xC1, 0xE0, 0xFE, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x30, 0xE0, 0x02, 0x61, 0xA7, 0xEE, 0x12, 0x8D, 0x9B, 0x30, 0xE0, 0x02, 0x61, 0xA7, ++0x90, 0x85, 0xC8, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0x61, 0xA7, 0xEF, 0x70, 0x02, 0x61, 0x12, 0x24, ++0xFE, 0x70, 0x02, 0x61, 0x4F, 0x24, 0xFE, 0x60, 0x4D, 0x24, 0xFC, 0x70, 0x02, 0x61, 0x8E, 0x24, ++0xFC, 0x60, 0x02, 0x61, 0xA0, 0xEE, 0xB4, 0x0E, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, 0xC8, 0xE0, ++0x70, 0x05, 0x7F, 0x01, 0x12, 0x79, 0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, ++0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x04, 0x0F, 0x90, 0x93, 0x2A, 0xE0, 0xFF, 0x60, 0x05, 0x12, ++0x6D, 0x4C, 0x80, 0x03, 0x12, 0x79, 0x61, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x08, 0x60, 0x02, 0x61, ++0xA0, 0x12, 0x7A, 0xB9, 0x61, 0xA0, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x79, ++0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, ++0x0E, 0x08, 0x71, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x0C, ++0x60, 0x02, 0x61, 0xA0, 0x71, 0xAC, 0xEF, 0x64, 0x01, 0x60, 0x02, 0x61, 0xA0, 0x12, 0x70, 0x9E, ++0x61, 0xA0, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0E, 0x08, 0x71, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x74, ++0x93, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, ++0x0C, 0x08, 0x71, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x70, 0x9E, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x04, ++0x70, 0x5E, 0x12, 0xBB, 0x71, 0xEF, 0x64, 0x01, 0x70, 0x56, 0x12, 0x77, 0xFE, 0x80, 0x51, 0x90, ++0x85, 0xC8, 0xE0, 0xB4, 0x0E, 0x08, 0x71, 0xAC, 0xBF, 0x01, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, ++0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0C, 0x08, 0x71, ++0xAC, 0xBF, 0x01, 0x03, 0x12, 0x70, 0x9E, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, ++0x79, 0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x04, 0x17, 0x12, 0x79, 0xF3, 0x80, 0x12, 0x90, 0x85, ++0xC8, 0xE0, 0xB4, 0x0C, 0x0B, 0x12, 0xA1, 0x6B, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0x7A, 0x8A, ++0x90, 0x85, 0xC8, 0x12, 0xC8, 0xC2, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x12, 0x7A, 0x29, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, 0x01, 0x80, 0x24, ++0x90, 0x85, 0xC1, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x75, 0x0E, 0x02, 0x80, ++0x13, 0x90, 0x85, 0xC7, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, 0x80, 0x05, 0x12, ++0xBB, 0x5C, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0E, 0xF0, ++0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x85, ++0xBF, 0xE0, 0x90, 0x93, 0x29, 0xF0, 0x6F, 0x70, 0x02, 0xA1, 0x0E, 0xEF, 0x14, 0x60, 0x46, 0x14, ++0x60, 0x72, 0x14, 0x70, 0x02, 0x81, 0xB2, 0x14, 0x70, 0x02, 0x81, 0xE1, 0x24, 0x04, 0x60, 0x02, ++0xA1, 0x0E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0xC4, 0xA7, 0xA1, 0x0E, 0x90, 0x93, ++0x29, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0xC4, 0xAC, 0xA1, 0x0E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x03, ++0x05, 0x12, 0xC4, 0xA3, 0xA1, 0x0E, 0x90, 0x93, 0x29, 0xE0, 0x64, 0x01, 0x60, 0x02, 0xA1, 0x0E, ++0x12, 0xC4, 0x96, 0xA1, 0x0E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0xAF, 0xDA, 0xA1, ++0x0E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x02, 0x04, 0xF1, 0xEC, 0xA1, 0x0E, 0x90, 0x93, 0x29, 0xE0, ++0xB4, 0x03, 0x05, 0x12, 0xC4, 0xB1, 0xA1, 0x0E, 0x90, 0x93, 0x29, 0xE0, 0x60, 0x02, 0xA1, 0x0E, ++0xF1, 0xE5, 0xA1, 0x0E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0xC0, 0x5E, 0x80, 0x7E, ++0x90, 0x93, 0x29, 0xE0, 0xB4, 0x01, 0x05, 0x12, 0xC0, 0x4E, 0x80, 0x72, 0x90, 0x93, 0x29, 0xE0, ++0xB4, 0x03, 0x04, 0xF1, 0xF1, 0x80, 0x67, 0x90, 0x93, 0x29, 0xE0, 0x70, 0x61, 0x12, 0xC0, 0x64, ++0x80, 0x5C, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0xAE, 0x8C, 0x80, 0x50, 0x90, 0x93, ++0x29, 0xE0, 0xB4, 0x01, 0x05, 0x12, 0xAF, 0xB5, 0x80, 0x44, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x02, ++0x05, 0x12, 0xAE, 0x7B, 0x80, 0x38, 0x90, 0x93, 0x29, 0xE0, 0x70, 0x32, 0x12, 0xAF, 0xBE, 0x80, ++0x2D, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0xC4, 0xBA, 0x80, 0x21, 0x90, 0x93, 0x29, ++0xE0, 0xB4, 0x01, 0x05, 0x12, 0xC4, 0x82, 0x80, 0x15, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x02, 0x05, ++0x12, 0xAE, 0x97, 0x80, 0x09, 0x90, 0x93, 0x29, 0xE0, 0x70, 0x03, 0x12, 0xC4, 0x91, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x7D, 0x03, 0x7F, 0x02, 0x02, 0x7B, 0xFD, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, ++0x03, 0x22, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x22, 0x90, 0x85, 0xBC, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x22, 0x90, 0x05, 0x43, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, ++0xE4, 0xF5, 0x77, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x02, 0xA1, 0xDD, 0xF1, 0xF4, 0x64, 0x01, 0x60, ++0x02, 0xA1, 0xDD, 0x12, 0xC8, 0x2E, 0x12, 0xA1, 0x83, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, ++0x70, 0x1E, 0x90, 0x85, 0xCC, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x85, 0xCE, 0xE0, ++0x60, 0x0E, 0xEF, 0x70, 0x08, 0x90, 0x85, 0xCB, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x77, 0x01, ++0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x11, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x02, 0x03, 0xE4, 0xF5, ++0x77, 0xB1, 0x34, 0xEF, 0x70, 0x02, 0xF5, 0x77, 0xE5, 0x77, 0x60, 0x41, 0x90, 0x85, 0xC8, 0xE0, ++0x20, 0xE2, 0x02, 0x51, 0x48, 0x12, 0xC9, 0x29, 0x90, 0x85, 0xCE, 0xE0, 0x60, 0x04, 0x64, 0x01, ++0x70, 0x13, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x85, 0xCE, 0xE0, 0xB1, 0xE9, 0xD1, 0x0D, 0x90, ++0x85, 0xCE, 0xE0, 0x80, 0x12, 0xE4, 0x90, 0x91, 0x6E, 0xB1, 0xDE, 0xD1, 0x0D, 0x90, 0x85, 0xCE, ++0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xB1, 0xE9, 0x90, 0x85, 0xDE, 0xF0, 0x22, 0xF0, 0x90, ++0x85, 0xCE, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xFF, 0x90, 0x85, 0xCD, 0xE0, 0x2F, 0x22, ++0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x12, 0x7C, 0xA9, 0x43, 0x5E, 0x08, 0x22, ++0xE0, 0x44, 0x02, 0xF0, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x86, 0x6E, 0xE0, 0x90, 0x91, 0x6F, ++0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x02, 0x61, 0x41, 0xE4, 0x90, 0x92, 0x67, 0xF0, ++0x90, 0x85, 0xC5, 0xE0, 0x60, 0x4F, 0xF1, 0xF4, 0x64, 0x01, 0x70, 0x49, 0x12, 0xA7, 0xE5, 0x12, ++0xC8, 0x2E, 0x90, 0x92, 0x67, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x85, 0xCC, 0xF0, 0x90, 0x85, 0xBC, ++0xE0, 0x30, 0xE0, 0x15, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x02, 0x05, 0xE4, 0x90, 0x92, 0x67, 0xF0, ++0xB1, 0x34, 0xEF, 0x70, 0x04, 0x90, 0x92, 0x67, 0xF0, 0x90, 0x92, 0x67, 0xE0, 0x60, 0x16, 0x90, ++0x85, 0xC8, 0xE0, 0x20, 0xE2, 0x02, 0x51, 0x48, 0x12, 0xC9, 0x29, 0xE4, 0x90, 0x91, 0x6E, 0xF0, ++0x90, 0x85, 0xCD, 0xD1, 0x0C, 0x22, 0xAE, 0x07, 0xB1, 0x34, 0xBF, 0x01, 0x12, 0x90, 0x85, 0xBC, ++0x12, 0xB7, 0xDE, 0x20, 0xE0, 0x09, 0xAF, 0x06, 0x7D, 0x01, 0x51, 0x4C, 0x7F, 0x01, 0x22, 0x7F, ++0x00, 0x22, 0x90, 0x85, 0xBC, 0xB1, 0x1A, 0x30, 0xE0, 0x0A, 0xD1, 0xAB, 0x60, 0x06, 0x7D, 0x01, ++0x7F, 0x02, 0x51, 0x4C, 0xD1, 0xAB, 0x60, 0x02, 0xD1, 0xB2, 0x22, 0x90, 0x85, 0xC0, 0xE0, 0x64, ++0x02, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x02, 0x60, 0x0F, 0xF1, 0x13, 0x60, 0x0B, 0x12, 0x7A, ++0x29, 0xEF, 0x70, 0x05, 0xFD, 0x7F, 0x0C, 0x51, 0x4C, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x07, ++0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x10, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x07, 0xB1, 0x34, ++0xBF, 0x01, 0x04, 0x80, 0xCD, 0xD1, 0xE8, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x01, 0x70, 0x1B, ++0xF1, 0x13, 0x60, 0x0F, 0xE4, 0xFD, 0x7F, 0x0C, 0x51, 0x4C, 0xE4, 0xFD, 0xFF, 0x12, 0x90, 0xDB, ++0x02, 0x6B, 0x98, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x02, 0x51, 0x48, 0x22, 0x90, 0x85, 0xC9, 0xE0, ++0x44, 0x01, 0xF0, 0x90, 0x85, 0xC3, 0xE0, 0x54, 0x0F, 0x22, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x30, ++0xE0, 0x3C, 0x90, 0x85, 0xC0, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0x85, 0xBF, ++0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x22, 0xEF, 0xC3, 0x13, 0x30, ++0xE0, 0x02, 0x80, 0x1B, 0xD1, 0x92, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x08, 0x06, 0xE4, 0xFD, 0x7F, ++0x0C, 0x80, 0x09, 0x90, 0x85, 0xC0, 0xE0, 0x70, 0x05, 0xFD, 0x7F, 0x04, 0x51, 0x4C, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xB1, 0x34, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x02, 0x71, 0xF7, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0x92, 0x56, 0xF0, ++0xE0, 0xFD, 0x54, 0xC0, 0x70, 0x05, 0x12, 0xA3, 0xA4, 0x80, 0x56, 0xED, 0x30, 0xE6, 0x3F, 0x90, ++0x85, 0xC5, 0xE0, 0x64, 0x02, 0x70, 0x27, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0xC3, 0x13, 0x20, 0xE0, ++0x09, 0x90, 0x85, 0xC9, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x1A, 0xF1, 0x13, 0x64, 0x01, 0x70, 0x21, ++0x90, 0x85, 0xC9, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x01, 0x12, 0x62, 0x8E, 0x80, 0x13, 0xF1, 0x0C, ++0x64, 0x02, 0x60, 0x05, 0x12, 0x77, 0x61, 0x80, 0x08, 0x12, 0x79, 0x41, 0x80, 0x03, 0x12, 0xA3, ++0xA4, 0x90, 0x92, 0x56, 0xE0, 0x90, 0x85, 0xC9, 0x30, 0xE7, 0x05, 0xD1, 0x00, 0x02, 0xA7, 0xD5, ++0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x85, 0xBF, 0x74, 0x01, 0xF0, 0x22, 0x12, 0x90, 0xD5, 0x80, ++0xF4, 0x02, 0xC0, 0x55, 0xE4, 0xFF, 0x12, 0x77, 0x39, 0xEF, 0x22, 0x12, 0x02, 0xF6, 0x90, 0x86, ++0x71, 0xF0, 0x22, 0xF1, 0xCD, 0x90, 0x92, 0x84, 0xF1, 0xC5, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, ++0x12, 0x8D, 0x8F, 0x90, 0x92, 0x85, 0x12, 0x8C, 0xA7, 0x90, 0x92, 0x86, 0xF0, 0x51, 0xFE, 0x90, ++0x92, 0x84, 0xE0, 0x54, 0x01, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x64, 0x01, ++0x70, 0x19, 0x11, 0x6E, 0x60, 0x09, 0x11, 0x67, 0x12, 0x7B, 0xFD, 0x51, 0xF5, 0x80, 0x07, 0x11, ++0x67, 0x12, 0x7B, 0xBF, 0x51, 0xB5, 0x12, 0x7A, 0x8A, 0x80, 0x17, 0x11, 0x6E, 0x60, 0x07, 0x11, ++0x67, 0x12, 0x7B, 0xFD, 0x80, 0x05, 0x11, 0x67, 0x12, 0x7B, 0xBF, 0x51, 0xC3, 0x51, 0xCA, 0x12, ++0x7A, 0xB9, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x22, 0x90, 0x92, ++0x86, 0xE0, 0x90, 0x01, 0x3F, 0x22, 0x12, 0x9F, 0xF4, 0x64, 0x01, 0x60, 0x02, 0x21, 0x5F, 0x90, ++0x85, 0xC5, 0xE0, 0x70, 0x02, 0x21, 0x5F, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x92, 0x9B, 0xF0, 0x90, ++0x05, 0x62, 0xE0, 0x90, 0x92, 0x9C, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x92, 0x9D, 0xF0, 0x90, ++0x05, 0x60, 0xE0, 0x90, 0x92, 0x9E, 0xF0, 0xF1, 0x65, 0x90, 0x85, 0xC9, 0xE0, 0x54, 0xEC, 0xF0, ++0x31, 0x83, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x0E, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x05, 0x12, ++0x9F, 0x78, 0x80, 0x02, 0x71, 0x5E, 0x31, 0x83, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, ++0x90, 0x85, 0xCC, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x85, 0xCB, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, ++0x08, 0x90, 0x85, 0xCB, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0x85, 0xCC, 0xEF, 0xF0, 0x12, 0xBD, ++0x99, 0xE4, 0x90, 0x85, 0xCE, 0xF0, 0x12, 0xC5, 0x99, 0x31, 0x6B, 0x13, 0x54, 0x1F, 0x30, 0xE0, ++0x5C, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x22, 0x31, 0x7B, 0x6F, 0x70, 0x4E, 0x90, ++0x85, 0xC2, 0xE0, 0x44, 0x40, 0xF0, 0xF1, 0xE5, 0x90, 0x01, 0x3F, 0x11, 0x67, 0x12, 0x7B, 0xFD, ++0x51, 0xBC, 0x91, 0x23, 0x90, 0x85, 0xCC, 0xE0, 0x14, 0xF0, 0x80, 0x31, 0x90, 0x85, 0xC3, 0xE0, ++0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x26, 0x31, 0x7B, 0xFE, 0x6F, 0x60, 0x20, 0x90, 0x05, 0x73, ++0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x17, 0x31, 0x6B, 0x54, 0x3F, 0x30, 0xE0, 0x10, 0xEF, 0x54, 0xBF, ++0xF0, 0x90, 0x01, 0x3F, 0x11, 0x67, 0x12, 0x7B, 0xBF, 0x51, 0xCA, 0x51, 0xC3, 0x31, 0x73, 0x90, ++0x85, 0xBC, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x02, 0x31, 0x73, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0xFF, ++0x13, 0x13, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x85, 0xCB, 0xE0, 0xFF, ++0xA3, 0xE0, 0x22, 0x90, 0x85, 0xC3, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x85, 0xBC, 0xE0, ++0x30, 0xE0, 0x06, 0x90, 0x85, 0xBE, 0x74, 0x01, 0xF0, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x02, 0x41, ++0x44, 0x90, 0x85, 0xDC, 0xE0, 0x04, 0xF0, 0x90, 0x05, 0x61, 0x51, 0xAE, 0x78, 0x08, 0x12, 0x04, ++0xD8, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0x51, 0xAE, 0x12, 0x87, ++0x4B, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x51, 0xAE, 0x78, 0x10, ++0x12, 0x04, 0xD8, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x87, 0x4B, 0xC0, 0x04, ++0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x51, 0xAE, 0x78, 0x18, 0x12, 0x04, 0xD8, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x87, 0x4B, 0x90, 0x85, 0xFC, 0xEE, 0xF0, 0xA3, 0xEF, ++0xF0, 0x90, 0x92, 0x96, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0x12, 0xBD, ++0x8C, 0xFB, 0x12, 0x51, 0x7D, 0x90, 0x92, 0x96, 0xE0, 0x54, 0xFD, 0xF0, 0x31, 0x6B, 0x13, 0x54, ++0x1F, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0x51, 0xB5, 0x90, 0x93, 0x27, ++0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, ++0xE0, 0x44, 0x01, 0xF0, 0x12, 0x5D, 0x1F, 0x12, 0x6E, 0x1D, 0xE4, 0x90, 0x88, 0xE0, 0xF0, 0x7F, ++0x01, 0x71, 0x4F, 0x71, 0x08, 0x12, 0xB7, 0xDB, 0x30, 0xE0, 0x52, 0x90, 0x88, 0x76, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x7C, 0x00, 0x7D, 0x64, 0x12, 0x03, 0x82, 0x90, 0x88, 0xCA, 0xE0, 0x6E, 0x70, ++0x03, 0xA3, 0xE0, 0x6F, 0x60, 0x0A, 0x90, 0x88, 0xCA, 0xE4, 0x75, 0xF0, 0x01, 0x02, 0x07, 0x0A, ++0x90, 0x88, 0x7A, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x88, 0x88, 0xE0, 0xB5, 0x06, 0x14, 0xA3, ++0xE0, 0xB5, 0x07, 0x0F, 0xEF, 0x4E, 0x60, 0x0B, 0x90, 0x01, 0xC7, 0x74, 0x31, 0xF0, 0x7F, 0x01, ++0x02, 0x5F, 0xE9, 0x12, 0xC3, 0x08, 0xE4, 0x90, 0x88, 0xCA, 0xF0, 0xA3, 0xF0, 0x22, 0xE0, 0xFF, ++0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x12, 0x7C, 0x41, 0x7D, 0x01, 0x7F, 0x02, ++0x02, 0x7C, 0x41, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0xA9, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C, ++0xA9, 0x12, 0x9E, 0x1B, 0x51, 0xC3, 0x7F, 0x01, 0x71, 0x19, 0x90, 0x92, 0x84, 0xE0, 0x30, 0xE0, ++0x13, 0x51, 0xF5, 0x90, 0x92, 0x87, 0xE0, 0x60, 0x05, 0x14, 0xF0, 0x02, 0x7A, 0x8A, 0x51, 0xFE, ++0xE4, 0xFF, 0x11, 0x26, 0x22, 0x90, 0x92, 0x86, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0x90, 0x92, ++0x85, 0xE0, 0x14, 0x90, 0x92, 0x87, 0xF0, 0x22, 0x90, 0x92, 0x84, 0xE0, 0x30, 0xE0, 0x09, 0x90, ++0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0x51, 0xB5, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x92, 0x96, 0xE0, 0xFE, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1E, 0x90, 0x92, 0x67, 0x74, ++0x1E, 0xF0, 0x90, 0x92, 0x75, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x69, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, ++0x92, 0x79, 0x67, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x71, 0x4F, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x8F, ++0x0D, 0x7F, 0x02, 0x12, 0x86, 0x27, 0x90, 0x84, 0xC1, 0xE0, 0x45, 0x0D, 0xF0, 0x22, 0xE4, 0xF5, ++0x77, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x77, 0x54, 0xC0, 0x70, 0x07, 0x71, 0xA4, 0x54, 0xFD, 0xF0, ++0x80, 0x3A, 0xE5, 0x77, 0x30, 0xE6, 0x19, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x01, 0x70, 0x13, 0x12, ++0x9F, 0x0C, 0x64, 0x02, 0x60, 0x05, 0x12, 0x77, 0x61, 0x80, 0x07, 0x12, 0x79, 0x41, 0x80, 0x02, ++0x71, 0xA4, 0xE5, 0x77, 0x90, 0x85, 0xC9, 0x30, 0xE7, 0x05, 0x12, 0x9E, 0x00, 0xE1, 0xD5, 0xE0, ++0x54, 0xFD, 0xF0, 0x22, 0x90, 0x85, 0xC9, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x85, 0xBC, 0xE0, ++0x90, 0x85, 0xC7, 0x30, 0xE0, 0x05, 0xE0, 0xFF, 0x02, 0x9E, 0x76, 0xE0, 0xFF, 0x7D, 0x01, 0x02, ++0x9A, 0x4C, 0x31, 0x6B, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x30, 0xE0, 0x02, 0x91, 0x23, 0xF1, 0x71, 0x30, 0xE0, 0x08, 0xF1, 0x3B, 0x54, 0x07, 0x70, 0x3A, ++0x80, 0x36, 0xF1, 0x87, 0x40, 0x32, 0x12, 0x9F, 0xF4, 0x64, 0x01, 0x70, 0x2D, 0x12, 0x9F, 0x13, ++0x70, 0x05, 0x12, 0x70, 0xDB, 0x80, 0x24, 0x12, 0x70, 0xDB, 0x90, 0x85, 0xCF, 0xE0, 0x04, 0xF0, ++0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0x91, 0x1B, 0xE4, 0x90, 0x85, 0xCF, 0xF0, 0x80, 0x03, 0x12, ++0x79, 0x41, 0xE4, 0x90, 0x85, 0xCE, 0xF0, 0x22, 0x71, 0xAC, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0x54, ++0xFB, 0xF0, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0x41, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0E, ++0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x03, 0x02, 0x6B, 0x98, 0xF1, 0xDD, 0x71, 0xAC, 0x22, 0xC0, ++0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, ++0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, ++0x3F, 0xF0, 0x74, 0xA4, 0xA3, 0xF0, 0x12, 0x75, 0x28, 0xE5, 0x56, 0x30, 0xE1, 0x02, 0xB1, 0x36, ++0xE5, 0x56, 0x30, 0xE2, 0x02, 0x91, 0x2A, 0xE5, 0x57, 0x30, 0xE0, 0x03, 0x12, 0xBD, 0x59, 0xE5, ++0x58, 0x30, 0xE1, 0x03, 0x12, 0xBF, 0xD1, 0xE5, 0x58, 0x30, 0xE0, 0x03, 0x12, 0x9F, 0x1A, 0xE5, ++0x58, 0x30, 0xE4, 0x02, 0xF1, 0xBF, 0xE5, 0x59, 0x30, 0xE1, 0x04, 0x7F, 0x04, 0x71, 0x4F, 0xE5, ++0x59, 0x30, 0xE4, 0x02, 0x51, 0xD1, 0xE5, 0x59, 0x30, 0xE5, 0x02, 0x91, 0xDA, 0xE5, 0x59, 0x30, ++0xE6, 0x02, 0xB1, 0x00, 0x74, 0x3F, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xA4, 0xA3, 0xF0, 0xD0, ++0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, ++0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x85, 0xC1, 0x12, 0x9D, 0x1A, ++0x30, 0xE0, 0x18, 0xEF, 0x54, 0xBF, 0xB1, 0x2D, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, ++0x08, 0xE0, 0x54, 0xFE, 0xB1, 0x3F, 0x74, 0x04, 0xF0, 0x71, 0xAC, 0xE4, 0xFF, 0x02, 0x68, 0x8F, ++0x90, 0x85, 0xC1, 0xE0, 0xFF, 0x12, 0x8D, 0x9B, 0x30, 0xE0, 0x1D, 0xEF, 0x54, 0x7F, 0xB1, 0x2D, ++0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x07, 0xE0, 0x54, 0xFD, 0xB1, 0x3F, 0x04, 0xF0, ++0x90, 0x85, 0xC5, 0xE0, 0x60, 0x02, 0x71, 0xAC, 0x7F, 0x01, 0x02, 0x68, 0x8F, 0xF0, 0x90, 0x04, ++0xE0, 0xE0, 0x90, 0x85, 0xC2, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x02, 0x71, 0xC2, 0x22, 0xF0, ++0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0xE4, 0xFF, 0x12, 0x77, 0x39, 0xBF, ++0x01, 0x0E, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x08, 0x71, 0xA4, 0x54, 0x07, 0x70, 0x02, 0x71, 0xAC, ++0x22, 0x12, 0x9F, 0xF4, 0x64, 0x01, 0x70, 0x14, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0E, 0xF1, 0x65, ++0x90, 0x85, 0xC1, 0xE0, 0xF1, 0x3C, 0x54, 0x07, 0x70, 0x02, 0x71, 0xAC, 0x22, 0xC0, 0xE0, 0xC0, ++0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, ++0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x7D, 0xF0, ++0x74, 0xA5, 0xA3, 0xF0, 0x12, 0x71, 0x90, 0xE5, 0x4C, 0x30, 0xE1, 0x02, 0xD1, 0xAF, 0xE5, 0x4C, ++0x30, 0xE3, 0x02, 0xF1, 0x7B, 0xE5, 0x4C, 0x30, 0xE4, 0x02, 0xF1, 0x2C, 0xE5, 0x4C, 0x30, 0xE5, ++0x03, 0x12, 0xC1, 0xC8, 0xE5, 0x4C, 0x30, 0xE6, 0x03, 0x12, 0xBC, 0xE6, 0xE5, 0x4E, 0x30, 0xE0, ++0x02, 0xF1, 0xA0, 0xE5, 0x4E, 0x30, 0xE1, 0x02, 0x31, 0x8C, 0xE5, 0x4E, 0x30, 0xE2, 0x03, 0x12, ++0xBC, 0xF3, 0xE5, 0x4E, 0x30, 0xE3, 0x03, 0x12, 0xBD, 0x22, 0xE5, 0x4E, 0x30, 0xE4, 0x02, 0xB1, ++0x61, 0xE5, 0x4E, 0x30, 0xE5, 0x03, 0x12, 0xBD, 0x3D, 0xE5, 0x4E, 0x30, 0xE6, 0x02, 0xB1, 0x4A, ++0xE5, 0x4F, 0x30, 0xE1, 0x03, 0x12, 0x9E, 0xCA, 0xE5, 0x4F, 0x30, 0xE4, 0x02, 0xF1, 0xC0, 0xE5, ++0x4F, 0x30, 0xE5, 0x02, 0xD1, 0x3C, 0x74, 0x7D, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xA5, 0xA3, ++0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, ++0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0xF5, 0x77, 0x90, ++0x85, 0xBB, 0xE0, 0xFF, 0xE5, 0x77, 0xC3, 0x9F, 0x50, 0x64, 0xAF, 0x77, 0x12, 0x77, 0x39, 0xEF, ++0x60, 0x58, 0xE5, 0x77, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFF, 0xE5, 0x77, 0x54, 0x07, 0xFE, 0x74, ++0x75, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, 0xFD, 0xAF, 0x06, 0x12, 0xB1, 0x2A, ++0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x60, 0x2B, 0xE5, ++0x77, 0x12, 0xC8, 0xB4, 0x20, 0xE7, 0x02, 0x80, 0x13, 0xE5, 0x77, 0xC4, 0x54, 0xF0, 0x24, 0x02, ++0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, 0xFF, 0x20, 0xE7, 0x09, 0x90, 0x01, 0xC1, 0xE0, ++0x44, 0x20, 0xF0, 0x80, 0x05, 0xAD, 0x77, 0x12, 0x91, 0xE5, 0x05, 0x77, 0x80, 0x91, 0x22, 0xE4, ++0xFF, 0x90, 0x92, 0x56, 0xEF, 0xF0, 0x90, 0x04, 0x7E, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x92, 0x66, ++0xF0, 0xE0, 0xFE, 0x6F, 0x60, 0x65, 0x90, 0x92, 0x57, 0x74, 0x03, 0xF0, 0x90, 0x92, 0x65, 0x74, ++0x08, 0xF0, 0xEE, 0x04, 0x54, 0x0F, 0xFF, 0xE4, 0xFE, 0xEF, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, ++0xF5, 0x82, 0xE4, 0x34, 0x80, 0xF5, 0x83, 0xE5, 0x82, 0x2E, 0xF1, 0x33, 0xE0, 0xFD, 0x74, 0x59, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xED, 0xF0, 0x0E, 0xEE, 0xB4, 0x08, 0xDA, 0x7B, ++0x01, 0x7A, 0x92, 0x79, 0x57, 0x12, 0x5E, 0x10, 0x90, 0x92, 0x66, 0xE0, 0x04, 0x54, 0x0F, 0xFF, ++0xF0, 0xBF, 0x0F, 0x02, 0xE4, 0xF0, 0x90, 0x92, 0x66, 0xE0, 0x90, 0x04, 0x7F, 0xF0, 0x90, 0x92, ++0x56, 0xE0, 0x7F, 0x04, 0x70, 0x02, 0x61, 0x4F, 0x12, 0x87, 0xBB, 0x22, 0x12, 0x40, 0xB9, 0x7F, ++0x02, 0x61, 0x4F, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xEF, 0x54, 0xFB, 0xF0, 0x90, ++0x85, 0xC9, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x01, 0x57, 0xE0, 0x60, 0x17, 0xF1, 0x68, 0xF1, ++0x71, 0x30, 0xE0, 0x02, 0x80, 0xE5, 0xF1, 0x87, 0x40, 0x0A, 0xE4, 0xFF, 0x12, 0x77, 0x39, 0xBF, ++0x01, 0x02, 0x91, 0x1B, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, ++0x22, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, 0x86, 0x72, 0xE0, 0x30, ++0xE0, 0x04, 0x7F, 0x10, 0x71, 0x4F, 0x22, 0x90, 0x85, 0xCE, 0xE0, 0x04, 0xF0, 0x90, 0x85, 0xC9, ++0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x86, 0x6D, 0xE0, 0xFF, 0x90, 0x85, 0xCE, 0xE0, 0xD3, 0x9F, 0x22, ++0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x11, 0xA3, 0x74, 0x01, 0xF0, 0x90, 0x85, 0xBC, 0xE0, 0xFF, ++0xC3, 0x13, 0x30, 0xE0, 0x03, 0x12, 0x9F, 0x5F, 0x12, 0x9D, 0x40, 0xE4, 0xFF, 0x61, 0x19, 0x22, ++0xE4, 0xFF, 0x02, 0x2D, 0xBD, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x22, 0x12, 0x02, 0xF6, ++0xFF, 0x54, 0x01, 0xFE, 0x22, 0x90, 0x85, 0xC1, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x85, 0xC1, ++0xE0, 0x54, 0xF7, 0xF0, 0x22, 0x90, 0x85, 0xCB, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0x12, 0x02, ++0xF6, 0xFF, 0x90, 0x92, 0x89, 0xF0, 0xBF, 0x01, 0x08, 0x12, 0xA8, 0x02, 0xE4, 0x90, 0x92, 0x89, ++0xF0, 0x22, 0x11, 0xE2, 0x7F, 0xF4, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x06, 0x90, 0x92, ++0x16, 0xE0, 0xA3, 0xF0, 0x11, 0xE2, 0x7F, 0xF5, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, ++0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x18, 0xF0, 0x11, 0xE2, 0x7F, 0xF6, 0x7E, 0x00, 0x12, 0x64, ++0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x19, 0xF0, 0x11, 0xE2, 0x7F, 0xF7, ++0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x1A, 0xF0, ++0x11, 0xE2, 0x7F, 0xF8, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, ++0x90, 0x92, 0x1B, 0xF0, 0x11, 0xE2, 0x31, 0x63, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, ++0x92, 0x1C, 0xF0, 0x11, 0xE2, 0x31, 0x5C, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, ++0x1D, 0xF0, 0x11, 0xE2, 0x11, 0xE9, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x1E, ++0xF0, 0x90, 0x92, 0x07, 0x74, 0x19, 0xF0, 0x90, 0x92, 0x15, 0x74, 0x08, 0xF0, 0x90, 0x92, 0x17, ++0xE0, 0x90, 0x92, 0x09, 0xF0, 0x90, 0x92, 0x18, 0xE0, 0x90, 0x92, 0x0A, 0xF0, 0x90, 0x92, 0x19, ++0xE0, 0x90, 0x92, 0x0B, 0xF0, 0x90, 0x92, 0x1A, 0xE0, 0x90, 0x92, 0x0C, 0xF0, 0x90, 0x92, 0x1B, ++0xE0, 0x90, 0x92, 0x0D, 0xF0, 0x90, 0x92, 0x1C, 0xE0, 0x90, 0x92, 0x0E, 0xF0, 0x90, 0x92, 0x1D, ++0xE0, 0x90, 0x92, 0x0F, 0xF0, 0x90, 0x92, 0x1E, 0xE0, 0x90, 0x92, 0x10, 0x12, 0x87, 0xEB, 0x02, ++0x87, 0xBB, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x16, 0x22, 0x7F, 0xFD, 0x7E, 0x00, 0x02, 0x64, 0x37, ++0x7E, 0x00, 0x7F, 0x0B, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x8A, 0x12, 0x06, 0xDE, 0x31, ++0x55, 0x31, 0x63, 0xBF, 0x01, 0x1C, 0x90, 0x92, 0x29, 0xE0, 0xFE, 0x54, 0x01, 0x90, 0x92, 0x8A, ++0xF0, 0xEE, 0x54, 0x04, 0x90, 0x92, 0x8C, 0xF0, 0x90, 0x92, 0x29, 0xE0, 0x54, 0x08, 0x90, 0x92, ++0x8B, 0xF0, 0x31, 0x55, 0x31, 0x5C, 0xBF, 0x01, 0x16, 0x90, 0x92, 0x29, 0xE0, 0xFE, 0x54, 0x07, ++0x90, 0x92, 0x8E, 0xF0, 0xEE, 0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x90, 0x92, 0x8D, 0xF0, 0x31, ++0x55, 0x11, 0xE9, 0xBF, 0x01, 0x0E, 0x90, 0x92, 0x29, 0xE0, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, ++0x90, 0x92, 0x8F, 0xF0, 0x22, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x29, 0x22, 0x7F, 0xFB, 0x7E, 0x00, ++0x02, 0x64, 0x37, 0x7F, 0xF9, 0x7E, 0x00, 0x02, 0x64, 0x37, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, ++0xFD, 0x7F, 0x80, 0x12, 0x7B, 0x3E, 0x12, 0xBB, 0xE9, 0x12, 0xC1, 0xBB, 0x12, 0x7B, 0x9C, 0x31, ++0xEF, 0xF1, 0xCE, 0x7F, 0x01, 0x12, 0x85, 0x15, 0x90, 0x92, 0x88, 0x74, 0x02, 0xF0, 0xFF, 0x12, ++0x85, 0x15, 0x90, 0x92, 0x88, 0xE0, 0x04, 0xF0, 0x71, 0x1A, 0x51, 0x0C, 0x90, 0x01, 0xCC, 0x74, ++0x0F, 0xF0, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x7B, 0x3E, 0x75, 0x20, ++0xFF, 0x12, 0x7C, 0xCD, 0x71, 0x80, 0x90, 0x00, 0x81, 0xE0, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x12, ++0x7B, 0x3E, 0xF1, 0xC3, 0x11, 0xF0, 0x90, 0x00, 0x00, 0xE0, 0x54, 0xFB, 0xFD, 0xE4, 0xFF, 0xD1, ++0x84, 0x44, 0x04, 0xFD, 0x7F, 0x01, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x98, 0x74, 0x80, 0xF0, 0xA3, ++0x74, 0x88, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0xE4, 0xFF, 0x02, 0x85, 0x9E, 0x90, ++0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x71, 0xE7, 0x90, 0x01, ++0x99, 0xE0, 0x44, 0xC0, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x80, 0xF0, 0x22, 0xF1, 0x8E, 0x12, 0x7B, ++0xEF, 0x12, 0x3C, 0x03, 0x12, 0xC1, 0x39, 0x12, 0xC4, 0x63, 0xD1, 0xB1, 0x51, 0xF5, 0x51, 0x43, ++0x12, 0x7B, 0x64, 0x12, 0x78, 0xB9, 0x90, 0x89, 0x16, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, ++0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4, 0x90, 0x89, 0x18, 0xF0, 0x90, 0x89, 0x16, 0xE0, 0x54, ++0xEF, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x24, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x86, 0x79, 0x72, 0x12, ++0x06, 0xDE, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x20, 0xF0, 0xD1, 0x0F, 0x51, 0xFA, 0x90, 0x84, 0xC5, ++0xE0, 0xFF, 0x64, 0x02, 0x70, 0x29, 0x51, 0xEE, 0x30, 0xE0, 0x02, 0x7E, 0x01, 0x90, 0x86, 0x90, ++0x51, 0xEC, 0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90, 0x86, 0x8E, 0x51, 0xEC, 0x30, 0xE2, 0x02, 0x7E, ++0x01, 0x90, 0x86, 0x8F, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0, 0x90, 0x02, 0xFB, 0xF0, 0x22, 0xEF, ++0x64, 0x01, 0x70, 0x1D, 0x51, 0xE5, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, 0x86, 0x90, 0x51, 0xE3, ++0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x86, 0x8E, 0x51, 0xE3, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80, ++0x23, 0x90, 0x84, 0xC5, 0xE0, 0x64, 0x03, 0x70, 0x20, 0x51, 0xDC, 0x30, 0xE0, 0x02, 0x7F, 0x01, ++0x90, 0x86, 0x90, 0x51, 0xDA, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x86, 0x8E, 0x51, 0xDA, 0x30, ++0xE2, 0x02, 0x7F, 0x01, 0x90, 0x86, 0x8F, 0xEF, 0xF0, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x78, 0xE0, ++0x7F, 0x00, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x22, 0xEE, 0xF0, 0x90, 0xFD, ++0x80, 0xE0, 0x7E, 0x00, 0x22, 0xF1, 0x71, 0x02, 0x06, 0xDE, 0xF1, 0x9C, 0xE4, 0x90, 0x88, 0xD8, ++0x12, 0x96, 0xD2, 0x90, 0x88, 0x76, 0xF0, 0x12, 0x96, 0xCD, 0x12, 0x96, 0xD3, 0x90, 0x88, 0x88, ++0xF0, 0xA3, 0xF0, 0x90, 0x88, 0xCA, 0xF0, 0xA3, 0xF0, 0x22, 0x12, 0x7C, 0x4E, 0x90, 0x84, 0xC5, ++0xEF, 0xF0, 0x71, 0x4E, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, ++0xF0, 0x90, 0x00, 0x17, 0xE0, 0x54, 0xFC, 0x44, 0x04, 0xFD, 0x7F, 0x17, 0x12, 0x7B, 0x3E, 0x90, ++0x00, 0x38, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x38, 0x12, 0x7B, 0x3E, 0x02, 0x68, 0xE2, 0x12, 0x75, ++0xB6, 0x12, 0x75, 0x58, 0x12, 0xB9, 0x8F, 0x12, 0xB9, 0xB6, 0xE4, 0xF5, 0x40, 0xF5, 0x41, 0xF5, ++0x42, 0x75, 0x43, 0x80, 0xAD, 0x40, 0x7F, 0x50, 0x12, 0x7B, 0x3E, 0xAD, 0x41, 0x7F, 0x51, 0x12, ++0x7B, 0x3E, 0xAD, 0x42, 0x7F, 0x52, 0x12, 0x7B, 0x3E, 0xAD, 0x43, 0x7F, 0x53, 0x02, 0x7B, 0x3E, ++0xE4, 0x90, 0x92, 0x29, 0xF0, 0xA3, 0xF0, 0x71, 0xCF, 0xEF, 0x64, 0x01, 0x60, 0x3A, 0xC3, 0x90, ++0x92, 0x2A, 0xE0, 0x94, 0x88, 0x90, 0x92, 0x29, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, ++0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1C, 0x90, 0x92, 0x29, 0x12, ++0xC8, 0x98, 0xD3, 0x90, 0x92, 0x2A, 0xE0, 0x94, 0x32, 0x90, 0x92, 0x29, 0xE0, 0x94, 0x00, 0x40, ++0xC6, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE3, 0xBF, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x90, ++0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x44, 0x0B, 0x71, 0xE7, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xC0, 0x7F, ++0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01, 0x22, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x7C, 0x9F, 0xEF, ++0x60, 0x49, 0x90, 0x88, 0xCE, 0xE0, 0xFF, 0x60, 0x03, 0x12, 0x7B, 0x8A, 0x90, 0x01, 0xC7, 0xE4, ++0xF0, 0x91, 0x63, 0xEC, 0x3E, 0x90, 0x85, 0xB7, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x06, 0x09, 0xE0, ++0x54, 0xFE, 0xF0, 0x7D, 0x35, 0x7F, 0xFF, 0x12, 0x90, 0xDB, 0x12, 0xC0, 0x1A, 0x90, 0x02, 0x86, ++0xE0, 0x44, 0x04, 0xF0, 0x12, 0x72, 0x79, 0x91, 0x56, 0x12, 0x90, 0xD5, 0x12, 0x76, 0xE6, 0x90, ++0x01, 0x34, 0x74, 0x08, 0xF0, 0xFD, 0xE4, 0xFF, 0x02, 0x7C, 0xA9, 0x7D, 0x08, 0xE4, 0xFF, 0x12, ++0x7C, 0x41, 0x90, 0x06, 0x90, 0xE0, 0x54, 0xF0, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x54, 0xFB, 0xF0, ++0xB1, 0xE9, 0x91, 0x57, 0x41, 0x43, 0x22, 0x90, 0x86, 0x72, 0x12, 0x9D, 0x1A, 0x30, 0xE0, 0x02, ++0x51, 0xFA, 0x22, 0x90, 0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, 0x00, 0x24, 0x00, ++0xFF, 0x22, 0x90, 0x88, 0xD9, 0xB1, 0x10, 0x12, 0xC3, 0xB1, 0xFD, 0x90, 0x92, 0x07, 0xE0, 0x24, ++0x2C, 0x12, 0xC3, 0xCA, 0x90, 0x92, 0x07, 0xE0, 0x2F, 0x24, 0x30, 0xA3, 0xF0, 0xE0, 0xFD, 0x24, ++0x04, 0xD1, 0x4A, 0xE0, 0xFE, 0x74, 0x05, 0x2D, 0xB1, 0xCD, 0x91, 0x6B, 0xEC, 0x3E, 0x90, 0x88, ++0x80, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x08, 0xE0, 0x24, 0x0C, 0xF9, 0xE4, 0x34, 0xFC, 0xB1, ++0x21, 0x75, 0x1E, 0x04, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0x82, 0x12, 0x6A, 0x21, 0x90, 0x92, 0x08, ++0xE0, 0x24, 0x14, 0xF0, 0xE0, 0xFD, 0x24, 0x01, 0xB1, 0xDD, 0x2D, 0xB1, 0xD5, 0x91, 0x6B, 0xEC, ++0x3E, 0x90, 0x88, 0x86, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x88, 0xDA, 0xB1, 0x10, 0x90, 0x88, 0x7C, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x4E, 0x60, 0x11, 0x90, 0x92, 0x07, 0xE0, 0xB1, 0x1B, 0x8F, 0x1E, ++0x7B, 0x01, 0x7A, 0x88, 0x79, 0x8A, 0x12, 0x6A, 0x21, 0x90, 0x88, 0xDB, 0xB1, 0x10, 0xB1, 0x1B, ++0x90, 0x88, 0x7E, 0xA3, 0xE0, 0xF5, 0x1E, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0xAA, 0x02, 0x6A, 0x21, ++0xE0, 0xFF, 0x12, 0x7B, 0x2A, 0x90, 0x92, 0x07, 0xEF, 0xF0, 0x22, 0x24, 0x00, 0xF9, 0xE4, 0x34, ++0xFC, 0x75, 0x1B, 0x01, 0xF5, 0x1C, 0x89, 0x1D, 0x22, 0xEF, 0x60, 0x04, 0xB1, 0x31, 0x91, 0x72, ++0x22, 0xE4, 0xFD, 0xFC, 0x90, 0x88, 0xD8, 0xE0, 0xFF, 0xF1, 0x94, 0xAB, 0x05, 0x74, 0x01, 0x2B, ++0xB1, 0xDD, 0x2B, 0xB1, 0xD5, 0xF1, 0xAC, 0x90, 0x88, 0x76, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x03, ++0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x02, 0x2B, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xB1, 0xC4, 0x90, 0x88, 0x78, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x05, 0x2B, 0xB1, 0xCD, ++0xE0, 0xFE, 0x74, 0x04, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xB1, 0xC4, 0x90, 0x88, 0x7A, 0xF0, ++0xA3, 0xEF, 0xF0, 0x74, 0x07, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, ++0x06, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xB1, 0xC4, 0x90, 0x88, 0x7C, 0xF0, 0xA3, 0xEF, 0xF0, ++0x74, 0x09, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x08, 0x2B, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x90, 0x88, 0x7E, 0xF0, ++0xA3, 0xEF, 0xF0, 0x22, 0xF5, 0x83, 0xE0, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x22, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x00, 0x22, 0xD1, 0x0F, 0x12, 0x77, 0x89, 0x90, 0x01, ++0x3F, 0x74, 0x04, 0xF0, 0x90, 0x84, 0xC5, 0xE0, 0xFF, 0xB4, 0x01, 0x07, 0x90, 0xFD, 0x00, 0xE0, ++0x54, 0xEF, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0x90, 0xFE, 0x10, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFD, 0x7F, 0x8F, 0x12, 0x7B, 0x3E, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xAD, 0x07, 0x90, 0x88, 0x80, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, 0x90, 0x88, ++0x80, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x04, 0x2E, 0xD1, 0x4A, 0xEF, 0xF0, 0x90, 0x88, 0x80, 0xA3, ++0xE0, 0xFF, 0x74, 0x05, 0x2E, 0xB1, 0xCD, 0xEF, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x02, 0xF1, 0xA4, 0x7F, 0x02, 0xD1, ++0x84, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, ++0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD1, 0x52, 0x90, 0x85, 0xBF, ++0x74, 0x03, 0xF0, 0x22, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x01, 0xE0, 0x22, 0x7D, 0x22, 0x7F, 0xFF, ++0xD1, 0xA9, 0x44, 0x40, 0xF0, 0x80, 0xE6, 0xD1, 0x52, 0x7D, 0x24, 0xD1, 0xA7, 0x54, 0xBF, 0xF0, ++0x90, 0x85, 0xBF, 0x74, 0x04, 0xF0, 0x22, 0x7F, 0x6F, 0x12, 0x90, 0xDB, 0x90, 0x05, 0x27, 0xE0, ++0x22, 0x7E, 0x00, 0x7F, 0xAC, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x85, 0x79, 0xC1, 0x12, 0x06, 0xDE, ++0xF1, 0x71, 0x12, 0x06, 0xDE, 0x90, 0x85, 0xC4, 0x74, 0x02, 0xF0, 0x90, 0x85, 0xCB, 0x14, 0xF0, ++0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x90, 0x85, 0xD1, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0xF1, 0x7E, ++0x12, 0xC5, 0xA3, 0xE4, 0xFD, 0xFF, 0x12, 0x57, 0x82, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x57, 0x82, ++0x7D, 0x0C, 0x7F, 0x01, 0x12, 0x57, 0x82, 0x90, 0x84, 0xC5, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, ++0x85, 0xD0, 0x74, 0xDD, 0xF0, 0x80, 0x0F, 0xEF, 0x90, 0x85, 0xD0, 0xB4, 0x03, 0x05, 0x74, 0xD4, ++0xF0, 0x80, 0x03, 0x74, 0x40, 0xF0, 0x7F, 0x2C, 0x12, 0x7B, 0x51, 0xEF, 0x54, 0x0F, 0xFF, 0xBF, ++0x05, 0x08, 0x90, 0x85, 0xFB, 0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x85, 0xFB, 0xF0, 0x90, ++0x86, 0x6D, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, ++0xA3, 0x74, 0x07, 0xF1, 0x7E, 0xE4, 0x90, 0x85, 0xD7, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, 0x12, 0x69, ++0x33, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, ++0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0xE4, 0xFD, 0xFF, 0x12, 0x90, 0xDB, 0xE4, 0x90, 0x86, 0x71, 0xF0, ++0x22, 0x7E, 0x00, 0x7F, 0x04, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x84, 0x22, 0xF0, 0x90, ++0x85, 0xFB, 0xE0, 0x24, 0x04, 0x90, 0x85, 0xDD, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0xE4, 0xFD, ++0xFF, 0x02, 0x6E, 0x5F, 0x12, 0x7B, 0x2A, 0x7C, 0x00, 0xAD, 0x07, 0x22, 0x90, 0x86, 0x72, 0xE0, ++0x54, 0xBF, 0xF0, 0x22, 0x12, 0x7B, 0x51, 0xEF, 0x44, 0x01, 0xFD, 0x22, 0xE0, 0x7A, 0x00, 0x24, ++0x00, 0xFF, 0xEA, 0x3E, 0x22, 0x7D, 0x21, 0x7F, 0xFF, 0x12, 0x90, 0xDB, 0xC1, 0x7D, 0x12, 0x9F, ++0xE5, 0x80, 0xF2, 0x90, 0x01, 0xE4, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x22, 0xE4, 0x90, ++0x84, 0xC1, 0x12, 0x96, 0xD2, 0x90, 0x92, 0x81, 0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0xD1, 0xA9, 0x44, ++0x40, 0xF0, 0x02, 0x9F, 0xE5, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x92, 0x01, 0xF0, 0x90, ++0x92, 0x01, 0xE0, 0xFD, 0x70, 0x03, 0x02, 0xB0, 0xF7, 0x90, 0x85, 0x1D, 0xE0, 0xFF, 0x70, 0x06, ++0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x85, 0x1E, 0xE0, 0xB5, 0x07, 0x04, ++0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, ++0x22, 0x90, 0x93, 0x22, 0xE0, 0x31, 0x29, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x01, 0xDA, 0xE4, 0x90, 0x92, 0x02, 0xF0, 0x90, 0x92, 0x02, ++0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x42, 0x11, 0xF9, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, ++0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0x31, 0x01, 0x90, 0x84, 0xCD, 0x12, 0x05, 0x28, 0xE5, ++0x82, 0x29, 0x12, 0xA7, 0x33, 0xEF, 0x11, 0xF8, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, ++0xF0, 0x31, 0x01, 0x90, 0x84, 0xD1, 0x12, 0x05, 0x28, 0xE5, 0x82, 0x29, 0x12, 0xA7, 0x33, 0xEF, ++0xF0, 0x90, 0x92, 0x02, 0xE0, 0x04, 0xF0, 0x80, 0xB4, 0x90, 0x92, 0x01, 0xE0, 0xFF, 0x90, 0x93, ++0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, ++0x90, 0x92, 0x01, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0x04, 0xF0, 0xE0, 0x54, ++0x03, 0xF0, 0x90, 0x85, 0x1E, 0xF1, 0xC4, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x03, 0x02, ++0xAF, 0xEF, 0xE4, 0x90, 0x85, 0x1E, 0xF0, 0x02, 0xAF, 0xEF, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, ++0xF0, 0x90, 0x93, 0x22, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x11, 0xF8, 0x90, 0x01, 0xD0, 0x12, ++0x05, 0x28, 0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0x75, 0xF0, 0x04, ++0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x85, 0x1E, 0xE0, 0x75, ++0xF0, 0x08, 0x22, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, ++0x83, 0xE0, 0xFD, 0x7C, 0x00, 0xE5, 0x62, 0x54, 0x07, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, ++0x22, 0xE4, 0xF5, 0x73, 0xEF, 0x14, 0xF5, 0x72, 0xED, 0xFF, 0xE5, 0x72, 0xF5, 0x82, 0x33, 0x95, ++0xE0, 0xF5, 0x83, 0xC3, 0xE5, 0x82, 0x9F, 0x74, 0x80, 0xF8, 0x65, 0x83, 0x98, 0x40, 0x52, 0xE5, ++0x72, 0x78, 0x03, 0xA2, 0xE7, 0x13, 0xD8, 0xFB, 0xFF, 0x33, 0x95, 0xE0, 0xFE, 0xEB, 0x12, 0xC8, ++0x73, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE5, 0x83, 0x3E, 0xF5, 0x83, 0xE0, 0xF5, 0x82, 0x75, 0x83, ++0x00, 0xE5, 0x72, 0x31, 0x27, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, ++0xEE, 0x55, 0x83, 0xFE, 0xEF, 0x55, 0x82, 0x4E, 0x60, 0x13, 0x85, 0x72, 0x74, 0x05, 0x73, 0x90, ++0x92, 0x3E, 0xE0, 0x65, 0x73, 0x60, 0x0A, 0xE5, 0x74, 0xD3, 0x9D, 0x40, 0x04, 0x15, 0x72, 0x80, ++0x97, 0xAF, 0x74, 0x22, 0x7D, 0x01, 0xAF, 0x62, 0xAC, 0x05, 0x90, 0x92, 0x39, 0xEF, 0xF0, 0xFD, ++0xE0, 0xFF, 0x12, 0x92, 0x71, 0xE0, 0xF5, 0x6E, 0x54, 0x7F, 0xF5, 0x70, 0x75, 0xF0, 0x12, 0xEF, ++0x90, 0x89, 0x3D, 0x12, 0x05, 0x28, 0xE0, 0xF9, 0x90, 0x92, 0x39, 0xE0, 0x12, 0xC8, 0x8D, 0xFE, ++0xEF, 0x12, 0x91, 0xD8, 0xE0, 0x54, 0x03, 0xF5, 0x6F, 0xE5, 0x70, 0x90, 0x83, 0x1D, 0x93, 0xFB, ++0xED, 0x51, 0xA4, 0xE4, 0xF0, 0xA3, 0xEB, 0xF0, 0x12, 0x8B, 0x40, 0xC4, 0x54, 0x03, 0x90, 0x92, ++0x3A, 0xF0, 0x74, 0xCC, 0x2D, 0x51, 0x86, 0xE5, 0x70, 0xF0, 0x74, 0x4C, 0x2D, 0xF1, 0xD3, 0xE5, ++0x6F, 0xF0, 0xE5, 0x70, 0xD3, 0x9E, 0x40, 0x06, 0x8E, 0x70, 0xAF, 0x06, 0x8F, 0x6E, 0x8C, 0x71, ++0xE4, 0xFF, 0xEF, 0xC3, 0x95, 0x71, 0x50, 0x2F, 0xE5, 0x6E, 0x30, 0xE7, 0x09, 0x85, 0x70, 0x6E, ++0x1C, 0xEC, 0x70, 0x20, 0x80, 0x21, 0xE5, 0x70, 0xD3, 0x99, 0x40, 0x14, 0xAD, 0x01, 0x90, 0x92, ++0x39, 0xE0, 0xFB, 0x90, 0x92, 0x3E, 0xEC, 0xF0, 0xAF, 0x70, 0x31, 0x31, 0x8F, 0x6E, 0x80, 0x07, ++0x89, 0x6E, 0x80, 0x03, 0x0F, 0x80, 0xCB, 0x90, 0x92, 0x39, 0xE0, 0xFF, 0x51, 0x7B, 0xEF, 0xF0, ++0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x6E, 0xF1, 0xCB, 0x71, 0xAB, 0x7B, 0x01, 0xFA, 0x7D, 0x05, 0x7F, ++0x08, 0x12, 0x97, 0x1A, 0x90, 0x92, 0x39, 0xE0, 0xFF, 0x90, 0x91, 0x0B, 0xE5, 0x6F, 0xF0, 0xE4, ++0xFB, 0xAD, 0x6E, 0x02, 0x27, 0x3D, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x3F, 0xE4, 0xF0, ++0xA3, 0x22, 0x74, 0xCC, 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0x22, 0xE5, 0x71, ++0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01, ++0x93, 0xFF, 0xE5, 0x6E, 0x25, 0xE0, 0x24, 0x7B, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, ++0x90, 0x92, 0x39, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xEB, 0x75, 0xF0, 0x06, 0xA4, ++0xFF, 0x90, 0x89, 0x21, 0x12, 0x87, 0x70, 0xE9, 0x2F, 0xF9, 0xEA, 0x35, 0xF0, 0xFA, 0x90, 0x92, ++0x41, 0x12, 0x87, 0x79, 0x90, 0x92, 0x3B, 0xE0, 0x51, 0xA4, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x92, ++0x3E, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0x92, 0x41, 0x12, 0x87, 0x70, 0x90, ++0x92, 0x40, 0xE0, 0xFF, 0xF5, 0x82, 0x75, 0x83, 0x00, 0x12, 0x03, 0x0F, 0xFD, 0x7C, 0x00, 0x90, ++0x92, 0x3B, 0xE0, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x44, 0x12, 0x05, 0x28, 0x75, 0xF0, 0x02, 0xEF, ++0x71, 0xA3, 0xFF, 0x90, 0x92, 0x3D, 0xE0, 0xFB, 0xEF, 0xA8, 0x03, 0x08, 0x80, 0x05, 0xCE, 0xC3, ++0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x71, 0x93, 0xEE, 0x8F, 0xF0, 0x12, 0x07, 0x0A, 0x90, 0x92, 0x40, ++0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x05, 0xB2, 0x90, 0x92, 0x41, 0x12, 0x87, 0x70, 0x90, 0x00, 0x05, ++0x12, 0x03, 0x0F, 0xFD, 0x7C, 0x00, 0x90, 0x92, 0x3D, 0xE0, 0xFF, 0x90, 0x92, 0x39, 0xE0, 0xFE, ++0xA3, 0xE0, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x71, 0x93, ++0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xD3, 0x9F, 0xEC, 0x9E, 0x40, 0x08, 0xED, 0x9F, 0xFF, 0xEC, 0x9E, ++0xFE, 0x80, 0x04, 0x7E, 0x00, 0x7F, 0x00, 0x90, 0x92, 0x3E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0x92, 0x3E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x92, 0x3B, 0xE0, 0x51, 0xA4, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0x22, 0xFF, 0x12, 0x03, 0x70, 0x90, 0x92, 0x3E, 0x22, 0x75, 0xF0, 0x12, 0xE5, 0x62, ++0x90, 0x89, 0x40, 0x12, 0x05, 0x28, 0xE0, 0xFE, 0xA3, 0xE0, 0x22, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, ++0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x92, 0xF5, 0xF0, 0xA3, 0xF0, ++0xA3, 0x74, 0x08, 0xF0, 0xA3, 0x71, 0xAB, 0x90, 0x92, 0xFD, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, ++0x01, 0xC4, 0x74, 0xB2, 0xF0, 0x74, 0xB3, 0xA3, 0xF0, 0x90, 0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, ++0x1E, 0x12, 0xAC, 0x6B, 0xEC, 0x3E, 0x90, 0x92, 0xEC, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x87, ++0xE0, 0x90, 0x92, 0xF4, 0xF0, 0x90, 0x86, 0x72, 0xE0, 0x20, 0xE0, 0x02, 0xC1, 0x9A, 0xE4, 0x90, ++0x92, 0xF3, 0xF0, 0x90, 0x92, 0xF4, 0xE0, 0xFF, 0x90, 0x92, 0xF3, 0xE0, 0xC3, 0x9F, 0x40, 0x02, ++0xC1, 0x9A, 0x90, 0x92, 0xEC, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0xFF, 0x90, 0xFD, 0x11, 0xF0, ++0x90, 0x92, 0xFD, 0xEF, 0xF0, 0xF1, 0x20, 0xF5, 0x83, 0xE0, 0xFE, 0xD1, 0xE1, 0x12, 0xAF, 0xAC, ++0x54, 0x3F, 0xFE, 0x90, 0x92, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0xF9, 0xEE, 0xF0, 0xA3, ++0xF1, 0x35, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF, 0xF1, 0x29, 0x54, 0x03, 0xFE, 0xEF, ++0x24, 0x18, 0x2E, 0xFF, 0x90, 0x92, 0xFE, 0xF0, 0x90, 0x92, 0xED, 0xE0, 0x2F, 0xFF, 0x90, 0x92, ++0xEC, 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x92, 0xF0, 0xD1, 0xC6, 0xC0, 0x07, 0xD1, 0xAB, 0x7D, 0x01, ++0x12, 0x55, 0x36, 0xC0, 0x07, 0xD1, 0xAB, 0x7D, 0x04, 0x12, 0x55, 0x36, 0xAB, 0x07, 0xD0, 0x05, ++0xD0, 0x07, 0x12, 0x5D, 0x98, 0x90, 0x92, 0xF5, 0xEF, 0xD1, 0xAA, 0xE4, 0xFD, 0x12, 0x55, 0x36, ++0xEF, 0x54, 0xFC, 0x90, 0x92, 0xF2, 0xF0, 0x90, 0x92, 0xFE, 0xE0, 0xFF, 0x90, 0x92, 0xEE, 0xE4, ++0x8F, 0xF0, 0x12, 0x07, 0x0A, 0x90, 0x92, 0xEE, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x7A, 0xD0, ++0x90, 0x92, 0xEE, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xD1, 0xD8, 0x7D, 0x0F, 0x12, 0x55, 0x36, 0x90, ++0x92, 0xEE, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x90, 0x92, 0xEC, 0xEC, 0x8D, 0xF0, 0x12, 0x07, 0x0A, ++0x90, 0x85, 0xB7, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xD3, 0x90, 0x92, 0xED, 0xE0, 0x9D, 0x90, 0x92, ++0xEC, 0xE0, 0x9C, 0x40, 0x1B, 0x90, 0x85, 0xB8, 0xE0, 0x24, 0x01, 0xFD, 0x90, 0x85, 0xB7, 0xE0, ++0x34, 0x00, 0xFC, 0xC3, 0x90, 0x92, 0xED, 0xE0, 0x9D, 0xF0, 0x90, 0x92, 0xEC, 0xE0, 0x9C, 0xF0, ++0xEF, 0x30, 0xE6, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x22, 0xF0, 0xEF, 0x30, 0xE7, 0x06, 0x90, 0x01, ++0xC7, 0x74, 0x21, 0xF0, 0xEF, 0x30, 0xE5, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x23, 0xF0, 0x90, 0x92, ++0xF2, 0xE0, 0x24, 0x40, 0x60, 0x04, 0x24, 0x20, 0x70, 0x2C, 0x90, 0x86, 0x75, 0xE0, 0xFF, 0x12, ++0x8D, 0x9B, 0x20, 0xE0, 0x02, 0xC1, 0x1E, 0x90, 0x86, 0x87, 0xE0, 0x04, 0xD1, 0xAA, 0x12, 0x59, ++0x20, 0xEF, 0x70, 0x02, 0xC1, 0x1E, 0x90, 0x92, 0xF2, 0xE0, 0xFF, 0x12, 0x7B, 0x77, 0x90, 0x86, ++0x88, 0xE0, 0x04, 0xF0, 0xC1, 0x1E, 0xF1, 0xDB, 0x30, 0xE0, 0x5A, 0x90, 0x92, 0xF5, 0xE0, 0xFF, ++0x90, 0x92, 0xF1, 0xE0, 0x2F, 0xFF, 0x90, 0x92, 0xF0, 0xE0, 0x34, 0x00, 0xCF, 0x24, 0x08, 0xCF, ++0x34, 0x00, 0xFE, 0x90, 0x92, 0xFB, 0xD1, 0xC6, 0xEF, 0x64, 0x45, 0x70, 0x38, 0xD1, 0xB5, 0x12, ++0xC7, 0xCF, 0xEF, 0x64, 0x01, 0x70, 0x2E, 0xD1, 0xB5, 0x12, 0xC7, 0x92, 0xEF, 0x64, 0x01, 0x70, ++0x24, 0x90, 0x92, 0xFF, 0x04, 0xD1, 0xB4, 0xA3, 0xE0, 0xFD, 0x12, 0xC6, 0xEB, 0xEF, 0x70, 0x0D, ++0x90, 0x92, 0xFD, 0xE0, 0xFD, 0x90, 0xFD, 0x11, 0xD1, 0xB4, 0x12, 0xC7, 0x43, 0x90, 0x92, 0xFD, ++0xE0, 0x90, 0xFD, 0x11, 0xF0, 0xD1, 0xAB, 0x12, 0x59, 0x20, 0xEF, 0x60, 0x18, 0xD1, 0xAB, 0x90, ++0x92, 0xF5, 0xE0, 0xFD, 0x90, 0x92, 0xF8, 0xE0, 0xFB, 0x12, 0x54, 0x02, 0xEF, 0x60, 0x06, 0x90, ++0x92, 0xFF, 0x74, 0x01, 0xF0, 0x90, 0x86, 0x72, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x13, 0xD1, 0xAB, ++0x90, 0x92, 0xF5, 0xE0, 0xFD, 0x12, 0x38, 0x10, 0xEF, 0x60, 0x06, 0x90, 0x92, 0xFF, 0x74, 0x01, ++0xF0, 0x12, 0x8F, 0xF0, 0x54, 0x3F, 0x30, 0xE0, 0x0A, 0xD1, 0xAB, 0x90, 0x92, 0xF5, 0xE0, 0xFD, ++0x12, 0x21, 0xB6, 0x90, 0x86, 0x72, 0xE0, 0xFF, 0x12, 0x8D, 0x9B, 0x30, 0xE0, 0x10, 0x90, 0x92, ++0xFF, 0xE0, 0x70, 0x0A, 0xD1, 0xAB, 0x90, 0x92, 0xF5, 0xE0, 0xFD, 0x12, 0x4A, 0x3F, 0x12, 0x79, ++0x00, 0xEF, 0x64, 0x01, 0x60, 0x07, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x10, 0xD1, 0xCF, 0x30, ++0xE0, 0x06, 0x90, 0x01, 0x3F, 0x74, 0x04, 0xF0, 0x7F, 0x01, 0x12, 0x5F, 0xE9, 0x90, 0x01, 0x3F, ++0xE0, 0x30, 0xE2, 0x02, 0xD1, 0xBE, 0x12, 0x7A, 0xE7, 0xEF, 0x64, 0x01, 0x70, 0x36, 0x90, 0x86, ++0x89, 0xE0, 0x04, 0xF0, 0x12, 0x6F, 0xE5, 0xAD, 0x07, 0xEF, 0x64, 0x01, 0x60, 0x1F, 0xD1, 0xBE, ++0xED, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x42, 0xF0, 0x80, 0x0A, 0xED, 0xB4, 0x04, 0x06, ++0x90, 0x01, 0xC7, 0x74, 0x43, 0xF0, 0x7F, 0x01, 0x12, 0x5F, 0xE9, 0x80, 0x1D, 0xD1, 0xD8, 0x12, ++0x7C, 0x0B, 0x80, 0x0E, 0xD1, 0xCF, 0x20, 0xE0, 0x11, 0x90, 0x86, 0x72, 0xE0, 0x54, 0xFE, 0xF0, ++0x80, 0x08, 0x90, 0x92, 0xF3, 0xE0, 0x04, 0xF0, 0x81, 0x03, 0x74, 0xB2, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0xB3, 0xA3, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x92, 0xF0, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x22, 0xF0, 0x90, 0x92, 0xFB, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x86, ++0x7A, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xFD, 0x02, 0x55, 0x36, 0x90, ++0x86, 0x74, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x22, 0x90, 0x92, 0xEC, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x22, 0x74, 0x00, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0x22, 0xE4, 0xFC, 0xED, 0x2C, ++0x24, 0x00, 0xD1, 0xE4, 0xE4, 0xF0, 0x0C, 0xEC, 0xB4, 0x18, 0xF3, 0xD1, 0xE1, 0xEF, 0xF0, 0xEE, ++0x54, 0x3F, 0xFF, 0xF1, 0x20, 0xF5, 0x83, 0xF1, 0x35, 0x54, 0xF0, 0xF0, 0xF1, 0x29, 0x44, 0x80, ++0xF0, 0x74, 0x0B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, 0x22, ++0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0x22, 0x74, 0x03, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0xFB, 0xF5, 0x83, 0xE0, 0x22, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, ++0x83, 0xE0, 0x22, 0x90, 0x93, 0x1C, 0xEF, 0x71, 0xAB, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, ++0xE7, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x1C, 0xE0, 0x6F, 0x60, 0x33, 0xC3, 0x90, 0x93, 0x1E, 0xE0, ++0x94, 0x88, 0x90, 0x93, 0x1D, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, ++0xF0, 0x22, 0x90, 0x93, 0x1D, 0x12, 0xC8, 0x98, 0xD3, 0x90, 0x93, 0x1E, 0xE0, 0x94, 0x32, 0x90, ++0x93, 0x1D, 0xE0, 0x94, 0x00, 0x40, 0xC2, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xBB, 0x22, 0x12, ++0xC4, 0x44, 0x7F, 0x08, 0x12, 0x7B, 0x51, 0xEF, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x7B, 0x3E, ++0xE4, 0xFF, 0xF1, 0x43, 0x7D, 0x35, 0x7F, 0x27, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xC2, 0xE0, 0x54, ++0xEF, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xC0, 0x71, 0xF1, 0x8F, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0x22, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, ++0xE5, 0x6F, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0x22, 0x90, 0x86, 0x72, 0xE0, 0xC4, ++0x13, 0x13, 0x54, 0x03, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x85, 0x1E, 0xE0, ++0xFF, 0x90, 0x85, 0x1D, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, ++0x48, 0x90, 0x85, 0x1D, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x84, 0xCD, 0x12, 0x05, 0x28, 0xE0, ++0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0xCE, 0xF9, 0x74, 0x84, 0x35, 0xF0, 0xFA, 0x7B, 0x01, ++0xAF, 0x05, 0x12, 0x89, 0x07, 0x90, 0x85, 0x1D, 0x12, 0xB7, 0xC4, 0xB4, 0x0A, 0x02, 0x7F, 0x01, ++0xEF, 0x60, 0x05, 0xE4, 0x90, 0x85, 0x1D, 0xF0, 0x7D, 0x68, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x12, ++0x40, 0xB9, 0x90, 0x84, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x85, ++0xB5, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x85, ++0xB6, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, ++0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x22, 0xC0, 0x01, 0x90, 0x85, 0xB6, 0xE0, 0x75, 0xF0, 0x0F, 0xA4, ++0x24, 0x1F, 0xF9, 0x74, 0x85, 0x35, 0xF0, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, ++0x7F, 0x0F, 0x12, 0x02, 0xD0, 0x7D, 0xCC, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xB6, 0x12, ++0xB7, 0xC4, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x85, 0xB6, 0xF0, 0x22, ++0x90, 0x92, 0x21, 0xEF, 0xF0, 0xA3, 0x12, 0x87, 0x79, 0x90, 0x93, 0x23, 0xE0, 0xFE, 0x04, 0xF0, ++0x90, 0x00, 0x01, 0xEE, 0x12, 0x03, 0x4E, 0x74, 0x00, 0x2F, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, ++0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x92, 0x22, 0x12, 0x87, 0x70, 0x8B, 0x1B, 0x8A, ++0x1C, 0x89, 0x1D, 0x75, 0x1E, 0x02, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x6A, 0x21, 0x90, ++0x92, 0x21, 0xE0, 0x24, 0x02, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, ++0xC0, 0x01, 0xA3, 0x12, 0x87, 0x70, 0xE9, 0x24, 0x02, 0xF9, 0xE4, 0x3A, 0x8B, 0x1B, 0xF5, 0x1C, ++0x89, 0x1D, 0x90, 0x92, 0x22, 0x31, 0x22, 0xF5, 0x1E, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x02, ++0x6A, 0x21, 0x12, 0x87, 0x70, 0x90, 0x00, 0x0E, 0x02, 0x03, 0x0F, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x92, 0x25, 0x12, 0x87, 0x79, 0x7F, 0x96, 0x7E, 0x02, 0x12, 0x66, 0x80, 0xEF, ++0x60, 0x48, 0x12, 0xAC, 0x63, 0xEC, 0x3E, 0xFE, 0xEF, 0x24, 0x01, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, ++0x92, 0x28, 0xEF, 0xF0, 0xEE, 0xFF, 0x90, 0xFD, 0x11, 0xF0, 0x90, 0x92, 0x28, 0xE0, 0xFD, 0x90, ++0x02, 0x94, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x25, 0x31, 0x22, 0x24, 0x02, 0xFF, 0xE4, 0x33, ++0xFE, 0x12, 0x5A, 0xA5, 0x90, 0x92, 0x28, 0xE0, 0x24, 0x18, 0xFF, 0x90, 0x92, 0x25, 0x12, 0x87, ++0x70, 0x12, 0x56, 0xF4, 0x90, 0x02, 0x96, 0x74, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, ++0x48, 0x12, 0xE4, 0xF5, 0x49, 0x75, 0x4A, 0x07, 0x75, 0x4B, 0x32, 0xF5, 0x50, 0x90, 0x01, 0x30, ++0xE5, 0x48, 0xF0, 0xA3, 0xE5, 0x49, 0xF0, 0xA3, 0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, 0xF0, 0x90, ++0x01, 0x20, 0xE5, 0x50, 0xF0, 0x22, 0x75, 0x52, 0x06, 0x75, 0x53, 0x01, 0x75, 0x54, 0x03, 0x75, ++0x55, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x52, 0xF0, 0xA3, 0xE5, 0x53, 0xF0, 0xA3, 0xE5, 0x54, 0xF0, ++0xA3, 0xE5, 0x55, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0xD5, 0xF0, 0x74, 0xB9, 0xA3, ++0xF0, 0x90, 0x92, 0x88, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, ++0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, ++0x0D, 0x80, 0xDE, 0x7F, 0x01, 0x22, 0xE4, 0x90, 0x92, 0x2B, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, ++0x92, 0x2B, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0x06, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xBA, 0xA3, 0xF0, ++0x12, 0x7C, 0x66, 0xBF, 0x01, 0x03, 0x12, 0x5B, 0x25, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0F, 0x90, ++0x85, 0xC8, 0xE0, 0xFF, 0x90, 0x85, 0xC7, 0xE0, 0x6F, 0x60, 0x03, 0x12, 0xA3, 0xAC, 0xC2, 0xAF, ++0x31, 0xD5, 0xBF, 0x01, 0x02, 0x51, 0x70, 0xD2, 0xAF, 0x51, 0xF8, 0x90, 0x92, 0x2C, 0xE4, 0x75, ++0xF0, 0x01, 0x12, 0x07, 0x0A, 0x54, 0x7F, 0x45, 0xF0, 0x70, 0x0D, 0x7F, 0xFF, 0x12, 0x7B, 0x51, ++0xEF, 0x04, 0xFD, 0x7F, 0xFF, 0x12, 0x7B, 0x3E, 0x12, 0x8F, 0xF7, 0x12, 0x84, 0x4D, 0x80, 0x9F, ++0x90, 0x85, 0xC1, 0xE0, 0x30, 0xE0, 0x18, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x30, 0xE0, 0x0E, 0xC3, ++0x13, 0x30, 0xE0, 0x07, 0x71, 0x64, 0xBF, 0x01, 0x06, 0x80, 0x02, 0x80, 0x00, 0x51, 0x90, 0x22, ++0x90, 0x85, 0xC8, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0E, 0x51, 0xA9, 0xBF, 0x01, 0x09, 0x12, ++0xB7, 0xB3, 0x90, 0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x92, 0x84, 0xE0, 0xC3, 0x13, 0x20, ++0xE0, 0x2A, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, ++0x60, 0x05, 0x75, 0x61, 0x01, 0x80, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, ++0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x61, 0x04, 0x80, 0x0D, 0x90, 0x04, 0x1D, 0xE0, ++0x60, 0x05, 0x75, 0x61, 0x40, 0x80, 0x02, 0x80, 0x73, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, ++0x01, 0xB8, 0xE5, 0x61, 0xF0, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x92, 0x90, 0xE0, 0x60, 0x25, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70, 0x61, 0x71, 0x50, 0xEF, 0x44, ++0xFE, 0xFF, 0xEE, 0x44, 0x03, 0xFE, 0xED, 0x44, 0x04, 0xFD, 0xEC, 0x71, 0x50, 0x90, 0x91, 0x66, ++0x12, 0x04, 0xEB, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x71, 0x18, 0x90, 0x92, 0x8B, 0xE0, 0x70, 0x04, ++0x90, 0x07, 0xCC, 0xF0, 0x90, 0x92, 0x93, 0xE0, 0x70, 0x0A, 0x90, 0x92, 0x90, 0xE0, 0x70, 0x04, ++0xA3, 0xE0, 0x60, 0x07, 0x90, 0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0x92, 0x2E, 0x12, 0x04, 0xEB, 0x90, 0x92, 0x2E, 0x02, 0x87, 0x58, 0x90, 0x01, 0xB8, 0xE4, ++0xF0, 0x7F, 0x01, 0x22, 0x90, 0x85, 0xBF, 0xE0, 0x64, 0x02, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x7A, 0x29, 0xEF, 0x64, 0x01, 0x60, 0x05, ++0x75, 0x0F, 0x01, 0x80, 0x51, 0x90, 0x85, 0xC9, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, ++0x02, 0x80, 0x43, 0x90, 0x85, 0xC7, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, ++0x80, 0x34, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, 0x80, 0x2B, 0x90, 0x85, 0xC9, 0xE0, 0x30, ++0xE4, 0x05, 0x75, 0x0F, 0x10, 0x80, 0x1F, 0x90, 0x85, 0xC2, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, ++0xE0, 0x05, 0x75, 0x0F, 0x20, 0x80, 0x0F, 0x90, 0x86, 0x71, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, ++0x80, 0x04, 0x71, 0x5C, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, 0xE5, ++0x0F, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x84, 0xA1, 0x74, 0x02, 0xF0, 0xA3, ++0x74, 0x10, 0xF0, 0x90, 0x84, 0xA7, 0x74, 0x80, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0xE4, 0xFB, ++0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x86, 0x4E, 0x90, 0x92, 0x32, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x84, ++0xC1, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0F, 0x90, ++0x84, 0xC1, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x12, 0x2D, 0xBD, 0x12, 0x92, 0x7E, 0x91, 0x59, ++0x30, 0xE1, 0x06, 0x54, 0xFD, 0xF0, 0x12, 0x60, 0x5D, 0x91, 0x59, 0x30, 0xE2, 0x06, 0x54, 0xFB, ++0xF0, 0x12, 0x6A, 0x6D, 0x91, 0x59, 0x30, 0xE4, 0x0C, 0x54, 0xEF, 0xF0, 0x12, 0x6F, 0x22, 0xBF, ++0x01, 0x03, 0x12, 0xB3, 0xB2, 0xD2, 0xAF, 0x80, 0xB5, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x84, 0xC1, ++0xE0, 0xFF, 0x22, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, ++0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x01, 0xC4, 0x74, 0x64, 0xF0, 0x74, 0xBC, 0xA3, 0xF0, 0x12, 0x6C, 0xBC, 0x74, 0x64, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xBC, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, ++0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, ++0xF0, 0xD0, 0xE0, 0x32, 0x32, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, ++0xC0, 0x05, 0xC0, 0x07, 0x7D, 0xB5, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0xBC, 0xFF, 0xA3, 0xF0, ++0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, ++0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x05, 0xE4, 0xA3, 0xF0, ++0xA3, 0xF0, 0x22, 0x90, 0x88, 0xE7, 0xE0, 0x04, 0xF0, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x30, 0xE0, ++0x05, 0x12, 0x9E, 0xAB, 0x60, 0x1B, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x04, 0xEF, 0x30, 0xE0, 0x0B, ++0x90, 0x85, 0xC8, 0xE0, 0x64, 0x02, 0x60, 0x09, 0x12, 0xA0, 0x76, 0x90, 0x01, 0xE6, 0xE0, 0x04, ++0xF0, 0x22, 0x12, 0x9F, 0xF4, 0x64, 0x01, 0x70, 0x13, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0D, 0x90, ++0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x12, 0x9E, 0x03, 0x22, 0xE4, 0xFF, 0x12, ++0x77, 0x39, 0xBF, 0x01, 0x13, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0D, 0x12, 0x9F, 0x13, 0x64, 0x02, ++0x60, 0x03, 0x02, 0x77, 0x61, 0x12, 0x79, 0x41, 0x22, 0xF1, 0x88, 0x90, 0x92, 0x67, 0xEF, 0xF0, ++0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x57, 0x82, 0x90, 0x92, ++0x67, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, ++0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0xB1, 0x8C, 0xFB, 0x02, 0x51, 0x7D, 0x90, 0x85, 0xD7, 0xE0, ++0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x85, 0xDE, 0xE0, 0x22, 0xE4, 0x90, 0x92, 0x56, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0x90, 0x92, 0x9F, 0x12, 0x87, 0x58, 0x90, 0x92, 0x9B, 0x12, 0x87, 0x64, 0xC3, 0x12, ++0x04, 0xB4, 0x40, 0x50, 0x90, 0x85, 0xC1, 0xE0, 0x90, 0x92, 0x9F, 0x30, 0xE0, 0x14, 0xF1, 0x10, ++0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x90, 0x85, 0xFB, 0xE0, 0x24, 0x04, 0x2F, 0xFF, 0x90, 0x92, 0xD0, ++0x80, 0x0A, 0xF1, 0x10, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x90, 0x92, 0xD1, 0xE0, 0xFE, 0xC3, 0xEF, ++0x9E, 0x90, 0x92, 0x57, 0xF0, 0x90, 0x92, 0x57, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x15, 0x74, ++0xA3, 0x2F, 0xF1, 0x28, 0xE0, 0x04, 0xF0, 0x90, 0x85, 0xDB, 0xE0, 0x04, 0xF0, 0xE0, 0xFD, 0x7F, ++0xFE, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xDB, 0xE0, 0xFF, 0xD3, 0x90, 0x92, 0xD3, 0xE0, 0x9F, 0x90, ++0x92, 0xD2, 0xE0, 0x94, 0x00, 0x40, 0x02, 0xC1, 0xDC, 0xD1, 0xEE, 0xD1, 0xE5, 0x50, 0x1C, 0xD1, ++0xF8, 0x90, 0x92, 0x58, 0xE0, 0xD3, 0x9F, 0x40, 0x0A, 0x90, 0x92, 0x56, 0xE0, 0x90, 0x92, 0x59, ++0xF0, 0x80, 0x08, 0x90, 0x92, 0x56, 0xE0, 0x04, 0xF0, 0x80, 0xE0, 0xD1, 0xEE, 0xD1, 0xE5, 0x50, ++0x2C, 0xD1, 0xF8, 0xC3, 0x90, 0x92, 0xD3, 0xE0, 0x9F, 0xFF, 0x90, 0x92, 0xD2, 0xE0, 0x94, 0x00, ++0xFE, 0x90, 0x92, 0x58, 0xE0, 0xD3, 0x9F, 0xE4, 0x9E, 0x40, 0x0A, 0x90, 0x92, 0x56, 0xE0, 0x90, ++0x92, 0x5A, 0xF0, 0x80, 0x08, 0x90, 0x92, 0x56, 0xE0, 0x04, 0xF0, 0x80, 0xD0, 0x90, 0x92, 0x59, ++0xE0, 0x90, 0x85, 0xE0, 0xF0, 0x90, 0x92, 0x5A, 0xE0, 0x90, 0x85, 0xE1, 0xD1, 0xDD, 0x94, 0x0A, ++0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, 0x85, 0xD8, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x85, 0xD8, ++0xD1, 0xDD, 0x74, 0x0A, 0x9F, 0x90, 0x85, 0xD7, 0xF0, 0x90, 0x85, 0xE0, 0xE0, 0xFF, 0xA3, 0xE0, ++0xC3, 0x9F, 0x90, 0x85, 0xDE, 0xF0, 0x90, 0x85, 0xC1, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x92, 0xD0, ++0x80, 0x03, 0x90, 0x92, 0xD1, 0xE0, 0xFF, 0x90, 0x85, 0xDE, 0xE0, 0x2F, 0x04, 0xF0, 0x90, 0x85, ++0xDE, 0xE0, 0xC3, 0x94, 0x0A, 0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x85, 0xDE, 0xE0, 0x24, 0x02, ++0xF0, 0xB1, 0x8C, 0xFB, 0x12, 0x51, 0x7D, 0xE4, 0xFF, 0x12, 0x69, 0x33, 0x22, 0xF0, 0x90, 0x85, ++0xE0, 0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x92, 0x56, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x22, 0xE4, 0x90, ++0x92, 0x58, 0xF0, 0x90, 0x92, 0x56, 0xF0, 0x22, 0x74, 0xA3, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x92, ++0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x92, 0x58, 0xE0, 0x2F, 0xF0, 0x90, 0x92, 0xD4, 0xE0, 0xFF, 0x22, ++0x12, 0x87, 0x64, 0x90, 0x92, 0x9B, 0x12, 0x87, 0x58, 0x12, 0x87, 0x30, 0x78, 0x0A, 0x12, 0x04, ++0xC5, 0x90, 0x85, 0xDD, 0xE0, 0xFE, 0xC3, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, ++0xE4, 0xFE, 0x74, 0xA3, 0x2E, 0xF1, 0x28, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF4, 0xE4, 0x90, ++0x85, 0xDC, 0xF0, 0x90, 0x85, 0xDB, 0xF0, 0x90, 0x85, 0xDF, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, ++0x74, 0x2D, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0x90, 0x93, 0x1F, 0x12, 0x87, 0x79, 0x12, 0x71, 0x54, ++0x90, 0x85, 0xC5, 0xE0, 0xFF, 0x12, 0x60, 0xD0, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x19, 0x90, 0x93, ++0x1F, 0x12, 0x87, 0x70, 0x12, 0x8D, 0x91, 0x54, 0x0F, 0xFF, 0x12, 0x8C, 0xA8, 0xFD, 0x12, 0x6A, ++0xB8, 0xB1, 0x8C, 0xFB, 0x12, 0x51, 0x7D, 0x22, 0xE4, 0x90, 0x92, 0x69, 0xF0, 0xA3, 0xF0, 0x7F, ++0x83, 0x12, 0x7B, 0x51, 0x90, 0x92, 0x68, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x51, 0xAE, 0x07, ++0x90, 0x92, 0x68, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x92, 0x6A, 0xE0, 0x94, 0x64, ++0x90, 0x92, 0x69, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, ++0x92, 0x68, 0xE0, 0xFF, 0x22, 0x90, 0x92, 0x69, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, 0x80, ++0xBE, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x30, 0xE0, 0x40, 0x90, 0x85, 0xC0, 0xE0, 0x7E, 0x00, 0xB4, ++0x02, 0x02, 0x7E, 0x01, 0x90, 0x85, 0xBF, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, ++0x4E, 0x70, 0x26, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x02, 0x9F, 0x5F, 0x12, 0xA7, 0x47, 0x90, ++0x85, 0xC0, 0xE0, 0xB4, 0x0C, 0x06, 0xE4, 0xFD, 0x7F, 0x08, 0x80, 0x0A, 0x90, 0x85, 0xC0, 0xE0, ++0xB4, 0x04, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x9A, 0x4C, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x7F, 0x02, 0x12, 0x7B, 0x51, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0x12, 0x7B, 0x3E, 0x90, ++0x01, 0x00, 0x74, 0x3F, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0x90, 0x01, 0x01, 0xE0, 0x54, ++0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7D, 0x20, ++0x7F, 0xFF, 0x12, 0x90, 0xDB, 0x11, 0x1A, 0x90, 0x85, 0xBF, 0x74, 0x02, 0xF0, 0x22, 0x11, 0x69, ++0x7D, 0x23, 0x80, 0xEC, 0x12, 0x9F, 0xE5, 0x80, 0xE5, 0x90, 0x05, 0x27, 0xE0, 0x44, 0x40, 0xF0, ++0x22, 0x90, 0x85, 0xC2, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x85, 0xD0, 0xE0, 0xFD, 0x7F, 0x93, 0x12, ++0x7B, 0x3E, 0x90, 0x85, 0xC6, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, ++0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x7F, 0x08, 0x12, 0x7B, 0x51, 0xEF, ++0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, 0x7B, 0x3E, 0x7F, 0x01, 0x12, 0xB7, 0x43, 0x7D, 0x34, 0x7F, ++0x27, 0x12, 0x7B, 0x3E, 0x7F, 0x90, 0x12, 0xAF, 0xA4, 0x7F, 0x90, 0x12, 0x7B, 0x3E, 0x7F, 0x14, ++0x7E, 0x00, 0x02, 0x7C, 0x9F, 0x7D, 0x07, 0xAF, 0x62, 0xED, 0x30, 0xE0, 0x21, 0x75, 0xF0, 0x12, ++0xEF, 0x90, 0x89, 0x44, 0x31, 0x18, 0xEF, 0x90, 0x89, 0x46, 0x31, 0x18, 0xEF, 0x90, 0x89, 0x48, ++0x31, 0x18, 0xEF, 0x90, 0x89, 0x4A, 0x31, 0x18, 0xEF, 0x90, 0x89, 0x4C, 0x31, 0x23, 0xED, 0x30, ++0xE1, 0x09, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x40, 0x31, 0x23, 0xED, 0x30, 0xE2, 0x0C, 0x75, ++0xF0, 0x12, 0xEF, 0x90, 0x89, 0x42, 0x12, 0x05, 0x28, 0xE4, 0xF0, 0x31, 0x2B, 0xE0, 0x54, 0xBF, ++0x44, 0x80, 0xFE, 0x31, 0x2B, 0xEE, 0xF0, 0x22, 0x12, 0x05, 0x28, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, ++0xF0, 0x12, 0x22, 0x12, 0x05, 0x28, 0xE4, 0xF0, 0xA3, 0xF0, 0x22, 0xEF, 0xC4, 0x54, 0xF0, 0x24, ++0x03, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0x90, ++0x89, 0x1B, 0x12, 0x87, 0x79, 0x7B, 0xFF, 0x7A, 0x82, 0x79, 0x00, 0x90, 0x89, 0x1E, 0x12, 0x87, ++0x79, 0x7A, 0x82, 0x79, 0x3F, 0x90, 0x89, 0x21, 0x12, 0x87, 0x79, 0x7A, 0x82, 0x79, 0xE1, 0x90, ++0x89, 0x27, 0x12, 0x87, 0x79, 0x7A, 0x82, 0x79, 0xF5, 0x90, 0x89, 0x2A, 0x12, 0x87, 0x79, 0x7A, ++0x83, 0x79, 0x1D, 0x90, 0x89, 0x2D, 0x12, 0x87, 0x79, 0x7A, 0x83, 0x79, 0x31, 0x90, 0x89, 0x33, ++0x12, 0x87, 0x79, 0x7A, 0x83, 0x79, 0x59, 0x90, 0x89, 0x36, 0x12, 0x87, 0x79, 0x7A, 0x83, 0x79, ++0x81, 0x90, 0x89, 0x39, 0x12, 0x87, 0x79, 0xE4, 0x90, 0x92, 0xD6, 0xF0, 0x90, 0x92, 0x29, 0xF0, ++0x90, 0x92, 0x29, 0xE0, 0xFF, 0xC3, 0x94, 0x05, 0x50, 0x10, 0x74, 0xE7, 0x2F, 0x12, 0x97, 0x0C, ++0xE4, 0xF0, 0x90, 0x92, 0x29, 0xE0, 0x04, 0xF0, 0x80, 0xE6, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, ++0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x92, 0x56, 0xF0, ++0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, ++0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, ++0xF5, 0xE8, 0x12, 0x75, 0xB6, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x7B, ++0x3E, 0x80, 0xFE, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x04, 0x1D, 0xE0, 0x60, ++0x1A, 0x90, 0x05, 0x22, 0xE0, 0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x08, 0xF0, ++0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xC3, 0xEE, 0x94, 0x01, 0x40, 0x0A, 0x0D, 0xED, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0xE4, ++0x2F, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x13, 0xED, 0xF0, 0xA3, ++0xEB, 0xF0, 0x90, 0x93, 0x12, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0xAF, 0x94, 0x90, 0x93, 0x12, ++0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x93, 0x13, 0xE0, 0x60, 0x05, 0x51, 0xFC, 0x44, 0x80, 0xF0, ++0xAF, 0x05, 0x74, 0x20, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, ++0x51, 0xFC, 0x54, 0xC0, 0xF0, 0x90, 0x93, 0x15, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x18, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00, 0x8B, 0xE0, 0xD3, 0x94, 0x03, 0x74, ++0x10, 0x40, 0x07, 0x51, 0xF3, 0x74, 0x04, 0xF0, 0x80, 0x04, 0x51, 0xF3, 0xE4, 0xF0, 0xAF, 0x05, ++0x51, 0xEA, 0xF5, 0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x14, 0xE0, 0x25, 0xE0, 0x25, 0xE0, ++0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0x51, 0xEA, 0xF5, 0x83, 0xEE, 0xF0, 0x74, 0x11, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x74, 0x29, 0x2F, 0x71, 0xC1, 0x54, 0xF7, ++0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0x22, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x21, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xE4, 0x90, 0x92, 0x59, 0xF0, 0xA3, 0xF0, 0x90, ++0x06, 0x32, 0xE0, 0x44, 0x20, 0xF0, 0x12, 0x75, 0xE4, 0xEF, 0x64, 0x01, 0x60, 0x02, 0x61, 0xA7, ++0x90, 0x88, 0xD9, 0xE0, 0xFF, 0x90, 0x93, 0x15, 0x74, 0x0A, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x51, ++0x43, 0x90, 0x92, 0x56, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x56, 0xA3, 0x71, 0xB1, 0xFD, ++0x74, 0x2C, 0x2E, 0x71, 0xCA, 0x90, 0x92, 0x58, 0xEF, 0xF0, 0x90, 0x92, 0x56, 0xA3, 0xE0, 0x24, ++0x28, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xE4, 0xFD, 0x12, 0x52, 0x21, 0x90, 0x92, 0x58, ++0xE0, 0xFF, 0x90, 0x92, 0x57, 0xE0, 0x2F, 0xFF, 0x90, 0x92, 0x56, 0xE0, 0x34, 0x00, 0xCF, 0x24, ++0x30, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0x92, 0x59, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0xAE, 0x22, 0x71, ++0xA8, 0x90, 0x88, 0xD9, 0xE0, 0xFB, 0xE4, 0xFF, 0x12, 0x15, 0x44, 0x71, 0xA8, 0x90, 0x88, 0xD5, ++0xE0, 0xFB, 0x7F, 0x11, 0x12, 0x15, 0x44, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x90, 0x88, 0x88, ++0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, 0x22, 0x90, 0x92, 0x59, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, ++0x22, 0xE0, 0xFE, 0x24, 0x28, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x29, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0xFB, 0x02, 0x5D, 0x98, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x00, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x70, 0x61, 0x90, 0x93, 0x0A, 0x12, 0x04, 0xEB, 0x90, 0x93, ++0x02, 0x12, 0x87, 0x58, 0x12, 0x04, 0xA7, 0x90, 0x93, 0x0A, 0x12, 0x87, 0x64, 0x12, 0x87, 0x3E, ++0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x93, 0x02, 0x12, 0x87, 0x58, 0x90, 0x93, ++0x06, 0x12, 0x87, 0x64, 0x12, 0x87, 0x3E, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, ++0x87, 0x4B, 0x90, 0x93, 0x0E, 0x12, 0x04, 0xEB, 0x90, 0x93, 0x0E, 0x12, 0x87, 0x58, 0x90, 0x91, ++0x66, 0x12, 0x04, 0xEB, 0x90, 0x93, 0x00, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x71, 0x18, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0xC4, 0x74, 0x44, 0xF0, 0x74, 0xC4, 0xA3, 0xF0, 0x7F, 0x90, ++0x12, 0x7B, 0x51, 0xEF, 0x20, 0xE0, 0xF7, 0x74, 0x44, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xC4, ++0xA3, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x01, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x85, 0x79, 0xBC, 0x12, ++0x06, 0xDE, 0x90, 0x85, 0xBC, 0xE0, 0x54, 0xFD, 0xF0, 0xE4, 0x12, 0x96, 0xD3, 0xA3, 0x74, 0x0C, ++0xF0, 0x22, 0x7D, 0x1F, 0x12, 0xAE, 0xA7, 0x54, 0xBF, 0xF0, 0x90, 0x85, 0xBF, 0x74, 0x04, 0xF0, ++0x22, 0x12, 0x9F, 0xE5, 0x80, 0xEC, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0xE4, 0x90, 0x85, ++0xBF, 0xF0, 0x22, 0x91, 0xB1, 0x80, 0xEF, 0x12, 0xAF, 0xDA, 0x80, 0xEA, 0x12, 0x9F, 0xEC, 0x80, ++0xE5, 0xE4, 0xFD, 0xFF, 0x12, 0x90, 0xDB, 0x02, 0x9F, 0xE5, 0x7D, 0x25, 0x12, 0xAE, 0xA7, 0x54, ++0xBF, 0xF0, 0x90, 0x85, 0xBF, 0x74, 0x04, 0xF0, 0x22, 0x12, 0x7A, 0x29, 0xEF, 0x70, 0x03, 0x12, ++0x9E, 0xE8, 0x22, 0xAC, 0x07, 0x90, 0x92, 0x96, 0xE0, 0xF9, 0x30, 0xE0, 0x02, 0xA1, 0x87, 0x90, ++0x85, 0xC1, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x85, 0xFB, 0xE0, 0x24, 0x04, 0x90, 0x85, 0xDA, 0xF0, ++0x90, 0x85, 0xFB, 0xE0, 0x24, 0x03, 0x90, 0x85, 0xD9, 0xF0, 0x80, 0x0D, 0x90, 0x85, 0xDA, 0x74, ++0x02, 0xF0, 0x90, 0x85, 0xD9, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x85, 0xD9, 0xE0, 0xFA, 0x90, 0x85, ++0xD8, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x85, 0xCD, 0xEB, 0xF0, 0x90, 0x85, 0xDA, 0xE0, 0xC3, ++0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x85, 0xCD, 0xF0, 0x90, 0x85, 0xD9, 0xE0, ++0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x85, 0xDD, 0xF0, 0x90, 0x85, 0xDA, 0xE0, 0xFF, 0x24, 0x0A, ++0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x85, 0xDD, 0xB1, 0x8F, 0x98, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, ++0x90, 0x85, 0xDD, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x85, 0xCD, 0xB1, 0x8F, ++0x98, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x85, 0xDD, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x85, ++0xD1, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, ++0xB1, 0x99, 0xE9, 0x54, 0xFD, 0x80, 0x03, 0xE9, 0x44, 0x02, 0x90, 0x92, 0x96, 0xF0, 0x22, 0xE0, ++0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x22, 0x90, 0x85, 0xD1, 0xA3, 0xE0, 0x90, 0x05, ++0x58, 0xF0, 0x22, 0x90, 0x92, 0xD0, 0x74, 0x04, 0xF0, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0xE4, 0xF0, ++0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x12, 0xA7, 0x94, 0x40, 0x2B, ++0x90, 0x85, 0xDF, 0xE0, 0x04, 0xF0, 0x90, 0x92, 0xD5, 0xE0, 0xFF, 0x90, 0x85, 0xDF, 0xE0, 0xD3, ++0x9F, 0x50, 0x18, 0x90, 0x85, 0xD7, 0xE0, 0x04, 0x12, 0x9D, 0xDE, 0x90, 0x85, 0xDE, 0xF0, 0xFB, ++0x90, 0x85, 0xD7, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x51, 0x7D, 0x22, 0x90, 0x92, 0x7B, 0xEF, ++0xF0, 0x90, 0x84, 0xC5, 0xE0, 0x64, 0x02, 0x70, 0x1F, 0x90, 0x92, 0x7B, 0xE0, 0xFD, 0x64, 0x01, ++0x70, 0x32, 0x12, 0xB6, 0xBE, 0x12, 0x8D, 0x97, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x4D, 0xE0, 0x64, ++0x80, 0xF0, 0x80, 0x20, 0xAF, 0x05, 0x80, 0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x7F, 0x64, ++0x7E, 0x00, 0x12, 0x7C, 0x9F, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x92, 0x7B, 0xE0, ++0xFF, 0x12, 0x2A, 0x87, 0x90, 0x88, 0xE1, 0xE0, 0x54, 0xFE, 0xF0, 0x02, 0xAF, 0x9C, 0x90, 0x92, ++0x7C, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x92, 0x80, 0xF0, 0x7D, 0x09, 0x12, 0x55, 0x36, ++0xEF, 0x64, 0x06, 0x70, 0x2A, 0xD1, 0xD3, 0x7D, 0x14, 0x12, 0x55, 0x36, 0xEF, 0x70, 0x20, 0xD1, ++0xD3, 0x7D, 0x15, 0x12, 0x55, 0x36, 0xEF, 0x64, 0x50, 0x70, 0x14, 0xD1, 0xD3, 0x7D, 0x21, 0x12, ++0x55, 0x36, 0xEF, 0x20, 0xE0, 0x03, 0x30, 0xE2, 0x06, 0x90, 0x92, 0x80, 0x74, 0x01, 0xF0, 0x90, ++0x86, 0x73, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x3F, 0xD1, 0xD3, 0x7D, 0x09, 0x12, 0x55, ++0x36, 0xEF, 0x64, 0x11, 0x70, 0x33, 0x90, 0x92, 0x7D, 0xE0, 0x24, 0x14, 0xFF, 0x90, 0x92, 0x7C, ++0xE0, 0x34, 0x00, 0xFE, 0x90, 0x92, 0x7E, 0xF0, 0xA3, 0xEF, 0xF0, 0x7D, 0x02, 0x12, 0x55, 0x36, ++0xEF, 0x70, 0x16, 0x90, 0x92, 0x7E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7D, 0x03, 0x12, 0x55, 0x36, ++0xBF, 0x89, 0x06, 0x90, 0x92, 0x80, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x80, 0xE0, 0xFF, 0xD1, 0xDC, ++0xEF, 0xF0, 0x22, 0x90, 0x92, 0x7C, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x84, 0xBF, 0xA3, ++0xE0, 0x24, 0x7F, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xF1, 0x31, 0xA3, 0xED, 0xF0, ++0x90, 0x88, 0x7C, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x60, 0x23, 0xE4, 0x90, 0x92, 0x36, 0xF0, 0xF1, ++0x3A, 0x50, 0x1D, 0xF1, 0x7E, 0x24, 0x8A, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0x6F, ++0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x92, 0x36, 0xE0, 0x04, 0xF0, 0x80, 0xE2, 0x7F, 0x00, 0x22, ++0x90, 0x06, 0x32, 0xE0, 0x44, 0x40, 0xF0, 0xE4, 0x90, 0x88, 0x88, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, ++0x22, 0x90, 0x92, 0x33, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x90, 0x92, 0x36, 0xE0, 0xFD, 0xC3, ++0x94, 0x02, 0x22, 0xF1, 0x31, 0xA3, 0xED, 0xF0, 0xE4, 0xA3, 0xF0, 0xF1, 0x3A, 0x50, 0x17, 0xF1, ++0x7E, 0x24, 0xAA, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0xB5, 0x07, 0x1D, 0x90, 0x92, ++0x36, 0xE0, 0x04, 0xF0, 0x80, 0xE5, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x01, 0xC7, ++0x74, 0x30, 0xF0, 0x7F, 0x01, 0x12, 0x5F, 0xE9, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x92, ++0x33, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xED, 0x24, 0x1C, 0xFD, 0x12, 0x55, 0x36, 0x90, 0x92, 0x36, ++0xE0, 0x22, 0xF1, 0x31, 0x24, 0x16, 0xFF, 0xE4, 0x3E, 0xFE, 0xE4, 0xFD, 0x12, 0x55, 0x36, 0x90, ++0x88, 0x86, 0xA3, 0xE0, 0xB5, 0x07, 0x19, 0x90, 0x92, 0x34, 0xE0, 0x24, 0x16, 0xF1, 0xC6, 0x7D, ++0x01, 0x12, 0x55, 0x36, 0xEF, 0xFD, 0x90, 0x88, 0x86, 0xE0, 0x6D, 0x70, 0x01, 0xE4, 0x60, 0x03, ++0x7F, 0x00, 0x22, 0x7F, 0x01, 0x22, 0xFF, 0x90, 0x92, 0x33, 0xE0, 0x34, 0x00, 0xFE, 0x22, 0xF1, ++0x31, 0xE4, 0xA3, 0xF0, 0x90, 0x92, 0x35, 0xE0, 0xFD, 0xC3, 0x94, 0x04, 0x50, 0x27, 0x90, 0x92, ++0x34, 0xE0, 0x24, 0x10, 0xF1, 0xC6, 0x12, 0x55, 0x36, 0x90, 0x92, 0x35, 0xE0, 0x24, 0x82, 0xF5, ++0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0x6F, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x92, 0x35, ++0xE0, 0x04, 0xF0, 0x80, 0xCF, 0x7F, 0x01, 0x22, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE4, 0x93, 0xFF, 0x74, 0x01, 0x93, 0x90, 0x92, 0x41, 0xCF, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x3F, 0xE5, 0x66, 0xF0, 0xA3, 0xE5, 0x67, 0xF0, 0x22, 0x90, 0x05, ++0x63, 0xE0, 0x90, 0x92, 0x9F, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x92, 0xA0, 0xF0, 0x90, 0x05, ++0x61, 0xE0, 0x90, 0x92, 0xA1, 0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x92, 0xA2, 0xF0, 0x90, 0x92, ++0x96, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x92, 0x78, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, ++0x90, 0x92, 0x76, 0xE0, 0xFF, 0x12, 0x65, 0x61, 0x90, 0x92, 0x78, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x02, 0x50, 0xD7, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, ++0x22, 0x74, 0xD7, 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, 0x75, 0xF0, 0x12, ++0x90, 0x89, 0x3C, 0x12, 0x05, 0x28, 0xE0, 0x22, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, 0x7F, ++0x14, 0x7E, 0x00, 0x02, 0x7C, 0x9F, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, 0xE4, 0x34, ++0x82, 0xF5, 0x83, 0x22, 0xC4, 0x54, 0xF0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, ++0xE0, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x85, 0xC7, 0xE0, 0x90, 0x01, 0xBB, 0x22, 0xF0, ++0x74, 0xCC, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, 0x74, 0xBC, 0x25, 0x62, 0xF5, ++0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, 0x90, 0x92, 0x41, 0xE4, 0xF0, 0xA3, 0x22, 0x90, 0x92, ++0x07, 0x12, 0x87, 0x79, 0x02, 0x02, 0xF6, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0x02, 0x03, 0xED, ++0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x92, 0x41, 0xCF, 0x22, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, ++0x22, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x22, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E, ++0x22, 0x12, 0x02, 0xF6, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, 0x85, 0xC9, 0xE0, 0x44, 0x10, 0xF0, ++0x22, 0xF9, 0xE4, 0x3A, 0xFA, 0x02, 0x02, 0xF6, 0xE5, 0x68, 0xF0, 0xA3, 0xE5, 0x69, 0xF0, 0x22, ++0x90, 0x00, 0x02, 0x12, 0x04, 0x18, 0xFF, 0x22, 0x7D, 0x05, 0x7F, 0x04, 0x02, 0x97, 0x1A, 0x00, ++0x18, 0x19, ++}; ++u4Byte ArrayLength_MP_8188F_FW_NIC = 18802; ++ ++ ++void ++ODM_ReadFirmware_MP_8188F_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188F_FW_NIC; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188F_FW_NIC, ArrayLength_MP_8188F_FW_NIC); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188F_FW_NIC; ++} ++ ++ ++u1Byte Array_MP_8188F_FW_WoWLAN[] = { ++0xF1, 0x88, 0x30, 0x00, 0x01, 0x00, 0x07, 0x00, 0x10, 0x22, 0x17, 0x28, 0x30, 0x49, 0x02, 0x00, ++0xE7, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x86, 0xAD, 0x02, 0xBD, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xA6, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xBD, 0x56, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xBD, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xB9, 0x34, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0xBD, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x87, 0xBB, 0x02, 0x88, 0xE7, 0x02, 0x80, 0x86, 0x02, 0x80, 0x89, 0x02, 0x80, 0x8C, 0x02, ++0x9D, 0x7E, 0x02, 0xB9, 0x12, 0x02, 0x80, 0x95, 0x02, 0x80, 0x98, 0x02, 0x80, 0x9B, 0x02, 0x80, ++0x9E, 0x02, 0x80, 0xA1, 0x02, 0x80, 0xA4, 0x02, 0x80, 0xA7, 0x02, 0x80, 0xAA, 0x02, 0x80, 0xAD, ++0x02, 0x80, 0xB0, 0x02, 0x89, 0xB5, 0x02, 0x80, 0xB6, 0x02, 0x80, 0xB9, 0x02, 0xB0, 0x4D, 0x02, ++0xB1, 0x2A, 0x02, 0xB0, 0xAF, 0x02, 0xAF, 0x6D, 0x02, 0xA8, 0x68, 0x02, 0xAF, 0xE4, 0x02, 0x80, ++0xCE, 0x02, 0x80, 0xD1, 0x02, 0xC6, 0x0A, 0x02, 0x80, 0xD7, 0x00, 0x00, 0x00, 0x02, 0x80, 0xDD, ++0x02, 0x80, 0xE0, 0x02, 0x80, 0xE3, 0x02, 0x80, 0xE6, 0x02, 0xC5, 0xB3, 0x02, 0x80, 0xEC, 0x02, ++0x80, 0xEF, 0x02, 0x80, 0xF2, 0x02, 0x80, 0xF5, 0x02, 0x80, 0xF8, 0x02, 0x80, 0xFB, 0x02, 0x80, ++0xFE, 0x02, 0x81, 0x01, 0x02, 0x81, 0x04, 0x02, 0x81, 0x07, 0x02, 0x81, 0x0A, 0x02, 0x81, 0x0D, ++0x02, 0x81, 0x10, 0x02, 0x81, 0x13, 0x02, 0x81, 0x16, 0x02, 0x81, 0x19, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x02, 0xB3, 0xE4, 0x02, 0xB5, 0xB4, 0x02, 0x90, 0xE8, 0x02, 0x90, 0xDD, ++0x02, 0x81, 0x40, 0x02, 0x9E, 0xDE, 0x02, 0xC4, 0x21, 0x02, 0x81, 0x49, 0x02, 0x81, 0x4C, 0x02, ++0x81, 0x4F, 0x02, 0x81, 0x52, 0x02, 0x81, 0x55, 0x02, 0x81, 0x58, 0x02, 0x81, 0x5B, 0x02, 0x91, ++0x46, 0x02, 0x81, 0x61, 0x02, 0x81, 0x64, 0x02, 0xC4, 0x9A, 0x02, 0xC5, 0x6A, 0x02, 0xBC, 0x1A, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, ++0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, ++0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, ++0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, ++0x08, 0x03, 0x03, 0x00, 0x04, 0x09, 0x07, 0x03, 0x03, 0x00, 0x04, 0x08, 0x06, 0x03, 0x02, 0x00, ++0x04, 0x08, 0x05, 0x03, 0x01, 0x00, 0x04, 0x0D, 0x0A, 0x07, 0x05, 0x00, 0x08, 0x0C, 0x0A, 0x07, ++0x04, 0x00, 0x08, 0x0B, 0x0A, 0x06, 0x05, 0x00, 0x08, 0x0B, 0x0A, 0x05, 0x03, 0x00, 0x08, 0x0B, ++0x0A, 0x03, 0x02, 0x00, 0x08, 0x14, 0x12, 0x0C, 0x04, 0x00, 0x10, 0x14, 0x12, 0x09, 0x04, 0x00, ++0x10, 0x24, 0x22, 0x1C, 0x12, 0x00, 0x20, 0x24, 0x22, 0x18, 0x0C, 0x00, 0x20, 0x24, 0x22, 0x14, ++0x06, 0x00, 0x20, 0x24, 0x22, 0x0F, 0x04, 0x00, 0x20, 0x24, 0x21, 0x0A, 0x04, 0x00, 0x20, 0x23, ++0x21, 0x0C, 0x04, 0x00, 0x20, 0x23, 0x1F, 0x0A, 0x04, 0x00, 0x20, 0x22, 0x1F, 0x0F, 0x04, 0x00, ++0x20, 0x21, 0x1F, 0x16, 0x0C, 0x00, 0x20, 0x31, 0x2F, 0x20, 0x14, 0x00, 0x30, 0x31, 0x2F, 0x18, ++0x10, 0x00, 0x30, 0x31, 0x2C, 0x18, 0x0C, 0x00, 0x30, 0x31, 0x2A, 0x14, 0x0C, 0x00, 0x30, 0x31, ++0x28, 0x14, 0x00, 0x00, 0x30, 0x31, 0x24, 0x14, 0x00, 0x00, 0x30, 0x31, 0x1E, 0x14, 0x00, 0x00, ++0x30, 0x02, 0x02, 0x03, 0x04, 0x04, 0x08, 0x09, 0x09, 0x0C, 0x0E, 0x10, 0x12, 0x02, 0x09, 0x0B, ++0x0E, 0x0D, 0x0F, 0x10, 0x12, 0x00, 0x04, 0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x23, 0x00, ++0x2D, 0x00, 0x50, 0x00, 0x91, 0x00, 0xC3, 0x01, 0x27, 0x01, 0x31, 0x01, 0x5E, 0x00, 0x8C, 0x00, ++0xC8, 0x00, 0xDC, 0x01, 0x5E, 0x01, 0x68, 0x01, 0x9A, 0x01, 0xCC, 0x01, 0xEA, 0x02, 0x02, 0x04, ++0x08, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6C, 0x14, 0x28, 0x32, 0x50, 0x78, 0xA0, 0xC8, ++0xE6, 0x01, 0x01, 0x01, 0x02, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x02, 0x04, 0x06, ++0x07, 0x07, 0x08, 0x08, 0x08, 0x01, 0x01, 0x01, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x02, 0x03, 0x03, 0x04, 0x05, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x03, 0x03, 0x03, ++0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ++0x02, 0x19, 0x06, 0x04, 0x02, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x84, 0x04, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x87, 0xB5, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x87, 0xB5, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x84, 0x4D, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x84, 0x4C, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x32, 0x50, 0x30, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x27, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x25, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x14, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x15, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0xD2, 0xA9, 0x02, 0x84, 0x4D, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, ++0xC2, 0xAF, 0x56, 0xC6, 0xD2, 0xAF, 0xD2, 0xA9, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0x02, 0x86, 0xEB, ++0x02, 0x84, 0xDD, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, 0xF2, ++0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, ++0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, ++0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x87, 0xA8, 0xE4, 0x7E, ++0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, ++0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, 0xA3, ++0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, ++0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0xBE, ++0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xFE, 0xED, 0x99, 0xFD, 0xEC, 0x98, 0xFC, 0x22, 0xEF, 0x5B, ++0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, 0xEC, 0x58, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, ++0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x22, 0xE0, 0xF8, 0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, ++0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, ++0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, ++0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, ++0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0x41, 0x93, 0x22, 0x00, 0x41, 0x93, 0x23, 0x00, ++0x41, 0x93, 0x28, 0x00, 0x00, 0x9A, 0x48, 0xB1, 0x91, 0xB8, 0xAD, 0x90, 0x93, 0x26, 0xEF, 0xF0, ++0x7F, 0x02, 0xD1, 0x27, 0x90, 0x84, 0xC1, 0xE0, 0xFF, 0x90, 0x93, 0x26, 0xE0, 0xFE, 0xEF, 0x4E, ++0x90, 0x84, 0xC1, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x5B, 0x12, 0x02, 0xF6, 0x25, 0x5B, ++0x90, 0x84, 0xC6, 0x12, 0x8D, 0x73, 0x25, 0x5B, 0x90, 0x84, 0xC7, 0x12, 0x8C, 0x7F, 0x25, 0x5B, ++0x90, 0x84, 0xC8, 0x12, 0x8F, 0xED, 0x25, 0x5B, 0x90, 0x84, 0xC9, 0xF0, 0x90, 0x00, 0x04, 0x12, ++0x03, 0x0F, 0x25, 0x5B, 0x90, 0x84, 0xCA, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x03, 0x0F, 0x25, 0x5B, ++0x90, 0x84, 0xCB, 0xF0, 0x11, 0x1D, 0x25, 0x5B, 0x90, 0x84, 0xCC, 0xF0, 0x22, 0x90, 0x00, 0x06, ++0x02, 0x03, 0x0F, 0x12, 0xC8, 0xCC, 0xFF, 0x54, 0x7F, 0x90, 0x85, 0xC5, 0xF0, 0xEF, 0xB1, 0x6B, ++0xA3, 0xB1, 0x73, 0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0x85, 0xC3, 0xE0, 0x54, 0xF0, ++0x4F, 0xF1, 0xED, 0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xFD, 0x4F, ++0xF0, 0xEC, 0x54, 0x02, 0x25, 0xE0, 0xFF, 0x90, 0x92, 0x96, 0xE0, 0x54, 0xFB, 0x4F, 0xF0, 0xED, ++0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x12, 0x9F, 0xE5, 0x91, 0x7E, 0x90, 0x85, 0xC4, 0xF0, 0x11, ++0x1D, 0x30, 0xE0, 0x4E, 0xC3, 0x13, 0x54, 0x07, 0xFF, 0xC3, 0x94, 0x04, 0x90, 0x85, 0xD8, 0x50, ++0x04, 0xEF, 0xF0, 0x80, 0x26, 0x74, 0x03, 0xF0, 0x31, 0xAF, 0xE9, 0x24, 0x06, 0x12, 0xC9, 0x07, ++0xFF, 0x74, 0x03, 0x24, 0xFD, 0xFE, 0xEF, 0xC4, 0x54, 0x0F, 0xFD, 0xEF, 0x54, 0x0F, 0xFF, 0xED, ++0x2E, 0x54, 0x0F, 0xFE, 0xC4, 0x54, 0xF0, 0x4F, 0x12, 0x03, 0x3C, 0x31, 0xAF, 0x11, 0x1D, 0xC4, ++0x54, 0x0F, 0xFF, 0xC3, 0x94, 0x04, 0x90, 0x85, 0xCD, 0x50, 0x05, 0x74, 0x04, 0xF0, 0x80, 0x02, ++0xEF, 0xF0, 0x31, 0xAF, 0x90, 0x00, 0x04, 0x12, 0x03, 0x0F, 0xFD, 0x7F, 0x02, 0x12, 0x57, 0x82, ++0x31, 0xAF, 0x12, 0x71, 0xCB, 0x12, 0xBA, 0x2E, 0xF0, 0x90, 0x85, 0xC5, 0x12, 0xC8, 0x84, 0x12, ++0x9F, 0xE4, 0x90, 0x01, 0xBE, 0xF0, 0x22, 0x90, 0x92, 0x04, 0x12, 0x87, 0x79, 0x90, 0x92, 0x03, ++0xEF, 0xF0, 0x12, 0x87, 0x82, 0x89, 0x38, 0x00, 0x89, 0x3D, 0x01, 0x89, 0x42, 0x03, 0x89, 0x47, ++0x04, 0x89, 0x4C, 0x12, 0x89, 0x51, 0x14, 0x89, 0x56, 0x20, 0x89, 0x5A, 0x24, 0x89, 0x5F, 0x25, ++0x89, 0x64, 0x27, 0x89, 0x69, 0x40, 0x89, 0x6D, 0x42, 0x89, 0xA2, 0x47, 0x89, 0xA2, 0x49, 0x89, ++0x76, 0x80, 0x89, 0x72, 0x81, 0x89, 0x7A, 0x82, 0x89, 0x7F, 0x83, 0x89, 0x84, 0x84, 0x89, 0x89, ++0x88, 0x89, 0x8E, 0xC3, 0x00, 0x00, 0x89, 0x93, 0x31, 0xA3, 0x02, 0x87, 0xD5, 0x31, 0xA3, 0x02, ++0x90, 0x02, 0x31, 0xA3, 0x02, 0x78, 0x94, 0x31, 0xA3, 0x02, 0x6B, 0x03, 0x31, 0xA3, 0x02, 0x97, ++0xFE, 0x31, 0xA3, 0x02, 0xA0, 0x13, 0x31, 0xA3, 0x01, 0x23, 0x31, 0xA3, 0x02, 0x9C, 0x14, 0x31, ++0xA3, 0x02, 0xA0, 0x22, 0x31, 0xA3, 0x02, 0xA0, 0x2A, 0x31, 0xA3, 0x80, 0x48, 0x31, 0xA3, 0x02, ++0x4E, 0x29, 0x31, 0xA3, 0xA1, 0x87, 0x31, 0xA3, 0x81, 0x86, 0x31, 0xA3, 0x02, 0x7A, 0xFE, 0x31, ++0xA3, 0x02, 0x6F, 0x63, 0x31, 0xA3, 0x02, 0x6F, 0xA4, 0x31, 0xA3, 0x02, 0x7B, 0xD0, 0x31, 0xA3, ++0x02, 0x9A, 0x35, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x92, 0x03, 0xE0, 0x90, 0x01, ++0xC2, 0xF0, 0x22, 0x90, 0x92, 0x04, 0x02, 0x87, 0x70, 0x24, 0x03, 0xFF, 0xE4, 0x33, 0xFE, 0x90, ++0x92, 0x07, 0x02, 0x87, 0x70, 0x90, 0x92, 0x07, 0x12, 0x87, 0x79, 0x31, 0xAF, 0x12, 0x02, 0xF6, ++0x54, 0x7F, 0xFD, 0xB1, 0x74, 0xFE, 0x54, 0x1F, 0x90, 0x92, 0x0B, 0xF0, 0xEE, 0x54, 0x80, 0xB1, ++0x6B, 0x90, 0x92, 0x0A, 0x91, 0x7F, 0xFE, 0x54, 0x03, 0xFC, 0xEE, 0x54, 0x30, 0xC4, 0x54, 0x0F, ++0x90, 0x92, 0x0D, 0x91, 0x7F, 0xFE, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x92, 0x0C, ++0xF0, 0xEE, 0x54, 0x80, 0xB1, 0x6B, 0xFF, 0x91, 0x80, 0xFB, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x90, 0x92, 0x0F, 0xF0, 0xFA, 0xEB, 0x54, 0x04, 0x13, 0x13, 0x54, 0x3F, 0xA3, 0xF0, 0xEF, ++0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0x71, 0x17, 0x54, 0x7F, 0x4F, 0xF0, 0x90, 0x92, ++0x0C, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0x71, 0x17, 0x54, 0xBF, 0x4F, 0xF0, 0xEA, ++0x60, 0x02, 0x61, 0x16, 0x90, 0x92, 0x0B, 0xE0, 0x54, 0x1F, 0xFF, 0x75, 0xF0, 0x12, 0xED, 0xB1, ++0x7F, 0x54, 0xE0, 0x4F, 0xF0, 0xEC, 0x54, 0x03, 0x71, 0x17, 0x54, 0xFC, 0x4F, 0xF0, 0xEC, 0x54, ++0x03, 0x25, 0xE0, 0x25, 0xE0, 0x71, 0x17, 0x54, 0xF3, 0x4F, 0xF0, 0x90, 0x92, 0x0A, 0xE0, 0x54, ++0x01, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x75, 0xF0, 0x12, 0xED, 0xB1, 0x7F, 0x54, 0xDF, 0x4F, 0xF0, ++0x90, 0x92, 0x0D, 0xE0, 0x54, 0x03, 0xC4, 0x54, 0xF0, 0x71, 0x17, 0x54, 0xCF, 0x4F, 0x12, 0xC8, ++0xAD, 0xE0, 0x54, 0xFB, 0x12, 0xC8, 0xAD, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x92, 0x10, ++0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0xEF, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0x92, 0x90, ++0xE0, 0x60, 0x30, 0x31, 0xAF, 0xE9, 0x24, 0x03, 0x12, 0xC9, 0x07, 0x54, 0x1F, 0x12, 0x03, 0x3C, ++0x90, 0x92, 0x0E, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x0E, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x13, ++0xEF, 0x31, 0xA9, 0x8F, 0x82, 0x8E, 0x83, 0xE4, 0x12, 0x03, 0x4E, 0x90, 0x92, 0x0E, 0xE0, 0x04, ++0xF0, 0x80, 0xE3, 0x90, 0x92, 0x8E, 0xE0, 0x54, 0x07, 0xFF, 0xBF, 0x05, 0x0A, 0xEC, 0xB4, 0x01, ++0x06, 0x90, 0x92, 0x93, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x92, 0x0E, 0xF0, 0x90, 0x92, 0x0E, 0xE0, ++0xFC, 0x31, 0xA9, 0x8F, 0x82, 0x8E, 0x83, 0x12, 0x03, 0x0F, 0xFF, 0xED, 0x12, 0xC8, 0x3F, 0xE5, ++0x82, 0x2C, 0x12, 0xA8, 0x60, 0xEF, 0xF0, 0x90, 0x92, 0x0E, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x04, ++0xDB, 0xAF, 0x05, 0x12, 0x17, 0x8E, 0x22, 0xFF, 0x75, 0xF0, 0x12, 0xED, 0x90, 0x89, 0x3F, 0x12, ++0x05, 0x28, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xF1, 0x80, 0x20, 0xE6, 0x02, ++0x81, 0x45, 0x90, 0x00, 0x8C, 0xE0, 0x90, 0x93, 0x19, 0xF0, 0x7F, 0x8D, 0x12, 0x7B, 0x51, 0x90, ++0x93, 0x1A, 0xEF, 0xF0, 0x90, 0x00, 0x8E, 0xE0, 0x90, 0x93, 0x1B, 0xF0, 0x90, 0x93, 0x1A, 0xE0, ++0x24, 0xFC, 0x60, 0x0F, 0x24, 0x03, 0x60, 0x02, 0x81, 0x3E, 0x90, 0x93, 0x19, 0xE0, 0xFF, 0xF1, ++0x87, 0x81, 0x3E, 0x90, 0x93, 0x19, 0xE0, 0x24, 0xDC, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, ++0xE0, 0xFB, 0xE4, 0xFD, 0xFF, 0x91, 0x77, 0x75, 0xF0, 0x12, 0x71, 0x1C, 0x13, 0x13, 0x54, 0x03, ++0xFB, 0x0D, 0xE4, 0xFF, 0x91, 0x77, 0x75, 0xF0, 0x12, 0x71, 0x1C, 0xB1, 0x6B, 0xFB, 0x0D, 0xE4, ++0xFF, 0x91, 0x77, 0x75, 0xF0, 0x12, 0x71, 0x1C, 0xC4, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0x91, ++0x77, 0x12, 0xC8, 0x4D, 0xFB, 0xE4, 0xFD, 0x0F, 0x91, 0x77, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x3D, ++0x12, 0x05, 0x28, 0x91, 0x74, 0x75, 0xF0, 0x12, 0xB1, 0x7F, 0xC4, 0x13, 0x54, 0x01, 0xFB, 0x0D, ++0x7F, 0x01, 0x91, 0x77, 0x75, 0xF0, 0x12, 0xB1, 0x7F, 0x54, 0x1F, 0x91, 0x75, 0x12, 0xC8, 0x3F, ++0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x91, 0x77, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x01, 0xF5, 0x82, 0xE4, ++0x34, 0x82, 0x91, 0x72, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x91, ++0x72, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x91, 0x72, 0x75, 0xF0, ++0x08, 0xA4, 0x24, 0x04, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, ++0x91, 0x77, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x91, 0x72, 0x75, ++0xF0, 0x08, 0xA4, 0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x91, 0x72, 0x75, 0xF0, 0x08, 0xA4, ++0x24, 0x07, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFB, 0x0D, 0x91, 0x4A, 0xF1, 0x80, ++0x30, 0xE0, 0x02, 0xF1, 0xFB, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, ++0x16, 0xEF, 0xB4, 0x01, 0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, ++0x06, 0xEF, 0xB4, 0x03, 0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, ++0xF0, 0x22, 0xF5, 0x83, 0xE0, 0xFB, 0x0D, 0x91, 0x4A, 0x90, 0x93, 0x19, 0xE0, 0x22, 0x4F, 0xF0, ++0x90, 0x00, 0x02, 0x02, 0x03, 0x0F, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xC8, 0xCC, ++0x20, 0xE0, 0x05, 0x12, 0xB6, 0x52, 0xA1, 0x62, 0x31, 0xAF, 0x12, 0xC8, 0x99, 0x90, 0x86, 0x75, ++0xD1, 0x13, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0xF1, 0x5C, 0x12, 0xC8, 0xE7, 0xD1, 0x21, 0x54, ++0x10, 0xFD, 0xEF, 0x54, 0xEF, 0xF1, 0x5C, 0x12, 0xC8, 0xEF, 0xD1, 0x21, 0x54, 0x40, 0xFD, 0xEF, ++0x54, 0xBF, 0xF1, 0x5C, 0x12, 0xC8, 0xF7, 0xB1, 0x73, 0x54, 0x80, 0xFF, 0x90, 0x86, 0x76, 0xE0, ++0x54, 0x7F, 0x4F, 0xF0, 0x12, 0xC8, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x04, ++0xF0, 0x31, 0xAF, 0x12, 0x02, 0xF6, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x06, ++0x90, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x84, 0xC5, 0xE0, 0xB4, 0x02, 0x05, 0xB1, 0x67, 0x20, 0xE0, ++0x3E, 0xB1, 0x74, 0x54, 0x7F, 0xFF, 0x90, 0x86, 0x76, 0xE0, 0x54, 0x80, 0x91, 0x7E, 0x90, 0x86, ++0x77, 0xF1, 0xED, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x86, 0x78, 0x12, 0xC8, 0x91, 0x54, 0xFE, 0xFF, ++0xEE, 0x54, 0x01, 0x4F, 0xF0, 0x90, 0x86, 0x76, 0xE0, 0x54, 0x7F, 0xFF, 0x90, 0x86, 0x75, 0xE0, ++0xFE, 0xC4, 0x13, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x12, 0x54, 0x9F, 0x90, ++0x84, 0xC5, 0xE0, 0xB4, 0x01, 0x07, 0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x87, 0x4A, ++0x74, 0x05, 0xF0, 0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x87, 0x79, 0x95, 0x12, ++0x06, 0xDE, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x86, 0x76, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, ++0x01, 0x22, 0x4F, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x03, 0x0F, 0x75, 0xF0, 0x12, 0xE5, 0x6E, 0x90, ++0x89, 0x3E, 0x12, 0x05, 0x28, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xC8, ++0x99, 0x90, 0x86, 0x72, 0xD1, 0x13, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0xF1, 0x54, 0x12, 0xC8, ++0xE7, 0xD1, 0x21, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0xF1, 0x54, 0x12, 0xC8, 0xEF, 0xD1, 0x21, ++0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0xF1, 0x54, 0x12, 0xC8, 0xF7, 0x91, 0x7F, 0x54, 0x01, 0xFF, ++0x90, 0x86, 0x74, 0xE0, 0x54, 0xFE, 0xB1, 0x72, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x86, 0x73, 0x12, ++0xC8, 0x91, 0x54, 0x04, 0xFF, 0xEE, 0x54, 0xFB, 0x4F, 0xF0, 0x90, 0x86, 0x72, 0xE0, 0xC3, 0x13, ++0x54, 0x01, 0xFF, 0x12, 0x7C, 0x72, 0xF1, 0xF4, 0x54, 0x01, 0xFF, 0x12, 0x7C, 0x7E, 0xF1, 0xF4, ++0x13, 0x54, 0x01, 0xFF, 0x12, 0x66, 0xDA, 0x90, 0x86, 0x72, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01, ++0xFF, 0x12, 0xC1, 0x11, 0x90, 0x86, 0x72, 0xE0, 0x54, 0x01, 0xFF, 0x12, 0xB5, 0xE8, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, ++0x4F, 0xFF, 0xF0, 0x12, 0x02, 0xF6, 0xFE, 0x22, 0x8F, 0x6E, 0x8D, 0x6F, 0xEF, 0xF1, 0x73, 0xE0, ++0xF5, 0x70, 0x54, 0x7F, 0xF5, 0x71, 0xE5, 0x70, 0x54, 0x80, 0xF5, 0x73, 0x75, 0xF0, 0x12, 0xEF, ++0x12, 0xC8, 0x50, 0xF5, 0x75, 0x75, 0xF0, 0x12, 0xEF, 0x71, 0x1C, 0xC4, 0x54, 0x03, 0xF5, 0x76, ++0xF1, 0xE1, 0x74, 0xFF, 0xF0, 0x12, 0xAB, 0x01, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, 0x70, 0x45, ++0x73, 0xFF, 0x12, 0xAA, 0xF5, 0xEF, 0xF0, 0xE5, 0x6E, 0x12, 0x91, 0xDA, 0xE0, 0x54, 0x03, 0xF5, ++0x74, 0x74, 0x4C, 0x25, 0x6E, 0x12, 0xAF, 0xD3, 0xE5, 0x74, 0xF0, 0xE5, 0x71, 0x65, 0x75, 0x70, ++0x40, 0xB1, 0x7A, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x0C, 0xE5, 0x73, 0x70, 0x08, 0xE5, 0x71, ++0x44, 0x80, 0xF5, 0x70, 0xE1, 0x26, 0x12, 0xAB, 0x01, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0xAB, ++0x15, 0x12, 0xC8, 0xDE, 0xF1, 0xD6, 0xE5, 0x6E, 0xF0, 0xE4, 0x90, 0x92, 0x43, 0x12, 0x96, 0x3F, ++0x7B, 0x01, 0xFA, 0x7D, 0x02, 0x7F, 0x04, 0x12, 0x96, 0x87, 0x7D, 0x07, 0xAF, 0x6E, 0x02, 0xBE, ++0x04, 0xE5, 0x71, 0xC3, 0x95, 0x75, 0x50, 0x56, 0xAB, 0x6E, 0xAD, 0x75, 0xAF, 0x71, 0x12, 0x72, ++0xEA, 0x8F, 0x72, 0x85, 0x72, 0x70, 0xB1, 0x7A, 0xC4, 0x13, 0x54, 0x01, 0xFF, 0x90, 0x92, 0x43, ++0xF1, 0xD5, 0xE5, 0x72, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x71, 0xF0, 0xE5, 0x73, 0xB1, 0x6B, ++0x12, 0x97, 0xD4, 0xE4, 0xFB, 0xFA, 0x12, 0xC9, 0x1E, 0xE5, 0x71, 0xC3, 0x94, 0x0C, 0x40, 0x26, ++0xB1, 0x7A, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x1D, 0xE5, 0x6F, 0x60, 0x19, 0xE5, 0x73, 0x70, ++0x15, 0xE5, 0x71, 0x44, 0x80, 0xF5, 0x70, 0xF1, 0xE1, 0xE5, 0x72, 0xF0, 0x80, 0x08, 0x12, 0xAA, ++0xF5, 0xE5, 0x75, 0xF0, 0xF5, 0x70, 0xF1, 0xDA, 0xE5, 0x70, 0xF0, 0xF1, 0xE1, 0xE0, 0xFF, 0x12, ++0xC8, 0xC5, 0xEF, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x74, 0x12, 0xAF, 0xCB, 0xF0, 0x7B, 0x01, ++0x7A, 0x00, 0x12, 0xC9, 0x1E, 0x90, 0x91, 0x0B, 0xE5, 0x74, 0xF0, 0xAB, 0x6F, 0xAD, 0x70, 0xAF, ++0x6E, 0x02, 0x27, 0x3D, 0x4D, 0xFF, 0x90, 0x86, 0x72, 0xF0, 0xEE, 0x22, 0x4D, 0xFF, 0x90, 0x86, ++0x75, 0xF0, 0xEE, 0x22, 0x74, 0xBC, 0x25, 0x78, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0xE4, ++0xF0, 0xE5, 0x78, 0xC4, 0x54, 0xF0, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, ++0x7F, 0x8F, 0x12, 0x7B, 0x51, 0xEF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, ++0x24, 0xEF, 0xF0, 0xF1, 0x80, 0x30, 0xE6, 0x38, 0x7F, 0x8D, 0x12, 0x7B, 0x51, 0xEF, 0x64, 0x01, ++0x70, 0x2E, 0x90, 0x93, 0x25, 0xF0, 0x90, 0x93, 0x25, 0xE0, 0xFD, 0x90, 0x93, 0x24, 0xE0, 0xF1, ++0x73, 0xE5, 0x82, 0x2D, 0x12, 0xA8, 0x60, 0xE0, 0xFB, 0xE4, 0xFF, 0x91, 0x4A, 0x90, 0x93, 0x25, ++0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x10, 0x40, 0xDD, 0xF1, 0x80, 0x30, 0xE0, 0x02, 0xF1, 0xFB, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x3F, 0xE4, 0xF0, 0xA3, ++0x22, 0x74, 0xD7, 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, 0xF0, 0x90, 0x00, ++0x03, 0x02, 0x03, 0x0F, 0x90, 0x86, 0x72, 0xE0, 0x13, 0x13, 0x22, 0xE4, 0xFD, 0x7F, 0x8D, 0x02, ++0x7B, 0x3E, 0x8B, 0x5B, 0x8A, 0x5C, 0x89, 0x5D, 0x90, 0x92, 0x8A, 0xE0, 0x70, 0x0C, 0x12, 0xC8, ++0xFF, 0x30, 0xE0, 0x06, 0x90, 0x92, 0x90, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x8C, 0xE0, 0x70, 0x0F, ++0x31, 0xC3, 0xC4, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x06, 0x90, 0x92, 0x91, 0x74, 0x01, 0xF0, 0xAB, ++0x5B, 0xAA, 0x5C, 0xA9, 0x5D, 0x12, 0x8D, 0x74, 0xFF, 0xF5, 0x5F, 0x12, 0x02, 0xF6, 0xFE, 0xC3, ++0x13, 0x30, 0xE0, 0x07, 0x12, 0x8C, 0x80, 0xF5, 0x60, 0x80, 0x02, 0x8F, 0x60, 0x85, 0x5F, 0x5E, ++0xE5, 0x5E, 0xD3, 0x95, 0x60, 0x50, 0x28, 0x31, 0xC3, 0x54, 0x01, 0xFD, 0xAF, 0x5E, 0x12, 0x6E, ++0x5F, 0xAF, 0x5E, 0x12, 0x77, 0x39, 0xEF, 0xAF, 0x5E, 0x70, 0x04, 0x11, 0x9A, 0x80, 0x02, 0xF1, ++0xEA, 0x90, 0x92, 0x91, 0xE0, 0x60, 0x04, 0xAF, 0x5E, 0x11, 0x9A, 0x05, 0x5E, 0x80, 0xD1, 0xE5, ++0x5F, 0x70, 0x16, 0xFF, 0x12, 0x77, 0x39, 0xEF, 0x70, 0x0F, 0x12, 0xB3, 0xE4, 0x12, 0x79, 0x61, ++0x12, 0xC9, 0x25, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x92, 0x07, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x7D, 0x44, 0x7F, 0x6F, 0x11, ++0xDD, 0x11, 0xE8, 0x90, 0x92, 0x08, 0xE0, 0x90, 0x92, 0x07, 0xB4, 0x01, 0x09, 0xE0, 0x31, 0xDA, ++0xE0, 0x44, 0x04, 0xF0, 0x80, 0x07, 0xE0, 0x31, 0xDA, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0xFD, 0xFF, ++0x11, 0xDD, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0xB3, 0xE4, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, ++0xEF, 0xF0, 0x90, 0x92, 0x81, 0xED, 0xF0, 0x22, 0xE4, 0x90, 0x93, 0x16, 0xF0, 0xA3, 0xF0, 0x90, ++0x05, 0x22, 0xE0, 0x90, 0x93, 0x18, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x11, 0xDD, 0x90, 0x05, 0xF8, ++0xE0, 0x70, 0x13, 0xA3, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0x31, ++0xBB, 0x11, 0xDD, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x93, 0x17, 0xE0, 0x94, 0xE8, 0x90, 0x93, 0x16, ++0xE0, 0x94, 0x03, 0x40, 0x0E, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x31, 0xBB, 0x11, 0xDD, ++0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0x90, 0x93, 0x16, 0xE4, 0x75, 0xF0, ++0x01, 0x12, 0x07, 0x0A, 0x80, 0xB7, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x92, 0x76, ++0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x84, 0xC3, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, ++0x2D, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x92, 0x7A, 0xF0, 0x7D, 0x26, 0x7F, 0xFF, 0x11, 0xDD, 0x11, ++0xE8, 0xEF, 0x64, 0x01, 0x70, 0x0B, 0x31, 0xCC, 0xFB, 0x7D, 0x01, 0x12, 0x3A, 0xC2, 0x12, 0xC8, ++0x22, 0x90, 0x92, 0x7A, 0xE0, 0xFF, 0x7D, 0x27, 0x11, 0xDD, 0x31, 0xB3, 0x80, 0x13, 0x31, 0xB3, ++0x31, 0xCC, 0xFB, 0x90, 0x93, 0x15, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x12, 0xBF, 0x83, 0x12, 0xC8, ++0x22, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x12, 0xC6, 0xA8, 0x74, 0x01, 0xF0, 0xFF, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x90, 0x92, 0x76, 0xE0, 0xFF, 0x02, 0x5C, 0xA3, 0x90, 0x93, 0x18, 0xE0, 0xFF, ++0x7D, 0x48, 0x22, 0xAB, 0x5B, 0xAA, 0x5C, 0xA9, 0x5D, 0x02, 0x02, 0xF6, 0x90, 0x84, 0xC8, 0xE0, ++0xFF, 0x90, 0x92, 0x77, 0xE0, 0x22, 0xE0, 0xFD, 0xE5, 0x78, 0xC4, 0x54, 0xF0, 0x24, 0x05, 0xF5, ++0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x90, 0x04, 0x85, 0xE0, 0xF5, 0x6B, 0x90, 0x92, 0xD6, ++0xE0, 0x04, 0xF0, 0xE4, 0xF5, 0x62, 0x90, 0x85, 0xBB, 0xE0, 0xFF, 0xE5, 0x62, 0xC3, 0x9F, 0x40, ++0x02, 0xC1, 0x2B, 0xE5, 0x62, 0x12, 0x8F, 0x73, 0xE0, 0xF5, 0x6D, 0x12, 0xC8, 0xB9, 0xE0, 0x65, ++0x6D, 0x60, 0x16, 0x90, 0x8A, 0x71, 0xE5, 0x6D, 0xF0, 0xE4, 0xA3, 0xF0, 0xAB, 0x62, 0xFD, 0xFF, ++0x12, 0x52, 0xC3, 0x12, 0xC8, 0xB9, 0xE5, 0x6D, 0xF0, 0x90, 0x04, 0xA0, 0xE0, 0x64, 0x01, 0x70, ++0x4E, 0xA3, 0xE0, 0x65, 0x62, 0x70, 0x48, 0xA3, 0xE0, 0xF5, 0x63, 0xA3, 0xE0, 0x90, 0x92, 0x38, ++0xF0, 0xE5, 0x62, 0x12, 0x8F, 0x73, 0xE0, 0x65, 0x63, 0x70, 0x02, 0xC1, 0x27, 0xE5, 0x62, 0x12, ++0x8F, 0x73, 0xE5, 0x63, 0xF0, 0xE5, 0x62, 0x31, 0xDA, 0xE0, 0x54, 0xFC, 0xFF, 0x90, 0x92, 0x38, ++0xE0, 0x54, 0x03, 0x4F, 0xFF, 0xE5, 0x62, 0x31, 0xDA, 0xEF, 0xF0, 0x90, 0x8A, 0x71, 0xE5, 0x63, ++0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0xAB, 0x62, 0xE4, 0xFD, 0xFF, 0x12, 0x52, 0xC3, 0xC1, 0x27, 0xAF, ++0x62, 0x12, 0x77, 0x39, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0x8B, 0x1C, 0x12, 0x8D, 0x6B, 0xFD, ++0xF1, 0xB5, 0xED, 0xF0, 0x90, 0x92, 0x41, 0x12, 0x8F, 0xD5, 0xE5, 0x62, 0xF0, 0x12, 0xA9, 0x91, ++0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, ++0xFF, 0x90, 0x92, 0x45, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7B, 0x02, 0x7A, 0x00, 0xE4, 0xFD, 0x7F, ++0x01, 0xD1, 0x87, 0x12, 0xAC, 0x0E, 0xFF, 0xF1, 0xCA, 0x12, 0x05, 0x28, 0xE0, 0xFD, 0xE5, 0x62, ++0x12, 0xC8, 0x76, 0x54, 0x80, 0xFB, 0xF1, 0xB5, 0xEB, 0xF0, 0x12, 0xC8, 0xC5, 0xED, 0xF0, 0x90, ++0x92, 0x3F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x92, 0x45, 0xF0, 0xA3, 0xF0, 0x7B, 0x03, ++0xFA, 0xFD, 0x7F, 0x01, 0xD1, 0x87, 0xAF, 0x62, 0x12, 0x77, 0x39, 0xEF, 0x70, 0x02, 0xC1, 0x27, ++0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0x8B, 0x1C, 0x12, 0x8D, 0x6B, 0x30, 0xE0, 0x02, 0xC1, 0x27, ++0xE5, 0x62, 0x12, 0xA9, 0x91, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, ++0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x60, 0x02, 0xC1, 0x27, 0x12, 0xAC, 0x0E, 0x4E, 0x70, 0x0A, ++0xF1, 0xCA, 0x12, 0x05, 0x28, 0xE0, 0x70, 0x02, 0xC1, 0x27, 0xE5, 0x62, 0x75, 0xF0, 0x12, 0xA4, ++0x24, 0x44, 0xF9, 0x74, 0x89, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90, 0x92, 0x33, 0x12, 0x87, 0x79, ++0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0x12, 0xC9, 0x16, 0x12, 0x03, 0xED, 0x2F, 0xFF, 0xF1, 0xA3, ++0x2F, 0xFF, 0xF1, 0xA9, 0x2F, 0xFF, 0xF1, 0xAF, 0x2F, 0xF5, 0x6C, 0x75, 0xF0, 0x12, 0xE5, 0x62, ++0x90, 0x89, 0x40, 0x12, 0x05, 0x28, 0xE0, 0xF5, 0x68, 0xA3, 0xE0, 0xF5, 0x69, 0xF1, 0xCA, 0x12, ++0x05, 0x28, 0xE0, 0xFF, 0x90, 0x92, 0x36, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, 0x62, 0x12, 0x8F, ++0x73, 0xE0, 0xF5, 0x63, 0x54, 0x80, 0xF5, 0x65, 0xE5, 0x63, 0x54, 0x7F, 0xF5, 0x64, 0x12, 0xC8, ++0xD5, 0xD1, 0xFD, 0x12, 0xC9, 0x16, 0x90, 0x92, 0x41, 0xF1, 0x01, 0xF1, 0xA3, 0xFF, 0x90, 0x92, ++0x43, 0xF1, 0x01, 0xF1, 0xA9, 0xFF, 0x90, 0x92, 0x45, 0xF1, 0x01, 0x7B, 0x01, 0xF1, 0x9B, 0x90, ++0x92, 0x33, 0x12, 0x87, 0x70, 0xF1, 0xAF, 0xD1, 0xFD, 0x90, 0x92, 0x36, 0x12, 0xC8, 0xDE, 0xF0, ++0xA3, 0xEF, 0xF0, 0xA3, 0x12, 0xC9, 0x0E, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x63, 0xF0, 0x7B, 0x02, ++0xF1, 0x9B, 0x74, 0x7C, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0xE0, 0xC3, 0x94, ++0x05, 0x40, 0x02, 0xC1, 0x0C, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0xC8, 0x50, 0xFF, 0xE5, 0x64, ++0xD3, 0x9F, 0x40, 0x08, 0x8F, 0x64, 0xE5, 0x64, 0x45, 0x65, 0xF5, 0x63, 0xE5, 0x64, 0x90, 0x82, ++0xE1, 0x93, 0xF5, 0x6A, 0xE5, 0x65, 0x60, 0x04, 0x05, 0x6A, 0x05, 0x6A, 0x90, 0x04, 0x8C, 0xE0, ++0x64, 0x01, 0x70, 0x28, 0xE5, 0x64, 0xC3, 0x94, 0x0C, 0x40, 0x21, 0x74, 0x84, 0x25, 0x64, 0xF5, ++0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xFF, 0x54, 0x7F, 0xFE, 0xEF, 0x30, 0xE7, 0x06, 0xE5, ++0x6A, 0x2E, 0xFF, 0x80, 0x05, 0xC3, 0xE5, 0x6A, 0x9E, 0xFF, 0x8F, 0x6A, 0xE5, 0x6A, 0xD3, 0x94, ++0x1A, 0xAF, 0x6A, 0x40, 0x02, 0x7F, 0x1A, 0x8F, 0x6A, 0xD1, 0x31, 0x7B, 0x03, 0xFA, 0xF1, 0x9D, ++0xE5, 0x63, 0x90, 0x83, 0x59, 0x93, 0xFF, 0xD3, 0x90, 0x92, 0x37, 0xE0, 0x9F, 0x90, 0x92, 0x36, ++0xE0, 0x94, 0x00, 0x40, 0x02, 0x80, 0x73, 0xC3, 0xE5, 0x69, 0x94, 0x0A, 0xE5, 0x68, 0x94, 0x00, ++0x40, 0x02, 0xA1, 0x5A, 0xD1, 0x75, 0xE0, 0xC3, 0x94, 0x01, 0x40, 0x05, 0xD1, 0x75, 0xE0, 0x14, ++0xF0, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0xF1, 0xAF, 0xFF, 0x90, 0x92, 0x37, 0xE0, 0x2F, 0xFF, ++0x90, 0x92, 0x36, 0xE0, 0x35, 0xF0, 0xFE, 0xF1, 0xA9, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xFE, 0xF1, ++0xA3, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0xE5, 0x68, 0xC3, 0x13, 0xFE, 0xE5, 0x69, 0x13, 0xFF, ++0xD3, 0xED, 0x9F, 0xEC, 0x9E, 0x40, 0x28, 0xE5, 0x62, 0x94, 0x05, 0x50, 0x05, 0xD1, 0x75, 0x74, ++0x03, 0xF0, 0x90, 0x92, 0x3F, 0x12, 0xC9, 0x0E, 0xE5, 0x68, 0xC3, 0x13, 0xA3, 0xF0, 0xE5, 0x69, ++0x13, 0xA3, 0xD1, 0x47, 0xF1, 0xD3, 0x7B, 0x01, 0xD1, 0x81, 0x12, 0xAA, 0x22, 0xC1, 0x0C, 0x12, ++0xC8, 0xD5, 0x65, 0x6C, 0x70, 0x02, 0xE5, 0xF0, 0x70, 0x50, 0x90, 0x92, 0x3F, 0xF0, 0xA3, 0xE5, ++0x6C, 0xF0, 0xC3, 0x13, 0xFF, 0xA3, 0xE4, 0xF0, 0xA3, 0xEF, 0xD1, 0x47, 0xF1, 0xD3, 0x7B, 0x02, ++0xD1, 0x81, 0xE5, 0x62, 0xC3, 0x94, 0x05, 0x50, 0x0E, 0xD1, 0x75, 0xE0, 0xD3, 0x94, 0x00, 0x40, ++0x06, 0xD1, 0x2C, 0x7B, 0x03, 0x80, 0x0B, 0xE5, 0x6C, 0xC3, 0x94, 0x03, 0x50, 0x10, 0xD1, 0x2C, ++0x7B, 0x04, 0xFA, 0xD1, 0x83, 0x7D, 0x06, 0xAF, 0x62, 0x12, 0xBE, 0x04, 0xC1, 0x27, 0xE4, 0xFD, ++0xAF, 0x62, 0x12, 0x8E, 0x28, 0x12, 0xBE, 0x00, 0xC1, 0x0C, 0xD1, 0x2C, 0x7B, 0x08, 0xFA, 0xD1, ++0x83, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0x65, 0xC2, 0xC1, 0x0C, 0xD1, 0x75, 0xE4, 0xF0, 0x90, 0x92, ++0x3D, 0x74, 0x02, 0xF0, 0xAB, 0x6A, 0xAD, 0x62, 0xAF, 0x69, 0xAE, 0x68, 0x12, 0xAB, 0x23, 0x8E, ++0x66, 0x8F, 0x67, 0x12, 0xC8, 0x68, 0xC3, 0x74, 0x01, 0x93, 0x95, 0x67, 0xE4, 0x93, 0x95, 0x66, ++0x50, 0x18, 0xD1, 0xF1, 0xE4, 0xF0, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0x8E, 0x28, 0x12, 0xC7, 0xD4, ++0xE4, 0x90, 0x92, 0x43, 0xD1, 0x3F, 0x7B, 0x01, 0x80, 0x22, 0xF1, 0x93, 0xC3, 0xE5, 0x67, 0x9F, ++0xE5, 0x66, 0x94, 0x00, 0x50, 0x1B, 0xD1, 0xF1, 0xE4, 0xF0, 0x12, 0xAA, 0x22, 0x12, 0xC7, 0xEF, ++0xF1, 0x93, 0x12, 0xC8, 0xC5, 0xEF, 0xF0, 0xE4, 0xD1, 0x3E, 0x7B, 0x02, 0xFA, 0xF1, 0xBC, 0x80, ++0x4B, 0x12, 0xBE, 0x00, 0x12, 0xC7, 0xD4, 0xF1, 0x93, 0xF1, 0xB5, 0xEF, 0xF0, 0xD1, 0xF1, 0xF1, ++0xD3, 0x7B, 0x03, 0x7A, 0x00, 0xF1, 0xBC, 0xD1, 0xF1, 0xE0, 0x04, 0xF0, 0xE5, 0x64, 0x90, 0x83, ++0x6D, 0x93, 0xFF, 0xD1, 0xF1, 0xE0, 0xC3, 0x9F, 0x40, 0x22, 0xD1, 0xF1, 0xE4, 0xF0, 0xF1, 0x93, ++0x12, 0xC8, 0x68, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93, 0x34, 0x00, 0xC3, 0x13, 0xFE, 0xEF, ++0x13, 0xFF, 0xE5, 0x62, 0x12, 0xAB, 0x17, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xF5, 0x6C, 0xFD, ++0xAF, 0x62, 0x12, 0x65, 0xC2, 0xE4, 0x90, 0x92, 0x3F, 0xF0, 0xD1, 0x3A, 0xA3, 0xF0, 0x7B, 0x01, ++0xFA, 0x7D, 0xFF, 0x7F, 0x01, 0xD1, 0x87, 0x05, 0x62, 0x21, 0xF6, 0x22, 0x90, 0x92, 0xD6, 0xE0, ++0xFF, 0x90, 0x92, 0x3F, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xF0, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0x90, 0x00, ++0x06, 0x12, 0x04, 0x18, 0xFF, 0xAE, 0xF0, 0x90, 0x00, 0x08, 0x12, 0x04, 0x18, 0x2F, 0xFF, 0xE5, ++0xF0, 0x3E, 0xFE, 0x90, 0x00, 0x04, 0x12, 0x04, 0x18, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0x90, 0x92, ++0x43, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0xE7, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, ++0x22, 0x7A, 0x00, 0x7D, 0x03, 0x7F, 0x01, 0x90, 0x01, 0xC6, 0xE0, 0xFE, 0x64, 0x80, 0x70, 0x60, ++0x90, 0x92, 0x49, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xEB, 0xA3, 0xF0, 0xEA, 0xA3, 0xF0, 0x90, 0x92, ++0x3F, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x4D, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x41, 0xE0, ++0xFC, 0xA3, 0xE0, 0x90, 0x92, 0x4F, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x43, 0xE0, 0xFC, 0xA3, ++0xE0, 0x90, 0x92, 0x51, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x45, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, ++0x92, 0x53, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0x92, 0x47, 0x74, 0xFE, 0xF0, 0x90, 0x92, 0x55, 0x74, ++0x0C, 0xF0, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x47, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x12, 0x87, 0xBB, ++0x22, 0x74, 0xAC, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, 0xFF, 0x90, 0x92, ++0x3F, 0xE5, 0xF0, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x8D, 0x78, 0xEF, 0x30, 0xE6, 0x17, 0x12, 0x8F, ++0x71, 0x31, 0xD6, 0xF1, 0xC2, 0xE4, 0xFB, 0xAF, 0x78, 0x12, 0x27, 0x3D, 0x12, 0x8F, 0x64, 0xF1, ++0x8C, 0x74, 0x01, 0x80, 0x5E, 0xF1, 0xDE, 0xE0, 0x04, 0xF0, 0xF1, 0xDE, 0xE0, 0x64, 0x02, 0x70, ++0x27, 0x74, 0xD7, 0x25, 0x78, 0x12, 0x8F, 0xE5, 0xE0, 0xFD, 0xF4, 0x60, 0x02, 0x80, 0x05, 0x12, ++0x8F, 0x71, 0xE0, 0xFD, 0x31, 0xD8, 0xF1, 0xC2, 0x7B, 0x01, 0xAF, 0x78, 0x12, 0x27, 0x3D, 0x12, ++0x8F, 0x71, 0xF1, 0x8C, 0x74, 0x02, 0x80, 0x2B, 0xF1, 0xDE, 0xE0, 0xD3, 0x94, 0x03, 0x40, 0x0E, ++0xAF, 0x78, 0x12, 0x6D, 0x94, 0x12, 0x8F, 0x64, 0xF1, 0x8C, 0x74, 0x03, 0x80, 0x15, 0x12, 0x8F, ++0x71, 0x31, 0xD6, 0xF1, 0xC2, 0x7B, 0x01, 0xAF, 0x78, 0x12, 0x27, 0x3D, 0x12, 0x8F, 0x71, 0xF1, ++0x8C, 0x74, 0x02, 0xF0, 0xAB, 0x78, 0xE4, 0xFD, 0xFF, 0x02, 0x52, 0xC3, 0xE0, 0x90, 0x8A, 0x71, ++0xF0, 0xA3, 0x22, 0xE5, 0x64, 0x90, 0x83, 0x1D, 0x93, 0xFF, 0x22, 0x7A, 0x00, 0x7D, 0x01, 0x7F, ++0x01, 0xC1, 0x87, 0x90, 0x00, 0x04, 0x02, 0x04, 0x18, 0x90, 0x00, 0x06, 0x02, 0x04, 0x18, 0x90, ++0x00, 0x08, 0x02, 0x04, 0x18, 0x90, 0x92, 0x43, 0xE4, 0xF0, 0xA3, 0x22, 0x7D, 0x05, 0x7F, 0x01, ++0xC1, 0x87, 0xE0, 0x54, 0x03, 0x90, 0x91, 0x0B, 0xF0, 0x22, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x90, ++0x89, 0x42, 0x22, 0xE0, 0xFF, 0x90, 0x92, 0x45, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x74, 0xBC, ++0x25, 0x78, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0x22, 0xE4, 0xFD, 0x01, 0x9C, 0x7D, 0x20, ++0x7F, 0xFF, 0x11, 0xDD, 0x12, 0xB5, 0xB4, 0x90, 0x85, 0xBF, 0x74, 0x02, 0xF0, 0x22, 0x12, 0x02, ++0xF6, 0xFF, 0x90, 0x92, 0x83, 0xF0, 0xBF, 0x01, 0x07, 0x11, 0x11, 0xE4, 0x90, 0x92, 0x83, 0xF0, ++0x22, 0x11, 0xC1, 0x7F, 0xF5, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x06, 0x90, 0x92, 0x07, ++0xE0, 0xA3, 0xF0, 0x11, 0xC1, 0x7F, 0xF6, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, ++0x92, 0x07, 0xE0, 0x90, 0x92, 0x09, 0xF0, 0x11, 0xC1, 0x7F, 0xF4, 0x7E, 0x01, 0x12, 0x64, 0x37, ++0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, 0x90, 0x92, 0x0A, 0xF0, 0x11, 0xC1, 0x7F, 0xF3, 0x7E, ++0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, 0x90, 0x92, 0x0B, 0xF0, 0x11, ++0xC1, 0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x07, 0xE0, 0x90, ++0x92, 0x0C, 0xF0, 0x90, 0x92, 0x08, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, ++0x90, 0x92, 0x10, 0xF0, 0x90, 0x92, 0x0C, 0xE0, 0x90, 0x92, 0x11, 0xF0, 0x90, 0x92, 0x12, 0x74, ++0x12, 0xF0, 0x90, 0x92, 0x20, 0x74, 0x05, 0xF0, 0x90, 0x92, 0x14, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, ++0xA3, 0xEB, 0xF0, 0x90, 0x92, 0x10, 0xE0, 0x90, 0x92, 0x17, 0xF0, 0x90, 0x92, 0x11, 0xE0, 0x90, ++0x92, 0x18, 0xF0, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x12, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x02, 0x87, ++0xBB, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x07, 0x22, 0x31, 0xAD, 0x7F, 0xF4, 0x7E, 0x00, 0x12, 0x64, ++0x37, 0xBF, 0x01, 0x06, 0x90, 0x92, 0x16, 0xE0, 0xA3, 0xF0, 0x31, 0xAD, 0x7F, 0xF5, 0x7E, 0x00, ++0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x18, 0xF0, 0x31, 0xAD, ++0x7F, 0xF6, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, ++0x19, 0xF0, 0x31, 0xAD, 0x7F, 0xF7, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, 0x01, 0x08, 0x90, 0x92, ++0x16, 0xE0, 0x90, 0x92, 0x1A, 0xF0, 0x31, 0xAD, 0x7F, 0xF8, 0x7E, 0x00, 0x12, 0x64, 0x37, 0xBF, ++0x01, 0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x1B, 0xF0, 0x31, 0xAD, 0x51, 0x2E, 0xBF, 0x01, ++0x08, 0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x1C, 0xF0, 0x31, 0xAD, 0x51, 0x27, 0xBF, 0x01, 0x08, ++0x90, 0x92, 0x16, 0xE0, 0x90, 0x92, 0x1D, 0xF0, 0x31, 0xAD, 0x31, 0xB4, 0xBF, 0x01, 0x08, 0x90, ++0x92, 0x16, 0xE0, 0x90, 0x92, 0x1E, 0xF0, 0x90, 0x92, 0x07, 0x74, 0x19, 0xF0, 0x90, 0x92, 0x15, ++0x74, 0x08, 0xF0, 0x90, 0x92, 0x17, 0xE0, 0x90, 0x92, 0x09, 0xF0, 0x90, 0x92, 0x18, 0xE0, 0x90, ++0x92, 0x0A, 0xF0, 0x90, 0x92, 0x19, 0xE0, 0x90, 0x92, 0x0B, 0xF0, 0x90, 0x92, 0x1A, 0xE0, 0x90, ++0x92, 0x0C, 0xF0, 0x90, 0x92, 0x1B, 0xE0, 0x90, 0x92, 0x0D, 0xF0, 0x90, 0x92, 0x1C, 0xE0, 0x90, ++0x92, 0x0E, 0xF0, 0x90, 0x92, 0x1D, 0xE0, 0x90, 0x92, 0x0F, 0xF0, 0x90, 0x92, 0x1E, 0xE0, 0x90, ++0x92, 0x10, 0xF0, 0x11, 0xC1, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x02, 0x87, 0xBB, 0x7B, 0x01, 0x7A, ++0x92, 0x79, 0x16, 0x22, 0x7F, 0xFD, 0x7E, 0x00, 0x02, 0x64, 0x37, 0x7E, 0x00, 0x7F, 0x0B, 0x7D, ++0x00, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x8A, 0x12, 0x06, 0xDE, 0x51, 0x20, 0x51, 0x2E, 0xBF, 0x01, ++0x1C, 0x90, 0x92, 0x29, 0xE0, 0xFE, 0x54, 0x01, 0x90, 0x92, 0x8A, 0xF0, 0xEE, 0x54, 0x04, 0x90, ++0x92, 0x8C, 0xF0, 0x90, 0x92, 0x29, 0xE0, 0x54, 0x08, 0x90, 0x92, 0x8B, 0xF0, 0x51, 0x20, 0x51, ++0x27, 0xBF, 0x01, 0x16, 0x90, 0x92, 0x29, 0xE0, 0xFE, 0x54, 0x07, 0x90, 0x92, 0x8E, 0xF0, 0xEE, ++0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x90, 0x92, 0x8D, 0xF0, 0x51, 0x20, 0x31, 0xB4, 0xBF, 0x01, ++0x0E, 0x90, 0x92, 0x29, 0xE0, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x92, 0x8F, 0xF0, 0x22, ++0x7B, 0x01, 0x7A, 0x92, 0x79, 0x29, 0x22, 0x7F, 0xFB, 0x7E, 0x00, 0x02, 0x64, 0x37, 0x7F, 0xF9, ++0x7E, 0x00, 0x02, 0x64, 0x37, 0x12, 0x02, 0xF6, 0xFF, 0x90, 0x92, 0x89, 0xF0, 0xBF, 0x01, 0x07, ++0x11, 0xC8, 0xE4, 0x90, 0x92, 0x89, 0xF0, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, ++0x80, 0x12, 0x7B, 0x3E, 0x12, 0xB8, 0x98, 0x12, 0xBE, 0xF6, 0x12, 0x7B, 0x9C, 0x51, 0xD2, 0x12, ++0xB7, 0xD5, 0x7F, 0x01, 0x12, 0x85, 0x15, 0x90, 0x92, 0x88, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x85, ++0x15, 0x90, 0x92, 0x88, 0xE0, 0x04, 0xF0, 0x12, 0xB8, 0x59, 0x51, 0xF0, 0x90, 0x01, 0xCC, 0x74, ++0x0F, 0xF0, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x7B, 0x3E, 0x75, 0x20, ++0xFF, 0x12, 0x7C, 0xCD, 0x12, 0xB6, 0xA3, 0x90, 0x00, 0x81, 0xE0, 0x44, 0x04, 0xFD, 0x7F, 0x81, ++0x12, 0x7B, 0x3E, 0x12, 0xB8, 0x8D, 0x31, 0xBB, 0x90, 0x00, 0x00, 0xE0, 0x54, 0xFB, 0xFD, 0xE4, ++0xFF, 0x12, 0xB6, 0x80, 0x44, 0x04, 0xFD, 0x7F, 0x01, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x98, 0x74, ++0x80, 0xF0, 0xA3, 0x74, 0x88, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0xE4, 0xFF, 0x02, ++0x85, 0x9E, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x12, ++0xB7, 0x09, 0x90, 0x01, 0x99, 0xE0, 0x44, 0xC0, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x80, 0xF0, 0x22, ++0xF1, 0xEE, 0x12, 0x7B, 0xEF, 0x12, 0x3C, 0x03, 0x12, 0xBE, 0x74, 0xF1, 0xF4, 0x12, 0xC3, 0x2D, ++0x71, 0xDA, 0x71, 0x27, 0x12, 0x7B, 0x64, 0x12, 0x78, 0xB9, 0x90, 0x89, 0x16, 0xE0, 0x54, 0x7F, ++0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4, 0x90, 0x89, 0x18, 0xF0, 0x90, ++0x89, 0x16, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x24, 0x7D, 0x00, 0x7B, 0x01, 0x7A, ++0x86, 0x79, 0x72, 0x12, 0x06, 0xDE, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x20, 0xF0, 0x12, 0xB7, 0x11, ++0x71, 0xE0, 0x90, 0x84, 0xC5, 0xE0, 0xFF, 0x64, 0x02, 0x70, 0x29, 0x71, 0xD3, 0x30, 0xE0, 0x02, ++0x7E, 0x01, 0x90, 0x86, 0x90, 0x71, 0xD1, 0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90, 0x86, 0x8E, 0x71, ++0xD1, 0x30, 0xE2, 0x02, 0x7E, 0x01, 0x90, 0x86, 0x8F, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0, 0x90, ++0x02, 0xFB, 0xF0, 0x22, 0xEF, 0x64, 0x01, 0x70, 0x1D, 0x71, 0xCA, 0x30, 0xE0, 0x02, 0x7F, 0x01, ++0x90, 0x86, 0x90, 0x71, 0xC8, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x86, 0x8E, 0x71, 0xC8, 0x30, ++0xE2, 0x02, 0x7F, 0x01, 0x80, 0x23, 0x90, 0x84, 0xC5, 0xE0, 0x64, 0x03, 0x70, 0x20, 0x71, 0xC1, ++0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, 0x86, 0x90, 0x71, 0xBF, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, ++0x86, 0x8E, 0x71, 0xBF, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x90, 0x86, 0x8F, 0xEF, 0xF0, 0x22, 0xEF, ++0xF0, 0x90, 0xFD, 0x78, 0xE0, 0x7F, 0x00, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, ++0x22, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0, 0x7E, 0x00, 0x22, 0x12, 0xC3, 0xFC, 0x02, 0x06, 0xDE, ++0x12, 0xC6, 0x02, 0xE4, 0x90, 0x88, 0xD8, 0x12, 0x96, 0x3F, 0x90, 0x88, 0x76, 0xF0, 0x12, 0x96, ++0x3A, 0x12, 0x96, 0x40, 0x90, 0x88, 0x88, 0xF0, 0xA3, 0xF0, 0x90, 0x88, 0xCA, 0xF0, 0xA3, 0xF0, ++0x22, 0x90, 0x86, 0x72, 0x91, 0x0C, 0x30, 0xE0, 0x02, 0x71, 0xE0, 0x22, 0xE0, 0xFF, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x5B, 0x8A, 0x5C, 0x89, ++0x5D, 0x90, 0x05, 0x27, 0xE0, 0xF5, 0x5E, 0x8B, 0x1B, 0x8A, 0x1C, 0x89, 0x1D, 0x75, 0x1E, 0x01, ++0x7B, 0x01, 0x7A, 0x85, 0x79, 0xBC, 0x12, 0x6A, 0x21, 0x12, 0x91, 0xC3, 0xFF, 0xC3, 0x13, 0x20, ++0xE0, 0x02, 0x81, 0xCF, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x72, 0xF1, 0x29, 0x75, 0x5E, 0x21, ++0xF1, 0x9B, 0x30, 0xE0, 0x05, 0x12, 0xC8, 0x58, 0x80, 0x0D, 0xE4, 0x90, 0x85, 0xBD, 0xF0, 0xA3, ++0xF0, 0x7D, 0x40, 0xFF, 0x12, 0x7C, 0x41, 0xF1, 0x92, 0x54, 0x1F, 0x30, 0xE0, 0x03, 0x43, 0x5E, ++0x12, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x5E, 0x14, 0x90, 0x85, 0xBC, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x30, 0xE0, 0x03, 0x43, 0x5E, 0x80, 0x90, 0x85, 0xBC, 0xF1, 0xD7, 0x20, 0xE0, ++0x03, 0x43, 0x5E, 0x40, 0xB1, 0x73, 0x90, 0x85, 0xBF, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0xB4, ++0x17, 0x90, 0x85, 0xBC, 0x91, 0x0C, 0x30, 0xE0, 0x04, 0x7F, 0x04, 0x80, 0x0B, 0xF1, 0xAD, 0xEF, ++0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x12, 0xB4, 0x17, 0xA1, 0x3E, 0xB1, 0x70, 0x90, ++0x85, 0xBF, 0xE0, 0x64, 0x04, 0x60, 0x02, 0xA1, 0x6B, 0xFF, 0x12, 0xB4, 0x17, 0xA1, 0x6B, 0x90, ++0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x70, 0xF1, 0x29, 0x43, 0x5E, 0x31, 0xF1, 0x9B, 0x30, 0xE0, 0x05, ++0x12, 0xC8, 0x58, 0x80, 0x07, 0x7D, 0x40, 0xE4, 0xFF, 0x12, 0x7C, 0x41, 0xF1, 0x92, 0x54, 0x1F, ++0x30, 0xE0, 0x03, 0x43, 0x5E, 0x02, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x5E, 0x04, ++0xB1, 0x73, 0x90, 0x85, 0xBC, 0x91, 0x0C, 0x30, 0xE0, 0x0A, 0xF1, 0x49, 0x60, 0x30, 0xE4, 0xFD, ++0x7F, 0x02, 0x80, 0x1E, 0x12, 0xB6, 0x78, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x02, 0x18, 0x12, 0x7A, ++0xA2, 0xF1, 0xAD, 0xBF, 0x01, 0x09, 0x90, 0x85, 0xC7, 0xE0, 0xFF, 0x7D, 0x01, 0x80, 0x03, 0xE4, ++0xFD, 0xFF, 0xB1, 0x7E, 0x80, 0x08, 0x90, 0x85, 0xC8, 0xE0, 0x90, 0x85, 0xC0, 0xF0, 0x90, 0x05, ++0x40, 0x74, 0x22, 0xF0, 0x80, 0x25, 0xB1, 0x70, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x02, 0x06, 0x7D, ++0x01, 0x7F, 0x04, 0x80, 0x0B, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x08, 0x06, 0x7D, 0x01, 0x7F, 0x0C, ++0xB1, 0x7E, 0xF1, 0xA4, 0x90, 0x85, 0xC7, 0xF1, 0x8C, 0xF1, 0xF4, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x75, 0x5E, 0x01, 0x90, 0x05, 0x27, 0xE5, 0x5E, 0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x2A, 0xED, 0xF0, 0x90, 0x85, 0xC1, 0xE0, 0xFE, 0xC4, ++0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xC1, 0xD9, 0xEE, 0x12, 0x8D, 0x6B, 0x30, 0xE0, 0x02, ++0xC1, 0xD9, 0x90, 0x85, 0xC8, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xC1, 0xD9, 0xEF, 0x70, 0x02, 0xC1, ++0x44, 0x24, 0xFE, 0x70, 0x02, 0xC1, 0x81, 0x24, 0xFE, 0x60, 0x4D, 0x24, 0xFC, 0x70, 0x02, 0xC1, ++0xC0, 0x24, 0xFC, 0x60, 0x02, 0xC1, 0xD2, 0xEE, 0xB4, 0x0E, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, ++0xC8, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x79, 0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, ++0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x04, 0x0F, 0x90, 0x93, 0x2A, 0xE0, 0xFF, 0x60, ++0x05, 0x12, 0x6D, 0x4C, 0x80, 0x03, 0x12, 0x79, 0x61, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x08, 0x60, ++0x02, 0xC1, 0xD2, 0x12, 0x7A, 0xB9, 0xC1, 0xD2, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x05, 0x7F, 0x01, ++0x12, 0x79, 0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, ++0xE0, 0xB4, 0x0E, 0x08, 0xD1, 0xDE, 0xBF, 0x01, 0x03, 0x12, 0x74, 0x93, 0x90, 0x85, 0xC8, 0xE0, ++0x64, 0x0C, 0x60, 0x02, 0xC1, 0xD2, 0xD1, 0xDE, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xC1, 0xD2, 0x12, ++0x70, 0x9E, 0xC1, 0xD2, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0E, 0x08, 0xD1, 0xDE, 0xBF, 0x01, 0x03, ++0x12, 0x74, 0x93, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, ++0xE0, 0xB4, 0x0C, 0x08, 0xD1, 0xDE, 0xBF, 0x01, 0x03, 0x12, 0x70, 0x9E, 0x90, 0x85, 0xC8, 0xE0, ++0x64, 0x04, 0x70, 0x5E, 0x12, 0xC4, 0x21, 0xEF, 0x64, 0x01, 0x70, 0x56, 0x12, 0x77, 0xFE, 0x80, ++0x51, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0E, 0x08, 0xD1, 0xDE, 0xBF, 0x01, 0x03, 0x12, 0x74, 0x93, ++0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x73, 0x8E, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0C, ++0x08, 0xD1, 0xDE, 0xBF, 0x01, 0x03, 0x12, 0x70, 0x9E, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x05, 0x7F, ++0x01, 0x12, 0x79, 0x80, 0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x04, 0x17, 0x12, 0x79, 0xF3, 0x80, 0x12, ++0x90, 0x85, 0xC8, 0xE0, 0xB4, 0x0C, 0x0B, 0x12, 0xA1, 0x92, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, ++0x7A, 0x8A, 0x90, 0x85, 0xC8, 0x12, 0xC8, 0x84, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x7A, 0x29, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x0E, 0x01, ++0x80, 0x24, 0x90, 0x85, 0xC1, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x75, 0x0E, ++0x02, 0x80, 0x13, 0x90, 0x85, 0xC7, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x0E, 0x08, 0x80, ++0x05, 0x12, 0xB3, 0xD4, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5, ++0x0E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7D, 0x03, 0x7F, 0x02, 0x02, 0x7B, 0xFD, ++0x90, 0x85, 0xBC, 0x91, 0x0C, 0x30, 0xE0, 0x0A, 0xF1, 0x49, 0x60, 0x06, 0x7D, 0x01, 0x7F, 0x02, ++0xB1, 0x7E, 0xF1, 0x49, 0x60, 0x02, 0xF1, 0x50, 0x22, 0x90, 0x85, 0xC0, 0xE0, 0x64, 0x02, 0x22, ++0x90, 0x85, 0xC5, 0xE0, 0x64, 0x02, 0x60, 0x0F, 0xF1, 0xE5, 0x60, 0x0B, 0x12, 0x7A, 0x29, 0xEF, ++0x70, 0x05, 0xFD, 0x7F, 0x0C, 0xB1, 0x7E, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x01, 0x70, 0x1B, ++0xF1, 0xE5, 0x60, 0x0F, 0xE4, 0xFD, 0x7F, 0x0C, 0xB1, 0x7E, 0xE4, 0xFD, 0xFF, 0x12, 0x90, 0xDD, ++0x02, 0x6B, 0x98, 0x90, 0x85, 0xC8, 0xE0, 0x70, 0x02, 0xB1, 0x7A, 0x22, 0xE0, 0xFF, 0x7D, 0x01, ++0xA1, 0x7E, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x22, 0x90, 0x85, 0xBC, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x22, 0x12, 0x7A, 0x29, 0xEF, 0x70, 0x02, 0xF1, 0x68, 0x22, 0x90, 0x05, 0x43, ++0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, 0xAE, 0x07, 0xF1, 0xAD, 0xBF, 0x01, 0x11, ++0x90, 0x85, 0xBC, 0xF1, 0xD7, 0x20, 0xE0, 0x09, 0xAF, 0x06, 0x7D, 0x01, 0xB1, 0x7E, 0x7F, 0x01, ++0x22, 0x7F, 0x00, 0x22, 0x90, 0x86, 0x72, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0x90, 0x85, ++0xC9, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x85, 0xC3, 0xE0, 0x54, 0x0F, 0x22, 0x81, 0x01, 0xE4, 0xFD, ++0xFF, 0x02, 0x6E, 0x5F, 0x7E, 0x00, 0x7F, 0x01, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x85, 0x79, 0xBC, ++0x12, 0x06, 0xDE, 0x90, 0x85, 0xBC, 0xE0, 0x54, 0xFD, 0xF0, 0xE4, 0x12, 0x96, 0x40, 0xA3, 0x74, ++0x0C, 0xF0, 0x22, 0x12, 0x02, 0xF6, 0x54, 0x01, 0xFF, 0x90, 0x92, 0x95, 0xE0, 0x54, 0xFE, 0x4F, ++0xF0, 0x22, 0x12, 0x02, 0xF6, 0x90, 0x86, 0x71, 0xF0, 0x22, 0x12, 0xC8, 0x99, 0x90, 0x92, 0x84, ++0x12, 0xC8, 0x91, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x12, 0x8D, 0x72, 0x90, 0x92, 0x85, 0x12, ++0x8C, 0x7F, 0x90, 0x92, 0x86, 0xF0, 0xB1, 0x8C, 0x90, 0x92, 0x84, 0xE0, 0x54, 0x01, 0xFF, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x64, 0x01, 0x70, 0x19, 0x11, 0x97, 0x60, 0x09, 0x11, ++0x90, 0x12, 0x7B, 0xFD, 0xB1, 0x7A, 0x80, 0x07, 0x11, 0x90, 0x12, 0x7B, 0xBF, 0x91, 0x61, 0x12, ++0x7A, 0x8A, 0x80, 0x17, 0x11, 0x97, 0x60, 0x07, 0x11, 0x90, 0x12, 0x7B, 0xFD, 0x80, 0x05, 0x11, ++0x90, 0x12, 0x7B, 0xBF, 0xB1, 0x32, 0xB1, 0x63, 0x12, 0x7A, 0xB9, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x22, 0x90, 0x92, 0x86, 0xE0, 0x90, 0x01, 0x3F, 0x22, 0x91, ++0x6F, 0x64, 0x01, 0x60, 0x02, 0x21, 0x86, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x02, 0x21, 0x86, 0x90, ++0x05, 0x63, 0xE0, 0x90, 0x92, 0x9B, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x92, 0x9C, 0xF0, 0x90, ++0x05, 0x61, 0xE0, 0x90, 0x92, 0x9D, 0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x92, 0x9E, 0xF0, 0xB1, ++0xEE, 0x90, 0x85, 0xC9, 0xE0, 0x54, 0xEC, 0xF0, 0x31, 0xAA, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x0D, ++0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x04, 0x51, 0xCB, 0x80, 0x02, 0x51, 0x7E, 0x31, 0xAA, 0x64, ++0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x85, 0xCC, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, ++0x85, 0xCB, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x85, 0xCB, 0xE0, 0xFE, 0xFF, 0x80, 0x00, ++0x90, 0x85, 0xCC, 0xEF, 0xF0, 0x12, 0xBA, 0x83, 0xE4, 0x90, 0x85, 0xCE, 0xF0, 0x12, 0xC5, 0x60, ++0x31, 0x92, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x5C, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, ++0x22, 0x31, 0xA2, 0x6F, 0x70, 0x4E, 0x90, 0x85, 0xC2, 0xE0, 0x44, 0x40, 0xF0, 0xB1, 0x83, 0x90, ++0x01, 0x3F, 0x11, 0x90, 0x12, 0x7B, 0xFD, 0x91, 0x68, 0xB1, 0x5C, 0x90, 0x85, 0xCC, 0xE0, 0x14, ++0xF0, 0x80, 0x31, 0x90, 0x85, 0xC3, 0xE0, 0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x26, 0x31, 0xA2, ++0xFE, 0x6F, 0x60, 0x20, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x17, 0x31, 0x92, 0x54, ++0x3F, 0x30, 0xE0, 0x10, 0xEF, 0x54, 0xBF, 0xF0, 0x90, 0x01, 0x3F, 0x11, 0x90, 0x12, 0x7B, 0xBF, ++0xB1, 0x63, 0xB1, 0x32, 0x31, 0x9A, 0x90, 0x85, 0xBC, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x02, 0x31, ++0x9A, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0xFF, 0x13, 0x13, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0x44, 0x04, ++0xF0, 0x22, 0x90, 0x85, 0xCB, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x90, 0x85, 0xC3, 0xE0, 0xFF, 0xC4, ++0x54, 0x0F, 0x22, 0xE4, 0xF5, 0x77, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x02, 0x41, 0x50, 0x91, 0x6F, ++0x64, 0x01, 0x60, 0x02, 0x41, 0x50, 0x12, 0xC7, 0xFA, 0x31, 0xAA, 0x60, 0x22, 0x24, 0xFE, 0x60, ++0x03, 0x04, 0x70, 0x1E, 0x90, 0x85, 0xCC, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x85, ++0xCE, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, 0x90, 0x85, 0xCB, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, ++0x77, 0x01, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x12, 0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x02, 0x03, ++0xE4, 0xF5, 0x77, 0x12, 0x9F, 0xAD, 0xEF, 0x70, 0x02, 0xF5, 0x77, 0xE5, 0x77, 0x60, 0x41, 0x90, ++0x85, 0xC8, 0xE0, 0x20, 0xE2, 0x03, 0x12, 0x9D, 0x7A, 0xB1, 0x72, 0x90, 0x85, 0xCE, 0xE0, 0x60, ++0x04, 0x64, 0x01, 0x70, 0x13, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x85, 0xCE, 0xE0, 0x51, 0x5C, ++0x51, 0x70, 0x90, 0x85, 0xCE, 0xE0, 0x80, 0x12, 0xE4, 0x90, 0x91, 0x6E, 0x51, 0x51, 0x51, 0x70, ++0x90, 0x85, 0xCE, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0x51, 0x5C, 0x90, 0x85, 0xDE, 0xF0, ++0x22, 0xF0, 0x90, 0x85, 0xCE, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xFF, 0x90, 0x85, 0xCD, ++0xE0, 0x2F, 0x22, 0xE0, 0x44, 0x02, 0xF0, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x86, 0x6E, 0xE0, ++0x90, 0x91, 0x6F, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x02, 0x61, 0x41, 0xE4, 0xF5, ++0x77, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x77, 0x54, 0xC0, 0x70, 0x07, 0x51, 0xC3, 0x54, 0xFD, 0xF0, ++0xA1, 0x96, 0xE5, 0x77, 0x30, 0xE6, 0x19, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x01, 0x70, 0x13, 0x12, ++0x9F, 0xDE, 0x64, 0x02, 0x60, 0x05, 0x12, 0x77, 0x61, 0x80, 0x07, 0x12, 0x79, 0x41, 0x80, 0x02, ++0x51, 0xC3, 0xE5, 0x77, 0x90, 0x85, 0xC9, 0x30, 0xE7, 0x04, 0x51, 0x63, 0xA1, 0x6A, 0xE0, 0x54, ++0xFD, 0xF0, 0x22, 0x90, 0x85, 0xC9, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90, ++0x92, 0x56, 0xF0, 0xE0, 0xFD, 0x54, 0xC0, 0x70, 0x04, 0x51, 0xC3, 0x80, 0x56, 0xED, 0x30, 0xE6, ++0x41, 0x90, 0x85, 0xC5, 0xE0, 0x64, 0x02, 0x70, 0x28, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0xC3, 0x13, ++0x20, 0xE0, 0x09, 0x90, 0x85, 0xC9, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x1C, 0x12, 0x9F, 0xE5, 0x64, ++0x01, 0x70, 0x21, 0x90, 0x85, 0xC9, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x01, 0x12, 0x62, 0x8E, 0x80, ++0x13, 0x12, 0x9F, 0xDE, 0x64, 0x02, 0x60, 0x05, 0x12, 0x77, 0x61, 0x80, 0x07, 0x12, 0x79, 0x41, ++0x80, 0x02, 0x51, 0xC3, 0x90, 0x92, 0x56, 0xE0, 0x90, 0x85, 0xC9, 0x30, 0xE7, 0x04, 0x51, 0x63, ++0xA1, 0x6A, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x85, ++0xBE, 0x74, 0x01, 0xF0, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x02, 0x61, 0xEF, 0x90, 0x85, 0xDC, 0xE0, ++0x04, 0xF0, 0x90, 0x05, 0x61, 0x91, 0x5A, 0x78, 0x08, 0x12, 0x04, 0xD8, 0xA8, 0x04, 0xA9, 0x05, ++0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0x91, 0x5A, 0x12, 0x87, 0x4B, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x91, 0x5A, 0x78, 0x10, 0x12, 0x04, 0xD8, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x87, 0x4B, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0xA3, 0x91, 0x5A, 0x78, 0x18, 0x12, 0x04, 0xD8, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, ++0x00, 0x12, 0x87, 0x4B, 0x90, 0x85, 0xFC, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x96, 0xE0, ++0x54, 0xFE, 0xF0, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0x12, 0xBA, 0x76, 0xFB, 0x12, 0x51, 0x7D, ++0x90, 0x92, 0x96, 0xE0, 0x54, 0xFD, 0xF0, 0x31, 0x92, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x09, 0x90, ++0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0x91, 0x61, 0x90, 0x93, 0x27, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, ++0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x12, ++0x5D, 0x1F, 0x12, 0x6E, 0x1D, 0xE4, 0x90, 0x88, 0xE0, 0xF0, 0x7F, 0x01, 0x12, 0xB9, 0x12, 0xD1, ++0x04, 0x12, 0x9F, 0xD4, 0x30, 0xE0, 0x52, 0x90, 0x88, 0x76, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7C, ++0x00, 0x7D, 0x64, 0x12, 0x03, 0x82, 0x90, 0x88, 0xCA, 0xE0, 0x6E, 0x70, 0x03, 0xA3, 0xE0, 0x6F, ++0x60, 0x0A, 0x90, 0x88, 0xCA, 0xE4, 0x75, 0xF0, 0x01, 0x02, 0x07, 0x0A, 0x90, 0x88, 0x7A, 0xE0, ++0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x88, 0x88, 0xE0, 0xB5, 0x06, 0x14, 0xA3, 0xE0, 0xB5, 0x07, 0x0F, ++0xEF, 0x4E, 0x60, 0x0B, 0x90, 0x01, 0xC7, 0x74, 0x31, 0xF0, 0x7F, 0x01, 0x02, 0x5F, 0xE9, 0x12, ++0xC1, 0xFA, 0xE4, 0x90, 0x88, 0xCA, 0xF0, 0xA3, 0xF0, 0x22, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, ++0x22, 0x7D, 0x02, 0x7F, 0x02, 0x12, 0x7C, 0x41, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C, 0x41, 0xE4, ++0xFF, 0x12, 0x77, 0x39, 0xEF, 0x22, 0xE4, 0x90, 0x92, 0x67, 0xF0, 0x90, 0x85, 0xC5, 0xE0, 0x60, ++0x4F, 0x91, 0x6F, 0x64, 0x01, 0x70, 0x49, 0xB1, 0x83, 0x12, 0xC7, 0xFA, 0x90, 0x92, 0x67, 0x74, ++0x01, 0xF0, 0xE4, 0x90, 0x85, 0xCC, 0xF0, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x85, ++0xC0, 0xE0, 0xB4, 0x02, 0x05, 0xE4, 0x90, 0x92, 0x67, 0xF0, 0x12, 0x9F, 0xAD, 0xEF, 0x70, 0x04, ++0x90, 0x92, 0x67, 0xF0, 0x90, 0x92, 0x67, 0xE0, 0x60, 0x16, 0x90, 0x85, 0xC8, 0xE0, 0x20, 0xE2, ++0x03, 0x12, 0x9D, 0x7A, 0xB1, 0x72, 0xE4, 0x90, 0x91, 0x6E, 0xF0, 0x90, 0x85, 0xCD, 0x51, 0x6F, ++0x22, 0x31, 0x92, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, ++0xE0, 0x02, 0xB1, 0x5C, 0xB1, 0xFA, 0x30, 0xE0, 0x08, 0xB1, 0xC3, 0x54, 0x07, 0x70, 0x3A, 0x80, ++0x36, 0x12, 0xC5, 0x9A, 0x40, 0x31, 0x91, 0x6F, 0x64, 0x01, 0x70, 0x2D, 0x12, 0x9F, 0xE5, 0x70, ++0x05, 0x12, 0x70, 0xDB, 0x80, 0x24, 0x12, 0x70, 0xDB, 0x90, 0x85, 0xCF, 0xE0, 0x04, 0xF0, 0xE0, ++0xD3, 0x94, 0x02, 0x40, 0x09, 0xB1, 0x2A, 0xE4, 0x90, 0x85, 0xCF, 0xF0, 0x80, 0x03, 0x12, 0x79, ++0x41, 0xE4, 0x90, 0x85, 0xCE, 0xF0, 0x22, 0xB1, 0x96, 0x22, 0x90, 0x85, 0xC2, 0xE0, 0x54, 0xFB, ++0xF0, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0xA9, 0x91, 0x76, 0xB1, 0x32, 0x7F, 0x01, 0xF1, ++0x38, 0x90, 0x92, 0x84, 0xE0, 0x30, 0xE0, 0x13, 0xB1, 0x7A, 0x90, 0x92, 0x87, 0xE0, 0x60, 0x05, ++0x14, 0xF0, 0x02, 0x7A, 0x8A, 0xB1, 0x8C, 0xE4, 0xFF, 0x11, 0x4F, 0x22, 0x7D, 0x02, 0x7F, 0x02, ++0x02, 0x7C, 0x41, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C, 0xA9, 0x90, 0x85, 0xC1, 0xE0, 0x44, 0x04, ++0xF0, 0x22, 0x90, 0x85, 0xC9, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x92, 0x86, 0xE0, 0x90, 0x05, ++0x73, 0xF0, 0x22, 0x90, 0x85, 0xCB, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0x90, 0x92, 0x85, 0xE0, ++0x14, 0x90, 0x92, 0x87, 0xF0, 0x22, 0x90, 0x85, 0xBC, 0xE0, 0x90, 0x85, 0xC7, 0x30, 0xE0, 0x05, ++0xE0, 0xFF, 0x02, 0x9F, 0xB9, 0x02, 0x9F, 0x8C, 0x91, 0x6F, 0x64, 0x01, 0x70, 0x14, 0x90, 0x85, ++0xC5, 0xE0, 0x60, 0x0E, 0xB1, 0xEE, 0x90, 0x85, 0xC1, 0xE0, 0xB1, 0xC4, 0x54, 0x07, 0x70, 0x02, ++0xB1, 0x96, 0x22, 0xEF, 0x54, 0xFB, 0xF0, 0x90, 0x85, 0xC9, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, ++0x01, 0x57, 0xE0, 0x60, 0x18, 0xB1, 0xF1, 0xB1, 0xFA, 0x30, 0xE0, 0x02, 0x80, 0xE5, 0x12, 0xC5, ++0x9A, 0x40, 0x0A, 0xE4, 0xFF, 0x12, 0x77, 0x39, 0xBF, 0x01, 0x02, 0xB1, 0x2A, 0x22, 0x90, 0x01, ++0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0x13, ++0x13, 0x54, 0x3F, 0x22, 0x90, 0x92, 0x84, 0xE0, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x3B, 0xE0, 0x30, ++0xE4, 0x02, 0x91, 0x61, 0x22, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0F, 0x90, 0x06, 0x92, 0xE0, 0x30, ++0xE1, 0x03, 0x02, 0x6B, 0x98, 0x12, 0xC9, 0x25, 0xB1, 0x96, 0x22, 0xE4, 0xFF, 0x12, 0x77, 0x39, ++0xBF, 0x01, 0x0E, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x08, 0x51, 0xC3, 0x54, 0x07, 0x70, 0x02, 0xB1, ++0x96, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, ++0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x01, 0xC4, 0x74, 0x42, 0xF0, 0x74, 0xA6, 0xA3, 0xF0, 0x12, 0x71, 0x90, 0xE5, 0x4C, 0x30, 0xE1, ++0x02, 0xF1, 0xE2, 0xE5, 0x4C, 0x30, 0xE3, 0x03, 0x12, 0xB9, 0x28, 0xE5, 0x4C, 0x30, 0xE4, 0x03, ++0x12, 0xB9, 0x21, 0xE5, 0x4C, 0x30, 0xE5, 0x03, 0x12, 0xBF, 0x03, 0xE5, 0x4C, 0x30, 0xE6, 0x03, ++0x12, 0xBD, 0x87, 0xE5, 0x4E, 0x30, 0xE0, 0x02, 0xF1, 0x1C, 0xE5, 0x4E, 0x30, 0xE1, 0x02, 0x71, ++0x37, 0xE5, 0x4E, 0x30, 0xE2, 0x03, 0x12, 0xBD, 0x94, 0xE5, 0x4E, 0x30, 0xE3, 0x02, 0xF1, 0x03, ++0xE5, 0x4E, 0x30, 0xE4, 0x02, 0xB1, 0xA8, 0xE5, 0x4E, 0x30, 0xE5, 0x03, 0x12, 0xBD, 0xC3, 0xE5, ++0x4E, 0x30, 0xE6, 0x02, 0xD1, 0x2B, 0xE5, 0x4F, 0x30, 0xE1, 0x03, 0x12, 0xBD, 0xDF, 0xE5, 0x4F, ++0x30, 0xE4, 0x03, 0x12, 0xBF, 0x3F, 0xE5, 0x4F, 0x30, 0xE5, 0x02, 0xF1, 0x6F, 0x74, 0x42, 0x04, ++0x90, 0x01, 0xC4, 0xF0, 0x74, 0xA6, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, ++0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, ++0xD0, 0xE0, 0x32, 0x91, 0x6F, 0x64, 0x01, 0x70, 0x12, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0C, 0x90, ++0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x51, 0x66, 0x22, 0x90, 0x85, 0xBC, 0xE0, ++0x30, 0xE0, 0x11, 0xA3, 0x74, 0x01, 0xF0, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, ++0x03, 0x12, 0xB7, 0x24, 0x31, 0xB3, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x92, 0x96, 0xE0, 0xFE, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1F, 0x90, 0x92, 0x67, 0x74, 0x1E, ++0xF0, 0x90, 0x92, 0x75, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x69, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, 0x92, ++0x79, 0x67, 0x12, 0x5E, 0x10, 0x7F, 0x04, 0x12, 0xB9, 0x12, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, ++0xF5, 0x77, 0x90, 0x85, 0xBB, 0xE0, 0xFF, 0xE5, 0x77, 0xC3, 0x9F, 0x50, 0x64, 0xAF, 0x77, 0x12, ++0x77, 0x39, 0xEF, 0x60, 0x58, 0xE5, 0x77, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFF, 0xE5, 0x77, 0x54, ++0x07, 0xFE, 0x74, 0x75, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, 0xFD, 0xAF, 0x06, ++0x12, 0xA9, 0xA8, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, ++0x60, 0x2B, 0xE5, 0x77, 0x12, 0xC8, 0x76, 0x20, 0xE7, 0x02, 0x80, 0x13, 0xE5, 0x77, 0xC4, 0x54, ++0xF0, 0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, 0xFF, 0x20, 0xE7, 0x09, 0x90, ++0x01, 0xC1, 0xE0, 0x44, 0x20, 0xF0, 0x80, 0x05, 0xAD, 0x77, 0x12, 0x97, 0x08, 0x05, 0x77, 0x80, ++0x91, 0x22, 0xE4, 0xFF, 0x90, 0x92, 0x56, 0xEF, 0xF0, 0x90, 0x04, 0x7E, 0xE0, 0xFF, 0xA3, 0xE0, ++0x90, 0x92, 0x66, 0xF0, 0xE0, 0xFE, 0x6F, 0x60, 0x66, 0x90, 0x92, 0x57, 0x74, 0x03, 0xF0, 0x90, ++0x92, 0x65, 0x74, 0x08, 0xF0, 0xEE, 0x04, 0x54, 0x0F, 0xFF, 0xE4, 0xFE, 0xEF, 0x75, 0xF0, 0x08, ++0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x80, 0xF5, 0x83, 0xE5, 0x82, 0x2E, 0x11, 0x60, 0xE0, ++0xFD, 0x74, 0x59, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xED, 0xF0, 0x0E, 0xEE, 0xB4, ++0x08, 0xDA, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x57, 0x12, 0x5E, 0x10, 0x90, 0x92, 0x66, 0xE0, 0x04, ++0x54, 0x0F, 0xFF, 0xF0, 0xBF, 0x0F, 0x02, 0xE4, 0xF0, 0x90, 0x92, 0x66, 0xE0, 0x90, 0x04, 0x7F, ++0xF0, 0x90, 0x92, 0x56, 0xE0, 0x7F, 0x04, 0x70, 0x03, 0x02, 0xB9, 0x12, 0x12, 0x87, 0xBB, 0x22, ++0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x92, ++0x01, 0xF0, 0x90, 0x92, 0x01, 0xE0, 0xFD, 0x70, 0x02, 0x21, 0x75, 0x90, 0x85, 0x1D, 0xE0, 0xFF, ++0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x85, 0x1E, 0xE0, 0xB5, ++0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, ++0x01, 0xF0, 0x22, 0x90, 0x93, 0x22, 0xE0, 0x31, 0xA7, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x21, 0x58, 0xE4, 0x90, 0x92, 0x02, 0xF0, 0x90, ++0x92, 0x02, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x40, 0x31, 0x77, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, ++0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0x31, 0x7F, 0x90, 0x84, 0xCD, 0x12, 0x05, ++0x28, 0xE5, 0x82, 0x29, 0x11, 0x60, 0xEF, 0x31, 0x76, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, ++0x74, 0xF0, 0x31, 0x7F, 0x90, 0x84, 0xD1, 0x12, 0x05, 0x28, 0xE5, 0x82, 0x29, 0x11, 0x60, 0xEF, ++0xF0, 0x90, 0x92, 0x02, 0xE0, 0x04, 0xF0, 0x80, 0xB6, 0x90, 0x92, 0x01, 0xE0, 0xFF, 0x90, 0x93, ++0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, ++0x90, 0x92, 0x01, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0x04, 0xF0, 0xE0, 0x54, ++0x03, 0xF0, 0x90, 0x85, 0x1E, 0xF1, 0xC4, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x01, ++0x72, 0xE4, 0x90, 0x85, 0x1E, 0xF0, 0x01, 0x72, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, ++0x93, 0x22, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x31, 0x76, 0x90, 0x01, 0xD0, 0x12, 0x05, 0x28, ++0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0x75, 0xF0, 0x04, 0x22, 0x2F, ++0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x85, 0x1E, 0xE0, 0x75, 0xF0, 0x08, ++0x22, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, ++0xFD, 0x7C, 0x00, 0xE5, 0x62, 0x54, 0x07, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x22, 0xE4, ++0xF5, 0x73, 0xEF, 0x14, 0xF5, 0x72, 0xED, 0xFF, 0xE5, 0x72, 0xF5, 0x82, 0x33, 0x95, 0xE0, 0xF5, ++0x83, 0xC3, 0xE5, 0x82, 0x9F, 0x74, 0x80, 0xF8, 0x65, 0x83, 0x98, 0x40, 0x52, 0xE5, 0x72, 0x78, ++0x03, 0xA2, 0xE7, 0x13, 0xD8, 0xFB, 0xFF, 0x33, 0x95, 0xE0, 0xFE, 0xEB, 0x12, 0xC8, 0x3F, 0xE5, ++0x82, 0x2F, 0xF5, 0x82, 0xE5, 0x83, 0x3E, 0xF5, 0x83, 0xE0, 0xF5, 0x82, 0x75, 0x83, 0x00, 0xE5, ++0x72, 0x31, 0xA5, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x55, ++0x83, 0xFE, 0xEF, 0x55, 0x82, 0x4E, 0x60, 0x13, 0x85, 0x72, 0x74, 0x05, 0x73, 0x90, 0x92, 0x3E, ++0xE0, 0x65, 0x73, 0x60, 0x0A, 0xE5, 0x74, 0xD3, 0x9D, 0x40, 0x04, 0x15, 0x72, 0x80, 0x97, 0xAF, ++0x74, 0x22, 0x7D, 0x01, 0xAF, 0x62, 0xAC, 0x05, 0x90, 0x92, 0x39, 0xEF, 0xF0, 0xFD, 0xE0, 0xFF, ++0x12, 0x8F, 0x73, 0xE0, 0xF5, 0x6E, 0x54, 0x7F, 0xF5, 0x70, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, ++0x3D, 0x12, 0x05, 0x28, 0xE0, 0xF9, 0x90, 0x92, 0x39, 0xE0, 0x12, 0xC8, 0x4D, 0xFE, 0xEF, 0x12, ++0x91, 0xDA, 0xE0, 0x54, 0x03, 0xF5, 0x6F, 0xE5, 0x70, 0x90, 0x83, 0x1D, 0x93, 0xFB, 0xED, 0x71, ++0x17, 0xE4, 0xF0, 0xA3, 0xEB, 0xF0, 0x12, 0x8B, 0x18, 0xC4, 0x54, 0x03, 0x90, 0x92, 0x3A, 0xF0, ++0x74, 0xCC, 0x2D, 0x51, 0xF9, 0xE5, 0x70, 0xF0, 0x74, 0x4C, 0x2D, 0xF1, 0xD3, 0xE5, 0x6F, 0xF0, ++0xE5, 0x70, 0xD3, 0x9E, 0x40, 0x06, 0x8E, 0x70, 0xAF, 0x06, 0x8F, 0x6E, 0x8C, 0x71, 0xE4, 0xFF, ++0xEF, 0xC3, 0x95, 0x71, 0x50, 0x2F, 0xE5, 0x6E, 0x30, 0xE7, 0x09, 0x85, 0x70, 0x6E, 0x1C, 0xEC, ++0x70, 0x20, 0x80, 0x21, 0xE5, 0x70, 0xD3, 0x99, 0x40, 0x14, 0xAD, 0x01, 0x90, 0x92, 0x39, 0xE0, ++0xFB, 0x90, 0x92, 0x3E, 0xEC, 0xF0, 0xAF, 0x70, 0x31, 0xAF, 0x8F, 0x6E, 0x80, 0x07, 0x89, 0x6E, ++0x80, 0x03, 0x0F, 0x80, 0xCB, 0x90, 0x92, 0x39, 0xE0, 0xFF, 0x12, 0x8F, 0xDA, 0xEF, 0xF0, 0xA3, ++0xE4, 0xF0, 0xA3, 0xE5, 0x6E, 0xF1, 0xCB, 0x91, 0x1E, 0x7B, 0x01, 0xFA, 0x7D, 0x05, 0x7F, 0x08, ++0x12, 0x96, 0x87, 0x90, 0x92, 0x39, 0xE0, 0xFF, 0x90, 0x91, 0x0B, 0xE5, 0x6F, 0xF0, 0xE4, 0xFB, ++0xAD, 0x6E, 0x02, 0x27, 0x3D, 0x74, 0xCC, 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, ++0x22, 0xE5, 0x71, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE4, 0x93, ++0xFE, 0x74, 0x01, 0x93, 0xFF, 0xE5, 0x6E, 0x25, 0xE0, 0x24, 0x7B, 0xF5, 0x82, 0xE4, 0x34, 0x8F, ++0xF5, 0x83, 0x22, 0x90, 0x92, 0x39, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xEB, 0x75, ++0xF0, 0x06, 0xA4, 0xFF, 0x90, 0x89, 0x21, 0x12, 0x87, 0x70, 0xE9, 0x2F, 0xF9, 0xEA, 0x35, 0xF0, ++0xFA, 0x90, 0x92, 0x41, 0x12, 0x87, 0x79, 0x90, 0x92, 0x3B, 0xE0, 0x71, 0x17, 0xE0, 0xFF, 0xA3, ++0xE0, 0x90, 0x92, 0x3E, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0x92, 0x41, 0x12, ++0x87, 0x70, 0x90, 0x92, 0x40, 0xE0, 0xFF, 0xF5, 0x82, 0x75, 0x83, 0x00, 0x12, 0x03, 0x0F, 0xFD, ++0x7C, 0x00, 0x90, 0x92, 0x3B, 0xE0, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x44, 0x12, 0x05, 0x28, 0x75, ++0xF0, 0x02, 0xEF, 0x91, 0x16, 0xFF, 0x90, 0x92, 0x3D, 0xE0, 0xFB, 0xEF, 0xA8, 0x03, 0x08, 0x80, ++0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x91, 0x06, 0xEE, 0x8F, 0xF0, 0x12, 0x07, 0x0A, ++0x90, 0x92, 0x40, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x05, 0xB2, 0x90, 0x92, 0x41, 0x12, 0x87, 0x70, ++0x90, 0x00, 0x05, 0x12, 0x03, 0x0F, 0xFD, 0x7C, 0x00, 0x90, 0x92, 0x3D, 0xE0, 0xFF, 0x90, 0x92, ++0x39, 0xE0, 0xFE, 0xA3, 0xE0, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, ++0xF9, 0x91, 0x06, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xD3, 0x9F, 0xEC, 0x9E, 0x40, 0x08, 0xED, 0x9F, ++0xFF, 0xEC, 0x9E, 0xFE, 0x80, 0x04, 0x7E, 0x00, 0x7F, 0x00, 0x90, 0x92, 0x3E, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0x90, 0x92, 0x3E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x92, 0x3B, 0xE0, 0x71, 0x17, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xFF, 0x12, 0x03, 0x70, 0x90, 0x92, 0x3E, 0x22, 0x75, 0xF0, ++0x12, 0xE5, 0x62, 0x90, 0x89, 0x40, 0x12, 0x05, 0x28, 0xE0, 0xFE, 0xA3, 0xE0, 0x22, 0xF0, 0xE4, ++0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x92, 0xF5, ++0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0xA3, 0x91, 0x1E, 0x90, 0x92, 0xFD, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0x90, 0x01, 0xC4, 0x74, 0x25, 0xF0, 0x74, 0xAC, 0xA3, 0xF0, 0x90, 0x01, 0x1F, 0xE0, ++0xFE, 0x90, 0x01, 0x1E, 0xF1, 0x66, 0xEC, 0x3E, 0x90, 0x92, 0xEC, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0x02, 0x87, 0xE0, 0x90, 0x92, 0xF4, 0xF0, 0x90, 0x86, 0x72, 0xE0, 0x20, 0xE0, 0x02, 0xE1, 0x0C, ++0xE4, 0x90, 0x92, 0xF3, 0xF0, 0x90, 0x92, 0xF4, 0xE0, 0xFF, 0x90, 0x92, 0xF3, 0xE0, 0xC3, 0x9F, ++0x40, 0x02, 0xE1, 0x0C, 0x90, 0x92, 0xEC, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0xFF, 0x90, 0xFD, ++0x11, 0xF0, 0x90, 0x92, 0xFD, 0xEF, 0xF0, 0xF1, 0xA1, 0xF5, 0x83, 0xE0, 0xFE, 0xF1, 0x53, 0xF1, ++0xDB, 0x54, 0x3F, 0xFE, 0x90, 0x92, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0xF9, 0xEE, 0xF0, ++0xA3, 0xF1, 0xB6, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF, 0xF1, 0xAA, 0x54, 0x03, 0xFE, ++0xEF, 0x24, 0x18, 0x2E, 0xFF, 0x90, 0x92, 0xFE, 0xF0, 0x90, 0x92, 0xED, 0xE0, 0x2F, 0xFF, 0x90, ++0x92, 0xEC, 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x92, 0xF0, 0xF1, 0x38, 0xC0, 0x07, 0xF1, 0x1D, 0x7D, ++0x01, 0x12, 0x55, 0x36, 0xC0, 0x07, 0xF1, 0x1D, 0x7D, 0x04, 0x12, 0x55, 0x36, 0xAB, 0x07, 0xD0, ++0x05, 0xD0, 0x07, 0x12, 0x5D, 0x98, 0x90, 0x92, 0xF5, 0xEF, 0xF1, 0x1C, 0xE4, 0xFD, 0x12, 0x55, ++0x36, 0xEF, 0x54, 0xFC, 0x90, 0x92, 0xF2, 0xF0, 0x90, 0x92, 0xFE, 0xE0, 0xFF, 0x90, 0x92, 0xEE, ++0xE4, 0x8F, 0xF0, 0x12, 0x07, 0x0A, 0x90, 0x92, 0xEE, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x7A, ++0xD0, 0x90, 0x92, 0xEE, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xF1, 0x4A, 0x7D, 0x0F, 0x12, 0x55, 0x36, ++0x90, 0x92, 0xEE, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x90, 0x92, 0xEC, 0xEC, 0x8D, 0xF0, 0x12, 0x07, ++0x0A, 0x90, 0x85, 0xB7, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xD3, 0x90, 0x92, 0xED, 0xE0, 0x9D, 0x90, ++0x92, 0xEC, 0xE0, 0x9C, 0x40, 0x1B, 0x90, 0x85, 0xB8, 0xE0, 0x24, 0x01, 0xFD, 0x90, 0x85, 0xB7, ++0xE0, 0x34, 0x00, 0xFC, 0xC3, 0x90, 0x92, 0xED, 0xE0, 0x9D, 0xF0, 0x90, 0x92, 0xEC, 0xE0, 0x9C, ++0xF0, 0xEF, 0x30, 0xE6, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x22, 0xF0, 0xEF, 0x30, 0xE7, 0x06, 0x90, ++0x01, 0xC7, 0x74, 0x21, 0xF0, 0xEF, 0x30, 0xE5, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x23, 0xF0, 0x90, ++0x92, 0xF2, 0xE0, 0x24, 0x40, 0x60, 0x04, 0x24, 0x20, 0x70, 0x2C, 0x90, 0x86, 0x75, 0xE0, 0xFF, ++0x12, 0x8D, 0x6B, 0x20, 0xE0, 0x02, 0xC1, 0x90, 0x90, 0x86, 0x87, 0xE0, 0x04, 0xF1, 0x1C, 0x12, ++0x59, 0x20, 0xEF, 0x70, 0x02, 0xC1, 0x90, 0x90, 0x92, 0xF2, 0xE0, 0xFF, 0x12, 0x7B, 0x77, 0x90, ++0x86, 0x88, 0xE0, 0x04, 0xF0, 0xC1, 0x90, 0x12, 0x9F, 0xD4, 0x30, 0xE0, 0x5A, 0x90, 0x92, 0xF5, ++0xE0, 0xFF, 0x90, 0x92, 0xF1, 0xE0, 0x2F, 0xFF, 0x90, 0x92, 0xF0, 0xE0, 0x34, 0x00, 0xCF, 0x24, ++0x08, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0x92, 0xFB, 0xF1, 0x38, 0xEF, 0x64, 0x45, 0x70, 0x38, 0xF1, ++0x27, 0x12, 0xC7, 0x9B, 0xEF, 0x64, 0x01, 0x70, 0x2E, 0xF1, 0x27, 0x12, 0xC7, 0x5E, 0xEF, 0x64, ++0x01, 0x70, 0x24, 0x90, 0x92, 0xFF, 0x04, 0xF1, 0x26, 0xA3, 0xE0, 0xFD, 0x12, 0xC6, 0xB7, 0xEF, ++0x70, 0x0D, 0x90, 0x92, 0xFD, 0xE0, 0xFD, 0x90, 0xFD, 0x11, 0xF1, 0x26, 0x12, 0xC7, 0x0F, 0x90, ++0x92, 0xFD, 0xE0, 0x90, 0xFD, 0x11, 0xF0, 0xF1, 0x1D, 0x12, 0x59, 0x20, 0xEF, 0x60, 0x18, 0xF1, ++0x1D, 0x90, 0x92, 0xF5, 0xE0, 0xFD, 0x90, 0x92, 0xF8, 0xE0, 0xFB, 0x12, 0x54, 0x02, 0xEF, 0x60, ++0x06, 0x90, 0x92, 0xFF, 0x74, 0x01, 0xF0, 0x90, 0x86, 0x72, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x13, ++0xF1, 0x1D, 0x90, 0x92, 0xF5, 0xE0, 0xFD, 0x12, 0x38, 0x10, 0xEF, 0x60, 0x06, 0x90, 0x92, 0xFF, ++0x74, 0x01, 0xF0, 0x12, 0x8F, 0xF4, 0x54, 0x3F, 0x30, 0xE0, 0x0A, 0xF1, 0x1D, 0x90, 0x92, 0xF5, ++0xE0, 0xFD, 0x12, 0x21, 0xB6, 0x90, 0x86, 0x72, 0xE0, 0xFF, 0x12, 0x8D, 0x6B, 0x30, 0xE0, 0x10, ++0x90, 0x92, 0xFF, 0xE0, 0x70, 0x0A, 0xF1, 0x1D, 0x90, 0x92, 0xF5, 0xE0, 0xFD, 0x12, 0x4A, 0x3F, ++0x12, 0x79, 0x00, 0xEF, 0x64, 0x01, 0x60, 0x07, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x10, 0xF1, ++0x41, 0x30, 0xE0, 0x06, 0x90, 0x01, 0x3F, 0x74, 0x04, 0xF0, 0x7F, 0x01, 0x12, 0x5F, 0xE9, 0x90, ++0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x02, 0xF1, 0x30, 0x12, 0x7A, 0xE7, 0xEF, 0x64, 0x01, 0x70, 0x36, ++0x90, 0x86, 0x89, 0xE0, 0x04, 0xF0, 0x12, 0x6F, 0xE5, 0xAD, 0x07, 0xEF, 0x64, 0x01, 0x60, 0x1F, ++0xF1, 0x30, 0xED, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x42, 0xF0, 0x80, 0x0A, 0xED, 0xB4, ++0x04, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x43, 0xF0, 0x7F, 0x01, 0x12, 0x5F, 0xE9, 0x80, 0x1D, 0xF1, ++0x4A, 0x12, 0x7C, 0x0B, 0x80, 0x0E, 0xF1, 0x41, 0x20, 0xE0, 0x11, 0x90, 0x86, 0x72, 0xE0, 0x54, ++0xFE, 0xF0, 0x80, 0x08, 0x90, 0x92, 0xF3, 0xE0, 0x04, 0xF0, 0x81, 0x75, 0x74, 0x25, 0x04, 0x90, ++0x01, 0xC4, 0xF0, 0x74, 0xAC, 0xA3, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x92, 0xF0, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xF0, 0x90, 0x92, 0xFB, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, ++0x90, 0x86, 0x7A, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xFD, 0x02, 0x55, ++0x36, 0x90, 0x86, 0x74, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x22, 0x90, 0x92, 0xEC, 0xE0, 0xFE, 0xA3, ++0xE0, 0xFF, 0x22, 0x74, 0x00, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0x22, 0x90, 0x01, ++0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF, 0x22, 0xE4, 0xFC, 0xED, ++0x2C, 0x24, 0x00, 0xF1, 0x56, 0xE4, 0xF0, 0x0C, 0xEC, 0xB4, 0x18, 0xF3, 0xF1, 0x53, 0xEF, 0xF0, ++0xEE, 0x54, 0x3F, 0xFF, 0xF1, 0xA1, 0xF5, 0x83, 0xF1, 0xB6, 0x54, 0xF0, 0xF0, 0xF1, 0xAA, 0x44, ++0x80, 0xF0, 0x74, 0x0B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, ++0x22, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0x22, 0x74, 0x03, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, ++0xF5, 0x83, 0xE0, 0x22, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0x22, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, ++0xE5, 0x6F, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0x22, 0xE0, 0x7A, 0x00, 0x24, 0x00, ++0xFF, 0xEA, 0x3E, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x85, 0x1E, 0xE0, 0xFF, ++0x90, 0x85, 0x1D, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x48, ++0x90, 0x85, 0x1D, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x84, 0xCD, 0x12, 0x05, 0x28, 0xE0, 0xFD, ++0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0xCE, 0xF9, 0x74, 0x84, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, ++0x05, 0x12, 0x88, 0xE7, 0x90, 0x85, 0x1D, 0x12, 0xAF, 0xC4, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, ++0x60, 0x05, 0xE4, 0x90, 0x85, 0x1D, 0xF0, 0x7D, 0x68, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x12, 0x40, ++0xB9, 0x90, 0x84, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x85, 0xB5, ++0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x85, 0xB6, ++0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, ++0xE0, 0x44, 0x02, 0xF0, 0x22, 0xC0, 0x01, 0x90, 0x85, 0xB6, 0xE0, 0x75, 0xF0, 0x0F, 0xA4, 0x24, ++0x1F, 0xF9, 0x74, 0x85, 0x35, 0xF0, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, 0x7E, 0x00, 0x7F, ++0x0F, 0x12, 0x02, 0xD0, 0x7D, 0xCC, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xB6, 0x12, 0xAF, ++0xC4, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x85, 0xB6, 0xF0, 0x22, 0x90, ++0x92, 0x21, 0xEF, 0xF0, 0xA3, 0x12, 0x87, 0x79, 0x90, 0x93, 0x23, 0xE0, 0xFE, 0x04, 0xF0, 0x90, ++0x00, 0x01, 0xEE, 0x12, 0x03, 0x4E, 0x74, 0x00, 0x2F, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, ++0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x92, 0x22, 0x12, 0x87, 0x70, 0x8B, 0x1B, 0x8A, 0x1C, ++0x89, 0x1D, 0x75, 0x1E, 0x02, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x6A, 0x21, 0x90, 0x92, ++0x21, 0xE0, 0x24, 0x02, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, ++0x01, 0xA3, 0x12, 0x87, 0x70, 0xE9, 0x24, 0x02, 0xF9, 0xE4, 0x3A, 0x8B, 0x1B, 0xF5, 0x1C, 0x89, ++0x1D, 0x90, 0x92, 0x22, 0x31, 0x21, 0xF5, 0x1E, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x02, 0x6A, ++0x21, 0x12, 0x87, 0x70, 0x90, 0x00, 0x0E, 0x02, 0x03, 0x0F, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x92, 0x25, 0x12, 0x87, 0x79, 0x7F, 0x96, 0x7E, 0x02, 0x12, 0x66, 0x80, 0xEF, 0x60, ++0x48, 0x12, 0xAF, 0x5E, 0xEC, 0x3E, 0xFE, 0xEF, 0x24, 0x01, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x92, ++0x28, 0xEF, 0xF0, 0xEE, 0xFF, 0x90, 0xFD, 0x11, 0xF0, 0x90, 0x92, 0x28, 0xE0, 0xFD, 0x90, 0x02, ++0x94, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x25, 0x31, 0x21, 0x24, 0x02, 0xFF, 0xE4, 0x33, 0xFE, ++0x12, 0x5A, 0xA5, 0x90, 0x92, 0x28, 0xE0, 0x24, 0x18, 0xFF, 0x90, 0x92, 0x25, 0x12, 0x87, 0x70, ++0x12, 0x56, 0xF4, 0x90, 0x02, 0x96, 0x74, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x02, 0x8B, ++0x24, 0xE4, 0x90, 0x92, 0x2B, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x92, 0x2B, 0xE0, 0x64, 0x01, ++0xF0, 0x24, 0x91, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xB1, 0xA3, 0xF0, 0x12, 0x7C, 0x66, 0xBF, 0x01, ++0x03, 0x12, 0x5B, 0x25, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x0F, 0x90, 0x85, 0xC8, 0xE0, 0xFF, 0x90, ++0x85, 0xC7, 0xE0, 0x6F, 0x60, 0x03, 0x12, 0xA5, 0x96, 0xC2, 0xAF, 0xF1, 0x5D, 0xBF, 0x01, 0x02, ++0x31, 0xFA, 0xD2, 0xAF, 0x71, 0x03, 0x90, 0x92, 0x2C, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, ++0x54, 0x7F, 0x45, 0xF0, 0x70, 0x0D, 0x7F, 0xFF, 0x12, 0x7B, 0x51, 0xEF, 0x04, 0xFD, 0x7F, 0xFF, ++0x12, 0x7B, 0x3E, 0x31, 0x8E, 0x12, 0x84, 0x4D, 0x80, 0xA0, 0x90, 0x85, 0xC1, 0xE0, 0x30, 0xE0, ++0x18, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x30, 0xE0, 0x0E, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0xD1, 0x88, ++0xBF, 0x01, 0x06, 0x80, 0x02, 0x80, 0x00, 0x51, 0x1A, 0x22, 0x90, 0x85, 0xC8, 0xE0, 0xFF, 0x60, ++0x03, 0xB4, 0x08, 0x0D, 0x71, 0x67, 0xBF, 0x01, 0x08, 0x51, 0x32, 0x90, 0x01, 0xE5, 0xE0, 0x04, ++0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x51, 0xB1, 0x51, 0x42, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xF1, 0x3E, 0x7F, 0x08, 0x12, 0x7B, 0x51, 0xEF, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, ++0x7B, 0x3E, 0xE4, 0xFF, 0x51, 0x65, 0x7D, 0x35, 0x7F, 0x27, 0x12, 0x7B, 0x3E, 0x90, 0x85, 0xC2, ++0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x93, 0x1C, 0xEF, 0x12, 0xAC, 0x1E, 0x90, 0x01, 0x09, 0xE0, ++0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x1C, 0xE0, 0x6F, 0x60, 0x32, 0xC3, 0x90, ++0x93, 0x1E, 0xE0, 0x94, 0x88, 0x90, 0x93, 0x1D, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, ++0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x93, 0x1D, 0xD1, 0x95, 0xD3, 0x90, 0x93, 0x1E, 0xE0, 0x94, ++0x32, 0x90, 0x93, 0x1D, 0xE0, 0x94, 0x00, 0x40, 0xC3, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xBC, ++0x22, 0x90, 0x85, 0xC2, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x85, 0xD0, 0xE0, 0xFD, 0x7F, 0x93, 0x12, ++0x7B, 0x3E, 0x90, 0x85, 0xC6, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, ++0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x7F, 0x08, 0x12, 0x7B, 0x51, 0xEF, ++0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, 0x7B, 0x3E, 0x7F, 0x01, 0x51, 0x65, 0x7D, 0x34, 0x7F, 0x27, ++0x12, 0x7B, 0x3E, 0x7F, 0x90, 0x71, 0xDC, 0x7F, 0x90, 0x12, 0x7B, 0x3E, 0x7F, 0x14, 0x7E, 0x00, ++0x02, 0x7C, 0x9F, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x92, 0x90, 0xE0, 0x60, 0x25, ++0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70, 0x61, 0x71, 0x5B, 0xEF, 0x44, 0xFE, 0xFF, 0xEE, 0x44, 0x03, ++0xFE, 0xED, 0x44, 0x04, 0xFD, 0xEC, 0x71, 0x5B, 0x90, 0x91, 0x66, 0x12, 0x04, 0xEB, 0x7F, 0x54, ++0x7E, 0x09, 0x12, 0x71, 0x18, 0x90, 0x92, 0x8B, 0xE0, 0x70, 0x04, 0x90, 0x07, 0xCC, 0xF0, 0x90, ++0x92, 0x93, 0xE0, 0x70, 0x0A, 0x90, 0x92, 0x90, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0x07, 0x90, ++0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x92, 0x2E, 0x12, 0x04, ++0xEB, 0x90, 0x92, 0x2E, 0x02, 0x87, 0x58, 0x90, 0x92, 0x84, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x48, ++0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, ++0x75, 0x61, 0x01, 0x80, 0x40, 0x90, 0x86, 0x72, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x02, 0x82, 0xE0, ++0x60, 0x05, 0x75, 0x61, 0x02, 0x80, 0x2E, 0x90, 0x86, 0x7A, 0xE0, 0x30, 0xE0, 0x05, 0x75, 0x61, ++0x08, 0x80, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, ++0x30, 0xE3, 0x05, 0x75, 0x61, 0x04, 0x80, 0x0D, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x05, 0x75, 0x61, ++0x40, 0x80, 0x02, 0x80, 0x0F, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x61, ++0xF0, 0x7F, 0x00, 0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x22, 0x12, 0x7B, 0x51, 0xEF, ++0x44, 0x01, 0xFD, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x02, 0x71, 0xDC, 0x7F, ++0x02, 0xD1, 0x80, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, ++0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x90, 0xD7, ++0x90, 0x85, 0xBF, 0x74, 0x01, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x85, ++0xBF, 0xE0, 0x90, 0x93, 0x29, 0xF0, 0x6F, 0x70, 0x02, 0xA1, 0x1E, 0xEF, 0x14, 0x60, 0x42, 0x14, ++0x60, 0x6C, 0x14, 0x70, 0x02, 0x81, 0xCA, 0x14, 0x70, 0x02, 0x81, 0xF5, 0x24, 0x04, 0x60, 0x02, ++0xA1, 0x1E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x04, 0x04, 0xB1, 0x32, 0xA1, 0x1E, 0x90, 0x93, 0x29, ++0xE0, 0xB4, 0x02, 0x04, 0xB1, 0x23, 0xA1, 0x1E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x03, 0x04, 0xB1, ++0x49, 0xA1, 0x1E, 0x90, 0x93, 0x29, 0xE0, 0x64, 0x01, 0x60, 0x02, 0xA1, 0x1E, 0xB1, 0x25, 0xA1, ++0x1E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x04, 0x04, 0xB1, 0x36, 0xA1, 0x1E, 0x90, 0x93, 0x29, 0xE0, ++0xB4, 0x02, 0x04, 0x91, 0x0D, 0xA1, 0x1E, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x03, 0x04, 0xB1, 0x4D, ++0xA1, 0x1E, 0x90, 0x93, 0x29, 0xE0, 0x60, 0x02, 0xA1, 0x1E, 0xB1, 0x7A, 0xA1, 0x1E, 0x90, 0x93, ++0x29, 0xE0, 0xB4, 0x04, 0x04, 0xB1, 0x9F, 0x80, 0x75, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x01, 0x05, ++0x12, 0x97, 0xEE, 0x80, 0x69, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x03, 0x04, 0xB1, 0x97, 0x80, 0x5E, ++0x90, 0x93, 0x29, 0xE0, 0x70, 0x58, 0xB1, 0x9A, 0x80, 0x54, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x04, ++0x04, 0xB1, 0x55, 0x80, 0x49, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x01, 0x04, 0xB1, 0x8E, 0x80, 0x3E, ++0x90, 0x93, 0x29, 0xE0, 0xB4, 0x02, 0x04, 0xB1, 0x40, 0x80, 0x33, 0x90, 0x93, 0x29, 0xE0, 0x70, ++0x2D, 0xB1, 0x8C, 0x80, 0x29, 0x90, 0x93, 0x29, 0xE0, 0xB4, 0x03, 0x04, 0xB1, 0xA6, 0x80, 0x1E, ++0x90, 0x93, 0x29, 0xE0, 0xB4, 0x01, 0x04, 0xB1, 0x7E, 0x80, 0x13, 0x90, 0x93, 0x29, 0xE0, 0xB4, ++0x02, 0x04, 0xB1, 0x60, 0x80, 0x08, 0x90, 0x93, 0x29, 0xE0, 0x70, 0x02, 0xB1, 0x7C, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x91, 0x0D, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0xE4, 0x90, 0x85, 0xBF, ++0xF0, 0x22, 0xB1, 0x36, 0x80, 0xEF, 0xE4, 0xFD, 0xFF, 0xB1, 0x72, 0x44, 0x40, 0xF0, 0x81, 0x10, ++0x71, 0xE4, 0x90, 0x85, 0xBF, 0x74, 0x03, 0xF0, 0x22, 0xB1, 0x4D, 0x80, 0xD8, 0xE4, 0xFD, 0xFF, ++0x12, 0x90, 0xDD, 0x81, 0x10, 0x7D, 0x22, 0x7F, 0xFF, 0xB1, 0x72, 0x44, 0x40, 0xF0, 0x80, 0xE2, ++0x71, 0xE4, 0x7D, 0x24, 0xB1, 0x70, 0x54, 0xBF, 0xF0, 0x90, 0x85, 0xBF, 0x74, 0x04, 0xF0, 0x22, ++0x7F, 0x6F, 0x12, 0x90, 0xDD, 0x90, 0x05, 0x27, 0xE0, 0x22, 0x81, 0x10, 0xB1, 0x7A, 0x7D, 0x1F, ++0xB1, 0x70, 0x54, 0xBF, 0xF0, 0x90, 0x85, 0xBF, 0x74, 0x04, 0xF0, 0x22, 0xB1, 0x7A, 0x7D, 0x21, ++0x7F, 0xFF, 0x12, 0x90, 0xDD, 0x80, 0xAB, 0x02, 0x97, 0xF4, 0xB1, 0x7A, 0x02, 0x97, 0xEE, 0xD1, ++0x78, 0x7D, 0x23, 0x02, 0x97, 0xF0, 0x7D, 0x25, 0xB1, 0x70, 0x54, 0xBF, 0xF0, 0x90, 0x85, 0xBF, ++0x74, 0x04, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x02, 0x12, 0x7B, 0x51, ++0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0x12, 0x7B, 0x3E, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0x90, ++0x01, 0x34, 0x74, 0x08, 0xF0, 0x90, 0x01, 0x01, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, ++0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x60, 0x49, 0x90, 0x88, 0xCE, 0xE0, 0xFF, ++0x60, 0x03, 0x12, 0x7B, 0x8A, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x12, 0xAF, 0x5E, 0xEC, 0x3E, 0x90, ++0x85, 0xB7, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x06, 0x09, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x35, 0x7F, ++0xFF, 0x12, 0x90, 0xDD, 0xB1, 0xB4, 0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x12, 0x72, 0x79, ++0xD1, 0x51, 0x12, 0x90, 0xD7, 0x12, 0x76, 0xE6, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0xFD, 0xE4, ++0xFF, 0x02, 0x7C, 0xA9, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x7C, 0x41, 0x90, 0x06, 0x90, 0xE0, 0x54, ++0xF0, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x54, 0xFB, 0xF0, 0xD1, 0x52, 0x12, 0x9F, 0xEC, 0x02, 0x9B, ++0x27, 0x22, 0xF1, 0x11, 0x12, 0x77, 0x89, 0x90, 0x01, 0x3F, 0x74, 0x04, 0xF0, 0x90, 0x84, 0xC5, ++0xE0, 0xFF, 0xB4, 0x01, 0x07, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xEF, 0xF0, 0xEF, 0xB4, 0x01, 0x07, ++0x90, 0xFE, 0x10, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x05, 0x27, 0xE0, 0x44, 0x40, 0xF0, 0x22, ++0x12, 0x7B, 0x3E, 0x90, 0x01, 0x01, 0xE0, 0x22, 0x90, 0x85, 0xBF, 0xE0, 0x64, 0x02, 0x7F, 0x01, ++0x60, 0x02, 0x7F, 0x00, 0x22, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, 0x7F, 0x14, 0x7E, 0x00, ++0x02, 0x7C, 0x9F, 0xE4, 0x90, 0x92, 0x29, 0xF0, 0xA3, 0xF0, 0xD1, 0xF1, 0xEF, 0x64, 0x01, 0x60, ++0x39, 0xC3, 0x90, 0x92, 0x2A, 0xE0, 0x94, 0x88, 0x90, 0x92, 0x29, 0xE0, 0x94, 0x13, 0x40, 0x0F, ++0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1B, 0x90, ++0x92, 0x29, 0xD1, 0x95, 0xD3, 0x90, 0x92, 0x2A, 0xE0, 0x94, 0x32, 0x90, 0x92, 0x29, 0xE0, 0x94, ++0x00, 0x40, 0xC7, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE3, 0xC0, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, ++0x22, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x44, 0x0B, 0xF1, 0x09, 0x90, 0x01, 0x98, 0xE0, 0x54, ++0xC0, 0x7F, 0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01, 0x22, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x7C, ++0x9F, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFD, 0x7F, 0x8F, 0x12, 0x7B, 0x3E, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x9F, 0xAD, 0xBF, 0x01, ++0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x91, 0x17, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, ++0xC4, 0x74, 0x3E, 0xF0, 0x74, 0xB7, 0xA3, 0xF0, 0x7F, 0x90, 0x12, 0x7B, 0x51, 0xEF, 0x20, 0xE0, ++0xF7, 0x74, 0x3E, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xB7, 0xA3, 0xF0, 0x22, 0x7D, 0x02, 0x90, ++0x01, 0xC4, 0x74, 0x5D, 0xF0, 0x74, 0xB7, 0xA3, 0xF0, 0x90, 0x92, 0x88, 0xE0, 0xFF, 0xED, 0xC3, ++0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, ++0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE, 0x7F, 0x01, 0x22, 0x90, 0x85, ++0xBC, 0xE0, 0xFF, 0x30, 0xE0, 0x3E, 0x90, 0x85, 0xC0, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, ++0x01, 0x90, 0x85, 0xBF, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x24, ++0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x02, 0xE1, 0x24, 0x12, 0x9F, 0x30, 0x90, 0x85, 0xC0, 0xE0, 0xB4, ++0x08, 0x06, 0xE4, 0xFD, 0x7F, 0x0C, 0x80, 0x09, 0x90, 0x85, 0xC0, 0xE0, 0x70, 0x06, 0xFD, 0x7F, ++0x04, 0x12, 0x9D, 0x7E, 0x22, 0xE4, 0x90, 0x84, 0xC1, 0x12, 0x96, 0x3F, 0x90, 0x92, 0x81, 0xF0, ++0x22, 0xE4, 0xF5, 0x40, 0xF5, 0x41, 0xF5, 0x42, 0x75, 0x43, 0x80, 0xAD, 0x40, 0x7F, 0x50, 0x12, ++0x7B, 0x3E, 0xAD, 0x41, 0x7F, 0x51, 0x12, 0x7B, 0x3E, 0xAD, 0x42, 0x7F, 0x52, 0x12, 0x7B, 0x3E, ++0xAD, 0x43, 0x7F, 0x53, 0x02, 0x7B, 0x3E, 0x75, 0x48, 0x12, 0xE4, 0xF5, 0x49, 0x75, 0x4A, 0x07, ++0x75, 0x4B, 0x32, 0xF5, 0x50, 0x90, 0x01, 0x30, 0xE5, 0x48, 0xF0, 0xA3, 0xE5, 0x49, 0xF0, 0xA3, ++0xE5, 0x4A, 0xF0, 0xA3, 0xE5, 0x4B, 0xF0, 0x90, 0x01, 0x20, 0xE5, 0x50, 0xF0, 0x22, 0x12, 0x75, ++0xB6, 0x12, 0x75, 0x58, 0x11, 0x07, 0x11, 0x3A, 0x80, 0xA7, 0x75, 0x52, 0x06, 0x75, 0x53, 0x01, ++0x75, 0x54, 0x03, 0x75, 0x55, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x52, 0xF0, 0xA3, 0xE5, 0x53, 0xF0, ++0xA3, 0xE5, 0x54, 0xF0, 0xA3, 0xE5, 0x55, 0xF0, 0x22, 0x12, 0x7C, 0x4E, 0x90, 0x84, 0xC5, 0xEF, ++0xF0, 0x11, 0x2E, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, ++0x90, 0x00, 0x17, 0xE0, 0x54, 0xFC, 0x44, 0x04, 0xFD, 0x7F, 0x17, 0x12, 0x7B, 0x3E, 0x90, 0x00, ++0x38, 0xE0, 0x44, 0x40, 0xFD, 0x7F, 0x38, 0x12, 0x7B, 0x3E, 0x02, 0x68, 0xE2, 0x90, 0x01, 0xE4, ++0x74, 0x01, 0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x22, 0x90, 0x84, 0xA1, 0x74, 0x02, 0xF0, 0xA3, 0x74, ++0x10, 0xF0, 0x90, 0x84, 0xA7, 0x74, 0x80, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0xE4, 0xFB, 0xFA, ++0xFD, 0x7F, 0x01, 0x12, 0x86, 0x4E, 0x90, 0x92, 0x32, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x84, 0xC1, ++0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0F, 0x90, 0x84, ++0xC1, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x12, 0x2D, 0xBD, 0x12, 0x91, 0xE7, 0x31, 0x08, 0x30, ++0xE1, 0x06, 0x54, 0xFD, 0xF0, 0x12, 0x60, 0x5D, 0x31, 0x08, 0x30, 0xE2, 0x06, 0x54, 0xFB, 0xF0, ++0x12, 0x6A, 0x6D, 0x31, 0x08, 0x30, 0xE4, 0x0C, 0x54, 0xEF, 0xF0, 0x12, 0x6F, 0x22, 0xBF, 0x01, ++0x03, 0x12, 0xAC, 0x25, 0xD2, 0xAF, 0x80, 0xB5, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x84, 0xC1, 0xE0, ++0xFF, 0x22, 0x8F, 0x0D, 0x7F, 0x02, 0x12, 0x86, 0x27, 0x90, 0x84, 0xC1, 0xE0, 0x45, 0x0D, 0xF0, ++0x22, 0x12, 0x40, 0xB9, 0x7F, 0x02, 0x80, 0xEA, 0x90, 0x86, 0x72, 0xE0, 0x30, 0xE0, 0x04, 0x7F, ++0x10, 0x31, 0x12, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, ++0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x01, 0xC4, 0x74, 0x34, 0xF0, 0x74, 0xB9, 0xA3, 0xF0, 0x12, 0x75, 0x28, 0xE5, 0x56, ++0x30, 0xE1, 0x02, 0x51, 0x6C, 0xE5, 0x56, 0x30, 0xE2, 0x03, 0x12, 0xA6, 0x15, 0xE5, 0x57, 0x30, ++0xE0, 0x02, 0x51, 0x38, 0xE5, 0x58, 0x30, 0xE1, 0x02, 0x91, 0x72, 0xE5, 0x58, 0x30, 0xE0, 0x03, ++0x12, 0xB7, 0x8E, 0xE5, 0x58, 0x30, 0xE4, 0x02, 0x51, 0x6B, 0xE5, 0x59, 0x30, 0xE1, 0x04, 0x7F, ++0x04, 0x31, 0x12, 0xE5, 0x59, 0x30, 0xE4, 0x03, 0x12, 0xA5, 0x39, 0xE5, 0x59, 0x30, 0xE5, 0x02, ++0x31, 0xCF, 0xE5, 0x59, 0x30, 0xE6, 0x02, 0x31, 0xF6, 0x74, 0x34, 0x04, 0x90, 0x01, 0xC4, 0xF0, ++0x74, 0xB9, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, ++0x85, 0xC1, 0x12, 0x9C, 0x0C, 0x30, 0xE0, 0x19, 0xEF, 0x54, 0xBF, 0x51, 0x24, 0x30, 0xE0, 0x06, ++0xE0, 0x44, 0x01, 0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFE, 0x51, 0x2D, 0x74, 0x04, 0xF0, 0x12, 0xA5, ++0x96, 0xE4, 0xFF, 0x02, 0x68, 0x8F, 0x90, 0x85, 0xC1, 0xE0, 0xFF, 0x12, 0x8D, 0x6B, 0x30, 0xE0, ++0x1E, 0xEF, 0x54, 0x7F, 0x51, 0x24, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x07, 0xE0, ++0x54, 0xFD, 0x51, 0x2D, 0x04, 0xF0, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x03, 0x12, 0xA5, 0x96, 0x7F, ++0x01, 0x02, 0x68, 0x8F, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x85, 0xC2, 0x22, 0xF0, 0x90, 0x01, ++0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0x91, 0xBB, 0x90, 0x92, 0x67, 0xEF, 0xF0, 0x30, ++0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x57, 0x82, 0x90, 0x92, 0x67, ++0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, ++0x01, 0x2F, 0x74, 0x80, 0xF0, 0x51, 0x76, 0xFB, 0x02, 0x51, 0x7D, 0x22, 0x90, 0x85, 0xC5, 0xE0, ++0x60, 0x03, 0x12, 0xA4, 0xD1, 0x22, 0x90, 0x85, 0xD7, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x85, ++0xDE, 0xE0, 0x22, 0xE4, 0x90, 0x92, 0x56, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x92, 0x9F, 0x12, ++0x87, 0x58, 0x90, 0x92, 0x9B, 0x12, 0x87, 0x64, 0xC3, 0x12, 0x04, 0xB4, 0x40, 0x50, 0x90, 0x85, ++0xC1, 0xE0, 0x90, 0x92, 0x9F, 0x30, 0xE0, 0x14, 0x71, 0xFA, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x90, ++0x85, 0xFB, 0xE0, 0x24, 0x04, 0x2F, 0xFF, 0x90, 0x92, 0xD0, 0x80, 0x0A, 0x71, 0xFA, 0x74, 0x0A, ++0x9E, 0x2F, 0xFF, 0x90, 0x92, 0xD1, 0xE0, 0xFE, 0xC3, 0xEF, 0x9E, 0x90, 0x92, 0x57, 0xF0, 0x90, ++0x92, 0x57, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x15, 0x74, 0xA3, 0x2F, 0x91, 0x12, 0xE0, 0x04, ++0xF0, 0x90, 0x85, 0xDB, 0xE0, 0x04, 0xF0, 0xE0, 0xFD, 0x7F, 0xFE, 0x12, 0x7B, 0x3E, 0x90, 0x85, ++0xDB, 0xE0, 0xFF, 0xD3, 0x90, 0x92, 0xD3, 0xE0, 0x9F, 0x90, 0x92, 0xD2, 0xE0, 0x94, 0x00, 0x40, ++0x02, 0x61, 0xC6, 0x71, 0xD8, 0x71, 0xCF, 0x50, 0x1C, 0x71, 0xE2, 0x90, 0x92, 0x58, 0xE0, 0xD3, ++0x9F, 0x40, 0x0A, 0x90, 0x92, 0x56, 0xE0, 0x90, 0x92, 0x59, 0xF0, 0x80, 0x08, 0x90, 0x92, 0x56, ++0xE0, 0x04, 0xF0, 0x80, 0xE0, 0x71, 0xD8, 0x71, 0xCF, 0x50, 0x2C, 0x71, 0xE2, 0xC3, 0x90, 0x92, ++0xD3, 0xE0, 0x9F, 0xFF, 0x90, 0x92, 0xD2, 0xE0, 0x94, 0x00, 0xFE, 0x90, 0x92, 0x58, 0xE0, 0xD3, ++0x9F, 0xE4, 0x9E, 0x40, 0x0A, 0x90, 0x92, 0x56, 0xE0, 0x90, 0x92, 0x5A, 0xF0, 0x80, 0x08, 0x90, ++0x92, 0x56, 0xE0, 0x04, 0xF0, 0x80, 0xD0, 0x90, 0x92, 0x59, 0xE0, 0x90, 0x85, 0xE0, 0xF0, 0x90, ++0x92, 0x5A, 0xE0, 0x90, 0x85, 0xE1, 0x71, 0xC7, 0x94, 0x0A, 0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, ++0x85, 0xD8, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x85, 0xD8, 0x71, 0xC7, 0x74, 0x0A, 0x9F, 0x90, ++0x85, 0xD7, 0xF0, 0x90, 0x85, 0xE0, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x85, 0xDE, 0xF0, ++0x90, 0x85, 0xC1, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x92, 0xD0, 0x80, 0x03, 0x90, 0x92, 0xD1, 0xE0, ++0xFF, 0x90, 0x85, 0xDE, 0xE0, 0x2F, 0x04, 0xF0, 0x90, 0x85, 0xDE, 0xE0, 0xC3, 0x94, 0x0A, 0x50, ++0x03, 0x74, 0x0A, 0xF0, 0x90, 0x85, 0xDE, 0xE0, 0x24, 0x02, 0xF0, 0x51, 0x76, 0xFB, 0x12, 0x51, ++0x7D, 0xE4, 0xFF, 0x12, 0x69, 0x33, 0x22, 0xF0, 0x90, 0x85, 0xE0, 0xE0, 0xFF, 0xC3, 0x22, 0x90, ++0x92, 0x56, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x22, 0xE4, 0x90, 0x92, 0x58, 0xF0, 0x90, 0x92, 0x56, ++0xF0, 0x22, 0x74, 0xA3, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x92, ++0x58, 0xE0, 0x2F, 0xF0, 0x90, 0x92, 0xD4, 0xE0, 0xFF, 0x22, 0x12, 0x87, 0x64, 0x90, 0x92, 0x9B, ++0x12, 0x87, 0x58, 0x12, 0x87, 0x30, 0x78, 0x0A, 0x12, 0x04, 0xC5, 0x90, 0x85, 0xDD, 0xE0, 0xFE, ++0xC3, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, 0xE4, 0xFE, 0x74, 0xA3, 0x2E, 0x91, ++0x12, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF4, 0xE4, 0x90, 0x85, 0xDC, 0xF0, 0x90, 0x85, 0xDB, ++0xF0, 0x90, 0x85, 0xDF, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0x2D, 0xF0, 0xE4, 0xA3, 0xF0, ++0x22, 0x90, 0x93, 0x1F, 0x12, 0x87, 0x79, 0x12, 0x71, 0x54, 0x90, 0x85, 0xC5, 0xE0, 0xFF, 0x12, ++0x60, 0xD0, 0x90, 0x85, 0xC5, 0xE0, 0x60, 0x19, 0x90, 0x93, 0x1F, 0x12, 0x87, 0x70, 0x12, 0x8D, ++0x74, 0x54, 0x0F, 0xFF, 0x12, 0x8C, 0x80, 0xFD, 0x12, 0x6A, 0xB8, 0x51, 0x76, 0xFB, 0x12, 0x51, ++0x7D, 0x22, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x30, 0xE0, 0x40, 0x90, 0x85, 0xC0, 0xE0, 0x7E, 0x00, ++0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0x85, 0xBF, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, ++0xED, 0x4E, 0x70, 0x26, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x02, 0xB7, 0x24, 0x12, 0xA5, 0xCF, ++0x90, 0x85, 0xC0, 0xE0, 0xB4, 0x0C, 0x06, 0xE4, 0xFD, 0x7F, 0x08, 0x80, 0x0A, 0x90, 0x85, 0xC0, ++0xE0, 0xB4, 0x04, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x9D, 0x7E, 0x22, 0xE4, 0x90, 0x92, 0x69, 0xF0, ++0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x51, 0x90, 0x92, 0x68, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x7B, ++0x51, 0xAE, 0x07, 0x90, 0x92, 0x68, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x92, 0x6A, ++0xE0, 0x94, 0x64, 0x90, 0x92, 0x69, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x40, 0xF0, 0x90, 0x92, 0x68, 0xE0, 0xFF, 0x22, 0x90, 0x92, 0x69, 0xE4, 0x75, 0xF0, 0x01, 0x12, ++0x07, 0x0A, 0x80, 0xBE, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x05, 0xF0, 0x74, 0xBD, 0xA3, 0xF0, 0x12, 0x6C, 0xBC, 0x74, ++0x05, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xBD, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, ++0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, ++0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x32, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, ++0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x56, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0xBD, 0xFF, 0xA3, ++0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x05, 0xE4, 0xA3, ++0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x88, 0xE7, 0xE0, 0x04, 0xF0, 0x90, 0x85, 0xBC, 0xE0, 0xFF, 0x30, ++0xE0, 0x05, 0x12, 0x9F, 0x49, 0x60, 0x1B, 0x90, 0x85, 0xC5, 0xE0, 0x70, 0x04, 0xEF, 0x30, 0xE0, ++0x0B, 0x90, 0x85, 0xC8, 0xE0, 0x64, 0x02, 0x60, 0x09, 0x12, 0xA0, 0x9F, 0x90, 0x01, 0xE6, 0xE0, ++0x04, 0xF0, 0x22, 0xE4, 0xFF, 0x12, 0x77, 0x39, 0xBF, 0x01, 0x13, 0x90, 0x85, 0xC5, 0xE0, 0x60, ++0x0D, 0x12, 0x9F, 0xE5, 0x64, 0x02, 0x60, 0x03, 0x02, 0x77, 0x61, 0x12, 0x79, 0x41, 0x22, 0x90, ++0x85, 0xC5, 0xE0, 0x70, 0x07, 0x90, 0x85, 0xBC, 0xE0, 0x30, 0xE0, 0x13, 0x90, 0x85, 0xBC, 0xE0, ++0x30, 0xE0, 0x09, 0x12, 0x9F, 0xAD, 0xBF, 0x01, 0x06, 0x02, 0x9F, 0x50, 0x12, 0x9F, 0x68, 0x22, ++0x7D, 0x07, 0xAF, 0x62, 0xED, 0x30, 0xE0, 0x21, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x44, 0xD1, ++0x53, 0xEF, 0x90, 0x89, 0x46, 0xD1, 0x53, 0xEF, 0x90, 0x89, 0x48, 0xD1, 0x53, 0xEF, 0x90, 0x89, ++0x4A, 0xD1, 0x53, 0xEF, 0x90, 0x89, 0x4C, 0xD1, 0x5E, 0xED, 0x30, 0xE1, 0x09, 0x75, 0xF0, 0x12, ++0xEF, 0x90, 0x89, 0x40, 0xD1, 0x5E, 0xED, 0x30, 0xE2, 0x0C, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, ++0x42, 0x12, 0x05, 0x28, 0xE4, 0xF0, 0xD1, 0x66, 0xE0, 0x54, 0xBF, 0x44, 0x80, 0xFE, 0xD1, 0x66, ++0xEE, 0xF0, 0x22, 0x12, 0x05, 0x28, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x12, 0x22, 0x12, 0x05, ++0x28, 0xE4, 0xF0, 0xA3, 0xF0, 0x22, 0xEF, 0xC4, 0x54, 0xF0, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, ++0x81, 0xF5, 0x83, 0x22, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0x90, 0x89, 0x1B, 0x12, 0x87, 0x79, ++0x7B, 0xFF, 0x7A, 0x82, 0x79, 0x00, 0x90, 0x89, 0x1E, 0x12, 0x87, 0x79, 0x7A, 0x82, 0x79, 0x3F, ++0x90, 0x89, 0x21, 0x12, 0x87, 0x79, 0x7A, 0x82, 0x79, 0xE1, 0x90, 0x89, 0x27, 0x12, 0x87, 0x79, ++0x7A, 0x82, 0x79, 0xF5, 0x90, 0x89, 0x2A, 0x12, 0x87, 0x79, 0x7A, 0x83, 0x79, 0x1D, 0x90, 0x89, ++0x2D, 0x12, 0x87, 0x79, 0x7A, 0x83, 0x79, 0x31, 0x90, 0x89, 0x33, 0x12, 0x87, 0x79, 0x7A, 0x83, ++0x79, 0x59, 0x90, 0x89, 0x36, 0x12, 0x87, 0x79, 0x7A, 0x83, 0x79, 0x81, 0x90, 0x89, 0x39, 0x12, ++0x87, 0x79, 0xE4, 0x90, 0x92, 0xD6, 0xF0, 0x90, 0x92, 0x29, 0xF0, 0x90, 0x92, 0x29, 0xE0, 0xFF, ++0xC3, 0x94, 0x05, 0x50, 0x10, 0x74, 0xE7, 0x2F, 0x12, 0x96, 0x79, 0xE4, 0xF0, 0x90, 0x92, 0x29, ++0xE0, 0x04, 0xF0, 0x80, 0xE6, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, ++0xE4, 0xF0, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x92, 0x56, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, ++0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, ++0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x75, 0xB6, ++0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x7B, 0x3E, 0x80, 0xFE, 0x22, 0xE4, ++0xFF, 0x02, 0x2D, 0xBD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x04, 0x1D, 0xE0, 0x60, ++0x1A, 0x90, 0x05, 0x22, 0xE0, 0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x08, 0xF0, ++0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xC3, 0xEE, 0x94, 0x01, 0x40, 0x0A, 0x0D, 0xED, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0xE4, ++0x2F, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x13, 0xED, 0xF0, 0xA3, ++0xEB, 0xF0, 0x90, 0x93, 0x12, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0xC2, 0xB7, 0x90, 0x93, 0x12, ++0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x93, 0x13, 0xE0, 0x60, 0x06, 0x12, 0xC8, 0xA1, 0x44, 0x80, ++0xF0, 0xAF, 0x05, 0x74, 0x20, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, ++0xF0, 0x12, 0xC8, 0xA1, 0x54, 0xC0, 0xF0, 0x90, 0x93, 0x15, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x18, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00, 0x8B, 0xE0, 0xD3, 0x94, ++0x03, 0x74, 0x10, 0x40, 0x08, 0x12, 0xC0, 0x38, 0x74, 0x04, 0xF0, 0x80, 0x05, 0x12, 0xC0, 0x38, ++0xE4, 0xF0, 0xAF, 0x05, 0x12, 0xC0, 0x2F, 0xF5, 0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x14, ++0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0x11, 0x2F, 0xF5, 0x83, 0xEE, ++0xF0, 0x74, 0x11, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x74, 0x29, ++0x2F, 0x11, 0x51, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x74, ++0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0x22, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0x22, 0xE0, 0xFE, 0x24, 0x28, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x29, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x88, 0xD9, 0x11, 0xF8, 0x11, ++0x41, 0xFD, 0x90, 0x92, 0x07, 0xE0, 0x24, 0x2C, 0x51, 0xAB, 0x90, 0x92, 0x07, 0xE0, 0x2F, 0x24, ++0x30, 0xA3, 0xF0, 0xE0, 0xFD, 0x24, 0x04, 0x51, 0xA3, 0xE0, 0xFE, 0x74, 0x05, 0x2D, 0x31, 0xB6, ++0x12, 0xAF, 0x66, 0xEC, 0x3E, 0x90, 0x88, 0x80, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x08, 0xE0, ++0x24, 0x0C, 0xF9, 0xE4, 0x34, 0xFC, 0x31, 0x09, 0x75, 0x1E, 0x04, 0x7B, 0x01, 0x7A, 0x88, 0x79, ++0x82, 0x12, 0x6A, 0x21, 0x90, 0x92, 0x08, 0xE0, 0x24, 0x14, 0xF0, 0xE0, 0xFD, 0x24, 0x01, 0x31, ++0xC6, 0x2D, 0x31, 0xBE, 0x12, 0xAF, 0x66, 0xEC, 0x3E, 0x90, 0x88, 0x86, 0xF0, 0xA3, 0xEF, 0xF0, ++0x90, 0x88, 0xDA, 0x11, 0xF8, 0x90, 0x88, 0x7C, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x4E, 0x60, 0x11, ++0x90, 0x92, 0x07, 0xE0, 0x31, 0x03, 0x8F, 0x1E, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0x8A, 0x12, 0x6A, ++0x21, 0x90, 0x88, 0xDB, 0x11, 0xF8, 0x31, 0x03, 0x90, 0x88, 0x7E, 0xA3, 0xE0, 0xF5, 0x1E, 0x7B, ++0x01, 0x7A, 0x88, 0x79, 0xAA, 0x02, 0x6A, 0x21, 0xE0, 0xFF, 0x12, 0x7B, 0x2A, 0x90, 0x92, 0x07, ++0xEF, 0xF0, 0x22, 0x24, 0x00, 0xF9, 0xE4, 0x34, 0xFC, 0x75, 0x1B, 0x01, 0xF5, 0x1C, 0x89, 0x1D, ++0x22, 0xEF, 0x60, 0x04, 0x31, 0x19, 0x11, 0x5A, 0x22, 0xE4, 0xFD, 0xFC, 0x90, 0x88, 0xD8, 0xE0, ++0xFF, 0x51, 0xB7, 0xAB, 0x05, 0x74, 0x01, 0x2B, 0x31, 0xC6, 0x2B, 0x31, 0xBE, 0x12, 0xAF, 0xDB, ++0x90, 0x88, 0x76, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x03, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0xFE, 0x74, 0x02, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0x31, 0xAD, 0x90, 0x88, 0x78, ++0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x05, 0x2B, 0x31, 0xB6, 0xE0, 0xFE, 0x74, 0x04, 0x2B, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0x31, 0xAD, 0x90, 0x88, 0x7A, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x07, 0x2B, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x06, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0x31, 0xAD, 0x90, 0x88, 0x7C, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x09, 0x2B, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x08, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, ++0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x90, 0x88, 0x7E, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xF5, 0x83, 0xE0, ++0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0x74, ++0x00, 0x22, 0xAD, 0x07, 0x90, 0x88, 0x80, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, 0x90, 0x88, ++0x80, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x04, 0x2E, 0x51, 0xA3, 0xEF, 0xF0, 0x90, 0x88, 0x80, 0xA3, ++0xE0, 0xFF, 0x74, 0x05, 0x2E, 0x31, 0xB6, 0xEF, 0xF0, 0x22, 0xE4, 0x90, 0x92, 0x59, 0xF0, 0xA3, ++0xF0, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x20, 0xF0, 0x12, 0x75, 0xE4, 0xEF, 0x64, 0x01, 0x60, 0x02, ++0x41, 0x99, 0x90, 0x88, 0xD9, 0xE0, 0xFF, 0x90, 0x93, 0x15, 0x74, 0x0A, 0xF0, 0x7B, 0x08, 0x7D, ++0x01, 0x12, 0xBF, 0x83, 0x90, 0x92, 0x56, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x92, 0x56, 0xA3, ++0x11, 0x41, 0xFD, 0x74, 0x2C, 0x2E, 0x51, 0xAB, 0x90, 0x92, 0x58, 0xEF, 0xF0, 0x90, 0x92, 0x56, ++0xA3, 0xE0, 0x24, 0x28, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xE4, 0xFD, 0x12, 0x52, 0x21, ++0x90, 0x92, 0x58, 0xE0, 0xFF, 0x90, 0x92, 0x57, 0xE0, 0x2F, 0xFF, 0x90, 0x92, 0x56, 0xE0, 0x34, ++0x00, 0xCF, 0x24, 0x30, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0x92, 0x59, 0xF0, 0xA3, 0xEF, 0xF0, 0x31, ++0xD2, 0x51, 0x9A, 0x90, 0x88, 0xD9, 0xE0, 0xFB, 0xE4, 0xFF, 0x12, 0x15, 0x44, 0x51, 0x9A, 0x90, ++0x88, 0xD5, 0xE0, 0xFB, 0x7F, 0x11, 0x12, 0x15, 0x44, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x90, ++0x88, 0x88, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x07, 0x0A, 0x22, 0x90, 0x92, 0x59, 0xE0, 0xFC, 0xA3, ++0xE0, 0xFD, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0xFB, 0x02, 0x5D, 0x98, 0x12, 0x7B, 0x2A, 0x7C, 0x00, 0xAD, 0x07, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x00, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x70, ++0x61, 0x90, 0x93, 0x0A, 0x12, 0x04, 0xEB, 0x90, 0x93, 0x02, 0x12, 0x87, 0x58, 0x12, 0x04, 0xA7, ++0x90, 0x93, 0x0A, 0x12, 0x87, 0x64, 0x12, 0x87, 0x3E, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x93, 0x02, 0x12, 0x87, 0x58, 0x90, 0x93, 0x06, 0x12, 0x87, 0x64, 0x12, 0x87, 0x3E, ++0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x87, 0x4B, 0x90, 0x93, 0x0E, 0x12, 0x04, ++0xEB, 0x90, 0x93, 0x0E, 0x12, 0x87, 0x58, 0x90, 0x91, 0x66, 0x12, 0x04, 0xEB, 0x90, 0x93, 0x00, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x71, 0x18, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7E, 0x00, 0x7F, ++0xAC, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x85, 0x79, 0xC1, 0x12, 0x06, 0xDE, 0x71, 0xFC, 0x12, 0x06, ++0xDE, 0x90, 0x85, 0xC4, 0x74, 0x02, 0xF0, 0x90, 0x85, 0xCB, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, ++0x0A, 0xF0, 0x90, 0x85, 0xD1, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0x71, 0xEC, 0x91, 0x09, 0xE4, 0xFD, ++0xFF, 0x12, 0x57, 0x82, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x57, 0x82, 0x7D, 0x0C, 0x7F, 0x01, 0x12, ++0x57, 0x82, 0x90, 0x84, 0xC5, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x85, 0xD0, 0x74, 0xDD, 0xF0, ++0x80, 0x0F, 0xEF, 0x90, 0x85, 0xD0, 0xB4, 0x03, 0x05, 0x74, 0xD4, 0xF0, 0x80, 0x03, 0x74, 0x40, ++0xF0, 0x7F, 0x2C, 0x12, 0x7B, 0x51, 0xEF, 0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x08, 0x90, 0x85, 0xFB, ++0x74, 0x02, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x85, 0xFB, 0xF0, 0x90, 0x86, 0x6D, 0x74, 0x03, 0xF0, ++0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0x71, 0xEC, ++0xE4, 0x90, 0x85, 0xD7, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, 0x12, 0x69, 0x33, 0x90, 0x05, 0x58, 0x74, ++0x02, 0xF0, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, ++0xE4, 0xFD, 0xFF, 0x12, 0x90, 0xDD, 0xE4, 0x90, 0x86, 0x71, 0xF0, 0x22, 0xF0, 0x90, 0x85, 0xFB, ++0xE0, 0x24, 0x04, 0x90, 0x85, 0xDD, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x04, ++0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x92, 0x79, 0x84, 0x22, 0x90, 0x92, 0xD0, 0x74, 0x04, 0xF0, 0x14, ++0xF0, 0xA3, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x7A, 0x29, 0xEF, 0x64, 0x01, 0x60, 0x05, ++0x75, 0x0F, 0x01, 0x80, 0x52, 0x90, 0x85, 0xC9, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x0F, ++0x02, 0x80, 0x44, 0x90, 0x85, 0xC7, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x0F, 0x04, ++0x80, 0x35, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x0F, 0x08, 0x80, 0x2C, 0x90, 0x85, 0xC9, 0xE0, 0x30, ++0xE4, 0x05, 0x75, 0x0F, 0x10, 0x80, 0x20, 0x90, 0x85, 0xC2, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, ++0xE0, 0x05, 0x75, 0x0F, 0x20, 0x80, 0x10, 0x90, 0x86, 0x71, 0xE0, 0x60, 0x05, 0x75, 0x0F, 0x80, ++0x80, 0x05, 0x12, 0xB3, 0xD4, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, ++0xE5, 0x0F, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAC, 0x07, 0x90, 0x92, 0x96, 0xE0, ++0xF9, 0x30, 0xE0, 0x02, 0xA1, 0x4E, 0x90, 0x85, 0xC1, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x85, 0xFB, ++0xE0, 0x24, 0x04, 0x90, 0x85, 0xDA, 0xF0, 0x90, 0x85, 0xFB, 0xE0, 0x24, 0x03, 0x90, 0x85, 0xD9, ++0xF0, 0x80, 0x0D, 0x90, 0x85, 0xDA, 0x74, 0x02, 0xF0, 0x90, 0x85, 0xD9, 0x14, 0xF0, 0x0B, 0x0B, ++0x90, 0x85, 0xD9, 0xE0, 0xFA, 0x90, 0x85, 0xD8, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x85, 0xCD, ++0xEB, 0xF0, 0x90, 0x85, 0xDA, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, ++0x85, 0xCD, 0xF0, 0x90, 0x85, 0xD9, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x85, 0xDD, 0xF0, ++0x90, 0x85, 0xDA, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x85, 0xDD, 0xB1, 0x56, ++0x98, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, 0x85, 0xDD, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, ++0x33, 0xFC, 0x90, 0x85, 0xCD, 0xB1, 0x56, 0x98, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x85, ++0xDD, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x85, 0xD1, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, ++0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0xB1, 0x60, 0xE9, 0x54, 0xFD, 0x80, 0x03, 0xE9, 0x44, ++0x02, 0x90, 0x92, 0x96, 0xF0, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x22, ++0x90, 0x85, 0xD1, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0xB1, 0xA7, 0x40, 0x2B, 0x90, 0x85, ++0xDF, 0xE0, 0x04, 0xF0, 0x90, 0x92, 0xD5, 0xE0, 0xFF, 0x90, 0x85, 0xDF, 0xE0, 0xD3, 0x9F, 0x50, ++0x18, 0x90, 0x85, 0xD7, 0xE0, 0x04, 0x12, 0xA2, 0x51, 0x90, 0x85, 0xDE, 0xF0, 0xFB, 0x90, 0x85, ++0xD7, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x51, 0x7D, 0x22, 0x90, 0x85, 0xCE, 0xE0, 0x04, 0xF0, ++0x90, 0x85, 0xC9, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x86, 0x6D, 0xE0, 0xFF, 0x90, 0x85, 0xCE, 0xE0, ++0xD3, 0x9F, 0x22, 0x90, 0x92, 0x7B, 0xEF, 0xF0, 0x90, 0x84, 0xC5, 0xE0, 0x64, 0x02, 0x70, 0x1F, ++0x90, 0x92, 0x7B, 0xE0, 0xFD, 0x64, 0x01, 0x70, 0x32, 0x12, 0xAF, 0x30, 0x12, 0x8D, 0x67, 0x30, ++0xE0, 0x09, 0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80, 0x20, 0xAF, 0x05, 0x80, 0x19, 0x90, ++0x01, 0x00, 0x74, 0xFF, 0xF0, 0x7F, 0x64, 0x7E, 0x00, 0x12, 0x7C, 0x9F, 0x90, 0x06, 0x90, 0xE0, ++0x44, 0x01, 0xF0, 0x90, 0x92, 0x7B, 0xE0, 0xFF, 0x12, 0x2A, 0x87, 0x90, 0x88, 0xE1, 0xE0, 0x54, ++0xFE, 0xF0, 0x90, 0x86, 0x72, 0xE0, 0x54, 0xBF, 0xF0, 0x22, 0x90, 0x92, 0x7C, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xE4, 0x90, 0x92, 0x80, 0xF0, 0x7D, 0x09, 0x12, 0x55, 0x36, 0xEF, 0x64, 0x06, 0x70, ++0x2A, 0xD1, 0x9F, 0x7D, 0x14, 0x12, 0x55, 0x36, 0xEF, 0x70, 0x20, 0xD1, 0x9F, 0x7D, 0x15, 0x12, ++0x55, 0x36, 0xEF, 0x64, 0x50, 0x70, 0x14, 0xD1, 0x9F, 0x7D, 0x21, 0x12, 0x55, 0x36, 0xEF, 0x20, ++0xE0, 0x03, 0x30, 0xE2, 0x06, 0x90, 0x92, 0x80, 0x74, 0x01, 0xF0, 0x90, 0x86, 0x73, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x30, 0xE0, 0x3F, 0xD1, 0x9F, 0x7D, 0x09, 0x12, 0x55, 0x36, 0xEF, 0x64, 0x11, ++0x70, 0x33, 0x90, 0x92, 0x7D, 0xE0, 0x24, 0x14, 0xFF, 0x90, 0x92, 0x7C, 0xE0, 0x34, 0x00, 0xFE, ++0x90, 0x92, 0x7E, 0xF0, 0xA3, 0xEF, 0xF0, 0x7D, 0x02, 0x12, 0x55, 0x36, 0xEF, 0x70, 0x16, 0x90, ++0x92, 0x7E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7D, 0x03, 0x12, 0x55, 0x36, 0xBF, 0x89, 0x06, 0x90, ++0x92, 0x80, 0x74, 0x01, 0xF0, 0x90, 0x92, 0x80, 0xE0, 0xFF, 0xD1, 0xA8, 0xEF, 0xF0, 0x22, 0x90, ++0x92, 0x7C, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x84, 0xBF, 0xA3, 0xE0, 0x24, 0x7F, 0xF5, ++0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xD1, 0xFD, 0xA3, 0xED, 0xF0, 0x90, 0x88, 0x7C, 0xE0, ++0x70, 0x02, 0xA3, 0xE0, 0x60, 0x23, 0xE4, 0x90, 0x92, 0x36, 0xF0, 0xF1, 0x06, 0x50, 0x1D, 0xF1, ++0x4A, 0x24, 0x8A, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0x6F, 0x60, 0x03, 0x7F, 0x00, ++0x22, 0x90, 0x92, 0x36, 0xE0, 0x04, 0xF0, 0x80, 0xE2, 0x7F, 0x00, 0x22, 0x90, 0x06, 0x32, 0xE0, ++0x44, 0x40, 0xF0, 0xE4, 0x90, 0x88, 0x88, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x92, 0x33, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x90, 0x92, 0x36, 0xE0, 0xFD, 0xC3, 0x94, 0x02, 0x22, 0xD1, ++0xFD, 0xA3, 0xED, 0xF0, 0xE4, 0xA3, 0xF0, 0xF1, 0x06, 0x50, 0x17, 0xF1, 0x4A, 0x24, 0xAA, 0xF5, ++0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0xB5, 0x07, 0x1D, 0x90, 0x92, 0x36, 0xE0, 0x04, 0xF0, ++0x80, 0xE5, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0x30, 0xF0, 0x7F, ++0x01, 0x12, 0x5F, 0xE9, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x92, 0x33, 0xE0, 0xFE, 0xA3, ++0xE0, 0xFF, 0xED, 0x24, 0x1C, 0xFD, 0x12, 0x55, 0x36, 0x90, 0x92, 0x36, 0xE0, 0x22, 0xD1, 0xFD, ++0x24, 0x16, 0xFF, 0xE4, 0x3E, 0xFE, 0xE4, 0xFD, 0x12, 0x55, 0x36, 0x90, 0x88, 0x86, 0xA3, 0xE0, ++0xB5, 0x07, 0x19, 0x90, 0x92, 0x34, 0xE0, 0x24, 0x16, 0xF1, 0x92, 0x7D, 0x01, 0x12, 0x55, 0x36, ++0xEF, 0xFD, 0x90, 0x88, 0x86, 0xE0, 0x6D, 0x70, 0x01, 0xE4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x7F, ++0x01, 0x22, 0xFF, 0x90, 0x92, 0x33, 0xE0, 0x34, 0x00, 0xFE, 0x22, 0xD1, 0xFD, 0xE4, 0xA3, 0xF0, ++0x90, 0x92, 0x35, 0xE0, 0xFD, 0xC3, 0x94, 0x04, 0x50, 0x27, 0x90, 0x92, 0x34, 0xE0, 0x24, 0x10, ++0xF1, 0x92, 0x12, 0x55, 0x36, 0x90, 0x92, 0x35, 0xE0, 0x24, 0x82, 0xF5, 0x82, 0xE4, 0x34, 0x88, ++0xF5, 0x83, 0xE0, 0x6F, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x92, 0x35, 0xE0, 0x04, 0xF0, 0x80, ++0xCF, 0x7F, 0x01, 0x22, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, ++0x83, 0xE4, 0x93, 0xFF, 0x74, 0x01, 0x93, 0x90, 0x92, 0x41, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0x92, 0x3F, 0xE5, 0x66, 0xF0, 0xA3, 0xE5, 0x67, 0xF0, 0x22, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x92, ++0x9F, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x92, 0xA0, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x92, ++0xA1, 0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x92, 0xA2, 0xF0, 0x90, 0x92, 0x96, 0xE0, 0x44, 0x01, ++0xF0, 0x22, 0x90, 0x92, 0x78, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x92, 0x76, 0xE0, ++0xFF, 0x12, 0x65, 0x61, 0x90, 0x92, 0x78, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x02, 0x50, 0xD7, 0x75, ++0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0x75, 0xF0, 0x12, ++0x90, 0x89, 0x3C, 0x12, 0x05, 0x28, 0xE0, 0x22, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, ++0xFF, 0x12, 0x7C, 0xA9, 0x43, 0x5E, 0x08, 0x22, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0xF5, 0xF5, 0x82, ++0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xC4, 0x54, 0xF0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x81, ++0xF5, 0x83, 0xE0, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x85, 0xC7, 0xE0, 0x90, 0x01, 0xBB, ++0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x22, 0x12, 0x02, 0xF6, 0xFF, 0x54, 0x01, 0xFE, ++0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF0, 0x74, 0xCC, ++0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0x22, 0x74, 0xBC, 0x25, 0x62, 0xF5, 0x82, 0xE4, ++0x34, 0x8F, 0xF5, 0x83, 0x22, 0x90, 0x92, 0x41, 0xE4, 0xF0, 0xA3, 0x22, 0x90, 0x92, 0x07, 0x12, ++0x87, 0x79, 0x02, 0x02, 0xF6, 0x90, 0x92, 0x33, 0x12, 0x87, 0x70, 0x02, 0x03, 0xED, 0xE0, 0xFF, ++0xA3, 0xE0, 0x90, 0x92, 0x41, 0xCF, 0x22, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0x22, 0x54, ++0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x22, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0x22, 0x12, ++0x02, 0xF6, 0x13, 0x13, 0x54, 0x3F, 0x22, 0xF9, 0xE4, 0x3A, 0xFA, 0x02, 0x02, 0xF6, 0xE5, 0x68, ++0xF0, 0xA3, 0xE5, 0x69, 0xF0, 0x22, 0x90, 0x00, 0x02, 0x12, 0x04, 0x18, 0xFF, 0x22, 0x7D, 0x05, ++0x7F, 0x04, 0x02, 0x96, 0x87, 0x90, 0x85, 0xC1, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0x00, 0x55, 0x69, ++ ++}; ++u4Byte ArrayLength_MP_8188F_FW_WoWLAN = 18768; ++ ++ ++void ++ODM_ReadFirmware_MP_8188F_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8188F_FW_WoWLAN; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8188F_FW_WoWLAN, ArrayLength_MP_8188F_FW_WoWLAN); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8188F_FW_WoWLAN; ++} ++ ++ ++ ++#endif /* end of (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))*/ ++ ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_fw.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_fw.h new file mode 100644 -index 000000000..1b862acb4 +index 0000000..2778653 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_fw.h @@ -0,0 +1,62 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.16*/ -+#if (RTL8188F_SUPPORT == 1) -+#ifndef __INC_MP_FW_HW_IMG_8188F_H -+#define __INC_MP_FW_HW_IMG_8188F_H -+ -+ -+/****************************************************************************** -+* FW_AP.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadFirmware_MP_8188F_FW_AP( -+ IN PDM_ODM_T pDM_Odm, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pFirmwareSize -+); -+ -+/****************************************************************************** -+* FW_NIC.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadFirmware_MP_8188F_FW_NIC( -+ IN PDM_ODM_T pDM_Odm, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pFirmwareSize -+); -+ -+/****************************************************************************** -+* FW_WoWLAN.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadFirmware_MP_8188F_FW_WoWLAN( -+ IN PDM_ODM_T pDM_Odm, -+ OUT u1Byte *pFirmware, -+ OUT u4Byte *pFirmwareSize -+); -+ -+#endif -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.16*/ ++#if (RTL8188F_SUPPORT == 1) ++#ifndef __INC_MP_FW_HW_IMG_8188F_H ++#define __INC_MP_FW_HW_IMG_8188F_H ++ ++ ++/****************************************************************************** ++* FW_AP.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188F_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_NIC.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188F_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_WoWLAN.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8188F_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_mac.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_mac.c new file mode 100644 -index 000000000..78285aac7 +index 0000000..a0b0963 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_mac.c @@ -0,0 +1,288 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.18*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8188F_SUPPORT == 1) -+static BOOLEAN -+CheckPositive( -+ IN PDM_ODM_T pDM_Odm, -+ IN const u4Byte Condition1, -+ IN const u4Byte Condition2, -+ IN const u4Byte Condition3, -+ IN const u4Byte Condition4 -+) -+{ -+ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ -+ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ -+ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ -+ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ -+ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ -+ -+ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; -+ u4Byte driver1 = pDM_Odm->CutVersion << 24 | -+ (pDM_Odm->SupportInterface & 0xF0) << 16 | -+ pDM_Odm->SupportPlatform << 16 | -+ pDM_Odm->PackageType << 12 | -+ (pDM_Odm->SupportInterface & 0x0F) << 8 | -+ _BoardType; -+ -+ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | -+ (pDM_Odm->TypeGPA & 0xFF) << 8 | -+ (pDM_Odm->TypeALNA & 0xFF) << 16 | -+ (pDM_Odm->TypeAPA & 0xFF) << 24; -+ -+u4Byte driver3 = 0; -+ -+ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | -+ (pDM_Odm->TypeGPA & 0xFF00) | -+ (pDM_Odm->TypeALNA & 0xFF00) << 8 | -+ (pDM_Odm->TypeAPA & 0xFF00) << 16; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); -+ -+ -+ /*============== Value Defined Check ===============*/ -+ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ -+ -+ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) -+ return FALSE; -+ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) -+ return FALSE; -+ -+ /*=============== Bit Defined Check ================*/ -+ /* We don't care [31:28] */ -+ -+ cond1 &= 0x00FF0FFF; -+ driver1 &= 0x00FF0FFF; -+ -+ if ((cond1 & driver1) == cond1) { -+ u4Byte bitMask = 0; -+ -+ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ -+ return TRUE; -+ -+ if ((cond1 & BIT0) != 0) /*GLNA*/ -+ bitMask |= 0x000000FF; -+ if ((cond1 & BIT1) != 0) /*GPA*/ -+ bitMask |= 0x0000FF00; -+ if ((cond1 & BIT2) != 0) /*ALNA*/ -+ bitMask |= 0x00FF0000; -+ if ((cond1 & BIT3) != 0) /*APA*/ -+ bitMask |= 0xFF000000; -+ -+ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ -+ return TRUE; -+ else -+ return FALSE; -+ } else -+ return FALSE; -+} -+static BOOLEAN -+CheckNegative( -+ IN PDM_ODM_T pDM_Odm, -+ IN const u4Byte Condition1, -+ IN const u4Byte Condition2 -+) -+{ -+ return TRUE; -+} -+ -+/****************************************************************************** -+* MAC_REG.TXT -+******************************************************************************/ -+ -+u4Byte Array_MP_8188F_MAC_REG[] = { -+ 0x024, 0x000000DF, -+ 0x025, 0x00000007, -+ 0x02B, 0x0000001C, -+ 0x283, 0x00000020, -+ 0x421, 0x0000000F, -+ 0x428, 0x0000000A, -+ 0x429, 0x00000010, -+ 0x430, 0x00000000, -+ 0x431, 0x00000000, -+ 0x432, 0x00000000, -+ 0x433, 0x00000001, -+ 0x434, 0x00000004, -+ 0x435, 0x00000005, -+ 0x436, 0x00000007, -+ 0x437, 0x00000008, -+ 0x43C, 0x00000004, -+ 0x43D, 0x00000005, -+ 0x43E, 0x00000007, -+ 0x43F, 0x00000008, -+ 0x440, 0x0000005D, -+ 0x441, 0x00000001, -+ 0x442, 0x00000000, -+ 0x444, 0x00000010, -+ 0x445, 0x00000000, -+ 0x446, 0x00000000, -+ 0x447, 0x00000000, -+ 0x448, 0x00000000, -+ 0x449, 0x000000F0, -+ 0x44A, 0x0000000F, -+ 0x44B, 0x0000003E, -+ 0x44C, 0x00000010, -+ 0x44D, 0x00000000, -+ 0x44E, 0x00000000, -+ 0x44F, 0x00000000, -+ 0x450, 0x00000000, -+ 0x451, 0x000000F0, -+ 0x452, 0x0000000F, -+ 0x453, 0x00000000, -+ 0x456, 0x0000005E, -+ 0x460, 0x00000044, -+ 0x461, 0x00000044, -+ 0x4BC, 0x000000C0, -+ 0x4C8, 0x000000FF, -+ 0x4C9, 0x00000008, -+ 0x4CC, 0x000000FF, -+ 0x4CD, 0x000000FF, -+ 0x4CE, 0x00000001, -+ 0x500, 0x00000026, -+ 0x501, 0x000000A2, -+ 0x502, 0x0000002F, -+ 0x503, 0x00000000, -+ 0x504, 0x00000028, -+ 0x505, 0x000000A3, -+ 0x506, 0x0000005E, -+ 0x507, 0x00000000, -+ 0x508, 0x0000002B, -+ 0x509, 0x000000A4, -+ 0x50A, 0x0000005E, -+ 0x50B, 0x00000000, -+ 0x50C, 0x0000004F, -+ 0x50D, 0x000000A4, -+ 0x50E, 0x00000000, -+ 0x50F, 0x00000000, -+ 0x512, 0x0000001C, -+ 0x514, 0x0000000A, -+ 0x516, 0x0000000A, -+ 0x525, 0x0000004F, -+ 0x550, 0x00000010, -+ 0x551, 0x00000010, -+ 0x559, 0x00000002, -+ 0x55C, 0x00000028, -+ 0x55D, 0x000000FF, -+ 0x605, 0x00000030, -+ 0x608, 0x0000000E, -+ 0x609, 0x0000002A, -+ 0x620, 0x000000FF, -+ 0x621, 0x000000FF, -+ 0x622, 0x000000FF, -+ 0x623, 0x000000FF, -+ 0x624, 0x000000FF, -+ 0x625, 0x000000FF, -+ 0x626, 0x000000FF, -+ 0x627, 0x000000FF, -+ 0x638, 0x00000028, -+ 0x63C, 0x0000000A, -+ 0x63D, 0x0000000A, -+ 0x63E, 0x0000000E, -+ 0x63F, 0x0000000E, -+ 0x640, 0x00000040, -+ 0x642, 0x00000040, -+ 0x643, 0x00000000, -+ 0x652, 0x000000C8, -+ 0x66E, 0x00000005, -+ 0x700, 0x00000021, -+ 0x701, 0x00000043, -+ 0x702, 0x00000065, -+ 0x703, 0x00000087, -+ 0x708, 0x00000021, -+ 0x709, 0x00000043, -+ 0x70A, 0x00000065, -+ 0x70B, 0x00000087, -+ -+}; -+ -+void -+ODM_ReadAndConfig_MP_8188F_MAC_REG( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u4Byte i = 0; -+ u1Byte cCond; -+ BOOLEAN bMatched = TRUE, bSkipped = FALSE; -+ u4Byte ArrayLen = sizeof(Array_MP_8188F_MAC_REG)/sizeof(u4Byte); -+ pu4Byte Array = Array_MP_8188F_MAC_REG; -+ -+ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_MAC_REG\n")); -+ -+ while ((i + 1) < ArrayLen) { -+ v1 = Array[i]; -+ v2 = Array[i + 1]; -+ -+ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ -+ if (v1 & BIT31) {/* positive condition*/ -+ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); -+ if (cCond == COND_ENDIF) {/*end*/ -+ bMatched = TRUE; -+ bSkipped = FALSE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); -+ } else if (cCond == COND_ELSE) { /*else*/ -+ bMatched = bSkipped?FALSE:TRUE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); -+ } -+ } else if (v1 & BIT30) { /*negative condition*/ -+ if (bSkipped == FALSE) { -+ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { -+ bMatched = TRUE; -+ bSkipped = TRUE; -+ } else { -+ bMatched = FALSE; -+ bSkipped = FALSE; -+ } -+ } else -+ bMatched = FALSE; -+ } -+ } else { -+ if (bMatched) -+ odm_ConfigMAC_8188F(pDM_Odm, v1, (u1Byte)v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u4Byte -+ODM_GetVersion_MP_8188F_MAC_REG(void) -+{ -+ return 25; -+} -+ -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.18*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188F_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* MAC_REG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188F_MAC_REG[] = { ++ 0x024, 0x000000DF, ++ 0x025, 0x00000007, ++ 0x02B, 0x0000001C, ++ 0x283, 0x00000020, ++ 0x421, 0x0000000F, ++ 0x428, 0x0000000A, ++ 0x429, 0x00000010, ++ 0x430, 0x00000000, ++ 0x431, 0x00000000, ++ 0x432, 0x00000000, ++ 0x433, 0x00000001, ++ 0x434, 0x00000004, ++ 0x435, 0x00000005, ++ 0x436, 0x00000007, ++ 0x437, 0x00000008, ++ 0x43C, 0x00000004, ++ 0x43D, 0x00000005, ++ 0x43E, 0x00000007, ++ 0x43F, 0x00000008, ++ 0x440, 0x0000005D, ++ 0x441, 0x00000001, ++ 0x442, 0x00000000, ++ 0x444, 0x00000010, ++ 0x445, 0x00000000, ++ 0x446, 0x00000000, ++ 0x447, 0x00000000, ++ 0x448, 0x00000000, ++ 0x449, 0x000000F0, ++ 0x44A, 0x0000000F, ++ 0x44B, 0x0000003E, ++ 0x44C, 0x00000010, ++ 0x44D, 0x00000000, ++ 0x44E, 0x00000000, ++ 0x44F, 0x00000000, ++ 0x450, 0x00000000, ++ 0x451, 0x000000F0, ++ 0x452, 0x0000000F, ++ 0x453, 0x00000000, ++ 0x456, 0x0000005E, ++ 0x460, 0x00000044, ++ 0x461, 0x00000044, ++ 0x4BC, 0x000000C0, ++ 0x4C8, 0x000000FF, ++ 0x4C9, 0x00000008, ++ 0x4CC, 0x000000FF, ++ 0x4CD, 0x000000FF, ++ 0x4CE, 0x00000001, ++ 0x500, 0x00000026, ++ 0x501, 0x000000A2, ++ 0x502, 0x0000002F, ++ 0x503, 0x00000000, ++ 0x504, 0x00000028, ++ 0x505, 0x000000A3, ++ 0x506, 0x0000005E, ++ 0x507, 0x00000000, ++ 0x508, 0x0000002B, ++ 0x509, 0x000000A4, ++ 0x50A, 0x0000005E, ++ 0x50B, 0x00000000, ++ 0x50C, 0x0000004F, ++ 0x50D, 0x000000A4, ++ 0x50E, 0x00000000, ++ 0x50F, 0x00000000, ++ 0x512, 0x0000001C, ++ 0x514, 0x0000000A, ++ 0x516, 0x0000000A, ++ 0x525, 0x0000004F, ++ 0x550, 0x00000010, ++ 0x551, 0x00000010, ++ 0x559, 0x00000002, ++ 0x55C, 0x00000028, ++ 0x55D, 0x000000FF, ++ 0x605, 0x00000030, ++ 0x608, 0x0000000E, ++ 0x609, 0x0000002A, ++ 0x620, 0x000000FF, ++ 0x621, 0x000000FF, ++ 0x622, 0x000000FF, ++ 0x623, 0x000000FF, ++ 0x624, 0x000000FF, ++ 0x625, 0x000000FF, ++ 0x626, 0x000000FF, ++ 0x627, 0x000000FF, ++ 0x638, 0x00000028, ++ 0x63C, 0x0000000A, ++ 0x63D, 0x0000000A, ++ 0x63E, 0x0000000E, ++ 0x63F, 0x0000000E, ++ 0x640, 0x00000040, ++ 0x642, 0x00000040, ++ 0x643, 0x00000000, ++ 0x652, 0x000000C8, ++ 0x66E, 0x00000005, ++ 0x700, 0x00000021, ++ 0x701, 0x00000043, ++ 0x702, 0x00000065, ++ 0x703, 0x00000087, ++ 0x708, 0x00000021, ++ 0x709, 0x00000043, ++ 0x70A, 0x00000065, ++ 0x70B, 0x00000087, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188F_MAC_REG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188F_MAC_REG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188F_MAC_REG; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_MAC_REG\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigMAC_8188F(pDM_Odm, v1, (u1Byte)v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188F_MAC_REG(void) ++{ ++ return 25; ++} ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_mac.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_mac.h new file mode 100644 -index 000000000..8dd1f8ea3 +index 0000000..6d61aa5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_mac.h @@ -0,0 +1,39 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.18*/ -+#if (RTL8188F_SUPPORT == 1) -+#ifndef __INC_MP_MAC_HW_IMG_8188F_H -+#define __INC_MP_MAC_HW_IMG_8188F_H -+ -+ -+/****************************************************************************** -+* MAC_REG.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_MAC_REG(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_MAC_REG(void); -+ -+#endif -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.18*/ ++#if (RTL8188F_SUPPORT == 1) ++#ifndef __INC_MP_MAC_HW_IMG_8188F_H ++#define __INC_MP_MAC_HW_IMG_8188F_H ++ ++ ++/****************************************************************************** ++* MAC_REG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_MAC_REG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_MAC_REG(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_rf.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_rf.c new file mode 100644 -index 000000000..fa28d4507 +index 0000000..bced1ee --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_rf.c @@ -0,0 +1,1130 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.18*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8188F_SUPPORT == 1) -+static BOOLEAN -+CheckPositive( -+ IN PDM_ODM_T pDM_Odm, -+ IN const u4Byte Condition1, -+ IN const u4Byte Condition2, -+ IN const u4Byte Condition3, -+ IN const u4Byte Condition4 -+) -+{ -+ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ -+ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ -+ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ -+ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ -+ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ -+ -+ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; -+ u4Byte driver1 = pDM_Odm->CutVersion << 24 | -+ (pDM_Odm->SupportInterface & 0xF0) << 16 | -+ pDM_Odm->SupportPlatform << 16 | -+ pDM_Odm->PackageType << 12 | -+ (pDM_Odm->SupportInterface & 0x0F) << 8 | -+ _BoardType; -+ -+ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | -+ (pDM_Odm->TypeGPA & 0xFF) << 8 | -+ (pDM_Odm->TypeALNA & 0xFF) << 16 | -+ (pDM_Odm->TypeAPA & 0xFF) << 24; -+ -+u4Byte driver3 = 0; -+ -+ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | -+ (pDM_Odm->TypeGPA & 0xFF00) | -+ (pDM_Odm->TypeALNA & 0xFF00) << 8 | -+ (pDM_Odm->TypeAPA & 0xFF00) << 16; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, -+ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); -+ -+ -+ /*============== Value Defined Check ===============*/ -+ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ -+ -+ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) -+ return FALSE; -+ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) -+ return FALSE; -+ -+ /*=============== Bit Defined Check ================*/ -+ /* We don't care [31:28] */ -+ -+ cond1 &= 0x00FF0FFF; -+ driver1 &= 0x00FF0FFF; -+ -+ if ((cond1 & driver1) == cond1) { -+ u4Byte bitMask = 0; -+ -+ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ -+ return TRUE; -+ -+ if ((cond1 & BIT0) != 0) /*GLNA*/ -+ bitMask |= 0x000000FF; -+ if ((cond1 & BIT1) != 0) /*GPA*/ -+ bitMask |= 0x0000FF00; -+ if ((cond1 & BIT2) != 0) /*ALNA*/ -+ bitMask |= 0x00FF0000; -+ if ((cond1 & BIT3) != 0) /*APA*/ -+ bitMask |= 0xFF000000; -+ -+ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ -+ return TRUE; -+ else -+ return FALSE; -+ } else -+ return FALSE; -+} -+static BOOLEAN -+CheckNegative( -+ IN PDM_ODM_T pDM_Odm, -+ IN const u4Byte Condition1, -+ IN const u4Byte Condition2 -+) -+{ -+ return TRUE; -+} -+ -+/****************************************************************************** -+* RadioA.TXT -+******************************************************************************/ -+ -+u4Byte Array_MP_8188F_RadioA[] = { -+ 0x000, 0x00030000, -+ 0x008, 0x00008400, -+ 0x018, 0x00000407, -+ 0x019, 0x00000012, -+ 0x01E, 0x00080009, -+ 0x01F, 0x00000880, -+ 0x02F, 0x0001A060, -+ 0x03F, 0x00028000, -+ 0x042, 0x000060C0, -+ 0x057, 0x000D0000, -+ 0x058, 0x000C0160, -+ 0x067, 0x00001552, -+ 0x083, 0x00000000, -+ 0x0B0, 0x000FF9F0, -+ 0x0B1, 0x00022218, -+ 0x0B2, 0x00034C00, -+ 0x0B4, 0x0004484B, -+ 0x0B5, 0x0000112A, -+ 0x0B6, 0x0000053E, -+ 0x0B7, 0x00010408, -+ 0x0B8, 0x00010200, -+ 0x0B9, 0x00080001, -+ 0x0BA, 0x00040001, -+ 0x0BB, 0x00000400, -+ 0x0BF, 0x000C0000, -+ 0x0C2, 0x00002400, -+ 0x0C3, 0x00000009, -+ 0x0C4, 0x00040C91, -+ 0x0C5, 0x00099999, -+ 0x0C6, 0x000000A3, -+ 0x0C7, 0x0008F820, -+ 0x0C8, 0x00076C06, -+ 0x0C9, 0x00000000, -+ 0x0CA, 0x00080000, -+ 0x0DF, 0x00000180, -+ 0x0EF, 0x000001A0, -+ 0x81000000, 0x00000000, 0x40000000, 0x00000000, -+ 0x051, 0x000E8231, -+ 0x052, 0x000FAC88, -+ 0x053, 0x00000141, -+ 0xA0000000, 0x00000000, -+ 0x051, 0x000E8333, -+ 0x052, 0x000FAC88, -+ 0x053, 0x00000103, -+ 0xB0000000, 0x00000000, -+ 0x056, 0x000517F0, -+ 0x81000000, 0x00000000, 0x40000000, 0x00000000, -+ 0x035, 0x00000090, -+ 0x035, 0x00000190, -+ 0x035, 0x00000290, -+ 0x036, 0x00001064, -+ 0x036, 0x00009064, -+ 0x036, 0x00011064, -+ 0x036, 0x00019064, -+ 0xA0000000, 0x00000000, -+ 0x035, 0x00000099, -+ 0x035, 0x00000199, -+ 0x035, 0x00000299, -+ 0x036, 0x00000064, -+ 0x036, 0x00008064, -+ 0x036, 0x00010064, -+ 0x036, 0x00018064, -+ 0xB0000000, 0x00000000, -+ 0x018, 0x00000C07, -+ 0x05A, 0x00048000, -+ 0x019, 0x000739D0, -+ 0x80000400, 0x00000000, 0x40000000, 0x00000000, -+ 0x034, 0x0000ADD2, -+ 0x034, 0x00009DCF, -+ 0x034, 0x00008CF2, -+ 0x034, 0x00007CEF, -+ 0x034, 0x00006CEC, -+ 0x034, 0x00005CE9, -+ 0x034, 0x00004CCE, -+ 0x034, 0x00003CCB, -+ 0x034, 0x00002CC8, -+ 0x034, 0x00001C4B, -+ 0x034, 0x00000C48, -+ 0x91000000, 0x00000000, 0x40000000, 0x00000000, -+ 0x034, 0x0000ADD3, -+ 0x034, 0x00009DD1, -+ 0x034, 0x00008CF4, -+ 0x034, 0x00007CF1, -+ 0x034, 0x00006CEE, -+ 0x034, 0x00005CD3, -+ 0x034, 0x00004CD0, -+ 0x034, 0x00003CCD, -+ 0x034, 0x00002CCA, -+ 0x034, 0x00001C4D, -+ 0x034, 0x00000C4A, -+ 0xA0000000, 0x00000000, -+ 0x034, 0x0000ADD6, -+ 0x034, 0x00009DD3, -+ 0x034, 0x00008CF4, -+ 0x034, 0x00007CF1, -+ 0x034, 0x00006CEE, -+ 0x034, 0x00005CEB, -+ 0x034, 0x00004CCE, -+ 0x034, 0x00003CCB, -+ 0x034, 0x00002CC8, -+ 0x034, 0x00001C4B, -+ 0x034, 0x00000C48, -+ 0xB0000000, 0x00000000, -+ 0x000, 0x00030159, -+ 0x084, 0x00048000, -+ 0x086, 0x0000002A, -+ 0x087, 0x00000025, -+ 0x08E, 0x00065540, -+ 0x08F, 0x00088000, -+ 0x0EF, 0x000020A0, -+ 0x03B, 0x000F0F00, -+ 0x03B, 0x000E0B00, -+ 0x03B, 0x000D0900, -+ 0x03B, 0x000C0700, -+ 0x03B, 0x000B0600, -+ 0x03B, 0x000A0400, -+ 0x03B, 0x00090200, -+ 0x03B, 0x00080000, -+ 0x03B, 0x0007BF00, -+ 0x03B, 0x00060B00, -+ 0x03B, 0x0005C900, -+ 0x03B, 0x00040700, -+ 0x03B, 0x00030600, -+ 0x03B, 0x0002D500, -+ 0x03B, 0x00010200, -+ 0x03B, 0x0000E000, -+ 0x0EF, 0x000000A0, -+ 0x0EF, 0x00000010, -+ 0x03B, 0x0000C0A8, -+ 0x03B, 0x00010400, -+ 0x0EF, 0x00000000, -+ 0x0EF, 0x00080000, -+ 0x030, 0x00010000, -+ 0x031, 0x0000000F, -+ 0x032, 0x00007EFE, -+ 0x0EF, 0x00000000, -+ 0x000, 0x00010159, -+ 0x018, 0x0000FC07, -+ 0xFFE, 0x00000000, -+ 0xFFE, 0x00000000, -+ 0x01F, 0x00080003, -+ 0xFFE, 0x00000000, -+ 0xFFE, 0x00000000, -+ 0x01E, 0x00000001, -+ 0x01F, 0x00080000, -+ 0x000, 0x00033D95, -+ -+}; -+ -+void -+ODM_ReadAndConfig_MP_8188F_RadioA( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u4Byte i = 0; -+ u1Byte cCond; -+ BOOLEAN bMatched = TRUE, bSkipped = FALSE; -+ u4Byte ArrayLen = sizeof(Array_MP_8188F_RadioA)/sizeof(u4Byte); -+ pu4Byte Array = Array_MP_8188F_RadioA; -+ -+ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_RadioA\n")); -+ -+ while ((i + 1) < ArrayLen) { -+ v1 = Array[i]; -+ v2 = Array[i + 1]; -+ -+ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ -+ if (v1 & BIT31) {/* positive condition*/ -+ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); -+ if (cCond == COND_ENDIF) {/*end*/ -+ bMatched = TRUE; -+ bSkipped = FALSE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); -+ } else if (cCond == COND_ELSE) { /*else*/ -+ bMatched = bSkipped?FALSE:TRUE; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); -+ } -+ } else if (v1 & BIT30) { /*negative condition*/ -+ if (bSkipped == FALSE) { -+ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { -+ bMatched = TRUE; -+ bSkipped = TRUE; -+ } else { -+ bMatched = FALSE; -+ bSkipped = FALSE; -+ } -+ } else -+ bMatched = FALSE; -+ } -+ } else { -+ if (bMatched) -+ odm_ConfigRF_RadioA_8188F(pDM_Odm, v1, v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u4Byte -+ODM_GetVersion_MP_8188F_RadioA(void) -+{ -+ return 25; -+} -+ -+/****************************************************************************** -+* TxPowerTrack_AP.TXT -+******************************************************************************/ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; -+u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; -+u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; -+u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; -+#endif -+ -+void -+ODM_ReadAndConfig_MP_8188F_TxPowerTrack_AP( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188F\n")); -+ -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); -+#endif -+} -+ -+/****************************************************************************** -+* TxPowerTrack_SDIO.TXT -+******************************************************************************/ -+ -+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE -+u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8188F[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; -+u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8188F[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; -+u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 9, 10, 11, 12, 13, 14, 15, 16, 17, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18}; -+u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8188F[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 3, 4, 6, 7, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 16, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8188F[] = {0, 0, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 8, 9, 10, 11, 12, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14}; -+#endif -+ -+void -+ODM_ReadAndConfig_MP_8188F_TxPowerTrack_SDIO( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188F\n")); -+ -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); -+#endif -+} -+ -+/****************************************************************************** -+* TxPowerTrack_USB.TXT -+******************************************************************************/ -+ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8188F[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; -+u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8188F[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; -+u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8188F[] = {0, 1, 1, 2, 3, 4, 4, 4, 5, 6, 7, 8, 8, 9, 10, 11, 12, 13, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; -+u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8188F[] = {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8188F[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8188F[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8188F[] = {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}; -+u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8188F[] = {0, 0, 1, 2, 2, 3, 3, 4, 6, 6, 7, 8, 8, 10, 10, 11, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; -+#endif -+ -+void -+ODM_ReadAndConfig_MP_8188F_TxPowerTrack_USB( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188F\n")); -+ -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); -+ -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); -+ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); -+#endif -+} -+ -+/****************************************************************************** -+* TXPWR_LMT.TXT -+******************************************************************************/ -+ -+const char *Array_MP_8188F_TXPWR_LMT[] = { -+ "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "01", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "02", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "03", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "03", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "04", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "04", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "05", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "05", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "06", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "06", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "07", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "07", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "08", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "08", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "09", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "10", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "11", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "12", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "13", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", -+ "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "01", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "01", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "02", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "02", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "03", "30", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "03", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "04", "30", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "04", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "05", "30", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "05", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "06", "30", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "06", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "07", "30", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "07", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "08", "30", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "08", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "09", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "09", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "10", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "10", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "11", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "11", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "12", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "30", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "13", "30", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", -+ "FCC", "2.4G", "20M", "HT", "1T", "01", "28", -+ "ETSI", "2.4G", "20M", "HT", "1T", "01", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "01", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "02", "28", -+ "ETSI", "2.4G", "20M", "HT", "1T", "02", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "02", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "03", "30", -+ "ETSI", "2.4G", "20M", "HT", "1T", "03", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "03", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "04", "30", -+ "ETSI", "2.4G", "20M", "HT", "1T", "04", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "04", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "05", "30", -+ "ETSI", "2.4G", "20M", "HT", "1T", "05", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "05", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "06", "30", -+ "ETSI", "2.4G", "20M", "HT", "1T", "06", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "06", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "07", "30", -+ "ETSI", "2.4G", "20M", "HT", "1T", "07", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "07", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "08", "30", -+ "ETSI", "2.4G", "20M", "HT", "1T", "08", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "08", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "09", "28", -+ "ETSI", "2.4G", "20M", "HT", "1T", "09", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "09", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "10", "28", -+ "ETSI", "2.4G", "20M", "HT", "1T", "10", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "10", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "11", "28", -+ "ETSI", "2.4G", "20M", "HT", "1T", "11", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "11", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "12", "63", -+ "ETSI", "2.4G", "20M", "HT", "1T", "12", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "12", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "13", "63", -+ "ETSI", "2.4G", "20M", "HT", "1T", "13", "30", -+ "MKK", "2.4G", "20M", "HT", "1T", "13", "30", -+ "FCC", "2.4G", "20M", "HT", "1T", "14", "63", -+ "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", -+ "MKK", "2.4G", "20M", "HT", "1T", "14", "63", -+ "FCC", "2.4G", "20M", "HT", "2T", "01", "28", -+ "ETSI", "2.4G", "20M", "HT", "2T", "01", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "01", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "02", "28", -+ "ETSI", "2.4G", "20M", "HT", "2T", "02", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "02", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "03", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "03", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "03", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "04", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "04", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "04", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "05", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "05", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "05", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "06", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "06", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "06", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "07", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "07", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "07", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "08", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "08", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", 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"ETSI", "5G", "20M", "HT", "1T", "132", "32", -+ "MKK", "5G", "20M", "HT", "1T", "132", "32", -+ "FCC", "5G", "20M", "HT", "1T", "136", "30", -+ "ETSI", "5G", "20M", "HT", "1T", "136", "32", -+ "MKK", "5G", "20M", "HT", "1T", "136", "32", -+ "FCC", "5G", "20M", "HT", "1T", "140", "28", -+ "ETSI", "5G", "20M", "HT", "1T", "140", "32", -+ "MKK", "5G", "20M", "HT", "1T", "140", "32", -+ "FCC", "5G", "20M", "HT", "1T", "149", "34", -+ "ETSI", "5G", "20M", "HT", "1T", "149", "32", -+ "MKK", "5G", "20M", "HT", "1T", "149", "63", -+ "FCC", "5G", "20M", "HT", "1T", "153", "34", -+ "ETSI", "5G", "20M", "HT", "1T", "153", "32", -+ "MKK", "5G", "20M", "HT", "1T", "153", "63", -+ "FCC", "5G", "20M", "HT", "1T", "157", "34", -+ "ETSI", "5G", "20M", "HT", "1T", "157", "32", -+ "MKK", "5G", "20M", "HT", "1T", "157", "63", -+ "FCC", "5G", "20M", "HT", "1T", "161", "34", -+ "ETSI", "5G", "20M", "HT", "1T", "161", "32", -+ "MKK", "5G", "20M", "HT", "1T", "161", "63", -+ "FCC", "5G", "20M", "HT", "1T", "165", "34", -+ "ETSI", "5G", "20M", "HT", "1T", "165", "32", -+ "MKK", "5G", "20M", "HT", "1T", "165", "63", -+ "FCC", "5G", "20M", "HT", "2T", "36", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "36", "30", -+ "MKK", "5G", "20M", "HT", "2T", "36", "30", -+ "FCC", "5G", "20M", "HT", "2T", "40", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "40", "30", -+ "MKK", "5G", "20M", "HT", "2T", "40", "30", -+ "FCC", "5G", "20M", "HT", "2T", "44", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "44", "30", -+ "MKK", "5G", "20M", "HT", "2T", "44", "30", -+ "FCC", "5G", "20M", "HT", "2T", "48", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "48", "30", -+ "MKK", "5G", "20M", "HT", "2T", "48", "30", -+ "FCC", "5G", "20M", "HT", "2T", "52", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "52", "30", -+ "MKK", "5G", "20M", "HT", "2T", "52", "30", -+ "FCC", "5G", "20M", "HT", "2T", "56", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "56", "30", -+ "MKK", "5G", "20M", "HT", "2T", "56", "30", -+ "FCC", "5G", "20M", "HT", "2T", "60", "30", -+ "ETSI", "5G", "20M", "HT", "2T", "60", "30", -+ "MKK", "5G", "20M", "HT", "2T", "60", "30", -+ "FCC", "5G", "20M", "HT", "2T", "64", "26", -+ "ETSI", "5G", "20M", "HT", "2T", "64", "30", -+ "MKK", "5G", "20M", "HT", "2T", "64", "30", -+ "FCC", "5G", "20M", "HT", "2T", "100", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "100", "30", -+ "MKK", "5G", "20M", "HT", "2T", "100", "30", -+ "FCC", "5G", "20M", "HT", "2T", "114", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "114", "30", -+ "MKK", "5G", "20M", "HT", "2T", "114", "30", -+ "FCC", "5G", "20M", "HT", "2T", "108", "30", -+ "ETSI", "5G", "20M", "HT", "2T", "108", "30", -+ "MKK", "5G", "20M", "HT", "2T", "108", "30", -+ "FCC", "5G", "20M", "HT", "2T", "112", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "112", "30", -+ "MKK", "5G", "20M", "HT", "2T", "112", "30", -+ "FCC", "5G", "20M", "HT", "2T", "116", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "116", "30", -+ "MKK", "5G", "20M", "HT", "2T", "116", "30", -+ "FCC", "5G", "20M", "HT", "2T", "120", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "120", "30", -+ "MKK", "5G", "20M", "HT", "2T", "120", "30", -+ "FCC", "5G", "20M", "HT", "2T", "124", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "124", "30", -+ "MKK", "5G", "20M", "HT", "2T", "124", "30", -+ "FCC", "5G", "20M", "HT", "2T", "128", "30", -+ "ETSI", "5G", "20M", "HT", "2T", "128", "30", -+ "MKK", "5G", "20M", "HT", "2T", "128", "30", -+ "FCC", "5G", "20M", "HT", "2T", "132", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "132", "30", -+ "MKK", "5G", "20M", "HT", "2T", "132", "30", -+ "FCC", "5G", "20M", "HT", "2T", "136", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "136", "30", -+ "MKK", "5G", "20M", "HT", "2T", "136", "30", -+ "FCC", "5G", "20M", "HT", "2T", "140", "26", -+ "ETSI", "5G", "20M", "HT", "2T", "140", "30", -+ "MKK", "5G", "20M", "HT", "2T", "140", "30", -+ "FCC", "5G", "20M", "HT", "2T", "149", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "149", "30", -+ "MKK", "5G", "20M", "HT", "2T", "149", "63", -+ "FCC", "5G", "20M", "HT", "2T", "153", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "153", "30", -+ "MKK", "5G", "20M", "HT", "2T", "153", "63", -+ "FCC", "5G", "20M", "HT", "2T", "157", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "157", "30", -+ "MKK", "5G", "20M", "HT", "2T", "157", "63", -+ "FCC", "5G", "20M", "HT", "2T", "161", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "161", "30", -+ "MKK", "5G", "20M", "HT", "2T", "161", "63", -+ "FCC", "5G", "20M", "HT", "2T", "165", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "165", "30", -+ "MKK", "5G", "20M", "HT", "2T", "165", "63", -+ "FCC", "5G", "40M", "HT", "1T", "38", "30", -+ "ETSI", "5G", "40M", "HT", "1T", "38", "32", -+ "MKK", "5G", "40M", "HT", "1T", "38", "32", -+ "FCC", "5G", "40M", "HT", "1T", "46", "30", -+ "ETSI", "5G", "40M", "HT", "1T", "46", "32", -+ "MKK", "5G", "40M", "HT", "1T", "46", "32", -+ "FCC", "5G", "40M", "HT", "1T", "54", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "54", "32", -+ "MKK", "5G", "40M", "HT", "1T", "54", "32", -+ "FCC", "5G", "40M", "HT", "1T", "62", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "62", "32", -+ "MKK", "5G", "40M", "HT", "1T", "62", "32", -+ "FCC", "5G", "40M", "HT", "1T", "102", "28", -+ "ETSI", "5G", "40M", "HT", "1T", "102", "32", -+ "MKK", "5G", "40M", "HT", "1T", "102", "32", -+ "FCC", "5G", "40M", "HT", "1T", "110", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "110", "32", -+ "MKK", "5G", "40M", "HT", "1T", "110", "32", -+ "FCC", "5G", "40M", "HT", "1T", "118", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "118", "32", -+ "MKK", "5G", "40M", "HT", "1T", "118", "32", -+ "FCC", "5G", "40M", "HT", "1T", "126", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "126", "32", -+ "MKK", "5G", "40M", "HT", "1T", "126", "32", -+ "FCC", "5G", "40M", "HT", "1T", "134", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "134", "32", -+ "MKK", "5G", "40M", "HT", "1T", "134", "32", -+ "FCC", "5G", "40M", "HT", "1T", "151", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "151", "32", -+ "MKK", "5G", "40M", "HT", "1T", "151", "63", -+ "FCC", "5G", "40M", "HT", "1T", "159", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "159", "32", -+ "MKK", "5G", "40M", "HT", "1T", "159", "63", -+ "FCC", "5G", "40M", "HT", "2T", "38", "28", -+ "ETSI", "5G", "40M", "HT", "2T", "38", "30", -+ "MKK", "5G", "40M", "HT", "2T", "38", "30", -+ "FCC", "5G", "40M", "HT", "2T", "46", "28", -+ "ETSI", "5G", "40M", "HT", "2T", "46", "30", -+ "MKK", "5G", "40M", "HT", "2T", "46", "30", -+ "FCC", "5G", "40M", "HT", "2T", "54", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "54", "30", -+ "MKK", "5G", "40M", "HT", "2T", "54", "30", -+ "FCC", "5G", "40M", "HT", "2T", "62", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "62", "30", -+ "MKK", "5G", "40M", "HT", "2T", "62", "30", -+ "FCC", "5G", "40M", "HT", "2T", "102", "26", -+ "ETSI", "5G", "40M", "HT", "2T", "102", "30", -+ "MKK", "5G", "40M", "HT", "2T", "102", "30", -+ "FCC", "5G", "40M", "HT", "2T", "110", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "110", "30", -+ "MKK", "5G", "40M", "HT", "2T", "110", "30", -+ "FCC", "5G", "40M", "HT", "2T", "118", "34", -+ "ETSI", "5G", "40M", "HT", "2T", "118", "30", -+ "MKK", "5G", "40M", "HT", "2T", "118", "30", -+ "FCC", "5G", "40M", "HT", "2T", "126", "32", -+ "ETSI", "5G", "40M", "HT", "2T", "126", "30", -+ "MKK", "5G", "40M", "HT", "2T", "126", "30", -+ "FCC", "5G", "40M", "HT", "2T", "134", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "134", "30", -+ "MKK", "5G", "40M", "HT", "2T", "134", "30", -+ "FCC", "5G", "40M", "HT", "2T", "151", "34", -+ "ETSI", "5G", "40M", "HT", "2T", "151", "30", -+ "MKK", "5G", "40M", "HT", "2T", "151", "63", -+ "FCC", "5G", "40M", "HT", "2T", "159", "34", -+ "ETSI", "5G", "40M", "HT", "2T", "159", "30", -+ "MKK", "5G", "40M", "HT", "2T", "159", "63", -+ "FCC", "5G", "80M", "VHT", "1T", "42", "30", -+ "ETSI", "5G", "80M", "VHT", "1T", "42", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "42", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "58", "28", -+ "ETSI", "5G", "80M", "VHT", "1T", "58", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "58", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "106", "30", -+ "ETSI", "5G", "80M", "VHT", "1T", "106", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "106", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "122", "34", -+ "ETSI", "5G", "80M", "VHT", "1T", "122", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "122", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "155", "34", -+ "ETSI", "5G", "80M", "VHT", "1T", "155", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "155", "63", -+ "FCC", "5G", "80M", "VHT", "2T", "42", "28", -+ "ETSI", "5G", "80M", "VHT", "2T", "42", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "42", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "58", "26", -+ "ETSI", "5G", "80M", "VHT", "2T", "58", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "58", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "106", "28", -+ "ETSI", "5G", "80M", "VHT", "2T", "106", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "106", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "122", "32", -+ "ETSI", "5G", "80M", "VHT", "2T", "122", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "122", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "155", "34", -+ "ETSI", "5G", "80M", "VHT", "2T", "155", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "155", "63" -+}; -+ -+void -+ODM_ReadAndConfig_MP_8188F_TXPWR_LMT( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u4Byte i = 0; -+ u4Byte ArrayLen = sizeof(Array_MP_8188F_TXPWR_LMT)/sizeof(pu1Byte); -+ pu1Byte *Array = (pu1Byte *)Array_MP_8188F_TXPWR_LMT; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); -+ pHalData->nLinesReadPwrLmt = ArrayLen/7; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_TXPWR_LMT\n")); -+ -+ for (i = 0; i < ArrayLen; i += 7) { -+ pu1Byte regulation = Array[i]; -+ pu1Byte band = Array[i+1]; -+ pu1Byte bandwidth = Array[i+2]; -+ pu1Byte rate = Array[i+3]; -+ pu1Byte rfPath = Array[i+4]; -+ pu1Byte chnl = Array[i+5]; -+ pu1Byte val = Array[i+6]; -+ -+ odm_ConfigBB_TXPWR_LMT_8188F(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ rsprintf((char *)pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", -+ regulation, band, bandwidth, rate, rfPath, chnl, val); -+#endif -+ } -+ -+} -+ -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.18*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8188F_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* RadioA.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8188F_RadioA[] = { ++ 0x000, 0x00030000, ++ 0x008, 0x00008400, ++ 0x018, 0x00000407, ++ 0x019, 0x00000012, ++ 0x01E, 0x00080009, ++ 0x01F, 0x00000880, ++ 0x02F, 0x0001A060, ++ 0x03F, 0x00028000, ++ 0x042, 0x000060C0, ++ 0x057, 0x000D0000, ++ 0x058, 0x000C0160, ++ 0x067, 0x00001552, ++ 0x083, 0x00000000, ++ 0x0B0, 0x000FF9F0, ++ 0x0B1, 0x00022218, ++ 0x0B2, 0x00034C00, ++ 0x0B4, 0x0004484B, ++ 0x0B5, 0x0000112A, ++ 0x0B6, 0x0000053E, ++ 0x0B7, 0x00010408, ++ 0x0B8, 0x00010200, ++ 0x0B9, 0x00080001, ++ 0x0BA, 0x00040001, ++ 0x0BB, 0x00000400, ++ 0x0BF, 0x000C0000, ++ 0x0C2, 0x00002400, ++ 0x0C3, 0x00000009, ++ 0x0C4, 0x00040C91, ++ 0x0C5, 0x00099999, ++ 0x0C6, 0x000000A3, ++ 0x0C7, 0x0008F820, ++ 0x0C8, 0x00076C06, ++ 0x0C9, 0x00000000, ++ 0x0CA, 0x00080000, ++ 0x0DF, 0x00000180, ++ 0x0EF, 0x000001A0, ++ 0x81000000, 0x00000000, 0x40000000, 0x00000000, ++ 0x051, 0x000E8231, ++ 0x052, 0x000FAC88, ++ 0x053, 0x00000141, ++ 0xA0000000, 0x00000000, ++ 0x051, 0x000E8333, ++ 0x052, 0x000FAC88, ++ 0x053, 0x00000103, ++ 0xB0000000, 0x00000000, ++ 0x056, 0x000517F0, ++ 0x81000000, 0x00000000, 0x40000000, 0x00000000, ++ 0x035, 0x00000090, ++ 0x035, 0x00000190, ++ 0x035, 0x00000290, ++ 0x036, 0x00001064, ++ 0x036, 0x00009064, ++ 0x036, 0x00011064, ++ 0x036, 0x00019064, ++ 0xA0000000, 0x00000000, ++ 0x035, 0x00000099, ++ 0x035, 0x00000199, ++ 0x035, 0x00000299, ++ 0x036, 0x00000064, ++ 0x036, 0x00008064, ++ 0x036, 0x00010064, ++ 0x036, 0x00018064, ++ 0xB0000000, 0x00000000, ++ 0x018, 0x00000C07, ++ 0x05A, 0x00048000, ++ 0x019, 0x000739D0, ++ 0x80000400, 0x00000000, 0x40000000, 0x00000000, ++ 0x034, 0x0000ADD2, ++ 0x034, 0x00009DCF, ++ 0x034, 0x00008CF2, ++ 0x034, 0x00007CEF, ++ 0x034, 0x00006CEC, ++ 0x034, 0x00005CE9, ++ 0x034, 0x00004CCE, ++ 0x034, 0x00003CCB, ++ 0x034, 0x00002CC8, ++ 0x034, 0x00001C4B, ++ 0x034, 0x00000C48, ++ 0x91000000, 0x00000000, 0x40000000, 0x00000000, ++ 0x034, 0x0000ADD3, ++ 0x034, 0x00009DD1, ++ 0x034, 0x00008CF4, ++ 0x034, 0x00007CF1, ++ 0x034, 0x00006CEE, ++ 0x034, 0x00005CD3, ++ 0x034, 0x00004CD0, ++ 0x034, 0x00003CCD, ++ 0x034, 0x00002CCA, ++ 0x034, 0x00001C4D, ++ 0x034, 0x00000C4A, ++ 0xA0000000, 0x00000000, ++ 0x034, 0x0000ADD6, ++ 0x034, 0x00009DD3, ++ 0x034, 0x00008CF4, ++ 0x034, 0x00007CF1, ++ 0x034, 0x00006CEE, ++ 0x034, 0x00005CEB, ++ 0x034, 0x00004CCE, ++ 0x034, 0x00003CCB, ++ 0x034, 0x00002CC8, ++ 0x034, 0x00001C4B, ++ 0x034, 0x00000C48, ++ 0xB0000000, 0x00000000, ++ 0x000, 0x00030159, ++ 0x084, 0x00048000, ++ 0x086, 0x0000002A, ++ 0x087, 0x00000025, ++ 0x08E, 0x00065540, ++ 0x08F, 0x00088000, ++ 0x0EF, 0x000020A0, ++ 0x03B, 0x000F0F00, ++ 0x03B, 0x000E0B00, ++ 0x03B, 0x000D0900, ++ 0x03B, 0x000C0700, ++ 0x03B, 0x000B0600, ++ 0x03B, 0x000A0400, ++ 0x03B, 0x00090200, ++ 0x03B, 0x00080000, ++ 0x03B, 0x0007BF00, ++ 0x03B, 0x00060B00, ++ 0x03B, 0x0005C900, ++ 0x03B, 0x00040700, ++ 0x03B, 0x00030600, ++ 0x03B, 0x0002D500, ++ 0x03B, 0x00010200, ++ 0x03B, 0x0000E000, ++ 0x0EF, 0x000000A0, ++ 0x0EF, 0x00000010, ++ 0x03B, 0x0000C0A8, ++ 0x03B, 0x00010400, ++ 0x0EF, 0x00000000, ++ 0x0EF, 0x00080000, ++ 0x030, 0x00010000, ++ 0x031, 0x0000000F, ++ 0x032, 0x00007EFE, ++ 0x0EF, 0x00000000, ++ 0x000, 0x00010159, ++ 0x018, 0x0000FC07, ++ 0xFFE, 0x00000000, ++ 0xFFE, 0x00000000, ++ 0x01F, 0x00080003, ++ 0xFFE, 0x00000000, ++ 0xFFE, 0x00000000, ++ 0x01E, 0x00000001, ++ 0x01F, 0x00080000, ++ 0x000, 0x00033D95, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188F_RadioA( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8188F_RadioA)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8188F_RadioA; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_RadioA\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigRF_RadioA_8188F(pDM_Odm, v1, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8188F_RadioA(void) ++{ ++ return 25; ++} ++ ++/****************************************************************************** ++* TxPowerTrack_AP.TXT ++******************************************************************************/ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8188F[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8188F[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8188F_TxPowerTrack_AP( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188F\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8188F, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_SDIO.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8188F[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8188F[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 9, 10, 11, 12, 13, 14, 15, 16, 17, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8188F[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8188F[] = {0, 1, 2, 3, 4, 6, 7, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 16, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8188F[] = {0, 0, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 8, 9, 10, 11, 12, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8188F_TxPowerTrack_SDIO( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188F\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8188F, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_USB.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8188F[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8188F[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8188F[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8188F[] = {0, 1, 1, 2, 3, 4, 4, 4, 5, 6, 7, 8, 8, 9, 10, 11, 12, 13, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8188F[] = {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8188F[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8188F[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8188F[] = {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8188F[] = {0, 0, 1, 2, 2, 3, 3, 4, 6, 6, 7, 8, 8, 10, 10, 11, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8188F_TxPowerTrack_USB( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188F\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8188F, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TXPWR_LMT.TXT ++******************************************************************************/ ++ ++const char *Array_MP_8188F_TXPWR_LMT[] = { ++ "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "01", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "02", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "03", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "03", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "04", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "04", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "05", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "05", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "06", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "06", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "07", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "07", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "08", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "08", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "09", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "10", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "11", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "12", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "13", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "01", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "01", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "02", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "02", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "03", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "04", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "05", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "06", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "07", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "08", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "09", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "09", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "10", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "10", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "11", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "11", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "12", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "30", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "13", "30", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "1T", "01", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "01", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "01", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "02", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "02", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "02", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "03", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "03", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "03", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "04", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "04", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "04", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "05", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "05", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "05", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "06", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "06", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "06", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "07", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "07", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "07", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "08", "30", ++ "ETSI", "2.4G", "20M", "HT", "1T", "08", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "08", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "09", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "09", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "09", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "10", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "10", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "10", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "11", "28", ++ "ETSI", "2.4G", "20M", "HT", "1T", "11", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "11", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "12", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "12", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "13", "30", ++ "MKK", "2.4G", "20M", "HT", "1T", "13", "30", ++ "FCC", "2.4G", "20M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "2T", "01", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "01", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "01", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "02", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "02", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "02", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "03", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "03", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "03", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "04", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "04", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "04", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "05", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "05", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "05", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "06", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "06", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "06", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "07", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "07", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "07", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "08", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "08", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "08", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "09", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "09", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "09", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "10", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "10", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "10", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "11", "28", ++ "ETSI", "2.4G", "20M", "HT", "2T", "11", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "11", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "12", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "12", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "13", "30", ++ "MKK", "2.4G", "20M", "HT", "2T", "13", "30", ++ "FCC", "2.4G", "20M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "2T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "03", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "03", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "03", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "04", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "04", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "04", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "05", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "05", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "05", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "06", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "06", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "06", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "07", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "07", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "07", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "08", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "08", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "08", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "09", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "09", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "09", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "10", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "10", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "10", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "11", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "11", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "11", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "12", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "12", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "13", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "13", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "03", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "03", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "03", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "04", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "04", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "04", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "05", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "05", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "05", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "06", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "06", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "06", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "07", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "07", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "07", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "08", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "08", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "08", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "09", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "09", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "09", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "10", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "10", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "10", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "11", "26", ++ "ETSI", "2.4G", "40M", "HT", "2T", "11", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "11", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "12", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "12", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "13", "26", ++ "MKK", "2.4G", "40M", "HT", "2T", "13", "26", ++ "FCC", "2.4G", "40M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "14", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "36", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "36", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "36", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "40", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "40", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "40", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "44", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "44", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "44", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "48", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "48", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "48", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "52", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "52", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "52", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "56", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "56", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "56", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "60", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "60", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "60", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "64", "28", ++ "ETSI", "5G", "20M", "OFDM", "1T", "64", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "64", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "100", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "100", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "100", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "114", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "114", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "114", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "108", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "108", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "108", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "112", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "112", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "112", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "116", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "116", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "116", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "120", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "120", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "120", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "124", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "124", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "124", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "128", "32", ++ "ETSI", "5G", "20M", "OFDM", "1T", "128", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "128", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "132", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "132", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "132", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "136", "30", ++ "ETSI", "5G", "20M", "OFDM", "1T", "136", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "136", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "140", "28", ++ "ETSI", "5G", "20M", "OFDM", "1T", "140", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "140", "32", ++ "FCC", "5G", "20M", "OFDM", "1T", "149", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "149", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "149", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "153", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "153", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "153", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "157", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "157", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "157", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "161", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "161", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "161", "63", ++ "FCC", "5G", "20M", "OFDM", "1T", "165", "34", ++ "ETSI", "5G", "20M", "OFDM", "1T", "165", "32", ++ "MKK", "5G", "20M", "OFDM", "1T", "165", "63", ++ "FCC", "5G", "20M", "HT", "1T", "36", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "36", "32", ++ "MKK", "5G", "20M", "HT", "1T", "36", "32", ++ "FCC", "5G", "20M", "HT", "1T", "40", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "40", "32", ++ "MKK", "5G", "20M", "HT", "1T", "40", "32", ++ "FCC", "5G", "20M", "HT", "1T", "44", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "44", "32", ++ "MKK", "5G", "20M", "HT", "1T", "44", "32", ++ "FCC", "5G", "20M", "HT", "1T", "48", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "48", "32", ++ "MKK", "5G", "20M", "HT", "1T", "48", "32", ++ "FCC", "5G", "20M", "HT", "1T", "52", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "52", "32", ++ "MKK", "5G", "20M", "HT", "1T", "52", "32", ++ "FCC", "5G", "20M", "HT", "1T", "56", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "56", "32", ++ "MKK", "5G", "20M", "HT", "1T", "56", "32", ++ "FCC", "5G", "20M", "HT", "1T", "60", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "60", "32", ++ "MKK", "5G", "20M", "HT", "1T", "60", "32", ++ "FCC", "5G", "20M", "HT", "1T", "64", "28", ++ "ETSI", "5G", "20M", "HT", "1T", "64", "32", ++ "MKK", "5G", "20M", "HT", "1T", "64", "32", ++ "FCC", "5G", "20M", "HT", "1T", "100", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "100", "32", ++ "MKK", "5G", "20M", "HT", "1T", "100", "32", ++ "FCC", "5G", "20M", "HT", "1T", "114", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "114", "32", ++ "MKK", "5G", "20M", "HT", "1T", "114", "32", ++ "FCC", "5G", "20M", "HT", "1T", "108", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "108", "32", ++ "MKK", "5G", "20M", "HT", "1T", "108", "32", ++ "FCC", "5G", "20M", "HT", "1T", "112", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "112", "32", ++ "MKK", "5G", "20M", "HT", "1T", "112", "32", ++ "FCC", "5G", "20M", "HT", "1T", "116", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "116", "32", ++ "MKK", "5G", "20M", "HT", "1T", "116", "32", ++ "FCC", "5G", "20M", "HT", "1T", "120", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "120", "32", ++ "MKK", "5G", "20M", "HT", "1T", "120", "32", ++ "FCC", "5G", "20M", "HT", "1T", "124", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "124", "32", ++ "MKK", "5G", "20M", "HT", "1T", "124", "32", ++ "FCC", "5G", "20M", "HT", "1T", "128", "32", ++ "ETSI", "5G", "20M", "HT", "1T", "128", "32", ++ "MKK", "5G", "20M", "HT", "1T", "128", "32", ++ "FCC", "5G", "20M", "HT", "1T", "132", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "132", "32", ++ "MKK", "5G", "20M", "HT", "1T", "132", "32", ++ "FCC", "5G", "20M", "HT", "1T", "136", "30", ++ "ETSI", "5G", "20M", "HT", "1T", "136", "32", ++ "MKK", "5G", "20M", "HT", "1T", "136", "32", ++ "FCC", "5G", "20M", "HT", "1T", "140", "28", ++ "ETSI", "5G", "20M", "HT", "1T", "140", "32", ++ "MKK", "5G", "20M", "HT", "1T", "140", "32", ++ "FCC", "5G", "20M", "HT", "1T", "149", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "149", "32", ++ "MKK", "5G", "20M", "HT", "1T", "149", "63", ++ "FCC", "5G", "20M", "HT", "1T", "153", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "153", "32", ++ "MKK", "5G", "20M", "HT", "1T", "153", "63", ++ "FCC", "5G", "20M", "HT", "1T", "157", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "157", "32", ++ "MKK", "5G", "20M", "HT", "1T", "157", "63", ++ "FCC", "5G", "20M", "HT", "1T", "161", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "161", "32", ++ "MKK", "5G", "20M", "HT", "1T", "161", "63", ++ "FCC", "5G", "20M", "HT", "1T", "165", "34", ++ "ETSI", "5G", "20M", "HT", "1T", "165", "32", ++ "MKK", "5G", "20M", "HT", "1T", "165", "63", ++ "FCC", "5G", "20M", "HT", "2T", "36", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "36", "30", ++ "MKK", "5G", "20M", "HT", "2T", "36", "30", ++ "FCC", "5G", "20M", "HT", "2T", "40", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "40", "30", ++ "MKK", "5G", "20M", "HT", "2T", "40", "30", ++ "FCC", "5G", "20M", "HT", "2T", "44", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "44", "30", ++ "MKK", "5G", "20M", "HT", "2T", "44", "30", ++ "FCC", "5G", "20M", "HT", "2T", "48", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "48", "30", ++ "MKK", "5G", "20M", "HT", "2T", "48", "30", ++ "FCC", "5G", "20M", "HT", "2T", "52", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "52", "30", ++ "MKK", "5G", "20M", "HT", "2T", "52", "30", ++ "FCC", "5G", "20M", "HT", "2T", "56", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "56", "30", ++ "MKK", "5G", "20M", "HT", "2T", "56", "30", ++ "FCC", "5G", "20M", "HT", "2T", "60", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "60", "30", ++ "MKK", "5G", "20M", "HT", "2T", "60", "30", ++ "FCC", "5G", "20M", "HT", "2T", "64", "26", ++ "ETSI", "5G", "20M", "HT", "2T", "64", "30", ++ "MKK", "5G", "20M", "HT", "2T", "64", "30", ++ "FCC", "5G", "20M", "HT", "2T", "100", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "100", "30", ++ "MKK", "5G", "20M", "HT", "2T", "100", "30", ++ "FCC", "5G", "20M", "HT", "2T", "114", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "114", "30", ++ "MKK", "5G", "20M", "HT", "2T", "114", "30", ++ "FCC", "5G", "20M", "HT", "2T", "108", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "108", "30", ++ "MKK", "5G", "20M", "HT", "2T", "108", "30", ++ "FCC", "5G", "20M", "HT", "2T", "112", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "112", "30", ++ "MKK", "5G", "20M", "HT", "2T", "112", "30", ++ "FCC", "5G", "20M", "HT", "2T", "116", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "116", "30", ++ "MKK", "5G", "20M", "HT", "2T", "116", "30", ++ "FCC", "5G", "20M", "HT", "2T", "120", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "120", "30", ++ "MKK", "5G", "20M", "HT", "2T", "120", "30", ++ "FCC", "5G", "20M", "HT", "2T", "124", "32", ++ "ETSI", "5G", "20M", "HT", "2T", "124", "30", ++ "MKK", "5G", "20M", "HT", "2T", "124", "30", ++ "FCC", "5G", "20M", "HT", "2T", "128", "30", ++ "ETSI", "5G", "20M", "HT", "2T", "128", "30", ++ "MKK", "5G", "20M", "HT", "2T", "128", "30", ++ "FCC", "5G", "20M", "HT", "2T", "132", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "132", "30", ++ "MKK", "5G", "20M", "HT", "2T", "132", "30", ++ "FCC", "5G", "20M", "HT", "2T", "136", "28", ++ "ETSI", "5G", "20M", "HT", "2T", "136", "30", ++ "MKK", "5G", "20M", "HT", "2T", "136", "30", ++ "FCC", "5G", "20M", "HT", "2T", "140", "26", ++ "ETSI", "5G", "20M", "HT", "2T", "140", "30", ++ "MKK", "5G", "20M", "HT", "2T", "140", "30", ++ "FCC", "5G", "20M", "HT", "2T", "149", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "149", "30", ++ "MKK", "5G", "20M", "HT", "2T", "149", "63", ++ "FCC", "5G", "20M", "HT", "2T", "153", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "153", "30", ++ "MKK", "5G", "20M", "HT", "2T", "153", "63", ++ "FCC", "5G", "20M", "HT", "2T", "157", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "157", "30", ++ "MKK", "5G", "20M", "HT", "2T", "157", "63", ++ "FCC", "5G", "20M", "HT", "2T", "161", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "161", "30", ++ "MKK", "5G", "20M", "HT", "2T", "161", "63", ++ "FCC", "5G", "20M", "HT", "2T", "165", "34", ++ "ETSI", "5G", "20M", "HT", "2T", "165", "30", ++ "MKK", "5G", "20M", "HT", "2T", "165", "63", ++ "FCC", "5G", "40M", "HT", "1T", "38", "30", ++ "ETSI", "5G", "40M", "HT", "1T", "38", "32", ++ "MKK", "5G", "40M", "HT", "1T", "38", "32", ++ "FCC", "5G", "40M", "HT", "1T", "46", "30", ++ "ETSI", "5G", "40M", "HT", "1T", "46", "32", ++ "MKK", "5G", "40M", "HT", "1T", "46", "32", ++ "FCC", "5G", "40M", "HT", "1T", "54", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "54", "32", ++ "MKK", "5G", "40M", "HT", "1T", "54", "32", ++ "FCC", "5G", "40M", "HT", "1T", "62", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "62", "32", ++ "MKK", "5G", "40M", "HT", "1T", "62", "32", ++ "FCC", "5G", "40M", "HT", "1T", "102", "28", ++ "ETSI", "5G", "40M", "HT", "1T", "102", "32", ++ "MKK", "5G", "40M", "HT", "1T", "102", "32", ++ "FCC", "5G", "40M", "HT", "1T", "110", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "110", "32", ++ "MKK", "5G", "40M", "HT", "1T", "110", "32", ++ "FCC", "5G", "40M", "HT", "1T", "118", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "118", "32", ++ "MKK", "5G", "40M", "HT", "1T", "118", "32", ++ "FCC", "5G", "40M", "HT", "1T", "126", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "126", "32", ++ "MKK", "5G", "40M", "HT", "1T", "126", "32", ++ "FCC", "5G", "40M", "HT", "1T", "134", "32", ++ "ETSI", "5G", "40M", "HT", "1T", "134", "32", ++ "MKK", "5G", "40M", "HT", "1T", "134", "32", ++ "FCC", "5G", "40M", "HT", "1T", "151", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "151", "32", ++ "MKK", "5G", "40M", "HT", "1T", "151", "63", ++ "FCC", "5G", "40M", "HT", "1T", "159", "34", ++ "ETSI", "5G", "40M", "HT", "1T", "159", "32", ++ "MKK", "5G", "40M", "HT", "1T", "159", "63", ++ "FCC", "5G", "40M", "HT", "2T", "38", "28", ++ "ETSI", "5G", "40M", "HT", "2T", "38", "30", ++ "MKK", "5G", "40M", "HT", "2T", "38", "30", ++ "FCC", "5G", "40M", "HT", "2T", "46", "28", ++ "ETSI", "5G", "40M", "HT", "2T", "46", "30", ++ "MKK", "5G", "40M", "HT", "2T", "46", "30", ++ "FCC", "5G", "40M", "HT", "2T", "54", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "54", "30", ++ "MKK", "5G", "40M", "HT", "2T", "54", "30", ++ "FCC", "5G", "40M", "HT", "2T", "62", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "62", "30", ++ "MKK", "5G", "40M", "HT", "2T", "62", "30", ++ "FCC", "5G", "40M", "HT", "2T", "102", "26", ++ "ETSI", "5G", "40M", "HT", "2T", "102", "30", ++ "MKK", "5G", "40M", "HT", "2T", "102", "30", ++ "FCC", "5G", "40M", "HT", "2T", "110", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "110", "30", ++ "MKK", "5G", "40M", "HT", "2T", "110", "30", ++ "FCC", "5G", "40M", "HT", "2T", "118", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "118", "30", ++ "MKK", "5G", "40M", "HT", "2T", "118", "30", ++ "FCC", "5G", "40M", "HT", "2T", "126", "32", ++ "ETSI", "5G", "40M", "HT", "2T", "126", "30", ++ "MKK", "5G", "40M", "HT", "2T", "126", "30", ++ "FCC", "5G", "40M", "HT", "2T", "134", "30", ++ "ETSI", "5G", "40M", "HT", "2T", "134", "30", ++ "MKK", "5G", "40M", "HT", "2T", "134", "30", ++ "FCC", "5G", "40M", "HT", "2T", "151", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "151", "30", ++ "MKK", "5G", "40M", "HT", "2T", "151", "63", ++ "FCC", "5G", "40M", "HT", "2T", "159", "34", ++ "ETSI", "5G", "40M", "HT", "2T", "159", "30", ++ "MKK", "5G", "40M", "HT", "2T", "159", "63", ++ "FCC", "5G", "80M", "VHT", "1T", "42", "30", ++ "ETSI", "5G", "80M", "VHT", "1T", "42", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "42", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "58", "28", ++ "ETSI", "5G", "80M", "VHT", "1T", "58", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "58", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "106", "30", ++ "ETSI", "5G", "80M", "VHT", "1T", "106", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "106", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "122", "34", ++ "ETSI", "5G", "80M", "VHT", "1T", "122", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "122", "32", ++ "FCC", "5G", "80M", "VHT", "1T", "155", "34", ++ "ETSI", "5G", "80M", "VHT", "1T", "155", "32", ++ "MKK", "5G", "80M", "VHT", "1T", "155", "63", ++ "FCC", "5G", "80M", "VHT", "2T", "42", "28", ++ "ETSI", "5G", "80M", "VHT", "2T", "42", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "42", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "58", "26", ++ "ETSI", "5G", "80M", "VHT", "2T", "58", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "58", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "106", "28", ++ "ETSI", "5G", "80M", "VHT", "2T", "106", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "106", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "122", "32", ++ "ETSI", "5G", "80M", "VHT", "2T", "122", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "122", "30", ++ "FCC", "5G", "80M", "VHT", "2T", "155", "34", ++ "ETSI", "5G", "80M", "VHT", "2T", "155", "30", ++ "MKK", "5G", "80M", "VHT", "2T", "155", "63" ++}; ++ ++void ++ODM_ReadAndConfig_MP_8188F_TXPWR_LMT( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u4Byte ArrayLen = sizeof(Array_MP_8188F_TXPWR_LMT)/sizeof(pu1Byte); ++ pu1Byte *Array = (pu1Byte *)Array_MP_8188F_TXPWR_LMT; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesReadPwrLmt = ArrayLen/7; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8188F_TXPWR_LMT\n")); ++ ++ for (i = 0; i < ArrayLen; i += 7) { ++ pu1Byte regulation = Array[i]; ++ pu1Byte band = Array[i+1]; ++ pu1Byte bandwidth = Array[i+2]; ++ pu1Byte rate = Array[i+3]; ++ pu1Byte rfPath = Array[i+4]; ++ pu1Byte chnl = Array[i+5]; ++ pu1Byte val = Array[i+6]; ++ ++ odm_ConfigBB_TXPWR_LMT_8188F(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ rsprintf((char *)pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", ++ regulation, band, bandwidth, rate, rfPath, chnl, val); ++#endif ++ } ++ ++} ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_rf.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_rf.h new file mode 100644 -index 000000000..417b3b856 +index 0000000..7bf5f48 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halhwimg8188f_rf.h @@ -0,0 +1,79 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+* You should have received a copy of the GNU General Public License along with -+* this program; if not, write to the Free Software Foundation, Inc., -+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+* -+* -+******************************************************************************/ -+ -+/*Image2HeaderVersion: 2.18*/ -+#if (RTL8188F_SUPPORT == 1) -+#ifndef __INC_MP_RF_HW_IMG_8188F_H -+#define __INC_MP_RF_HW_IMG_8188F_H -+ -+ -+/****************************************************************************** -+* RadioA.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_RadioA(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_RadioA(void); -+ -+/****************************************************************************** -+* TxPowerTrack_AP.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_TxPowerTrack_AP(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_TxPowerTrack_AP(void); -+ -+/****************************************************************************** -+* TxPowerTrack_SDIO.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_TxPowerTrack_SDIO(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_TxPowerTrack_SDIO(void); -+ -+/****************************************************************************** -+* TxPowerTrack_USB.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_TxPowerTrack_USB(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_TxPowerTrack_USB(void); -+ -+/****************************************************************************** -+* TXPWR_LMT.TXT -+******************************************************************************/ -+ -+void -+ODM_ReadAndConfig_MP_8188F_TXPWR_LMT(/* TC: Test Chip, MP: MP Chip*/ -+ IN PDM_ODM_T pDM_Odm -+); -+u4Byte ODM_GetVersion_MP_8188F_TXPWR_LMT(void); -+ -+#endif -+#endif /* end of HWIMG_SUPPORT*/ -+ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.18*/ ++#if (RTL8188F_SUPPORT == 1) ++#ifndef __INC_MP_RF_HW_IMG_8188F_H ++#define __INC_MP_RF_HW_IMG_8188F_H ++ ++ ++/****************************************************************************** ++* RadioA.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_RadioA(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_RadioA(void); ++ ++/****************************************************************************** ++* TxPowerTrack_AP.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_TxPowerTrack_AP(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_TxPowerTrack_AP(void); ++ ++/****************************************************************************** ++* TxPowerTrack_SDIO.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_TxPowerTrack_SDIO(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_TxPowerTrack_SDIO(void); ++ ++/****************************************************************************** ++* TxPowerTrack_USB.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_TxPowerTrack_USB(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_TxPowerTrack_USB(void); ++ ++/****************************************************************************** ++* TXPWR_LMT.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8188F_TXPWR_LMT(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8188F_TXPWR_LMT(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halphyrf_8188f.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halphyrf_8188f.c new file mode 100644 -index 000000000..3f9290a36 +index 0000000..3f9290a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halphyrf_8188f.c @@ -0,0 +1,3609 @@ @@ -236491,7 +260816,7 @@ index 000000000..3f9290a36 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halphyrf_8188f.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halphyrf_8188f.h new file mode 100644 -index 000000000..9d384b9c5 +index 0000000..9d384b9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/halphyrf_8188f.h @@ -0,0 +1,135 @@ @@ -236632,7 +260957,7 @@ index 000000000..9d384b9c5 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/mp_precomp.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/mp_precomp.h new file mode 100644 -index 000000000..4e376e797 +index 0000000..4e376e7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/mp_precomp.h @@ -0,0 +1,24 @@ @@ -236662,7 +260987,7 @@ index 000000000..4e376e797 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_regconfig8188f.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_regconfig8188f.c new file mode 100644 -index 000000000..e7c8716ce +index 0000000..e7c8716 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_regconfig8188f.c @@ -0,0 +1,233 @@ @@ -236901,7 +261226,7 @@ index 000000000..e7c8716ce + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_regconfig8188f.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_regconfig8188f.h new file mode 100644 -index 000000000..106e6ab90 +index 0000000..106e6ab --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_regconfig8188f.h @@ -0,0 +1,96 @@ @@ -237003,7 +261328,7 @@ index 000000000..106e6ab90 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_rtl8188f.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_rtl8188f.c new file mode 100644 -index 000000000..2fcbab4e4 +index 0000000..2fcbab4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_rtl8188f.c @@ -0,0 +1,72 @@ @@ -237081,7 +261406,7 @@ index 000000000..2fcbab4e4 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_rtl8188f.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_rtl8188f.h new file mode 100644 -index 000000000..714b78a09 +index 0000000..714b78a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/phydm_rtl8188f.h @@ -0,0 +1,29 @@ @@ -237116,5737 +261441,22834 @@ index 000000000..714b78a09 +#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/version_rtl8188f.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/version_rtl8188f.h new file mode 100644 -index 000000000..1e5130c20 +index 0000000..2c2217a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/rtl8188f/version_rtl8188f.h @@ -0,0 +1,10 @@ -+/*RTL8188F PHY Parameters*/ -+/* -+[Caution] -+ Since 01/Aug/2015, the commit rules will be simplified. -+ You do not need to fill up the version.h anymore, -+ only the maintenance supervisor fills it before formal release. -+*/ -+#define RELEASE_DATE_8188F 20151008 -+#define COMMIT_BY_8188F "BB_DAVID" -+#define RELEASE_VERSION_8188F 25 ++/*RTL8188F PHY Parameters*/ ++/* ++[Caution] ++ Since 01/Aug/2015, the commit rules will be simplified. ++ You do not need to fill up the version.h anymore, ++ only the maintenance supervisor fills it before formal release. ++*/ ++#define RELEASE_DATE_8188F 20151008 ++#define COMMIT_BY_8188F "BB_DAVID" ++#define RELEASE_VERSION_8188F 25 diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/halcomtxbf.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/halcomtxbf.c new file mode 100644 -index 000000000..427dad495 +index 0000000..426a193 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/halcomtxbf.c @@ -0,0 +1,551 @@ -+//============================================================ -+// Description: -+// -+// This file is for TXBF mechanism -+// -+//============================================================ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (BEAMFORMING_SUPPORT == 1) -+/*Beamforming halcomtxbf API create by YuChen 2015/05*/ -+ -+VOID -+halComTxbf_beamformInit( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8822B) -+ HalTxbf8822B_Init(pDM_Odm); -+} -+ -+/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ -+VOID -+halComTxbf_ConfigGtab( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8822B) -+ HalTxbf8822B_ConfigGtab(pDM_Odm); -+} -+ -+VOID -+phydm_beamformSetSoundingEnter( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_EnterWorkItem)) == FALSE) -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_EnterWorkItem)); -+#else -+ halComTxbf_EnterWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+phydm_beamformSetSoundingLeave( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_LeaveWorkItem)) == FALSE) -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_LeaveWorkItem)); -+#else -+ halComTxbf_LeaveWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+phydm_beamformSetSoundingRate( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_RateWorkItem)) == FALSE) -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_RateWorkItem)); -+#else -+ halComTxbf_RateWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+phydm_beamformSetSoundingStatus( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_StatusWorkItem)) == FALSE) -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_StatusWorkItem)); -+#else -+ halComTxbf_StatusWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+phydm_beamformSetSoundingFwNdpa( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (*pDM_Odm->pbFwDwRsvdPageInProgress) -+ ODM_SetTimer(pDM_Odm, &(pTxbfInfo->Txbf_FwNdpaTimer), 5); -+ else -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_FwNdpaWorkItem)); -+#else -+ halComTxbf_FwNdpaWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+phydm_beamformSetSoundingClk( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_ClkWorkItem)) == FALSE) -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_ClkWorkItem)); -+#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PADAPTER padapter = pDM_Odm->Adapter; -+ -+ rtw_run_in_thread_cmd(padapter, halComTxbf_ClkWorkItemCallback, padapter); -+#else -+ halComTxbf_ClkWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+phydm_beamformSetResetTxPath( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_ResetTxPathWorkItem)) == FALSE) -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_ResetTxPathWorkItem)); -+#else -+ halComTxbf_ResetTxPathWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+phydm_beamformSetGetTxRate( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_GetTxRateWorkItem)) == FALSE) -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_GetTxRateWorkItem)); -+#else -+ halComTxbf_GetTxRateWorkItemCallback(pDM_Odm); -+#endif -+} -+ -+VOID -+halComTxbf_EnterWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ u1Byte Idx = pTxbfInfo->TXBFIdx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) -+ HalTxbfJaguar_Enter(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8192E) -+ HalTxbf8192E_Enter(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ HalTxbf8814A_Enter(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8821B) -+ HalTxbf8821B_Enter(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8822B) -+ HalTxbf8822B_Enter(pDM_Odm, Idx); -+} -+ -+VOID -+halComTxbf_LeaveWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ u1Byte Idx = pTxbfInfo->TXBFIdx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) -+ HalTxbfJaguar_Leave(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8192E) -+ HalTxbf8192E_Leave(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ HalTxbf8814A_Leave(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8821B) -+ HalTxbf8821B_Leave(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8822B) -+ HalTxbf8822B_Leave(pDM_Odm, Idx); -+} -+ -+ -+VOID -+halComTxbf_FwNdpaWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ u1Byte Idx = pTxbfInfo->NdpaIdx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) -+ HalTxbfJaguar_FwTxBF(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8192E) -+ HalTxbf8192E_FwTxBF(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ HalTxbf8814A_FwTxBF(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8821B) -+ HalTxbf8821B_FwTxBF(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8822B) -+ HalTxbf8822B_FwTxBF(pDM_Odm, Idx); -+} -+ -+VOID -+halComTxbf_ClkWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8812) -+ HalTxbfJaguar_Clk_8812A(pDM_Odm); -+} -+ -+ -+ -+VOID -+halComTxbf_RateWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ u1Byte BW = pTxbfInfo->BW; -+ u1Byte Rate = pTxbfInfo->Rate; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8812) -+ HalTxbf8812A_setNDPArate(pDM_Odm, BW, Rate); -+ else if (pDM_Odm->SupportICType & ODM_RTL8192E) -+ HalTxbf8192E_setNDPArate(pDM_Odm, BW, Rate); -+ else if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ HalTxbf8814A_setNDPArate(pDM_Odm, BW, Rate); -+ -+} -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+halComTxbf_FwNdpaTimerCallback( -+ IN PRT_TIMER pTimer -+ ) -+{ -+ -+ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (*pDM_Odm->pbFwDwRsvdPageInProgress) -+ ODM_SetTimer(pDM_Odm, &(pTxbfInfo->Txbf_FwNdpaTimer), 5); -+ else -+ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_FwNdpaWorkItem)); -+} -+#endif -+ -+ -+VOID -+halComTxbf_StatusWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ u1Byte Idx = pTxbfInfo->TXBFIdx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) -+ HalTxbfJaguar_Status(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8192E) -+ HalTxbf8192E_Status(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ HalTxbf8814A_Status(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8821B) -+ HalTxbf8821B_Status(pDM_Odm, Idx); -+ else if (pDM_Odm->SupportICType & ODM_RTL8822B) -+ HalTxbf8822B_Status(pDM_Odm, Idx); -+} -+ -+VOID -+halComTxbf_ResetTxPathWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ u1Byte Idx = pTxbfInfo->TXBFIdx; -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ HalTxbf8814A_ResetTxPath(pDM_Odm, Idx); -+ -+} -+ -+VOID -+halComTxbf_GetTxRateWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#else -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#endif -+ -+ if (pDM_Odm->SupportICType & ODM_RTL8814A) -+ HalTxbf8814A_GetTxRate(pDM_Odm); -+} -+ -+ -+BOOLEAN -+HalComTxbf_Set( -+ IN PVOID pDM_VOID, -+ IN u1Byte setType, -+ IN PVOID pInBuf -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PBOOLEAN pBoolean=(PBOOLEAN)pInBuf; -+ pu1Byte pU1Tmp=(pu1Byte)pInBuf; -+ pu4Byte pU4Tmp=(pu4Byte)pInBuf; -+ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] setType = 0x%X\n", __func__, setType)); -+ -+ switch(setType){ -+ case TXBF_SET_SOUNDING_ENTER: -+ pTxbfInfo->TXBFIdx = *pU1Tmp; -+ phydm_beamformSetSoundingEnter(pDM_Odm); -+ break; -+ -+ case TXBF_SET_SOUNDING_LEAVE: -+ pTxbfInfo->TXBFIdx = *pU1Tmp; -+ phydm_beamformSetSoundingLeave(pDM_Odm); -+ break; -+ -+ case TXBF_SET_SOUNDING_RATE: -+ pTxbfInfo->BW = pU1Tmp[0]; -+ pTxbfInfo->Rate = pU1Tmp[1]; -+ phydm_beamformSetSoundingRate(pDM_Odm); -+ break; -+ -+ case TXBF_SET_SOUNDING_STATUS: -+ pTxbfInfo->TXBFIdx = *pU1Tmp; -+ phydm_beamformSetSoundingStatus(pDM_Odm); -+ break; -+ -+ case TXBF_SET_SOUNDING_FW_NDPA: -+ pTxbfInfo->NdpaIdx = *pU1Tmp; -+ phydm_beamformSetSoundingFwNdpa(pDM_Odm); -+ break; -+ -+ case TXBF_SET_SOUNDING_CLK: -+ phydm_beamformSetSoundingClk(pDM_Odm); -+ break; -+ -+ case TXBF_SET_TX_PATH_RESET: -+ pTxbfInfo->TXBFIdx = *pU1Tmp; -+ phydm_beamformSetResetTxPath(pDM_Odm); -+ break; -+ -+ case TXBF_SET_GET_TX_RATE: -+ phydm_beamformSetGetTxRate(pDM_Odm); -+ break; -+ -+ } -+ -+ return TRUE; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+BOOLEAN -+HalComTxbf_Get( -+ IN PADAPTER Adapter, -+ IN u1Byte getType, -+ OUT PVOID pOutBuf -+ ) -+{ -+ PHAL_DATA_TYPE pHalData=GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ PBOOLEAN pBoolean=(PBOOLEAN)pOutBuf; -+ ps4Byte pS4Tmp=(ps4Byte)pOutBuf; -+ pu4Byte pU4Tmp=(pu4Byte)pOutBuf; -+ pu1Byte pU1Tmp=(pu1Byte)pOutBuf; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (getType == TXBF_GET_EXPLICIT_BEAMFORMEE) { -+ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(Adapter)) -+ *pBoolean = FALSE; -+ else if (/*IS_HARDWARE_TYPE_8822B(Adapter) ||*/ -+ IS_HARDWARE_TYPE_8821B(Adapter) || -+ IS_HARDWARE_TYPE_8192E(Adapter) || -+ IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) -+ *pBoolean = TRUE; -+ else -+ *pBoolean = FALSE; -+ } else if (getType == TXBF_GET_EXPLICIT_BEAMFORMER) { -+ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(Adapter)) -+ *pBoolean = FALSE; -+ else if (/*IS_HARDWARE_TYPE_8822B(Adapter) ||*/ -+ IS_HARDWARE_TYPE_8821B(Adapter) || -+ IS_HARDWARE_TYPE_8192E(Adapter) || -+ IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) { -+ if(pHalData->RF_Type == RF_2T2R || pHalData->RF_Type == RF_3T3R) -+ *pBoolean = TRUE; -+ else -+ *pBoolean = FALSE; -+ } else -+ *pBoolean = FALSE; -+ } else if (getType == TXBF_GET_MU_MIMO_STA) { -+#if (RTL8822B_SUPPORT == 1) -+ if (/*pDM_Odm->SupportICType & (ODM_RTL8822B)*/ -+ IS_HARDWARE_TYPE_8822B(Adapter)) -+ *pBoolean = TRUE; -+ else -+#endif -+ *pBoolean = FALSE; -+ -+ -+ } else if (getType == TXBF_GET_MU_MIMO_AP) { -+#if (RTL8822B_SUPPORT == 1) -+ if (/*pDM_Odm->SupportICType & (ODM_RTL8822B)*/ -+ IS_HARDWARE_TYPE_8822B(Adapter)) -+ *pBoolean = TRUE; -+ else -+#endif -+ *pBoolean = FALSE; -+ } -+ -+ return TRUE; -+} -+#endif -+ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for TXBF mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++/*Beamforming halcomtxbf API create by YuChen 2015/05*/ ++ ++VOID ++halComTxbf_beamformInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Init(pDM_Odm); ++} ++ ++/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ ++VOID ++halComTxbf_ConfigGtab( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_ConfigGtab(pDM_Odm); ++} ++ ++VOID ++phydm_beamformSetSoundingEnter( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_EnterWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_EnterWorkItem)); ++#else ++ halComTxbf_EnterWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingLeave( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_LeaveWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_LeaveWorkItem)); ++#else ++ halComTxbf_LeaveWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingRate( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_RateWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_RateWorkItem)); ++#else ++ halComTxbf_RateWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingStatus( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_StatusWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_StatusWorkItem)); ++#else ++ halComTxbf_StatusWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingFwNdpa( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (*pDM_Odm->pbFwDwRsvdPageInProgress) ++ ODM_SetTimer(pDM_Odm, &(pTxbfInfo->Txbf_FwNdpaTimer), 5); ++ else ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_FwNdpaWorkItem)); ++#else ++ halComTxbf_FwNdpaWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingClk( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_ClkWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_ClkWorkItem)); ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER padapter = pDM_Odm->Adapter; ++ ++ rtw_run_in_thread_cmd(padapter, halComTxbf_ClkWorkItemCallback, padapter); ++#else ++ halComTxbf_ClkWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetResetTxPath( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_ResetTxPathWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_ResetTxPathWorkItem)); ++#else ++ halComTxbf_ResetTxPathWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetGetTxRate( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_GetTxRateWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_GetTxRateWorkItem)); ++#else ++ halComTxbf_GetTxRateWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++halComTxbf_EnterWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Enter(pDM_Odm, Idx); ++} ++ ++VOID ++halComTxbf_LeaveWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Leave(pDM_Odm, Idx); ++} ++ ++ ++VOID ++halComTxbf_FwNdpaWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ u1Byte Idx = pTxbfInfo->NdpaIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_FwTxBF(pDM_Odm, Idx); ++} ++ ++VOID ++halComTxbf_ClkWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8812) ++ HalTxbfJaguar_Clk_8812A(pDM_Odm); ++} ++ ++ ++ ++VOID ++halComTxbf_RateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ u1Byte BW = pTxbfInfo->BW; ++ u1Byte Rate = pTxbfInfo->Rate; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8812) ++ HalTxbf8812A_setNDPArate(pDM_Odm, BW, Rate); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_setNDPArate(pDM_Odm, BW, Rate); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_setNDPArate(pDM_Odm, BW, Rate); ++ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++halComTxbf_FwNdpaTimerCallback( ++ IN PRT_TIMER pTimer ++ ) ++{ ++ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (*pDM_Odm->pbFwDwRsvdPageInProgress) ++ ODM_SetTimer(pDM_Odm, &(pTxbfInfo->Txbf_FwNdpaTimer), 5); ++ else ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_FwNdpaWorkItem)); ++} ++#endif ++ ++ ++VOID ++halComTxbf_StatusWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Status(pDM_Odm, Idx); ++} ++ ++VOID ++halComTxbf_ResetTxPathWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_ResetTxPath(pDM_Odm, Idx); ++ ++} ++ ++VOID ++halComTxbf_GetTxRateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_GetTxRate(pDM_Odm); ++} ++ ++ ++BOOLEAN ++HalComTxbf_Set( ++ IN PVOID pDM_VOID, ++ IN u1Byte setType, ++ IN PVOID pInBuf ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PBOOLEAN pBoolean=(PBOOLEAN)pInBuf; ++ pu1Byte pU1Tmp=(pu1Byte)pInBuf; ++ pu4Byte pU4Tmp=(pu4Byte)pInBuf; ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] setType = 0x%X\n", __func__, setType)); ++ ++ switch(setType){ ++ case TXBF_SET_SOUNDING_ENTER: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetSoundingEnter(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_LEAVE: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetSoundingLeave(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_RATE: ++ pTxbfInfo->BW = pU1Tmp[0]; ++ pTxbfInfo->Rate = pU1Tmp[1]; ++ phydm_beamformSetSoundingRate(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_STATUS: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetSoundingStatus(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_FW_NDPA: ++ pTxbfInfo->NdpaIdx = *pU1Tmp; ++ phydm_beamformSetSoundingFwNdpa(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_CLK: ++ phydm_beamformSetSoundingClk(pDM_Odm); ++ break; ++ ++ case TXBF_SET_TX_PATH_RESET: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetResetTxPath(pDM_Odm); ++ break; ++ ++ case TXBF_SET_GET_TX_RATE: ++ phydm_beamformSetGetTxRate(pDM_Odm); ++ break; ++ ++ } ++ ++ return TRUE; ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++BOOLEAN ++HalComTxbf_Get( ++ IN PADAPTER Adapter, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ) ++{ ++ PHAL_DATA_TYPE pHalData=GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PBOOLEAN pBoolean=(PBOOLEAN)pOutBuf; ++ ps4Byte pS4Tmp=(ps4Byte)pOutBuf; ++ pu4Byte pU4Tmp=(pu4Byte)pOutBuf; ++ pu1Byte pU1Tmp=(pu1Byte)pOutBuf; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (getType == TXBF_GET_EXPLICIT_BEAMFORMEE) { ++ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(Adapter)) ++ *pBoolean = FALSE; ++ else if (/*IS_HARDWARE_TYPE_8822B(Adapter) ||*/ ++ IS_HARDWARE_TYPE_8821B(Adapter) || ++ IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) ++ *pBoolean = TRUE; ++ else ++ *pBoolean = FALSE; ++ } else if (getType == TXBF_GET_EXPLICIT_BEAMFORMER) { ++ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(Adapter)) ++ *pBoolean = FALSE; ++ else if (/*IS_HARDWARE_TYPE_8822B(Adapter) ||*/ ++ IS_HARDWARE_TYPE_8821B(Adapter) || ++ IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) { ++ if(pHalData->RF_Type == RF_2T2R || pHalData->RF_Type == RF_3T3R) ++ *pBoolean = TRUE; ++ else ++ *pBoolean = FALSE; ++ } else ++ *pBoolean = FALSE; ++ } else if (getType == TXBF_GET_MU_MIMO_STA) { ++#if (RTL8822B_SUPPORT == 1) ++ if (/*pDM_Odm->SupportICType & (ODM_RTL8822B)*/ ++ IS_HARDWARE_TYPE_8822B(Adapter)) ++ *pBoolean = TRUE; ++ else ++#endif ++ *pBoolean = FALSE; ++ ++ ++ } else if (getType == TXBF_GET_MU_MIMO_AP) { ++#if (RTL8822B_SUPPORT == 1) ++ if (/*pDM_Odm->SupportICType & (ODM_RTL8822B)*/ ++ IS_HARDWARE_TYPE_8822B(Adapter)) ++ *pBoolean = TRUE; ++ else ++#endif ++ *pBoolean = FALSE; ++ } ++ ++ return TRUE; ++} ++#endif ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/halcomtxbf.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/halcomtxbf.h new file mode 100644 -index 000000000..7be4efd17 +index 0000000..abb9d59 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/halcomtxbf.h @@ -0,0 +1,181 @@ -+#ifndef __HAL_COM_TXBF_H__ -+#define __HAL_COM_TXBF_H__ -+ -+/* -+typedef BOOLEAN -+(*TXBF_GET)( -+ IN PVOID pAdapter, -+ IN u1Byte getType, -+ OUT PVOID pOutBuf -+ ); -+ -+typedef BOOLEAN -+(*TXBF_SET)( -+ IN PVOID pAdapter, -+ IN u1Byte setType, -+ OUT PVOID pInBuf -+ ); -+*/ -+#define TxBF_Nr(a, b) ((a > b) ? (b) : (a)) -+ -+typedef enum _TXBF_SET_TYPE{ -+ TXBF_SET_SOUNDING_ENTER, -+ TXBF_SET_SOUNDING_LEAVE, -+ TXBF_SET_SOUNDING_RATE, -+ TXBF_SET_SOUNDING_STATUS, -+ TXBF_SET_SOUNDING_FW_NDPA, -+ TXBF_SET_SOUNDING_CLK, -+ TXBF_SET_TX_PATH_RESET, -+ TXBF_SET_GET_TX_RATE -+}TXBF_SET_TYPE,*PTXBF_SET_TYPE; -+ -+ -+typedef enum _TXBF_GET_TYPE{ -+ TXBF_GET_EXPLICIT_BEAMFORMEE, -+ TXBF_GET_EXPLICIT_BEAMFORMER, -+ TXBF_GET_MU_MIMO_STA, -+ TXBF_GET_MU_MIMO_AP -+}TXBF_GET_TYPE,*PTXBF_GET_TYPE; -+ -+ -+ -+//2 HAL TXBF related -+typedef struct _HAL_TXBF_INFO { -+ u1Byte TXBFIdx; -+ u1Byte NdpaIdx; -+ u1Byte BW; -+ u1Byte Rate; -+ -+ RT_TIMER Txbf_FwNdpaTimer; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_WORK_ITEM Txbf_EnterWorkItem; -+ RT_WORK_ITEM Txbf_LeaveWorkItem; -+ RT_WORK_ITEM Txbf_FwNdpaWorkItem; -+ RT_WORK_ITEM Txbf_ClkWorkItem; -+ RT_WORK_ITEM Txbf_StatusWorkItem; -+ RT_WORK_ITEM Txbf_RateWorkItem; -+ RT_WORK_ITEM Txbf_ResetTxPathWorkItem; -+ RT_WORK_ITEM Txbf_GetTxRateWorkItem; -+#endif -+ -+} HAL_TXBF_INFO, *PHAL_TXBF_INFO; -+ -+#if (BEAMFORMING_SUPPORT == 1) -+ -+VOID -+halComTxbf_beamformInit( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+halComTxbf_ConfigGtab( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+halComTxbf_EnterWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+VOID -+halComTxbf_LeaveWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+VOID -+halComTxbf_FwNdpaWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+VOID -+halComTxbf_ClkWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+VOID -+halComTxbf_ResetTxPathWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+VOID -+halComTxbf_GetTxRateWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+VOID -+halComTxbf_RateWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+VOID -+halComTxbf_FwNdpaTimerCallback( -+ IN PRT_TIMER pTimer -+ ); -+ -+VOID -+halComTxbf_StatusWorkItemCallback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN PADAPTER Adapter -+#else -+ IN PVOID pDM_VOID -+#endif -+ ); -+ -+BOOLEAN -+HalComTxbf_Set( -+ IN PVOID pDM_VOID, -+ IN u1Byte setType, -+ IN PVOID pInBuf -+ ); -+ -+BOOLEAN -+HalComTxbf_Get( -+ IN PADAPTER Adapter, -+ IN u1Byte getType, -+ OUT PVOID pOutBuf -+ ); -+ -+#else -+#define halComTxbf_beamformInit(pDM_VOID) NULL -+#define halComTxbf_ConfigGtab(pDM_VOID) NULL -+#define halComTxbf_EnterWorkItemCallback(_Adapter) NULL -+#define halComTxbf_LeaveWorkItemCallback(_Adapter) NULL -+#define halComTxbf_FwNdpaWorkItemCallback(_Adapter) NULL -+#define halComTxbf_ClkWorkItemCallback(_Adapter) NULL -+#define halComTxbf_RateWorkItemCallback(_Adapter) NULL -+#define halComTxbf_FwNdpaTimerCallback(_Adapter) NULL -+#define halComTxbf_StatusWorkItemCallback(_Adapter) NULL -+#define HalComTxbf_Get(_Adapter, _getType, _pOutBuf) -+ -+#endif -+ -+#endif // #ifndef __HAL_COM_TXBF_H__ -+ ++#ifndef __HAL_COM_TXBF_H__ ++#define __HAL_COM_TXBF_H__ ++ ++/* ++typedef BOOLEAN ++(*TXBF_GET)( ++ IN PVOID pAdapter, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ); ++ ++typedef BOOLEAN ++(*TXBF_SET)( ++ IN PVOID pAdapter, ++ IN u1Byte setType, ++ OUT PVOID pInBuf ++ ); ++*/ ++#define TxBF_Nr(a, b) ((a > b) ? (b) : (a)) ++ ++typedef enum _TXBF_SET_TYPE{ ++ TXBF_SET_SOUNDING_ENTER, ++ TXBF_SET_SOUNDING_LEAVE, ++ TXBF_SET_SOUNDING_RATE, ++ TXBF_SET_SOUNDING_STATUS, ++ TXBF_SET_SOUNDING_FW_NDPA, ++ TXBF_SET_SOUNDING_CLK, ++ TXBF_SET_TX_PATH_RESET, ++ TXBF_SET_GET_TX_RATE ++}TXBF_SET_TYPE,*PTXBF_SET_TYPE; ++ ++ ++typedef enum _TXBF_GET_TYPE{ ++ TXBF_GET_EXPLICIT_BEAMFORMEE, ++ TXBF_GET_EXPLICIT_BEAMFORMER, ++ TXBF_GET_MU_MIMO_STA, ++ TXBF_GET_MU_MIMO_AP ++}TXBF_GET_TYPE,*PTXBF_GET_TYPE; ++ ++ ++ ++//2 HAL TXBF related ++typedef struct _HAL_TXBF_INFO { ++ u1Byte TXBFIdx; ++ u1Byte NdpaIdx; ++ u1Byte BW; ++ u1Byte Rate; ++ ++ RT_TIMER Txbf_FwNdpaTimer; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_WORK_ITEM Txbf_EnterWorkItem; ++ RT_WORK_ITEM Txbf_LeaveWorkItem; ++ RT_WORK_ITEM Txbf_FwNdpaWorkItem; ++ RT_WORK_ITEM Txbf_ClkWorkItem; ++ RT_WORK_ITEM Txbf_StatusWorkItem; ++ RT_WORK_ITEM Txbf_RateWorkItem; ++ RT_WORK_ITEM Txbf_ResetTxPathWorkItem; ++ RT_WORK_ITEM Txbf_GetTxRateWorkItem; ++#endif ++ ++} HAL_TXBF_INFO, *PHAL_TXBF_INFO; ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ++VOID ++halComTxbf_beamformInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++halComTxbf_ConfigGtab( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++halComTxbf_EnterWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_LeaveWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_FwNdpaWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_ClkWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_ResetTxPathWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_GetTxRateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_RateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_FwNdpaTimerCallback( ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++halComTxbf_StatusWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++BOOLEAN ++HalComTxbf_Set( ++ IN PVOID pDM_VOID, ++ IN u1Byte setType, ++ IN PVOID pInBuf ++ ); ++ ++BOOLEAN ++HalComTxbf_Get( ++ IN PADAPTER Adapter, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ); ++ ++#else ++#define halComTxbf_beamformInit(pDM_VOID) NULL ++#define halComTxbf_ConfigGtab(pDM_VOID) NULL ++#define halComTxbf_EnterWorkItemCallback(_Adapter) NULL ++#define halComTxbf_LeaveWorkItemCallback(_Adapter) NULL ++#define halComTxbf_FwNdpaWorkItemCallback(_Adapter) NULL ++#define halComTxbf_ClkWorkItemCallback(_Adapter) NULL ++#define halComTxbf_RateWorkItemCallback(_Adapter) NULL ++#define halComTxbf_FwNdpaTimerCallback(_Adapter) NULL ++#define halComTxbf_StatusWorkItemCallback(_Adapter) NULL ++#define HalComTxbf_Get(_Adapter, _getType, _pOutBuf) ++ ++#endif ++ ++#endif // #ifndef __HAL_COM_TXBF_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8192e.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8192e.c new file mode 100644 -index 000000000..41a8bacf0 +index 0000000..754686b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8192e.c @@ -0,0 +1,392 @@ -+//============================================================ -+// Description: -+// -+// This file is for 8192E TXBF mechanism -+// -+//============================================================ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8192E_SUPPORT == 1) -+ -+VOID -+HalTxbf8192E_setNDPArate( -+ IN PVOID pDM_VOID, -+ IN u1Byte BW, -+ IN u1Byte Rate -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8192E, (Rate << 2 | BW)); -+ -+} -+ -+VOID -+halTxbf8192E_RfMode( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORMING_INFO pBeamInfo -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ BOOLEAN bSelfBeamformer = FALSE; -+ BOOLEAN bSelfBeamformee = FALSE; -+ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pDM_Odm->RFType == ODM_1T1R) -+ return; -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/ -+ -+ if (pBeamInfo->beamformee_su_cnt > 0) { -+ /*Path_A*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ -+ /*Path_B*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ -+ } else { -+ /*Path_A*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ -+ /*Path_B*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ -+ } -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/ -+ -+ if (pBeamInfo->beamformee_su_cnt > 0) { -+ ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x83321333); -+ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, bMaskByte3, 0xc1); -+ } else -+ ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x81121313); -+} -+ -+ -+ -+VOID -+halTxbf8192E_FwTxBFCmd( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Idx, Period0 = 0, Period1 = 0; -+ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u1Byte u1TxBFParm[3] = {0}; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ if (pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (Idx == 0) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) -+ PageNum0 = 0xFE; -+ else -+ PageNum0 = 0xFF; //stop sounding -+ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); -+ } else if (Idx == 1) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) -+ PageNum1 = 0xFE; -+ else -+ PageNum1 = 0xFF; //stop sounding -+ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); -+ } -+ } -+ } -+ -+ u1TxBFParm[0] = PageNum0; -+ u1TxBFParm[1] = PageNum1; -+ u1TxBFParm[2] = (Period1 << 4) | Period0; -+ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, -+ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); -+} -+ -+ -+VOID -+halTxbf8192E_DownloadNDPA( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; -+ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; -+ BOOLEAN bSendBeacon = FALSE; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; -+ /*default reseved 1 page for the IC type which is undefined.*/ -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *pDM_Odm->pbFwDwRsvdPageInProgress = TRUE; -+#endif -+ if (Idx == 0) -+ Head_Page = 0xFE; -+ else -+ Head_Page = 0xFE; -+ -+ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1); -+ ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp | BIT0)); -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2); -+ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422 & (~BIT6)); -+ -+ if (tmpReg422 & BIT6) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s There is an Adapter is sending beacon.\n", __func__)); -+ bSendBeacon = TRUE; -+ } -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, Head_Page); -+ -+ do { -+ /*Clear beacon valid check bit.*/ -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); -+ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2, (BcnValidReg | BIT0)); -+ -+ // download NDPA rsvd page. -+ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); -+ -+#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3); -+ count = 0; -+ while ((count < 20) && (u1bTmp & BIT4)) { -+ count++; -+ ODM_delay_us(10); -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3); -+ } -+ ODM_Write1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3, u1bTmp | BIT4); -+#endif -+ -+ /*check rsvd page download OK.*/ -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); -+ count = 0; -+ while (!(BcnValidReg & BIT0) && count < 20) { -+ count++; -+ ODM_delay_us(10); -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); -+ } -+ DLBcnCount++; -+ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); -+ -+ if (!(BcnValidReg & BIT0)) -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s Download RSVD page failed!\n", __func__)); -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, TxPageBndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ -+ /*the beacon cannot be sent by HW.*/ -+ /*2010.06.23. Added by tynli.*/ -+ if (bSendBeacon) -+ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422); -+ -+ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1); -+ ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp & (~BIT0))); -+ -+ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *pDM_Odm->pbFwDwRsvdPageInProgress = FALSE; -+#endif -+} -+ -+ -+VOID -+HalTxbf8192E_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte BFerBFeeIdx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; -+ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); -+ u4Byte CSI_Param; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ u2Byte STAid = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ halTxbf8192E_RfMode(pDM_Odm, pBeamformingInfo); -+ -+ if (pDM_Odm->RFType == ODM_2T2R) -+ ODM_Write4Byte(pDM_Odm, 0xd80, 0x00000000); /*Nc =2*/ -+ -+ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { -+ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; -+ -+ /*Sounding protocol control*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xCB); -+ -+ /*MAC address/Partial AID of Beamformer*/ -+ if (BFerIdx == 0) { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), BeamformerEntry.MacAddr[i]); -+ } else { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), BeamformerEntry.MacAddr[i]); -+ } -+ -+ /*CSI report parameters of Beamformer Default use Nc = 2*/ -+ CSI_Param = 0x03090309; -+ -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8192E, CSI_Param); -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8192E, CSI_Param); -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8192E, CSI_Param); -+ -+ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E+3, 0x50); -+ -+ } -+ -+ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ STAid = BeamformeeEntry.MacId; -+ else -+ STAid = BeamformeeEntry.P_AID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s], STAid=0x%X\n", __func__, STAid)); -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (BFeeIdx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, STAid); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3) | BIT4 | BIT6 | BIT7); -+ } else -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, STAid | BIT12 | BIT14 | BIT15); -+ -+ /*CSI report parameters of Beamformee*/ -+ if (BFeeIdx == 0) { -+ /*Get BIT24 & BIT25*/ -+ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3; -+ -+ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, STAid | BIT9); -+ } else { -+ /*Set BIT25*/ -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, STAid | 0xE200); -+ } -+ phydm_Beamforming_Notify(pDM_Odm); -+ -+ } -+} -+ -+ -+VOID -+HalTxbf8192E_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ halTxbf8192E_RfMode(pDM_Odm, pBeamInfo); -+ -+ /* Clear P_AID of Beamformee -+ * Clear MAC addresss of Beamformer -+ * Clear Associated Bfmee Sel -+ */ -+ if (pBeamInfo->BeamformCap == BEAMFORMING_CAP_NONE) -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xC8); -+ -+ if (Idx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, 0); -+ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0); -+ } else { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2) & 0xF000); -+ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60); -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d\n", __func__, Idx)); -+} -+ -+ -+VOID -+HalTxbf8192E_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte BeamCtrlVal; -+ u4Byte BeamCtrlReg; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ BeamCtrlVal = BeamformEntry.MacId; -+ else -+ BeamCtrlVal = BeamformEntry.P_AID; -+ -+ if (Idx == 0) -+ BeamCtrlReg = REG_TXBF_CTRL_8192E; -+ else { -+ BeamCtrlReg = REG_TXBF_CTRL_8192E+2; -+ BeamCtrlVal |= BIT12 | BIT14 | BIT15; -+ } -+ -+ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) -+ BeamCtrlVal |= BIT9; -+ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) -+ BeamCtrlVal |= BIT10; -+ } else -+ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); -+ -+ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d BeamCtrlReg %x BeamCtrlVal %x\n", __func__, Idx, BeamCtrlReg, BeamCtrlVal)); -+} -+ -+ -+VOID -+HalTxbf8192E_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ halTxbf8192E_DownloadNDPA(pDM_Odm, Idx); -+ -+ halTxbf8192E_FwTxBFCmd(pDM_Odm); -+} -+ -+#endif /* #if (RTL8192E_SUPPORT == 1)*/ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for 8192E TXBF mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8192E_SUPPORT == 1) ++ ++VOID ++HalTxbf8192E_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8192E, (Rate << 2 | BW)); ++ ++} ++ ++VOID ++halTxbf8192E_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ BOOLEAN bSelfBeamformer = FALSE; ++ BOOLEAN bSelfBeamformee = FALSE; ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ ++ } else { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ ++ } ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x83321333); ++ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, bMaskByte3, 0xc1); ++ } else ++ ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x81121313); ++} ++ ++ ++ ++VOID ++halTxbf8192E_FwTxBFCmd( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx, Period0 = 0, Period1 = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (Idx == 0) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum0 = 0xFE; ++ else ++ PageNum0 = 0xFF; //stop sounding ++ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (Idx == 1) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum1 = 0xFE; ++ else ++ PageNum1 = 0xFF; //stop sounding ++ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = (Period1 << 4) | Period0; ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ++ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); ++} ++ ++ ++VOID ++halTxbf8192E_DownloadNDPA( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ BOOLEAN bSendBeacon = FALSE; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; ++ /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = TRUE; ++#endif ++ if (Idx == 0) ++ Head_Page = 0xFE; ++ else ++ Head_Page = 0xFE; ++ ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp | BIT0)); ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2); ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s There is an Adapter is sending beacon.\n", __func__)); ++ bSendBeacon = TRUE; ++ } ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); ++ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2, (BcnValidReg | BIT0)); ++ ++ // download NDPA rsvd page. ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3); ++ count = 0; ++ while ((count < 20) && (u1bTmp & BIT4)) { ++ count++; ++ ODM_delay_us(10); ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3); ++ } ++ ODM_Write1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3, u1bTmp | BIT4); ++#endif ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); ++ count = 0; ++ while (!(BcnValidReg & BIT0) && count < 20) { ++ count++; ++ ODM_delay_us(10); ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = FALSE; ++#endif ++} ++ ++ ++VOID ++HalTxbf8192E_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u4Byte CSI_Param; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ halTxbf8192E_RfMode(pDM_Odm, pBeamformingInfo); ++ ++ if (pDM_Odm->RFType == ODM_2T2R) ++ ODM_Write4Byte(pDM_Odm, 0xd80, 0x00000000); /*Nc =2*/ ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xCB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), BeamformerEntry.MacAddr[i]); ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), BeamformerEntry.MacAddr[i]); ++ } ++ ++ /*CSI report parameters of Beamformer Default use Nc = 2*/ ++ CSI_Param = 0x03090309; ++ ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8192E, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8192E, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8192E, CSI_Param); ++ ++ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E+3, 0x50); ++ ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s], STAid=0x%X\n", __func__, STAid)); ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, STAid | BIT12 | BIT14 | BIT15); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, STAid | BIT9); ++ } else { ++ /*Set BIT25*/ ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, STAid | 0xE200); ++ } ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ } ++} ++ ++ ++VOID ++HalTxbf8192E_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ halTxbf8192E_RfMode(pDM_Odm, pBeamInfo); ++ ++ /* Clear P_AID of Beamformee ++ * Clear MAC addresss of Beamformer ++ * Clear Associated Bfmee Sel ++ */ ++ if (pBeamInfo->BeamformCap == BEAMFORMING_CAP_NONE) ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xC8); ++ ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, 0); ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2) & 0xF000); ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d\n", __func__, Idx)); ++} ++ ++ ++VOID ++HalTxbf8192E_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8192E; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8192E+2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= BIT10; ++ } else ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d BeamCtrlReg %x BeamCtrlVal %x\n", __func__, Idx, BeamCtrlReg, BeamCtrlVal)); ++} ++ ++ ++VOID ++HalTxbf8192E_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8192E_DownloadNDPA(pDM_Odm, Idx); ++ ++ halTxbf8192E_FwTxBFCmd(pDM_Odm); ++} ++ ++#endif /* #if (RTL8192E_SUPPORT == 1)*/ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8192e.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8192e.h new file mode 100644 -index 000000000..be70cc656 +index 0000000..406c2d6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8192e.h @@ -0,0 +1,52 @@ -+#ifndef __HAL_TXBF_8192E_H__ -+#define __HAL_TXBF_8192E_H__ -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8192E_SUPPORT == 1) -+VOID -+HalTxbf8192E_setNDPArate( -+ IN PVOID pDM_VOID, -+ IN u1Byte BW, -+ IN u1Byte Rate -+); -+ -+VOID -+HalTxbf8192E_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8192E_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8192E_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8192E_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+#else -+ -+#define HalTxbf8192E_setNDPArate(pDM_VOID, BW, Rate) -+#define HalTxbf8192E_Enter(pDM_VOID, Idx) -+#define HalTxbf8192E_Leave(pDM_VOID, Idx) -+#define HalTxbf8192E_Status(pDM_VOID, Idx) -+#define HalTxbf8192E_FwTxBF(pDM_VOID, Idx) -+ -+#endif -+ -+#endif -+ -+#endif -+ ++#ifndef __HAL_TXBF_8192E_H__ ++#define __HAL_TXBF_8192E_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8192E_SUPPORT == 1) ++VOID ++HalTxbf8192E_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++); ++ ++VOID ++HalTxbf8192E_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8192E_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8192E_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8192E_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++#else ++ ++#define HalTxbf8192E_setNDPArate(pDM_VOID, BW, Rate) ++#define HalTxbf8192E_Enter(pDM_VOID, Idx) ++#define HalTxbf8192E_Leave(pDM_VOID, Idx) ++#define HalTxbf8192E_Status(pDM_VOID, Idx) ++#define HalTxbf8192E_FwTxBF(pDM_VOID, Idx) ++ ++#endif ++ ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8814a.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8814a.c new file mode 100644 -index 000000000..8eb36d6b5 +index 0000000..d7e2545 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8814a.c @@ -0,0 +1,653 @@ -+//============================================================ -+// Description: -+// -+// This file is for 8814A TXBF mechanism -+// -+//============================================================ -+ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8814A_SUPPORT == 1) -+ -+VOID -+HalTxbf8814A_setNDPArate( -+ IN PVOID pDM_VOID, -+ IN u1Byte BW, -+ IN u1Byte Rate -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8814A, BW); -+ ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8814A, (u1Byte) Rate); -+ -+} -+ -+#define PHYDM_MEMORY_MAP_BUF_READ 0x8000 -+#define PHYDM_CTRL_INFO_PAGE 0x660 -+ -+VOID -+phydm_DataRate_8814A( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte macId, -+ OUT pu4Byte data, -+ IN u1Byte dataLen -+ ) -+{ -+ u1Byte i = 0; -+ u2Byte XReadDataAddr = 0; -+ -+ ODM_Write2Byte(pDM_Odm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE); -+ XReadDataAddr = PHYDM_MEMORY_MAP_BUF_READ + macId*32; /*Ctrl Info: 32Bytes for each macid(n)*/ -+ -+ if ((XReadDataAddr < PHYDM_MEMORY_MAP_BUF_READ) || (XReadDataAddr > 0x8FFF)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("XReadDataAddr(0x%x) is not correct!\n", XReadDataAddr)); -+ return; -+ } -+ -+ /* Read data */ -+ for (i = 0; i < dataLen; i++) -+ *(data+i) = ODM_Read2Byte(pDM_Odm, XReadDataAddr+i); -+ -+} -+ -+VOID -+HalTxbf8814A_GetTxRate( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pEntry; -+ u4Byte TxRptData = 0; -+ u1Byte DataRate = 0xFF; -+ -+ pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); -+ -+ phydm_DataRate_8814A(pDM_Odm, (u1Byte)pEntry->MacId, &TxRptData, 1); -+ DataRate = (u1Byte)TxRptData; -+ DataRate &= bMask7bits; /*Bit7 indicates SGI*/ -+ -+ pDM_Odm->TxBfDataRate = DataRate; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] pDM_Odm->TxBfDataRate = 0x%x\n", __func__, pDM_Odm->TxBfDataRate)); -+} -+ -+VOID -+HalTxbf8814A_ResetTxPath( -+ IN PVOID pDM_VOID, -+ IN u1Byte idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ u1Byte Nr_index = 0; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; -+ else -+ return; -+ -+ if ((pDM_Odm->LastUSBHub) != (*pDM_Odm->HubUsbMode)) { -+ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer); -+ -+ if (idx == 0) { -+ switch (Nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); -+ break; -+ -+ default: /*Nr>3, same as Case 3*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0); -+ break; -+ } -+ } else { -+ switch (Nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); -+ break; -+ -+ default: /*Nr>3, same as Case 3*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); -+ break; -+ } -+ } -+ -+ pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode; -+ } else -+ return; -+#endif -+} -+ -+ -+u1Byte -+halTxbf8814A_GetNtx( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Ntx = 0; -+ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { -+ if (*pDM_Odm->HubUsbMode == 2) {/*USB3.0*/ -+ if (pDM_Odm->RFType == ODM_4T4R) -+ Ntx = 3; -+ else if (pDM_Odm->RFType == ODM_3T3R) -+ Ntx = 2; -+ else -+ Ntx = 1; -+ } else if (*pDM_Odm->HubUsbMode == 1) /*USB 2.0 always 2Tx*/ -+ Ntx = 1; -+ else -+ Ntx = 1; -+ } else -+#endif -+ { -+ if (pDM_Odm->RFType == ODM_4T4R) -+ Ntx = 3; -+ else if (pDM_Odm->RFType == ODM_3T3R) -+ Ntx = 2; -+ else -+ Ntx = 1; -+ } -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Ntx = %d\n", __func__, Ntx)); -+ return Ntx; -+} -+ -+u1Byte -+halTxbf8814A_GetNrx( -+ IN PVOID pDM_VOID -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Nrx = 0; -+ -+ if (pDM_Odm->RFType == ODM_4T4R) -+ Nrx = 3; -+ else if (pDM_Odm->RFType == ODM_3T3R) -+ Nrx = 2; -+ else if (pDM_Odm->RFType == ODM_2T2R) -+ Nrx = 1; -+ else if (pDM_Odm->RFType == ODM_2T3R) -+ Nrx = 2; -+ else if (pDM_Odm->RFType == ODM_2T4R) -+ Nrx = 3; -+ else if (pDM_Odm->RFType == ODM_1T1R) -+ Nrx = 0; -+ else if (pDM_Odm->RFType == ODM_1T2R) -+ Nrx = 1; -+ else -+ Nrx = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Nrx = %d\n", __func__, Nrx)); -+ return Nrx; -+} -+ -+VOID -+halTxbf8814A_RfMode( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORMING_INFO pBeamformingInfo, -+ IN u1Byte idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i, Nr_index = 0; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; -+ else -+ return; -+ -+ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer); -+ -+ if (pDM_Odm->RFType == ODM_1T1R) -+ return; -+ -+ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { -+ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x1); -+ /*RF Mode table write enable*/ -+ } -+ -+ if (pBeamformingInfo->beamformee_su_cnt > 0) { -+ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { -+ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableAddr, 0xfffff, 0x18000); -+ /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData0, 0xfffff, 0xBE77F); -+ /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData1, 0xfffff, 0x226BF); -+ /*Enable TXIQGEN in RX mode*/ -+ } -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); -+ /*Enable TXIQGEN in RX mode*/ -+ } -+ -+ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { -+ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x0); -+ /*RF Mode table write disable*/ -+ } -+ -+ if (pBeamformingInfo->beamformee_su_cnt > 0) { -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode; -+#endif -+ -+ /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT28 | BIT29, 0x2); /*enable BB TxBF ant mapping register*/ -+ -+ if (idx == 0) { -+ switch (Nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); -+ break; -+ -+ default: /*Nr>3, same as Case 3*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0); -+ break; -+ } -+ } else { -+ switch (Nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); -+ break; -+ -+ default: /*Nr>3, same as Case 3*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); -+ break; -+ } -+ } -+ } -+ -+ if ((pBeamformingInfo->beamformee_su_cnt == 0) && (pBeamformingInfo->beamformer_su_cnt == 0)) { -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x932); /*set TxPath selection for 8814a BFer bug refine*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e9360); -+ } -+} -+#if 0 -+VOID -+halTxbf8814A_DownloadNDPA( -+ IN PADAPTER Adapter, -+ IN u1Byte Idx -+) -+{ -+ u1Byte u1bTmp = 0, tmpReg422 = 0; -+ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; -+ u2Byte Head_Page = 0x7FE; -+ BOOLEAN bSendBeacon = FALSE; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ -+ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ -+ pHalData->bFwDwRsvdPageInProgress = TRUE; -+ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1); -+ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp | BIT0)); -+ -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2); -+ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422 & (~BIT6)); -+ -+ if (tmpReg422 & BIT6) { -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n")); -+ bSendBeacon = TRUE; -+ } -+ -+ /*0x204[11:0] Beacon Head for TXDMA*/ -+ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page); -+ -+ do { -+ /*Clear beacon valid check bit.*/ -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); -+ PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7)); -+ -+ /*download NDPA rsvd page.*/ -+ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) -+ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); -+ else -+ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); -+ -+ /*check rsvd page download OK.*/ -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); -+ count = 0; -+ while (!(BcnValidReg & BIT7) && count < 20) { -+ count++; -+ delay_us(10); -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2); -+ } -+ DLBcnCount++; -+ } while (!(BcnValidReg & BIT7) && DLBcnCount < 5); -+ -+ if (!(BcnValidReg & BIT0)) -+ RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); -+ -+ /*0x204[11:0] Beacon Head for TXDMA*/ -+ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ -+ /*the beacon cannot be sent by HW.*/ -+ /*2010.06.23. Added by tynli.*/ -+ if (bSendBeacon) -+ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422); -+ -+ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1); -+ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp & (~BIT0))); -+ -+ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+ -+ pHalData->bFwDwRsvdPageInProgress = FALSE; -+} -+ -+VOID -+halTxbf8814A_FwTxBFCmd( -+ IN PADAPTER Adapter -+) -+{ -+ u1Byte Idx, Period = 0; -+ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u1Byte u1TxBFParm[3] = {0}; -+ -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); -+ -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) { -+ PageNum0 = 0xFE; -+ PageNum1 = 0x07; -+ Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); -+ } else if (PageNum0 == 0xFF) { -+ PageNum0 = 0xFF; /*stop sounding*/ -+ PageNum1 = 0x0F; -+ } -+ } -+ } -+ -+ u1TxBFParm[0] = PageNum0; -+ u1TxBFParm[1] = PageNum1; -+ u1TxBFParm[2] = Period; -+ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); -+ -+ RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x Period = %d", __func__, PageNum0, PageNum1, Period)); -+} -+#endif -+VOID -+HalTxbf8814A_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte BFerBFeeIdx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; -+ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ u2Byte STAid = 0, CSI_Param = 0; -+ u1Byte Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerIdx, BFeeIdx)); -+ ODM_SetMACReg(pDM_Odm, REG_SND_PTCL_CTRL_8814A, bMaskByte1 | bMaskByte2, 0x0202); -+ -+ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { -+ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; -+ /*Sounding protocol control*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xDB); -+ -+ /*MAC address/Partial AID of Beamformer*/ -+ if (BFerIdx == 0) { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), BeamformerEntry.MacAddr[i]); -+ } else { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), BeamformerEntry.MacAddr[i]); -+ } -+ -+ /*CSI report parameters of Beamformer*/ -+ Nc_index = halTxbf8814A_GetNrx(pDM_Odm); /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/ -+ Nr_index = BeamformerEntry.NumofSoundingDim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ -+ -+ grouping = 0; -+ -+ /*for ac = 1, for n = 3*/ -+ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) -+ codebookinfo = 1; -+ else if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT) -+ codebookinfo = 3; -+ -+ coefficientsize = 3; -+ -+ CSI_Param = (u2Byte)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (Nr_index << 3) | (Nc_index)); -+ -+ if (BFerIdx == 0) -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, CSI_Param); -+ else -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, CSI_Param); -+ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A + 3, 0x40); -+ -+ } -+ -+ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; -+ -+ halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ STAid = BeamformeeEntry.MacId; -+ else -+ STAid = BeamformeeEntry.P_AID; -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (BFeeIdx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, STAid); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7); -+ } else -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, STAid | BIT14 | BIT15 | BIT12); -+ -+ /*CSI report parameters of Beamformee*/ -+ if (BFeeIdx == 0) { -+ /*Get BIT24 & BIT25*/ -+ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3; -+ -+ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, STAid | BIT9); -+ } else -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, STAid | 0xE200); /*Set BIT25*/ -+ -+ phydm_Beamforming_Notify(pDM_Odm); -+ } -+ -+} -+ -+ -+VOID -+HalTxbf8814A_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ -+ if (Idx < BEAMFORMER_ENTRY_NUM) { -+ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; -+ } else -+ return; -+ -+ /*Clear P_AID of Beamformee*/ -+ /*Clear MAC address of Beamformer*/ -+ /*Clear Associated Bfmee Sel*/ -+ -+ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xD8); -+ if (Idx == 0) { -+ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, 0); -+ } else { -+ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0); -+ } -+ } -+ -+ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, Idx); -+ if (Idx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, 0x0); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0); -+ } else { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT14 | BIT15 | BIT12); -+ -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60); -+ } -+ } -+} -+ -+VOID -+HalTxbf8814A_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte BeamCtrlVal, tmpVal; -+ u4Byte BeamCtrlReg; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformEntry; -+ -+ if (Idx < BEAMFORMEE_ENTRY_NUM) -+ BeamformEntry = pBeamformingInfo->BeamformeeEntry[Idx]; -+ else -+ return; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ BeamCtrlVal = BeamformEntry.MacId; -+ else -+ BeamCtrlVal = BeamformEntry.P_AID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, BeamformEntry.BeamformEntryState)); -+ -+ if (Idx == 0) -+ BeamCtrlReg = REG_TXBF_CTRL_8814A; -+ else { -+ BeamCtrlReg = REG_TXBF_CTRL_8814A + 2; -+ BeamCtrlVal |= BIT12 | BIT14 | BIT15; -+ } -+ -+ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) -+ BeamCtrlVal |= BIT9; -+ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) -+ BeamCtrlVal |= (BIT9 | BIT10); -+ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) -+ BeamCtrlVal |= (BIT9 | BIT10 | BIT11); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__)); -+ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); -+ } -+ -+ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); -+ /*disable NDP packet use beamforming */ -+ tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8814A); -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, tmpVal | BIT15); -+ -+} -+ -+ -+ -+ -+ -+VOID -+HalTxbf8814A_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+#if 0 -+ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ -+ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ halTxbf8814A_DownloadNDPA(Adapter, Idx); -+ -+ halTxbf8814A_FwTxBFCmd(Adapter); -+#endif -+} -+ -+#endif /* (RTL8814A_SUPPORT == 1)*/ -+ -+#endif -+ ++//============================================================ ++// Description: ++// ++// This file is for 8814A TXBF mechanism ++// ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8814A_SUPPORT == 1) ++ ++VOID ++HalTxbf8814A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8814A, BW); ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8814A, (u1Byte) Rate); ++ ++} ++ ++#define PHYDM_MEMORY_MAP_BUF_READ 0x8000 ++#define PHYDM_CTRL_INFO_PAGE 0x660 ++ ++VOID ++phydm_DataRate_8814A( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte macId, ++ OUT pu4Byte data, ++ IN u1Byte dataLen ++ ) ++{ ++ u1Byte i = 0; ++ u2Byte XReadDataAddr = 0; ++ ++ ODM_Write2Byte(pDM_Odm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE); ++ XReadDataAddr = PHYDM_MEMORY_MAP_BUF_READ + macId*32; /*Ctrl Info: 32Bytes for each macid(n)*/ ++ ++ if ((XReadDataAddr < PHYDM_MEMORY_MAP_BUF_READ) || (XReadDataAddr > 0x8FFF)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("XReadDataAddr(0x%x) is not correct!\n", XReadDataAddr)); ++ return; ++ } ++ ++ /* Read data */ ++ for (i = 0; i < dataLen; i++) ++ *(data+i) = ODM_Read2Byte(pDM_Odm, XReadDataAddr+i); ++ ++} ++ ++VOID ++HalTxbf8814A_GetTxRate( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ u4Byte TxRptData = 0; ++ u1Byte DataRate = 0xFF; ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ phydm_DataRate_8814A(pDM_Odm, (u1Byte)pEntry->MacId, &TxRptData, 1); ++ DataRate = (u1Byte)TxRptData; ++ DataRate &= bMask7bits; /*Bit7 indicates SGI*/ ++ ++ pDM_Odm->TxBfDataRate = DataRate; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] pDM_Odm->TxBfDataRate = 0x%x\n", __func__, pDM_Odm->TxBfDataRate)); ++} ++ ++VOID ++HalTxbf8814A_ResetTxPath( ++ IN PVOID pDM_VOID, ++ IN u1Byte idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ u1Byte Nr_index = 0; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ if ((pDM_Odm->LastUSBHub) != (*pDM_Odm->HubUsbMode)) { ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer); ++ ++ if (idx == 0) { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } else { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } ++ ++ pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode; ++ } else ++ return; ++#endif ++} ++ ++ ++u1Byte ++halTxbf8814A_GetNtx( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Ntx = 0; ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (*pDM_Odm->HubUsbMode == 2) {/*USB3.0*/ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } else if (*pDM_Odm->HubUsbMode == 1) /*USB 2.0 always 2Tx*/ ++ Ntx = 1; ++ else ++ Ntx = 1; ++ } else ++#endif ++ { ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Ntx = %d\n", __func__, Ntx)); ++ return Ntx; ++} ++ ++u1Byte ++halTxbf8814A_GetNrx( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nrx = 0; ++ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T2R) ++ Nrx = 1; ++ else if (pDM_Odm->RFType == ODM_2T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_1T1R) ++ Nrx = 0; ++ else if (pDM_Odm->RFType == ODM_1T2R) ++ Nrx = 1; ++ else ++ Nrx = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Nrx = %d\n", __func__, Nrx)); ++ return Nrx; ++} ++ ++VOID ++halTxbf8814A_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamformingInfo, ++ IN u1Byte idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i, Nr_index = 0; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer); ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x1); ++ /*RF Mode table write enable*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_su_cnt > 0) { ++ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableAddr, 0xfffff, 0x18000); ++ /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData0, 0xfffff, 0xBE77F); ++ /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData1, 0xfffff, 0x226BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ++ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x0); ++ /*RF Mode table write disable*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_su_cnt > 0) { ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode; ++#endif ++ ++ /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT28 | BIT29, 0x2); /*enable BB TxBF ant mapping register*/ ++ ++ if (idx == 0) { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } else { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt == 0) && (pBeamformingInfo->beamformer_su_cnt == 0)) { ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x932); /*set TxPath selection for 8814a BFer bug refine*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e9360); ++ } ++} ++#if 0 ++VOID ++halTxbf8814A_DownloadNDPA( ++ IN PADAPTER Adapter, ++ IN u1Byte Idx ++) ++{ ++ u1Byte u1bTmp = 0, tmpReg422 = 0; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ u2Byte Head_Page = 0x7FE; ++ BOOLEAN bSendBeacon = FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ pHalData->bFwDwRsvdPageInProgress = TRUE; ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp | BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2); ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); ++ PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); ++ count = 0; ++ while (!(BcnValidReg & BIT7) && count < 20) { ++ count++; ++ delay_us(10); ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT7) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ ++ pHalData->bFwDwRsvdPageInProgress = FALSE; ++} ++ ++VOID ++halTxbf8814A_FwTxBFCmd( ++ IN PADAPTER Adapter ++) ++{ ++ u1Byte Idx, Period = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) { ++ PageNum0 = 0xFE; ++ PageNum1 = 0x07; ++ Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (PageNum0 == 0xFF) { ++ PageNum0 = 0xFF; /*stop sounding*/ ++ PageNum1 = 0x0F; ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = Period; ++ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x Period = %d", __func__, PageNum0, PageNum1, Period)); ++} ++#endif ++VOID ++HalTxbf8814A_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0, CSI_Param = 0; ++ u1Byte Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerIdx, BFeeIdx)); ++ ODM_SetMACReg(pDM_Odm, REG_SND_PTCL_CTRL_8814A, bMaskByte1 | bMaskByte2, 0x0202); ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xDB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), BeamformerEntry.MacAddr[i]); ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), BeamformerEntry.MacAddr[i]); ++ } ++ ++ /*CSI report parameters of Beamformer*/ ++ Nc_index = halTxbf8814A_GetNrx(pDM_Odm); /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/ ++ Nr_index = BeamformerEntry.NumofSoundingDim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ ++ ++ grouping = 0; ++ ++ /*for ac = 1, for n = 3*/ ++ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) ++ codebookinfo = 1; ++ else if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT) ++ codebookinfo = 3; ++ ++ coefficientsize = 3; ++ ++ CSI_Param = (u2Byte)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (Nr_index << 3) | (Nc_index)); ++ ++ if (BFerIdx == 0) ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, CSI_Param); ++ else ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, CSI_Param); ++ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A + 3, 0x40); ++ ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, STAid | BIT14 | BIT15 | BIT12); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, STAid | BIT9); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, STAid | 0xE200); /*Set BIT25*/ ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++ ++} ++ ++ ++VOID ++HalTxbf8814A_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xD8); ++ if (Idx == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0); ++ } ++ } ++ ++ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, Idx); ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, 0x0); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT14 | BIT15 | BIT12); ++ ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60); ++ } ++ } ++} ++ ++VOID ++HalTxbf8814A_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal, tmpVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry; ++ ++ if (Idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ else ++ return; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, BeamformEntry.BeamformEntryState)); ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8814A; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8814A + 2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= (BIT9 | BIT10); ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= (BIT9 | BIT10 | BIT11); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__)); ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ } ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++ /*disable NDP packet use beamforming */ ++ tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8814A); ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, tmpVal | BIT15); ++ ++} ++ ++ ++ ++ ++ ++VOID ++HalTxbf8814A_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++#if 0 ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8814A_DownloadNDPA(Adapter, Idx); ++ ++ halTxbf8814A_FwTxBFCmd(Adapter); ++#endif ++} ++ ++#endif /* (RTL8814A_SUPPORT == 1)*/ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8814a.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8814a.h new file mode 100644 -index 000000000..aac2b9308 +index 0000000..7efdc02 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8814a.h @@ -0,0 +1,70 @@ -+#ifndef __HAL_TXBF_8814A_H__ -+#define __HAL_TXBF_8814A_H__ -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8814A_SUPPORT == 1) -+VOID -+HalTxbf8814A_setNDPArate( -+ IN PVOID pDM_VOID, -+ IN u1Byte BW, -+ IN u1Byte Rate -+); -+ -+u1Byte -+halTxbf8814A_GetNtx( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+HalTxbf8814A_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8814A_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8814A_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+VOID -+HalTxbf8814A_ResetTxPath( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8814A_GetTxRate( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+HalTxbf8814A_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+#else -+ -+#define HalTxbf8814A_setNDPArate(pDM_VOID, BW, Rate) -+#define halTxbf8814A_GetNtx(pDM_VOID) 0 -+#define HalTxbf8814A_Enter(pDM_VOID, Idx) -+#define HalTxbf8814A_Leave(pDM_VOID, Idx) -+#define HalTxbf8814A_Status(pDM_VOID, Idx) -+#define HalTxbf8814A_ResetTxPath(pDM_VOID, Idx) -+#define HalTxbf8814A_GetTxRate(pDM_VOID) -+#define HalTxbf8814A_FwTxBF(pDM_VOID, Idx) -+#endif -+ -+#endif -+ -+#endif -+ ++#ifndef __HAL_TXBF_8814A_H__ ++#define __HAL_TXBF_8814A_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8814A_SUPPORT == 1) ++VOID ++HalTxbf8814A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++); ++ ++u1Byte ++halTxbf8814A_GetNtx( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8814A_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8814A_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8814A_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++VOID ++HalTxbf8814A_ResetTxPath( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8814A_GetTxRate( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8814A_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++#else ++ ++#define HalTxbf8814A_setNDPArate(pDM_VOID, BW, Rate) ++#define halTxbf8814A_GetNtx(pDM_VOID) 0 ++#define HalTxbf8814A_Enter(pDM_VOID, Idx) ++#define HalTxbf8814A_Leave(pDM_VOID, Idx) ++#define HalTxbf8814A_Status(pDM_VOID, Idx) ++#define HalTxbf8814A_ResetTxPath(pDM_VOID, Idx) ++#define HalTxbf8814A_GetTxRate(pDM_VOID) ++#define HalTxbf8814A_FwTxBF(pDM_VOID, Idx) ++#endif ++ ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8821b.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8821b.c new file mode 100644 -index 000000000..36ea38a16 +index 0000000..eff8e98 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8821b.c @@ -0,0 +1,400 @@ -+/*============================================================*/ -+/*Description:*/ -+/*This file is for 8812/8821/8811 TXBF mechanism*/ -+/*============================================================*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8821B_SUPPORT == 1) -+ -+VOID -+halTxbf8821B_RfMode( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORMING_INFO pBeamInfo -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->RFType == ODM_1T1R) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__)); -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ -+ -+ if (pBeamInfo->beamformee_su_cnt > 0) { -+ /*Path_A*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ -+ /*Path_B*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ -+ } else { -+ /*Path_A*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ -+ /*Path_B*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ -+ } -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ -+ -+ if (pBeamInfo->beamformee_su_cnt > 0) -+ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33); -+ else -+ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11); -+} -+ -+#if 0 -+VOID -+halTxbf8821B_DownloadNDPA( -+ IN PDM_ODM_T pDM_Odm, -+ IN u1Byte Idx -+) -+{ -+ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; -+ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; -+ BOOLEAN bSendBeacon = FALSE; -+ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/ -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ pHalData->bFwDwRsvdPageInProgress = TRUE; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (Idx == 0) -+ Head_Page = 0xFE; -+ else -+ Head_Page = 0xFE; -+ -+ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1); -+ ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp | BIT0)); -+ -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2); -+ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422 & (~BIT6)); -+ -+ if (tmpReg422 & BIT6) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n")); -+ bSendBeacon = TRUE; -+ } -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page); -+ -+ do { -+ /*Clear beacon valid check bit.*/ -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); -+ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0)); -+ -+ /*download NDPA rsvd page.*/ -+ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) -+ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); -+ else -+ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); -+ -+ /*check rsvd page download OK.*/ -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); -+ count = 0; -+ while (!(BcnValidReg & BIT0) && count < 20) { -+ count++; -+ ODM_delay_ms(10); -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); -+ } -+ DLBcnCount++; -+ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); -+ -+ if (!(BcnValidReg & BIT0)) -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__)); -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ -+ /*the beacon cannot be sent by HW.*/ -+ /*2010.06.23. Added by tynli.*/ -+ if (bSendBeacon) -+ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422); -+ -+ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1); -+ ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp & (~BIT0))); -+ -+ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+ -+ pHalData->bFwDwRsvdPageInProgress = FALSE; -+} -+ -+ -+VOID -+halTxbf8821B_FwTxBFCmd( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u1Byte Idx, Period0 = 0, Period1 = 0; -+ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u1Byte u1TxBFParm[3] = {0}; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ /*Modified by David*/ -+ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (Idx == 0) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) -+ PageNum0 = 0xFE; -+ else -+ PageNum0 = 0xFF; /*stop sounding*/ -+ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); -+ } else if (Idx == 1) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) -+ PageNum1 = 0xFE; -+ else -+ PageNum1 = 0xFF; /*stop sounding*/ -+ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); -+ } -+ } -+ } -+ -+ u1TxBFParm[0] = PageNum0; -+ u1TxBFParm[1] = PageNum1; -+ u1TxBFParm[2] = (Period1 << 4) | Period0; -+ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, -+ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); -+} -+ -+#endif -+VOID -+HalTxbf8821B_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte BFerBFeeIdx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; -+ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); -+ u4Byte CSI_Param; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ u2Byte STAid = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__)); -+ -+ halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo); -+ -+ if (pDM_Odm->RFType == ODM_2T2R) -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/ -+ else -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/ -+ -+ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { -+ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; -+ -+ /*Sounding protocol control*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xCB); -+ -+ /*MAC address/Partial AID of Beamformer*/ -+ if (BFerIdx == 0) { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]); -+ /*CSI report use legacy ofdm so don't need to fill P_AID. */ -+ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8821B+6, BeamformEntry.P_AID); */ -+ } else { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]); -+ /*CSI report use legacy ofdm so don't need to fill P_AID.*/ -+ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8821B+6, BeamformEntry.P_AID);*/ -+ } -+ -+ /*CSI report parameters of Beamformee*/ -+ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) { -+ if (pDM_Odm->RFType == ODM_2T2R) -+ CSI_Param = 0x01090109; -+ else -+ CSI_Param = 0x01080108; -+ } else { -+ if (pDM_Odm->RFType == ODM_2T2R) -+ CSI_Param = 0x03090309; -+ else -+ CSI_Param = 0x03080308; -+ } -+ -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, CSI_Param); -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, CSI_Param); -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, CSI_Param); -+ -+ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B + 3, 0x50); -+ } -+ -+ -+ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ STAid = BeamformeeEntry.MacId; -+ else -+ STAid = BeamformeeEntry.P_AID; -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (BFeeIdx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, STAid); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3) | BIT4 | BIT6 | BIT7); -+ } else -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, STAid | BIT12 | BIT14 | BIT15); -+ -+ /*CSI report parameters of Beamformee*/ -+ if (BFeeIdx == 0) { -+ /*Get BIT24 & BIT25*/ -+ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3; -+ -+ ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); -+ } else { -+ /*Set BIT25*/ -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200); -+ } -+ phydm_Beamforming_Notify(pDM_Odm); -+ } -+} -+ -+ -+VOID -+HalTxbf8821B_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ -+ if (Idx < BEAMFORMER_ENTRY_NUM) { -+ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; -+ } else -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx)); -+ -+ /*Clear P_AID of Beamformee*/ -+ /*Clear MAC address of Beamformer*/ -+ /*Clear Associated Bfmee Sel*/ -+ -+ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xC8); -+ if (Idx == 0) { -+ ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0); -+ } else { -+ ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0); -+ } -+ } -+ -+ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo); -+ if (Idx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, 0x0); -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0); -+ } else { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2) & 0xF000); -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60); -+ } -+ } -+ -+} -+ -+ -+VOID -+HalTxbf8821B_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte BeamCtrlVal; -+ u4Byte BeamCtrlReg; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ BeamCtrlVal = BeamformEntry.MacId; -+ else -+ BeamCtrlVal = BeamformEntry.P_AID; -+ -+ if (Idx == 0) -+ BeamCtrlReg = REG_TXBF_CTRL_8821B; -+ else { -+ BeamCtrlReg = REG_TXBF_CTRL_8821B + 2; -+ BeamCtrlVal |= BIT12 | BIT14 | BIT15; -+ } -+ -+ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) -+ BeamCtrlVal |= BIT9; -+ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) -+ BeamCtrlVal |= BIT10; -+ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) -+ BeamCtrlVal |= BIT11; -+ } else -+ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal)); -+ -+ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); -+} -+ -+ -+ -+VOID -+HalTxbf8821B_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+#if 0 -+ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ halTxbf8821B_DownloadNDPA(pDM_Odm, Idx); -+ -+ halTxbf8821B_FwTxBFCmd(pDM_Odm); -+#endif -+} -+ -+#endif -+ -+ -+#endif ++/*============================================================*/ ++/*Description:*/ ++/*This file is for 8812/8821/8811 TXBF mechanism*/ ++/*============================================================*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8821B_SUPPORT == 1) ++ ++VOID ++halTxbf8821B_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__)); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ } else { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ } ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33); ++ else ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11); ++} ++ ++#if 0 ++VOID ++halTxbf8821B_DownloadNDPA( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte Idx ++) ++{ ++ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ BOOLEAN bSendBeacon = FALSE; ++ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ pHalData->bFwDwRsvdPageInProgress = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (Idx == 0) ++ Head_Page = 0xFE; ++ else ++ Head_Page = 0xFE; ++ ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp | BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2); ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ count = 0; ++ while (!(BcnValidReg & BIT0) && count < 20) { ++ count++; ++ ODM_delay_ms(10); ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ ++ pHalData->bFwDwRsvdPageInProgress = FALSE; ++} ++ ++ ++VOID ++halTxbf8821B_FwTxBFCmd( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u1Byte Idx, Period0 = 0, Period1 = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ /*Modified by David*/ ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (Idx == 0) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum0 = 0xFE; ++ else ++ PageNum0 = 0xFF; /*stop sounding*/ ++ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (Idx == 1) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum1 = 0xFE; ++ else ++ PageNum1 = 0xFF; /*stop sounding*/ ++ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = (Period1 << 4) | Period0; ++ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ++ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); ++} ++ ++#endif ++VOID ++HalTxbf8821B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u4Byte CSI_Param; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__)); ++ ++ halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo); ++ ++ if (pDM_Odm->RFType == ODM_2T2R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/ ++ else ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/ ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xCB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID. */ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8821B+6, BeamformEntry.P_AID); */ ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID.*/ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8821B+6, BeamformEntry.P_AID);*/ ++ } ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x01090109; ++ else ++ CSI_Param = 0x01080108; ++ } else { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x03090309; ++ else ++ CSI_Param = 0x03080308; ++ } ++ ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, CSI_Param); ++ ++ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B + 3, 0x50); ++ } ++ ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, STAid | BIT12 | BIT14 | BIT15); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); ++ } else { ++ /*Set BIT25*/ ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200); ++ } ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++} ++ ++ ++VOID ++HalTxbf8821B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx)); ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xC8); ++ if (Idx == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0); ++ } ++ } ++ ++ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo); ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, 0x0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2) & 0xF000); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60); ++ } ++ } ++ ++} ++ ++ ++VOID ++HalTxbf8821B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8821B; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8821B + 2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= BIT10; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= BIT11; ++ } else ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal)); ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++} ++ ++ ++ ++VOID ++HalTxbf8821B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++#if 0 ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8821B_DownloadNDPA(pDM_Odm, Idx); ++ ++ halTxbf8821B_FwTxBFCmd(pDM_Odm); ++#endif ++} ++ ++#endif ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8821b.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8821b.h new file mode 100644 -index 000000000..3045cafe4 +index 0000000..c92d79a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8821b.h @@ -0,0 +1,43 @@ -+#ifndef __HAL_TXBF_8821B_H__ -+#define __HAL_TXBF_8821B_H__ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8821B_SUPPORT == 1) -+VOID -+HalTxbf8821B_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8821B_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8821B_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8821B_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+#else -+#define HalTxbf8821B_Enter(pDM_VOID, Idx) -+#define HalTxbf8821B_Leave(pDM_VOID, Idx) -+#define HalTxbf8821B_Status(pDM_VOID, Idx) -+#define HalTxbf8821B_FwTxBF(pDM_VOID, Idx) -+#endif -+ -+ -+#endif -+ -+#endif // #ifndef __HAL_TXBF_8821B_H__ -+ ++#ifndef __HAL_TXBF_8821B_H__ ++#define __HAL_TXBF_8821B_H__ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8821B_SUPPORT == 1) ++VOID ++HalTxbf8821B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8821B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8821B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8821B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++#else ++#define HalTxbf8821B_Enter(pDM_VOID, Idx) ++#define HalTxbf8821B_Leave(pDM_VOID, Idx) ++#define HalTxbf8821B_Status(pDM_VOID, Idx) ++#define HalTxbf8821B_FwTxBF(pDM_VOID, Idx) ++#endif ++ ++ ++#endif ++ ++#endif // #ifndef __HAL_TXBF_8821B_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8822b.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8822b.c new file mode 100644 -index 000000000..a5243d10c +index 0000000..caa18a9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8822b.c @@ -0,0 +1,1099 @@ -+/*============================================================*/ -+/* Description: */ -+/* */ -+/* This file is for 8814A TXBF mechanism */ -+/* */ -+/*============================================================*/ -+ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8822B_SUPPORT == 1) -+ -+#if 0 -+VOID -+HalTxbf8814A_GetBeamformcap( -+ IN PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = GET_BEAMFORM_INFO(Adapter); -+ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; -+ -+ BeamformCap = phydm_Beamforming_GetBeamCap(pDM_Odm, pBeamformingInfo); -+ -+ if (BeamformCap == pBeamformingInfo->BeamformCap) -+ return; -+ else -+ pBeamformingInfo->BeamformCap = BeamformCap; -+ -+} -+ -+VOID -+HalTxbf8814A_GetTxRate( -+ IN PADAPTER Adapter -+) -+{ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); -+ PRT_BEAMFORMEE_ENTRY pEntry; -+ u4Byte TxRptData = 0; -+ u1Byte DataRate = 0xFF; -+ -+ pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); -+ -+ ReadSdramData_8814A(Adapter, (u1Byte)pEntry->MacId, LOC_8814A_CTRL_INFO, &TxRptData, 1); -+ DataRate = (u1Byte)TxRptData; -+ DataRate &= bMask7bits; /*Bit7 indicates SGI*/ -+ -+ pDM_Odm->TxBfDataRate = DataRate; -+ -+} -+ -+VOID -+HalTxbf8814A_ResetTxPath( -+ IN PADAPTER Adapter, -+ IN u1Byte idx -+) -+{ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = GET_BEAMFORM_INFO(Adapter); -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ u1Byte Nr_index = 0; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; -+ else -+ return; -+ -+ if ((pDM_Odm->LastUSBHub) != (RT_GetHubUSBMode(Adapter))) { -+ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(Adapter), BeamformeeEntry.CompSteeringNumofBFer); -+ -+ if (idx == 0) { -+ switch (Nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0x6); /*1ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0x6); /*2ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x10); /*BC*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0x6); /*set TxPath selection for 8814a BFer bug refine*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x10); /*if Bfer enable, always use 3Tx for all Spatial stream*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x1060); -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0xe); /*1ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0xe); /*2ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x90); /*BCD*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT19|BIT18|BIT17|BIT16, 0xe); /*3ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0xff00000, 0x90); /*bcd*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xe); /*set TxPath selection for 8814a BFer bug refine*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x90); /*if Bfer enable, always use 3Tx for all Spatial stream*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x90e90e0); -+ break; -+ -+ default: /*Nr>3, same as Case 3*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0xf); /*1ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0xf); /*2ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x93); /*BC*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT19|BIT18|BIT17|BIT16, 0xf); /*3ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0xff00000, 0x93); /*bcd*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xf); /*set TxPath selection for 8814a BFer bug refine*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x93); /*if Bfer enable, always use 3Tx for all Spatial stream*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); -+ break; -+ } -+ } else { -+ switch (Nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0x6); /*1ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0x6); /*2ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x10); /*BC*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0x6); /*set TxPath selection for 8814a BFer bug refine*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x10); /*if Bfer enable, always use 3Tx for all Spatial stream*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x1060); -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0xe); /*1ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0xe); /*2ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x90); /*BC*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT19|BIT18|BIT17|BIT16, 0xe); /*3ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0xff00000, 0x90); /*bcd*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xe); /*set TxPath selection for 8814a BFer bug refine*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x90); /*if Bfer enable, always use 3Tx for all Spatial stream*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x90e90e0); -+ break; -+ -+ default: /*Nr>3, same as Case 3*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0xf); /*1ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0xf); /*2ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x93); /*BC*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT19|BIT18|BIT17|BIT16, 0xf); /*3ss*/ -+ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0xff00000, 0x93); /*bcd*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xf); /*set TxPath selection for 8814a BFer bug refine*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x93); /*if Bfer enable, always use 3Tx for all Spatial stream*/ -+ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); -+ break; -+ -+ } -+ } -+ -+ pDM_Odm->LastUSBHub = RT_GetHubUSBMode(Adapter); -+ } -+ else -+ return; -+#endif -+} -+#endif -+ -+u1Byte -+halTxbf8822B_GetNtx( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Ntx = 0; -+ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { -+ if (*pDM_Odm->HubUsbMode == 2) {/*USB3.0*/ -+ if (pDM_Odm->RFType == ODM_4T4R) -+ Ntx = 3; -+ else if (pDM_Odm->RFType == ODM_3T3R) -+ Ntx = 2; -+ else -+ Ntx = 1; -+ } else if (*pDM_Odm->HubUsbMode == 1) /*USB 2.0 always 2Tx*/ -+ Ntx = 1; -+ else -+ Ntx = 1; -+ } else -+#endif -+ { -+ if (pDM_Odm->RFType == ODM_4T4R) -+ Ntx = 3; -+ else if (pDM_Odm->RFType == ODM_3T3R) -+ Ntx = 2; -+ else -+ Ntx = 1; -+ } -+ -+ return Ntx; -+ -+} -+ -+u1Byte -+halTxbf8822B_GetNrx( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Nrx = 0; -+ -+ if (pDM_Odm->RFType == ODM_4T4R) -+ Nrx = 3; -+ else if (pDM_Odm->RFType == ODM_3T3R) -+ Nrx = 2; -+ else if (pDM_Odm->RFType == ODM_2T2R) -+ Nrx = 1; -+ else if (pDM_Odm->RFType == ODM_2T3R) -+ Nrx = 2; -+ else if (pDM_Odm->RFType == ODM_2T4R) -+ Nrx = 3; -+ else if (pDM_Odm->RFType == ODM_1T1R) -+ Nrx = 0; -+ else if (pDM_Odm->RFType == ODM_1T2R) -+ Nrx = 1; -+ else -+ Nrx = 0; -+ -+ return Nrx; -+ -+} -+ -+/***************SU & MU BFee Entry********************/ -+VOID -+halTxbf8822B_RfMode( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORMING_INFO pBeamformingInfo, -+ IN u1Byte idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i, Nr_index = 0; -+ BOOLEAN bSelfBeamformer = FALSE; -+ BOOLEAN bSelfBeamformee = FALSE; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; -+ else -+ return; -+ -+ if (pDM_Odm->RFType == ODM_1T1R) -+ return; -+ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { -+ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x1); -+ /*RF Mode table write enable*/ -+ } -+ -+ if ((pBeamformingInfo->beamformee_su_cnt > 0) || (pBeamformingInfo->beamformee_mu_cnt > 0)) { -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { -+ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableAddr, 0xfffff, 0x18000); -+ /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData0, 0xfffff, 0xBE77F); -+ /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData1, 0xfffff, 0x226BF); -+ /*Enable TXIQGEN in RX mode*/ -+ } -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); -+ /*Enable TXIQGEN in RX mode*/ -+ } -+ -+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { -+ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x0); -+ /*RF Mode table write disable*/ -+ } -+ -+ if (pBeamformingInfo->beamformee_su_cnt > 0) { -+ -+ /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT28|BIT29, 0x2); /*enable BB TxBF ant mapping register*/ -+ -+ if (idx == 0) { -+ /*Nsts = 2 AB*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, 0xffff, 0x0433); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); -+ /*ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430);*/ -+ -+ } else {/*IDX =1*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, 0xffff, 0x0433); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); -+ /*ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430;*/ -+ } -+ } else { -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x1); /*1SS by path-A*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430); /*2SS by path-A,B*/ -+ } -+ -+ if (pBeamformingInfo->beamformee_mu_cnt > 0) { -+ /*MU STAs share the common setting*/ -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT31, 1); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, 0xffff, 0x0433); -+ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); -+ } -+ -+} -+#if 0 -+VOID -+halTxbf8822B_DownloadNDPA( -+ IN PADAPTER Adapter, -+ IN u1Byte Idx -+ ) -+{ -+ u1Byte u1bTmp = 0, tmpReg422 = 0; -+ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; -+ u2Byte Head_Page = 0x7FE; -+ BOOLEAN bSendBeacon = FALSE; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ -+ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry+Idx; -+ -+ pHalData->bFwDwRsvdPageInProgress = TRUE; -+ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A+1); -+ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A+1, (u1bTmp|BIT0)); -+ -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2); -+ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422&(~BIT6)); -+ -+ if (tmpReg422 & BIT6) { -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n")); -+ bSendBeacon = TRUE; -+ } -+ -+ /*0x204[11:0] Beacon Head for TXDMA*/ -+ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page); -+ -+ do { -+ /*Clear beacon valid check bit.*/ -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1); -+ PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1, (BcnValidReg|BIT7)); -+ -+ /*download NDPA rsvd page.*/ -+ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) -+ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); -+ else -+ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); -+ -+ /*check rsvd page download OK.*/ -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); -+ count = 0; -+ while (!(BcnValidReg & BIT7) && count < 20) { -+ count++; -+ delay_us(10); -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+2); -+ } -+ DLBcnCount++; -+ } while (!(BcnValidReg & BIT7) && DLBcnCount < 5); -+ -+ if (!(BcnValidReg & BIT0)) -+ RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); -+ -+ /*0x204[11:0] Beacon Head for TXDMA*/ -+ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ -+ /*the beacon cannot be sent by HW.*/ -+ /*2010.06.23. Added by tynli.*/ -+ if (bSendBeacon) -+ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422); -+ -+ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A+1); -+ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A+1, (u1bTmp&(~BIT0))); -+ -+ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+ -+ pHalData->bFwDwRsvdPageInProgress = FALSE; -+} -+ -+VOID -+halTxbf8822B_FwTxBFCmd( -+ IN PADAPTER Adapter -+ ) -+{ -+ u1Byte Idx, Period = 0; -+ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u1Byte u1TxBFParm[3] = {0}; -+ -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); -+ -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) { -+ PageNum0 = 0xFE; -+ PageNum1 = 0x07; -+ Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); -+ } else if (PageNum0 == 0xFF) { -+ PageNum0 = 0xFF; /*stop sounding*/ -+ PageNum1 = 0x0F; -+ } -+ } -+ } -+ -+ u1TxBFParm[0] = PageNum0; -+ u1TxBFParm[1] = PageNum1; -+ u1TxBFParm[2] = Period; -+ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); -+ -+ RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x Period = %d", __func__, PageNum0, PageNum1, Period)); -+} -+#endif -+ -+VOID -+HalTxbf8822B_Init( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte u1bTmp; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ -+ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT16, 1); /*Enable P1 aggr new packet according to P0 transfer time*/ -+ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT15|BIT14|BIT13|BIT12, 1); /*MU Retry Limit*/ -+ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT7, 0); /*Disable Tx MU-MIMO until sounding done*/ -+ ODM_SetBBReg(pDM_Odm, 0x14c0 , 0x3F, 0); /* Clear validity of MU STAs */ -+ ODM_Write1Byte(pDM_Odm, 0x167c , 0x70); /*MU-MIMO Option as default value*/ -+ ODM_Write2Byte(pDM_Odm, 0x1680 , 0); /*MU-MIMO Control as default value*/ -+ -+ /* Set MU NDPA rate & BW source */ -+ /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, 0x42C); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B, (u1bTmp|BIT6)); -+ /* 0x45F[7:0] = 0x10 (Rate=OFDM_6M, BW20) */ -+ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B, 0x10); -+ -+ /* Init HW variable */ -+ pBeamformingInfo->RegMUTxCtrl = ODM_Read4Byte(pDM_Odm, 0x14c0); -+} -+ -+VOID -+HalTxbf8822B_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte BFerBFeeIdx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0)>>4; -+ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); -+ u2Byte CSI_Param = 0; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamformeeEntry; -+ PRT_BEAMFORMER_ENTRY pBeamformerEntry; -+ u2Byte value16, STAid = 0; -+ u1Byte Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; -+ u4Byte gid_valid, user_position_l, user_position_h; -+ u4Byte mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; -+ u1Byte u1bTmp; -+ u4Byte u4bTmp; -+ -+ RT_DISP(FBEAM, FBEAM_FUN, ("%s: BFerBFeeIdx=%d, BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerBFeeIdx, BFerIdx, BFeeIdx)); -+ -+ /*************SU BFer Entry Init*************/ -+ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { -+ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[BFerIdx]; -+ pBeamformerEntry->is_mu_ap = FALSE; -+ /*Sounding protocol control*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); -+ -+ -+ for (i = 0; i < MAX_BEAMFORMER_SU; i++) { -+ if ((pBeamformingInfo->beamformer_su_reg_maping & BIT(i)) == 0) { -+ pBeamformingInfo->beamformer_su_reg_maping |= BIT(i); -+ pBeamformerEntry->su_reg_index = i; -+ break; -+ } -+ } -+ -+ /*MAC address/Partial AID of Beamformer*/ -+ if (pBeamformerEntry->su_reg_index == 0) { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); -+ } else { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); -+ } -+ -+ /*CSI report parameters of Beamformer*/ -+ Nc_index = halTxbf8822B_GetNrx(pDM_Odm); /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/ -+ Nr_index = pBeamformerEntry->NumofSoundingDim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ -+ -+ grouping = 0; -+ -+ /*for ac = 1, for n = 3*/ -+ if (pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) -+ codebookinfo = 1; -+ else if (pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT) -+ codebookinfo = 3; -+ -+ coefficientsize = 3; -+ -+ CSI_Param = (u2Byte)((coefficientsize<<10)|(codebookinfo<<8)|(grouping<<6)|(Nr_index<<3)|(Nc_index)); -+ -+ if (BFerIdx == 0) -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B, CSI_Param); -+ else -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B+2, CSI_Param); -+ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A+3, 0x70); -+ -+ } -+ -+ /*************SU BFee Entry Init*************/ -+ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { -+ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[BFeeIdx]; -+ pBeamformeeEntry->is_mu_sta = FALSE; -+ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ STAid = pBeamformeeEntry->MacId; -+ else -+ STAid = pBeamformeeEntry->P_AID; -+ -+ for (i = 0; i < MAX_BEAMFORMEE_SU; i++) { -+ if ((pBeamformingInfo->beamformee_su_reg_maping & BIT(i)) == 0) { -+ pBeamformingInfo->beamformee_su_reg_maping |= BIT(i); -+ pBeamformeeEntry->su_reg_index = i; -+ break; -+ } -+ } -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (pBeamformeeEntry->su_reg_index == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, STAid); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3)|BIT4|BIT6|BIT7); -+ } else { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B+2, STAid | BIT14 | BIT15 | BIT12); -+ } -+ -+ /*CSI report parameters of Beamformee*/ -+ if (pBeamformeeEntry->su_reg_index == 0) { -+ /*Get BIT24 & BIT25*/ -+ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+3) & 0x3; -+ -+ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3, tmp | 0x60); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, STAid | BIT9); -+ } else -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2, STAid | 0xE200); /*Set BIT25*/ -+ -+ phydm_Beamforming_Notify(pDM_Odm); -+ } -+ -+ /*************MU BFer Entry Init*************/ -+ if ((pBeamformingInfo->beamformer_mu_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { -+ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[BFerIdx]; -+ pBeamformingInfo->mu_ap_index = BFerIdx; -+ pBeamformerEntry->is_mu_ap = TRUE; -+ for (i = 0; i < 8; i++) -+ pBeamformerEntry->gid_valid[i] = 0; -+ for (i = 0; i < 16; i++) -+ pBeamformerEntry->user_position[i] = 0; -+ -+ /*Sounding protocol control*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); -+ -+ /* MAC address */ -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); -+ -+ /* Set partial AID */ -+ ODM_Write2Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+6), pBeamformerEntry->P_AID); -+ -+ /* Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, 0x1680); -+ u1bTmp = (pBeamformerEntry->AID)&0xFFF; -+ ODM_Write1Byte(pDM_Odm, 0x1680, u1bTmp); -+ -+ /* Set 80us for leaving ndp_rx_standby_state */ -+ ODM_Write1Byte(pDM_Odm, 0x71B, 0x50); -+ -+ /* Set 0x6A0[14] = 1 to accept action_no_ack */ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1); -+ u1bTmp |= 0x40; -+ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1, u1bTmp); -+ /* Set 0x6A2[5:4] = 1 to NDPA and BF report poll */ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP1_8822B); -+ u1bTmp |= 0x30; -+ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP1_8822B, u1bTmp); -+ -+ /*CSI report parameters of Beamformer*/ -+ Nc_index = halTxbf8822B_GetNrx(pDM_Odm); /* Depend on RF type */ -+ Nr_index = 1; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ -+ grouping = 0; /*no grouping*/ -+ codebookinfo = 1; /*7 bit for psi, 9 bit for phi*/ -+ coefficientsize = 0; /*This is nothing really matter*/ -+ CSI_Param = (u2Byte)((coefficientsize<<10)|(codebookinfo<<8)|(grouping<<6)|(Nr_index<<3)|(Nc_index)); -+ ODM_Write2Byte(pDM_Odm, 0x6F4, CSI_Param); -+ -+ } -+ -+ /*************MU BFee Entry Init*************/ -+ if ((pBeamformingInfo->beamformee_mu_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { -+ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[BFeeIdx]; -+ pBeamformeeEntry->is_mu_sta = TRUE; -+ for (i = 0; i < MAX_BEAMFORMEE_MU; i++) { -+ if ((pBeamformingInfo->beamformee_mu_reg_maping & BIT(i)) == 0) { -+ pBeamformingInfo->beamformee_mu_reg_maping |= BIT(i); -+ pBeamformeeEntry->mu_reg_index = i; -+ break; -+ } -+ } -+ -+ if (pBeamformeeEntry->mu_reg_index == 0xFF) { -+ /* There is no valid bit in beamformee_mu_reg_maping */ -+ RT_DISP(FBEAM, FBEAM_FUN, ("%s: ERROR! There is no valid bit in beamformee_mu_reg_maping!\n", __func__)); -+ return; -+ } -+ -+ /*User position table*/ -+ switch (pBeamformeeEntry->mu_reg_index) { -+ case 0: -+ gid_valid = 0x7fe; -+ user_position_l = 0x111110; -+ user_position_h = 0x0; -+ break; -+ case 1: -+ gid_valid = 0x7f806; -+ user_position_l = 0x11000004; -+ user_position_h = 0x11; -+ break; -+ case 2: -+ gid_valid = 0x1f81818; -+ user_position_l = 0x400040; -+ user_position_h = 0x11100; -+ break; -+ case 3: -+ gid_valid = 0x1e186060; -+ user_position_l = 0x4000400; -+ user_position_h = 0x1100040; -+ break; -+ case 4: -+ gid_valid = 0x66618180; -+ user_position_l = 0x40004000; -+ user_position_h = 0x10040400; -+ break; -+ case 5: -+ gid_valid = 0x79860600; -+ user_position_l = 0x40000; -+ user_position_h = 0x4404004; -+ break; -+ } -+ -+ for (i = 0; i < 8; i++) { -+ if (i < 4) { -+ pBeamformeeEntry->gid_valid[i] = (u1Byte)(gid_valid & 0xFF); -+ gid_valid = (gid_valid >> 8); -+ } else -+ pBeamformeeEntry->gid_valid[i] = 0; -+ } -+ for (i = 0; i < 16; i++) { -+ if (i < 4) { -+ pBeamformeeEntry->user_position[i] = (u1Byte)(user_position_l & 0xFF); -+ user_position_l = user_position_l >> 8; -+ } else if (i < 8) { -+ pBeamformeeEntry->user_position[i] = (u1Byte)(user_position_h & 0xFF); -+ user_position_h = user_position_h >> 8; -+ } else -+ pBeamformeeEntry->user_position[i] = 0; -+ } -+ -+ /*Sounding protocol control*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); -+ -+ /*select MU STA table*/ -+ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); -+ pBeamformingInfo->RegMUTxCtrl |= (pBeamformeeEntry->mu_reg_index << 8)&(BIT8|BIT9|BIT10); -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ -+ ODM_SetBBReg(pDM_Odm, 0x14c4 , bMaskDWord, 0); /*Reset gid_valid table*/ -+ ODM_SetBBReg(pDM_Odm, 0x14c8 , bMaskDWord, user_position_l); -+ ODM_SetBBReg(pDM_Odm, 0x14cc , bMaskDWord, user_position_h); -+ -+ /*set validity of MU STAs*/ -+ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; -+ pBeamformingInfo->RegMUTxCtrl |= pBeamformingInfo->beamformee_mu_reg_maping&0x3F; -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ -+ value16 = ODM_Read2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index]); -+ value16 &= 0xFE00; /*Clear PAID*/ -+ value16 |= BIT9; /*Enable MU BFee*/ -+ value16 |= pBeamformeeEntry->P_AID; -+ ODM_Write2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index] , value16); -+ -+ /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3); -+ u1bTmp |= 0xD0; /* Set bit 28, 30, 31 to 3b'111*/ -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, u1bTmp); -+ /* Set NDPA to 6M*/ -+ ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8822B, 0x4); /* 6M */ -+ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B); -+ u1bTmp &= 0xFC; /* Clear bit 0, 1*/ -+ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B, u1bTmp); -+ -+ u4bTmp = ODM_Read4Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B); -+ u4bTmp = ((u4bTmp & 0xFF0000FF) | 0x020200); /* Set [23:8] to 0x0202 */ -+ ODM_Write4Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, u4bTmp); -+ -+ /* Set 0x6A0[14] = 1 to accept action_no_ack */ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1); -+ u1bTmp |= 0x40; -+ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1, u1bTmp); -+ /* End of MAC registers setting */ -+ -+ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); -+#if (SUPPORT_MU_BF == 1) -+ /*Special for plugfest*/ -+ delay_ms(50); /* wait for 4-way handshake ending*/ -+ SendSWVHTGIDMgntFrame(pDM_Odm, pBeamformeeEntry->MacAddr, BFeeIdx); -+#endif -+ -+ phydm_Beamforming_Notify(pDM_Odm); -+ -+ } -+ -+} -+ -+ -+VOID -+HalTxbf8822B_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMER_ENTRY pBeamformerEntry; -+ PRT_BEAMFORMEE_ENTRY pBeamformeeEntry; -+ u4Byte mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; -+ -+ if (Idx < BEAMFORMER_ENTRY_NUM) { -+ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[Idx]; -+ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[Idx]; -+ } else -+ return; -+ -+ /*Clear P_AID of Beamformee*/ -+ /*Clear MAC address of Beamformer*/ -+ /*Clear Associated Bfmee Sel*/ -+ -+ if (pBeamformerEntry->BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xD8); -+ if (pBeamformerEntry->is_mu_ap == 0) { /*SU BFer */ -+ if (pBeamformerEntry->su_reg_index == 0) { -+ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8822B, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8822B+4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B, 0); -+ } else { -+ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8822B, 0); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8822B+4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B+2, 0); -+ } -+ pBeamformingInfo->beamformer_su_reg_maping &= ~(BIT(pBeamformerEntry->su_reg_index)); -+ pBeamformerEntry->su_reg_index = 0xFF; -+ } else { /*MU BFer */ -+ /*set validity of MU STA0 and MU STA1*/ -+ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ -+ ODM_Memory_Set(pDM_Odm, pBeamformerEntry->gid_valid, 0, 8); -+ ODM_Memory_Set(pDM_Odm, pBeamformerEntry->user_position, 0, 16); -+ pBeamformerEntry->is_mu_ap = FALSE; -+ } -+ } -+ -+ if (pBeamformeeEntry->BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, Idx); -+ if (pBeamformeeEntry->is_mu_sta == 0) { /*SU BFee*/ -+ if (pBeamformeeEntry->su_reg_index == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, 0x0); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3)|BIT4|BIT6|BIT7); -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, 0); -+ } else { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B+2, 0x0 | BIT14 | BIT15 | BIT12); -+ -+ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2, -+ ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2) & 0x60); -+ } -+ pBeamformingInfo->beamformee_su_reg_maping &= ~(BIT(pBeamformeeEntry->su_reg_index)); -+ pBeamformeeEntry->su_reg_index = 0xFF; -+ } else { /*MU BFee */ -+ /*Disable sending NDPA & BF-rpt-poll to this BFee*/ -+ ODM_Write2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index] , 0); -+ /*set validity of MU STA*/ -+ pBeamformingInfo->RegMUTxCtrl &= ~(BIT(pBeamformeeEntry->mu_reg_index)); -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ -+ -+ pBeamformeeEntry->is_mu_sta = FALSE; -+ pBeamformingInfo->beamformee_mu_reg_maping &= ~(BIT(pBeamformeeEntry->mu_reg_index)); -+ pBeamformeeEntry->mu_reg_index = 0xFF; -+ } -+ } -+} -+ -+ -+/***********SU & MU BFee Entry Only when souding done****************/ -+VOID -+HalTxbf8822B_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte BeamCtrlVal, tmpVal; -+ u4Byte BeamCtrlReg; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry; -+ BOOLEAN is_mu_sounding = pBeamformingInfo->is_mu_sounding, is_bitmap_ready = FALSE; -+ u16 bitmap; -+ u8 idx, gid, i; -+ u8 id1, id0; -+ u32 gid_valid[6] = {0}; -+ u32 user_position_lsb[6] = {0}; -+ u32 user_position_msb[6] = {0}; -+ u32 value32; -+ -+ if (Idx < BEAMFORMEE_ENTRY_NUM) -+ pBeamformEntry = &pBeamformingInfo->BeamformeeEntry[Idx]; -+ else -+ return; -+ -+ /*SU sounding done */ -+ if (is_mu_sounding == FALSE) { -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ BeamCtrlVal = pBeamformEntry->MacId; -+ else -+ BeamCtrlVal = pBeamformEntry->P_AID; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, pBeamformEntry->BeamformEntryState)); -+ -+ if (pBeamformEntry->su_reg_index == 0) { -+ BeamCtrlReg = REG_TXBF_CTRL_8822B; -+ } else { -+ BeamCtrlReg = REG_TXBF_CTRL_8822B+2; -+ BeamCtrlVal |= BIT12|BIT14|BIT15; -+ } -+ -+ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_20) -+ BeamCtrlVal |= BIT9; -+ else if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_40) -+ BeamCtrlVal |= (BIT9|BIT10); -+ else if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_80) -+ BeamCtrlVal |= (BIT9|BIT10|BIT11); -+ } else { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__)); -+ BeamCtrlVal &= ~(BIT9|BIT10|BIT11); -+ } -+ -+ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); -+ /*disable NDP packet use beamforming */ -+ tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8822B); -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, tmpVal|BIT15); -+ } else { -+ /*MU sounding done */ -+ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ /*value32 = ODM_GetBBReg(pDM_Odm, 0xF4C, 0xFFFF0000);*/ -+ value32 = 1; -+ -+ is_bitmap_ready = (BOOLEAN)((value32 & BIT15) >> 15); -+ bitmap = (u16)(value32 & 0x3FFF); -+ -+ for (idx = 0; idx < 15; idx++) { -+ if (idx < 5) {/*bit0~4*/ -+ id0 = 0; -+ id1 = (u8)(idx + 1); -+ } else if (idx < 9) { /*bit5~8*/ -+ id0 = 1; -+ id1 = (u8)(idx - 3); -+ } else if (idx < 12) { /*bit9~11*/ -+ id0 = 2; -+ id1 = (u8)(idx - 6); -+ } else if (idx < 14) { /*bit12~13*/ -+ id0 = 3; -+ id1 = (u8)(idx - 8); -+ } else { /*bit14*/ -+ id0 = 4; -+ id1 = (u8)(idx - 9); -+ } -+ if (bitmap & BIT(idx)) { -+ /*Pair 1*/ -+ gid = (idx << 1) + 1; -+ gid_valid[id0] |= (BIT(gid)); -+ gid_valid[id1] |= (BIT(gid)); -+ /*Pair 2*/ -+ gid += 1; -+ gid_valid[id0] |= (BIT(gid)); -+ gid_valid[id1] |= (BIT(gid)); -+ } else { -+ /*Pair 1*/ -+ gid = (idx << 1) + 1; -+ gid_valid[id0] &= ~(BIT(gid)); -+ gid_valid[id1] &= ~(BIT(gid)); -+ /*Pair 2*/ -+ gid += 1; -+ gid_valid[id0] &= ~(BIT(gid)); -+ gid_valid[id1] &= ~(BIT(gid)); -+ } -+ } -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ pBeamformEntry = &pBeamformingInfo->BeamformeeEntry[i]; -+ if ((pBeamformEntry->is_mu_sta) && (pBeamformEntry->mu_reg_index < 6)) { -+ value32 = gid_valid[pBeamformEntry->mu_reg_index]; -+ for (idx = 0; idx < 4; idx++) { -+ pBeamformEntry->gid_valid[idx] = (u8)(value32 & 0xFF); -+ value32 = (value32 >> 8); -+ } -+ } -+ } -+ -+ for (idx = 0; idx < 6; idx++) { -+ pBeamformingInfo->RegMUTxCtrl |= ~(BIT8|BIT9|BIT10); -+ pBeamformingInfo->RegMUTxCtrl |= ((idx<<8)&(BIT8|BIT9|BIT10)); -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ ODM_SetMACReg(pDM_Odm, 0x14C4, bMaskDWord, gid_valid[idx]); /*set MU STA gid valid table*/ -+ } -+ -+ /*Enable TxMU PPDU*/ -+ pBeamformingInfo->RegMUTxCtrl |= BIT7; -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ } -+ } -+} -+ -+/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ -+VOID -+HalTxbf8822B_ConfigGtab( -+ IN PVOID pDM_VOID -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; -+ u4Byte gid_valid = 0, user_position_l = 0, user_position_h = 0, i; -+ -+ if (pBeamformingInfo->mu_ap_index < BEAMFORMER_ENTRY_NUM) -+ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[pBeamformingInfo->mu_ap_index]; -+ else -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s==>\n", __func__)); -+ -+ /*For GID 0~31*/ -+ for (i = 0; i < 4; i++) -+ gid_valid |= (pBeamformerEntry->gid_valid[i] << (i<<3)); -+ for (i = 0; i < 8; i++) { -+ if (i < 4) -+ user_position_l |= (pBeamformerEntry->user_position[i] << (i << 3)); -+ else -+ user_position_h |= (pBeamformerEntry->user_position[i] << ((i - 4)<<3)); -+ } -+ /*select MU STA0 table*/ -+ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ ODM_SetBBReg(pDM_Odm, 0x14c4, bMaskDWord, gid_valid); -+ ODM_SetBBReg(pDM_Odm, 0x14c8, bMaskDWord, user_position_l); -+ ODM_SetBBReg(pDM_Odm, 0x14cc, bMaskDWord, user_position_h); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", -+ __func__, gid_valid, user_position_l, user_position_h)); -+ -+ gid_valid = 0; -+ user_position_l = 0; -+ user_position_h = 0; -+ -+ /*For GID 32~64*/ -+ for (i = 4; i < 8; i++) -+ gid_valid |= (pBeamformerEntry->gid_valid[i] << ((i - 4)<<3)); -+ for (i = 8; i < 16; i++) { -+ if (i < 4) -+ user_position_l |= (pBeamformerEntry->user_position[i] << ((i - 8) << 3)); -+ else -+ user_position_h |= (pBeamformerEntry->user_position[i] << ((i - 12) << 3)); -+ } -+ /*select MU STA1 table*/ -+ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); -+ pBeamformingInfo->RegMUTxCtrl |= BIT8; -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ ODM_SetBBReg(pDM_Odm, 0x14c4, bMaskDWord, gid_valid); -+ ODM_SetBBReg(pDM_Odm, 0x14c8, bMaskDWord, user_position_l); -+ ODM_SetBBReg(pDM_Odm, 0x14cc, bMaskDWord, user_position_h); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", -+ __func__, gid_valid, user_position_l, user_position_h)); -+ -+ /* Set validity of MU STA0 and MU STA1*/ -+ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; -+ pBeamformingInfo->RegMUTxCtrl |= 0x3; /* STA0, STA1*/ -+ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); -+ -+} -+ -+ -+ -+#if 0 -+/*This function translate the bitmap to GTAB*/ -+VOID -+haltxbf8822b_gtab_translation( -+ IN PDM_ODM_T pDM_Odm -+) -+{ -+ u8 idx, gid; -+ u8 id1, id0; -+ u32 gid_valid[6] = {0}; -+ u32 user_position_lsb[6] = {0}; -+ u32 user_position_msb[6] = {0}; -+ -+ for (idx = 0; idx < 15; idx++) { -+ if (idx < 5) {/*bit0~4*/ -+ id0 = 0; -+ id1 = (u8)(idx + 1); -+ } else if (idx < 9) { /*bit5~8*/ -+ id0 = 1; -+ id1 = (u8)(idx - 3); -+ } else if (idx < 12) { /*bit9~11*/ -+ id0 = 2; -+ id1 = (u8)(idx - 6); -+ } else if (idx < 14) { /*bit12~13*/ -+ id0 = 3; -+ id1 = (u8)(idx - 8); -+ } else { /*bit14*/ -+ id0 = 4; -+ id1 = (u8)(idx - 9); -+ } -+ -+ /*Pair 1*/ -+ gid = (idx << 1) + 1; -+ gid_valid[id0] |= (1 << gid); -+ gid_valid[id1] |= (1 << gid); -+ if (gid < 16) { -+ /*user_position_lsb[id0] |= (0 << (gid << 1));*/ -+ user_position_lsb[id1] |= (1 << (gid << 1)); -+ } else { -+ /*user_position_msb[id0] |= (0 << ((gid - 16) << 1));*/ -+ user_position_msb[id1] |= (1 << ((gid - 16) << 1)); -+ } -+ -+ /*Pair 2*/ -+ gid += 1; -+ gid_valid[id0] |= (1 << gid); -+ gid_valid[id1] |= (1 << gid); -+ if (gid < 16) { -+ user_position_lsb[id0] |= (1 << (gid << 1)); -+ /*user_position_lsb[id1] |= (0 << (gid << 1));*/ -+ } else { -+ user_position_msb[id0] |= (1 << ((gid - 16) << 1)); -+ /*user_position_msb[id1] |= (0 << ((gid - 16) << 1));*/ -+ } -+ -+ } -+ -+ -+ for (idx = 0; idx < 6; idx++) { -+ /*DbgPrint("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]); -+ DbgPrint("user_position[%d] = 0x%x %x\n", idx, user_position_msb[idx], user_position_lsb[idx]);*/ -+ } -+} -+#endif -+ -+VOID -+HalTxbf8822B_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ) -+{ -+#if 0 -+ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry+Idx; -+ -+ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ halTxbf8822B_DownloadNDPA(Adapter, Idx); -+ -+ halTxbf8822B_FwTxBFCmd(Adapter); -+#endif -+} -+ -+#else /* (RTL8822B_SUPPORT == 1)*/ -+ -+#endif /* (RTL8822B_SUPPORT == 1)*/ -+ -+#endif /*(BEAMFORMING_SUPPORT == 1)*/ -+ ++/*============================================================*/ ++/* Description: */ ++/* */ ++/* This file is for 8814A TXBF mechanism */ ++/* */ ++/*============================================================*/ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8822B_SUPPORT == 1) ++ ++#if 0 ++VOID ++HalTxbf8814A_GetBeamformcap( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = GET_BEAMFORM_INFO(Adapter); ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ ++ BeamformCap = phydm_Beamforming_GetBeamCap(pDM_Odm, pBeamformingInfo); ++ ++ if (BeamformCap == pBeamformingInfo->BeamformCap) ++ return; ++ else ++ pBeamformingInfo->BeamformCap = BeamformCap; ++ ++} ++ ++VOID ++HalTxbf8814A_GetTxRate( ++ IN PADAPTER Adapter ++) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ u4Byte TxRptData = 0; ++ u1Byte DataRate = 0xFF; ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ ReadSdramData_8814A(Adapter, (u1Byte)pEntry->MacId, LOC_8814A_CTRL_INFO, &TxRptData, 1); ++ DataRate = (u1Byte)TxRptData; ++ DataRate &= bMask7bits; /*Bit7 indicates SGI*/ ++ ++ pDM_Odm->TxBfDataRate = DataRate; ++ ++} ++ ++VOID ++HalTxbf8814A_ResetTxPath( ++ IN PADAPTER Adapter, ++ IN u1Byte idx ++) ++{ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = GET_BEAMFORM_INFO(Adapter); ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ u1Byte Nr_index = 0; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ if ((pDM_Odm->LastUSBHub) != (RT_GetHubUSBMode(Adapter))) { ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(Adapter), BeamformeeEntry.CompSteeringNumofBFer); ++ ++ if (idx == 0) { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0x6); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0x6); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x10); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0x6); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x10); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x1060); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0xe); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0xe); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x90); /*BCD*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT19|BIT18|BIT17|BIT16, 0xe); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0xff00000, 0x90); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xe); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x90); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x90e90e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0xf); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0xf); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x93); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT19|BIT18|BIT17|BIT16, 0xf); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0xff00000, 0x93); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xf); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x93); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } else { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0x6); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0x6); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x10); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0x6); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x10); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x1060); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0xe); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0xe); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x90); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT19|BIT18|BIT17|BIT16, 0xe); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0xff00000, 0x90); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xe); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x90); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x90e90e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0xf); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0xf); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x93); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT19|BIT18|BIT17|BIT16, 0xf); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0xff00000, 0x93); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xf); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x93); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ ++ } ++ } ++ ++ pDM_Odm->LastUSBHub = RT_GetHubUSBMode(Adapter); ++ } ++ else ++ return; ++#endif ++} ++#endif ++ ++u1Byte ++halTxbf8822B_GetNtx( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Ntx = 0; ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (*pDM_Odm->HubUsbMode == 2) {/*USB3.0*/ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } else if (*pDM_Odm->HubUsbMode == 1) /*USB 2.0 always 2Tx*/ ++ Ntx = 1; ++ else ++ Ntx = 1; ++ } else ++#endif ++ { ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } ++ ++ return Ntx; ++ ++} ++ ++u1Byte ++halTxbf8822B_GetNrx( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nrx = 0; ++ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T2R) ++ Nrx = 1; ++ else if (pDM_Odm->RFType == ODM_2T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_1T1R) ++ Nrx = 0; ++ else if (pDM_Odm->RFType == ODM_1T2R) ++ Nrx = 1; ++ else ++ Nrx = 0; ++ ++ return Nrx; ++ ++} ++ ++/***************SU & MU BFee Entry********************/ ++VOID ++halTxbf8822B_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamformingInfo, ++ IN u1Byte idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i, Nr_index = 0; ++ BOOLEAN bSelfBeamformer = FALSE; ++ BOOLEAN bSelfBeamformee = FALSE; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x1); ++ /*RF Mode table write enable*/ ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) || (pBeamformingInfo->beamformee_mu_cnt > 0)) { ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableAddr, 0xfffff, 0x18000); ++ /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData0, 0xfffff, 0xBE77F); ++ /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData1, 0xfffff, 0x226BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x0); ++ /*RF Mode table write disable*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_su_cnt > 0) { ++ ++ /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT28|BIT29, 0x2); /*enable BB TxBF ant mapping register*/ ++ ++ if (idx == 0) { ++ /*Nsts = 2 AB*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, 0xffff, 0x0433); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); ++ /*ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430);*/ ++ ++ } else {/*IDX =1*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, 0xffff, 0x0433); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); ++ /*ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430;*/ ++ } ++ } else { ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x1); /*1SS by path-A*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430); /*2SS by path-A,B*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_mu_cnt > 0) { ++ /*MU STAs share the common setting*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT31, 1); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, 0xffff, 0x0433); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); ++ } ++ ++} ++#if 0 ++VOID ++halTxbf8822B_DownloadNDPA( ++ IN PADAPTER Adapter, ++ IN u1Byte Idx ++ ) ++{ ++ u1Byte u1bTmp = 0, tmpReg422 = 0; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ u2Byte Head_Page = 0x7FE; ++ BOOLEAN bSendBeacon = FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ pHalData->bFwDwRsvdPageInProgress = TRUE; ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A+1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A+1, (u1bTmp|BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2); ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422&(~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1); ++ PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1, (BcnValidReg|BIT7)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); ++ count = 0; ++ while (!(BcnValidReg & BIT7) && count < 20) { ++ count++; ++ delay_us(10); ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT7) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A+1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A+1, (u1bTmp&(~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ ++ pHalData->bFwDwRsvdPageInProgress = FALSE; ++} ++ ++VOID ++halTxbf8822B_FwTxBFCmd( ++ IN PADAPTER Adapter ++ ) ++{ ++ u1Byte Idx, Period = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) { ++ PageNum0 = 0xFE; ++ PageNum1 = 0x07; ++ Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (PageNum0 == 0xFF) { ++ PageNum0 = 0xFF; /*stop sounding*/ ++ PageNum1 = 0x0F; ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = Period; ++ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x Period = %d", __func__, PageNum0, PageNum1, Period)); ++} ++#endif ++ ++VOID ++HalTxbf8822B_Init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte u1bTmp; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT16, 1); /*Enable P1 aggr new packet according to P0 transfer time*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT15|BIT14|BIT13|BIT12, 1); /*MU Retry Limit*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT7, 0); /*Disable Tx MU-MIMO until sounding done*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , 0x3F, 0); /* Clear validity of MU STAs */ ++ ODM_Write1Byte(pDM_Odm, 0x167c , 0x70); /*MU-MIMO Option as default value*/ ++ ODM_Write2Byte(pDM_Odm, 0x1680 , 0); /*MU-MIMO Control as default value*/ ++ ++ /* Set MU NDPA rate & BW source */ ++ /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, 0x42C); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B, (u1bTmp|BIT6)); ++ /* 0x45F[7:0] = 0x10 (Rate=OFDM_6M, BW20) */ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B, 0x10); ++ ++ /* Init HW variable */ ++ pBeamformingInfo->RegMUTxCtrl = ODM_Read4Byte(pDM_Odm, 0x14c0); ++} ++ ++VOID ++HalTxbf8822B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0)>>4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u2Byte CSI_Param = 0; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamformeeEntry; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry; ++ u2Byte value16, STAid = 0; ++ u1Byte Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; ++ u4Byte gid_valid, user_position_l, user_position_h; ++ u4Byte mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; ++ u1Byte u1bTmp; ++ u4Byte u4bTmp; ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("%s: BFerBFeeIdx=%d, BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerBFeeIdx, BFerIdx, BFeeIdx)); ++ ++ /*************SU BFer Entry Init*************/ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ pBeamformerEntry->is_mu_ap = FALSE; ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); ++ ++ ++ for (i = 0; i < MAX_BEAMFORMER_SU; i++) { ++ if ((pBeamformingInfo->beamformer_su_reg_maping & BIT(i)) == 0) { ++ pBeamformingInfo->beamformer_su_reg_maping |= BIT(i); ++ pBeamformerEntry->su_reg_index = i; ++ break; ++ } ++ } ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (pBeamformerEntry->su_reg_index == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); ++ } ++ ++ /*CSI report parameters of Beamformer*/ ++ Nc_index = halTxbf8822B_GetNrx(pDM_Odm); /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/ ++ Nr_index = pBeamformerEntry->NumofSoundingDim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ ++ ++ grouping = 0; ++ ++ /*for ac = 1, for n = 3*/ ++ if (pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) ++ codebookinfo = 1; ++ else if (pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT) ++ codebookinfo = 3; ++ ++ coefficientsize = 3; ++ ++ CSI_Param = (u2Byte)((coefficientsize<<10)|(codebookinfo<<8)|(grouping<<6)|(Nr_index<<3)|(Nc_index)); ++ ++ if (BFerIdx == 0) ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B, CSI_Param); ++ else ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B+2, CSI_Param); ++ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A+3, 0x70); ++ ++ } ++ ++ /*************SU BFee Entry Init*************/ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ pBeamformeeEntry->is_mu_sta = FALSE; ++ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = pBeamformeeEntry->MacId; ++ else ++ STAid = pBeamformeeEntry->P_AID; ++ ++ for (i = 0; i < MAX_BEAMFORMEE_SU; i++) { ++ if ((pBeamformingInfo->beamformee_su_reg_maping & BIT(i)) == 0) { ++ pBeamformingInfo->beamformee_su_reg_maping |= BIT(i); ++ pBeamformeeEntry->su_reg_index = i; ++ break; ++ } ++ } ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (pBeamformeeEntry->su_reg_index == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3)|BIT4|BIT6|BIT7); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B+2, STAid | BIT14 | BIT15 | BIT12); ++ } ++ ++ /*CSI report parameters of Beamformee*/ ++ if (pBeamformeeEntry->su_reg_index == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, STAid | BIT9); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2, STAid | 0xE200); /*Set BIT25*/ ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++ ++ /*************MU BFer Entry Init*************/ ++ if ((pBeamformingInfo->beamformer_mu_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ pBeamformingInfo->mu_ap_index = BFerIdx; ++ pBeamformerEntry->is_mu_ap = TRUE; ++ for (i = 0; i < 8; i++) ++ pBeamformerEntry->gid_valid[i] = 0; ++ for (i = 0; i < 16; i++) ++ pBeamformerEntry->user_position[i] = 0; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); ++ ++ /* MAC address */ ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); ++ ++ /* Set partial AID */ ++ ODM_Write2Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+6), pBeamformerEntry->P_AID); ++ ++ /* Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, 0x1680); ++ u1bTmp = (pBeamformerEntry->AID)&0xFFF; ++ ODM_Write1Byte(pDM_Odm, 0x1680, u1bTmp); ++ ++ /* Set 80us for leaving ndp_rx_standby_state */ ++ ODM_Write1Byte(pDM_Odm, 0x71B, 0x50); ++ ++ /* Set 0x6A0[14] = 1 to accept action_no_ack */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1); ++ u1bTmp |= 0x40; ++ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1, u1bTmp); ++ /* Set 0x6A2[5:4] = 1 to NDPA and BF report poll */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP1_8822B); ++ u1bTmp |= 0x30; ++ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP1_8822B, u1bTmp); ++ ++ /*CSI report parameters of Beamformer*/ ++ Nc_index = halTxbf8822B_GetNrx(pDM_Odm); /* Depend on RF type */ ++ Nr_index = 1; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ ++ grouping = 0; /*no grouping*/ ++ codebookinfo = 1; /*7 bit for psi, 9 bit for phi*/ ++ coefficientsize = 0; /*This is nothing really matter*/ ++ CSI_Param = (u2Byte)((coefficientsize<<10)|(codebookinfo<<8)|(grouping<<6)|(Nr_index<<3)|(Nc_index)); ++ ODM_Write2Byte(pDM_Odm, 0x6F4, CSI_Param); ++ ++ } ++ ++ /*************MU BFee Entry Init*************/ ++ if ((pBeamformingInfo->beamformee_mu_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ pBeamformeeEntry->is_mu_sta = TRUE; ++ for (i = 0; i < MAX_BEAMFORMEE_MU; i++) { ++ if ((pBeamformingInfo->beamformee_mu_reg_maping & BIT(i)) == 0) { ++ pBeamformingInfo->beamformee_mu_reg_maping |= BIT(i); ++ pBeamformeeEntry->mu_reg_index = i; ++ break; ++ } ++ } ++ ++ if (pBeamformeeEntry->mu_reg_index == 0xFF) { ++ /* There is no valid bit in beamformee_mu_reg_maping */ ++ RT_DISP(FBEAM, FBEAM_FUN, ("%s: ERROR! There is no valid bit in beamformee_mu_reg_maping!\n", __func__)); ++ return; ++ } ++ ++ /*User position table*/ ++ switch (pBeamformeeEntry->mu_reg_index) { ++ case 0: ++ gid_valid = 0x7fe; ++ user_position_l = 0x111110; ++ user_position_h = 0x0; ++ break; ++ case 1: ++ gid_valid = 0x7f806; ++ user_position_l = 0x11000004; ++ user_position_h = 0x11; ++ break; ++ case 2: ++ gid_valid = 0x1f81818; ++ user_position_l = 0x400040; ++ user_position_h = 0x11100; ++ break; ++ case 3: ++ gid_valid = 0x1e186060; ++ user_position_l = 0x4000400; ++ user_position_h = 0x1100040; ++ break; ++ case 4: ++ gid_valid = 0x66618180; ++ user_position_l = 0x40004000; ++ user_position_h = 0x10040400; ++ break; ++ case 5: ++ gid_valid = 0x79860600; ++ user_position_l = 0x40000; ++ user_position_h = 0x4404004; ++ break; ++ } ++ ++ for (i = 0; i < 8; i++) { ++ if (i < 4) { ++ pBeamformeeEntry->gid_valid[i] = (u1Byte)(gid_valid & 0xFF); ++ gid_valid = (gid_valid >> 8); ++ } else ++ pBeamformeeEntry->gid_valid[i] = 0; ++ } ++ for (i = 0; i < 16; i++) { ++ if (i < 4) { ++ pBeamformeeEntry->user_position[i] = (u1Byte)(user_position_l & 0xFF); ++ user_position_l = user_position_l >> 8; ++ } else if (i < 8) { ++ pBeamformeeEntry->user_position[i] = (u1Byte)(user_position_h & 0xFF); ++ user_position_h = user_position_h >> 8; ++ } else ++ pBeamformeeEntry->user_position[i] = 0; ++ } ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); ++ ++ /*select MU STA table*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); ++ pBeamformingInfo->RegMUTxCtrl |= (pBeamformeeEntry->mu_reg_index << 8)&(BIT8|BIT9|BIT10); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ ODM_SetBBReg(pDM_Odm, 0x14c4 , bMaskDWord, 0); /*Reset gid_valid table*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c8 , bMaskDWord, user_position_l); ++ ODM_SetBBReg(pDM_Odm, 0x14cc , bMaskDWord, user_position_h); ++ ++ /*set validity of MU STAs*/ ++ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; ++ pBeamformingInfo->RegMUTxCtrl |= pBeamformingInfo->beamformee_mu_reg_maping&0x3F; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ value16 = ODM_Read2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index]); ++ value16 &= 0xFE00; /*Clear PAID*/ ++ value16 |= BIT9; /*Enable MU BFee*/ ++ value16 |= pBeamformeeEntry->P_AID; ++ ODM_Write2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index] , value16); ++ ++ /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3); ++ u1bTmp |= 0xD0; /* Set bit 28, 30, 31 to 3b'111*/ ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, u1bTmp); ++ /* Set NDPA to 6M*/ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8822B, 0x4); /* 6M */ ++ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B); ++ u1bTmp &= 0xFC; /* Clear bit 0, 1*/ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B, u1bTmp); ++ ++ u4bTmp = ODM_Read4Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B); ++ u4bTmp = ((u4bTmp & 0xFF0000FF) | 0x020200); /* Set [23:8] to 0x0202 */ ++ ODM_Write4Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, u4bTmp); ++ ++ /* Set 0x6A0[14] = 1 to accept action_no_ack */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1); ++ u1bTmp |= 0x40; ++ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1, u1bTmp); ++ /* End of MAC registers setting */ ++ ++ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); ++#if (SUPPORT_MU_BF == 1) ++ /*Special for plugfest*/ ++ delay_ms(50); /* wait for 4-way handshake ending*/ ++ SendSWVHTGIDMgntFrame(pDM_Odm, pBeamformeeEntry->MacAddr, BFeeIdx); ++#endif ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ } ++ ++} ++ ++ ++VOID ++HalTxbf8822B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry; ++ PRT_BEAMFORMEE_ENTRY pBeamformeeEntry; ++ u4Byte mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[Idx]; ++ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (pBeamformerEntry->BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xD8); ++ if (pBeamformerEntry->is_mu_ap == 0) { /*SU BFer */ ++ if (pBeamformerEntry->su_reg_index == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8822B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8822B+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8822B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8822B+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B+2, 0); ++ } ++ pBeamformingInfo->beamformer_su_reg_maping &= ~(BIT(pBeamformerEntry->su_reg_index)); ++ pBeamformerEntry->su_reg_index = 0xFF; ++ } else { /*MU BFer */ ++ /*set validity of MU STA0 and MU STA1*/ ++ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ ODM_Memory_Set(pDM_Odm, pBeamformerEntry->gid_valid, 0, 8); ++ ODM_Memory_Set(pDM_Odm, pBeamformerEntry->user_position, 0, 16); ++ pBeamformerEntry->is_mu_ap = FALSE; ++ } ++ } ++ ++ if (pBeamformeeEntry->BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, Idx); ++ if (pBeamformeeEntry->is_mu_sta == 0) { /*SU BFee*/ ++ if (pBeamformeeEntry->su_reg_index == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, 0x0); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3)|BIT4|BIT6|BIT7); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B+2, 0x0 | BIT14 | BIT15 | BIT12); ++ ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2, ++ ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2) & 0x60); ++ } ++ pBeamformingInfo->beamformee_su_reg_maping &= ~(BIT(pBeamformeeEntry->su_reg_index)); ++ pBeamformeeEntry->su_reg_index = 0xFF; ++ } else { /*MU BFee */ ++ /*Disable sending NDPA & BF-rpt-poll to this BFee*/ ++ ODM_Write2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index] , 0); ++ /*set validity of MU STA*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT(pBeamformeeEntry->mu_reg_index)); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ ++ pBeamformeeEntry->is_mu_sta = FALSE; ++ pBeamformingInfo->beamformee_mu_reg_maping &= ~(BIT(pBeamformeeEntry->mu_reg_index)); ++ pBeamformeeEntry->mu_reg_index = 0xFF; ++ } ++ } ++} ++ ++ ++/***********SU & MU BFee Entry Only when souding done****************/ ++VOID ++HalTxbf8822B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal, tmpVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry; ++ BOOLEAN is_mu_sounding = pBeamformingInfo->is_mu_sounding, is_bitmap_ready = FALSE; ++ u16 bitmap; ++ u8 idx, gid, i; ++ u8 id1, id0; ++ u32 gid_valid[6] = {0}; ++ u32 user_position_lsb[6] = {0}; ++ u32 user_position_msb[6] = {0}; ++ u32 value32; ++ ++ if (Idx < BEAMFORMEE_ENTRY_NUM) ++ pBeamformEntry = &pBeamformingInfo->BeamformeeEntry[Idx]; ++ else ++ return; ++ ++ /*SU sounding done */ ++ if (is_mu_sounding == FALSE) { ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = pBeamformEntry->MacId; ++ else ++ BeamCtrlVal = pBeamformEntry->P_AID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, pBeamformEntry->BeamformEntryState)); ++ ++ if (pBeamformEntry->su_reg_index == 0) { ++ BeamCtrlReg = REG_TXBF_CTRL_8822B; ++ } else { ++ BeamCtrlReg = REG_TXBF_CTRL_8822B+2; ++ BeamCtrlVal |= BIT12|BIT14|BIT15; ++ } ++ ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= (BIT9|BIT10); ++ else if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= (BIT9|BIT10|BIT11); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__)); ++ BeamCtrlVal &= ~(BIT9|BIT10|BIT11); ++ } ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++ /*disable NDP packet use beamforming */ ++ tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8822B); ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, tmpVal|BIT15); ++ } else { ++ /*MU sounding done */ ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ /*value32 = ODM_GetBBReg(pDM_Odm, 0xF4C, 0xFFFF0000);*/ ++ value32 = 1; ++ ++ is_bitmap_ready = (BOOLEAN)((value32 & BIT15) >> 15); ++ bitmap = (u16)(value32 & 0x3FFF); ++ ++ for (idx = 0; idx < 15; idx++) { ++ if (idx < 5) {/*bit0~4*/ ++ id0 = 0; ++ id1 = (u8)(idx + 1); ++ } else if (idx < 9) { /*bit5~8*/ ++ id0 = 1; ++ id1 = (u8)(idx - 3); ++ } else if (idx < 12) { /*bit9~11*/ ++ id0 = 2; ++ id1 = (u8)(idx - 6); ++ } else if (idx < 14) { /*bit12~13*/ ++ id0 = 3; ++ id1 = (u8)(idx - 8); ++ } else { /*bit14*/ ++ id0 = 4; ++ id1 = (u8)(idx - 9); ++ } ++ if (bitmap & BIT(idx)) { ++ /*Pair 1*/ ++ gid = (idx << 1) + 1; ++ gid_valid[id0] |= (BIT(gid)); ++ gid_valid[id1] |= (BIT(gid)); ++ /*Pair 2*/ ++ gid += 1; ++ gid_valid[id0] |= (BIT(gid)); ++ gid_valid[id1] |= (BIT(gid)); ++ } else { ++ /*Pair 1*/ ++ gid = (idx << 1) + 1; ++ gid_valid[id0] &= ~(BIT(gid)); ++ gid_valid[id1] &= ~(BIT(gid)); ++ /*Pair 2*/ ++ gid += 1; ++ gid_valid[id0] &= ~(BIT(gid)); ++ gid_valid[id1] &= ~(BIT(gid)); ++ } ++ } ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ pBeamformEntry = &pBeamformingInfo->BeamformeeEntry[i]; ++ if ((pBeamformEntry->is_mu_sta) && (pBeamformEntry->mu_reg_index < 6)) { ++ value32 = gid_valid[pBeamformEntry->mu_reg_index]; ++ for (idx = 0; idx < 4; idx++) { ++ pBeamformEntry->gid_valid[idx] = (u8)(value32 & 0xFF); ++ value32 = (value32 >> 8); ++ } ++ } ++ } ++ ++ for (idx = 0; idx < 6; idx++) { ++ pBeamformingInfo->RegMUTxCtrl |= ~(BIT8|BIT9|BIT10); ++ pBeamformingInfo->RegMUTxCtrl |= ((idx<<8)&(BIT8|BIT9|BIT10)); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ODM_SetMACReg(pDM_Odm, 0x14C4, bMaskDWord, gid_valid[idx]); /*set MU STA gid valid table*/ ++ } ++ ++ /*Enable TxMU PPDU*/ ++ pBeamformingInfo->RegMUTxCtrl |= BIT7; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ } ++ } ++} ++ ++/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ ++VOID ++HalTxbf8822B_ConfigGtab( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; ++ u4Byte gid_valid = 0, user_position_l = 0, user_position_h = 0, i; ++ ++ if (pBeamformingInfo->mu_ap_index < BEAMFORMER_ENTRY_NUM) ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[pBeamformingInfo->mu_ap_index]; ++ else ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s==>\n", __func__)); ++ ++ /*For GID 0~31*/ ++ for (i = 0; i < 4; i++) ++ gid_valid |= (pBeamformerEntry->gid_valid[i] << (i<<3)); ++ for (i = 0; i < 8; i++) { ++ if (i < 4) ++ user_position_l |= (pBeamformerEntry->user_position[i] << (i << 3)); ++ else ++ user_position_h |= (pBeamformerEntry->user_position[i] << ((i - 4)<<3)); ++ } ++ /*select MU STA0 table*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ODM_SetBBReg(pDM_Odm, 0x14c4, bMaskDWord, gid_valid); ++ ODM_SetBBReg(pDM_Odm, 0x14c8, bMaskDWord, user_position_l); ++ ODM_SetBBReg(pDM_Odm, 0x14cc, bMaskDWord, user_position_h); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", ++ __func__, gid_valid, user_position_l, user_position_h)); ++ ++ gid_valid = 0; ++ user_position_l = 0; ++ user_position_h = 0; ++ ++ /*For GID 32~64*/ ++ for (i = 4; i < 8; i++) ++ gid_valid |= (pBeamformerEntry->gid_valid[i] << ((i - 4)<<3)); ++ for (i = 8; i < 16; i++) { ++ if (i < 4) ++ user_position_l |= (pBeamformerEntry->user_position[i] << ((i - 8) << 3)); ++ else ++ user_position_h |= (pBeamformerEntry->user_position[i] << ((i - 12) << 3)); ++ } ++ /*select MU STA1 table*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); ++ pBeamformingInfo->RegMUTxCtrl |= BIT8; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ODM_SetBBReg(pDM_Odm, 0x14c4, bMaskDWord, gid_valid); ++ ODM_SetBBReg(pDM_Odm, 0x14c8, bMaskDWord, user_position_l); ++ ODM_SetBBReg(pDM_Odm, 0x14cc, bMaskDWord, user_position_h); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", ++ __func__, gid_valid, user_position_l, user_position_h)); ++ ++ /* Set validity of MU STA0 and MU STA1*/ ++ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; ++ pBeamformingInfo->RegMUTxCtrl |= 0x3; /* STA0, STA1*/ ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++} ++ ++ ++ ++#if 0 ++/*This function translate the bitmap to GTAB*/ ++VOID ++haltxbf8822b_gtab_translation( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u8 idx, gid; ++ u8 id1, id0; ++ u32 gid_valid[6] = {0}; ++ u32 user_position_lsb[6] = {0}; ++ u32 user_position_msb[6] = {0}; ++ ++ for (idx = 0; idx < 15; idx++) { ++ if (idx < 5) {/*bit0~4*/ ++ id0 = 0; ++ id1 = (u8)(idx + 1); ++ } else if (idx < 9) { /*bit5~8*/ ++ id0 = 1; ++ id1 = (u8)(idx - 3); ++ } else if (idx < 12) { /*bit9~11*/ ++ id0 = 2; ++ id1 = (u8)(idx - 6); ++ } else if (idx < 14) { /*bit12~13*/ ++ id0 = 3; ++ id1 = (u8)(idx - 8); ++ } else { /*bit14*/ ++ id0 = 4; ++ id1 = (u8)(idx - 9); ++ } ++ ++ /*Pair 1*/ ++ gid = (idx << 1) + 1; ++ gid_valid[id0] |= (1 << gid); ++ gid_valid[id1] |= (1 << gid); ++ if (gid < 16) { ++ /*user_position_lsb[id0] |= (0 << (gid << 1));*/ ++ user_position_lsb[id1] |= (1 << (gid << 1)); ++ } else { ++ /*user_position_msb[id0] |= (0 << ((gid - 16) << 1));*/ ++ user_position_msb[id1] |= (1 << ((gid - 16) << 1)); ++ } ++ ++ /*Pair 2*/ ++ gid += 1; ++ gid_valid[id0] |= (1 << gid); ++ gid_valid[id1] |= (1 << gid); ++ if (gid < 16) { ++ user_position_lsb[id0] |= (1 << (gid << 1)); ++ /*user_position_lsb[id1] |= (0 << (gid << 1));*/ ++ } else { ++ user_position_msb[id0] |= (1 << ((gid - 16) << 1)); ++ /*user_position_msb[id1] |= (0 << ((gid - 16) << 1));*/ ++ } ++ ++ } ++ ++ ++ for (idx = 0; idx < 6; idx++) { ++ /*DbgPrint("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]); ++ DbgPrint("user_position[%d] = 0x%x %x\n", idx, user_position_msb[idx], user_position_lsb[idx]);*/ ++ } ++} ++#endif ++ ++VOID ++HalTxbf8822B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ) ++{ ++#if 0 ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8822B_DownloadNDPA(Adapter, Idx); ++ ++ halTxbf8822B_FwTxBFCmd(Adapter); ++#endif ++} ++ ++#else /* (RTL8822B_SUPPORT == 1)*/ ++ ++#endif /* (RTL8822B_SUPPORT == 1)*/ ++ ++#endif /*(BEAMFORMING_SUPPORT == 1)*/ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8822b.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8822b.h new file mode 100644 -index 000000000..d9bc960d5 +index 0000000..bc22bce --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbf8822b.h @@ -0,0 +1,53 @@ -+#ifndef __HAL_TXBF_8822B_H__ -+#define __HAL_TXBF_8822B_H__ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (RTL8822B_SUPPORT == 1) -+ -+VOID -+HalTxbf8822B_Init( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+HalTxbf8822B_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8822B_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+ -+VOID -+HalTxbf8822B_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+ -+VOID -+HalTxbf8822B_ConfigGtab( -+ IN PVOID pDM_VOID -+ ); -+ -+VOID -+HalTxbf8822B_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); -+#else -+#define HalTxbf8822B_Init(pDM_VOID) -+#define HalTxbf8822B_Enter(pDM_VOID, Idx) -+#define HalTxbf8822B_Leave(pDM_VOID, Idx) -+#define HalTxbf8822B_Status(pDM_VOID, Idx) -+#define HalTxbf8822B_FwTxBF(pDM_VOID, Idx) -+#define HalTxbf8822B_ConfigGtab(pDM_VOID) -+#endif -+ -+ -+#endif -+#endif -+ ++#ifndef __HAL_TXBF_8822B_H__ ++#define __HAL_TXBF_8822B_H__ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8822B_SUPPORT == 1) ++ ++VOID ++HalTxbf8822B_Init( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8822B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8822B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8822B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++VOID ++HalTxbf8822B_ConfigGtab( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8822B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++#else ++#define HalTxbf8822B_Init(pDM_VOID) ++#define HalTxbf8822B_Enter(pDM_VOID, Idx) ++#define HalTxbf8822B_Leave(pDM_VOID, Idx) ++#define HalTxbf8822B_Status(pDM_VOID, Idx) ++#define HalTxbf8822B_FwTxBF(pDM_VOID, Idx) ++#define HalTxbf8822B_ConfigGtab(pDM_VOID) ++#endif ++ ++ ++#endif ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.c new file mode 100644 -index 000000000..e7d79f02b +index 0000000..badd23b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.c @@ -0,0 +1,1384 @@ -+//============================================================ -+// Description: -+// -+// This file is for TXBF interface mechanism -+// -+//============================================================ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" ++//============================================================ ++// Description: ++// ++// This file is for TXBF interface mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++Beamforming_GidPAid( ++ PADAPTER Adapter, ++ PRT_TCB pTcb ++) ++{ ++ u1Byte Idx = 0; ++ u1Byte RA[6] ={0}; ++ pu1Byte pHeader = GET_FRAME_OF_FIRST_FRAG(Adapter, pTcb); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ if (Adapter->HardwareType < HARDWARE_TYPE_RTL8192EE) ++ return; ++ else if (IS_WIRELESS_MODE_N(Adapter) == FALSE) ++ return; ++ ++#if (SUPPORT_MU_BF == 1) ++ if (pTcb->TxBFPktType == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* MU NDPA */ ++#else ++ if (0) { ++#endif ++ /* Fill G_ID and P_AID */ ++ pTcb->G_ID = 63; ++ if (pBeamInfo->FirstMUBFeeIndex < BEAMFORMEE_ENTRY_NUM) { ++ pTcb->P_AID = pBeamInfo->BeamformeeEntry[pBeamInfo->FirstMUBFeeIndex].P_AID; ++ RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, pTcb->G_ID, pTcb->P_AID)); ++ } ++ } else { ++ GET_80211_HDR_ADDRESS1(pHeader, &RA); ++ ++ // VHT SU PPDU carrying one or more group addressed MPDUs or ++ // Transmitting a VHT NDP intended for multiple recipients ++ if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA) || pTcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) { ++ pTcb->G_ID = 63; ++ pTcb->P_AID = 0; ++ } else if (ACTING_AS_AP(Adapter)) { ++ u2Byte AID = (u2Byte) (MacIdGetOwnerAssociatedClientAID(Adapter, pTcb->macId) & 0x1ff); /*AID[0:8]*/ ++ ++ /*RT_DISP(FBEAM, FBEAM_FUN, ("@%s pTcb->macId=0x%X, AID=0x%X\n", __func__, pTcb->macId, AID));*/ ++ pTcb->G_ID = 63; ++ ++ if (AID == 0) /*A PPDU sent by an AP to a non associated STA*/ ++ pTcb->P_AID = 0; ++ else { /*Sent by an AP and addressed to a STA associated with that AP*/ ++ u2Byte BSSID = 0; ++ GET_80211_HDR_ADDRESS2(pHeader, &RA); ++ BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf); /*BSSID[44:47] xor BSSID[40:43]*/ ++ pTcb->P_AID = (AID + BSSID *32) & 0x1ff; /*(dec(A) + dec(B)*32) mod 512*/ ++ } ++ } else if (ACTING_AS_IBSS(Adapter)) { ++ pTcb->G_ID = 63; ++ /*P_AID for infrasturcture mode; MACID for ad-hoc mode. */ ++ pTcb->P_AID = pTcb->macId; ++ } else if (MgntLinkStatusQuery(Adapter)) { /*Addressed to AP*/ ++ pTcb->G_ID = 0; ++ GET_80211_HDR_ADDRESS1(pHeader, &RA); ++ pTcb->P_AID = RA[5]; /*RA[39:47]*/ ++ pTcb->P_AID = (pTcb->P_AID << 1) | (RA[4] >> 7 ); ++ } else { ++ pTcb->G_ID = 63; ++ pTcb->P_AID = 0; ++ } ++ /*RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, pTcb->G_ID, pTcb->P_AID));*/ ++ } ++} ++ ++ ++RT_STATUS ++Beamforming_GetReportFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ pu1Byte pMIMOCtrlField, pCSIReport, pCSIMatrix; ++ u1Byte Idx, Nc, Nr, CH_W; ++ u2Byte CSIMatrixLen = 0; ++ ++ ACT_PKT_TYPE pktType = ACT_PKT_TYPE_UNKNOWN; ++ ++ //Memory comparison to see if CSI report is the same with previous one ++ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, Frame_Addr2(*pPduOS), &Idx); ++ ++ if (pBeamformEntry == NULL) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetReportFrame: Cannot find entry by addr\n")); ++ return RT_STATUS_FAILURE; ++ } ++ ++ pktType = PacketGetActionFrameType(pPduOS); ++ ++ //-@ Modified by David ++ if (pktType == ACT_PKT_VHT_COMPRESSED_BEAMFORMING) { ++ pMIMOCtrlField = pPduOS->Octet + 26; ++ Nc = ((*pMIMOCtrlField) & 0x7) + 1; ++ Nr = (((*pMIMOCtrlField) & 0x38) >> 3) + 1; ++ CH_W = (((*pMIMOCtrlField) & 0xC0) >> 6); ++ pCSIMatrix = pMIMOCtrlField + 3 + Nc; //24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(Nc=2) ++ CSIMatrixLen = pPduOS->Length - 26 -3 -Nc; ++ } else if (pktType == ACT_PKT_HT_COMPRESSED_BEAMFORMING) { ++ pMIMOCtrlField = pPduOS->Octet + 26; ++ Nc = ((*pMIMOCtrlField) & 0x3) + 1; ++ Nr = (((*pMIMOCtrlField) & 0xC) >> 2) + 1; ++ CH_W = (((*pMIMOCtrlField) & 0x10) >> 4); ++ pCSIMatrix = pMIMOCtrlField + 6 + Nr; //24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(Nc=2) ++ CSIMatrixLen = pPduOS->Length - 26 -6 -Nr; ++ } else ++ return RT_STATUS_SUCCESS; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx=%d, pkt type=%d, Nc=%d, Nr=%d, CH_W=%d\n", __func__, Idx, pktType, Nc, Nr, CH_W)); ++ ++ return RT_STATUS_SUCCESS; ++} ++ ++ ++VOID ++ConstructHTNDPAPacket( ++ PADAPTER Adapter, ++ pu1Byte RA, ++ pu1Byte Buffer, ++ pu4Byte pLength, ++ CHANNEL_WIDTH BW ++ ) ++{ ++ u2Byte Duration= 0; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ OCTET_STRING pNDPAFrame,ActionContent; ++ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ ++ PlatformZeroMemory(Buffer, 32); ++ ++ SET_80211_HDR_FRAME_CONTROL(Buffer,0); ++ ++ SET_80211_HDR_ORDER(Buffer, 1); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(Buffer,Type_Action_No_Ack); ++ ++ SET_80211_HDR_ADDRESS1(Buffer, RA); ++ SET_80211_HDR_ADDRESS2(Buffer, Adapter->CurrentAddress); ++ SET_80211_HDR_ADDRESS3(Buffer, pMgntInfo->Bssid); ++ ++ Duration = 2*aSifsTime + 40; ++ ++ if (BW == CHANNEL_WIDTH_40) ++ Duration+= 87; ++ else ++ Duration+= 180; ++ ++ SET_80211_HDR_DURATION(Buffer, Duration); ++ ++ //HT control field ++ SET_HT_CTRL_CSI_STEERING(Buffer+sMacHdrLng, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(Buffer+sMacHdrLng, 1); ++ ++ FillOctetString(pNDPAFrame, Buffer, sMacHdrLng+sHTCLng); ++ ++ FillOctetString(ActionContent, ActionHdr, 4); ++ PacketAppendData(&pNDPAFrame, ActionContent); ++ ++ *pLength = 32; ++} ++ ++ ++ ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u4Byte BufLen; ++ pu1Byte BufAddr; ++ u1Byte DescLen = 0, Idx = 0, NDPTxRate; ++ PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamformEntry == NULL) ++ return FALSE; ++ ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetFWBuffer(pDefAdapter, &pTcb, &pBuf)) { ++#if(DEV_BUS_TYPE != RT_PCI_INTERFACE) ++ DescLen = Adapter->HWDescHeadLength - pHalData->USBALLDummyLength; ++#endif ++ BufAddr = pBuf->Buffer.VirtualAddress + DescLen; ++ ++ ConstructHTNDPAPacket( ++ Adapter, ++ RA, ++ BufAddr, ++ &BufLen, ++ BW ++ ); ++ ++ pTcb->PacketLength = BufLen + DescLen; ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ ++ pTcb->BWOfPacket = BW; ++ ++ if(ACTING_AS_IBSS(Adapter) || ACTING_AS_AP(Adapter)) ++ pTcb->G_ID = 63; ++ ++ pTcb->P_AID = pBeamformEntry->P_AID; ++ pTcb->DataRate = NDPTxRate; /*rate of NDP decide by Nr*/ ++ ++ Adapter->HalFunc.CmdSendPacketHandler(Adapter, pTcb, pBuf, pTcb->PacketLength, DESC_PACKET_TYPE_NORMAL, FALSE); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte Idx = 0, NDPTxRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructHTNDPAPacket( ++ Adapter, ++ RA, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength, ++ BW ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ ++ pTcb->BWOfPacket = BW; ++ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++ ++VOID ++ConstructVHTNDPAPacket( ++ IN PDM_ODM_T pDM_Odm, ++ pu1Byte RA, ++ u2Byte AID, ++ pu1Byte Buffer, ++ pu4Byte pLength, ++ CHANNEL_WIDTH BW ++ ) ++{ ++ u2Byte Duration= 0; ++ u1Byte Sequence = 0; ++ pu1Byte pNDPAFrame = Buffer; ++ RT_NDPA_STA_INFO STAInfo; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ // Frame control. ++ SET_80211_HDR_FRAME_CONTROL(pNDPAFrame, 0); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(pNDPAFrame, Type_NDPA); ++ ++ SET_80211_HDR_ADDRESS1(pNDPAFrame, RA); ++ SET_80211_HDR_ADDRESS2(pNDPAFrame, pBeamformEntry->MyMacAddr); ++ ++ Duration = 2*aSifsTime + 44; ++ ++ if (BW == CHANNEL_WIDTH_80) ++ Duration += 40; ++ else if(BW == CHANNEL_WIDTH_40) ++ Duration+= 87; ++ else ++ Duration+= 180; ++ ++ SET_80211_HDR_DURATION(pNDPAFrame, Duration); ++ ++ Sequence = *(pDM_Odm->pSoundingSeq) << 2; ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame+16, &Sequence, 1); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS) || phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP) == FALSE) ++ AID = 0; ++ ++ STAInfo.AID = AID; ++ STAInfo.FeedbackType = 0; ++ STAInfo.NcIndex = 0; ++ ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame+17, (pu1Byte)&STAInfo, 2); ++ ++ *pLength = 19; ++} ++ ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u4Byte BufLen; ++ pu1Byte BufAddr; ++ u1Byte DescLen = 0, Idx = 0, NDPTxRate = 0; ++ PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry =phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamformEntry == NULL) ++ return FALSE; ++ ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetFWBuffer(pDefAdapter, &pTcb, &pBuf)) { ++#if(DEV_BUS_TYPE != RT_PCI_INTERFACE) ++ DescLen = Adapter->HWDescHeadLength - pHalData->USBALLDummyLength; ++#endif ++ BufAddr = pBuf->Buffer.VirtualAddress + DescLen; ++ ++ ConstructVHTNDPAPacket( ++ pDM_Odm, ++ RA, ++ AID, ++ BufAddr, ++ &BufLen, ++ BW ++ ); ++ ++ pTcb->PacketLength = BufLen + DescLen; ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ ++ pTcb->BWOfPacket = BW; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS) || phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) ++ pTcb->G_ID = 63; ++ ++ pTcb->P_AID = pBeamformEntry->P_AID; ++ pTcb->DataRate = NDPTxRate; /*decide by Nr*/ ++ ++ Adapter->HalFunc.CmdSendPacketHandler(Adapter, pTcb, pBuf, pTcb->PacketLength, DESC_PACKET_TYPE_NORMAL, FALSE); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End, ret=%d\n", __func__, ret)); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte Idx = 0, NDPTxRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTNDPAPacket( ++ pDM_Odm, ++ RA, ++ AID, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength, ++ BW ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ pTcb->BWOfPacket = BW; ++ ++ /*rate of NDP decide by Nr*/ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++#ifdef SUPPORT_MU_BF ++#if (SUPPORT_MU_BF == 1) ++/* ++// Description: On VHT GID management frame by an MU beamformee. ++// ++// 2015.05.20. Created by tynli. ++*/ ++RT_STATUS ++Beamforming_GetVHTGIDMgntFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_STATUS rtStatus = RT_STATUS_SUCCESS; ++ pu1Byte pBuffer = NULL; ++ pu1Byte pRaddr = NULL; ++ u1Byte MemStatus[8] = {0}, UserPos[16] = {0}; ++ u1Byte idx; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMER_ENTRY pBeamformEntry = &pBeamInfo->BeamformerEntry[pBeamInfo->mu_ap_index]; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] On VHT GID mgnt frame!\n", __func__)); ++ ++ /* Check length*/ ++ if (pPduOS->Length < (FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY+16)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetVHTGIDMgntFrame(): Invalid length (%d)\n", pPduOS->Length)); ++ return RT_STATUS_INVALID_LENGTH; ++ } ++ ++ /* Check RA*/ ++ pRaddr = (pu1Byte)(pPduOS->Octet)+4; ++ if (!eqMacAddr(pRaddr, Adapter->CurrentAddress)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetVHTGIDMgntFrame(): Drop because of RA error.\n")); ++ return RT_STATUS_PKT_DROP; ++ } ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "On VHT GID Mgnt Frame ==>:\n", pPduOS->Octet, pPduOS->Length); ++ ++ /*Parsing Membership Status Array*/ ++ pBuffer = pPduOS->Octet + FRAME_OFFSET_VHT_GID_MGNT_MEMBERSHIP_STATUS_ARRAY; ++ for (idx = 0; idx < 8; idx++) { ++ MemStatus[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(pBuffer+idx); ++ pBeamformEntry->gid_valid[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(pBuffer+idx); ++ } ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "MemStatus: ", MemStatus, 8); ++ ++ /* Parsing User Position Array*/ ++ pBuffer = pPduOS->Octet + FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY; ++ for (idx = 0; idx < 16; idx++) { ++ UserPos[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(pBuffer+idx); ++ pBeamformEntry->user_position[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(pBuffer+idx); ++ } ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "UserPos: ", UserPos, 16); ++ ++ /* Group ID detail printed*/ ++ { ++ u1Byte i, j; ++ u1Byte tmpVal; ++ u2Byte tmpVal2; ++ ++ for (i = 0; i < 8; i++) { ++ tmpVal = MemStatus[i]; ++ tmpVal2 = ((UserPos[i*2 + 1] << 8) & 0xFF00) + (UserPos[i * 2] & 0xFF); ++ for (j = 0; j < 8; j++) { ++ if ((tmpVal >> j) & BIT0) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Use Group ID (%d), User Position (%d)\n", ++ (i*8+j), (tmpVal2 >> 2 * j)&0x3)); ++ } ++ } ++ } ++ } ++ ++ /* Indicate GID frame to IHV service. */ ++ { ++ u1Byte Indibuffer[24] = {0}; ++ u1Byte Indioffset = 0; ++ ++ PlatformMoveMemory(Indibuffer + Indioffset, pBeamformEntry->gid_valid, 8); ++ Indioffset += 8; ++ PlatformMoveMemory(Indibuffer + Indioffset, pBeamformEntry->user_position, 16); ++ Indioffset += 16; ++ ++ PlatformIndicateCustomStatus( ++ Adapter, ++ RT_CUSTOM_EVENT_VHT_RECV_GID_MGNT_FRAME, ++ RT_CUSTOM_INDI_TARGET_IHV, ++ Indibuffer, ++ Indioffset); ++ } ++ ++ /* Config HW GID table */ ++ halComTxbf_ConfigGtab(pDM_Odm); ++ ++ return rtStatus; ++} ++ ++/* ++// Description: Construct VHT Group ID (GID) management frame. ++// ++// 2015.05.20. Created by tynli. ++*/ ++VOID ++ConstructVHTGIDMgntFrame( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte RA, ++ IN PRT_BEAMFORMEE_ENTRY pBeamformEntry, ++ OUT pu1Byte Buffer, ++ OUT pu4Byte pLength ++ ++) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ OCTET_STRING osFTMFrame, tmp; ++ ++ FillOctetString(osFTMFrame, Buffer, 0); ++ *pLength = 0; ++ ++ ConstructMaFrameHdr( ++ Adapter, ++ RA, ++ ACT_CAT_VHT, ++ ACT_VHT_GROUPID_MANAGEMENT, ++ &osFTMFrame); ++ ++ /* Membership Status Array*/ ++ FillOctetString(tmp, pBeamformEntry->gid_valid, 8); ++ PacketAppendData(&osFTMFrame, tmp); ++ ++ /* User Position Array*/ ++ FillOctetString(tmp, pBeamformEntry->user_position, 16); ++ PacketAppendData(&osFTMFrame, tmp); ++ ++ *pLength = osFTMFrame.Length; ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "ConstructVHTGIDMgntFrame():\n", Buffer, *pLength); ++} ++ ++BOOLEAN ++SendSWVHTGIDMgntFrame( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte DataRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = &pBeamInfo->BeamformeeEntry[Idx]; ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTGIDMgntFrame( ++ pDM_Odm, ++ RA, ++ pBeamformEntry, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength ++ ); ++ ++ pTcb->BWOfPacket = CHANNEL_WIDTH_20; ++ DataRate = MGN_6M; ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, DataRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++/* ++// Description: Construct VHT beamforming report poll. ++// ++// 2015.05.20. Created by tynli. ++*/ ++VOID ++ConstructVHTBFReportPoll( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte RA, ++ OUT pu1Byte Buffer, ++ OUT pu4Byte pLength ++) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ pu1Byte pBFRptPoll = Buffer; ++ ++ /* Frame control*/ ++ SET_80211_HDR_FRAME_CONTROL(pBFRptPoll, 0); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(pBFRptPoll, Type_Beamforming_Report_Poll); ++ ++ /* Duration*/ ++ SET_80211_HDR_DURATION(pBFRptPoll, 100); ++ ++ /* RA*/ ++ SET_VHT_BF_REPORT_POLL_RA(pBFRptPoll, RA); ++ ++ /* TA*/ ++ SET_VHT_BF_REPORT_POLL_TA(pBFRptPoll, Adapter->CurrentAddress); ++ ++ /* Feedback Segment Retransmission Bitmap*/ ++ SET_VHT_BF_REPORT_POLL_FEEDBACK_SEG_RETRAN_BITMAP(pBFRptPoll, 0xFF); ++ ++ *pLength = 17; ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "ConstructVHTBFReportPoll():\n", Buffer, *pLength); ++ ++} ++ ++BOOLEAN ++SendSWVHTBFReportPoll( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN BOOLEAN bFinalPoll ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte Idx = 0, DataRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTBFReportPoll( ++ pDM_Odm, ++ RA, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; /* need?*/ ++ pTcb->BWOfPacket = CHANNEL_WIDTH_20; ++ ++ if (bFinalPoll) ++ pTcb->TxBFPktType = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL; ++ else ++ pTcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL; ++ ++ DataRate = MGN_6M; /* Legacy OFDM rate*/ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, DataRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "SendSWVHTBFReportPoll():\n", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++ ++} ++ ++ ++/* ++// Description: Construct VHT MU NDPA packet. ++// We should combine this function with ConstructVHTNDPAPacket() in the future. ++// ++// 2015.05.21. Created by tynli. ++*/ ++VOID ++ConstructVHTMUNDPAPacket( ++ IN PDM_ODM_T pDM_Odm, ++ IN CHANNEL_WIDTH BW, ++ OUT pu1Byte Buffer, ++ OUT pu4Byte pLength ++ ) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ u2Byte Duration = 0; ++ u1Byte Sequence = 0; ++ pu1Byte pNDPAFrame = Buffer; ++ RT_NDPA_STA_INFO STAInfo; ++ u1Byte idx; ++ u1Byte DestAddr[6] = {0}; ++ PRT_BEAMFORMEE_ENTRY pEntry = NULL; ++ ++ /* Fill the first MU BFee entry (STA1) MAC addr to destination address then ++ HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); ++ if (pEntry->is_mu_sta) { ++ cpMacAddr(DestAddr, pEntry->MacAddr); ++ break; ++ } ++ } ++ if (pEntry == NULL) ++ return; ++ ++ /* Frame control.*/ ++ SET_80211_HDR_FRAME_CONTROL(pNDPAFrame, 0); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(pNDPAFrame, Type_NDPA); ++ ++ SET_80211_HDR_ADDRESS1(pNDPAFrame, DestAddr); ++ SET_80211_HDR_ADDRESS2(pNDPAFrame, pEntry->MyMacAddr); ++ ++ /*--------------------------------------------*/ ++ /* Need to modify "Duration" to MU consideration. */ ++ Duration = 2*aSifsTime + 44; ++ ++ if (BW == CHANNEL_WIDTH_80) ++ Duration += 40; ++ else if(BW == CHANNEL_WIDTH_40) ++ Duration+= 87; ++ else ++ Duration+= 180; ++ /*--------------------------------------------*/ ++ ++ SET_80211_HDR_DURATION(pNDPAFrame, Duration); ++ ++ Sequence = *(pDM_Odm->pSoundingSeq) << 2; ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame + 16, &Sequence, 1); ++ ++ *pLength = 17; ++ ++ /* Construct STA info. for multiple STAs*/ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); ++ if (pEntry->is_mu_sta) { ++ STAInfo.AID = pEntry->AID; ++ STAInfo.FeedbackType = 1; /* 1'b1: MU*/ ++ STAInfo.NcIndex = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get BeamformeeEntry idx(%d), AID =%d\n", __func__, idx, pEntry->AID)); ++ ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame+(*pLength), (pu1Byte)&STAInfo, 2); ++ *pLength += 2; ++ } ++ } ++ ++} ++ ++BOOLEAN ++SendSWVHTMUNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte NDPTxRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTMUNDPAPacket( ++ pDM_Odm, ++ BW, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ pTcb->BWOfPacket = BW; ++ pTcb->TxBFPktType = RT_BF_PKT_TYPE_BROADCAST_NDPA; ++ ++ /*rate of NDP decide by Nr*/ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++#endif /*#if (SUPPORT_MU_BF == 1)*/ ++#endif /*#ifdef SUPPORT_MU_BF*/ ++ ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++u4Byte ++Beamforming_GetReportFrame( ++ IN PVOID pDM_VOID, ++ union recv_frame *precv_frame ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte ret = _SUCCESS; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ pu1Byte pframe = precv_frame->u.hdr.rx_data; ++ u4Byte frame_len = precv_frame->u.hdr.len; ++ pu1Byte TA; ++ u1Byte Idx, offset; ++ ++ /*DBG_871X("beamforming_get_report_frame\n");*/ ++ ++ /*Memory comparison to see if CSI report is the same with previous one*/ ++ TA = GetAddr2Ptr(pframe); ++ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, TA, &Idx); ++ if(pBeamformEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else if(pBeamformEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) ++ offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else ++ return ret; ++ ++ /*DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset);*/ ++ ++ return ret; ++} ++ ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ u1Byte *pframe; ++ u2Byte *fctrl; ++ u2Byte duration = 0; ++ u1Byte aSifsTime = 0, NDPTxRate = 0, Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ pattrib->qsel = QSLT_BEACON; ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if(BW == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ //HT control field ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ pu1Byte pframe; ++ pu2Byte fctrl; ++ u2Byte duration = 0; ++ u1Byte aSifsTime = 0, NDPTxRate = 0, Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if (BW == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ /*HT control field*/ ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ pu1Byte pframe; ++ pu2Byte fctrl; ++ u2Byte duration = 0; ++ u1Byte sequence = 0, aSifsTime = 0, NDPTxRate= 0, Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ RT_NDPA_STA_INFO sta_info; ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ pattrib->qsel = QSLT_BEACON; ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if(BW == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if(BW == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->SoundingSequence<< 2; ++ if (pBeamInfo->SoundingSequence >= 0x3f) ++ pBeamInfo->SoundingSequence = 0; ++ else ++ pBeamInfo->SoundingSequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence,1); ++ ++ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ AID = 0; ++ ++ sta_info.AID = AID; ++ sta_info.FeedbackType = 0; ++ sta_info.NcIndex= 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++ ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ RT_NDPA_STA_INFO ndpa_sta_info; ++ u1Byte NDPTxRate = 0, sequence = 0, aSifsTime = 0, Idx = 0; ++ pu1Byte pframe; ++ pu2Byte fctrl; ++ u2Byte duration = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if (BW == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if (BW == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->SoundingSequence << 2; ++ if (pBeamInfo->SoundingSequence >= 0x3f) ++ pBeamInfo->SoundingSequence = 0; ++ else ++ pBeamInfo->SoundingSequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence, 1); ++ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ AID = 0; ++ ++ ndpa_sta_info.AID = AID; ++ ndpa_sta_info.FeedbackType = 0; ++ ndpa_sta_info.NcIndex = 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&ndpa_sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] [%d]\n", __func__, __LINE__)); ++ ++ return _TRUE; ++} ++ ++ ++#endif ++ ++ ++VOID ++Beamforming_GetNDPAFrame( ++ IN PVOID pDM_VOID, ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN OCTET_STRING pduOS ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ union recv_frame *precv_frame ++#endif ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ pu1Byte TA ; ++ u1Byte Idx, Sequence; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pu1Byte pNDPAFrame = pduOS.Octet; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pu1Byte pNDPAFrame = precv_frame->u.hdr.rx_data; ++#endif ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; /*Modified By Jeffery @2014-10-29*/ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "Beamforming_GetNDPAFrame\n", pduOS.Octet, pduOS.Length); ++ if (IsCtrlNDPA(pNDPAFrame) == FALSE) ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (GetFrameSubType(pNDPAFrame) != WIFI_NDPA) ++#endif ++ return; ++ else if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821))) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] not 8812 or 8821A, return\n", __func__)); ++ return; ++ } ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ TA = Frame_Addr2(pduOS); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ TA = GetAddr2Ptr(pNDPAFrame); ++#endif ++ /*Remove signaling TA. */ ++ TA[0] = TA[0] & 0xFE; ++ ++ pBeamformerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, TA, &Idx); // Modified By Jeffery @2014-10-29 ++ ++ /*Break options for Clock Reset*/ ++ if (pBeamformerEntry == NULL) ++ return; ++ else if (!(pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU)) ++ return; ++ /*LogSuccess: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ ++ /*ClockResetTimes: While BFer entry always doesn't receive our CSI, clock will reset again and again.So ClockResetTimes is limited to 5 times.2015-04-13, Jeffery*/ ++ else if ((pBeamformerEntry->LogSuccess == 1) || (pBeamformerEntry->ClockResetTimes == 5)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, LogSuccess=%d, ClockResetTimes=%d, clock reset is no longer needed.\n", ++ __func__, pBeamformerEntry->LogSeq, pBeamformerEntry->PreLogSeq, pBeamformerEntry->LogRetryCnt, pBeamformerEntry->LogSuccess, pBeamformerEntry->ClockResetTimes)); ++ ++ return; ++ } ++ ++ Sequence = (pNDPAFrame[16]) >> 2; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start, Sequence=%d, LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, ClockResetTimes=%d, LogSuccess=%d\n", ++ __func__, Sequence, pBeamformerEntry->LogSeq, pBeamformerEntry->PreLogSeq, pBeamformerEntry->LogRetryCnt, pBeamformerEntry->ClockResetTimes, pBeamformerEntry->LogSuccess)); ++ ++ if ((pBeamformerEntry->LogSeq != 0) && (pBeamformerEntry->PreLogSeq != 0)) { ++ /*Success condition*/ ++ if ((pBeamformerEntry->LogSeq != Sequence) && (pBeamformerEntry->PreLogSeq != pBeamformerEntry->LogSeq)) { ++ /* break option for clcok reset, 2015-03-30, Jeffery */ ++ pBeamformerEntry->LogRetryCnt = 0; ++ /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ ++ /*That is, LogSuccess is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ ++ pBeamformerEntry->LogSuccess = 1; ++ ++ } else {/*Fail condition*/ ++ ++ if (pBeamformerEntry->LogRetryCnt == 5) { ++ pBeamformerEntry->ClockResetTimes++; ++ pBeamformerEntry->LogRetryCnt = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Clock Reset!!! ClockResetTimes=%d\n", ++ __func__, pBeamformerEntry->ClockResetTimes)); ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_CLK, NULL); ++ ++ } else ++ pBeamformerEntry->LogRetryCnt++; ++ } ++ } ++ ++ /*Update LogSeq & PreLogSeq*/ ++ pBeamformerEntry->PreLogSeq = pBeamformerEntry->LogSeq; ++ pBeamformerEntry->LogSeq = Sequence; ++ ++} ++ ++ ++ ++#endif +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.h +new file mode 100644 +index 0000000..0318ad3 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.h +@@ -0,0 +1,158 @@ ++#ifndef __HAL_TXBF_INTERFACE_H__ ++#define __HAL_TXBF_INTERFACE_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++Beamforming_GidPAid( ++ PADAPTER Adapter, ++ PRT_TCB pTcb ++ ); ++ ++RT_STATUS ++Beamforming_GetReportFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ); ++ ++VOID ++Beamforming_GetNDPAFrame( ++ IN PVOID pDM_VOID, ++ IN OCTET_STRING pduOS ++ ); ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++#ifdef SUPPORT_MU_BF ++#if (SUPPORT_MU_BF == 1) ++RT_STATUS ++Beamforming_GetVHTGIDMgntFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ); ++ ++BOOLEAN ++SendSWVHTGIDMgntFrame( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u1Byte Idx ++ ); ++ ++BOOLEAN ++SendSWVHTBFReportPoll( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN BOOLEAN bFinalPoll ++ ); ++ ++BOOLEAN ++SendSWVHTMUNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN CHANNEL_WIDTH BW ++ ); ++#else ++#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE ++#define SendSWVHTGIDMgntFrame(pDM_VOID, RA) ++#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll) ++#define SendSWVHTMUNDPAPacket(pDM_VOID, BW) ++#endif ++#endif ++ ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++u4Byte ++Beamforming_GetReportFrame( ++ IN PVOID pDM_VOID, ++ union recv_frame *precv_frame ++ ); ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++#endif ++ ++VOID ++Beamforming_GetNDPAFrame( ++ IN PVOID pDM_VOID, ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN OCTET_STRING pduOS ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ union recv_frame *precv_frame ++#endif ++); ++ ++#else ++#define Beamforming_GetNDPAFrame(pDM_Odm, _PduOS) ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define Beamforming_GetReportFrame(Adapter, precv_frame) RT_STATUS_FAILURE ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define Beamforming_GetReportFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE ++#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE ++#endif ++#define SendFWHTNDPAPacket(pDM_VOID, RA, BW) ++#define SendSWHTNDPAPacket(pDM_VOID, RA, BW) ++#define SendFWVHTNDPAPacket(pDM_VOID, RA, AID, BW) ++#define SendSWVHTNDPAPacket(pDM_VOID, RA, AID, BW) ++#define SendSWVHTGIDMgntFrame(pDM_VOID, RA, idx) ++#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll) ++#define SendSWVHTMUNDPAPacket(pDM_VOID, BW) ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.c +new file mode 100644 +index 0000000..2f18aa9 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.c +@@ -0,0 +1,527 @@ ++//============================================================ ++// Description: ++// ++// This file is for 8812/8821/8811 TXBF mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) ++VOID ++HalTxbf8812A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8812A, (Rate << 2 | BW)); ++ ++} ++ ++VOID ++halTxbfJaguar_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__)); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ // Paath_A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ // Path_B ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ } else { ++ // Paath_A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ // Path_B ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ } ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33); ++ else ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11); ++} ++ ++ ++VOID ++halTxbfJaguar_DownloadNDPA( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ BOOLEAN bSendBeacon = FALSE; ++ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = TRUE; ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (Idx == 0) ++ Head_Page = 0xFE; ++ else ++ Head_Page = 0xFE; ++ ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8812A + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8812A + 1, (u1bTmp | BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2); ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ count = 0; ++ while (!(BcnValidReg & BIT0) && count < 20) { ++ count++; ++ ODM_delay_ms(10); ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8812A + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8812A + 1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = FALSE; ++#endif ++} ++ ++ ++VOID ++halTxbfJaguar_FwTxBFCmd( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx, Period0 = 0, Period1 = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ /*Modified by David*/ ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (Idx == 0) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum0 = 0xFE; ++ else ++ PageNum0 = 0xFF; /*stop sounding*/ ++ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (Idx == 1) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum1 = 0xFE; ++ else ++ PageNum1 = 0xFF; /*stop sounding*/ ++ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = (Period1 << 4) | Period0; ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ++ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); ++} ++ ++ ++VOID ++HalTxbfJaguar_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u4Byte CSI_Param; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__)); ++ ++ halTxbfJaguar_RfMode(pDM_Odm, pBeamformingInfo); ++ ++ if (pDM_Odm->RFType == ODM_2T2R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/ ++ else ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/ ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xCB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID. */ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8812A+6, BeamformEntry.P_AID); */ ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID.*/ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8812A+6, BeamformEntry.P_AID);*/ ++ } ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x01090109; ++ else ++ CSI_Param = 0x01080108; ++ } else { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x03090309; ++ else ++ CSI_Param = 0x03080308; ++ } ++ ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, CSI_Param); ++ ++ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A + 3, 0x50); ++ } ++ ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2, STAid | BIT12 | BIT14 | BIT15); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); ++ } else { ++ /*Set BIT25*/ ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200); ++ } ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++} ++ ++ ++VOID ++HalTxbfJaguar_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx)); ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xC8); ++ if (Idx == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, 0); ++ } ++ } ++ ++ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbfJaguar_RfMode(pDM_Odm, pBeamformingInfo); ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A, 0x0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2) & 0xF000); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60); ++ } ++ } ++ ++} ++ ++ ++VOID ++HalTxbfJaguar_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8812A; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8812A + 2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= (BIT9 | BIT10); ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= (BIT9 | BIT10 | BIT11); ++ } else ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal)); ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++} ++ ++ ++ ++VOID ++HalTxbfJaguar_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbfJaguar_DownloadNDPA(pDM_Odm, Idx); ++ ++ halTxbfJaguar_FwTxBFCmd(pDM_Odm); ++} ++ ++ ++VOID ++HalTxbfJaguar_Patch( ++ IN PVOID pDM_VOID, ++ IN u1Byte Operation ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamInfo->BeamformCap == BEAMFORMING_CAP_NONE) ++ return; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (Operation == SCAN_OPT_BACKUP_BAND0) ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xC8); ++ else if (Operation == SCAN_OPT_RESTORE) ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xCB); ++#endif ++} ++ ++VOID ++HalTxbfJaguar_Clk_8812A( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte u2btmp; ++ u1Byte Count = 0, u1btmp; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (*(pDM_Odm->pbScanInProcess)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] return by Scan\n", __func__)); ++ return; ++ } ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ /*Stop PCIe TxDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE); ++#endif ++ ++ /*Stop Usb TxDMA*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISABLE_FUNC(Adapter, DF_TX_BIT); ++ PlatformReturnAllPendingTxPackets(Adapter); ++#else ++ rtw_write_port_cancel(Adapter); ++#endif ++ ++ /*Wait TXFF empty*/ ++ for (Count = 0; Count < 100; Count++) { ++ u2btmp = ODM_Read2Byte(pDM_Odm, REG_TXPKT_EMPTY_8812A); ++ u2btmp = u2btmp & 0xfff; ++ if (u2btmp != 0xfff) { ++ ODM_delay_ms(10); ++ continue; ++ } else ++ break; ++ } ++ ++ /*TX pause*/ ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0xFF); ++ ++ /*Wait TX State Machine OK*/ ++ for (Count = 0; Count < 100; Count++) { ++ if (ODM_Read4Byte(pDM_Odm, REG_SCH_TXCMD_8812A) != 0) ++ continue; ++ else ++ break; ++ } ++ ++ ++ /*Stop RX DMA path*/ ++ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); ++ ODM_Write1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT2); ++ ++ for (Count = 0; Count < 100; Count++) { ++ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); ++ if (u1btmp & BIT1) ++ break; ++ else ++ ODM_delay_ms(10); ++ } ++ ++ /*Disable clock*/ ++ ODM_Write1Byte(pDM_Odm, REG_SYS_CLKR_8812A + 1, 0xf0); ++ /*Disable 320M*/ ++ ODM_Write1Byte(pDM_Odm, REG_AFE_PLL_CTRL_8812A + 3, 0x8); ++ /*Enable 320M*/ ++ ODM_Write1Byte(pDM_Odm, REG_AFE_PLL_CTRL_8812A + 3, 0xa); ++ /*Enable clock*/ ++ ODM_Write1Byte(pDM_Odm, REG_SYS_CLKR_8812A + 1, 0xfc); ++ ++ ++ /*Release Tx pause*/ ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0); ++ ++ /*Enable RX DMA path*/ ++ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); ++ ODM_Write1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT2)); ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ /*Enable PCIe TxDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_PCIE_CTRL_REG_8812A + 1, 0); ++#endif ++ /*Start Usb TxDMA*/ ++ RT_ENABLE_FUNC(Adapter, DF_TX_BIT); ++} ++ ++#endif ++ ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.h +new file mode 100644 +index 0000000..49a5fdf +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.h +@@ -0,0 +1,67 @@ ++#ifndef __HAL_TXBF_JAGUAR_H__ ++#define __HAL_TXBF_JAGUAR_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) ++VOID ++HalTxbf8812A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++); ++ ++ ++VOID ++HalTxbfJaguar_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Patch( ++ IN PVOID pDM_VOID, ++ IN u1Byte Operation ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Clk_8812A( ++ IN PVOID pDM_VOID ++ ); ++ ++#else ++ ++#define HalTxbf8812A_setNDPArate(pDM_VOID, BW, Rate) ++#define HalTxbfJaguar_Enter(pDM_VOID, Idx) ++#define HalTxbfJaguar_Leave(pDM_VOID, Idx) ++#define HalTxbfJaguar_Status(pDM_VOID, Idx) ++#define HalTxbfJaguar_FwTxBF(pDM_VOID, Idx) ++#define HalTxbfJaguar_Patch(pDM_VOID, Operation) ++#define HalTxbfJaguar_Clk_8812A(pDM_VOID) ++#endif ++ ++#endif ++#endif // #ifndef __HAL_TXBF_JAGUAR_H__ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/Hal8188EPwrSeq.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/Hal8188EPwrSeq.c +new file mode 100644 +index 0000000..c38c25a +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/Hal8188EPwrSeq.c +@@ -0,0 +1,97 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "Hal8188EPwrSeq.h" ++#include ++ ++/* ++ drivers should parse below arrays and do the corresponding actions ++*/ ++//3 Power on Array ++WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ RTL8188E_TRANS_CARDEMU_TO_ACT ++ RTL8188E_TRANS_END ++}; ++ ++//3Radio off Array ++WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ RTL8188E_TRANS_ACT_TO_CARDEMU ++ RTL8188E_TRANS_END ++}; ++ ++//3Card Disable Array ++WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ RTL8188E_TRANS_ACT_TO_CARDEMU ++ RTL8188E_TRANS_CARDEMU_TO_CARDDIS ++ RTL8188E_TRANS_END ++}; ++ ++//3 Card Enable Array ++WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ RTL8188E_TRANS_CARDDIS_TO_CARDEMU ++ RTL8188E_TRANS_CARDEMU_TO_ACT ++ RTL8188E_TRANS_END ++}; ++ ++//3Suspend Array ++WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ RTL8188E_TRANS_ACT_TO_CARDEMU ++ RTL8188E_TRANS_CARDEMU_TO_SUS ++ RTL8188E_TRANS_END ++}; ++ ++//3 Resume Array ++WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ RTL8188E_TRANS_SUS_TO_CARDEMU ++ RTL8188E_TRANS_CARDEMU_TO_ACT ++ RTL8188E_TRANS_END ++}; ++ ++ ++//3HWPDN Array ++WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ RTL8188E_TRANS_ACT_TO_CARDEMU ++ RTL8188E_TRANS_CARDEMU_TO_PDN ++ RTL8188E_TRANS_END ++}; ++ ++//3 Enter LPS ++WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ //FW behavior ++ RTL8188E_TRANS_ACT_TO_LPS ++ RTL8188E_TRANS_END ++}; ++ ++//3 Leave LPS ++WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]= ++{ ++ //FW behavior ++ RTL8188E_TRANS_LPS_TO_ACT ++ RTL8188E_TRANS_END ++}; ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_cmd.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_cmd.c +new file mode 100644 +index 0000000..f33711f +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_cmd.c +@@ -0,0 +1,982 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8188E_CMD_C_ + -+#if (BEAMFORMING_SUPPORT == 1) -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#include ++#include ++#include "hal_com_h2c.h" ++ ++#define CONFIG_H2C_EF ++ ++#define RTL88E_MAX_H2C_BOX_NUMS 4 ++#define RTL88E_MAX_CMD_LEN 7 ++#define RTL88E_MESSAGE_BOX_SIZE 4 ++#define RTL88E_EX_MESSAGE_BOX_SIZE 4 ++ ++static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num) ++{ ++ u8 read_down = _FALSE; ++ int retry_cnts = 100; ++ ++ u8 valid; ++ ++ //DBG_8192C(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); ++ ++ do{ ++ valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); ++ if(0 == valid ){ ++ read_down = _TRUE; ++ } ++ else ++ rtw_msleep_os(1); ++ }while( (!read_down) && (retry_cnts--)); ++ ++ return read_down; ++ ++} ++ ++ ++/***************************************** ++* H2C Msg format : ++* 0x1DF - 0x1D0 ++*| 31 - 8 | 7-5 4 - 0 | ++*| h2c_msg |Class_ID CMD_ID | ++* ++* Extend 0x1FF - 0x1F0 ++*|31 - 0 | ++*|ext_msg| ++******************************************/ ++s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 h2c_box_num; ++ u32 msgbox_addr; ++ u32 msgbox_ex_addr = 0; ++ u8 cmd_idx,ext_cmd_len; ++ u32 h2c_cmd = 0; ++ u32 h2c_cmd_ex = 0; ++ s32 ret = _FAIL; ++ ++_func_enter_; ++ ++ padapter = GET_PRIMARY_ADAPTER(padapter); ++ pHalData = GET_HAL_DATA(padapter); ++ ++ if(padapter->bFWReady == _FALSE) ++ { ++ DBG_8192C("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n"); ++ return ret; ++ } ++ ++ _enter_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL); ++ ++ if (!pCmdBuffer) { ++ goto exit; ++ } ++ if (CmdLen > RTL88E_MAX_CMD_LEN) { ++ goto exit; ++ } ++ if (rtw_is_surprise_removed(padapter)) ++ goto exit; ++ ++ //pay attention to if race condition happened in H2C cmd setting. ++ do{ ++ h2c_box_num = pHalData->LastHMEBoxNum; ++ ++ if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){ ++ DBG_8192C(" fw read cmd failed...\n"); ++ goto exit; ++ } ++ ++ *(u8*)(&h2c_cmd) = ElementID; ++ ++ if(CmdLen<=3) ++ { ++ _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); ++ } ++ else{ ++ _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer,3); ++ ext_cmd_len = CmdLen-3; ++ _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer+3,ext_cmd_len ); ++ ++ //Write Ext command ++ msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *RTL88E_EX_MESSAGE_BOX_SIZE); ++ #ifdef CONFIG_H2C_EF ++ for(cmd_idx=0;cmd_idxh2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" ++ // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); ++ ++ pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS; ++ ++ }while(0); ++ ++ ret = _SUCCESS; ++ ++exit: ++ ++ _exit_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL); ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ u8 ElementID, CmdLen; ++ u8 *pCmdBuffer; ++ struct cmd_msg_parm *pcmdmsg; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ pcmdmsg = (struct cmd_msg_parm*)pbuf; ++ ElementID = pcmdmsg->eid; ++ CmdLen = pcmdmsg->sz; ++ pCmdBuffer = pcmdmsg->buf; ++ ++ FillH2CCmd_88E(padapter, ElementID, CmdLen, pCmdBuffer); ++ ++ return H2C_SUCCESS; ++} ++/* ++#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) ++u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) ++{ ++ u8 res=_SUCCESS; ++ struct H2C_SS_RFOFF_PARAM param; ++ DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); ++ param.gpio_period = period;//Polling GPIO_11 period time ++ param.ROFOn = (_TRUE == bfwpoll)?1:0; ++ FillH2CCmd_88E(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); ++ return res; ++} ++#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED ++*/ ++u8 rtl8188e_set_rssi_cmd(_adapter*padapter, u8 *param) ++{ ++ u8 res=_SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++_func_enter_; ++ ++ if(pHalData->fw_ractrl == _FALSE){ ++ DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__); ++ return _FAIL; ++ } ++ ++ *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); ++ FillH2CCmd_88E(padapter, H2C_RSSI_REPORT, 3, param); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtl8188e_set_raid_cmd(_adapter*padapter, u32 bitmap, u8* arg) ++{ ++ u8 res=_SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_info *psta ; ++ u8 macid, init_rate, raid, shortGIrate=_FALSE; ++ u8 H2CCommand[7]={0}; ++ ++ if(pHalData->fw_ractrl == _FALSE){ ++ DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__); ++ return _FAIL; ++ } ++ ++ macid = arg[0]; ++ raid = arg[1]; ++ shortGIrate = arg[2]; ++ init_rate = arg[3]; ++ ++ psta = pmlmeinfo->FW_sta_info[macid].psta; ++ if(psta == NULL){ ++ DBG_8192C("==>psta==NULL ,%s failed\n",__FUNCTION__); ++ return _FAIL; ++ } ++ ++ H2CCommand[0] = macid; ++ H2CCommand[1] = raid | (shortGIrate?0x80:0x00) ; ++ H2CCommand[2] = psta->bw_mode & 0x03; //BW; ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if(padapter->proximity.proxim_on ==_TRUE) ++ pHalData->bDisableTXPowerTraining = _FALSE; ++#endif ++ ++ //DisableTXPowerTraining ++ if(pHalData->bDisableTXPowerTraining){ ++ H2CCommand[2] |= BIT6; ++ DBG_871X("%s,Disable PWT by driver\n",__FUNCTION__); ++ } ++ else{ ++ PDM_ODM_T pDM_OutSrc = &pHalData->odmpriv; ++ ++ if(pDM_OutSrc->bDisablePowerTraining){ ++ H2CCommand[2] |= BIT6; ++ DBG_871X("%s,Disable PWT by DM\n",__FUNCTION__); ++ } ++ } ++ ++ H2CCommand[3] = (u1Byte)(bitmap & 0x000000ff); ++ H2CCommand[4] = (u1Byte)((bitmap & 0x0000ff00) >>8); ++ H2CCommand[5] = (u1Byte)((bitmap & 0x00ff0000) >> 16); ++ H2CCommand[6] = (u1Byte)((bitmap & 0xff000000) >> 24); ++ ++ FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 7, H2CCommand); ++ ++ //The firmware Rate Adaption function is triggered by TBTT INT, so to ++ // enable the rate adaption, we need to enable the hardware Beacon function Reg 0x550[3] ++ //SetBcnCtrlReg(padapter, BIT3, 0); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT3); ++ ++ return res; ++ ++} ++ ++//bitmap[0:27] = tx_rate_bitmap ++//bitmap[28:31]= Rate Adaptive id ++//arg[0:4] = macid ++//arg[5] = Short GI ++void rtl8188e_Add_RateATid(PADAPTER pAdapter, u64 rate_bitmap, u8 *arg, u8 rssi_level) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 macid, init_rate, raid, shortGIrate=_FALSE; ++ u32 bitmap = (u32) rate_bitmap; ++ ++ macid = arg[0]; ++ raid = arg[1]; ++ shortGIrate = arg[2]; ++ init_rate = arg[3]; ++ ++ bitmap &=0x0fffffff; ++ ++ if(rssi_level != DM_RATR_STA_INIT) ++ bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level); ++ ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ bitmap &= 0x0fffffff; ++ ++ DBG_871X("%s=> mac_id:%d , raid:%d , ra_bitmap=0x%x, shortGIrate=0x%02x\n", ++ __FUNCTION__,macid ,raid ,bitmap, shortGIrate); ++ ++ ++#if(RATE_ADAPTIVE_SUPPORT == 1) ++ if(!pHalData->fw_ractrl ){ ++ ODM_RA_UpdateRateInfo_8188E( ++ &(pHalData->odmpriv), ++ macid, ++ raid, ++ bitmap, ++ shortGIrate ++ ); ++ } ++ else ++#endif ++ { ++ rtl8188e_set_raid_cmd(pAdapter,bitmap,arg); ++ } ++ ++ ++} ++ ++void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode) ++{ ++ SETPWRMODE_PARM H2CSetPwrMode; ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ u8 RLBM = 0; // 0:Min, 1:Max , 2:User define ++_func_enter_; ++ ++ DBG_871X("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __FUNCTION__, ++ Mode, pwrpriv->smart_ps, padapter->registrypriv.uapsd_enable); ++ ++ H2CSetPwrMode.AwakeInterval = 2; //DTIM = 1 ++ ++ switch(Mode) ++ { ++ case PS_MODE_ACTIVE: ++ H2CSetPwrMode.Mode = 0; ++ break; ++ case PS_MODE_MIN: ++ H2CSetPwrMode.Mode = 1; ++ break; ++ case PS_MODE_MAX: ++ RLBM = 1; ++ H2CSetPwrMode.Mode = 1; ++ break; ++ case PS_MODE_DTIM: ++ RLBM = 2; ++ H2CSetPwrMode.AwakeInterval = 3; //DTIM = 2 ++ H2CSetPwrMode.Mode = 1; ++ break; ++ case PS_MODE_UAPSD_WMM: ++ H2CSetPwrMode.Mode = 2; ++ break; ++ default: ++ H2CSetPwrMode.Mode = 0; ++ break; ++ } ++ ++ //H2CSetPwrMode.Mode = Mode; ++ ++ H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps<<4)&0xf0) | (RLBM & 0x0f)); ++ ++ H2CSetPwrMode.bAllQueueUAPSD = padapter->registrypriv.uapsd_enable; ++ ++ if(Mode > 0) ++ { ++ H2CSetPwrMode.PwrState = 0x00;// AllON(0x0C), RFON(0x04), RFOFF(0x00) ++#ifdef CONFIG_EXT_CLK ++ H2CSetPwrMode.Mode |= BIT(7);//supporting 26M XTAL CLK_Request feature. ++#endif //CONFIG_EXT_CLK ++ } ++ else ++ H2CSetPwrMode.PwrState = 0x0C;// AllON(0x0C), RFON(0x04), RFOFF(0x00) ++ ++ FillH2CCmd_88E(padapter, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); ++ ++ ++_func_exit_; ++} ++ ++void rtl8188e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ) ++{ ++ u8 opmode,macid; ++ u16 mst_rpt = cpu_to_le16 (mstatus_rpt); ++ u32 reg_macid_no_link = REG_MACID_NO_LINK_0; ++ opmode = (u8) mst_rpt; ++ macid = (u8)(mst_rpt >> 8) ; ++ DBG_871X("### %s: MStatus=%x MACID=%d \n", __FUNCTION__,opmode,macid); ++ FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt); ++ ++ if(macid > 31){ ++ macid = macid-32; ++ reg_macid_no_link = REG_MACID_NO_LINK_1; ++ } ++ ++ //Delete select macid (MACID 0~63) from queue list. ++ if(opmode == 1)// 1:connect ++ { ++ rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link) & (~BIT(macid)))); ++ } ++ else//0: disconnect ++ { ++ rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link)|BIT(macid))); ++ } ++ ++ ++ ++} ++ ++void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 rate_len, pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_BEACON); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pktlen += 2; ++ ++ // capability info: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pktlen += 2; ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ //DBG_871X("ie len=%d\n", cur_network->IELength); ++ pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); ++ _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); ++ ++ goto _ConstructBeacon; ++ } ++ ++ //below for ad-hoc mode ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ u32 ATIMWindow; ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); ++ } ++ ++ ++ //todo: ERP IE ++ ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); ++ } ++ ++ ++ //todo:HT for adhoc ++ ++_ConstructBeacon: ++ ++ if ((pktlen + TXDESC_SIZE) > 512) ++ { ++ DBG_871X("beacon frame too large\n"); ++ return; ++ } ++ ++ *pLength = pktlen; ++ ++ //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); ++ ++} ++ ++void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ // Frame control. ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ SetPwrMgt(fctrl); ++ SetFrameSubType(pframe, WIFI_PSPOLL); ++ ++ // AID. ++ SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); ++ ++ // BSSID. ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ // TA. ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ ++ *pLength = 16; ++} ++ ++void ConstructNullFunctionData( ++ PADAPTER padapter, ++ u8 *pframe, ++ u32 *pLength, ++ u8 *StaAddr, ++ u8 bQoS, ++ u8 AC, ++ u8 bEosp, ++ u8 bForcePowerSave) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 pktlen; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &pmlmepriv->cur_network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ if (bForcePowerSave) ++ { ++ SetPwrMgt(fctrl); ++ } ++ ++ switch(cur_network->network.InfrastructureMode) ++ { ++ case Ndis802_11Infrastructure: ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); ++ break; ++ case Ndis802_11APMode: ++ SetFrDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); ++ break; ++ case Ndis802_11IBSS: ++ default: ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ break; ++ } ++ ++ SetSeqNum(pwlanhdr, 0); ++ ++ if (bQoS == _TRUE) { ++ struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; ++ ++ SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); ++ ++ pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos*)pframe; ++ SetPriority(&pwlanqoshdr->qc, AC); ++ SetEOSP(&pwlanqoshdr->qc, bEosp); ++ ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ } else { ++ SetFrameSubType(pframe, WIFI_DATA_NULL); ++ ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ } ++ ++ *pLength = pktlen; ++} ++ ++void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u8 *mac, *bssid; ++ u32 pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = adapter_mac_addr(padapter); ++ bssid = cur_network->MacAddress; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0); ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pframe += pktlen; ++ ++ if(cur_network->IELength>MAX_IE_SZ) ++ return; ++ ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pktlen += cur_network->IELength; ++ ++ *pLength = pktlen; ++} ++ ++void rtl8188e_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) ++{ ++ u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN]={0}; ++ u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN]={0}; ++ ++ //DBG_871X("8188RsvdPageLoc: PsPoll=%d Null=%d QoSNull=%d\n", ++ // rsvdpageloc->LocPsPoll, rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull); ++ ++ SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll); ++ SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData); ++ SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); ++ ++ FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, H2C_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm); ++ ++#ifdef CONFIG_WOWLAN ++ //DBG_871X("8188E_AOACRsvdPageLoc: RWC=%d ArpRsp=%d\n", rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp); ++ SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo); ++ SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp); ++ ++ FillH2CCmd_88E(padapter, H2C_COM_AOAC_RSVD_PAGE, H2C_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm); ++#endif ++} ++ ++// To check if reserved page content is destroyed by beacon beacuse beacon is too large. ++// 2010.06.23. Added by tynli. +VOID -+Beamforming_GidPAid( -+ PADAPTER Adapter, -+ PRT_TCB pTcb ++CheckFwRsvdPageContent( ++ IN PADAPTER Adapter +) +{ -+ u1Byte Idx = 0; -+ u1Byte RA[6] ={0}; -+ pu1Byte pHeader = GET_FRAME_OF_FIRST_FRAG(Adapter, pTcb); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); ++ u32 MaxBcnPageNum; + -+ if (Adapter->HardwareType < HARDWARE_TYPE_RTL8192EE) -+ return; -+ else if (IS_WIRELESS_MODE_N(Adapter) == FALSE) -+ return; -+ -+#if (SUPPORT_MU_BF == 1) -+ if (pTcb->TxBFPktType == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* MU NDPA */ -+#else -+ if (0) { -+#endif -+ /* Fill G_ID and P_AID */ -+ pTcb->G_ID = 63; -+ if (pBeamInfo->FirstMUBFeeIndex < BEAMFORMEE_ENTRY_NUM) { -+ pTcb->P_AID = pBeamInfo->BeamformeeEntry[pBeamInfo->FirstMUBFeeIndex].P_AID; -+ RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, pTcb->G_ID, pTcb->P_AID)); -+ } -+ } else { -+ GET_80211_HDR_ADDRESS1(pHeader, &RA); -+ -+ // VHT SU PPDU carrying one or more group addressed MPDUs or -+ // Transmitting a VHT NDP intended for multiple recipients -+ if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA) || pTcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) { -+ pTcb->G_ID = 63; -+ pTcb->P_AID = 0; -+ } else if (ACTING_AS_AP(Adapter)) { -+ u2Byte AID = (u2Byte) (MacIdGetOwnerAssociatedClientAID(Adapter, pTcb->macId) & 0x1ff); /*AID[0:8]*/ -+ -+ /*RT_DISP(FBEAM, FBEAM_FUN, ("@%s pTcb->macId=0x%X, AID=0x%X\n", __func__, pTcb->macId, AID));*/ -+ pTcb->G_ID = 63; -+ -+ if (AID == 0) /*A PPDU sent by an AP to a non associated STA*/ -+ pTcb->P_AID = 0; -+ else { /*Sent by an AP and addressed to a STA associated with that AP*/ -+ u2Byte BSSID = 0; -+ GET_80211_HDR_ADDRESS2(pHeader, &RA); -+ BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf); /*BSSID[44:47] xor BSSID[40:43]*/ -+ pTcb->P_AID = (AID + BSSID *32) & 0x1ff; /*(dec(A) + dec(B)*32) mod 512*/ -+ } -+ } else if (ACTING_AS_IBSS(Adapter)) { -+ pTcb->G_ID = 63; -+ /*P_AID for infrasturcture mode; MACID for ad-hoc mode. */ -+ pTcb->P_AID = pTcb->macId; -+ } else if (MgntLinkStatusQuery(Adapter)) { /*Addressed to AP*/ -+ pTcb->G_ID = 0; -+ GET_80211_HDR_ADDRESS1(pHeader, &RA); -+ pTcb->P_AID = RA[5]; /*RA[39:47]*/ -+ pTcb->P_AID = (pTcb->P_AID << 1) | (RA[4] >> 7 ); -+ } else { -+ pTcb->G_ID = 63; -+ pTcb->P_AID = 0; -+ } -+ /*RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, pTcb->G_ID, pTcb->P_AID));*/ -+ } ++ if(pHalData->FwRsvdPageStartOffset != 0) ++ { ++ /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); ++ RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), ++ ("CheckFwRsvdPageContent(): The reserved page content has been"\ ++ "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", ++ MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ ++ } +} + -+ -+RT_STATUS -+Beamforming_GetReportFrame( -+ IN PADAPTER Adapter, -+ IN PRT_RFD pRfd, -+ IN POCTET_STRING pPduOS -+ ) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; -+ pu1Byte pMIMOCtrlField, pCSIReport, pCSIMatrix; -+ u1Byte Idx, Nc, Nr, CH_W; -+ u2Byte CSIMatrixLen = 0; -+ -+ ACT_PKT_TYPE pktType = ACT_PKT_TYPE_UNKNOWN; -+ -+ //Memory comparison to see if CSI report is the same with previous one -+ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, Frame_Addr2(*pPduOS), &Idx); -+ -+ if (pBeamformEntry == NULL) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetReportFrame: Cannot find entry by addr\n")); -+ return RT_STATUS_FAILURE; -+ } -+ -+ pktType = PacketGetActionFrameType(pPduOS); -+ -+ //-@ Modified by David -+ if (pktType == ACT_PKT_VHT_COMPRESSED_BEAMFORMING) { -+ pMIMOCtrlField = pPduOS->Octet + 26; -+ Nc = ((*pMIMOCtrlField) & 0x7) + 1; -+ Nr = (((*pMIMOCtrlField) & 0x38) >> 3) + 1; -+ CH_W = (((*pMIMOCtrlField) & 0xC0) >> 6); -+ pCSIMatrix = pMIMOCtrlField + 3 + Nc; //24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(Nc=2) -+ CSIMatrixLen = pPduOS->Length - 26 -3 -Nc; -+ } else if (pktType == ACT_PKT_HT_COMPRESSED_BEAMFORMING) { -+ pMIMOCtrlField = pPduOS->Octet + 26; -+ Nc = ((*pMIMOCtrlField) & 0x3) + 1; -+ Nr = (((*pMIMOCtrlField) & 0xC) >> 2) + 1; -+ CH_W = (((*pMIMOCtrlField) & 0x10) >> 4); -+ pCSIMatrix = pMIMOCtrlField + 6 + Nr; //24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(Nc=2) -+ CSIMatrixLen = pPduOS->Length - 26 -6 -Nr; -+ } else -+ return RT_STATUS_SUCCESS; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx=%d, pkt type=%d, Nc=%d, Nr=%d, CH_W=%d\n", __func__, Idx, pktType, Nc, Nr, CH_W)); -+ -+ return RT_STATUS_SUCCESS; -+} -+ -+ -+VOID -+ConstructHTNDPAPacket( -+ PADAPTER Adapter, -+ pu1Byte RA, -+ pu1Byte Buffer, -+ pu4Byte pLength, -+ CHANNEL_WIDTH BW -+ ) -+{ -+ u2Byte Duration= 0; -+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); -+ OCTET_STRING pNDPAFrame,ActionContent; -+ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ -+ PlatformZeroMemory(Buffer, 32); -+ -+ SET_80211_HDR_FRAME_CONTROL(Buffer,0); -+ -+ SET_80211_HDR_ORDER(Buffer, 1); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(Buffer,Type_Action_No_Ack); -+ -+ SET_80211_HDR_ADDRESS1(Buffer, RA); -+ SET_80211_HDR_ADDRESS2(Buffer, Adapter->CurrentAddress); -+ SET_80211_HDR_ADDRESS3(Buffer, pMgntInfo->Bssid); -+ -+ Duration = 2*aSifsTime + 40; -+ -+ if (BW == CHANNEL_WIDTH_40) -+ Duration+= 87; -+ else -+ Duration+= 180; -+ -+ SET_80211_HDR_DURATION(Buffer, Duration); -+ -+ //HT control field -+ SET_HT_CTRL_CSI_STEERING(Buffer+sMacHdrLng, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(Buffer+sMacHdrLng, 1); -+ -+ FillOctetString(pNDPAFrame, Buffer, sMacHdrLng+sHTCLng); -+ -+ FillOctetString(ActionContent, ActionHdr, 4); -+ PacketAppendData(&pNDPAFrame, ActionContent); -+ -+ *pLength = 32; -+} -+ -+ -+ -+ -+BOOLEAN -+SendFWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PRT_TCB pTcb; -+ PRT_TX_LOCAL_BUFFER pBuf; -+ BOOLEAN ret = TRUE; -+ u4Byte BufLen; -+ pu1Byte BufAddr; -+ u1Byte DescLen = 0, Idx = 0, NDPTxRate; -+ PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pBeamformEntry == NULL) -+ return FALSE; -+ -+ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetFWBuffer(pDefAdapter, &pTcb, &pBuf)) { -+#if(DEV_BUS_TYPE != RT_PCI_INTERFACE) -+ DescLen = Adapter->HWDescHeadLength - pHalData->USBALLDummyLength; -+#endif -+ BufAddr = pBuf->Buffer.VirtualAddress + DescLen; -+ -+ ConstructHTNDPAPacket( -+ Adapter, -+ RA, -+ BufAddr, -+ &BufLen, -+ BW -+ ); -+ -+ pTcb->PacketLength = BufLen + DescLen; -+ -+ pTcb->bTxEnableSwCalcDur = TRUE; -+ -+ pTcb->BWOfPacket = BW; -+ -+ if(ACTING_AS_IBSS(Adapter) || ACTING_AS_AP(Adapter)) -+ pTcb->G_ID = 63; -+ -+ pTcb->P_AID = pBeamformEntry->P_AID; -+ pTcb->DataRate = NDPTxRate; /*rate of NDP decide by Nr*/ -+ -+ Adapter->HalFunc.CmdSendPacketHandler(Adapter, pTcb, pBuf, pTcb->PacketLength, DESC_PACKET_TYPE_NORMAL, FALSE); -+ } else -+ ret = FALSE; -+ -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); -+ -+ return ret; -+} -+ -+ -+BOOLEAN -+SendSWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PRT_TCB pTcb; -+ PRT_TX_LOCAL_BUFFER pBuf; -+ BOOLEAN ret = TRUE; -+ u1Byte Idx = 0, NDPTxRate = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); -+ -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { -+ ConstructHTNDPAPacket( -+ Adapter, -+ RA, -+ pBuf->Buffer.VirtualAddress, -+ &pTcb->PacketLength, -+ BW -+ ); -+ -+ pTcb->bTxEnableSwCalcDur = TRUE; -+ -+ pTcb->BWOfPacket = BW; -+ -+ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); -+ } else -+ ret = FALSE; -+ -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); -+ -+ return ret; -+} -+ -+ -+ -+VOID -+ConstructVHTNDPAPacket( -+ IN PDM_ODM_T pDM_Odm, -+ pu1Byte RA, -+ u2Byte AID, -+ pu1Byte Buffer, -+ pu4Byte pLength, -+ CHANNEL_WIDTH BW -+ ) -+{ -+ u2Byte Duration= 0; -+ u1Byte Sequence = 0; -+ pu1Byte pNDPAFrame = Buffer; -+ RT_NDPA_STA_INFO STAInfo; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ u1Byte Idx = 0; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ // Frame control. -+ SET_80211_HDR_FRAME_CONTROL(pNDPAFrame, 0); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(pNDPAFrame, Type_NDPA); -+ -+ SET_80211_HDR_ADDRESS1(pNDPAFrame, RA); -+ SET_80211_HDR_ADDRESS2(pNDPAFrame, pBeamformEntry->MyMacAddr); -+ -+ Duration = 2*aSifsTime + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ Duration += 40; -+ else if(BW == CHANNEL_WIDTH_40) -+ Duration+= 87; -+ else -+ Duration+= 180; -+ -+ SET_80211_HDR_DURATION(pNDPAFrame, Duration); -+ -+ Sequence = *(pDM_Odm->pSoundingSeq) << 2; -+ ODM_MoveMemory(pDM_Odm, pNDPAFrame+16, &Sequence, 1); -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS) || phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP) == FALSE) -+ AID = 0; -+ -+ STAInfo.AID = AID; -+ STAInfo.FeedbackType = 0; -+ STAInfo.NcIndex = 0; -+ -+ ODM_MoveMemory(pDM_Odm, pNDPAFrame+17, (pu1Byte)&STAInfo, 2); -+ -+ *pLength = 19; -+} -+ -+ -+BOOLEAN -+SendFWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PRT_TCB pTcb; -+ PRT_TX_LOCAL_BUFFER pBuf; -+ BOOLEAN ret = TRUE; -+ u4Byte BufLen; -+ pu1Byte BufAddr; -+ u1Byte DescLen = 0, Idx = 0, NDPTxRate = 0; -+ PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry =phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pBeamformEntry == NULL) -+ return FALSE; -+ -+ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); -+ -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetFWBuffer(pDefAdapter, &pTcb, &pBuf)) { -+#if(DEV_BUS_TYPE != RT_PCI_INTERFACE) -+ DescLen = Adapter->HWDescHeadLength - pHalData->USBALLDummyLength; -+#endif -+ BufAddr = pBuf->Buffer.VirtualAddress + DescLen; -+ -+ ConstructVHTNDPAPacket( -+ pDM_Odm, -+ RA, -+ AID, -+ BufAddr, -+ &BufLen, -+ BW -+ ); -+ -+ pTcb->PacketLength = BufLen + DescLen; -+ -+ pTcb->bTxEnableSwCalcDur = TRUE; -+ -+ pTcb->BWOfPacket = BW; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS) || phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) -+ pTcb->G_ID = 63; -+ -+ pTcb->P_AID = pBeamformEntry->P_AID; -+ pTcb->DataRate = NDPTxRate; /*decide by Nr*/ -+ -+ Adapter->HalFunc.CmdSendPacketHandler(Adapter, pTcb, pBuf, pTcb->PacketLength, DESC_PACKET_TYPE_NORMAL, FALSE); -+ } else -+ ret = FALSE; -+ -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End, ret=%d\n", __func__, ret)); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); -+ -+ return ret; -+} -+ -+ -+ -+BOOLEAN -+SendSWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ PRT_TCB pTcb; -+ PRT_TX_LOCAL_BUFFER pBuf; -+ BOOLEAN ret = TRUE; -+ u1Byte Idx = 0, NDPTxRate = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ -+ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); -+ -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { -+ ConstructVHTNDPAPacket( -+ pDM_Odm, -+ RA, -+ AID, -+ pBuf->Buffer.VirtualAddress, -+ &pTcb->PacketLength, -+ BW -+ ); -+ -+ pTcb->bTxEnableSwCalcDur = TRUE; -+ pTcb->BWOfPacket = BW; -+ -+ /*rate of NDP decide by Nr*/ -+ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); -+ } else -+ ret = FALSE; -+ -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); -+ -+ return ret; -+} -+ -+#ifdef SUPPORT_MU_BF -+#if (SUPPORT_MU_BF == 1) -+/* -+// Description: On VHT GID management frame by an MU beamformee. +// -+// 2015.05.20. Created by tynli. ++// Description: Get the reserved page number in Tx packet buffer. ++// Retrun value: the page number. ++// 2012.08.09, by tynli. ++// ++u8 ++GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 RsvdPageNum=0; ++ // default reseved 1 page for the IC type which is undefined. ++ u8 TxPageBndy= LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter); ++ ++ rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy); ++ ++ RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter) - TxPageBndy + 1; ++ ++ return RsvdPageNum; ++} ++ ++void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) ++{ ++ JOINBSSRPT_PARM_88E JoinBssRptParm; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++#ifdef CONFIG_WOWLAN ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sta_info *psta = NULL; ++#endif ++ BOOLEAN bSendBeacon=_FALSE; ++ BOOLEAN bcn_valid = _FALSE; ++ u8 DLBcnCount=0; ++ u32 poll = 0; ++ ++_func_enter_; ++ ++ DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); ++ ++ if(mstatus == 1) ++ { ++ // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. ++ // Suggested by filen. Added by tynli. ++ rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); ++ // Do not set TSF again here or vWiFi beacon DMA INT will not work. ++ //correct_TSF(padapter, pmlmeext); ++ // Hw sequende enable by dedault. 2010.06.23. by tynli. ++ //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); ++ //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); ++ ++ //Set REG_CR bit 8. DMA beacon by SW. ++ pHalData->RegCR_1 |= BIT0; ++ rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); ++ ++ // Disable Hw protection for a time which revserd for Hw sending beacon. ++ // Fix download reserved page packet fail that access collision with the protection time. ++ // 2010.05.11. Added by tynli. ++ //SetBcnCtrlReg(padapter, 0, BIT3); ++ //SetBcnCtrlReg(padapter, BIT4, 0); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); ++ ++ if(pHalData->RegFwHwTxQCtrl&BIT6) ++ { ++ DBG_871X("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); ++ bSendBeacon = _TRUE; ++ } ++ ++ // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); ++ pHalData->RegFwHwTxQCtrl &= (~BIT6); ++ ++ // Clear beacon valid check bit. ++ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); ++ DLBcnCount = 0; ++ poll = 0; ++ do ++ { ++ /* download rsvd page.*/ ++ rtw_hal_set_fw_rsvd_page(padapter, _FALSE); ++ DLBcnCount++; ++ do ++ { ++ rtw_yield_os(); ++ //rtw_mdelay_os(10); ++ // check rsvd page download OK. ++ rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); ++ poll++; ++ } while (!bcn_valid && (poll%10) != 0 && !RTW_CANNOT_RUN(padapter)); ++ ++ } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter)); ++ ++ //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); ++ if (RTW_CANNOT_RUN(padapter)) ++ ; ++ else if (!bcn_valid) ++ DBG_871X(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", ++ ADPT_ARG(padapter) ,DLBcnCount, poll); ++ else { ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); ++ pwrctl->fw_psmode_iface_id = padapter->iface_id; ++ DBG_871X(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", ++ ADPT_ARG(padapter), DLBcnCount, poll); ++ } ++ ++ // Enable Bcn ++ //SetBcnCtrlReg(padapter, BIT3, 0); ++ //SetBcnCtrlReg(padapter, 0, BIT4); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ // To make sure that if there exists an adapter which would like to send beacon. ++ // If exists, the origianl value of 0x422[6] will be 1, we should check this to ++ // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause ++ // the beacon cannot be sent by HW. ++ // 2010.06.23. Added by tynli. ++ if(bSendBeacon) ++ { ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); ++ pHalData->RegFwHwTxQCtrl |= BIT6; ++ } ++ ++ // ++ // Update RSVD page location H2C to Fw. ++ // ++ if(bcn_valid) ++ { ++ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); ++ DBG_871X("Set RSVD page location to Fw.\n"); ++ //FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); ++ } ++ ++ // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. ++ //if(!padapter->bEnterPnpSleep) ++ { ++ // Clear CR[8] or beacon packet will not be send to TxBuf anymore. ++ pHalData->RegCR_1 &= (~BIT0); ++ rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); ++ } ++ } ++_func_exit_; ++} ++ ++#ifdef CONFIG_P2P_PS ++void rtl8188e_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ struct P2P_PS_Offload_t *p2p_ps_offload = (struct P2P_PS_Offload_t *)(&pHalData->p2p_ps_offload); ++ u8 i; ++ ++_func_enter_; ++ ++#if 1 ++ switch(p2p_ps_state) ++ { ++ case P2P_PS_DISABLE: ++ DBG_8192C("P2P_PS_DISABLE \n"); ++ _rtw_memset(p2p_ps_offload, 0 ,1); ++ break; ++ case P2P_PS_ENABLE: ++ DBG_8192C("P2P_PS_ENABLE \n"); ++ // update CTWindow value. ++ if( pwdinfo->ctwindow > 0 ) ++ { ++ p2p_ps_offload->CTWindow_En = 1; ++ rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); ++ } ++ ++ // hw only support 2 set of NoA ++ for( i=0 ; inoa_num ; i++) ++ { ++ // To control the register setting for which NOA ++ rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); ++ if(i == 0) ++ p2p_ps_offload->NoA0_En = 1; ++ else ++ p2p_ps_offload->NoA1_En = 1; ++ ++ // config P2P NoA Descriptor Register ++ //DBG_8192C("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); ++ rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); ++ ++ //DBG_8192C("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); ++ rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); ++ ++ //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); ++ rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); ++ ++ //DBG_8192C("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); ++ rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); ++ } ++ ++ if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) ++ { ++ // rst p2p circuit ++ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); ++ ++ p2p_ps_offload->Offload_En = 1; ++ ++ if(pwdinfo->role == P2P_ROLE_GO) ++ { ++ p2p_ps_offload->role= 1; ++ p2p_ps_offload->AllStaSleep = 0; ++ } ++ else ++ { ++ p2p_ps_offload->role= 0; ++ } ++ ++ p2p_ps_offload->discovery = 0; ++ } ++ break; ++ case P2P_PS_SCAN: ++ DBG_8192C("P2P_PS_SCAN \n"); ++ p2p_ps_offload->discovery = 1; ++ break; ++ case P2P_PS_SCAN_DONE: ++ DBG_8192C("P2P_PS_SCAN_DONE \n"); ++ p2p_ps_offload->discovery = 0; ++ pwdinfo->p2p_ps_state = P2P_PS_ENABLE; ++ break; ++ default: ++ break; ++ } ++ ++ FillH2CCmd_88E(padapter, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload); ++#endif ++ ++_func_exit_; ++ ++} ++#endif //CONFIG_P2P_PS ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++/* ++ ask FW to Reset sync register at Beacon early interrupt +*/ -+RT_STATUS -+Beamforming_GetVHTGIDMgntFrame( -+ IN PADAPTER Adapter, -+ IN PRT_RFD pRfd, -+ IN POCTET_STRING pPduOS ++u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port ) ++{ ++ u8 buf[2]; ++ u8 res=_SUCCESS; ++ ++ s32 ret; ++_func_enter_; ++ if (IFACE_PORT0==reset_port) { ++ buf[0] = 0x1; buf[1] = 0; ++ } else{ ++ buf[0] = 0x0; buf[1] = 0x1; ++ } ++ ++ ret = FillH2CCmd_88E(padapter, H2C_RESET_TSF, 2, buf); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++int reset_tsf(PADAPTER Adapter, u8 reset_port ) ++{ ++ u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; ++ u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ? ++ REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1; ++ u32 reg_bcncrtl = (IFACE_PORT0==reset_port) ? ++ REG_BCN_CTRL_1:REG_BCN_CTRL; ++ ++ rtw_scan_abort(Adapter->pbuddy_adapter); /* site survey will cause reset_tsf fail */ ++ reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt); ++ rtl8188e_reset_tsf(Adapter, reset_port); ++ ++ while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) { ++ rtw_msleep_os(100); ++ loop_cnt++; ++ reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt); ++ } ++ ++ return(loop_cnt >= 10) ? _FAIL : _TRUE; ++} ++ ++ ++#endif // CONFIG_TSF_RESET_OFFLOAD +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_dm.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_dm.c +new file mode 100644 +index 0000000..01bde3c +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_dm.c +@@ -0,0 +1,530 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++#define _RTL8188E_DM_C_ ++ ++//============================================================ ++// include files ++//============================================================ ++#include ++#include ++ ++//============================================================ ++// Global var ++//============================================================ ++ ++ ++static VOID ++dm_CheckProtection( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u1Byte CurRate, RateThreshold; ++ ++ if(pMgntInfo->pHTInfo->bCurBW40MHz) ++ RateThreshold = MGN_MCS1; ++ else ++ RateThreshold = MGN_MCS3; ++ ++ if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) ++ { ++ pMgntInfo->bDmDisableProtect = TRUE; ++ DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++ else ++ { ++ pMgntInfo->bDmDisableProtect = FALSE; ++ DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++#endif ++} ++ ++static VOID ++dm_CheckStatistics( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ if(!Adapter->MgntInfo.bMediaConnect) ++ return; ++ ++ //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. ++ rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); ++ ++ // Calculate current Tx Rate(Successful transmited!!) ++ ++ // Calculate current Rx Rate(Successful received!!) ++ ++ //for tx tx retry count ++ rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); ++#endif ++} ++ ++#ifdef CONFIG_SUPPORT_HW_WPS_PBC ++static void dm_CheckPbcGPIO(_adapter *padapter) ++{ ++ u8 tmp1byte; ++ u8 bPbcPressed = _FALSE; ++ ++ if(!padapter->registrypriv.hw_wps_pbc) ++ return; ++ ++#ifdef CONFIG_USB_HCI ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode ++ ++ tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level ++ ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode ++ ++ tmp1byte =rtw_read8(padapter, GPIO_IN); ++ ++ if (tmp1byte == 0xff) ++ return ; ++ ++ if (tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT) ++ { ++ bPbcPressed = _TRUE; ++ } ++#else ++ tmp1byte = rtw_read8(padapter, GPIO_IN); ++ //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); ++ ++ if (tmp1byte == 0xff || padapter->init_adpt_in_progress) ++ return ; ++ ++ if((tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT)==0) ++ { ++ bPbcPressed = _TRUE; ++ } ++#endif ++ ++ if( _TRUE == bPbcPressed) ++ { ++ // Here we only set bPbcPressed to true ++ // After trigger PBC, the variable will be set to false ++ DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); ++ rtw_request_wps_pbc_event(padapter); ++ } ++} ++#endif//#ifdef CONFIG_SUPPORT_HW_WPS_PBC ++ ++#ifdef CONFIG_PCI_HCI ++// ++// Description: ++// Perform interrupt migration dynamically to reduce CPU utilization. ++// ++// Assumption: ++// 1. Do not enable migration under WIFI test. ++// ++// Created by Roger, 2010.03.05. ++// ++VOID ++dm_InterruptMigration( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ BOOLEAN bCurrentIntMt, bCurrentACIntDisable; ++ BOOLEAN IntMtToSet = _FALSE; ++ BOOLEAN ACIntToSet = _FALSE; ++ ++ ++ // Retrieve current interrupt migration and Tx four ACs IMR settings first. ++ bCurrentIntMt = pHalData->bInterruptMigration; ++ bCurrentACIntDisable = pHalData->bDisableTxInt; ++ ++ // ++ // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics ++ // when interrupt migration is set before. 2010.03.05. ++ // ++ if(!Adapter->registrypriv.wifi_spec && ++ (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && ++ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) ++ { ++ IntMtToSet = _TRUE; ++ ++ // To check whether we should disable Tx interrupt or not. ++ if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) ++ ACIntToSet = _TRUE; ++ } ++ ++ //Update current settings. ++ if( bCurrentIntMt != IntMtToSet ){ ++ DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); ++ if(IntMtToSet) ++ { ++ // ++ // Set interrrupt migration timer and corresponging Tx/Rx counter. ++ // timer 25ns*0xfa0=100us for 0xf packets. ++ // 2010.03.05. ++ // ++ rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ else ++ { ++ // Reset all interrupt migration settings. ++ rtw_write32(Adapter, REG_INT_MIG, 0); ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ } ++ ++ /*if( bCurrentACIntDisable != ACIntToSet ){ ++ DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); ++ if(ACIntToSet) // Disable four ACs interrupts. ++ { ++ // ++ // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. ++ // When extremely highly Rx OK occurs, we will disable Tx interrupts. ++ // 2010.03.05. ++ // ++ UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ else// Enable four ACs interrupts. ++ { ++ UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ }*/ ++ ++} ++ ++#endif ++ ++// ++// Initialize GPIO setting registers ++// ++static void ++dm_InitGPIOSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ ++ u8 tmp1byte; ++ ++ tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); ++ tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); ++ ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); ++ ++} ++ ++//============================================================ ++// functions ++//============================================================ ++static void Init_ODM_ComInfo_88E(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ u32 SupportAbility = 0; ++ u8 cut_ver,fab_ver; ++ ++ Init_ODM_ComInfo(Adapter); ++ ++ ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8188E); ++ ++ fab_ver = ODM_TSMC; ++ cut_ver = ODM_CUT_A; ++ ++ if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) ++ cut_ver = ODM_CUT_I; ++ ++ ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); ++ ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); ++ ++ #ifdef CONFIG_DISABLE_ODM ++ SupportAbility = 0; ++ #else ++ SupportAbility = ODM_RF_CALIBRATION | ++ ODM_RF_TX_PWR_TRACK ++ ; ++ /* if(pHalData->AntDivCfg) ++ SupportAbility |= ODM_BB_ANT_DIV; */ ++ #endif ++ ++ ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility); ++ ++} ++static void Update_ODM_ComInfo_88E(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ u32 SupportAbility = 0; ++ int i; ++ ++ SupportAbility = 0 ++ | ODM_BB_DIG ++ | ODM_BB_RA_MASK ++ | ODM_BB_DYNAMIC_TXPWR ++ | ODM_BB_FA_CNT ++ | ODM_BB_RSSI_MONITOR ++ | ODM_BB_CCK_PD ++ //| ODM_BB_PWR_SAVE ++ | ODM_BB_CFO_TRACKING ++ | ODM_RF_CALIBRATION ++ | ODM_RF_TX_PWR_TRACK ++ | ODM_BB_NHM_CNT ++ | ODM_BB_PRIMARY_CCA ++// | ODM_BB_PWR_TRAIN ++ ; ++ ++ if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) ++ SupportAbility |= ODM_BB_ADAPTIVITY; ++ ++ if (!Adapter->registrypriv.qos_opt_enable) { ++ SupportAbility |= ODM_MAC_EDCA_TURBO; ++ } ++ ++ if(pHalData->AntDivCfg) ++ SupportAbility |= ODM_BB_ANT_DIV; ++ ++#if (MP_DRIVER==1) ++ if (Adapter->registrypriv.mp_mode == 1) { ++ SupportAbility = 0 ++ | ODM_RF_CALIBRATION ++ | ODM_RF_TX_PWR_TRACK ++ ; ++ } ++#endif//(MP_DRIVER==1) ++ ++#ifdef CONFIG_DISABLE_ODM ++ SupportAbility = 0; ++#endif//CONFIG_DISABLE_ODM ++ ++ ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); ++} ++ ++void ++rtl8188e_InitHalDm( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ u8 i; ++ ++#ifdef CONFIG_USB_HCI ++ dm_InitGPIOSetting(Adapter); ++#endif ++ ++ pHalData->DM_Type = DM_Type_ByDriver; ++ ++ Update_ODM_ComInfo_88E(Adapter); ++ ODM_DMInit(pDM_Odm); ++} ++ ++ ++VOID ++rtl8188e_HalDmWatchDog( ++ IN PADAPTER Adapter ++ ) ++{ ++ BOOLEAN bFwCurrentInPSMode = _FALSE; ++ BOOLEAN bFwPSAwake = _TRUE; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ _func_enter_; ++ ++ if (!rtw_is_hw_init_completed(Adapter)) ++ goto skip_dm; ++ ++#ifdef CONFIG_LPS ++ bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; ++ rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); ++#endif ++ ++#ifdef CONFIG_P2P_PS ++ // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. ++ // modifed by thomas. 2011.06.11. ++ if(Adapter->wdinfo.p2p_ps_mode) ++ bFwPSAwake = _FALSE; ++#endif //CONFIG_P2P_PS ++ ++ if ((rtw_is_hw_init_completed(Adapter)) ++ && ((!bFwCurrentInPSMode) && bFwPSAwake)) { ++ // ++ // Calculate Tx/Rx statistics. ++ // ++ dm_CheckStatistics(Adapter); ++ ++ rtw_hal_check_rxfifo_full(Adapter); ++ // ++ // Dynamically switch RTS/CTS protection. ++ // ++ //dm_CheckProtection(Adapter); ++ ++#ifdef CONFIG_PCI_HCI ++ // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. ++ // Tx Migration settings. ++ //dm_InterruptMigration(Adapter); ++ ++ //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) ++ // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); ++#endif ++ ++ } ++ ++ ++ //ODM ++ if (rtw_is_hw_init_completed(Adapter)) { ++ u8 bLinked=_FALSE; ++ u8 bsta_state=_FALSE; ++ #ifdef CONFIG_DISABLE_ODM ++ pHalData->odmpriv.SupportAbility = 0; ++ #endif ++ ++ if(rtw_linked_check(Adapter)){ ++ bLinked = _TRUE; ++ if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) ++ bsta_state = _TRUE; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){ ++ bLinked = _TRUE; ++ if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE)) ++ bsta_state = _TRUE; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); ++ ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state); ++ ++ ++ ODM_DMWatchdog(&pHalData->odmpriv); ++ ++ } ++ ++skip_dm: ++ ++#ifdef CONFIG_SUPPORT_HW_WPS_PBC ++ // Check GPIO to determine current Pbc status. ++ dm_CheckPbcGPIO(Adapter); ++#endif ++ return; ++} ++ ++void rtl8188e_init_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T podmpriv = &pHalData->odmpriv; ++ ++ //_rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); ++ Init_ODM_ComInfo_88E(Adapter); ++ ODM_InitAllTimers(podmpriv ); ++ PHYDM_InitDebugSetting(podmpriv); ++} ++ ++void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T podmpriv = &pHalData->odmpriv; ++ //_rtw_spinlock_free(&pHalData->odm_stainfo_lock); ++ ODM_CancelAllTimers(podmpriv); ++} ++ ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++// Add new function to reset the state of antenna diversity before link. ++// ++// Compare RSSI for deciding antenna ++void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) ++{ ++ //PADAPTER Adapter = pDM_Odm->Adapter ; ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ if(0 != pHalData->AntDivCfg ) ++ { ++ //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), ++ // src->Rssi,query_rx_pwr_percentage(src->Rssi)); ++ //select optimum_antenna for before linked =>For antenna diversity ++ if(dst->Rssi >= src->Rssi )//keep org parameter ++ { ++ src->Rssi = dst->Rssi; ++ src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; ++ } ++ } ++} ++ ++// Add new function to reset the state of antenna diversity before link. ++u8 AntDivBeforeLink8188E(PADAPTER Adapter ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm =&pHalData->odmpriv; ++ SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ // Condition that does not need to use antenna diversity. ++ if(pHalData->AntDivCfg==0) ++ { ++ //DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); ++ return _FALSE; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ return _FALSE; ++ } ++ ++ ++ if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ ++ //switch channel ++ pDM_SWAT_Table->SWAS_NoLink_State = 1; ++ pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT; ++ ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); ++ rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); ++ //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX"); ++ return _TRUE; ++ } ++ else ++ { ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ return _FALSE; ++ } ++ ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_hal_init.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_hal_init.c +new file mode 100644 +index 0000000..a2f3c19 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_hal_init.c +@@ -0,0 +1,5533 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HAL_INIT_C_ ++ ++#include ++#include ++ ++ ++#if defined(CONFIG_IOL) ++static void iol_mode_enable(PADAPTER padapter, u8 enable) ++{ ++ u8 reg_0xf0 = 0; ++ ++ if(enable) ++ { ++ //Enable initial offload ++ reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); ++ //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0|SW_OFFLOAD_EN); ++ rtw_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN); ++ ++ if(padapter->bFWReady == _FALSE) ++ { ++ printk("bFWReady == _FALSE call reset 8051...\n"); ++ _8051Reset88E(padapter); ++ } ++ ++ } ++ else ++ { ++ //disable initial offload ++ reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); ++ //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0& ~SW_OFFLOAD_EN); ++ rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN); ++ } ++} ++ ++static s32 iol_execute(PADAPTER padapter, u8 control) ++{ ++ s32 status = _FAIL; ++ u8 reg_0x88 = 0,reg_1c7=0; ++ u32 start = 0, passing_time = 0; ++ ++ u32 t1,t2; ++ control = control&0x0f; ++ reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); ++ //DBG_871X("%s reg_0x88:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x88, reg_0x88|control); ++ rtw_write8(padapter, REG_HMEBOX_E0, reg_0x88|control); ++ ++ t1 = start = rtw_get_current_time(); ++ while( ++ //(reg_1c7 = rtw_read8(padapter, 0x1c7) >1) && ++ (reg_0x88=rtw_read8(padapter, REG_HMEBOX_E0)) & control ++ && (passing_time=rtw_get_passing_time_ms(start))<1000 ++ ) { ++ //DBG_871X("%s polling reg_0x88:0x%02x,reg_0x1c7:0x%02x\n", __FUNCTION__, reg_0x88,rtw_read8(padapter, 0x1c7) ); ++ //rtw_udelay_os(100); ++ } ++ ++ reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); ++ status = (reg_0x88 & control)?_FAIL:_SUCCESS; ++ if(reg_0x88 & control<<4) ++ status = _FAIL; ++ t2= rtw_get_current_time(); ++ //printk("==> step iol_execute : %5u reg-0x1c0= 0x%02x\n",rtw_get_time_interval_ms(t1,t2),rtw_read8(padapter, 0x1c0)); ++ //DBG_871X("%s in %u ms, reg_0x88:0x%02x\n", __FUNCTION__, passing_time, reg_0x88); ++ ++ return status; ++} ++ ++static s32 iol_InitLLTTable( ++ PADAPTER padapter, ++ u8 txpktbuf_bndy + ) +{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+ RT_STATUS rtStatus = RT_STATUS_SUCCESS; -+ pu1Byte pBuffer = NULL; -+ pu1Byte pRaddr = NULL; -+ u1Byte MemStatus[8] = {0}, UserPos[16] = {0}; -+ u1Byte idx; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMER_ENTRY pBeamformEntry = &pBeamInfo->BeamformerEntry[pBeamInfo->mu_ap_index]; ++ s32 rst = _SUCCESS; ++ iol_mode_enable(padapter, 1); ++ //DBG_871X("%s txpktbuf_bndy:%u\n", __FUNCTION__, txpktbuf_bndy); ++ rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); ++ rst = iol_execute(padapter, CMD_INIT_LLT); ++ iol_mode_enable(padapter, 0); ++ return rst; ++} + -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] On VHT GID mgnt frame!\n", __func__)); ++static VOID ++efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8 *pbuf) ++{ ++ u8 *efuseTbl = NULL; ++ u8 rtemp8; ++ u16 eFuse_Addr = 0; ++ u8 offset, wren; ++ u16 i, j; ++ u16 **eFuseWord = NULL; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ u8 u1temp = 0; + -+ /* Check length*/ -+ if (pPduOS->Length < (FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY+16)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetVHTGIDMgntFrame(): Invalid length (%d)\n", pPduOS->Length)); -+ return RT_STATUS_INVALID_LENGTH; -+ } + -+ /* Check RA*/ -+ pRaddr = (pu1Byte)(pPduOS->Octet)+4; -+ if (!eqMacAddr(pRaddr, Adapter->CurrentAddress)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetVHTGIDMgntFrame(): Drop because of RA error.\n")); -+ return RT_STATUS_PKT_DROP; -+ } -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "On VHT GID Mgnt Frame ==>:\n", pPduOS->Octet, pPduOS->Length); -+ -+ /*Parsing Membership Status Array*/ -+ pBuffer = pPduOS->Octet + FRAME_OFFSET_VHT_GID_MGNT_MEMBERSHIP_STATUS_ARRAY; -+ for (idx = 0; idx < 8; idx++) { -+ MemStatus[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(pBuffer+idx); -+ pBeamformEntry->gid_valid[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(pBuffer+idx); -+ } -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "MemStatus: ", MemStatus, 8); -+ -+ /* Parsing User Position Array*/ -+ pBuffer = pPduOS->Octet + FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY; -+ for (idx = 0; idx < 16; idx++) { -+ UserPos[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(pBuffer+idx); -+ pBeamformEntry->user_position[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(pBuffer+idx); -+ } -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "UserPos: ", UserPos, 16); -+ -+ /* Group ID detail printed*/ ++ efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E); ++ if(efuseTbl == NULL) + { -+ u1Byte i, j; -+ u1Byte tmpVal; -+ u2Byte tmpVal2; ++ DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); ++ goto exit; ++ } + -+ for (i = 0; i < 8; i++) { -+ tmpVal = MemStatus[i]; -+ tmpVal2 = ((UserPos[i*2 + 1] << 8) & 0xFF00) + (UserPos[i * 2] & 0xFF); -+ for (j = 0; j < 8; j++) { -+ if ((tmpVal >> j) & BIT0) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Use Group ID (%d), User Position (%d)\n", -+ (i*8+j), (tmpVal2 >> 2 * j)&0x3)); -+ } ++ eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, 2); ++ if(eFuseWord == NULL) ++ { ++ DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); ++ goto exit; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ // ++ // 1. Read the first byte to check if efuse is empty!!! ++ // ++ // ++ rtemp8 = *(phymap+eFuse_Addr); ++ if(rtemp8 != 0xFF) ++ { ++ efuse_utilized++; ++ //printk("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); ++ eFuse_Addr++; ++ } ++ else ++ { ++ DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, rtemp8); ++ goto exit; ++ } ++ ++ ++ // ++ // 2. Read real efuse content. Filter PG header and every section data. ++ // ++ while((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); ++ ++ // Check PG header for section num. ++ if((rtemp8 & 0x1F ) == 0x0F) //extended header ++ { ++ u1temp =( (rtemp8 & 0xE0) >> 5); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); ++ ++ rtemp8 = *(phymap+eFuse_Addr); ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); ++ ++ if((rtemp8 & 0x0F) == 0x0F) ++ { ++ eFuse_Addr++; ++ rtemp8 = *(phymap+eFuse_Addr); ++ ++ if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) ++ { ++ eFuse_Addr++; ++ } ++ continue; + } ++ else ++ { ++ offset = ((rtemp8 & 0xF0) >> 1) | u1temp; ++ wren = (rtemp8 & 0x0F); ++ eFuse_Addr++; ++ } ++ } ++ else ++ { ++ offset = ((rtemp8 >> 4) & 0x0f); ++ wren = (rtemp8 & 0x0f); ++ } ++ ++ if(offset < EFUSE_MAX_SECTION_88E) ++ { ++ // Get word enable value from PG header ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); ++ ++ for(i=0; i= EFUSE_REAL_CONTENT_LEN_88E) ++ break; ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); ++ rtemp8 = *(phymap+eFuse_Addr); ++ eFuse_Addr++; ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); ++ ++ efuse_utilized++; ++ eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00); ++ ++ if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) ++ break; ++ } ++ ++ wren >>= 1; ++ ++ } ++ } ++ ++ // Read next PG header ++ rtemp8 = *(phymap+eFuse_Addr); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); ++ ++ if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) ++ { ++ efuse_utilized++; ++ eFuse_Addr++; + } + } + -+ /* Indicate GID frame to IHV service. */ ++ // ++ // 3. Collect 16 sections and 4 word unit into Efuse map. ++ // ++ for(i=0; igid_valid, 8); -+ Indioffset += 8; -+ PlatformMoveMemory(Indibuffer + Indioffset, pBeamformEntry->user_position, 16); -+ Indioffset += 16; -+ -+ PlatformIndicateCustomStatus( -+ Adapter, -+ RT_CUSTOM_EVENT_VHT_RECV_GID_MGNT_FRAME, -+ RT_CUSTOM_INDI_TARGET_IHV, -+ Indibuffer, -+ Indioffset); ++ for(j=0; j> 8) & 0xff); ++ } + } + -+ /* Config HW GID table */ -+ halComTxbf_ConfigGtab(pDM_Odm); ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u1Byte)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN_88E); ++ //rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); ++ ++exit: ++ if(efuseTbl) ++ rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); ++ ++ if(eFuseWord) ++ rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); ++} ++ ++void efuse_read_phymap_from_txpktbuf( ++ ADAPTER *adapter, ++ int bcnhead, //beacon head, where FW store len(2-byte) and efuse physical map. ++ u8 *content, //buffer to store efuse physical map ++ u16 *size //for efuse content: the max byte to read. will update to byte read ++ ) ++{ ++ u16 dbg_addr = 0; ++ u32 start = 0, passing_time = 0; ++ u8 reg_0x143 = 0; ++ u8 reg_0x106 = 0; ++ u32 lo32 = 0, hi32 = 0; ++ u16 len = 0, count = 0; ++ int i = 0; ++ u16 limit = *size; ++ ++ u8 *pos = content; ++ ++ if(bcnhead<0) //if not valid ++ bcnhead = rtw_read8(adapter, REG_TDECTRL+1); ++ ++ DBG_871X("%s bcnhead:%d\n", __FUNCTION__, bcnhead); ++ ++ //reg_0x106 = rtw_read8(adapter, REG_PKT_BUFF_ACCESS_CTRL); ++ //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); ++ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); ++ //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(adapter, 0x106)); ++ ++ dbg_addr = bcnhead*128/8; //8-bytes addressing ++ ++ while(1) ++ { ++ //DBG_871X("%s dbg_addr:0x%x\n", __FUNCTION__, dbg_addr+i); ++ rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i); ++ ++ //DBG_871X("%s write reg_0x143:0x00\n", __FUNCTION__); ++ rtw_write8(adapter, REG_TXPKTBUF_DBG, 0); ++ start = rtw_get_current_time(); ++ while(!(reg_0x143=rtw_read8(adapter, REG_TXPKTBUF_DBG))//dbg ++ //while(rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0 ++ && (passing_time=rtw_get_passing_time_ms(start))<1000 ++ ) { ++ DBG_871X("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __FUNCTION__, reg_0x143, rtw_read8(adapter, 0x106)); ++ rtw_usleep_os(100); ++ } ++ ++ ++ lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); ++ hi32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); ++ ++ #if 0 ++ DBG_871X("%s lo32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, lo32 ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L) ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1) ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+2) ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+3) ++ ); ++ DBG_871X("%s hi32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, hi32 ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H) ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+1) ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+2) ++ , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+3) ++ ); ++ #endif ++ ++ if(i==0) ++ { ++ #if 1 //for debug ++ u8 lenc[2]; ++ u16 lenbak, aaabak; ++ u16 aaa; ++ lenc[0] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L); ++ lenc[1] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1); ++ ++ aaabak = le16_to_cpup((u16*)lenc); ++ lenbak = le16_to_cpu(*((u16*)lenc)); ++ aaa = le16_to_cpup((u16*)&lo32); ++ #endif ++ len = le16_to_cpu(*((u16*)&lo32)); ++ ++ limit = (len-2=count+2)?2:limit-count); ++ count+= (limit>=count+2)?2:limit-count; ++ pos=content+count; ++ ++ } ++ else ++ { ++ _rtw_memcpy(pos, ((u8*)&lo32), (limit>=count+4)?4:limit-count); ++ count+=(limit>=count+4)?4:limit-count; ++ pos=content+count; ++ ++ ++ } ++ ++ if(limit>count && len-2>count) { ++ _rtw_memcpy(pos, (u8*)&hi32, (limit>=count+4)?4:limit-count); ++ count+=(limit>=count+4)?4:limit-count; ++ pos=content+count; ++ } ++ ++ if(limit<=count || len-2<=count) ++ break; ++ ++ i++; ++ } ++ ++ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS); ++ ++ DBG_871X("%s read count:%u\n", __FUNCTION__, count); ++ *size = count; ++ ++} ++ ++ ++static s32 iol_read_efuse( ++ PADAPTER padapter, ++ u8 txpktbuf_bndy, ++ u16 offset, ++ u16 size_byte, ++ u8 *logical_map ++ ) ++{ ++ s32 status = _FAIL; ++ u8 reg_0x106 = 0; ++ u8 physical_map[512]; ++ u16 size = 512; ++ int i; ++ ++ ++ rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); ++ _rtw_memset(physical_map, 0xFF, 512); ++ ++ ///reg_0x106 = rtw_read8(padapter, REG_PKT_BUFF_ACCESS_CTRL); ++ //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); ++ rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); ++ //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(padapter, 0x106)); ++ ++ status = iol_execute(padapter, CMD_READ_EFUSE_MAP); ++ ++ if(status == _SUCCESS) ++ efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size); ++ ++ #if 0 ++ DBG_871X_LEVEL(_drv_always_, "%s physical map\n", __FUNCTION__); ++ for(i=0;i %s \n",__FUNCTION__); ++ ++ if(rtw_IOL_applied(padapter)){ ++ iol_mode_enable(padapter, 1); ++ result = iol_execute(padapter, CMD_READ_EFUSE_MAP); ++ if(result == _SUCCESS) ++ result = iol_execute(padapter, CMD_EFUSE_PATCH); ++ ++ iol_mode_enable(padapter, 0); ++ } ++ return result; ++} ++ ++static s32 iol_ioconfig( ++ PADAPTER padapter, ++ u8 iocfg_bndy ++ ) ++{ ++ s32 rst = _SUCCESS; ++ ++ //DBG_871X("%s iocfg_bndy:%u\n", __FUNCTION__, iocfg_bndy); ++ rtw_write8(padapter, REG_TDECTRL+1, iocfg_bndy); ++ rst = iol_execute(padapter, CMD_IOCONFIG); ++ ++ return rst; ++} ++ ++int rtl8188e_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms,u32 bndy_cnt) ++{ ++ ++ u32 start_time = rtw_get_current_time(); ++ u32 passing_time_ms; ++ u8 polling_ret,i; ++ int ret = _FAIL; ++ u32 t1,t2; ++ ++ //printk("===> %s ,bndy_cnt = %d \n",__FUNCTION__,bndy_cnt); ++ if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) ++ goto exit; ++#ifdef CONFIG_USB_HCI ++ { ++ struct pkt_attrib *pattrib = &xmit_frame->attrib; ++ if(rtw_usb_bulk_size_boundary(adapter,TXDESC_SIZE+pattrib->last_txcmdsz)) ++ { ++ if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) ++ goto exit; ++ } ++ } ++#endif //CONFIG_USB_HCI ++ ++ //rtw_IOL_cmd_buf_dump(adapter,xmit_frame->attrib.pktlen+TXDESC_OFFSET,xmit_frame->buf_addr); ++ //rtw_hal_mgnt_xmit(adapter, xmit_frame); ++ //rtw_dump_xframe_sync(adapter, xmit_frame); ++ ++ dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms); ++ ++ t1= rtw_get_current_time(); ++ iol_mode_enable(adapter, 1); ++ for(i=0;i %s : %5u\n",__FUNCTION__,rtw_get_time_interval_ms(t1,t2)); ++exit: ++ //restore BCN_HEAD ++ rtw_write8(adapter, REG_TDECTRL+1, 0); ++ return ret; ++} ++ ++void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len) ++{ ++ u32 fifo_data,reg_140; ++ u32 addr,rstatus,loop=0; ++ ++ u16 data_cnts = (data_len/8)+1; ++ u8 *pbuf =rtw_zvmalloc(data_len+10); ++ printk("###### %s ######\n",__FUNCTION__); ++ ++ rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); ++ if(pbuf){ ++ for(addr=0;addr< data_cnts;addr++){ ++ //printk("==> addr:0x%02x\n",addr); ++ rtw_write32(Adapter,0x140,addr); ++ rtw_usleep_os(2); ++ loop=0; ++ do{ ++ rstatus=(reg_140=rtw_read32(Adapter,REG_PKTBUF_DBG_CTRL)&BIT24); ++ //printk("rstatus = %02x, reg_140:0x%08x\n",rstatus,reg_140); ++ if(rstatus){ ++ fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_L); ++ //printk("fifo_data_144:0x%08x\n",fifo_data); ++ _rtw_memcpy(pbuf+(addr*8),&fifo_data , 4); ++ ++ fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_H); ++ //printk("fifo_data_148:0x%08x\n",fifo_data); ++ _rtw_memcpy(pbuf+(addr*8+4), &fifo_data, 4); ++ ++ } ++ rtw_usleep_os(2); ++ }while( !rstatus && (loop++ <10)); ++ } ++ rtw_IOL_cmd_buf_dump(Adapter,data_len,pbuf); ++ rtw_vmfree(pbuf, data_len+10); ++ ++ } ++ printk("###### %s ######\n",__FUNCTION__); ++} ++ ++#endif /* defined(CONFIG_IOL) */ ++ ++ ++static VOID ++_FWDownloadEnable_8188E( ++ IN PADAPTER padapter, ++ IN BOOLEAN enable ++ ) ++{ ++ u8 tmp; ++ ++ if(enable) ++ { ++ // MCU firmware download enable. ++ tmp = rtw_read8(padapter, REG_MCUFWDL); ++ rtw_write8(padapter, REG_MCUFWDL, tmp|0x01); ++ ++ // 8051 reset ++ tmp = rtw_read8(padapter, REG_MCUFWDL+2); ++ rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7); ++ } ++ else ++ { ++ ++ // MCU firmware download disable. ++ tmp = rtw_read8(padapter, REG_MCUFWDL); ++ rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe); ++ ++ // Reserved for fw extension. ++ rtw_write8(padapter, REG_MCUFWDL+1, 0x00); ++ } ++} ++#define MAX_REG_BOLCK_SIZE 196 ++static int ++_BlockWrite( ++ IN PADAPTER padapter, ++ IN PVOID buffer, ++ IN u32 buffSize ++ ) ++{ ++ int ret = _SUCCESS; ++ ++ u32 blockSize_p1 = 4; // (Default) Phase #1 : PCI muse use 4-byte write to download FW ++ u32 blockSize_p2 = 8; // Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. ++ u32 blockSize_p3 = 1; // Phase #3 : Use 1-byte, the remnant of FW image. ++ u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; ++ u32 remainSize_p1 = 0, remainSize_p2 = 0; ++ u8 *bufferPtr = (u8*)buffer; ++ u32 i=0, offset=0; ++#ifdef CONFIG_PCI_HCI ++ u8 remainFW[4] = {0, 0, 0, 0}; ++ u8 *p = NULL; ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ blockSize_p1 = MAX_REG_BOLCK_SIZE; ++#endif ++ ++ //3 Phase #1 ++ blockCount_p1 = buffSize / blockSize_p1; ++ remainSize_p1 = buffSize % blockSize_p1; ++ ++ if (blockCount_p1) { ++ RT_TRACE(_module_hal_init_c_, _drv_notice_, ++ ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n", ++ buffSize, blockSize_p1, blockCount_p1, remainSize_p1)); ++ } ++ ++ for (i = 0; i < blockCount_p1; i++) ++ { ++#ifdef CONFIG_USB_HCI ++ ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1)); ++#else ++ ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32*)(bufferPtr + i * blockSize_p1)))); ++#endif ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ ++#ifdef CONFIG_PCI_HCI ++ p = (u8*)((u32*)(bufferPtr + blockCount_p1 * blockSize_p1)); ++ if (remainSize_p1) { ++ switch (remainSize_p1) { ++ case 0: ++ break; ++ case 3: ++ remainFW[2]=*(p+2); ++ case 2: ++ remainFW[1]=*(p+1); ++ case 1: ++ remainFW[0]=*(p); ++ ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + blockCount_p1 * blockSize_p1), ++ le32_to_cpu(*(u32*)remainFW)); ++ } ++ return ret; ++ } ++#endif ++ ++ //3 Phase #2 ++ if (remainSize_p1) ++ { ++ offset = blockCount_p1 * blockSize_p1; ++ ++ blockCount_p2 = remainSize_p1/blockSize_p2; ++ remainSize_p2 = remainSize_p1%blockSize_p2; ++ ++ if (blockCount_p2) { ++ RT_TRACE(_module_hal_init_c_, _drv_notice_, ++ ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n", ++ (buffSize-offset), blockSize_p2 ,blockCount_p2, remainSize_p2)); ++ } ++ ++#ifdef CONFIG_USB_HCI ++ for (i = 0; i < blockCount_p2; i++) { ++ ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2)); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++#endif ++ } ++ ++ //3 Phase #3 ++ if (remainSize_p2) ++ { ++ offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2); ++ ++ blockCount_p3 = remainSize_p2 / blockSize_p3; ++ ++ RT_TRACE(_module_hal_init_c_, _drv_notice_, ++ ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n", ++ (buffSize-offset), blockSize_p3, blockCount_p3)); ++ ++ for(i = 0 ; i < blockCount_p3 ; i++){ ++ ret =rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ } ++ ++exit: ++ return ret; ++} ++ ++static int ++_PageWrite( ++ IN PADAPTER padapter, ++ IN u32 page, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ u8 value8; ++ u8 u8Page = (u8) (page & 0x07) ; ++ ++ value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page ; ++ rtw_write8(padapter, REG_MCUFWDL+2,value8); ++ ++ return _BlockWrite(padapter,buffer,size); ++} ++ ++static VOID ++_FillDummy( ++ u8* pFwBuf, ++ u32* pFwLen ++ ) ++{ ++ u32 FwLen = *pFwLen; ++ u8 remain = (u8)(FwLen%4); ++ remain = (remain==0)?0:(4-remain); ++ ++ while(remain>0) ++ { ++ pFwBuf[FwLen] = 0; ++ FwLen++; ++ remain--; ++ } ++ ++ *pFwLen = FwLen; ++} ++ ++static int ++_WriteFW( ++ IN PADAPTER padapter, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. ++ int ret = _SUCCESS; ++ u32 pageNums,remainSize ; ++ u32 page, offset; ++ u8 *bufferPtr = (u8*)buffer; ++ ++#ifdef CONFIG_PCI_HCI ++ // 20100120 Joseph: Add for 88CE normal chip. ++ // Fill in zero to make firmware image to dword alignment. ++// _FillDummy(bufferPtr, &size); ++#endif ++ ++ pageNums = size / MAX_DLFW_PAGE_SIZE ; ++ //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n")); ++ remainSize = size % MAX_DLFW_PAGE_SIZE; ++ ++ for (page = 0; page < pageNums; page++) { ++ offset = page * MAX_DLFW_PAGE_SIZE; ++ ret = _PageWrite(padapter, page, bufferPtr+offset, MAX_DLFW_PAGE_SIZE); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ if (remainSize) { ++ offset = pageNums * MAX_DLFW_PAGE_SIZE; ++ page = pageNums; ++ ret = _PageWrite(padapter, page, bufferPtr+offset, remainSize); ++ ++ if(ret == _FAIL) ++ goto exit; ++ ++ } ++ RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n")); ++ ++exit: ++ return ret; ++} ++ ++void _MCUIO_Reset88E(PADAPTER padapter,u8 bReset) ++{ ++ u8 u1bTmp; ++ ++ if(bReset==_TRUE){ ++ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL); ++ rtw_write8(padapter,REG_RSV_CTRL, (u1bTmp&(~BIT1))); ++ // Reset MCU IO Wrapper- sugggest by SD1-Gimmy ++ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); ++ rtw_write8(padapter,REG_RSV_CTRL+1, (u1bTmp&(~BIT3))); ++ }else{ ++ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL); ++ rtw_write8(padapter,REG_RSV_CTRL, (u1bTmp&(~BIT1))); ++ // Enable MCU IO Wrapper ++ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); ++ rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp|BIT3); ++ } ++ ++} ++ ++void _8051Reset88E(PADAPTER padapter) ++{ ++ u8 u1bTmp; ++ ++ _MCUIO_Reset88E(padapter,_TRUE); ++ u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); ++ rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2)); ++ _MCUIO_Reset88E(padapter,_FALSE); ++ rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2)); ++ ++ DBG_871X("=====> _8051Reset88E(): 8051 reset success .\n"); ++} ++ ++static s32 polling_fwdl_chksum(_adapter *adapter, u32 min_cnt, u32 timeout_ms) ++{ ++ s32 ret = _FAIL; ++ u32 value32; ++ u32 start = rtw_get_current_time(); ++ u32 cnt = 0; ++ ++ /* polling CheckSum report */ ++ do { ++ cnt++; ++ value32 = rtw_read32(adapter, REG_MCUFWDL); ++ if (value32 & FWDL_ChkSum_rpt || RTW_CANNOT_RUN(adapter)) ++ break; ++ rtw_yield_os(); ++ } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); ++ ++ if (!(value32 & FWDL_ChkSum_rpt)) { ++ goto exit; ++ } ++ ++ if (rtw_fwdl_test_trigger_chksum_fail()) ++ goto exit; ++ ++ ret = _SUCCESS; ++ ++exit: ++ DBG_871X("%s: Checksum report %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ ++ , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32); ++ ++ return ret; ++} ++ ++static s32 _FWFreeToGo(_adapter *adapter, u32 min_cnt, u32 timeout_ms) ++{ ++ s32 ret = _FAIL; ++ u32 value32; ++ u32 start = rtw_get_current_time(); ++ u32 cnt = 0; ++ ++ value32 = rtw_read32(adapter, REG_MCUFWDL); ++ value32 |= MCUFWDL_RDY; ++ value32 &= ~WINTINI_RDY; ++ rtw_write32(adapter, REG_MCUFWDL, value32); ++ ++ _8051Reset88E(adapter); ++ ++ /* polling for FW ready */ ++ do { ++ cnt++; ++ value32 = rtw_read32(adapter, REG_MCUFWDL); ++ if (value32 & WINTINI_RDY || RTW_CANNOT_RUN(adapter)) ++ break; ++ rtw_yield_os(); ++ } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); ++ ++ if (!(value32 & WINTINI_RDY)) { ++ goto exit; ++ } ++ ++ if (rtw_fwdl_test_trigger_wintint_rdy_fail()) ++ goto exit; ++ ++ ret = _SUCCESS; ++ ++exit: ++ DBG_871X("%s: Polling FW ready %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ ++ , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32); ++ return ret; ++} ++ ++#define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0) ++ ++ ++#ifdef CONFIG_FILE_FWIMG ++extern char *rtw_fw_file_path; ++extern char *rtw_fw_wow_file_path; ++u8 FwBuffer8188E[FW_8188E_SIZE]; ++#endif //CONFIG_FILE_FWIMG ++ ++// ++// Description: ++// Download 8192C firmware code. ++// ++// ++s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) ++{ ++ s32 rtStatus = _SUCCESS; ++ u8 write_fw = 0; ++ u32 fwdl_start_time; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ ++ PRT_FIRMWARE_8188E pFirmware = NULL; ++ PRT_8188E_FIRMWARE_HDR pFwHdr = NULL; ++ ++ u8 *pFirmwareBuf; ++ u32 FirmwareLen,tmp_fw_len=0; ++#ifdef CONFIG_FILE_FWIMG ++ u8 *fwfilepath; ++#endif // CONFIG_FILE_FWIMG ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++#endif ++ ++ RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __FUNCTION__)); ++ pFirmware = (PRT_FIRMWARE_8188E)rtw_zmalloc(sizeof(RT_FIRMWARE_8188E)); ++ if(!pFirmware) ++ { ++ rtStatus = _FAIL; ++ goto exit; ++ } ++ ++ ++// RT_TRACE(_module_hal_init_c_, _drv_err_, ("%s: %s\n",__FUNCTION__, pFwImageFileName)); ++ ++#ifdef CONFIG_FILE_FWIMG ++#ifdef CONFIG_WOWLAN ++ if (bUsedWoWLANFw) ++ { ++ fwfilepath = rtw_fw_wow_file_path; ++ } ++ else ++#endif // CONFIG_WOWLAN ++ { ++ fwfilepath = rtw_fw_file_path; ++ } ++#endif // CONFIG_FILE_FWIMG ++ ++#ifdef CONFIG_FILE_FWIMG ++ if(rtw_is_file_readable(fwfilepath) == _TRUE) ++ { ++ DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, fwfilepath); ++ pFirmware->eFWSource = FW_SOURCE_IMG_FILE; ++ } ++ else ++#endif //CONFIG_FILE_FWIMG ++ { ++ pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; ++ } ++ ++ switch(pFirmware->eFWSource) ++ { ++ case FW_SOURCE_IMG_FILE: ++ #ifdef CONFIG_FILE_FWIMG ++ rtStatus = rtw_retrieve_from_file(fwfilepath, FwBuffer8188E, FW_8188E_SIZE); ++ pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; ++ pFirmware->szFwBuffer = FwBuffer8188E; ++ #endif //CONFIG_FILE_FWIMG ++ break; ++ case FW_SOURCE_HEADER_FILE: ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ if(bUsedWoWLANFw) { ++ #ifdef CONFIG_SFW_SUPPORTED ++ if (IS_VENDOR_8188E_I_CUT_SERIES(padapter)) { ++ ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_WoWLAN_2, ++ (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength)); ++ } else ++ #endif ++ { ++ if (!pwrpriv->wowlan_ap_mode) { ++ ODM_ConfigFWWithHeaderFile( ++ &pHalData->odmpriv, ++ CONFIG_FW_WoWLAN, ++ (u8 *)&(pFirmware->szFwBuffer), ++ &(pFirmware->ulFwLength)); ++ DBG_871X("%s fw:%s, size: %d\n", __func__, ++ "WoWLAN", pFirmware->ulFwLength); ++ } else { ++ ODM_ConfigFWWithHeaderFile( ++ &pHalData->odmpriv, ++ CONFIG_FW_AP, ++ (u8 *)&(pFirmware->szFwBuffer), ++ &(pFirmware->ulFwLength)); ++ DBG_871X("%s fw: %s, size: %d\n", __func__, ++ "AP_WoWLAN", pFirmware->ulFwLength); ++ } ++ } ++ ++ }else ++#endif //CONFIG_WOWLAN ++ { ++ #ifdef CONFIG_SFW_SUPPORTED ++ if(IS_VENDOR_8188E_I_CUT_SERIES(padapter)) ++ ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_NIC_2, ++ (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength)); ++ else ++ #endif ++ ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_NIC, ++ (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength)); ++ DBG_871X("%s fw:%s, size: %d\n", __FUNCTION__, "NIC", pFirmware->ulFwLength); ++ } ++ break; ++ } ++ ++ tmp_fw_len = IS_VENDOR_8188E_I_CUT_SERIES(padapter)?FW_8188E_SIZE_2:FW_8188E_SIZE; ++ ++ if (pFirmware->ulFwLength > tmp_fw_len) { ++ rtStatus = _FAIL; ++ DBG_871X_LEVEL(_drv_emerg_, "Firmware size:%u exceed %u\n", pFirmware->ulFwLength, tmp_fw_len); ++ goto exit; ++ } ++ ++ pFirmwareBuf = pFirmware->szFwBuffer; ++ FirmwareLen = pFirmware->ulFwLength; ++ ++ // To Check Fw header. Added by tynli. 2009.12.04. ++ pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmwareBuf; ++ ++ pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version); ++ pHalData->FirmwareSubVersion = pFwHdr->Subversion; ++ pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature); ++ ++ DBG_871X("%s: fw_ver=%x fw_subver=%04x sig=0x%x, Month=%02x, Date=%02x, Hour=%02x, Minute=%02x\n", ++ __FUNCTION__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature ++ ,pFwHdr->Month,pFwHdr->Date,pFwHdr->Hour,pFwHdr->Minute); ++ ++ if (IS_FW_HEADER_EXIST_88E(pFwHdr)) ++ { ++ // Shift 32 bytes for FW header ++ pFirmwareBuf = pFirmwareBuf + 32; ++ FirmwareLen = FirmwareLen - 32; ++ } ++ ++ // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, ++ // or it will cause download Fw fail. 2010.02.01. by tynli. ++ if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) //8051 RAM code ++ { ++ rtw_write8(padapter, REG_MCUFWDL, 0x00); ++ _8051Reset88E(padapter); ++ } ++ ++ _FWDownloadEnable_8188E(padapter, _TRUE); ++ fwdl_start_time = rtw_get_current_time(); ++ while (!RTW_CANNOT_RUN(padapter) ++ && (write_fw++ < 3 || rtw_get_passing_time_ms(fwdl_start_time) < 500)) ++ { ++ /* reset FWDL chksum */ ++ rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL)|FWDL_ChkSum_rpt); ++ ++ rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen); ++ if (rtStatus != _SUCCESS) ++ continue; ++ ++ rtStatus = polling_fwdl_chksum(padapter, 5, 50); ++ if (rtStatus == _SUCCESS) ++ break; ++ } ++ _FWDownloadEnable_8188E(padapter, _FALSE); ++ if(_SUCCESS != rtStatus) ++ goto fwdl_stat; ++ ++ rtStatus = _FWFreeToGo(padapter, 10, 200); ++ if (_SUCCESS != rtStatus) ++ goto fwdl_stat; ++ ++fwdl_stat: ++ DBG_871X("FWDL %s. write_fw:%u, %dms\n" ++ , (rtStatus == _SUCCESS)?"success":"fail" ++ , write_fw ++ , rtw_get_passing_time_ms(fwdl_start_time) ++ ); ++ ++exit: ++ if (pFirmware) ++ rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8188E)); + + return rtStatus; +} + -+/* -+// Description: Construct VHT Group ID (GID) management frame. ++void rtl8188e_InitializeFirmwareVars(PADAPTER padapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ ++ // Init Fw LPS related. ++ pwrpriv->bFwCurrentInPSMode = _FALSE; ++ ++ //Init H2C cmd. ++ rtw_write8(padapter, REG_HMETFR, 0x0f); ++ ++ // Init H2C counter. by tynli. 2009.12.09. ++ pHalData->LastHMEBoxNum = 0; ++} ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++//=========================================== ++ ++// ++// Description: Prepare some information to Fw for WoWLAN. ++// (1) Download wowlan Fw. ++// (2) Download RSVD page packets. ++// (3) Enable AP offload if needed. ++// ++// 2011.04.12 by tynli. +// -+// 2015.05.20. Created by tynli. -+*/ +VOID -+ConstructVHTGIDMgntFrame( -+ IN PDM_ODM_T pDM_Odm, -+ IN pu1Byte RA, -+ IN PRT_BEAMFORMEE_ENTRY pBeamformEntry, -+ OUT pu1Byte Buffer, -+ OUT pu4Byte pLength -+ ++SetFwRelatedForWoWLAN8188ES( ++ IN PADAPTER padapter, ++ IN u8 bHostIsGoingtoSleep +) +{ -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PADAPTER Adapter = pBeamInfo->SourceAdapter; -+ OCTET_STRING osFTMFrame, tmp; ++ int status=_FAIL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 bRecover = _FALSE; ++ // ++ // 1. Before WoWLAN we need to re-download WoWLAN Fw. ++ // ++ status = rtl8188e_FirmwareDownload(padapter, bHostIsGoingtoSleep); ++ if(status != _SUCCESS) { ++ DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware failed!!\n"); ++ return; ++ } else { ++ DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware Success !!\n"); ++ } ++ // ++ // 2. Re-Init the variables about Fw related setting. ++ // ++ rtl8188e_InitializeFirmwareVars(padapter); ++} ++#endif /*CONFIG_WOWLAN || CONFIG_AP_WOWLAN*/ + -+ FillOctetString(osFTMFrame, Buffer, 0); -+ *pLength = 0; ++//=========================================================== ++// Efuse related code ++//=========================================================== ++enum{ ++ VOLTAGE_V25 = 0x03, ++ LDOE25_SHIFT = 28 , ++ }; + -+ ConstructMaFrameHdr( -+ Adapter, -+ RA, -+ ACT_CAT_VHT, -+ ACT_VHT_GROUPID_MANAGEMENT, -+ &osFTMFrame); ++static BOOLEAN ++hal_EfusePgPacketWrite2ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWrite1ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWriteData( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); + -+ /* Membership Status Array*/ -+ FillOctetString(tmp, pBeamformEntry->gid_valid, 8); -+ PacketAppendData(&osFTMFrame, tmp); ++static VOID ++hal_EfusePowerSwitch_RTL8188E( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ u8 tempval; ++ u16 tmpV16; + -+ /* User Position Array*/ -+ FillOctetString(tmp, pBeamformEntry->user_position, 16); -+ PacketAppendData(&osFTMFrame, tmp); ++ if (PwrState == _TRUE) ++ { ++ rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); ++#if 0 ++ // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); ++ if( ! (tmpV16 & PWC_EV12V ) ){ ++ tmpV16 |= PWC_EV12V ; ++ rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); ++ } ++#endif ++ // Reset: 0x0000h[28], default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); ++ if( !(tmpV16 & FEN_ELDR) ){ ++ tmpV16 |= FEN_ELDR ; ++ rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); ++ } + -+ *pLength = osFTMFrame.Length; ++ // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); ++ if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ){ ++ tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; ++ rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); ++ } + -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "ConstructVHTGIDMgntFrame():\n", Buffer, *pLength); ++ if(bWrite == _TRUE) ++ { ++ // Enable LDO 2.5V before read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ if(IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)){ ++ tempval &= 0x87; ++ tempval |= 0x38; // 0x34[30:27] = 0b'0111, Use LDO 2.25V, Suggested by SD1 Pisa ++ } ++ else{ ++ tempval &= 0x0F; ++ tempval |= (VOLTAGE_V25 << 4); ++ } ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); ++ } ++ } ++ else ++ { ++ rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); ++ ++ if(bWrite == _TRUE){ ++ // Disable LDO 2.5V after read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); ++ } ++ } +} + -+BOOLEAN -+SendSWVHTGIDMgntFrame( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u1Byte Idx ++static VOID ++rtl8188e_EfusePowerSwitch( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState); ++} ++ ++ ++ ++static bool efuse_read_phymap( ++ PADAPTER Adapter, ++ u8 *pbuf, //buffer to store efuse physical map ++ u16 *size //the max byte to read. will update to byte read + ) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_TCB pTcb; -+ PRT_TX_LOCAL_BUFFER pBuf; -+ BOOLEAN ret = TRUE; -+ u1Byte DataRate = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = &pBeamInfo->BeamformeeEntry[Idx]; -+ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ u8 *pos = pbuf; ++ u16 limit = *size; ++ u16 addr = 0; ++ bool reach_end = _FALSE; + -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { -+ ConstructVHTGIDMgntFrame( -+ pDM_Odm, -+ RA, -+ pBeamformEntry, -+ pBuf->Buffer.VirtualAddress, -+ &pTcb->PacketLength -+ ); -+ -+ pTcb->BWOfPacket = CHANNEL_WIDTH_20; -+ DataRate = MGN_6M; -+ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, DataRate); -+ } else -+ ret = FALSE; -+ -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); -+ -+ return ret; -+} -+ -+ -+/* -+// Description: Construct VHT beamforming report poll. -+// -+// 2015.05.20. Created by tynli. -+*/ -+VOID -+ConstructVHTBFReportPoll( -+ IN PDM_ODM_T pDM_Odm, -+ IN pu1Byte RA, -+ OUT pu1Byte Buffer, -+ OUT pu4Byte pLength -+) -+{ -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PADAPTER Adapter = pBeamInfo->SourceAdapter; -+ pu1Byte pBFRptPoll = Buffer; -+ -+ /* Frame control*/ -+ SET_80211_HDR_FRAME_CONTROL(pBFRptPoll, 0); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(pBFRptPoll, Type_Beamforming_Report_Poll); -+ -+ /* Duration*/ -+ SET_80211_HDR_DURATION(pBFRptPoll, 100); -+ -+ /* RA*/ -+ SET_VHT_BF_REPORT_POLL_RA(pBFRptPoll, RA); -+ -+ /* TA*/ -+ SET_VHT_BF_REPORT_POLL_TA(pBFRptPoll, Adapter->CurrentAddress); -+ -+ /* Feedback Segment Retransmission Bitmap*/ -+ SET_VHT_BF_REPORT_POLL_FEEDBACK_SEG_RETRAN_BITMAP(pBFRptPoll, 0xFF); -+ -+ *pLength = 17; -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "ConstructVHTBFReportPoll():\n", Buffer, *pLength); -+ -+} -+ -+BOOLEAN -+SendSWVHTBFReportPoll( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN BOOLEAN bFinalPoll -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_TCB pTcb; -+ PRT_TX_LOCAL_BUFFER pBuf; -+ BOOLEAN ret = TRUE; -+ u1Byte Idx = 0, DataRate = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ PADAPTER Adapter = pBeamInfo->SourceAdapter; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { -+ ConstructVHTBFReportPoll( -+ pDM_Odm, -+ RA, -+ pBuf->Buffer.VirtualAddress, -+ &pTcb->PacketLength -+ ); -+ -+ pTcb->bTxEnableSwCalcDur = TRUE; /* need?*/ -+ pTcb->BWOfPacket = CHANNEL_WIDTH_20; -+ -+ if (bFinalPoll) -+ pTcb->TxBFPktType = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL; -+ else -+ pTcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL; ++ // ++ // Refresh efuse init map as all 0xFF. ++ // ++ _rtw_memset(pbuf, 0xFF, limit); + -+ DataRate = MGN_6M; /* Legacy OFDM rate*/ -+ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, DataRate); -+ } else -+ ret = FALSE; + -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "SendSWVHTBFReportPoll():\n", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); -+ -+ return ret; -+ -+} -+ -+ -+/* -+// Description: Construct VHT MU NDPA packet. -+// We should combine this function with ConstructVHTNDPAPacket() in the future. -+// -+// 2015.05.21. Created by tynli. -+*/ -+VOID -+ConstructVHTMUNDPAPacket( -+ IN PDM_ODM_T pDM_Odm, -+ IN CHANNEL_WIDTH BW, -+ OUT pu1Byte Buffer, -+ OUT pu4Byte pLength -+ ) -+{ -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PADAPTER Adapter = pBeamInfo->SourceAdapter; -+ u2Byte Duration = 0; -+ u1Byte Sequence = 0; -+ pu1Byte pNDPAFrame = Buffer; -+ RT_NDPA_STA_INFO STAInfo; -+ u1Byte idx; -+ u1Byte DestAddr[6] = {0}; -+ PRT_BEAMFORMEE_ENTRY pEntry = NULL; -+ -+ /* Fill the first MU BFee entry (STA1) MAC addr to destination address then -+ HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); -+ if (pEntry->is_mu_sta) { -+ cpMacAddr(DestAddr, pEntry->MacAddr); ++ // ++ // Read physical efuse content. ++ // ++ while(addr < limit) ++ { ++ ReadEFuseByte(Adapter, addr, pos, _FALSE); ++ if(*pos != 0xFF) ++ { ++ pos++; ++ addr++; ++ } ++ else ++ { ++ reach_end = _TRUE; + break; + } + } -+ if (pEntry == NULL) -+ return; + -+ /* Frame control.*/ -+ SET_80211_HDR_FRAME_CONTROL(pNDPAFrame, 0); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(pNDPAFrame, Type_NDPA); ++ *size = addr; + -+ SET_80211_HDR_ADDRESS1(pNDPAFrame, DestAddr); -+ SET_80211_HDR_ADDRESS2(pNDPAFrame, pEntry->MyMacAddr); -+ -+ /*--------------------------------------------*/ -+ /* Need to modify "Duration" to MU consideration. */ -+ Duration = 2*aSifsTime + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ Duration += 40; -+ else if(BW == CHANNEL_WIDTH_40) -+ Duration+= 87; -+ else -+ Duration+= 180; -+ /*--------------------------------------------*/ -+ -+ SET_80211_HDR_DURATION(pNDPAFrame, Duration); -+ -+ Sequence = *(pDM_Odm->pSoundingSeq) << 2; -+ ODM_MoveMemory(pDM_Odm, pNDPAFrame + 16, &Sequence, 1); -+ -+ *pLength = 17; -+ -+ /* Construct STA info. for multiple STAs*/ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); -+ if (pEntry->is_mu_sta) { -+ STAInfo.AID = pEntry->AID; -+ STAInfo.FeedbackType = 1; /* 1'b1: MU*/ -+ STAInfo.NcIndex = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get BeamformeeEntry idx(%d), AID =%d\n", __func__, idx, pEntry->AID)); -+ -+ ODM_MoveMemory(pDM_Odm, pNDPAFrame+(*pLength), (pu1Byte)&STAInfo, 2); -+ *pLength += 2; -+ } -+ } ++ return reach_end; + +} + -+BOOLEAN -+SendSWVHTMUNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN CHANNEL_WIDTH BW ++static VOID ++Hal_EfuseReadEFuse88E( ++ PADAPTER Adapter, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest + ) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_TCB pTcb; -+ PRT_TX_LOCAL_BUFFER pBuf; -+ BOOLEAN ret = TRUE; -+ u1Byte NDPTxRate = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ //u8 efuseTbl[EFUSE_MAP_LEN_88E]; ++ u8 *efuseTbl = NULL; ++ u8 rtemp8[1]; ++ u16 eFuse_Addr = 0; ++ u8 offset, wren; ++ u16 i, j; ++ //u16 eFuseWord[EFUSE_MAX_SECTION_88E][EFUSE_MAX_WORD_UNIT]; ++ u16 **eFuseWord = NULL; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ u8 u1temp = 0; + -+ NDPTxRate = MGN_VHT2SS_MCS0; -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ // ++ // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. ++ // ++ if((_offset + _size_byte)>EFUSE_MAP_LEN_88E) ++ {// total E-Fuse table is 512bytes ++ DBG_8192C("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte); ++ goto exit; ++ } + -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E); ++ if(efuseTbl == NULL) ++ { ++ DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); ++ goto exit; ++ } + -+ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { -+ ConstructVHTMUNDPAPacket( -+ pDM_Odm, -+ BW, -+ pBuf->Buffer.VirtualAddress, -+ &pTcb->PacketLength ++ eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, 2); ++ if(eFuseWord == NULL) ++ { ++ DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); ++ goto exit; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ // ++ // 1. Read the first byte to check if efuse is empty!!! ++ // ++ // ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ if(*rtemp8 != 0xFF) ++ { ++ efuse_utilized++; ++ //DBG_8192C("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); ++ eFuse_Addr++; ++ } ++ else ++ { ++ DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); ++ goto exit; ++ } ++ ++ ++ // ++ // 2. Read real efuse content. Filter PG header and every section data. ++ // ++ while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); ++ ++ // Check PG header for section num. ++ if((*rtemp8 & 0x1F ) == 0x0F) //extended header ++ { ++ u1temp =( (*rtemp8 & 0xE0) >> 5); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); ++ ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); ++ ++ if((*rtemp8 & 0x0F) == 0x0F) ++ { ++ eFuse_Addr++; ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ ++ if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) ++ { ++ eFuse_Addr++; ++ } ++ continue; ++ } ++ else ++ { ++ offset = ((*rtemp8 & 0xF0) >> 1) | u1temp; ++ wren = (*rtemp8 & 0x0F); ++ eFuse_Addr++; ++ } ++ } ++ else ++ { ++ offset = ((*rtemp8 >> 4) & 0x0f); ++ wren = (*rtemp8 & 0x0f); ++ } ++ ++ if(offset < EFUSE_MAX_SECTION_88E) ++ { ++ // Get word enable value from PG header ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); ++ ++ for(i=0; i= EFUSE_REAL_CONTENT_LEN_88E) ++ break; ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ eFuse_Addr++; ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); ++ ++ efuse_utilized++; ++ eFuseWord[offset][i] |= (((u2Byte)*rtemp8 << 8) & 0xff00); ++ ++ if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) ++ break; ++ } ++ ++ wren >>= 1; ++ ++ } ++ } ++ else{//deal with error offset,skip error data ++ DBG_871X_LEVEL(_drv_always_, "invalid offset:0x%02x \n",offset); ++ for(i=0; i= EFUSE_REAL_CONTENT_LEN_88E) ++ break; ++ eFuse_Addr++; ++ efuse_utilized++; ++ if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) ++ break; ++ } ++ } ++ } ++ // Read next PG header ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); ++ ++ if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) ++ { ++ efuse_utilized++; ++ eFuse_Addr++; ++ } ++ } ++ ++ // ++ // 3. Collect 16 sections and 4 word unit into Efuse map. ++ // ++ for(i=0; i> 8) & 0xff); ++ } ++ } ++ ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u1Byte)((eFuse_Addr*100)/EFUSE_REAL_CONTENT_LEN_88E); ++ rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); ++ ++exit: ++ if(efuseTbl) ++ rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); ++ ++ if(eFuseWord) ++ rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); ++} ++ ++ ++static BOOLEAN ++Hal_EfuseSwitchToBank( ++ IN PADAPTER pAdapter, ++ IN u8 bank, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet = _FALSE; ++ u32 value32=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank)); ++ if(bPseudoTest) ++ { ++ fakeEfuseBank = bank; ++ bRet = _TRUE; ++ } ++ else ++ { ++ bRet = _TRUE; ++ } ++ return bRet; ++} ++ ++ ++ ++static VOID ++ReadEFuseByIC( ++ PADAPTER Adapter, ++ u8 efuseType, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++#ifdef DBG_IOL_READ_EFUSE_MAP ++ u8 logical_map[512]; ++#endif ++ ++#ifdef CONFIG_IOL_READ_EFUSE_MAP ++ if(!bPseudoTest )//&& rtw_IOL_applied(Adapter)) ++ { ++ int ret = _FAIL; ++ if(rtw_IOL_applied(Adapter)) ++ { ++ rtw_hal_power_on(Adapter); ++ ++ iol_mode_enable(Adapter, 1); ++ #ifdef DBG_IOL_READ_EFUSE_MAP ++ iol_read_efuse(Adapter, 0, _offset, _size_byte, logical_map); ++ #else ++ ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); ++ #endif ++ iol_mode_enable(Adapter, 0); ++ ++ if(_SUCCESS == ret) ++ goto exit; ++ } ++ } ++#endif ++ Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); ++ ++exit: ++ ++#ifdef DBG_IOL_READ_EFUSE_MAP ++ if(_rtw_memcmp(logical_map, pHalData->efuse_eeprom_data, 0x130) == _FALSE) ++ { ++ int i; ++ DBG_871X("%s compare first 0x130 byte fail\n", __FUNCTION__); ++ for(i=0;i<512;i++) ++ { ++ if(i%16==0) ++ DBG_871X("0x%03x: ", i); ++ DBG_871X("%02x ", logical_map[i]); ++ if(i%16==15) ++ DBG_871X("\n"); ++ } ++ DBG_871X("\n"); ++ } ++#endif ++ ++ return; ++} ++ ++static VOID ++ReadEFuse_Pseudo( ++ PADAPTER Adapter, ++ u8 efuseType, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); ++} ++ ++static VOID ++rtl8188e_ReadEFuse( ++ PADAPTER Adapter, ++ u8 efuseType, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ if(bPseudoTest) ++ { ++ ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); ++ } ++ else ++ { ++ ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); ++ } ++} ++ ++//Do not support BT ++VOID ++Hal_EFUSEGetEfuseDefinition88E( ++ IN PADAPTER pAdapter, ++ IN u1Byte efuseType, ++ IN u1Byte type, ++ OUT PVOID pOut ++ ) ++{ ++ switch(type) ++ { ++ case TYPE_EFUSE_MAX_SECTION: ++ { ++ u8* pMax_section; ++ pMax_section = (u8*)pOut; ++ *pMax_section = EFUSE_MAX_SECTION_88E; ++ } ++ break; ++ case TYPE_EFUSE_REAL_CONTENT_LEN: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (u16*)pOut; ++ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; ++ } ++ break; ++ case TYPE_EFUSE_CONTENT_LEN_BANK: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (u16*)pOut; ++ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; ++ } ++ break; ++ case TYPE_AVAILABLE_EFUSE_BYTES_BANK: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (u16*)pOut; ++ *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); ++ } ++ break; ++ case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (u16*)pOut; ++ *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); ++ } ++ break; ++ case TYPE_EFUSE_MAP_LEN: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (u16*)pOut; ++ *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; ++ } ++ break; ++ case TYPE_EFUSE_PROTECT_BYTES_BANK: ++ { ++ u8* pu1Tmp; ++ pu1Tmp = (u8*)pOut; ++ *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); ++ } ++ break; ++ default: ++ { ++ u8* pu1Tmp; ++ pu1Tmp = (u8*)pOut; ++ *pu1Tmp = 0; ++ } ++ break; ++ } ++} ++VOID ++Hal_EFUSEGetEfuseDefinition_Pseudo88E( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u8 type, ++ OUT PVOID pOut ++ ) ++{ ++ switch(type) ++ { ++ case TYPE_EFUSE_MAX_SECTION: ++ { ++ u8* pMax_section; ++ pMax_section = (pu1Byte)pOut; ++ *pMax_section = EFUSE_MAX_SECTION_88E; ++ } ++ break; ++ case TYPE_EFUSE_REAL_CONTENT_LEN: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (pu2Byte)pOut; ++ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; ++ } ++ break; ++ case TYPE_EFUSE_CONTENT_LEN_BANK: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (pu2Byte)pOut; ++ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; ++ } ++ break; ++ case TYPE_AVAILABLE_EFUSE_BYTES_BANK: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (pu2Byte)pOut; ++ *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); ++ } ++ break; ++ case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (pu2Byte)pOut; ++ *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); ++ } ++ break; ++ case TYPE_EFUSE_MAP_LEN: ++ { ++ u16* pu2Tmp; ++ pu2Tmp = (pu2Byte)pOut; ++ *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_88E; ++ } ++ break; ++ case TYPE_EFUSE_PROTECT_BYTES_BANK: ++ { ++ u8* pu1Tmp; ++ pu1Tmp = (u8*)pOut; ++ *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); ++ } ++ break; ++ default: ++ { ++ u8* pu1Tmp; ++ pu1Tmp = (u8*)pOut; ++ *pu1Tmp = 0; ++ } ++ break; ++ } ++} ++ ++ ++static VOID ++rtl8188e_EFUSE_GetEfuseDefinition( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u8 type, ++ OUT void *pOut, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ if(bPseudoTest) ++ { ++ Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut); ++ } ++ else ++ { ++ Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut); ++ } ++} ++ ++static u8 ++Hal_EfuseWordEnableDataWrite( IN PADAPTER pAdapter, ++ IN u16 efuse_addr, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 tmpaddr = 0; ++ u16 start_addr = efuse_addr; ++ u8 badworden = 0x0F; ++ u8 tmpdata[8]; ++ ++ _rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE); ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr)); ++ ++ if(!(word_en&BIT0)) ++ { ++ tmpaddr = start_addr; ++ efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest); ++ efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest); ++ ++ efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest); ++ efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest); ++ if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){ ++ badworden &= (~BIT0); ++ } ++ } ++ if(!(word_en&BIT1)) ++ { ++ tmpaddr = start_addr; ++ efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest); ++ efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest); ++ ++ efuse_OneByteRead(pAdapter,tmpaddr , &tmpdata[2], bPseudoTest); ++ efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest); ++ if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){ ++ badworden &=( ~BIT1); ++ } ++ } ++ if(!(word_en&BIT2)) ++ { ++ tmpaddr = start_addr; ++ efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest); ++ efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest); ++ ++ efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest); ++ efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest); ++ if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){ ++ badworden &=( ~BIT2); ++ } ++ } ++ if(!(word_en&BIT3)) ++ { ++ tmpaddr = start_addr; ++ efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest); ++ efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest); ++ ++ efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest); ++ efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest); ++ if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){ ++ badworden &=( ~BIT3); ++ } ++ } ++ return badworden; ++} ++ ++static u8 ++Hal_EfuseWordEnableDataWrite_Pseudo( IN PADAPTER pAdapter, ++ IN u16 efuse_addr, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ret=0; ++ ++ ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static u8 ++rtl8188e_Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, ++ IN u16 efuse_addr, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ret=0; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest); ++ } ++ else ++ { ++ ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++ ++static u16 ++hal_EfuseGetCurrentSize_8188e(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ int bContinual = _TRUE; ++ ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 efuse_data,word_cnts=0; ++ ++ if(bPseudoTest) ++ { ++ efuse_addr = (u16)(fakeEfuseUsedBytes); ++ } ++ else ++ { ++ rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), start_efuse_addr = %d\n", efuse_addr)); ++ ++ while ( bContinual && ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && ++ AVAILABLE_EFUSE_ADDR(efuse_addr)) ++ { ++ if(efuse_data!=0xFF) ++ { ++ if((efuse_data&0x1F) == 0x0F) //extended header ++ { ++ hoffset = efuse_data; ++ efuse_addr++; ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); ++ if((efuse_data & 0x0F) == 0x0F) ++ { ++ efuse_addr++; ++ continue; ++ } ++ else ++ { ++ hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ //read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ } ++ else ++ { ++ bContinual = _FALSE ; ++ } ++ } ++ ++ if(bPseudoTest) ++ { ++ fakeEfuseUsedBytes = efuse_addr; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", fakeEfuseUsedBytes)); ++ } ++ else ++ { ++ rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", efuse_addr)); ++ } ++ ++ return efuse_addr; ++} ++ ++static u16 ++Hal_EfuseGetCurrentSize_Pseudo(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); ++ ++ return ret; ++} ++ ++ ++static u16 ++rtl8188e_EfuseGetCurrentSize( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest); ++ } ++ else ++ { ++ ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); ++ ++ } ++ ++ return ret; ++} ++ ++ ++static int ++hal_EfusePgPacketRead_8188e( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ReadState = PG_STATE_HEADER; ++ ++ int bContinual = _TRUE; ++ int bDataEmpty = _TRUE ; ++ ++ u8 efuse_data,word_cnts = 0; ++ u16 efuse_addr = 0; ++ u8 hoffset = 0,hworden = 0; ++ u8 tmpidx = 0; ++ u8 tmpdata[8]; ++ u8 max_section = 0; ++ u8 tmp_header = 0; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest); ++ ++ if(data==NULL) ++ return _FALSE; ++ if(offset>max_section) ++ return _FALSE; ++ ++ _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // Skip dummy parts to prevent unexpected data read from Efuse. ++ // By pass right now. 2009.02.19. ++ // ++ while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) ) ++ { ++ //------- Header Read ------------- ++ if(ReadState & PG_STATE_HEADER) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)) ++ { ++ if(EXT_HEADER(efuse_data)) ++ { ++ tmp_header = efuse_data; ++ efuse_addr++; ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); ++ if(!ALL_WORDS_DISABLED(efuse_data)) ++ { ++ hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ else ++ { ++ DBG_8192C("Error, All words disabled\n"); ++ efuse_addr++; ++ continue; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ bDataEmpty = _TRUE ; ++ ++ if(hoffset==offset) ++ { ++ for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ) ++ { ++ tmpdata[tmpidx] = efuse_data; ++ if(efuse_data!=0xff) ++ { ++ bDataEmpty = _FALSE; ++ } ++ } ++ } ++ if(bDataEmpty==_FALSE){ ++ ReadState = PG_STATE_DATA; ++ }else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ } ++ else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ else{ ++ bContinual = _FALSE ; ++ } ++ } ++ //------- Data section Read ------------- ++ else if(ReadState & PG_STATE_DATA) ++ { ++ efuse_WordEnableDataRead(hworden,tmpdata,data); ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ ++ if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && ++ (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) ++ return _FALSE; ++ else ++ return _TRUE; ++ ++} ++ ++static int ++Hal_EfusePgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); ++ ++ ++ return ret; ++} ++ ++static int ++Hal_EfusePgPacketRead_Pseudo( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static int ++rtl8188e_Efuse_PgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest); ++ } ++ else ++ { ++ ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static BOOLEAN ++hal_EfuseFixHeaderProcess( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN PPGPKT_STRUCT pFixPkt, ++ IN u16 *pAddr, ++ IN BOOLEAN bPseudoTest ++) ++{ ++ u8 originaldata[8], badworden=0; ++ u16 efuse_addr=*pAddr; ++ u32 PgWriteSuccess=0; ++ ++ _rtw_memset((PVOID)originaldata, 0xff, 8); ++ ++ if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) ++ { //check if data exist ++ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest); ++ ++ if(badworden != 0xf) // write fail ++ { ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); ++ ++ if(!PgWriteSuccess) ++ return _FALSE; ++ else ++ efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ } ++ else ++ { ++ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; ++ } ++ } ++ else ++ { ++ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; ++ } ++ *pAddr = efuse_addr; ++ return _TRUE; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite2ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE, bContinual=_TRUE; ++ u16 efuse_addr=*pAddr, efuse_max_available_len=0; ++ u8 pg_header=0, tmp_header=0, pg_header_temp=0; ++ u8 repeatcnt=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); ++ ++ while(efuse_addr < efuse_max_available_len) ++ { ++ pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header)); ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n")); ++ return _FALSE; ++ } ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ //to write ext_header ++ if(tmp_header == pg_header) ++ { ++ efuse_addr++; ++ pg_header_temp = pg_header; ++ pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n")); ++ return _FALSE; ++ } ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ if((tmp_header & 0x0F) == 0x0F) //word_en PG fail ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n")); ++ return _FALSE; ++ } ++ else ++ { ++ efuse_addr++; ++ continue; ++ } ++ } ++ else if(pg_header != tmp_header) //offset PG fail ++ { ++ PGPKT_STRUCT fixPkt; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n")); ++ fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); ++ fixPkt.word_en = tmp_header & 0x0F; ++ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); ++ if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) ++ return _FALSE; ++ } ++ else ++ { ++ bRet = _TRUE; ++ break; ++ } ++ } ++ else if ((tmp_header & 0x1F) == 0x0F) //wrong extended header ++ { ++ efuse_addr+=2; ++ continue; ++ } ++ } ++ ++ *pAddr = efuse_addr; ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite1ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 pg_header=0, tmp_header=0; ++ u16 efuse_addr=*pAddr; ++ u8 repeatcnt=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n")); ++ pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en; ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ return _FALSE; ++ } ++ efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ if(pg_header == tmp_header) ++ { ++ bRet = _TRUE; ++ } ++ else ++ { ++ PGPKT_STRUCT fixPkt; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n")); ++ fixPkt.offset = (tmp_header>>4) & 0x0F; ++ fixPkt.word_en = tmp_header & 0x0F; ++ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); ++ if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) ++ return _FALSE; ++ } ++ ++ *pAddr = efuse_addr; ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWriteData( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ u16 efuse_addr=*pAddr; ++ u8 badworden=0; ++ u32 PgWriteSuccess=0; ++ ++ badworden = 0x0f; ++ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); ++ if(badworden == 0x0F) ++ { ++ // write ok ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n")); ++ return _TRUE; ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n")); ++ //reorganize other pg packet ++ ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ ++ if(!PgWriteSuccess) ++ return _FALSE; ++ else ++ return _TRUE; ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWriteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ ++ if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) ++ { ++ bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); ++ } ++ else ++ { ++ bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++wordEnMatched( ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN PPGPKT_STRUCT pCurPkt, ++ IN u8 *pWden ++) ++{ ++ u8 match_word_en = 0x0F; // default all words are disabled ++ u8 i; ++ ++ // check if the same words are enabled both target and current PG packet ++ if( ((pTargetPkt->word_en & BIT0) == 0) && ++ ((pCurPkt->word_en & BIT0) == 0) ) ++ { ++ match_word_en &= ~BIT0; // enable word 0 ++ } ++ if( ((pTargetPkt->word_en & BIT1) == 0) && ++ ((pCurPkt->word_en & BIT1) == 0) ) ++ { ++ match_word_en &= ~BIT1; // enable word 1 ++ } ++ if( ((pTargetPkt->word_en & BIT2) == 0) && ++ ((pCurPkt->word_en & BIT2) == 0) ) ++ { ++ match_word_en &= ~BIT2; // enable word 2 ++ } ++ if( ((pTargetPkt->word_en & BIT3) == 0) && ++ ((pCurPkt->word_en & BIT3) == 0) ) ++ { ++ match_word_en &= ~BIT3; // enable word 3 ++ } ++ ++ *pWden = match_word_en; ++ ++ if(match_word_en != 0xf) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++static BOOLEAN ++hal_EfuseCheckIfDatafollowed( ++ IN PADAPTER pAdapter, ++ IN u8 word_cnts, ++ IN u16 startAddr, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 i, efuse_data; ++ ++ for(i=0; i<(word_cnts*2) ; i++) ++ { ++ if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)) ++ bRet = _TRUE; ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePartialWriteCheck( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 i, efuse_data=0, cur_header=0; ++ u8 new_wden=0, matched_wden=0, badworden=0; ++ u16 startAddr=0, efuse_max_available_len=0, efuse_max=0; ++ PGPKT_STRUCT curPkt; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest); ++ ++ if(efuseType == EFUSE_WIFI) ++ { ++ if(bPseudoTest) ++ { ++ startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ else ++ { ++ rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); ++ startAddr%=EFUSE_REAL_CONTENT_LEN; ++ } ++ } ++ else ++ { ++ if(bPseudoTest) ++ { ++ startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ else ++ { ++ startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr)); ++ ++ while(1) ++ { ++ if(startAddr >= efuse_max_available_len) ++ { ++ bRet = _FALSE; ++ break; ++ } ++ ++ if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF)) ++ { ++ if(EXT_HEADER(efuse_data)) ++ { ++ cur_header = efuse_data; ++ startAddr++; ++ efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); ++ if(ALL_WORDS_DISABLED(efuse_data)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled")); ++ bRet = _FALSE; ++ break; ++ } ++ else ++ { ++ curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ curPkt.word_en = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ cur_header = efuse_data; ++ curPkt.offset = (cur_header>>4) & 0x0F; ++ curPkt.word_en = cur_header & 0x0F; ++ } ++ ++ curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); ++ // if same header is found but no data followed ++ // write some part of data followed by the header. ++ if( (curPkt.offset == pTargetPkt->offset) && ++ (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) && ++ wordEnMatched(pTargetPkt, &curPkt, &matched_wden) ) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n")); ++ // Here to write partial data ++ badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest); ++ if(badworden != 0x0F) ++ { ++ u32 PgWriteSuccess=0; ++ // if write fail on some words, write these bad words again ++ ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ ++ if(!PgWriteSuccess) ++ { ++ bRet = _FALSE; // write fail, return ++ break; ++ } ++ } ++ // partial write ok, update the target packet for later use ++ for(i=0; i<4; i++) ++ { ++ if((matched_wden & (0x1<word_en |= (0x1<word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); ++ } ++ // read from next header ++ startAddr = startAddr + (curPkt.word_cnts*2) +1; ++ } ++ else ++ { ++ // not used header, 0xff ++ *pAddr = startAddr; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr)); ++ bRet = _TRUE; ++ break; ++ } ++ } ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgCheckAvailableAddr( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u16 efuse_max_available_len=0; ++ ++ //Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256. ++ EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&efuse_max_available_len, _FALSE); ++ ++ //EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest); ++ //RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len)); ++ ++ if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n")); ++ return _FALSE; ++ } ++ return _TRUE; ++} ++ ++static VOID ++hal_EfuseConstructPGPkt( ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN PPGPKT_STRUCT pTargetPkt ++ ++) ++{ ++ _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8); ++ pTargetPkt->offset = offset; ++ pTargetPkt->word_en= word_en; ++ efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); ++ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts)); ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite_BT( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ PGPKT_STRUCT targetPkt; ++ u16 startAddr=0; ++ u8 efuseType=EFUSE_BT; ++ ++ if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) ++ return _FALSE; ++ ++ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); ++ ++ if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite_8188e( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ PGPKT_STRUCT targetPkt; ++ u16 startAddr=0; ++ u8 efuseType=EFUSE_WIFI; ++ ++ if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) ++ return _FALSE; ++ ++ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); ++ ++ if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++ ++static int ++Hal_EfusePgPacketWrite_Pseudo(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static int ++Hal_EfusePgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); ++ ++ ++ return ret; ++} ++ ++static int ++rtl8188e_Efuse_PgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ else ++ { ++ ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ return ret; ++} ++ ++static void read_chip_version_8188e(PADAPTER padapter) ++{ ++ u32 value32; ++ HAL_DATA_TYPE *pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ ++ value32 = rtw_read32(padapter, REG_SYS_CFG); ++ pHalData->VersionID.ICType = CHIP_8188E ; ++ pHalData->VersionID.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); ++ ++ pHalData->VersionID.RFType = RF_TYPE_1T1R; ++ pHalData->VersionID.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); ++ pHalData->VersionID.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT) ++ ++ // For regulator mode. by tynli. 2011.01.14 ++ pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); ++ ++ pHalData->VersionID.ROMVer = 0; // ROM code version. ++ pHalData->MultiFunc = RT_MULTI_FUNC_NONE; ++ ++ rtw_hal_config_rftype(padapter); ++ ++#if 1 ++ dump_chip_info(pHalData->VersionID); ++#endif ++ ++} ++ ++void rtl8188e_start_thread(_adapter *padapter) ++{ ++#if defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++#ifndef CONFIG_SDIO_TX_TASKLET ++ struct xmit_priv *xmitpriv = &padapter->xmitpriv; ++ ++ xmitpriv->SdioXmitThread = kthread_run(rtl8188es_xmit_thread, padapter, "RTWHALXT"); ++ if (IS_ERR(xmitpriv->SdioXmitThread)) ++ { ++ RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8188es_xmit_thread FAIL!!\n", __FUNCTION__)); ++ } ++#endif ++#endif ++} ++ ++void rtl8188e_stop_thread(_adapter *padapter) ++{ ++#if defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++#ifndef CONFIG_SDIO_TX_TASKLET ++ struct xmit_priv *xmitpriv = &padapter->xmitpriv; ++ ++ // stop xmit_buf_thread ++ if (xmitpriv->SdioXmitThread ) { ++ _rtw_up_sema(&xmitpriv->SdioXmitSema); ++ _rtw_down_sema(&xmitpriv->SdioXmitTerminateSema); ++ xmitpriv->SdioXmitThread = 0; ++ } ++#endif ++#endif ++} ++void hal_notch_filter_8188e(_adapter *adapter, bool enable) ++{ ++ if (enable) { ++ DBG_871X("Enable notch filter\n"); ++ rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1); ++ } else { ++ DBG_871X("Disable notch filter\n"); ++ rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); ++ } ++} ++ ++void UpdateHalRAMask8188E(PADAPTER padapter, u32 mac_id, u8 rssi_level) ++{ ++ u32 mask,rate_bitmap; ++ u8 shortGIrate = _FALSE; ++ struct sta_info *psta; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (mac_id >= NUM_STA) //CAM_SIZE ++ { ++ return; ++ } ++ ++ psta = pmlmeinfo->FW_sta_info[mac_id].psta; ++ if(psta == NULL) ++ { ++ return; ++ } ++ ++ shortGIrate = query_ra_short_GI(psta); ++ ++ mask = psta->ra_mask; ++ ++ rate_bitmap = 0xffffffff; ++ rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level); ++ ++ ++ DBG_871X("%s => mac_id:%d, rate_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", ++ __FUNCTION__,mac_id,psta->raid,psta->wireless_mode,mask,rssi_level,rate_bitmap); ++ ++ mask &= rate_bitmap; ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg[4] ={0}; ++ ++ arg[0] = mac_id;//MACID ++ arg[1] = psta->raid; ++ arg[2] = shortGIrate; ++ arg[3] = psta->init_rate; ++ rtl8188e_set_raid_cmd(padapter, mask,arg); ++ } ++ else ++ { ++ ++#if(RATE_ADAPTIVE_SUPPORT == 1) ++ ++ ODM_RA_UpdateRateInfo_8188E( ++ &(pHalData->odmpriv), ++ mac_id, ++ psta->raid, ++ mask, ++ shortGIrate + ); + -+ pTcb->bTxEnableSwCalcDur = TRUE; -+ pTcb->BWOfPacket = BW; -+ pTcb->TxBFPktType = RT_BF_PKT_TYPE_BROADCAST_NDPA; -+ -+ /*rate of NDP decide by Nr*/ -+ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); -+ } else -+ ret = FALSE; -+ -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); -+ -+ return ret; ++#endif ++ } +} + -+#endif /*#if (SUPPORT_MU_BF == 1)*/ -+#endif /*#ifdef SUPPORT_MU_BF*/ -+ -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+u4Byte -+Beamforming_GetReportFrame( -+ IN PVOID pDM_VOID, -+ union recv_frame *precv_frame -+ ) ++void rtl8188e_init_default_value(_adapter *adapter) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u4Byte ret = _SUCCESS; -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; -+ pu1Byte pframe = precv_frame->u.hdr.rx_data; -+ u4Byte frame_len = precv_frame->u.hdr.len; -+ pu1Byte TA; -+ u1Byte Idx, offset; -+ -+ /*DBG_871X("beamforming_get_report_frame\n");*/ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + -+ /*Memory comparison to see if CSI report is the same with previous one*/ -+ TA = GetAddr2Ptr(pframe); -+ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, TA, &Idx); -+ if(pBeamformEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) -+ offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ -+ else if(pBeamformEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) -+ offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ -+ else -+ return ret; -+ -+ /*DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset);*/ -+ -+ return ret; ++ /* hal capability values */ ++ hal_data->macid_num = MACID_NUM_88E; ++ hal_data->cam_entry_num = CAM_ENTRY_NUM_88E; ++ adapter->registrypriv.wireless_mode = WIRELESS_11BG_24N; +} + -+ -+BOOLEAN -+SendFWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ) ++void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ u1Byte *pframe; -+ u2Byte *fctrl; -+ u2Byte duration = 0; -+ u1Byte aSifsTime = 0, NDPTxRate = 0, Idx = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ pHalFunc->dm_init = &rtl8188e_init_dm_priv; ++ pHalFunc->dm_deinit = &rtl8188e_deinit_dm_priv; + -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ DBG_871X("%s, alloc mgnt frame fail\n", __func__); -+ return _FALSE; -+ } ++ pHalFunc->read_chip_version = read_chip_version_8188e; + -+ //update attribute -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(Adapter, pattrib); ++ pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8188E; + -+ pattrib->qsel = QSLT_BEACON; -+ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); -+ pattrib->rate = NDPTxRate; -+ pattrib->bwmode = BW; -+ pattrib->order = 1; -+ pattrib->subtype = WIFI_ACTION_NOACK; ++ pHalFunc->set_bwmode_handler = &PHY_SetBWMode8188E; ++ pHalFunc->set_channel_handler = &PHY_SwChnl8188E; ++ pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8188E; + -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8188E; ++ pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8188E; + -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog; + -+ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid; + -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; ++ pHalFunc->run_thread= &rtl8188e_start_thread; ++ pHalFunc->cancel_thread= &rtl8188e_stop_thread; + -+ SetOrderBit(pframe); -+ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E; ++ pHalFunc->AntDivCompareHandler = &AntDivCompare8188E; ++#endif + -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ pHalFunc->read_bbreg = &PHY_QueryBBReg8188E; ++ pHalFunc->write_bbreg = &PHY_SetBBReg8188E; ++ pHalFunc->read_rfreg = &PHY_QueryRFReg8188E; ++ pHalFunc->write_rfreg = &PHY_SetRFReg8188E; + -+ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) -+ aSifsTime = 10; -+ else -+ aSifsTime = 16; + -+ duration = 2*aSifsTime + 40; -+ -+ if(BW == CHANNEL_WIDTH_40) -+ duration+= 87; -+ else -+ duration+= 180; ++ // Efuse related function ++ pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch; ++ pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse; ++ pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition; ++ pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize; ++ pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead; ++ pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite; ++ pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite; + -+ SetDuration(pframe, duration); ++#ifdef DBG_CONFIG_ERROR_DETECT ++ pHalFunc->sreset_init_value = &sreset_init_value; ++ pHalFunc->sreset_reset_value = &sreset_reset_value; ++ pHalFunc->silentreset = &sreset_reset; ++ pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check; ++ pHalFunc->sreset_linked_status_check = &rtl8188e_sreset_linked_status_check; ++ pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; ++ pHalFunc->sreset_inprogress= &sreset_inprogress; ++#endif //DBG_CONFIG_ERROR_DETECT + -+ //HT control field -+ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ pHalFunc->GetHalODMVarHandler = GetHalODMVar; ++ pHalFunc->SetHalODMVarHandler = SetHalODMVar; + -+ _rtw_memcpy(pframe+28, ActionHdr, 4); ++#ifdef CONFIG_IOL ++ pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync; ++#endif + -+ pattrib->pktlen = 32; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ -+ return _TRUE; ++ pHalFunc->hal_notch_filter = &hal_notch_filter_8188e; ++ pHalFunc->fill_h2c_cmd = &FillH2CCmd_88E; ++ pHalFunc->fill_fake_txdesc = &rtl8188e_fill_fake_txdesc; ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ pHalFunc->hal_set_wowlan_fw = &SetFwRelatedForWoWLAN8188ES; ++#endif ++ pHalFunc->hal_get_tx_buff_rsvd_page_num = &GetTxBufferRsvdPageNum8188E; +} + -+ -+BOOLEAN -+SendSWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ) ++u8 GetEEPROMSize8188E(PADAPTER padapter) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ pu1Byte pframe; -+ pu2Byte fctrl; -+ u2Byte duration = 0; -+ u1Byte aSifsTime = 0, NDPTxRate = 0, Idx = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ u8 size = 0; ++ u32 cr; + -+ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ DBG_871X("%s, alloc mgnt frame fail\n", __func__); -+ return _FALSE; -+ } ++ cr = rtw_read16(padapter, REG_9346CR); ++ // 6: EEPROM used is 93C46, 4: boot from E-Fuse. ++ size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; + -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(Adapter, pattrib); -+ pattrib->qsel = QSLT_MGNT; -+ pattrib->rate = NDPTxRate; -+ pattrib->bwmode = BW; -+ pattrib->order = 1; -+ pattrib->subtype = WIFI_ACTION_NOACK; ++ MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); + -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ SetOrderBit(pframe); -+ SetFrameSubType(pframe, WIFI_ACTION_NOACK); -+ -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) -+ aSifsTime = 10; -+ else -+ aSifsTime = 16; -+ -+ duration = 2*aSifsTime + 40; -+ -+ if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ SetDuration(pframe, duration); -+ -+ /*HT control field*/ -+ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); -+ -+ _rtw_memcpy(pframe+28, ActionHdr, 4); -+ -+ pattrib->pktlen = 32; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ -+ return _TRUE; ++ return size; +} + -+ -+BOOLEAN -+SendFWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ pu1Byte pframe; -+ pu2Byte fctrl; -+ u2Byte duration = 0; -+ u1Byte sequence = 0, aSifsTime = 0, NDPTxRate= 0, Idx = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ RT_NDPA_STA_INFO sta_info; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ DBG_871X("%s, alloc mgnt frame fail\n", __func__); -+ return _FALSE; -+ } -+ -+ //update attribute -+ pattrib = &pmgntframe->attrib; -+ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); -+ update_mgntframe_attrib(Adapter, pattrib); -+ -+ pattrib->qsel = QSLT_BEACON; -+ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); -+ pattrib->rate = NDPTxRate; -+ pattrib->bwmode = BW; -+ pattrib->subtype = WIFI_NDPA; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ SetFrameSubType(pframe, WIFI_NDPA); -+ -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); -+ -+ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ -+ duration = 2*aSifsTime + 44; -+ -+ if(BW == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if(BW == CHANNEL_WIDTH_40) -+ duration+= 87; -+ else -+ duration+= 180; -+ -+ SetDuration(pframe, duration); -+ -+ sequence = pBeamInfo->SoundingSequence<< 2; -+ if (pBeamInfo->SoundingSequence >= 0x3f) -+ pBeamInfo->SoundingSequence = 0; -+ else -+ pBeamInfo->SoundingSequence++; -+ -+ _rtw_memcpy(pframe+16, &sequence,1); -+ -+ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) -+ AID = 0; -+ -+ sta_info.AID = AID; -+ sta_info.FeedbackType = 0; -+ sta_info.NcIndex= 0; -+ -+ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); -+ -+ pattrib->pktlen = 19; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+ -+ -+BOOLEAN -+SendSWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ RT_NDPA_STA_INFO ndpa_sta_info; -+ u1Byte NDPTxRate = 0, sequence = 0, aSifsTime = 0, Idx = 0; -+ pu1Byte pframe; -+ pu2Byte fctrl; -+ u2Byte duration = 0; -+ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); -+ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); -+ -+ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ DBG_871X("%s, alloc mgnt frame fail\n", __func__); -+ return _FALSE; -+ } -+ -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); -+ update_mgntframe_attrib(Adapter, pattrib); -+ pattrib->qsel = QSLT_MGNT; -+ pattrib->rate = NDPTxRate; -+ pattrib->bwmode = BW; -+ pattrib->subtype = WIFI_NDPA; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ SetFrameSubType(pframe, WIFI_NDPA); -+ -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); -+ -+ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ -+ duration = 2*aSifsTime + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ SetDuration(pframe, duration); -+ -+ sequence = pBeamInfo->SoundingSequence << 2; -+ if (pBeamInfo->SoundingSequence >= 0x3f) -+ pBeamInfo->SoundingSequence = 0; -+ else -+ pBeamInfo->SoundingSequence++; -+ -+ _rtw_memcpy(pframe+16, &sequence, 1); -+ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) -+ AID = 0; -+ -+ ndpa_sta_info.AID = AID; -+ ndpa_sta_info.FeedbackType = 0; -+ ndpa_sta_info.NcIndex = 0; -+ -+ _rtw_memcpy(pframe+17, (u8 *)&ndpa_sta_info, 2); -+ -+ pattrib->pktlen = 19; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(Adapter, pmgntframe); -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] [%d]\n", __func__, __LINE__)); -+ -+ return _TRUE; -+} -+ -+ -+#endif -+ -+ -+VOID -+Beamforming_GetNDPAFrame( -+ IN PVOID pDM_VOID, -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN OCTET_STRING pduOS -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ union recv_frame *precv_frame -+#endif -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ pu1Byte TA ; -+ u1Byte Idx, Sequence; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ pu1Byte pNDPAFrame = pduOS.Octet; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ pu1Byte pNDPAFrame = precv_frame->u.hdr.rx_data; -+#endif -+ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; /*Modified By Jeffery @2014-10-29*/ -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "Beamforming_GetNDPAFrame\n", pduOS.Octet, pduOS.Length); -+ if (IsCtrlNDPA(pNDPAFrame) == FALSE) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (GetFrameSubType(pNDPAFrame) != WIFI_NDPA) -+#endif -+ return; -+ else if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821))) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] not 8812 or 8821A, return\n", __func__)); -+ return; -+ } -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ TA = Frame_Addr2(pduOS); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ TA = GetAddr2Ptr(pNDPAFrame); -+#endif -+ /*Remove signaling TA. */ -+ TA[0] = TA[0] & 0xFE; -+ -+ pBeamformerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, TA, &Idx); // Modified By Jeffery @2014-10-29 -+ -+ /*Break options for Clock Reset*/ -+ if (pBeamformerEntry == NULL) -+ return; -+ else if (!(pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU)) -+ return; -+ /*LogSuccess: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ -+ /*ClockResetTimes: While BFer entry always doesn't receive our CSI, clock will reset again and again.So ClockResetTimes is limited to 5 times.2015-04-13, Jeffery*/ -+ else if ((pBeamformerEntry->LogSuccess == 1) || (pBeamformerEntry->ClockResetTimes == 5)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, LogSuccess=%d, ClockResetTimes=%d, clock reset is no longer needed.\n", -+ __func__, pBeamformerEntry->LogSeq, pBeamformerEntry->PreLogSeq, pBeamformerEntry->LogRetryCnt, pBeamformerEntry->LogSuccess, pBeamformerEntry->ClockResetTimes)); -+ -+ return; -+ } -+ -+ Sequence = (pNDPAFrame[16]) >> 2; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start, Sequence=%d, LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, ClockResetTimes=%d, LogSuccess=%d\n", -+ __func__, Sequence, pBeamformerEntry->LogSeq, pBeamformerEntry->PreLogSeq, pBeamformerEntry->LogRetryCnt, pBeamformerEntry->ClockResetTimes, pBeamformerEntry->LogSuccess)); -+ -+ if ((pBeamformerEntry->LogSeq != 0) && (pBeamformerEntry->PreLogSeq != 0)) { -+ /*Success condition*/ -+ if ((pBeamformerEntry->LogSeq != Sequence) && (pBeamformerEntry->PreLogSeq != pBeamformerEntry->LogSeq)) { -+ /* break option for clcok reset, 2015-03-30, Jeffery */ -+ pBeamformerEntry->LogRetryCnt = 0; -+ /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ -+ /*That is, LogSuccess is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ -+ pBeamformerEntry->LogSuccess = 1; -+ -+ } else {/*Fail condition*/ -+ -+ if (pBeamformerEntry->LogRetryCnt == 5) { -+ pBeamformerEntry->ClockResetTimes++; -+ pBeamformerEntry->LogRetryCnt = 0; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Clock Reset!!! ClockResetTimes=%d\n", -+ __func__, pBeamformerEntry->ClockResetTimes)); -+ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_CLK, NULL); -+ -+ } else -+ pBeamformerEntry->LogRetryCnt++; -+ } -+ } -+ -+ /*Update LogSeq & PreLogSeq*/ -+ pBeamformerEntry->PreLogSeq = pBeamformerEntry->LogSeq; -+ pBeamformerEntry->LogSeq = Sequence; -+ -+} -+ -+ -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.h -new file mode 100644 -index 000000000..18c8edb96 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfinterface.h -@@ -0,0 +1,158 @@ -+#ifndef __HAL_TXBF_INTERFACE_H__ -+#define __HAL_TXBF_INTERFACE_H__ -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+VOID -+Beamforming_GidPAid( -+ PADAPTER Adapter, -+ PRT_TCB pTcb -+ ); -+ -+RT_STATUS -+Beamforming_GetReportFrame( -+ IN PADAPTER Adapter, -+ IN PRT_RFD pRfd, -+ IN POCTET_STRING pPduOS -+ ); -+ -+VOID -+Beamforming_GetNDPAFrame( -+ IN PVOID pDM_VOID, -+ IN OCTET_STRING pduOS -+ ); -+ -+BOOLEAN -+SendFWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ); -+ -+BOOLEAN -+SendFWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ); -+ -+BOOLEAN -+SendSWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ); -+ -+BOOLEAN -+SendSWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ); -+ -+#ifdef SUPPORT_MU_BF -+#if (SUPPORT_MU_BF == 1) -+RT_STATUS -+Beamforming_GetVHTGIDMgntFrame( -+ IN PADAPTER Adapter, -+ IN PRT_RFD pRfd, -+ IN POCTET_STRING pPduOS -+ ); -+ -+BOOLEAN -+SendSWVHTGIDMgntFrame( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u1Byte Idx -+ ); -+ -+BOOLEAN -+SendSWVHTBFReportPoll( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN BOOLEAN bFinalPoll -+ ); -+ -+BOOLEAN -+SendSWVHTMUNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN CHANNEL_WIDTH BW -+ ); -+#else -+#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE -+#define SendSWVHTGIDMgntFrame(pDM_VOID, RA) -+#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll) -+#define SendSWVHTMUNDPAPacket(pDM_VOID, BW) -+#endif -+#endif -+ -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+u4Byte -+Beamforming_GetReportFrame( -+ IN PVOID pDM_VOID, -+ union recv_frame *precv_frame -+ ); -+ -+BOOLEAN -+SendFWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ); -+ -+BOOLEAN -+SendSWHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN CHANNEL_WIDTH BW -+ ); -+ -+BOOLEAN -+SendFWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ); -+ -+BOOLEAN -+SendSWVHTNDPAPacket( -+ IN PVOID pDM_VOID, -+ IN pu1Byte RA, -+ IN u2Byte AID, -+ IN CHANNEL_WIDTH BW -+ ); -+#endif -+ -+VOID -+Beamforming_GetNDPAFrame( -+ IN PVOID pDM_VOID, -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ IN OCTET_STRING pduOS -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ union recv_frame *precv_frame -+#endif -+); -+ -+#else -+#define Beamforming_GetNDPAFrame(pDM_Odm, _PduOS) -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#define Beamforming_GetReportFrame(Adapter, precv_frame) RT_STATUS_FAILURE -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define Beamforming_GetReportFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE -+#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE -+#endif -+#define SendFWHTNDPAPacket(pDM_VOID, RA, BW) -+#define SendSWHTNDPAPacket(pDM_VOID, RA, BW) -+#define SendFWVHTNDPAPacket(pDM_VOID, RA, AID, BW) -+#define SendSWVHTNDPAPacket(pDM_VOID, RA, AID, BW) -+#define SendSWVHTGIDMgntFrame(pDM_VOID, RA, idx) -+#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll) -+#define SendSWVHTMUNDPAPacket(pDM_VOID, BW) -+#endif -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.c b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.c -new file mode 100644 -index 000000000..b34e851cd ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.c -@@ -0,0 +1,527 @@ -+//============================================================ -+// Description: ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI) || defined(CONFIG_GSPI_HCI) ++//------------------------------------------------------------------------- +// -+// This file is for 8812/8821/8811 TXBF mechanism ++// LLT R/W/Init function +// -+//============================================================ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (BEAMFORMING_SUPPORT == 1) -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+VOID -+HalTxbf8812A_setNDPArate( -+ IN PVOID pDM_VOID, -+ IN u1Byte BW, -+ IN u1Byte Rate -+) ++//------------------------------------------------------------------------- ++s32 _LLTWrite(PADAPTER padapter, u32 address, u32 data) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ s32 status = _SUCCESS; ++ s8 count = POLLING_LLT_THRESHOLD; ++ u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); + -+ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8812A, (Rate << 2 | BW)); -+ -+} -+ -+VOID -+halTxbfJaguar_RfMode( -+ IN PVOID pDM_VOID, -+ IN PRT_BEAMFORMING_INFO pBeamInfo -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ -+ if (pDM_Odm->RFType == ODM_1T1R) -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__)); -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ -+ -+ if (pBeamInfo->beamformee_su_cnt > 0) { -+ // Paath_A -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ -+ // Path_B -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ -+ } else { -+ // Paath_A -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ -+ // Path_B -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ -+ } -+ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ -+ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ -+ -+ if (pBeamInfo->beamformee_su_cnt > 0) -+ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33); -+ else -+ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11); -+} -+ -+ -+VOID -+halTxbfJaguar_DownloadNDPA( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; -+ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; -+ BOOLEAN bSendBeacon = FALSE; -+ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/ -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *pDM_Odm->pbFwDwRsvdPageInProgress = TRUE; -+#endif -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (Idx == 0) -+ Head_Page = 0xFE; -+ else -+ Head_Page = 0xFE; -+ -+ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8812A + 1); -+ ODM_Write1Byte(pDM_Odm, REG_CR_8812A + 1, (u1bTmp | BIT0)); -+ -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2); -+ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmpReg422 & (~BIT6)); -+ -+ if (tmpReg422 & BIT6) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n")); -+ bSendBeacon = TRUE; -+ } -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page); ++ rtw_write32(padapter, REG_LLT_INIT, value); + ++ //polling + do { -+ /*Clear beacon valid check bit.*/ -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); -+ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0)); -+ -+ /*download NDPA rsvd page.*/ -+ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) -+ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); -+ else -+ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); -+ -+ /*check rsvd page download OK.*/ -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); -+ count = 0; -+ while (!(BcnValidReg & BIT0) && count < 20) { -+ count++; -+ ODM_delay_ms(10); -+ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ value = rtw_read32(padapter, REG_LLT_INIT); ++ if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { ++ break; + } -+ DLBcnCount++; -+ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); ++ } while (--count); + -+ if (!(BcnValidReg & BIT0)) -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__)); ++ if(count<=0){ ++ DBG_871X("Failed to polling write LLT done at address %d!\n", address); ++ status = _FAIL; ++ } + -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy); ++ return status; ++} + -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ -+ /*the beacon cannot be sent by HW.*/ -+ /*2010.06.23. Added by tynli.*/ -+ if (bSendBeacon) -+ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmpReg422); ++u8 _LLTRead(PADAPTER padapter, u32 address) ++{ ++ s32 count = POLLING_LLT_THRESHOLD; ++ u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); ++ u16 LLTReg = REG_LLT_INIT; + -+ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8812A + 1); -+ ODM_Write1Byte(pDM_Odm, REG_CR_8812A + 1, (u1bTmp & (~BIT0))); + -+ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *pDM_Odm->pbFwDwRsvdPageInProgress = FALSE; ++ rtw_write32(padapter, LLTReg, value); ++ ++ //polling and get value ++ do { ++ value = rtw_read32(padapter, LLTReg); ++ if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { ++ return (u8)value; ++ } ++ } while (--count); ++ ++ if (count <=0 ) { ++ RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling read LLT done at address %d!\n", address)); ++ } ++ ++ ++ return 0xFF; ++} ++ ++s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy) ++{ ++ s32 status = _FAIL; ++ u32 i; ++ u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter);// 176, 22k ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++#if defined(CONFIG_IOL_LLT) ++ if(rtw_IOL_applied(padapter)) ++ { ++ status = iol_InitLLTTable(padapter, txpktbuf_bndy); ++ } ++ else +#endif ++ { ++ for (i = 0; i < (txpktbuf_bndy - 1); i++) { ++ status = _LLTWrite(padapter, i, i + 1); ++ if (_SUCCESS != status) { ++ return status; ++ } ++ } ++ ++ // end of list ++ status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF); ++ if (_SUCCESS != status) { ++ return status; ++ } ++ ++ // Make the other pages as ring buffer ++ // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. ++ // Otherwise used as local loopback buffer. ++ for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { ++ status = _LLTWrite(padapter, i, (i + 1)); ++ if (_SUCCESS != status) { ++ return status; ++ } ++ } ++ ++ // Let last entry point to the start entry of ring buffer ++ status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); ++ if (_SUCCESS != status) { ++ return status; ++ } ++ } ++ ++ return status; ++} ++#endif ++ ++ ++void ++Hal_InitPGData88E(PADAPTER padapter) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u32 i; ++ u16 value16; ++ ++ if(_FALSE == pHalData->bautoload_fail_flag) ++ { // autoload OK. ++ if (is_boot_from_eeprom(padapter)) ++ { ++ // Read all Content from EEPROM or EFUSE. ++ for(i = 0; i < HWSET_MAX_SIZE; i += 2) ++ { ++// value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); ++// *((u16*)(&PROMContent[i])) = value16; ++ } ++ } ++ else ++ { ++ // Read EFUSE real map to shadow. ++ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); ++ } ++ } ++ else ++ {//autoload fail ++ RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n")); ++// pHalData->AutoloadFailFlag = _TRUE; ++ //update to default value 0xFF ++ if (!is_boot_from_eeprom(padapter)) ++ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); ++ } ++ ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++ if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) { ++ if (Hal_readPGDataFromConfigFile(padapter) != _SUCCESS) ++ DBG_871X_LEVEL(_drv_err_, "invalid phy efuse and read from file fail, will use driver default!!\n"); ++ } ++#endif ++} ++ ++void ++Hal_EfuseParseIDCode88E( ++ IN PADAPTER padapter, ++ IN u8 *hwinfo ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u16 EEPROMId; ++ ++ ++ // Checl 0x8129 again for making sure autoload status!! ++ EEPROMId = le16_to_cpu(*((u16*)hwinfo)); ++ if (EEPROMId != RTL_EEPROM_ID) ++ { ++ DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); ++ pHalData->bautoload_fail_flag = _TRUE; ++ } ++ else ++ { ++ pHalData->bautoload_fail_flag = _FALSE; ++ } ++ ++ DBG_871X("EEPROM ID=0x%04x\n", EEPROMId); ++} ++ ++static void ++Hal_ReadPowerValueFromPROM_8188E( ++ IN PADAPTER padapter, ++ IN PTxPowerInfo24G pwrInfo24G, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_88E, group,TxCount=0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ _rtw_memset(pwrInfo24G, 0, sizeof(TxPowerInfo24G)); ++ ++ if(AutoLoadFail) ++ { ++ for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) ++ { ++ //2.4G default value ++ for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) ++ { ++ pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; ++ pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; ++ } ++ for(TxCount=0;TxCountBW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF; ++ pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF; ++ } ++ else ++ { ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; ++ pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; ++ pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; ++ } ++ } ++ ++ ++ } ++ ++ //pHalData->bNOPG = TRUE; ++ return; ++ } ++ ++ for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) ++ { ++ //2.4G default value ++ for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) ++ { ++ //printk(" IndexCCK_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); ++ pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++]; ++ //printk(" IndexCCK_Base:%02x \n",pwrInfo24G->IndexCCK_Base[rfPath][group] ); ++ if(pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF) ++ { ++ pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; ++// pHalData->bNOPG = TRUE; ++ } ++ } ++ for(group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++) ++ { ++ //printk(" IndexBW40_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); ++ pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; ++ //printk(" IndexBW40_Base: %02x \n",pwrInfo24G->IndexBW40_Base[rfPath][group] ); ++ if(pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF) ++ pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; ++ } ++ for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) ++ { ++ if(TxCount==0) ++ { ++ pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0; ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; ++ if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; ++ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); ++ if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; ++ ++ pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; ++ eeAddr++; ++ } else{ ++ pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; ++ if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; ++ ++ ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); ++ if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; ++ eeAddr++; ++ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; ++ if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; ++ ++ pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); ++ if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; ++ ++ eeAddr++; ++ } ++ } ++ ++ } ++ ++ ++} ++ ++static u8 ++Hal_GetChnlGroup( ++ IN u8 chnl ++ ) ++{ ++ u8 group=0; ++ ++ if (chnl < 3) // Cjanel 1-3 ++ group = 0; ++ else if (chnl < 9) // Channel 4-9 ++ group = 1; ++ else // Channel 10-14 ++ group = 2; ++ ++ return group; ++} ++static u8 ++Hal_GetChnlGroup88E( ++ IN u8 chnl, ++ OUT u8* pGroup ++ ) ++{ ++ u8 bIn24G=_TRUE; ++ ++ if(chnl<=14) ++ { ++ bIn24G=_TRUE; ++ ++ if (chnl < 3) // Chanel 1-2 ++ *pGroup = 0; ++ else if (chnl < 6) // Channel 3-5 ++ *pGroup = 1; ++ else if(chnl <9) // Channel 6-8 ++ *pGroup = 2; ++ else if(chnl <12) // Channel 9-11 ++ *pGroup = 3; ++ else if(chnl <14) // Channel 12-13 ++ *pGroup = 4; ++ else if(chnl ==14) // Channel 14 ++ *pGroup = 5; ++ else ++ { ++ //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 2.4 G, but Channel %d in Group not found \n",chnl)); ++ } ++ } ++ else ++ { ++ bIn24G=_FALSE; ++ ++ if (chnl <=40) ++ *pGroup = 0; ++ else if (chnl <=48) ++ *pGroup = 1; ++ else if(chnl <=56) ++ *pGroup = 2; ++ else if(chnl <=64) ++ *pGroup = 3; ++ else if(chnl <=104) ++ *pGroup = 4; ++ else if(chnl <=112) ++ *pGroup = 5; ++ else if(chnl <=120) ++ *pGroup = 5; ++ else if(chnl <=128) ++ *pGroup = 6; ++ else if(chnl <=136) ++ *pGroup = 7; ++ else if(chnl <=144) ++ *pGroup = 8; ++ else if(chnl <=153) ++ *pGroup = 9; ++ else if(chnl <=161) ++ *pGroup = 10; ++ else if(chnl <=177) ++ *pGroup = 11; ++ else ++ { ++ //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 5G, but Channel %d in Group not found \n",chnl)); ++ } ++ ++ } ++ //RT_TRACE(COMP_EFUSE,DBG_LOUD,("<==Hal_GetChnlGroup88E, Channel = %d, bIn24G =%d,\n",chnl,bIn24G)); ++ return bIn24G; ++} ++ ++void Hal_ReadPowerSavingMode88E( ++ PADAPTER padapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); ++ u8 tmpvalue; ++ ++ if(AutoLoadFail){ ++ pwrctl->bHWPowerdown = _FALSE; ++ pwrctl->bSupportRemoteWakeup = _FALSE; ++ } ++ else { ++ ++ //hw power down mode selection , 0:rf-off / 1:power down ++ ++ if(padapter->registrypriv.hwpdn_mode==2) ++ pwrctl->bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4); ++ else ++ pwrctl->bHWPowerdown = padapter->registrypriv.hwpdn_mode; ++ ++ // decide hw if support remote wakeup function ++ // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume ++#ifdef CONFIG_USB_HCI ++ pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?_TRUE :_FALSE; ++#endif //CONFIG_USB_HCI ++ ++ DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, ++ pwrctl->bHWPwrPindetect, pwrctl->bHWPowerdown, pwrctl->bSupportRemoteWakeup); ++ ++ DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",padapter->registrypriv.power_mgnt,padapter->registrypriv.usbss_enable); ++ ++ } ++ ++} ++ ++void ++Hal_ReadTxPowerInfo88E( ++ IN PADAPTER padapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ TxPowerInfo24G pwrInfo24G; ++ u8 rfPath, ch, group=0, rfPathMax=1; ++ u8 pwr, diff,bIn24G,TxCount; ++ ++ ++ Hal_ReadPowerValueFromPROM_8188E(padapter, &pwrInfo24G, PROMContent, AutoLoadFail); ++ ++ if(!AutoLoadFail) ++ pHalData->bTXPowerDataReadFromEEPORM = TRUE; ++ ++ //for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) ++ for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) ++ { ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) ++ { ++ bIn24G = Hal_GetChnlGroup88E(ch+1,&group); ++ if(bIn24G) ++ { ++ ++ pHalData->Index24G_CCK_Base[rfPath][ch]=pwrInfo24G.IndexCCK_Base[rfPath][group]; ++ ++ if(ch==(14-1)) ++ pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][4]; ++ else ++ pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][group]; ++ } ++ ++ if(bIn24G) ++ { ++ DBG_871X("======= Path %d, Channel %d =======\n",rfPath,ch+1 ); ++ DBG_871X("Index24G_CCK_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_CCK_Base[rfPath][ch]); ++ DBG_871X("Index24G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_BW40_Base[rfPath][ch]); ++ } ++ } ++ ++ for(TxCount=0;TxCountCCK_24G_Diff[rfPath][TxCount]=pwrInfo24G.CCK_Diff[rfPath][TxCount]; ++ pHalData->OFDM_24G_Diff[rfPath][TxCount]=pwrInfo24G.OFDM_Diff[rfPath][TxCount]; ++ pHalData->BW20_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW20_Diff[rfPath][TxCount]; ++ pHalData->BW40_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW40_Diff[rfPath][TxCount]; ++#if DBG ++ DBG_871X("======= TxCount %d =======\n",TxCount ); ++ DBG_871X("CCK_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->CCK_24G_Diff[rfPath][TxCount]); ++ DBG_871X("OFDM_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_24G_Diff[rfPath][TxCount]); ++ DBG_871X("BW20_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_24G_Diff[rfPath][TxCount]); ++ DBG_871X("BW40_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_24G_Diff[rfPath][TxCount]); ++#endif ++ } ++ } ++ ++ ++ // 2010/10/19 MH Add Regulator recognize for EU. ++ if(!AutoLoadFail) ++ { ++ struct registry_priv *registry_par = &padapter->registrypriv; ++ ++ if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) ++ pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); //bit0~2 ++ else ++ pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); //bit0~2 ++ ++ } ++ else ++ { ++ pHalData->EEPROMRegulatory = 0; ++ } ++ DBG_871X("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); ++ +} + + +VOID -+halTxbfJaguar_FwTxBFCmd( -+ IN PVOID pDM_VOID -+) ++Hal_EfuseParseXtal_8188E( ++ IN PADAPTER pAdapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte Idx, Period0 = 0, Period1 = 0; -+ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u1Byte u1TxBFParm[3] = {0}; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + -+ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { -+ /*Modified by David*/ -+ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (Idx == 0) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) -+ PageNum0 = 0xFE; -+ else -+ PageNum0 = 0xFF; /*stop sounding*/ -+ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); -+ } else if (Idx == 1) { -+ if (pBeamInfo->BeamformeeEntry[Idx].bSound) -+ PageNum1 = 0xFE; -+ else -+ PageNum1 = 0xFF; /*stop sounding*/ -+ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ if(!AutoLoadFail) ++ { ++ pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E]; ++ if(pHalData->CrystalCap == 0xFF) ++ pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; ++ } ++ else ++ { ++ pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; ++ } ++ DBG_871X("CrystalCap: 0x%2x\n", pHalData->CrystalCap); ++} ++ ++void ++Hal_EfuseParseBoardType88E( ++ IN PADAPTER pAdapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if (!AutoLoadFail) { ++ pHalData->InterfaceSel = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E]&0xE0)>>5); ++ if(hwinfo[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) ++ pHalData->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION&0xE0)>>5; ++ } ++ else { ++ pHalData->InterfaceSel = 0; ++ } ++ DBG_871X("Board Type: 0x%2x\n", pHalData->InterfaceSel); ++} ++ ++void ++Hal_EfuseParseEEPROMVer88E( ++ IN PADAPTER padapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if(!AutoLoadFail){ ++ pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E]; ++ if(pHalData->EEPROMVersion == 0xFF) ++ pHalData->EEPROMVersion = EEPROM_Default_Version; ++ } ++ else{ ++ pHalData->EEPROMVersion = 1; ++ } ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n", ++ pHalData->EEPROMVersion)); ++} ++ ++void ++rtl8188e_EfuseParseChnlPlan( ++ IN PADAPTER padapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ padapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan( ++ padapter ++ , hwinfo?hwinfo[EEPROM_ChannelPlan_88E]:0xFF ++ , padapter->registrypriv.channel_plan ++ , RT_CHANNEL_DOMAIN_WORLD_NULL ++ , AutoLoadFail ++ ); ++ ++ DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); ++} ++ ++void ++Hal_EfuseParseCustomerID88E( ++ IN PADAPTER padapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (!AutoLoadFail) ++ { ++ pHalData->EEPROMCustomerID = hwinfo[EEPROM_CustomID_88E]; ++ //pHalData->EEPROMSubCustomerID = hwinfo[EEPROM_CustomID_88E]; ++ } ++ else ++ { ++ pHalData->EEPROMCustomerID = 0; ++ pHalData->EEPROMSubCustomerID = 0; ++ } ++ DBG_871X("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID); ++ //DBG_871X("EEPROM SubCustomer ID: 0x%02x\n", pHalData->EEPROMSubCustomerID); ++} ++ ++ ++void ++Hal_ReadAntennaDiversity88E( ++ IN PADAPTER pAdapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct registry_priv *registry_par = &pAdapter->registrypriv; ++ ++ if(!AutoLoadFail) ++ { ++ // Antenna Diversity setting. ++ if(registry_par->antdiv_cfg == 2)// 2:By EFUSE ++ { ++ pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3; ++ if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) ++ pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;; ++ } ++ else ++ { ++ pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, 2:By EFUSE ++ } ++ ++ if(registry_par->antdiv_type == 0)// If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. ++ { ++ pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E]; ++ if (pHalData->TRxAntDivType == 0xFF) ++ pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; // For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) ++ } ++ else{ ++ pHalData->TRxAntDivType = registry_par->antdiv_type ; ++ } ++ ++ if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV) ++ pHalData->AntDivCfg = 1; // 0xC1[3] is ignored. ++ } ++ else ++ { ++ pHalData->AntDivCfg = 0; ++ } ++ ++ DBG_871X("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n",pHalData->AntDivCfg, pHalData->TRxAntDivType); ++ ++ ++} ++ ++void ++Hal_ReadThermalMeter_88E( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte tempval; ++ ++ // ++ // ThermalMeter from EEPROM ++ // ++ if(!AutoloadFail) ++ pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E]; ++ else ++ pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; ++// pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] ++ ++ if(pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) ++ { ++ pHalData->odmpriv.RFCalibrateInfo.bAPKThermalMeterIgnore = _TRUE; ++ pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; ++ } ++ ++ //pHalData->ThermalMeter[0] = pHalData->EEPROMThermalMeter; ++ DBG_871X("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter); ++ ++} ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++void Hal_ReadRFGainOffset( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 thermal_offset=0; ++ // ++ // BB_RF Gain Offset from EEPROM ++ // ++ ++ if (!AutoloadFail) { ++ pHalData->EEPROMRFGainOffset =PROMContent[EEPROM_RF_GAIN_OFFSET]; ++ ++ if((pHalData->EEPROMRFGainOffset != 0xFF) && ++ (pHalData->EEPROMRFGainOffset & BIT4)){ ++ pHalData->EEPROMRFGainVal = EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL); ++ }else{ ++ pHalData->EEPROMRFGainOffset = 0; ++ pHalData->EEPROMRFGainVal = 0; ++ } ++ ++ DBG_871X("pHalData->EEPROMRFGainVal=%x\n", pHalData->EEPROMRFGainVal); ++ } else { ++ pHalData->EEPROMRFGainVal=EFUSE_Read1Byte(Adapter,EEPROM_RF_GAIN_VAL); ++ ++ if(pHalData->EEPROMRFGainVal != 0xFF) ++ pHalData->EEPROMRFGainOffset = BIT4; ++ else ++ pHalData->EEPROMRFGainOffset = 0; ++ DBG_871X("else AutoloadFail =%x,\n", AutoloadFail); ++ } ++ // ++ // BB_RF Thermal Offset from EEPROM ++ // ++ if( (pHalData->EEPROMRFGainOffset!= 0xFF) && ++ (pHalData->EEPROMRFGainOffset & BIT4)) ++ { ++ ++ thermal_offset = EFUSE_Read1Byte(Adapter, EEPROM_THERMAL_OFFSET); ++ if( thermal_offset != 0xFF){ ++ if(thermal_offset & BIT0) ++ pHalData->EEPROMThermalMeter += ((thermal_offset>>1) & 0x0F); ++ else ++ pHalData->EEPROMThermalMeter -= ((thermal_offset>>1) & 0x0F); ++ ++ DBG_871X("%s =>thermal_offset:0x%02x pHalData->EEPROMThermalMeter=0x%02x\n",__FUNCTION__ ,thermal_offset,pHalData->EEPROMThermalMeter); ++ } ++ } ++ ++ DBG_871X("%s => EEPRORFGainOffset = 0x%02x,EEPROMRFGainVal=0x%02x,thermal_offset:0x%02x \n", ++ __FUNCTION__, pHalData->EEPROMRFGainOffset,pHalData->EEPROMRFGainVal,thermal_offset); ++ ++} ++ ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter) ++{ ++ u8 tmpvalue = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); ++ ++ EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue); ++ ++ // 2010/08/25 MH INF priority > PDN Efuse value. ++ if(tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode) ++ { ++ pHalData->pwrdown = _TRUE; ++ } ++ else ++ { ++ pHalData->pwrdown = _FALSE; ++ } ++ ++ DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); ++ ++ return pHalData->pwrdown; ++} // HalDetectPwrDownMode ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void Hal_DetectWoWMode(PADAPTER pAdapter) ++{ ++ adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; ++} ++#endif ++ ++//==================================================================================== ++// ++// 20100209 Joseph: ++// This function is used only for 92C to set REG_BCN_CTRL(0x550) register. ++// We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate ++// the value of the register via atomic operation. ++// This prevents from race condition when setting this register. ++// The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. ++// ++void SetBcnCtrlReg( ++ PADAPTER padapter, ++ u8 SetBits, ++ u8 ClearBits) ++{ ++ PHAL_DATA_TYPE pHalData; ++ ++ ++ pHalData = GET_HAL_DATA(padapter); ++ ++ pHalData->RegBcnCtrlVal |= SetBits; ++ pHalData->RegBcnCtrlVal &= ~ClearBits; ++ ++#if 0 ++//#ifdef CONFIG_SDIO_HCI ++ if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)) ++ pHalData->RegBcnCtrlVal |= EN_TXBCN_RPT; ++#endif ++ ++ rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal); ++} ++ ++void _InitTransferPageSize(PADAPTER padapter) ++{ ++ // Tx page size is always 128. ++ ++ u8 value8; ++ value8 = _PSRX(PBP_128) | _PSTX(PBP_128); ++ rtw_write8(padapter, REG_PBP, value8); ++} ++ ++void ResumeTxBeacon(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); ++ ++ // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value ++ // which should be read from register to a global variable. ++ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ResumeTxBeacon\n")); ++ ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); ++ pHalData->RegFwHwTxQCtrl |= BIT6; ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff); ++ pHalData->RegReg542 |= BIT0; ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); ++} ++ ++void StopTxBeacon(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); ++ ++ // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value ++ // which should be read from register to a global variable. ++ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+StopTxBeacon\n")); ++ ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); ++ pHalData->RegFwHwTxQCtrl &= (~BIT6); ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64); ++ pHalData->RegReg542 &= ~(BIT0); ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); ++ ++ CheckFwRsvdPageContent(padapter); // 2010.06.23. Added by tynli. ++} ++ ++static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val) ++{ ++ u32 value_rcr, rcr_bits; ++ u16 value_rxfltmap2; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ if (*((u8 *)val) == _HW_STATE_MONITOR_) { ++ ++ /* Leave IPS */ ++ rtw_pm_set_ips(Adapter, IPS_NONE); ++ LeaveAllPowerSaveMode(Adapter); ++ ++ /* Receive all type */ ++ rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_ACF | RCR_AMF | RCR_APP_PHYST_RXFF; ++ ++ /* Append FCS */ ++ rcr_bits |= RCR_APPFCS; ++ ++ #if 0 ++ /* ++ CRC and ICV packet will drop in recvbuf2recvframe() ++ We no turn on it. ++ */ ++ rcr_bits |= (RCR_ACRC32 | RCR_AICV); ++ #endif ++ ++ /* Receive all data frames */ ++ value_rxfltmap2 = 0xFFFF; ++ ++ value_rcr = rcr_bits; ++ rtw_write32(Adapter, REG_RCR, value_rcr); ++ ++ rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2); ++ ++ #if 0 ++ /* tx pause */ ++ rtw_write8(padapter, REG_TXPAUSE, 0xFF); ++ #endif ++ } else { ++ /* do nothing */ ++ } ++ ++} ++ ++static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u8 val8; ++ u8 mode = *((u8 *)val); ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ /* reset RCR */ ++ rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); ++ ++ DBG_871X( ADPT_FMT "Port-%d set opmode = %d\n",ADPT_ARG(Adapter), ++ get_iface_type(Adapter), mode); ++ ++ if (mode == _HW_STATE_MONITOR_) { ++ /* set net_type */ ++ Set_MSR(Adapter, _HW_STATE_NOLINK_); ++ ++ hw_var_set_monitor(Adapter, variable, val); ++ return; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ // disable Port1 TSF update ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); ++ ++ // set net_type ++ Set_MSR(Adapter, mode); ++ ++ if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) ++ { ++ if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) ++ { ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms ++ ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK); ++ #endif ++ ++ #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E)); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK)); ++ #endif ++ ++ #endif// CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ #endif //CONFIG_INTERRUPT_BASED_TXBCN ++ ++ StopTxBeacon(Adapter); ++ #if defined(CONFIG_PCI_HCI) ++ UpdateInterruptMask8188EE( Adapter, 0, 0, RT_BCN_INT_MASKS, 0); ++ #endif ++ } ++ ++ rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function ++ //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); ++ } ++ else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) ++ { ++ //Beacon is polled to TXBUF ++ rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR)|BIT(8)); ++ ++ ResumeTxBeacon(Adapter); ++ rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a); ++ //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 ++ rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); ++ } ++ else if(mode == _HW_STATE_AP_) ++ { ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0); ++ #endif ++ #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK), 0); ++ #endif ++ #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ ++ #endif //CONFIG_INTERRUPT_BASED_TXBCN ++ ++ ResumeTxBeacon(Adapter); ++ ++ rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); ++ ++ //Beacon is polled to TXBUF ++ rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR)|BIT(8)); ++ ++ //Set RCR ++ //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 ++ rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,Reject ICV_ERROR packets ++ ++ //enable to rx data frame ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); ++ //enable to rx ps-poll ++ rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); ++ ++ //Beacon Control related register for first time ++ rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms ++ rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms ++ //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); ++ rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 ++ rtw_write16(Adapter, REG_BCNTCFG, 0x00); ++ rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); ++ rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) ++ ++ //reset TSF2 ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); ++ ++ ++ //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 ++ rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); ++ //enable BCN1 Function for if2 ++ //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) ++ rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) ++ rtw_write8(Adapter, REG_BCN_CTRL, ++ rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); ++#endif ++ //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked ++ //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); ++ //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); ++ ++ //dis BCN0 ATIM WND if if1 is station ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0)); ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Reset TSF for STA+AP concurrent mode ++ if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { ++ if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", ++ __FUNCTION__, __LINE__); ++ } ++#endif // CONFIG_TSF_RESET_OFFLOAD ++#if defined(CONFIG_PCI_HCI) ++ UpdateInterruptMask8188EE( Adapter, RT_BCN_INT_MASKS, 0, 0, 0); ++#endif ++ } ++ } ++ else // (Adapter->iface_type == IFACE_PORT1) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ // disable Port0 TSF update ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ ++ // set net_type ++ Set_MSR(Adapter, mode); ++ ++ if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK); ++ #endif ++ #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E)); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK)); ++ #endif ++ #endif //CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ ++ #endif //CONFIG_INTERRUPT_BASED_TXBCN ++ StopTxBeacon(Adapter); ++ #if defined(CONFIG_PCI_HCI) ++ UpdateInterruptMask8188EE(Adapter, 0, 0, RT_BCN_INT_MASKS, 0); ++ #endif ++ } ++ ++ rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd ++ //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); ++ } ++ else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) ++ { ++ //Beacon is polled to TXBUF ++ rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR)|BIT(8)); ++ ++ ResumeTxBeacon(Adapter); ++ rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); ++ //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 ++ rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); ++ } ++ else if(mode == _HW_STATE_AP_) ++ { ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0); ++ #endif ++ #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ #if defined(CONFIG_USB_HCI) ++ UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0); ++ #elif defined(CONFIG_SDIO_HCI) ++ UpdateInterruptMask8188ESdio(Adapter, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK), 0); ++ #endif ++ #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ ++ #endif //CONFIG_INTERRUPT_BASED_TXBCN ++ ++ ResumeTxBeacon(Adapter); ++ ++ rtw_write8(Adapter, REG_BCN_CTRL, 0x12); ++ ++ //Beacon is polled to TXBUF ++ rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR)|BIT(8)); ++ ++ //Set RCR ++ //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 ++ rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet ++ //enable to rx data frame ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); ++ //enable to rx ps-poll ++ rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); ++ ++ //Beacon Control related register for first time ++ rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms ++ rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms ++ //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); ++ rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms ++ rtw_write16(Adapter, REG_BCNTCFG, 0x00); ++ rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); ++ rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) ++ ++ //reset TSF ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); ++ ++ //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 ++ rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); ++ ++ //enable BCN0 Function for if1 ++ //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) ++ #if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR) ++ rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); ++ #else ++ rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION |BIT(1))); ++ #endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) ++ rtw_write8(Adapter, REG_BCN_CTRL_1, ++ rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); ++#endif ++ ++ //dis BCN1 ATIM WND if if2 is station ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0)); ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Reset TSF for STA+AP concurrent mode ++ if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { ++ if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", ++ __FUNCTION__, __LINE__); ++ } ++#endif // CONFIG_TSF_RESET_OFFLOAD ++#if defined(CONFIG_PCI_HCI) ++ UpdateInterruptMask8188EE( Adapter, RT_BCN_INT_MASKS, 0, 0, 0); ++#endif ++ } ++ } ++} ++static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u8 idx = 0; ++ u32 reg_macid; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ reg_macid = REG_MACID1; ++ } ++ else ++#endif ++ { ++ reg_macid = REG_MACID; ++ } ++ ++ for(idx = 0 ; idx < 6; idx++) ++ { ++ rtw_write8(GET_PRIMARY_ADAPTER(Adapter), (reg_macid+idx), val[idx]); ++ } ++ ++} ++ ++static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u8 idx = 0; ++ u32 reg_bssid; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ reg_bssid = REG_BSSID1; ++ } ++ else ++#endif ++ { ++ reg_bssid = REG_BSSID; ++ } ++ ++ for(idx = 0 ; idx < 6; idx++) ++ { ++ rtw_write8(Adapter, (reg_bssid+idx), val[idx]); ++ } ++ ++} ++ ++static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u32 bcn_ctrl_reg; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ bcn_ctrl_reg = REG_BCN_CTRL_1; ++ } ++ else ++#endif ++ { ++ bcn_ctrl_reg = REG_BCN_CTRL; ++ } ++ ++ if(*((u8 *)val)) ++ { ++ rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); ++ } ++ else ++ { ++ rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); ++ } ++ ++ ++} ++ ++static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ u64 tsf; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++ ++ //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); ++ StopTxBeacon(Adapter); ++ } ++ ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); ++ ++ rtw_write32(Adapter, REG_TSFTR1, tsf); ++ rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); ++ ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); ++ ++ // Update buddy port's TSF if it is SoftAP for beacon TX issue! ++ if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE ++ && check_buddy_fwstate(Adapter, WIFI_AP_STATE) ++ ) { ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); ++ ++ rtw_write32(Adapter, REG_TSFTR, tsf); ++ rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue! ++ if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", ++ __FUNCTION__, __LINE__); ++ ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ } ++ ++ } ++ else ++ { ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); ++ ++ rtw_write32(Adapter, REG_TSFTR, tsf); ++ rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); ++ ++ // Update buddy port's TSF if it is SoftAP for beacon TX issue! ++ if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE ++ && check_buddy_fwstate(Adapter, WIFI_AP_STATE) ++ ) { ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); ++ ++ rtw_write32(Adapter, REG_TSFTR1, tsf); ++ rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Update buddy port's TSF if it is SoftAP for beacon TX issue! ++ if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", ++ __FUNCTION__, __LINE__); ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ } ++ ++ } ++ ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause &= (~STOP_BCNQ); ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); ++ ResumeTxBeacon(Adapter); ++ } ++#endif ++} ++ ++static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++ ++ ++ if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); ++ ++ ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ //reset TSF1 ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); ++ ++ //disable update TSF1 ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); ++ ++ // disable Port1's beacon function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); ++ } ++ else ++ { ++ //reset TSF ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); ++ ++ //disable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++#endif ++} ++ ++static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); ++ struct mlme_priv *pmlmepriv=&(Adapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u32 value_rcr, rcr_clear_bit, value_rxfltmap2; ++ u8 ap_num; ++ ++ rtw_dev_iface_status(Adapter, NULL, NULL, NULL, &ap_num, NULL); ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ ++ rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA); ++ ++ /* Receive all data frames */ ++ value_rxfltmap2 = 0xFFFF; ++ ++#else /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ ++ //config RCR to receive different BSSID & not to receive data frame ++ value_rxfltmap2 = 0; ++ ++#endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ #ifdef CONFIG_CONCURRENT_MODE ++ || (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE) ++ #endif ++ ){ ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ } ++#ifdef CONFIG_TDLS ++ // TDLS will clear RCR_CBSSID_DATA bit for connection. ++ else if (Adapter->tdlsinfo.link_established == _TRUE) ++ { ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ } ++#endif // CONFIG_TDLS ++ ++ value_rcr = rtw_read32(Adapter, REG_RCR); ++ if(*((u8 *)val))//under sitesurvey ++ { ++ //config RCR to receive different BSSID & not to receive data frame ++ value_rcr &= ~(rcr_clear_bit); ++ rtw_write32(Adapter, REG_RCR, value_rcr); ++ rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2); ++ ++ //disable update TSF ++ if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); ++ } ++ else ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++ } ++ ++ if (ap_num) ++ StopTxBeacon(Adapter); ++ ++ } ++ else//sitesurvey done ++ { ++ //enable to rx data frame ++ //write32(Adapter, REG_RCR, read32(padapter, REG_RCR)|RCR_ADF); ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) ++ || check_buddy_fwstate(Adapter, (_FW_LINKED|WIFI_AP_STATE))) ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); ++ ++ //enable update TSF ++ if(Adapter->iface_type == IFACE_PORT1) ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); ++ else ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ value_rcr |= rcr_clear_bit; ++ rtw_write32(Adapter, REG_RCR, value_rcr); ++ ++ if (ap_num) { ++ int i; ++ _adapter *iface; ++ ++ ResumeTxBeacon(Adapter); ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ if (!iface) ++ continue; ++ ++ if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ++ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE ++ ) { ++ iface->mlmepriv.update_bcn = _TRUE; ++ #ifndef CONFIG_INTERRUPT_BASED_TXBCN ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ tx_beacon_hdl(iface, NULL); ++ #endif ++ #endif ++ } + } + } + } -+ -+ u1TxBFParm[0] = PageNum0; -+ u1TxBFParm[1] = PageNum1; -+ u1TxBFParm[2] = (Period1 << 4) | Period0; -+ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, -+ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); ++#endif +} + -+ -+VOID -+HalTxbfJaguar_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte BFerBFeeIdx -+) ++static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u1Byte i = 0; -+ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; -+ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); -+ u4Byte CSI_Param; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ u2Byte STAid = 0; ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 RetryLimit = 0x30; ++ u8 type = *((u8 *)val); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__)); -+ -+ halTxbfJaguar_RfMode(pDM_Odm, pBeamformingInfo); -+ -+ if (pDM_Odm->RFType == ODM_2T2R) -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/ -+ else -+ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/ -+ -+ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { -+ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; -+ -+ /*Sounding protocol control*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xCB); -+ -+ /*MAC address/Partial AID of Beamformer*/ -+ if (BFerIdx == 0) { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]); -+ /*CSI report use legacy ofdm so don't need to fill P_AID. */ -+ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8812A+6, BeamformEntry.P_AID); */ -+ } else { -+ for (i = 0; i < 6 ; i++) -+ ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]); -+ /*CSI report use legacy ofdm so don't need to fill P_AID.*/ -+ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8812A+6, BeamformEntry.P_AID);*/ ++ if(type == 0) // prepare to join ++ { ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ StopTxBeacon(Adapter); + } ++ ++ //enable to rx data frame.Accept all data frame ++ //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); + -+ /*CSI report parameters of Beamformee*/ -+ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) { -+ if (pDM_Odm->RFType == ODM_2T2R) -+ CSI_Param = 0x01090109; -+ else -+ CSI_Param = 0x01080108; -+ } else { -+ if (pDM_Odm->RFType == ODM_2T2R) -+ CSI_Param = 0x03090309; -+ else -+ CSI_Param = 0x03080308; -+ } -+ -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, CSI_Param); -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, CSI_Param); -+ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, CSI_Param); -+ -+ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A + 3, 0x50); -+ } -+ -+ -+ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ STAid = BeamformeeEntry.MacId; ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); + else -+ STAid = BeamformeeEntry.P_AID; ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); + -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (BFeeIdx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A, STAid); -+ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 3) | BIT4 | BIT6 | BIT7); -+ } else -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2, STAid | BIT12 | BIT14 | BIT15); -+ -+ /*CSI report parameters of Beamformee*/ -+ if (BFeeIdx == 0) { -+ /*Get BIT24 & BIT25*/ -+ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3; -+ -+ ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); -+ } else { -+ /*Set BIT25*/ -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200); ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + } -+ phydm_Beamforming_Notify(pDM_Odm); -+ } -+} -+ -+ -+VOID -+HalTxbfJaguar_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMER_ENTRY BeamformerEntry; -+ RT_BEAMFORMEE_ENTRY BeamformeeEntry; -+ -+ if (Idx < BEAMFORMER_ENTRY_NUM) { -+ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; -+ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; -+ } else -+ return; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx)); -+ -+ /*Clear P_AID of Beamformee*/ -+ /*Clear MAC address of Beamformer*/ -+ /*Clear Associated Bfmee Sel*/ -+ -+ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xC8); -+ if (Idx == 0) { -+ ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, 0); -+ } else { -+ ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, 0); -+ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, 0); ++ else // Ad-hoc Mode ++ { ++ RetryLimit = 0x7; + } + } ++ else if(type == 1) //joinbss_event call back when join res < 0 ++ { ++ if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) ++ rtw_write16(Adapter, REG_RXFLTMAP2,0x00); + -+ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { -+ halTxbfJaguar_RfMode(pDM_Odm, pBeamformingInfo); -+ if (Idx == 0) { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A, 0x0); -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0); -+ } else { -+ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2) & 0xF000); -+ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60); ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ ResumeTxBeacon(Adapter); ++ ++ //reset TSF 1/2 after ResumeTxBeacon ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); ++ + } + } ++ else if(type == 2) //sta add event call back ++ { ++ ++ //enable update TSF ++ if(Adapter->iface_type == IFACE_PORT1) ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); ++ else ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ + -+} ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) ++ { ++ //fixed beacon issue for 8191su........... ++ rtw_write8(Adapter,0x542 ,0x02); ++ RetryLimit = 0x7; ++ } + + -+VOID -+HalTxbfJaguar_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte BeamCtrlVal; -+ u4Byte BeamCtrlReg; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; -+ -+ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) -+ BeamCtrlVal = BeamformEntry.MacId; -+ else -+ BeamCtrlVal = BeamformEntry.P_AID; -+ -+ if (Idx == 0) -+ BeamCtrlReg = REG_TXBF_CTRL_8812A; -+ else { -+ BeamCtrlReg = REG_TXBF_CTRL_8812A + 2; -+ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ ResumeTxBeacon(Adapter); ++ ++ //reset TSF 1/2 after ResumeTxBeacon ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); ++ } ++ + } + -+ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) -+ BeamCtrlVal |= BIT9; -+ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) -+ BeamCtrlVal |= (BIT9 | BIT10); -+ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) -+ BeamCtrlVal |= (BIT9 | BIT10 | BIT11); -+ } else -+ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal)); -+ -+ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); -+} -+ -+ -+ -+VOID -+HalTxbfJaguar_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ halTxbfJaguar_DownloadNDPA(pDM_Odm, Idx); -+ -+ halTxbfJaguar_FwTxBFCmd(pDM_Odm); -+} -+ -+ -+VOID -+HalTxbfJaguar_Patch( -+ IN PVOID pDM_VOID, -+ IN u1Byte Operation -+) -+{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); -+ -+ if (pBeamInfo->BeamformCap == BEAMFORMING_CAP_NONE) -+ return; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (Operation == SCAN_OPT_BACKUP_BAND0) -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xC8); -+ else if (Operation == SCAN_OPT_RESTORE) -+ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xCB); ++ rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); ++ +#endif +} + -+VOID -+HalTxbfJaguar_Clk_8812A( -+ IN PVOID pDM_VOID -+) ++ ++ ++void SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) +{ -+ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; -+ u2Byte u2btmp; -+ u1Byte Count = 0, u1btmp; -+ PADAPTER Adapter = pDM_Odm->Adapter; -+ -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); ++ DM_ODM_T *podmpriv = &pHalData->odmpriv; ++_func_enter_; + -+ if (*(pDM_Odm->pbScanInProcess)) { -+ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] return by Scan\n", __func__)); -+ return; -+ } -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ /*Stop PCIe TxDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE); -+#endif ++ switch (variable) { ++ case HW_VAR_MEDIA_STATUS: ++ { ++ u8 val8; + -+ /*Stop Usb TxDMA*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISABLE_FUNC(Adapter, DF_TX_BIT); -+ PlatformReturnAllPendingTxPackets(Adapter); ++ val8 = rtw_read8(adapter, MSR)&0x0c; ++ val8 |= *((u8 *)val); ++ rtw_write8(adapter, MSR, val8); ++ } ++ break; ++ case HW_VAR_MEDIA_STATUS1: ++ { ++ u8 val8; ++ ++ val8 = rtw_read8(adapter, MSR)&0x03; ++ val8 |= *((u8 *)val) <<2; ++ rtw_write8(adapter, MSR, val8); ++ } ++ break; ++ case HW_VAR_SET_OPMODE: ++ hw_var_set_opmode(adapter, variable, val); ++ break; ++ case HW_VAR_MAC_ADDR: ++ hw_var_set_macaddr(adapter, variable, val); ++ break; ++ case HW_VAR_BSSID: ++ hw_var_set_bssid(adapter, variable, val); ++ break; ++ case HW_VAR_BASIC_RATE: ++ { ++ struct mlme_ext_info *mlmext_info = &adapter->mlmeextpriv.mlmext_info; ++ u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; ++ u16 rrsr_2g_force_mask = RRSR_CCK_RATES; ++ u16 rrsr_2g_allow_mask = (RRSR_24M|RRSR_12M|RRSR_6M|RRSR_CCK_RATES); ++ ++ HalSetBrateCfg(adapter, val, &BrateCfg); ++ input_b = BrateCfg; ++ ++ /* apply force and allow mask */ ++ BrateCfg |= rrsr_2g_force_mask; ++ BrateCfg &= rrsr_2g_allow_mask; ++ masked = BrateCfg; ++ ++ /* IOT consideration */ ++ if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) { ++ /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */ ++ if((BrateCfg & (RRSR_24M|RRSR_12M|RRSR_6M)) == 0) ++ BrateCfg |= RRSR_6M; ++ } ++ ioted = BrateCfg; ++ ++ pHalData->BasicRateSet = BrateCfg; ++ ++ DBG_8192C("HW_VAR_BASIC_RATE: %#x -> %#x -> %#x\n", input_b, masked, ioted); ++ ++ // Set RRSR rate table. ++ rtw_write16(adapter, REG_RRSR, BrateCfg); ++ rtw_write8(adapter, REG_RRSR+2, rtw_read8(adapter, REG_RRSR+2)&0xf0); ++ ++ rtw_hal_set_hwreg(adapter, HW_VAR_INIT_RTS_RATE, (u8*)&BrateCfg); ++ } ++ break; ++ case HW_VAR_TXPAUSE: ++ rtw_write8(adapter, REG_TXPAUSE, *((u8 *)val)); ++ break; ++ case HW_VAR_BCN_FUNC: ++ hw_var_set_bcn_func(adapter, variable, val); ++ break; ++ ++ case HW_VAR_CORRECT_TSF: ++#ifdef CONFIG_CONCURRENT_MODE ++ hw_var_set_correct_tsf(adapter, variable, val); +#else -+ rtw_write_port_cancel(Adapter); ++ { ++ u64 tsf; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); ++ StopTxBeacon(adapter); ++ } ++ ++ //disable related TSF function ++ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(3))); ++ ++ rtw_write32(adapter, REG_TSFTR, tsf); ++ rtw_write32(adapter, REG_TSFTR+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)|BIT(3)); ++ ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause &= (~STOP_BCNQ); ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); ++ ResumeTxBeacon(adapter); ++ } ++ } ++#endif ++ break; ++ ++ case HW_VAR_CHECK_BSSID: ++ if(*((u8 *)val)) ++ { ++ rtw_write32(adapter, REG_RCR, rtw_read32(adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ } ++ else ++ { ++ u32 val32; ++ ++ val32 = rtw_read32(adapter, REG_RCR); ++ ++ val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); ++ ++ rtw_write32(adapter, REG_RCR, val32); ++ } ++ break; ++ ++ case HW_VAR_MLME_DISCONNECT: ++#ifdef CONFIG_CONCURRENT_MODE ++ hw_var_set_mlme_disconnect(adapter, variable, val); ++#else ++ { ++ //Set RCR to not to receive data frame when NO LINK state ++ //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF); ++ //reject all data frames ++ rtw_write16(adapter, REG_RXFLTMAP2,0x00); ++ ++ //reset TSF ++ rtw_write8(adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); ++ ++ //disable update TSF ++ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++#endif ++ break; ++ ++ case HW_VAR_MLME_SITESURVEY: ++#ifdef CONFIG_CONCURRENT_MODE ++ hw_var_set_mlme_sitesurvey(adapter, variable, val); ++#else ++ { ++ u32 value_rcr, rcr_clear_bit, value_rxfltmap2; ++ #ifdef CONFIG_FIND_BEST_CHANNEL ++ ++ rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA); ++ ++ /* Receive all data frames */ ++ value_rxfltmap2 = 0xFFFF; ++ ++ #else /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ ++ //config RCR to receive different BSSID & not to receive data frame ++ value_rxfltmap2 = 0; ++ ++ #endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE) { ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ } ++ #ifdef CONFIG_TDLS ++ // TDLS will clear RCR_CBSSID_DATA bit for connection. ++ else if (adapter->tdlsinfo.link_established == _TRUE) { ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ } ++ #endif // CONFIG_TDLS ++ ++ value_rcr = rtw_read32(adapter, REG_RCR); ++ if(*((u8 *)val))//under sitesurvey ++ { ++ //config RCR to receive different BSSID & not to receive data frame ++ value_rcr &= ~(rcr_clear_bit); ++ rtw_write32(adapter, REG_RCR, value_rcr); ++ rtw_write16(adapter, REG_RXFLTMAP2, value_rxfltmap2); ++ ++ //disable update TSF ++ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++ else//sitesurvey done ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((is_client_associated_to_ap(adapter) == _TRUE) || ++ ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ) ++ { ++ //enable to rx data frame ++ //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); ++ rtw_write16(adapter, REG_RXFLTMAP2,0xFFFF); ++ ++ //enable update TSF ++ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(4))); ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ //rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF); ++ rtw_write16(adapter, REG_RXFLTMAP2,0xFFFF); ++ ++ //enable update TSF ++ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(4))); ++ } ++ ++ value_rcr |= rcr_clear_bit; ++ if(((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) && (adapter->in_cta_test)) { ++ u32 v = rtw_read32(adapter, REG_RCR); ++ v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF ++ rtw_write32(adapter, REG_RCR, v); ++ } else { ++ rtw_write32(adapter, REG_RCR, value_rcr); ++ } ++ } ++ } ++#endif ++ break; ++ ++ case HW_VAR_MLME_JOIN: ++#ifdef CONFIG_CONCURRENT_MODE ++ hw_var_set_mlme_join(adapter, variable, val); ++#else ++ { ++ u8 RetryLimit = 0x30; ++ u8 type = *((u8 *)val); ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ if(type == 0) // prepare to join ++ { ++ //enable to rx data frame.Accept all data frame ++ //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); ++ rtw_write16(adapter, REG_RXFLTMAP2,0xFFFF); ++ ++ if(adapter->in_cta_test) ++ { ++ u32 v = rtw_read32(adapter, REG_RCR); ++ v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF ++ rtw_write32(adapter, REG_RCR, v); ++ } ++ else ++ { ++ rtw_write32(adapter, REG_RCR, rtw_read32(adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; ++ } ++ else // Ad-hoc Mode ++ { ++ RetryLimit = 0x7; ++ } ++ } ++ else if(type == 1) //joinbss_event call back when join res < 0 ++ { ++ rtw_write16(adapter, REG_RXFLTMAP2,0x00); ++ } ++ else if(type == 2) //sta add event call back ++ { ++ //enable update TSF ++ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) ++ { ++ RetryLimit = 0x7; ++ } ++ } ++ ++ rtw_write16(adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); ++ } ++#endif ++ break; ++ ++ case HW_VAR_ON_RCR_AM: ++ rtw_write32(adapter, REG_RCR, rtw_read32(adapter, REG_RCR)|RCR_AM); ++ DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(adapter, REG_RCR)); ++ break; ++ case HW_VAR_OFF_RCR_AM: ++ rtw_write32(adapter, REG_RCR, rtw_read32(adapter, REG_RCR)& (~RCR_AM)); ++ DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(adapter, REG_RCR)); ++ break; ++ case HW_VAR_BEACON_INTERVAL: ++ rtw_write16(adapter, REG_BCN_INTERVAL, *((u16 *)val)); ++#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u16 bcn_interval = *((u16 *)val); ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE){ ++ DBG_8192C("%s==> bcn_interval:%d, eraly_int:%d \n",__FUNCTION__,bcn_interval,bcn_interval>>1); ++ rtw_write8(adapter, REG_DRVERLYINT, bcn_interval>>1);// 50ms for sdio ++ } ++ } ++#endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ ++ break; ++ case HW_VAR_SLOT_TIME: ++ { ++ rtw_write8(adapter, REG_SLOT, val[0]); ++ } ++ break; ++ case HW_VAR_ACK_PREAMBLE: ++ { ++ u8 regTmp; ++ u8 bShortPreamble = *( (PBOOLEAN)val ); ++ // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) ++ regTmp = (pHalData->nCur40MhzPrimeSC)<<5; ++ rtw_write8(adapter, REG_RRSR+2, regTmp); ++ ++ regTmp = rtw_read8(adapter,REG_WMAC_TRXPTCL_CTL+2); ++ if(bShortPreamble) ++ regTmp |= BIT1; ++ else ++ regTmp &= (~BIT1); ++ rtw_write8(adapter,REG_WMAC_TRXPTCL_CTL+2,regTmp); ++ } ++ break; ++ case HW_VAR_CAM_EMPTY_ENTRY: ++ { ++ u8 ucIndex = *((u8 *)val); ++ u8 i; ++ u32 ulCommand=0; ++ u32 ulContent=0; ++ u32 ulEncAlgo=CAM_AES; ++ ++ for(i=0;iAcParam_BE = ((u32 *)(val))[0]; ++ rtw_write32(adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); ++ break; ++ case HW_VAR_AC_PARAM_BK: ++ rtw_write32(adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); ++ break; ++ case HW_VAR_ACM_CTRL: ++ { ++ u8 acm_ctrl = *((u8 *)val); ++ u8 AcmCtrl = rtw_read8( adapter, REG_ACMHWCTRL); ++ ++ if(acm_ctrl > 1) ++ AcmCtrl = AcmCtrl | 0x1; ++ ++ if(acm_ctrl & BIT(3)) ++ AcmCtrl |= AcmHw_VoqEn; ++ else ++ AcmCtrl &= (~AcmHw_VoqEn); ++ ++ if(acm_ctrl & BIT(2)) ++ AcmCtrl |= AcmHw_ViqEn; ++ else ++ AcmCtrl &= (~AcmHw_ViqEn); ++ ++ if(acm_ctrl & BIT(1)) ++ AcmCtrl |= AcmHw_BeqEn; ++ else ++ AcmCtrl &= (~AcmHw_BeqEn); ++ ++ DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl ); ++ rtw_write8(adapter, REG_ACMHWCTRL, AcmCtrl ); ++ } ++ break; ++ case HW_VAR_AMPDU_FACTOR: ++ { ++ u8 RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9}; ++ u8 RegToSet_BT[4]={0x31,0x74,0x42, 0x97}; ++ u8 FactorToSet; ++ u8 *pRegToSet; ++ u8 index = 0; ++ ++#ifdef CONFIG_BT_COEXIST ++ if( (pHalData->bt_coexist.BT_Coexist) && ++ (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) ) ++ pRegToSet = RegToSet_BT; // 0x97427431; ++ else ++#endif ++ pRegToSet = RegToSet_Normal; // 0xb972a841; ++ ++ FactorToSet = *((u8 *)val); ++ if(FactorToSet <= 3) ++ { ++ FactorToSet = (1<<(FactorToSet + 2)); ++ if(FactorToSet>0xf) ++ FactorToSet = 0xf; ++ ++ for(index=0; index<4; index++) ++ { ++ if((pRegToSet[index] & 0xf0) > (FactorToSet<<4)) ++ pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4); ++ ++ if((pRegToSet[index] & 0x0f) > FactorToSet) ++ pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); ++ ++ rtw_write8(adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]); ++ } ++ ++ //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); ++ } ++ } ++ break; ++ case HW_VAR_H2C_FW_PWRMODE: ++ { ++ u8 psmode = (*(u8 *)val); ++ ++ // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power ++ // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. ++ if (psmode != PS_MODE_ACTIVE) ++ { ++ ODM_RF_Saving(podmpriv, _TRUE); ++ } ++ rtl8188e_set_FwPwrMode_cmd(adapter, psmode); ++ } ++ break; ++ case HW_VAR_H2C_FW_JOINBSSRPT: ++ { ++ u8 mstatus = (*(u8 *)val); ++ rtl8188e_set_FwJoinBssReport_cmd(adapter, mstatus); ++ } ++ break; ++#ifdef CONFIG_P2P_PS ++ case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: ++ { ++ u8 p2p_ps_state = (*(u8 *)val); ++ rtl8188e_set_p2p_ps_offload_cmd(adapter, p2p_ps_state); ++ } ++ break; ++#endif //CONFIG_P2P_PS ++#ifdef CONFIG_TDLS ++ case HW_VAR_TDLS_WRCR: ++ rtw_write32(adapter, REG_RCR, rtw_read32(adapter, REG_RCR)&(~RCR_CBSSID_DATA )); ++ break; ++ case HW_VAR_TDLS_RS_RCR: ++ rtw_write32(adapter, REG_RCR, rtw_read32(adapter, REG_RCR)|(RCR_CBSSID_DATA)); ++ break; ++#endif //CONFIG_TDLS ++#ifdef CONFIG_BT_COEXIST ++ case HW_VAR_BT_SET_COEXIST: ++ { ++ u8 bStart = (*(u8 *)val); ++ rtl8192c_set_dm_bt_coexist(adapter, bStart); ++ } ++ break; ++ case HW_VAR_BT_ISSUE_DELBA: ++ { ++ u8 dir = (*(u8 *)val); ++ rtl8192c_issue_delete_ba(adapter, dir); ++ } ++ break; ++#endif ++#if (RATE_ADAPTIVE_SUPPORT==1) ++ case HW_VAR_RPT_TIMER_SETTING: ++ { ++ u16 min_rpt_time = (*(u16 *)val); ++ ++ //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); ++ ++ ODM_RA_Set_TxRPT_Time(podmpriv,min_rpt_time); ++ } ++ break; +#endif + -+ /*Wait TXFF empty*/ -+ for (Count = 0; Count < 100; Count++) { -+ u2btmp = ODM_Read2Byte(pDM_Odm, REG_TXPKT_EMPTY_8812A); -+ u2btmp = u2btmp & 0xfff; -+ if (u2btmp != 0xfff) { -+ ODM_delay_ms(10); -+ continue; -+ } else ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ case HW_VAR_ANTENNA_DIVERSITY_LINK: ++ //odm_SwAntDivRestAfterLink8192C(Adapter); ++ ODM_SwAntDivRestAfterLink(podmpriv); + break; -+ } -+ -+ /*TX pause*/ -+ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0xFF); -+ -+ /*Wait TX State Machine OK*/ -+ for (Count = 0; Count < 100; Count++) { -+ if (ODM_Read4Byte(pDM_Odm, REG_SCH_TXCMD_8812A) != 0) -+ continue; -+ else ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case HW_VAR_ANTENNA_DIVERSITY_SELECT: ++ { ++ u8 Optimum_antenna = (*(u8 *)val); ++ u8 Ant ; ++ //switch antenna to Optimum_antenna ++ //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); ++ if(pHalData->CurAntenna != Optimum_antenna) ++ { ++ Ant = (Optimum_antenna==2)?MAIN_ANT:AUX_ANT; ++ ODM_UpdateRxIdleAnt(&pHalData->odmpriv, Ant); ++ ++ pHalData->CurAntenna = Optimum_antenna ; ++ //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); ++ } ++ } + break; -+ } -+ -+ -+ /*Stop RX DMA path*/ -+ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); -+ ODM_Write1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT2); -+ -+ for (Count = 0; Count < 100; Count++) { -+ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); -+ if (u1btmp & BIT1) -+ break; -+ else -+ ODM_delay_ms(10); -+ } -+ -+ /*Disable clock*/ -+ ODM_Write1Byte(pDM_Odm, REG_SYS_CLKR_8812A + 1, 0xf0); -+ /*Disable 320M*/ -+ ODM_Write1Byte(pDM_Odm, REG_AFE_PLL_CTRL_8812A + 3, 0x8); -+ /*Enable 320M*/ -+ ODM_Write1Byte(pDM_Odm, REG_AFE_PLL_CTRL_8812A + 3, 0xa); -+ /*Enable clock*/ -+ ODM_Write1Byte(pDM_Odm, REG_SYS_CLKR_8812A + 1, 0xfc); -+ -+ -+ /*Release Tx pause*/ -+ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0); -+ -+ /*Enable RX DMA path*/ -+ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); -+ ODM_Write1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT2)); -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ /*Enable PCIe TxDMA*/ -+ ODM_Write1Byte(pDM_Odm, REG_PCIE_CTRL_REG_8812A + 1, 0); +#endif -+ /*Start Usb TxDMA*/ -+ RT_ENABLE_FUNC(Adapter, DF_TX_BIT); ++ case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22. ++ pHalData->EfuseUsedBytes = *((u16 *)val); ++ break; ++ case HW_VAR_FIFO_CLEARN_UP: ++ { ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); ++ u8 trycnt = 100; ++ ++ //pause tx ++ rtw_write8(adapter,REG_TXPAUSE,0xff); ++ ++ //keep sn ++ adapter->xmitpriv.nqos_ssn = rtw_read16(adapter,REG_NQOS_SEQ); ++ ++ if(pwrpriv->bkeepfwalive != _TRUE) ++ { ++ //RX DMA stop ++ rtw_write32(adapter,REG_RXPKT_NUM,(rtw_read32(adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); ++ do{ ++ if(!(rtw_read32(adapter,REG_RXPKT_NUM)&RXDMA_IDLE)) ++ break; ++ }while(trycnt--); ++ if(trycnt ==0) ++ DBG_8192C("Stop RX DMA failed...... \n"); ++ ++ //RQPN Load 0 ++ rtw_write16(adapter,REG_RQPN_NPQ,0x0); ++ rtw_write32(adapter,REG_RQPN,0x80000000); ++ rtw_mdelay_os(10); ++ } ++ } ++ break; ++ ++ case HW_VAR_RESTORE_HW_SEQ: ++ /* restore Sequence No. */ ++ rtw_write8(adapter, 0x4dc, adapter->xmitpriv.nqos_ssn); ++ break; ++ ++ case HW_VAR_APFM_ON_MAC: ++ pHalData->bMacPwrCtrlOn = *val; ++ DBG_871X("%s: bMacPwrCtrlOn=%d\n", __func__, pHalData->bMacPwrCtrlOn); ++ break; ++ #if (RATE_ADAPTIVE_SUPPORT == 1) ++ case HW_VAR_TX_RPT_MAX_MACID: ++ { ++ if(pHalData->fw_ractrl == _FALSE){ ++ u8 maxMacid = *val; ++ DBG_8192C("### MacID(%d),Set Max Tx RPT MID(%d)\n",maxMacid,maxMacid+1); ++ rtw_write8(adapter, REG_TX_RPT_CTRL+1, maxMacid+1); ++ } ++ } ++ break; ++ #endif // (RATE_ADAPTIVE_SUPPORT == 1) ++ case HW_VAR_H2C_MEDIA_STATUS_RPT: ++ { ++ rtl8188e_set_FwMediaStatus_cmd(adapter , (*(u16 *)val)); ++ } ++ break; ++ case HW_VAR_BCN_VALID: ++ //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw ++ rtw_write8(adapter, REG_TDECTRL+2, rtw_read8(adapter, REG_TDECTRL+2) | BIT0); ++ break; ++ ++ ++ case HW_VAR_CHECK_TXBUF: ++ { ++ u8 retry_limit; ++ u16 val16; ++ u32 reg_200 = 0, reg_204 = 0; ++ u32 init_reg_200 = 0, init_reg_204 = 0; ++ u32 start = rtw_get_current_time(); ++ u32 pass_ms; ++ int i = 0; ++ ++ retry_limit = 0x01; ++ ++ val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT; ++ rtw_write16(adapter, REG_RL, val16); ++ ++ while (rtw_get_passing_time_ms(start) < 2000 ++ && !RTW_CANNOT_RUN(adapter) ++ ) { ++ reg_200 = rtw_read32(adapter, 0x200); ++ reg_204 = rtw_read32(adapter, 0x204); ++ ++ if (i == 0) { ++ init_reg_200 = reg_200; ++ init_reg_204 = reg_204; ++ } ++ ++ i++; ++ if ((reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) { ++ //DBG_871X("%s: (HW_VAR_CHECK_TXBUF)TXBUF NOT empty - 0x204=0x%x, 0x200=0x%x (%d)\n", __FUNCTION__, reg_204, reg_200, i); ++ rtw_msleep_os(10); ++ } else { ++ break; ++ } ++ } ++ ++ pass_ms = rtw_get_passing_time_ms(start); ++ ++ if (RTW_CANNOT_RUN(adapter)) ++ ; ++ else if (pass_ms >= 2000 || (reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) { ++ DBG_871X_LEVEL(_drv_always_, "%s:(HW_VAR_CHECK_TXBUF)NOT empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); ++ DBG_871X_LEVEL(_drv_always_, "%s:(HW_VAR_CHECK_TXBUF)0x200=0x%08x, 0x204=0x%08x (0x%08x, 0x%08x)\n", ++ __FUNCTION__, reg_200, reg_204, init_reg_200, init_reg_204); ++ //rtw_warn_on(1); ++ } else { ++ DBG_871X("%s:(HW_VAR_CHECK_TXBUF)TXBUF Empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); ++ } ++ ++ retry_limit = 0x30; ++ val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT; ++ rtw_write16(adapter, REG_RL, val16); ++ } ++ break; ++ case HW_VAR_RESP_SIFS: ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ ++ if((pmlmeext->cur_wireless_mode==WIRELESS_11G) || ++ (pmlmeext->cur_wireless_mode==WIRELESS_11BG))//WIRELESS_MODE_G){ ++ { ++ val[0] = 0x0a; ++ val[1] = 0x0a; ++ } else { ++ val[0] = 0x0e; ++ val[1] = 0x0e; ++ } ++ ++ // SIFS for OFDM Data ACK ++ rtw_write8(adapter, REG_SIFS_CTX+1, val[0]); ++ // SIFS for OFDM consecutive tx like CTS data! ++ rtw_write8(adapter, REG_SIFS_TRX+1, val[1]); ++ ++ rtw_write8(adapter, REG_SPEC_SIFS+1, val[0]); ++ rtw_write8(adapter, REG_MAC_SPEC_SIFS+1, val[0]); ++ ++ //RESP_SIFS for OFDM ++ rtw_write8(adapter, REG_RESP_SIFS_OFDM, val[0]); ++ rtw_write8(adapter, REG_RESP_SIFS_OFDM+1, val[0]); ++ } ++ break; ++ ++ case HW_VAR_MACID_SLEEP: ++ { ++ u32 reg_macid_sleep; ++ u8 bit_shift; ++ u8 id = *(u8*)val; ++ u32 val32; ++ ++ if (id < 32){ ++ reg_macid_sleep = REG_MACID_PAUSE_0; ++ bit_shift = id; ++ } else if (id < 64) { ++ reg_macid_sleep = REG_MACID_PAUSE_1; ++ bit_shift = id-32; ++ } else { ++ rtw_warn_on(1); ++ break; ++ } ++ ++ val32 = rtw_read32(adapter, reg_macid_sleep); ++ DBG_8192C(FUNC_ADPT_FMT ": [HW_VAR_MACID_SLEEP] macid=%d, org reg_0x%03x=0x%08X\n", ++ FUNC_ADPT_ARG(adapter), id, reg_macid_sleep, val32); ++ ++ if (val32 & BIT(bit_shift)) ++ break; ++ ++ val32 |= BIT(bit_shift); ++ rtw_write32(adapter, reg_macid_sleep, val32); ++ } ++ break; ++ ++ case HW_VAR_MACID_WAKEUP: ++ { ++ u32 reg_macid_sleep; ++ u8 bit_shift; ++ u8 id = *(u8*)val; ++ u32 val32; ++ ++ if (id < 32){ ++ reg_macid_sleep = REG_MACID_PAUSE_0; ++ bit_shift = id; ++ } else if (id < 64) { ++ reg_macid_sleep = REG_MACID_PAUSE_1; ++ bit_shift = id-32; ++ } else { ++ rtw_warn_on(1); ++ break; ++ } ++ ++ val32 = rtw_read32(adapter, reg_macid_sleep); ++ DBG_8192C(FUNC_ADPT_FMT ": [HW_VAR_MACID_WAKEUP] macid=%d, org reg_0x%03x=0x%08X\n", ++ FUNC_ADPT_ARG(adapter), id, reg_macid_sleep, val32); ++ ++ if (!(val32 & BIT(bit_shift))) ++ break; ++ ++ val32 &= ~BIT(bit_shift); ++ rtw_write32(adapter, reg_macid_sleep, val32); ++ } ++ break; ++ ++ default: ++ SetHwReg(adapter, variable, val); ++ break; ++ } ++ ++_func_exit_; +} + ++struct qinfo_88e { ++ u32 head:8; ++ u32 pkt_num:8; ++ u32 tail:8; ++ u32 ac:2; ++ u32 macid:6; ++}; ++ ++struct bcn_qinfo_88e { ++ u16 head:8; ++ u16 pkt_num:8; ++}; ++ ++void dump_qinfo_88e(void *sel, struct qinfo_88e *info, const char *tag) ++{ ++ //if (info->pkt_num) ++ DBG_871X_SEL_NL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n" ++ , tag ? tag : "", info->head, info->tail, info->pkt_num, info->macid, info->ac ++ ); ++} ++ ++void dump_bcn_qinfo_88e(void *sel, struct bcn_qinfo_88e *info, const char *tag) ++{ ++ //if (info->pkt_num) ++ DBG_871X_SEL_NL(sel, "%shead:0x%02x, pkt_num:%u\n" ++ , tag ? tag : "", info->head, info->pkt_num ++ ); ++} ++ ++void dump_mac_qinfo_88e(void *sel, _adapter *adapter) ++{ ++ u32 q0_info; ++ u32 q1_info; ++ u32 q2_info; ++ u32 q3_info; ++ /* ++ u32 q4_info; ++ u32 q5_info; ++ u32 q6_info; ++ u32 q7_info; ++ */ ++ u32 mg_q_info; ++ u32 hi_q_info; ++ u16 bcn_q_info; ++ ++ q0_info = rtw_read32(adapter, REG_Q0_INFO); ++ q1_info = rtw_read32(adapter, REG_Q1_INFO); ++ q2_info = rtw_read32(adapter, REG_Q2_INFO); ++ q3_info = rtw_read32(adapter, REG_Q3_INFO); ++ /* ++ q4_info = rtw_read32(adapter, REG_Q4_INFO); ++ q5_info = rtw_read32(adapter, REG_Q5_INFO); ++ q6_info = rtw_read32(adapter, REG_Q6_INFO); ++ q7_info = rtw_read32(adapter, REG_Q7_INFO); ++ */ ++ mg_q_info = rtw_read32(adapter, REG_MGQ_INFO); ++ hi_q_info = rtw_read32(adapter, REG_HGQ_INFO); ++ bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO); ++ ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q0_info, "Q0 "); ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q1_info, "Q1 "); ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q2_info, "Q2 "); ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q3_info, "Q3 "); ++ /* ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q4_info, "Q4 "); ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q5_info, "Q5 "); ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q6_info, "Q6 "); ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&q7_info, "Q7 "); ++ */ ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&mg_q_info, "MG "); ++ dump_qinfo_88e(sel, (struct qinfo_88e *)&hi_q_info, "HI "); ++ dump_bcn_qinfo_88e(sel, (struct bcn_qinfo_88e *)&bcn_q_info, "BCN "); ++} ++ ++void GetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); ++ ++_func_enter_; ++ ++ switch (variable) { ++ case HW_VAR_SYS_CLKR: ++ *val = rtw_read8(adapter, REG_SYS_CLKR); ++ break; ++ ++ case HW_VAR_TXPAUSE: ++ val[0] = rtw_read8(adapter, REG_TXPAUSE); ++ break; ++ case HW_VAR_BCN_VALID: ++ //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 ++ val[0] = (BIT0 & rtw_read8(adapter, REG_TDECTRL+2))?_TRUE:_FALSE; ++ break; ++ case HW_VAR_FWLPS_RF_ON: ++ { ++ //When we halt NIC, we should check if FW LPS is leave. ++ if(adapter_to_pwrctl(adapter)->rf_pwrstate == rf_off) ++ { ++ // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, ++ // because Fw is unload. ++ val[0] = _TRUE; ++ } ++ else ++ { ++ u32 valRCR; ++ valRCR = rtw_read32(adapter, REG_RCR); ++ valRCR &= 0x00070000; ++ if(valRCR) ++ val[0] = _FALSE; ++ else ++ val[0] = _TRUE; ++ } ++ } ++ break; ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case HW_VAR_CURRENT_ANTENNA: ++ val[0] = pHalData->CurAntenna; ++ break; ++#endif ++ case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. ++ *((u16 *)(val)) = pHalData->EfuseUsedBytes; ++ break; ++ case HW_VAR_APFM_ON_MAC: ++ *val = pHalData->bMacPwrCtrlOn; ++ break; ++ case HW_VAR_CHK_HI_QUEUE_EMPTY: ++ *val = ((rtw_read32(adapter, REG_HGQ_INFO)&0x0000ff00)==0) ? _TRUE:_FALSE; ++ break; ++ case HW_VAR_DUMP_MAC_QUEUE_INFO: ++ dump_mac_qinfo_88e(val, adapter); ++ break; ++ default: ++ GetHwReg(adapter, variable, val); ++ break; ++ } ++ ++_func_exit_; ++} ++ ++u8 ++GetHalDefVar8188E( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 bResult = _SUCCESS; ++ ++ switch(eVariable) ++ { ++ case HAL_DEF_IS_SUPPORT_ANT_DIV: ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ *((u8 *)pValue) = (pHalData->AntDivCfg==0)?_FALSE:_TRUE; ++ #endif ++break; ++ case HAL_DEF_CURRENT_ANTENNA: ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ *(( u8*)pValue) = pHalData->CurAntenna; ++#endif ++ break; ++ case HAL_DEF_DRVINFO_SZ: ++ *(( u32*)pValue) = DRVINFO_SZ; ++ break; ++ case HAL_DEF_MAX_RECVBUF_SZ: ++#ifdef CONFIG_SDIO_HCI ++ *((u32 *)pValue) = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter); ++#else ++ *((u32 *)pValue) = MAX_RECVBUF_SZ; ++#endif ++ break; ++ case HAL_DEF_RX_PACKET_OFFSET: ++ *(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ; ++ break; ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ case HAL_DEF_RA_DECISION_RATE: ++ { ++ u8 MacID = *((u8*)pValue); ++ *((u8*)pValue) = ODM_RA_GetDecisionRate_8188E(&(pHalData->odmpriv), MacID); ++ } ++ break; ++ ++ case HAL_DEF_RA_SGI: ++ { ++ u8 MacID = *((u8*)pValue); ++ *((u8*)pValue) = ODM_RA_GetShortGI_8188E(&(pHalData->odmpriv), MacID); ++ } ++ break; +#endif + + ++ case HAL_DEF_PT_PWR_STATUS: ++#if(POWER_TRAINING_ACTIVE==1) ++ { ++ u8 MacID = *((u8*)pValue); ++ *((u8*)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(pHalData->odmpriv), MacID); ++ } ++#endif //(POWER_TRAINING_ACTIVE==1) ++ break; ++ case HAL_DEF_EXPLICIT_BEAMFORMEE: ++ case HAL_DEF_EXPLICIT_BEAMFORMER: ++ *((u8 *)pValue) = _FALSE; ++ break; + -+#endif ++ case HW_DEF_RA_INFO_DUMP: + -diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.h b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.h ++ { ++ u8 mac_id = *((u8*)pValue); ++ u8 bLinked = _FALSE; ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if(rtw_linked_check(Adapter)) ++ bLinked = _TRUE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) ++ bLinked = _TRUE; ++#endif ++ ++ if(bLinked){ ++ DBG_871X("============ RA status - Mac_id:%d ===================\n",mac_id); ++ if(pHalData->fw_ractrl == _FALSE){ ++ #if (RATE_ADAPTIVE_SUPPORT == 1) ++ DBG_8192C("Mac_id:%d ,RSSI:%d(%%) ,PTStage = %d\n", ++ mac_id,pHalData->odmpriv.RAInfo[mac_id].RssiStaRA,pHalData->odmpriv.RAInfo[mac_id].PTStage); ++ ++ DBG_8192C("RateID = %d,RAUseRate = 0x%08x,RateSGI = %d, DecisionRate = %s\n", ++ pHalData->odmpriv.RAInfo[mac_id].RateID, ++ pHalData->odmpriv.RAInfo[mac_id].RAUseRate, ++ pHalData->odmpriv.RAInfo[mac_id].RateSGI, ++ HDATA_RATE(pHalData->odmpriv.RAInfo[mac_id].DecisionRate)); ++ #endif // (RATE_ADAPTIVE_SUPPORT == 1) ++ }else{ ++ u8 cur_rate = rtw_read8(Adapter,REG_ADAPTIVE_DATA_RATE_0+mac_id); ++ u8 sgi = (cur_rate & BIT7)?_TRUE:_FALSE; ++ cur_rate &= 0x7f; ++ DBG_8192C("Mac_id:%d ,SGI:%d ,Rate:%s \n",mac_id,sgi,HDATA_RATE(cur_rate)); ++ } ++ } ++ } ++ ++ break; ++ case HAL_DEF_TX_PAGE_SIZE: ++ *(( u32*)pValue) = PAGE_SIZE_128; ++ break; ++ case HAL_DEF_TX_PAGE_BOUNDARY: ++ if (!Adapter->registrypriv.wifi_spec) ++ *(u8*)pValue = TX_PAGE_BOUNDARY_88E(Adapter); ++ else ++ *(u8*)pValue = WMM_NORMAL_TX_PAGE_BOUNDARY_88E(Adapter); ++ break; ++ case HAL_DEF_MACID_SLEEP: ++ *(u8*)pValue = _TRUE; // support macid sleep ++ break; ++ case HAL_DEF_RX_DMA_SZ_WOW: ++ *(u32 *)pValue = RX_DMA_SIZE_88E(Adapter) - RESV_FMWF; ++ break; ++ case HAL_DEF_RX_DMA_SZ: ++ *(u32 *)pValue = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter); ++ break; ++ case HAL_DEF_RX_PAGE_SIZE: ++ *(u32 *)pValue = PAGE_SIZE_128; ++ break; ++ default: ++ bResult = GetHalDefVar(Adapter, eVariable, pValue); ++ break; ++ } ++ ++ return bResult; ++} ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_phycfg.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_phycfg.c new file mode 100644 -index 000000000..ba16b7f04 +index 0000000..7c68faf --- /dev/null -+++ b/drivers/net/wireless/realtek/rtl8189fs/hal/phydm/txbf/haltxbfjaguar.h -@@ -0,0 +1,67 @@ -+#ifndef __HAL_TXBF_JAGUAR_H__ -+#define __HAL_TXBF_JAGUAR_H__ ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_phycfg.c +@@ -0,0 +1,2242 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8188E_PHYCFG_C_ ++ ++#include ++#include ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++/* Channel switch:The size of command tables for switch channel*/ ++#define MAX_PRECMD_CNT 16 ++#define MAX_RFDEPENDCMD_CNT 16 ++#define MAX_POSTCMD_CNT 16 ++ ++#define MAX_DOZE_WAITING_TIMES_9x 64 ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++ ++/*------------------------Define local variable------------------------------*/ ++ ++ ++/*--------------------Define export function prototype-----------------------*/ ++// Please refer to header file ++/*--------------------Define export function prototype-----------------------*/ ++ ++/*----------------------------Function Body----------------------------------*/ ++// ++// 1. BB register R/W API ++// ++ ++#if(SIC_ENABLE == 1) ++static BOOLEAN ++sic_IsSICReady( ++ IN PADAPTER Adapter ++ ) ++{ ++ BOOLEAN bRet=_FALSE; ++ u32 retryCnt=0; ++ u8 sic_cmd=0xff; ++ ++ while(1) ++ { ++ if(retryCnt++ >= SIC_MAX_POLL_CNT) ++ { ++ //RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return FALSE\n")); ++ return _FALSE; ++ } ++ ++ //if(RT_SDIO_CANNOT_IO(Adapter)) ++ // return _FALSE; ++ ++ sic_cmd = rtw_read8(Adapter, SIC_CMD_REG); ++ //sic_cmd = PlatformEFIORead1Byte(Adapter, SIC_CMD_REG); ++#if(SIC_HW_SUPPORT == 1) ++ sic_cmd &= 0xf0; // [7:4] ++#endif ++ //RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady(), readback 0x%x=0x%x\n", SIC_CMD_REG, sic_cmd)); ++ if(sic_cmd == SIC_CMD_READY) ++ return _TRUE; ++ else ++ { ++ rtw_msleep_os(1); ++ //delay_ms(1); ++ } ++ } ++ ++ return bRet; ++} ++ ++/* ++u32 ++sic_CalculateBitShift( ++ u32 BitMask ++ ) ++{ ++ u32 i; ++ ++ for(i=0; i<=31; i++) ++ { ++ if ( ((BitMask>>i) & 0x1 ) == 1) ++ break; ++ } ++ ++ return (i); ++} ++*/ ++ ++static u32 ++sic_Read4Byte( ++ PVOID Adapter, ++ u32 offset ++ ) ++{ ++ u32 u4ret=0xffffffff; ++#if RTL8188E_SUPPORT == 1 ++ u8 retry = 0; ++#endif ++ ++ //RTPRINT(FPHY, PHY_SICR, ("[SIC], sic_Read4Byte(): read offset(%#x)\n", offset)); ++ ++ if(sic_IsSICReady(Adapter)) ++ { ++#if(SIC_HW_SUPPORT == 1) ++ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); ++ //RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREREAD)); ++#endif ++ rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); ++ //RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); ++ rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); ++ //RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8))); ++ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_READ); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ); ++ //RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ)); ++ ++#if RTL8188E_SUPPORT == 1 ++ retry = 4; ++ while(retry--){ ++ rtw_udelay_os(50); ++ //PlatformStallExecution(50); ++ } ++#else ++ rtw_udelay_os(200); ++ //PlatformStallExecution(200); ++#endif ++ ++ if(sic_IsSICReady(Adapter)) ++ { ++ u4ret = rtw_read32(Adapter, SIC_DATA_REG); ++ //u4ret = PlatformEFIORead4Byte(Adapter, SIC_DATA_REG); ++ //RTPRINT(FPHY, PHY_SICR, ("read 0x%x = 0x%x\n", SIC_DATA_REG, u4ret)); ++ //DbgPrint("<===Read 0x%x = 0x%x\n", offset, u4ret); ++ } ++ } ++ ++ return u4ret; ++} ++ ++static VOID ++sic_Write4Byte( ++ PVOID Adapter, ++ u32 offset, ++ u32 data ++ ) ++{ ++#if RTL8188E_SUPPORT == 1 ++ u8 retry = 6; ++#endif ++ //DbgPrint("=>Write 0x%x = 0x%x\n", offset, data); ++ //RTPRINT(FPHY, PHY_SICW, ("[SIC], sic_Write4Byte(): write offset(%#x)=0x%x\n", offset, data)); ++ if(sic_IsSICReady(Adapter)) ++ { ++#if(SIC_HW_SUPPORT == 1) ++ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); ++ //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREWRITE)); ++#endif ++ rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); ++ //RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); ++ rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); ++ //RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u1Byte)((offset&0xff00)>>8))); ++ rtw_write32(Adapter, SIC_DATA_REG, (u32)data); ++ //PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u4Byte)data); ++ //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_DATA_REG, data)); ++ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); ++ //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_WRITE)); ++#if RTL8188E_SUPPORT == 1 ++ while(retry--){ ++ rtw_udelay_os(50); ++ //PlatformStallExecution(50); ++ } ++#else ++ rtw_udelay_os(150); ++ //PlatformStallExecution(150); ++#endif ++ ++ } ++} ++//============================================================ ++// extern function ++//============================================================ ++static VOID ++SIC_SetBBReg( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 OriginalValue, BitShift; ++ u16 BBWaitCounter = 0; ++ ++ //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() start\n")); ++/* ++ while(PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) ++ { ++ BBWaitCounter ++; ++ delay_ms(10); // 1 ms ++ ++ if((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) ++ {// Wait too long, return FALSE to avoid to be stuck here. ++ RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), Fail to set BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); ++ return; ++ } ++ } ++*/ ++ // ++ // Critical section start ++ // ++ ++ //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), mask=0x%x, addr[0x%x]=0x%x\n", BitMask, RegAddr, Data)); ++ ++ if(BitMask!= bMaskDWord){//if not "double word" write ++ OriginalValue = sic_Read4Byte(Adapter, RegAddr); ++ //BitShift = sic_CalculateBitShift(BitMask); ++ BitShift = PHY_CalculateBitShift(BitMask); ++ Data = (((OriginalValue) & (~BitMask)) | (Data << BitShift)); ++ } ++ ++ sic_Write4Byte(Adapter, RegAddr, Data); ++ ++ //PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); ++ //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() end\n")); ++} ++ ++static u32 ++SIC_QueryBBReg( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 ReturnValue = 0, OriginalValue, BitShift; ++ u16 BBWaitCounter = 0; ++ ++ //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() start\n")); ++ ++/* ++ while(PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) ++ { ++ BBWaitCounter ++; ++ delay_ms(10); // 10 ms ++ ++ if((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) ++ {// Wait too long, return FALSE to avoid to be stuck here. ++ RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_QueryBBReg(), Fail to query BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); ++ return ReturnValue; ++ } ++ } ++*/ ++ OriginalValue = sic_Read4Byte(Adapter, RegAddr); ++ //BitShift = sic_CalculateBitShift(BitMask); ++ BitShift = PHY_CalculateBitShift(BitMask); ++ ReturnValue = (OriginalValue & BitMask) >> BitShift; ++ ++ //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg(), 0x%x=0x%x\n", RegAddr, OriginalValue)); ++ //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() end\n")); ++ ++ //PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); ++ return (ReturnValue); ++} ++ ++VOID ++SIC_Init( ++ IN PADAPTER Adapter ++ ) ++{ ++ // Here we need to write 0x1b8~0x1bf = 0 after fw is downloaded ++ // because for 8723E at beginning 0x1b8=0x1e, that will cause ++ // sic always not be ready ++#if(SIC_HW_SUPPORT == 1) ++ //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", ++ // SIC_INIT_REG, SIC_INIT_VAL)); ++ rtw_write8(Adapter, SIC_INIT_REG, SIC_INIT_VAL); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_INIT_REG, SIC_INIT_VAL); ++ //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", ++ // SIC_CMD_REG, SIC_CMD_INIT)); ++ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_INIT); ++ //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_INIT); ++#else ++ //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x1b8~0x1bf = 0x0\n")); ++ rtw_write32(Adapter, SIC_CMD_REG, 0); ++ //PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG, 0); ++ rtw_write32(Adapter, SIC_CMD_REG+4, 0); ++ //PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG+4, 0); ++#endif ++} ++ ++static BOOLEAN ++SIC_LedOff( ++ IN PADAPTER Adapter ++ ) ++{ ++ // When SIC is enabled, led pin will be used as debug pin, ++ // so don't execute led function when SIC is enabled. ++ return _TRUE; ++} ++#endif ++ ++/** ++* Function: PHY_QueryBBReg ++* ++* OverView: Read "sepcific bits" from BB register ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be readback ++* u4Byte BitMask //The target bit position in the target address ++* //to be readback ++* Output: None ++* Return: u4Byte Data //The readback register value ++* Note: This function is equal to "GetRegSetting" in PHY programming guide ++*/ ++u32 ++PHY_QueryBBReg8188E( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 ReturnValue = 0, OriginalValue, BitShift; ++ u16 BBWaitCounter = 0; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++#if(SIC_ENABLE == 1) ++ return SIC_QueryBBReg(Adapter, RegAddr, BitMask); ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); ++ ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = PHY_CalculateBitShift(BitMask); ++ ReturnValue = (OriginalValue & BitMask) >> BitShift; ++ ++ //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); ++ ++ return (ReturnValue); ++ ++} ++ ++ ++/** ++* Function: PHY_SetBBReg ++* ++* OverView: Write "Specific bits" to BB register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register value in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRegSetting" in PHY programming guide ++*/ ++ ++VOID ++PHY_SetBBReg8188E( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u16 BBWaitCounter = 0; ++ u32 OriginalValue, BitShift; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++#if(SIC_ENABLE == 1) ++ SIC_SetBBReg(Adapter, RegAddr, BitMask, Data); ++ return; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); ++ ++ if(BitMask!= bMaskDWord){//if not "double word" write ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = PHY_CalculateBitShift(BitMask); ++ Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); ++ } ++ ++ rtw_write32(Adapter, RegAddr, Data); ++ ++ //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); ++ ++} ++ ++ ++// ++// 2. RF register R/W API ++// ++/** ++* Function: phy_RFSerialRead ++* ++* OverView: Read regster from RF chips ++* ++* Input: ++* PADAPTER Adapter, ++* u8 eRFPath, //Radio path of A/B/C/D ++* u4Byte Offset, //The target address to be read ++* ++* Output: None ++* Return: u4Byte reback value ++* Note: Threre are three types of serial operations: ++* 1. Software serial write ++* 2. Hardware LSSI-Low Speed Serial Interface ++* 3. Hardware HSSI-High speed ++* serial write. Driver need to implement (1) and (2). ++* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() ++*/ ++static u32 ++phy_RFSerialRead( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 Offset ++ ) ++{ ++ u32 retValue = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ u32 tmplong,tmplong2; ++ u8 RfPiEnable=0; ++#if 0 ++ if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs ++ return retValue; ++ if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs ++ return retValue; ++#endif ++ // ++ // Make sure RF register offset is correct ++ // ++ Offset &= 0xff; ++ ++ // ++ // Switch page for 8256 RF IC ++ // ++ NewOffset = Offset; ++ ++ // 2009/06/17 MH We can not execute IO for power save or other accident mode. ++ //if(RT_CANNOT_IO(Adapter)) ++ //{ ++ // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); ++ // return 0xFFFFFFFF; ++ //} ++ ++ // For 92S LSSI Read RFLSSIRead ++ // For RF A/B write 0x824/82c(does not work in the future) ++ // We must use 0x824 for RF A and B to execute read trigger ++ tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); ++ if(eRFPath == RF_PATH_A) ++ tmplong2 = tmplong; ++ else ++ tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); ++ ++ tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF ++ ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); ++ rtw_udelay_os(10);// PlatformStallExecution(10); ++ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); ++ rtw_udelay_os(100);//PlatformStallExecution(100); ++ ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); ++ rtw_udelay_os(10);//PlatformStallExecution(10); ++ ++ if(eRFPath == RF_PATH_A) ++ RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); ++ else if(eRFPath == RF_PATH_B) ++ RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); ++ ++ if(RfPiEnable) ++ { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); ++ //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); ++ } ++ else ++ { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); ++ //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); ++ } ++ //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); ++ ++ return retValue; ++ ++} ++ ++ ++ ++/** ++* Function: phy_RFSerialWrite ++* ++* OverView: Write data to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* u8 eRFPath, //Radio path of A/B/C/D ++* u4Byte Offset, //The target address to be read ++* u4Byte Data //The new register Data in the target bit position ++* //of the target to be read ++* ++* Output: None ++* Return: None ++* Note: Threre are three types of serial operations: ++* 1. Software serial write ++* 2. Hardware LSSI-Low Speed Serial Interface ++* 3. Hardware HSSI-High speed ++* serial write. Driver need to implement (1) and (2). ++* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() ++ * ++ * Note: For RF8256 only ++ * The total count of RTL8256(Zebra4) register is around 36 bit it only employs ++ * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) ++ * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration ++ * programming guide" for more details. ++ * Thus, we define a sub-finction for RTL8526 register address conversion ++ * =========================================================== ++ * Register Mode RegCTL[1] RegCTL[0] Note ++ * (Reg00[12]) (Reg00[10]) ++ * =========================================================== ++ * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * ++ * 2008/09/02 MH Add 92S RF definition ++ * ++ * ++ * ++*/ ++static VOID ++phy_RFSerialWrite( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 Offset, ++ IN u32 Data ++ ) ++{ ++ u32 DataAndAddr = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ ++#if 0 ++ // We should check valid regs for RF_6052 case. ++ if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs ++ return; ++ if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs ++ return; ++#endif ++ ++ // 2009/06/17 MH We can not execute IO for power save or other accident mode. ++ //if(RT_CANNOT_IO(Adapter)) ++ //{ ++ // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); ++ // return; ++ //} ++ ++ Offset &= 0xff; ++ ++ // ++ // Shadow Update ++ // ++ //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); ++ ++ // ++ // Switch page for 8256 RF IC ++ // ++ NewOffset = Offset; ++ ++ // ++ // Put write addr in [5:0] and write data in [31:16] ++ // ++ //DataAndAddr = (Data<<16) | (NewOffset&0x3f); ++ DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF ++ ++ // ++ // Write Operation ++ // ++ PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); ++ //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); ++ ++} ++ ++ ++/** ++* Function: PHY_QueryRFReg ++* ++* OverView: Query "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* u8 eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be read ++* u4Byte BitMask //The target bit position in the target address ++* //to be read ++* ++* Output: None ++* Return: u4Byte Readback value ++* Note: This function is equal to "GetRFRegSetting" in PHY programming guide ++*/ ++u32 ++PHY_QueryRFReg8188E( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 Original_Value, Readback_Value, BitShift; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u8 RFWaitCounter = 0; ++ //_irqL irqL; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformAcquireMutex(&pHalData->mxRFOperate); ++#else ++ //_enter_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); ++ ++ BitShift = PHY_CalculateBitShift(BitMask); ++ Readback_Value = (Original_Value & BitMask) >> BitShift; ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformReleaseMutex(&pHalData->mxRFOperate); ++#else ++ //_exit_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", ++ // RegAddr, eRFPath, Original_Value)); ++ ++ return (Readback_Value); ++} ++ ++/** ++* Function: PHY_SetRFReg ++* ++* OverView: Write "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* u8 eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register Data in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRFRegSetting" in PHY programming guide ++*/ ++VOID ++PHY_SetRFReg8188E( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u1Byte RFWaitCounter = 0; ++ u32 Original_Value, BitShift; ++ //_irqL irqL; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformAcquireMutex(&pHalData->mxRFOperate); ++#else ++ //_enter_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ // RF data is 12 bits only ++ if (BitMask != bRFRegOffsetMask) ++ { ++ Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); ++ BitShift = PHY_CalculateBitShift(BitMask); ++ Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); ++ } ++ ++ phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); ++ ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformReleaseMutex(&pHalData->mxRFOperate); ++#else ++ //_exit_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ ++} ++ ++ ++// ++// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. ++// ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_MACConfig8192C ++ * ++ * Overview: Condig MAC by header file or parameter file. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 08/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++s32 PHY_MACConfig8188E(PADAPTER Adapter) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s8 *pszMACRegFile; ++ s8 sz8188EMACRegFile[] = RTL8188E_PHY_MACREG; ++ u16 val=0; ++ ++ pszMACRegFile = sz8188EMACRegFile; ++ ++ // ++ // Config MAC ++ // ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); ++ if (rtStatus == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv)) ++ rtStatus = _FAIL; ++ else ++ rtStatus = _SUCCESS; ++#endif//CONFIG_EMBEDDED_FWIMG ++ } ++ ++ // 2010.07.13 AMPDU aggregation number B ++ val |= MAX_AGGR_NUM; ++ val = val << 8; ++ val |= MAX_AGGR_NUM; ++ rtw_write16(Adapter, REG_MAX_AGGR_NUM, val); ++ //rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0B); ++ ++ return rtStatus; ++ ++} ++ ++/*----------------------------------------------------------------------------- ++* Function: phy_InitBBRFRegisterDefinition ++* ++* OverView: Initialize Register definition offset for Radio Path A/B/C/D ++* ++* Input: ++* PADAPTER Adapter, ++* ++* Output: None ++* Return: None ++* Note: The initialization value is constant and it should never be changes ++-----------------------------------------------------------------------------*/ ++static VOID ++phy_InitBBRFRegisterDefinition( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // RF Interface Sowrtware Control ++ pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 ++ pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) ++ pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 ++ pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) ++ ++ // RF Interface Output (and Enable) ++ pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 ++ pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 ++ ++ // RF Interface (Output and) Enable ++ pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) ++ pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) ++ ++ //Addr of LSSI. Wirte RF register by driver ++ pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter ++ pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; ++ ++ // Tranceiver A~D HSSI Parameter-2 ++ pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 ++ pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 ++ ++ // Tranceiver LSSI Readback SI mode ++ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; ++ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; ++ pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; ++ pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; ++ ++ // Tranceiver LSSI Readback PI mode ++ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; ++ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; ++ //pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; ++ //pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; ++ ++} ++ ++VOID ++storePwrIndexDiffRateOffset( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(RegAddr == rTxAGC_A_Rate18_06) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][0]-TxAGC_A_Rate18_06 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]); ++ } ++ if(RegAddr == rTxAGC_A_Rate54_24) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][1]-TxAGC_A_Rate54_24 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1]); ++ } ++ if(RegAddr == rTxAGC_A_CCK1_Mcs32) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][6]-TxAGC_A_CCK1_Mcs32 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6]); ++ } ++ if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == bMaskH3Bytes) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][7]-TxAGC_B_CCK11_A_CCK2_11 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7]); ++ } ++ if(RegAddr == rTxAGC_A_Mcs03_Mcs00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][2]-TxAGC_A_Mcs03_Mcs00 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2]); ++ } ++ if(RegAddr == rTxAGC_A_Mcs07_Mcs04) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][3]-TxAGC_A_Mcs07_Mcs04 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3]); ++ } ++ if(RegAddr == rTxAGC_A_Mcs11_Mcs08) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][4]-TxAGC_A_Mcs11_Mcs08 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4]); ++ } ++ if(RegAddr == rTxAGC_A_Mcs15_Mcs12) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][5]-TxAGC_A_Mcs15_Mcs12 = 0x%x\n", pHalData->pwrGroupCnt,pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5]); ++ if(pHalData->rf_type== RF_1T1R) ++ { ++ //printk("pwrGroupCnt = %d\n", pHalData->pwrGroupCnt); ++ pHalData->pwrGroupCnt++; ++ } ++ } ++ if(RegAddr == rTxAGC_B_Rate18_06) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][8]-TxAGC_B_Rate18_06 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8]); ++ } ++ if(RegAddr == rTxAGC_B_Rate54_24) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][9]-TxAGC_B_Rate54_24 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9]); ++ } ++ if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][14]-TxAGC_B_CCK1_55_Mcs32 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14]); ++ } ++ if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][15]-TxAGC_B_CCK11_A_CCK2_11 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15]); ++ } ++ if(RegAddr == rTxAGC_B_Mcs03_Mcs00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][10]-TxAGC_B_Mcs03_Mcs00 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10]); ++ } ++ if(RegAddr == rTxAGC_B_Mcs07_Mcs04) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][11]-TxAGC_B_Mcs07_Mcs04 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11]); ++ } ++ if(RegAddr == rTxAGC_B_Mcs11_Mcs08) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][12]-TxAGC_B_Mcs11_Mcs08 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12]); ++ } ++ if(RegAddr == rTxAGC_B_Mcs15_Mcs12) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; ++ //printk("MCSTxPowerLevelOriginalOffset[%d][13]-TxAGC_B_Mcs15_Mcs12 = 0x%x\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13]); ++ ++ if(pHalData->rf_type != RF_1T1R) ++ { ++ //printk("pwrGroupCnt = %d\n", pHalData->pwrGroupCnt); ++ pHalData->pwrGroupCnt++; ++ } ++ } ++} ++ ++ ++static VOID ++phy_BB8192C_Config_1T( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ //for path - A ++ PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x1); ++ PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x0303, 0x0101); ++ PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x1); ++ PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x1); ++ PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x1); ++ PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x1); ++ PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x1); ++#endif ++ //for path - B ++ PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x2); ++ PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022); ++ ++ // 20100519 Joseph: Add for 1T2R config. Suggested by Kevin, Jenyu and Yunan. ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45); ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23); ++ PHY_SetBBReg(Adapter, rOFDM0_AGCParameter1, 0x30, 0x1); // B path first AGC ++ ++ PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x2); ++ PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x2); ++ PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x2); ++ PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x2); ++ PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x2); ++ ++ ++} ++ ++// Joseph test: new initialize order!! ++// Test only!! This part need to be re-organized. ++// Now it is just for 8256. ++static int ++phy_BB8190_Config_HardCode( ++ IN PADAPTER Adapter ++ ) ++{ ++ //RT_ASSERT(FALSE, ("This function is not implement yet!! \n")); ++ return _SUCCESS; ++} ++ ++static int ++phy_BB8188E_Config_ParaFile( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ u8 sz8188EBBRegFile[] = RTL8188E_PHY_REG; ++ u8 sz8188EAGCTableFile[] = RTL8188E_AGC_TAB; ++ u8 sz8188EBBRegPgFile[] = RTL8188E_PHY_REG_PG; ++ u8 sz8188EBBRegMpFile[] = RTL8188E_PHY_REG_MP; ++ u8 sz8188EBBRegLimitFile[] = RTL8188E_TXPWR_LMT; ++ ++ u8 *pszBBRegFile = NULL, *pszAGCTableFile = NULL, *pszBBRegPgFile = NULL, *pszBBRegMpFile=NULL, ++ *pszRFTxPwrLmtFile = NULL; ++ ++ ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("==>phy_BB8192S_Config_ParaFile\n")); ++ ++ pszBBRegFile = sz8188EBBRegFile ; ++ pszAGCTableFile = sz8188EAGCTableFile; ++ pszBBRegPgFile = sz8188EBBRegPgFile; ++ pszBBRegMpFile = sz8188EBBRegMpFile; ++ pszRFTxPwrLmtFile = sz8188EBBRegLimitFile; ++ ++ PHY_InitTxPowerLimit( Adapter ); ++ ++ if ( Adapter->registrypriv.RegEnableTxPowerLimit == 1 || ++ ( Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1 ) ) ++ { ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (PHY_ConfigRFWithPowerLimitTableParaFile( Adapter, pszRFTxPwrLmtFile )== _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if (HAL_STATUS_SUCCESS != ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, CONFIG_RF_TXPWR_LMT, (ODM_RF_RADIO_PATH_E)0)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ DBG_871X("phy_BB8188E_Config_ParaFile():Read Tx power limit fail!!\n"); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ } ++ ++ // ++ // 1. Read PHY_REG.TXT BB INIT!! ++ // ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (phy_ConfigBBWithParaFile(Adapter, pszBBRegFile, CONFIG_BB_PHY_REG) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++#if (MP_DRIVER == 1) ++ // ++ // 1.1 Read PHY_REG_MP.TXT BB INIT!! ++ // ++ if (Adapter->registrypriv.mp_mode == 1) { ++ //3 Read PHY_REG.TXT BB INIT!! ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ DBG_871X("phy_BB8188E_Config_ParaFile():Write BB Reg MP Fail!!"); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ } ++#endif // #if (MP_DRIVER == 1) ++ ++ // ++ // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt ++ // ++ PHY_InitTxPowerByRate( Adapter ); ++ if ( ( Adapter->registrypriv.RegEnableTxPowerByRate == 1 || ++ ( Adapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory != 2 ) ) ) ++ { ++ pHalData->pwrGroupCnt = 0; ++ ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) ++ PHY_TxPowerByRateConfiguration(Adapter); ++ ++ if ( Adapter->registrypriv.RegEnableTxPowerLimit == 1 || ++ ( Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1 ) ) ++ PHY_ConvertTxPowerLimitToPowerIndex( Adapter ); ++ ++ if(rtStatus != _SUCCESS){ ++ DBG_871X("%s(): CONFIG_BB_PHY_REG_PG Fail!!\n",__FUNCTION__ ); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ } ++ ++ // ++ // 3. BB AGC table Initialization ++ // ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile, CONFIG_BB_AGC_TAB) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++ ++phy_BB8190_Config_ParaFile_Fail: ++ ++ return rtStatus; ++} ++ ++ ++int ++PHY_BBConfig8188E( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 RegVal; ++ u8 TmpU1B=0; ++ u8 value8,CrystalCap; ++ ++ phy_InitBBRFRegisterDefinition(Adapter); ++ ++ ++ // Enable BB and RF ++ RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); ++ ++ // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. ++ //rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); ++ //rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); ++ ++ rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); ++ ++#ifdef CONFIG_USB_HCI ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); ++#else ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); ++#endif ++ ++#if 0 ++#ifdef CONFIG_USB_HCI ++ //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. ++ rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); ++ rtw_write8(Adapter, 0x15, 0xe9); ++#endif ++ ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ //rtw_write8(Adapter, 0x15, 0xe9); ++#endif ++ ++ ++#ifdef CONFIG_PCI_HCI ++ // Force use left antenna by default for 88C. ++ if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) ++ { ++ RegVal = rtw_read32(Adapter, REG_LEDCFG0); ++ rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); ++ } ++#endif ++ ++ // ++ // Config BB and AGC ++ // ++ rtStatus = phy_BB8188E_Config_ParaFile(Adapter); ++ ++ // write 0x24[16:11] = 0x24[22:17] = CrystalCap ++ CrystalCap = pHalData->CrystalCap & 0x3F; ++ PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); ++ ++ return rtStatus; ++ ++} ++ ++ ++int ++PHY_RFConfig8188E( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // RF config ++ // ++ rtStatus = PHY_RF6052_Config8188E(Adapter); ++#if 0 ++ switch(pHalData->rf_chip) ++ { ++ case RF_6052: ++ rtStatus = PHY_RF6052_Config(Adapter); ++ break; ++ case RF_8225: ++ rtStatus = PHY_RF8225_Config(Adapter); ++ break; ++ case RF_8256: ++ rtStatus = PHY_RF8256_Config(Adapter); ++ break; ++ case RF_8258: ++ break; ++ case RF_PSEUDO_11N: ++ rtStatus = PHY_RF8225_Config(Adapter); ++ break; ++ default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch ++ break; ++ } ++#endif ++ return rtStatus; ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_ConfigRFWithParaFile() ++ * ++ * Overview: This function read RF parameters from general file format, and do RF 3-wire ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * u8 eRFPath ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: Delay may be required for RF configuration ++ *---------------------------------------------------------------------------*/ ++int ++rtl8188e_PHY_ConfigRFWithParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ IN u8 eRFPath ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ ++ return rtStatus; ++ ++} ++ ++//**************************************** ++// The following is for High Power PA ++//**************************************** ++#define HighPowerRadioAArrayLen 22 ++//This is for High power PA ++u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { ++0x013,0x00029ea4, ++0x013,0x00025e74, ++0x013,0x00020ea4, ++0x013,0x0001ced0, ++0x013,0x00019f40, ++0x013,0x00014e70, ++0x013,0x000106a0, ++0x013,0x0000c670, ++0x013,0x000082a0, ++0x013,0x00004270, ++0x013,0x00000240, ++}; ++ ++//**************************************** ++/*----------------------------------------------------------------------------- ++ * Function: GetTxPowerLevel8190() ++ * ++ * Overview: This function is export to "common" moudule ++ * ++ * Input: PADAPTER Adapter ++ * psByte Power Level ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_GetTxPowerLevel8188E( ++ IN PADAPTER Adapter, ++ OUT s32* powerlevel ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ s4Byte TxPwrDbm = 13; ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_GetTxPowerLevel8188E(): TxPowerLevel: %#x\n", TxPwrDbm)); ++ ++ if ( pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM ) ++ *powerlevel = pMgntInfo->ClientConfigPwrInDbm; ++ else ++ *powerlevel = TxPwrDbm; ++#endif ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: SetTxPowerLevel8190() ++ * ++ * Overview: This function is export to "HalCommon" moudule ++ * We must consider RF path later!!!!!!! ++ * ++ * Input: PADAPTER Adapter ++ * u1Byte channel ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * 2008/11/04 MHC We remove EEPROM_93C56. ++ * We need to move CCX relative code to independet file. ++ * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_SetTxPowerLevel8188E( ++ IN PADAPTER Adapter, ++ IN u8 Channel ++ ) ++{ ++ //DBG_871X("==>PHY_SetTxPowerLevel8188E()\n"); ++ ++ PHY_SetTxPowerLevelByPath(Adapter, Channel, ODM_RF_PATH_A); ++ ++ //DBG_871X("<==PHY_SetTxPowerLevel8188E()\n"); ++} ++ ++VOID ++PHY_SetTxPowerIndex_8188E( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ) ++{ ++ if (RFPath == ODM_RF_PATH_A) ++ { ++ switch (Rate) ++ { ++ case MGN_1M: PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); break; ++ case MGN_2M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); break; ++ case MGN_5_5M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex); break; ++ case MGN_11M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex); break; ++ ++ case MGN_6M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex); break; ++ case MGN_9M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex); break; ++ case MGN_12M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex); break; ++ case MGN_18M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex); break; ++ ++ case MGN_24M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex); break; ++ case MGN_36M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex); break; ++ case MGN_48M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex); break; ++ case MGN_54M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS0: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex); break; ++ case MGN_MCS1: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex); break; ++ case MGN_MCS2: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex); break; ++ case MGN_MCS3: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS4: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex); break; ++ case MGN_MCS5: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex); break; ++ case MGN_MCS6: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex); break; ++ case MGN_MCS7: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS8: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte0, PowerIndex); break; ++ case MGN_MCS9: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte1, PowerIndex); break; ++ case MGN_MCS10: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte2, PowerIndex); break; ++ case MGN_MCS11: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS12: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte0, PowerIndex); break; ++ case MGN_MCS13: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte1, PowerIndex); break; ++ case MGN_MCS14: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte2, PowerIndex); break; ++ case MGN_MCS15: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte3, PowerIndex); break; ++ ++ default: ++ DBG_871X("Invalid Rate!!\n"); ++ break; ++ } ++ } ++ else if (RFPath == ODM_RF_PATH_B) ++ { ++ switch (Rate) ++ { ++ case MGN_1M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte1, PowerIndex); break; ++ case MGN_2M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte2, PowerIndex); break; ++ case MGN_5_5M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte3, PowerIndex); break; ++ case MGN_11M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, PowerIndex); break; ++ ++ case MGN_6M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate18_06, bMaskByte0, PowerIndex); break; ++ case MGN_9M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate18_06, bMaskByte1, PowerIndex); break; ++ case MGN_12M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate18_06, bMaskByte2, PowerIndex); break; ++ case MGN_18M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate18_06, bMaskByte3, PowerIndex); break; ++ ++ case MGN_24M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate54_24, bMaskByte0, PowerIndex); break; ++ case MGN_36M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate54_24, bMaskByte1, PowerIndex); break; ++ case MGN_48M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate54_24, bMaskByte2, PowerIndex); break; ++ case MGN_54M: PHY_SetBBReg(Adapter, rTxAGC_B_Rate54_24, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS0: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte0, PowerIndex); break; ++ case MGN_MCS1: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte1, PowerIndex); break; ++ case MGN_MCS2: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte2, PowerIndex); break; ++ case MGN_MCS3: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS4: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte0, PowerIndex); break; ++ case MGN_MCS5: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte1, PowerIndex); break; ++ case MGN_MCS6: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte2, PowerIndex); break; ++ case MGN_MCS7: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS8: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte0, PowerIndex); break; ++ case MGN_MCS9: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte1, PowerIndex); break; ++ case MGN_MCS10: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte2, PowerIndex); break; ++ case MGN_MCS11: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS12: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte0, PowerIndex); break; ++ case MGN_MCS13: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte1, PowerIndex); break; ++ case MGN_MCS14: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte2, PowerIndex); break; ++ case MGN_MCS15: PHY_SetBBReg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte3, PowerIndex); break; ++ ++ default: ++ DBG_871X("Invalid Rate!!\n"); ++ break; ++ } ++ } ++ else ++ { ++ DBG_871X("Invalid RFPath!!\n"); ++ } ++} ++ ++u8 ++phy_GetCurrentTxNum_8188E( ++ IN PADAPTER pAdapter, ++ IN u8 Rate ++ ) ++{ ++ u8 tmpByte = 0; ++ u32 tmpDWord = 0; ++ u8 TxNum = RF_TX_NUM_NONIMPLEMENT; ++ ++ if ( ( Rate >= MGN_MCS8 && Rate <= MGN_MCS15 ) ) ++ TxNum = RF_2TX; ++ else ++ TxNum = RF_1TX; ++ ++ return TxNum; ++} ++ ++s8 tx_power_extra_bias( ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ) ++{ ++ s8 bias = 0; ++ ++ if (Rate == MGN_2M) ++ bias = -9; ++ ++ return bias; ++} ++ ++u8 ++PHY_GetTxPowerIndex_8188E( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); ++ u8 base_index = 0; ++ s8 by_rate_diff = 0, txPower = 0, limit = 0, track_diff = 0, extra_bias = 0; ++ u8 txNum = phy_GetCurrentTxNum_8188E(pAdapter, Rate); ++ BOOLEAN bIn24G = _FALSE; ++ ++ base_index = PHY_GetTxPowerIndexBase(pAdapter,RFPath, Rate, BandWidth, Channel, &bIn24G); ++ ++ by_rate_diff = PHY_GetTxPowerByRate(pAdapter, BAND_ON_2_4G, RFPath, txNum, Rate); ++ limit = PHY_GetTxPowerLimit(pAdapter, pAdapter->registrypriv.RegPwrTblSel, (u8)(!bIn24G), pHalData->CurrentChannelBW, RFPath, Rate, pHalData->CurrentChannel); ++ by_rate_diff = by_rate_diff > limit ? limit : by_rate_diff; ++ ++ track_diff = PHY_GetTxPowerTrackingOffset(pAdapter, RFPath, Rate); ++ ++ extra_bias = tx_power_extra_bias(RFPath, Rate, BandWidth, Channel); ++ ++ txPower = base_index + by_rate_diff + track_diff + extra_bias; ++ ++ if(txPower > MAX_POWER_INDEX) ++ txPower = MAX_POWER_INDEX; ++ ++ if (0) ++ DBG_871X("RF-%c ch%d TxPwrIdx = %d(0x%X) [%2u %2d %2d %2d]\n" ++ , ((RFPath==0)?'A':'B'), Channel, txPower, txPower, base_index, by_rate_diff, track_diff, extra_bias); ++ ++ return (u8)txPower; ++} ++ ++// ++// Description: ++// Update transmit power level of all channel supported. ++// ++// TODO: ++// A mode. ++// By Bruce, 2008-02-04. ++// ++BOOLEAN ++PHY_UpdateTxPowerDbm8188E( ++ IN PADAPTER Adapter, ++ IN int powerInDbm ++ ) ++{ ++ return _TRUE; ++} ++ ++VOID ++PHY_ScanOperationBackup8188E( ++ IN PADAPTER Adapter, ++ IN u8 Operation ++ ) ++{ ++#if 0 ++ IO_TYPE IoType; ++ ++ if (!rtw_is_drv_stopped(padapter)) { ++ switch(Operation) ++ { ++ case SCAN_OPT_BACKUP: ++ IoType = IO_CMD_PAUSE_DM_BY_SCAN; ++ rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); ++ ++ break; ++ ++ case SCAN_OPT_RESTORE: ++ IoType = IO_CMD_RESUME_DM_BY_SCAN; ++ rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); ++ break; ++ ++ default: ++ RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); ++ break; ++ } ++ } ++#endif ++} ++void ++phy_SpurCalibration_8188E( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //DbgPrint("===> phy_SpurCalibration_8188E CurrentChannelBW = %d, CurrentChannel = %d\n", pHalData->CurrentChannelBW, pHalData->CurrentChannel); ++ if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_20 &&( pHalData->CurrentChannel == 13 || pHalData->CurrentChannel == 14)){ ++ PHY_SetBBReg(Adapter, rOFDM0_RxDSP, BIT(9), 0x1); //enable notch filter ++ PHY_SetBBReg(Adapter, rOFDM1_IntfDet, BIT(8)|BIT(7)|BIT(6), 0x2); //intf_TH ++ } ++ else if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_40 && pHalData->CurrentChannel == 11){ ++ PHY_SetBBReg(Adapter, rOFDM0_RxDSP, BIT(9), 0x1); //enable notch filter ++ PHY_SetBBReg(Adapter, rOFDM1_IntfDet, BIT(8)|BIT(7)|BIT(6), 0x2); //intf_TH ++ } ++ else{ ++ if(Adapter->registrypriv.notch_filter == 0) ++ PHY_SetBBReg(Adapter, rOFDM0_RxDSP, BIT(9), 0x0); //disable notch filter ++ } ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_SetBWModeCallback8192C() ++ * ++ * Overview: Timer callback function for SetSetBWMode ++ * ++ * Input: PRT_TIMER pTimer ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: (1) We do not take j mode into consideration now ++ * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run ++ * concurrently? ++ *---------------------------------------------------------------------------*/ ++static VOID ++_PHY_SetBWMode88E( ++ IN PADAPTER Adapter ++) ++{ ++// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 regBwOpMode; ++ u8 regRRSR_RSC; ++ ++ //return; ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //u4Byte NowL, NowH; ++ //u8Byte BeginTime, EndTime; ++ ++ /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ ++ pHalData->CurrentChannelBW == CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ ++ ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SetBWModeInProgress= _FALSE; ++ return; ++ } ++ ++ // There is no 40MHz mode in RF_8225. ++ if(pHalData->rf_chip==RF_8225) ++ return; ++ ++ if (rtw_is_drv_stopped(Adapter)) ++ return; ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //NowL = PlatformEFIORead4Byte(Adapter, TSFR); ++ //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); ++ //BeginTime = ((u8Byte)NowH << 32) + NowL; ++ ++ //3// ++ //3//<1>Set MAC register ++ //3// ++ //Adapter->HalFunc.SetBWModeHandler(); ++ ++ regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); ++ regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); ++ //regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); ++ ++ switch(pHalData->CurrentChannelBW) ++ { ++ case CHANNEL_WIDTH_20: ++ regBwOpMode |= BW_OPMODE_20MHZ; ++ // 2007/02/07 Mark by Emily becasue we have not verify whether this register works ++ rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); ++ break; ++ ++ case CHANNEL_WIDTH_40: ++ regBwOpMode &= ~BW_OPMODE_20MHZ; ++ // 2007/02/07 Mark by Emily becasue we have not verify whether this register works ++ rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); ++ ++ regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); ++ rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); ++ break; ++ ++ default: ++ /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): ++ unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ ++ break; ++ } ++ ++ //3// ++ //3//<2>Set PHY related register ++ //3// ++ switch(pHalData->CurrentChannelBW) ++ { ++ /* 20 MHz channel*/ ++ case CHANNEL_WIDTH_20: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); ++ //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); ++ ++ break; ++ ++ ++ /* 40 MHz channel*/ ++ case CHANNEL_WIDTH_40: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); ++ ++ // Set Control channel to upper or lower. These settings are required only for 40MHz ++ PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); ++ //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); ++ ++ PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); ++ ++ break; ++ ++ ++ ++ default: ++ /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ ++ ,pHalData->CurrentChannelBW));*/ ++ break; ++ ++ } ++ //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //NowL = PlatformEFIORead4Byte(Adapter, TSFR); ++ //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); ++ //EndTime = ((u8Byte)NowH << 32) + NowL; ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); ++ ++ //3<3>Set RF related register ++ switch(pHalData->rf_chip) ++ { ++ case RF_8225: ++ //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ case RF_8256: ++ // Please implement this function in Hal8190PciPhy8256.c ++ //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ case RF_8258: ++ // Please implement this function in Hal8190PciPhy8258.c ++ // PHY_SetRF8258Bandwidth(); ++ break; ++ ++ case RF_PSEUDO_11N: ++ // Do Nothing ++ break; ++ ++ case RF_6052: ++ rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ default: ++ //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); ++ break; ++ } ++ ++ //pHalData->SetBWModeInProgress= FALSE; ++ ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); ++} ++ ++ ++ /*----------------------------------------------------------------------------- ++ * Function: SetBWMode8190Pci() ++ * ++ * Overview: This function is export to "HalCommon" moudule ++ * ++ * Input: PADAPTER Adapter ++ * CHANNEL_WIDTH Bandwidth //20M or 40M ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: We do not take j mode into consideration now ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_SetBWMode8188E( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; ++ // Modified it for 20/40 mhz switch by guangan 070531 ++ //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; ++ ++ //return; ++ ++ //if(pHalData->SwChnlInProgress) ++// if(pMgntInfo->bScanInProgress) ++// { ++// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", ++// Bandwidth == CHANNEL_WIDTH_20?"20MHz":"40MHz")); ++// return; ++// } ++ ++// if(pHalData->SetBWModeInProgress) ++// { ++// // Modified it for 20/40 mhz switch by guangan 070531 ++// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", ++// Bandwidth == CHANNEL_WIDTH_20?"20MHz":"40MHz")); ++// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); ++// //return; ++// } ++ ++ //if(pHalData->SetBWModeInProgress) ++ // return; ++ ++ //pHalData->SetBWModeInProgress= TRUE; ++ ++ pHalData->CurrentChannelBW = Bandwidth; ++ ++#if 0 ++ if(Offset==EXTCHNL_OFFSET_LOWER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; ++ else if(Offset==EXTCHNL_OFFSET_UPPER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; ++ else ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++#else ++ pHalData->nCur40MhzPrimeSC = Offset; ++#endif ++ ++ if (!RTW_CANNOT_RUN(Adapter)) { ++ #if 0 ++ //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); ++ #else ++ _PHY_SetBWMode88E(Adapter); ++ #endif ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++ if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) ++ phy_SpurCalibration_8188E( Adapter); ++ #endif ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); ++ //pHalData->SetBWModeInProgress= FALSE; ++ pHalData->CurrentChannelBW = tmpBW; ++ } ++ ++} ++ ++ ++static void _PHY_SwChnl8188E(PADAPTER Adapter, u8 channel) ++{ ++ u8 eRFPath; ++ u32 param1, param2; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if ( Adapter->bNotifyChannelChange ) ++ { ++ DBG_871X( "[%s] ch = %d\n", __FUNCTION__, channel ); ++ } ++ ++ //s1. pre common command - CmdID_SetTxPowerLevel ++ PHY_SetTxPowerLevel8188E(Adapter, channel); ++ ++ //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel ++ param1 = RF_CHNLBW; ++ param2 = channel; ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++ pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); ++ PHY_SetRFReg(Adapter, eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); ++ } ++ ++ ++ //s3. post common command - CmdID_End, None ++ ++} ++VOID ++PHY_SwChnl8188E( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 tmpchannel = pHalData->CurrentChannel; ++ BOOLEAN bResult = _TRUE; ++ ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SwChnlInProgress=FALSE; ++ return; //return immediately if it is peudo-phy ++ } ++ ++ //if(pHalData->SwChnlInProgress) ++ // return; ++ ++ //if(pHalData->SetBWModeInProgress) ++ // return; ++ ++ while(pHalData->odmpriv.RFCalibrateInfo.bLCKInProgress) ++ { ++ rtw_msleep_os(50); ++ } ++ ++ //-------------------------------------------- ++ switch(pHalData->CurrentWirelessMode) ++ { ++ case WIRELESS_MODE_A: ++ case WIRELESS_MODE_N_5G: ++ //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); ++ break; ++ ++ case WIRELESS_MODE_B: ++ //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); ++ break; ++ ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); ++ break; ++ ++ default: ++ //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); ++ break; ++ } ++ //-------------------------------------------- ++ ++ //pHalData->SwChnlInProgress = TRUE; ++ if(channel == 0) ++ channel = 1; ++ ++ pHalData->CurrentChannel=channel; ++ ++ //pHalData->SwChnlStage=0; ++ //pHalData->SwChnlStep=0; ++ ++ if (!RTW_CANNOT_RUN(Adapter)) { ++ #if 0 ++ //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); ++ #else ++ _PHY_SwChnl8188E(Adapter, channel); ++ #endif ++ ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++ if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) ++ phy_SpurCalibration_8188E( Adapter); ++ #endif ++ ++ ++ ++ if(bResult) ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); ++ //if(IS_HARDWARE_TYPE_8192SU(Adapter)) ++ //{ ++ // pHalData->SwChnlInProgress = FALSE; ++ pHalData->CurrentChannel = tmpchannel; ++ //} ++ } ++ ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); ++ //if(IS_HARDWARE_TYPE_8192SU(Adapter)) ++ //{ ++ // pHalData->SwChnlInProgress = FALSE; ++ pHalData->CurrentChannel = tmpchannel; ++ //} ++ } ++} ++ ++VOID ++PHY_SetSwChnlBWMode8188E( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++) ++{ ++ //DBG_871X("%s()===>\n",__FUNCTION__); ++ ++ PHY_SwChnl8188E(Adapter, channel); ++ PHY_SetBWMode8188E(Adapter, Bandwidth, Offset40); ++ ++ //DBG_871X("<==%s()\n",__FUNCTION__); ++} ++ ++ ++// ++// Description: ++// Configure H/W functionality to enable/disable Monitor mode. ++// Note, because we possibly need to configure BB and RF in this function, ++// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. ++// ++VOID ++PHY_SetMonitorMode8192C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; ++ ++ //2 Note: we may need to stop antenna diversity. ++ if(bEnableMonitorMode) ++ { ++ bFilterOutNonAssociatedBSSID = FALSE; ++ RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); ++ ++ pHalData->bInMonitorMode = TRUE; ++ pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); ++ rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); ++ } ++ else ++ { ++ bFilterOutNonAssociatedBSSID = TRUE; ++ RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); ++ ++ pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); ++ pHalData->bInMonitorMode = FALSE; ++ rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); ++ } ++#endif ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHYCheckIsLegalRfPath8190Pci() ++ * ++ * Overview: Check different RF type to execute legal judgement. If RF Path is illegal ++ * We will return false. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/15/2007 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++BOOLEAN ++PHY_CheckIsLegalRfPath8192C( ++ IN PADAPTER pAdapter, ++ IN u32 eRFPath) ++{ ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN rtValue = _TRUE; ++ ++ // NOt check RF Path now.! ++#if 0 ++ if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) ++ { ++ rtValue = FALSE; ++ } ++ if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) ++ { ++ ++ } ++#endif ++ return rtValue; ++ ++} /* PHY_CheckIsLegalRfPath8192C */ ++ ++static VOID _PHY_SetRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++ u8 u1bTmp; ++ ++ if (!rtw_is_hw_init_completed(pAdapter)) { ++ u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; ++ rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); ++ //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) ++ { ++ if(bMain) ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A ++ else ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT ++ } ++ else ++ { ++ ++ if(bMain) ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main ++ else ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux ++ } ++ ++} ++ ++//return value TRUE => Main; FALSE => Aux ++ ++static BOOLEAN _PHY_QueryRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++// if(is2T) ++// return _TRUE; ++ ++ if (!rtw_is_hw_init_completed(pAdapter)) { ++ PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) ++ { ++ if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) ++ return _TRUE; ++ else ++ return _FALSE; ++ } ++ else ++ { ++ if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) ++ return _TRUE; ++ else ++ return _FALSE; ++ } ++} ++ ++ ++static VOID ++_PHY_DumpRFReg(IN PADAPTER pAdapter) ++{ ++ u32 rfRegValue,rfRegOffset; ++ ++ //RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); ++ ++ for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ ++ rfRegValue = PHY_QueryRFReg(pAdapter,RF_PATH_A, rfRegOffset, bMaskDWord); ++ //RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); ++ } ++ //RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); ++} ++ ++ ++// ++// Move from phycfg.c to gen.c to be code independent later ++// ++//-------------------------Move to other DIR later----------------------------*/ ++#ifdef CONFIG_USB_HCI ++ ++// ++// Description: ++// To dump all Tx FIFO LLT related link-list table. ++// Added by Roger, 2009.03.10. ++// ++VOID ++DumpBBDbgPort_92CU( ++ IN PADAPTER Adapter ++ ) ++{ ++ ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n")); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n")); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); ++ PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); ++ PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord))); ++ ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_rf6052.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_rf6052.c +new file mode 100644 +index 0000000..f128d8b +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_rf6052.c +@@ -0,0 +1,348 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8188e_rf6052.c ( Source C File) ++ * ++ * Note: Provide RF 6052 series relative API. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * 11/05/2008 MHC Add API for tw power setting. ++ * ++ * ++******************************************************************************/ ++ ++#define _RTL8188E_RF6052_C_ ++ ++#include ++#include ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++/*------------------------Define global variable-----------------------------*/ ++ ++ ++/*------------------------Define local variable------------------------------*/ ++ ++/*------------------------Define local variable------------------------------*/ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: RF_ChangeTxPath ++ * ++ * Overview: For RL6052, we must change some RF settign for 1T or 2T. ++ * ++ * Input: u2Byte DataRate // 0x80-8f, 0x90-9f ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 09/25/2008 MHC Create Version 0. ++ * Firmwaer support the utility later. ++ * ++ *---------------------------------------------------------------------------*/ ++void rtl8188e_RF_ChangeTxPath( IN PADAPTER Adapter, ++ IN u16 DataRate) ++{ ++// We do not support gain table change inACUT now !!!! Delete later !!! ++#if 0//(RTL92SE_FPGA_VERIFY == 0) ++ static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T ++ static u4Byte tx_gain_tbl1[6] ++ = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; ++ static u4Byte tx_gain_tbl2[6] ++ = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; ++ u1Byte i; ++ ++ if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) ++ { ++ // Set TX SYNC power G2G3 loop filter ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); ++ ++ // Change TX AGC gain table ++ for (i = 0; i < 6; i++) ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); ++ ++ // Set PA to high value ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); ++ } ++ else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) ++ { ++ // Set TX SYNC power G2G3 loop filter ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x04440); ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); ++ ++ // Change TX AGC gain table ++ for (i = 0; i < 6; i++) ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); ++ ++ // Set PA low gain ++ PHY_SetRFReg(Adapter, RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); ++ } ++#endif ++ ++} /* RF_ChangeTxPath */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetBandwidth() ++ * ++ * Overview: This function is called by SetBWModeCallback8190Pci() only ++ * ++ * Input: PADAPTER Adapter ++ * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: For RF type 0222D ++ *---------------------------------------------------------------------------*/ ++VOID ++rtl8188e_PHY_RF6052SetBandwidth( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth) //20M or 40M ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ switch(Bandwidth) ++ { ++ case CHANNEL_WIDTH_20: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11)); ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ case CHANNEL_WIDTH_40: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)| BIT(10)); ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); ++ break; ++ } ++ ++} ++ ++static int ++phy_RF6052_Config_ParaFile( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 u4RegValue=0; ++ u8 eRFPath; ++ BB_REGISTER_DEFINITION_T *pPhyReg; ++ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ static char sz88eRadioAFile[] = RTL8188E_PHY_RADIO_A; ++ static char sz88eRadioBFile[] = RTL8188E_PHY_RADIO_B; ++ static char sz8188ETxPwrTrack[] = RTL8188E_TXPWR_TRACK; ++ char *pszRadioAFile, *pszRadioBFile, *pszTxPwrTrack; ++ ++ ++ pszRadioAFile = sz88eRadioAFile; ++ pszRadioBFile = sz88eRadioBFile; ++ pszTxPwrTrack = sz8188ETxPwrTrack; ++ ++ //3//----------------------------------------------------------------- ++ //3// <2> Initialize RF ++ //3//----------------------------------------------------------------- ++ //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++ ++ pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ ++ /*----Store original RFENV control type----*/ ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++ case RF_PATH_C: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); ++ break; ++ case RF_PATH_B : ++ case RF_PATH_D: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); ++ break; ++ } ++ ++ /*----Set RF_ENV enable----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Set RF_ENV output high----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /* Set bit number of Address and Data for RF register */ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Initialize RF fom connfiguration file----*/ ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) ++ rtStatus= _FAIL; ++#endif ++ } ++ break; ++ case RF_PATH_B: ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) ++ rtStatus= _FAIL; ++#endif ++ } ++ break; ++ case RF_PATH_C: ++ break; ++ case RF_PATH_D: ++ break; ++ } ++ ++ /*----Restore RFENV control type----*/; ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++ case RF_PATH_C: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); ++ break; ++ case RF_PATH_B : ++ case RF_PATH_D: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); ++ break; ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); ++ goto phy_RF6052_Config_ParaFile_Fail; ++ } ++ ++ } ++ ++ ++ //3 ----------------------------------------------------------------- ++ //3 Configuration of Tx Power Tracking ++ //3 ----------------------------------------------------------------- ++ ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrack) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ ODM_ConfigRFWithTxPwrTrackHeaderFile(&pHalData->odmpriv); ++#endif ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); ++ return rtStatus; ++ ++phy_RF6052_Config_ParaFile_Fail: ++ return rtStatus; ++} ++ ++ ++int ++PHY_RF6052_Config8188E( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // Initialize general global value ++ // ++ // TODO: Extend RF_PATH_C and RF_PATH_D in the future ++ if(pHalData->rf_type == RF_1T1R) ++ pHalData->NumTotalRFPath = 1; ++ else ++ pHalData->NumTotalRFPath = 2; ++ ++ // ++ // Config BB and RF ++ // ++ rtStatus = phy_RF6052_Config_ParaFile(Adapter); ++#if 0 ++ switch( Adapter->MgntInfo.bRegHwParaFile ) ++ { ++ case 0: ++ phy_RF6052_Config_HardCode(Adapter); ++ break; ++ ++ case 1: ++ rtStatus = phy_RF6052_Config_ParaFile(Adapter); ++ break; ++ ++ case 2: ++ // Partial Modify. ++ phy_RF6052_Config_HardCode(Adapter); ++ phy_RF6052_Config_ParaFile(Adapter); ++ break; ++ ++ default: ++ phy_RF6052_Config_HardCode(Adapter); ++ break; ++ } ++#endif ++ return rtStatus; ++ ++} ++ ++/* End of HalRf6052.c */ ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_rxdesc.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_rxdesc.c +new file mode 100644 +index 0000000..b629251 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_rxdesc.c +@@ -0,0 +1,102 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8188E_REDESC_C_ + -+#if (BEAMFORMING_SUPPORT == 1) -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+VOID -+HalTxbf8812A_setNDPArate( -+ IN PVOID pDM_VOID, -+ IN u1Byte BW, -+ IN u1Byte Rate -+); ++#include ++#include + ++void rtl8188e_query_rx_desc_status( ++ union recv_frame *precvframe, ++ struct recv_stat *prxstat) ++{ ++ struct rx_pkt_attrib *pattrib; ++ struct recv_stat report; ++ PRXREPORT prxreport; ++ //struct recv_frame_hdr *phdr; + -+VOID -+HalTxbfJaguar_Enter( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx ++ //phdr = &precvframe->u.hdr; ++ ++ report.rxdw0 = le32_to_cpu(prxstat->rxdw0); ++ report.rxdw1 = le32_to_cpu(prxstat->rxdw1); ++ report.rxdw2 = le32_to_cpu(prxstat->rxdw2); ++ report.rxdw3 = le32_to_cpu(prxstat->rxdw3); ++ report.rxdw4 = le32_to_cpu(prxstat->rxdw4); ++ report.rxdw5 = le32_to_cpu(prxstat->rxdw5); ++ ++ prxreport = (PRXREPORT)&report; ++ ++ pattrib = &precvframe->u.hdr.attrib; ++ _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); ++ ++ pattrib->crc_err = (u8)((report.rxdw0 >> 14) & 0x1);;//(u8)prxreport->crc32; ++ ++ // update rx report to recv_frame attribute ++ pattrib->pkt_rpt_type = (u8)((report.rxdw3 >> 14) & 0x3);//prxreport->rpt_sel; ++ ++ if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet ++ { ++ pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen; ++ pattrib->drvinfo_sz = (u8)((report.rxdw0 >> 16) & 0xf) * 8;//(u8)(prxreport->drvinfosize << 3); ++ ++ pattrib->physt = (u8)((report.rxdw0 >> 26) & 0x1);//(u8)prxreport->physt; ++ ++ pattrib->bdecrypted = (report.rxdw0 & BIT(27))? 0:1;//(u8)(prxreport->swdec ? 0 : 1); ++ pattrib->encrypt = (u8)((report.rxdw0 >> 20) & 0x7);//(u8)prxreport->security; ++ ++ pattrib->qos = (u8)((report.rxdw0 >> 23) & 0x1);//(u8)prxreport->qos; ++ pattrib->priority = (u8)((report.rxdw1 >> 8) & 0xf);//(u8)prxreport->tid; ++ ++ pattrib->amsdu = (u8)((report.rxdw1 >> 13) & 0x1);//(u8)prxreport->amsdu; ++ ++ pattrib->seq_num = (u16)(report.rxdw2 & 0x00000fff);//(u16)prxreport->seq; ++ pattrib->frag_num = (u8)((report.rxdw2 >> 12) & 0xf);//(u8)prxreport->frag; ++ pattrib->mfrag = (u8)((report.rxdw1 >> 27) & 0x1);//(u8)prxreport->mf; ++ pattrib->mdata = (u8)((report.rxdw1 >> 26) & 0x1);//(u8)prxreport->md; ++ ++ pattrib->data_rate = (u8)(report.rxdw3 & 0x3f);//(u8)prxreport->rxmcs; ++ ++ pattrib->icv_err = (u8)((report.rxdw0 >> 15) & 0x1);//(u8)prxreport->icverr; ++ pattrib->shift_sz = (u8)((report.rxdw0 >> 24) & 0x3); ++ ++ } ++ else if(pattrib->pkt_rpt_type == TX_REPORT1)//CCX ++ { ++ pattrib->pkt_len = TX_RPT1_PKT_LEN; ++ pattrib->drvinfo_sz = 0; ++ } ++ else if(pattrib->pkt_rpt_type == TX_REPORT2)// TX RPT ++ { ++ pattrib->pkt_len =(u16)(report.rxdw0 & 0x3FF);//Rx length[9:0] ++ pattrib->drvinfo_sz = 0; ++ ++ // ++ // Get TX report MAC ID valid. ++ // ++ pattrib->MacIDValidEntry[0] = report.rxdw4; ++ pattrib->MacIDValidEntry[1] = report.rxdw5; ++ ++ } ++ else if(pattrib->pkt_rpt_type == HIS_REPORT)// USB HISR RPT ++ { ++ pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen; ++ } ++ ++} ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_sreset.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_sreset.c +new file mode 100644 +index 0000000..4edc59f +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_sreset.c +@@ -0,0 +1,124 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8188E_SRESET_C_ ++ ++//#include ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ ++void rtl8188e_sreset_xmit_status_check(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ unsigned long current_time; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ unsigned int diff_time; ++ u32 txdma_status; ++ ++ if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ ++ DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); ++ rtw_hal_sreset_reset(padapter); ++ } ++#ifdef CONFIG_USB_HCI ++ //total xmit irp = 4 ++ //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); ++ //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) ++ current_time = rtw_get_current_time(); ++ ++ if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { ++ ++ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); ++ ++ if (diff_time > 2000) { ++ if (psrtpriv->last_tx_complete_time == 0) { ++ psrtpriv->last_tx_complete_time = current_time; ++ } ++ else{ ++ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); ++ if (diff_time > 4000) { ++ u32 ability = 0; ++ ++ //padapter->Wifi_Error_Status = WIFI_TX_HANG; ++ ability = rtw_phydm_ability_get(padapter); ++ DBG_871X("%s tx hang %s\n", __FUNCTION__, ++ (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); ++ ++ if (!(ability & ODM_BB_ADAPTIVITY)) ++ rtw_hal_sreset_reset(padapter); ++ } ++ } ++ } ++ } ++#endif //CONFIG_USB_HCI ++ ++ if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { ++ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; ++ rtw_hal_sreset_reset(padapter); ++ return; ++ } ++} ++ ++void rtl8188e_sreset_linked_status_check(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ u32 rx_dma_status = 0; ++ u8 fw_status=0; ++ rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS); ++ if(rx_dma_status!= 0x00){ ++ DBG_8192C("%s REG_RXDMA_STATUS:0x%08x \n",__FUNCTION__,rx_dma_status); ++ rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status); ++ } ++ fw_status = rtw_read8(padapter,REG_FMETHR); ++ if(fw_status != 0x00) ++ { ++ if(fw_status == 1) ++ DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__FUNCTION__,fw_status); ++ else if(fw_status == 2) ++ DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__FUNCTION__,fw_status); ++ } ++#if 0 ++ u32 regc50,regc58,reg824,reg800; ++ regc50 = rtw_read32(padapter,0xc50); ++ regc58 = rtw_read32(padapter,0xc58); ++ reg824 = rtw_read32(padapter,0x824); ++ reg800 = rtw_read32(padapter,0x800); ++ if( ((regc50&0xFFFFFF00)!= 0x69543400)|| ++ ((regc58&0xFFFFFF00)!= 0x69543400)|| ++ (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| ++ ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) ++ { ++ DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, ++ regc50, regc58, reg824, reg800); ++ rtw_hal_sreset_reset(padapter); ++ } ++#endif ++ ++ if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { ++ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; ++ rtw_hal_sreset_reset(padapter); ++ return; ++ } ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_xmit.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_xmit.c +new file mode 100644 +index 0000000..53166d3 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/rtl8188e_xmit.c +@@ -0,0 +1,307 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8188E_XMIT_C_ ++ ++#include ++#include ++ ++#ifdef CONFIG_XMIT_ACK ++void dump_txrpt_ccx_88e(void *buf) ++{ ++ struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; ++ ++ DBG_871X("%s:\n" ++ "tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n" ++ "mac_id:%u, pkt_ok:%u, bmc:%u\n" ++ "retry_cnt:%u, lifetime_over:%u, retry_over:%u\n" ++ "ccx_qtime:%u\n" ++ "final_data_rate:0x%02x\n" ++ "qsel:%u, sw:0x%03x\n" ++ , __func__ ++ , txrpt_ccx->tag1, txrpt_ccx->pkt_num, txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx ++ , txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc ++ , txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over ++ , txrpt_ccx_qtime_88e(txrpt_ccx) ++ , txrpt_ccx->final_data_rate ++ , txrpt_ccx->qsel, txrpt_ccx_sw_88e(txrpt_ccx) + ); ++} + ++void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf) ++{ ++ struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; + -+VOID -+HalTxbfJaguar_Leave( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); ++ #ifdef DBG_CCX ++ dump_txrpt_ccx_88e(buf); ++ #endif + ++ if (txrpt_ccx->int_ccx) { ++ if (txrpt_ccx->pkt_ok) ++ rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); ++ else ++ rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); ++ } ++} ++#endif //CONFIG_XMIT_ACK + -+VOID -+HalTxbfJaguar_Status( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc) ++{ ++ u8 bDumpTxPkt; ++ u8 bDumpTxDesc = _FALSE; ++ rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt)); + ++ if(bDumpTxPkt ==1){//dump txdesc for data frame ++ DBG_871X("dump tx_desc for data frame\n"); ++ if((frame_tag&0x0f) == DATA_FRAMETAG){ ++ bDumpTxDesc = _TRUE; ++ } ++ } ++ else if(bDumpTxPkt ==2){//dump txdesc for mgnt frame ++ DBG_871X("dump tx_desc for mgnt frame\n"); ++ if((frame_tag&0x0f) == MGNT_FRAMETAG){ ++ bDumpTxDesc = _TRUE; ++ } ++ } ++ else if(bDumpTxPkt ==3){//dump early info ++ } + -+VOID -+HalTxbfJaguar_FwTxBF( -+ IN PVOID pDM_VOID, -+ IN u1Byte Idx -+ ); ++ if(bDumpTxDesc){ ++ // ptxdesc->txdw4 = cpu_to_le32(0x00001006);//RTS Rate=24M ++ // ptxdesc->txdw6 = 0x6666f800; ++ DBG_8192C("=====================================\n"); ++ DBG_8192C("txdw0(0x%08x)\n",ptxdesc->txdw0); ++ DBG_8192C("txdw1(0x%08x)\n",ptxdesc->txdw1); ++ DBG_8192C("txdw2(0x%08x)\n",ptxdesc->txdw2); ++ DBG_8192C("txdw3(0x%08x)\n",ptxdesc->txdw3); ++ DBG_8192C("txdw4(0x%08x)\n",ptxdesc->txdw4); ++ DBG_8192C("txdw5(0x%08x)\n",ptxdesc->txdw5); ++ DBG_8192C("txdw6(0x%08x)\n",ptxdesc->txdw6); ++ DBG_8192C("txdw7(0x%08x)\n",ptxdesc->txdw7); ++ DBG_8192C("=====================================\n"); ++ } + ++} + -+VOID -+HalTxbfJaguar_Patch( -+ IN PVOID pDM_VOID, -+ IN u1Byte Operation -+ ); ++/* ++ * Description: ++ * Aggregation packets and send to hardware ++ * ++ * Return: ++ * 0 Success ++ * -1 Hardware resource(TX FIFO) not ready ++ * -2 Software resource(xmitbuf) not ready ++ */ ++#ifdef CONFIG_TX_EARLY_MODE + ++//#define DBG_EMINFO + -+VOID -+HalTxbfJaguar_Clk_8812A( -+ IN PVOID pDM_VOID -+ ); -+ ++#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 ++ #define EARLY_MODE_MAX_PKT_NUM 10 +#else -+ -+#define HalTxbf8812A_setNDPArate(pDM_VOID, BW, Rate) -+#define HalTxbfJaguar_Enter(pDM_VOID, Idx) -+#define HalTxbfJaguar_Leave(pDM_VOID, Idx) -+#define HalTxbfJaguar_Status(pDM_VOID, Idx) -+#define HalTxbfJaguar_FwTxBF(pDM_VOID, Idx) -+#define HalTxbfJaguar_Patch(pDM_VOID, Operation) -+#define HalTxbfJaguar_Clk_8812A(pDM_VOID) ++ #define EARLY_MODE_MAX_PKT_NUM 5 +#endif + -+#endif -+#endif // #ifndef __HAL_TXBF_JAGUAR_H__ + ++struct EMInfo{ ++ u8 EMPktNum; ++ u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; ++}; ++ ++ ++void ++InsertEMContent_8188E( ++ struct EMInfo *pEMInfo, ++ IN pu1Byte VirtualAddress) ++{ ++ ++#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 ++ u1Byte index=0; ++ u4Byte dwtmp=0; ++#endif ++ ++ _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); ++ if(pEMInfo->EMPktNum==0) ++ return; ++ ++ #ifdef DBG_EMINFO ++ { ++ int i; ++ DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum); ++ for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){ ++ DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]); ++ } ++ ++ } ++ #endif ++ ++#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 ++ SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); ++ ++ if(pEMInfo->EMPktNum == 1){ ++ dwtmp = pEMInfo->EMPktLen[0]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[0]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[1]; ++ } ++ SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); ++ if(pEMInfo->EMPktNum <= 3){ ++ dwtmp = pEMInfo->EMPktLen[2]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[2]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[3]; ++ } ++ SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); ++ if(pEMInfo->EMPktNum <= 5){ ++ dwtmp = pEMInfo->EMPktLen[4]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[4]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[5]; ++ } ++ SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF); ++ SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4); ++ if(pEMInfo->EMPktNum <= 7){ ++ dwtmp = pEMInfo->EMPktLen[6]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[6]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[7]; ++ } ++ SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); ++ if(pEMInfo->EMPktNum <= 9){ ++ dwtmp = pEMInfo->EMPktLen[8]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[8]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[9]; ++ } ++ SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); ++#else ++ SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); ++ SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); ++ SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); ++ SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF); ++ SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); ++ SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); ++ SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); ++#endif ++ //RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); ++ ++} ++ ++ ++ ++void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) ++{ ++ //_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq ++ int index,j; ++ u16 offset,pktlen; ++ PTXDESC_8188E ptxdesc; ++ ++ u8 *pmem,*pEMInfo_mem; ++ s8 node_num_0=0,node_num_1=0; ++ struct EMInfo eminfo; ++ struct agg_pkt_info *paggpkt; ++ struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data; ++ pmem= pframe->buf_addr; ++ ++ #ifdef DBG_EMINFO ++ DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num); ++ for(index=0;indexagg_num;index++){ ++ offset = pxmitpriv->agg_pkt[index].offset; ++ pktlen = pxmitpriv->agg_pkt[index].pkt_len; ++ DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset); ++ DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen); ++ } ++ #endif ++ ++ if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) ++ { ++ node_num_0 = pframe->agg_num; ++ node_num_1= EARLY_MODE_MAX_PKT_NUM-1; ++ } ++ ++ for(index=0;indexagg_num;index++){ ++ ++ offset = pxmitpriv->agg_pkt[index].offset; ++ pktlen = pxmitpriv->agg_pkt[index].pkt_len; ++ ++ _rtw_memset(&eminfo,0,sizeof(struct EMInfo)); ++ if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){ ++ if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){ ++ eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; ++ node_num_0--; ++ } ++ else{ ++ eminfo.EMPktNum = node_num_1; ++ node_num_1--; ++ } ++ } ++ else{ ++ eminfo.EMPktNum = pframe->agg_num-(index+1); ++ } ++ for(j=0;j< eminfo.EMPktNum ;j++){ ++ eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC ++ } ++ ++ if(pmem){ ++ if(index==0){ ++ ptxdesc = (PTXDESC_8188E)(pmem); ++ pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; ++ } ++ else{ ++ pmem = pmem + pxmitpriv->agg_pkt[index-1].offset; ++ ptxdesc = (PTXDESC_8188E)(pmem); ++ pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; ++ } ++ ++ #ifdef DBG_EMINFO ++ DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen); ++ #endif ++ InsertEMContent_8188E(&eminfo,pEMInfo_mem); ++ } ++ ++ ++ } ++ _rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM); ++ ++} ++#endif ++ ++void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc) ++{ ++ u16 *usPtr = (u16*)ptxdesc; ++ u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times ++ u32 index; ++ u16 checksum = 0; ++ ++ ++ // Clear first ++ ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); ++ ++ for (index = 0; index < count; index++) { ++ checksum ^= le16_to_cpu(*(usPtr + index)); ++ } ++ ++ ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff); ++} ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_led.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_led.c +new file mode 100644 +index 0000000..26a88f3 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_led.c +@@ -0,0 +1,123 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8189ES_LED_C_ ++ ++#include "drv_types.h" ++#include "rtl8188e_hal.h" ++ ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++ ++//================================================================================ ++// LED_819xUsb routines. ++//================================================================================ ++ ++// ++// Description: ++// Turn on LED according to LedPin specified. ++// ++static void ++SwLedOn_8188ES( ++ _adapter *padapter, ++ PLED_SDIO pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ return; ++ ++ pLed->bLedOn = _TRUE; ++} ++ ++ ++// ++// Description: ++// Turn off LED according to LedPin specified. ++// ++static void ++SwLedOff_8188ES( ++ _adapter *padapter, ++ PLED_SDIO pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ goto exit; ++ ++exit: ++ pLed->bLedOn = _FALSE; ++ ++} ++ ++//================================================================================ ++// Default LED behavior. ++//================================================================================ ++ ++// ++// Description: ++// Initialize all LED_871x objects. ++// ++void ++rtl8188es_InitSwLeds( ++ _adapter *padapter ++ ) ++{ ++#if 0 ++ struct led_priv *pledpriv = &(padapter->ledpriv); ++ ++ pledpriv->LedControlHandler = LedControlSDIO; ++ ++ pledpriv->SwLedOn = SwLedOn_8188ES; ++ pledpriv->SwLedOff = SwLedOff_8188ES; ++ ++ InitLed(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); ++ ++ InitLed(padapter, &(pledpriv->SwLed1), LED_PIN_LED1); ++#endif ++} ++ ++ ++// ++// Description: ++// DeInitialize all LED_819xUsb objects. ++// ++void ++rtl8188es_DeInitSwLeds( ++ _adapter *padapter ++ ) ++{ ++#if 0 ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ DeInitLed( &(ledpriv->SwLed0) ); ++ DeInitLed( &(ledpriv->SwLed1) ); ++#endif ++} ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_recv.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_recv.c +new file mode 100644 +index 0000000..8ddcaab +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_recv.c +@@ -0,0 +1,874 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8189ES_RECV_C_ ++ ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++#error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++#include ++#include ++#include ++ ++static void rtl8188es_recv_tasklet(void *priv); ++ ++static s32 initrecvbuf(struct recv_buf *precvbuf, PADAPTER padapter) ++{ ++ _rtw_init_listhead(&precvbuf->list); ++ _rtw_spinlock_init(&precvbuf->recvbuf_lock); ++ ++ precvbuf->adapter = padapter; ++ ++ return _SUCCESS; ++} ++ ++static void freerecvbuf(struct recv_buf *precvbuf) ++{ ++ _rtw_spinlock_free(&precvbuf->recvbuf_lock); ++} ++ ++/* ++ * Initialize recv private variable for hardware dependent ++ * 1. recv buf ++ * 2. recv tasklet ++ * ++ */ ++s32 rtl8188es_init_recv_priv(PADAPTER padapter) ++{ ++ s32 res; ++ u32 i, n; ++ u32 max_recvbuf_sz = 0; ++ struct recv_priv *precvpriv; ++ struct recv_buf *precvbuf; ++ ++ ++ res = _SUCCESS; ++ precvpriv = &padapter->recvpriv; ++ ++ //3 1. init recv buffer ++ _rtw_init_queue(&precvpriv->free_recv_buf_queue); ++ _rtw_init_queue(&precvpriv->recv_buf_pending_queue); ++ ++ n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; ++ precvpriv->pallocated_recv_buf = rtw_zmalloc(n); ++ if (precvpriv->pallocated_recv_buf == NULL) { ++ res = _FAIL; ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n")); ++ goto exit; ++ } ++ ++ precvpriv->precv_buf = (u8*)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); ++ ++ // init each recv buffer ++ precvbuf = (struct recv_buf*)precvpriv->precv_buf; ++ for (i = 0; i < NR_RECVBUFF; i++) ++ { ++ res = initrecvbuf(precvbuf, padapter); ++ if (res == _FAIL) ++ break; ++ ++ res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); ++ if (res == _FAIL) { ++ freerecvbuf(precvbuf); ++ break; ++ } ++ ++#ifdef CONFIG_SDIO_RX_COPY ++ if (precvbuf->pskb == NULL) { ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ ++ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, ++ &max_recvbuf_sz); ++ ++ if (max_recvbuf_sz == 0) ++ max_recvbuf_sz = MAX_RECVBUF_SZ; ++ ++ precvbuf->pskb = rtw_skb_alloc(max_recvbuf_sz + ++ RECVBUFF_ALIGN_SZ); ++ ++ if(precvbuf->pskb) ++ { ++ precvbuf->pskb->dev = padapter->pnetdev; ++ ++ tmpaddr = (SIZE_PTR)precvbuf->pskb->data; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ precvbuf->phead = precvbuf->pskb->head; ++ precvbuf->pdata = precvbuf->pskb->data; ++ precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); ++ precvbuf->pend = skb_end_pointer(precvbuf->pskb); ++ precvbuf->len = 0; ++ } ++ ++ if (precvbuf->pskb == NULL) { ++ DBG_871X("%s: alloc_skb fail!\n", __FUNCTION__); ++ } ++ } ++#endif ++ ++ rtw_list_insert_tail(&precvbuf->list, &precvpriv->free_recv_buf_queue.queue); ++ ++ precvbuf++; ++ } ++ precvpriv->free_recv_buf_queue_cnt = i; ++ ++ if (res == _FAIL) ++ goto initbuferror; ++ ++ //3 2. init tasklet ++#ifdef PLATFORM_LINUX ++ tasklet_init(&precvpriv->recv_tasklet, ++ (void(*)(unsigned long))rtl8188es_recv_tasklet, ++ (unsigned long)padapter); ++#endif ++ ++ goto exit; ++ ++initbuferror: ++ precvbuf = (struct recv_buf*)precvpriv->precv_buf; ++ if (precvbuf) { ++ n = precvpriv->free_recv_buf_queue_cnt; ++ precvpriv->free_recv_buf_queue_cnt = 0; ++ for (i = 0; i < n ; i++) ++ { ++ rtw_list_delete(&precvbuf->list); ++ rtw_os_recvbuf_resource_free(padapter, precvbuf); ++ freerecvbuf(precvbuf); ++ precvbuf++; ++ } ++ precvpriv->precv_buf = NULL; ++ } ++ ++ if (precvpriv->pallocated_recv_buf) { ++ n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; ++ rtw_mfree(precvpriv->pallocated_recv_buf, n); ++ precvpriv->pallocated_recv_buf = NULL; ++ } ++ ++exit: ++ return res; ++} ++ ++/* ++ * Free recv private variable of hardware dependent ++ * 1. recv buf ++ * 2. recv tasklet ++ * ++ */ ++void rtl8188es_free_recv_priv(PADAPTER padapter) ++{ ++ u32 i, n; ++ struct recv_priv *precvpriv; ++ struct recv_buf *precvbuf; ++ ++ ++ precvpriv = &padapter->recvpriv; ++ ++ //3 1. kill tasklet ++#ifdef PLATFORM_LINUX ++ tasklet_kill(&precvpriv->recv_tasklet); ++#endif ++ ++ //3 2. free all recv buffers ++ precvbuf = (struct recv_buf*)precvpriv->precv_buf; ++ if (precvbuf) { ++ n = NR_RECVBUFF; ++ precvpriv->free_recv_buf_queue_cnt = 0; ++ for (i = 0; i < n ; i++) ++ { ++ rtw_list_delete(&precvbuf->list); ++ rtw_os_recvbuf_resource_free(padapter, precvbuf); ++ freerecvbuf(precvbuf); ++ precvbuf++; ++ } ++ precvpriv->precv_buf = NULL; ++ } ++ ++ if (precvpriv->pallocated_recv_buf) { ++ n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; ++ rtw_mfree(precvpriv->pallocated_recv_buf, n); ++ precvpriv->pallocated_recv_buf = NULL; ++ } ++} ++ ++#ifdef CONFIG_SDIO_RX_COPY ++static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbuf, u8 *pphy_status) ++{ ++ s32 ret=_SUCCESS; ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 *secondary_myid, *paddr1; ++ union recv_frame *precvframe_if2 = NULL; ++ _adapter *primary_padapter = precvframe->u.hdr.adapter; ++ _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; ++ struct recv_priv *precvpriv = &primary_padapter->recvpriv; ++ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(primary_padapter); ++ ++ if(!secondary_padapter) ++ return ret; ++ ++ paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); ++ ++ if(IS_MCAST(paddr1) == _FALSE)//unicast packets ++ { ++ secondary_myid = adapter_mac_addr(secondary_padapter); ++ ++ if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) ++ { ++ //change to secondary interface ++ precvframe->u.hdr.adapter = secondary_padapter; ++ } ++ ++ //ret = recv_entry(precvframe); ++ ++ } ++ else // Handle BC/MC Packets ++ { ++ //clone/copy to if2 ++ _pkt *pkt_copy = NULL; ++ struct rx_pkt_attrib *pattrib = NULL; ++ ++ precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); ++ ++ if(!precvframe_if2) ++ return _FAIL; ++ ++ precvframe_if2->u.hdr.adapter = secondary_padapter; ++ _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); ++ pattrib = &precvframe_if2->u.hdr.attrib; ++ ++ //driver need to set skb len for skb_copy(). ++ //If skb->len is zero, skb_copy() will not copy data from original skb. ++ skb_put(precvframe->u.hdr.pkt, pattrib->pkt_len); ++ ++ pkt_copy = rtw_skb_copy( precvframe->u.hdr.pkt); ++ if (pkt_copy == NULL) ++ { ++ if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) ++ { ++ DBG_8192C("pre_recv_entry(): rtw_skb_copy fail , drop frag frame \n"); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ return ret; ++ } ++ ++ pkt_copy = rtw_skb_clone( precvframe->u.hdr.pkt); ++ if(pkt_copy == NULL) ++ { ++ DBG_8192C("pre_recv_entry(): rtw_skb_clone fail , drop frame\n"); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ return ret; ++ } ++ } ++ ++ pkt_copy->dev = secondary_padapter->pnetdev; ++ ++ precvframe_if2->u.hdr.pkt = pkt_copy; ++ precvframe_if2->u.hdr.rx_head = pkt_copy->head; ++ precvframe_if2->u.hdr.rx_data = pkt_copy->data; ++ precvframe_if2->u.hdr.rx_tail = skb_tail_pointer(pkt_copy); ++ precvframe_if2->u.hdr.rx_end = skb_end_pointer(pkt_copy); ++ precvframe_if2->u.hdr.len = pkt_copy->len; ++ ++ //recvframe_put(precvframe_if2, pattrib->pkt_len); ++ ++ if ( pHalData->ReceiveConfig & RCR_APPFCS) ++ recvframe_pull_tail(precvframe_if2, IEEE80211_FCS_LEN); ++ ++ if (pattrib->physt) ++ rx_query_phy_status(precvframe_if2, pphy_status); ++ ++ if(rtw_recv_entry(precvframe_if2) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ++ ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ ++ if (precvframe->u.hdr.attrib.physt) ++ rx_query_phy_status(precvframe, pphy_status); ++ ret = rtw_recv_entry(precvframe); ++ ++#endif ++ ++ return ret; ++ ++} ++ ++static void rtl8188es_recv_tasklet(void *priv) ++{ ++ PADAPTER padapter; ++ PHAL_DATA_TYPE pHalData; ++ struct recv_priv *precvpriv; ++ struct recv_buf *precvbuf; ++ union recv_frame *precvframe; ++ struct recv_frame_hdr *phdr; ++ struct rx_pkt_attrib *pattrib; ++ _irqL irql; ++ u8 *ptr; ++ u32 pkt_offset, skb_len, alloc_sz; ++ s32 transfer_len; ++ _pkt *pkt_copy = NULL; ++ u8 *pphy_status = NULL; ++ u8 shift_sz = 0, rx_report_sz = 0; ++ ++ ++ padapter = (PADAPTER)priv; ++ pHalData = GET_HAL_DATA(padapter); ++ precvpriv = &padapter->recvpriv; ++ ++ do { ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved\n"); ++ break; ++ } ++ ++ precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); ++ if (NULL == precvbuf) break; ++ ++ transfer_len = (s32)precvbuf->len; ++ ptr = precvbuf->pdata; ++ ++ do { ++ precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); ++ if (precvframe == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: no enough recv frame!\n",__FUNCTION__)); ++ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); ++ ++ // The case of can't allocte recvframe should be temporary, ++ // schedule again and hope recvframe is available next time. ++#ifdef PLATFORM_LINUX ++ tasklet_schedule(&precvpriv->recv_tasklet); ++#endif ++ return; ++ } ++ ++ //rx desc parsing ++ rtl8188e_query_rx_desc_status(precvframe, (struct recv_stat*)ptr); ++ ++ pattrib = &precvframe->u.hdr.attrib; ++ ++ // fix Hardware RX data error, drop whole recv_buffer ++ if ((!(pHalData->ReceiveConfig & RCR_ACRC32)) && pattrib->crc_err) ++ { ++ #if !(MP_DRIVER==1) ++ DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); ++ #endif ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ break; ++ } ++ ++ if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) ++ rx_report_sz = RXDESC_SIZE + 4 + pattrib->drvinfo_sz; ++ else ++ rx_report_sz = RXDESC_SIZE + pattrib->drvinfo_sz; ++ ++ pkt_offset = rx_report_sz + pattrib->shift_sz + pattrib->pkt_len; ++ ++ if ((pattrib->pkt_len==0) || (pkt_offset>transfer_len)) { ++ DBG_8192C("%s()-%d: RX Warning!,pkt_len==0 or pkt_offset(%d)> transfoer_len(%d) \n", __FUNCTION__, __LINE__, pkt_offset, transfer_len); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ break; ++ } ++ ++ if ((pattrib->crc_err) || (pattrib->icv_err)) ++ { ++ #ifdef CONFIG_MP_INCLUDED ++ if (padapter->registrypriv.mp_mode == 1) ++ { ++ if ((check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) ++ { ++ if (pattrib->crc_err == 1) ++ padapter->mppriv.rx_crcerrpktcount++; ++ } ++ } ++ #endif ++ ++ DBG_8192C("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ } ++ else ++ { ++ // Modified by Albert 20101213 ++ // For 8 bytes IP header alignment. ++ if (pattrib->qos) // Qos data, wireless lan header length is 26 ++ { ++ shift_sz = 6; ++ } ++ else ++ { ++ shift_sz = 0; ++ } ++ ++ skb_len = pattrib->pkt_len; ++ ++ // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. ++ // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 ++ if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ ++ //alloc_sz = 1664; //1664 is 128 alignment. ++ if(skb_len <= 1650) ++ alloc_sz = 1664; ++ else ++ alloc_sz = skb_len + 14; ++ } ++ else { ++ alloc_sz = skb_len; ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ // 8 is for skb->data 4 bytes alignment. ++ alloc_sz += 14; ++ } ++ ++ pkt_copy = rtw_skb_alloc(alloc_sz); ++ ++ if(pkt_copy) ++ { ++ pkt_copy->dev = padapter->pnetdev; ++ precvframe->u.hdr.pkt = pkt_copy; ++ skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address ++ skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. ++ _rtw_memcpy(pkt_copy->data, (ptr + rx_report_sz + pattrib->shift_sz), skb_len); ++ precvframe->u.hdr.rx_head = pkt_copy->head; ++ precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; ++ precvframe->u.hdr.rx_end = skb_end_pointer(pkt_copy); ++ } ++ else ++ { ++ if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) ++ { ++ DBG_8192C("rtl8188es_recv_tasklet: alloc_skb fail , drop frag frame \n"); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ break; ++ } ++ ++ precvframe->u.hdr.pkt = rtw_skb_clone(precvbuf->pskb); ++ if(precvframe->u.hdr.pkt) ++ { ++ _pkt *pkt_clone = precvframe->u.hdr.pkt; ++ ++ pkt_clone->data = ptr + rx_report_sz + pattrib->shift_sz; ++ skb_reset_tail_pointer(pkt_clone); ++ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail ++ = pkt_clone->data; ++ precvframe->u.hdr.rx_end = pkt_clone->data + skb_len; ++ } ++ else ++ { ++ DBG_8192C("rtl8188es_recv_tasklet: rtw_skb_clone fail\n"); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ break; ++ } ++ } ++ ++ recvframe_put(precvframe, skb_len); ++ //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); ++ ++ if (pHalData->ReceiveConfig & RCR_APPFCS) { ++ recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); ++ pattrib->pkt_len -= IEEE80211_FCS_LEN; ++ } ++ ++ // update drv info ++ if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) { ++ //rtl8723s_update_bassn(padapter, (ptr + RXDESC_SIZE)); ++ } ++ ++ if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet ++ { ++ pphy_status = (ptr + (rx_report_sz - pattrib->drvinfo_sz)); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ { ++ if(pre_recv_entry(precvframe, precvbuf, pphy_status) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ++ ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ else ++#endif ++ { ++ if (pattrib->physt) ++ rx_query_phy_status(precvframe, pphy_status); ++ ++ if (rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: rtw_recv_entry(precvframe) != _SUCCESS\n",__FUNCTION__)); ++ } ++ } ++ } ++ else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP ++ ++ //enqueue recvframe to txrtp queue ++ if(pattrib->pkt_rpt_type == TX_REPORT1){ ++ //DBG_8192C("rx CCX \n"); ++ //CCX-TXRPT ack for xmit mgmt frames. ++ handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data); ++ } ++ else if(pattrib->pkt_rpt_type == TX_REPORT2){ ++ //printk("rx TX RPT \n"); ++ ODM_RA_TxRPT2Handle_8188E( ++ &pHalData->odmpriv, ++ precvframe->u.hdr.rx_data, ++ pattrib->pkt_len, ++ pattrib->MacIDValidEntry[0], ++ pattrib->MacIDValidEntry[1] ++ ); ++ ++ } ++ /* ++ else if(pattrib->pkt_rpt_type == HIS_REPORT){ ++ printk("rx USB HISR \n"); ++ }*/ ++ ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ ++ } ++ } ++ ++ // Page size of receive package is 128 bytes alignment =>DMA AGG ++ ++ pkt_offset = _RND128(pkt_offset); ++ transfer_len -= pkt_offset; ++ ptr += pkt_offset; ++ precvframe = NULL; ++ pkt_copy = NULL; ++ }while(transfer_len>0); ++ ++ precvbuf->len = 0; ++ ++ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); ++ } while (1); ++ ++} ++#else ++static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbuf, u8 *pphy_status) ++{ ++ s32 ret=_SUCCESS; ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 *secondary_myid, *paddr1; ++ union recv_frame *precvframe_if2 = NULL; ++ _adapter *primary_padapter = precvframe->u.hdr.adapter; ++ _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; ++ struct recv_priv *precvpriv = &primary_padapter->recvpriv; ++ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; ++ u8 *pbuf = precvframe->u.hdr.rx_data; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(primary_padapter); ++ ++ if(!secondary_padapter) ++ return ret; ++ ++ paddr1 = GetAddr1Ptr(pbuf); ++ ++ if(IS_MCAST(paddr1) == _FALSE)//unicast packets ++ { ++ secondary_myid = adapter_mac_addr(secondary_padapter); ++ ++ if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) ++ { ++ //change to secondary interface ++ precvframe->u.hdr.adapter = secondary_padapter; ++ } ++ ++ //ret = recv_entry(precvframe); ++ ++ } ++ else // Handle BC/MC Packets ++ { ++ //clone/copy to if2 ++ u8 shift_sz = 0; ++ u32 alloc_sz, skb_len; ++ _pkt *pkt_copy = NULL; ++ struct rx_pkt_attrib *pattrib = NULL; ++ ++ precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); ++ ++ if(!precvframe_if2) ++ return _FAIL; ++ ++ precvframe_if2->u.hdr.adapter = secondary_padapter; ++ _rtw_init_listhead(&precvframe_if2->u.hdr.list); ++ precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. ++ precvframe_if2->u.hdr.len=0; ++ _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); ++ pattrib = &precvframe_if2->u.hdr.attrib; ++ ++ pkt_copy = rtw_skb_copy( precvframe->u.hdr.pkt); ++ if (pkt_copy == NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_crit_, ("%s: no enough memory to allocate SKB!\n",__FUNCTION__)); ++ rtw_free_recvframe(precvframe_if2, &precvpriv->free_recv_queue); ++ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); ++ ++ // The case of can't allocte skb is serious and may never be recovered, ++ // once bDriverStopped is enable, this task should be stopped. ++ if (!rtw_is_drv_stopped(secondary_padapter)) ++#ifdef PLATFORM_LINUX ++ tasklet_schedule(&precvpriv->recv_tasklet); ++#endif ++ return ret; ++ } ++ pkt_copy->dev = secondary_padapter->pnetdev; ++ ++ ++ ++ if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ ++ //alloc_sz = 1664; //1664 is 128 alignment. ++ if(skb_len <= 1650) ++ alloc_sz = 1664; ++ else ++ alloc_sz = skb_len + 14; ++ } ++ else { ++ alloc_sz = skb_len; ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ // 8 is for skb->data 4 bytes alignment. ++ alloc_sz += 14; ++ } ++ ++#if 1 ++ precvframe_if2->u.hdr.pkt = pkt_copy; ++ precvframe_if2->u.hdr.rx_head = pkt_copy->head; ++ precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data; ++ precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz; ++#endif ++ recvframe_put(precvframe_if2, pkt_offset); ++ recvframe_pull(precvframe_if2, RXDESC_SIZE + pattrib->drvinfo_sz); ++ ++ if ( pHalData->ReceiveConfig & RCR_APPFCS) ++ recvframe_pull_tail(precvframe_if2, IEEE80211_FCS_LEN); ++ ++ if (pattrib->physt) ++ rx_query_phy_status(precvframe_if2, pphy_status); ++ ++ if(rtw_recv_entry(precvframe_if2) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ++ ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ ++ if (precvframe->u.hdr.attrib.physt) ++ rx_query_phy_status(precvframe, pphy_status); ++ ret = rtw_recv_entry(precvframe); ++ ++#endif ++ ++ return ret; ++ ++} ++ ++static void rtl8188es_recv_tasklet(void *priv) ++{ ++ PADAPTER padapter; ++ PHAL_DATA_TYPE pHalData; ++ struct recv_priv *precvpriv; ++ struct recv_buf *precvbuf; ++ union recv_frame *precvframe; ++ struct recv_frame_hdr *phdr; ++ struct rx_pkt_attrib *pattrib; ++ u8 *ptr; ++ _pkt *ppkt; ++ u32 pkt_offset; ++ _irqL irql; ++#ifdef CONFIG_CONCURRENT_MODE ++ struct recv_stat *prxstat; ++#endif ++ ++ padapter = (PADAPTER)priv; ++ pHalData = GET_HAL_DATA(padapter); ++ precvpriv = &padapter->recvpriv; ++ ++ do { ++ precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); ++ if (NULL == precvbuf) break; ++ ++ ptr = precvbuf->pdata; ++ ++ while (ptr < precvbuf->ptail) ++ { ++ precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); ++ if (precvframe == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: no enough recv frame!\n",__FUNCTION__)); ++ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); ++ ++ // The case of can't allocte recvframe should be temporary, ++ // schedule again and hope recvframe is available next time. ++#ifdef PLATFORM_LINUX ++ tasklet_schedule(&precvpriv->recv_tasklet); ++#endif ++ return; ++ } ++ ++ phdr = &precvframe->u.hdr; ++ pattrib = &phdr->attrib; ++ ++ //rx desc parsing ++ rtl8188e_query_rx_desc_status(precvframe, (struct recv_stat*)ptr); ++#ifdef CONFIG_CONCURRENT_MODE ++ prxstat = (struct recv_stat*)ptr; ++#endif ++ // fix Hardware RX data error, drop whole recv_buffer ++ if ((!(pHalData->ReceiveConfig & RCR_ACRC32)) && pattrib->crc_err) ++ { ++ //#if !(MP_DRIVER==1) ++ if (padapter->registrypriv.mp_mode == 0) ++ DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); ++ //#endif ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ break; ++ } ++ ++ pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->pkt_len; ++ ++ if ((ptr + pkt_offset) > precvbuf->ptail) { ++ DBG_8192C("%s()-%d: : next pkt len(%p,%d) exceed ptail(%p)!\n", __FUNCTION__, __LINE__, ptr, pkt_offset, precvbuf->ptail); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ break; ++ } ++ ++ if ((pattrib->crc_err) || (pattrib->icv_err)) ++ { ++ #ifdef CONFIG_MP_INCLUDED ++ if (padapter->registrypriv.mp_mode == 1) ++ { ++ if ((check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) ++ { ++ if (pattrib->crc_err == 1) ++ padapter->mppriv.rx_crcerrpktcount++; ++ } ++ } ++ #endif ++ ++ DBG_8192C("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ } ++ else ++ { ++ ppkt = rtw_skb_clone(precvbuf->pskb); ++ if (ppkt == NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_crit_, ("%s: no enough memory to allocate SKB!\n",__FUNCTION__)); ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); ++ ++ // The case of can't allocte skb is serious and may never be recovered, ++ // once bDriverStopped is enable, this task should be stopped. ++ if (!rtw_is_drv_stopped(padapter)) { ++#ifdef PLATFORM_LINUX ++ tasklet_schedule(&precvpriv->recv_tasklet); ++#endif ++ } ++ ++ return; ++ } ++ ++ phdr->pkt = ppkt; ++ phdr->len = 0; ++ phdr->rx_head = precvbuf->phead; ++ phdr->rx_data = phdr->rx_tail = precvbuf->pdata; ++ phdr->rx_end = precvbuf->pend; ++ ++ recvframe_put(precvframe, pkt_offset); ++ recvframe_pull(precvframe, RXDESC_SIZE + pattrib->drvinfo_sz); ++ ++ if (pHalData->ReceiveConfig & RCR_APPFCS) ++ recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); ++ ++ // move to drv info position ++ ptr += RXDESC_SIZE; ++ ++ // update drv info ++ if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) { ++// rtl8723s_update_bassn(padapter, pdrvinfo); ++ ptr += 4; ++ } ++ ++ if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ { ++ if(pre_recv_entry(precvframe, precvbuf, ptr) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ++ ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ else ++#endif ++ { ++ if (pattrib->physt) ++ rx_query_phy_status(precvframe, ptr); ++ ++ if (rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ++ ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ } ++ else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP ++ ++ //enqueue recvframe to txrtp queue ++ if(pattrib->pkt_rpt_type == TX_REPORT1){ ++ DBG_8192C("rx CCX \n"); ++ } ++ else if(pattrib->pkt_rpt_type == TX_REPORT2){ ++ //DBG_8192C("rx TX RPT \n"); ++ ODM_RA_TxRPT2Handle_8188E( ++ &pHalData->odmpriv, ++ precvframe->u.hdr.rx_data, ++ pattrib->pkt_len, ++ pattrib->MacIDValidEntry[0], ++ pattrib->MacIDValidEntry[1] ++ ); ++ ++ } ++ /* ++ else if(pattrib->pkt_rpt_type == HIS_REPORT){ ++ DBG_8192C("rx USB HISR \n"); ++ }*/ ++ ++ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); ++ ++ } ++ } ++ ++ // Page size of receive package is 128 bytes alignment =>DMA AGG ++ ++ pkt_offset = _RND128(pkt_offset); ++ precvbuf->pdata += pkt_offset; ++ ptr = precvbuf->pdata; ++ ++ } ++ ++ rtw_skb_free(precvbuf->pskb); ++ precvbuf->pskb = NULL; ++ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); ++ ++ } while (1); ++ ++} ++#endif ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_xmit.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_xmit.c +new file mode 100644 +index 0000000..5574b42 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/rtl8189es_xmit.c +@@ -0,0 +1,1550 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8189ES_XMIT_C_ ++ ++#include ++#include ++ ++static void fill_txdesc_sectype(struct pkt_attrib *pattrib, PTXDESC_8188E ptxdesc) ++{ ++ if ((pattrib->encrypt > 0) && !pattrib->bswenc) ++ { ++ switch (pattrib->encrypt) ++ { ++ // SEC_TYPE ++ case _WEP40_: ++ case _WEP104_: ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ ptxdesc->sectype = 1; ++ break; ++#ifdef CONFIG_WAPI_SUPPORT ++ case _SMS4_: ++ ptxdesc->sectype = 2; ++ break; ++#endif ++ case _AES_: ++ ptxdesc->sectype = 3; ++ break; ++ ++ case _NO_PRIVACY_: ++ default: ++ break; ++ } ++ } ++} ++ ++ ++ static void fill_txdesc_vcs(struct pkt_attrib *pattrib, PTXDESC_8188E ptxdesc) ++{ ++ //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); ++ ++ switch (pattrib->vcs_mode) ++ { ++ case RTS_CTS: ++ ptxdesc->rtsen = 1; ++ break; ++ ++ case CTS_TO_SELF: ++ ptxdesc->cts2self = 1; ++ break; ++ ++ case NONE_VCS: ++ default: ++ break; ++ } ++ ++ if(pattrib->vcs_mode) { ++ ptxdesc->hw_rts_en = 1; // ENABLE HW RTS ++ ++ // Set RTS BW ++ if(pattrib->ht_en) ++ { ++ if (pattrib->bwmode & CHANNEL_WIDTH_40) ++ ptxdesc->rts_bw = 1; ++ ++ switch (pattrib->ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ ptxdesc->rts_sc = 0; ++ break; ++ ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ ptxdesc->rts_sc = 1; ++ break; ++ ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ ptxdesc->rts_sc = 2; ++ break; ++ ++ default: ++ ptxdesc->rts_sc = 3; // Duplicate ++ break; ++ } ++ } ++ } ++} ++ ++static void fill_txdesc_phy(struct pkt_attrib *pattrib, PTXDESC_8188E ptxdesc) ++{ ++ //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); ++ ++ if (pattrib->ht_en) ++ { ++ if (pattrib->bwmode & CHANNEL_WIDTH_40) ++ ptxdesc->data_bw = 1; ++ ++ switch (pattrib->ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ ptxdesc->data_sc = 0; ++ break; ++ ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ ptxdesc->data_sc = 1; ++ break; ++ ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ ptxdesc->data_sc = 2; ++ break; ++ ++ default: ++ ptxdesc->data_sc = 3; // Duplicate ++ break; ++ } ++ } ++} ++ ++// ++// Description: In normal chip, we should send some packet to Hw which will be used by Fw ++// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then ++// Fw can tell Hw to send these packet derectly. ++// ++void rtl8188e_fill_fake_txdesc( ++ PADAPTER padapter, ++ u8* pDesc, ++ u32 BufferLen, ++ u8 IsPsPoll, ++ u8 IsBTQosNull, ++ u8 bDataFrame) ++{ ++ struct tx_desc *ptxdesc; ++ ++ ++ // Clear all status ++ ptxdesc = (struct tx_desc*)pDesc; ++ _rtw_memset(pDesc, 0, TXDESC_SIZE); ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; ++ ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); ++ } ++ else ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ } ++ ++ if (_TRUE == IsBTQosNull) ++ { ++ ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); // BT NULL ++ } ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ // ++ // Encrypt the data frame if under security mode excepct null data. Suggested by CCW. ++ // ++ if (_TRUE ==bDataFrame) ++ { ++ u32 EncAlg; ++ ++ EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; ++ switch (EncAlg) ++ { ++ case _NO_PRIVACY_: ++ SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x0); ++ break; ++ case _WEP40_: ++ case _WEP104_: ++ case _TKIP_: ++ SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x1); ++ break; ++ case _SMS4_: ++ SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x2); ++ break; ++ case _AES_: ++ SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x3); ++ break; ++ default: ++ SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x0); ++ break; ++ } ++ } ++ ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++ // USB interface drop packet if the checksum of descriptor isn't correct. ++ // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). ++ rtl8188e_cal_txdesc_chksum(ptxdesc); ++#endif ++} ++ ++ ++//#define CONFIG_FIX_CORE_DUMP ==> have bug ++//#define DBG_EMINFO ++ ++void rtl8188es_fill_default_txdesc( ++ struct xmit_frame *pxmitframe, ++ u8 *pbuf) ++{ ++ PADAPTER padapter; ++ HAL_DATA_TYPE *pHalData; ++ struct mlme_ext_priv *pmlmeext; ++ struct mlme_ext_info *pmlmeinfo; ++ struct pkt_attrib *pattrib; ++ PTXDESC_8188E ptxdesc; ++ s32 bmcst; ++ ++ ++ padapter = pxmitframe->padapter; ++ pHalData = GET_HAL_DATA(padapter); ++ pmlmeext = &padapter->mlmeextpriv; ++ pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ pattrib = &pxmitframe->attrib; ++ bmcst = IS_MCAST(pattrib->ra); ++ ++ ptxdesc = (PTXDESC_8188E)pbuf; ++ ++ ++ if (pxmitframe->frame_tag == DATA_FRAMETAG) ++ { ++ ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) ++ ++ if (pattrib->ampdu_en == _TRUE){ ++ ptxdesc->agg_en = 1; // AGG EN ++ ptxdesc->ampdu_density = pattrib->ampdu_spacing; ++ } ++ else{ ++ ptxdesc->bk = 1; // AGG BK ++ } ++ ++ ptxdesc->qsel = pattrib->qsel; ++ ptxdesc->rate_id = pattrib->raid; ++ ++ fill_txdesc_sectype(pattrib, ptxdesc); ++ ++ ptxdesc->seq = pattrib->seqnum; ++ ++ //todo: qos_en ++ ++ if ((pattrib->ether_type != 0x888e) && ++ (pattrib->ether_type != 0x0806) && ++ (pattrib->dhcp_pkt != 1)) ++ { ++ // Non EAP & ARP & DHCP type data packet ++ ++ fill_txdesc_vcs(pattrib, ptxdesc); ++ fill_txdesc_phy(pattrib, ptxdesc); ++ ++ ptxdesc->rtsrate = 8; // RTS Rate=24M ++ ptxdesc->data_ratefb_lmt = 0x1F; ++ ptxdesc->rts_ratefb_lmt = 0xF; ++ ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ if(pHalData->fw_ractrl == _FALSE){ ++ /* driver-based RA*/ ++ ptxdesc->userate = 1; // driver uses rate ++ if (pattrib->ht_en) ++ ptxdesc->sgi = ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id); ++ ptxdesc->datarate = ODM_RA_GetDecisionRate_8188E(&pHalData->odmpriv,pattrib->mac_id); ++ ++ #if (POWER_TRAINING_ACTIVE==1) ++ ptxdesc->pwr_status = ODM_RA_GetHwPwrStatus_8188E(&pHalData->odmpriv,pattrib->mac_id); ++ #endif ++ } ++ else ++#endif /* (RATE_ADAPTIVE_SUPPORT == 1) */ ++ { ++ /* FW-based RA, TODO */ ++ if(pattrib->ht_en) ++ ptxdesc->sgi = 1; ++ ++ ptxdesc->datarate = 0x13; //MCS7 ++ } ++ ++ if (padapter->fix_rate != 0xFF) { ++ ptxdesc->userate = 1; ++ ptxdesc->datarate = padapter->fix_rate; ++ if (!padapter->data_fb) ++ ptxdesc->disdatafb = 1; ++ ptxdesc->sgi = (padapter->fix_rate & BIT(7))?1:0; ++ } ++ } ++ else ++ { ++ // EAP data packet and ARP and DHCP packet. ++ // Use the 1M or 6M data rate to send the EAP/ARP packet. ++ // This will maybe make the handshake smooth. ++ ptxdesc->userate = 1; // driver uses rate ++ ptxdesc->bk = 1; // AGG BK ++ ++ if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) ++ ptxdesc->data_short = 1;// DATA_SHORT ++ ++ ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); ++ } ++ ++ ptxdesc->usb_txagg_num = pxmitframe->agg_num; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_XMIT_ACK ++ /* CCX-TXRPT ack for xmit mgmt frames. */ ++ if (pxmitframe->ack_report) { ++ #ifdef DBG_CCX ++ static u16 ccx_sw = 0x123; ++ ++ txdesc_set_ccx_sw_88e(ptxdesc, ccx_sw); ++ DBG_871X("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); ++ ccx_sw = (ccx_sw+1)%0xfff; ++ #endif ++ ptxdesc->ccx = 1; ++ } ++#endif /* CONFIG_XMIT_ACK */ ++#endif ++ } ++ else if (pxmitframe->frame_tag == MGNT_FRAMETAG) ++ { ++// RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MGNT_FRAMETAG\n", __FUNCTION__)); ++ ptxdesc->userate = 1; // driver uses rate ++ ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) ++ ptxdesc->qsel = pattrib->qsel; ++ ptxdesc->rate_id = pattrib->raid; // Rate ID ++ ptxdesc->seq = pattrib->seqnum; ++ ptxdesc->userate = 1; // driver uses rate, 1M ++ ptxdesc->rty_lmt_en = 1; // retry limit enable ++ ptxdesc->data_rt_lmt = 6; // retry limit = 6 ++ ++#ifdef CONFIG_XMIT_ACK ++ //CCX-TXRPT ack for xmit mgmt frames. ++ if (pxmitframe->ack_report) { ++ #ifdef DBG_CCX ++ static u16 ccx_sw = 0x123; ++ txdesc_set_ccx_sw_88e(ptxdesc, ccx_sw); ++ DBG_871X("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); ++ ccx_sw = (ccx_sw+1)%0xfff; ++ #endif ++ ptxdesc->ccx = 1; ++ } ++#endif //CONFIG_XMIT_ACK ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ ++ DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); ++ ptxdesc->datarate = pattrib->rate; ++ } ++ else ++#endif ++ { ++ ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); ++ } ++ } ++ else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) ++ { ++ RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: TXAGG_FRAMETAG\n", __FUNCTION__)); ++ } ++#ifdef CONFIG_MP_INCLUDED ++ else if (pxmitframe->frame_tag == MP_FRAMETAG) ++ { ++ struct tx_desc *pdesc; ++ ++ pdesc = (struct tx_desc*)ptxdesc; ++ RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MP_FRAMETAG\n", __FUNCTION__)); ++ fill_txdesc_for_mp(padapter, (u8 *)pdesc); ++ ++ pdesc->txdw0 = le32_to_cpu(pdesc->txdw0); ++ pdesc->txdw1 = le32_to_cpu(pdesc->txdw1); ++ pdesc->txdw2 = le32_to_cpu(pdesc->txdw2); ++ pdesc->txdw3 = le32_to_cpu(pdesc->txdw3); ++ pdesc->txdw4 = le32_to_cpu(pdesc->txdw4); ++ pdesc->txdw5 = le32_to_cpu(pdesc->txdw5); ++ pdesc->txdw6 = le32_to_cpu(pdesc->txdw6); ++ pdesc->txdw7 = le32_to_cpu(pdesc->txdw7); ++ } ++#endif // CONFIG_MP_INCLUDED ++ else ++ { ++ RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: frame_tag=0x%x\n", __FUNCTION__, pxmitframe->frame_tag)); ++ ++ ptxdesc->macid = 4; // CAM_ID(MAC_ID) ++ ptxdesc->rate_id = 6; // Rate ID ++ ptxdesc->seq = pattrib->seqnum; ++ ptxdesc->userate = 1; // driver uses rate ++ ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); ++ } ++ ++ ptxdesc->pktlen = pattrib->last_txcmdsz; ++ if (pxmitframe->frame_tag == DATA_FRAMETAG){ ++ #ifdef CONFIG_TX_EARLY_MODE ++ ptxdesc->offset = TXDESC_SIZE +EARLY_MODE_INFO_SIZE ; ++ ptxdesc->pkt_offset = 0x01; ++ #else ++ ptxdesc->offset = TXDESC_SIZE ; ++ ptxdesc->pkt_offset = 0; ++ #endif ++ } ++ else{ ++ ptxdesc->offset = TXDESC_SIZE ; ++ } ++ ++ if (bmcst) ptxdesc->bmc = 1; ++ ptxdesc->ls = 1; ++ ptxdesc->fs = 1; ++ ptxdesc->own = 1; ++ ++ // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. ++ // (1) The sequence number of each non-Qos frame / broadcast / multicast / ++ // mgnt frame should be controled by Hw because Fw will also send null data ++ // which we cannot control when Fw LPS enable. ++ // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. ++ // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. ++ // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. ++ // 2010.06.23. Added by tynli. ++ if (!pattrib->qos_en) ++ { ++ // Hw set sequence number ++ ptxdesc->hwseq_en = 1; // HWSEQ_EN ++ ptxdesc->hwseq_sel = 0; // HWSEQ_SEL ++ } ++ ++} ++ ++/* ++ * Description: ++ * ++ * Parameters: ++ * pxmitframe xmitframe ++ * pbuf where to fill tx desc ++ */ ++void rtl8188es_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf) ++{ ++ struct tx_desc *pdesc; ++ ++ ++ pdesc = (struct tx_desc*)pbuf; ++ _rtw_memset(pdesc, 0, sizeof(struct tx_desc)); ++ ++ rtl8188es_fill_default_txdesc(pxmitframe, pbuf); ++ ++ pdesc->txdw0 = cpu_to_le32(pdesc->txdw0); ++ pdesc->txdw1 = cpu_to_le32(pdesc->txdw1); ++ pdesc->txdw2 = cpu_to_le32(pdesc->txdw2); ++ pdesc->txdw3 = cpu_to_le32(pdesc->txdw3); ++ pdesc->txdw4 = cpu_to_le32(pdesc->txdw4); ++ pdesc->txdw5 = cpu_to_le32(pdesc->txdw5); ++ pdesc->txdw6 = cpu_to_le32(pdesc->txdw6); ++ pdesc->txdw7 = cpu_to_le32(pdesc->txdw7); ++ ++ rtl8188e_cal_txdesc_chksum(pdesc); ++} ++ ++static u8 rtw_sdio_wait_enough_TxOQT_space(PADAPTER padapter, u8 agg_num) ++{ ++ u32 n = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ while (pHalData->SdioTxOQTFreeSpace < agg_num) ++ { ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_871X("%s: bSurpriseRemoved or bDriverStopped (wait TxOQT)\n", __func__); ++ return _FALSE; ++ } ++ ++ HalQueryTxOQTBufferStatus8189ESdio(padapter); ++ ++ if ((++n % 60) == 0) { ++ if ((n % 300) == 0) { ++ DBG_871X("%s(%d): QOT free space(%d), agg_num: %d\n", ++ __func__, n, pHalData->SdioTxOQTFreeSpace, agg_num); ++ } ++ rtw_msleep_os(1); ++ //yield(); ++ } ++ } ++ ++ pHalData->SdioTxOQTFreeSpace -= agg_num; ++ ++ //if (n > 1) ++ // ++priv->pshare->nr_out_of_txoqt_space; ++ ++ return _TRUE; ++} ++ ++//todo: static ++s32 rtl8188es_dequeue_writeport(PADAPTER padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct xmit_buf *pxmitbuf; ++ u8 PageIdx = 0; ++ u32 deviceId; ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ u8 bUpdatePageNum = _FALSE; ++#else ++ u32 polling_num = 0; ++#endif ++ ++ if (rtw_xmit_ac_blocked(padapter) == _TRUE) ++ pxmitbuf = dequeue_pending_xmitbuf_under_survey(pxmitpriv); ++ else ++ pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); ++ ++ if (pxmitbuf == NULL) { ++ return _TRUE; ++ } ++ ++ deviceId = ffaddr2deviceId(pdvobjpriv, pxmitbuf->ff_hwaddr); ++ ++ // translate fifo addr to queue index ++ switch (deviceId) { ++ case WLAN_TX_HIQ_DEVICE_ID: ++ PageIdx = HI_QUEUE_IDX; ++ break; ++ ++ case WLAN_TX_MIQ_DEVICE_ID: ++ PageIdx = MID_QUEUE_IDX; ++ break; ++ ++ case WLAN_TX_LOQ_DEVICE_ID: ++ PageIdx = LOW_QUEUE_IDX; ++ break; ++ } ++ ++query_free_page: ++ /* check if hardware tx fifo page is enough */ ++ if (_FALSE == rtw_hal_sdio_query_tx_freepage(padapter, PageIdx, pxmitbuf->pg_num)) { ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ if (!bUpdatePageNum) { ++ // Total number of page is NOT available, so update current FIFO status ++ HalQueryTxBufferStatus8189ESdio(padapter); ++ bUpdatePageNum = _TRUE; ++ goto query_free_page; ++ } else { ++ bUpdatePageNum = _FALSE; ++ enqueue_pending_xmitbuf_to_head(pxmitpriv, pxmitbuf); ++ return _TRUE; ++ } ++#else //CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ polling_num++; ++ if ((polling_num % 60) == 0) {//or 80 ++ //DBG_871X("%s: FIFO starvation!(%d) len=%d agg=%d page=(R)%d(A)%d\n", ++ // __func__, n, pxmitbuf->len, pxmitbuf->agg_num, pframe->pg_num, freePage[PageIdx] + freePage[PUBLIC_QUEUE_IDX]); ++ rtw_msleep_os(1); ++ } ++ ++ // Total number of page is NOT available, so update current FIFO status ++ HalQueryTxBufferStatus8189ESdio(padapter); ++ goto query_free_page; ++#endif //CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ } ++ ++ if (RTW_CANNOT_RUN(padapter)) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ++ ("%s: bSurpriseRemoved(wirte port)\n", __FUNCTION__)); ++ goto free_xmitbuf; ++ } ++ ++ if (rtw_sdio_wait_enough_TxOQT_space(padapter, pxmitbuf->agg_num) == _FALSE) ++ { ++ goto free_xmitbuf; ++ } ++ ++ rtw_write_port(padapter, deviceId, pxmitbuf->len, (u8 *)pxmitbuf); ++ ++ rtw_hal_sdio_update_tx_freepage(padapter, PageIdx, pxmitbuf->pg_num); ++ ++free_xmitbuf: ++ //rtw_free_xmitframe(pxmitpriv, pframe); ++ //pxmitbuf->priv_data = NULL; ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++#endif ++ ++ return _FAIL; ++} ++ ++/* ++ * Description ++ * Transmit xmitbuf to hardware tx fifo ++ * ++ * Return ++ * _SUCCESS ok ++ * _FAIL something error ++ */ ++s32 rtl8188es_xmit_buf_handler(PADAPTER padapter) ++{ ++ struct xmit_priv *pxmitpriv; ++ u8 queue_empty, queue_pending; ++ s32 ret; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ ++ pxmitpriv = &padapter->xmitpriv; ++ ++ ret = _rtw_down_sema(&pxmitpriv->xmit_sema); ++ if (ret == _FAIL) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, ("down SdioXmitBufSema fail!\n")); ++ return _FAIL; ++ } ++ ++ if (RTW_CANNOT_RUN(padapter)) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_notice_ ++ , ("%s: bDriverStopped(%s) bSurpriseRemoved(%s)\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); ++ return _FAIL; ++ } ++ ++ queue_pending = check_pending_xmitbuf(pxmitpriv); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ queue_pending |= check_pending_xmitbuf(&padapter->pbuddy_adapter->xmitpriv); ++#endif ++ ++ if(queue_pending == _FALSE) ++ return _SUCCESS; ++ ++#ifdef CONFIG_LPS_LCLK ++ ret = rtw_register_tx_alive(padapter); ++ if (ret != _SUCCESS) return _SUCCESS; ++#endif ++ ++ do { ++ queue_empty = rtl8188es_dequeue_writeport(padapter); ++// dump secondary adapter xmitbuf ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ queue_empty &= rtl8188es_dequeue_writeport(padapter->pbuddy_adapter); ++#endif ++ ++ } while ( !queue_empty); ++ ++#ifdef CONFIG_LPS_LCLK ++ rtw_unregister_tx_alive(padapter); ++#endif ++ return _SUCCESS; ++} ++ ++#if 0 ++/* ++ * Description: ++ * Aggregation packets and send to hardware ++ * ++ * Return: ++ * 0 Success ++ * -1 Hardware resource(TX FIFO) not ready ++ * -2 Software resource(xmitbuf) not ready ++ */ ++#ifdef CONFIG_TX_EARLY_MODE ++#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 ++ #define EARLY_MODE_MAX_PKT_NUM 10 ++#else ++ #define EARLY_MODE_MAX_PKT_NUM 5 ++#endif ++ ++ ++struct EMInfo{ ++ u8 EMPktNum; ++ u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; ++}; ++ ++ ++void ++InsertEMContent_8188E( ++ struct EMInfo *pEMInfo, ++ IN pu1Byte VirtualAddress) ++{ ++ ++#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 ++ u1Byte index=0; ++ u4Byte dwtmp=0; ++#endif ++ ++ _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); ++ if(pEMInfo->EMPktNum==0) ++ return; ++ ++ #ifdef DBG_EMINFO ++ { ++ int i; ++ DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum); ++ for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){ ++ DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]); ++ } ++ ++ } ++ #endif ++ ++#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 ++ SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); ++ ++ if(pEMInfo->EMPktNum == 1){ ++ dwtmp = pEMInfo->EMPktLen[0]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[0]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[1]; ++ } ++ SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); ++ if(pEMInfo->EMPktNum <= 3){ ++ dwtmp = pEMInfo->EMPktLen[2]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[2]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[3]; ++ } ++ SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); ++ if(pEMInfo->EMPktNum <= 5){ ++ dwtmp = pEMInfo->EMPktLen[4]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[4]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[5]; ++ } ++ SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF); ++ SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4); ++ if(pEMInfo->EMPktNum <= 7){ ++ dwtmp = pEMInfo->EMPktLen[6]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[6]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[7]; ++ } ++ SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); ++ if(pEMInfo->EMPktNum <= 9){ ++ dwtmp = pEMInfo->EMPktLen[8]; ++ }else{ ++ dwtmp = pEMInfo->EMPktLen[8]; ++ dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; ++ dwtmp += pEMInfo->EMPktLen[9]; ++ } ++ SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); ++#else ++ SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); ++ SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); ++ SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); ++ SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF); ++ SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); ++ SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); ++ SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); ++#endif ++ //RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); ++ ++} ++ ++ ++ ++void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) ++{ ++ //_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq ++ int index,j; ++ u16 offset,pktlen; ++ PTXDESC_8188E ptxdesc; ++ ++ u8 *pmem,*pEMInfo_mem; ++ s8 node_num_0=0,node_num_1=0; ++ struct EMInfo eminfo; ++ struct agg_pkt_info *paggpkt; ++ struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data; ++ pmem= pframe->buf_addr; ++ ++ #ifdef DBG_EMINFO ++ DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num); ++ for(index=0;indexagg_num;index++){ ++ offset = pxmitpriv->agg_pkt[index].offset; ++ pktlen = pxmitpriv->agg_pkt[index].pkt_len; ++ DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset); ++ DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen); ++ } ++ #endif ++ ++ if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) ++ { ++ node_num_0 = pframe->agg_num; ++ node_num_1= EARLY_MODE_MAX_PKT_NUM-1; ++ } ++ ++ for(index=0;indexagg_num;index++){ ++ offset = pxmitpriv->agg_pkt[index].offset; ++ pktlen = pxmitpriv->agg_pkt[index].pkt_len; ++ ++ _rtw_memset(&eminfo,0,sizeof(struct EMInfo)); ++ if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){ ++ if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){ ++ eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; ++ node_num_0--; ++ } ++ else{ ++ eminfo.EMPktNum = node_num_1; ++ node_num_1--; ++ } ++ } ++ else{ ++ eminfo.EMPktNum = pframe->agg_num-(index+1); ++ } ++ for(j=0;j< eminfo.EMPktNum ;j++){ ++ eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;//CRC ++ } ++ ++ if(pmem){ ++ ptxdesc = (PTXDESC_8188E)(pmem+offset); ++ pEMInfo_mem = pmem+offset+TXDESC_SIZE; ++ #ifdef DBG_EMINFO ++ DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen); ++ #endif ++ InsertEMContent_8188E(&eminfo,pEMInfo_mem); ++ } ++ ++ ++ } ++ _rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM); ++ ++} ++#endif ++ ++#endif ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) ++{ ++ s32 ret; ++ _irqL irqL; ++ struct xmit_buf *pxmitbuf; ++ struct hw_xmit *phwxmit = pxmitpriv->hwxmits; ++ struct tx_servq *ptxservq = NULL; ++ _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; ++ struct xmit_frame *pxmitframe = NULL, *pfirstframe = NULL; ++ u32 pbuf = 0; // next pkt address ++ u32 pbuf_tail = 0; // last pkt tail ++ u32 txlen = 0; //packet length, except TXDESC_SIZE and PKT_OFFSET ++ u32 total_len = 0, max_xmit_len = 0; ++ u8 ac_index = 0; ++ u8 bfirst = _TRUE;//first aggregation xmitframe ++ u8 bulkstart = _FALSE; ++#ifdef CONFIG_TX_EARLY_MODE ++ u8 pkt_index=0; ++#endif ++ ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if (pxmitbuf == NULL) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: xmit_buf is not enough!\n", __FUNCTION__)); ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type > PRIMARY_ADAPTER) ++ _rtw_up_sema(&(padapter->pbuddy_adapter->xmitpriv.xmit_sema)); ++ else ++ #endif ++ _rtw_up_sema(&(pxmitpriv->xmit_sema)); ++#endif ++ return _FALSE; ++ } ++ ++ do { ++ //3 1. pick up first frame ++ if(bfirst) ++ { ++ pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); ++ if (pxmitframe == NULL) { ++ // no more xmit frame, release xmit buffer ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ return _FALSE; ++ } ++ ++ pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->pbuf; ++ pxmitbuf->priv_data = pxmitframe; ++ pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); ++ ++ pfirstframe = pxmitframe; ++ ++ max_xmit_len = rtw_hal_get_sdio_tx_max_length(padapter, pxmitbuf->ff_hwaddr); ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ptxservq = rtw_get_sta_pending(padapter, pfirstframe->attrib.psta, pfirstframe->attrib.priority, (u8 *)(&ac_index)); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ } ++ //3 2. aggregate same priority and same DA(AP or STA) frames ++ else ++ { ++ // dequeue same priority packet from station tx queue ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if (_rtw_queue_empty(&ptxservq->sta_pending) == _FALSE) ++ { ++ xmitframe_phead = get_list_head(&ptxservq->sta_pending); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ if(_FAIL == rtw_hal_busagg_qsel_check(padapter,pfirstframe->attrib.qsel,pxmitframe->attrib.qsel)){ ++ bulkstart = _TRUE; ++ } ++ else{ ++ // check xmit_buf size enough or not ++ txlen = TXDESC_SIZE + ++ #ifdef CONFIG_TX_EARLY_MODE ++ EARLY_MODE_INFO_SIZE + ++ #endif ++ rtw_wlan_pkt_size(pxmitframe); ++ ++ if ((pbuf + txlen) > max_xmit_len) ++ { ++ bulkstart = _TRUE; ++ } ++ else ++ { ++ rtw_list_delete(&pxmitframe->list); ++ ptxservq->qcnt--; ++ phwxmit[ac_index].accnt--; ++ ++ //Remove sta node when there is no pending packets. ++ if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) ++ rtw_list_delete(&ptxservq->tx_pending); ++ } ++ } ++ } ++ else ++ { ++ bulkstart = _TRUE; ++ } ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if(bulkstart) ++ { ++ break; ++ } ++ ++ pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; ++ ++ pxmitframe->agg_num = 0; // not first frame of aggregation ++ } ++ ++ ret = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ if (ret == _FAIL) { ++ DBG_871X("%s: coalesce FAIL!", __FUNCTION__); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ continue; ++ } ++ ++ // always return ndis_packet after rtw_xmitframe_coalesce ++ //rtw_os_xmit_complete(padapter, pxmitframe); ++ ++#ifdef CONFIG_TX_EARLY_MODE ++ pxmitpriv->agg_pkt[pkt_index].pkt_len = pxmitframe->attrib.last_txcmdsz; //get from rtw_xmitframe_coalesce ++ pxmitpriv->agg_pkt[pkt_index].offset = _RND8(pxmitframe->attrib.last_txcmdsz+ TXDESC_SIZE+EARLY_MODE_INFO_SIZE); ++ pkt_index++; ++#endif ++ ++ if(bfirst) ++ { ++ txlen = TXDESC_SIZE + ++ #ifdef CONFIG_TX_EARLY_MODE ++ EARLY_MODE_INFO_SIZE + ++ #endif ++ pxmitframe->attrib.last_txcmdsz; ++ ++ total_len = txlen; ++ ++ pxmitframe->pg_num = (txlen + 127)/128; ++ pxmitbuf->pg_num = (txlen + 127)/128; ++ pbuf_tail = txlen; ++ pbuf = _RND8(pbuf_tail); ++ bfirst = _FALSE; ++ } ++ else ++ { ++ rtl8188es_update_txdesc(pxmitframe, pxmitframe->buf_addr); ++ ++ // don't need xmitframe any more ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ pxmitframe->pg_num = (txlen + 127)/128; ++ //pfirstframe->pg_num += pxmitframe->pg_num; ++ pxmitbuf->pg_num += (txlen + 127)/128; ++ ++ total_len += txlen; ++ ++ // handle pointer and stop condition ++ pbuf_tail = pbuf + txlen; ++ pbuf = _RND8(pbuf_tail); ++ ++ pfirstframe->agg_num++; ++ if(pfirstframe->agg_num >= (rtw_hal_sdio_max_txoqt_free_space(padapter)-1)) ++ break; ++ ++ } ++ }while(1); ++ ++ //3 3. update first frame txdesc ++ rtl8188es_update_txdesc(pfirstframe, pfirstframe->buf_addr); ++#ifdef CONFIG_TX_EARLY_MODE ++ UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf ); ++#endif ++ ++ // ++ pxmitbuf->agg_num = pfirstframe->agg_num; ++ pxmitbuf->priv_data = NULL; ++ ++ //3 4. write xmit buffer to USB FIFO ++ pxmitbuf->len = pbuf_tail; ++ enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); ++ ++ //3 5. update statisitc ++ rtw_count_tx_stats(padapter, pfirstframe, total_len); ++ ++ rtw_free_xmitframe(pxmitpriv, pfirstframe); ++ ++ //rtw_yield_os(); ++ ++ return _TRUE; ++} ++ ++void rtl8188es_xmit_tasklet(void *priv) ++{ ++ int ret = _FALSE; ++ _adapter *padapter = (_adapter*)priv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ while(1) ++ { ++ if (RTW_CANNOT_TX(padapter)) ++ { ++ DBG_871X("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); ++ break; ++ } ++ ++ ret = xmit_xmitframes(padapter, pxmitpriv); ++ if(ret==_FALSE) ++ break; ++ ++ } ++} ++#else ++static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) ++{ ++ s32 err, agg_num = 0; ++ u8 pkt_index=0; ++ struct hw_xmit *hwxmits, *phwxmit; ++ u8 idx, hwentry; ++ _irqL irql; ++ struct tx_servq *ptxservq; ++ _list *sta_plist, *sta_phead, *frame_plist, *frame_phead; ++ struct xmit_frame *pxmitframe; ++ _queue *pframe_queue; ++ struct xmit_buf *pxmitbuf; ++ u32 txlen, max_xmit_len; ++ s32 ret; ++ int inx[4]; ++ u8 pre_qsel=0xFF,next_qsel=0xFF; ++ u8 single_sta_in_queue = _FALSE; ++ ++ err = 0; ++ hwxmits = pxmitpriv->hwxmits; ++ hwentry = pxmitpriv->hwxmit_entry; ++ ptxservq = NULL; ++ pxmitframe = NULL; ++ pframe_queue = NULL; ++ pxmitbuf = NULL; ++ ++ if (padapter->registrypriv.wifi_spec == 1) { ++ for(idx=0; idx<4; idx++) ++ inx[idx] = pxmitpriv->wmm_para_seq[idx]; ++ } else { ++ inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; ++ } ++ ++ // 0(VO), 1(VI), 2(BE), 3(BK) ++ for (idx = 0; idx < hwentry; idx++) ++ { ++ phwxmit = hwxmits + inx[idx]; ++ ++ if((check_pending_xmitbuf(pxmitpriv) == _TRUE) && (padapter->mlmepriv.LinkDetectInfo.bHigherBusyTxTraffic == _TRUE)) { ++ if ((phwxmit->accnt > 0) && (phwxmit->accnt < 5)) { ++ err = -2; ++ break; ++ } ++ } ++ ++ max_xmit_len = rtw_hal_get_sdio_tx_max_length(padapter, inx[idx]); ++ ++// _enter_critical(&hwxmits->sta_queue->lock, &irqL0); ++ _enter_critical_bh(&pxmitpriv->lock, &irql); ++ ++ sta_phead = get_list_head(phwxmit->sta_queue); ++ sta_plist = get_next(sta_phead); ++ ++ single_sta_in_queue = rtw_end_of_queue_search(sta_phead, get_next(sta_plist)); ++ ++ while (rtw_end_of_queue_search(sta_phead, sta_plist) == _FALSE) ++ { ++ ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); ++ ++ sta_plist = get_next(sta_plist); ++ ++ pframe_queue = &ptxservq->sta_pending; ++ ++// _enter_critical(&pframe_queue->lock, &irqL1); ++ //_enter_critical_bh(&pxmitpriv->lock, &irql); ++ ++ frame_phead = get_list_head(pframe_queue); ++ ++ while (rtw_is_list_empty(frame_phead) == _FALSE) ++ { ++ frame_plist = get_next(frame_phead); ++ pxmitframe = LIST_CONTAINOR(frame_plist, struct xmit_frame, list); ++ ++ // check xmit_buf size enough or not ++ #ifdef CONFIG_TX_EARLY_MODE ++ txlen = TXDESC_SIZE +EARLY_MODE_INFO_SIZE+ rtw_wlan_pkt_size(pxmitframe); ++ #else ++ txlen = TXDESC_SIZE + rtw_wlan_pkt_size(pxmitframe); ++ #endif ++ ++ next_qsel = pxmitframe->attrib.qsel; ++ ++ if ((NULL == pxmitbuf) || ++ ((_RND(pxmitbuf->len, 8) + txlen) > max_xmit_len) ++ || (agg_num>= (rtw_hal_sdio_max_txoqt_free_space(padapter)-1)) ++ || ((agg_num!=0) && (_FAIL == rtw_hal_busagg_qsel_check(padapter,pre_qsel,next_qsel))) ++ ) ++ { ++ if (pxmitbuf) { ++ //pxmitbuf->priv_data will be NULL, and will crash here ++ if (pxmitbuf->len > 0 && pxmitbuf->priv_data) ++ { ++ struct xmit_frame *pframe; ++ pframe = (struct xmit_frame*)pxmitbuf->priv_data; ++ pframe->agg_num = agg_num; ++ pxmitbuf->agg_num = agg_num; ++ //DBG_8192C("==> agg_num:%d\n",agg_num); ++ rtl8188es_update_txdesc(pframe, pframe->buf_addr); ++ #ifdef CONFIG_TX_EARLY_MODE ++ UpdateEarlyModeInfo8188E(pxmitpriv, pxmitbuf); ++ #endif ++ rtw_free_xmitframe(pxmitpriv, pframe); ++ pxmitbuf->priv_data = NULL; ++ enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); ++ ++ //rtw_yield_os(); ++ if (single_sta_in_queue == _FALSE) { ++ /* break the loop in case there is more than one sta in this ac queue */ ++ pxmitbuf = NULL; ++ err = -3; ++ break; ++ } ++ ++ } else { ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ } ++ } ++ ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if (pxmitbuf == NULL) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: xmit_buf is not enough!\n", __FUNCTION__)); ++ err = -2; ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type > PRIMARY_ADAPTER) ++ _rtw_up_sema(&(padapter->pbuddy_adapter->xmitpriv.xmit_sema)); ++ else ++ #endif ++ _rtw_up_sema(&(pxmitpriv->xmit_sema)); ++#endif ++ break; ++ } ++ agg_num = 0; ++ pkt_index =0; ++ } ++ ++ // ok to send, remove frame from queue ++ rtw_list_delete(&pxmitframe->list); ++ ptxservq->qcnt--; ++ phwxmit->accnt--; ++ ++ if (agg_num == 0) { ++ pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); ++ pxmitbuf->priv_data = (u8*)pxmitframe; ++ } ++ ++ // coalesce the xmitframe to xmitbuf ++ pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->ptail; ++ ++ ret = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ if (ret == _FAIL) { ++ DBG_871X("%s: coalesce FAIL!", __FUNCTION__); ++ // Todo: error handler ++ //rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ } else { ++ agg_num++; ++ if (agg_num != 1) ++ rtl8188es_update_txdesc(pxmitframe, pxmitframe->buf_addr); ++ pre_qsel = pxmitframe->attrib.qsel; ++ rtw_count_tx_stats(padapter, pxmitframe, pxmitframe->attrib.last_txcmdsz); ++ #ifdef CONFIG_TX_EARLY_MODE ++ txlen = TXDESC_SIZE+ EARLY_MODE_INFO_SIZE+ pxmitframe->attrib.last_txcmdsz; ++ #else ++ txlen = TXDESC_SIZE + pxmitframe->attrib.last_txcmdsz; ++ #endif ++ pxmitframe->pg_num = (txlen + 127)/128; ++ pxmitbuf->pg_num += (txlen + 127)/128; ++ //if (agg_num != 1) ++ //((struct xmit_frame*)pxmitbuf->priv_data)->pg_num += pxmitframe->pg_num; ++ ++ #ifdef CONFIG_TX_EARLY_MODE ++ pxmitpriv->agg_pkt[pkt_index].pkt_len = pxmitframe->attrib.last_txcmdsz; //get from rtw_xmitframe_coalesce ++ pxmitpriv->agg_pkt[pkt_index].offset = _RND8(pxmitframe->attrib.last_txcmdsz+ TXDESC_SIZE+EARLY_MODE_INFO_SIZE); ++ #endif ++ ++ pkt_index++; ++ pxmitbuf->ptail += _RND(txlen, 8); // round to 8 bytes alignment ++ pxmitbuf->len = _RND(pxmitbuf->len, 8) + txlen; ++ } ++ ++ if (agg_num != 1) ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ pxmitframe = NULL; ++ } ++ ++ if (_rtw_queue_empty(pframe_queue) == _TRUE) ++ rtw_list_delete(&ptxservq->tx_pending); ++ else if (err == -3) { ++ /* Re-arrange the order of stations in this ac queue to balance the service for these stations */ ++ rtw_list_delete(&ptxservq->tx_pending); ++ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmit->sta_queue)); ++ } ++ ++ if (err) break; ++ } ++ _exit_critical_bh(&pxmitpriv->lock, &irql); ++ ++ // dump xmit_buf to hw tx fifo ++ if (pxmitbuf) ++ { ++ RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("pxmitbuf->len=%d enqueue\n",pxmitbuf->len)); ++ ++ if (pxmitbuf->len > 0) { ++ struct xmit_frame *pframe; ++ pframe = (struct xmit_frame*)pxmitbuf->priv_data; ++ pframe->agg_num = agg_num; ++ pxmitbuf->agg_num = agg_num; ++ rtl8188es_update_txdesc(pframe, pframe->buf_addr); ++ #ifdef CONFIG_TX_EARLY_MODE ++ UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf ); ++ #endif ++ rtw_free_xmitframe(pxmitpriv, pframe); ++ pxmitbuf->priv_data = NULL; ++ enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); ++ rtw_yield_os(); ++ } ++ else ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ ++ pxmitbuf = NULL; ++ } ++ ++ if (err == -2) ++ break; ++ } ++ ++ return err; ++ ++} ++ ++/* ++ * Description ++ * Transmit xmitframe from queue ++ * ++ * Return ++ * _SUCCESS ok ++ * _FAIL something error ++ */ ++s32 rtl8188es_xmit_handler(PADAPTER padapter) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv ; ++ s32 ret; ++ _irqL irql; ++ ++wait: ++ ret = _rtw_down_sema(&pxmitpriv->SdioXmitSema); ++ if (_FAIL == ret) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, ("%s: down sema fail!\n", __FUNCTION__)); ++ return _FAIL; ++ } ++ ++next: ++ ++ if (RTW_CANNOT_RUN(padapter)) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_notice_ ++ , ("%s: bDriverStopped(%s) bSurpriseRemoved(%s)\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); ++ return _FAIL; ++ } ++ _enter_critical_bh(&pxmitpriv->lock, &irql); ++ ret = rtw_txframes_pending(padapter); ++ _exit_critical_bh(&pxmitpriv->lock, &irql); ++ if (ret == 0) { ++ return _SUCCESS; ++ } ++ // dequeue frame and write to hardware ++ ++ ret = xmit_xmitframes(padapter, pxmitpriv); ++ if (ret == -2) { ++#ifdef CONFIG_REDUCE_TX_CPU_LOADING ++ rtw_msleep_os(1); ++#else ++ rtw_yield_os(); ++#endif ++ goto next; ++ } ++ _enter_critical_bh(&pxmitpriv->lock, &irql); ++ ret = rtw_txframes_pending(padapter); ++ _exit_critical_bh(&pxmitpriv->lock, &irql); ++ if (ret == 1) { ++#ifdef CONFIG_REDUCE_TX_CPU_LOADING ++ rtw_msleep_os(1); ++#endif ++ goto next; ++ } ++ ++ return _SUCCESS; ++} ++ ++thread_return rtl8188es_xmit_thread(thread_context context) ++{ ++ s32 ret; ++ PADAPTER padapter= (PADAPTER)context; ++ struct xmit_priv *pxmitpriv= &padapter->xmitpriv; ++ ++ ret = _SUCCESS; ++ ++ thread_enter("RTWHALXT"); ++ ++ DBG_871X("start %s\n", __FUNCTION__); ++ ++ do { ++ ret = rtl8188es_xmit_handler(padapter); ++ if (signal_pending(current)) { ++ flush_signals(current); ++ } ++ } while (_SUCCESS == ret); ++ ++ _rtw_up_sema(&pxmitpriv->SdioXmitTerminateSema); ++ ++ RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("-%s\n", __FUNCTION__)); ++ DBG_871X("exit %s\n", __FUNCTION__); ++ ++ thread_exit(); ++} ++#endif ++ ++#ifdef CONFIG_IOL_IOREG_CFG_DBG ++#include ++#endif ++s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe) ++{ ++ s32 ret = _SUCCESS; ++ struct pkt_attrib *pattrib; ++ struct xmit_buf *pxmitbuf; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ u8 *pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ u8 pattrib_subtype; ++ ++ RT_TRACE(_module_hal_xmit_c_, _drv_info_, ("+%s\n", __FUNCTION__)); ++ ++ pattrib = &pmgntframe->attrib; ++ pxmitbuf = pmgntframe->pxmitbuf; ++ ++ rtl8188es_update_txdesc(pmgntframe, pmgntframe->buf_addr); ++ ++ pxmitbuf->len = TXDESC_SIZE + pattrib->last_txcmdsz; ++ //pmgntframe->pg_num = (pxmitbuf->len + 127)/128; // 128 is tx page size ++ pxmitbuf->pg_num = (pxmitbuf->len + 127)/128; // 128 is tx page size ++ pxmitbuf->ptail = pmgntframe->buf_addr + pxmitbuf->len; ++ pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pmgntframe); ++ ++ rtw_count_tx_stats(padapter, pmgntframe, pattrib->last_txcmdsz); ++ pattrib_subtype = pattrib->subtype; ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ ++ pxmitbuf->priv_data = NULL; ++ ++ if((pattrib_subtype == WIFI_BEACON) || (GetFrameSubType(pframe)==WIFI_BEACON)) //dump beacon directly ++ { ++#ifdef CONFIG_IOL_IOREG_CFG_DBG ++ rtw_IOL_cmd_buf_dump(padapter,pxmitbuf->len,pxmitbuf->pdata); ++#endif ++ ++ ret = rtw_write_port(padapter, ffaddr2deviceId(pdvobjpriv, pxmitbuf->ff_hwaddr), pxmitbuf->len, (u8 *)pxmitbuf); ++ if (ret != _SUCCESS) ++ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR); ++ ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ } ++ else ++ { ++ enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); ++ } ++ ++ return ret; ++} ++ ++/* ++ * Description: ++ * Handle xmitframe(packet) come from rtw_xmit() ++ * ++ * Return: ++ * _TRUE dump packet directly ok ++ * _FALSE enqueue, temporary can't transmit packets to hardware ++ */ ++s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irql; ++ s32 err; ++ ++ //pxmitframe->attrib.qsel = pxmitframe->attrib.priority; ++ ++#ifdef CONFIG_80211N_HT ++ if ((pxmitframe->frame_tag == DATA_FRAMETAG) && ++ (pxmitframe->attrib.ether_type != 0x0806) && ++ (pxmitframe->attrib.ether_type != 0x888e) && ++ (pxmitframe->attrib.dhcp_pkt != 1)) ++ { ++ if (padapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) ++ rtw_issue_addbareq_cmd(padapter, pxmitframe); ++ } ++#endif ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irql); ++ err = rtw_xmitframe_enqueue(padapter, pxmitframe); ++ _exit_critical_bh(&pxmitpriv->lock, &irql); ++ if (err != _SUCCESS) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: enqueue xmitframe fail\n",__FUNCTION__)); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ pxmitpriv->tx_drop++; ++ return _TRUE; ++ } ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++#else ++ _rtw_up_sema(&pxmitpriv->SdioXmitSema); ++#endif ++ ++ return _FALSE; ++} ++ ++s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ s32 err; ++ ++ if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) ++ { ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ pxmitpriv->tx_drop++; ++ } ++ else ++ { ++#ifdef CONFIG_SDIO_TX_TASKLET ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++#else ++ _rtw_up_sema(&pxmitpriv->SdioXmitSema); ++#endif ++ } ++ ++ return err; ++ ++} ++ ++ ++/* ++ * Return ++ * _SUCCESS start thread ok ++ * _FAIL start thread fail ++ * ++ */ ++s32 rtl8188es_init_xmit_priv(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++#ifdef PLATFORM_LINUX ++ tasklet_init(&pxmitpriv->xmit_tasklet, ++ (void(*)(unsigned long))rtl8188es_xmit_tasklet, ++ (unsigned long)padapter); ++#endif ++#else //CONFIG_SDIO_TX_TASKLET ++ ++ _rtw_init_sema(&pxmitpriv->SdioXmitSema, 0); ++ _rtw_init_sema(&pxmitpriv->SdioXmitTerminateSema, 0); ++#endif //CONFIG_SDIO_TX_TASKLET ++ ++ _rtw_spinlock_init(&pHalData->SdioTxFIFOFreePageLock); ++ ++#ifdef CONFIG_TX_EARLY_MODE ++ pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode; ++#endif ++ ++ return _SUCCESS; ++} ++ ++void rtl8188es_free_xmit_priv(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ _rtw_spinlock_free(&pHalData->SdioTxFIFOFreePageLock); ++} ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/sdio_halinit.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/sdio_halinit.c +new file mode 100644 +index 0000000..6bcb98c +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/sdio_halinit.c +@@ -0,0 +1,2272 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _SDIO_HALINIT_C_ ++ ++#include ++#include ++#include "hal_com_h2c.h" ++#ifndef CONFIG_SDIO_HCI ++#error "CONFIG_SDIO_HCI shall be on!\n" ++#endif ++ ++/* ++ * Description: ++ * Call this function to make sure power on successfully ++ * ++ * Return: ++ * _SUCCESS enable success ++ * _FAIL enable fail ++ */ ++ ++static int PowerOnCheck(PADAPTER padapter) ++{ ++ u32 val_offset0, val_offset1, val_offset2, val_offset3; ++ u32 val_mix = 0; ++ u32 res = 0; ++ u8 ret = _FAIL; ++ int index = 0; ++ ++ val_offset0 = rtw_read8(padapter, REG_CR); ++ val_offset1 = rtw_read8(padapter, REG_CR+1); ++ val_offset2 = rtw_read8(padapter, REG_CR+2); ++ val_offset3 = rtw_read8(padapter, REG_CR+3); ++ ++ if (val_offset0 == 0xEA || val_offset1 == 0xEA || ++ val_offset2 == 0xEA || val_offset3 ==0xEA) { ++ DBG_871X("%s: power on fail, do Power on again\n", __func__); ++ return ret; ++ } ++ ++ val_mix = val_offset3 << 24 | val_mix; ++ val_mix = val_offset2 << 16 | val_mix; ++ val_mix = val_offset1 << 8 | val_mix; ++ val_mix = val_offset0 | val_mix; ++ ++ res = rtw_read32(padapter, REG_CR); ++ ++ DBG_871X("%s: val_mix:0x%08x, res:0x%08x\n", __func__, val_mix, res); ++ ++ while(index < 100) { ++ if (res == val_mix) { ++ DBG_871X("%s: 0x100 the result of cmd52 and cmd53 is the same.\n", __func__); ++ ret = _SUCCESS; ++ break; ++ } else { ++ DBG_871X("%s: 0x100 cmd52 and cmd53 is not the same(index:%d).\n", __func__, index); ++ res = rtw_read32(padapter, REG_CR); ++ index ++; ++ ret = _FAIL; ++ } ++ } ++ ++ if (ret) { ++ index = 0; ++ while(index < 100) { ++ rtw_write32(padapter, 0x1B8, 0x12345678); ++ res = rtw_read32(padapter, 0x1B8); ++ if (res == 0x12345678) { ++ DBG_871X("%s: 0x1B8 test Pass.\n", __func__); ++ ret = _SUCCESS; ++ break; ++ } else { ++ index ++; ++ DBG_871X("%s: 0x1B8 test Fail(index: %d).\n", __func__, index); ++ ret = _FAIL; ++ } ++ } ++ } else { ++ DBG_871X("%s: fail at cmd52, cmd53.\n", __func__); ++ } ++ ++ if (ret == _FAIL) { ++ DBG_871X_LEVEL(_drv_err_, "Dump MAC Page0 register:\n"); ++ /* Dump Page0 for check cystal*/ ++ for (index = 0 ; index < 0xff ; index++) { ++ if(index%16==0) ++ printk("0x%02x ",index); ++ ++ printk("%02x ", rtw_read8(padapter, index)); ++ ++ if(index%16==15) ++ printk("\n"); ++ else if(index%8==7) ++ printk("\t"); ++ } ++ printk("\n"); ++ } ++ ++ return ret; ++} ++ ++#ifdef CONFIG_EXT_CLK ++void EnableGpio5ClockReq(PADAPTER Adapter, u8 in_interrupt, u32 Enable) ++{ ++ u32 value32; ++ HAL_DATA_TYPE *pHalData; ++ ++ pHalData = GET_HAL_DATA(Adapter); ++ if(IS_D_CUT(pHalData->VersionID)) ++ return; ++ ++ //dbgdump("%s Enable:%x time:%d", __RTL_FUNC__, Enable, rtw_get_current_time()); ++ ++ if(in_interrupt) ++ value32 = _sdio_read32(Adapter, REG_GPIO_PIN_CTRL); ++ else ++ value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL); ++ ++ //open GPIO 5 ++ if (Enable) ++ value32 |= BIT(13);//5+8 ++ else ++ value32 &= ~BIT(13); ++ ++ //GPIO 5 out put ++ value32 |= BIT(21);//5+16 ++ ++ //if (Enable) ++ // rtw_write8(Adapter, REG_GPIO_PIN_CTRL + 1, 0x20); ++ //else ++ // rtw_write8(Adapter, REG_GPIO_PIN_CTRL + 1, 0x00); ++ ++ if(in_interrupt) ++ _sdio_write32(Adapter, REG_GPIO_PIN_CTRL, value32); ++ else ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32); ++ ++} //end of EnableGpio5ClockReq() ++ ++void _InitClockTo26MHz( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 u1temp = 0; ++ HAL_DATA_TYPE *pHalData; ++ ++ pHalData = GET_HAL_DATA(Adapter); ++ ++ if(IS_D_CUT(pHalData->VersionID)) { ++ //FW special init ++ u1temp = rtw_read8(Adapter, REG_XCK_OUT_CTRL); ++ u1temp |= 0x18; ++ rtw_write8(Adapter, REG_XCK_OUT_CTRL, u1temp); ++ MSG_8192C("D cut version\n"); ++ } ++ ++ EnableGpio5ClockReq(Adapter, _FALSE, 1); ++ ++ //0x2c[3:0] = 5 will set clock to 26MHz ++ u1temp = rtw_read8(Adapter, REG_APE_PLL_CTRL_EXT); ++ u1temp = (u1temp & 0xF0) | 0x05; ++ rtw_write8(Adapter, REG_APE_PLL_CTRL_EXT, u1temp); ++} ++#endif ++ ++ ++static void rtl8188es_interface_configure(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; ++ ++ ++ pdvobjpriv->RtOutPipe[0] = WLAN_TX_HIQ_DEVICE_ID; ++ pdvobjpriv->RtOutPipe[1] = WLAN_TX_MIQ_DEVICE_ID; ++ pdvobjpriv->RtOutPipe[2] = WLAN_TX_LOQ_DEVICE_ID; ++ ++ if (bWiFiConfig) ++ pHalData->OutEpNumber = 2; ++ else ++ pHalData->OutEpNumber = SDIO_MAX_TX_QUEUE; ++ ++ switch(pHalData->OutEpNumber){ ++ case 3: ++ pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ; ++ break; ++ case 2: ++ pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ; ++ break; ++ case 1: ++ pHalData->OutEpQueueSel=TX_SELE_HQ; ++ break; ++ default: ++ break; ++ } ++ ++ Hal_MappingOutPipe(padapter, pHalData->OutEpNumber); ++} ++ ++/* ++ * Description: ++ * Call power on sequence to enable card ++ * ++ * Return: ++ * _SUCCESS enable success ++ * _FAIL enable fail ++ */ ++static u8 _CardEnable(PADAPTER padapter) ++{ ++ u8 bMacPwrCtrlOn; ++ u8 ret; ++ ++ DBG_871X("=>%s\n", __FUNCTION__); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if (bMacPwrCtrlOn == _FALSE) ++ { ++#ifdef CONFIG_PLATFORM_SPRD ++ u8 val8; ++#endif // CONFIG_PLATFORM_SPRD ++ ++ // RSV_CTRL 0x1C[7:0] = 0x00 ++ // unlock ISO/CLK/Power control register ++ rtw_write8(padapter, REG_RSV_CTRL, 0x0); ++ ++#ifdef CONFIG_EXT_CLK ++ _InitClockTo26MHz(padapter); ++#endif //CONFIG_EXT_CLK ++ ++#ifdef CONFIG_PLATFORM_SPRD ++ val8 = rtw_read8(padapter, 0x4); ++ val8 = val8 & ~BIT(5); ++ rtw_write8(padapter, 0x4, val8); ++#endif // CONFIG_PLATFORM_SPRD ++ ++ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_ENABLE_FLOW); ++ if (ret == _SUCCESS) { ++ u8 bMacPwrCtrlOn = _TRUE; ++ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ } ++ else ++ { ++ DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); ++ return _FAIL; ++ } ++ ++ } ++ else ++ { ++ ++ DBG_871X("=>%s bMacPwrCtrlOn == _TRUE do nothing !!\n", __FUNCTION__); ++ ret = _SUCCESS; ++ } ++ ++ DBG_871X("<=%s\n", __FUNCTION__); ++ ++ return ret; ++ ++} ++ ++static u32 _InitPowerOn_8188ES(PADAPTER padapter) ++{ ++ u8 value8; ++ u16 value16; ++ u32 value32; ++ u8 ret; ++ ++ DBG_871X("=>%s\n", __FUNCTION__); ++ ++ ret = _CardEnable(padapter); ++ if (ret == _FAIL) { ++ return ret; ++ } ++ ++/* ++ // Radio-Off Pin Trigger ++ value8 = rtw_read8(padapter, REG_GPIO_INTM+1); ++ value8 |= BIT(1); // Enable falling edge triggering interrupt ++ rtw_write8(padapter, REG_GPIO_INTM+1, value8); ++ value8 = rtw_read8(padapter, REG_GPIO_IO_SEL_2+1); ++ value8 |= BIT(1); ++ rtw_write8(padapter, REG_GPIO_IO_SEL_2+1, value8); ++*/ ++ ++ // Enable power down and GPIO interrupt ++ value16 = rtw_read16(padapter, REG_APS_FSMCO); ++ value16 |= EnPDN; // Enable HW power down and RF on ++ rtw_write16(padapter, REG_APS_FSMCO, value16); ++ ++ ++ // Enable MAC DMA/WMAC/SCHEDULE/SEC block ++ value16 = rtw_read16(padapter, REG_CR); ++ value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN ++ | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); ++ // for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. ++ ++ rtw_write16(padapter, REG_CR, value16); ++ ++ // Enable CMD53 R/W Operation ++// bMacPwrCtrlOn = TRUE; ++// rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, (pu8)(&bMacPwrCtrlOn)); ++ ++ DBG_871X("<=%s\n", __FUNCTION__); ++ ++ return _SUCCESS; ++ ++} ++ ++static void hal_poweroff_8188es(PADAPTER padapter) ++{ ++ u8 u1bTmp; ++ u16 u2bTmp; ++ u32 u4bTmp; ++ u8 bMacPwrCtrlOn = _FALSE; ++ u8 ret; ++ ++#ifdef CONFIG_PLATFORM_SPRD ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++#endif //CONFIG_PLATFORM_SPRD ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if(bMacPwrCtrlOn == _FALSE) ++ { ++ DBG_871X("=>%s bMacPwrCtrlOn == _FALSE return !!\n", __FUNCTION__); ++ return; ++ } ++ DBG_871X("=>%s\n", __FUNCTION__); ++ ++ ++ //Stop Tx Report Timer. 0x4EC[Bit1]=b'0 ++ u1bTmp = rtw_read8(padapter, REG_TX_RPT_CTRL); ++ rtw_write8(padapter, REG_TX_RPT_CTRL, u1bTmp&(~BIT1)); ++ ++ // stop rx ++ rtw_write8(padapter,REG_CR, 0x0); ++ ++ ++#ifdef CONFIG_EXT_CLK //for sprd For Power Consumption. ++ EnableGpio5ClockReq(padapter, _FALSE, 0); ++#endif //CONFIG_EXT_CLK ++ ++#if 1 ++ // For Power Consumption. ++ u1bTmp = rtw_read8(padapter, GPIO_IN); ++ rtw_write8(padapter, GPIO_OUT, u1bTmp); ++ rtw_write8(padapter, GPIO_IO_SEL, 0xFF);//Reg0x46 ++ ++ u1bTmp = rtw_read8(padapter, REG_GPIO_IO_SEL); ++ rtw_write8(padapter, REG_GPIO_IO_SEL, (u1bTmp<<4)|u1bTmp); ++ u1bTmp = rtw_read8(padapter, REG_GPIO_IO_SEL+1); ++ rtw_write8(padapter, REG_GPIO_IO_SEL+1, u1bTmp|0x0F);//Reg0x43 ++#endif ++ ++ ++ // Run LPS WL RFOFF flow ++ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW); ++ if (ret == _FALSE) { ++ DBG_871X("%s: run RF OFF flow fail!\n", __func__); ++ } ++ ++ // ==== Reset digital sequence ====== ++ ++ u1bTmp = rtw_read8(padapter, REG_MCUFWDL); ++ if ((u1bTmp & RAM_DL_SEL) && padapter->bFWReady) //8051 RAM code ++ { ++ //_8051Reset88E(padapter); ++ ++ // Reset MCU 0x2[10]=0. ++ u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); ++ u1bTmp &= ~BIT(2); // 0x2[10], FEN_CPUEN ++ rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp); ++ } ++ ++ //u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); ++ //u1bTmp &= ~BIT(2); // 0x2[10], FEN_CPUEN ++ //rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp); ++ ++ // MCUFWDL 0x80[1:0]=0 ++ // reset MCU ready status ++ rtw_write8(padapter, REG_MCUFWDL, 0); ++ ++ //==== Reset digital sequence end ====== ++ ++ ++ bMacPwrCtrlOn = _FALSE; // Disable CMD53 R/W ++ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ ++ ++/* ++ if((pMgntInfo->RfOffReason & RF_CHANGE_BY_HW) && pHalData->pwrdown) ++ {// Power Down ++ ++ // Card disable power action flow ++ ret = HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_PDN_FLOW); ++ } ++ else ++*/ ++ { // Non-Power Down ++ ++ // Card disable power action flow ++ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_DISABLE_FLOW); ++ ++ ++ if (ret == _FALSE) { ++ DBG_871X("%s: run CARD DISABLE flow fail!\n", __func__); ++ } ++ } ++ ++ ++/* ++ // Reset MCU IO Wrapper, added by Roger, 2011.08.30 ++ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); ++ u1bTmp &= ~BIT(0); ++ rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp); ++ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); ++ u1bTmp |= BIT(0); ++ rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp); ++*/ ++ ++ ++ // RSV_CTRL 0x1C[7:0]=0x0E ++ // lock ISO/CLK/Power control register ++ rtw_write8(padapter, REG_RSV_CTRL, 0x0E); ++ ++ padapter->bFWReady = _FALSE; ++ bMacPwrCtrlOn = _FALSE; ++ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ ++ DBG_871X("<=%s\n", __FUNCTION__); ++ ++} ++ ++//Tx Page FIFO threshold ++static void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ) ++{ ++ u16 HQ_threshold, NQ_threshold, LQ_threshold; ++ ++ HQ_threshold = (numPubQ + numHQ + 1) >> 1; ++ HQ_threshold |= (HQ_threshold<<8); ++ ++ NQ_threshold = (numPubQ + numNQ + 1) >> 1; ++ NQ_threshold |= (NQ_threshold<<8); ++ ++ LQ_threshold = (numPubQ + numLQ + 1) >> 1; ++ LQ_threshold |= (LQ_threshold<<8); ++ ++ rtw_write16(padapter, 0x218, HQ_threshold); ++ rtw_write16(padapter, 0x21A, NQ_threshold); ++ rtw_write16(padapter, 0x21C, LQ_threshold); ++ DBG_8192C("%s(): Enable Tx FIFO Page Threshold H:0x%x,N:0x%x,L:0x%x\n", __FUNCTION__, HQ_threshold, NQ_threshold, LQ_threshold); ++} ++ ++static void _InitQueueReservedPage(PADAPTER padapter) ++{ ++#ifdef RTL8188ES_MAC_LOOPBACK ++ ++//#define MAC_LOOPBACK_PAGE_NUM_PUBQ 0x26 ++//#define MAC_LOOPBACK_PAGE_NUM_HPQ 0x0b ++//#define MAC_LOOPBACK_PAGE_NUM_LPQ 0x0b ++//#define MAC_LOOPBACK_PAGE_NUM_NPQ 0x0b // 71 pages=>9088 bytes, 8.875k ++ ++ rtw_write16(padapter, REG_RQPN_NPQ, 0x0b0b); ++ rtw_write32(padapter, REG_RQPN, 0x80260b0b); ++ ++#else //TX_PAGE_BOUNDARY_LOOPBACK_MODE ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ u32 outEPNum = (u32)pHalData->OutEpNumber; ++ u32 numHQ = 0; ++ u32 numLQ = 0; ++ u32 numNQ = 0; ++ u32 numPubQ = 0x00; ++ u32 value32; ++ u8 value8; ++ BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; ++ ++ if(bWiFiConfig) ++ { ++ if (pHalData->OutEpQueueSel & TX_SELE_HQ) ++ numHQ = WMM_NORMAL_PAGE_NUM_HPQ_88E; ++ ++ if (pHalData->OutEpQueueSel & TX_SELE_LQ) ++ numLQ = WMM_NORMAL_PAGE_NUM_LPQ_88E; ++ ++ // NOTE: This step shall be proceed before writting REG_RQPN. ++ if (pHalData->OutEpQueueSel & TX_SELE_NQ) ++ numNQ = WMM_NORMAL_PAGE_NUM_NPQ_88E; ++ } ++ else ++ { ++ if(pHalData->OutEpQueueSel & TX_SELE_HQ) ++ numHQ = NORMAL_PAGE_NUM_HPQ_88E; ++ ++ if(pHalData->OutEpQueueSel & TX_SELE_LQ) ++ numLQ = NORMAL_PAGE_NUM_LPQ_88E; ++ ++ // NOTE: This step shall be proceed before writting REG_RQPN. ++ if(pHalData->OutEpQueueSel & TX_SELE_NQ) ++ numNQ = NORMAL_PAGE_NUM_NPQ_88E; ++ } ++ ++ value8 = (u8)_NPQ(numNQ); ++ rtw_write8(padapter, REG_RQPN_NPQ, value8); ++ ++ numPubQ = TX_TOTAL_PAGE_NUMBER_88E(padapter) - numHQ - numLQ - numNQ; ++ ++ // TX DMA ++ value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; ++ rtw_write32(padapter, REG_RQPN, value32); ++ ++ rtw_hal_set_sdio_tx_max_length(padapter, numHQ, numNQ, numLQ, numPubQ); ++ ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ _init_available_page_threshold(padapter, numHQ, numNQ, numLQ, numPubQ); ++#endif ++#endif ++ return; ++} ++ ++static void _InitTxBufferBoundary(PADAPTER padapter, u8 txpktbuf_bndy) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ //u16 txdmactrl; ++ ++ rtw_write8(padapter, REG_BCNQ_BDNY, txpktbuf_bndy); ++ rtw_write8(padapter, REG_MGQ_BDNY, txpktbuf_bndy); ++ rtw_write8(padapter, REG_WMAC_LBK_BF_HD, txpktbuf_bndy); ++ rtw_write8(padapter, REG_TRXFF_BNDY, txpktbuf_bndy); ++ rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); ++ ++} ++ ++static VOID ++_InitNormalChipRegPriority( ++ IN PADAPTER Adapter, ++ IN u16 beQ, ++ IN u16 bkQ, ++ IN u16 viQ, ++ IN u16 voQ, ++ IN u16 mgtQ, ++ IN u16 hiQ ++ ) ++{ ++ u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); ++ ++ value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | ++ _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | ++ _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); ++ ++ rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); ++} ++ ++static VOID ++_InitNormalChipOneOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ u16 value = 0; ++ switch(pHalData->OutEpQueueSel) ++ { ++ case TX_SELE_HQ: ++ value = QUEUE_HIGH; ++ break; ++ case TX_SELE_LQ: ++ value = QUEUE_LOW; ++ break; ++ case TX_SELE_NQ: ++ value = QUEUE_NORMAL; ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ _InitNormalChipRegPriority(Adapter, ++ value, ++ value, ++ value, ++ value, ++ value, ++ value ++ ); ++ ++} ++ ++static VOID ++_InitNormalChipTwoOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; ++ ++ ++ u16 valueHi = 0; ++ u16 valueLow = 0; ++ ++ switch(pHalData->OutEpQueueSel) ++ { ++ case (TX_SELE_HQ | TX_SELE_LQ): ++ valueHi = QUEUE_HIGH; ++ valueLow = QUEUE_LOW; ++ break; ++ case (TX_SELE_NQ | TX_SELE_LQ): ++ valueHi = QUEUE_NORMAL; ++ valueLow = QUEUE_LOW; ++ break; ++ case (TX_SELE_HQ | TX_SELE_NQ): ++ valueHi = QUEUE_HIGH; ++ valueLow = QUEUE_NORMAL; ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ if(!pregistrypriv->wifi_spec ){ ++ beQ = valueLow; ++ bkQ = valueLow; ++ viQ = valueHi; ++ voQ = valueHi; ++ mgtQ = valueHi; ++ hiQ = valueHi; ++ } ++ else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE ++ beQ = valueLow; ++ bkQ = valueHi; ++ viQ = valueHi; ++ voQ = valueLow; ++ mgtQ = valueHi; ++ hiQ = valueHi; ++ } ++ ++ _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); ++ ++} ++ ++static VOID ++_InitNormalChipThreeOutEpPriority( ++ IN PADAPTER padapter ++ ) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; ++ ++ if (!pregistrypriv->wifi_spec){// typical setting ++ beQ = QUEUE_LOW; ++ bkQ = QUEUE_LOW; ++ viQ = QUEUE_NORMAL; ++ voQ = QUEUE_HIGH; ++ mgtQ = QUEUE_HIGH; ++ hiQ = QUEUE_HIGH; ++ } ++ else {// for WMM ++ beQ = QUEUE_LOW; ++ bkQ = QUEUE_NORMAL; ++ viQ = QUEUE_NORMAL; ++ voQ = QUEUE_HIGH; ++ mgtQ = QUEUE_HIGH; ++ hiQ = QUEUE_HIGH; ++ } ++ _InitNormalChipRegPriority(padapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); ++} ++ ++static VOID ++_InitNormalChipQueuePriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ switch(pHalData->OutEpNumber) ++ { ++ case 1: ++ _InitNormalChipOneOutEpPriority(Adapter); ++ break; ++ case 2: ++ _InitNormalChipTwoOutEpPriority(Adapter); ++ break; ++ case 3: ++ _InitNormalChipThreeOutEpPriority(Adapter); ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ ++} ++ ++ ++static void _InitQueuePriority(PADAPTER padapter) ++{ ++ _InitNormalChipQueuePriority(padapter); ++} ++ ++static void _InitPageBoundary(PADAPTER padapter) ++{ ++ // RX Page Boundary ++ u16 rxff_bndy = 0; ++ ++ rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E(padapter) - 1; ++ ++ rtw_write16(padapter, (REG_TRXFF_BNDY + 2), rxff_bndy); ++ ++} ++ ++void _InitDriverInfoSize(PADAPTER padapter, u8 drvInfoSize) ++{ ++ rtw_write8(padapter, REG_RX_DRVINFO_SZ, drvInfoSize); ++} ++ ++void _InitNetworkType(PADAPTER padapter) ++{ ++ u32 value32; ++ ++ value32 = rtw_read32(padapter, REG_CR); ++ ++ // TODO: use the other function to set network type ++// value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); ++ value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); ++ ++ rtw_write32(padapter, REG_CR, value32); ++} ++ ++void _InitWMACSetting(PADAPTER padapter) ++{ ++ u16 value16; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ ++ //pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC; ++ // don't turn on AAP, it will allow all packets to driver ++ pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC; ++ ++ rtw_write32(padapter, REG_RCR, pHalData->ReceiveConfig); ++ ++ // Accept all data frames ++ value16 = 0xFFFF; ++ rtw_write16(padapter, REG_RXFLTMAP2, value16); ++ ++ // 2010.09.08 hpfan ++ // Since ADF is removed from RCR, ps-poll will not be indicate to driver, ++ // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. ++ value16 = 0x400; ++ rtw_write16(padapter, REG_RXFLTMAP1, value16); ++ ++ // Accept all management frames ++ value16 = 0xFFFF; ++ rtw_write16(padapter, REG_RXFLTMAP0, value16); ++ ++} ++ ++void _InitAdaptiveCtrl(PADAPTER padapter) ++{ ++ u16 value16; ++ u32 value32; ++ ++ // Response Rate Set ++ value32 = rtw_read32(padapter, REG_RRSR); ++ value32 &= ~RATE_BITMAP_ALL; ++ value32 |= RATE_RRSR_CCK_ONLY_1M; ++ rtw_write32(padapter, REG_RRSR, value32); ++ ++ // CF-END Threshold ++ //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); ++ ++ // SIFS (used in NAV) ++ value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); ++ rtw_write16(padapter, REG_SPEC_SIFS, value16); ++ ++ // Retry Limit ++ value16 = _LRL(0x30) | _SRL(0x30); ++ rtw_write16(padapter, REG_RL, value16); ++} ++ ++void _InitEDCA(PADAPTER padapter) ++{ ++ // Set Spec SIFS (used in NAV) ++ rtw_write16(padapter, REG_SPEC_SIFS, 0x100a); ++ rtw_write16(padapter, REG_MAC_SPEC_SIFS, 0x100a); ++ ++ // Set SIFS for CCK ++ rtw_write16(padapter, REG_SIFS_CTX, 0x100a); ++ ++ // Set SIFS for OFDM ++ rtw_write16(padapter, REG_SIFS_TRX, 0x100a); ++ ++ // TXOP ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x005EA42B); ++ rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A44F); ++ rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005EA324); ++ rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002FA226); ++} ++ ++void _InitRateFallback(PADAPTER padapter) ++{ ++ // Set Data Auto Rate Fallback Retry Count register. ++ rtw_write32(padapter, REG_DARFRC, 0x00000000); ++ rtw_write32(padapter, REG_DARFRC+4, 0x10080404); ++ rtw_write32(padapter, REG_RARFRC, 0x04030201); ++ rtw_write32(padapter, REG_RARFRC+4, 0x08070605); ++ ++} ++ ++void _InitRetryFunction(PADAPTER padapter) ++{ ++ u8 value8; ++ ++ value8 = rtw_read8(padapter, REG_FWHW_TXQ_CTRL); ++ value8 |= EN_AMPDU_RTY_NEW; ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL, value8); ++ ++ // Set ACK timeout ++ rtw_write8(padapter, REG_ACKTO, 0x40); ++} ++ ++static void HalRxAggr8188ESdio(PADAPTER padapter) ++{ ++#if 1 ++ struct registry_priv *pregistrypriv; ++ u8 valueDMATimeout; ++ u8 valueDMAPageCount; ++ ++ ++ pregistrypriv = &padapter->registrypriv; ++ ++ if (pregistrypriv->wifi_spec) ++ { ++ // 2010.04.27 hpfan ++ // Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer ++ // Timeout value is calculated by 34 / (2^n) ++ valueDMATimeout = 0x0f; ++ valueDMAPageCount = 0x01; ++ } ++ else ++ { ++ valueDMATimeout = 0x06; ++ //valueDMAPageCount = 0x0F; ++ //valueDMATimeout = 0x0a; ++ valueDMAPageCount = 0x24; ++ } ++ ++ rtw_write8(padapter, REG_RXDMA_AGG_PG_TH+1, valueDMATimeout); ++ rtw_write8(padapter, REG_RXDMA_AGG_PG_TH, valueDMAPageCount); ++#endif ++} ++ ++void sdio_AggSettingRxUpdate(PADAPTER padapter) ++{ ++#if 1 ++ //HAL_DATA_TYPE *pHalData; ++ u8 valueDMA; ++ ++ ++ //pHalData = GET_HAL_DATA(padapter); ++ ++ valueDMA = rtw_read8(padapter, REG_TRXDMA_CTRL); ++ valueDMA |= RXDMA_AGG_EN; ++ rtw_write8(padapter, REG_TRXDMA_CTRL, valueDMA); ++ ++#if 0 ++ switch (RX_PAGE_SIZE_REG_VALUE) ++ { ++ case PBP_64: ++ pHalData->HwRxPageSize = 64; ++ break; ++ case PBP_128: ++ pHalData->HwRxPageSize = 128; ++ break; ++ case PBP_256: ++ pHalData->HwRxPageSize = 256; ++ break; ++ case PBP_512: ++ pHalData->HwRxPageSize = 512; ++ break; ++ case PBP_1024: ++ pHalData->HwRxPageSize = 1024; ++ break; ++ default: ++ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ++ ("%s: RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n", __FUNCTION__)); ++ break; ++ } ++#endif ++#endif ++} ++ ++void _initSdioAggregationSetting(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ // Tx aggregation setting ++ //sdio_AggSettingTxUpdate(padapter); ++ ++ // Rx aggregation setting ++ HalRxAggr8188ESdio(padapter); ++ sdio_AggSettingRxUpdate(padapter); ++ ++} ++ ++ ++void _InitOperationMode(PADAPTER padapter) ++{ ++ PHAL_DATA_TYPE pHalData; ++ struct mlme_ext_priv *pmlmeext; ++ u8 regBwOpMode = 0; ++ u32 regRATR = 0, regRRSR = 0; ++ u8 MinSpaceCfg = 0; ++ ++ ++ pHalData = GET_HAL_DATA(padapter); ++ pmlmeext = &padapter->mlmeextpriv; ++ ++ //1 This part need to modified according to the rate set we filtered!! ++ // ++ // Set RRSR, RATR, and REG_BWOPMODE registers ++ // ++ switch(pmlmeext->cur_wireless_mode) ++ { ++ case WIRELESS_MODE_B: ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK; ++ regRRSR = RATE_ALL_CCK; ++ break; ++ case WIRELESS_MODE_A: ++// RT_ASSERT(FALSE,("Error wireless a mode\n")); ++#if 0 ++ regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_OFDM_AG; ++#endif ++ break; ++ case WIRELESS_MODE_G: ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ break; ++ case WIRELESS_MODE_AUTO: ++#if 0 ++ if (padapter->bInHctTest) ++ { ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ } ++ else ++#endif ++ { ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ } ++ break; ++ case WIRELESS_MODE_N_24G: ++ // It support CCK rate by default. ++ // CCK rate will be filtered out only when associated AP does not support it. ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ break; ++ case WIRELESS_MODE_N_5G: ++// RT_ASSERT(FALSE,("Error wireless mode")); ++#if 0 ++ regBwOpMode = BW_OPMODE_5G; ++ regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_OFDM_AG; ++#endif ++ break; ++ ++ default: //for MacOSX compiler warning. ++ break; ++ } ++ ++ rtw_write8(padapter, REG_BWOPMODE, regBwOpMode); ++ ++} ++ ++ ++void _InitBeaconParameters(PADAPTER padapter) ++{ ++ PHAL_DATA_TYPE pHalData; ++ ++ ++ pHalData = GET_HAL_DATA(padapter); ++ ++ rtw_write16(padapter, REG_BCN_CTRL, 0x1010); ++ ++ // TODO: Remove these magic number ++ rtw_write16(padapter, REG_TBTT_PROHIBIT, 0x6404);// ms ++ rtw_write8(padapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME_8188E);//ms ++ rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8188E); ++ ++ // Suggested by designer timchen. Change beacon AIFS to the largest number ++ // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 ++ rtw_write16(padapter, REG_BCNTCFG, 0x660F); ++ ++ ++ pHalData->RegBcnCtrlVal = rtw_read8(padapter, REG_BCN_CTRL); ++ pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE); ++ pHalData->RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); ++ pHalData->RegReg542 = rtw_read8(padapter, REG_TBTT_PROHIBIT+2); ++ pHalData->RegCR_1 = rtw_read8(padapter, REG_CR+1); ++ ++} ++ ++void _InitBeaconMaxError(PADAPTER padapter, BOOLEAN InfraMode) ++{ ++#ifdef CONFIG_ADHOC_WORKAROUND_SETTING ++ rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); ++#endif ++} ++ ++void _InitInterrupt(PADAPTER padapter) ++{ ++ ++ //HISR write one to clear ++ rtw_write32(padapter, REG_HISR_88E, 0xFFFFFFFF); ++ ++ // HIMR - turn all off ++ rtw_write32(padapter, REG_HIMR_88E, 0); ++ ++ // ++ // Initialize and enable SDIO Host Interrupt. ++ // ++ InitInterrupt8188ESdio(padapter); ++ ++ ++ // ++ // Initialize and enable system Host Interrupt. ++ // ++ //InitSysInterrupt8188ESdio(Adapter);//TODO: ++ ++ // ++ // Enable SDIO Host Interrupt. ++ // ++ //EnableInterrupt8188ESdio(padapter);//Move to sd_intf_start()/stop ++ ++} ++ ++void _InitRDGSetting(PADAPTER padapter) ++{ ++ rtw_write8(padapter, REG_RD_CTRL, 0xFF); ++ rtw_write16(padapter, REG_RD_NAV_NXT, 0x200); ++ rtw_write8(padapter, REG_RD_RESP_PKT_TH, 0x05); ++} ++ ++ ++static void _InitRxSetting(PADAPTER padapter) ++{ ++ rtw_write32(padapter, REG_MACID, 0x87654321); ++ rtw_write32(padapter, 0x0700, 0x87654321); ++} ++ ++ ++static void _InitRFType(PADAPTER padapter) ++{ ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++#if DISABLE_BB_RF ++ pHalData->rf_chip = RF_PSEUDO_11N; ++ return; ++#endif ++ pHalData->rf_chip = RF_6052; ++ ++ MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); ++} ++ ++// Set CCK and OFDM Block "ON" ++static void _BBTurnOnBlock(PADAPTER padapter) ++{ ++#if (DISABLE_BB_RF) ++ return; ++#endif ++ ++ PHY_SetBBReg(padapter, rFPGA0_RFMOD, bCCKEn, 0x1); ++ PHY_SetBBReg(padapter, rFPGA0_RFMOD, bOFDMEn, 0x1); ++} ++ ++#if 0 ++static void _InitAntenna_Selection(PADAPTER padapter) ++{ ++ rtw_write8(padapter, REG_LEDCFG2, 0x82); ++} ++#endif ++ ++static void _InitPABias(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 pa_setting; ++ ++ //FIXED PA current issue ++ //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); ++ pa_setting = EFUSE_Read1Byte(padapter, 0x1FA); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); ++ ++ if(!(pa_setting & BIT0)) ++ { ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406); ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406); ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406); ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); ++ } ++ if(!(pa_setting & BIT4)) ++ { ++ pa_setting = rtw_read8(padapter, 0x16); ++ pa_setting &= 0x0F; ++ rtw_write8(padapter, 0x16, pa_setting | 0x80); ++ rtw_write8(padapter, 0x16, pa_setting | 0x90); ++ } ++} ++ ++#if 0 ++VOID ++_InitRDGSetting_8188E( ++ IN PADAPTER Adapter ++ ) ++{ ++ PlatformEFIOWrite1Byte(Adapter,REG_RD_CTRL,0xFF); ++ PlatformEFIOWrite2Byte(Adapter, REG_RD_NAV_NXT, 0x200); ++ PlatformEFIOWrite1Byte(Adapter,REG_RD_RESP_PKT_TH,0x05); ++} ++#endif ++ ++static u32 rtl8188es_hal_init(PADAPTER padapter) ++{ ++ s32 ret; ++ u8 txpktbuf_bndy; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ rt_rf_power_state eRfPowerStateToSet; ++ u8 value8; ++ u8 cpwm_orig, cpwm_now, rpwm; ++ u16 value16; ++ ++ u32 init_start_time = rtw_get_current_time(); ++ u32 start_time; ++ ++#ifdef DBG_HAL_INIT_PROFILING ++ enum HAL_INIT_STAGES { ++ HAL_INIT_STAGES_BEGIN = 0, ++ HAL_INIT_STAGES_INIT_PW_ON, ++ HAL_INIT_STAGES_MISC01, ++ HAL_INIT_STAGES_DOWNLOAD_FW, ++ HAL_INIT_STAGES_MAC, ++ HAL_INIT_STAGES_BB, ++ HAL_INIT_STAGES_RF, ++ HAL_INIT_STAGES_EFUSE_PATCH, ++ HAL_INIT_STAGES_INIT_LLTT, ++ ++ HAL_INIT_STAGES_MISC02, ++ HAL_INIT_STAGES_TURN_ON_BLOCK, ++ HAL_INIT_STAGES_INIT_SECURITY, ++ HAL_INIT_STAGES_MISC11, ++ HAL_INIT_STAGES_INIT_HAL_DM, ++ //HAL_INIT_STAGES_RF_PS, ++ HAL_INIT_STAGES_IQK, ++ HAL_INIT_STAGES_PW_TRACK, ++ HAL_INIT_STAGES_LCK, ++ //HAL_INIT_STAGES_MISC21, ++ HAL_INIT_STAGES_INIT_PABIAS, ++ //HAL_INIT_STAGES_ANTENNA_SEL, ++ HAL_INIT_STAGES_MISC31, ++ HAL_INIT_STAGES_END, ++ HAL_INIT_STAGES_NUM ++ }; ++ ++ char * hal_init_stages_str[] = { ++ "HAL_INIT_STAGES_BEGIN", ++ "HAL_INIT_STAGES_INIT_PW_ON", ++ "HAL_INIT_STAGES_MISC01", ++ "HAL_INIT_STAGES_DOWNLOAD_FW", ++ "HAL_INIT_STAGES_MAC", ++ "HAL_INIT_STAGES_BB", ++ "HAL_INIT_STAGES_RF", ++ "HAL_INIT_STAGES_EFUSE_PATCH", ++ "HAL_INIT_STAGES_INIT_LLTT", ++ "HAL_INIT_STAGES_MISC02", ++ "HAL_INIT_STAGES_TURN_ON_BLOCK", ++ "HAL_INIT_STAGES_INIT_SECURITY", ++ "HAL_INIT_STAGES_MISC11", ++ "HAL_INIT_STAGES_INIT_HAL_DM", ++ //"HAL_INIT_STAGES_RF_PS", ++ "HAL_INIT_STAGES_IQK", ++ "HAL_INIT_STAGES_PW_TRACK", ++ "HAL_INIT_STAGES_LCK", ++ //"HAL_INIT_STAGES_MISC21", ++ "HAL_INIT_STAGES_INIT_PABIAS" ++ //"HAL_INIT_STAGES_ANTENNA_SEL", ++ "HAL_INIT_STAGES_MISC31", ++ "HAL_INIT_STAGES_END", ++ }; ++ ++ ++ int hal_init_profiling_i; ++ u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point ++ ++ for(hal_init_profiling_i=0;hal_init_profiling_ilock); ++ cpwm_orig = 0, rpwm = 0; ++ rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig); ++ ++ value8 = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1); ++ value8 &= 0x80; ++ value8 ^= BIT7; ++ rpwm = PS_STATE_S4 | PS_ACK | value8; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); ++ ++ start_time = rtw_get_current_time(); ++ // polling cpwm ++ do { ++ rtw_mdelay_os(1); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now); ++ if ((cpwm_orig ^ cpwm_now) & 0x80) ++ { ++ DBG_871X("%s:Leave LPS done before PowerOn!!\n", ++ __func__); ++ break; ++ } ++ ++ if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) ++ { ++ if (rtw_read8(padapter, REG_CR) != 0xEA) { ++ DBG_871X("%s: polling cpwm timeout! but 0x100 != 0xEA!!\n", ++ __func__); ++ } else { ++ DBG_871X("%s, polling cpwm timeout and 0x100 = 0xEA!!\n", ++ __func__); ++ } ++ break; ++ } ++ } while (1); ++ _exit_pwrlock(&pwrctrlpriv->lock); ++ ++ hal_poweroff_8188es(padapter); ++#endif ++ } else { ++ DBG_871X("FW does not exit before power on!!\n"); ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); ++ ret = _InitPowerOn_8188ES(padapter); ++ if (_FAIL == ret) { ++ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init Power On!\n")); ++ goto exit; ++ } ++ ++ ret = PowerOnCheck(padapter); ++ if (_FAIL == ret ) { ++ DBG_871X("Power on Fail! do it again\n"); ++ ret = _InitPowerOn_8188ES(padapter); ++ if (_FAIL == ret) { ++ DBG_871X("Failed to init Power On!\n"); ++ goto exit; ++ } ++ } ++ DBG_871X("Power on ok!\n"); ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); ++ if (!pregistrypriv->wifi_spec) { ++ txpktbuf_bndy = TX_PAGE_BOUNDARY_88E(padapter); ++ } else { ++ // for WMM ++ txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E(padapter); ++ } ++ _InitQueueReservedPage(padapter); ++ _InitQueuePriority(padapter); ++ _InitPageBoundary(padapter); ++ _InitTransferPageSize(padapter); ++ ++#ifdef CONFIG_IOL_IOREG_CFG ++ _InitTxBufferBoundary(padapter, 0); ++#endif ++ // ++ // Configure SDIO TxRx Control to enable Rx DMA timer masking. ++ // 2010.02.24. ++ // ++ value8 = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_TX_CTRL); ++ SdioLocalCmd52Write1Byte(padapter, SDIO_REG_TX_CTRL, 0x02); ++ ++ rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, 0); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); ++#if (MP_DRIVER == 1) ++ if (padapter->registrypriv.mp_mode == 1) ++ { ++ _InitRxSetting(padapter); ++ } ++#endif //MP_DRIVER == 1 ++ { ++#if 0 ++ padapter->bFWReady = _FALSE; //because no fw for test chip ++ pHalData->fw_ractrl = _FALSE; ++#else ++ ++ ret = rtl8188e_FirmwareDownload(padapter, _FALSE); ++ ++ if (ret != _SUCCESS) { ++ DBG_871X("%s: Download Firmware failed!!\n", __FUNCTION__); ++ padapter->bFWReady = _FALSE; ++ pHalData->fw_ractrl = _FALSE; ++ goto exit; ++ } else { ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter8192CSdio(): Download Firmware Success!!\n")); ++ padapter->bFWReady = _TRUE; ++ #ifdef CONFIG_SFW_SUPPORTED ++ pHalData->fw_ractrl = IS_VENDOR_8188E_I_CUT_SERIES(padapter)?_TRUE:_FALSE; ++ #else ++ pHalData->fw_ractrl = _FALSE; ++ #endif ++ } ++#endif ++ } ++ ++ rtl8188e_InitializeFirmwareVars(padapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); ++#if (HAL_MAC_ENABLE == 1) ++ ret = PHY_MACConfig8188E(padapter); ++ if(ret != _SUCCESS){ ++// RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure MAC!!\n")); ++ goto exit; ++ } ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); ++ // ++ //d. Initialize BB related configurations. ++ // ++#if (HAL_BB_ENABLE == 1) ++ ret = PHY_BBConfig8188E(padapter); ++ if(ret != _SUCCESS){ ++// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Initializepadapter8192CSdio(): Fail to configure BB!!\n")); ++ goto exit; ++ } ++#endif ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); ++ ++#if (HAL_RF_ENABLE == 1) ++ ret = PHY_RFConfig8188E(padapter); ++ ++ if(ret != _SUCCESS){ ++// RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure RF!!\n")); ++ goto exit; ++ } ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH); ++#if defined(CONFIG_IOL_EFUSE_PATCH) ++ ret = rtl8188e_iol_efuse_patch(padapter); ++ if(ret != _SUCCESS){ ++ DBG_871X("%s rtl8188e_iol_efuse_patch failed \n",__FUNCTION__); ++ goto exit; ++ } ++#endif ++ _InitTxBufferBoundary(padapter, txpktbuf_bndy); ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); ++ ret = InitLLTTable(padapter, txpktbuf_bndy); ++ if (_SUCCESS != ret) { ++ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT Table!\n")); ++ goto exit; ++ } ++ ++ //Enable TX Report & Tx Report Timer ++ value8 = rtw_read8(padapter, REG_TX_RPT_CTRL); ++ rtw_write8(padapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0)); ++ ++#if (RATE_ADAPTIVE_SUPPORT==1) ++ if(!pHalData->fw_ractrl ){ ++ //Set MAX RPT MACID ++ rtw_write8(padapter, REG_TX_RPT_CTRL+1, 2);//FOR sta mode ,0: bc/mc ,1:AP ++ //Tx RPT Timer. Unit: 32us ++ rtw_write16(padapter, REG_TX_RPT_TIME, 0xCdf0); ++ } ++ else ++#endif ++ { ++ //disable tx rpt ++ rtw_write8(padapter, REG_TX_RPT_CTRL+1, 0);//FOR sta mode ,0: bc/mc ,1:AP ++ } ++ ++#if 0 ++ if(pHTInfo->bRDGEnable){ ++ _InitRDGSetting_8188E(Adapter); ++ } ++#endif ++ ++#ifdef CONFIG_TX_EARLY_MODE ++ if( pHalData->bEarlyModeEnable) ++ { ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n")); ++ ++ value8 = rtw_read8(padapter, REG_EARLY_MODE_CONTROL); ++#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 ++ value8 = value8|0x1f; ++#else ++ value8 = value8|0xf; ++#endif ++ rtw_write8(padapter, REG_EARLY_MODE_CONTROL, value8); ++ ++ rtw_write8(padapter, REG_EARLY_MODE_CONTROL+3, 0x80); ++ ++ value8 = rtw_read8(padapter, REG_TCR+1); ++ value8 = value8|0x40; ++ rtw_write8(padapter,REG_TCR+1, value8); ++ } ++ else ++#endif ++ { ++ rtw_write8(padapter, REG_EARLY_MODE_CONTROL, 0); ++ } ++ ++ ++#if(SIC_ENABLE == 1) ++ SIC_Init(padapter); ++#endif ++ ++ ++ if (pwrctrlpriv->reg_rfoff == _TRUE) { ++ pwrctrlpriv->rf_pwrstate = rf_off; ++ } ++ ++ // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting ++ // HW GPIO pin. Before PHY_RFConfig8192C. ++ HalDetectPwrDownMode88E(padapter); ++ ++ ++ // Set RF type for BB/RF configuration ++ _InitRFType(padapter); ++ ++ // Save target channel ++ // Current Channel will be updated again later. ++ pHalData->CurrentChannel = 1; ++ ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); ++ // Get Rx PHY status in order to report RSSI and others. ++ _InitDriverInfoSize(padapter, 4); ++ hal_init_macaddr(padapter); ++ _InitNetworkType(padapter); ++ _InitWMACSetting(padapter); ++ _InitAdaptiveCtrl(padapter); ++ _InitEDCA(padapter); ++ _InitRateFallback(padapter); ++ _InitRetryFunction(padapter); ++ _initSdioAggregationSetting(padapter); ++ _InitOperationMode(padapter); ++ _InitBeaconParameters(padapter); ++ _InitBeaconMaxError(padapter, _TRUE); ++ _InitInterrupt(padapter); ++ ++ // Enable MACTXEN/MACRXEN block ++ value16 = rtw_read16(padapter, REG_CR); ++ value16 |= (MACTXEN | MACRXEN); ++ rtw_write8(padapter, REG_CR, value16); ++ ++ rtw_write32(padapter,REG_MACID_NO_LINK_0,0xFFFFFFFF); ++ rtw_write32(padapter,REG_MACID_NO_LINK_1,0xFFFFFFFF); ++ ++#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) ++ ++#ifdef CONFIG_CHECK_AC_LIFETIME ++ // Enable lifetime check for the four ACs ++ rtw_write8(padapter, REG_LIFETIME_CTRL, 0x0F); ++#endif // CONFIG_CHECK_AC_LIFETIME ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms ++ rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms ++#else // CONFIG_TX_MCAST2UNI ++ rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s ++ rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s ++#endif // CONFIG_TX_MCAST2UNI ++#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI ++ ++ ++ ++ ++#endif //HAL_RF_ENABLE == 1 ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); ++ _BBTurnOnBlock(padapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); ++#if 1 ++ invalidate_cam_all(padapter); ++#else ++ CamResetAllEntry(padapter); ++ padapter->HalFunc.EnableHWSecCfgHandler(padapter); ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); ++ // 2010/12/17 MH We need to set TX power according to EFUSE content at first. ++ PHY_SetTxPowerLevel8188E(padapter, pHalData->CurrentChannel); ++ // Record original value for template. This is arough data, we can only use the data ++ // for power adjust. The value can not be adjustde according to different power!!! ++// pHalData->OriginalCckTxPwrIdx = pHalData->CurrentCckTxPwrIdx; ++// pHalData->OriginalOfdm24GTxPwrIdx = pHalData->CurrentOfdm24GTxPwrIdx; ++ ++// Move by Neo for USB SS to below setp ++//_RfPowerSave(padapter); ++ ++ // ++ // Disable BAR, suggested by Scott ++ // 2010.04.09 add by hpfan ++ // ++ rtw_write32(padapter, REG_BAR_MODE_CTRL, 0x0201ffff); ++ ++ // HW SEQ CTRL ++ // set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. ++ rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); ++ ++ ++#ifdef RTL8188ES_MAC_LOOPBACK ++ value8 = rtw_read8(padapter, REG_SYS_FUNC_EN); ++ value8 &= ~(FEN_BBRSTB|FEN_BB_GLB_RSTn); ++ rtw_write8(padapter, REG_SYS_FUNC_EN, value8);//disable BB, CCK/OFDM ++ ++ rtw_write8(padapter, REG_RD_CTRL, 0x0F); ++ rtw_write8(padapter, REG_RD_CTRL+1, 0xCF); ++ //rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, 0x80);//to check _InitPageBoundary() ++ rtw_write32(padapter, REG_CR, 0x0b0202ff);//0x100[28:24]=0x01011, enable mac loopback, no HW Security Eng. ++#endif ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); ++ // InitHalDm(padapter); ++ rtl8188e_InitHalDm(padapter); ++ ++ ++#if (MP_DRIVER == 1) ++ if (padapter->registrypriv.mp_mode == 1) ++ { ++ padapter->mppriv.channel = pHalData->CurrentChannel; ++ MPT_InitializeAdapter(padapter, padapter->mppriv.channel); ++ } ++ else ++#endif //(MP_DRIVER == 1) ++ { ++ // ++ // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status ++ // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not ++ // call init_adapter. May cause some problem?? ++ // ++ // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed ++ // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState ++ // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. ++ // Added by tynli. 2010.03.30. ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); ++ ++ // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. ++ // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. ++// pHalData->bHwRadioOff = _FALSE; ++ pwrctrlpriv->b_hw_radio_off = _FALSE; ++ eRfPowerStateToSet = rf_on; ++ ++ // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. ++ // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. ++ if(pHalData->pwrdown && eRfPowerStateToSet == rf_off) ++ { ++ // Enable register area 0x0-0xc. ++ rtw_write8(padapter, REG_RSV_CTRL, 0x0); ++ ++ // ++ // We should configure HW PDn source for WiFi ONLY, and then ++ // our HW will be set in power-down mode if PDn source from all functions are configured. ++ // 2010.10.06. ++ // ++ ++ rtw_write16(padapter, REG_APS_FSMCO, 0x8812); ++ ++ } ++ //DrvIFIndicateCurrentPhyStatus(padapter); // 2010/08/17 MH Disable to prevent BSOD. ++ ++ // 2010/08/26 MH Merge from 8192CE. ++ if(pwrctrlpriv->rf_pwrstate == rf_on) ++ { ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); ++ if(pHalData->bIQKInitialized){ ++// PHY_IQCalibrate(padapter, _TRUE); ++ PHY_IQCalibrate_8188E(padapter,_TRUE); ++ } ++ else ++ { ++// PHY_IQCalibrate(padapter, _FALSE); ++ PHY_IQCalibrate_8188E(padapter,_FALSE); ++ pHalData->bIQKInitialized = _TRUE; ++ } ++ ++// dm_CheckTXPowerTracking(padapter); ++// PHY_LCCalibrate(padapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); ++ ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); ++ PHY_LCCalibrate_8188E(&pHalData->odmpriv ); ++ ++ ++ } ++} ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); ++ //if(pHalData->eRFPowerState == eRfOn) ++ { ++ _InitPABias(padapter); ++ } ++ ++ // Init BT hw config. ++// HALBT_InitHwConfig(padapter); ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); ++ // 2010/05/20 MH We need to init timer after update setting. Otherwise, we can not get correct inf setting. ++ // 2010/05/18 MH For SE series only now. Init GPIO detect time ++#if 0 ++ if(pDevice->RegUsbSS) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, (" call GpioDetectTimerStart\n")); ++ GpioDetectTimerStart(padapter); // Disable temporarily ++ } ++#endif ++ ++ // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter ++ // suspend mode automatically. ++ //HwSuspendModeEnable92Cu(padapter, FALSE); ++ ++ // 2010/12/17 MH For TX power level OID modification from UI. ++// padapter->HalFunc.GetTxPowerLevelHandler( padapter, &pHalData->DefaultTxPwrDbm ); ++ //DbgPrint("pHalData->DefaultTxPwrDbm = %d\n", pHalData->DefaultTxPwrDbm); ++ ++// if(pHalData->SwBeaconType < HAL92CSDIO_DEFAULT_BEACON_TYPE) // The lowest Beacon Type that HW can support ++// pHalData->SwBeaconType = HAL92CSDIO_DEFAULT_BEACON_TYPE; ++ ++ // ++ // Update current Tx FIFO page status. ++ // ++ HalQueryTxBufferStatus8189ESdio(padapter); ++ HalQueryTxOQTBufferStatus8189ESdio(padapter); ++ pHalData->SdioTxOQTMaxFreeSpace = pHalData->SdioTxOQTFreeSpace; ++ ++ ++ if(pregistrypriv->wifi_spec) { ++ rtw_write16(padapter,REG_FAST_EDCA_CTRL ,0); ++ rtw_write8(padapter,REG_NAV_UPPER ,0x0); ++ } ++ ++ if(IS_HARDWARE_TYPE_8188ES(padapter)) ++ { ++ value8= rtw_read8(padapter, 0x4d3); ++ rtw_write8(padapter, 0x4d3, (value8|0x1)); ++ } ++ ++ //pHalData->PreRpwmVal = PlatformEFSdioLocalCmd52Read1Byte(Adapter, SDIO_REG_HRPWM1)&0x80; ++ ++ if(!pHalData->fw_ractrl ){ ++ // enable Tx report. ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+1, 0x0F); ++ //tynli_test_tx_report. ++ rtw_write16(padapter, REG_TX_RPT_TIME, 0x3DF0); ++ } ++/* ++ // Suggested by SD1 pisa. Added by tynli. 2011.10.21. ++ PlatformEFIOWrite1Byte(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01); ++ ++*/ ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); ++ ++ ++ //enable tx DMA to drop the redundate data of packet ++ rtw_write16(padapter,REG_TXDMA_OFFSET_CHK, (rtw_read16(padapter,REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); ++ ++//#debug print for checking compile flags ++ //DBG_8192C("RTL8188E_FPGA_TRUE_PHY_VERIFICATION=%d\n", RTL8188E_FPGA_TRUE_PHY_VERIFICATION); ++ DBG_8192C("DISABLE_BB_RF=%d\n", DISABLE_BB_RF); ++ DBG_8192C("IS_HARDWARE_TYPE_8188ES=%d\n", IS_HARDWARE_TYPE_8188ES(padapter)); ++//# ++ ++#ifdef CONFIG_PLATFORM_SPRD ++ // For Power Consumption, set all GPIO pin to ouput mode ++ //0x44~0x47 (GPIO 0~7), Note:GPIO5 is enabled for controlling external 26MHz request ++ rtw_write8(padapter, GPIO_IO_SEL, 0xFF);//Reg0x46, set to o/p mode ++ ++ //0x42~0x43 (GPIO 8~11) ++ value8 = rtw_read8(padapter, REG_GPIO_IO_SEL); ++ rtw_write8(padapter, REG_GPIO_IO_SEL, (value8<<4)|value8); ++ value8 = rtw_read8(padapter, REG_GPIO_IO_SEL+1); ++ rtw_write8(padapter, REG_GPIO_IO_SEL+1, value8|0x0F);//Reg0x43 ++#endif //CONFIG_PLATFORM_SPRD ++ ++ ++#ifdef CONFIG_XMIT_ACK ++ //ack for xmit mgmt frames. ++ rtw_write32(padapter, REG_FWHW_TXQ_CTRL, rtw_read32(padapter, REG_FWHW_TXQ_CTRL)|BIT(12)); ++#endif //CONFIG_XMIT_ACK ++ ++ if (padapter->registrypriv.wifi_spec == 1) ++ ODM_SetBBReg(pDM_Odm, ++ rOFDM0_ECCAThreshold, bMaskDWord, 0x00fe0301); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---Initializepadapter8192CSdio()\n")); ++ DBG_8192C("-rtl8188es_hal_init\n"); ++ ++exit: ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); ++ ++ DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); ++ ++ #ifdef DBG_HAL_INIT_PROFILING ++ hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); ++ ++ for(hal_init_profiling_i=0;hal_init_profiling_i%s\n", __FUNCTION__); ++ ++ if (rtw_is_hw_init_completed(padapter)) ++ hal_poweroff_8188es(padapter); ++ ++ DBG_871X("<=%s\n", __FUNCTION__); ++ ++ return _SUCCESS; ++} ++ ++static void rtl8188es_init_default_value(PADAPTER padapter) ++{ ++ PHAL_DATA_TYPE pHalData; ++ struct pwrctrl_priv *pwrctrlpriv; ++ u8 i; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ pwrctrlpriv = adapter_to_pwrctl(padapter); ++ ++ rtl8188e_init_default_value(padapter); ++ ++ //init default value ++ pHalData->fw_ractrl = _FALSE; ++ if(!pwrctrlpriv->bkeepfwalive) ++ pHalData->LastHMEBoxNum = 0; ++ ++ //init dm default value ++ pHalData->bIQKInitialized = _FALSE; ++ pHalData->odmpriv.RFCalibrateInfo.TM_Trigger = 0;//for IQK ++ //pdmpriv->binitialized = _FALSE; ++// pdmpriv->prv_traffic_idx = 3; ++// pdmpriv->initialize = 0; ++ pHalData->pwrGroupCnt = 0; ++ pHalData->PGMaxGroup= 13; ++ pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; ++ for(i = 0; i < HP_THERMAL_NUM; i++) ++ pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; ++ ++ // interface related variable ++ pHalData->SdioRxFIFOCnt = 0; ++ pHalData->EfuseHal.fakeEfuseBank = 0; ++ pHalData->EfuseHal.fakeEfuseUsedBytes = 0; ++ _rtw_memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE); ++ _rtw_memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN); ++ _rtw_memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN); ++ ++} ++ ++// ++// Description: ++// We should set Efuse cell selection to WiFi cell in default. ++// ++// Assumption: ++// PASSIVE_LEVEL ++// ++// Added by Roger, 2010.11.23. ++// ++static void _EfuseCellSel( ++ IN PADAPTER padapter ++ ) ++{ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ u32 value32; ++ ++ //if(INCLUDE_MULTI_FUNC_BT(padapter)) ++ { ++ value32 = rtw_read32(padapter, EFUSE_TEST); ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); ++ rtw_write32(padapter, EFUSE_TEST, value32); ++ } ++} ++ ++static VOID ++_ReadRFType( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++#if DISABLE_BB_RF ++ pHalData->rf_chip = RF_PSEUDO_11N; ++#else ++ pHalData->rf_chip = RF_6052; ++#endif ++} ++ ++static void ++Hal_EfuseParsePIDVID_8188ES( ++ IN PADAPTER pAdapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ // ++ // The PID/VID info was parsed from CISTPL_MANFID Tuple in CIS area before. ++ // VID is parsed from Manufacture code field and PID is parsed from Manufacture information field. ++ // 2011.04.01. ++ // ++ ++// RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM VID = 0x%4x\n", pHalData->EEPROMVID)); ++// RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM PID = 0x%4x\n", pHalData->EEPROMPID)); ++} ++ ++static VOID ++readAdapterInfo_8188ES( ++ IN PADAPTER padapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ ++ /* parse the eeprom/efuse content */ ++ Hal_EfuseParseIDCode88E(padapter, pHalData->efuse_eeprom_data); ++ Hal_EfuseParsePIDVID_8188ES(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ hal_config_macaddr(padapter, pHalData->bautoload_fail_flag); ++ Hal_ReadPowerSavingMode88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ Hal_ReadTxPowerInfo88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseEEPROMVer88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ rtl8188e_EfuseParseChnlPlan(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseXtal_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseCustomerID88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ //Hal_ReadAntennaDiversity88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseBoardType88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ Hal_ReadThermalMeter_88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++ // ++ // The following part initialize some vars by PG info. ++ // ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ Hal_DetectWoWMode(padapter); ++#endif ++#ifdef CONFIG_RF_GAIN_OFFSET ++ Hal_ReadRFGainOffset(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); ++#endif //CONFIG_RF_GAIN_OFFSET ++} ++ ++static void _ReadPROMContent( ++ IN PADAPTER padapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ u8 eeValue; ++ ++ /* check system boot selection */ ++ eeValue = rtw_read8(padapter, REG_9346CR); ++ pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; ++ pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; ++ ++ DBG_871X("%s: 9346CR=0x%02X, Boot from %s, Autoload %s\n", ++ __FUNCTION__, eeValue, ++ (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"), ++ (pHalData->bautoload_fail_flag ? "Fail" : "OK")); ++ ++// pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; ++ ++ ++ ++ Hal_InitPGData88E(padapter); ++ readAdapterInfo_8188ES(padapter); ++} ++ ++static VOID ++_InitOtherVariable( ++ IN PADAPTER Adapter ++ ) ++{ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ ++ //if(Adapter->bInHctTest){ ++ // pMgntInfo->PowerSaveControl.bInactivePs = FALSE; ++ // pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; ++ // pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; ++ // pMgntInfo->keepAliveLevel = 0; ++ //} ++ ++ ++} ++ ++// ++// Description: ++// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported. ++// ++// Assumption: ++// PASSIVE_LEVEL (SDIO interface) ++// ++// ++static s32 _ReadAdapterInfo8188ES(PADAPTER padapter) ++{ ++ u32 start; ++ ++ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+_ReadAdapterInfo8188ES\n")); ++ ++ // before access eFuse, make sure card enable has been called ++ if(_CardEnable(padapter) == _FAIL) ++ { ++ DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); ++ return _FAIL; ++ } ++ ++ start = rtw_get_current_time(); ++ ++// Efuse_InitSomeVar(Adapter); ++// _EfuseCellSel(padapter); ++ ++ _ReadRFType(padapter);//rf_chip -> _InitRFType() ++ _ReadPROMContent(padapter); ++ ++ // 2010/10/25 MH THe function must be called after borad_type & IC-Version recognize. ++ //ReadSilmComboMode(Adapter); ++ _InitOtherVariable(padapter); ++ ++ ++ //MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n", __FUNCTION__, pHalData->rf_chip, pHalData->rf_type); ++ MSG_8192C("<==== ReadAdapterInfo8188ES in %d ms\n", rtw_get_passing_time_ms(start)); ++ ++ return _SUCCESS; ++} ++ ++static void ReadAdapterInfo8188ES(PADAPTER padapter) ++{ ++ // Read EEPROM size before call any EEPROM function ++ padapter->EepromAddressSize = GetEEPROMSize8188E(padapter); ++ ++ _ReadAdapterInfo8188ES(padapter); ++} ++ ++static void SetHwReg8188ES(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++_func_enter_; ++ ++ switch(variable) ++ { ++ case HW_VAR_RXDMA_AGG_PG_TH: ++ break; ++ ++ case HW_VAR_SET_RPWM: ++#ifdef CONFIG_LPS_LCLK ++ { ++ u8 ps_state = *((u8 *)val); ++ //rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. ++ //BIT0 value - 1: 32k, 0:40MHz. ++ //BIT6 value - 1: report cpwm value after success set, 0:do not report. ++ //BIT7 value - Toggle bit change. ++ //modify by Thomas. 2012/4/2. ++ ps_state = ps_state & 0xC1; ++ ++#ifdef CONFIG_EXT_CLK //for sprd ++ if(ps_state&BIT(6)) // want to leave 32k ++ { ++ //enable ext clock req before leave LPS-32K ++ //DBG_871X("enable ext clock req before leaving LPS-32K\n"); ++ EnableGpio5ClockReq(Adapter, _FALSE, 1); ++ } ++#endif //CONFIG_EXT_CLK ++ ++ //DBG_871X("##### Change RPWM value to = %x for switch clk #####\n",ps_state); ++ rtw_write8(Adapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, ps_state); ++ } ++#endif ++ break; ++ default: ++ SetHwReg8188E(Adapter, variable, val); ++ break; ++ } ++ ++_func_exit_; ++} ++ ++static void GetHwReg8188ES(PADAPTER padapter, u8 variable, u8 *val) ++{ ++ PHAL_DATA_TYPE pHalData= GET_HAL_DATA(padapter); ++_func_enter_; ++ ++ switch (variable) ++ { ++ case HW_VAR_CPWM: ++ *val = rtw_read8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HCPWM1); ++ break; ++ default: ++ GetHwReg8188E(padapter, variable, val); ++ break; ++ } ++ ++_func_exit_; ++} ++ ++// ++// Description: ++// Query setting of specified variable. ++// ++u8 ++GetHalDefVar8188ESDIO( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 bResult = _SUCCESS; ++ ++ switch(eVariable) ++ { ++ case HW_VAR_MAX_RX_AMPDU_FACTOR: ++ *(( u32*)pValue) = MAX_AMPDU_FACTOR_16K; ++ break; ++ ++ case HAL_DEF_TX_LDPC: ++ case HAL_DEF_RX_LDPC: ++ *((u8 *)pValue) = _FALSE; ++ break; ++ case HAL_DEF_TX_STBC: ++ *((u8 *)pValue) = 0; ++ break; ++ case HAL_DEF_RX_STBC: ++ *((u8 *)pValue) = 1; ++ break; ++ default: ++ bResult = GetHalDefVar8188E(Adapter, eVariable, pValue); ++ break; ++ } ++ ++ return bResult; ++} ++ ++ ++ ++ ++// ++// Description: ++// Change default setting of specified variable. ++// ++u8 ++SetHalDefVar8188ESDIO( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 bResult = _TRUE; ++ ++ switch(eVariable) ++ { ++ default: ++ bResult = SetHalDefVar(Adapter, eVariable, pValue); ++ break; ++ } ++ ++ return bResult; ++} ++ ++static VOID ++_BeaconFunctionEnable( ++ IN PADAPTER padapter, ++ IN BOOLEAN Enable, ++ IN BOOLEAN Linked ++ ) ++{ ++ rtw_write8(padapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); ++// RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("_BeaconFunctionEnable 0x550 0x%x\n", rtw_read8(padapter, 0x550))); ++ ++ rtw_write8(padapter, REG_RD_CTRL+1, 0x6F); ++} ++ ++void SetBeaconRelatedRegisters8188ESdio(PADAPTER padapter) ++{ ++ u32 value32; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u32 bcn_ctrl_reg = REG_BCN_CTRL; ++ //reset TSF, enable update TSF, correcting TSF On Beacon ++ ++ //REG_BCN_INTERVAL ++ //REG_BCNDMATIM ++ //REG_ATIMWND ++ //REG_TBTT_PROHIBIT ++ //REG_DRVERLYINT ++ //REG_BCN_MAX_ERR ++ //REG_BCNTCFG //(0x510) ++ //REG_DUAL_TSF_RST ++ //REG_BCN_CTRL //(0x550) ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->iface_type == IFACE_PORT1){ ++ bcn_ctrl_reg = REG_BCN_CTRL_1; ++ } ++#endif ++ // ++ // ATIM window ++ // ++ rtw_write16(padapter, REG_ATIMWND, 2); ++ ++ // ++ // Beacon interval (in unit of TU). ++ // ++ rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); ++ ++ _InitBeaconParameters(padapter); ++ ++ rtw_write8(padapter, REG_SLOT, 0x09); ++ ++ // ++ // Force beacon frame transmission even after receiving beacon frame from other ad hoc STA ++ // ++ //PlatformEFIOWrite1Byte(Adapter, BCN_ERR_THRESH, 0x0a); // We force beacon sent to prevent unexpect disconnect status in Ad hoc mode ++ ++ // ++ // Reset TSF Timer to zero, added by Roger. 2008.06.24 ++ // ++ value32 = rtw_read32(padapter, REG_TCR); ++ value32 &= ~TSFRST; ++ rtw_write32(padapter, REG_TCR, value32); ++ ++ value32 |= TSFRST; ++ rtw_write32(padapter, REG_TCR, value32); ++ ++ // TODO: Modify later (Find the right parameters) ++ // NOTE: Fix test chip's bug (about contention windows's randomness) ++// if (OpMode == RT_OP_MODE_IBSS || OpMode == RT_OP_MODE_AP) ++ if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_AP_STATE) == _TRUE) ++ { ++ rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); ++ rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); ++ } ++ ++ _BeaconFunctionEnable(padapter, _TRUE, _TRUE); ++ ++ ResumeTxBeacon(padapter); ++ rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg)|BIT(1)); ++} ++ ++void rtl8188es_set_hal_ops(PADAPTER padapter) ++{ ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ ++_func_enter_; ++ ++ pHalFunc->hal_power_on = _InitPowerOn_8188ES; ++ pHalFunc->hal_power_off = hal_poweroff_8188es; ++ ++ pHalFunc->hal_init = &rtl8188es_hal_init; ++ pHalFunc->hal_deinit = &rtl8188es_hal_deinit; ++ ++ pHalFunc->init_xmit_priv = &rtl8188es_init_xmit_priv; ++ pHalFunc->free_xmit_priv = &rtl8188es_free_xmit_priv; ++ ++ pHalFunc->init_recv_priv = &rtl8188es_init_recv_priv; ++ pHalFunc->free_recv_priv = &rtl8188es_free_recv_priv; ++ ++ pHalFunc->InitSwLeds = &rtl8188es_InitSwLeds; ++ pHalFunc->DeInitSwLeds = &rtl8188es_DeInitSwLeds; ++ ++ pHalFunc->init_default_value = &rtl8188es_init_default_value; ++ pHalFunc->intf_chip_configure = &rtl8188es_interface_configure; ++ pHalFunc->read_adapter_info = &ReadAdapterInfo8188ES; ++ ++ pHalFunc->enable_interrupt = &EnableInterrupt8188ESdio; ++ pHalFunc->disable_interrupt = &DisableInterrupt8188ESdio; ++ pHalFunc->check_ips_status = &CheckIPSStatus; ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ pHalFunc->clear_interrupt = &ClearInterrupt8188ESdio; ++#endif ++ pHalFunc->SetHwRegHandler = &SetHwReg8188ES; ++ pHalFunc->GetHwRegHandler = &GetHwReg8188ES; ++ ++ pHalFunc->GetHalDefVarHandler = &GetHalDefVar8188ESDIO; ++ pHalFunc->SetHalDefVarHandler = &SetHalDefVar8188ESDIO; ++ ++ pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188ESdio; ++ ++ pHalFunc->hal_xmit = &rtl8188es_hal_xmit; ++ pHalFunc->mgnt_xmit = &rtl8188es_mgnt_xmit; ++ pHalFunc->hal_xmitframe_enqueue = &rtl8188es_hal_xmitframe_enqueue; ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ pHalFunc->hostap_mgnt_xmit_entry = NULL; ++#endif ++#ifdef CONFIG_XMIT_THREAD_MODE ++ pHalFunc->xmit_thread_handler = &rtl8188es_xmit_buf_handler; ++#endif ++ rtl8188e_set_hal_ops(pHalFunc); ++_func_exit_; ++ ++} ++ +diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/sdio_ops.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/sdio_ops.c +new file mode 100644 +index 0000000..869b44c +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188e/sdio/sdio_ops.c +@@ -0,0 +1,1929 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#define _SDIO_OPS_C_ ++ ++#include ++ ++//#define SDIO_DEBUG_IO 1 ++ ++#ifdef CONFIG_EXT_CLK ++void EnableGpio5ClockReq(PADAPTER Adapter, u8 in_interrupt, u32 Enable); ++#endif //CONFIG_EXT_CLK ++// ++// Description: ++// The following mapping is for SDIO host local register space. ++// ++// Creadted by Roger, 2011.01.31. ++// ++static void HalSdioGetCmdAddr8723ASdio( ++ IN PADAPTER padapter, ++ IN u8 DeviceID, ++ IN u32 Addr, ++ OUT u32* pCmdAddr ++ ) ++{ ++ switch (DeviceID) ++ { ++ case SDIO_LOCAL_DEVICE_ID: ++ *pCmdAddr = ((SDIO_LOCAL_DEVICE_ID << 13) | (Addr & SDIO_LOCAL_MSK)); ++ break; ++ ++ case WLAN_IOREG_DEVICE_ID: ++ *pCmdAddr = ((WLAN_IOREG_DEVICE_ID << 13) | (Addr & WLAN_IOREG_MSK)); ++ break; ++ ++ case WLAN_TX_HIQ_DEVICE_ID: ++ *pCmdAddr = ((WLAN_TX_HIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); ++ break; ++ ++ case WLAN_TX_MIQ_DEVICE_ID: ++ *pCmdAddr = ((WLAN_TX_MIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); ++ break; ++ ++ case WLAN_TX_LOQ_DEVICE_ID: ++ *pCmdAddr = ((WLAN_TX_LOQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); ++ break; ++ ++ case WLAN_RX0FF_DEVICE_ID: ++ *pCmdAddr = ((WLAN_RX0FF_DEVICE_ID << 13) | (Addr & WLAN_RX0FF_MSK)); ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++static u8 get_deviceid(u32 addr) ++{ ++ u8 devideId; ++ u16 pseudoId; ++ ++ ++ pseudoId = (u16)(addr >> 16); ++ switch (pseudoId) ++ { ++ case 0x1025: ++ devideId = SDIO_LOCAL_DEVICE_ID; ++ break; ++ ++ case 0x1026: ++ devideId = WLAN_IOREG_DEVICE_ID; ++ break; ++ ++// case 0x1027: ++// devideId = SDIO_FIRMWARE_FIFO; ++// break; ++ ++ case 0x1031: ++ devideId = WLAN_TX_HIQ_DEVICE_ID; ++ break; ++ ++ case 0x1032: ++ devideId = WLAN_TX_MIQ_DEVICE_ID; ++ break; ++ ++ case 0x1033: ++ devideId = WLAN_TX_LOQ_DEVICE_ID; ++ break; ++ ++ case 0x1034: ++ devideId = WLAN_RX0FF_DEVICE_ID; ++ break; ++ ++ default: ++// devideId = (u8)((addr >> 13) & 0xF); ++ devideId = WLAN_IOREG_DEVICE_ID; ++ break; ++ } ++ ++ return devideId; ++} ++ ++/* ++ * Ref: ++ * HalSdioGetCmdAddr8723ASdio() ++ */ ++static u32 _cvrt2ftaddr(const u32 addr, u8 *pdeviceId, u16 *poffset) ++{ ++ u8 deviceId; ++ u16 offset; ++ u32 ftaddr; ++ ++ ++ deviceId = get_deviceid(addr); ++ offset = 0; ++ ++ switch (deviceId) ++ { ++ case SDIO_LOCAL_DEVICE_ID: ++ offset = addr & SDIO_LOCAL_MSK; ++ break; ++ ++ case WLAN_TX_HIQ_DEVICE_ID: ++ case WLAN_TX_MIQ_DEVICE_ID: ++ case WLAN_TX_LOQ_DEVICE_ID: ++ offset = addr & WLAN_FIFO_MSK; ++ break; ++ ++ case WLAN_RX0FF_DEVICE_ID: ++ offset = addr & WLAN_RX0FF_MSK; ++ break; ++ ++ case WLAN_IOREG_DEVICE_ID: ++ default: ++ deviceId = WLAN_IOREG_DEVICE_ID; ++ offset = addr & WLAN_IOREG_MSK; ++ break; ++ } ++ ftaddr = (deviceId << 13) | offset; ++ ++ if (pdeviceId) *pdeviceId = deviceId; ++ if (poffset) *poffset = offset; ++ ++ return ftaddr; ++} ++ ++u8 _sdio_read8(PADAPTER padapter, u32 addr) ++{ ++ struct intf_hdl * pintfhdl; ++ u32 ftaddr; ++ u8 val; ++ ++_func_enter_; ++ ++ //psdiodev = pintfhdl->pintf_dev; ++ //psdio = &psdiodev->intf_data; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ ++ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); ++ val = _sd_read8(pintfhdl, ftaddr, NULL); ++ ++_func_exit_; ++ ++ return val; ++} ++ ++u8 sdio_read8(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u32 ftaddr; ++ u8 val; ++ ++_func_enter_; ++ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); ++ val = sd_read8(pintfhdl, ftaddr, NULL); ++ ++_func_exit_; ++ ++ return val; ++} ++ ++u16 sdio_read16(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u32 ftaddr; ++ u16 val; ++ ++_func_enter_; ++ ++ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); ++ sd_cmd52_read(pintfhdl, ftaddr, 2, (u8*)&val); ++ val = le16_to_cpu(val); ++ ++_func_exit_; ++ ++ return val; ++} ++ ++u32 _sdio_read32(PADAPTER padapter, u32 addr) ++{ ++ //PADAPTER padapter; ++ ++ struct intf_hdl * pintfhdl; ++ u8 bMacPwrCtrlOn; ++ u8 deviceId; ++ u16 offset; ++ u32 ftaddr; ++ u8 shift; ++ u32 val; ++ s32 err; ++ ++_func_enter_; ++ ++ //padapter = pintfhdl->padapter; ++ //psdiodev = pintfhdl->pintf_dev; ++ pintfhdl=&padapter->iopriv.intf; ++ ++ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ++ || (_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = _sd_cmd52_read(pintfhdl, ftaddr, 4, (u8*)&val); ++#ifdef SDIO_DEBUG_IO ++ if (!err) { ++#endif ++ val = le32_to_cpu(val); ++ return val; ++#ifdef SDIO_DEBUG_IO ++ } ++ ++ DBG_871X(KERN_ERR "%s: Mac Power off, Read FAIL(%d)! addr=0x%x\n", __func__, err, addr); ++ return SDIO_ERR_VAL32; ++#endif ++ } ++ ++ // 4 bytes alignment ++ shift = ftaddr & 0x3; ++ if (shift == 0) { ++ val = _sd_read32(pintfhdl, ftaddr, NULL); ++ } else { ++ u8 *ptmpbuf; ++ ++ ptmpbuf = (u8*)rtw_malloc(8); ++ if (NULL == ptmpbuf) { ++ DBG_871X(KERN_ERR "%s: Allocate memory FAIL!(size=8) addr=0x%x\n", __func__, addr); ++ return SDIO_ERR_VAL32; ++ } ++ ++ ftaddr &= ~(u16)0x3; ++ _sd_read(pintfhdl, ftaddr, 8, ptmpbuf); ++ _rtw_memcpy(&val, ptmpbuf+shift, 4); ++ val = le32_to_cpu(val); ++ ++ rtw_mfree(ptmpbuf, 8); ++ } ++ ++_func_exit_; ++ ++ return val; ++} ++ ++u32 sdio_read32(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ PADAPTER padapter; ++ u8 bMacPwrCtrlOn; ++ u8 deviceId; ++ u16 offset; ++ u32 ftaddr; ++ u8 shift; ++ u32 val; ++ s32 err; ++ ++_func_enter_; ++ ++ padapter = pintfhdl->padapter; ++ ++ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ++ || (_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = sd_cmd52_read(pintfhdl, ftaddr, 4, (u8*)&val); ++#ifdef SDIO_DEBUG_IO ++ if (!err) { ++#endif ++ val = le32_to_cpu(val); ++ return val; ++#ifdef SDIO_DEBUG_IO ++ } ++ ++ DBG_871X(KERN_ERR "%s: Mac Power off, Read FAIL(%d)! addr=0x%x\n", __func__, err, addr); ++ return SDIO_ERR_VAL32; ++#endif ++ } ++ ++ // 4 bytes alignment ++ shift = ftaddr & 0x3; ++ if (shift == 0) { ++ val = sd_read32(pintfhdl, ftaddr, NULL); ++ } else { ++ u8 *ptmpbuf; ++ ++ ptmpbuf = (u8*)rtw_malloc(8); ++ if (NULL == ptmpbuf) { ++ DBG_871X(KERN_ERR "%s: Allocate memory FAIL!(size=8) addr=0x%x\n", __func__, addr); ++ return SDIO_ERR_VAL32; ++ } ++ ++ ftaddr &= ~(u16)0x3; ++ sd_read(pintfhdl, ftaddr, 8, ptmpbuf); ++ _rtw_memcpy(&val, ptmpbuf+shift, 4); ++ val = le32_to_cpu(val); ++ ++ rtw_mfree(ptmpbuf, 8); ++ } ++ ++_func_exit_; ++ ++ return val; ++} ++ ++s32 sdio_readN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8* pbuf) ++{ ++ PADAPTER padapter; ++ u8 bMacPwrCtrlOn; ++ u8 deviceId; ++ u16 offset; ++ u32 ftaddr; ++ u8 shift; ++ s32 err; ++ ++_func_enter_; ++ ++ padapter = pintfhdl->padapter; ++ err = 0; ++ ++ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ++ || (_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = sd_cmd52_read(pintfhdl, ftaddr, cnt, pbuf); ++ return err; ++ } ++ ++ // 4 bytes alignment ++ shift = ftaddr & 0x3; ++ if (shift == 0) { ++ err = sd_read(pintfhdl, ftaddr, cnt, pbuf); ++ } else { ++ u8 *ptmpbuf; ++ u32 n; ++ ++ ftaddr &= ~(u16)0x3; ++ n = cnt + shift; ++ ptmpbuf = rtw_malloc(n); ++ if (NULL == ptmpbuf) return -1; ++ err = sd_read(pintfhdl, ftaddr, n, ptmpbuf); ++ if (!err) ++ _rtw_memcpy(pbuf, ptmpbuf+shift, cnt); ++ rtw_mfree(ptmpbuf, n); ++ } ++ ++_func_exit_; ++ ++ return err; ++} ++ ++s32 sdio_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) ++{ ++ u32 ftaddr; ++ s32 err; ++ ++_func_enter_; ++ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); ++ sd_write8(pintfhdl, ftaddr, val, &err); ++ ++_func_exit_; ++ ++ return err; ++} ++ ++s32 sdio_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) ++{ ++ u32 ftaddr; ++ u8 shift; ++ s32 err; ++ ++_func_enter_; ++ ++ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); ++ val = cpu_to_le16(val); ++ err = sd_cmd52_write(pintfhdl, ftaddr, 2, (u8*)&val); ++ ++_func_exit_; ++ ++ return err; ++} ++ ++s32 _sdio_write32(PADAPTER padapter, u32 addr, u32 val) ++{ ++ //PADAPTER padapter; ++ struct intf_hdl * pintfhdl; ++ u8 bMacPwrCtrlOn; ++ u8 deviceId; ++ u16 offset; ++ u32 ftaddr; ++ u8 shift; ++ s32 err; ++ ++_func_enter_; ++ ++ //padapter = pintfhdl->padapter; ++ //psdiodev = pintfhdl->pintf_dev; ++ pintfhdl=&padapter->iopriv.intf; ++ err = 0; ++ ++ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ++ || (_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ val = cpu_to_le32(val); ++ err = _sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); ++ return err; ++ } ++ ++ // 4 bytes alignment ++ shift = ftaddr & 0x3; ++#if 1 ++ if (shift == 0) ++ { ++ _sd_write32(pintfhdl, ftaddr, val, &err); ++ } ++ else ++ { ++ val = cpu_to_le32(val); ++ err = _sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); ++ } ++#else ++ if (shift == 0) { ++ sd_write32(pintfhdl, ftaddr, val, &err); ++ } else { ++ u8 *ptmpbuf; ++ ++ ptmpbuf = (u8*)rtw_malloc(8); ++ if (NULL == ptmpbuf) return (-1); ++ ++ ftaddr &= ~(u16)0x3; ++ err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf); ++ if (err) { ++ rtw_mfree(ptmpbuf, 8); ++ return err; ++ } ++ val = cpu_to_le32(val); ++ _rtw_memcpy(ptmpbuf+shift, &val, 4); ++ err = sd_write(pintfhdl, ftaddr, 8, ptmpbuf); ++ ++ rtw_mfree(ptmpbuf, 8); ++ } ++#endif ++ ++_func_exit_; ++ ++ return err; ++} ++ ++ ++s32 sdio_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) ++{ ++ PADAPTER padapter; ++ u8 bMacPwrCtrlOn; ++ u8 deviceId; ++ u16 offset; ++ u32 ftaddr; ++ u8 shift; ++ s32 err; ++ ++_func_enter_; ++ ++ padapter = pintfhdl->padapter; ++ err = 0; ++ ++ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ++ || (_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ val = cpu_to_le32(val); ++ err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); ++ return err; ++ } ++ ++ // 4 bytes alignment ++ shift = ftaddr & 0x3; ++#if 1 ++ if (shift == 0) ++ { ++ sd_write32(pintfhdl, ftaddr, val, &err); ++ } ++ else ++ { ++ val = cpu_to_le32(val); ++ err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); ++ } ++#else ++ if (shift == 0) { ++ sd_write32(pintfhdl, ftaddr, val, &err); ++ } else { ++ u8 *ptmpbuf; ++ ++ ptmpbuf = (u8*)rtw_malloc(8); ++ if (NULL == ptmpbuf) return (-1); ++ ++ ftaddr &= ~(u16)0x3; ++ err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf); ++ if (err) { ++ rtw_mfree(ptmpbuf, 8); ++ return err; ++ } ++ val = cpu_to_le32(val); ++ _rtw_memcpy(ptmpbuf+shift, &val, 4); ++ err = sd_write(pintfhdl, ftaddr, 8, ptmpbuf); ++ ++ rtw_mfree(ptmpbuf, 8); ++ } ++#endif ++ ++_func_exit_; ++ ++ return err; ++} ++ ++s32 sdio_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8* pbuf) ++{ ++ PADAPTER padapter; ++ u8 bMacPwrCtrlOn; ++ u8 deviceId; ++ u16 offset; ++ u32 ftaddr; ++ u8 shift; ++ s32 err; ++ ++_func_enter_; ++ ++ padapter = pintfhdl->padapter; ++ err = 0; ++ ++ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ++ || (_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = sd_cmd52_write(pintfhdl, ftaddr, cnt, pbuf); ++ return err; ++ } ++ ++ shift = ftaddr & 0x3; ++ if (shift == 0) { ++ err = sd_write(pintfhdl, ftaddr, cnt, pbuf); ++ } else { ++ u8 *ptmpbuf; ++ u32 n; ++ ++ ftaddr &= ~(u16)0x3; ++ n = cnt + shift; ++ ptmpbuf = rtw_malloc(n); ++ if (NULL == ptmpbuf) return -1; ++ err = sd_read(pintfhdl, ftaddr, 4, ptmpbuf); ++ if (err) { ++ rtw_mfree(ptmpbuf, n); ++ return err; ++ } ++ _rtw_memcpy(ptmpbuf+shift, pbuf, cnt); ++ err = sd_write(pintfhdl, ftaddr, n, ptmpbuf); ++ rtw_mfree(ptmpbuf, n); ++ } ++ ++_func_exit_; ++ ++ return err; ++} ++ ++u8 sdio_f0_read8(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u32 ftaddr; ++ u8 val; ++ ++_func_enter_; ++ val = sd_f0_read8(pintfhdl, addr, NULL); ++ ++_func_exit_; ++ ++ return val; ++} ++ ++void sdio_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ s32 err; ++ ++_func_enter_; ++ ++ err = sdio_readN(pintfhdl, addr, cnt, rmem); ++ ++_func_exit_; ++} ++ ++void sdio_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++_func_enter_; ++ ++ sdio_writeN(pintfhdl, addr, cnt, wmem); ++ ++_func_exit_; ++} ++ ++/* ++ * Description: ++ * Read from RX FIFO ++ * Round read size to block size, ++ * and make sure data transfer will be done in one command. ++ * ++ * Parameters: ++ * pintfhdl a pointer of intf_hdl ++ * addr port ID ++ * cnt size to read ++ * rmem address to put data ++ * ++ * Return: ++ * _SUCCESS(1) Success ++ * _FAIL(0) Fail ++ */ ++static u32 sdio_read_port( ++ struct intf_hdl *pintfhdl, ++ u32 addr, ++ u32 cnt, ++ u8 *mem) ++{ ++ PADAPTER padapter = pintfhdl->padapter; ++ PSDIO_DATA psdio= &adapter_to_dvobj(padapter)->intf_data; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ s32 err; ++ ++ HalSdioGetCmdAddr8723ASdio(padapter, addr, pHalData->SdioRxFIFOCnt++, &addr); ++ ++ ++ cnt = _RND4(cnt); ++ if (cnt > psdio->block_transfer_len) ++ cnt = _RND(cnt, psdio->block_transfer_len); ++ ++// cnt = sdio_align_size(cnt); ++ ++ err = _sd_read(pintfhdl, addr, cnt, mem); ++ //err = sd_read(pintfhdl, addr, cnt, mem); ++ ++ ++ ++ if (err) return _FAIL; ++ return _SUCCESS; ++} ++ ++/* ++ * Description: ++ * Write to TX FIFO ++ * Align write size block size, ++ * and make sure data could be written in one command. ++ * ++ * Parameters: ++ * pintfhdl a pointer of intf_hdl ++ * addr port ID ++ * cnt size to write ++ * wmem data pointer to write ++ * ++ * Return: ++ * _SUCCESS(1) Success ++ * _FAIL(0) Fail ++ */ ++static u32 sdio_write_port( ++ struct intf_hdl *pintfhdl, ++ u32 addr, ++ u32 cnt, ++ u8 *mem) ++{ ++ PADAPTER padapter; ++ PSDIO_DATA psdio; ++ s32 err; ++ struct xmit_buf *xmitbuf = (struct xmit_buf *)mem; ++ ++ padapter = pintfhdl->padapter; ++ psdio = &adapter_to_dvobj(padapter)->intf_data; ++ ++ if (!rtw_is_hw_init_completed(padapter)) { ++ DBG_871X("%s [addr=0x%x cnt=%d] padapter->hw_init_completed == _FALSE\n",__func__,addr,cnt); ++ return _FAIL; ++ } ++ ++ cnt = _RND4(cnt); ++ HalSdioGetCmdAddr8723ASdio(padapter, addr, cnt >> 2, &addr); ++ ++ if (cnt > psdio->block_transfer_len) ++ cnt = _RND(cnt, psdio->block_transfer_len); ++// cnt = sdio_align_size(cnt); ++ ++ err = sd_write(pintfhdl, addr, cnt, xmitbuf->pdata); ++ ++ rtw_sctx_done_err(&xmitbuf->sctx, ++ err ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); ++ ++ if (err) ++ { ++ DBG_871X("%s, error=%d\n", __func__, err); ++ ++ return _FAIL; ++ } ++ return _SUCCESS; ++} ++ ++void sdio_set_intf_ops(_adapter *padapter,struct _io_ops *pops) ++{ ++_func_enter_; ++ ++ pops->_read8 = &sdio_read8; ++ pops->_read16 = &sdio_read16; ++ pops->_read32 = &sdio_read32; ++ pops->_read_mem = &sdio_read_mem; ++ pops->_read_port = &sdio_read_port; ++ ++ pops->_write8 = &sdio_write8; ++ pops->_write16 = &sdio_write16; ++ pops->_write32 = &sdio_write32; ++ pops->_writeN = &sdio_writeN; ++ pops->_write_mem = &sdio_write_mem; ++ pops->_write_port = &sdio_write_port; ++ ++ pops->_sd_f0_read8 = sdio_f0_read8; ++ ++_func_exit_; ++} ++ ++/* ++ * Todo: align address to 4 bytes. ++ */ ++s32 _sdio_local_read( ++ PADAPTER padapter, ++ u32 addr, ++ u32 cnt, ++ u8 *pbuf) ++{ ++ struct intf_hdl * pintfhdl; ++ u8 bMacPwrCtrlOn; ++ s32 err; ++ u8 *ptmpbuf; ++ u32 n; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if ((_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++// || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = _sd_cmd52_read(pintfhdl, addr, cnt, pbuf); ++ return err; ++ } ++ ++ n = RND4(cnt); ++ ptmpbuf = (u8*)rtw_malloc(n); ++ if(!ptmpbuf) ++ return (-1); ++ ++ err = _sd_read(pintfhdl, addr, n, ptmpbuf); ++ if (!err) ++ _rtw_memcpy(pbuf, ptmpbuf, cnt); ++ ++ if(ptmpbuf) ++ rtw_mfree(ptmpbuf, n); ++ ++ return err; ++} ++ ++/* ++ * Todo: align address to 4 bytes. ++ */ ++s32 sdio_local_read( ++ PADAPTER padapter, ++ u32 addr, ++ u32 cnt, ++ u8 *pbuf) ++{ ++ struct intf_hdl * pintfhdl; ++ u8 bMacPwrCtrlOn; ++ s32 err; ++ u8 *ptmpbuf; ++ u32 n; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if ((_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = sd_cmd52_read(pintfhdl, addr, cnt, pbuf); ++ return err; ++ } ++ ++ n = RND4(cnt); ++ ptmpbuf = (u8*)rtw_malloc(n); ++ if(!ptmpbuf) ++ return (-1); ++ ++ err = sd_read(pintfhdl, addr, n, ptmpbuf); ++ if (!err) ++ _rtw_memcpy(pbuf, ptmpbuf, cnt); ++ ++ if(ptmpbuf) ++ rtw_mfree(ptmpbuf, n); ++ ++ return err; ++} ++ ++/* ++ * Todo: align address to 4 bytes. ++ */ ++s32 _sdio_local_write( ++ PADAPTER padapter, ++ u32 addr, ++ u32 cnt, ++ u8 *pbuf) ++{ ++ struct intf_hdl * pintfhdl; ++ u8 bMacPwrCtrlOn; ++ s32 err; ++ u8 *ptmpbuf; ++ ++ if(addr & 0x3) ++ DBG_8192C("%s, address must be 4 bytes alignment\n", __FUNCTION__); ++ ++ if(cnt & 0x3) ++ DBG_8192C("%s, size must be the multiple of 4 \n", __FUNCTION__); ++ ++ pintfhdl=&padapter->iopriv.intf; ++ ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if ((_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++// || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = _sd_cmd52_write(pintfhdl, addr, cnt, pbuf); ++ return err; ++ } ++ ++ ptmpbuf = (u8*)rtw_malloc(cnt); ++ if(!ptmpbuf) ++ return (-1); ++ ++ _rtw_memcpy(ptmpbuf, pbuf, cnt); ++ ++ err = _sd_write(pintfhdl, addr, cnt, ptmpbuf); ++ ++ if (ptmpbuf) ++ rtw_mfree(ptmpbuf, cnt); ++ ++ return err; ++} ++ ++/* ++ * Todo: align address to 4 bytes. ++ */ ++s32 sdio_local_write( ++ PADAPTER padapter, ++ u32 addr, ++ u32 cnt, ++ u8 *pbuf) ++{ ++ ++ struct intf_hdl * pintfhdl; ++ u8 bMacPwrCtrlOn; ++ s32 err; ++ u8 *ptmpbuf; ++ ++ if(addr & 0x3) ++ DBG_8192C("%s, address must be 4 bytes alignment\n", __FUNCTION__); ++ ++ if(cnt & 0x3) ++ DBG_8192C("%s, size must be the multiple of 4 \n", __FUNCTION__); ++ ++ pintfhdl=&padapter->iopriv.intf; ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if ((_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ err = sd_cmd52_write(pintfhdl, addr, cnt, pbuf); ++ return err; ++ } ++ ++ ptmpbuf = (u8*)rtw_malloc(cnt); ++ if(!ptmpbuf) ++ return (-1); ++ ++ _rtw_memcpy(ptmpbuf, pbuf, cnt); ++ ++ err = sd_write(pintfhdl, addr, cnt, ptmpbuf); ++ ++ if (ptmpbuf) ++ rtw_mfree(ptmpbuf, cnt); ++ ++ return err; ++} ++ ++u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr) ++{ ++ struct intf_hdl * pintfhdl; ++ u8 val = 0; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ sd_cmd52_read(pintfhdl, addr, 1, &val); ++ ++ return val; ++} ++ ++u16 SdioLocalCmd52Read2Byte(PADAPTER padapter, u32 addr) ++{ ++ struct intf_hdl * pintfhdl; ++ u16 val = 0; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ sd_cmd52_read(pintfhdl, addr, 2, (u8*)&val); ++ ++ val = le16_to_cpu(val); ++ ++ return val; ++} ++ ++u32 SdioLocalCmd52Read4Byte(PADAPTER padapter, u32 addr) ++{ ++ struct intf_hdl * pintfhdl; ++ u32 val = 0; ++ ++ ++ pintfhdl=&padapter->iopriv.intf; ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ sd_cmd52_read(pintfhdl, addr, 4, (u8*)&val); ++ ++ val = le32_to_cpu(val); ++ ++ return val; ++} ++ ++u32 SdioLocalCmd53Read4Byte(PADAPTER padapter, u32 addr) ++{ ++ struct intf_hdl * pintfhdl; ++ u8 bMacPwrCtrlOn; ++ u32 val=0; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); ++ if ((_FALSE == bMacPwrCtrlOn) ++#ifdef CONFIG_LPS_LCLK ++ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) ++#endif ++ ) ++ { ++ sd_cmd52_read(pintfhdl, addr, 4, (u8*)&val); ++ val = le32_to_cpu(val); ++ } ++ else ++ val = sd_read32(pintfhdl, addr, NULL); ++ ++ return val; ++} ++ ++void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v) ++{ ++ struct intf_hdl * pintfhdl; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ sd_cmd52_write(pintfhdl, addr, 1, &v); ++} ++ ++void SdioLocalCmd52Write2Byte(PADAPTER padapter, u32 addr, u16 v) ++{ ++ struct intf_hdl * pintfhdl; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ v = cpu_to_le16(v); ++ sd_cmd52_write(pintfhdl, addr, 2, (u8*)&v); ++} ++ ++void SdioLocalCmd52Write4Byte(PADAPTER padapter, u32 addr, u32 v) ++{ ++ struct intf_hdl * pintfhdl; ++ ++ pintfhdl=&padapter->iopriv.intf; ++ HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ v = cpu_to_le32(v); ++ sd_cmd52_write(pintfhdl, addr, 4, (u8*)&v); ++} ++ ++#if 0 ++void ++DumpLoggedInterruptHistory8723Sdio( ++ PADAPTER padapter ++) ++{ ++ HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); ++ u4Byte DebugLevel = DBG_LOUD; ++ ++ if (DBG_Var.DbgPrintIsr == 0) ++ return; ++ ++ DBG_ChkDrvResource(padapter); ++ ++ ++ if(pHalData->InterruptLog.nISR_RX_REQUEST) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RX_REQUEST[%ld]\t\n", pHalData->InterruptLog.nISR_RX_REQUEST)); ++ ++ if(pHalData->InterruptLog.nISR_AVAL) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# AVAL[%ld]\t\n", pHalData->InterruptLog.nISR_AVAL)); ++ ++ if(pHalData->InterruptLog.nISR_TXERR) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXERR[%ld]\t\n", pHalData->InterruptLog.nISR_TXERR)); ++ ++ if(pHalData->InterruptLog.nISR_RXERR) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RXERR[%ld]\t\n", pHalData->InterruptLog.nISR_RXERR)); ++ ++ if(pHalData->InterruptLog.nISR_TXFOVW) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXFOVW[%ld]\t\n", pHalData->InterruptLog.nISR_TXFOVW)); ++ ++ if(pHalData->InterruptLog.nISR_RXFOVW) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RXFOVW[%ld]\t\n", pHalData->InterruptLog.nISR_RXFOVW)); ++ ++ if(pHalData->InterruptLog.nISR_TXBCNOK) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXBCNOK[%ld]\t\n", pHalData->InterruptLog.nISR_TXBCNOK)); ++ ++ if(pHalData->InterruptLog.nISR_TXBCNERR) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXBCNERR[%ld]\t\n", pHalData->InterruptLog.nISR_TXBCNERR)); ++ ++ if(pHalData->InterruptLog.nISR_BCNERLY_INT) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# BCNERLY_INT[%ld]\t\n", pHalData->InterruptLog.nISR_BCNERLY_INT)); ++ ++ if(pHalData->InterruptLog.nISR_C2HCMD) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# C2HCMD[%ld]\t\n", pHalData->InterruptLog.nISR_C2HCMD)); ++ ++ if(pHalData->InterruptLog.nISR_CPWM1) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CPWM1L[%ld]\t\n", pHalData->InterruptLog.nISR_CPWM1)); ++ ++ if(pHalData->InterruptLog.nISR_CPWM2) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CPWM2[%ld]\t\n", pHalData->InterruptLog.nISR_CPWM2)); ++ ++ if(pHalData->InterruptLog.nISR_HSISR_IND) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# HSISR_IND[%ld]\t\n", pHalData->InterruptLog.nISR_HSISR_IND)); ++ ++ if(pHalData->InterruptLog.nISR_GTINT3_IND) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# GTINT3_IND[%ld]\t\n", pHalData->InterruptLog.nISR_GTINT3_IND)); ++ ++ if(pHalData->InterruptLog.nISR_GTINT4_IND) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# GTINT4_IND[%ld]\t\n", pHalData->InterruptLog.nISR_GTINT4_IND)); ++ ++ if(pHalData->InterruptLog.nISR_PSTIMEOUT) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# PSTIMEOUT[%ld]\t\n", pHalData->InterruptLog.nISR_PSTIMEOUT)); ++ ++ if(pHalData->InterruptLog.nISR_OCPINT) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# OCPINT[%ld]\t\n", pHalData->InterruptLog.nISR_OCPINT)); ++ ++ if(pHalData->InterruptLog.nISR_ATIMEND) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# ATIMEND[%ld]\t\n", pHalData->InterruptLog.nISR_ATIMEND)); ++ ++ if(pHalData->InterruptLog.nISR_ATIMEND_E) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# ATIMEND_E[%ld]\t\n", pHalData->InterruptLog.nISR_ATIMEND_E)); ++ ++ if(pHalData->InterruptLog.nISR_CTWEND) ++ RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CTWEND[%ld]\t\n", pHalData->InterruptLog.nISR_CTWEND)); ++} ++ ++void ++LogInterruptHistory8723Sdio( ++ PADAPTER padapter, ++ PRT_ISR_CONTENT pIsrContent ++) ++{ ++ HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); ++ ++ if((pHalData->IntrMask[0] & SDIO_HIMR_RX_REQUEST_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_RX_REQUEST)) ++ pHalData->InterruptLog.nISR_RX_REQUEST ++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_AVAL_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_AVAL)) ++ pHalData->InterruptLog.nISR_AVAL++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_TXERR_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_TXERR)) ++ pHalData->InterruptLog.nISR_TXERR++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_RXERR_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_RXERR)) ++ pHalData->InterruptLog.nISR_RXERR++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_TXFOVW_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_TXFOVW)) ++ pHalData->InterruptLog.nISR_TXFOVW++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_RXFOVW_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_RXFOVW)) ++ pHalData->InterruptLog.nISR_RXFOVW++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNOK_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNOK)) ++ pHalData->InterruptLog.nISR_TXBCNOK++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNERR_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNERR)) ++ pHalData->InterruptLog.nISR_TXBCNERR++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_BCNERLY_INT_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_BCNERLY_INT)) ++ pHalData->InterruptLog.nISR_BCNERLY_INT ++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_C2HCMD_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_C2HCMD)) ++ pHalData->InterruptLog.nISR_C2HCMD++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_CPWM1_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_CPWM1)) ++ pHalData->InterruptLog.nISR_CPWM1++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_CPWM2_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_CPWM2)) ++ pHalData->InterruptLog.nISR_CPWM2++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_HSISR_IND_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_HSISR_IND)) ++ pHalData->InterruptLog.nISR_HSISR_IND++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_GTINT3_IND_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_GTINT3_IND)) ++ pHalData->InterruptLog.nISR_GTINT3_IND++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_GTINT4_IND_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_GTINT4_IND)) ++ pHalData->InterruptLog.nISR_GTINT4_IND++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_PSTIMEOUT_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_PSTIMEOUT)) ++ pHalData->InterruptLog.nISR_PSTIMEOUT++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_OCPINT_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_OCPINT)) ++ pHalData->InterruptLog.nISR_OCPINT++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND)) ++ pHalData->InterruptLog.nISR_ATIMEND++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_E_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND_E)) ++ pHalData->InterruptLog.nISR_ATIMEND_E++; ++ if((pHalData->IntrMask[0] & SDIO_HIMR_CTWEND_MSK) && ++ (pIsrContent->IntArray[0] & SDIO_HISR_CTWEND)) ++ pHalData->InterruptLog.nISR_CTWEND++; ++ ++} ++ ++void ++DumpHardwareProfile8723Sdio( ++ IN PADAPTER padapter ++) ++{ ++ DumpLoggedInterruptHistory8723Sdio(padapter); ++} ++#endif ++ ++// ++// Description: ++// Initialize SDIO Host Interrupt Mask configuration variables for future use. ++// ++// Assumption: ++// Using SDIO Local register ONLY for configuration. ++// ++// Created by Roger, 2011.02.11. ++// ++void InitInterrupt8188ESdio(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData; ++ ++ ++ pHalData = GET_HAL_DATA(padapter); ++ pHalData->sdio_himr = (u32)( \ ++ SDIO_HIMR_RX_REQUEST_MSK | ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ SDIO_HIMR_AVAL_MSK | ++#endif ++// SDIO_HIMR_TXERR_MSK | ++// SDIO_HIMR_RXERR_MSK | ++// SDIO_HIMR_TXFOVW_MSK | ++// SDIO_HIMR_RXFOVW_MSK | ++// SDIO_HIMR_TXBCNOK_MSK | ++// SDIO_HIMR_TXBCNERR_MSK | ++#ifdef CONFIG_EXT_CLK //for sprd ++ SDIO_HIMR_BCNERLY_INT_MSK | ++#endif //CONFIG_EXT_CLK ++// SDIO_HIMR_C2HCMD_MSK | ++#ifdef CONFIG_LPS_LCLK ++ SDIO_HIMR_CPWM1_MSK | ++ SDIO_HIMR_CPWM2_MSK | ++#endif ++// SDIO_HIMR_HSISR_IND_MSK | ++// SDIO_HIMR_GTINT3_IND_MSK | ++// SDIO_HIMR_GTINT4_IND_MSK | ++// SDIO_HIMR_PSTIMEOUT_MSK | ++// SDIO_HIMR_OCPINT_MSK | ++// SDIO_HIMR_ATIMEND_MSK | ++// SDIO_HIMR_ATIMEND_E_MSK | ++// SDIO_HIMR_CTWEND_MSK | ++ 0); ++} ++ ++// ++// Description: ++// Clear corresponding SDIO Host ISR interrupt service. ++// ++// Assumption: ++// Using SDIO Local register ONLY for configuration. ++// ++// Created by Roger, 2011.02.11. ++// ++void ClearInterrupt8723ASdio(PADAPTER padapter) ++{ ++ u32 tmp = 0; ++ tmp = SdioLocalCmd52Read4Byte(padapter, SDIO_REG_HISR); ++ SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HISR, tmp); ++// padapter->IsrContent.IntArray[0] = 0; ++ padapter->IsrContent = 0; ++} ++ ++// ++// Description: ++// Enalbe SDIO Host Interrupt Mask configuration on SDIO local domain. ++// ++// Assumption: ++// 1. Using SDIO Local register ONLY for configuration. ++// 2. PASSIVE LEVEL ++// ++// Created by Roger, 2011.02.11. ++// ++void EnableInterrupt8188ESdio(PADAPTER padapter) ++{ ++ PHAL_DATA_TYPE pHalData; ++ u32 himr; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ himr = cpu_to_le32(pHalData->sdio_himr); ++ sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); ++ ++ ++ // ++ // There are some C2H CMDs have been sent before system interrupt is enabled, e.g., C2H, CPWM. ++ // So we need to clear all C2H events that FW has notified, otherwise FW won't schedule any commands anymore. ++ // 2011.10.19. ++ // ++ rtw_write8(padapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); ++ ++} ++ ++// ++// Description: ++// Disable SDIO Host IMR configuration to mask unnecessary interrupt service. ++// ++// Assumption: ++// Using SDIO Local register ONLY for configuration. ++// ++// Created by Roger, 2011.02.11. ++// ++void DisableInterrupt8188ESdio(PADAPTER padapter) ++{ ++ u32 himr; ++ ++ himr = cpu_to_le32(SDIO_HIMR_DISABLED); ++ sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); ++ ++} ++ ++// ++// Description: ++// Update SDIO Host Interrupt Mask configuration on SDIO local domain. ++// ++// Assumption: ++// 1. Using SDIO Local register ONLY for configuration. ++// 2. PASSIVE LEVEL ++// ++// Created by Roger, 2011.02.11. ++// ++void UpdateInterruptMask8188ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR) ++{ ++ HAL_DATA_TYPE *pHalData; ++ pHalData = GET_HAL_DATA(padapter); ++ ++ if (AddMSR) ++ pHalData->sdio_himr |= AddMSR; ++ ++ if (RemoveMSR) ++ pHalData->sdio_himr &= (~RemoveMSR); ++ ++ DisableInterrupt8188ESdio(padapter); ++ EnableInterrupt8188ESdio(padapter); ++} ++ ++// ++// Description: ++// Using 0x100 to check the power status of FW. ++// ++// Assumption: ++// Using SDIO Local register ONLY for configuration. ++// ++// Created by Isaac, 2013.09.10. ++// ++u8 CheckIPSStatus(PADAPTER padapter) ++{ ++ DBG_871X("%s(): Read 0x100=0x%02x 0x86=0x%02x\n", __func__, ++ rtw_read8(padapter, 0x100),rtw_read8(padapter, 0x86)); ++ ++ if (rtw_read8(padapter, 0x100) == 0xEA) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void ClearInterrupt8188ESdio(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u32 v32 = 0; ++ ++ DBG_8192C("+%s+\n", __func__); ++ ++ v32 = pHalData->sdio_himr | SDIO_HISR_CPWM2; ++ ++ pHalData->sdio_hisr &= v32; ++ ++ // clear HISR ++ v32 = pHalData->sdio_hisr & MASK_SDIO_HISR_CLEAR; ++ if (v32) { ++ v32 = cpu_to_le32(v32); ++ sdio_local_write(padapter, SDIO_REG_HISR, 4, (u8*)&v32); ++ } ++ ++ DBG_8192C("-%s-\n", __func__); ++} ++#endif ++ ++#ifdef CONFIG_MAC_LOOPBACK_DRIVER ++static void sd_recv_loopback(PADAPTER padapter, u32 size) ++{ ++ PLOOPBACKDATA ploopback; ++ u32 readsize, allocsize; ++ u8 *preadbuf; ++ ++ ++ readsize = size; ++ DBG_8192C("%s: read size=%d\n", __func__, readsize); ++ allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len); ++ ++ ploopback = padapter->ploopback; ++ if (ploopback) { ++ ploopback->rxsize = readsize; ++ preadbuf = ploopback->rxbuf; ++ } ++ else { ++ preadbuf = rtw_malloc(allocsize); ++ if (preadbuf == NULL) { ++ DBG_8192C("%s: malloc fail size=%d\n", __func__, allocsize); ++ return; ++ } ++ } ++ ++// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); ++ sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); ++ ++ if (ploopback) ++ _rtw_up_sema(&ploopback->sema); ++ else { ++ u32 i; ++ ++ DBG_8192C("%s: drop pkt\n", __func__); ++ for (i = 0; i < readsize; i+=4) { ++ DBG_8192C("%08X", *(u32*)(preadbuf + i)); ++ if ((i+4) & 0x1F) printk(" "); ++ else printk("\n"); ++ } ++ printk("\n"); ++ rtw_mfree(preadbuf, allocsize); ++ } ++} ++#endif // CONFIG_MAC_LOOPBACK_DRIVER ++ ++#ifdef CONFIG_SDIO_RX_COPY ++static struct recv_buf* sd_recv_rxfifo(PADAPTER padapter, u32 size) ++{ ++ u32 readsize, ret; ++ u32 max_recvbuf_sz = 0; ++ u8 *preadbuf; ++ struct recv_priv *precvpriv; ++ struct recv_buf *precvbuf; ++ ++ ++ readsize = size; ++ ++ //3 1. alloc recvbuf ++ precvpriv = &padapter->recvpriv; ++ precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); ++ if (precvbuf == NULL) { ++ RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc recvbuf FAIL!\n", __FUNCTION__)); ++ return NULL; ++ } ++ ++ //3 2. alloc skb ++ if (precvbuf->pskb == NULL) { ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ ++ DBG_871X("%s: alloc_skb for rx buffer\n", __FUNCTION__); ++ ++ rtw_hal_get_def_var(padapter, ++ HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ ++ if (max_recvbuf_sz == 0) ++ max_recvbuf_sz = MAX_RECVBUF_SZ; ++ ++ precvbuf->pskb = rtw_skb_alloc(max_recvbuf_sz + ++ RECVBUFF_ALIGN_SZ); ++ ++ if(precvbuf->pskb) ++ { ++ precvbuf->pskb->dev = padapter->pnetdev; ++ ++ tmpaddr = (SIZE_PTR)precvbuf->pskb->data; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ precvbuf->phead = precvbuf->pskb->head; ++ precvbuf->pdata = precvbuf->pskb->data; ++ precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); ++ precvbuf->pend = skb_end_pointer(precvbuf->pskb); ++ precvbuf->len = 0; ++ } ++ ++ if (precvbuf->pskb == NULL) { ++ DBG_871X("%s: alloc_skb fail! read=%d\n", __FUNCTION__, readsize); ++ return NULL; ++ } ++ } ++ ++ //3 3. read data from rxfifo ++ preadbuf = precvbuf->pdata; ++// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); ++ ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); ++ if (ret == _FAIL) { ++ RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n", __FUNCTION__)); ++ return NULL; ++ } ++ ++ ++ //3 4. init recvbuf ++ precvbuf->len = readsize; ++ ++ return precvbuf; ++} ++#else ++static struct recv_buf* sd_recv_rxfifo(PADAPTER padapter, u32 size) ++{ ++ u32 readsize, allocsize, ret; ++ u8 *preadbuf; ++ _pkt *ppkt; ++ struct recv_priv *precvpriv; ++ struct recv_buf *precvbuf; ++ ++ ++ readsize = size; ++ ++ //3 1. alloc skb ++ // align to block size ++ allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len); ++ ++ ppkt = rtw_skb_alloc(allocsize); ++ ++ if (ppkt == NULL) { ++ RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc_skb fail! alloc=%d read=%d\n", __FUNCTION__, allocsize, readsize)); ++ return NULL; ++ } ++ ++ //3 2. read data from rxfifo ++ preadbuf = skb_put(ppkt, readsize); ++// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); ++ ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); ++ if (ret == _FAIL) { ++ rtw_skb_free(ppkt); ++ RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n", __FUNCTION__)); ++ return NULL; ++ } ++ ++ //3 3. alloc recvbuf ++ precvpriv = &padapter->recvpriv; ++ precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); ++ if (precvbuf == NULL) { ++ rtw_skb_free(ppkt); ++ RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc recvbuf FAIL!\n", __FUNCTION__)); ++ return NULL; ++ } ++ ++ //3 4. init recvbuf ++ precvbuf->pskb = ppkt; ++ ++ precvbuf->len = ppkt->len; ++ ++ precvbuf->phead = ppkt->head; ++ precvbuf->pdata = ppkt->data; ++ precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); ++ precvbuf->pend = skb_end_pointer(precvbuf->pskb); ++ ++ return precvbuf; ++} ++#endif ++ ++static void sd_rxhandler(PADAPTER padapter, struct recv_buf *precvbuf) ++{ ++ struct recv_priv *precvpriv; ++ _queue *ppending_queue; ++ ++ ++ precvpriv = &padapter->recvpriv; ++ ppending_queue = &precvpriv->recv_buf_pending_queue; ++ ++ //3 1. enqueue recvbuf ++ rtw_enqueue_recvbuf(precvbuf, ppending_queue); ++ ++ //3 2. schedule tasklet ++#ifdef PLATFORM_LINUX ++ tasklet_schedule(&precvpriv->recv_tasklet); ++#endif ++} ++ ++void sd_int_dpc(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct intf_hdl * pintfhdl=&padapter->iopriv.intf; ++ ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++ if (pHalData->sdio_hisr & SDIO_HISR_AVAL) ++ { ++ //_irqL irql; ++ u8 freepage[4]; ++ ++ _sdio_local_read(padapter, SDIO_REG_FREE_TXPG, 4, freepage); ++ //_enter_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); ++ //_rtw_memcpy(pHalData->SdioTxFIFOFreePage, freepage, 4); ++ //_exit_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); ++ //DBG_871X("SDIO_HISR_AVAL, Tx Free Page = 0x%x%x%x%x\n", ++ // freepage[0], ++ // freepage[1], ++ // freepage[2], ++ // freepage[3]); ++ _rtw_up_sema(&(padapter->xmitpriv.xmit_sema)); ++ } ++#endif ++ if (pHalData->sdio_hisr & SDIO_HISR_CPWM1) ++ { ++ struct reportpwrstate_parm report; ++ ++#ifdef CONFIG_LPS_RPWM_TIMER ++ u8 bcancelled; ++ _cancel_timer(&(adapter_to_pwrctl(padapter)->pwr_rpwm_timer), &bcancelled); ++#endif // CONFIG_LPS_RPWM_TIMER ++ ++ _sdio_local_read(padapter, SDIO_REG_HCPWM1, 1, &report.state); ++#ifdef CONFIG_LPS_LCLK ++ //88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. ++ //modify by Thomas. 2012/4/2. ++ ++#ifdef CONFIG_EXT_CLK //for sprd ++ if(report.state & BIT(4)) //indicate FW entering 32k ++ { ++ u8 chk_cnt = 0; ++ ++ do{ ++ if(_sdio_read8(padapter, 0x90)&BIT(0))//FW in 32k already ++ { ++ if(pwrpriv->rpwm < PS_STATE_S2) ++ { ++ //DBG_871X("disable ext clk when FW in LPS-32K already!\n"); ++ EnableGpio5ClockReq(padapter, _TRUE, 0); ++ } ++ ++ break; ++ } ++ ++ chk_cnt++; ++ ++ }while(chk_cnt<10); ++ ++ if(chk_cnt==10) ++ { ++ DBG_871X("polling fw in 32k already, fail!\n"); ++ } ++ ++ } ++ else //indicate fw leaving 32K ++#endif //CONFIG_EXT_CLK ++ { ++ report.state |= PS_STATE_S2; ++ //cpwm_int_hdl(padapter, &report); ++ _set_workitem(&(pwrpriv->cpwm_event)); ++ } ++#endif ++ } ++ ++#ifdef CONFIG_WOWLAN ++ if (pHalData->sdio_hisr & SDIO_HISR_CPWM2) { ++ u32 value; ++ value = rtw_read32(padapter, SDIO_LOCAL_BASE+SDIO_REG_HISR); ++ DBG_871X_LEVEL(_drv_always_, "Reset SDIO HISR(0x%08x) original:0x%08x\n", ++ SDIO_LOCAL_BASE+SDIO_REG_HISR, value); ++ value |= BIT19; ++ rtw_write32(padapter, SDIO_LOCAL_BASE+SDIO_REG_HISR, value); ++ ++ value = rtw_read8(padapter, SDIO_LOCAL_BASE+SDIO_REG_HIMR+2); ++ DBG_871X_LEVEL(_drv_always_, "Reset SDIO HIMR CPWM2(0x%08x) original:0x%02x\n", ++ SDIO_LOCAL_BASE+SDIO_REG_HIMR + 2, value); ++ } ++#endif ++ if (pHalData->sdio_hisr & SDIO_HISR_TXERR) ++ { ++ u8 *status; ++ u32 addr; ++ ++ status = rtw_malloc(4); ++ if (status) ++ { ++ addr = REG_TXDMA_STATUS; ++ HalSdioGetCmdAddr8723ASdio(padapter, WLAN_IOREG_DEVICE_ID, addr, &addr); ++ _sd_read(pintfhdl, addr, 4, status); ++ _sd_write(pintfhdl, addr, 4, status); ++ DBG_8192C("%s: SDIO_HISR_TXERR (0x%08x)\n", __func__, le32_to_cpu(*(u32*)status)); ++ rtw_mfree(status, 4); ++ } else { ++ DBG_8192C("%s: SDIO_HISR_TXERR, but can't allocate memory to read status!\n", __func__); ++ } ++ } ++ ++#ifdef CONFIG_INTERRUPT_BASED_TXBCN ++ ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT ++ if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT) ++ #endif ++ #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR ++ if (pHalData->sdio_hisr & (SDIO_HISR_TXBCNOK|SDIO_HISR_TXBCNERR)) ++ #endif ++ { ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ #if 0 //for debug ++ if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT) ++ DBG_8192C("%s: SDIO_HISR_BCNERLY_INT\n", __func__); ++ ++ if (pHalData->sdio_hisr & SDIO_HISR_TXBCNOK) ++ DBG_8192C("%s: SDIO_HISR_TXBCNOK\n", __func__); ++ ++ if (pHalData->sdio_hisr & SDIO_HISR_TXBCNERR) ++ DBG_8192C("%s: SDIO_HISR_TXBCNERR\n", __func__); ++ #endif ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ //send_beacon(padapter); ++ if(pmlmepriv->update_bcn == _TRUE) ++ { ++ //tx_beacon_hdl(padapter, NULL); ++ set_tx_beacon_cmd(padapter); ++ } ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, WIFI_AP_STATE)) ++ { ++ //send_beacon(padapter); ++ if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE) ++ { ++ //tx_beacon_hdl(padapter, NULL); ++ set_tx_beacon_cmd(padapter->pbuddy_adapter); ++ } ++ } ++#endif ++ } ++#endif //CONFIG_INTERRUPT_BASED_TXBCN ++ ++#ifdef CONFIG_EXT_CLK ++ if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT) ++ { ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE)) ++ { ++ //DBG_8192C("BCNERLY_INT for enabling ext clk\n"); ++ EnableGpio5ClockReq(padapter, _TRUE, 1); ++ } ++ } ++#endif //CONFIG_EXT_CLK ++ ++ if (pHalData->sdio_hisr & SDIO_HISR_C2HCMD) ++ { ++ DBG_8192C("%s: C2H Command\n", __func__); ++ } ++ ++ if (pHalData->sdio_hisr & SDIO_HISR_RX_REQUEST) ++ { ++ struct recv_buf *precvbuf; ++ ++ //DBG_8192C("%s: RX Request, size=%d\n", __func__, phal->SdioRxFIFOSize); ++ pHalData->sdio_hisr ^= SDIO_HISR_RX_REQUEST; ++#ifdef CONFIG_MAC_LOOPBACK_DRIVER ++ sd_recv_loopback(padapter, pHalData->SdioRxFIFOSize); ++#else ++ do { ++ //Sometimes rx length will be zero. driver need to use cmd53 read again. ++ if(pHalData->SdioRxFIFOSize == 0) ++ { ++ u8 data[4]; ++ ++ _sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 4, data); ++ ++ pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16*)data); ++ } ++ ++ if(pHalData->SdioRxFIFOSize) ++ { ++ precvbuf = sd_recv_rxfifo(padapter, pHalData->SdioRxFIFOSize); ++ ++ pHalData->SdioRxFIFOSize = 0; ++ ++ if (precvbuf) ++ sd_rxhandler(padapter, precvbuf); ++ else ++ break; ++ } ++ else ++ break; ++#ifdef CONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP ++ } while (0); ++#else ++ } while (1); ++#endif ++#endif ++ ++ } ++ ++} ++ ++void sd_int_hdl(PADAPTER padapter) ++{ ++ u8 data[6]; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ if (RTW_CANNOT_RUN(padapter)) ++ return; ++ ++ _sdio_local_read(padapter, SDIO_REG_HISR, 6, data); ++ pHalData->sdio_hisr = le32_to_cpu(*(u32*)data); ++ pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16*)&data[4]); ++ ++ if (pHalData->sdio_hisr & pHalData->sdio_himr) ++ { ++ u32 v32; ++ ++ pHalData->sdio_hisr &= pHalData->sdio_himr; ++ ++ // clear HISR ++ v32 = pHalData->sdio_hisr & MASK_SDIO_HISR_CLEAR; ++ if (v32) { ++ v32 = cpu_to_le32(v32); ++ _sdio_local_write(padapter, SDIO_REG_HISR, 4, (u8*)&v32); ++ } ++ ++ sd_int_dpc(padapter); ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_c_, _drv_err_, ++ ("%s: HISR(0x%08x) and HIMR(0x%08x) not match!\n", ++ __FUNCTION__, pHalData->sdio_hisr, pHalData->sdio_himr)); ++ } ++ ++} ++ ++// ++// Description: ++// Query SDIO Local register to query current the number of Free TxPacketBuffer page. ++// ++// Assumption: ++// 1. Running at PASSIVE_LEVEL ++// 2. RT_TX_SPINLOCK is NOT acquired. ++// ++// Created by Roger, 2011.01.28. ++// ++u8 HalQueryTxBufferStatus8189ESdio(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u32 NumOfFreePage; ++ //_irqL irql; ++ ++ ++ pHalData = GET_HAL_DATA(padapter); ++ ++ NumOfFreePage = SdioLocalCmd53Read4Byte(padapter, SDIO_REG_FREE_TXPG); ++ ++ //_enter_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); ++ _rtw_memcpy(pHalData->SdioTxFIFOFreePage, &NumOfFreePage, 4); ++ RT_TRACE(_module_hci_ops_c_, _drv_notice_, ++ ("%s: Free page for HIQ(%#x),MIDQ(%#x),LOWQ(%#x),PUBQ(%#x)\n", ++ __FUNCTION__, ++ pHalData->SdioTxFIFOFreePage[HI_QUEUE_IDX], ++ pHalData->SdioTxFIFOFreePage[MID_QUEUE_IDX], ++ pHalData->SdioTxFIFOFreePage[LOW_QUEUE_IDX], ++ pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX])); ++ //_exit_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); ++ ++ return _TRUE; ++} ++ ++// ++// Description: ++// Query SDIO Local register to get the current number of TX OQT Free Space. ++// ++u8 HalQueryTxOQTBufferStatus8189ESdio(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->SdioTxOQTFreeSpace = SdioLocalCmd52Read1Byte(padapter, 0x0025/*SDIO_REG_OQT_FREE_PG*/); ++ return _TRUE; ++} ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++u8 RecvOnePkt(PADAPTER padapter, u32 size) ++{ ++ struct recv_buf *precvbuf; ++ struct dvobj_priv *psddev; ++ PSDIO_DATA psdio_data; ++ struct sdio_func *func; ++ ++ u8 res = _FALSE; ++ ++ DBG_8192C("+%s: size: %d+\n", __func__, size); ++ ++ if (padapter == NULL) { ++ DBG_8192C(KERN_ERR "%s: padapter is NULL!\n", __func__); ++ return _FALSE; ++ } ++ ++ psddev = padapter->dvobj; ++ psdio_data = &psddev->intf_data; ++ func = psdio_data->func; ++ ++ if(size) { ++ sdio_claim_host(func); ++ precvbuf = sd_recv_rxfifo(padapter, size); ++ ++ if (precvbuf) { ++ //printk("Completed Recv One Pkt.\n"); ++ sd_rxhandler(padapter, precvbuf); ++ res = _TRUE; ++ }else{ ++ res = _FALSE; ++ } ++ sdio_release_host(func); ++ } ++ DBG_8192C("-%s-\n", __func__); ++ return res; ++} ++#endif //CONFIG_WOWLAN diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/Hal8188FPwrSeq.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/Hal8188FPwrSeq.c new file mode 100644 -index 000000000..277f85b21 +index 0000000..277f85b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/Hal8188FPwrSeq.c @@ -0,0 +1,99 @@ @@ -242951,7 +284373,7 @@ index 000000000..277f85b21 +}; diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_cmd.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_cmd.c new file mode 100644 -index 000000000..d7b776062 +index 0000000..d7b7760 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_cmd.c @@ -0,0 +1,1313 @@ @@ -244270,7 +285692,7 @@ index 000000000..d7b776062 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_dm.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_dm.c new file mode 100644 -index 000000000..748bb1b81 +index 0000000..748bb1b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_dm.c @@ -0,0 +1,623 @@ @@ -244899,7 +286321,7 @@ index 000000000..748bb1b81 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_hal_init.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_hal_init.c new file mode 100644 -index 000000000..33cfd16fe +index 0000000..33cfd16 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_hal_init.c @@ -0,0 +1,7165 @@ @@ -252070,7 +293492,7 @@ index 000000000..33cfd16fe + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_phycfg.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_phycfg.c new file mode 100644 -index 000000000..4cce75479 +index 0000000..4cce754 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_phycfg.c @@ -0,0 +1,1567 @@ @@ -253643,7 +295065,7 @@ index 000000000..4cce75479 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_rf6052.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_rf6052.c new file mode 100644 -index 000000000..940b31998 +index 0000000..940b319 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_rf6052.c @@ -0,0 +1,297 @@ @@ -253946,7 +295368,7 @@ index 000000000..940b31998 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_rxdesc.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_rxdesc.c new file mode 100644 -index 000000000..de910607e +index 0000000..de91060 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_rxdesc.c @@ -0,0 +1,69 @@ @@ -254021,7 +295443,7 @@ index 000000000..de910607e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_sreset.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_sreset.c new file mode 100644 -index 000000000..e7f7e3bf7 +index 0000000..e7f7e3b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/rtl8188f_sreset.c @@ -0,0 +1,109 @@ @@ -254136,140 +295558,140 @@ index 000000000..e7f7e3bf7 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_led.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_led.c new file mode 100644 -index 000000000..b9eed1891 +index 0000000..1bf9f81 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_led.c @@ -0,0 +1,127 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#define _RTL8188FS_LED_C_ -+ -+#include "rtl8188f_hal.h" -+ -+//================================================================================ -+// LED object. -+//================================================================================ -+ -+ -+//================================================================================ -+// Prototype of protected function. -+//================================================================================ -+ -+//================================================================================ -+// LED_819xUsb routines. -+//================================================================================ -+ -+// -+// Description: -+// Turn on LED according to LedPin specified. -+// -+void -+SwLedOn_8188FS( -+ _adapter *padapter, -+ PLED_SDIO pLed -+) -+{ -+ u8 LedCfg; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return; -+ -+ pLed->bLedOn = _TRUE; -+ -+} -+ -+ -+// -+// Description: -+// Turn off LED according to LedPin specified. -+// -+void -+SwLedOff_8188FS( -+ _adapter *padapter, -+ PLED_SDIO pLed -+) -+{ -+ u8 LedCfg; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ goto exit; -+ -+exit: -+ pLed->bLedOn = _FALSE; -+ -+} -+ -+//================================================================================ -+// Interface to manipulate LED objects. -+//================================================================================ -+ -+//================================================================================ -+// Default LED behavior. -+//================================================================================ -+ -+// -+// Description: -+// Initialize all LED_871x objects. -+// -+void -+rtl8188fs_InitSwLeds( -+ _adapter *padapter -+ ) -+{ -+#if 0 -+ struct led_priv *pledpriv = &(padapter->ledpriv); -+ -+ pledpriv->LedControlHandler = LedControlSDIO; -+ -+ pledpriv->SwLedOn = SwLedOn_8188FS; -+ pledpriv->SwLedOff = SwLedOff_8188FS; -+ -+ InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); -+ -+ InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); -+#endif -+} -+ -+ -+// -+// Description: -+// DeInitialize all LED_819xUsb objects. -+// -+void -+rtl8188fs_DeInitSwLeds( -+ _adapter *padapter -+ ) -+{ -+#if 0 -+ struct led_priv *ledpriv = &(padapter->ledpriv); -+ -+ DeInitLed871x( &(ledpriv->SwLed0) ); -+ DeInitLed871x( &(ledpriv->SwLed1) ); -+#endif -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8188FS_LED_C_ ++ ++#include "rtl8188f_hal.h" ++ ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++ ++//================================================================================ ++// LED_819xUsb routines. ++//================================================================================ ++ ++// ++// Description: ++// Turn on LED according to LedPin specified. ++// ++void ++SwLedOn_8188FS( ++ _adapter *padapter, ++ PLED_SDIO pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ return; ++ ++ pLed->bLedOn = _TRUE; ++ ++} ++ ++ ++// ++// Description: ++// Turn off LED according to LedPin specified. ++// ++void ++SwLedOff_8188FS( ++ _adapter *padapter, ++ PLED_SDIO pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ goto exit; ++ ++exit: ++ pLed->bLedOn = _FALSE; ++ ++} ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++ ++//================================================================================ ++// Default LED behavior. ++//================================================================================ ++ ++// ++// Description: ++// Initialize all LED_871x objects. ++// ++void ++rtl8188fs_InitSwLeds( ++ _adapter *padapter ++ ) ++{ ++#if 0 ++ struct led_priv *pledpriv = &(padapter->ledpriv); ++ ++ pledpriv->LedControlHandler = LedControlSDIO; ++ ++ pledpriv->SwLedOn = SwLedOn_8188FS; ++ pledpriv->SwLedOff = SwLedOff_8188FS; ++ ++ InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); ++ ++ InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); ++#endif ++} ++ ++ ++// ++// Description: ++// DeInitialize all LED_819xUsb objects. ++// ++void ++rtl8188fs_DeInitSwLeds( ++ _adapter *padapter ++ ) ++{ ++#if 0 ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ DeInitLed871x( &(ledpriv->SwLed0) ); ++ DeInitLed871x( &(ledpriv->SwLed1) ); ++#endif ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_recv.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_recv.c new file mode 100644 -index 000000000..5a4061e62 +index 0000000..5a4061e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_recv.c @@ -0,0 +1,711 @@ @@ -254986,7 +296408,7 @@ index 000000000..5a4061e62 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_xmit.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_xmit.c new file mode 100644 -index 000000000..45b92fbc8 +index 0000000..45b92fb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/rtl8189fs_xmit.c @@ -0,0 +1,769 @@ @@ -255761,7 +297183,7 @@ index 000000000..45b92fbc8 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/sdio_halinit.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/sdio_halinit.c new file mode 100644 -index 000000000..b60048571 +index 0000000..b600485 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/sdio_halinit.c @@ -0,0 +1,1886 @@ @@ -257653,7 +299075,7 @@ index 000000000..b60048571 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/sdio_ops.c b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/sdio_ops.c new file mode 100644 -index 000000000..316f0276d +index 0000000..316f027 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/hal/rtl8188f/sdio/sdio_ops.c @@ -0,0 +1,2350 @@ @@ -260007,1583 +301429,1594 @@ index 000000000..316f0276d +} +#endif //CONFIG_WOWLAN + +diff --git a/drivers/net/wireless/realtek/rtl8189fs/ifcfg-wlan0 b/drivers/net/wireless/realtek/rtl8189fs/ifcfg-wlan0 +new file mode 100644 +index 0000000..20dcbec +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/ifcfg-wlan0 +@@ -0,0 +1,4 @@ ++#DHCP client ++DEVICE=wlan0 ++BOOTPROTO=dhcp ++ONBOOT=yes +\ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPhyCfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPhyCfg.h new file mode 100644 -index 000000000..96c859422 +index 0000000..cbe8dcb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPhyCfg.h @@ -0,0 +1,274 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8188EPHYCFG_H__ -+#define __INC_HAL8188EPHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 //us -+#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+#define MAX_AGGR_NUM 0x0B -+#else -+#define MAX_AGGR_NUM 0x07 -+#endif // CONFIG_PCI_HCI -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+#define MAX_TX_COUNT_8188E 1 -+ -+/* BB/RF related */ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+// -+// BB and RF register read/write -+// -+u32 PHY_QueryBBReg8188E( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+void PHY_SetBBReg8188E( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+u32 PHY_QueryRFReg8188E( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+void PHY_SetRFReg8188E( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+ -+// -+// Initialization related function -+// -+/* MAC/BB/RF HAL config */ -+int PHY_MACConfig8188E(IN PADAPTER Adapter ); -+int PHY_BBConfig8188E(IN PADAPTER Adapter ); -+int PHY_RFConfig8188E(IN PADAPTER Adapter ); -+ -+/* RF config */ -+int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 * pFileName, u8 eRFPath); -+ -+// -+// RF Power setting -+// -+//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, -+// IN RT_RF_POWER_STATE eRFPowerState); -+ -+// -+// BB TX Power R/W -+// -+void PHY_GetTxPowerLevel8188E( IN PADAPTER Adapter, -+ OUT s32* powerlevel ); -+void PHY_SetTxPowerLevel8188E( IN PADAPTER Adapter, -+ IN u8 channel ); -+BOOLEAN PHY_UpdateTxPowerDbm8188E( IN PADAPTER Adapter, -+ IN int powerInDbm ); -+ -+VOID -+PHY_SetTxPowerIndex_8188E( -+ IN PADAPTER Adapter, -+ IN u32 PowerIndex, -+ IN u8 RFPath, -+ IN u8 Rate -+ ); -+ -+u8 -+PHY_GetTxPowerIndex_8188E( -+ IN PADAPTER pAdapter, -+ IN u8 RFPath, -+ IN u8 Rate, -+ IN CHANNEL_WIDTH BandWidth, -+ IN u8 Channel -+ ); -+ -+// -+// Switch bandwidth for 8192S -+// -+//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); -+void PHY_SetBWMode8188E( IN PADAPTER pAdapter, -+ IN CHANNEL_WIDTH ChnlWidth, -+ IN unsigned char Offset ); -+ -+// -+// Set FW CMD IO for 8192S. -+// -+//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, -+// IN IO_TYPE IOType); -+ -+// -+// Set A2 entry to fw for 8192S -+// -+extern void FillA2Entry8192C( IN PADAPTER Adapter, -+ IN u8 index, -+ IN u8* val); -+ -+ -+// -+// channel switch related funciton -+// -+//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); -+void PHY_SwChnl8188E( IN PADAPTER pAdapter, -+ IN u8 channel ); -+ -+VOID -+PHY_SetSwChnlBWMode8188E( -+ IN PADAPTER Adapter, -+ IN u8 channel, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset40, -+ IN u8 Offset80 -+); -+ -+// -+// BB/MAC/RF other monitor API -+// -+void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, -+ IN BOOLEAN bEnableMonitorMode ); -+ -+BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, -+ IN u32 eRFPath ); -+ -+VOID PHY_SetRFPathSwitch_8188E(IN PADAPTER pAdapter, IN BOOLEAN bMain); -+ -+extern VOID -+PHY_SwitchEphyParameter( -+ IN PADAPTER Adapter -+ ); -+ -+extern VOID -+PHY_EnableHostClkReq( -+ IN PADAPTER Adapter -+ ); -+ -+BOOLEAN -+SetAntennaConfig92C( -+ IN PADAPTER Adapter, -+ IN u8 DefaultAnt -+ ); -+ -+VOID -+storePwrIndexDiffRateOffset( -+ IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data -+ ); -+/*--------------------------Exported Function prototype---------------------*/ -+ -+// -+// Initialization related function -+// -+/* MAC/BB/RF HAL config */ -+//extern s32 PHY_MACConfig8723(PADAPTER padapter); -+//s32 PHY_BBConfig8723(PADAPTER padapter); -+//s32 PHY_RFConfig8723(PADAPTER padapter); -+ -+ -+ -+//================================================================== -+// Note: If SIC_ENABLE under PCIE, because of the slow operation -+// you should -+// 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows -+// 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. -+// -+#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) -+#define SIC_ENABLE 1 -+#define SIC_HW_SUPPORT 1 -+#else -+#define SIC_ENABLE 0 -+#define SIC_HW_SUPPORT 0 -+#endif -+//================================================================== -+ -+ -+#define SIC_MAX_POLL_CNT 5 -+ -+#if(SIC_HW_SUPPORT == 1) -+#define SIC_CMD_READY 0 -+#define SIC_CMD_PREWRITE 0x1 -+#if(RTL8188E_SUPPORT == 1) -+#define SIC_CMD_WRITE 0x40 -+#define SIC_CMD_PREREAD 0x2 -+#define SIC_CMD_READ 0x80 -+#define SIC_CMD_INIT 0xf0 -+#define SIC_INIT_VAL 0xff -+ -+#define SIC_INIT_REG 0x1b7 -+#define SIC_CMD_REG 0x1EB // 1byte -+#define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes -+#define SIC_DATA_REG 0x1EC // 1b0~1b3 -+#else -+#define SIC_CMD_WRITE 0x11 -+#define SIC_CMD_PREREAD 0x2 -+#define SIC_CMD_READ 0x12 -+#define SIC_CMD_INIT 0x1f -+#define SIC_INIT_VAL 0xff -+ -+#define SIC_INIT_REG 0x1b7 -+#define SIC_CMD_REG 0x1b6 // 1byte -+#define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes -+#define SIC_DATA_REG 0x1b0 // 1b0~1b3 -+#endif -+#else -+#define SIC_CMD_READY 0 -+#define SIC_CMD_WRITE 1 -+#define SIC_CMD_READ 2 -+ -+#if(RTL8188E_SUPPORT == 1) -+#define SIC_CMD_REG 0x1EB // 1byte -+#define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes -+#define SIC_DATA_REG 0x1EC // 1bc~1bf -+#else -+#define SIC_CMD_REG 0x1b8 // 1byte -+#define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes -+#define SIC_DATA_REG 0x1bc // 1bc~1bf -+#endif -+#endif -+ -+#if(SIC_ENABLE == 1) -+VOID SIC_Init(IN PADAPTER Adapter); -+#endif -+ -+ -+#endif // __INC_HAL8192CPHYCFG_H -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8188EPHYCFG_H__ ++#define __INC_HAL8188EPHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++#define MAX_TX_COUNT_8188E 1 ++ ++/* BB/RF related */ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 PHY_QueryBBReg8188E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetBBReg8188E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 PHY_QueryRFReg8188E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetRFReg8188E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8188E(IN PADAPTER Adapter ); ++int PHY_BBConfig8188E(IN PADAPTER Adapter ); ++int PHY_RFConfig8188E(IN PADAPTER Adapter ); ++ ++/* RF config */ ++int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 * pFileName, u8 eRFPath); ++ ++// ++// RF Power setting ++// ++//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, ++// IN RT_RF_POWER_STATE eRFPowerState); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8188E( IN PADAPTER Adapter, ++ OUT s32* powerlevel ); ++void PHY_SetTxPowerLevel8188E( IN PADAPTER Adapter, ++ IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8188E( IN PADAPTER Adapter, ++ IN int powerInDbm ); ++ ++VOID ++PHY_SetTxPowerIndex_8188E( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8188E( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++// ++// Switch bandwidth for 8192S ++// ++//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SetBWMode8188E( IN PADAPTER pAdapter, ++ IN CHANNEL_WIDTH ChnlWidth, ++ IN unsigned char Offset ); ++ ++// ++// Set FW CMD IO for 8192S. ++// ++//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, ++// IN IO_TYPE IOType); ++ ++// ++// Set A2 entry to fw for 8192S ++// ++extern void FillA2Entry8192C( IN PADAPTER Adapter, ++ IN u8 index, ++ IN u8* val); ++ ++ ++// ++// channel switch related funciton ++// ++//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SwChnl8188E( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++VOID ++PHY_SetSwChnlBWMode8188E( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++// ++// BB/MAC/RF other monitor API ++// ++void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, ++ IN u32 eRFPath ); ++ ++VOID PHY_SetRFPathSwitch_8188E(IN PADAPTER pAdapter, IN BOOLEAN bMain); ++ ++extern VOID ++PHY_SwitchEphyParameter( ++ IN PADAPTER Adapter ++ ); ++ ++extern VOID ++PHY_EnableHostClkReq( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++SetAntennaConfig92C( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++VOID ++storePwrIndexDiffRateOffset( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++/*--------------------------Exported Function prototype---------------------*/ ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++//extern s32 PHY_MACConfig8723(PADAPTER padapter); ++//s32 PHY_BBConfig8723(PADAPTER padapter); ++//s32 PHY_RFConfig8723(PADAPTER padapter); ++ ++ ++ ++//================================================================== ++// Note: If SIC_ENABLE under PCIE, because of the slow operation ++// you should ++// 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows ++// 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. ++// ++#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) ++#define SIC_ENABLE 1 ++#define SIC_HW_SUPPORT 1 ++#else ++#define SIC_ENABLE 0 ++#define SIC_HW_SUPPORT 0 ++#endif ++//================================================================== ++ ++ ++#define SIC_MAX_POLL_CNT 5 ++ ++#if(SIC_HW_SUPPORT == 1) ++#define SIC_CMD_READY 0 ++#define SIC_CMD_PREWRITE 0x1 ++#if(RTL8188E_SUPPORT == 1) ++#define SIC_CMD_WRITE 0x40 ++#define SIC_CMD_PREREAD 0x2 ++#define SIC_CMD_READ 0x80 ++#define SIC_CMD_INIT 0xf0 ++#define SIC_INIT_VAL 0xff ++ ++#define SIC_INIT_REG 0x1b7 ++#define SIC_CMD_REG 0x1EB // 1byte ++#define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes ++#define SIC_DATA_REG 0x1EC // 1b0~1b3 ++#else ++#define SIC_CMD_WRITE 0x11 ++#define SIC_CMD_PREREAD 0x2 ++#define SIC_CMD_READ 0x12 ++#define SIC_CMD_INIT 0x1f ++#define SIC_INIT_VAL 0xff ++ ++#define SIC_INIT_REG 0x1b7 ++#define SIC_CMD_REG 0x1b6 // 1byte ++#define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes ++#define SIC_DATA_REG 0x1b0 // 1b0~1b3 ++#endif ++#else ++#define SIC_CMD_READY 0 ++#define SIC_CMD_WRITE 1 ++#define SIC_CMD_READ 2 ++ ++#if(RTL8188E_SUPPORT == 1) ++#define SIC_CMD_REG 0x1EB // 1byte ++#define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes ++#define SIC_DATA_REG 0x1EC // 1bc~1bf ++#else ++#define SIC_CMD_REG 0x1b8 // 1byte ++#define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes ++#define SIC_DATA_REG 0x1bc // 1bc~1bf ++#endif ++#endif ++ ++#if(SIC_ENABLE == 1) ++VOID SIC_Init(IN PADAPTER Adapter); ++#endif ++ ++ ++#endif // __INC_HAL8192CPHYCFG_H ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPhyReg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPhyReg.h new file mode 100644 -index 000000000..b73300aa0 +index 0000000..2113a26 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPhyReg.h @@ -0,0 +1,1106 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8188EPHYREG_H__ -+#define __INC_HAL8188EPHYREG_H__ -+/*--------------------------Define Parameters-------------------------------*/ -+// -+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+// 3. RF register 0x00-2E -+// 4. Bit Mask for BB/RF register -+// 5. Other defintion for BB/RF R/W -+// -+ -+ -+// -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 1. Page1(0x100) -+// -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+// -+// 2. Page2(0x200) -+// -+// The following two definition are only used for USB interface. -+#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. -+#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. -+ -+// -+// 3. Page8(0x800) -+// -+#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? -+ -+#define rFPGA0_TxInfo 0x804 // Status report?? -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? -+ -+#define rFPGA0_RFTiming1 0x810 // Useless now -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 // Useless now -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 // Useless now -+#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback -+#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now -+ -+// -+// 4. Page9(0x900) -+// -+#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? -+ -+#define rFPGA1_TxBlock 0x904 // Useless now -+#define rFPGA1_DebugSelect 0x908 // Useless now -+#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? -+ -+// -+// 5. PageA(0xA00) -+// -+// Set Control channel to upper or lower. These settings are required only for 40MHz -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -+#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain -+ -+#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series -+#define rCCK0_RxAGC2 0xa10 //AGC & DAGC -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold -+#define rCCK0_DSPParameter2 0xa1c //SQ threshold -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -+#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 //0xa57 -+#define rCCK0_FACounterLower 0xa5c //0xa5b -+#define rCCK0_FACounterUpper 0xa58 //0xa5c -+ -+// -+// PageB(0xB00) -+// -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+ -+ -+// -+// 6. PageC(0xC00) -+// -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -+#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -+#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -+#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -+#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI -+ -+#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -+#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -+#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -+#define rOFDM0_ECCAThreshold 0xc4c // energy CCA -+ -+#define rOFDM0_XAAGCCore1 0xc50 // DIG -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+ -+// -+// 7. PageD(0xD00) -+// -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 // No setting now -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_csi_fix_mask1 0xd40 -+#define rOFDM1_csi_fix_mask2 0xd44 -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 //cca, parity fail -+#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail -+#define rOFDM_PHYCounter3 0xda8 //MCS not support -+ -+#define rOFDM_ShortCFOAB 0xdac // No setting now -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+// -+// 8. PageE(0xE00) -+// -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+// -+// 7. RF Register 0x00-0x2E (RF 8256) -+// RF-0222D 0x00-3F -+// -+//Zebra1 -+#define rZebra1_HSSIEnable 0x0 // Useless now -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 // RF channel switch -+ -+//#endif -+#define rZebra1_TxGain 0x8 // Useless now -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+//Zebra4 -+#define rGlobalCtrl 0 // Useless now -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+//RTL8258 -+#define rRTL8258_TxLPF 0x11 // Useless now -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+// -+// RL6052 Register definition -+// -+#define RF_AC 0x00 // -+ -+#define RF_IQADJ_G1 0x01 // -+#define RF_IQADJ_G2 0x02 // -+ -+#define RF_POW_TRSW 0x05 // -+ -+#define RF_GAIN_RX 0x06 // -+#define RF_GAIN_TX 0x07 // -+ -+#define RF_TXM_IDAC 0x08 // -+#define RF_IPA_G 0x09 // -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C // -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F // -+ -+#define RF_MODE1 0x10 // -+#define RF_MODE2 0x11 // -+ -+#define RF_RX_AGC_HP 0x12 // -+#define RF_TX_AGC 0x13 // -+#define RF_BIAS 0x14 // -+#define RF_IPA 0x15 // -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 // -+#define RF_CHNLBW 0x18 // RF channel and BW switch -+#define RF_TOP 0x19 // -+ -+#define RF_RX_G1 0x1A // -+#define RF_RX_G2 0x1B // -+ -+#define RF_RX_BB2 0x1C // -+#define RF_RX_BB1 0x1D // -+ -+#define RF_RCK1 0x1E // -+#define RF_RCK2 0x1F // -+ -+#define RF_TX_G1 0x20 // -+#define RF_TX_G2 0x21 // -+#define RF_TX_G3 0x22 // -+ -+#define RF_TX_BB1 0x23 // -+ -+#define RF_T_METER_88E 0x42 // -+#define RF_T_METER 0x24 // -+ -+#define RF_SYN_G1 0x25 // RF TX Power control -+#define RF_SYN_G2 0x26 // RF TX Power control -+#define RF_SYN_G3 0x27 // RF TX Power control -+#define RF_SYN_G4 0x28 // RF TX Power control -+#define RF_SYN_G5 0x29 // RF TX Power control -+#define RF_SYN_G6 0x2A // RF TX Power control -+#define RF_SYN_G7 0x2B // RF TX Power control -+#define RF_SYN_G8 0x2C // RF TX Power control -+ -+#define RF_RCK_OS 0x30 // RF TX PA control -+#define RF_TXPA_G1 0x31 // RF TX PA control -+#define RF_TXPA_G2 0x32 // RF TX PA control -+#define RF_TXPA_G3 0x33 // RF TX PA control -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C // -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+ -+ -+// -+//Bit Mask -+// -+// 1. Page1(0x100) -+#define bBBResetB 0x100 // Useless now? -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+ -+// 2. Page8(0x800) -+#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 // Useless now -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 // Useless now -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf //Reg0x814 -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 //T2R -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 //chane gain at continue Tx -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 // Useless now -+//#define bHWSISelect 0x8 -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW -+ -+#define bRFSI_TRSW 0x20 // Useless now -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 // T65 RF -+ -+#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal -+ -+#define bLSSIReadBackData 0xfffff // T65 RF -+ -+#define bLSSIReadOKFlag 0x1000 // Useless now -+#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ -+ -+#define b80MClkDelay 0x18000000 // Useless -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 // Useless -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+// 3. Page9(0x900) -+#define bOFDMTxSC 0x30000000 // Useless -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff //reset debug page and also HWord, LWord -+#define bDebugItem 0xff //reset debug page and LWord -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+// 4. PageA(0xA00) -+#define bCCKBBMode 0x3 // Useless -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch -+ -+#define bCCKScramble 0x8 // Useless -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 //r_rx_clk -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f //AGCsamp_dly -+#define bCCKFixedRxAGC 0x8000 -+//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+// 5. PageC(0xC00) -+#define bNumOfSTF 0x3 // Useless -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 //the threshold for high power -+#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+//#define bRxMF_Hold 0x3800 -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+// 6. PageE(0xE00) -+#define bSTBCEn 0x4 // Useless -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+//#define bRxPath1 0x01 -+//#define bRxPath2 0x02 -+//#define bRxPath3 0x04 -+//#define bRxPath4 0x08 -+//#define bTxPath1 0x10 -+//#define bTxPath2 0x20 -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 //total -+#define bShortCFOFLength 11 //fraction -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf // Useless -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 // Useless -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 // Useless -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+//Rx Pseduo noise -+#define bRxPesudoNoiseOn 0x20000000 // Useless -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+//7. RF Register -+//Zebra1 -+#define bZebra1_HSSIEnable 0x8 // Useless -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+//Zebra4 -+#define bRTL8256RegModeCtrl1 0x100 // Useless -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+//RTL8258 -+#define bRTL8258_TxLPFBW 0xc // Useless -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+// -+// Other Definition -+// -+ -+//byte endable for sb_write -+#define bByte0 0x1 // Useless -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+//for PutRegsetting & GetRegSetting BitMask -+#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+ -+#define bEnable 0x1 // Useless -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 // Useless -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 //500ms // Useless -+#define tUpdateRxCounter 100 //100ms -+ -+#define rateCCK 0 // Useless -+#define rateOFDM 1 -+#define rateHT 2 -+ -+//define Register-End -+#define bPMAC_End 0x1ff // Useless -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+//define max debug item in each debug page -+//#define bMaxItem_FPGA_PHY0 0x9 -+//#define bMaxItem_FPGA_PHY1 0x3 -+//#define bMaxItem_PHY_11B 0x16 -+//#define bMaxItem_OFDM_PHY0 0x29 -+//#define bMaxItem_OFDM_PHY1 0x0 -+ -+#define bPMACControl 0x0 // Useless -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 // Useless -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8188EPHYREG_H__ ++#define __INC_HAL8188EPHYREG_H__ ++/*--------------------------Define Parameters-------------------------------*/ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++ ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_csi_fix_mask1 0xd40 ++#define rOFDM1_csi_fix_mask2 0xd44 ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++ ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 ++#define RF_POW_ABILITY 0x17 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER_88E 0x42 // ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++ ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPwrSeq.h new file mode 100644 -index 000000000..1c0f3a335 +index 0000000..41f852f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188EPwrSeq.h @@ -0,0 +1,176 @@ -+ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __HAL8188EPWRSEQ_H__ -+#define __HAL8188EPWRSEQ_H__ -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+ -+ PWR SEQ Version: rtl8188E_PwrSeq_V09.h -+*/ -+#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 -+#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 -+#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 -+#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 -+#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 -+#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 -+#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8188E_TRANS_END_STEPS 1 -+ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \ -+ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \ -+ -+#define RTL8188E_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ -+ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8188E_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ -+ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8188E_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+//This is used by driver for LPSRadioOff Procedure, not for FW LPS Step -+#define RTL8188E_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8188E_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8188E_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; -+ -+#endif //__HAL8188EPWRSEQ_H__ -+ ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL8188EPWRSEQ_H__ ++#define __HAL8188EPWRSEQ_H__ ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++ ++ PWR SEQ Version: rtl8188E_PwrSeq_V09.h ++*/ ++#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 ++#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 ++#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 ++#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 ++#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 ++#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 ++#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8188E_TRANS_END_STEPS 1 ++ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \ ++ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \ ++ ++#define RTL8188E_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ ++ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8188E_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ ++ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8188E_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++//This is used by driver for LPSRadioOff Procedure, not for FW LPS Step ++#define RTL8188E_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8188E_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8188E_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; ++ ++#endif //__HAL8188EPWRSEQ_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPhyCfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPhyCfg.h new file mode 100644 -index 000000000..9d729ff99 +index 0000000..9d729ff --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPhyCfg.h @@ -0,0 +1,149 @@ @@ -261738,7 +303171,7 @@ index 000000000..9d729ff99 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPhyReg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPhyReg.h new file mode 100644 -index 000000000..817ff8e8a +index 0000000..817ff8e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPhyReg.h @@ -0,0 +1,1171 @@ @@ -262915,7 +304348,7 @@ index 000000000..817ff8e8a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPwrSeq.h new file mode 100644 -index 000000000..b6d0c59aa +index 0000000..b6d0c59 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8188FPwrSeq.h @@ -0,0 +1,199 @@ @@ -263120,7560 +304553,7560 @@ index 000000000..b6d0c59aa + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPhyCfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPhyCfg.h new file mode 100644 -index 000000000..f67fe287f +index 0000000..99563fe --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPhyCfg.h @@ -0,0 +1,178 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8192EPHYCFG_H__ -+#define __INC_HAL8192EPHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 //us -+#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+#define MAX_AGGR_NUM 0x0B -+#else -+#define MAX_AGGR_NUM 0x07 -+#endif // CONFIG_PCI_HCI -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/* BB/RF related */ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+// -+// BB and RF register read/write -+// -+u32 PHY_QueryBBReg8192E( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+void PHY_SetBBReg8192E( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+u32 PHY_QueryRFReg8192E( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+void PHY_SetRFReg8192E( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+ -+// -+// Initialization related function -+// -+/* MAC/BB/RF HAL config */ -+int PHY_MACConfig8192E(IN PADAPTER Adapter ); -+int PHY_BBConfig8192E(IN PADAPTER Adapter ); -+int PHY_RFConfig8192E(IN PADAPTER Adapter ); -+ -+/* RF config */ -+ -+ -+// -+// BB TX Power R/W -+// -+void PHY_GetTxPowerLevel8192E( IN PADAPTER Adapter, OUT s32* powerlevel ); -+void PHY_SetTxPowerLevel8192E( IN PADAPTER Adapter, IN u8 channel ); -+BOOLEAN PHY_UpdateTxPowerDbm8192E( IN PADAPTER Adapter, IN int powerInDbm ); -+ -+VOID -+PHY_SetTxPowerIndex_8192E( -+ IN PADAPTER Adapter, -+ IN u32 PowerIndex, -+ IN u8 RFPath, -+ IN u8 Rate -+ ); -+ -+u8 -+PHY_GetTxPowerIndex_8192E( -+ IN PADAPTER pAdapter, -+ IN u8 RFPath, -+ IN u8 Rate, -+ IN CHANNEL_WIDTH BandWidth, -+ IN u8 Channel -+ ); -+ -+// -+// Switch bandwidth for 8192S -+// -+VOID -+PHY_SetBWMode8192E( -+ IN PADAPTER pAdapter, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset -+); -+ -+// -+// channel switch related funciton -+// -+VOID -+PHY_SwChnl8192E( -+ IN PADAPTER Adapter, -+ IN u8 channel -+); -+ -+ -+VOID -+PHY_SetSwChnlBWMode8192E( -+ IN PADAPTER Adapter, -+ IN u8 channel, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset40, -+ IN u8 Offset80 -+); -+ -+VOID -+PHY_SetRFEReg_8192E( -+ IN PADAPTER Adapter -+); -+ -+void -+phy_SpurCalibration_8192E( -+ IN PADAPTER Adapter, -+ IN SPUR_CAL_METHOD Method -+); -+void PHY_SpurCalibration_8192E(IN PADAPTER Adapter); -+ -+#ifdef CONFIG_SPUR_CAL_NBI -+void -+phy_SpurCalibration_8192E_NBI( -+ IN PADAPTER Adapter -+); -+#endif -+// -+// BB/MAC/RF other monitor API -+// -+ -+VOID -+PHY_SetRFPathSwitch_8192E( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN bMain -+); -+ -+VOID -+storePwrIndexDiffRateOffset( -+ IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data -+ ); -+ -+/*--------------------------Exported Function prototype---------------------*/ -+#endif // __INC_HAL8192CPHYCFG_H -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192EPHYCFG_H__ ++#define __INC_HAL8192EPHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/* BB/RF related */ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 PHY_QueryBBReg8192E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetBBReg8192E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 PHY_QueryRFReg8192E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetRFReg8192E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8192E(IN PADAPTER Adapter ); ++int PHY_BBConfig8192E(IN PADAPTER Adapter ); ++int PHY_RFConfig8192E(IN PADAPTER Adapter ); ++ ++/* RF config */ ++ ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8192E( IN PADAPTER Adapter, OUT s32* powerlevel ); ++void PHY_SetTxPowerLevel8192E( IN PADAPTER Adapter, IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8192E( IN PADAPTER Adapter, IN int powerInDbm ); ++ ++VOID ++PHY_SetTxPowerIndex_8192E( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8192E( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++// ++// Switch bandwidth for 8192S ++// ++VOID ++PHY_SetBWMode8192E( ++ IN PADAPTER pAdapter, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset ++); ++ ++// ++// channel switch related funciton ++// ++VOID ++PHY_SwChnl8192E( ++ IN PADAPTER Adapter, ++ IN u8 channel ++); ++ ++ ++VOID ++PHY_SetSwChnlBWMode8192E( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++VOID ++PHY_SetRFEReg_8192E( ++ IN PADAPTER Adapter ++); ++ ++void ++phy_SpurCalibration_8192E( ++ IN PADAPTER Adapter, ++ IN SPUR_CAL_METHOD Method ++); ++void PHY_SpurCalibration_8192E(IN PADAPTER Adapter); ++ ++#ifdef CONFIG_SPUR_CAL_NBI ++void ++phy_SpurCalibration_8192E_NBI( ++ IN PADAPTER Adapter ++); ++#endif ++// ++// BB/MAC/RF other monitor API ++// ++ ++VOID ++PHY_SetRFPathSwitch_8192E( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++); ++ ++VOID ++storePwrIndexDiffRateOffset( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++#endif // __INC_HAL8192CPHYCFG_H ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPhyReg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPhyReg.h new file mode 100644 -index 000000000..e7cfa26bc +index 0000000..2062734 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPhyReg.h @@ -0,0 +1,1133 @@ -+/***************************************************************************** -+ * Copyright(c) 2008, RealTEK Technology Inc. All Right Reserved. -+ * -+ * Module: __INC_HAL8192SPHYREG_H -+ * -+ * -+ * Note: 1. Define PMAC/BB register map -+ * 2. Define RF register map -+ * 3. PMAC/BB register bit mask. -+ * 4. RF reg bit mask. -+ * 5. Other BB/RF relative definition. -+ * -+ * -+ * Export: Constants, macro, functions(API), global variables(None). -+ * -+ * Abbrev: -+ * -+ * History: -+ * Data Who Remark -+ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. -+ * 2. Reorganize code architecture. -+ * 09/25/2008 MH 1. Add RL6052 register definition -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8192EPHYREG_H -+#define __INC_HAL8192EPHYREG_H -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+//============================================================ -+// 8192S Regsiter offset definition -+//============================================================ -+ -+// -+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+// 3. RF register 0x00-2E -+// 4. Bit Mask for BB/RF register -+// 5. Other defintion for BB/RF R/W -+// -+ -+ -+// -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 1. Page1(0x100) -+// -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+ -+// -+// 3. Page8(0x800) -+// -+#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? -+ -+#define rFPGA0_TxInfo 0x804 // Status report?? -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? -+ -+#define rFPGA0_RFTiming1 0x810 // Useless now -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 // Useless now -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 // Useless now -+#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback -+#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now -+ -+// -+// 4. Page9(0x900) -+// -+#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? -+ -+#define rFPGA1_TxBlock 0x904 // Useless now -+#define rFPGA1_DebugSelect 0x908 // Useless now -+#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? -+ -+// -+// 5. PageA(0xA00) -+// -+// Set Control channel to upper or lower. These settings are required only for 40MHz -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -+#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain -+ -+#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series -+#define rCCK0_RxAGC2 0xa10 //AGC & DAGC -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold -+#define rCCK0_DSPParameter2 0xa1c //SQ threshold -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -+#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 //0xa57 -+#define rCCK0_FACounterLower 0xa5c //0xa5b -+#define rCCK0_FACounterUpper 0xa58 //0xa5c -+ -+// -+// PageB(0xB00) -+// -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+ -+ -+// -+// 6. PageC(0xC00) -+// -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -+#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -+#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -+#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -+#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI -+ -+#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -+#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -+#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -+#define rOFDM0_ECCAThreshold 0xc4c // energy CCA -+ -+#define rOFDM0_XAAGCCore1 0xc50 // DIG -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+ -+// -+// 7. PageD(0xD00) -+// -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 // No setting now -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 //cca, parity fail -+#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail -+#define rOFDM_PHYCounter3 0xda8 //MCS not support -+ -+#define rOFDM_ShortCFOAB 0xdac // No setting now -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+// -+// 8. PageE(0xE00) -+// -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+// -+// 7. RF Register 0x00-0x2E (RF 8256) -+// RF-0222D 0x00-3F -+// -+//Zebra1 -+#define rZebra1_HSSIEnable 0x0 // Useless now -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 // RF channel switch -+ -+//#endif -+#define rZebra1_TxGain 0x8 // Useless now -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+//Zebra4 -+#define rGlobalCtrl 0 // Useless now -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+//RTL8258 -+#define rRTL8258_TxLPF 0x11 // Useless now -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+// -+// RL6052 Register definition -+// -+#define RF_AC 0x00 // -+ -+#define RF_IQADJ_G1 0x01 // -+#define RF_IQADJ_G2 0x02 // -+ -+#define RF_POW_TRSW 0x05 // -+ -+#define RF_GAIN_RX 0x06 // -+#define RF_GAIN_TX 0x07 // -+ -+#define RF_TXM_IDAC 0x08 // -+#define RF_IPA_G 0x09 // -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C // -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F // -+ -+#define RF_MODE1 0x10 // -+#define RF_MODE2 0x11 // -+ -+#define RF_RX_AGC_HP 0x12 // -+#define RF_TX_AGC 0x13 // -+#define RF_BIAS 0x14 // -+#define RF_IPA 0x15 // -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 // -+#define RF_CHNLBW 0x18 // RF channel and BW switch -+#define RF_TOP 0x19 // -+ -+#define RF_RX_G1 0x1A // -+#define RF_RX_G2 0x1B // -+ -+#define RF_RX_BB2 0x1C // -+#define RF_RX_BB1 0x1D // -+ -+#define RF_RCK1 0x1E // -+#define RF_RCK2 0x1F // -+ -+#define RF_TX_G1 0x20 // -+#define RF_TX_G2 0x21 // -+#define RF_TX_G3 0x22 // -+ -+#define RF_TX_BB1 0x23 // -+ -+#define RF_T_METER_8192E 0x42 // -+#define RF_T_METER_88E 0x42 // -+#define RF_T_METER 0x24 // -+ -+//#endif -+ -+#define RF_SYN_G1 0x25 // RF TX Power control -+#define RF_SYN_G2 0x26 // RF TX Power control -+#define RF_SYN_G3 0x27 // RF TX Power control -+#define RF_SYN_G4 0x28 // RF TX Power control -+#define RF_SYN_G5 0x29 // RF TX Power control -+#define RF_SYN_G6 0x2A // RF TX Power control -+#define RF_SYN_G7 0x2B // RF TX Power control -+#define RF_SYN_G8 0x2C // RF TX Power control -+ -+#define RF_RCK_OS 0x30 // RF TX PA control -+#define RF_TXPA_G1 0x31 // RF TX PA control -+#define RF_TXPA_G2 0x32 // RF TX PA control -+#define RF_TXPA_G3 0x33 // RF TX PA control -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C // -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_LDO 0xB1 -+#define RF_WE_LUT 0xEF -+ -+ -+// -+//Bit Mask -+// -+// 1. Page1(0x100) -+#define bBBResetB 0x100 // Useless now? -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+#define RF_TX_GAIN_OFFSET_8192E(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) -+ -+ -+// 2. Page8(0x800) -+#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 // Useless now -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 // Useless now -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf //Reg0x814 -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 //T2R -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 //chane gain at continue Tx -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 // Useless now -+//#define bHWSISelect 0x8 -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW -+ -+#define bRFSI_TRSW 0x20 // Useless now -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 // T65 RF -+ -+#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal -+ -+#define bLSSIReadBackData 0xfffff // T65 RF -+ -+#define bLSSIReadOKFlag 0x1000 // Useless now -+#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ -+ -+#define b80MClkDelay 0x18000000 // Useless -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 // Useless -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+// 3. Page9(0x900) -+#define bOFDMTxSC 0x30000000 // Useless -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff //reset debug page and also HWord, LWord -+#define bDebugItem 0xff //reset debug page and LWord -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+// 4. PageA(0xA00) -+#define bCCKBBMode 0x3 // Useless -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch -+ -+#define bCCKScramble 0x8 // Useless -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 //r_rx_clk -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f //AGCsamp_dly -+#define bCCKFixedRxAGC 0x8000 -+//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+// 5. PageC(0xC00) -+#define bNumOfSTF 0x3 // Useless -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 //the threshold for high power -+#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+//#define bRxMF_Hold 0x3800 -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+// 6. PageE(0xE00) -+#define bSTBCEn 0x4 // Useless -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+//#define bRxPath1 0x01 -+//#define bRxPath2 0x02 -+//#define bRxPath3 0x04 -+//#define bRxPath4 0x08 -+//#define bTxPath1 0x10 -+//#define bTxPath2 0x20 -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 //total -+#define bShortCFOFLength 11 //fraction -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf // Useless -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 // Useless -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 // Useless -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+//Rx Pseduo noise -+#define bRxPesudoNoiseOn 0x20000000 // Useless -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+//7. RF Register -+//Zebra1 -+#define bZebra1_HSSIEnable 0x8 // Useless -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+//Zebra4 -+#define bRTL8256RegModeCtrl1 0x100 // Useless -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+//RTL8258 -+#define bRTL8258_TxLPFBW 0xc // Useless -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+// -+// Other Definition -+// -+ -+//byte endable for sb_write -+#define bByte0 0x1 // Useless -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+//for PutRegsetting & GetRegSetting BitMask -+#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+//for PutRFRegsetting & GetRFRegSetting BitMask -+//#define bMask12Bits 0xfffff // RF Reg mask bits -+//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF -+#define bRFRegOffsetMask 0xfffff -+ -+#define bEnable 0x1 // Useless -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 // Useless -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 //500ms // Useless -+#define tUpdateRxCounter 100 //100ms -+ -+#define rateCCK 0 // Useless -+#define rateOFDM 1 -+#define rateHT 2 -+ -+//define Register-End -+#define bPMAC_End 0x1ff // Useless -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+//define max debug item in each debug page -+//#define bMaxItem_FPGA_PHY0 0x9 -+//#define bMaxItem_FPGA_PHY1 0x3 -+//#define bMaxItem_PHY_11B 0x16 -+//#define bMaxItem_OFDM_PHY0 0x29 -+//#define bMaxItem_OFDM_PHY1 0x0 -+ -+#define bPMACControl 0x0 // Useless -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 // Useless -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+ -+// RSSI Dump Message -+#define rA_RSSIDump_92E 0xcb0 -+#define rB_RSSIDump_92E 0xcb1 -+#define rS1_RXevmDump_92E 0xcb2 -+#define rS2_RXevmDump_92E 0xcb3 -+#define rA_RXsnrDump_92E 0xcb4 -+#define rB_RXsnrDump_92E 0xcb5 -+#define rA_CfoShortDump_92E 0xcb6 -+#define rB_CfoShortDump_92E 0xcb8 -+#define rA_CfoLongDump_92E 0xcba -+#define rB_CfoLongDump_92E 0xcbc -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif //__INC_HAL8188EPHYREG_H -+ ++/***************************************************************************** ++ * Copyright(c) 2008, RealTEK Technology Inc. All Right Reserved. ++ * ++ * Module: __INC_HAL8192SPHYREG_H ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __INC_HAL8192EPHYREG_H ++#define __INC_HAL8192EPHYREG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++ ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++ ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 ++#define RF_POW_ABILITY 0x17 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER_8192E 0x42 // ++#define RF_T_METER_88E 0x42 // ++#define RF_T_METER 0x24 // ++ ++//#endif ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_LDO 0xB1 ++#define RF_WE_LUT 0xEF ++ ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++#define RF_TX_GAIN_OFFSET_8192E(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) ++ ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++ ++// RSSI Dump Message ++#define rA_RSSIDump_92E 0xcb0 ++#define rB_RSSIDump_92E 0xcb1 ++#define rS1_RXevmDump_92E 0xcb2 ++#define rS2_RXevmDump_92E 0xcb3 ++#define rA_RXsnrDump_92E 0xcb4 ++#define rB_RXsnrDump_92E 0xcb5 ++#define rA_CfoShortDump_92E 0xcb6 ++#define rB_CfoShortDump_92E 0xcb8 ++#define rA_CfoLongDump_92E 0xcba ++#define rB_CfoLongDump_92E 0xcbc ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8188EPHYREG_H ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPwrSeq.h new file mode 100644 -index 000000000..dfad445ae +index 0000000..7acc0d1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8192EPwrSeq.h @@ -0,0 +1,155 @@ -+#ifndef REALTEK_POWER_SEQUENCE_8192E -+#define REALTEK_POWER_SEQUENCE_8192E -+ -+#include "HalPwrSeqCmd.h" -+/* -+ Check document WM-20110607-Paul-RTL8192E_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS 18 -+#define RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS 18 -+#define RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS 18 -+#define RTL8192E_TRANS_SUS_TO_CARDEMU_STEPS 18 -+#define RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS 18 -+#define RTL8192E_TRANS_PDN_TO_CARDEMU_STEPS 18 -+#define RTL8192E_TRANS_ACT_TO_LPS_STEPS 23 -+#define RTL8192E_TRANS_LPS_TO_ACT_STEPS 23 -+#define RTL8192E_TRANS_END_STEPS 1 -+ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ -+ -+#define RTL8192E_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8192E_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*Unlock small LDO Register*/ \ -+ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*Disable small LDO*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8192E_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*Enable small LDO*/ \ -+ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*Lock small LDO Register*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8192E_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8192E_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8192E_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM, For Repeatly In and out, Taggle bit should be changed*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/\ -+ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*Clear ISR*/ -+ -+#define RTL8192E_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS+RTL8192E_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; -+ -+#endif ++#ifndef REALTEK_POWER_SEQUENCE_8192E ++#define REALTEK_POWER_SEQUENCE_8192E ++ ++#include "HalPwrSeqCmd.h" ++/* ++ Check document WM-20110607-Paul-RTL8192E_Power_Architecture-R02.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS 18 ++#define RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS 18 ++#define RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS 18 ++#define RTL8192E_TRANS_SUS_TO_CARDEMU_STEPS 18 ++#define RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS 18 ++#define RTL8192E_TRANS_PDN_TO_CARDEMU_STEPS 18 ++#define RTL8192E_TRANS_ACT_TO_LPS_STEPS 23 ++#define RTL8192E_TRANS_LPS_TO_ACT_STEPS 23 ++#define RTL8192E_TRANS_END_STEPS 1 ++ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ ++ ++#define RTL8192E_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8192E_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*Unlock small LDO Register*/ \ ++ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*Disable small LDO*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8192E_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*Enable small LDO*/ \ ++ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*Lock small LDO Register*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8192E_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8192E_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8192E_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM, For Repeatly In and out, Taggle bit should be changed*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/\ ++ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*Clear ISR*/ ++ ++#define RTL8192E_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPhyCfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPhyCfg.h new file mode 100644 -index 000000000..c05bb4555 +index 0000000..9df208e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPhyCfg.h @@ -0,0 +1,144 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8703BPHYCFG_H__ -+#define __INC_HAL8703BPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 //us -+#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+#define MAX_AGGR_NUM 0x0B -+#else -+#define MAX_AGGR_NUM 0x07 -+#endif // CONFIG_PCI_HCI -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8703B( -+ IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask -+ ); -+ -+VOID -+PHY_SetBBReg_8703B( -+ IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data -+ ); -+ -+u32 -+PHY_QueryRFReg_8703B( -+ IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask -+ ); -+ -+VOID -+PHY_SetRFReg_8703B( -+ IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data -+ ); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8703B(PADAPTER Adapter ); -+ -+int PHY_RFConfig8703B(PADAPTER Adapter ); -+ -+s32 PHY_MACConfig8703B(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8703B( -+ IN PADAPTER Adapter, -+ IN u8* pFileName, -+ RF_PATH eRFPath -+); -+ -+VOID -+PHY_SetTxPowerIndex_8703B( -+ IN PADAPTER Adapter, -+ IN u32 PowerIndex, -+ IN u8 RFPath, -+ IN u8 Rate -+ ); -+ -+u8 -+PHY_GetTxPowerIndex_8703B( -+ IN PADAPTER pAdapter, -+ IN u8 RFPath, -+ IN u8 Rate, -+ IN CHANNEL_WIDTH BandWidth, -+ IN u8 Channel -+ ); -+ -+VOID -+PHY_GetTxPowerLevel8703B( -+ IN PADAPTER Adapter, -+ OUT s32* powerlevel -+ ); -+ -+VOID -+PHY_SetTxPowerLevel8703B( -+ IN PADAPTER Adapter, -+ IN u8 channel -+ ); -+ -+VOID -+PHY_SetBWMode8703B( -+ IN PADAPTER Adapter, -+ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M -+ IN unsigned char Offset // Upper, Lower, or Don't care -+); -+ -+VOID -+PHY_SwChnl8703B( // Call after initialization -+ IN PADAPTER Adapter, -+ IN u8 channel -+ ); -+ -+VOID -+PHY_SetSwChnlBWMode8703B( -+ IN PADAPTER Adapter, -+ IN u8 channel, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset40, -+ IN u8 Offset80 -+); -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8703BPHYCFG_H__ ++#define __INC_HAL8703BPHYCFG_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters End-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure End----------------------------*/ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++u32 ++PHY_QueryBBReg_8703B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetBBReg_8703B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++u32 ++PHY_QueryRFReg_8703B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetRFReg_8703B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++/* MAC/BB/RF HAL config */ ++int PHY_BBConfig8703B(PADAPTER Adapter ); ++ ++int PHY_RFConfig8703B(PADAPTER Adapter ); ++ ++s32 PHY_MACConfig8703B(PADAPTER padapter); ++ ++int ++PHY_ConfigRFWithParaFile_8703B( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF_PATH eRFPath ++); ++ ++VOID ++PHY_SetTxPowerIndex_8703B( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8703B( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++VOID ++PHY_GetTxPowerLevel8703B( ++ IN PADAPTER Adapter, ++ OUT s32* powerlevel ++ ); ++ ++VOID ++PHY_SetTxPowerLevel8703B( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetBWMode8703B( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++); ++ ++VOID ++PHY_SwChnl8703B( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetSwChnlBWMode8703B( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++/*--------------------------Exported Function prototype End---------------------*/ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPhyReg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPhyReg.h new file mode 100644 -index 000000000..4d1b714f8 +index 0000000..5f0f23f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPhyReg.h @@ -0,0 +1,1139 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8703BPHYREG_H__ -+#define __INC_HAL8703BPHYREG_H__ -+ -+#define rSYM_WLBT_PAPE_SEL 0x64 -+// -+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+// 3. RF register 0x00-2E -+// 4. Bit Mask for BB/RF register -+// 5. Other defintion for BB/RF R/W -+// -+ -+ -+// -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 1. Page1(0x100) -+// -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+// -+// 2. Page2(0x200) -+// -+// The following two definition are only used for USB interface. -+#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. -+#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. -+ -+// -+// 3. Page8(0x800) -+// -+#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? -+ -+#define rFPGA0_TxInfo 0x804 // Status report?? -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? -+ -+#define rFPGA0_RFTiming1 0x810 // Useless now -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 // Useless now -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 // Useless now -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 // Useless now -+#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback -+#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now -+ -+// -+// 4. Page9(0x900) -+// -+#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? -+#define rFPGA1_TxBlock 0x904 // Useless now -+#define rFPGA1_DebugSelect 0x908 // Useless now -+#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+#define rBBrx_DFIR 0x954 -+ -+// -+// 5. PageA(0xA00) -+// -+// Set Control channel to upper or lower. These settings are required only for 40MHz -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -+#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain -+ -+#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series -+#define rCCK0_RxAGC2 0xa10 //AGC & DAGC -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold -+#define rCCK0_DSPParameter2 0xa1c //SQ threshold -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -+#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 //0xa57 -+#define rCCK0_FACounterLower 0xa5c //0xa5b -+#define rCCK0_FACounterUpper 0xa58 //0xa5c -+ -+// -+// PageB(0xB00) -+// -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+// -+// 6. PageC(0xC00) -+// -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -+#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -+#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -+#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -+#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI -+ -+#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -+#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -+#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -+#define rOFDM0_ECCAThreshold 0xc4c // energy CCA -+ -+#define rOFDM0_XAAGCCore1 0xc50 // DIG -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+// -+// 7. PageD(0xD00) -+// -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 // No setting now -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 //cca, parity fail -+#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail -+#define rOFDM_PHYCounter3 0xda8 //MCS not support -+ -+#define rOFDM_ShortCFOAB 0xdac // No setting now -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+// -+// 8. PageE(0xE00) -+// -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+// -+// 7. RF Register 0x00-0x2E (RF 8256) -+// RF-0222D 0x00-3F -+// -+//Zebra1 -+#define rZebra1_HSSIEnable 0x0 // Useless now -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 // RF channel switch -+ -+//#endif -+#define rZebra1_TxGain 0x8 // Useless now -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+//Zebra4 -+#define rGlobalCtrl 0 // Useless now -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+//RTL8258 -+#define rRTL8258_TxLPF 0x11 // Useless now -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+// -+// RL6052 Register definition -+// -+#define RF_AC 0x00 // -+ -+#define RF_IQADJ_G1 0x01 // -+#define RF_IQADJ_G2 0x02 // -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 // -+ -+#define RF_GAIN_RX 0x06 // -+#define RF_GAIN_TX 0x07 // -+ -+#define RF_TXM_IDAC 0x08 // -+#define RF_IPA_G 0x09 // -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C // -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F // -+ -+#define RF_MODE1 0x10 // -+#define RF_MODE2 0x11 // -+ -+#define RF_RX_AGC_HP 0x12 // -+#define RF_TX_AGC 0x13 // -+#define RF_BIAS 0x14 // -+#define RF_IPA 0x15 // -+#define RF_TXBIAS 0x16 // -+#define RF_POW_ABILITY 0x17 // -+#define RF_MODE_AG 0x18 // -+#define rRfChannel 0x18 // RF channel and BW switch -+#define RF_CHNLBW 0x18 // RF channel and BW switch -+#define RF_TOP 0x19 // -+ -+#define RF_RX_G1 0x1A // -+#define RF_RX_G2 0x1B // -+ -+#define RF_RX_BB2 0x1C // -+#define RF_RX_BB1 0x1D // -+ -+#define RF_RCK1 0x1E // -+#define RF_RCK2 0x1F // -+ -+#define RF_TX_G1 0x20 // -+#define RF_TX_G2 0x21 // -+#define RF_TX_G3 0x22 // -+ -+#define RF_TX_BB1 0x23 // -+ -+#define RF_T_METER 0x24 // -+ -+#define RF_SYN_G1 0x25 // RF TX Power control -+#define RF_SYN_G2 0x26 // RF TX Power control -+#define RF_SYN_G3 0x27 // RF TX Power control -+#define RF_SYN_G4 0x28 // RF TX Power control -+#define RF_SYN_G5 0x29 // RF TX Power control -+#define RF_SYN_G6 0x2A // RF TX Power control -+#define RF_SYN_G7 0x2B // RF TX Power control -+#define RF_SYN_G8 0x2C // RF TX Power control -+ -+#define RF_RCK_OS 0x30 // RF TX PA control -+ -+#define RF_TXPA_G1 0x31 // RF TX PA control -+#define RF_TXPA_G2 0x32 // RF TX PA control -+#define RF_TXPA_G3 0x33 // RF TX PA control -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C // -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+// -+//Bit Mask -+// -+// 1. Page1(0x100) -+#define bBBResetB 0x100 // Useless now? -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+#define RF_TX_GAIN_OFFSET_8703B(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) -+ -+// 2. Page8(0x800) -+#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 // Useless now -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 // Useless now -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf //Reg0x814 -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 //T2R -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 //chane gain at continue Tx -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 // Useless now -+//#define bHWSISelect 0x8 -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW -+ -+#define bRFSI_TRSW 0x20 // Useless now -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 // T65 RF -+ -+#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal -+ -+#define bLSSIReadBackData 0xfffff // T65 RF -+ -+#define bLSSIReadOKFlag 0x1000 // Useless now -+#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ -+ -+#define b80MClkDelay 0x18000000 // Useless -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 // Useless -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+// 3. Page9(0x900) -+#define bOFDMTxSC 0x30000000 // Useless -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff //reset debug page and also HWord, LWord -+#define bDebugItem 0xff //reset debug page and LWord -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+// 4. PageA(0xA00) -+#define bCCKBBMode 0x3 // Useless -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch -+ -+#define bCCKScramble 0x8 // Useless -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 //r_rx_clk -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f //AGCsamp_dly -+#define bCCKFixedRxAGC 0x8000 -+//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+// 5. PageC(0xC00) -+#define bNumOfSTF 0x3 // Useless -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 //the threshold for high power -+#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+//#define bRxMF_Hold 0x3800 -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+// 6. PageE(0xE00) -+#define bSTBCEn 0x4 // Useless -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+//#define bRxPath1 0x01 -+//#define bRxPath2 0x02 -+//#define bRxPath3 0x04 -+//#define bRxPath4 0x08 -+//#define bTxPath1 0x10 -+//#define bTxPath2 0x20 -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 //total -+#define bShortCFOFLength 11 //fraction -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf // Useless -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 // Useless -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 // Useless -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+//Rx Pseduo noise -+#define bRxPesudoNoiseOn 0x20000000 // Useless -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+//7. RF Register -+//Zebra1 -+#define bZebra1_HSSIEnable 0x8 // Useless -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+//Zebra4 -+#define bRTL8256RegModeCtrl1 0x100 // Useless -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+//RTL8258 -+#define bRTL8258_TxLPFBW 0xc // Useless -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+// -+// Other Definition -+// -+ -+//byte endable for sb_write -+#define bByte0 0x1 // Useless -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+//for PutRegsetting & GetRegSetting BitMask -+#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 // Useless -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 // Useless -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 //500ms // Useless -+#define tUpdateRxCounter 100 //100ms -+ -+#define rateCCK 0 // Useless -+#define rateOFDM 1 -+#define rateHT 2 -+ -+//define Register-End -+#define bPMAC_End 0x1ff // Useless -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+//define max debug item in each debug page -+//#define bMaxItem_FPGA_PHY0 0x9 -+//#define bMaxItem_FPGA_PHY1 0x3 -+//#define bMaxItem_PHY_11B 0x16 -+//#define bMaxItem_OFDM_PHY0 0x29 -+//#define bMaxItem_OFDM_PHY1 0x0 -+ -+#define bPMACControl 0x0 // Useless -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 // Useless -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8703BPHYREG_H__ ++#define __INC_HAL8703BPHYREG_H__ ++ ++#define rSYM_WLBT_PAPE_SEL 0x64 ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++ ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++#define rDPDT_control 0x92c ++#define rfe_ctrl_anta_src 0x930 ++#define rS0S1_PathSwitch 0x948 ++#define rBBrx_DFIR 0x954 ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rPdp_AntA_8 0xb08 ++#define rPdp_AntA_C 0xb0c ++#define rPdp_AntA_10 0xb10 ++#define rPdp_AntA_14 0xb14 ++#define rPdp_AntA_18 0xb18 ++#define rPdp_AntA_1C 0xb1c ++#define rPdp_AntA_20 0xb20 ++#define rPdp_AntA_24 0xb24 ++ ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rBndA 0xb30 ++#define rHssiPar 0xb34 ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++ ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rPdp_AntB_8 0xb78 ++#define rPdp_AntB_C 0xb7c ++#define rPdp_AntB_10 0xb80 ++#define rPdp_AntB_14 0xb84 ++#define rPdp_AntB_18 0xb88 ++#define rPdp_AntB_1C 0xb8c ++#define rPdp_AntB_20 0xb90 ++#define rPdp_AntB_24 0xb94 ++ ++#define rConfig_Pmpd_AntB 0xb98 ++ ++#define rBndB 0xba0 ++ ++#define rAPK 0xbd8 ++#define rPm_Rx0_AntA 0xbdc ++#define rPm_Rx1_AntA 0xbe0 ++#define rPm_Rx2_AntA 0xbe4 ++#define rPm_Rx3_AntA 0xbe8 ++#define rPm_Rx0_AntB 0xbec ++#define rPm_Rx1_AntB 0xbf0 ++#define rPm_Rx2_AntB 0xbf4 ++#define rPm_Rx3_AntB 0xbf8 ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++#define RF_S0S1 0xB0 ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++#define RF_TX_GAIN_OFFSET_8703B(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPwrSeq.h new file mode 100644 -index 000000000..35e965ef6 +index 0000000..c61519a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8703BPwrSeq.h @@ -0,0 +1,184 @@ -+#ifndef REALTEK_POWER_SEQUENCE_8703B -+#define REALTEK_POWER_SEQUENCE_8703B -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20140402-JackieLau-RTL8703B_Power_Architecture v09.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS 23 -+#define RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8703B_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8703B_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8703B_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8703B_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8703B_TRANS_END_STEPS 1 -+ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ -+ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 , BIT3},/* enabled usb resume */ \ -+ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 , 0},/* disable usb resume */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ -+ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ -+ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ -+ -+ -+#define RTL8703B_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ -+ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8703B_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8703B_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8703B_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8703B_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8703B_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8703B_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8703B_power_on_flow[RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_radio_off_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_card_disable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_card_enable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_suspend_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_resume_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_hwpdn_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_enter_lps_flow[RTL8703B_TRANS_ACT_TO_LPS_STEPS+RTL8703B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8703B_leave_lps_flow[RTL8703B_TRANS_LPS_TO_ACT_STEPS+RTL8703B_TRANS_END_STEPS]; -+ -+#endif ++#ifndef REALTEK_POWER_SEQUENCE_8703B ++#define REALTEK_POWER_SEQUENCE_8703B ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20140402-JackieLau-RTL8703B_Power_Architecture v09.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS 23 ++#define RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8703B_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8703B_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8703B_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8703B_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8703B_TRANS_END_STEPS 1 ++ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ ++ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 , BIT3},/* enabled usb resume */ \ ++ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 , 0},/* disable usb resume */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ ++ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ ++ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ ++ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ ++ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ ++ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ ++ ++ ++#define RTL8703B_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ ++ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8703B_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8703B_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8703B_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8703B_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8703B_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8703B_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8703B_power_on_flow[RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_radio_off_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_card_disable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_card_enable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_suspend_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_resume_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_hwpdn_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_enter_lps_flow[RTL8703B_TRANS_ACT_TO_LPS_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_leave_lps_flow[RTL8703B_TRANS_LPS_TO_ACT_STEPS+RTL8703B_TRANS_END_STEPS]; ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPhyCfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPhyCfg.h new file mode 100644 -index 000000000..da4759792 +index 0000000..534e1be --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPhyCfg.h @@ -0,0 +1,149 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8723BPHYCFG_H__ -+#define __INC_HAL8723BPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 //us -+#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+#define MAX_AGGR_NUM 0x0B -+#else -+#define MAX_AGGR_NUM 0x07 -+#endif // CONFIG_PCI_HCI -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8723B( -+ IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask -+ ); -+ -+VOID -+PHY_SetBBReg_8723B( -+ IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data -+ ); -+ -+u32 -+PHY_QueryRFReg_8723B( -+ IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask -+ ); -+ -+VOID -+PHY_SetRFReg_8723B( -+ IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data -+ ); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8723B(PADAPTER Adapter ); -+ -+int PHY_RFConfig8723B(PADAPTER Adapter ); -+ -+s32 PHY_MACConfig8723B(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8723B( -+ IN PADAPTER Adapter, -+ IN u8* pFileName, -+ RF_PATH eRFPath -+); -+ -+VOID -+PHY_SetTxPowerIndex_8723B( -+ IN PADAPTER Adapter, -+ IN u32 PowerIndex, -+ IN u8 RFPath, -+ IN u8 Rate -+ ); -+ -+u8 -+PHY_GetTxPowerIndex_8723B( -+ IN PADAPTER pAdapter, -+ IN u8 RFPath, -+ IN u8 Rate, -+ IN CHANNEL_WIDTH BandWidth, -+ IN u8 Channel -+ ); -+ -+VOID -+PHY_GetTxPowerLevel8723B( -+ IN PADAPTER Adapter, -+ OUT s32* powerlevel -+ ); -+ -+VOID -+PHY_SetTxPowerLevel8723B( -+ IN PADAPTER Adapter, -+ IN u8 channel -+ ); -+ -+VOID -+PHY_SetBWMode8723B( -+ IN PADAPTER Adapter, -+ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M -+ IN unsigned char Offset // Upper, Lower, or Don't care -+); -+ -+VOID -+PHY_SwChnl8723B( // Call after initialization -+ IN PADAPTER Adapter, -+ IN u8 channel -+ ); -+ -+VOID -+PHY_SetSwChnlBWMode8723B( -+ IN PADAPTER Adapter, -+ IN u8 channel, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset40, -+ IN u8 Offset80 -+); -+ -+VOID PHY_SetRFPathSwitch_8723B( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN bMain -+ ); -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8723BPHYCFG_H__ ++#define __INC_HAL8723BPHYCFG_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters End-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure End----------------------------*/ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++u32 ++PHY_QueryBBReg_8723B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetBBReg_8723B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++u32 ++PHY_QueryRFReg_8723B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetRFReg_8723B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++/* MAC/BB/RF HAL config */ ++int PHY_BBConfig8723B(PADAPTER Adapter ); ++ ++int PHY_RFConfig8723B(PADAPTER Adapter ); ++ ++s32 PHY_MACConfig8723B(PADAPTER padapter); ++ ++int ++PHY_ConfigRFWithParaFile_8723B( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF_PATH eRFPath ++); ++ ++VOID ++PHY_SetTxPowerIndex_8723B( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8723B( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++VOID ++PHY_GetTxPowerLevel8723B( ++ IN PADAPTER Adapter, ++ OUT s32* powerlevel ++ ); ++ ++VOID ++PHY_SetTxPowerLevel8723B( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetBWMode8723B( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++); ++ ++VOID ++PHY_SwChnl8723B( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetSwChnlBWMode8723B( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++VOID PHY_SetRFPathSwitch_8723B( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++ ); ++/*--------------------------Exported Function prototype End---------------------*/ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPhyReg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPhyReg.h new file mode 100644 -index 000000000..a734a86ca +index 0000000..ff444b2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPhyReg.h @@ -0,0 +1,1137 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8723BPHYREG_H__ -+#define __INC_HAL8723BPHYREG_H__ -+ -+#define rSYM_WLBT_PAPE_SEL 0x64 -+// -+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+// 3. RF register 0x00-2E -+// 4. Bit Mask for BB/RF register -+// 5. Other defintion for BB/RF R/W -+// -+ -+ -+// -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 1. Page1(0x100) -+// -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+// -+// 2. Page2(0x200) -+// -+// The following two definition are only used for USB interface. -+#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. -+#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. -+ -+// -+// 3. Page8(0x800) -+// -+#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? -+ -+#define rFPGA0_TxInfo 0x804 // Status report?? -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? -+ -+#define rFPGA0_RFTiming1 0x810 // Useless now -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 // Useless now -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 // Useless now -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 // Useless now -+#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback -+#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now -+ -+// -+// 4. Page9(0x900) -+// -+#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? -+#define rFPGA1_TxBlock 0x904 // Useless now -+#define rFPGA1_DebugSelect 0x908 // Useless now -+#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+ -+// -+// 5. PageA(0xA00) -+// -+// Set Control channel to upper or lower. These settings are required only for 40MHz -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -+#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain -+ -+#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series -+#define rCCK0_RxAGC2 0xa10 //AGC & DAGC -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold -+#define rCCK0_DSPParameter2 0xa1c //SQ threshold -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -+#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 //0xa57 -+#define rCCK0_FACounterLower 0xa5c //0xa5b -+#define rCCK0_FACounterUpper 0xa58 //0xa5c -+ -+// -+// PageB(0xB00) -+// -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+// -+// 6. PageC(0xC00) -+// -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -+#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -+#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -+#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -+#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI -+ -+#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -+#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -+#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -+#define rOFDM0_ECCAThreshold 0xc4c // energy CCA -+ -+#define rOFDM0_XAAGCCore1 0xc50 // DIG -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+// -+// 7. PageD(0xD00) -+// -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 // No setting now -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 //cca, parity fail -+#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail -+#define rOFDM_PHYCounter3 0xda8 //MCS not support -+ -+#define rOFDM_ShortCFOAB 0xdac // No setting now -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+// -+// 8. PageE(0xE00) -+// -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+// -+// 7. RF Register 0x00-0x2E (RF 8256) -+// RF-0222D 0x00-3F -+// -+//Zebra1 -+#define rZebra1_HSSIEnable 0x0 // Useless now -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 // RF channel switch -+ -+//#endif -+#define rZebra1_TxGain 0x8 // Useless now -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+//Zebra4 -+#define rGlobalCtrl 0 // Useless now -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+//RTL8258 -+#define rRTL8258_TxLPF 0x11 // Useless now -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+// -+// RL6052 Register definition -+// -+#define RF_AC 0x00 // -+ -+#define RF_IQADJ_G1 0x01 // -+#define RF_IQADJ_G2 0x02 // -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 // -+ -+#define RF_GAIN_RX 0x06 // -+#define RF_GAIN_TX 0x07 // -+ -+#define RF_TXM_IDAC 0x08 // -+#define RF_IPA_G 0x09 // -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C // -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F // -+ -+#define RF_MODE1 0x10 // -+#define RF_MODE2 0x11 // -+ -+#define RF_RX_AGC_HP 0x12 // -+#define RF_TX_AGC 0x13 // -+#define RF_BIAS 0x14 // -+#define RF_IPA 0x15 // -+#define RF_TXBIAS 0x16 // -+#define RF_POW_ABILITY 0x17 // -+#define RF_MODE_AG 0x18 // -+#define rRfChannel 0x18 // RF channel and BW switch -+#define RF_CHNLBW 0x18 // RF channel and BW switch -+#define RF_TOP 0x19 // -+ -+#define RF_RX_G1 0x1A // -+#define RF_RX_G2 0x1B // -+ -+#define RF_RX_BB2 0x1C // -+#define RF_RX_BB1 0x1D // -+ -+#define RF_RCK1 0x1E // -+#define RF_RCK2 0x1F // -+ -+#define RF_TX_G1 0x20 // -+#define RF_TX_G2 0x21 // -+#define RF_TX_G3 0x22 // -+ -+#define RF_TX_BB1 0x23 // -+ -+#define RF_T_METER 0x24 // -+ -+#define RF_SYN_G1 0x25 // RF TX Power control -+#define RF_SYN_G2 0x26 // RF TX Power control -+#define RF_SYN_G3 0x27 // RF TX Power control -+#define RF_SYN_G4 0x28 // RF TX Power control -+#define RF_SYN_G5 0x29 // RF TX Power control -+#define RF_SYN_G6 0x2A // RF TX Power control -+#define RF_SYN_G7 0x2B // RF TX Power control -+#define RF_SYN_G8 0x2C // RF TX Power control -+ -+#define RF_RCK_OS 0x30 // RF TX PA control -+ -+#define RF_TXPA_G1 0x31 // RF TX PA control -+#define RF_TXPA_G2 0x32 // RF TX PA control -+#define RF_TXPA_G3 0x33 // RF TX PA control -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C // -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+// -+//Bit Mask -+// -+// 1. Page1(0x100) -+#define bBBResetB 0x100 // Useless now? -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+ -+// 2. Page8(0x800) -+#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 // Useless now -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 // Useless now -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf //Reg0x814 -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 //T2R -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 //chane gain at continue Tx -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 // Useless now -+//#define bHWSISelect 0x8 -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW -+ -+#define bRFSI_TRSW 0x20 // Useless now -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 // T65 RF -+ -+#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal -+ -+#define bLSSIReadBackData 0xfffff // T65 RF -+ -+#define bLSSIReadOKFlag 0x1000 // Useless now -+#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ -+ -+#define b80MClkDelay 0x18000000 // Useless -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 // Useless -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+// 3. Page9(0x900) -+#define bOFDMTxSC 0x30000000 // Useless -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff //reset debug page and also HWord, LWord -+#define bDebugItem 0xff //reset debug page and LWord -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+// 4. PageA(0xA00) -+#define bCCKBBMode 0x3 // Useless -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch -+ -+#define bCCKScramble 0x8 // Useless -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 //r_rx_clk -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f //AGCsamp_dly -+#define bCCKFixedRxAGC 0x8000 -+//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+// 5. PageC(0xC00) -+#define bNumOfSTF 0x3 // Useless -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 //the threshold for high power -+#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+//#define bRxMF_Hold 0x3800 -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+// 6. PageE(0xE00) -+#define bSTBCEn 0x4 // Useless -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+//#define bRxPath1 0x01 -+//#define bRxPath2 0x02 -+//#define bRxPath3 0x04 -+//#define bRxPath4 0x08 -+//#define bTxPath1 0x10 -+//#define bTxPath2 0x20 -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 //total -+#define bShortCFOFLength 11 //fraction -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf // Useless -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 // Useless -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 // Useless -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+//Rx Pseduo noise -+#define bRxPesudoNoiseOn 0x20000000 // Useless -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+//7. RF Register -+//Zebra1 -+#define bZebra1_HSSIEnable 0x8 // Useless -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+//Zebra4 -+#define bRTL8256RegModeCtrl1 0x100 // Useless -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+//RTL8258 -+#define bRTL8258_TxLPFBW 0xc // Useless -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+// -+// Other Definition -+// -+ -+//byte endable for sb_write -+#define bByte0 0x1 // Useless -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+//for PutRegsetting & GetRegSetting BitMask -+#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 // Useless -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 // Useless -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 //500ms // Useless -+#define tUpdateRxCounter 100 //100ms -+ -+#define rateCCK 0 // Useless -+#define rateOFDM 1 -+#define rateHT 2 -+ -+//define Register-End -+#define bPMAC_End 0x1ff // Useless -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+//define max debug item in each debug page -+//#define bMaxItem_FPGA_PHY0 0x9 -+//#define bMaxItem_FPGA_PHY1 0x3 -+//#define bMaxItem_PHY_11B 0x16 -+//#define bMaxItem_OFDM_PHY0 0x29 -+//#define bMaxItem_OFDM_PHY1 0x0 -+ -+#define bPMACControl 0x0 // Useless -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 // Useless -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8723BPHYREG_H__ ++#define __INC_HAL8723BPHYREG_H__ ++ ++#define rSYM_WLBT_PAPE_SEL 0x64 ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++ ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++#define rDPDT_control 0x92c ++#define rfe_ctrl_anta_src 0x930 ++#define rS0S1_PathSwitch 0x948 ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rPdp_AntA_8 0xb08 ++#define rPdp_AntA_C 0xb0c ++#define rPdp_AntA_10 0xb10 ++#define rPdp_AntA_14 0xb14 ++#define rPdp_AntA_18 0xb18 ++#define rPdp_AntA_1C 0xb1c ++#define rPdp_AntA_20 0xb20 ++#define rPdp_AntA_24 0xb24 ++ ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rBndA 0xb30 ++#define rHssiPar 0xb34 ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++ ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rPdp_AntB_8 0xb78 ++#define rPdp_AntB_C 0xb7c ++#define rPdp_AntB_10 0xb80 ++#define rPdp_AntB_14 0xb84 ++#define rPdp_AntB_18 0xb88 ++#define rPdp_AntB_1C 0xb8c ++#define rPdp_AntB_20 0xb90 ++#define rPdp_AntB_24 0xb94 ++ ++#define rConfig_Pmpd_AntB 0xb98 ++ ++#define rBndB 0xba0 ++ ++#define rAPK 0xbd8 ++#define rPm_Rx0_AntA 0xbdc ++#define rPm_Rx1_AntA 0xbe0 ++#define rPm_Rx2_AntA 0xbe4 ++#define rPm_Rx3_AntA 0xbe8 ++#define rPm_Rx0_AntB 0xbec ++#define rPm_Rx1_AntB 0xbf0 ++#define rPm_Rx2_AntB 0xbf4 ++#define rPm_Rx3_AntB 0xbf8 ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++#define RF_S0S1 0xB0 ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPwrSeq.h new file mode 100644 -index 000000000..2bbd97697 +index 0000000..d212445 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723BPwrSeq.h @@ -0,0 +1,233 @@ -+#ifndef REALTEK_POWER_SEQUENCE_8723B -+#define REALTEK_POWER_SEQUENCE_8723B -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 -+#define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 -+#define RTL8723B_TRANS_SWLPS_TO_ACT_STEPS 15 -+#define RTL8723B_TRANS_END_STEPS 1 -+ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ -+ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ -+ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ -+ -+ -+#define RTL8723B_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ -+ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723B_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723B_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8723B_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8723B_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8723B_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+ -+ #define RTL8723B_TRANS_ACT_TO_SWLPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/ \ -+ {0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */ \ -+ {0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */ \ -+ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\ -+ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\ -+ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/ \ -+ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */ -+ -+ -+#define RTL8723B_TRANS_SWLPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ -+ {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8723B_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS+RTL8723B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; -+#endif -+ ++#ifndef REALTEK_POWER_SEQUENCE_8723B ++#define REALTEK_POWER_SEQUENCE_8723B ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 ++#define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 ++#define RTL8723B_TRANS_SWLPS_TO_ACT_STEPS 15 ++#define RTL8723B_TRANS_END_STEPS 1 ++ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ ++ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ ++ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ ++ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ ++ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ ++ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ ++ ++ ++#define RTL8723B_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ ++ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723B_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723B_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8723B_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8723B_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8723B_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++ ++ #define RTL8723B_TRANS_ACT_TO_SWLPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/ \ ++ {0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */ \ ++ {0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */ \ ++ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\ ++ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\ ++ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/ \ ++ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */ ++ ++ ++#define RTL8723B_TRANS_SWLPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ ++ {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8723B_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723PwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723PwrSeq.h new file mode 100644 -index 000000000..ab31a7a3f +index 0000000..307ac90 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8723PwrSeq.h @@ -0,0 +1,170 @@ -+#ifndef __HAL8723PWRSEQ_H__ -+#define __HAL8723PWRSEQ_H__ -+/* -+ Check document WM-20110607-Paul-RTL8723A_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#include "HalPwrSeqCmd.h" -+ -+#define RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS 15 -+#define RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8723A_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8723A_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8723A_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8723A_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8723A_TRANS_END_STEPS 1 -+ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 1},/*0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */\ -+ -+#define RTL8723A_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ -+ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723A_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723A_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8723A_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8723A_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8723A_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8723A_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8723A_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS+RTL8723A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8723A_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; -+ -+#endif -+ ++#ifndef __HAL8723PWRSEQ_H__ ++#define __HAL8723PWRSEQ_H__ ++/* ++ Check document WM-20110607-Paul-RTL8723A_Power_Architecture-R02.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#include "HalPwrSeqCmd.h" ++ ++#define RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS 15 ++#define RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8723A_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8723A_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8723A_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8723A_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8723A_TRANS_END_STEPS 1 ++ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 1},/*0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */\ ++ ++#define RTL8723A_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ ++ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723A_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723A_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8723A_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8723A_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8723A_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8723A_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8723A_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PhyCfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PhyCfg.h new file mode 100644 -index 000000000..b5241d67f +index 0000000..f8c83e1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PhyCfg.h @@ -0,0 +1,165 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8812PHYCFG_H__ -+#define __INC_HAL8812PHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 //us -+#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+ -+#ifdef CONFIG_PCI_HCI -+#define MAX_AGGR_NUM 0x0B -+#else -+#define MAX_AGGR_NUM 0x07 -+#endif // CONFIG_PCI_HCI -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/* BB/RF related */ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+// -+// BB and RF register read/write -+// -+u32 PHY_QueryBBReg8812( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+void PHY_SetBBReg8812( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+u32 PHY_QueryRFReg8812( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+void PHY_SetRFReg8812( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+ -+// -+// Initialization related function -+// -+/* MAC/BB/RF HAL config */ -+int PHY_MACConfig8812(IN PADAPTER Adapter ); -+int PHY_BBConfig8812(IN PADAPTER Adapter ); -+void PHY_BB8812_Config_1T(IN PADAPTER Adapter ); -+int PHY_RFConfig8812(IN PADAPTER Adapter ); -+ -+/* RF config */ -+ -+s32 -+PHY_SwitchWirelessBand8812( -+ IN PADAPTER Adapter, -+ IN u8 Band -+); -+ -+// -+// BB TX Power R/W -+// -+void PHY_GetTxPowerLevel8812( IN PADAPTER Adapter, OUT s32* powerlevel ); -+void PHY_SetTxPowerLevel8812( IN PADAPTER Adapter, IN u8 Channel ); -+ -+BOOLEAN PHY_UpdateTxPowerDbm8812( IN PADAPTER Adapter, IN int powerInDbm ); -+u8 PHY_GetTxPowerIndex_8812A( -+ IN PADAPTER pAdapter, -+ IN u8 RFPath, -+ IN u8 Rate, -+ IN CHANNEL_WIDTH BandWidth, -+ IN u8 Channel -+ ); -+ -+u32 PHY_GetTxBBSwing_8812A( -+ IN PADAPTER Adapter, -+ IN BAND_TYPE Band, -+ IN u8 RFPath -+ ); -+ -+VOID -+PHY_SetTxPowerIndex_8812A( -+ IN PADAPTER Adapter, -+ IN u4Byte PowerIndex, -+ IN u1Byte RFPath, -+ IN u1Byte Rate -+ ); -+ -+// -+// Switch bandwidth for 8192S -+// -+VOID -+PHY_SetBWMode8812( -+ IN PADAPTER pAdapter, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset -+); -+ -+// -+// channel switch related funciton -+// -+VOID -+PHY_SwChnl8812( -+ IN PADAPTER Adapter, -+ IN u8 channel -+); -+ -+ -+VOID -+PHY_SetSwChnlBWMode8812( -+ IN PADAPTER Adapter, -+ IN u8 channel, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset40, -+ IN u8 Offset80 -+); -+ -+// -+// BB/MAC/RF other monitor API -+// -+ -+VOID -+PHY_SetRFPathSwitch_8812A( -+ IN PADAPTER pAdapter, -+ IN BOOLEAN bMain -+); -+ -+/*--------------------------Exported Function prototype---------------------*/ -+#endif // __INC_HAL8192CPHYCFG_H -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8812PHYCFG_H__ ++#define __INC_HAL8812PHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/* BB/RF related */ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 PHY_QueryBBReg8812( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetBBReg8812( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 PHY_QueryRFReg8812( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetRFReg8812( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8812(IN PADAPTER Adapter ); ++int PHY_BBConfig8812(IN PADAPTER Adapter ); ++void PHY_BB8812_Config_1T(IN PADAPTER Adapter ); ++int PHY_RFConfig8812(IN PADAPTER Adapter ); ++ ++/* RF config */ ++ ++s32 ++PHY_SwitchWirelessBand8812( ++ IN PADAPTER Adapter, ++ IN u8 Band ++); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8812( IN PADAPTER Adapter, OUT s32* powerlevel ); ++void PHY_SetTxPowerLevel8812( IN PADAPTER Adapter, IN u8 Channel ); ++ ++BOOLEAN PHY_UpdateTxPowerDbm8812( IN PADAPTER Adapter, IN int powerInDbm ); ++u8 PHY_GetTxPowerIndex_8812A( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++u32 PHY_GetTxBBSwing_8812A( ++ IN PADAPTER Adapter, ++ IN BAND_TYPE Band, ++ IN u8 RFPath ++ ); ++ ++VOID ++PHY_SetTxPowerIndex_8812A( ++ IN PADAPTER Adapter, ++ IN u4Byte PowerIndex, ++ IN u1Byte RFPath, ++ IN u1Byte Rate ++ ); ++ ++// ++// Switch bandwidth for 8192S ++// ++VOID ++PHY_SetBWMode8812( ++ IN PADAPTER pAdapter, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset ++); ++ ++// ++// channel switch related funciton ++// ++VOID ++PHY_SwChnl8812( ++ IN PADAPTER Adapter, ++ IN u8 channel ++); ++ ++ ++VOID ++PHY_SetSwChnlBWMode8812( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++// ++// BB/MAC/RF other monitor API ++// ++ ++VOID ++PHY_SetRFPathSwitch_8812A( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++#endif // __INC_HAL8192CPHYCFG_H ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PhyReg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PhyReg.h new file mode 100644 -index 000000000..de9cefe5d +index 0000000..0fe2b58 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PhyReg.h @@ -0,0 +1,739 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8812PHYREG_H__ -+#define __INC_HAL8812PHYREG_H__ -+/*--------------------------Define Parameters-------------------------------*/ -+// -+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+// 3. RF register 0x00-2E -+// 4. Bit Mask for BB/RF register -+// 5. Other defintion for BB/RF R/W -+// -+ -+ -+// BB Register Definition -+ -+#define rCCAonSec_Jaguar 0x838 -+#define rPwed_TH_Jaguar 0x830 -+ -+// BW and sideband setting -+#define rBWIndication_Jaguar 0x834 -+#define rL1PeakTH_Jaguar 0x848 -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /*Tranceiver LSSI Readback*/ -+#define rRFMOD_Jaguar 0x8ac //RF mode -+#define rADC_Buf_Clk_Jaguar 0x8c4 -+#define rRFECTRL_Jaguar 0x900 -+#define bRFMOD_Jaguar 0xc3 -+#define rCCK_System_Jaguar 0xa00 // for cck sideband -+#define bCCK_System_Jaguar 0x10 -+ -+// Block & Path enable -+#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable -+#define bOFDMEN_Jaguar 0x20000000 -+#define bCCKEN_Jaguar 0x10000000 -+#define rRxPath_Jaguar 0x808 // Rx antenna -+#define bRxPath_Jaguar 0xff -+#define rTxPath_Jaguar 0x80c // Tx antenna -+#define bTxPath_Jaguar 0x0fffffff -+#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection -+#define bCCK_RX_Jaguar 0x0c000000 -+#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length -+ -+// RF read/write-related -+#define rHSSIRead_Jaguar 0x8b0 // RF read addr -+#define bHSSIRead_addr_Jaguar 0xff -+#define bHSSIRead_trigger_Jaguar 0x100 -+#define rA_PIRead_Jaguar 0xd04 // RF readback with PI -+#define rB_PIRead_Jaguar 0xd44 // RF readback with PI -+#define rA_SIRead_Jaguar 0xd08 // RF readback with SI -+#define rB_SIRead_Jaguar 0xd48 // RF readback with SI -+#define rRead_data_Jaguar 0xfffff -+#define rA_LSSIWrite_Jaguar 0xc90 // RF write addr -+#define rB_LSSIWrite_Jaguar 0xe90 // RF write addr -+#define bLSSIWrite_data_Jaguar 0x000fffff -+#define bLSSIWrite_addr_Jaguar 0x0ff00000 -+ -+ -+ -+// YN: mask the following register definition temporarily -+#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+//#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+//#define rFPGA0_XCD_RFParameter 0x87c -+ -+//#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+//#define rFPGA0_AnalogParameter2 0x884 -+//#define rFPGA0_AnalogParameter3 0x888 -+//#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy -+//#define rFPGA0_AnalogParameter4 0x88c -+ -+ -+// CCK TX scaling -+#define rCCK_TxFilter1_Jaguar 0xa20 -+#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 -+#define bCCK_TxFilter1_C1_Jaguar 0xff000000 -+#define rCCK_TxFilter2_Jaguar 0xa24 -+#define bCCK_TxFilter2_C2_Jaguar 0x000000ff -+#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 -+#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 -+#define bCCK_TxFilter2_C5_Jaguar 0xff000000 -+#define rCCK_TxFilter3_Jaguar 0xa28 -+#define bCCK_TxFilter3_C6_Jaguar 0x000000ff -+#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 -+ -+ -+// YN: mask the following register definition temporarily -+//#define rPdp_AntA 0xb00 -+//#define rPdp_AntA_4 0xb04 -+//#define rConfig_Pmpd_AntA 0xb28 -+//#define rConfig_AntA 0xb68 -+//#define rConfig_AntB 0xb6c -+//#define rPdp_AntB 0xb70 -+//#define rPdp_AntB_4 0xb74 -+//#define rConfig_Pmpd_AntB 0xb98 -+//#define rAPK 0xbd8 -+ -+// RXIQC -+#define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B -+#define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D -+#define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor -+#define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor -+#define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B -+#define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D -+#define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C -+#define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C -+ -+ -+// DIG-related -+#define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A -+#define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B -+#define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break -+#define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing -+#define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm -+#define b_FalseAlarm_Jaguar 0xffff -+#define rCCK_CCA_Jaguar 0xa08 // cca threshold -+#define bCCK_CCA_Jaguar 0x00ff0000 -+ -+// Tx Power Ttraining-related -+#define rA_TxPwrTraing_Jaguar 0xc54 -+#define rB_TxPwrTraing_Jaguar 0xe54 -+ -+// Report-related -+#define rOFDM_ShortCFOAB_Jaguar 0xf60 -+#define rOFDM_LongCFOAB_Jaguar 0xf64 -+#define rOFDM_EndCFOAB_Jaguar 0xf70 -+#define rOFDM_AGCReport_Jaguar 0xf84 -+#define rOFDM_RxSNR_Jaguar 0xf88 -+#define rOFDM_RxEVMCSI_Jaguar 0xf8c -+#define rOFDM_SIGReport_Jaguar 0xf90 -+ -+// Misc functions -+#define rEDCCA_Jaguar 0x8a4 // EDCCA -+#define bEDCCA_Jaguar 0xffff -+#define rAGC_table_Jaguar 0x82c // AGC tabel select -+#define bAGC_table_Jaguar 0x3 -+#define b_sel5g_Jaguar 0x1000 // sel5g -+#define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA -+#define rFc_area_Jaguar 0x860 // fc_area -+#define bFc_area_Jaguar 0x1ffe000 -+#define rSingleTone_ContTx_Jaguar 0x914 -+ -+// RFE -+#define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux -+#define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux -+#define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol -+#define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control -+#define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol -+#define rB_RFE_Jaguar 0xeb8 // Path_B RFE control -+#define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control -+#define bMask_RFEInv_Jaguar 0x3ff00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+// TX AGC -+#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 -+#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 -+#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 -+#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c -+#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 -+#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 -+#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 -+#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c -+#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 -+#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 -+#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 -+#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c -+#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 -+#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 -+#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 -+#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c -+#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 -+#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 -+#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 -+#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c -+#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 -+#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 -+#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 -+#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c -+#define bTxAGC_byte0_Jaguar 0xff -+#define bTxAGC_byte1_Jaguar 0xff00 -+#define bTxAGC_byte2_Jaguar 0xff0000 -+#define bTxAGC_byte3_Jaguar 0xff000000 -+ -+// IQK YN: temporaily mask this part -+//#define rFPGA0_IQK 0xe28 -+//#define rTx_IQK_Tone_A 0xe30 -+//#define rRx_IQK_Tone_A 0xe34 -+//#define rTx_IQK_PI_A 0xe38 -+//#define rRx_IQK_PI_A 0xe3c -+ -+//#define rTx_IQK 0xe40 -+//#define rRx_IQK 0xe44 -+//#define rIQK_AGC_Pts 0xe48 -+//#define rIQK_AGC_Rsp 0xe4c -+//#define rTx_IQK_Tone_B 0xe50 -+//#define rRx_IQK_Tone_B 0xe54 -+//#define rTx_IQK_PI_B 0xe58 -+//#define rRx_IQK_PI_B 0xe5c -+//#define rIQK_AGC_Cont 0xe60 -+ -+ -+// AFE-related -+#define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control -+#define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control -+#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 -+#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c -+#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 -+#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 -+#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 -+#define rA_Rx2Rx_BT_Jaguar 0xc7c -+#define rA_sleep_nav_Jaguar 0xc80 -+#define rA_pmpd_Jaguar 0xc84 -+#define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control -+#define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control -+#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 -+#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c -+#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 -+#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 -+#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 -+#define rB_Rx2Rx_BT_Jaguar 0xe7c -+#define rB_sleep_nav_Jaguar 0xe80 -+#define rB_pmpd_Jaguar 0xe84 -+ -+ -+// YN: mask these registers temporaily -+//#define rTx_Power_Before_IQK_A 0xe94 -+//#define rTx_Power_After_IQK_A 0xe9c -+ -+//#define rRx_Power_Before_IQK_A 0xea0 -+//#define rRx_Power_Before_IQK_A_2 0xea4 -+//#define rRx_Power_After_IQK_A 0xea8 -+//#define rRx_Power_After_IQK_A_2 0xeac -+ -+//#define rTx_Power_Before_IQK_B 0xeb4 -+//#define rTx_Power_After_IQK_B 0xebc -+ -+//#define rRx_Power_Before_IQK_B 0xec0 -+//#define rRx_Power_Before_IQK_B_2 0xec4 -+//#define rRx_Power_After_IQK_B 0xec8 -+//#define rRx_Power_After_IQK_B_2 0xecc -+ -+ -+// RSSI Dump -+#define rA_RSSIDump_Jaguar 0xBF0 -+#define rB_RSSIDump_Jaguar 0xBF1 -+#define rS1_RXevmDump_Jaguar 0xBF4 -+#define rS2_RXevmDump_Jaguar 0xBF5 -+#define rA_RXsnrDump_Jaguar 0xBF6 -+#define rB_RXsnrDump_Jaguar 0xBF7 -+#define rA_CfoShortDump_Jaguar 0xBF8 -+#define rB_CfoShortDump_Jaguar 0xBFA -+#define rA_CfoLongDump_Jaguar 0xBEC -+#define rB_CfoLongDump_Jaguar 0xBEE -+ -+ -+// RF Register -+// -+#define RF_AC_Jaguar 0x00 // -+#define RF_RF_Top_Jaguar 0x07 // -+#define RF_TXLOK_Jaguar 0x08 // -+#define RF_TXAPK_Jaguar 0x0B -+#define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch -+#define RF_RCK1_Jaguar 0x1c // -+#define RF_RCK2_Jaguar 0x1d -+#define RF_RCK3_Jaguar 0x1e -+#define RF_ModeTableAddr 0x30 -+#define RF_ModeTableData0 0x31 -+#define RF_ModeTableData1 0x32 -+#define RF_TxLCTank_Jaguar 0x54 -+#define RF_APK_Jaguar 0x63 -+#define RF_LCK 0xB4 -+#define RF_WeLut_Jaguar 0xEF -+ -+#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 -+#define bRF_CHNLBW_BW 0xc00 -+ -+ -+// -+// RL6052 Register definition -+// -+#define RF_AC 0x00 // -+#define RF_IPA_A 0x0C // -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_MODE1 0x10 // -+#define RF_MODE2 0x11 // -+#define RF_CHNLBW 0x18 // RF channel and BW switch -+#define RF_RCK_OS 0x30 // RF TX PA control -+#define RF_TXPA_G1 0x31 // RF TX PA control -+#define RF_TXPA_G2 0x32 // RF TX PA control -+#define RF_TXPA_G3 0x33 // RF TX PA control -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+ -+#define RF_TX_GAIN_OFFSET_8812A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) -+#define RF_TX_GAIN_OFFSET_8821A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) -+ -+// -+//Bit Mask -+// -+// 1. Page1(0x100) -+#define bBBResetB 0x100 // Useless now? -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+ -+// -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 1. Page1(0x100) -+// -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+// -+// 3. Page8(0x800) -+// -+#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? -+ -+#define rFPGA0_TxInfo 0x804 // Status report?? -+#define rFPGA0_PSDFunction 0x808 -+#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy -+#define rFPGA0_AnalogParameter4 0x88c -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XCD_RFPara 0x8b4 -+ -+// -+// 4. Page9(0x900) -+// -+#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? -+ -+#define rFPGA1_TxBlock 0x904 // Useless now -+#define rFPGA1_DebugSelect 0x908 // Useless now -+#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? -+ -+// -+// PageA(0xA00) -+// -+#define rCCK0_System 0xa00 -+#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -+#define rCCK0_DSPParameter2 0xa1c //SQ threshold -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -+#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -+ -+// -+// PageB(0xB00) -+// -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+// -+// 6. PageC(0xC00) -+// -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -+#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -+#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -+#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -+#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI -+ -+#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -+#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -+#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -+#define rOFDM0_ECCAThreshold 0xc4c // energy CCA -+ -+#define rOFDM0_XAAGCCore1 0xc50 // DIG -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+// -+// 7. PageD(0xD00) -+// -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+// -+// 8. PageE(0xE00) -+// -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+ -+// 2. Page8(0x800) -+#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+// 4. PageA(0xA00) -+#define bCCKBBMode 0x3 // Useless -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch -+ -+#define bCCKScramble 0x8 // Useless -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 //r_rx_clk -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f //AGCsamp_dly -+#define bCCKFixedRxAGC 0x8000 -+//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+// 6. PageE(0xE00) -+#define bSTBCEn 0x4 // Useless -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+ -+ -+// -+// Other Definition -+// -+ -+#define bEnable 0x1 // Useless -+#define bDisable 0x0 -+ -+//byte endable for srwrite -+#define bByte0 0x1 // Useless -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+//for PutRegsetting & GetRegSetting BitMask -+#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8812PHYREG_H__ ++#define __INC_HAL8812PHYREG_H__ ++/*--------------------------Define Parameters-------------------------------*/ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// BB Register Definition ++ ++#define rCCAonSec_Jaguar 0x838 ++#define rPwed_TH_Jaguar 0x830 ++ ++// BW and sideband setting ++#define rBWIndication_Jaguar 0x834 ++#define rL1PeakTH_Jaguar 0x848 ++#define rFPGA0_XA_LSSIReadBack 0x8a0 /*Tranceiver LSSI Readback*/ ++#define rRFMOD_Jaguar 0x8ac //RF mode ++#define rADC_Buf_Clk_Jaguar 0x8c4 ++#define rRFECTRL_Jaguar 0x900 ++#define bRFMOD_Jaguar 0xc3 ++#define rCCK_System_Jaguar 0xa00 // for cck sideband ++#define bCCK_System_Jaguar 0x10 ++ ++// Block & Path enable ++#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable ++#define bOFDMEN_Jaguar 0x20000000 ++#define bCCKEN_Jaguar 0x10000000 ++#define rRxPath_Jaguar 0x808 // Rx antenna ++#define bRxPath_Jaguar 0xff ++#define rTxPath_Jaguar 0x80c // Tx antenna ++#define bTxPath_Jaguar 0x0fffffff ++#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection ++#define bCCK_RX_Jaguar 0x0c000000 ++#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length ++ ++// RF read/write-related ++#define rHSSIRead_Jaguar 0x8b0 // RF read addr ++#define bHSSIRead_addr_Jaguar 0xff ++#define bHSSIRead_trigger_Jaguar 0x100 ++#define rA_PIRead_Jaguar 0xd04 // RF readback with PI ++#define rB_PIRead_Jaguar 0xd44 // RF readback with PI ++#define rA_SIRead_Jaguar 0xd08 // RF readback with SI ++#define rB_SIRead_Jaguar 0xd48 // RF readback with SI ++#define rRead_data_Jaguar 0xfffff ++#define rA_LSSIWrite_Jaguar 0xc90 // RF write addr ++#define rB_LSSIWrite_Jaguar 0xe90 // RF write addr ++#define bLSSIWrite_data_Jaguar 0x000fffff ++#define bLSSIWrite_addr_Jaguar 0x0ff00000 ++ ++ ++ ++// YN: mask the following register definition temporarily ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++//#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++//#define rFPGA0_XCD_RFParameter 0x87c ++ ++//#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++//#define rFPGA0_AnalogParameter2 0x884 ++//#define rFPGA0_AnalogParameter3 0x888 ++//#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++//#define rFPGA0_AnalogParameter4 0x88c ++ ++ ++// CCK TX scaling ++#define rCCK_TxFilter1_Jaguar 0xa20 ++#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 ++#define bCCK_TxFilter1_C1_Jaguar 0xff000000 ++#define rCCK_TxFilter2_Jaguar 0xa24 ++#define bCCK_TxFilter2_C2_Jaguar 0x000000ff ++#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 ++#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 ++#define bCCK_TxFilter2_C5_Jaguar 0xff000000 ++#define rCCK_TxFilter3_Jaguar 0xa28 ++#define bCCK_TxFilter3_C6_Jaguar 0x000000ff ++#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 ++ ++ ++// YN: mask the following register definition temporarily ++//#define rPdp_AntA 0xb00 ++//#define rPdp_AntA_4 0xb04 ++//#define rConfig_Pmpd_AntA 0xb28 ++//#define rConfig_AntA 0xb68 ++//#define rConfig_AntB 0xb6c ++//#define rPdp_AntB 0xb70 ++//#define rPdp_AntB_4 0xb74 ++//#define rConfig_Pmpd_AntB 0xb98 ++//#define rAPK 0xbd8 ++ ++// RXIQC ++#define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B ++#define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D ++#define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor ++#define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor ++#define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B ++#define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D ++#define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C ++#define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C ++ ++ ++// DIG-related ++#define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A ++#define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B ++#define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break ++#define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing ++#define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm ++#define b_FalseAlarm_Jaguar 0xffff ++#define rCCK_CCA_Jaguar 0xa08 // cca threshold ++#define bCCK_CCA_Jaguar 0x00ff0000 ++ ++// Tx Power Ttraining-related ++#define rA_TxPwrTraing_Jaguar 0xc54 ++#define rB_TxPwrTraing_Jaguar 0xe54 ++ ++// Report-related ++#define rOFDM_ShortCFOAB_Jaguar 0xf60 ++#define rOFDM_LongCFOAB_Jaguar 0xf64 ++#define rOFDM_EndCFOAB_Jaguar 0xf70 ++#define rOFDM_AGCReport_Jaguar 0xf84 ++#define rOFDM_RxSNR_Jaguar 0xf88 ++#define rOFDM_RxEVMCSI_Jaguar 0xf8c ++#define rOFDM_SIGReport_Jaguar 0xf90 ++ ++// Misc functions ++#define rEDCCA_Jaguar 0x8a4 // EDCCA ++#define bEDCCA_Jaguar 0xffff ++#define rAGC_table_Jaguar 0x82c // AGC tabel select ++#define bAGC_table_Jaguar 0x3 ++#define b_sel5g_Jaguar 0x1000 // sel5g ++#define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA ++#define rFc_area_Jaguar 0x860 // fc_area ++#define bFc_area_Jaguar 0x1ffe000 ++#define rSingleTone_ContTx_Jaguar 0x914 ++ ++// RFE ++#define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux ++#define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux ++#define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol ++#define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control ++#define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol ++#define rB_RFE_Jaguar 0xeb8 // Path_B RFE control ++#define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control ++#define bMask_RFEInv_Jaguar 0x3ff00000 ++#define bMask_AntselPathFollow_Jaguar 0x00030000 ++ ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 ++#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c ++#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 ++#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 ++#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 ++#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c ++#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 ++#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c ++#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 ++#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 ++#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 ++#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c ++#define bTxAGC_byte0_Jaguar 0xff ++#define bTxAGC_byte1_Jaguar 0xff00 ++#define bTxAGC_byte2_Jaguar 0xff0000 ++#define bTxAGC_byte3_Jaguar 0xff000000 ++ ++// IQK YN: temporaily mask this part ++//#define rFPGA0_IQK 0xe28 ++//#define rTx_IQK_Tone_A 0xe30 ++//#define rRx_IQK_Tone_A 0xe34 ++//#define rTx_IQK_PI_A 0xe38 ++//#define rRx_IQK_PI_A 0xe3c ++ ++//#define rTx_IQK 0xe40 ++//#define rRx_IQK 0xe44 ++//#define rIQK_AGC_Pts 0xe48 ++//#define rIQK_AGC_Rsp 0xe4c ++//#define rTx_IQK_Tone_B 0xe50 ++//#define rRx_IQK_Tone_B 0xe54 ++//#define rTx_IQK_PI_B 0xe58 ++//#define rRx_IQK_PI_B 0xe5c ++//#define rIQK_AGC_Cont 0xe60 ++ ++ ++// AFE-related ++#define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control ++#define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control ++#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 ++#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c ++#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 ++#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 ++#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 ++#define rA_Rx2Rx_BT_Jaguar 0xc7c ++#define rA_sleep_nav_Jaguar 0xc80 ++#define rA_pmpd_Jaguar 0xc84 ++#define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control ++#define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control ++#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 ++#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c ++#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 ++#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 ++#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 ++#define rB_Rx2Rx_BT_Jaguar 0xe7c ++#define rB_sleep_nav_Jaguar 0xe80 ++#define rB_pmpd_Jaguar 0xe84 ++ ++ ++// YN: mask these registers temporaily ++//#define rTx_Power_Before_IQK_A 0xe94 ++//#define rTx_Power_After_IQK_A 0xe9c ++ ++//#define rRx_Power_Before_IQK_A 0xea0 ++//#define rRx_Power_Before_IQK_A_2 0xea4 ++//#define rRx_Power_After_IQK_A 0xea8 ++//#define rRx_Power_After_IQK_A_2 0xeac ++ ++//#define rTx_Power_Before_IQK_B 0xeb4 ++//#define rTx_Power_After_IQK_B 0xebc ++ ++//#define rRx_Power_Before_IQK_B 0xec0 ++//#define rRx_Power_Before_IQK_B_2 0xec4 ++//#define rRx_Power_After_IQK_B 0xec8 ++//#define rRx_Power_After_IQK_B_2 0xecc ++ ++ ++// RSSI Dump ++#define rA_RSSIDump_Jaguar 0xBF0 ++#define rB_RSSIDump_Jaguar 0xBF1 ++#define rS1_RXevmDump_Jaguar 0xBF4 ++#define rS2_RXevmDump_Jaguar 0xBF5 ++#define rA_RXsnrDump_Jaguar 0xBF6 ++#define rB_RXsnrDump_Jaguar 0xBF7 ++#define rA_CfoShortDump_Jaguar 0xBF8 ++#define rB_CfoShortDump_Jaguar 0xBFA ++#define rA_CfoLongDump_Jaguar 0xBEC ++#define rB_CfoLongDump_Jaguar 0xBEE ++ ++ ++// RF Register ++// ++#define RF_AC_Jaguar 0x00 // ++#define RF_RF_Top_Jaguar 0x07 // ++#define RF_TXLOK_Jaguar 0x08 // ++#define RF_TXAPK_Jaguar 0x0B ++#define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch ++#define RF_RCK1_Jaguar 0x1c // ++#define RF_RCK2_Jaguar 0x1d ++#define RF_RCK3_Jaguar 0x1e ++#define RF_ModeTableAddr 0x30 ++#define RF_ModeTableData0 0x31 ++#define RF_ModeTableData1 0x32 ++#define RF_TxLCTank_Jaguar 0x54 ++#define RF_APK_Jaguar 0x63 ++#define RF_LCK 0xB4 ++#define RF_WeLut_Jaguar 0xEF ++ ++#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 ++#define bRF_CHNLBW_BW 0xc00 ++ ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++ ++#define RF_TX_GAIN_OFFSET_8812A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) ++#define RF_TX_GAIN_OFFSET_8821A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XCD_RFPara 0x8b4 ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// PageA(0xA00) ++// ++#define rCCK0_System 0xa00 ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++ ++ ++// ++// Other Definition ++// ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++//byte endable for srwrite ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PwrSeq.h new file mode 100644 -index 000000000..fdf127cc6 +index 0000000..5d6a7ad --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8812PwrSeq.h @@ -0,0 +1,210 @@ -+ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __HAL8812PWRSEQ_H__ -+#define __HAL8812PWRSEQ_H__ -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8812_TRANS_CARDEMU_TO_ACT_STEPS 15 -+#define RTL8812_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8812_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8812_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8812_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8812_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8812_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8812_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8812_TRANS_END_STEPS 1 -+ -+ -+#define RTL8812_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ -+ -+#define RTL8812_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},//0x1F[7:0] = 0 turn off RF*/ \ -+ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},//0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x2A}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ -+ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, // 0x02[1:0] = 0 reset BB */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ -+ -+#define RTL8812_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'11 enable WL suspend for PCIe*/ -+ -+#define RTL8812_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ -+ -+#define RTL8812_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ -+ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 8051*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x05}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/*0x12[0] = 0 force PFM mode */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8812 */ \ -+ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x076[1]=0 , disable RFC_1 control REG_OPT_CTRL_8812 +2 */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'01 enable WL suspend*/ -+ -+#define RTL8812_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x12[0] = 1 force PWM mode */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x03[2] = 1, enable 8051*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8812_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8812_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8812_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ -+ -+ -+#define RTL8812_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/ \ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8812_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8812_power_on_flow[RTL8812_TRANS_CARDEMU_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_radio_off_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_card_disable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_card_enable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_suspend_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_resume_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_hwpdn_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_enter_lps_flow[RTL8812_TRANS_ACT_TO_LPS_STEPS+RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; -+ -+#endif //__HAL8812PWRSEQ_H__ -+ ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL8812PWRSEQ_H__ ++#define __HAL8812PWRSEQ_H__ ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8812_TRANS_CARDEMU_TO_ACT_STEPS 15 ++#define RTL8812_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8812_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8812_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8812_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8812_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8812_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8812_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8812_TRANS_END_STEPS 1 ++ ++ ++#define RTL8812_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ ++ ++#define RTL8812_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},//0x1F[7:0] = 0 turn off RF*/ \ ++ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},//0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x2A}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, // 0x02[1:0] = 0 reset BB */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ ++ ++#define RTL8812_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'11 enable WL suspend for PCIe*/ ++ ++#define RTL8812_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ ++ ++#define RTL8812_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ ++ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 8051*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x05}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/*0x12[0] = 0 force PFM mode */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8812 */ \ ++ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x076[1]=0 , disable RFC_1 control REG_OPT_CTRL_8812 +2 */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'01 enable WL suspend*/ ++ ++#define RTL8812_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x12[0] = 1 force PWM mode */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x03[2] = 1, enable 8051*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8812_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8812_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8812_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ ++ ++ ++#define RTL8812_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/ \ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8812_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8812_power_on_flow[RTL8812_TRANS_CARDEMU_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_radio_off_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_card_disable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_card_enable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_suspend_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_resume_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_hwpdn_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_enter_lps_flow[RTL8812_TRANS_ACT_TO_LPS_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; ++ ++#endif //__HAL8812PWRSEQ_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PhyCfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PhyCfg.h new file mode 100644 -index 000000000..4772692af +index 0000000..d6be797 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PhyCfg.h @@ -0,0 +1,282 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8814PHYCFG_H__ -+#define __INC_HAL8814PHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 //us -+#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+ -+#ifdef CONFIG_PCI_HCI -+#define MAX_AGGR_NUM 0x0B -+#else -+#define MAX_AGGR_NUM 0x07 -+#endif // CONFIG_PCI_HCI -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/* BB/RF related */ -+ -+#define SIC_ENABLE 0 -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+//1. BB register R/W API -+ -+extern u32 -+PHY_QueryBBReg8814A( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+ -+ -+VOID -+PHY_SetBBReg8814A( IN PADAPTER Adapter, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+ -+ -+extern u32 -+PHY_QueryRFReg8814A( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask ); -+ -+ -+void -+PHY_SetRFReg8814A( IN PADAPTER Adapter, -+ IN u8 eRFPath, -+ IN u32 RegAddr, -+ IN u32 BitMask, -+ IN u32 Data ); -+ -+//1 3. Initial BB/RF config by reading MAC/BB/RF txt. -+s32 -+phy_BB8814A_Config_ParaFile( -+ IN PADAPTER Adapter -+ ); -+ -+ -+RT_STATUS -+PHY_BBConfigMP_8814A( -+ IN PADAPTER Adapter -+ ); -+ -+VOID -+PHY_ConfigBB_8814A( -+ IN PADAPTER Adapter -+ ); -+ -+ -+VOID -+phy_ADC_CLK_8814A( -+ IN PADAPTER Adapter -+ ); -+ -+s32 -+PHY_RFConfig8814A( -+ IN PADAPTER Adapter -+ ); -+ -+// -+// RF Power setting -+// -+//BOOLEAN PHY_SetRFPowerState8814A(PADAPTER Adapter, rt_rf_power_state eRFPowerState); -+ -+//1 5. Tx Power setting API -+ -+VOID -+PHY_GetTxPowerLevel8814( -+ IN PADAPTER Adapter, -+ OUT ps4Byte powerlevel -+ ); -+ -+VOID -+PHY_SetTxPowerLevel8814( -+ IN PADAPTER Adapter, -+ IN u8 Channel -+ ); -+ -+u8 -+PHY_GetTxPowerIndex_8814A( -+ IN PADAPTER Adapter, -+ IN u8 RFPath, -+ IN u8 Rate, -+ IN CHANNEL_WIDTH BandWidth, -+ IN u8 Channel -+ ); -+ -+VOID -+PHY_SetTxPowerIndex_8814A( -+ IN PADAPTER Adapter, -+ IN u32 PowerIndex, -+ IN u8 RFPath, -+ IN u8 Rate -+ ); -+ -+ -+BOOLEAN -+PHY_UpdateTxPowerDbm8814A( -+ IN PADAPTER Adapter, -+ IN s4Byte powerInDbm -+ ); -+ -+ -+u32 -+PHY_GetTxBBSwing_8814A( -+ IN PADAPTER Adapter, -+ IN BAND_TYPE Band, -+ IN u8 RFPath -+ ); -+ -+ -+ -+//1 6. Channel setting API -+ -+VOID -+PHY_SwChnlTimerCallback8814A( -+ IN PRT_TIMER pTimer -+ ); -+ -+VOID -+PHY_SwChnlWorkItemCallback8814A( -+ IN PVOID pContext -+ ); -+ -+ -+VOID -+HAL_HandleSwChnl8814A( -+ IN PADAPTER pAdapter, -+ IN u8 channel -+ ); -+ -+VOID -+PHY_SwChnlSynchronously8814A( IN PADAPTER pAdapter, -+ IN u8 channel ); -+ -+VOID -+PHY_SwChnlAndSetBWModeCallback8814A(IN PVOID pContext); -+ -+ -+VOID -+PHY_HandleSwChnlAndSetBW8814A( -+ IN PADAPTER Adapter, -+ IN BOOLEAN bSwitchChannel, -+ IN BOOLEAN bSetBandWidth, -+ IN u8 ChannelNum, -+ IN CHANNEL_WIDTH ChnlWidth, -+ IN u8 ChnlOffsetOf40MHz, -+ IN u8 ChnlOffsetOf80MHz, -+ IN u8 CenterFrequencyIndex1 -+); -+ -+ -+BOOLEAN -+PHY_QueryRFPathSwitch_8814A( IN PADAPTER pAdapter); -+ -+ -+ -+//VOID PHY_SetMonitorMode8814A(PADAPTER pAdapter, BOOLEAN bEnableMonitorMode); -+ -+ -+#if (USE_WORKITEM) -+VOID -+RtCheckForHangWorkItemCallback8814A( -+ IN PVOID pContext -+); -+#endif -+ -+BOOLEAN -+SetAntennaConfig8814A( -+ IN PADAPTER Adapter, -+ IN u8 DefaultAnt -+ ); -+ -+VOID -+PHY_SetRFEReg8814A( -+ IN PADAPTER Adapter, -+ IN BOOLEAN bInit, -+ IN u8 Band -+ ); -+ -+ -+s32 -+PHY_SwitchWirelessBand8814A( -+ IN PADAPTER Adapter, -+ IN u8 Band -+); -+ -+VOID -+PHY_SetIO_8814A( -+ PADAPTER pAdapter -+ ); -+ -+VOID -+PHY_SetBWMode8814( -+ IN PADAPTER Adapter, -+ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M -+ IN u8 Offset // Upper, Lower, or Don't care -+); -+ -+VOID -+PHY_SwChnl8814( -+ IN PADAPTER Adapter, -+ IN u8 channel -+ ); -+ -+VOID -+PHY_SetSwChnlBWMode8814( -+ IN PADAPTER Adapter, -+ IN u8 channel, -+ IN CHANNEL_WIDTH Bandwidth, -+ IN u8 Offset40, -+ IN u8 Offset80 -+); -+ -+s32 PHY_MACConfig8814(PADAPTER Adapter); -+int PHY_BBConfig8814(PADAPTER Adapter); -+VOID PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER pAdapter, u4Byte ulAntennaRx); -+ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+#endif // __INC_HAL8192CPHYCFG_H -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8814PHYCFG_H__ ++#define __INC_HAL8814PHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/* BB/RF related */ ++ ++#define SIC_ENABLE 0 ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++//1. BB register R/W API ++ ++extern u32 ++PHY_QueryBBReg8814A( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++ ++ ++VOID ++PHY_SetBBReg8814A( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++ ++extern u32 ++PHY_QueryRFReg8814A( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++ ++ ++void ++PHY_SetRFReg8814A( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++//1 3. Initial BB/RF config by reading MAC/BB/RF txt. ++s32 ++phy_BB8814A_Config_ParaFile( ++ IN PADAPTER Adapter ++ ); ++ ++ ++RT_STATUS ++PHY_BBConfigMP_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++PHY_ConfigBB_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++ ++VOID ++phy_ADC_CLK_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++s32 ++PHY_RFConfig8814A( ++ IN PADAPTER Adapter ++ ); ++ ++// ++// RF Power setting ++// ++//BOOLEAN PHY_SetRFPowerState8814A(PADAPTER Adapter, rt_rf_power_state eRFPowerState); ++ ++//1 5. Tx Power setting API ++ ++VOID ++PHY_GetTxPowerLevel8814( ++ IN PADAPTER Adapter, ++ OUT ps4Byte powerlevel ++ ); ++ ++VOID ++PHY_SetTxPowerLevel8814( ++ IN PADAPTER Adapter, ++ IN u8 Channel ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8814A( ++ IN PADAPTER Adapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++VOID ++PHY_SetTxPowerIndex_8814A( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++ ++BOOLEAN ++PHY_UpdateTxPowerDbm8814A( ++ IN PADAPTER Adapter, ++ IN s4Byte powerInDbm ++ ); ++ ++ ++u32 ++PHY_GetTxBBSwing_8814A( ++ IN PADAPTER Adapter, ++ IN BAND_TYPE Band, ++ IN u8 RFPath ++ ); ++ ++ ++ ++//1 6. Channel setting API ++ ++VOID ++PHY_SwChnlTimerCallback8814A( ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++PHY_SwChnlWorkItemCallback8814A( ++ IN PVOID pContext ++ ); ++ ++ ++VOID ++HAL_HandleSwChnl8814A( ++ IN PADAPTER pAdapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SwChnlSynchronously8814A( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++VOID ++PHY_SwChnlAndSetBWModeCallback8814A(IN PVOID pContext); ++ ++ ++VOID ++PHY_HandleSwChnlAndSetBW8814A( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bSwitchChannel, ++ IN BOOLEAN bSetBandWidth, ++ IN u8 ChannelNum, ++ IN CHANNEL_WIDTH ChnlWidth, ++ IN u8 ChnlOffsetOf40MHz, ++ IN u8 ChnlOffsetOf80MHz, ++ IN u8 CenterFrequencyIndex1 ++); ++ ++ ++BOOLEAN ++PHY_QueryRFPathSwitch_8814A( IN PADAPTER pAdapter); ++ ++ ++ ++//VOID PHY_SetMonitorMode8814A(PADAPTER pAdapter, BOOLEAN bEnableMonitorMode); ++ ++ ++#if (USE_WORKITEM) ++VOID ++RtCheckForHangWorkItemCallback8814A( ++ IN PVOID pContext ++); ++#endif ++ ++BOOLEAN ++SetAntennaConfig8814A( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++VOID ++PHY_SetRFEReg8814A( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bInit, ++ IN u8 Band ++ ); ++ ++ ++s32 ++PHY_SwitchWirelessBand8814A( ++ IN PADAPTER Adapter, ++ IN u8 Band ++); ++ ++VOID ++PHY_SetIO_8814A( ++ PADAPTER pAdapter ++ ); ++ ++VOID ++PHY_SetBWMode8814( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN u8 Offset // Upper, Lower, or Don't care ++); ++ ++VOID ++PHY_SwChnl8814( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetSwChnlBWMode8814( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++s32 PHY_MACConfig8814(PADAPTER Adapter); ++int PHY_BBConfig8814(PADAPTER Adapter); ++VOID PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER pAdapter, u4Byte ulAntennaRx); ++ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++#endif // __INC_HAL8192CPHYCFG_H ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PhyReg.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PhyReg.h new file mode 100644 -index 000000000..a82efcbf3 +index 0000000..56c74ba --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PhyReg.h @@ -0,0 +1,866 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __INC_HAL8814PHYREG_H__ -+#define __INC_HAL8814PHYREG_H__ -+/*--------------------------Define Parameters-------------------------------*/ -+// -+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+// 3. RF register 0x00-2E -+// 4. Bit Mask for BB/RF register -+// 5. Other defintion for BB/RF R/W -+// -+ -+ -+/* BB Register Definition */ -+ -+#define rCCAonSec_Jaguar 0x838 -+#define rPwed_TH_Jaguar 0x830 -+#define rL1_Weight_Jaguar 0x840 -+ -+// BW and sideband setting -+#define rBWIndication_Jaguar 0x834 -+#define rL1PeakTH_Jaguar 0x848 -+#define rRFMOD_Jaguar 0x8ac //RF mode -+#define rADC_Buf_Clk_Jaguar 0x8c4 -+#define rADC_Buf_40_Clk_Jaguar2 0x8c8 -+#define rRFECTRL_Jaguar 0x900 -+#define bRFMOD_Jaguar 0xc3 -+#define rCCK_System_Jaguar 0xa00 // for cck sideband -+#define bCCK_System_Jaguar 0x10 -+ -+// Block & Path enable -+#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable -+#define bOFDMEN_Jaguar 0x20000000 -+#define bCCKEN_Jaguar 0x10000000 -+#define rRxPath_Jaguar 0x808 // Rx antenna -+#define bRxPath_Jaguar 0xff -+#define rTxPath_Jaguar 0x80c // Tx antenna -+#define bTxPath_Jaguar 0x0fffffff -+#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection -+#define bCCK_RX_Jaguar 0x0c000000 -+#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length -+ -+#define rRxPath_Jaguar2 0xa04 // Rx antenna -+#define rTxAnt_1Nsts_Jaguar2 0x93c // Tx antenna for 1Nsts -+#define rTxAnt_23Nsts_Jaguar2 0x940 // Tx antenna for 2Nsts and 3Nsts -+ -+ -+// RF read/write-related -+#define rHSSIRead_Jaguar 0x8b0 // RF read addr -+#define bHSSIRead_addr_Jaguar 0xff -+#define bHSSIRead_trigger_Jaguar 0x100 -+#define rA_PIRead_Jaguar 0xd04 // RF readback with PI -+#define rB_PIRead_Jaguar 0xd44 // RF readback with PI -+#define rA_SIRead_Jaguar 0xd08 // RF readback with SI -+#define rB_SIRead_Jaguar 0xd48 // RF readback with SI -+#define rRead_data_Jaguar 0xfffff -+#define rA_LSSIWrite_Jaguar 0xc90 // RF write addr -+#define rB_LSSIWrite_Jaguar 0xe90 // RF write addr -+#define bLSSIWrite_data_Jaguar 0x000fffff -+#define bLSSIWrite_addr_Jaguar 0x0ff00000 -+ -+#define rC_PIRead_Jaguar2 0xd84 // RF readback with PI -+#define rD_PIRead_Jaguar2 0xdC4 // RF readback with PI -+#define rC_SIRead_Jaguar2 0xd88 // RF readback with SI -+#define rD_SIRead_Jaguar2 0xdC8 // RF readback with SI -+#define rC_LSSIWrite_Jaguar2 0x1890 // RF write addr -+#define rD_LSSIWrite_Jaguar2 0x1A90 // RF write addr -+ -+ -+// YN: mask the following register definition temporarily -+#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+//#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+//#define rFPGA0_XCD_RFParameter 0x87c -+ -+//#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+//#define rFPGA0_AnalogParameter2 0x884 -+//#define rFPGA0_AnalogParameter3 0x888 -+//#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy -+//#define rFPGA0_AnalogParameter4 0x88c -+ -+ -+// CCK TX scaling -+#define rCCK_TxFilter1_Jaguar 0xa20 -+#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 -+#define bCCK_TxFilter1_C1_Jaguar 0xff000000 -+#define rCCK_TxFilter2_Jaguar 0xa24 -+#define bCCK_TxFilter2_C2_Jaguar 0x000000ff -+#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 -+#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 -+#define bCCK_TxFilter2_C5_Jaguar 0xff000000 -+#define rCCK_TxFilter3_Jaguar 0xa28 -+#define bCCK_TxFilter3_C6_Jaguar 0x000000ff -+#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 -+/* NBI & CSI Mask setting */ -+#define rCSI_Mask_Setting1_Jaguar 0x874 -+#define rCSI_Fix_Mask0_Jaguar 0x880 -+#define rCSI_Fix_Mask1_Jaguar 0x884 -+#define rCSI_Fix_Mask2_Jaguar 0x888 -+#define rCSI_Fix_Mask3_Jaguar 0x88c -+#define rCSI_Fix_Mask4_Jaguar 0x890 -+#define rCSI_Fix_Mask5_Jaguar 0x894 -+#define rCSI_Fix_Mask6_Jaguar 0x898 -+#define rCSI_Fix_Mask7_Jaguar 0x89c -+#define rNBI_Setting_Jaguar 0x87c -+ -+ -+// YN: mask the following register definition temporarily -+//#define rPdp_AntA 0xb00 -+//#define rPdp_AntA_4 0xb04 -+//#define rConfig_Pmpd_AntA 0xb28 -+//#define rConfig_AntA 0xb68 -+//#define rConfig_AntB 0xb6c -+//#define rPdp_AntB 0xb70 -+//#define rPdp_AntB_4 0xb74 -+//#define rConfig_Pmpd_AntB 0xb98 -+//#define rAPK 0xbd8 -+ -+// RXIQC -+#define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B -+#define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D -+#define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor -+#define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor -+#define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B -+#define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D -+#define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C -+#define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C -+ -+#define rC_TxScale_Jaguar2 0x181c // Pah_C TX scaling factor -+#define rD_TxScale_Jaguar2 0x1A1c // Path_D TX scaling factor -+#define rRF_TxGainOffset 0x55 -+ -+// DIG-related -+#define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A -+#define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B -+#define rC_IGI_Jaguar2 0x1850 // Initial Gain for path-C -+#define rD_IGI_Jaguar2 0x1A50 // Initial Gain for path-D -+ -+#define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break -+#define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing -+#define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm -+#define b_FalseAlarm_Jaguar 0xffff -+#define rCCK_CCA_Jaguar 0xa08 // cca threshold -+#define bCCK_CCA_Jaguar 0x00ff0000 -+ -+// Tx Power Ttraining-related -+#define rA_TxPwrTraing_Jaguar 0xc54 -+#define rB_TxPwrTraing_Jaguar 0xe54 -+ -+// Report-related -+#define rOFDM_ShortCFOAB_Jaguar 0xf60 -+#define rOFDM_LongCFOAB_Jaguar 0xf64 -+#define rOFDM_EndCFOAB_Jaguar 0xf70 -+#define rOFDM_AGCReport_Jaguar 0xf84 -+#define rOFDM_RxSNR_Jaguar 0xf88 -+#define rOFDM_RxEVMCSI_Jaguar 0xf8c -+#define rOFDM_SIGReport_Jaguar 0xf90 -+ -+// Misc functions -+#define rEDCCA_Jaguar 0x8a4 // EDCCA -+#define bEDCCA_Jaguar 0xffff -+#define rAGC_table_Jaguar 0x82c // AGC tabel select -+#define bAGC_table_Jaguar 0x3 -+#define b_sel5g_Jaguar 0x1000 // sel5g -+#define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA -+#define rFc_area_Jaguar 0x860 // fc_area -+#define bFc_area_Jaguar 0x1ffe000 -+#define rSingleTone_ContTx_Jaguar 0x914 -+ -+#define rAGC_table_Jaguar2 0x958 // AGC tabel select -+#define rDMA_trigger_Jaguar2 0x95C // ADC sample mode -+ -+ -+// RFE -+#define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux -+#define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux -+#define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol -+#define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control -+#define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol -+#define rB_RFE_Jaguar 0xeb8 // Path_B RFE control -+#define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control -+#define bMask_RFEInv_Jaguar 0x3ff00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+#define rC_RFE_Pinmux_Jaguar 0x18B4 // Path_C RFE cotrol pinmux -+#define rD_RFE_Pinmux_Jaguar 0x1AB4 // Path_D RFE cotrol pinmux -+#define rA_RFE_Sel_Jaguar2 0x1990 -+ -+ -+ -+// TX AGC -+#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 -+#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 -+#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 -+#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c -+#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 -+#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 -+#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 -+#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c -+#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 -+#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 -+#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 -+#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c -+#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 -+#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 -+#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 -+#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c -+#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 -+#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 -+#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 -+#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c -+#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 -+#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 -+#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 -+#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c -+#define bTxAGC_byte0_Jaguar 0xff -+#define bTxAGC_byte1_Jaguar 0xff00 -+#define bTxAGC_byte2_Jaguar 0xff0000 -+#define bTxAGC_byte3_Jaguar 0xff000000 -+ -+ -+// TX AGC -+#define rTxAGC_A_CCK11_CCK1_Jaguar2 0xc20 -+#define rTxAGC_A_Ofdm18_Ofdm6_Jaguar2 0xc24 -+#define rTxAGC_A_Ofdm54_Ofdm24_Jaguar2 0xc28 -+#define rTxAGC_A_MCS3_MCS0_Jaguar2 0xc2c -+#define rTxAGC_A_MCS7_MCS4_Jaguar2 0xc30 -+#define rTxAGC_A_MCS11_MCS8_Jaguar2 0xc34 -+#define rTxAGC_A_MCS15_MCS12_Jaguar2 0xc38 -+#define rTxAGC_A_MCS19_MCS16_Jaguar2 0xcd8 -+#define rTxAGC_A_MCS23_MCS20_Jaguar2 0xcdc -+#define rTxAGC_A_Nss1Index3_Nss1Index0_Jaguar2 0xc3c -+#define rTxAGC_A_Nss1Index7_Nss1Index4_Jaguar2 0xc40 -+#define rTxAGC_A_Nss2Index1_Nss1Index8_Jaguar2 0xc44 -+#define rTxAGC_A_Nss2Index5_Nss2Index2_Jaguar2 0xc48 -+#define rTxAGC_A_Nss2Index9_Nss2Index6_Jaguar2 0xc4c -+#define rTxAGC_A_Nss3Index3_Nss3Index0_Jaguar2 0xce0 -+#define rTxAGC_A_Nss3Index7_Nss3Index4_Jaguar2 0xce4 -+#define rTxAGC_A_Nss3Index9_Nss3Index8_Jaguar2 0xce8 -+#define rTxAGC_B_CCK11_CCK1_Jaguar2 0xe20 -+#define rTxAGC_B_Ofdm18_Ofdm6_Jaguar2 0xe24 -+#define rTxAGC_B_Ofdm54_Ofdm24_Jaguar2 0xe28 -+#define rTxAGC_B_MCS3_MCS0_Jaguar2 0xe2c -+#define rTxAGC_B_MCS7_MCS4_Jaguar2 0xe30 -+#define rTxAGC_B_MCS11_MCS8_Jaguar2 0xe34 -+#define rTxAGC_B_MCS15_MCS12_Jaguar2 0xe38 -+#define rTxAGC_B_MCS19_MCS16_Jaguar2 0xed8 -+#define rTxAGC_B_MCS23_MCS20_Jaguar2 0xedc -+#define rTxAGC_B_Nss1Index3_Nss1Index0_Jaguar2 0xe3c -+#define rTxAGC_B_Nss1Index7_Nss1Index4_Jaguar2 0xe40 -+#define rTxAGC_B_Nss2Index1_Nss1Index8_Jaguar2 0xe44 -+#define rTxAGC_B_Nss2Index5_Nss2Index2_Jaguar2 0xe48 -+#define rTxAGC_B_Nss2Index9_Nss2Index6_Jaguar2 0xe4c -+#define rTxAGC_B_Nss3Index3_Nss3Index0_Jaguar2 0xee0 -+#define rTxAGC_B_Nss3Index7_Nss3Index4_Jaguar2 0xee4 -+#define rTxAGC_B_Nss3Index9_Nss3Index8_Jaguar2 0xee8 -+#define rTxAGC_C_CCK11_CCK1_Jaguar2 0x1820 -+#define rTxAGC_C_Ofdm18_Ofdm6_Jaguar2 0x1824 -+#define rTxAGC_C_Ofdm54_Ofdm24_Jaguar2 0x1828 -+#define rTxAGC_C_MCS3_MCS0_Jaguar2 0x182c -+#define rTxAGC_C_MCS7_MCS4_Jaguar2 0x1830 -+#define rTxAGC_C_MCS11_MCS8_Jaguar2 0x1834 -+#define rTxAGC_C_MCS15_MCS12_Jaguar2 0x1838 -+#define rTxAGC_C_MCS19_MCS16_Jaguar2 0x18d8 -+#define rTxAGC_C_MCS23_MCS20_Jaguar2 0x18dc -+#define rTxAGC_C_Nss1Index3_Nss1Index0_Jaguar2 0x183c -+#define rTxAGC_C_Nss1Index7_Nss1Index4_Jaguar2 0x1840 -+#define rTxAGC_C_Nss2Index1_Nss1Index8_Jaguar2 0x1844 -+#define rTxAGC_C_Nss2Index5_Nss2Index2_Jaguar2 0x1848 -+#define rTxAGC_C_Nss2Index9_Nss2Index6_Jaguar2 0x184c -+#define rTxAGC_C_Nss3Index3_Nss3Index0_Jaguar2 0x18e0 -+#define rTxAGC_C_Nss3Index7_Nss3Index4_Jaguar2 0x18e4 -+#define rTxAGC_C_Nss3Index9_Nss3Index8_Jaguar2 0x18e8 -+#define rTxAGC_D_CCK11_CCK1_Jaguar2 0x1a20 -+#define rTxAGC_D_Ofdm18_Ofdm6_Jaguar2 0x1a24 -+#define rTxAGC_D_Ofdm54_Ofdm24_Jaguar2 0x1a28 -+#define rTxAGC_D_MCS3_MCS0_Jaguar2 0x1a2c -+#define rTxAGC_D_MCS7_MCS4_Jaguar2 0x1a30 -+#define rTxAGC_D_MCS11_MCS8_Jaguar2 0x1a34 -+#define rTxAGC_D_MCS15_MCS12_Jaguar2 0x1a38 -+#define rTxAGC_D_MCS19_MCS16_Jaguar2 0x1ad8 -+#define rTxAGC_D_MCS23_MCS20_Jaguar2 0x1adc -+#define rTxAGC_D_Nss1Index3_Nss1Index0_Jaguar2 0x1a3c -+#define rTxAGC_D_Nss1Index7_Nss1Index4_Jaguar2 0x1a40 -+#define rTxAGC_D_Nss2Index1_Nss1Index8_Jaguar2 0x1a44 -+#define rTxAGC_D_Nss2Index5_Nss2Index2_Jaguar2 0x1a48 -+#define rTxAGC_D_Nss2Index9_Nss2Index6_Jaguar2 0x1a4c -+#define rTxAGC_D_Nss3Index3_Nss3Index0_Jaguar2 0x1ae0 -+#define rTxAGC_D_Nss3Index7_Nss3Index4_Jaguar2 0x1ae4 -+#define rTxAGC_D_Nss3Index9_Nss3Index8_Jaguar2 0x1ae8 -+// IQK YN: temporaily mask this part -+//#define rFPGA0_IQK 0xe28 -+//#define rTx_IQK_Tone_A 0xe30 -+//#define rRx_IQK_Tone_A 0xe34 -+//#define rTx_IQK_PI_A 0xe38 -+//#define rRx_IQK_PI_A 0xe3c -+ -+//#define rTx_IQK 0xe40 -+//#define rRx_IQK 0xe44 -+//#define rIQK_AGC_Pts 0xe48 -+//#define rIQK_AGC_Rsp 0xe4c -+//#define rTx_IQK_Tone_B 0xe50 -+//#define rRx_IQK_Tone_B 0xe54 -+//#define rTx_IQK_PI_B 0xe58 -+//#define rRx_IQK_PI_B 0xe5c -+//#define rIQK_AGC_Cont 0xe60 -+ -+ -+// AFE-related -+#define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control -+#define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control -+#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 -+#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c -+#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 -+#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 -+#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 -+#define rA_Rx2Rx_BT_Jaguar 0xc7c -+#define rA_sleep_nav_Jaguar 0xc80 -+#define rA_pmpd_Jaguar 0xc84 -+#define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control -+#define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control -+#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 -+#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c -+#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 -+#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 -+#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 -+#define rB_Rx2Rx_BT_Jaguar 0xe7c -+#define rB_sleep_nav_Jaguar 0xe80 -+#define rB_pmpd_Jaguar 0xe84 -+ -+ -+// YN: mask these registers temporaily -+//#define rTx_Power_Before_IQK_A 0xe94 -+//#define rTx_Power_After_IQK_A 0xe9c -+ -+//#define rRx_Power_Before_IQK_A 0xea0 -+//#define rRx_Power_Before_IQK_A_2 0xea4 -+//#define rRx_Power_After_IQK_A 0xea8 -+//#define rRx_Power_After_IQK_A_2 0xeac -+ -+//#define rTx_Power_Before_IQK_B 0xeb4 -+//#define rTx_Power_After_IQK_B 0xebc -+ -+//#define rRx_Power_Before_IQK_B 0xec0 -+//#define rRx_Power_Before_IQK_B_2 0xec4 -+//#define rRx_Power_After_IQK_B 0xec8 -+//#define rRx_Power_After_IQK_B_2 0xecc -+ -+ -+// RSSI Dump -+#define rA_RSSIDump_Jaguar 0xBF0 -+#define rB_RSSIDump_Jaguar 0xBF1 -+#define rS1_RXevmDump_Jaguar 0xBF4 -+#define rS2_RXevmDump_Jaguar 0xBF5 -+#define rA_RXsnrDump_Jaguar 0xBF6 -+#define rB_RXsnrDump_Jaguar 0xBF7 -+#define rA_CfoShortDump_Jaguar 0xBF8 -+#define rB_CfoShortDump_Jaguar 0xBFA -+#define rA_CfoLongDump_Jaguar 0xBEC -+#define rB_CfoLongDump_Jaguar 0xBEE -+ -+ -+// RF Register -+// -+#define RF_AC_Jaguar 0x00 // -+#define RF_RF_Top_Jaguar 0x07 // -+#define RF_TXLOK_Jaguar 0x08 // -+#define RF_TXAPK_Jaguar 0x0B -+#define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch -+#define RF_RCK1_Jaguar 0x1c // -+#define RF_RCK2_Jaguar 0x1d -+#define RF_RCK3_Jaguar 0x1e -+#define RF_ModeTableAddr 0x30 -+#define RF_ModeTableData0 0x31 -+#define RF_ModeTableData1 0x32 -+#define RF_TxLCTank_Jaguar 0x54 -+#define RF_APK_Jaguar 0x63 -+#define RF_LCK 0xB4 -+#define RF_WeLut_Jaguar 0xEF -+ -+#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 -+#define bRF_CHNLBW_BW 0xc00 -+ -+ -+// -+// RL6052 Register definition -+// -+#define RF_AC 0x00 // -+#define RF_IPA_A 0x0C // -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_MODE1 0x10 // -+#define RF_MODE2 0x11 // -+#define RF_CHNLBW 0x18 // RF channel and BW switch -+#define RF_RCK_OS 0x30 // RF TX PA control -+#define RF_TXPA_G1 0x31 // RF TX PA control -+#define RF_TXPA_G2 0x32 // RF TX PA control -+#define RF_TXPA_G3 0x33 // RF TX PA control -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+ -+// -+//Bit Mask -+// -+// 1. Page1(0x100) -+#define bBBResetB 0x100 // Useless now? -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+ -+// -+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+// 1. Page1(0x100) -+// -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+// -+// 3. Page8(0x800) -+// -+#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? -+ -+#define rFPGA0_TxInfo 0x804 // Status report?? -+#define rFPGA0_PSDFunction 0x808 -+#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_XCD_RFPara 0x8b4 -+#define rFPGA0_PSDReport 0x8b4 // Useless now -+#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback -+#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now -+ -+// -+// 4. Page9(0x900) -+// -+#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? -+#define REG_BB_TX_PATH_SEL_1 0x93c -+#define REG_BB_TX_PATH_SEL_2 0x940 -+#define rFPGA1_TxBlock 0x904 // Useless now -+#define rFPGA1_DebugSelect 0x908 // Useless now -+#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? -+ /*Page 19 for TxBF*/ -+#define REG_BB_TXBF_ANT_SET_BF1 0x19ac -+#define REG_BB_TXBF_ANT_SET_BF0 0x19b4 -+// -+// PageA(0xA00) -+// -+#define rCCK0_System 0xa00 -+#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -+#define rCCK0_DSPParameter2 0xa1c //SQ threshold -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -+#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -+ -+// -+// PageB(0xB00) -+// -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+// -+// 6. PageC(0xC00) -+// -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -+#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -+#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -+#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -+#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI -+ -+#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -+#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -+#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -+#define rOFDM0_ECCAThreshold 0xc4c // energy CCA -+ -+#define rOFDM0_XAAGCCore1 0xc50 // DIG -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+// -+// 7. PageD(0xD00) -+// -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+// -+// 8. PageE(0xE00) -+// -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+ -+// 2. Page8(0x800) -+#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+// 4. PageA(0xA00) -+#define bCCKBBMode 0x3 // Useless -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch -+ -+#define bCCKScramble 0x8 // Useless -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 //r_rx_clk -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f //AGCsamp_dly -+#define bCCKFixedRxAGC 0x8000 -+//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+#define RF_T_METER_88E 0x42 // -+ -+// 6. PageE(0xE00) -+#define bSTBCEn 0x4 // Useless -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+ -+ -+// -+// Other Definition -+// -+ -+#define bEnable 0x1 // Useless -+#define bDisable 0x0 -+ -+//byte endable for srwrite -+#define bByte0 0x1 // Useless -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+//for PutRegsetting & GetRegSetting BitMask -+#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+#define bMask7bits 0x7f -+#define bMaskByte2HighNibble 0x00f00000 -+#define bMaskByte3LowNibble 0x0f000000 -+#define bMaskL3Bytes 0x00ffffff -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8814PHYREG_H__ ++#define __INC_HAL8814PHYREG_H__ ++/*--------------------------Define Parameters-------------------------------*/ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++/* BB Register Definition */ ++ ++#define rCCAonSec_Jaguar 0x838 ++#define rPwed_TH_Jaguar 0x830 ++#define rL1_Weight_Jaguar 0x840 ++ ++// BW and sideband setting ++#define rBWIndication_Jaguar 0x834 ++#define rL1PeakTH_Jaguar 0x848 ++#define rRFMOD_Jaguar 0x8ac //RF mode ++#define rADC_Buf_Clk_Jaguar 0x8c4 ++#define rADC_Buf_40_Clk_Jaguar2 0x8c8 ++#define rRFECTRL_Jaguar 0x900 ++#define bRFMOD_Jaguar 0xc3 ++#define rCCK_System_Jaguar 0xa00 // for cck sideband ++#define bCCK_System_Jaguar 0x10 ++ ++// Block & Path enable ++#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable ++#define bOFDMEN_Jaguar 0x20000000 ++#define bCCKEN_Jaguar 0x10000000 ++#define rRxPath_Jaguar 0x808 // Rx antenna ++#define bRxPath_Jaguar 0xff ++#define rTxPath_Jaguar 0x80c // Tx antenna ++#define bTxPath_Jaguar 0x0fffffff ++#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection ++#define bCCK_RX_Jaguar 0x0c000000 ++#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length ++ ++#define rRxPath_Jaguar2 0xa04 // Rx antenna ++#define rTxAnt_1Nsts_Jaguar2 0x93c // Tx antenna for 1Nsts ++#define rTxAnt_23Nsts_Jaguar2 0x940 // Tx antenna for 2Nsts and 3Nsts ++ ++ ++// RF read/write-related ++#define rHSSIRead_Jaguar 0x8b0 // RF read addr ++#define bHSSIRead_addr_Jaguar 0xff ++#define bHSSIRead_trigger_Jaguar 0x100 ++#define rA_PIRead_Jaguar 0xd04 // RF readback with PI ++#define rB_PIRead_Jaguar 0xd44 // RF readback with PI ++#define rA_SIRead_Jaguar 0xd08 // RF readback with SI ++#define rB_SIRead_Jaguar 0xd48 // RF readback with SI ++#define rRead_data_Jaguar 0xfffff ++#define rA_LSSIWrite_Jaguar 0xc90 // RF write addr ++#define rB_LSSIWrite_Jaguar 0xe90 // RF write addr ++#define bLSSIWrite_data_Jaguar 0x000fffff ++#define bLSSIWrite_addr_Jaguar 0x0ff00000 ++ ++#define rC_PIRead_Jaguar2 0xd84 // RF readback with PI ++#define rD_PIRead_Jaguar2 0xdC4 // RF readback with PI ++#define rC_SIRead_Jaguar2 0xd88 // RF readback with SI ++#define rD_SIRead_Jaguar2 0xdC8 // RF readback with SI ++#define rC_LSSIWrite_Jaguar2 0x1890 // RF write addr ++#define rD_LSSIWrite_Jaguar2 0x1A90 // RF write addr ++ ++ ++// YN: mask the following register definition temporarily ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++//#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++//#define rFPGA0_XCD_RFParameter 0x87c ++ ++//#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++//#define rFPGA0_AnalogParameter2 0x884 ++//#define rFPGA0_AnalogParameter3 0x888 ++//#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++//#define rFPGA0_AnalogParameter4 0x88c ++ ++ ++// CCK TX scaling ++#define rCCK_TxFilter1_Jaguar 0xa20 ++#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 ++#define bCCK_TxFilter1_C1_Jaguar 0xff000000 ++#define rCCK_TxFilter2_Jaguar 0xa24 ++#define bCCK_TxFilter2_C2_Jaguar 0x000000ff ++#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 ++#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 ++#define bCCK_TxFilter2_C5_Jaguar 0xff000000 ++#define rCCK_TxFilter3_Jaguar 0xa28 ++#define bCCK_TxFilter3_C6_Jaguar 0x000000ff ++#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 ++/* NBI & CSI Mask setting */ ++#define rCSI_Mask_Setting1_Jaguar 0x874 ++#define rCSI_Fix_Mask0_Jaguar 0x880 ++#define rCSI_Fix_Mask1_Jaguar 0x884 ++#define rCSI_Fix_Mask2_Jaguar 0x888 ++#define rCSI_Fix_Mask3_Jaguar 0x88c ++#define rCSI_Fix_Mask4_Jaguar 0x890 ++#define rCSI_Fix_Mask5_Jaguar 0x894 ++#define rCSI_Fix_Mask6_Jaguar 0x898 ++#define rCSI_Fix_Mask7_Jaguar 0x89c ++#define rNBI_Setting_Jaguar 0x87c ++ ++ ++// YN: mask the following register definition temporarily ++//#define rPdp_AntA 0xb00 ++//#define rPdp_AntA_4 0xb04 ++//#define rConfig_Pmpd_AntA 0xb28 ++//#define rConfig_AntA 0xb68 ++//#define rConfig_AntB 0xb6c ++//#define rPdp_AntB 0xb70 ++//#define rPdp_AntB_4 0xb74 ++//#define rConfig_Pmpd_AntB 0xb98 ++//#define rAPK 0xbd8 ++ ++// RXIQC ++#define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B ++#define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D ++#define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor ++#define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor ++#define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B ++#define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D ++#define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C ++#define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C ++ ++#define rC_TxScale_Jaguar2 0x181c // Pah_C TX scaling factor ++#define rD_TxScale_Jaguar2 0x1A1c // Path_D TX scaling factor ++#define rRF_TxGainOffset 0x55 ++ ++// DIG-related ++#define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A ++#define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B ++#define rC_IGI_Jaguar2 0x1850 // Initial Gain for path-C ++#define rD_IGI_Jaguar2 0x1A50 // Initial Gain for path-D ++ ++#define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break ++#define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing ++#define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm ++#define b_FalseAlarm_Jaguar 0xffff ++#define rCCK_CCA_Jaguar 0xa08 // cca threshold ++#define bCCK_CCA_Jaguar 0x00ff0000 ++ ++// Tx Power Ttraining-related ++#define rA_TxPwrTraing_Jaguar 0xc54 ++#define rB_TxPwrTraing_Jaguar 0xe54 ++ ++// Report-related ++#define rOFDM_ShortCFOAB_Jaguar 0xf60 ++#define rOFDM_LongCFOAB_Jaguar 0xf64 ++#define rOFDM_EndCFOAB_Jaguar 0xf70 ++#define rOFDM_AGCReport_Jaguar 0xf84 ++#define rOFDM_RxSNR_Jaguar 0xf88 ++#define rOFDM_RxEVMCSI_Jaguar 0xf8c ++#define rOFDM_SIGReport_Jaguar 0xf90 ++ ++// Misc functions ++#define rEDCCA_Jaguar 0x8a4 // EDCCA ++#define bEDCCA_Jaguar 0xffff ++#define rAGC_table_Jaguar 0x82c // AGC tabel select ++#define bAGC_table_Jaguar 0x3 ++#define b_sel5g_Jaguar 0x1000 // sel5g ++#define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA ++#define rFc_area_Jaguar 0x860 // fc_area ++#define bFc_area_Jaguar 0x1ffe000 ++#define rSingleTone_ContTx_Jaguar 0x914 ++ ++#define rAGC_table_Jaguar2 0x958 // AGC tabel select ++#define rDMA_trigger_Jaguar2 0x95C // ADC sample mode ++ ++ ++// RFE ++#define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux ++#define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux ++#define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol ++#define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control ++#define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol ++#define rB_RFE_Jaguar 0xeb8 // Path_B RFE control ++#define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control ++#define bMask_RFEInv_Jaguar 0x3ff00000 ++#define bMask_AntselPathFollow_Jaguar 0x00030000 ++ ++#define rC_RFE_Pinmux_Jaguar 0x18B4 // Path_C RFE cotrol pinmux ++#define rD_RFE_Pinmux_Jaguar 0x1AB4 // Path_D RFE cotrol pinmux ++#define rA_RFE_Sel_Jaguar2 0x1990 ++ ++ ++ ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 ++#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c ++#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 ++#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 ++#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 ++#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c ++#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 ++#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c ++#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 ++#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 ++#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 ++#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c ++#define bTxAGC_byte0_Jaguar 0xff ++#define bTxAGC_byte1_Jaguar 0xff00 ++#define bTxAGC_byte2_Jaguar 0xff0000 ++#define bTxAGC_byte3_Jaguar 0xff000000 ++ ++ ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_Jaguar2 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_Jaguar2 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_Jaguar2 0xc28 ++#define rTxAGC_A_MCS3_MCS0_Jaguar2 0xc2c ++#define rTxAGC_A_MCS7_MCS4_Jaguar2 0xc30 ++#define rTxAGC_A_MCS11_MCS8_Jaguar2 0xc34 ++#define rTxAGC_A_MCS15_MCS12_Jaguar2 0xc38 ++#define rTxAGC_A_MCS19_MCS16_Jaguar2 0xcd8 ++#define rTxAGC_A_MCS23_MCS20_Jaguar2 0xcdc ++#define rTxAGC_A_Nss1Index3_Nss1Index0_Jaguar2 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_Jaguar2 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_Jaguar2 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_Jaguar2 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_Jaguar2 0xc4c ++#define rTxAGC_A_Nss3Index3_Nss3Index0_Jaguar2 0xce0 ++#define rTxAGC_A_Nss3Index7_Nss3Index4_Jaguar2 0xce4 ++#define rTxAGC_A_Nss3Index9_Nss3Index8_Jaguar2 0xce8 ++#define rTxAGC_B_CCK11_CCK1_Jaguar2 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_Jaguar2 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_Jaguar2 0xe28 ++#define rTxAGC_B_MCS3_MCS0_Jaguar2 0xe2c ++#define rTxAGC_B_MCS7_MCS4_Jaguar2 0xe30 ++#define rTxAGC_B_MCS11_MCS8_Jaguar2 0xe34 ++#define rTxAGC_B_MCS15_MCS12_Jaguar2 0xe38 ++#define rTxAGC_B_MCS19_MCS16_Jaguar2 0xed8 ++#define rTxAGC_B_MCS23_MCS20_Jaguar2 0xedc ++#define rTxAGC_B_Nss1Index3_Nss1Index0_Jaguar2 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_Jaguar2 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_Jaguar2 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_Jaguar2 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_Jaguar2 0xe4c ++#define rTxAGC_B_Nss3Index3_Nss3Index0_Jaguar2 0xee0 ++#define rTxAGC_B_Nss3Index7_Nss3Index4_Jaguar2 0xee4 ++#define rTxAGC_B_Nss3Index9_Nss3Index8_Jaguar2 0xee8 ++#define rTxAGC_C_CCK11_CCK1_Jaguar2 0x1820 ++#define rTxAGC_C_Ofdm18_Ofdm6_Jaguar2 0x1824 ++#define rTxAGC_C_Ofdm54_Ofdm24_Jaguar2 0x1828 ++#define rTxAGC_C_MCS3_MCS0_Jaguar2 0x182c ++#define rTxAGC_C_MCS7_MCS4_Jaguar2 0x1830 ++#define rTxAGC_C_MCS11_MCS8_Jaguar2 0x1834 ++#define rTxAGC_C_MCS15_MCS12_Jaguar2 0x1838 ++#define rTxAGC_C_MCS19_MCS16_Jaguar2 0x18d8 ++#define rTxAGC_C_MCS23_MCS20_Jaguar2 0x18dc ++#define rTxAGC_C_Nss1Index3_Nss1Index0_Jaguar2 0x183c ++#define rTxAGC_C_Nss1Index7_Nss1Index4_Jaguar2 0x1840 ++#define rTxAGC_C_Nss2Index1_Nss1Index8_Jaguar2 0x1844 ++#define rTxAGC_C_Nss2Index5_Nss2Index2_Jaguar2 0x1848 ++#define rTxAGC_C_Nss2Index9_Nss2Index6_Jaguar2 0x184c ++#define rTxAGC_C_Nss3Index3_Nss3Index0_Jaguar2 0x18e0 ++#define rTxAGC_C_Nss3Index7_Nss3Index4_Jaguar2 0x18e4 ++#define rTxAGC_C_Nss3Index9_Nss3Index8_Jaguar2 0x18e8 ++#define rTxAGC_D_CCK11_CCK1_Jaguar2 0x1a20 ++#define rTxAGC_D_Ofdm18_Ofdm6_Jaguar2 0x1a24 ++#define rTxAGC_D_Ofdm54_Ofdm24_Jaguar2 0x1a28 ++#define rTxAGC_D_MCS3_MCS0_Jaguar2 0x1a2c ++#define rTxAGC_D_MCS7_MCS4_Jaguar2 0x1a30 ++#define rTxAGC_D_MCS11_MCS8_Jaguar2 0x1a34 ++#define rTxAGC_D_MCS15_MCS12_Jaguar2 0x1a38 ++#define rTxAGC_D_MCS19_MCS16_Jaguar2 0x1ad8 ++#define rTxAGC_D_MCS23_MCS20_Jaguar2 0x1adc ++#define rTxAGC_D_Nss1Index3_Nss1Index0_Jaguar2 0x1a3c ++#define rTxAGC_D_Nss1Index7_Nss1Index4_Jaguar2 0x1a40 ++#define rTxAGC_D_Nss2Index1_Nss1Index8_Jaguar2 0x1a44 ++#define rTxAGC_D_Nss2Index5_Nss2Index2_Jaguar2 0x1a48 ++#define rTxAGC_D_Nss2Index9_Nss2Index6_Jaguar2 0x1a4c ++#define rTxAGC_D_Nss3Index3_Nss3Index0_Jaguar2 0x1ae0 ++#define rTxAGC_D_Nss3Index7_Nss3Index4_Jaguar2 0x1ae4 ++#define rTxAGC_D_Nss3Index9_Nss3Index8_Jaguar2 0x1ae8 ++// IQK YN: temporaily mask this part ++//#define rFPGA0_IQK 0xe28 ++//#define rTx_IQK_Tone_A 0xe30 ++//#define rRx_IQK_Tone_A 0xe34 ++//#define rTx_IQK_PI_A 0xe38 ++//#define rRx_IQK_PI_A 0xe3c ++ ++//#define rTx_IQK 0xe40 ++//#define rRx_IQK 0xe44 ++//#define rIQK_AGC_Pts 0xe48 ++//#define rIQK_AGC_Rsp 0xe4c ++//#define rTx_IQK_Tone_B 0xe50 ++//#define rRx_IQK_Tone_B 0xe54 ++//#define rTx_IQK_PI_B 0xe58 ++//#define rRx_IQK_PI_B 0xe5c ++//#define rIQK_AGC_Cont 0xe60 ++ ++ ++// AFE-related ++#define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control ++#define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control ++#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 ++#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c ++#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 ++#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 ++#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 ++#define rA_Rx2Rx_BT_Jaguar 0xc7c ++#define rA_sleep_nav_Jaguar 0xc80 ++#define rA_pmpd_Jaguar 0xc84 ++#define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control ++#define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control ++#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 ++#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c ++#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 ++#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 ++#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 ++#define rB_Rx2Rx_BT_Jaguar 0xe7c ++#define rB_sleep_nav_Jaguar 0xe80 ++#define rB_pmpd_Jaguar 0xe84 ++ ++ ++// YN: mask these registers temporaily ++//#define rTx_Power_Before_IQK_A 0xe94 ++//#define rTx_Power_After_IQK_A 0xe9c ++ ++//#define rRx_Power_Before_IQK_A 0xea0 ++//#define rRx_Power_Before_IQK_A_2 0xea4 ++//#define rRx_Power_After_IQK_A 0xea8 ++//#define rRx_Power_After_IQK_A_2 0xeac ++ ++//#define rTx_Power_Before_IQK_B 0xeb4 ++//#define rTx_Power_After_IQK_B 0xebc ++ ++//#define rRx_Power_Before_IQK_B 0xec0 ++//#define rRx_Power_Before_IQK_B_2 0xec4 ++//#define rRx_Power_After_IQK_B 0xec8 ++//#define rRx_Power_After_IQK_B_2 0xecc ++ ++ ++// RSSI Dump ++#define rA_RSSIDump_Jaguar 0xBF0 ++#define rB_RSSIDump_Jaguar 0xBF1 ++#define rS1_RXevmDump_Jaguar 0xBF4 ++#define rS2_RXevmDump_Jaguar 0xBF5 ++#define rA_RXsnrDump_Jaguar 0xBF6 ++#define rB_RXsnrDump_Jaguar 0xBF7 ++#define rA_CfoShortDump_Jaguar 0xBF8 ++#define rB_CfoShortDump_Jaguar 0xBFA ++#define rA_CfoLongDump_Jaguar 0xBEC ++#define rB_CfoLongDump_Jaguar 0xBEE ++ ++ ++// RF Register ++// ++#define RF_AC_Jaguar 0x00 // ++#define RF_RF_Top_Jaguar 0x07 // ++#define RF_TXLOK_Jaguar 0x08 // ++#define RF_TXAPK_Jaguar 0x0B ++#define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch ++#define RF_RCK1_Jaguar 0x1c // ++#define RF_RCK2_Jaguar 0x1d ++#define RF_RCK3_Jaguar 0x1e ++#define RF_ModeTableAddr 0x30 ++#define RF_ModeTableData0 0x31 ++#define RF_ModeTableData1 0x32 ++#define RF_TxLCTank_Jaguar 0x54 ++#define RF_APK_Jaguar 0x63 ++#define RF_LCK 0xB4 ++#define RF_WeLut_Jaguar 0xEF ++ ++#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 ++#define bRF_CHNLBW_BW 0xc00 ++ ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_XCD_RFPara 0x8b4 ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++#define REG_BB_TX_PATH_SEL_1 0x93c ++#define REG_BB_TX_PATH_SEL_2 0x940 ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ /*Page 19 for TxBF*/ ++#define REG_BB_TXBF_ANT_SET_BF1 0x19ac ++#define REG_BB_TXBF_ANT_SET_BF0 0x19b4 ++// ++// PageA(0xA00) ++// ++#define rCCK0_System 0xa00 ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++#define RF_T_METER_88E 0x42 // ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++ ++ ++// ++// Other Definition ++// ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++//byte endable for srwrite ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++#define bMask7bits 0x7f ++#define bMaskByte2HighNibble 0x00f00000 ++#define bMaskByte3LowNibble 0x0f000000 ++#define bMaskL3Bytes 0x00ffffff ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PwrSeq.h new file mode 100644 -index 000000000..ff9ce9ea2 +index 0000000..2ef43c2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8814PwrSeq.h @@ -0,0 +1,237 @@ -+ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __HAL8814PWRSEQ_H__ -+#define __HAL8814PWRSEQ_H__ -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS 16 -+#define RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS 20 -+#define RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS 17 -+#define RTL8814A_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS 17 -+#define RTL8814A_TRANS_PDN_TO_CARDEMU_STEPS 16 -+#define RTL8814A_TRANS_ACT_TO_LPS_STEPS 20 -+#define RTL8814A_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8814A_TRANS_END_STEPS 1 -+ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x002B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /* ??0x28[24]=1, enable pll phase select*/ \ -+ {0x0015, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT3|BIT2|BIT1), (BIT3|BIT2|BIT1)},/* 0x14[11:9]=3'b111,OCP current threshold=1.5A */ \ -+ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0E, 0x08},/* 0x2C[11:9]=3'b100, select lpf R3 */ \ -+ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x70, 0x50},/* 0x2C[14:12]=3'b101, select lpf Rs*/ \ -+ {0x007B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x78[30]=1'b1, SDM order select*/ \ -+ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, */ /* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ -+ {0x00F0, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* */ \ -+ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x30, 0x20},/* */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ -+ -+#define RTL8814A_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ -+ {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ -+ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*0x1F[7:0] = 0 turn off RF*/ \ -+ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},*/ /*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x28}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0}, /*0x8[1] = 0 ANA clk =500k */ \ -+ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0},*/ /* 0x02[1:0] = 0 reset BB */ \ -+ {0x0066, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /*0x66[7]=0, disable ckreq for gpio7 output SUS */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x41[4]=0, disable sic for gpio7 output SUS */ \ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x42[1]=0, disable ckout for gpio7 output SUS */ \ -+ {0x004e, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x4E[5]=1, disable LED2 for gpio7 output SUS */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x41[0]=0, disable uart for gpio7 output SUS */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x0c},\ -+ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x0E},\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*0x14[13] = 1 turn on ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x14[14] =1 trun on ZCD */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk =500k */ \ -+ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps,ldo sleep mode */ \ -+ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend */ -+ -+#define RTL8814A_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* 0x14[14] =0 trun off ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0},/*0x14[13] = 0 turn off ZCD */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ -+ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 3081*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x01}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ -+ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x30}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ -+ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},*/ \ -+ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},*/ \ -+ /*{0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},*/ /* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x15[6] =1 trun on ZCD output */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*0x15[5] = 1 turn on ZCD */ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*0x12[6] = 0 force PFM mode */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk =500k */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8814A */ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x020[1]=0 , disable RFC_1 control REG_RF_CTRL_8814A */ \ -+ {0x0021, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x021[1]=0 , disable RFC_2 control REG_RF_CTRL_8814A */ \ -+ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x076[1]=0 , disable RFC_3 control REG_OPT_CTRL_8814A +2 */ \ -+ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps,ldo sleep mode */ \ -+ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend*/ -+ -+#define RTL8814A_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*0x12[6] = 1 force PWM mode */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0},/*0x15[5] = 0 turn off ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* 0x15[6] =0 trun off ZCD output */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00}, /* gpio11 input mode, gpio10~8 input mode */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0, enable WL suspend*/ \ -+ /*{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},*/ /*0x03[2] = 1, enable 3081*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ \ -+ {0x0071, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/*0x70[10] = 0, CPHY_MBIAS_EN disable*/ -+ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8814A_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8814A_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ -+ {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x05F1, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Respond TxOK to scheduler*/ -+ -+ -+#define RTL8814A_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /* Delay*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /* Polling 0x109[7]=0 TSF in 40M*/ \ -+ /*{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, */ /*. ??0x29[7:6] = 2b'00 enable BB clock*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ -+ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8814A_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8814A_power_on_flow[RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_radio_off_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_card_disable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_card_enable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_suspend_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_resume_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_hwpdn_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_enter_lps_flow[RTL8814A_TRANS_ACT_TO_LPS_STEPS+RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_leave_lps_flow[RTL8814A_TRANS_LPS_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]; -+ -+#endif //__HAL8814PWRSEQ_H__ -+ ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL8814PWRSEQ_H__ ++#define __HAL8814PWRSEQ_H__ ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS 16 ++#define RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS 20 ++#define RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS 17 ++#define RTL8814A_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS 17 ++#define RTL8814A_TRANS_PDN_TO_CARDEMU_STEPS 16 ++#define RTL8814A_TRANS_ACT_TO_LPS_STEPS 20 ++#define RTL8814A_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8814A_TRANS_END_STEPS 1 ++ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x002B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /* ??0x28[24]=1, enable pll phase select*/ \ ++ {0x0015, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT3|BIT2|BIT1), (BIT3|BIT2|BIT1)},/* 0x14[11:9]=3'b111,OCP current threshold=1.5A */ \ ++ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0E, 0x08},/* 0x2C[11:9]=3'b100, select lpf R3 */ \ ++ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x70, 0x50},/* 0x2C[14:12]=3'b101, select lpf Rs*/ \ ++ {0x007B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x78[30]=1'b1, SDM order select*/ \ ++ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, */ /* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ ++ {0x00F0, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* */ \ ++ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x30, 0x20},/* */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ ++ ++#define RTL8814A_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ ++ {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*0x1F[7:0] = 0 turn off RF*/ \ ++ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},*/ /*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x28}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0}, /*0x8[1] = 0 ANA clk =500k */ \ ++ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0},*/ /* 0x02[1:0] = 0 reset BB */ \ ++ {0x0066, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /*0x66[7]=0, disable ckreq for gpio7 output SUS */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x41[4]=0, disable sic for gpio7 output SUS */ \ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x42[1]=0, disable ckout for gpio7 output SUS */ \ ++ {0x004e, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x4E[5]=1, disable LED2 for gpio7 output SUS */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x41[0]=0, disable uart for gpio7 output SUS */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x0c},\ ++ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x0E},\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*0x14[13] = 1 turn on ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x14[14] =1 trun on ZCD */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps,ldo sleep mode */ \ ++ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend */ ++ ++#define RTL8814A_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* 0x14[14] =0 trun off ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0},/*0x14[13] = 0 turn off ZCD */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ ++ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 3081*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x01}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ ++ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x30}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ ++ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},*/ \ ++ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},*/ \ ++ /*{0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},*/ /* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x15[6] =1 trun on ZCD output */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*0x15[5] = 1 turn on ZCD */ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*0x12[6] = 0 force PFM mode */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8814A */ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x020[1]=0 , disable RFC_1 control REG_RF_CTRL_8814A */ \ ++ {0x0021, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x021[1]=0 , disable RFC_2 control REG_RF_CTRL_8814A */ \ ++ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x076[1]=0 , disable RFC_3 control REG_OPT_CTRL_8814A +2 */ \ ++ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps,ldo sleep mode */ \ ++ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend*/ ++ ++#define RTL8814A_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*0x12[6] = 1 force PWM mode */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0},/*0x15[5] = 0 turn off ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* 0x15[6] =0 trun off ZCD output */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00}, /* gpio11 input mode, gpio10~8 input mode */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0, enable WL suspend*/ \ ++ /*{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},*/ /*0x03[2] = 1, enable 3081*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ \ ++ {0x0071, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/*0x70[10] = 0, CPHY_MBIAS_EN disable*/ ++ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8814A_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8814A_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ ++ {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x05F1, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Respond TxOK to scheduler*/ ++ ++ ++#define RTL8814A_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /* Delay*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /* Polling 0x109[7]=0 TSF in 40M*/ \ ++ /*{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, */ /*. ??0x29[7:6] = 2b'00 enable BB clock*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8814A_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8814A_power_on_flow[RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_radio_off_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_card_disable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_card_enable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_suspend_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_resume_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_hwpdn_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_enter_lps_flow[RTL8814A_TRANS_ACT_TO_LPS_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_leave_lps_flow[RTL8814A_TRANS_LPS_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]; ++ ++#endif //__HAL8814PWRSEQ_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/Hal8821APwrSeq.h b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8821APwrSeq.h new file mode 100644 -index 000000000..208ad618f +index 0000000..840dd74 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/Hal8821APwrSeq.h @@ -0,0 +1,186 @@ -+#ifndef REALTEK_POWER_SEQUENCE_8821 -+#define REALTEK_POWER_SEQUENCE_8821 -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20130516-JackieLau-RTL8821A_Power_Architecture-R10.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS 25 -+#define RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8821A_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8821A_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8821A_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8821A_TRANS_END_STEPS 1 -+ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[12:11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x4C[24] = 0x4F[0] = 1, switch DPDT_SEL_P output from WL BB */\ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4)},/*0x66[13] = 0x67[5] = 1, switch for PAPE_G/PAPE_A from WL BB ; 0x66[12] = 0x67[4] = 1, switch LNAON from WL BB */\ -+ {0x0025, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*anapar_mac<118> , 0x25[6]=0 by wlan single function*/\ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ -+ {0x007A, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3A},/*0x7A = 0x3A start BT*/\ -+ {0x002E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF , 0x82 },/* 0x2C[23:12]=0x820 ; XTAL trim */ \ -+ {0x0010, PWR_CUT_A_MSK , PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6 , BIT6 },/* 0x10[6]=1 ; MP·s¼W¹ï©ó0x2Cªº±±¨îÅv¡A¶·§â0x10[6]³]¬°1¤~¯àÅýWLAN±±¨î */ \ -+ -+ -+#define RTL8821A_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*0x4C[24] = 0x4F[0] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ -+ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8821A_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8821A_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8821A_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8821A_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8821A_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8821A_power_on_flow[RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_radio_off_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_card_disable_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_card_enable_flow[RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_suspend_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_resume_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_hwpdn_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_enter_lps_flow[RTL8821A_TRANS_ACT_TO_LPS_STEPS+RTL8821A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; -+ -+#endif ++#ifndef REALTEK_POWER_SEQUENCE_8821 ++#define REALTEK_POWER_SEQUENCE_8821 ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20130516-JackieLau-RTL8821A_Power_Architecture-R10.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS 25 ++#define RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8821A_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8821A_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8821A_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8821A_TRANS_END_STEPS 1 ++ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[12:11]=0*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x4C[24] = 0x4F[0] = 1, switch DPDT_SEL_P output from WL BB */\ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4)},/*0x66[13] = 0x67[5] = 1, switch for PAPE_G/PAPE_A from WL BB ; 0x66[12] = 0x67[4] = 1, switch LNAON from WL BB */\ ++ {0x0025, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*anapar_mac<118> , 0x25[6]=0 by wlan single function*/\ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ ++ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ ++ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ ++ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ ++ {0x007A, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3A},/*0x7A = 0x3A start BT*/\ ++ {0x002E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF , 0x82 },/* 0x2C[23:12]=0x820 ; XTAL trim */ \ ++ {0x0010, PWR_CUT_A_MSK , PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6 , BIT6 },/* 0x10[6]=1 ; MP·s¼W¹ï©ó0x2Cªº±±¨îÅv¡A¶·§â0x10[6]³]¬°1¤~¯àÅýWLAN±±¨î */ \ ++ ++ ++#define RTL8821A_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*0x4C[24] = 0x4F[0] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ ++ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8821A_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8821A_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8821A_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8821A_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8821A_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8821A_power_on_flow[RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_radio_off_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_card_disable_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_card_enable_flow[RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_suspend_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_resume_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_hwpdn_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_enter_lps_flow[RTL8821A_TRANS_ACT_TO_LPS_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/HalPwrSeqCmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/HalPwrSeqCmd.h new file mode 100644 -index 000000000..24e4a54b4 +index 0000000..5cf122f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/HalPwrSeqCmd.h @@ -0,0 +1,138 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __HALPWRSEQCMD_H__ -+#define __HALPWRSEQCMD_H__ -+ -+#include -+ -+/*---------------------------------------------*/ -+//3 The value of cmd: 4 bits -+/*---------------------------------------------*/ -+#define PWR_CMD_READ 0x00 -+ // offset: the read register offset -+ // msk: the mask of the read value -+ // value: N/A, left by 0 -+ // note: dirver shall implement this function by read & msk -+ -+#define PWR_CMD_WRITE 0x01 -+ // offset: the read register offset -+ // msk: the mask of the write bits -+ // value: write value -+ // note: driver shall implement this cmd by read & msk after write -+ -+#define PWR_CMD_POLLING 0x02 -+ // offset: the read register offset -+ // msk: the mask of the polled value -+ // value: the value to be polled, masked by the msd field. -+ // note: driver shall implement this cmd by -+ // do{ -+ // if( (Read(offset) & msk) == (value & msk) ) -+ // break; -+ // } while(not timeout); -+ -+#define PWR_CMD_DELAY 0x03 -+ // offset: the value to delay -+ // msk: N/A -+ // value: the unit of delay, 0: us, 1: ms -+ -+#define PWR_CMD_END 0x04 -+ // offset: N/A -+ // msk: N/A -+ // value: N/A -+ -+/*---------------------------------------------*/ -+//3 The value of base: 4 bits -+/*---------------------------------------------*/ -+ // define the base address of each block -+#define PWR_BASEADDR_MAC 0x00 -+#define PWR_BASEADDR_USB 0x01 -+#define PWR_BASEADDR_PCIE 0x02 -+#define PWR_BASEADDR_SDIO 0x03 -+ -+/*---------------------------------------------*/ -+//3 The value of interface_msk: 4 bits -+/*---------------------------------------------*/ -+#define PWR_INTF_SDIO_MSK BIT(0) -+#define PWR_INTF_USB_MSK BIT(1) -+#define PWR_INTF_PCI_MSK BIT(2) -+#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) -+ -+/*---------------------------------------------*/ -+//3 The value of fab_msk: 4 bits -+/*---------------------------------------------*/ -+#define PWR_FAB_TSMC_MSK BIT(0) -+#define PWR_FAB_UMC_MSK BIT(1) -+#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) -+ -+/*---------------------------------------------*/ -+//3 The value of cut_msk: 8 bits -+/*---------------------------------------------*/ -+#define PWR_CUT_TESTCHIP_MSK BIT(0) -+#define PWR_CUT_A_MSK BIT(1) -+#define PWR_CUT_B_MSK BIT(2) -+#define PWR_CUT_C_MSK BIT(3) -+#define PWR_CUT_D_MSK BIT(4) -+#define PWR_CUT_E_MSK BIT(5) -+#define PWR_CUT_F_MSK BIT(6) -+#define PWR_CUT_G_MSK BIT(7) -+#define PWR_CUT_ALL_MSK 0xFF -+ -+ -+typedef enum _PWRSEQ_CMD_DELAY_UNIT_ -+{ -+ PWRSEQ_DELAY_US, -+ PWRSEQ_DELAY_MS, -+} PWRSEQ_DELAY_UNIT; -+ -+typedef struct _WL_PWR_CFG_ -+{ -+ u16 offset; -+ u8 cut_msk; -+ u8 fab_msk:4; -+ u8 interface_msk:4; -+ u8 base:4; -+ u8 cmd:4; -+ u8 msk; -+ u8 value; -+} WLAN_PWR_CFG, *PWLAN_PWR_CFG; -+ -+ -+#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset -+#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk -+#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk -+#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk -+#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base -+#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd -+#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk -+#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value -+ -+ -+//================================================================================ -+// Prototype of protected function. -+//================================================================================ -+u8 HalPwrSeqCmdParsing( -+ PADAPTER padapter, -+ u8 CutVersion, -+ u8 FabVersion, -+ u8 InterfaceType, -+ WLAN_PWR_CFG PwrCfgCmd[]); -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __HALPWRSEQCMD_H__ ++#define __HALPWRSEQCMD_H__ ++ ++#include ++ ++/*---------------------------------------------*/ ++//3 The value of cmd: 4 bits ++/*---------------------------------------------*/ ++#define PWR_CMD_READ 0x00 ++ // offset: the read register offset ++ // msk: the mask of the read value ++ // value: N/A, left by 0 ++ // note: dirver shall implement this function by read & msk ++ ++#define PWR_CMD_WRITE 0x01 ++ // offset: the read register offset ++ // msk: the mask of the write bits ++ // value: write value ++ // note: driver shall implement this cmd by read & msk after write ++ ++#define PWR_CMD_POLLING 0x02 ++ // offset: the read register offset ++ // msk: the mask of the polled value ++ // value: the value to be polled, masked by the msd field. ++ // note: driver shall implement this cmd by ++ // do{ ++ // if( (Read(offset) & msk) == (value & msk) ) ++ // break; ++ // } while(not timeout); ++ ++#define PWR_CMD_DELAY 0x03 ++ // offset: the value to delay ++ // msk: N/A ++ // value: the unit of delay, 0: us, 1: ms ++ ++#define PWR_CMD_END 0x04 ++ // offset: N/A ++ // msk: N/A ++ // value: N/A ++ ++/*---------------------------------------------*/ ++//3 The value of base: 4 bits ++/*---------------------------------------------*/ ++ // define the base address of each block ++#define PWR_BASEADDR_MAC 0x00 ++#define PWR_BASEADDR_USB 0x01 ++#define PWR_BASEADDR_PCIE 0x02 ++#define PWR_BASEADDR_SDIO 0x03 ++ ++/*---------------------------------------------*/ ++//3 The value of interface_msk: 4 bits ++/*---------------------------------------------*/ ++#define PWR_INTF_SDIO_MSK BIT(0) ++#define PWR_INTF_USB_MSK BIT(1) ++#define PWR_INTF_PCI_MSK BIT(2) ++#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) ++ ++/*---------------------------------------------*/ ++//3 The value of fab_msk: 4 bits ++/*---------------------------------------------*/ ++#define PWR_FAB_TSMC_MSK BIT(0) ++#define PWR_FAB_UMC_MSK BIT(1) ++#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) ++ ++/*---------------------------------------------*/ ++//3 The value of cut_msk: 8 bits ++/*---------------------------------------------*/ ++#define PWR_CUT_TESTCHIP_MSK BIT(0) ++#define PWR_CUT_A_MSK BIT(1) ++#define PWR_CUT_B_MSK BIT(2) ++#define PWR_CUT_C_MSK BIT(3) ++#define PWR_CUT_D_MSK BIT(4) ++#define PWR_CUT_E_MSK BIT(5) ++#define PWR_CUT_F_MSK BIT(6) ++#define PWR_CUT_G_MSK BIT(7) ++#define PWR_CUT_ALL_MSK 0xFF ++ ++ ++typedef enum _PWRSEQ_CMD_DELAY_UNIT_ ++{ ++ PWRSEQ_DELAY_US, ++ PWRSEQ_DELAY_MS, ++} PWRSEQ_DELAY_UNIT; ++ ++typedef struct _WL_PWR_CFG_ ++{ ++ u16 offset; ++ u8 cut_msk; ++ u8 fab_msk:4; ++ u8 interface_msk:4; ++ u8 base:4; ++ u8 cmd:4; ++ u8 msk; ++ u8 value; ++} WLAN_PWR_CFG, *PWLAN_PWR_CFG; ++ ++ ++#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset ++#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk ++#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk ++#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk ++#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base ++#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd ++#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk ++#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++u8 HalPwrSeqCmdParsing( ++ PADAPTER padapter, ++ u8 CutVersion, ++ u8 FabVersion, ++ u8 InterfaceType, ++ WLAN_PWR_CFG PwrCfgCmd[]); ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/HalVerDef.h b/drivers/net/wireless/realtek/rtl8189fs/include/HalVerDef.h new file mode 100644 -index 000000000..d3df5df96 +index 0000000..d3df5df --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/HalVerDef.h @@ -0,0 +1,202 @@ @@ -270881,7 +312314,7 @@ index 000000000..d3df5df96 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/autoconf.h b/drivers/net/wireless/realtek/rtl8189fs/include/autoconf.h new file mode 100644 -index 000000000..fc9511867 +index 0000000..fc95118 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/autoconf.h @@ -0,0 +1,243 @@ @@ -271130,7 +312563,7 @@ index 000000000..fc9511867 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/basic_types.h b/drivers/net/wireless/realtek/rtl8189fs/include/basic_types.h new file mode 100644 -index 000000000..0b75813e7 +index 0000000..0b75813 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/basic_types.h @@ -0,0 +1,385 @@ @@ -271521,7 +312954,7 @@ index 000000000..0b75813e7 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/big_endian.h b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/big_endian.h new file mode 100644 -index 000000000..ccb31328d +index 0000000..ccb3132 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/big_endian.h @@ -0,0 +1,88 @@ @@ -271615,7 +313048,7 @@ index 000000000..ccb31328d + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/generic.h b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/generic.h new file mode 100644 -index 000000000..759b0c472 +index 0000000..759b0c4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/generic.h @@ -0,0 +1,213 @@ @@ -271834,7 +313267,7 @@ index 000000000..759b0c472 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/little_endian.h b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/little_endian.h new file mode 100644 -index 000000000..5a3c8ab48 +index 0000000..5a3c8ab --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/little_endian.h @@ -0,0 +1,90 @@ @@ -271930,7 +313363,7 @@ index 000000000..5a3c8ab48 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/swab.h b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/swab.h new file mode 100644 -index 000000000..067c8e434 +index 0000000..067c8e4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/swab.h @@ -0,0 +1,141 @@ @@ -272077,7 +313510,7 @@ index 000000000..067c8e434 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/swabb.h b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/swabb.h new file mode 100644 -index 000000000..dbbd50f89 +index 0000000..dbbd50f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/byteorder/swabb.h @@ -0,0 +1,157 @@ @@ -272240,7 +313673,7 @@ index 000000000..dbbd50f89 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/circ_buf.h b/drivers/net/wireless/realtek/rtl8189fs/include/circ_buf.h new file mode 100644 -index 000000000..23523164c +index 0000000..2352316 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/circ_buf.h @@ -0,0 +1,28 @@ @@ -272274,7 +313707,7 @@ index 000000000..23523164c + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/cmd_osdep.h b/drivers/net/wireless/realtek/rtl8189fs/include/cmd_osdep.h new file mode 100644 -index 000000000..65a7253b3 +index 0000000..65a7253 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/cmd_osdep.h @@ -0,0 +1,32 @@ @@ -272312,7 +313745,7 @@ index 000000000..65a7253b3 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/custom_gpio.h b/drivers/net/wireless/realtek/rtl8189fs/include/custom_gpio.h new file mode 100644 -index 000000000..c76b340ff +index 0000000..c76b340 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/custom_gpio.h @@ -0,0 +1,32 @@ @@ -272350,7 +313783,7 @@ index 000000000..c76b340ff +#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_conf.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_conf.h new file mode 100644 -index 000000000..467862efe +index 0000000..467862e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_conf.h @@ -0,0 +1,201 @@ @@ -272557,7 +313990,7 @@ index 000000000..467862efe + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_types.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types.h new file mode 100644 -index 000000000..701eecf4a +index 0000000..701eecf --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types.h @@ -0,0 +1,1304 @@ @@ -273867,7 +315300,7 @@ index 000000000..701eecf4a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_ce.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_ce.h new file mode 100644 -index 000000000..b3d35235c +index 0000000..b3d3523 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_ce.h @@ -0,0 +1,93 @@ @@ -273966,69 +315399,69 @@ index 000000000..b3d35235c + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_gspi.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_gspi.h new file mode 100644 -index 000000000..545776b2e +index 0000000..27b3cb0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_gspi.h @@ -0,0 +1,56 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __DRV_TYPES_GSPI_H__ -+#define __DRV_TYPES_GSPI_H__ -+ -+// SPI Header Files -+#ifdef PLATFORM_LINUX -+ #include -+ #include -+ #include -+ //#include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+#endif -+ -+ -+typedef struct gspi_data -+{ -+ u8 func_number; -+ -+ u8 tx_block_mode; -+ u8 rx_block_mode; -+ u32 block_transfer_len; -+ -+#ifdef PLATFORM_LINUX -+ struct spi_device *func; -+ -+ struct workqueue_struct *priv_wq; -+ struct delayed_work irq_work; -+#endif -+} GSPI_DATA, *PGSPI_DATA; -+ -+#endif // #ifndef __DRV_TYPES_GSPI_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_GSPI_H__ ++#define __DRV_TYPES_GSPI_H__ ++ ++// SPI Header Files ++#ifdef PLATFORM_LINUX ++ #include ++ #include ++ #include ++ //#include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#endif ++ ++ ++typedef struct gspi_data ++{ ++ u8 func_number; ++ ++ u8 tx_block_mode; ++ u8 rx_block_mode; ++ u32 block_transfer_len; ++ ++#ifdef PLATFORM_LINUX ++ struct spi_device *func; ++ ++ struct workqueue_struct *priv_wq; ++ struct delayed_work irq_work; ++#endif ++} GSPI_DATA, *PGSPI_DATA; ++ ++#endif // #ifndef __DRV_TYPES_GSPI_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_linux.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_linux.h new file mode 100644 -index 000000000..db1c58569 +index 0000000..db1c585 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_linux.h @@ -0,0 +1,25 @@ @@ -274059,373 +315492,373 @@ index 000000000..db1c58569 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_pci.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_pci.h new file mode 100644 -index 000000000..857aaf94b +index 0000000..a5b52ac --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_pci.h @@ -0,0 +1,273 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __DRV_TYPES_PCI_H__ -+#define __DRV_TYPES_PCI_H__ -+ -+ -+#ifdef PLATFORM_LINUX -+#include -+#endif -+ -+ -+#define INTEL_VENDOR_ID 0x8086 -+#define SIS_VENDOR_ID 0x1039 -+#define ATI_VENDOR_ID 0x1002 -+#define ATI_DEVICE_ID 0x7914 -+#define AMD_VENDOR_ID 0x1022 -+ -+#define PCI_MAX_BRIDGE_NUMBER 255 -+#define PCI_MAX_DEVICES 32 -+#define PCI_MAX_FUNCTION 8 -+ -+#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address -+#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data -+ -+#define PCI_CLASS_BRIDGE_DEV 0x06 -+#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04 -+ -+#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10 -+ -+#define U1DONTCARE 0xFF -+#define U2DONTCARE 0xFFFF -+#define U4DONTCARE 0xFFFFFFFF -+ -+#define PCI_VENDER_ID_REALTEK 0x10ec -+ -+#define HAL_HW_PCI_8180_DEVICE_ID 0x8180 -+#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b -+#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b -+#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b -+#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190 -+#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E -+#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E -+#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE -+#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE -+#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab -+#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE -+#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron -+#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga -+#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga -+#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga -+#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga -+#define HAL_HW_PCI_700F_DEVICE_ID 0x700F -+#define HAL_HW_PCI_701F_DEVICE_ID 0x701F -+#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 -+#define HAL_HW_PCI_8188EE_DEVICE_ID 0x8179 -+ -+#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers -+#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 -+#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers -+#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 -+#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers -+#define HAL_HW_PCI_REVISION_ID_8192SE 0x10 -+#define HAL_HW_PCI_REVISION_ID_8192CE 0x1 -+#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers -+#define HAL_HW_PCI_REVISION_ID_8192DE 0x0 -+#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers -+ -+enum pci_bridge_vendor { -+ PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001 -+ PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010 -+ PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100 -+ PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000 -+ PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000 -+ PCI_BRIDGE_VENDOR_MAX ,//= 0x80 -+} ; -+ -+// copy this data structor defination from MSDN SDK -+typedef struct _PCI_COMMON_CONFIG { -+ u16 VendorID; -+ u16 DeviceID; -+ u16 Command; -+ u16 Status; -+ u8 RevisionID; -+ u8 ProgIf; -+ u8 SubClass; -+ u8 BaseClass; -+ u8 CacheLineSize; -+ u8 LatencyTimer; -+ u8 HeaderType; -+ u8 BIST; -+ -+ union { -+ struct _PCI_HEADER_TYPE_0 { -+ u32 BaseAddresses[6]; -+ u32 CIS; -+ u16 SubVendorID; -+ u16 SubSystemID; -+ u32 ROMBaseAddress; -+ u8 CapabilitiesPtr; -+ u8 Reserved1[3]; -+ u32 Reserved2; -+ -+ u8 InterruptLine; -+ u8 InterruptPin; -+ u8 MinimumGrant; -+ u8 MaximumLatency; -+ } type0; -+#if 0 -+ struct _PCI_HEADER_TYPE_1 { -+ ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; -+ UCHAR PrimaryBusNumber; -+ UCHAR SecondaryBusNumber; -+ UCHAR SubordinateBusNumber; -+ UCHAR SecondaryLatencyTimer; -+ UCHAR IOBase; -+ UCHAR IOLimit; -+ USHORT SecondaryStatus; -+ USHORT MemoryBase; -+ USHORT MemoryLimit; -+ USHORT PrefetchableMemoryBase; -+ USHORT PrefetchableMemoryLimit; -+ ULONG PrefetchableMemoryBaseUpper32; -+ ULONG PrefetchableMemoryLimitUpper32; -+ USHORT IOBaseUpper; -+ USHORT IOLimitUpper; -+ ULONG Reserved2; -+ ULONG ExpansionROMBase; -+ UCHAR InterruptLine; -+ UCHAR InterruptPin; -+ USHORT BridgeControl; -+ } type1; -+ -+ struct _PCI_HEADER_TYPE_2 { -+ ULONG BaseAddress; -+ UCHAR CapabilitiesPtr; -+ UCHAR Reserved2; -+ USHORT SecondaryStatus; -+ UCHAR PrimaryBusNumber; -+ UCHAR CardbusBusNumber; -+ UCHAR SubordinateBusNumber; -+ UCHAR CardbusLatencyTimer; -+ ULONG MemoryBase0; -+ ULONG MemoryLimit0; -+ ULONG MemoryBase1; -+ ULONG MemoryLimit1; -+ USHORT IOBase0_LO; -+ USHORT IOBase0_HI; -+ USHORT IOLimit0_LO; -+ USHORT IOLimit0_HI; -+ USHORT IOBase1_LO; -+ USHORT IOBase1_HI; -+ USHORT IOLimit1_LO; -+ USHORT IOLimit1_HI; -+ UCHAR InterruptLine; -+ UCHAR InterruptPin; -+ USHORT BridgeControl; -+ USHORT SubVendorID; -+ USHORT SubSystemID; -+ ULONG LegacyBaseAddress; -+ UCHAR Reserved3[56]; -+ ULONG SystemControl; -+ UCHAR MultiMediaControl; -+ UCHAR GeneralStatus; -+ UCHAR Reserved4[2]; -+ UCHAR GPIO0Control; -+ UCHAR GPIO1Control; -+ UCHAR GPIO2Control; -+ UCHAR GPIO3Control; -+ ULONG IRQMuxRouting; -+ UCHAR RetryStatus; -+ UCHAR CardControl; -+ UCHAR DeviceControl; -+ UCHAR Diagnostic; -+ } type2; -+#endif -+ } u; -+ -+ u8 DeviceSpecific[108]; -+} PCI_COMMON_CONFIG , *PPCI_COMMON_CONFIG; -+ -+typedef struct _RT_PCI_CAPABILITIES_HEADER { -+ u8 CapabilityID; -+ u8 Next; -+} RT_PCI_CAPABILITIES_HEADER, *PRT_PCI_CAPABILITIES_HEADER; -+ -+struct pci_priv{ -+ BOOLEAN pci_clk_req; -+ -+ u8 pciehdr_offset; -+ // PCIeCap is only differece between B-cut and C-cut. -+ // Configuration Space offset 72[7:4] -+ // 0: A/B cut -+ // 1: C cut and later. -+ u8 pcie_cap; -+ u8 linkctrl_reg; -+ -+ u8 busnumber; -+ u8 devnumber; -+ u8 funcnumber; -+ -+ u8 pcibridge_busnum; -+ u8 pcibridge_devnum; -+ u8 pcibridge_funcnum; -+ u8 pcibridge_vendor; -+ u16 pcibridge_vendorid; -+ u16 pcibridge_deviceid; -+ u8 pcibridge_pciehdr_offset; -+ u8 pcibridge_linkctrlreg; -+ -+ u8 amd_l1_patch; -+}; -+ -+typedef struct _RT_ISR_CONTENT -+{ -+ union{ -+ u32 IntArray[2]; -+ u32 IntReg4Byte; -+ u16 IntReg2Byte; -+ }; -+}RT_ISR_CONTENT, *PRT_ISR_CONTENT; -+ -+//#define RegAddr(addr) (addr + 0xB2000000UL) -+//some platform macros will def here -+static inline void NdisRawWritePortUlong(u32 port, u32 val) -+{ -+ outl(val, port); -+ //writel(val, (u8 *)RegAddr(port)); -+} -+ -+static inline void NdisRawWritePortUchar(u32 port, u8 val) -+{ -+ outb(val, port); -+ //writeb(val, (u8 *)RegAddr(port)); -+} -+ -+static inline void NdisRawReadPortUchar(u32 port, u8 *pval) -+{ -+ *pval = inb(port); -+ //*pval = readb((u8 *)RegAddr(port)); -+} -+ -+static inline void NdisRawReadPortUshort(u32 port, u16 *pval) -+{ -+ *pval = inw(port); -+ //*pval = readw((u8 *)RegAddr(port)); -+} -+ -+static inline void NdisRawReadPortUlong(u32 port, u32 *pval) -+{ -+ *pval = inl(port); -+ //*pval = readl((u8 *)RegAddr(port)); -+} -+ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_PCI_H__ ++#define __DRV_TYPES_PCI_H__ ++ ++ ++#ifdef PLATFORM_LINUX ++#include ++#endif ++ ++ ++#define INTEL_VENDOR_ID 0x8086 ++#define SIS_VENDOR_ID 0x1039 ++#define ATI_VENDOR_ID 0x1002 ++#define ATI_DEVICE_ID 0x7914 ++#define AMD_VENDOR_ID 0x1022 ++ ++#define PCI_MAX_BRIDGE_NUMBER 255 ++#define PCI_MAX_DEVICES 32 ++#define PCI_MAX_FUNCTION 8 ++ ++#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address ++#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data ++ ++#define PCI_CLASS_BRIDGE_DEV 0x06 ++#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04 ++ ++#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10 ++ ++#define U1DONTCARE 0xFF ++#define U2DONTCARE 0xFFFF ++#define U4DONTCARE 0xFFFFFFFF ++ ++#define PCI_VENDER_ID_REALTEK 0x10ec ++ ++#define HAL_HW_PCI_8180_DEVICE_ID 0x8180 ++#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b ++#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b ++#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b ++#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190 ++#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E ++#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E ++#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE ++#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE ++#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab ++#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE ++#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron ++#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga ++#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga ++#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga ++#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga ++#define HAL_HW_PCI_700F_DEVICE_ID 0x700F ++#define HAL_HW_PCI_701F_DEVICE_ID 0x701F ++#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 ++#define HAL_HW_PCI_8188EE_DEVICE_ID 0x8179 ++ ++#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192SE 0x10 ++#define HAL_HW_PCI_REVISION_ID_8192CE 0x1 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192DE 0x0 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers ++ ++enum pci_bridge_vendor { ++ PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001 ++ PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010 ++ PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100 ++ PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000 ++ PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000 ++ PCI_BRIDGE_VENDOR_MAX ,//= 0x80 ++} ; ++ ++// copy this data structor defination from MSDN SDK ++typedef struct _PCI_COMMON_CONFIG { ++ u16 VendorID; ++ u16 DeviceID; ++ u16 Command; ++ u16 Status; ++ u8 RevisionID; ++ u8 ProgIf; ++ u8 SubClass; ++ u8 BaseClass; ++ u8 CacheLineSize; ++ u8 LatencyTimer; ++ u8 HeaderType; ++ u8 BIST; ++ ++ union { ++ struct _PCI_HEADER_TYPE_0 { ++ u32 BaseAddresses[6]; ++ u32 CIS; ++ u16 SubVendorID; ++ u16 SubSystemID; ++ u32 ROMBaseAddress; ++ u8 CapabilitiesPtr; ++ u8 Reserved1[3]; ++ u32 Reserved2; ++ ++ u8 InterruptLine; ++ u8 InterruptPin; ++ u8 MinimumGrant; ++ u8 MaximumLatency; ++ } type0; ++#if 0 ++ struct _PCI_HEADER_TYPE_1 { ++ ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; ++ UCHAR PrimaryBusNumber; ++ UCHAR SecondaryBusNumber; ++ UCHAR SubordinateBusNumber; ++ UCHAR SecondaryLatencyTimer; ++ UCHAR IOBase; ++ UCHAR IOLimit; ++ USHORT SecondaryStatus; ++ USHORT MemoryBase; ++ USHORT MemoryLimit; ++ USHORT PrefetchableMemoryBase; ++ USHORT PrefetchableMemoryLimit; ++ ULONG PrefetchableMemoryBaseUpper32; ++ ULONG PrefetchableMemoryLimitUpper32; ++ USHORT IOBaseUpper; ++ USHORT IOLimitUpper; ++ ULONG Reserved2; ++ ULONG ExpansionROMBase; ++ UCHAR InterruptLine; ++ UCHAR InterruptPin; ++ USHORT BridgeControl; ++ } type1; ++ ++ struct _PCI_HEADER_TYPE_2 { ++ ULONG BaseAddress; ++ UCHAR CapabilitiesPtr; ++ UCHAR Reserved2; ++ USHORT SecondaryStatus; ++ UCHAR PrimaryBusNumber; ++ UCHAR CardbusBusNumber; ++ UCHAR SubordinateBusNumber; ++ UCHAR CardbusLatencyTimer; ++ ULONG MemoryBase0; ++ ULONG MemoryLimit0; ++ ULONG MemoryBase1; ++ ULONG MemoryLimit1; ++ USHORT IOBase0_LO; ++ USHORT IOBase0_HI; ++ USHORT IOLimit0_LO; ++ USHORT IOLimit0_HI; ++ USHORT IOBase1_LO; ++ USHORT IOBase1_HI; ++ USHORT IOLimit1_LO; ++ USHORT IOLimit1_HI; ++ UCHAR InterruptLine; ++ UCHAR InterruptPin; ++ USHORT BridgeControl; ++ USHORT SubVendorID; ++ USHORT SubSystemID; ++ ULONG LegacyBaseAddress; ++ UCHAR Reserved3[56]; ++ ULONG SystemControl; ++ UCHAR MultiMediaControl; ++ UCHAR GeneralStatus; ++ UCHAR Reserved4[2]; ++ UCHAR GPIO0Control; ++ UCHAR GPIO1Control; ++ UCHAR GPIO2Control; ++ UCHAR GPIO3Control; ++ ULONG IRQMuxRouting; ++ UCHAR RetryStatus; ++ UCHAR CardControl; ++ UCHAR DeviceControl; ++ UCHAR Diagnostic; ++ } type2; ++#endif ++ } u; ++ ++ u8 DeviceSpecific[108]; ++} PCI_COMMON_CONFIG , *PPCI_COMMON_CONFIG; ++ ++typedef struct _RT_PCI_CAPABILITIES_HEADER { ++ u8 CapabilityID; ++ u8 Next; ++} RT_PCI_CAPABILITIES_HEADER, *PRT_PCI_CAPABILITIES_HEADER; ++ ++struct pci_priv{ ++ BOOLEAN pci_clk_req; ++ ++ u8 pciehdr_offset; ++ // PCIeCap is only differece between B-cut and C-cut. ++ // Configuration Space offset 72[7:4] ++ // 0: A/B cut ++ // 1: C cut and later. ++ u8 pcie_cap; ++ u8 linkctrl_reg; ++ ++ u8 busnumber; ++ u8 devnumber; ++ u8 funcnumber; ++ ++ u8 pcibridge_busnum; ++ u8 pcibridge_devnum; ++ u8 pcibridge_funcnum; ++ u8 pcibridge_vendor; ++ u16 pcibridge_vendorid; ++ u16 pcibridge_deviceid; ++ u8 pcibridge_pciehdr_offset; ++ u8 pcibridge_linkctrlreg; ++ ++ u8 amd_l1_patch; ++}; ++ ++typedef struct _RT_ISR_CONTENT ++{ ++ union{ ++ u32 IntArray[2]; ++ u32 IntReg4Byte; ++ u16 IntReg2Byte; ++ }; ++}RT_ISR_CONTENT, *PRT_ISR_CONTENT; ++ ++//#define RegAddr(addr) (addr + 0xB2000000UL) ++//some platform macros will def here ++static inline void NdisRawWritePortUlong(u32 port, u32 val) ++{ ++ outl(val, port); ++ //writel(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawWritePortUchar(u32 port, u8 val) ++{ ++ outb(val, port); ++ //writeb(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUchar(u32 port, u8 *pval) ++{ ++ *pval = inb(port); ++ //*pval = readb((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUshort(u32 port, u16 *pval) ++{ ++ *pval = inw(port); ++ //*pval = readw((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUlong(u32 port, u32 *pval) ++{ ++ *pval = inl(port); ++ //*pval = readl((u8 *)RegAddr(port)); ++} ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_sdio.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_sdio.h new file mode 100644 -index 000000000..2fa90265d +index 0000000..044ef51 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_sdio.h @@ -0,0 +1,81 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __DRV_TYPES_SDIO_H__ -+#define __DRV_TYPES_SDIO_H__ -+ -+// SDIO Header Files -+#ifdef PLATFORM_LINUX -+ #include -+ #include -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PLATFORM_SPRD) -+ #include -+ #include -+#endif -+ -+#ifdef CONFIG_PLATFORM_SPRD -+ #include -+ #include -+#endif // CONFIG_PLATFORM_SPRD -+#endif -+ -+#ifdef PLATFORM_OS_XP -+#include -+#include -+#endif -+ -+#ifdef PLATFORM_OS_CE -+#include -+#endif -+ -+ -+typedef struct sdio_data -+{ -+ u8 func_number; -+ -+ u8 tx_block_mode; -+ u8 rx_block_mode; -+ u32 block_transfer_len; -+ -+#ifdef PLATFORM_LINUX -+ struct sdio_func *func; -+ _thread_hdl_ sys_sdio_irq_thd; -+#endif -+ -+#ifdef PLATFORM_OS_XP -+ PDEVICE_OBJECT pphysdevobj; -+ PDEVICE_OBJECT pfuncdevobj; -+ PDEVICE_OBJECT pnextdevobj; -+ SDBUS_INTERFACE_STANDARD sdbusinft; -+ u8 nextdevstacksz; -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ SD_DEVICE_HANDLE hDevice; -+ SD_CARD_RCA sd_rca; -+ SD_CARD_INTERFACE card_intf; -+ BOOLEAN enableIsarWithStatus; -+ WCHAR active_path[MAX_ACTIVE_REG_PATH]; -+ SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; -+#endif -+} SDIO_DATA, *PSDIO_DATA; -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_SDIO_H__ ++#define __DRV_TYPES_SDIO_H__ ++ ++// SDIO Header Files ++#ifdef PLATFORM_LINUX ++ #include ++ #include ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PLATFORM_SPRD) ++ #include ++ #include ++#endif ++ ++#ifdef CONFIG_PLATFORM_SPRD ++ #include ++ #include ++#endif // CONFIG_PLATFORM_SPRD ++#endif ++ ++#ifdef PLATFORM_OS_XP ++#include ++#include ++#endif ++ ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++ ++ ++typedef struct sdio_data ++{ ++ u8 func_number; ++ ++ u8 tx_block_mode; ++ u8 rx_block_mode; ++ u32 block_transfer_len; ++ ++#ifdef PLATFORM_LINUX ++ struct sdio_func *func; ++ _thread_hdl_ sys_sdio_irq_thd; ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ PDEVICE_OBJECT pphysdevobj; ++ PDEVICE_OBJECT pfuncdevobj; ++ PDEVICE_OBJECT pnextdevobj; ++ SDBUS_INTERFACE_STANDARD sdbusinft; ++ u8 nextdevstacksz; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ SD_DEVICE_HANDLE hDevice; ++ SD_CARD_RCA sd_rca; ++ SD_CARD_INTERFACE card_intf; ++ BOOLEAN enableIsarWithStatus; ++ WCHAR active_path[MAX_ACTIVE_REG_PATH]; ++ SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; ++#endif ++} SDIO_DATA, *PSDIO_DATA; ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_xp.h b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_xp.h new file mode 100644 -index 000000000..2d51b1db1 +index 0000000..2d51b1d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/drv_types_xp.h @@ -0,0 +1,95 @@ @@ -274526,7 +315959,7 @@ index 000000000..2d51b1db1 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/ethernet.h b/drivers/net/wireless/realtek/rtl8189fs/include/ethernet.h new file mode 100644 -index 000000000..cadc8c1d8 +index 0000000..cadc8c1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/ethernet.h @@ -0,0 +1,42 @@ @@ -274574,7 +316007,7 @@ index 000000000..cadc8c1d8 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/gspi_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_hal.h new file mode 100644 -index 000000000..758151258 +index 0000000..7581512 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_hal.h @@ -0,0 +1,36 @@ @@ -274616,7 +316049,7 @@ index 000000000..758151258 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/gspi_ops.h b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_ops.h new file mode 100644 -index 000000000..e04c28a91 +index 0000000..e04c28a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_ops.h @@ -0,0 +1,185 @@ @@ -274807,7 +316240,7 @@ index 000000000..e04c28a91 +#endif //__GSPI_OPS_H__ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/gspi_ops_linux.h b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_ops_linux.h new file mode 100644 -index 000000000..6358a0fa6 +index 0000000..6358a0f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_ops_linux.h @@ -0,0 +1,24 @@ @@ -274837,7 +316270,7 @@ index 000000000..6358a0fa6 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/gspi_osintf.h b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_osintf.h new file mode 100644 -index 000000000..5b57bdb66 +index 0000000..5b57bdb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/gspi_osintf.h @@ -0,0 +1,31 @@ @@ -274874,7 +316307,7 @@ index 000000000..5b57bdb66 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/h2clbk.h b/drivers/net/wireless/realtek/rtl8189fs/include/h2clbk.h new file mode 100644 -index 000000000..4fa863c2d +index 0000000..4fa863c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/h2clbk.h @@ -0,0 +1,32 @@ @@ -274912,7 +316345,7 @@ index 000000000..4fa863c2d + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_btcoex.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_btcoex.h new file mode 100644 -index 000000000..dd2eb84f4 +index 0000000..dd2eb84 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_btcoex.h @@ -0,0 +1,97 @@ @@ -275015,7 +316448,7 @@ index 000000000..dd2eb84f4 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_com.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com.h new file mode 100644 -index 000000000..fc593503f +index 0000000..fc59350 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com.h @@ -0,0 +1,533 @@ @@ -275554,7 +316987,7 @@ index 000000000..fc593503f + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_h2c.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_h2c.h new file mode 100644 -index 000000000..ad583d27e +index 0000000..ad583d2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_h2c.h @@ -0,0 +1,364 @@ @@ -275924,7 +317357,7 @@ index 000000000..ad583d27e +#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_led.h new file mode 100644 -index 000000000..79e62c6e5 +index 0000000..79e62c6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_led.h @@ -0,0 +1,398 @@ @@ -276328,7 +317761,7 @@ index 000000000..79e62c6e5 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_phycfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_phycfg.h new file mode 100644 -index 000000000..a765d6c59 +index 0000000..a765d6c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_phycfg.h @@ -0,0 +1,285 @@ @@ -276619,7 +318052,7 @@ index 000000000..a765d6c59 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_reg.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_reg.h new file mode 100644 -index 000000000..0548729d7 +index 0000000..0548729 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_com_reg.h @@ -0,0 +1,1780 @@ @@ -278405,7 +319838,7 @@ index 000000000..0548729d7 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_data.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_data.h new file mode 100644 -index 000000000..249f8b2fa +index 0000000..249f8b2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_data.h @@ -0,0 +1,653 @@ @@ -279064,7 +320497,7 @@ index 000000000..249f8b2fa + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_gspi.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_gspi.h new file mode 100644 -index 000000000..f5880e274 +index 0000000..f5880e2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_gspi.h @@ -0,0 +1,32 @@ @@ -279102,7 +320535,7 @@ index 000000000..f5880e274 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_ic_cfg.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_ic_cfg.h new file mode 100644 -index 000000000..0c8371eb6 +index 0000000..0c8371e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_ic_cfg.h @@ -0,0 +1,93 @@ @@ -279201,7 +320634,7 @@ index 000000000..0c8371eb6 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_intf.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_intf.h new file mode 100644 -index 000000000..04fc04445 +index 0000000..04fc044 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_intf.h @@ -0,0 +1,686 @@ @@ -279893,672 +321326,672 @@ index 000000000..04fc04445 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_pg.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_pg.h new file mode 100644 -index 000000000..cb16718a8 +index 0000000..d1b0023 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_pg.h @@ -0,0 +1,659 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __HAL_PG_H__ -+#define __HAL_PG_H__ -+ -+#define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F -+#define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0 -+ -+#define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F -+#define PPG_THERMAL_OFFSET_MASK 0x1F -+#define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) -+#define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) -+#define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) -+ -+//==================================================== -+// EEPROM/Efuse PG Offset for 88EE/88EU/88ES -+//==================================================== -+#define EEPROM_TX_PWR_INX_88E 0x10 -+ -+#define EEPROM_ChannelPlan_88E 0xB8 -+#define EEPROM_XTAL_88E 0xB9 -+#define EEPROM_THERMAL_METER_88E 0xBA -+#define EEPROM_IQK_LCK_88E 0xBB -+ -+#define EEPROM_RF_BOARD_OPTION_88E 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_88E 0xC2 -+#define EEPROM_RF_BT_SETTING_88E 0xC3 -+#define EEPROM_VERSION_88E 0xC4 -+#define EEPROM_CustomID_88E 0xC5 -+#define EEPROM_RF_ANTENNA_OPT_88E 0xC9 -+#define EEPROM_COUNTRY_CODE_88E 0xCB -+ -+// RTL88EE -+#define EEPROM_MAC_ADDR_88EE 0xD0 -+#define EEPROM_VID_88EE 0xD6 -+#define EEPROM_DID_88EE 0xD8 -+#define EEPROM_SVID_88EE 0xDA -+#define EEPROM_SMID_88EE 0xDC -+ -+//RTL88EU -+#define EEPROM_MAC_ADDR_88EU 0xD7 -+#define EEPROM_VID_88EU 0xD0 -+#define EEPROM_PID_88EU 0xD2 -+#define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 //8188EU,8192EU, 8812AU is the same -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 -+ -+// RTL88ES -+#define EEPROM_MAC_ADDR_88ES 0x11A -+//==================================================== -+// EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES -+//==================================================== -+#define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6 -+#define PPG_THERMAL_OFFSET_8192E 0x1F5 -+ -+// 0x10 ~ 0x63 = TX power area. -+#define EEPROM_TX_PWR_INX_8192E 0x10 -+ -+#define EEPROM_ChannelPlan_8192E 0xB8 -+#define EEPROM_XTAL_8192E 0xB9 -+#define EEPROM_THERMAL_METER_8192E 0xBA -+#define EEPROM_IQK_LCK_8192E 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8192E 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8192E 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 -+#define EEPROM_RF_BT_SETTING_8192E 0xC3 -+#define EEPROM_VERSION_8192E 0xC4 -+#define EEPROM_CustomID_8192E 0xC5 -+#define EEPROM_TX_BBSWING_2G_8192E 0xC6 -+#define EEPROM_TX_BBSWING_5G_8192E 0xC7 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 -+#define EEPROM_RFE_OPTION_8192E 0xCA -+#define EEPROM_COUNTRY_CODE_8192E 0xCB -+ -+// RTL8192EE -+#define EEPROM_MAC_ADDR_8192EE 0xD0 -+#define EEPROM_VID_8192EE 0xD6 -+#define EEPROM_DID_8192EE 0xD8 -+#define EEPROM_SVID_8192EE 0xDA -+#define EEPROM_SMID_8192EE 0xDC -+ -+//RTL8192EU -+#define EEPROM_MAC_ADDR_8192EU 0xD7 -+#define EEPROM_VID_8192EU 0xD0 -+#define EEPROM_PID_8192EU 0xD2 -+#define EEPROM_PA_TYPE_8192EU 0xBC -+#define EEPROM_LNA_TYPE_2G_8192EU 0xBD -+#define EEPROM_LNA_TYPE_5G_8192EU 0xBF -+ -+// RTL8192ES -+#define EEPROM_MAC_ADDR_8192ES 0x11A -+//==================================================== -+// EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS -+//==================================================== -+// 0x10 ~ 0x63 = TX power area. -+#define EEPROM_USB_MODE_8812 0x08 -+#define EEPROM_TX_PWR_INX_8812 0x10 -+ -+#define EEPROM_ChannelPlan_8812 0xB8 -+#define EEPROM_XTAL_8812 0xB9 -+#define EEPROM_THERMAL_METER_8812 0xBA -+#define EEPROM_IQK_LCK_8812 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8812 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8812 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_8812 0xC2 -+#define EEPROM_RF_BT_SETTING_8812 0xC3 -+#define EEPROM_VERSION_8812 0xC4 -+#define EEPROM_CustomID_8812 0xC5 -+#define EEPROM_TX_BBSWING_2G_8812 0xC6 -+#define EEPROM_TX_BBSWING_5G_8812 0xC7 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8812 0xC9 -+#define EEPROM_RFE_OPTION_8812 0xCA -+#define EEPROM_COUNTRY_CODE_8812 0xCB -+ -+// RTL8812AE -+#define EEPROM_MAC_ADDR_8812AE 0xD0 -+#define EEPROM_VID_8812AE 0xD6 -+#define EEPROM_DID_8812AE 0xD8 -+#define EEPROM_SVID_8812AE 0xDA -+#define EEPROM_SMID_8812AE 0xDC -+ -+//RTL8812AU -+#define EEPROM_MAC_ADDR_8812AU 0xD7 -+#define EEPROM_VID_8812AU 0xD0 -+#define EEPROM_PID_8812AU 0xD2 -+#define EEPROM_PA_TYPE_8812AU 0xBC -+#define EEPROM_LNA_TYPE_2G_8812AU 0xBD -+#define EEPROM_LNA_TYPE_5G_8812AU 0xBF -+ -+//RTL8814AU -+#define EEPROM_MAC_ADDR_8814AU 0xD8 -+#define EEPROM_VID_8814AU 0xD0 -+#define EEPROM_PID_8814AU 0xD2 -+#define EEPROM_PA_TYPE_8814AU 0xBC -+#define EEPROM_LNA_TYPE_2G_8814AU 0xBD -+#define EEPROM_LNA_TYPE_5G_8814AU 0xBF -+ -+/* RTL8814AE */ -+#define EEPROM_MAC_ADDR_8814AE 0xD0 -+#define EEPROM_VID_8814AE 0xD6 -+#define EEPROM_DID_8814AE 0xD8 -+#define EEPROM_SVID_8814AE 0xDA -+#define EEPROM_SMID_8814AE 0xDC -+ -+//==================================================== -+// EEPROM/Efuse PG Offset for 8814AU -+//==================================================== -+#define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+#define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2) -+ -+#define KFREE_GAIN_DATA_LENGTH_8814A 22 -+ -+#define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE -+ -+#define PPG_THERMAL_OFFSET_8814A 0x3EF -+ -+#define EEPROM_TX_PWR_INX_8814 0x10 -+#define EEPROM_ChannelPlan_8814 0xB8 -+#define EEPROM_XTAL_8814 0xB9 -+#define EEPROM_THERMAL_METER_8814 0xBA -+#define EEPROM_IQK_LCK_8814 0xBB -+ -+ -+#define EEPROM_PA_TYPE_8814 0xBC -+#define EEPROM_LNA_TYPE_AB_2G_8814 0xBD -+#define EEPROM_LNA_TYPE_CD_2G_8814 0xBE -+#define EEPROM_LNA_TYPE_AB_5G_8814 0xBF -+#define EEPROM_LNA_TYPE_CD_5G_8814 0xC0 -+#define EEPROM_RF_BOARD_OPTION_8814 0xC1 -+#define EEPROM_RF_BT_SETTING_8814 0xC3 -+#define EEPROM_VERSION_8814 0xC4 -+#define EEPROM_CustomID_8814 0xC5 -+#define EEPROM_TX_BBSWING_2G_8814 0xC6 -+#define EEPROM_TX_BBSWING_5G_8814 0xC7 -+#define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9 -+#define EEPROM_RFE_OPTION_8814 0xCA -+#define EEPROM_COUNTRY_CODE_8814 0xCB -+ -+/*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/ -+#define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120 -+#define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121 -+#define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122 -+#define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123 -+#define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124 -+#define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125 -+#define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126 -+#define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127 -+ -+//==================================================== -+// EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS -+//==================================================== -+ -+#define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6 -+#define PPG_THERMAL_OFFSET_8821A 0x1F5 -+#define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4 -+#define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3 -+#define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2 -+#define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1 -+#define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0 -+ -+#define EEPROM_TX_PWR_INX_8821 0x10 -+ -+#define EEPROM_ChannelPlan_8821 0xB8 -+#define EEPROM_XTAL_8821 0xB9 -+#define EEPROM_THERMAL_METER_8821 0xBA -+#define EEPROM_IQK_LCK_8821 0xBB -+ -+ -+#define EEPROM_RF_BOARD_OPTION_8821 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_8821 0xC2 -+#define EEPROM_RF_BT_SETTING_8821 0xC3 -+#define EEPROM_VERSION_8821 0xC4 -+#define EEPROM_CustomID_8821 0xC5 -+#define EEPROM_RF_ANTENNA_OPT_8821 0xC9 -+ -+// RTL8821AE -+#define EEPROM_MAC_ADDR_8821AE 0xD0 -+#define EEPROM_VID_8821AE 0xD6 -+#define EEPROM_DID_8821AE 0xD8 -+#define EEPROM_SVID_8821AE 0xDA -+#define EEPROM_SMID_8821AE 0xDC -+ -+//RTL8821AU -+#define EEPROM_PA_TYPE_8821AU 0xBC -+#define EEPROM_LNA_TYPE_8821AU 0xBF -+ -+// RTL8821AS -+#define EEPROM_MAC_ADDR_8821AS 0x11A -+ -+//RTL8821AU -+#define EEPROM_MAC_ADDR_8821AU 0x107 -+#define EEPROM_VID_8821AU 0x100 -+#define EEPROM_PID_8821AU 0x102 -+ -+ -+//==================================================== -+// EEPROM/Efuse PG Offset for 8192 SE/SU -+//==================================================== -+#define EEPROM_VID_92SE 0x0A -+#define EEPROM_DID_92SE 0x0C -+#define EEPROM_SVID_92SE 0x0E -+#define EEPROM_SMID_92SE 0x10 -+ -+#define EEPROM_MAC_ADDR_92S 0x12 -+ -+#define EEPROM_TSSI_A_92SE 0x74 -+#define EEPROM_TSSI_B_92SE 0x75 -+ -+#define EEPROM_Version_92SE 0x7C -+ -+ -+#define EEPROM_VID_92SU 0x08 -+#define EEPROM_PID_92SU 0x0A -+ -+#define EEPROM_Version_92SU 0x50 -+#define EEPROM_TSSI_A_92SU 0x6b -+#define EEPROM_TSSI_B_92SU 0x6c -+ -+/* ==================================================== -+ EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS -+ ==================================================== -+ */ -+ -+#define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE -+#define PPG_THERMAL_OFFSET_8188F 0xEF -+ -+/* 0x10 ~ 0x63 = TX power area. */ -+#define EEPROM_TX_PWR_INX_8188F 0x10 -+ -+#define EEPROM_ChannelPlan_8188F 0xB8 -+#define EEPROM_XTAL_8188F 0xB9 -+#define EEPROM_THERMAL_METER_8188F 0xBA -+#define EEPROM_IQK_LCK_8188F 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8188F 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8188F 0xC1 -+#define EEPROM_FEATURE_OPTION_8188F 0xC2 -+#define EEPROM_RF_BT_SETTING_8188F 0xC3 -+#define EEPROM_VERSION_8188F 0xC4 -+#define EEPROM_CustomID_8188F 0xC5 -+#define EEPROM_TX_BBSWING_2G_8188F 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8188F 0xC9 -+#define EEPROM_RFE_OPTION_8188F 0xCA -+#define EEPROM_COUNTRY_CODE_8188F 0xCB -+#define EEPROM_CUSTOMER_ID_8188F 0x7F -+#define EEPROM_SUBCUSTOMER_ID_8188F 0x59 -+ -+/* RTL8188FU */ -+#define EEPROM_MAC_ADDR_8188FU 0xD7 -+#define EEPROM_VID_8188FU 0xD0 -+#define EEPROM_PID_8188FU 0xD2 -+#define EEPROM_PA_TYPE_8188FU 0xBC -+#define EEPROM_LNA_TYPE_2G_8188FU 0xBD -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4 -+ -+/* RTL8188FS */ -+#define EEPROM_MAC_ADDR_8188FS 0x11A -+#define EEPROM_Voltage_ADDR_8188F 0x8 -+ -+//==================================================== -+// EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS -+//==================================================== -+// 0x10 ~ 0x63 = TX power area. -+#define EEPROM_TX_PWR_INX_8723B 0x10 -+ -+#define EEPROM_ChannelPlan_8723B 0xB8 -+#define EEPROM_XTAL_8723B 0xB9 -+#define EEPROM_THERMAL_METER_8723B 0xBA -+#define EEPROM_IQK_LCK_8723B 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8723B 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8723B 0xC1 -+#define EEPROM_FEATURE_OPTION_8723B 0xC2 -+#define EEPROM_RF_BT_SETTING_8723B 0xC3 -+#define EEPROM_VERSION_8723B 0xC4 -+#define EEPROM_CustomID_8723B 0xC5 -+#define EEPROM_TX_BBSWING_2G_8723B 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 -+#define EEPROM_RFE_OPTION_8723B 0xCA -+#define EEPROM_COUNTRY_CODE_8723B 0xCB -+ -+// RTL8723BE -+#define EEPROM_MAC_ADDR_8723BE 0xD0 -+#define EEPROM_VID_8723BE 0xD6 -+#define EEPROM_DID_8723BE 0xD8 -+#define EEPROM_SVID_8723BE 0xDA -+#define EEPROM_SMID_8723BE 0xDC -+ -+//RTL8723BU -+#define EEPROM_MAC_ADDR_8723BU 0x107 -+#define EEPROM_VID_8723BU 0x100 -+#define EEPROM_PID_8723BU 0x102 -+#define EEPROM_PA_TYPE_8723BU 0xBC -+#define EEPROM_LNA_TYPE_2G_8723BU 0xBD -+ -+ -+//RTL8723BS -+#define EEPROM_MAC_ADDR_8723BS 0x11A -+#define EEPROM_Voltage_ADDR_8723B 0x8 -+ -+//==================================================== -+/* EEPROM/Efuse PG Offset for 8703B */ -+//==================================================== -+#define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE -+#define PPG_THERMAL_OFFSET_8703B 0xEF -+ -+#define EEPROM_TX_PWR_INX_8703B 0x10 -+ -+#define EEPROM_ChannelPlan_8703B 0xB8 -+#define EEPROM_XTAL_8703B 0xB9 -+#define EEPROM_THERMAL_METER_8703B 0xBA -+#define EEPROM_IQK_LCK_8703B 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8703B 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8703B 0xC1 -+#define EEPROM_FEATURE_OPTION_8703B 0xC2 -+#define EEPROM_RF_BT_SETTING_8703B 0xC3 -+#define EEPROM_VERSION_8703B 0xC4 -+#define EEPROM_CustomID_8703B 0xC5 -+#define EEPROM_TX_BBSWING_2G_8703B 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8703B 0xC9 -+#define EEPROM_RFE_OPTION_8703B 0xCA -+#define EEPROM_COUNTRY_CODE_8703B 0xCB -+ -+/* MAC Hidden */ -+#define PPG_MAC_HIDDEN_START_8703B 0xF0 -+#define PPG_MAC_HIDDEN_END_8703B 0xFF -+#define EEPROM_HCI_AND_PACKAGE_TYPE_8703B 0xF8 -+#define EEPROM_WL_FUNC_CAP_8703B 0xF9 -+#define EEPROM_BW_AND_ANT_NUM_CAP_8703B 0xFB -+#define GET_PMH_HCI_TYPE_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 4) -+#define GET_PMH_PACKAGE_TYPE_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8703B - PPG_MAC_HIDDEN_START_8703B, 4, 4) -+#define GET_PMH_WL_FUNC_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_WL_FUNC_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 4) -+#define GET_PMH_BW_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 3) -+#define GET_PMH_ANT_NUM_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 5, 3) -+ -+/* RTL8703BU */ -+#define EEPROM_MAC_ADDR_8703BU 0x107 -+#define EEPROM_VID_8703BU 0x100 -+#define EEPROM_PID_8703BU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104 -+#define EEPROM_PA_TYPE_8703BU 0xBC -+#define EEPROM_LNA_TYPE_2G_8703BU 0xBD -+ -+//RTL8703BS -+#define EEPROM_MAC_ADDR_8703BS 0x11A -+#define EEPROM_Voltage_ADDR_8703B 0x8 -+ -+//==================================================== -+// EEPROM/Efuse Value Type -+//==================================================== -+#define EETYPE_TX_PWR 0x0 -+//==================================================== -+// EEPROM/Efuse Default Value -+//==================================================== -+#define EEPROM_CID_DEFAULT 0x0 -+#define EEPROM_CID_DEFAULT_EXT 0xFF // Reserved for Realtek -+#define EEPROM_CID_TOSHIBA 0x4 -+#define EEPROM_CID_CCX 0x10 -+#define EEPROM_CID_QMI 0x0D -+#define EEPROM_CID_WHQL 0xFE -+ -+#define EEPROM_CHANNEL_PLAN_FCC 0x0 -+#define EEPROM_CHANNEL_PLAN_IC 0x1 -+#define EEPROM_CHANNEL_PLAN_ETSI 0x2 -+#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 -+#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 -+#define EEPROM_CHANNEL_PLAN_MKK 0x5 -+#define EEPROM_CHANNEL_PLAN_MKK1 0x6 -+#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 -+#define EEPROM_CHANNEL_PLAN_TELEC 0x8 -+#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 -+#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA -+#define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB -+#define EEPROM_CHANNEL_PLAN_CHIAN 0XC -+#define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD -+#define EEPROM_CHANNEL_PLAN_KOREA 0xE -+#define EEPROM_CHANNEL_PLAN_TURKEY 0xF -+#define EEPROM_CHANNEL_PLAN_JAPAN 0x10 -+#define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 -+#define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 -+#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 -+#define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 -+ -+#define EEPROM_USB_OPTIONAL1 0xE -+#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 -+ -+#define RTL_EEPROM_ID 0x8129 -+#define EEPROM_Default_TSSI 0x0 -+#define EEPROM_Default_BoardType 0x02 -+#define EEPROM_Default_ThermalMeter 0x12 -+#define EEPROM_Default_ThermalMeter_92SU 0x7 -+#define EEPROM_Default_ThermalMeter_88E 0x18 -+#define EEPROM_Default_ThermalMeter_8812 0x18 -+#define EEPROM_Default_ThermalMeter_8192E 0x1A -+#define EEPROM_Default_ThermalMeter_8723B 0x18 -+#define EEPROM_Default_ThermalMeter_8703B 0x18 -+#define EEPROM_Default_ThermalMeter_8188F 0x18 -+#define EEPROM_Default_ThermalMeter_8814A 0x18 -+ -+ -+#define EEPROM_Default_CrystalCap 0x0 -+#define EEPROM_Default_CrystalCap_8723A 0x20 -+#define EEPROM_Default_CrystalCap_88E 0x20 -+#define EEPROM_Default_CrystalCap_8812 0x20 -+#define EEPROM_Default_CrystalCap_8814 0x20 -+#define EEPROM_Default_CrystalCap_8192E 0x20 -+#define EEPROM_Default_CrystalCap_8723B 0x20 -+#define EEPROM_Default_CrystalCap_8703B 0x20 -+#define EEPROM_Default_CrystalCap_8188F 0x20 -+#define EEPROM_Default_CrystalFreq 0x0 -+#define EEPROM_Default_TxPowerLevel_92C 0x22 -+#define EEPROM_Default_TxPowerLevel_2G 0x2C -+#define EEPROM_Default_TxPowerLevel_5G 0x22 -+#define EEPROM_Default_TxPowerLevel 0x22 -+#define EEPROM_Default_HT40_2SDiff 0x0 -+#define EEPROM_Default_HT20_Diff 2 -+#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -+#define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 -+#define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 -+#define EEPROM_Default_HT40_PwrMaxOffset 0 -+#define EEPROM_Default_HT20_PwrMaxOffset 0 -+ -+#define EEPROM_Default_PID 0x1234 -+#define EEPROM_Default_VID 0x5678 -+#define EEPROM_Default_CustomerID 0xAB -+#define EEPROM_Default_CustomerID_8188E 0x00 -+#define EEPROM_Default_SubCustomerID 0xCD -+#define EEPROM_Default_Version 0 -+ -+#define EEPROM_Default_externalPA_C9 0x00 -+#define EEPROM_Default_externalPA_CC 0xFF -+#define EEPROM_Default_internalPA_SP3T_C9 0xAA -+#define EEPROM_Default_internalPA_SP3T_CC 0xAF -+#define EEPROM_Default_internalPA_SPDT_C9 0xAA -+#ifdef CONFIG_PCI_HCI -+#define EEPROM_Default_internalPA_SPDT_CC 0xA0 -+#else -+#define EEPROM_Default_internalPA_SPDT_CC 0xFA -+#endif -+#define EEPROM_Default_PAType 0 -+#define EEPROM_Default_LNAType 0 -+ -+//New EFUSE deafult value -+#define EEPROM_DEFAULT_24G_INDEX 0x2D -+#define EEPROM_DEFAULT_24G_HT20_DIFF 0X02 -+#define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04 -+ -+#define EEPROM_DEFAULT_5G_INDEX 0X2A -+#define EEPROM_DEFAULT_5G_HT20_DIFF 0X00 -+#define EEPROM_DEFAULT_5G_OFDM_DIFF 0X04 -+ -+#define EEPROM_DEFAULT_DIFF 0XFE -+#define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F -+#define EEPROM_DEFAULT_BOARD_OPTION 0x00 -+#define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF -+#define EEPROM_DEFAULT_RFE_OPTION 0x04 -+#define EEPROM_DEFAULT_FEATURE_OPTION 0x00 -+#define EEPROM_DEFAULT_BT_OPTION 0x10 -+ -+ -+#define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 -+ -+// PCIe related -+#define EEPROM_PCIE_DEV_CAP_01 0xE0 // Express device capability in PCIe configuration space, i.e., map to offset 0x74 -+#define EEPROM_PCIE_DEV_CAP_02 0xE1 // Express device capability in PCIe configuration space, i.e., map to offset 0x75 -+ -+ -+// -+// For VHT series TX power by rate table. -+// VHT TX power by rate off setArray = -+// Band:-2G&5G = 0 / 1 -+// RF: at most 4*4 = ABCD=0/1/2/3 -+// CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 -+// -+#define TX_PWR_BY_RATE_NUM_BAND 2 -+#define TX_PWR_BY_RATE_NUM_RF 4 -+#define TX_PWR_BY_RATE_NUM_RATE 84 -+ -+#define TXPWR_LMT_MAX_RF 4 -+ -+//---------------------------------------------------------------------------- -+// EEPROM/EFUSE data structure definition. -+//---------------------------------------------------------------------------- -+ -+//For 88E new structure -+ -+/* -+2.4G: -+{ -+{1,2}, -+{3,4,5}, -+{6,7,8}, -+{9,10,11}, -+{12,13}, -+{14} -+} -+ -+5G: -+{ -+{36,38,40}, -+{44,46,48}, -+{52,54,56}, -+{60,62,64}, -+{100,102,104}, -+{108,110,112}, -+{116,118,120}, -+{124,126,128}, -+{132,134,136}, -+{140,142,144}, -+{149,151,153}, -+{157,159,161}, -+{173,175,177}, -+} -+*/ -+#define MAX_RF_PATH 4 -+#define RF_PATH_MAX MAX_RF_PATH -+#define MAX_CHNL_GROUP_24G 6 -+#define MAX_CHNL_GROUP_5G 14 -+ -+//It must always set to 4, otherwise read efuse table secquence will be wrong. -+#define MAX_TX_COUNT 4 -+ -+typedef struct _TxPowerInfo24G{ -+ u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; -+ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; -+ //If only one tx, only BW20 and OFDM are used. -+ s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+}TxPowerInfo24G, *PTxPowerInfo24G; -+ -+typedef struct _TxPowerInfo5G{ -+ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; -+ //If only one tx, only BW20, OFDM, BW80 and BW160 are used. -+ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+}TxPowerInfo5G, *PTxPowerInfo5G; -+ -+ -+typedef enum _BT_Ant_NUM{ -+ Ant_x2 = 0, -+ Ant_x1 = 1 -+} BT_Ant_NUM, *PBT_Ant_NUM; -+ -+typedef enum _BT_CoType{ -+ BT_2WIRE = 0, -+ BT_ISSC_3WIRE = 1, -+ BT_ACCEL = 2, -+ BT_CSR_BC4 = 3, -+ BT_CSR_BC8 = 4, -+ BT_RTL8756 = 5, -+ BT_RTL8723A = 6, -+ BT_RTL8821 = 7, -+ BT_RTL8723B = 8, -+ BT_RTL8192E = 9, -+ BT_RTL8814A = 10, -+ BT_RTL8812A = 11, -+ BT_RTL8703B = 12 -+} BT_CoType, *PBT_CoType; -+ -+typedef enum _BT_RadioShared{ -+ BT_Radio_Shared = 0, -+ BT_Radio_Individual = 1, -+} BT_RadioShared, *PBT_RadioShared; -+ -+ -+#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL_PG_H__ ++#define __HAL_PG_H__ ++ ++#define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F ++#define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0 ++ ++#define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F ++#define PPG_THERMAL_OFFSET_MASK 0x1F ++#define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) ++#define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) ++#define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 88EE/88EU/88ES ++//==================================================== ++#define EEPROM_TX_PWR_INX_88E 0x10 ++ ++#define EEPROM_ChannelPlan_88E 0xB8 ++#define EEPROM_XTAL_88E 0xB9 ++#define EEPROM_THERMAL_METER_88E 0xBA ++#define EEPROM_IQK_LCK_88E 0xBB ++ ++#define EEPROM_RF_BOARD_OPTION_88E 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_88E 0xC2 ++#define EEPROM_RF_BT_SETTING_88E 0xC3 ++#define EEPROM_VERSION_88E 0xC4 ++#define EEPROM_CustomID_88E 0xC5 ++#define EEPROM_RF_ANTENNA_OPT_88E 0xC9 ++#define EEPROM_COUNTRY_CODE_88E 0xCB ++ ++// RTL88EE ++#define EEPROM_MAC_ADDR_88EE 0xD0 ++#define EEPROM_VID_88EE 0xD6 ++#define EEPROM_DID_88EE 0xD8 ++#define EEPROM_SVID_88EE 0xDA ++#define EEPROM_SMID_88EE 0xDC ++ ++//RTL88EU ++#define EEPROM_MAC_ADDR_88EU 0xD7 ++#define EEPROM_VID_88EU 0xD0 ++#define EEPROM_PID_88EU 0xD2 ++#define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 //8188EU,8192EU, 8812AU is the same ++#define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 ++ ++// RTL88ES ++#define EEPROM_MAC_ADDR_88ES 0x11A ++//==================================================== ++// EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES ++//==================================================== ++#define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6 ++#define PPG_THERMAL_OFFSET_8192E 0x1F5 ++ ++// 0x10 ~ 0x63 = TX power area. ++#define EEPROM_TX_PWR_INX_8192E 0x10 ++ ++#define EEPROM_ChannelPlan_8192E 0xB8 ++#define EEPROM_XTAL_8192E 0xB9 ++#define EEPROM_THERMAL_METER_8192E 0xBA ++#define EEPROM_IQK_LCK_8192E 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8192E 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8192E 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 ++#define EEPROM_RF_BT_SETTING_8192E 0xC3 ++#define EEPROM_VERSION_8192E 0xC4 ++#define EEPROM_CustomID_8192E 0xC5 ++#define EEPROM_TX_BBSWING_2G_8192E 0xC6 ++#define EEPROM_TX_BBSWING_5G_8192E 0xC7 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 ++#define EEPROM_RFE_OPTION_8192E 0xCA ++#define EEPROM_COUNTRY_CODE_8192E 0xCB ++ ++// RTL8192EE ++#define EEPROM_MAC_ADDR_8192EE 0xD0 ++#define EEPROM_VID_8192EE 0xD6 ++#define EEPROM_DID_8192EE 0xD8 ++#define EEPROM_SVID_8192EE 0xDA ++#define EEPROM_SMID_8192EE 0xDC ++ ++//RTL8192EU ++#define EEPROM_MAC_ADDR_8192EU 0xD7 ++#define EEPROM_VID_8192EU 0xD0 ++#define EEPROM_PID_8192EU 0xD2 ++#define EEPROM_PA_TYPE_8192EU 0xBC ++#define EEPROM_LNA_TYPE_2G_8192EU 0xBD ++#define EEPROM_LNA_TYPE_5G_8192EU 0xBF ++ ++// RTL8192ES ++#define EEPROM_MAC_ADDR_8192ES 0x11A ++//==================================================== ++// EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS ++//==================================================== ++// 0x10 ~ 0x63 = TX power area. ++#define EEPROM_USB_MODE_8812 0x08 ++#define EEPROM_TX_PWR_INX_8812 0x10 ++ ++#define EEPROM_ChannelPlan_8812 0xB8 ++#define EEPROM_XTAL_8812 0xB9 ++#define EEPROM_THERMAL_METER_8812 0xBA ++#define EEPROM_IQK_LCK_8812 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8812 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8812 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_8812 0xC2 ++#define EEPROM_RF_BT_SETTING_8812 0xC3 ++#define EEPROM_VERSION_8812 0xC4 ++#define EEPROM_CustomID_8812 0xC5 ++#define EEPROM_TX_BBSWING_2G_8812 0xC6 ++#define EEPROM_TX_BBSWING_5G_8812 0xC7 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8812 0xC9 ++#define EEPROM_RFE_OPTION_8812 0xCA ++#define EEPROM_COUNTRY_CODE_8812 0xCB ++ ++// RTL8812AE ++#define EEPROM_MAC_ADDR_8812AE 0xD0 ++#define EEPROM_VID_8812AE 0xD6 ++#define EEPROM_DID_8812AE 0xD8 ++#define EEPROM_SVID_8812AE 0xDA ++#define EEPROM_SMID_8812AE 0xDC ++ ++//RTL8812AU ++#define EEPROM_MAC_ADDR_8812AU 0xD7 ++#define EEPROM_VID_8812AU 0xD0 ++#define EEPROM_PID_8812AU 0xD2 ++#define EEPROM_PA_TYPE_8812AU 0xBC ++#define EEPROM_LNA_TYPE_2G_8812AU 0xBD ++#define EEPROM_LNA_TYPE_5G_8812AU 0xBF ++ ++//RTL8814AU ++#define EEPROM_MAC_ADDR_8814AU 0xD8 ++#define EEPROM_VID_8814AU 0xD0 ++#define EEPROM_PID_8814AU 0xD2 ++#define EEPROM_PA_TYPE_8814AU 0xBC ++#define EEPROM_LNA_TYPE_2G_8814AU 0xBD ++#define EEPROM_LNA_TYPE_5G_8814AU 0xBF ++ ++/* RTL8814AE */ ++#define EEPROM_MAC_ADDR_8814AE 0xD0 ++#define EEPROM_VID_8814AE 0xD6 ++#define EEPROM_DID_8814AE 0xD8 ++#define EEPROM_SVID_8814AE 0xDA ++#define EEPROM_SMID_8814AE 0xDC ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8814AU ++//==================================================== ++#define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++#define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2) ++ ++#define KFREE_GAIN_DATA_LENGTH_8814A 22 ++ ++#define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE ++ ++#define PPG_THERMAL_OFFSET_8814A 0x3EF ++ ++#define EEPROM_TX_PWR_INX_8814 0x10 ++#define EEPROM_ChannelPlan_8814 0xB8 ++#define EEPROM_XTAL_8814 0xB9 ++#define EEPROM_THERMAL_METER_8814 0xBA ++#define EEPROM_IQK_LCK_8814 0xBB ++ ++ ++#define EEPROM_PA_TYPE_8814 0xBC ++#define EEPROM_LNA_TYPE_AB_2G_8814 0xBD ++#define EEPROM_LNA_TYPE_CD_2G_8814 0xBE ++#define EEPROM_LNA_TYPE_AB_5G_8814 0xBF ++#define EEPROM_LNA_TYPE_CD_5G_8814 0xC0 ++#define EEPROM_RF_BOARD_OPTION_8814 0xC1 ++#define EEPROM_RF_BT_SETTING_8814 0xC3 ++#define EEPROM_VERSION_8814 0xC4 ++#define EEPROM_CustomID_8814 0xC5 ++#define EEPROM_TX_BBSWING_2G_8814 0xC6 ++#define EEPROM_TX_BBSWING_5G_8814 0xC7 ++#define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9 ++#define EEPROM_RFE_OPTION_8814 0xCA ++#define EEPROM_COUNTRY_CODE_8814 0xCB ++ ++/*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/ ++#define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120 ++#define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121 ++#define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122 ++#define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123 ++#define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124 ++#define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125 ++#define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126 ++#define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127 ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS ++//==================================================== ++ ++#define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6 ++#define PPG_THERMAL_OFFSET_8821A 0x1F5 ++#define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4 ++#define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3 ++#define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2 ++#define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1 ++#define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0 ++ ++#define EEPROM_TX_PWR_INX_8821 0x10 ++ ++#define EEPROM_ChannelPlan_8821 0xB8 ++#define EEPROM_XTAL_8821 0xB9 ++#define EEPROM_THERMAL_METER_8821 0xBA ++#define EEPROM_IQK_LCK_8821 0xBB ++ ++ ++#define EEPROM_RF_BOARD_OPTION_8821 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_8821 0xC2 ++#define EEPROM_RF_BT_SETTING_8821 0xC3 ++#define EEPROM_VERSION_8821 0xC4 ++#define EEPROM_CustomID_8821 0xC5 ++#define EEPROM_RF_ANTENNA_OPT_8821 0xC9 ++ ++// RTL8821AE ++#define EEPROM_MAC_ADDR_8821AE 0xD0 ++#define EEPROM_VID_8821AE 0xD6 ++#define EEPROM_DID_8821AE 0xD8 ++#define EEPROM_SVID_8821AE 0xDA ++#define EEPROM_SMID_8821AE 0xDC ++ ++//RTL8821AU ++#define EEPROM_PA_TYPE_8821AU 0xBC ++#define EEPROM_LNA_TYPE_8821AU 0xBF ++ ++// RTL8821AS ++#define EEPROM_MAC_ADDR_8821AS 0x11A ++ ++//RTL8821AU ++#define EEPROM_MAC_ADDR_8821AU 0x107 ++#define EEPROM_VID_8821AU 0x100 ++#define EEPROM_PID_8821AU 0x102 ++ ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8192 SE/SU ++//==================================================== ++#define EEPROM_VID_92SE 0x0A ++#define EEPROM_DID_92SE 0x0C ++#define EEPROM_SVID_92SE 0x0E ++#define EEPROM_SMID_92SE 0x10 ++ ++#define EEPROM_MAC_ADDR_92S 0x12 ++ ++#define EEPROM_TSSI_A_92SE 0x74 ++#define EEPROM_TSSI_B_92SE 0x75 ++ ++#define EEPROM_Version_92SE 0x7C ++ ++ ++#define EEPROM_VID_92SU 0x08 ++#define EEPROM_PID_92SU 0x0A ++ ++#define EEPROM_Version_92SU 0x50 ++#define EEPROM_TSSI_A_92SU 0x6b ++#define EEPROM_TSSI_B_92SU 0x6c ++ ++/* ==================================================== ++ EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS ++ ==================================================== ++ */ ++ ++#define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE ++#define PPG_THERMAL_OFFSET_8188F 0xEF ++ ++/* 0x10 ~ 0x63 = TX power area. */ ++#define EEPROM_TX_PWR_INX_8188F 0x10 ++ ++#define EEPROM_ChannelPlan_8188F 0xB8 ++#define EEPROM_XTAL_8188F 0xB9 ++#define EEPROM_THERMAL_METER_8188F 0xBA ++#define EEPROM_IQK_LCK_8188F 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8188F 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8188F 0xC1 ++#define EEPROM_FEATURE_OPTION_8188F 0xC2 ++#define EEPROM_RF_BT_SETTING_8188F 0xC3 ++#define EEPROM_VERSION_8188F 0xC4 ++#define EEPROM_CustomID_8188F 0xC5 ++#define EEPROM_TX_BBSWING_2G_8188F 0xC6 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8188F 0xC9 ++#define EEPROM_RFE_OPTION_8188F 0xCA ++#define EEPROM_COUNTRY_CODE_8188F 0xCB ++#define EEPROM_CUSTOMER_ID_8188F 0x7F ++#define EEPROM_SUBCUSTOMER_ID_8188F 0x59 ++ ++/* RTL8188FU */ ++#define EEPROM_MAC_ADDR_8188FU 0xD7 ++#define EEPROM_VID_8188FU 0xD0 ++#define EEPROM_PID_8188FU 0xD2 ++#define EEPROM_PA_TYPE_8188FU 0xBC ++#define EEPROM_LNA_TYPE_2G_8188FU 0xBD ++#define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4 ++ ++/* RTL8188FS */ ++#define EEPROM_MAC_ADDR_8188FS 0x11A ++#define EEPROM_Voltage_ADDR_8188F 0x8 ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS ++//==================================================== ++// 0x10 ~ 0x63 = TX power area. ++#define EEPROM_TX_PWR_INX_8723B 0x10 ++ ++#define EEPROM_ChannelPlan_8723B 0xB8 ++#define EEPROM_XTAL_8723B 0xB9 ++#define EEPROM_THERMAL_METER_8723B 0xBA ++#define EEPROM_IQK_LCK_8723B 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8723B 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8723B 0xC1 ++#define EEPROM_FEATURE_OPTION_8723B 0xC2 ++#define EEPROM_RF_BT_SETTING_8723B 0xC3 ++#define EEPROM_VERSION_8723B 0xC4 ++#define EEPROM_CustomID_8723B 0xC5 ++#define EEPROM_TX_BBSWING_2G_8723B 0xC6 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 ++#define EEPROM_RFE_OPTION_8723B 0xCA ++#define EEPROM_COUNTRY_CODE_8723B 0xCB ++ ++// RTL8723BE ++#define EEPROM_MAC_ADDR_8723BE 0xD0 ++#define EEPROM_VID_8723BE 0xD6 ++#define EEPROM_DID_8723BE 0xD8 ++#define EEPROM_SVID_8723BE 0xDA ++#define EEPROM_SMID_8723BE 0xDC ++ ++//RTL8723BU ++#define EEPROM_MAC_ADDR_8723BU 0x107 ++#define EEPROM_VID_8723BU 0x100 ++#define EEPROM_PID_8723BU 0x102 ++#define EEPROM_PA_TYPE_8723BU 0xBC ++#define EEPROM_LNA_TYPE_2G_8723BU 0xBD ++ ++ ++//RTL8723BS ++#define EEPROM_MAC_ADDR_8723BS 0x11A ++#define EEPROM_Voltage_ADDR_8723B 0x8 ++ ++//==================================================== ++/* EEPROM/Efuse PG Offset for 8703B */ ++//==================================================== ++#define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE ++#define PPG_THERMAL_OFFSET_8703B 0xEF ++ ++#define EEPROM_TX_PWR_INX_8703B 0x10 ++ ++#define EEPROM_ChannelPlan_8703B 0xB8 ++#define EEPROM_XTAL_8703B 0xB9 ++#define EEPROM_THERMAL_METER_8703B 0xBA ++#define EEPROM_IQK_LCK_8703B 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8703B 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8703B 0xC1 ++#define EEPROM_FEATURE_OPTION_8703B 0xC2 ++#define EEPROM_RF_BT_SETTING_8703B 0xC3 ++#define EEPROM_VERSION_8703B 0xC4 ++#define EEPROM_CustomID_8703B 0xC5 ++#define EEPROM_TX_BBSWING_2G_8703B 0xC6 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8703B 0xC9 ++#define EEPROM_RFE_OPTION_8703B 0xCA ++#define EEPROM_COUNTRY_CODE_8703B 0xCB ++ ++/* MAC Hidden */ ++#define PPG_MAC_HIDDEN_START_8703B 0xF0 ++#define PPG_MAC_HIDDEN_END_8703B 0xFF ++#define EEPROM_HCI_AND_PACKAGE_TYPE_8703B 0xF8 ++#define EEPROM_WL_FUNC_CAP_8703B 0xF9 ++#define EEPROM_BW_AND_ANT_NUM_CAP_8703B 0xFB ++#define GET_PMH_HCI_TYPE_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 4) ++#define GET_PMH_PACKAGE_TYPE_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8703B - PPG_MAC_HIDDEN_START_8703B, 4, 4) ++#define GET_PMH_WL_FUNC_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_WL_FUNC_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 4) ++#define GET_PMH_BW_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 3) ++#define GET_PMH_ANT_NUM_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 5, 3) ++ ++/* RTL8703BU */ ++#define EEPROM_MAC_ADDR_8703BU 0x107 ++#define EEPROM_VID_8703BU 0x100 ++#define EEPROM_PID_8703BU 0x102 ++#define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104 ++#define EEPROM_PA_TYPE_8703BU 0xBC ++#define EEPROM_LNA_TYPE_2G_8703BU 0xBD ++ ++//RTL8703BS ++#define EEPROM_MAC_ADDR_8703BS 0x11A ++#define EEPROM_Voltage_ADDR_8703B 0x8 ++ ++//==================================================== ++// EEPROM/Efuse Value Type ++//==================================================== ++#define EETYPE_TX_PWR 0x0 ++//==================================================== ++// EEPROM/Efuse Default Value ++//==================================================== ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_DEFAULT_EXT 0xFF // Reserved for Realtek ++#define EEPROM_CID_TOSHIBA 0x4 ++#define EEPROM_CID_CCX 0x10 ++#define EEPROM_CID_QMI 0x0D ++#define EEPROM_CID_WHQL 0xFE ++ ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB ++#define EEPROM_CHANNEL_PLAN_CHIAN 0XC ++#define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD ++#define EEPROM_CHANNEL_PLAN_KOREA 0xE ++#define EEPROM_CHANNEL_PLAN_TURKEY 0xF ++#define EEPROM_CHANNEL_PLAN_JAPAN 0x10 ++#define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 ++#define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 ++#define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 ++ ++#define EEPROM_USB_OPTIONAL1 0xE ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++#define RTL_EEPROM_ID 0x8129 ++#define EEPROM_Default_TSSI 0x0 ++#define EEPROM_Default_BoardType 0x02 ++#define EEPROM_Default_ThermalMeter 0x12 ++#define EEPROM_Default_ThermalMeter_92SU 0x7 ++#define EEPROM_Default_ThermalMeter_88E 0x18 ++#define EEPROM_Default_ThermalMeter_8812 0x18 ++#define EEPROM_Default_ThermalMeter_8192E 0x1A ++#define EEPROM_Default_ThermalMeter_8723B 0x18 ++#define EEPROM_Default_ThermalMeter_8703B 0x18 ++#define EEPROM_Default_ThermalMeter_8188F 0x18 ++#define EEPROM_Default_ThermalMeter_8814A 0x18 ++ ++ ++#define EEPROM_Default_CrystalCap 0x0 ++#define EEPROM_Default_CrystalCap_8723A 0x20 ++#define EEPROM_Default_CrystalCap_88E 0x20 ++#define EEPROM_Default_CrystalCap_8812 0x20 ++#define EEPROM_Default_CrystalCap_8814 0x20 ++#define EEPROM_Default_CrystalCap_8192E 0x20 ++#define EEPROM_Default_CrystalCap_8723B 0x20 ++#define EEPROM_Default_CrystalCap_8703B 0x20 ++#define EEPROM_Default_CrystalCap_8188F 0x20 ++#define EEPROM_Default_CrystalFreq 0x0 ++#define EEPROM_Default_TxPowerLevel_92C 0x22 ++#define EEPROM_Default_TxPowerLevel_2G 0x2C ++#define EEPROM_Default_TxPowerLevel_5G 0x22 ++#define EEPROM_Default_TxPowerLevel 0x22 ++#define EEPROM_Default_HT40_2SDiff 0x0 ++#define EEPROM_Default_HT20_Diff 2 ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 ++#define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 ++#define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 ++#define EEPROM_Default_HT40_PwrMaxOffset 0 ++#define EEPROM_Default_HT20_PwrMaxOffset 0 ++ ++#define EEPROM_Default_PID 0x1234 ++#define EEPROM_Default_VID 0x5678 ++#define EEPROM_Default_CustomerID 0xAB ++#define EEPROM_Default_CustomerID_8188E 0x00 ++#define EEPROM_Default_SubCustomerID 0xCD ++#define EEPROM_Default_Version 0 ++ ++#define EEPROM_Default_externalPA_C9 0x00 ++#define EEPROM_Default_externalPA_CC 0xFF ++#define EEPROM_Default_internalPA_SP3T_C9 0xAA ++#define EEPROM_Default_internalPA_SP3T_CC 0xAF ++#define EEPROM_Default_internalPA_SPDT_C9 0xAA ++#ifdef CONFIG_PCI_HCI ++#define EEPROM_Default_internalPA_SPDT_CC 0xA0 ++#else ++#define EEPROM_Default_internalPA_SPDT_CC 0xFA ++#endif ++#define EEPROM_Default_PAType 0 ++#define EEPROM_Default_LNAType 0 ++ ++//New EFUSE deafult value ++#define EEPROM_DEFAULT_24G_INDEX 0x2D ++#define EEPROM_DEFAULT_24G_HT20_DIFF 0X02 ++#define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04 ++ ++#define EEPROM_DEFAULT_5G_INDEX 0X2A ++#define EEPROM_DEFAULT_5G_HT20_DIFF 0X00 ++#define EEPROM_DEFAULT_5G_OFDM_DIFF 0X04 ++ ++#define EEPROM_DEFAULT_DIFF 0XFE ++#define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F ++#define EEPROM_DEFAULT_BOARD_OPTION 0x00 ++#define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF ++#define EEPROM_DEFAULT_RFE_OPTION 0x04 ++#define EEPROM_DEFAULT_FEATURE_OPTION 0x00 ++#define EEPROM_DEFAULT_BT_OPTION 0x10 ++ ++ ++#define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 ++ ++// PCIe related ++#define EEPROM_PCIE_DEV_CAP_01 0xE0 // Express device capability in PCIe configuration space, i.e., map to offset 0x74 ++#define EEPROM_PCIE_DEV_CAP_02 0xE1 // Express device capability in PCIe configuration space, i.e., map to offset 0x75 ++ ++ ++// ++// For VHT series TX power by rate table. ++// VHT TX power by rate off setArray = ++// Band:-2G&5G = 0 / 1 ++// RF: at most 4*4 = ABCD=0/1/2/3 ++// CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 ++// ++#define TX_PWR_BY_RATE_NUM_BAND 2 ++#define TX_PWR_BY_RATE_NUM_RF 4 ++#define TX_PWR_BY_RATE_NUM_RATE 84 ++ ++#define TXPWR_LMT_MAX_RF 4 ++ ++//---------------------------------------------------------------------------- ++// EEPROM/EFUSE data structure definition. ++//---------------------------------------------------------------------------- ++ ++//For 88E new structure ++ ++/* ++2.4G: ++{ ++{1,2}, ++{3,4,5}, ++{6,7,8}, ++{9,10,11}, ++{12,13}, ++{14} ++} ++ ++5G: ++{ ++{36,38,40}, ++{44,46,48}, ++{52,54,56}, ++{60,62,64}, ++{100,102,104}, ++{108,110,112}, ++{116,118,120}, ++{124,126,128}, ++{132,134,136}, ++{140,142,144}, ++{149,151,153}, ++{157,159,161}, ++{173,175,177}, ++} ++*/ ++#define MAX_RF_PATH 4 ++#define RF_PATH_MAX MAX_RF_PATH ++#define MAX_CHNL_GROUP_24G 6 ++#define MAX_CHNL_GROUP_5G 14 ++ ++//It must always set to 4, otherwise read efuse table secquence will be wrong. ++#define MAX_TX_COUNT 4 ++ ++typedef struct _TxPowerInfo24G{ ++ u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; ++ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; ++ //If only one tx, only BW20 and OFDM are used. ++ s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++}TxPowerInfo24G, *PTxPowerInfo24G; ++ ++typedef struct _TxPowerInfo5G{ ++ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; ++ //If only one tx, only BW20, OFDM, BW80 and BW160 are used. ++ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++}TxPowerInfo5G, *PTxPowerInfo5G; ++ ++ ++typedef enum _BT_Ant_NUM{ ++ Ant_x2 = 0, ++ Ant_x1 = 1 ++} BT_Ant_NUM, *PBT_Ant_NUM; ++ ++typedef enum _BT_CoType{ ++ BT_2WIRE = 0, ++ BT_ISSC_3WIRE = 1, ++ BT_ACCEL = 2, ++ BT_CSR_BC4 = 3, ++ BT_CSR_BC8 = 4, ++ BT_RTL8756 = 5, ++ BT_RTL8723A = 6, ++ BT_RTL8821 = 7, ++ BT_RTL8723B = 8, ++ BT_RTL8192E = 9, ++ BT_RTL8814A = 10, ++ BT_RTL8812A = 11, ++ BT_RTL8703B = 12 ++} BT_CoType, *PBT_CoType; ++ ++typedef enum _BT_RadioShared{ ++ BT_Radio_Shared = 0, ++ BT_Radio_Individual = 1, ++} BT_RadioShared, *PBT_RadioShared; ++ ++ ++#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_phy.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_phy.h new file mode 100644 -index 000000000..56b50c800 +index 0000000..56b50c8 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_phy.h @@ -0,0 +1,247 @@ @@ -280811,7 +322244,7 @@ index 000000000..56b50c800 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_phy_reg.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_phy_reg.h new file mode 100644 -index 000000000..723eddb64 +index 0000000..723eddb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_phy_reg.h @@ -0,0 +1,31 @@ @@ -280848,7 +322281,7 @@ index 000000000..723eddb64 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/hal_sdio.h b/drivers/net/wireless/realtek/rtl8189fs/include/hal_sdio.h new file mode 100644 -index 000000000..ccb49e780 +index 0000000..ccb49e7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/hal_sdio.h @@ -0,0 +1,32 @@ @@ -280886,7 +322319,7 @@ index 000000000..ccb49e780 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/ieee80211.h b/drivers/net/wireless/realtek/rtl8189fs/include/ieee80211.h new file mode 100644 -index 000000000..2c3e15ef3 +index 0000000..6af921d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/ieee80211.h @@ -0,0 +1,1828 @@ @@ -282702,7 +324135,7 @@ index 000000000..2c3e15ef3 +void rtw_get_bcn_info(struct wlan_network *pnetwork); + +u8 rtw_check_invalid_mac_address(u8 *mac_addr, u8 check_local_bit); -+void rtw_macaddr_cfg(u8 *out, const u8 *hw_mac_addr); ++void rtw_macaddr_cfg(struct device *dev, u8 *out, const u8 *hw_mac_addr); + +u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char * MCS_rate); +u8 rtw_ht_mcsset_to_nss(u8 *supp_mcs_set); @@ -282720,7 +324153,7 @@ index 000000000..2c3e15ef3 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/ieee80211_ext.h b/drivers/net/wireless/realtek/rtl8189fs/include/ieee80211_ext.h new file mode 100644 -index 000000000..3e55305e1 +index 0000000..14f1b23 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/ieee80211_ext.h @@ -0,0 +1,477 @@ @@ -282742,468 +324175,468 @@ index 000000000..3e55305e1 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * -+ ******************************************************************************/ -+#ifndef __IEEE80211_EXT_H -+#define __IEEE80211_EXT_H -+ -+#include -+#include -+#include -+ -+#define WMM_OUI_TYPE 2 -+#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 -+#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 -+#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 -+#define WMM_VERSION 1 -+ -+#define WPA_PROTO_WPA BIT(0) -+#define WPA_PROTO_RSN BIT(1) -+ -+#define WPA_KEY_MGMT_IEEE8021X BIT(0) -+#define WPA_KEY_MGMT_PSK BIT(1) -+#define WPA_KEY_MGMT_NONE BIT(2) -+#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) -+#define WPA_KEY_MGMT_WPA_NONE BIT(4) -+ -+ -+#define WPA_CAPABILITY_PREAUTH BIT(0) -+#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) -+#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) -+ -+ -+#define PMKID_LEN 16 -+ -+ -+#ifdef PLATFORM_LINUX -+struct wpa_ie_hdr { -+ u8 elem_id; -+ u8 len; -+ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ -+ u8 version[2]; /* little endian */ -+}__attribute__ ((packed)); -+ -+struct rsn_ie_hdr { -+ u8 elem_id; /* WLAN_EID_RSN */ -+ u8 len; -+ u8 version[2]; /* little endian */ -+}__attribute__ ((packed)); -+ -+struct wme_ac_parameter { -+#if defined(CONFIG_LITTLE_ENDIAN) -+ /* byte 1 */ -+ u8 aifsn:4, -+ acm:1, -+ aci:2, -+ reserved:1; -+ -+ /* byte 2 */ -+ u8 eCWmin:4, -+ eCWmax:4; -+#elif defined(CONFIG_BIG_ENDIAN) -+ /* byte 1 */ -+ u8 reserved:1, -+ aci:2, -+ acm:1, -+ aifsn:4; -+ -+ /* byte 2 */ -+ u8 eCWmax:4, -+ eCWmin:4; -+#else -+#error "Please fix " -+#endif -+ -+ /* bytes 3 & 4 */ -+ u16 txopLimit; -+} __attribute__ ((packed)); -+ -+struct wme_parameter_element { -+ /* required fields for WME version 1 */ -+ u8 oui[3]; -+ u8 oui_type; -+ u8 oui_subtype; -+ u8 version; -+ u8 acInfo; -+ u8 reserved; -+ struct wme_ac_parameter ac[4]; -+ -+} __attribute__ ((packed)); -+ -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+ -+struct wpa_ie_hdr { -+ u8 elem_id; -+ u8 len; -+ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ -+ u8 version[2]; /* little endian */ -+}; -+ -+struct rsn_ie_hdr { -+ u8 elem_id; /* WLAN_EID_RSN */ -+ u8 len; -+ u8 version[2]; /* little endian */ -+}; -+ -+#pragma pack() -+ -+#endif -+ -+#define WPA_PUT_LE16(a, val) \ -+ do { \ -+ (a)[1] = ((u16) (val)) >> 8; \ -+ (a)[0] = ((u16) (val)) & 0xff; \ -+ } while (0) -+ -+#define WPA_PUT_BE32(a, val) \ -+ do { \ -+ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ -+ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ -+ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ -+ (a)[3] = (u8) (((u32) (val)) & 0xff); \ -+ } while (0) -+ -+#define WPA_PUT_LE32(a, val) \ -+ do { \ -+ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ -+ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ -+ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ -+ (a)[0] = (u8) (((u32) (val)) & 0xff); \ -+ } while (0) -+ -+#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) -+//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) -+ -+ -+ -+/* Action category code */ -+enum ieee80211_category { -+ WLAN_CATEGORY_SPECTRUM_MGMT = 0, -+ WLAN_CATEGORY_QOS = 1, -+ WLAN_CATEGORY_DLS = 2, -+ WLAN_CATEGORY_BACK = 3, -+ WLAN_CATEGORY_HT = 7, -+ WLAN_CATEGORY_WMM = 17, -+}; -+ -+/* SPECTRUM_MGMT action code */ -+enum ieee80211_spectrum_mgmt_actioncode { -+ WLAN_ACTION_SPCT_MSR_REQ = 0, -+ WLAN_ACTION_SPCT_MSR_RPRT = 1, -+ WLAN_ACTION_SPCT_TPC_REQ = 2, -+ WLAN_ACTION_SPCT_TPC_RPRT = 3, -+ WLAN_ACTION_SPCT_CHL_SWITCH = 4, -+ WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, -+}; -+ -+/* BACK action code */ -+enum ieee80211_back_actioncode { -+ WLAN_ACTION_ADDBA_REQ = 0, -+ WLAN_ACTION_ADDBA_RESP = 1, -+ WLAN_ACTION_DELBA = 2, -+}; -+ -+/* HT features action code */ -+enum ieee80211_ht_actioncode { -+ WLAN_ACTION_NOTIFY_CH_WIDTH = 0, -+ WLAN_ACTION_SM_PS = 1, -+ WLAN_ACTION_PSPM = 2, -+ WLAN_ACTION_PCO_PHASE = 3, -+ WLAN_ACTION_MIMO_CSI_MX = 4, -+ WLAN_ACTION_MIMO_NONCP_BF = 5, -+ WLAN_ACTION_MIMP_CP_BF = 6, -+ WLAN_ACTION_ASEL_INDICATES_FB = 7, -+ WLAN_ACTION_HI_INFO_EXCHG = 8, -+}; -+ -+/* BACK (block-ack) parties */ -+enum ieee80211_back_parties { -+ WLAN_BACK_RECIPIENT = 0, -+ WLAN_BACK_INITIATOR = 1, -+ WLAN_BACK_TIMER = 2, -+}; -+ -+#ifdef PLATFORM_LINUX -+ -+struct ieee80211_mgmt { -+ u16 frame_control; -+ u16 duration; -+ u8 da[6]; -+ u8 sa[6]; -+ u8 bssid[6]; -+ u16 seq_ctrl; -+ union { -+ struct { -+ u16 auth_alg; -+ u16 auth_transaction; -+ u16 status_code; -+ /* possibly followed by Challenge text */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) auth; -+ struct { -+ u16 reason_code; -+ } __attribute__ ((packed)) deauth; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) assoc_req; -+ struct { -+ u16 capab_info; -+ u16 status_code; -+ u16 aid; -+ /* followed by Supported rates */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) assoc_resp, reassoc_resp; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ u8 current_ap[6]; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) reassoc_req; -+ struct { -+ u16 reason_code; -+ } __attribute__ ((packed)) disassoc; -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params, TIM */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) beacon; -+ struct { -+ /* only variable items: SSID, Supported rates */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) probe_req; -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) probe_resp; -+ struct { -+ u8 category; -+ union { -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u8 status_code; -+ u8 variable[0]; -+ } __attribute__ ((packed)) wme_action; -+#if 0 -+ struct{ -+ u8 action_code; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_channel_sw_ie sw_elem; -+ } __attribute__ ((packed)) chan_switch; -+ struct{ -+ u8 action_code; -+ u8 dialog_token; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_msrment_ie msr_elem; -+ } __attribute__ ((packed)) measurement; -+#endif -+ struct{ -+ u8 action_code; -+ u8 dialog_token; -+ u16 capab; -+ u16 timeout; -+ u16 start_seq_num; -+ } __attribute__ ((packed)) addba_req; -+ struct{ -+ u8 action_code; -+ u8 dialog_token; -+ u16 status; -+ u16 capab; -+ u16 timeout; -+ } __attribute__ ((packed)) addba_resp; -+ struct{ -+ u8 action_code; -+ u16 params; -+ u16 reason_code; -+ } __attribute__ ((packed)) delba; -+ struct{ -+ u8 action_code; -+ /* capab_info for open and confirm, -+ * reason for close -+ */ -+ u16 aux; -+ /* Followed in plink_confirm by status -+ * code, AID and supported rates, -+ * and directly by supported rates in -+ * plink_open and plink_close -+ */ -+ u8 variable[0]; -+ } __attribute__ ((packed)) plink_action; -+ struct{ -+ u8 action_code; -+ u8 variable[0]; -+ } __attribute__ ((packed)) mesh_action; -+ } __attribute__ ((packed)) u; -+ } __attribute__ ((packed)) action; -+ } __attribute__ ((packed)) u; -+}__attribute__ ((packed)); -+ -+#endif -+ -+ -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+ -+struct ieee80211_mgmt { -+ u16 frame_control; -+ u16 duration; -+ u8 da[6]; -+ u8 sa[6]; -+ u8 bssid[6]; -+ u16 seq_ctrl; -+ union { -+ struct { -+ u16 auth_alg; -+ u16 auth_transaction; -+ u16 status_code; -+ /* possibly followed by Challenge text */ -+ u8 variable[0]; -+ } auth; -+ struct { -+ u16 reason_code; -+ } deauth; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } assoc_req; -+ struct { -+ u16 capab_info; -+ u16 status_code; -+ u16 aid; -+ /* followed by Supported rates */ -+ u8 variable[0]; -+ } assoc_resp, reassoc_resp; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ u8 current_ap[6]; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } reassoc_req; -+ struct { -+ u16 reason_code; -+ } disassoc; -+#if 0 -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params, TIM */ -+ u8 variable[0]; -+ } beacon; -+ struct { -+ /* only variable items: SSID, Supported rates */ -+ u8 variable[0]; -+ } probe_req; -+ -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params */ -+ u8 variable[0]; -+ } probe_resp; -+#endif -+ struct { -+ u8 category; -+ union { -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u8 status_code; -+ u8 variable[0]; -+ } wme_action; -+/* -+ struct{ -+ u8 action_code; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_channel_sw_ie sw_elem; -+ } chan_switch; -+ struct{ -+ u8 action_code; -+ u8 dialog_token; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_msrment_ie msr_elem; -+ } measurement; -+*/ -+ struct{ -+ u8 action_code; -+ u8 dialog_token; -+ u16 capab; -+ u16 timeout; -+ u16 start_seq_num; -+ } addba_req; -+ struct{ -+ u8 action_code; -+ u8 dialog_token; -+ u16 status; -+ u16 capab; -+ u16 timeout; -+ } addba_resp; -+ struct{ -+ u8 action_code; -+ u16 params; -+ u16 reason_code; -+ } delba; -+ struct{ -+ u8 action_code; -+ /* capab_info for open and confirm, -+ * reason for close -+ */ -+ u16 aux; -+ /* Followed in plink_confirm by status -+ * code, AID and supported rates, -+ * and directly by supported rates in -+ * plink_open and plink_close -+ */ -+ u8 variable[0]; -+ } plink_action; -+ struct{ -+ u8 action_code; -+ u8 variable[0]; -+ } mesh_action; -+ } u; -+ } action; -+ } u; -+} ; -+ -+#pragma pack() -+ -+#endif -+ -+/* mgmt header + 1 byte category code */ -+#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) -+ -+ -+ -+#endif -+ ++ ******************************************************************************/ ++#ifndef __IEEE80211_EXT_H ++#define __IEEE80211_EXT_H ++ ++#include ++#include ++#include ++ ++#define WMM_OUI_TYPE 2 ++#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 ++#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 ++#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 ++#define WMM_VERSION 1 ++ ++#define WPA_PROTO_WPA BIT(0) ++#define WPA_PROTO_RSN BIT(1) ++ ++#define WPA_KEY_MGMT_IEEE8021X BIT(0) ++#define WPA_KEY_MGMT_PSK BIT(1) ++#define WPA_KEY_MGMT_NONE BIT(2) ++#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) ++#define WPA_KEY_MGMT_WPA_NONE BIT(4) ++ ++ ++#define WPA_CAPABILITY_PREAUTH BIT(0) ++#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) ++#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) ++ ++ ++#define PMKID_LEN 16 ++ ++ ++#ifdef PLATFORM_LINUX ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct wme_ac_parameter { ++#if defined(CONFIG_LITTLE_ENDIAN) ++ /* byte 1 */ ++ u8 aifsn:4, ++ acm:1, ++ aci:2, ++ reserved:1; ++ ++ /* byte 2 */ ++ u8 eCWmin:4, ++ eCWmax:4; ++#elif defined(CONFIG_BIG_ENDIAN) ++ /* byte 1 */ ++ u8 reserved:1, ++ aci:2, ++ acm:1, ++ aifsn:4; ++ ++ /* byte 2 */ ++ u8 eCWmax:4, ++ eCWmin:4; ++#else ++#error "Please fix " ++#endif ++ ++ /* bytes 3 & 4 */ ++ u16 txopLimit; ++} __attribute__ ((packed)); ++ ++struct wme_parameter_element { ++ /* required fields for WME version 1 */ ++ u8 oui[3]; ++ u8 oui_type; ++ u8 oui_subtype; ++ u8 version; ++ u8 acInfo; ++ u8 reserved; ++ struct wme_ac_parameter ac[4]; ++ ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}; ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}; ++ ++#pragma pack() ++ ++#endif ++ ++#define WPA_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define WPA_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define WPA_PUT_LE32(a, val) \ ++ do { \ ++ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[0] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) ++//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) ++ ++ ++ ++/* Action category code */ ++enum ieee80211_category { ++ WLAN_CATEGORY_SPECTRUM_MGMT = 0, ++ WLAN_CATEGORY_QOS = 1, ++ WLAN_CATEGORY_DLS = 2, ++ WLAN_CATEGORY_BACK = 3, ++ WLAN_CATEGORY_HT = 7, ++ WLAN_CATEGORY_WMM = 17, ++}; ++ ++/* SPECTRUM_MGMT action code */ ++enum ieee80211_spectrum_mgmt_actioncode { ++ WLAN_ACTION_SPCT_MSR_REQ = 0, ++ WLAN_ACTION_SPCT_MSR_RPRT = 1, ++ WLAN_ACTION_SPCT_TPC_REQ = 2, ++ WLAN_ACTION_SPCT_TPC_RPRT = 3, ++ WLAN_ACTION_SPCT_CHL_SWITCH = 4, ++ WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, ++}; ++ ++/* BACK action code */ ++enum ieee80211_back_actioncode { ++ WLAN_ACTION_ADDBA_REQ = 0, ++ WLAN_ACTION_ADDBA_RESP = 1, ++ WLAN_ACTION_DELBA = 2, ++}; ++ ++/* HT features action code */ ++enum ieee80211_ht_actioncode { ++ WLAN_ACTION_NOTIFY_CH_WIDTH = 0, ++ WLAN_ACTION_SM_PS = 1, ++ WLAN_ACTION_PSPM = 2, ++ WLAN_ACTION_PCO_PHASE = 3, ++ WLAN_ACTION_MIMO_CSI_MX = 4, ++ WLAN_ACTION_MIMO_NONCP_BF = 5, ++ WLAN_ACTION_MIMP_CP_BF = 6, ++ WLAN_ACTION_ASEL_INDICATES_FB = 7, ++ WLAN_ACTION_HI_INFO_EXCHG = 8, ++}; ++ ++/* BACK (block-ack) parties */ ++enum ieee80211_back_parties { ++ WLAN_BACK_RECIPIENT = 0, ++ WLAN_BACK_INITIATOR = 1, ++ WLAN_BACK_TIMER = 2, ++}; ++ ++#ifdef PLATFORM_LINUX ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) auth; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) reassoc_req; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) disassoc; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_req; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_resp; ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) wme_action; ++#if 0 ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } __attribute__ ((packed)) chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } __attribute__ ((packed)) measurement; ++#endif ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } __attribute__ ((packed)) addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } __attribute__ ((packed)) addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } __attribute__ ((packed)) delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) mesh_action; ++ } __attribute__ ((packed)) u; ++ } __attribute__ ((packed)) action; ++ } __attribute__ ((packed)) u; ++}__attribute__ ((packed)); ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } auth; ++ struct { ++ u16 reason_code; ++ } deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } reassoc_req; ++ struct { ++ u16 reason_code; ++ } disassoc; ++#if 0 ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } probe_req; ++ ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } probe_resp; ++#endif ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } wme_action; ++/* ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } measurement; ++*/ ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } mesh_action; ++ } u; ++ } action; ++ } u; ++} ; ++ ++#pragma pack() ++ ++#endif ++ ++/* mgmt header + 1 byte category code */ ++#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) ++ ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/if_ether.h b/drivers/net/wireless/realtek/rtl8189fs/include/if_ether.h new file mode 100644 -index 000000000..93ed096df +index 0000000..93ed096 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/if_ether.h @@ -0,0 +1,113 @@ @@ -283322,7 +324755,7 @@ index 000000000..93ed096df + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/ip.h b/drivers/net/wireless/realtek/rtl8189fs/include/ip.h new file mode 100644 -index 000000000..a637d048c +index 0000000..a637d04 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/ip.h @@ -0,0 +1,141 @@ @@ -283469,7 +324902,7 @@ index 000000000..a637d048c + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/linux/wireless.h b/drivers/net/wireless/realtek/rtl8189fs/include/linux/wireless.h new file mode 100644 -index 000000000..d79caeb59 +index 0000000..d79caeb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/linux/wireless.h @@ -0,0 +1,97 @@ @@ -283572,7 +325005,7 @@ index 000000000..d79caeb59 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/mlme_osdep.h b/drivers/net/wireless/realtek/rtl8189fs/include/mlme_osdep.h new file mode 100644 -index 000000000..5380cd4db +index 0000000..5380cd4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/mlme_osdep.h @@ -0,0 +1,37 @@ @@ -283615,7 +325048,7 @@ index 000000000..5380cd4db + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/mp_custom_oid.h b/drivers/net/wireless/realtek/rtl8189fs/include/mp_custom_oid.h new file mode 100644 -index 000000000..9cf1c8270 +index 0000000..9cf1c82 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/mp_custom_oid.h @@ -0,0 +1,354 @@ @@ -283975,7 +325408,7 @@ index 000000000..9cf1c8270 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/nic_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/nic_spec.h new file mode 100644 -index 000000000..18e7b2c09 +index 0000000..18e7b2c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/nic_spec.h @@ -0,0 +1,47 @@ @@ -284028,7 +325461,7 @@ index 000000000..18e7b2c09 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/osdep_intf.h b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_intf.h new file mode 100644 -index 000000000..8b8679fa1 +index 0000000..8b8679f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_intf.h @@ -0,0 +1,173 @@ @@ -284207,7 +325640,7 @@ index 000000000..8b8679fa1 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service.h b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service.h new file mode 100644 -index 000000000..7562c86fa +index 0000000..7562c86 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service.h @@ -0,0 +1,634 @@ @@ -284847,762 +326280,762 @@ index 000000000..7562c86fa + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_bsd.h b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_bsd.h new file mode 100644 -index 000000000..040225c5b +index 0000000..b56ccbb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_bsd.h @@ -0,0 +1,749 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __OSDEP_BSD_SERVICE_H_ -+#define __OSDEP_BSD_SERVICE_H_ -+ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include "usbdevs.h" -+ -+#define USB_DEBUG_VAR rum_debug -+#include -+ -+#if 1 //Baron porting from linux, it's all temp solution, needs to check again -+#include -+#include /* XXX for PCPU_GET */ -+// typedef struct semaphore _sema; -+ typedef struct sema _sema; -+// typedef spinlock_t _lock; -+ typedef struct mtx _lock; -+ typedef struct mtx _mutex; -+ typedef struct timer_list _timer; -+ struct list_head { -+ struct list_head *next, *prev; -+ }; -+ struct __queue { -+ struct list_head queue; -+ _lock lock; -+ }; -+ -+ //typedef struct sk_buff _pkt; -+ typedef struct mbuf _pkt; -+ typedef struct mbuf _buffer; -+ -+ typedef struct __queue _queue; -+ typedef struct list_head _list; -+ typedef int _OS_STATUS; -+ //typedef u32 _irqL; -+ typedef unsigned long _irqL; -+ typedef struct ifnet * _nic_hdl; -+ -+ typedef pid_t _thread_hdl_; -+// typedef struct thread _thread_hdl_; -+ typedef void thread_return; -+ typedef void* thread_context; -+ -+ //#define thread_exit() complete_and_exit(NULL, 0) -+ -+ #define thread_exit() do{printf("%s", "RTKTHREAD_exit");}while(0) -+ -+ typedef void timer_hdl_return; -+ typedef void* timer_hdl_context; -+ typedef struct work_struct _workitem; -+ -+#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) -+/* emulate a modern version */ -+#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) -+ -+#define WIRELESS_EXT -1 -+#define HZ hz -+#define spin_lock_irqsave mtx_lock_irqsave -+#define spin_lock_bh mtx_lock_irqsave -+#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} -+//#define IFT_RTW 0xf9 //ifnet allocate type for RTW -+#define free_netdev if_free -+#define LIST_CONTAINOR(ptr, type, member) \ -+ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) -+#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) -+/* -+ * Linux timers are emulated using FreeBSD callout functions -+ * (and taskqueue functionality). -+ * -+ * Currently no timer stats functionality. -+ * -+ * See (linux_compat) processes.c -+ * -+ */ -+struct timer_list { -+ -+ /* FreeBSD callout related fields */ -+ struct callout callout; -+ -+ //timeout function -+ void (*function)(void*); -+ //argument -+ void *arg; -+ -+}; -+struct workqueue_struct; -+struct work_struct; -+typedef void (*work_func_t)(struct work_struct *work); -+/* Values for the state of an item of work (work_struct) */ -+typedef enum work_state { -+ WORK_STATE_UNSET = 0, -+ WORK_STATE_CALLOUT_PENDING = 1, -+ WORK_STATE_TASK_PENDING = 2, -+ WORK_STATE_WORK_CANCELLED = 3 -+} work_state_t; -+ -+struct work_struct { -+ struct task task; /* FreeBSD task */ -+ work_state_t state; /* the pending or otherwise state of work. */ -+ work_func_t func; -+}; -+#define spin_unlock_irqrestore mtx_unlock_irqrestore -+#define spin_unlock_bh mtx_unlock_irqrestore -+#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); -+extern void _rtw_spinlock_init(_lock *plock); -+ -+//modify private structure to match freebsd -+#define BITS_PER_LONG 32 -+union ktime { -+ s64 tv64; -+#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) -+ struct { -+#ifdef __BIG_ENDIAN -+ s32 sec, nsec; -+#else -+ s32 nsec, sec; -+#endif -+ } tv; -+#endif -+}; -+#define kmemcheck_bitfield_begin(name) -+#define kmemcheck_bitfield_end(name) -+#define CHECKSUM_NONE 0 -+typedef unsigned char *sk_buff_data_t; -+typedef union ktime ktime_t; /* Kill this */ -+ -+void rtw_mtx_lock(_lock *plock); -+ -+void rtw_mtx_unlock(_lock *plock); -+ -+/** -+ * struct sk_buff - socket buffer -+ * @next: Next buffer in list -+ * @prev: Previous buffer in list -+ * @sk: Socket we are owned by -+ * @tstamp: Time we arrived -+ * @dev: Device we arrived on/are leaving by -+ * @transport_header: Transport layer header -+ * @network_header: Network layer header -+ * @mac_header: Link layer header -+ * @_skb_refdst: destination entry (with norefcount bit) -+ * @sp: the security path, used for xfrm -+ * @cb: Control buffer. Free for use by every layer. Put private vars here -+ * @len: Length of actual data -+ * @data_len: Data length -+ * @mac_len: Length of link layer header -+ * @hdr_len: writable header length of cloned skb -+ * @csum: Checksum (must include start/offset pair) -+ * @csum_start: Offset from skb->head where checksumming should start -+ * @csum_offset: Offset from csum_start where checksum should be stored -+ * @local_df: allow local fragmentation -+ * @cloned: Head may be cloned (check refcnt to be sure) -+ * @nohdr: Payload reference only, must not modify header -+ * @pkt_type: Packet class -+ * @fclone: skbuff clone status -+ * @ip_summed: Driver fed us an IP checksum -+ * @priority: Packet queueing priority -+ * @users: User count - see {datagram,tcp}.c -+ * @protocol: Packet protocol from driver -+ * @truesize: Buffer size -+ * @head: Head of buffer -+ * @data: Data head pointer -+ * @tail: Tail pointer -+ * @end: End pointer -+ * @destructor: Destruct function -+ * @mark: Generic packet mark -+ * @nfct: Associated connection, if any -+ * @ipvs_property: skbuff is owned by ipvs -+ * @peeked: this packet has been seen already, so stats have been -+ * done for it, don't do them again -+ * @nf_trace: netfilter packet trace flag -+ * @nfctinfo: Relationship of this skb to the connection -+ * @nfct_reasm: netfilter conntrack re-assembly pointer -+ * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c -+ * @skb_iif: ifindex of device we arrived on -+ * @rxhash: the packet hash computed on receive -+ * @queue_mapping: Queue mapping for multiqueue devices -+ * @tc_index: Traffic control index -+ * @tc_verd: traffic control verdict -+ * @ndisc_nodetype: router type (from link layer) -+ * @dma_cookie: a cookie to one of several possible DMA operations -+ * done by skb DMA functions -+ * @secmark: security marking -+ * @vlan_tci: vlan tag control information -+ */ -+ -+struct sk_buff { -+ /* These two members must be first. */ -+ struct sk_buff *next; -+ struct sk_buff *prev; -+ -+ ktime_t tstamp; -+ -+ struct sock *sk; -+ //struct net_device *dev; -+ struct ifnet *dev; -+ -+ /* -+ * This is the control buffer. It is free to use for every -+ * layer. Please put your private variables there. If you -+ * want to keep them across layers you have to do a skb_clone() -+ * first. This is owned by whoever has the skb queued ATM. -+ */ -+ char cb[48] __aligned(8); -+ -+ unsigned long _skb_refdst; -+#ifdef CONFIG_XFRM -+ struct sec_path *sp; -+#endif -+ unsigned int len, -+ data_len; -+ u16 mac_len, -+ hdr_len; -+ union { -+ u32 csum; -+ struct { -+ u16 csum_start; -+ u16 csum_offset; -+ }smbol2; -+ }smbol1; -+ u32 priority; -+ kmemcheck_bitfield_begin(flags1); -+ u8 local_df:1, -+ cloned:1, -+ ip_summed:2, -+ nohdr:1, -+ nfctinfo:3; -+ u8 pkt_type:3, -+ fclone:2, -+ ipvs_property:1, -+ peeked:1, -+ nf_trace:1; -+ kmemcheck_bitfield_end(flags1); -+ u16 protocol; -+ -+ void (*destructor)(struct sk_buff *skb); -+#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) -+ struct nf_conntrack *nfct; -+ struct sk_buff *nfct_reasm; -+#endif -+#ifdef CONFIG_BRIDGE_NETFILTER -+ struct nf_bridge_info *nf_bridge; -+#endif -+ -+ int skb_iif; -+#ifdef CONFIG_NET_SCHED -+ u16 tc_index; /* traffic control index */ -+#ifdef CONFIG_NET_CLS_ACT -+ u16 tc_verd; /* traffic control verdict */ -+#endif -+#endif -+ -+ u32 rxhash; -+ -+ kmemcheck_bitfield_begin(flags2); -+ u16 queue_mapping:16; -+#ifdef CONFIG_IPV6_NDISC_NODETYPE -+ u8 ndisc_nodetype:2, -+ deliver_no_wcard:1; -+#else -+ u8 deliver_no_wcard:1; -+#endif -+ kmemcheck_bitfield_end(flags2); -+ -+ /* 0/14 bit hole */ -+ -+#ifdef CONFIG_NET_DMA -+ dma_cookie_t dma_cookie; -+#endif -+#ifdef CONFIG_NETWORK_SECMARK -+ u32 secmark; -+#endif -+ union { -+ u32 mark; -+ u32 dropcount; -+ }symbol3; -+ -+ u16 vlan_tci; -+ -+ sk_buff_data_t transport_header; -+ sk_buff_data_t network_header; -+ sk_buff_data_t mac_header; -+ /* These elements must be at the end, see alloc_skb() for details. */ -+ sk_buff_data_t tail; -+ sk_buff_data_t end; -+ unsigned char *head, -+ *data; -+ unsigned int truesize; -+ atomic_t users; -+}; -+struct sk_buff_head { -+ /* These two members must be first. */ -+ struct sk_buff *next; -+ struct sk_buff *prev; -+ -+ u32 qlen; -+ _lock lock; -+}; -+#define skb_tail_pointer(skb) skb->tail -+static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) -+{ -+ unsigned char *tmp = skb_tail_pointer(skb); -+ //SKB_LINEAR_ASSERT(skb); -+ skb->tail += len; -+ skb->len += len; -+ return tmp; -+} -+ -+static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) -+{ -+ skb->len -= len; -+ if(skb->len < skb->data_len) -+ printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); -+ return skb->data += len; -+} -+static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) -+{ -+ #ifdef PLATFORM_FREEBSD -+ return __skb_pull(skb, len); -+ #else -+ return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); -+ #endif //PLATFORM_FREEBSD -+} -+static inline u32 skb_queue_len(const struct sk_buff_head *list_) -+{ -+ return list_->qlen; -+} -+static inline void __skb_insert(struct sk_buff *newsk, -+ struct sk_buff *prev, struct sk_buff *next, -+ struct sk_buff_head *list) -+{ -+ newsk->next = next; -+ newsk->prev = prev; -+ next->prev = prev->next = newsk; -+ list->qlen++; -+} -+static inline void __skb_queue_before(struct sk_buff_head *list, -+ struct sk_buff *next, -+ struct sk_buff *newsk) -+{ -+ __skb_insert(newsk, next->prev, next, list); -+} -+static inline void skb_queue_tail(struct sk_buff_head *list, -+ struct sk_buff *newsk) -+{ -+ mtx_lock(&list->lock); -+ __skb_queue_before(list, (struct sk_buff *)list, newsk); -+ mtx_unlock(&list->lock); -+} -+static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) -+{ -+ struct sk_buff *list = ((struct sk_buff *)list_)->next; -+ if (list == (struct sk_buff *)list_) -+ list = NULL; -+ return list; -+} -+static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) -+{ -+ struct sk_buff *next, *prev; -+ -+ list->qlen--; -+ next = skb->next; -+ prev = skb->prev; -+ skb->next = skb->prev = NULL; -+ next->prev = prev; -+ prev->next = next; -+} -+ -+static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) -+{ -+ mtx_lock(&list->lock); -+ -+ struct sk_buff *skb = skb_peek(list); -+ if (skb) -+ __skb_unlink(skb, list); -+ -+ mtx_unlock(&list->lock); -+ -+ return skb; -+} -+static inline void skb_reserve(struct sk_buff *skb, int len) -+{ -+ skb->data += len; -+ skb->tail += len; -+} -+static inline void __skb_queue_head_init(struct sk_buff_head *list) -+{ -+ list->prev = list->next = (struct sk_buff *)list; -+ list->qlen = 0; -+} -+/* -+ * This function creates a split out lock class for each invocation; -+ * this is needed for now since a whole lot of users of the skb-queue -+ * infrastructure in drivers have different locking usage (in hardirq) -+ * than the networking core (in softirq only). In the long run either the -+ * network layer or drivers should need annotation to consolidate the -+ * main types of usage into 3 classes. -+ */ -+static inline void skb_queue_head_init(struct sk_buff_head *list) -+{ -+ _rtw_spinlock_init(&list->lock); -+ __skb_queue_head_init(list); -+} -+unsigned long copy_from_user(void *to, const void *from, unsigned long n); -+unsigned long copy_to_user(void *to, const void *from, unsigned long n); -+struct sk_buff * dev_alloc_skb(unsigned int size); -+struct sk_buff *skb_clone(const struct sk_buff *skb); -+void dev_kfree_skb_any(struct sk_buff *skb); -+#endif //Baron porting from linux, it's all temp solution, needs to check again -+ -+ -+#if 1 // kenny add Linux compatibility code for Linux USB driver -+#include -+ -+#define __init // __attribute ((constructor)) -+#define __exit // __attribute ((destructor)) -+ -+/* -+ * Definitions for module_init and module_exit macros. -+ * -+ * These macros will use the SYSINIT framework to call a specified -+ * function (with no arguments) on module loading or unloading. -+ * -+ */ -+ -+void module_init_exit_wrapper(void *arg); -+ -+#define module_init(initfn) \ -+ SYSINIT(mod_init_ ## initfn, \ -+ SI_SUB_KLD, SI_ORDER_FIRST, \ -+ module_init_exit_wrapper, initfn) -+ -+#define module_exit(exitfn) \ -+ SYSUNINIT(mod_exit_ ## exitfn, \ -+ SI_SUB_KLD, SI_ORDER_ANY, \ -+ module_init_exit_wrapper, exitfn) -+ -+/* -+ * The usb_register and usb_deregister functions are used to register -+ * usb drivers with the usb subsystem. -+ */ -+int usb_register(struct usb_driver *driver); -+int usb_deregister(struct usb_driver *driver); -+ -+/* -+ * usb_get_dev and usb_put_dev - increment/decrement the reference count -+ * of the usb device structure. -+ * -+ * Original body of usb_get_dev: -+ * -+ * if (dev) -+ * get_device(&dev->dev); -+ * return dev; -+ * -+ * Reference counts are not currently used in this compatibility -+ * layer. So these functions will do nothing. -+ */ -+static inline struct usb_device * -+usb_get_dev(struct usb_device *dev) -+{ -+ return dev; -+} -+ -+static inline void -+usb_put_dev(struct usb_device *dev) -+{ -+ return; -+} -+ -+ -+// rtw_usb_compat_linux -+int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); -+int rtw_usb_unlink_urb(struct urb *urb); -+int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); -+int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, -+ uint8_t request, uint8_t requesttype, -+ uint16_t value, uint16_t index, void *data, -+ uint16_t size, usb_timeout_t timeout); -+int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); -+int rtw_usb_setup_endpoint(struct usb_device *dev, -+ struct usb_host_endpoint *uhe, usb_size_t bufsize); -+struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); -+struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); -+struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); -+struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); -+void *rtw_usbd_get_intfdata(struct usb_interface *intf); -+void rtw_usb_linux_register(void *arg); -+void rtw_usb_linux_deregister(void *arg); -+void rtw_usb_linux_free_device(struct usb_device *dev); -+void rtw_usb_free_urb(struct urb *urb); -+void rtw_usb_init_urb(struct urb *urb); -+void rtw_usb_kill_urb(struct urb *urb); -+void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); -+void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, -+ struct usb_host_endpoint *uhe, void *buf, -+ int length, usb_complete_t callback, void *arg); -+int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, -+ void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); -+void *usb_get_intfdata(struct usb_interface *intf); -+int usb_linux_init_endpoints(struct usb_device *udev); -+ -+ -+ -+typedef struct urb * PURB; -+ -+typedef unsigned gfp_t; -+#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ -+#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ -+#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ -+#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ -+#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ -+#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ -+#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ -+#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ -+#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ -+#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ -+#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ -+#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ -+#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ -+#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ -+ -+/* This equals 0, but use constants in case they ever change */ -+#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) -+/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ -+#define GFP_ATOMIC (__GFP_HIGH) -+#define GFP_NOIO (__GFP_WAIT) -+#define GFP_NOFS (__GFP_WAIT | __GFP_IO) -+#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) -+#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) -+#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ -+ __GFP_HIGHMEM) -+ -+ -+#endif // kenny add Linux compatibility code for Linux USB -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->next; -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return (&(queue->queue)); -+} -+ -+ -+#define LIST_CONTAINOR(ptr, type, member) \ -+ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) -+ -+ -+__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_bh(plock, *pirqL); -+} -+ -+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_bh(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ -+ mtx_lock(pmutex); -+ -+} -+ -+ -+__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ -+ mtx_unlock(pmutex); -+ -+} -+static inline void __list_del(struct list_head * prev, struct list_head * next) -+{ -+ next->prev = prev; -+ prev->next = next; -+} -+static inline void INIT_LIST_HEAD(struct list_head *list) -+{ -+ list->next = list; -+ list->prev = list; -+} -+__inline static void rtw_list_delete(_list *plist) -+{ -+ __list_del(plist->prev, plist->next); -+ INIT_LIST_HEAD(plist); -+} -+ -+__inline static void _init_timer(_timer *ptimer,_nic_hdl padapter,void *pfunc,void* cntx) -+{ -+ ptimer->function = pfunc; -+ ptimer->arg = cntx; -+ callout_init(&ptimer->callout, CALLOUT_MPSAFE); -+} -+ -+__inline static void _set_timer(_timer *ptimer,u32 delay_time) -+{ -+ // mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); -+ if(ptimer->function && ptimer->arg){ -+ rtw_mtx_lock(NULL); -+ callout_reset(&ptimer->callout, delay_time,ptimer->function, ptimer->arg); -+ rtw_mtx_unlock(NULL); -+ } -+} -+ -+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) -+{ -+ // del_timer_sync(ptimer); -+ // *bcancelled= _TRUE;//TRUE ==1; FALSE==0 -+ rtw_mtx_lock(NULL); -+ callout_drain(&ptimer->callout); -+ rtw_mtx_unlock(NULL); -+} -+ -+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -+{ -+ printf("%s Not implement yet! \n",__FUNCTION__); -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+ printf("%s Not implement yet! \n",__FUNCTION__); -+// schedule_work(pwork); -+} -+ -+// -+// Global Mutex: can only be used at PASSIVE level. -+// -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+} -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+} -+ -+#define ATOMIC_INIT(i) { (i) } -+ -+static __inline void thread_enter(char *name); -+ -+//Atomic integer operations -+typedef uint32_t ATOMIC_T ; -+ -+#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) -+ -+#define rtw_free_netdev(netdev) if_free((netdev)) -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) "" -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) "" -+#define FUNC_NDEV_FMT "%s" -+#define FUNC_NDEV_ARG(ndev) __func__ -+#define FUNC_ADPT_FMT "%s" -+#define FUNC_ADPT_ARG(adapter) __func__ -+ -+#define STRUCT_PACKED -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_BSD_SERVICE_H_ ++#define __OSDEP_BSD_SERVICE_H_ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "usbdevs.h" ++ ++#define USB_DEBUG_VAR rum_debug ++#include ++ ++#if 1 //Baron porting from linux, it's all temp solution, needs to check again ++#include ++#include /* XXX for PCPU_GET */ ++// typedef struct semaphore _sema; ++ typedef struct sema _sema; ++// typedef spinlock_t _lock; ++ typedef struct mtx _lock; ++ typedef struct mtx _mutex; ++ typedef struct timer_list _timer; ++ struct list_head { ++ struct list_head *next, *prev; ++ }; ++ struct __queue { ++ struct list_head queue; ++ _lock lock; ++ }; ++ ++ //typedef struct sk_buff _pkt; ++ typedef struct mbuf _pkt; ++ typedef struct mbuf _buffer; ++ ++ typedef struct __queue _queue; ++ typedef struct list_head _list; ++ typedef int _OS_STATUS; ++ //typedef u32 _irqL; ++ typedef unsigned long _irqL; ++ typedef struct ifnet * _nic_hdl; ++ ++ typedef pid_t _thread_hdl_; ++// typedef struct thread _thread_hdl_; ++ typedef void thread_return; ++ typedef void* thread_context; ++ ++ //#define thread_exit() complete_and_exit(NULL, 0) ++ ++ #define thread_exit() do{printf("%s", "RTKTHREAD_exit");}while(0) ++ ++ typedef void timer_hdl_return; ++ typedef void* timer_hdl_context; ++ typedef struct work_struct _workitem; ++ ++#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) ++/* emulate a modern version */ ++#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) ++ ++#define WIRELESS_EXT -1 ++#define HZ hz ++#define spin_lock_irqsave mtx_lock_irqsave ++#define spin_lock_bh mtx_lock_irqsave ++#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} ++//#define IFT_RTW 0xf9 //ifnet allocate type for RTW ++#define free_netdev if_free ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) ++/* ++ * Linux timers are emulated using FreeBSD callout functions ++ * (and taskqueue functionality). ++ * ++ * Currently no timer stats functionality. ++ * ++ * See (linux_compat) processes.c ++ * ++ */ ++struct timer_list { ++ ++ /* FreeBSD callout related fields */ ++ struct callout callout; ++ ++ //timeout function ++ void (*function)(void*); ++ //argument ++ void *arg; ++ ++}; ++struct workqueue_struct; ++struct work_struct; ++typedef void (*work_func_t)(struct work_struct *work); ++/* Values for the state of an item of work (work_struct) */ ++typedef enum work_state { ++ WORK_STATE_UNSET = 0, ++ WORK_STATE_CALLOUT_PENDING = 1, ++ WORK_STATE_TASK_PENDING = 2, ++ WORK_STATE_WORK_CANCELLED = 3 ++} work_state_t; ++ ++struct work_struct { ++ struct task task; /* FreeBSD task */ ++ work_state_t state; /* the pending or otherwise state of work. */ ++ work_func_t func; ++}; ++#define spin_unlock_irqrestore mtx_unlock_irqrestore ++#define spin_unlock_bh mtx_unlock_irqrestore ++#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); ++extern void _rtw_spinlock_init(_lock *plock); ++ ++//modify private structure to match freebsd ++#define BITS_PER_LONG 32 ++union ktime { ++ s64 tv64; ++#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) ++ struct { ++#ifdef __BIG_ENDIAN ++ s32 sec, nsec; ++#else ++ s32 nsec, sec; ++#endif ++ } tv; ++#endif ++}; ++#define kmemcheck_bitfield_begin(name) ++#define kmemcheck_bitfield_end(name) ++#define CHECKSUM_NONE 0 ++typedef unsigned char *sk_buff_data_t; ++typedef union ktime ktime_t; /* Kill this */ ++ ++void rtw_mtx_lock(_lock *plock); ++ ++void rtw_mtx_unlock(_lock *plock); ++ ++/** ++ * struct sk_buff - socket buffer ++ * @next: Next buffer in list ++ * @prev: Previous buffer in list ++ * @sk: Socket we are owned by ++ * @tstamp: Time we arrived ++ * @dev: Device we arrived on/are leaving by ++ * @transport_header: Transport layer header ++ * @network_header: Network layer header ++ * @mac_header: Link layer header ++ * @_skb_refdst: destination entry (with norefcount bit) ++ * @sp: the security path, used for xfrm ++ * @cb: Control buffer. Free for use by every layer. Put private vars here ++ * @len: Length of actual data ++ * @data_len: Data length ++ * @mac_len: Length of link layer header ++ * @hdr_len: writable header length of cloned skb ++ * @csum: Checksum (must include start/offset pair) ++ * @csum_start: Offset from skb->head where checksumming should start ++ * @csum_offset: Offset from csum_start where checksum should be stored ++ * @local_df: allow local fragmentation ++ * @cloned: Head may be cloned (check refcnt to be sure) ++ * @nohdr: Payload reference only, must not modify header ++ * @pkt_type: Packet class ++ * @fclone: skbuff clone status ++ * @ip_summed: Driver fed us an IP checksum ++ * @priority: Packet queueing priority ++ * @users: User count - see {datagram,tcp}.c ++ * @protocol: Packet protocol from driver ++ * @truesize: Buffer size ++ * @head: Head of buffer ++ * @data: Data head pointer ++ * @tail: Tail pointer ++ * @end: End pointer ++ * @destructor: Destruct function ++ * @mark: Generic packet mark ++ * @nfct: Associated connection, if any ++ * @ipvs_property: skbuff is owned by ipvs ++ * @peeked: this packet has been seen already, so stats have been ++ * done for it, don't do them again ++ * @nf_trace: netfilter packet trace flag ++ * @nfctinfo: Relationship of this skb to the connection ++ * @nfct_reasm: netfilter conntrack re-assembly pointer ++ * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c ++ * @skb_iif: ifindex of device we arrived on ++ * @rxhash: the packet hash computed on receive ++ * @queue_mapping: Queue mapping for multiqueue devices ++ * @tc_index: Traffic control index ++ * @tc_verd: traffic control verdict ++ * @ndisc_nodetype: router type (from link layer) ++ * @dma_cookie: a cookie to one of several possible DMA operations ++ * done by skb DMA functions ++ * @secmark: security marking ++ * @vlan_tci: vlan tag control information ++ */ ++ ++struct sk_buff { ++ /* These two members must be first. */ ++ struct sk_buff *next; ++ struct sk_buff *prev; ++ ++ ktime_t tstamp; ++ ++ struct sock *sk; ++ //struct net_device *dev; ++ struct ifnet *dev; ++ ++ /* ++ * This is the control buffer. It is free to use for every ++ * layer. Please put your private variables there. If you ++ * want to keep them across layers you have to do a skb_clone() ++ * first. This is owned by whoever has the skb queued ATM. ++ */ ++ char cb[48] __aligned(8); ++ ++ unsigned long _skb_refdst; ++#ifdef CONFIG_XFRM ++ struct sec_path *sp; ++#endif ++ unsigned int len, ++ data_len; ++ u16 mac_len, ++ hdr_len; ++ union { ++ u32 csum; ++ struct { ++ u16 csum_start; ++ u16 csum_offset; ++ }smbol2; ++ }smbol1; ++ u32 priority; ++ kmemcheck_bitfield_begin(flags1); ++ u8 local_df:1, ++ cloned:1, ++ ip_summed:2, ++ nohdr:1, ++ nfctinfo:3; ++ u8 pkt_type:3, ++ fclone:2, ++ ipvs_property:1, ++ peeked:1, ++ nf_trace:1; ++ kmemcheck_bitfield_end(flags1); ++ u16 protocol; ++ ++ void (*destructor)(struct sk_buff *skb); ++#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) ++ struct nf_conntrack *nfct; ++ struct sk_buff *nfct_reasm; ++#endif ++#ifdef CONFIG_BRIDGE_NETFILTER ++ struct nf_bridge_info *nf_bridge; ++#endif ++ ++ int skb_iif; ++#ifdef CONFIG_NET_SCHED ++ u16 tc_index; /* traffic control index */ ++#ifdef CONFIG_NET_CLS_ACT ++ u16 tc_verd; /* traffic control verdict */ ++#endif ++#endif ++ ++ u32 rxhash; ++ ++ kmemcheck_bitfield_begin(flags2); ++ u16 queue_mapping:16; ++#ifdef CONFIG_IPV6_NDISC_NODETYPE ++ u8 ndisc_nodetype:2, ++ deliver_no_wcard:1; ++#else ++ u8 deliver_no_wcard:1; ++#endif ++ kmemcheck_bitfield_end(flags2); ++ ++ /* 0/14 bit hole */ ++ ++#ifdef CONFIG_NET_DMA ++ dma_cookie_t dma_cookie; ++#endif ++#ifdef CONFIG_NETWORK_SECMARK ++ u32 secmark; ++#endif ++ union { ++ u32 mark; ++ u32 dropcount; ++ }symbol3; ++ ++ u16 vlan_tci; ++ ++ sk_buff_data_t transport_header; ++ sk_buff_data_t network_header; ++ sk_buff_data_t mac_header; ++ /* These elements must be at the end, see alloc_skb() for details. */ ++ sk_buff_data_t tail; ++ sk_buff_data_t end; ++ unsigned char *head, ++ *data; ++ unsigned int truesize; ++ atomic_t users; ++}; ++struct sk_buff_head { ++ /* These two members must be first. */ ++ struct sk_buff *next; ++ struct sk_buff *prev; ++ ++ u32 qlen; ++ _lock lock; ++}; ++#define skb_tail_pointer(skb) skb->tail ++static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) ++{ ++ unsigned char *tmp = skb_tail_pointer(skb); ++ //SKB_LINEAR_ASSERT(skb); ++ skb->tail += len; ++ skb->len += len; ++ return tmp; ++} ++ ++static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) ++{ ++ skb->len -= len; ++ if(skb->len < skb->data_len) ++ printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); ++ return skb->data += len; ++} ++static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) ++{ ++ #ifdef PLATFORM_FREEBSD ++ return __skb_pull(skb, len); ++ #else ++ return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); ++ #endif //PLATFORM_FREEBSD ++} ++static inline u32 skb_queue_len(const struct sk_buff_head *list_) ++{ ++ return list_->qlen; ++} ++static inline void __skb_insert(struct sk_buff *newsk, ++ struct sk_buff *prev, struct sk_buff *next, ++ struct sk_buff_head *list) ++{ ++ newsk->next = next; ++ newsk->prev = prev; ++ next->prev = prev->next = newsk; ++ list->qlen++; ++} ++static inline void __skb_queue_before(struct sk_buff_head *list, ++ struct sk_buff *next, ++ struct sk_buff *newsk) ++{ ++ __skb_insert(newsk, next->prev, next, list); ++} ++static inline void skb_queue_tail(struct sk_buff_head *list, ++ struct sk_buff *newsk) ++{ ++ mtx_lock(&list->lock); ++ __skb_queue_before(list, (struct sk_buff *)list, newsk); ++ mtx_unlock(&list->lock); ++} ++static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) ++{ ++ struct sk_buff *list = ((struct sk_buff *)list_)->next; ++ if (list == (struct sk_buff *)list_) ++ list = NULL; ++ return list; ++} ++static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) ++{ ++ struct sk_buff *next, *prev; ++ ++ list->qlen--; ++ next = skb->next; ++ prev = skb->prev; ++ skb->next = skb->prev = NULL; ++ next->prev = prev; ++ prev->next = next; ++} ++ ++static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) ++{ ++ mtx_lock(&list->lock); ++ ++ struct sk_buff *skb = skb_peek(list); ++ if (skb) ++ __skb_unlink(skb, list); ++ ++ mtx_unlock(&list->lock); ++ ++ return skb; ++} ++static inline void skb_reserve(struct sk_buff *skb, int len) ++{ ++ skb->data += len; ++ skb->tail += len; ++} ++static inline void __skb_queue_head_init(struct sk_buff_head *list) ++{ ++ list->prev = list->next = (struct sk_buff *)list; ++ list->qlen = 0; ++} ++/* ++ * This function creates a split out lock class for each invocation; ++ * this is needed for now since a whole lot of users of the skb-queue ++ * infrastructure in drivers have different locking usage (in hardirq) ++ * than the networking core (in softirq only). In the long run either the ++ * network layer or drivers should need annotation to consolidate the ++ * main types of usage into 3 classes. ++ */ ++static inline void skb_queue_head_init(struct sk_buff_head *list) ++{ ++ _rtw_spinlock_init(&list->lock); ++ __skb_queue_head_init(list); ++} ++unsigned long copy_from_user(void *to, const void *from, unsigned long n); ++unsigned long copy_to_user(void *to, const void *from, unsigned long n); ++struct sk_buff * dev_alloc_skb(unsigned int size); ++struct sk_buff *skb_clone(const struct sk_buff *skb); ++void dev_kfree_skb_any(struct sk_buff *skb); ++#endif //Baron porting from linux, it's all temp solution, needs to check again ++ ++ ++#if 1 // kenny add Linux compatibility code for Linux USB driver ++#include ++ ++#define __init // __attribute ((constructor)) ++#define __exit // __attribute ((destructor)) ++ ++/* ++ * Definitions for module_init and module_exit macros. ++ * ++ * These macros will use the SYSINIT framework to call a specified ++ * function (with no arguments) on module loading or unloading. ++ * ++ */ ++ ++void module_init_exit_wrapper(void *arg); ++ ++#define module_init(initfn) \ ++ SYSINIT(mod_init_ ## initfn, \ ++ SI_SUB_KLD, SI_ORDER_FIRST, \ ++ module_init_exit_wrapper, initfn) ++ ++#define module_exit(exitfn) \ ++ SYSUNINIT(mod_exit_ ## exitfn, \ ++ SI_SUB_KLD, SI_ORDER_ANY, \ ++ module_init_exit_wrapper, exitfn) ++ ++/* ++ * The usb_register and usb_deregister functions are used to register ++ * usb drivers with the usb subsystem. ++ */ ++int usb_register(struct usb_driver *driver); ++int usb_deregister(struct usb_driver *driver); ++ ++/* ++ * usb_get_dev and usb_put_dev - increment/decrement the reference count ++ * of the usb device structure. ++ * ++ * Original body of usb_get_dev: ++ * ++ * if (dev) ++ * get_device(&dev->dev); ++ * return dev; ++ * ++ * Reference counts are not currently used in this compatibility ++ * layer. So these functions will do nothing. ++ */ ++static inline struct usb_device * ++usb_get_dev(struct usb_device *dev) ++{ ++ return dev; ++} ++ ++static inline void ++usb_put_dev(struct usb_device *dev) ++{ ++ return; ++} ++ ++ ++// rtw_usb_compat_linux ++int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); ++int rtw_usb_unlink_urb(struct urb *urb); ++int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); ++int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, ++ uint8_t request, uint8_t requesttype, ++ uint16_t value, uint16_t index, void *data, ++ uint16_t size, usb_timeout_t timeout); ++int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); ++int rtw_usb_setup_endpoint(struct usb_device *dev, ++ struct usb_host_endpoint *uhe, usb_size_t bufsize); ++struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); ++struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); ++struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); ++struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); ++void *rtw_usbd_get_intfdata(struct usb_interface *intf); ++void rtw_usb_linux_register(void *arg); ++void rtw_usb_linux_deregister(void *arg); ++void rtw_usb_linux_free_device(struct usb_device *dev); ++void rtw_usb_free_urb(struct urb *urb); ++void rtw_usb_init_urb(struct urb *urb); ++void rtw_usb_kill_urb(struct urb *urb); ++void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); ++void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, ++ struct usb_host_endpoint *uhe, void *buf, ++ int length, usb_complete_t callback, void *arg); ++int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, ++ void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); ++void *usb_get_intfdata(struct usb_interface *intf); ++int usb_linux_init_endpoints(struct usb_device *udev); ++ ++ ++ ++typedef struct urb * PURB; ++ ++typedef unsigned gfp_t; ++#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ ++#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ ++#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ ++#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ ++#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ ++#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ ++#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ ++#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ ++#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ ++#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ ++#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ ++#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ ++#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ ++#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ ++ ++/* This equals 0, but use constants in case they ever change */ ++#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) ++/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ ++#define GFP_ATOMIC (__GFP_HIGH) ++#define GFP_NOIO (__GFP_WAIT) ++#define GFP_NOFS (__GFP_WAIT | __GFP_IO) ++#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) ++#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) ++#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ ++ __GFP_HIGHMEM) ++ ++ ++#endif // kenny add Linux compatibility code for Linux USB ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->next; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++ ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_bh(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_bh(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ ++ mtx_lock(pmutex); ++ ++} ++ ++ ++__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ ++ mtx_unlock(pmutex); ++ ++} ++static inline void __list_del(struct list_head * prev, struct list_head * next) ++{ ++ next->prev = prev; ++ prev->next = next; ++} ++static inline void INIT_LIST_HEAD(struct list_head *list) ++{ ++ list->next = list; ++ list->prev = list; ++} ++__inline static void rtw_list_delete(_list *plist) ++{ ++ __list_del(plist->prev, plist->next); ++ INIT_LIST_HEAD(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl padapter,void *pfunc,void* cntx) ++{ ++ ptimer->function = pfunc; ++ ptimer->arg = cntx; ++ callout_init(&ptimer->callout, CALLOUT_MPSAFE); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ // mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); ++ if(ptimer->function && ptimer->arg){ ++ rtw_mtx_lock(NULL); ++ callout_reset(&ptimer->callout, delay_time,ptimer->function, ptimer->arg); ++ rtw_mtx_unlock(NULL); ++ } ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ // del_timer_sync(ptimer); ++ // *bcancelled= _TRUE;//TRUE ==1; FALSE==0 ++ rtw_mtx_lock(NULL); ++ callout_drain(&ptimer->callout); ++ rtw_mtx_unlock(NULL); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ printf("%s Not implement yet! \n",__FUNCTION__); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ printf("%s Not implement yet! \n",__FUNCTION__); ++// schedule_work(pwork); ++} ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++} ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++static __inline void thread_enter(char *name); ++ ++//Atomic integer operations ++typedef uint32_t ATOMIC_T ; ++ ++#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) ++ ++#define rtw_free_netdev(netdev) if_free((netdev)) ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) "" ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) "" ++#define FUNC_NDEV_FMT "%s" ++#define FUNC_NDEV_ARG(ndev) __func__ ++#define FUNC_ADPT_FMT "%s" ++#define FUNC_ADPT_ARG(adapter) __func__ ++ ++#define STRUCT_PACKED ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_ce.h b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_ce.h new file mode 100644 -index 000000000..5f2a78aef +index 0000000..04c5b18 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_ce.h @@ -0,0 +1,192 @@ @@ -285624,826 +327057,825 @@ index 000000000..5f2a78aef + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * -+ ******************************************************************************/ -+ -+#ifndef __OSDEP_CE_SERVICE_H_ -+#define __OSDEP_CE_SERVICE_H_ -+ -+ -+#include -+#include -+ -+#ifdef CONFIG_SDIO_HCI -+#include "SDCardDDK.h" -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#include -+#endif -+ -+typedef HANDLE _sema; -+typedef LIST_ENTRY _list; -+typedef NDIS_STATUS _OS_STATUS; -+ -+typedef NDIS_SPIN_LOCK _lock; -+ -+typedef HANDLE _rwlock; //Mutex -+ -+typedef u32 _irqL; -+ -+typedef NDIS_HANDLE _nic_hdl; -+ -+ -+typedef NDIS_MINIPORT_TIMER _timer; -+ -+struct __queue { -+ LIST_ENTRY queue; -+ _lock lock; -+}; -+ -+typedef NDIS_PACKET _pkt; -+typedef NDIS_BUFFER _buffer; -+typedef struct __queue _queue; -+ -+typedef HANDLE _thread_hdl_; -+typedef DWORD thread_return; -+typedef void* thread_context; -+typedef NDIS_WORK_ITEM _workitem; -+ -+#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; -+ -+ -+#define SEMA_UPBND (0x7FFFFFFF) //8192 -+ -+__inline static _list *get_prev(_list *list) -+{ -+ return list->Blink; -+} -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->Flink; -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return (&(queue->queue)); -+} -+ -+#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) -+ -+__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisAcquireSpinLock(plock); -+} -+ -+__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisReleaseSpinLock(plock); -+} -+ -+__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprAcquireSpinLock(plock); -+} -+ -+__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprReleaseSpinLock(plock); -+} -+ -+ -+__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -+{ -+ WaitForSingleObject(*prwlock, INFINITE ); -+ -+} -+ -+__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -+{ -+ ReleaseMutex(*prwlock); -+} -+ -+__inline static void rtw_list_delete(_list *plist) -+{ -+ RemoveEntryList(plist); -+ InitializeListHead(plist); -+} -+ -+#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 -+ -+__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) -+{ -+ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); -+} -+ -+__inline static void _set_timer(_timer *ptimer,u32 delay_time) -+{ -+ NdisMSetTimer(ptimer,delay_time); -+} -+ -+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) -+{ -+ NdisMCancelTimer(ptimer,bcancelled); -+} -+ -+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -+{ -+ -+ NdisInitializeWorkItem(pwork, pfunc, cntx); -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+ NdisScheduleWorkItem(pwork); -+} -+ -+#define ATOMIC_INIT(i) { (i) } -+ -+// -+// Global Mutex: can only be used at PASSIVE level. -+// -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ -+ { \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+ NdisMSleep(10000); \ -+ } \ -+} -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+} -+ -+// limitation of path length -+#define PATH_LENGTH_MAX MAX_PATH -+ -+//Atomic integer operations -+#define ATOMIC_T LONG -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) "" -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) "" -+#define FUNC_NDEV_FMT "%s" -+#define FUNC_NDEV_ARG(ndev) __func__ -+#define FUNC_ADPT_FMT "%s" -+#define FUNC_ADPT_ARG(adapter) __func__ -+ -+#define STRUCT_PACKED -+ -+ -+#endif -+ ++ ******************************************************************************/ ++ ++#ifndef __OSDEP_CE_SERVICE_H_ ++#define __OSDEP_CE_SERVICE_H_ ++ ++ ++#include ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++#include "SDCardDDK.h" ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++typedef HANDLE _sema; ++typedef LIST_ENTRY _list; ++typedef NDIS_STATUS _OS_STATUS; ++ ++typedef NDIS_SPIN_LOCK _lock; ++ ++typedef HANDLE _rwlock; //Mutex ++ ++typedef u32 _irqL; ++ ++typedef NDIS_HANDLE _nic_hdl; ++ ++ ++typedef NDIS_MINIPORT_TIMER _timer; ++ ++struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++}; ++ ++typedef NDIS_PACKET _pkt; ++typedef NDIS_BUFFER _buffer; ++typedef struct __queue _queue; ++ ++typedef HANDLE _thread_hdl_; ++typedef DWORD thread_return; ++typedef void* thread_context; ++typedef NDIS_WORK_ITEM _workitem; ++ ++#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; ++ ++ ++#define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_prev(_list *list) ++{ ++ return list->Blink; ++} ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++ ++__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ WaitForSingleObject(*prwlock, INFINITE ); ++ ++} ++ ++__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ ReleaseMutex(*prwlock); ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++ ++// limitation of path length ++#define PATH_LENGTH_MAX MAX_PATH ++ ++//Atomic integer operations ++#define ATOMIC_T LONG ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) "" ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) "" ++#define FUNC_NDEV_FMT "%s" ++#define FUNC_NDEV_ARG(ndev) __func__ ++#define FUNC_ADPT_FMT "%s" ++#define FUNC_ADPT_ARG(adapter) __func__ ++ ++#define STRUCT_PACKED ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_linux.h b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_linux.h new file mode 100644 -index 000000000..b9abd4379 +index 0000000..80d9353 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_linux.h -@@ -0,0 +1,429 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __OSDEP_LINUX_SERVICE_H_ -+#define __OSDEP_LINUX_SERVICE_H_ -+ -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5)) -+ #include -+#endif -+ //#include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) -+ #include -+#else -+ #include -+#endif -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include // for struct tasklet_struct -+ #include -+ #include -+ #include -+ #include -+ -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41)) -+ #include -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)) -+ #include -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 0)) -+ #include -+#else -+ #include -+#endif -+ -+#ifdef RTK_DMP_PLATFORM -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) -+ #include -+#endif -+ #include -+#endif -+ -+#ifdef CONFIG_NET_RADIO -+ #define CONFIG_WIRELESS_EXT -+#endif -+ -+ /* Monitor mode */ -+ #include -+ #include -+#ifdef CONFIG_IOCTL_CFG80211 -+/* #include */ -+ #include -+#endif //CONFIG_IOCTL_CFG80211 -+ -+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX -+ #include -+ #include -+#endif -+ -+#ifdef CONFIG_HAS_EARLYSUSPEND -+ #include -+#endif //CONFIG_HAS_EARLYSUSPEND -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+ #include -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ #include -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) -+ #include -+#else -+ #include -+#endif -+#endif -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ #include -+ #include -+ #include -+ #include -+ #include -+#endif //CONFIG_BT_COEXIST_SOCKET_TRX -+ -+#ifdef CONFIG_USB_HCI -+ typedef struct urb * PURB; -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) -+#ifdef CONFIG_USB_SUSPEND -+#define CONFIG_AUTOSUSPEND 1 -+#endif -+#endif -+#endif -+ -+ typedef struct semaphore _sema; -+ typedef spinlock_t _lock; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ typedef struct mutex _mutex; -+#else -+ typedef struct semaphore _mutex; -+#endif -+ typedef struct timer_list _timer; -+ -+ struct __queue { -+ struct list_head queue; -+ _lock lock; -+ }; -+ -+ typedef struct sk_buff _pkt; -+ typedef unsigned char _buffer; -+ -+ typedef struct __queue _queue; -+ typedef struct list_head _list; -+ typedef int _OS_STATUS; -+ //typedef u32 _irqL; -+ typedef unsigned long _irqL; -+ typedef struct net_device * _nic_hdl; -+ -+ typedef void* _thread_hdl_; -+ typedef int thread_return; -+ typedef void* thread_context; -+ -+ #define thread_exit() complete_and_exit(NULL, 0) -+ -+ typedef void timer_hdl_return; -+ typedef void* timer_hdl_context; -+ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) -+ typedef struct work_struct _workitem; -+#else -+ typedef struct tq_struct _workitem; -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) -+ #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) -+// Porting from linux kernel, for compatible with old kernel. -+static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb) -+{ -+ return skb->tail; -+} -+ -+static inline void skb_reset_tail_pointer(struct sk_buff *skb) -+{ -+ skb->tail = skb->data; -+} -+ -+static inline void skb_set_tail_pointer(struct sk_buff *skb, const int offset) -+{ -+ skb->tail = skb->data + offset; -+} -+ -+static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) -+{ -+ return skb->end; -+} -+#endif -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->next; -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return (&(queue->queue)); -+} -+ -+ -+#define LIST_CONTAINOR(ptr, type, member) \ -+ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) -+ -+ -+__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_bh(plock); -+} -+ -+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_bh(plock); -+} -+ -+__inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ int ret = 0; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ //mutex_lock(pmutex); -+ ret = mutex_lock_interruptible(pmutex); -+#else -+ ret = down_interruptible(pmutex); -+#endif -+ return ret; -+} -+ -+ -+__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ mutex_unlock(pmutex); -+#else -+ up(pmutex); -+#endif -+} -+ -+__inline static void rtw_list_delete(_list *plist) -+{ -+ list_del_init(plist); -+} -+ -+#define RTW_TIMER_HDL_ARGS void *FunctionContext -+ -+__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx) -+{ -+ //setup_timer(ptimer, pfunc,(u32)cntx); -+ ptimer->function = pfunc; -+ ptimer->data = (unsigned long)cntx; -+ init_timer(ptimer); -+} -+ -+__inline static void _set_timer(_timer *ptimer,u32 delay_time) -+{ -+ mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); -+} -+ -+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) -+{ -+ del_timer_sync(ptimer); -+ *bcancelled = 1; -+} -+ -+ -+static inline void _init_workitem(_workitem *pwork, void *pfunc, void *cntx) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) -+ INIT_WORK(pwork, pfunc); -+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) -+ INIT_WORK(pwork, pfunc,pwork); -+#else -+ INIT_TQUEUE(pwork, pfunc,pwork); -+#endif -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) -+ schedule_work(pwork); -+#else -+ schedule_task(pwork); -+#endif -+} -+ -+__inline static void _cancel_workitem_sync(_workitem *pwork) -+{ -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) -+ cancel_work_sync(pwork); -+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) -+ flush_scheduled_work(); -+#else -+ flush_scheduled_tasks(); -+#endif -+} -+// -+// Global Mutex: can only be used at PASSIVE level. -+// -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ -+ { \ -+ atomic_dec((atomic_t *)&(_MutexCounter)); \ -+ msleep(10); \ -+ } \ -+} -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ atomic_dec((atomic_t *)&(_MutexCounter)); \ -+} -+ -+static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) -+ return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && -+ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) && -+ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) && -+ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)) ); -+#else -+ return netif_queue_stopped(pnetdev); -+#endif -+} -+ -+static inline void rtw_netif_wake_queue(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) -+ netif_tx_wake_all_queues(pnetdev); -+#else -+ netif_wake_queue(pnetdev); -+#endif -+} -+ -+static inline void rtw_netif_start_queue(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) -+ netif_tx_start_all_queues(pnetdev); -+#else -+ netif_start_queue(pnetdev); -+#endif -+} -+ -+static inline void rtw_netif_stop_queue(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) -+ netif_tx_stop_all_queues(pnetdev); -+#else -+ netif_stop_queue(pnetdev); -+#endif -+} -+ -+static inline void rtw_merge_string(char *dst, int dst_len, const char *src1, const char *src2) -+{ -+ int len = 0; -+ len += snprintf(dst+len, dst_len - len, "%s", src1); -+ len += snprintf(dst+len, dst_len - len, "%s", src2); -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) -+#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1) -+#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) -+#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) -+#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) -+ -+ -+// Suspend lock prevent system from going suspend -+#ifdef CONFIG_WAKELOCK -+#include -+#elif defined(CONFIG_ANDROID_POWER) -+#include -+#endif -+ -+// limitation of path length -+#define PATH_LENGTH_MAX PATH_MAX -+ -+//Atomic integer operations -+#define ATOMIC_T atomic_t -+ -+#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv ) -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) ndev->name -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) adapter->pnetdev->name -+#define FUNC_NDEV_FMT "%s(%s)" -+#define FUNC_NDEV_ARG(ndev) __func__, ndev->name -+#define FUNC_ADPT_FMT "%s(%s)" -+#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name -+ -+struct rtw_netdev_priv_indicator { -+ void *priv; -+ u32 sizeof_priv; -+}; -+struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); -+extern struct net_device * rtw_alloc_etherdev(int sizeof_priv); -+ -+#define STRUCT_PACKED __attribute__ ((packed)) -+ -+ -+#endif -+ +@@ -0,0 +1,428 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_LINUX_SERVICE_H_ ++#define __OSDEP_LINUX_SERVICE_H_ ++ ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5)) ++ #include ++#endif ++ //#include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ #include ++#else ++ #include ++#endif ++ #include ++ #include ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) ++ #include ++#endif ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include // for struct tasklet_struct ++ #include ++ #include ++ #include ++ #include ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41)) ++ #include ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 0)) ++ #include ++#else ++ #include ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ #include ++#endif ++ #include ++#endif ++ ++#ifdef CONFIG_NET_RADIO ++ #define CONFIG_WIRELESS_EXT ++#endif ++ ++ /* Monitor mode */ ++ #include ++ #include ++#ifdef CONFIG_IOCTL_CFG80211 ++/* #include */ ++ #include ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ #include ++ #include ++#endif ++ ++#ifdef CONFIG_HAS_EARLYSUSPEND ++ #include ++#endif //CONFIG_HAS_EARLYSUSPEND ++ ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++ #include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) ++ #include ++#else ++ #include ++#endif ++#endif ++ ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ #include ++ #include ++ #include ++ #include ++ #include ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++ ++#ifdef CONFIG_USB_HCI ++ typedef struct urb * PURB; ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) ++#ifdef CONFIG_USB_SUSPEND ++#define CONFIG_AUTOSUSPEND 1 ++#endif ++#endif ++#endif ++ ++ typedef struct semaphore _sema; ++ typedef spinlock_t _lock; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ typedef struct mutex _mutex; ++#else ++ typedef struct semaphore _mutex; ++#endif ++ typedef struct timer_list _timer; ++ ++ struct __queue { ++ struct list_head queue; ++ _lock lock; ++ }; ++ ++ typedef struct sk_buff _pkt; ++ typedef unsigned char _buffer; ++ ++ typedef struct __queue _queue; ++ typedef struct list_head _list; ++ typedef int _OS_STATUS; ++ //typedef u32 _irqL; ++ typedef unsigned long _irqL; ++ typedef struct net_device * _nic_hdl; ++ ++ typedef void* _thread_hdl_; ++ typedef int thread_return; ++ typedef void* thread_context; ++ ++ #define thread_exit() complete_and_exit(NULL, 0) ++ ++ typedef void timer_hdl_return; ++ typedef void* timer_hdl_context; ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ typedef struct work_struct _workitem; ++#else ++ typedef struct tq_struct _workitem; ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) ++// Porting from linux kernel, for compatible with old kernel. ++static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb) ++{ ++ return skb->tail; ++} ++ ++static inline void skb_reset_tail_pointer(struct sk_buff *skb) ++{ ++ skb->tail = skb->data; ++} ++ ++static inline void skb_set_tail_pointer(struct sk_buff *skb, const int offset) ++{ ++ skb->tail = skb->data + offset; ++} ++ ++static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) ++{ ++ return skb->end; ++} ++#endif ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->next; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++ ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_bh(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_bh(plock); ++} ++ ++__inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ int ret = 0; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ //mutex_lock(pmutex); ++ ret = mutex_lock_interruptible(pmutex); ++#else ++ ret = down_interruptible(pmutex); ++#endif ++ return ret; ++} ++ ++ ++__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_unlock(pmutex); ++#else ++ up(pmutex); ++#endif ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ list_del_init(plist); ++} ++ ++#define RTW_TIMER_HDL_ARGS void *FunctionContext ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx) ++{ ++ //setup_timer(ptimer, pfunc,(u32)cntx); ++ ptimer->function = pfunc; ++ ptimer->data = (unsigned long)cntx; ++ init_timer(ptimer); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ del_timer_sync(ptimer); ++ *bcancelled = 1; ++} ++ ++ ++static inline void _init_workitem(_workitem *pwork, void *pfunc, void *cntx) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) ++ INIT_WORK(pwork, pfunc); ++#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ INIT_WORK(pwork, pfunc,pwork); ++#else ++ INIT_TQUEUE(pwork, pfunc,pwork); ++#endif ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ schedule_work(pwork); ++#else ++ schedule_task(pwork); ++#endif ++} ++ ++__inline static void _cancel_workitem_sync(_workitem *pwork) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) ++ cancel_work_sync(pwork); ++#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ flush_scheduled_work(); ++#else ++ flush_scheduled_tasks(); ++#endif ++} ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ ++ { \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++ msleep(10); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++} ++ ++static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)) ); ++#else ++ return netif_queue_stopped(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_wake_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_wake_all_queues(pnetdev); ++#else ++ netif_wake_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_start_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_start_all_queues(pnetdev); ++#else ++ netif_start_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_stop_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_stop_all_queues(pnetdev); ++#else ++ netif_stop_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_merge_string(char *dst, int dst_len, const char *src1, const char *src2) ++{ ++ int len = 0; ++ len += snprintf(dst+len, dst_len - len, "%s", src1); ++ len += snprintf(dst+len, dst_len - len, "%s", src2); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1) ++#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) ++#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++ ++ ++// Suspend lock prevent system from going suspend ++#ifdef CONFIG_WAKELOCK ++#include ++#elif defined(CONFIG_ANDROID_POWER) ++#include ++#endif ++ ++// limitation of path length ++#define PATH_LENGTH_MAX PATH_MAX ++ ++//Atomic integer operations ++#define ATOMIC_T atomic_t ++ ++#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv ) ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) ndev->name ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) adapter->pnetdev->name ++#define FUNC_NDEV_FMT "%s(%s)" ++#define FUNC_NDEV_ARG(ndev) __func__, ndev->name ++#define FUNC_ADPT_FMT "%s(%s)" ++#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name ++ ++struct rtw_netdev_priv_indicator { ++ void *priv; ++ u32 sizeof_priv; ++}; ++struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); ++extern struct net_device * rtw_alloc_etherdev(int sizeof_priv); ++ ++#define STRUCT_PACKED __attribute__ ((packed)) ++ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_xp.h b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_xp.h new file mode 100644 -index 000000000..61b1a00f5 +index 0000000..45d54af --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/osdep_service_xp.h @@ -0,0 +1,202 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __OSDEP_LINUX_SERVICE_H_ -+#define __OSDEP_LINUX_SERVICE_H_ -+ -+ #include -+ #include -+ #include -+ #include -+ -+#ifdef CONFIG_USB_HCI -+ #include -+ #include -+ #include -+#endif -+ -+ typedef KSEMAPHORE _sema; -+ typedef LIST_ENTRY _list; -+ typedef NDIS_STATUS _OS_STATUS; -+ -+ -+ typedef NDIS_SPIN_LOCK _lock; -+ -+ typedef KMUTEX _mutex; -+ -+ typedef KIRQL _irqL; -+ -+ // USB_PIPE for WINCE , but handle can be use just integer under windows -+ typedef NDIS_HANDLE _nic_hdl; -+ -+ -+ typedef NDIS_MINIPORT_TIMER _timer; -+ -+ struct __queue { -+ LIST_ENTRY queue; -+ _lock lock; -+ }; -+ -+ typedef NDIS_PACKET _pkt; -+ typedef NDIS_BUFFER _buffer; -+ typedef struct __queue _queue; -+ -+ typedef PKTHREAD _thread_hdl_; -+ typedef void thread_return; -+ typedef void* thread_context; -+ -+ typedef NDIS_WORK_ITEM _workitem; -+ -+ #define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS); -+ -+ #define HZ 10000000 -+ #define SEMA_UPBND (0x7FFFFFFF) //8192 -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->Flink; -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return (&(queue->queue)); -+} -+ -+ -+#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) -+ -+ -+__inline static _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisAcquireSpinLock(plock); -+} -+ -+__inline static _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisReleaseSpinLock(plock); -+} -+ -+ -+__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprAcquireSpinLock(plock); -+} -+ -+__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprReleaseSpinLock(plock); -+} -+ -+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprAcquireSpinLock(plock); -+} -+ -+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprReleaseSpinLock(plock); -+} -+ -+__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); -+} -+ -+ -+__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ KeReleaseMutex(pmutex, FALSE); -+} -+ -+ -+__inline static void rtw_list_delete(_list *plist) -+{ -+ RemoveEntryList(plist); -+ InitializeListHead(plist); -+} -+ -+#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 -+ -+__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) -+{ -+ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); -+} -+ -+__inline static void _set_timer(_timer *ptimer,u32 delay_time) -+{ -+ NdisMSetTimer(ptimer,delay_time); -+} -+ -+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) -+{ -+ NdisMCancelTimer(ptimer,bcancelled); -+} -+ -+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -+{ -+ -+ NdisInitializeWorkItem(pwork, pfunc, cntx); -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+ NdisScheduleWorkItem(pwork); -+} -+ -+ -+#define ATOMIC_INIT(i) { (i) } -+ -+// -+// Global Mutex: can only be used at PASSIVE level. -+// -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ -+ { \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+ NdisMSleep(10000); \ -+ } \ -+} -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+} -+ -+// limitation of path length -+#define PATH_LENGTH_MAX MAX_PATH -+ -+//Atomic integer operations -+#define ATOMIC_T LONG -+ -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) "" -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) "" -+#define FUNC_NDEV_FMT "%s" -+#define FUNC_NDEV_ARG(ndev) __func__ -+#define FUNC_ADPT_FMT "%s" -+#define FUNC_ADPT_ARG(adapter) __func__ -+ -+#define STRUCT_PACKED -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_LINUX_SERVICE_H_ ++#define __OSDEP_LINUX_SERVICE_H_ ++ ++ #include ++ #include ++ #include ++ #include ++ ++#ifdef CONFIG_USB_HCI ++ #include ++ #include ++ #include ++#endif ++ ++ typedef KSEMAPHORE _sema; ++ typedef LIST_ENTRY _list; ++ typedef NDIS_STATUS _OS_STATUS; ++ ++ ++ typedef NDIS_SPIN_LOCK _lock; ++ ++ typedef KMUTEX _mutex; ++ ++ typedef KIRQL _irqL; ++ ++ // USB_PIPE for WINCE , but handle can be use just integer under windows ++ typedef NDIS_HANDLE _nic_hdl; ++ ++ ++ typedef NDIS_MINIPORT_TIMER _timer; ++ ++ struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++ }; ++ ++ typedef NDIS_PACKET _pkt; ++ typedef NDIS_BUFFER _buffer; ++ typedef struct __queue _queue; ++ ++ typedef PKTHREAD _thread_hdl_; ++ typedef void thread_return; ++ typedef void* thread_context; ++ ++ typedef NDIS_WORK_ITEM _workitem; ++ ++ #define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS); ++ ++ #define HZ 10000000 ++ #define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++ ++__inline static _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); ++} ++ ++ ++__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeReleaseMutex(pmutex, FALSE); ++} ++ ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++ ++// limitation of path length ++#define PATH_LENGTH_MAX MAX_PATH ++ ++//Atomic integer operations ++#define ATOMIC_T LONG ++ ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) "" ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) "" ++#define FUNC_NDEV_FMT "%s" ++#define FUNC_NDEV_ARG(ndev) __func__ ++#define FUNC_ADPT_FMT "%s" ++#define FUNC_ADPT_ARG(adapter) __func__ ++ ++#define STRUCT_PACKED ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/pci_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/pci_hal.h new file mode 100644 -index 000000000..00157707c +index 0000000..0015770 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/pci_hal.h @@ -0,0 +1,46 @@ @@ -286495,7 +327927,7 @@ index 000000000..00157707c + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/pci_ops.h b/drivers/net/wireless/realtek/rtl8189fs/include/pci_ops.h new file mode 100644 -index 000000000..07add1684 +index 0000000..07add16 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/pci_ops.h @@ -0,0 +1,78 @@ @@ -286579,7 +328011,7 @@ index 000000000..07add1684 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/pci_osintf.h b/drivers/net/wireless/realtek/rtl8189fs/include/pci_osintf.h new file mode 100644 -index 000000000..9df50f733 +index 0000000..9df50f7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/pci_osintf.h @@ -0,0 +1,32 @@ @@ -286617,7 +328049,7 @@ index 000000000..9df50f733 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/recv_osdep.h b/drivers/net/wireless/realtek/rtl8189fs/include/recv_osdep.h new file mode 100644 -index 000000000..0a65313ff +index 0000000..0a65313 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/recv_osdep.h @@ -0,0 +1,65 @@ @@ -286688,7 +328120,7 @@ index 000000000..0a65313ff + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_cmd.h new file mode 100644 -index 000000000..76e426d57 +index 0000000..76e426d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_cmd.h @@ -0,0 +1,186 @@ @@ -286880,7 +328312,7 @@ index 000000000..76e426d57 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_dm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_dm.h new file mode 100644 -index 000000000..eb97de187 +index 0000000..eb97de1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_dm.h @@ -0,0 +1,37 @@ @@ -286923,573 +328355,573 @@ index 000000000..eb97de187 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_hal.h new file mode 100644 -index 000000000..5d391a924 +index 0000000..20e7bb4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_hal.h @@ -0,0 +1,332 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8188E_HAL_H__ -+#define __RTL8188E_HAL_H__ -+ -+//#include "hal_com.h" -+#include "hal_data.h" -+ -+//include HAL Related header after HAL Related compiling flags -+#include "rtl8188e_spec.h" -+#include "Hal8188EPhyReg.h" -+#include "Hal8188EPhyCfg.h" -+#include "rtl8188e_rf.h" -+#include "rtl8188e_dm.h" -+#include "rtl8188e_recv.h" -+#include "rtl8188e_xmit.h" -+#include "rtl8188e_cmd.h" -+#include "rtl8188e_led.h" -+#include "Hal8188EPwrSeq.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8188e_sreset.h" -+#endif -+ -+#if 0 -+ // Fw Array -+ #define Rtl8188E_FwImageArray Rtl8188EFwImgArray -+ #define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength -+#ifdef CONFIG_WOWLAN -+ #define Rtl8188E_FwWoWImageArray Array_MP_8188E_FW_WoWLAN -+ #define Rtl8188E_FwWoWImgArrayLength ArrayLength_MP_8188E_FW_WoWLAN -+#endif //CONFIG_WOWLAN -+#endif -+ -+ -+ #define RTL8188E_FW_IMG "rtl8188e/FW_NIC.bin" -+ #define RTL8188E_FW_WW_IMG "rtl8188e/FW_WoWLAN.bin" -+ #define RTL8188E_PHY_REG "rtl8188e/PHY_REG.txt" -+ #define RTL8188E_PHY_RADIO_A "rtl8188e/RadioA.txt" -+ #define RTL8188E_PHY_RADIO_B "rtl8188e/RadioB.txt" -+ #define RTL8188E_TXPWR_TRACK "rtl8188e/TxPowerTrack.txt" -+ #define RTL8188E_AGC_TAB "rtl8188e/AGC_TAB.txt" -+ #define RTL8188E_PHY_MACREG "rtl8188e/MAC_REG.txt" -+ #define RTL8188E_PHY_REG_PG "rtl8188e/PHY_REG_PG.txt" -+ #define RTL8188E_PHY_REG_MP "rtl8188e/PHY_REG_MP.txt" -+ #define RTL8188E_TXPWR_LMT "rtl8188e/TXPWR_LMT.txt" -+ -+ //--------------------------------------------------------------------- -+ // RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces -+ //--------------------------------------------------------------------- -+ #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow -+ #define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow -+ #define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow -+ #define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow -+ #define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow -+ #define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow -+ #define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow -+ #define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow -+ #define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow -+ -+ -+#if 1 // download firmware related data structure -+#define MAX_FW_8188E_SIZE 0x8000 //32768,32k / 16384,16k -+ -+#define FW_8188E_SIZE 0x4000 //16384,16k -+#define FW_8188E_SIZE_2 0x8000 //32768,32k -+ -+#define FW_8188E_START_ADDRESS 0x1000 -+#define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF -+ -+ -+#define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0) -+ -+typedef struct _RT_FIRMWARE_8188E { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8* szFwBuffer; -+#else -+ u8 szFwBuffer[MAX_FW_8188E_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; -+ -+// -+// This structure must be cared byte-ordering -+// -+ -+typedef struct _RT_8188E_FIRMWARE_HDR -+{ -+ // 8-byte alinment required -+ -+ //--- LONG WORD 0 ---- -+ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut -+ u8 Category; // AP/NIC and USB/PCI -+ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions -+ u16 Version; // FW Version -+ u8 Subversion; // FW Subversion, default 0x00 -+ u16 Rsvd1; -+ -+ -+ //--- LONG WORD 1 ---- -+ u8 Month; // Release time Month field -+ u8 Date; // Release time Date field -+ u8 Hour; // Release time Hour field -+ u8 Minute; // Release time Minute field -+ u16 RamCodeSize; // The size of RAM code -+ u8 Foundry; -+ u8 Rsvd2; -+ -+ //--- LONG WORD 2 ---- -+ u32 SvnIdx; // The SVN entry index -+ u32 Rsvd3; -+ -+ //--- LONG WORD 3 ---- -+ u32 Rsvd4; -+ u32 Rsvd5; -+}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; -+#endif // download firmware related data structure -+ -+ -+#define DRIVER_EARLY_INT_TIME_8188E 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8188E 0x02 -+ -+ -+//#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) -+#define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000) -+ -+#ifdef CONFIG_WOWLAN -+#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ -+#else -+#define RESV_FMWF 0 -+#endif -+ -+#define RX_DMA_RESERVD_FW_FEATURE 0x200 /* for tx report (64*8) */ -+ -+#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) RX_DMA_SIZE_88E(__Adapter)-RX_DMA_RESERVD_FW_FEATURE -+ -+#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */ -+ -+// Note: We will divide number of page equally for each queue other than public queue! -+// 22k = 22528 bytes = 176 pages (@page = 128 bytes) -+// must reserved about 7 pages for LPS => 176-7 = 169 (0xA9) -+// 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS null-data -+ -+#define BCNQ_PAGE_NUM_88E 0x08 -+ -+//For WoWLan , more reserved page -+#ifdef CONFIG_WOWLAN -+#define WOWLAN_PAGE_NUM_88E 0x00 -+#else -+#define WOWLAN_PAGE_NUM_88E 0x00 -+#endif -+ -+/* Note: -+Tx FIFO Size : previous CUT:22K /I_CUT after:32KB -+Tx page Size : 128B -+Total page numbers : 176(0xB0) / 256(0x100) -+*/ -+#define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */ -+#define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) -+#define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */ -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) TX_TOTAL_PAGE_NUMBER_88E(_Adapter) -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E(_Adapter) (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) -+ -+// For Normal Chip Setting -+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B -+#define NORMAL_PAGE_NUM_HPQ_88E 0x0 -+#define NORMAL_PAGE_NUM_LPQ_88E 0x09 -+#define NORMAL_PAGE_NUM_NPQ_88E 0x0 -+ -+// Note: For Normal Chip Setting, modify later -+#define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 -+#define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C -+#define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C -+ -+ -+//------------------------------------------------------------------------- -+// Chip specific -+//------------------------------------------------------------------------- -+#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) -+#define CHIP_BONDING_92C_1T2R 0x1 -+#define CHIP_BONDING_88C_USB_MCARD 0x2 -+#define CHIP_BONDING_88C_USB_HP 0x1 -+ -+//------------------------------------------------------------------------- -+// Channel Plan -+//------------------------------------------------------------------------- -+ -+ -+#define EFUSE_REAL_CONTENT_LEN 512 -+#define EFUSE_MAP_LEN 128 -+#define EFUSE_MAX_SECTION 16 -+#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) -+// -+// -+// To prevent out of boundary programming case, -+// leave 1byte and program full section -+// 9bytes + 1byt + 5bytes and pre 1byte. -+// For worst case: -+// | 1byte|----8bytes----|1byte|--5bytes--| -+// | | Reserved(14bytes) | -+// -+#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. -+ -+#define EFUSE_REAL_CONTENT_LEN_88E 256 -+#define EFUSE_MAP_LEN_88E 512 -+#define EFUSE_MAX_SECTION_88E 64 -+#define EFUSE_MAX_WORD_UNIT_88E 4 -+#define EFUSE_IC_ID_OFFSET_88E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. -+#define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) -+// To prevent out of boundary programming case, leave 1byte and program full section -+// 9bytes + 1byt + 5bytes and pre 1byte. -+// For worst case: -+// | 2byte|----8bytes----|1byte|--7bytes--| //92D -+#define EFUSE_OOB_PROTECT_BYTES_88E 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. -+#define EFUSE_PROTECT_BYTES_BANK_88E 16 -+ -+ -+//======================================================== -+// EFUSE for BT definition -+//======================================================== -+#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 -+#define EFUSE_BT_MAP_LEN 1024 // 1k bytes -+#define EFUSE_BT_MAX_SECTION 128 // 1024/8 -+ -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) -+ -+//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) -+ -+#ifdef CONFIG_PCI_HCI -+ /* according to the define in the rtw_xmit.h, rtw_recv.h */ -+#define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ -+#ifdef CONFIG_CONCURRENT_MODE -+/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */ -+#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */ -+/*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */ -+#else -+#define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ -+/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) *//* 192 */ -+#endif -+ -+void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); -+void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif //CONFIG_PCI_HCI -+ -+// rtl8188e_hal_init.c -+ -+s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void _8051Reset88E(PADAPTER padapter); -+void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); -+ -+ -+s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); -+ -+// EFuse -+u8 GetEEPROMSize8188E(PADAPTER padapter); -+void Hal_InitPGData88E(PADAPTER padapter); -+void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); -+void Hal_ReadTxPowerInfo88E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+ -+void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadAntennaDiversity88E (PADAPTER pAdapter,u8*PROMContent,BOOLEAN AutoLoadFail); -+void Hal_ReadThermalMeter_88E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); -+void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBoardType88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+ -+BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif //CONFIG_WOWLAN -+ -+ -+#ifdef CONFIG_RF_GAIN_OFFSET -+void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+#endif //CONFIG_RF_GAIN_OFFSET -+ -+void rtl8188e_init_default_value(_adapter *adapter); -+ -+void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8188e(_adapter *adapter); -+ -+// register -+void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); -+ -+void rtl8188e_start_thread(_adapter *padapter); -+void rtl8188e_stop_thread(_adapter *padapter); -+ -+void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len); -+#ifdef CONFIG_IOL_EFUSE_PATCH -+s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); -+#endif//CONFIG_IOL_EFUSE_PATCH -+void _InitTransferPageSize(PADAPTER padapter); -+ -+void SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); -+void ResumeTxBeacon(PADAPTER padapter); -+void StopTxBeacon(PADAPTER padapter); -+u8 -+GetHalDefVar8188E( -+ IN PADAPTER Adapter, -+ IN HAL_DEF_VARIABLE eVariable, -+ IN PVOID pValue -+ ); -+#endif //__RTL8188E_HAL_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_HAL_H__ ++#define __RTL8188E_HAL_H__ ++ ++//#include "hal_com.h" ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8188e_spec.h" ++#include "Hal8188EPhyReg.h" ++#include "Hal8188EPhyCfg.h" ++#include "rtl8188e_rf.h" ++#include "rtl8188e_dm.h" ++#include "rtl8188e_recv.h" ++#include "rtl8188e_xmit.h" ++#include "rtl8188e_cmd.h" ++#include "rtl8188e_led.h" ++#include "Hal8188EPwrSeq.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8188e_sreset.h" ++#endif ++ ++#if 0 ++ // Fw Array ++ #define Rtl8188E_FwImageArray Rtl8188EFwImgArray ++ #define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength ++#ifdef CONFIG_WOWLAN ++ #define Rtl8188E_FwWoWImageArray Array_MP_8188E_FW_WoWLAN ++ #define Rtl8188E_FwWoWImgArrayLength ArrayLength_MP_8188E_FW_WoWLAN ++#endif //CONFIG_WOWLAN ++#endif ++ ++ ++ #define RTL8188E_FW_IMG "rtl8188e/FW_NIC.bin" ++ #define RTL8188E_FW_WW_IMG "rtl8188e/FW_WoWLAN.bin" ++ #define RTL8188E_PHY_REG "rtl8188e/PHY_REG.txt" ++ #define RTL8188E_PHY_RADIO_A "rtl8188e/RadioA.txt" ++ #define RTL8188E_PHY_RADIO_B "rtl8188e/RadioB.txt" ++ #define RTL8188E_TXPWR_TRACK "rtl8188e/TxPowerTrack.txt" ++ #define RTL8188E_AGC_TAB "rtl8188e/AGC_TAB.txt" ++ #define RTL8188E_PHY_MACREG "rtl8188e/MAC_REG.txt" ++ #define RTL8188E_PHY_REG_PG "rtl8188e/PHY_REG_PG.txt" ++ #define RTL8188E_PHY_REG_MP "rtl8188e/PHY_REG_MP.txt" ++ #define RTL8188E_TXPWR_LMT "rtl8188e/TXPWR_LMT.txt" ++ ++ //--------------------------------------------------------------------- ++ // RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces ++ //--------------------------------------------------------------------- ++ #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow ++ #define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow ++ #define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow ++ #define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow ++ #define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow ++ #define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow ++ #define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow ++ #define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow ++ #define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow ++ ++ ++#if 1 // download firmware related data structure ++#define MAX_FW_8188E_SIZE 0x8000 //32768,32k / 16384,16k ++ ++#define FW_8188E_SIZE 0x4000 //16384,16k ++#define FW_8188E_SIZE_2 0x8000 //32768,32k ++ ++#define FW_8188E_START_ADDRESS 0x1000 ++#define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF ++ ++ ++#define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0) ++ ++typedef struct _RT_FIRMWARE_8188E { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[MAX_FW_8188E_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; ++ ++// ++// This structure must be cared byte-ordering ++// ++ ++typedef struct _RT_8188E_FIRMWARE_HDR ++{ ++ // 8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u8 Subversion; // FW Subversion, default 0x00 ++ u16 Rsvd1; ++ ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u8 Foundry; ++ u8 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; ++#endif // download firmware related data structure ++ ++ ++#define DRIVER_EARLY_INT_TIME_8188E 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8188E 0x02 ++ ++ ++//#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) ++#define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000) ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#define RX_DMA_RESERVD_FW_FEATURE 0x200 /* for tx report (64*8) */ ++ ++#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) RX_DMA_SIZE_88E(__Adapter)-RX_DMA_RESERVD_FW_FEATURE ++ ++#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++// 22k = 22528 bytes = 176 pages (@page = 128 bytes) ++// must reserved about 7 pages for LPS => 176-7 = 169 (0xA9) ++// 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS null-data ++ ++#define BCNQ_PAGE_NUM_88E 0x08 ++ ++//For WoWLan , more reserved page ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_88E 0x00 ++#else ++#define WOWLAN_PAGE_NUM_88E 0x00 ++#endif ++ ++/* Note: ++Tx FIFO Size : previous CUT:22K /I_CUT after:32KB ++Tx page Size : 128B ++Total page numbers : 176(0xB0) / 256(0x100) ++*/ ++#define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */ ++#define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) ++#define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */ ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) TX_TOTAL_PAGE_NUMBER_88E(_Adapter) ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E(_Adapter) (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B ++#define NORMAL_PAGE_NUM_HPQ_88E 0x0 ++#define NORMAL_PAGE_NUM_LPQ_88E 0x09 ++#define NORMAL_PAGE_NUM_NPQ_88E 0x0 ++ ++// Note: For Normal Chip Setting, modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 ++#define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C ++#define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C ++ ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) ++#define CHIP_BONDING_92C_1T2R 0x1 ++#define CHIP_BONDING_88C_USB_MCARD 0x2 ++#define CHIP_BONDING_88C_USB_HP 0x1 ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++ ++ ++#define EFUSE_REAL_CONTENT_LEN 512 ++#define EFUSE_MAP_LEN 128 ++#define EFUSE_MAX_SECTION 16 ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) ++// ++// ++// To prevent out of boundary programming case, ++// leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++#define EFUSE_REAL_CONTENT_LEN_88E 256 ++#define EFUSE_MAP_LEN_88E 512 ++#define EFUSE_MAX_SECTION_88E 64 ++#define EFUSE_MAX_WORD_UNIT_88E 4 ++#define EFUSE_IC_ID_OFFSET_88E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 2byte|----8bytes----|1byte|--7bytes--| //92D ++#define EFUSE_OOB_PROTECT_BYTES_88E 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. ++#define EFUSE_PROTECT_BYTES_BANK_88E 16 ++ ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++#ifdef CONFIG_PCI_HCI ++ /* according to the define in the rtw_xmit.h, rtw_recv.h */ ++#define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ ++#ifdef CONFIG_CONCURRENT_MODE ++/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */ ++#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */ ++/*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */ ++#else ++#define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ ++/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) *//* 192 */ ++#endif ++ ++void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); ++void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif //CONFIG_PCI_HCI ++ ++// rtl8188e_hal_init.c ++ ++s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); ++void _8051Reset88E(PADAPTER padapter); ++void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); ++ ++ ++s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); ++ ++// EFuse ++u8 GetEEPROMSize8188E(PADAPTER padapter); ++void Hal_InitPGData88E(PADAPTER padapter); ++void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); ++void Hal_ReadTxPowerInfo88E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++ ++void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadAntennaDiversity88E (PADAPTER pAdapter,u8*PROMContent,BOOLEAN AutoLoadFail); ++void Hal_ReadThermalMeter_88E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); ++void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_EfuseParseBoardType88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++ ++BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++void rtl8188e_init_default_value(_adapter *adapter); ++ ++void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8188e(_adapter *adapter); ++ ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++ ++void rtl8188e_start_thread(_adapter *padapter); ++void rtl8188e_stop_thread(_adapter *padapter); ++ ++void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len); ++#ifdef CONFIG_IOL_EFUSE_PATCH ++s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); ++#endif//CONFIG_IOL_EFUSE_PATCH ++void _InitTransferPageSize(PADAPTER padapter); ++ ++void SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); ++void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); ++void ResumeTxBeacon(PADAPTER padapter); ++void StopTxBeacon(PADAPTER padapter); ++u8 ++GetHalDefVar8188E( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ); ++#endif //__RTL8188E_HAL_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_led.h new file mode 100644 -index 000000000..c18ffb89f +index 0000000..4b05994 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_led.h @@ -0,0 +1,41 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8188E_LED_H__ -+#define __RTL8188E_LED_H__ -+ -+ -+//================================================================================ -+// Interface to manipulate LED objects. -+//================================================================================ -+#ifdef CONFIG_USB_HCI -+void rtl8188eu_InitSwLeds(PADAPTER padapter); -+void rtl8188eu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+void rtl8188ee_InitSwLeds(PADAPTER padapter); -+void rtl8188ee_DeInitSwLeds(PADAPTER padapter); -+#endif -+#if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+void rtl8188es_InitSwLeds(PADAPTER padapter); -+void rtl8188es_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_LED_H__ ++#define __RTL8188E_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8188eu_InitSwLeds(PADAPTER padapter); ++void rtl8188eu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8188ee_InitSwLeds(PADAPTER padapter); ++void rtl8188ee_DeInitSwLeds(PADAPTER padapter); ++#endif ++#if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++void rtl8188es_InitSwLeds(PADAPTER padapter); ++void rtl8188es_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_recv.h new file mode 100644 -index 000000000..a1c3e31fb +index 0000000..8326afa --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_recv.h @@ -0,0 +1,175 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8188E_RECV_H__ -+#define __RTL8188E_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ -+#ifndef MAX_RECVBUF_SZ -+#ifdef PLATFORM_OS_CE -+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+#else -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ //#define MAX_RECVBUF_SZ (32768) // 32k -+ //#define MAX_RECVBUF_SZ (16384) //16K -+ //#define MAX_RECVBUF_SZ (10240) //10K -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) // 8K -+ #else -+ #define MAX_RECVBUF_SZ (15360) // 15k < 16k -+ #endif -+ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+ #else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+ #endif -+#endif -+#endif //!MAX_RECVBUF_SZ -+ -+#elif defined(CONFIG_PCI_HCI) -+//#ifndef CONFIG_MINIMAL_MEMORY_USAGE -+// #define MAX_RECVBUF_SZ (9100) -+//#else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+//#endif -+ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+#define MAX_RECVBUF_SZ (10240) -+ -+#endif -+ -+// Rx smooth factor -+#define Rx_Smooth_Factor (20) -+ -+#define TX_RPT1_PKT_LEN 8 -+ -+typedef struct rxreport_8188e -+{ -+ //Offset 0 -+ u32 pktlen:14; -+ u32 crc32:1; -+ u32 icverr:1; -+ u32 drvinfosize:4; -+ u32 security:3; -+ u32 qos:1; -+ u32 shift:2; -+ u32 physt:1; -+ u32 swdec:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 eor:1; -+ u32 own:1; -+ -+ //Offset 4 -+ u32 macid:5; -+ u32 tid:4; -+ u32 hwrsvd:4; -+ u32 amsdu:1; -+ u32 paggr:1; -+ u32 faggr:1; -+ u32 a1fit:4; -+ u32 a2fit:4; -+ u32 pam:1; -+ u32 pwr:1; -+ u32 md:1; -+ u32 mf:1; -+ u32 type:2; -+ u32 mc:1; -+ u32 bc:1; -+ -+ //Offset 8 -+ u32 seq:12; -+ u32 frag:4; -+ u32 nextpktlen:14; -+ u32 nextind:1; -+ u32 rsvd0831:1; -+ -+ //Offset 12 -+ u32 rxmcs:6; -+ u32 rxht:1; -+ u32 gf:1; -+ u32 splcp:1; -+ u32 bw:1; -+ u32 htc:1; -+ u32 eosp:1; -+ u32 bssidfit:2; -+ u32 rpt_sel:2; -+ u32 rsvd1216:13; -+ u32 pattern_match:1; -+ u32 unicastwake:1; -+ u32 magicwake:1; -+ -+ //Offset 16 -+ /* -+ u32 pattern0match:1; -+ u32 pattern1match:1; -+ u32 pattern2match:1; -+ u32 pattern3match:1; -+ u32 pattern4match:1; -+ u32 pattern5match:1; -+ u32 pattern6match:1; -+ u32 pattern7match:1; -+ u32 pattern8match:1; -+ u32 pattern9match:1; -+ u32 patternamatch:1; -+ u32 patternbmatch:1; -+ u32 patterncmatch:1; -+ u32 rsvd1613:19; -+ */ -+ u32 rsvd16; -+ -+ //Offset 20 -+ u32 tsfl; -+ -+ //Offset 24 -+ u32 bassn:12; -+ u32 bavld:1; -+ u32 rsvd2413:19; -+} RXREPORT, *PRXREPORT; -+ -+ -+#if defined (CONFIG_SDIO_HCI)||defined(CONFIG_GSPI_HCI) -+s32 rtl8188es_init_recv_priv(PADAPTER padapter); -+void rtl8188es_free_recv_priv(PADAPTER padapter); -+void rtl8188es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+s32 rtl8188eu_init_recv_priv(PADAPTER padapter); -+void rtl8188eu_free_recv_priv(PADAPTER padapter); -+void rtl8188eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); -+void rtl8188eu_recv_tasklet(void *priv); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8188ee_init_recv_priv(PADAPTER padapter); -+void rtl8188ee_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat); -+ -+#endif /* __RTL8188E_RECV_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_RECV_H__ ++#define __RTL8188E_RECV_H__ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ ++#define MAX_RECVBUF_SZ (10240) ++ ++#endif ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#define TX_RPT1_PKT_LEN 8 ++ ++typedef struct rxreport_8188e ++{ ++ //Offset 0 ++ u32 pktlen:14; ++ u32 crc32:1; ++ u32 icverr:1; ++ u32 drvinfosize:4; ++ u32 security:3; ++ u32 qos:1; ++ u32 shift:2; ++ u32 physt:1; ++ u32 swdec:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 eor:1; ++ u32 own:1; ++ ++ //Offset 4 ++ u32 macid:5; ++ u32 tid:4; ++ u32 hwrsvd:4; ++ u32 amsdu:1; ++ u32 paggr:1; ++ u32 faggr:1; ++ u32 a1fit:4; ++ u32 a2fit:4; ++ u32 pam:1; ++ u32 pwr:1; ++ u32 md:1; ++ u32 mf:1; ++ u32 type:2; ++ u32 mc:1; ++ u32 bc:1; ++ ++ //Offset 8 ++ u32 seq:12; ++ u32 frag:4; ++ u32 nextpktlen:14; ++ u32 nextind:1; ++ u32 rsvd0831:1; ++ ++ //Offset 12 ++ u32 rxmcs:6; ++ u32 rxht:1; ++ u32 gf:1; ++ u32 splcp:1; ++ u32 bw:1; ++ u32 htc:1; ++ u32 eosp:1; ++ u32 bssidfit:2; ++ u32 rpt_sel:2; ++ u32 rsvd1216:13; ++ u32 pattern_match:1; ++ u32 unicastwake:1; ++ u32 magicwake:1; ++ ++ //Offset 16 ++ /* ++ u32 pattern0match:1; ++ u32 pattern1match:1; ++ u32 pattern2match:1; ++ u32 pattern3match:1; ++ u32 pattern4match:1; ++ u32 pattern5match:1; ++ u32 pattern6match:1; ++ u32 pattern7match:1; ++ u32 pattern8match:1; ++ u32 pattern9match:1; ++ u32 patternamatch:1; ++ u32 patternbmatch:1; ++ u32 patterncmatch:1; ++ u32 rsvd1613:19; ++ */ ++ u32 rsvd16; ++ ++ //Offset 20 ++ u32 tsfl; ++ ++ //Offset 24 ++ u32 bassn:12; ++ u32 bavld:1; ++ u32 rsvd2413:19; ++} RXREPORT, *PRXREPORT; ++ ++ ++#if defined (CONFIG_SDIO_HCI)||defined(CONFIG_GSPI_HCI) ++s32 rtl8188es_init_recv_priv(PADAPTER padapter); ++void rtl8188es_free_recv_priv(PADAPTER padapter); ++void rtl8188es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++s32 rtl8188eu_init_recv_priv(PADAPTER padapter); ++void rtl8188eu_free_recv_priv(PADAPTER padapter); ++void rtl8188eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++void rtl8188eu_recv_tasklet(void *priv); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8188ee_init_recv_priv(PADAPTER padapter); ++void rtl8188ee_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat); ++ ++#endif /* __RTL8188E_RECV_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_rf.h new file mode 100644 -index 000000000..28e58f298 +index 0000000..28e58f2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_rf.h @@ -0,0 +1,33 @@ @@ -287528,177 +328960,177 @@ index 000000000..28e58f298 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_spec.h new file mode 100644 -index 000000000..9fe6ea2f4 +index 0000000..a678dd9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_spec.h @@ -0,0 +1,164 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ *******************************************************************************/ -+#ifndef __RTL8188E_SPEC_H__ -+#define __RTL8188E_SPEC_H__ -+ -+ -+//============================================================ -+// 8188E Regsiter offset definition -+//============================================================ -+ -+ -+//============================================================ -+// -+//============================================================ -+ -+//----------------------------------------------------- -+// -+// 0x0000h ~ 0x00FFh System Configuration -+// -+//----------------------------------------------------- -+#define REG_BB_PAD_CTRL 0x0064 -+#define REG_HMEBOX_E0 0x0088 -+#define REG_HMEBOX_E1 0x008A -+#define REG_HMEBOX_E2 0x008C -+#define REG_HMEBOX_E3 0x008E -+#define REG_HMEBOX_EXT_0 0x01F0 -+#define REG_HMEBOX_EXT_1 0x01F4 -+#define REG_HMEBOX_EXT_2 0x01F8 -+#define REG_HMEBOX_EXT_3 0x01FC -+#define REG_HIMR_88E 0x00B0 //RTL8188E -+#define REG_HISR_88E 0x00B4 //RTL8188E -+#define REG_HIMRE_88E 0x00B8 //RTL8188E -+#define REG_HISRE_88E 0x00BC //RTL8188E -+#define REG_MACID_NO_LINK_0 0x0484 -+#define REG_MACID_NO_LINK_1 0x0488 -+#define REG_MACID_PAUSE_0 0x048c -+#define REG_MACID_PAUSE_1 0x0490 -+ -+//----------------------------------------------------- -+// -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+// -+//----------------------------------------------------- -+#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -+#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -+#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+//----------------------------------------------------- -+// -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+// -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+// -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// -+// 0x0300h ~ 0x03FFh PCIe -+// -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// -+// 0x0400h ~ 0x047Fh Protocol Configuration -+// -+//----------------------------------------------------- -+#ifdef CONFIG_WOWLAN -+#define REG_TXPKTBUF_IV_LOW 0x01a4 -+#define REG_TXPKTBUF_IV_HIGH 0x01a8 -+#endif -+ -+//----------------------------------------------------- -+// -+// 0x0500h ~ 0x05FFh EDCA Configuration -+// -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// -+// 0x0600h ~ 0x07FFh WMAC Configuration -+// -+//----------------------------------------------------- -+#ifdef CONFIG_RF_GAIN_OFFSET -+#define EEPROM_RF_GAIN_OFFSET 0xC1 -+#define EEPROM_RF_GAIN_VAL 0xF6 -+#define EEPROM_THERMAL_OFFSET 0xF5 -+#endif //CONFIG_RF_GAIN_OFFSET -+//---------------------------------------------------------------------------- -+// 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) -+//---------------------------------------------------------------------------- -+//IOL config for REG_FDHM0(Reg0x88) -+#define CMD_INIT_LLT BIT0 -+#define CMD_READ_EFUSE_MAP BIT1 -+#define CMD_EFUSE_PATCH BIT2 -+#define CMD_IOCONFIG BIT3 -+#define CMD_INIT_LLT_ERR BIT4 -+#define CMD_READ_EFUSE_MAP_ERR BIT5 -+#define CMD_EFUSE_PATCH_ERR BIT6 -+#define CMD_IOCONFIG_ERR BIT7 -+ -+//----------------------------------------------------- -+// -+// Redifine register definition for compatibility -+// -+//----------------------------------------------------- -+ -+// TODO: use these definition when using REG_xxx naming rule. -+// NOTE: DO NOT Remove these definition. Use later. -+#define ISR_88E REG_HISR_88E -+ -+#ifdef CONFIG_PCI_HCI -+//#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E) -+#define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E) -+ -+#ifdef CONFIG_CONCURRENT_MODE -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E) -+#else -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E) -+#endif -+ -+#define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E) -+#endif -+ -+ -+//======================================================== -+// General definitions -+//======================================================== -+ -+#define MACID_NUM_88E 64 -+#define SEC_CAM_ENT_NUM_88E 32 -+#define NSS_NUM_88E 1 -+#define BAND_CAP_88E (BAND_CAP_2G) -+#define BW_CAP_88E (BW_CAP_20M | BW_CAP_40M) -+ -+//---------------------------------------------------------------------------- -+// 8192C EEPROM/EFUSE share register definition. -+//---------------------------------------------------------------------------- -+ -+#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. -+#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. -+ -+#endif /* __RTL8188E_SPEC_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8188E_SPEC_H__ ++#define __RTL8188E_SPEC_H__ ++ ++ ++//============================================================ ++// 8188E Regsiter offset definition ++//============================================================ ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_BB_PAD_CTRL 0x0064 ++#define REG_HMEBOX_E0 0x0088 ++#define REG_HMEBOX_E1 0x008A ++#define REG_HMEBOX_E2 0x008C ++#define REG_HMEBOX_E3 0x008E ++#define REG_HMEBOX_EXT_0 0x01F0 ++#define REG_HMEBOX_EXT_1 0x01F4 ++#define REG_HMEBOX_EXT_2 0x01F8 ++#define REG_HMEBOX_EXT_3 0x01FC ++#define REG_HIMR_88E 0x00B0 //RTL8188E ++#define REG_HISR_88E 0x00B4 //RTL8188E ++#define REG_HIMRE_88E 0x00B8 //RTL8188E ++#define REG_HISRE_88E 0x00BC //RTL8188E ++#define REG_MACID_NO_LINK_0 0x0484 ++#define REG_MACID_NO_LINK_1 0x0488 ++#define REG_MACID_PAUSE_0 0x048c ++#define REG_MACID_PAUSE_1 0x0490 ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) ++#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) ++#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x01a4 ++#define REG_TXPKTBUF_IV_HIGH 0x01a8 ++#endif ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#ifdef CONFIG_RF_GAIN_OFFSET ++#define EEPROM_RF_GAIN_OFFSET 0xC1 ++#define EEPROM_RF_GAIN_VAL 0xF6 ++#define EEPROM_THERMAL_OFFSET 0xF5 ++#endif //CONFIG_RF_GAIN_OFFSET ++//---------------------------------------------------------------------------- ++// 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) ++//---------------------------------------------------------------------------- ++//IOL config for REG_FDHM0(Reg0x88) ++#define CMD_INIT_LLT BIT0 ++#define CMD_READ_EFUSE_MAP BIT1 ++#define CMD_EFUSE_PATCH BIT2 ++#define CMD_IOCONFIG BIT3 ++#define CMD_INIT_LLT_ERR BIT4 ++#define CMD_READ_EFUSE_MAP_ERR BIT5 ++#define CMD_EFUSE_PATCH_ERR BIT6 ++#define CMD_IOCONFIG_ERR BIT7 ++ ++//----------------------------------------------------- ++// ++// Redifine register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define ISR_88E REG_HISR_88E ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E) ++#define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E) ++ ++#ifdef CONFIG_CONCURRENT_MODE ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E) ++#else ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E) ++#endif ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E) ++#endif ++ ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_88E 64 ++#define SEC_CAM_ENT_NUM_88E 32 ++#define NSS_NUM_88E 1 ++#define BAND_CAP_88E (BAND_CAP_2G) ++#define BW_CAP_88E (BW_CAP_20M | BW_CAP_40M) ++ ++//---------------------------------------------------------------------------- ++// 8192C EEPROM/EFUSE share register definition. ++//---------------------------------------------------------------------------- ++ ++#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. ++#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. ++ ++#endif /* __RTL8188E_SPEC_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_sreset.h new file mode 100644 -index 000000000..34cb21a07 +index 0000000..34cb21a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_sreset.h @@ -0,0 +1,30 @@ @@ -287734,312 +329166,312 @@ index 000000000..34cb21a07 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_xmit.h new file mode 100644 -index 000000000..9ed616470 +index 0000000..793a66b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188e_xmit.h @@ -0,0 +1,299 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8188E_XMIT_H__ -+#define __RTL8188E_XMIT_H__ -+ -+ -+ -+ -+//For 88e early mode -+#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -+#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -+#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -+#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -+#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -+#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -+#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) -+ -+// -+//defined for TX DESC Operation -+// -+ -+#define MAX_TID (15) -+ -+//OFFSET 0 -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+#define BMC BIT(24) -+#define LSG BIT(26) -+#define FSG BIT(27) -+#define OWN BIT(31) -+ -+ -+//OFFSET 4 -+#define PKT_OFFSET_SZ 0 -+#define QSEL_SHT 8 -+#define RATE_ID_SHT 16 -+#define NAVUSEHDR BIT(20) -+#define SEC_TYPE_SHT 22 -+#define PKT_OFFSET_SHT 26 -+ -+//OFFSET 8 -+#define AGG_EN BIT(12) -+#define AGG_BK BIT(16) -+#define AMPDU_DENSITY_SHT 20 -+#define ANTSEL_A BIT(24) -+#define ANTSEL_B BIT(25) -+#define TX_ANT_CCK_SHT 26 -+#define TX_ANTL_SHT 28 -+#define TX_ANT_HT_SHT 30 -+ -+//OFFSET 12 -+#define SEQ_SHT 16 -+#define EN_HWSEQ BIT(31) -+ -+//OFFSET 16 -+#define QOS BIT(6) -+#define HW_SSN BIT(7) -+#define USERATE BIT(8) -+#define DISDATAFB BIT(10) -+#define CTS_2_SELF BIT(11) -+#define RTS_EN BIT(12) -+#define HW_RTS_EN BIT(13) -+#define DATA_SHORT BIT(24) -+#define PWR_STATUS_SHT 15 -+#define DATA_SC_SHT 20 -+#define DATA_BW BIT(25) -+ -+//OFFSET 20 -+#define RTY_LMT_EN BIT(17) -+ -+ -+//OFFSET 20 -+#define SGI BIT(6) -+#define USB_TXAGG_NUM_SHT 24 -+ -+typedef struct txdesc_88e -+{ -+ //Offset 0 -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 own:1; -+ -+ //Offset 4 -+ u32 macid:6; -+ u32 rsvd0406:2; -+ u32 qsel:5; -+ u32 rd_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:4; -+ u32 navusehdr:1; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 rsvd0424:2; -+ u32 pkt_offset:5; // unit: 8 bytes -+ u32 rsvd0431:1; -+ -+ //Offset 8 -+ u32 rts_rc:6; -+ u32 data_rc:6; -+ u32 agg_en:1; -+ u32 rd_en:1; -+ u32 bar_rty_th:2; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 ccx:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 ant_sel_a:1; -+ u32 ant_sel_b:1; -+ u32 tx_ant_cck:2; -+ u32 tx_antl:2; -+ u32 tx_ant_ht:2; -+ -+ //Offset 12 -+ u32 nextheadpage:8; -+ u32 tailpage:8; -+ u32 seq:12; -+ u32 cpu_handle:1; -+ u32 tag1:1; -+ u32 trigger_int:1; -+ u32 hwseq_en:1; -+ -+ //Offset 16 -+ u32 rtsrate:5; -+ u32 ap_dcfe:1; -+ u32 hwseq_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 pwr_status:3; -+ u32 wait_dcts:1; -+ u32 cts2ap_en:1; -+ u32 data_sc:2; -+ u32 data_stbc:2; -+ u32 data_short:1; -+ u32 data_bw:1; -+ u32 rts_short:1; -+ u32 rts_bw:1; -+ u32 rts_sc:2; -+ u32 vcs_stbc:2; -+ -+ //Offset 20 -+ u32 datarate:6; -+ u32 sgi:1; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 usb_txagg_num:8; -+ -+ //Offset 24 -+ u32 txagg_a:5; -+ u32 txagg_b:5; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 mcsg1_max_len:4; -+ u32 mcsg2_max_len:4; -+ u32 mcsg3_max_len:4; -+ u32 mcs7_sgi_max_len:4; -+ -+ //Offset 28 -+ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) -+ u32 sw0:8; /* offset 30 */ -+ u32 sw1:4; -+ u32 mcs15_sgi_max_len:4; -+}TXDESC_8188E, *PTXDESC_8188E; -+ -+#define txdesc_set_ccx_sw_88e(txdesc, value) \ -+ do { \ -+ ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ -+ ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ -+ } while (0) -+ -+struct txrpt_ccx_88e { -+ /* offset 0 */ -+ u8 tag1:1; -+ u8 pkt_num:3; -+ u8 txdma_underflow:1; -+ u8 int_bt:1; -+ u8 int_tri:1; -+ u8 int_ccx:1; -+ -+ /* offset 1 */ -+ u8 mac_id:6; -+ u8 pkt_ok:1; -+ u8 bmc:1; -+ -+ /* offset 2 */ -+ u8 retry_cnt:6; -+ u8 lifetime_over:1; -+ u8 retry_over:1; -+ -+ /* offset 3 */ -+ u8 ccx_qtime0; -+ u8 ccx_qtime1; -+ -+ /* offset 5 */ -+ u8 final_data_rate; -+ -+ /* offset 6 */ -+ u8 sw1:4; -+ u8 qsel:4; -+ -+ /* offset 7 */ -+ u8 sw0; -+}; -+ -+#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) -+#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) -+ -+#define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+ -+void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, -+ u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); -+void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) -+s32 rtl8188es_init_xmit_priv(PADAPTER padapter); -+void rtl8188es_free_xmit_priv(PADAPTER padapter); -+s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+thread_return rtl8188es_xmit_thread(thread_context context); -+s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); -+ -+#ifdef CONFIG_SDIO_TX_TASKLET -+void rtl8188es_xmit_tasklet(void *priv); -+#endif -+#endif -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); -+void rtl8188eu_free_xmit_priv(PADAPTER padapter); -+s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); -+void rtl8188eu_xmit_tasklet(void *priv); -+s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); -+void rtl8188ee_free_xmit_priv(PADAPTER padapter); -+void rtl8188ee_xmitframe_resume(_adapter *padapter); -+s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8188ee_xmit_tasklet(void *priv); -+#endif -+ -+ -+ -+#ifdef CONFIG_TX_EARLY_MODE -+void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); -+#endif -+ -+#ifdef CONFIG_XMIT_ACK -+void dump_txrpt_ccx_88e(void *buf); -+void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); -+#else -+#define dump_txrpt_ccx_88e(buf) do {} while(0) -+#define handle_txrpt_ccx_88e(adapter, buf) do {} while(0) -+#endif //CONFIG_XMIT_ACK -+ -+void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); -+#endif //__RTL8188E_XMIT_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_XMIT_H__ ++#define __RTL8188E_XMIT_H__ ++ ++ ++ ++ ++//For 88e early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define QSEL_SHT 8 ++#define RATE_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define SEC_TYPE_SHT 22 ++#define PKT_OFFSET_SHT 26 ++ ++//OFFSET 8 ++#define AGG_EN BIT(12) ++#define AGG_BK BIT(16) ++#define AMPDU_DENSITY_SHT 20 ++#define ANTSEL_A BIT(24) ++#define ANTSEL_B BIT(25) ++#define TX_ANT_CCK_SHT 26 ++#define TX_ANTL_SHT 28 ++#define TX_ANT_HT_SHT 30 ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++#define EN_HWSEQ BIT(31) ++ ++//OFFSET 16 ++#define QOS BIT(6) ++#define HW_SSN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define CTS_2_SELF BIT(11) ++#define RTS_EN BIT(12) ++#define HW_RTS_EN BIT(13) ++#define DATA_SHORT BIT(24) ++#define PWR_STATUS_SHT 15 ++#define DATA_SC_SHT 20 ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define RTY_LMT_EN BIT(17) ++ ++ ++//OFFSET 20 ++#define SGI BIT(6) ++#define USB_TXAGG_NUM_SHT 24 ++ ++typedef struct txdesc_88e ++{ ++ //Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 own:1; ++ ++ //Offset 4 ++ u32 macid:6; ++ u32 rsvd0406:2; ++ u32 qsel:5; ++ u32 rd_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:4; ++ u32 navusehdr:1; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 rsvd0424:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 rsvd0431:1; ++ ++ //Offset 8 ++ u32 rts_rc:6; ++ u32 data_rc:6; ++ u32 agg_en:1; ++ u32 rd_en:1; ++ u32 bar_rty_th:2; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 ccx:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 ant_sel_a:1; ++ u32 ant_sel_b:1; ++ u32 tx_ant_cck:2; ++ u32 tx_antl:2; ++ u32 tx_ant_ht:2; ++ ++ //Offset 12 ++ u32 nextheadpage:8; ++ u32 tailpage:8; ++ u32 seq:12; ++ u32 cpu_handle:1; ++ u32 tag1:1; ++ u32 trigger_int:1; ++ u32 hwseq_en:1; ++ ++ //Offset 16 ++ u32 rtsrate:5; ++ u32 ap_dcfe:1; ++ u32 hwseq_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 pwr_status:3; ++ u32 wait_dcts:1; ++ u32 cts2ap_en:1; ++ u32 data_sc:2; ++ u32 data_stbc:2; ++ u32 data_short:1; ++ u32 data_bw:1; ++ u32 rts_short:1; ++ u32 rts_bw:1; ++ u32 rts_sc:2; ++ u32 vcs_stbc:2; ++ ++ //Offset 20 ++ u32 datarate:6; ++ u32 sgi:1; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 usb_txagg_num:8; ++ ++ //Offset 24 ++ u32 txagg_a:5; ++ u32 txagg_b:5; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 mcsg1_max_len:4; ++ u32 mcsg2_max_len:4; ++ u32 mcsg3_max_len:4; ++ u32 mcs7_sgi_max_len:4; ++ ++ //Offset 28 ++ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) ++ u32 sw0:8; /* offset 30 */ ++ u32 sw1:4; ++ u32 mcs15_sgi_max_len:4; ++}TXDESC_8188E, *PTXDESC_8188E; ++ ++#define txdesc_set_ccx_sw_88e(txdesc, value) \ ++ do { \ ++ ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ ++ ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ ++ } while (0) ++ ++struct txrpt_ccx_88e { ++ /* offset 0 */ ++ u8 tag1:1; ++ u8 pkt_num:3; ++ u8 txdma_underflow:1; ++ u8 int_bt:1; ++ u8 int_tri:1; ++ u8 int_ccx:1; ++ ++ /* offset 1 */ ++ u8 mac_id:6; ++ u8 pkt_ok:1; ++ u8 bmc:1; ++ ++ /* offset 2 */ ++ u8 retry_cnt:6; ++ u8 lifetime_over:1; ++ u8 retry_over:1; ++ ++ /* offset 3 */ ++ u8 ccx_qtime0; ++ u8 ccx_qtime1; ++ ++ /* offset 5 */ ++ u8 final_data_rate; ++ ++ /* offset 6 */ ++ u8 sw1:4; ++ u8 qsel:4; ++ ++ /* offset 7 */ ++ u8 sw0; ++}; ++ ++#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) ++#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) ++ ++#define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++ ++void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, ++ u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); ++ ++#if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) ++s32 rtl8188es_init_xmit_priv(PADAPTER padapter); ++void rtl8188es_free_xmit_priv(PADAPTER padapter); ++s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++thread_return rtl8188es_xmit_thread(thread_context context); ++s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++void rtl8188es_xmit_tasklet(void *priv); ++#endif ++#endif ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); ++void rtl8188eu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); ++void rtl8188eu_xmit_tasklet(void *priv); ++s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); ++void rtl8188ee_free_xmit_priv(PADAPTER padapter); ++void rtl8188ee_xmitframe_resume(_adapter *padapter); ++s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8188ee_xmit_tasklet(void *priv); ++#endif ++ ++ ++ ++#ifdef CONFIG_TX_EARLY_MODE ++void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); ++#endif ++ ++#ifdef CONFIG_XMIT_ACK ++void dump_txrpt_ccx_88e(void *buf); ++void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); ++#else ++#define dump_txrpt_ccx_88e(buf) do {} while(0) ++#define handle_txrpt_ccx_88e(adapter, buf) do {} while(0) ++#endif //CONFIG_XMIT_ACK ++ ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); ++#endif //__RTL8188E_XMIT_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_cmd.h new file mode 100644 -index 000000000..ff8e52611 +index 0000000..ff8e526 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_cmd.h @@ -0,0 +1,218 @@ @@ -288263,7 +329695,7 @@ index 000000000..ff8e52611 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_dm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_dm.h new file mode 100644 -index 000000000..d703ae524 +index 0000000..d703ae5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_dm.h @@ -0,0 +1,48 @@ @@ -288317,7 +329749,7 @@ index 000000000..d703ae524 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_hal.h new file mode 100644 -index 000000000..acb5996dd +index 0000000..acb5996 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_hal.h @@ -0,0 +1,322 @@ @@ -288645,7 +330077,7 @@ index 000000000..acb5996dd + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_led.h new file mode 100644 -index 000000000..9b7bf78c5 +index 0000000..9b7bf78 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_led.h @@ -0,0 +1,49 @@ @@ -288700,7 +330132,7 @@ index 000000000..9b7bf78c5 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_recv.h new file mode 100644 -index 000000000..8a1228cd5 +index 0000000..8a1228c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_recv.h @@ -0,0 +1,73 @@ @@ -288779,7 +330211,7 @@ index 000000000..8a1228cd5 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_rf.h new file mode 100644 -index 000000000..ea71ef13e +index 0000000..ea71ef1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_rf.h @@ -0,0 +1,31 @@ @@ -288816,7 +330248,7 @@ index 000000000..ea71ef13e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_spec.h new file mode 100644 -index 000000000..52a02b12b +index 0000000..52a02b1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_spec.h @@ -0,0 +1,302 @@ @@ -289124,7 +330556,7 @@ index 000000000..52a02b12b + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_sreset.h new file mode 100644 -index 000000000..8a2762415 +index 0000000..8a27624 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_sreset.h @@ -0,0 +1,30 @@ @@ -289160,7 +330592,7 @@ index 000000000..8a2762415 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_xmit.h new file mode 100644 -index 000000000..265b88731 +index 0000000..265b887 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8188f_xmit.h @@ -0,0 +1,336 @@ @@ -289502,7 +330934,7 @@ index 000000000..265b88731 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_cmd.h new file mode 100644 -index 000000000..28bebe302 +index 0000000..28bebe3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_cmd.h @@ -0,0 +1,175 @@ @@ -289684,7 +331116,7 @@ index 000000000..28bebe302 \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_dm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_dm.h new file mode 100644 -index 000000000..bb4f7a5ef +index 0000000..bb4f7a5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_dm.h @@ -0,0 +1,38 @@ @@ -289728,594 +331160,594 @@ index 000000000..bb4f7a5ef + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_hal.h new file mode 100644 -index 000000000..93b7eabb9 +index 0000000..97b8f19 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_hal.h @@ -0,0 +1,350 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8192E_HAL_H__ -+#define __RTL8192E_HAL_H__ -+ -+//#include "hal_com.h" -+ -+#include "hal_data.h" -+ -+//include HAL Related header after HAL Related compiling flags -+#include "rtl8192e_spec.h" -+#include "rtl8192e_rf.h" -+#include "rtl8192e_dm.h" -+#include "rtl8192e_recv.h" -+#include "rtl8192e_xmit.h" -+#include "rtl8192e_cmd.h" -+#include "rtl8192e_led.h" -+#include "Hal8192EPwrSeq.h" -+#include "Hal8192EPhyReg.h" -+#include "Hal8192EPhyCfg.h" -+ -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8192e_sreset.h" -+#endif -+ -+ -+//--------------------------------------------------------------------- -+// RTL8192E From header -+//--------------------------------------------------------------------- -+ #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin" -+ #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin" -+ #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt" -+ #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt" -+ #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt" -+ #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt" -+ #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt" -+ #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt" -+ #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt" -+ #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt" -+ #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt" -+ #define RTL8192E_WIFI_ANT_ISOLATION "rtl8192e/wifi_ant_isolation.txt" -+ -+//--------------------------------------------------------------------- -+// RTL8192E Power Configuration CMDs for PCIe interface -+//--------------------------------------------------------------------- -+#define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow -+#define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow -+#define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow -+#define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow -+#define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow -+#define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow -+#define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow -+#define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow -+#define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow -+ -+ -+#if 1 // download firmware related data structure -+#define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k -+#define FW_START_ADDRESS 0x1000 -+#define FW_END_ADDRESS 0x5FFF -+ -+ -+#define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0) -+ -+ -+ -+typedef struct _RT_FIRMWARE_8192E { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8* szFwBuffer; -+#else -+ u8 szFwBuffer[FW_SIZE_8192E]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; -+ -+// -+// This structure must be cared byte-ordering -+// -+// Added by tynli. 2009.12.04. -+ -+//===================================================== -+// Firmware Header(8-byte alinment required) -+//===================================================== -+//--- LONG WORD 0 ---- -+#define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut -+#define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI -+#define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions -+#define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version -+#define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 -+#define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) -+ -+//--- LONG WORD 1 ---- -+#define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field -+#define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field -+#define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field -+#define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field -+#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code -+#define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) -+ -+//--- LONG WORD 2 ---- -+#define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index -+#define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) -+ -+//--- LONG WORD 3 ---- -+#define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) -+#define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) -+ -+#endif // download firmware related data structure -+ -+#define DRIVER_EARLY_INT_TIME_8192E 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8192E 0x02 -+#define RX_DMA_SIZE_8192E 0x4000 /* 16K*/ -+ -+#ifdef CONFIG_WOWLAN -+#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ -+#else -+#define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8192E 0x100 /* 256B, reserved for c2h debug message*/ -+#else -+ #define RX_DMA_RESERVED_SIZE_8192E 0x40 /* 64B, reserved for c2h event(16bytes) or ccx(8 Bytes )*/ -+#endif -+#define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/ -+ -+//For General Reserved Page Number(Beacon Queue is reserved page) -+//if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 -+//Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 -+#define RSVD_PAGE_NUM_8192E 0x08 -+//For WoWLan , more reserved page -+//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 -+#ifdef CONFIG_WOWLAN -+#define WOWLAN_PAGE_NUM_8192E 0x07 -+#else -+#define WOWLAN_PAGE_NUM_8192E 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+#undef WOWLAN_PAGE_NUM_8192E -+#define WOWLAN_PAGE_NUM_8192E 0x0d -+#endif -+ -+/* Note: -+Tx FIFO Size : 64KB -+Tx page Size : 256B -+Total page numbers : 256(0x100) -+*/ -+ -+#define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E+WOWLAN_PAGE_NUM_8192E) -+ -+#define TOTAL_PAGE_NUMBER_8192E (0x100) -+#define TX_TOTAL_PAGE_NUMBER_8192E (TOTAL_PAGE_NUMBER_8192E - TOTAL_RSVD_PAGE_NUMBER_8192E) -+ -+#define TX_PAGE_BOUNDARY_8192E ( TX_TOTAL_PAGE_NUMBER_8192E ) /* beacon header start address */ -+ -+ -+#define PAGE_SIZE_TX_92E PAGE_SIZE_256 -+#define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E *PAGE_SIZE_TX_92E) -+ -+#define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5 -+#define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 -+ -+// For Normal Chip Setting -+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C -+ -+#define NORMAL_PAGE_NUM_HPQ_8192E 0x10 -+#define NORMAL_PAGE_NUM_LPQ_8192E 0x10 -+#define NORMAL_PAGE_NUM_NPQ_8192E 0x10 -+#define NORMAL_PAGE_NUM_EPQ_8192E 0x00 -+ -+ -+//Note: For WMM Normal Chip Setting ,modify later -+#define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E -+#define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E -+#define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E -+ -+ -+//------------------------------------------------------------------------- -+// Chip specific -+//------------------------------------------------------------------------- -+ -+// pic buffer descriptor -+#define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM -+#define TX_DESC_NUM_92E 128 -+#define RX_DESC_NUM_92E 128 -+ -+//------------------------------------------------------------------------- -+// Channel Plan -+//------------------------------------------------------------------------- -+ -+#define HWSET_MAX_SIZE_8192E 512 -+ -+#define EFUSE_REAL_CONTENT_LEN_8192E 512 -+ -+#define EFUSE_MAP_LEN_8192E 512 -+#define EFUSE_MAX_SECTION_8192E 64 -+#define EFUSE_MAX_WORD_UNIT_8192E 4 -+#define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. -+#define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) -+// -+// To prevent out of boundary programming case, leave 1byte and program full section -+// 9bytes + 1byt + 5bytes and pre 1byte. -+// For worst case: -+// | 1byte|----8bytes----|1byte|--5bytes--| -+// | | Reserved(14bytes) | -+// -+#define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. -+ -+ -+ -+//======================================================== -+// EFUSE for BT definition -+//======================================================== -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 -+#define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2 -+#define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes -+#define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8 -+ -+#define EFUSE_PROTECT_BYTES_BANK_8192E 16 -+#define EFUSE_MAX_BANK_8192E 3 -+//=========================================================== -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) -+ -+//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) -+ -+// rtl8812_hal_init.c -+void _8051Reset8192E(PADAPTER padapter); -+s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); -+void InitializeFirmwareVars8192E(PADAPTER padapter); -+ -+s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); -+ -+// EFuse -+u8 GetEEPROMSize8192E(PADAPTER padapter); -+void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent); -+void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); -+void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); -+void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); -+void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadAmplifierType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadRFEType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseKFreeData_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+u8 Hal_CrystalAFEAdjust(_adapter * Adapter); -+ -+BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif //CONFIG_WOWLAN -+ -+/***********************************************************/ -+// RTL8192E-MAC Setting -+VOID _InitQueueReservedPage_8192E(IN PADAPTER Adapter); -+VOID _InitQueuePriority_8192E(IN PADAPTER Adapter); -+VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy); -+VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); -+//VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); -+VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize); -+VOID _InitRDGSetting_8192E(PADAPTER Adapter); -+void _InitID_8192E(IN PADAPTER Adapter); -+VOID _InitNetworkType_8192E(IN PADAPTER Adapter); -+VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); -+VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter); -+VOID _InitRateFallback_8192E(IN PADAPTER Adapter); -+VOID _InitEDCA_8192E( IN PADAPTER Adapter); -+VOID _InitRetryFunction_8192E( IN PADAPTER Adapter); -+VOID _BBTurnOnBlock_8192E(IN PADAPTER Adapter); -+VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); -+VOID _InitBeaconMaxError_8192E( -+ IN PADAPTER Adapter, -+ IN BOOLEAN InfraMode -+ ); -+void SetBeaconRelatedRegisters8192E(PADAPTER padapter); -+VOID hal_ReadRFType_8192E(PADAPTER Adapter); -+// RTL8192E-MAC Setting -+/***********************************************************/ -+ -+void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); -+void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); -+u8 -+SetHalDefVar8192E( -+ IN PADAPTER Adapter, -+ IN HAL_DEF_VARIABLE eVariable, -+ IN PVOID pValue -+ ); -+u8 -+GetHalDefVar8192E( -+ IN PADAPTER Adapter, -+ IN HAL_DEF_VARIABLE eVariable, -+ IN PVOID pValue -+ ); -+ -+void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8192e(_adapter *adapter); -+void rtl8192e_init_default_value(_adapter * padapter); -+// register -+void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); -+ -+void rtl8192e_start_thread(_adapter *padapter); -+void rtl8192e_stop_thread(_adapter *padapter); -+ -+#ifdef CONFIG_PCI_HCI -+BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); -+u16 get_txdesc_buf_addr(u16 ff_hwaddr); -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); -+#endif -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter); -+#endif -+ -+#endif //__RTL8192E_HAL_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_HAL_H__ ++#define __RTL8192E_HAL_H__ ++ ++//#include "hal_com.h" ++ ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8192e_spec.h" ++#include "rtl8192e_rf.h" ++#include "rtl8192e_dm.h" ++#include "rtl8192e_recv.h" ++#include "rtl8192e_xmit.h" ++#include "rtl8192e_cmd.h" ++#include "rtl8192e_led.h" ++#include "Hal8192EPwrSeq.h" ++#include "Hal8192EPhyReg.h" ++#include "Hal8192EPhyCfg.h" ++ ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8192e_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8192E From header ++//--------------------------------------------------------------------- ++ #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin" ++ #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin" ++ #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt" ++ #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt" ++ #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt" ++ #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt" ++ #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt" ++ #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt" ++ #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt" ++ #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt" ++ #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt" ++ #define RTL8192E_WIFI_ANT_ISOLATION "rtl8192e/wifi_ant_isolation.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8192E Power Configuration CMDs for PCIe interface ++//--------------------------------------------------------------------- ++#define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow ++#define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow ++#define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow ++#define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow ++#define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow ++#define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow ++#define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow ++#define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow ++#define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow ++ ++ ++#if 1 // download firmware related data structure ++#define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k ++#define FW_START_ADDRESS 0x1000 ++#define FW_END_ADDRESS 0x5FFF ++ ++ ++#define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0) ++ ++ ++ ++typedef struct _RT_FIRMWARE_8192E { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_SIZE_8192E]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++ ++//===================================================== ++// Firmware Header(8-byte alinment required) ++//===================================================== ++//--- LONG WORD 0 ---- ++#define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++#define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI ++#define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++#define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version ++#define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 ++#define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) ++ ++//--- LONG WORD 1 ---- ++#define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field ++#define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field ++#define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field ++#define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field ++#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code ++#define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) ++ ++//--- LONG WORD 2 ---- ++#define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index ++#define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) ++ ++//--- LONG WORD 3 ---- ++#define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) ++#define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) ++ ++#endif // download firmware related data structure ++ ++#define DRIVER_EARLY_INT_TIME_8192E 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8192E 0x02 ++#define RX_DMA_SIZE_8192E 0x4000 /* 16K*/ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++ #define RX_DMA_RESERVED_SIZE_8192E 0x100 /* 256B, reserved for c2h debug message*/ ++#else ++ #define RX_DMA_RESERVED_SIZE_8192E 0x40 /* 64B, reserved for c2h event(16bytes) or ccx(8 Bytes )*/ ++#endif ++#define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/ ++ ++//For General Reserved Page Number(Beacon Queue is reserved page) ++//if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 ++//Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 ++#define RSVD_PAGE_NUM_8192E 0x08 ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8192E 0x07 ++#else ++#define WOWLAN_PAGE_NUM_8192E 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef WOWLAN_PAGE_NUM_8192E ++#define WOWLAN_PAGE_NUM_8192E 0x0d ++#endif ++ ++/* Note: ++Tx FIFO Size : 64KB ++Tx page Size : 256B ++Total page numbers : 256(0x100) ++*/ ++ ++#define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E+WOWLAN_PAGE_NUM_8192E) ++ ++#define TOTAL_PAGE_NUMBER_8192E (0x100) ++#define TX_TOTAL_PAGE_NUMBER_8192E (TOTAL_PAGE_NUMBER_8192E - TOTAL_RSVD_PAGE_NUMBER_8192E) ++ ++#define TX_PAGE_BOUNDARY_8192E ( TX_TOTAL_PAGE_NUMBER_8192E ) /* beacon header start address */ ++ ++ ++#define PAGE_SIZE_TX_92E PAGE_SIZE_256 ++#define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E *PAGE_SIZE_TX_92E) ++ ++#define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5 ++#define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C ++ ++#define NORMAL_PAGE_NUM_HPQ_8192E 0x10 ++#define NORMAL_PAGE_NUM_LPQ_8192E 0x10 ++#define NORMAL_PAGE_NUM_NPQ_8192E 0x10 ++#define NORMAL_PAGE_NUM_EPQ_8192E 0x00 ++ ++ ++//Note: For WMM Normal Chip Setting ,modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E ++#define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E ++#define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E ++ ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++ ++// pic buffer descriptor ++#define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM ++#define TX_DESC_NUM_92E 128 ++#define RX_DESC_NUM_92E 128 ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++ ++#define HWSET_MAX_SIZE_8192E 512 ++ ++#define EFUSE_REAL_CONTENT_LEN_8192E 512 ++ ++#define EFUSE_MAP_LEN_8192E 512 ++#define EFUSE_MAX_SECTION_8192E 64 ++#define EFUSE_MAX_WORD_UNIT_8192E 4 ++#define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) ++// ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++ ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 ++#define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2 ++#define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK_8192E 16 ++#define EFUSE_MAX_BANK_8192E 3 ++//=========================================================== ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++// rtl8812_hal_init.c ++void _8051Reset8192E(PADAPTER padapter); ++s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); ++void InitializeFirmwareVars8192E(PADAPTER padapter); ++ ++s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); ++ ++// EFuse ++u8 GetEEPROMSize8192E(PADAPTER padapter); ++void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent); ++void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); ++void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); ++void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); ++void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadAmplifierType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadRFEType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseKFreeData_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++ ++u8 Hal_CrystalAFEAdjust(_adapter * Adapter); ++ ++BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++/***********************************************************/ ++// RTL8192E-MAC Setting ++VOID _InitQueueReservedPage_8192E(IN PADAPTER Adapter); ++VOID _InitQueuePriority_8192E(IN PADAPTER Adapter); ++VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy); ++VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); ++//VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); ++VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize); ++VOID _InitRDGSetting_8192E(PADAPTER Adapter); ++void _InitID_8192E(IN PADAPTER Adapter); ++VOID _InitNetworkType_8192E(IN PADAPTER Adapter); ++VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); ++VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter); ++VOID _InitRateFallback_8192E(IN PADAPTER Adapter); ++VOID _InitEDCA_8192E( IN PADAPTER Adapter); ++VOID _InitRetryFunction_8192E( IN PADAPTER Adapter); ++VOID _BBTurnOnBlock_8192E(IN PADAPTER Adapter); ++VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); ++VOID _InitBeaconMaxError_8192E( ++ IN PADAPTER Adapter, ++ IN BOOLEAN InfraMode ++ ); ++void SetBeaconRelatedRegisters8192E(PADAPTER padapter); ++VOID hal_ReadRFType_8192E(PADAPTER Adapter); ++// RTL8192E-MAC Setting ++/***********************************************************/ ++ ++void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); ++void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); ++u8 ++SetHalDefVar8192E( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ); ++u8 ++GetHalDefVar8192E( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ); ++ ++void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8192e(_adapter *adapter); ++void rtl8192e_init_default_value(_adapter * padapter); ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++ ++void rtl8192e_start_thread(_adapter *padapter); ++void rtl8192e_stop_thread(_adapter *padapter); ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); ++u16 get_txdesc_buf_addr(u16 ff_hwaddr); ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); ++#endif ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter); ++#endif ++ ++#endif //__RTL8192E_HAL_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_led.h new file mode 100644 -index 000000000..53317d0db +index 0000000..221e0aa --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_led.h @@ -0,0 +1,41 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8192E_LED_H__ -+#define __RTL8192E_LED_H__ -+ -+ -+//================================================================================ -+// Interface to manipulate LED objects. -+//================================================================================ -+#ifdef CONFIG_USB_HCI -+void rtl8192eu_InitSwLeds(PADAPTER padapter); -+void rtl8192eu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+void rtl8192ee_InitSwLeds(PADAPTER padapter); -+void rtl8192ee_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+void rtl8192es_InitSwLeds(PADAPTER padapter); -+void rtl8192es_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_LED_H__ ++#define __RTL8192E_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8192eu_InitSwLeds(PADAPTER padapter); ++void rtl8192eu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8192ee_InitSwLeds(PADAPTER padapter); ++void rtl8192ee_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8192es_InitSwLeds(PADAPTER padapter); ++void rtl8192es_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_recv.h new file mode 100644 -index 000000000..cc14545b1 +index 0000000..766a677 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_recv.h @@ -0,0 +1,178 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8192E_RECV_H__ -+#define __RTL8192E_RECV_H__ -+ -+#if defined(CONFIG_USB_HCI) -+ -+#ifndef MAX_RECVBUF_SZ -+#ifdef PLATFORM_OS_CE -+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+#else -+ #ifdef CONFIG_MINIMAL_MEMORY_USAGE -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+ #else -+ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ -+ #elif defined(CONFIG_PLATFORM_HISILICON) -+ #define MAX_RECVBUF_SZ (16384) /* 16k */ -+ #else -+ #define MAX_RECVBUF_SZ (32768) /* 32k */ -+ #endif -+ //#define MAX_RECVBUF_SZ (20480) //20K -+ //#define MAX_RECVBUF_SZ (10240) //10K -+ //#define MAX_RECVBUF_SZ (16384) // 16k - 92E RX BUF :16K -+ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+ #endif -+#endif -+#endif //!MAX_RECVBUF_SZ -+ -+#elif defined(CONFIG_PCI_HCI) -+//#ifndef CONFIG_MINIMAL_MEMORY_USAGE -+// #define MAX_RECVBUF_SZ (9100) -+//#else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+//#endif -+ -+ -+#elif defined(CONFIG_SDIO_HCI) -+ -+#define MAX_RECVBUF_SZ (16384) -+ -+#endif -+ -+ -+// Rx smooth factor -+#define Rx_Smooth_Factor (20) -+ -+//============= -+// [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture -+//DWORD 0 -+#define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc,__Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 15, 1, __Value) -+#define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 1, __Value) -+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 15, __Value) -+ -+#define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) -+#define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) -+#define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 1) -+#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 15) -+ -+ -+//DWORD 1 -+#define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+4, 0, 32, __Value) -+#define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 0, 32) -+ -+//DWORD 2 -+#define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+8, 0, 32, __Value) -+ -+//============= -+// [2] Rx Descriptor -+//DWORD 0 -+#define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) -+ -+ -+#define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) -+ -+//DWORD 1 -+#define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1) -+#define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) -+ -+//DWORD 2 -+#define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) -+ -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) -+#define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) -+#define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) -+ -+//DWORD 3 -+#define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) -+#define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) -+ -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) -+ -+ -+//DWORD 5 -+#define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+ -+#ifdef CONFIG_SDIO_HCI -+s32 rtl8192es_init_recv_priv(PADAPTER padapter); -+void rtl8192es_free_recv_priv(PADAPTER padapter); -+void rtl8192es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+s32 rtl8192eu_init_recv_priv(PADAPTER padapter); -+void rtl8192eu_free_recv_priv(PADAPTER padapter); -+void rtl8192eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); -+void rtl8192eu_recv_tasklet(void *priv); -+ -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8192ee_init_recv_priv(PADAPTER padapter); -+void rtl8192ee_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8192E_RECV_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_RECV_H__ ++#define __RTL8192E_RECV_H__ ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifdef CONFIG_MINIMAL_MEMORY_USAGE ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #else ++ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ ++ #elif defined(CONFIG_PLATFORM_HISILICON) ++ #define MAX_RECVBUF_SZ (16384) /* 16k */ ++ #else ++ #define MAX_RECVBUF_SZ (32768) /* 32k */ ++ #endif ++ //#define MAX_RECVBUF_SZ (20480) //20K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ //#define MAX_RECVBUF_SZ (16384) // 16k - 92E RX BUF :16K ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) ++ ++#define MAX_RECVBUF_SZ (16384) ++ ++#endif ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++//============= ++// [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture ++//DWORD 0 ++#define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc,__Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 15, 1, __Value) ++#define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 1, __Value) ++#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 15, __Value) ++ ++#define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++#define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 1) ++#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 15) ++ ++ ++//DWORD 1 ++#define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+4, 0, 32, __Value) ++#define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 0, 32) ++ ++//DWORD 2 ++#define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+8, 0, 32, __Value) ++ ++//============= ++// [2] Rx Descriptor ++//DWORD 0 ++#define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++ ++#define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1) ++#define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++ ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) ++#define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) ++#define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++ ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++ ++#ifdef CONFIG_SDIO_HCI ++s32 rtl8192es_init_recv_priv(PADAPTER padapter); ++void rtl8192es_free_recv_priv(PADAPTER padapter); ++void rtl8192es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++s32 rtl8192eu_init_recv_priv(PADAPTER padapter); ++void rtl8192eu_free_recv_priv(PADAPTER padapter); ++void rtl8192eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++void rtl8192eu_recv_tasklet(void *priv); ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192ee_init_recv_priv(PADAPTER padapter); ++void rtl8192ee_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8192E_RECV_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_rf.h new file mode 100644 -index 000000000..fec92256c +index 0000000..fec9225 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_rf.h @@ -0,0 +1,34 @@ @@ -290355,340 +331787,340 @@ index 000000000..fec92256c + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_spec.h new file mode 100644 -index 000000000..b185c97fc +index 0000000..6ecfbeb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_spec.h @@ -0,0 +1,327 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ *******************************************************************************/ -+#ifndef __RTL8192E_SPEC_H__ -+#define __RTL8192E_SPEC_H__ -+ -+#include -+ -+ -+//============================================================ -+// 8192E Regsiter offset definition -+//============================================================ -+ -+//============================================================ -+// -+//============================================================ -+ -+//----------------------------------------------------- -+// -+// 0x0000h ~ 0x00FFh System Configuration -+// -+//----------------------------------------------------- -+#define REG_SYS_SWR_CTRL1_8192E 0x0010 // 1 Byte -+#define REG_SYS_SWR_CTRL2_8192E 0x0014 // 1 Byte -+#define REG_AFE_CTRL1_8192E 0x0024 -+#define REG_AFE_CTRL2_8192E 0x0028 -+#define REG_AFE_CTRL3_8192E 0x002c -+ -+#define REG_PAD_CTRL1_8192E 0x0064 -+#define REG_SDIO_CTRL_8192E 0x0070 -+#define REG_OPT_CTRL_8192E 0x0074 -+#define REG_RF_B_CTRL_8192E 0x0076 -+#define REG_AFE_CTRL4_8192E 0x0078 -+#define REG_LDO_SWR_CTRL 0x007C -+#define REG_FW_DRV_MSG_8192E 0x0088 -+#define REG_HMEBOX_E2_E3_8192E 0x008C -+#define REG_HIMR0_8192E 0x00B0 -+#define REG_HISR0_8192E 0x00B4 -+#define REG_HIMR1_8192E 0x00B8 -+#define REG_HISR1_8192E 0x00BC -+ -+#define REG_SYS_CFG1_8192E 0x00F0 -+#define REG_SYS_CFG2_8192E 0x00FC -+//----------------------------------------------------- -+// -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+// -+//----------------------------------------------------- -+#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -+#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -+#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+#define REG_RSVD3_8192E 0x0168 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_88XX 0x01AE -+ -+#define REG_HMEBOX_EXT0_8192E 0x01F0 -+#define REG_HMEBOX_EXT1_8192E 0x01F4 -+#define REG_HMEBOX_EXT2_8192E 0x01F8 -+#define REG_HMEBOX_EXT3_8192E 0x01FC -+ -+//----------------------------------------------------- -+// -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_DWBCN0_CTRL 0x0208 -+#define REG_DWBCN1_CTRL 0x0228 -+ -+//----------------------------------------------------- -+// -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_RXDMA_8192E 0x0290 -+#define REG_EARLY_MODE_CONTROL_8192E 0x02BC -+ -+#define REG_RSVD5_8192E 0x02F0 -+#define REG_RSVD6_8192E 0x02F4 -+#define REG_RSVD7_8192E 0x02F8 -+#define REG_RSVD8_8192E 0x02FC -+ -+//----------------------------------------------------- -+// -+// 0x0300h ~ 0x03FFh PCIe -+// -+//----------------------------------------------------- -+#define REG_PCIE_CTRL_REG_8192E 0x0300 -+#define REG_INT_MIG_8192E 0x0304 // Interrupt Migration -+#define REG_BCNQ_TXBD_DESA_8192E 0x0308 // TX Beacon Descriptor Address -+#define REG_MGQ_TXBD_DESA_8192E 0x0310 // TX Manage Queue Descriptor Address -+#define REG_VOQ_TXBD_DESA_8192E 0x0318 // TX VO Queue Descriptor Address -+#define REG_VIQ_TXBD_DESA_8192E 0x0320 // TX VI Queue Descriptor Address -+#define REG_BEQ_TXBD_DESA_8192E 0x0328 // TX BE Queue Descriptor Address -+#define REG_BKQ_TXBD_DESA_8192E 0x0330 // TX BK Queue Descriptor Address -+#define REG_RXQ_RXBD_DESA_8192E 0x0338 // RX Queue Descriptor Address -+#define REG_HI0Q_TXBD_DESA_8192E 0x0340 -+#define REG_HI1Q_TXBD_DESA_8192E 0x0348 -+#define REG_HI2Q_TXBD_DESA_8192E 0x0350 -+#define REG_HI3Q_TXBD_DESA_8192E 0x0358 -+#define REG_HI4Q_TXBD_DESA_8192E 0x0360 -+#define REG_HI5Q_TXBD_DESA_8192E 0x0368 -+#define REG_HI6Q_TXBD_DESA_8192E 0x0370 -+#define REG_HI7Q_TXBD_DESA_8192E 0x0378 -+#define REG_MGQ_TXBD_NUM_8192E 0x0380 -+#define REG_RX_RXBD_NUM_8192E 0x0382 -+#define REG_VOQ_TXBD_NUM_8192E 0x0384 -+#define REG_VIQ_TXBD_NUM_8192E 0x0386 -+#define REG_BEQ_TXBD_NUM_8192E 0x0388 -+#define REG_BKQ_TXBD_NUM_8192E 0x038A -+#define REG_HI0Q_TXBD_NUM_8192E 0x038C -+#define REG_HI1Q_TXBD_NUM_8192E 0x038E -+#define REG_HI2Q_TXBD_NUM_8192E 0x0390 -+#define REG_HI3Q_TXBD_NUM_8192E 0x0392 -+#define REG_HI4Q_TXBD_NUM_8192E 0x0394 -+#define REG_HI5Q_TXBD_NUM_8192E 0x0396 -+#define REG_HI6Q_TXBD_NUM_8192E 0x0398 -+#define REG_HI7Q_TXBD_NUM_8192E 0x039A -+#define REG_TSFTIMER_HCI_8192E 0x039C -+ -+//Read Write Point -+#define REG_VOQ_TXBD_IDX_8192E 0x03A0 -+#define REG_VIQ_TXBD_IDX_8192E 0x03A4 -+#define REG_BEQ_TXBD_IDX_8192E 0x03A8 -+#define REG_BKQ_TXBD_IDX_8192E 0x03AC -+#define REG_MGQ_TXBD_IDX_8192E 0x03B0 -+#define REG_RXQ_TXBD_IDX_8192E 0x03B4 -+#define REG_HI0Q_TXBD_IDX_8192E 0x03B8 -+#define REG_HI1Q_TXBD_IDX_8192E 0x03BC -+#define REG_HI2Q_TXBD_IDX_8192E 0x03C0 -+#define REG_HI3Q_TXBD_IDX_8192E 0x03C4 -+#define REG_HI4Q_TXBD_IDX_8192E 0x03C8 -+#define REG_HI5Q_TXBD_IDX_8192E 0x03CC -+#define REG_HI6Q_TXBD_IDX_8192E 0x03D0 -+#define REG_HI7Q_TXBD_IDX_8192E 0x03D4 -+ -+#define REG_PCIE_HCPWM_8192EE 0x03D8 // ?????? -+#define REG_PCIE_HRPWM_8192EE 0x03DC //PCIe RPWM // ?????? -+#define REG_DBI_WDATA_V1_8192E 0x03E8 -+#define REG_DBI_RDATA_V1_8192E 0x03EC -+#define REG_DBI_FLAG_V1_8192E 0x03F0 -+#define REG_MDIO_V1_8192E 0x3F4 -+#define REG_PCIE_MIX_CFG_8192E 0x3F8 -+ -+//----------------------------------------------------- -+// -+// 0x0400h ~ 0x047Fh Protocol Configuration -+// -+//----------------------------------------------------- -+#define REG_TXBF_CTRL_8192E 0x042C -+#define REG_ARFR0_8192E 0x0444 -+#define REG_ARFR1_8192E 0x044C -+#define REG_CCK_CHECK_8192E 0x0454 -+#define REG_AMPDU_MAX_TIME_8192E 0x0456 -+#define REG_BCNQ1_BDNY_8192E 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8192E 0x0458 -+#define REG_WMAC_LBK_BUF_HD_8192E 0x045D -+#define REG_NDPA_OPT_CTRL_8192E 0x045F -+#define REG_DATA_SC_8192E 0x0483 -+#ifdef CONFIG_WOWLAN -+#define REG_TXPKTBUF_IV_LOW 0x0484 -+#define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_ARFR2_8192E 0x048C -+#define REG_ARFR3_8192E 0x0494 -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_AMPDU_BURST_MODE_8192E 0x04BC -+#define REG_HT_SINGLE_AMPDU_8192E 0x04C7 -+#define REG_MACID_PKT_DROP0_8192E 0x04D0 -+ -+//----------------------------------------------------- -+// -+// 0x0500h ~ 0x05FFh EDCA Configuration -+// -+//----------------------------------------------------- -+#define REG_CTWND_8192E 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8192E 0x0577 -+#define REG_SCH_TXCMD_8192E 0x05F8 -+ -+//----------------------------------------------------- -+// -+// 0x0600h ~ 0x07FFh WMAC Configuration -+// -+//----------------------------------------------------- -+#define REG_MAC_CR_8192E 0x0600 -+ -+#define REG_MAC_TX_SM_STATE_8192E 0x06B4 -+ -+// Power -+#define REG_BFMER0_INFO_8192E 0x06E4 -+#define REG_BFMER1_INFO_8192E 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8192E 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8192E 0x06FC -+ -+// Hardware Port 2 -+#define REG_BFMEE_SEL_8192E 0x0714 -+#define REG_SND_PTCL_CTRL_8192E 0x0718 -+ -+ -+//----------------------------------------------------- -+// -+// Redifine register definition for compatibility -+// -+//----------------------------------------------------- -+ -+// TODO: use these definition when using REG_xxx naming rule. -+// NOTE: DO NOT Remove these definition. Use later. -+#define ISR_8192E REG_HISR0_8192E -+ -+//---------------------------------------------------------------------------- -+// 8192E IMR/ISR bits (offset 0xB0, 8bits) -+//---------------------------------------------------------------------------- -+#define IMR_DISABLED_8192E 0 -+// IMR DW0(0x00B0-00B3) Bit 0-31 -+#define IMR_TIMER2_8192E BIT31 // Timeout interrupt 2 -+#define IMR_TIMER1_8192E BIT30 // Timeout interrupt 1 -+#define IMR_PSTIMEOUT_8192E BIT29 // Power Save Time Out Interrupt -+#define IMR_GTINT4_8192E BIT28 // When GTIMER4 expires, this bit is set to 1 -+#define IMR_GTINT3_8192E BIT27 // When GTIMER3 expires, this bit is set to 1 -+#define IMR_TXBCN0ERR_8192E BIT26 // Transmit Beacon0 Error -+#define IMR_TXBCN0OK_8192E BIT25 // Transmit Beacon0 OK -+#define IMR_TSF_BIT32_TOGGLE_8192E BIT24 // TSF Timer BIT32 toggle indication interrupt -+#define IMR_BCNDMAINT0_8192E BIT20 // Beacon DMA Interrupt 0 -+#define IMR_BCNDERR0_8192E BIT16 // Beacon Queue DMA OK0 -+#define IMR_HSISR_IND_ON_INT_8192E BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) -+#define IMR_BCNDMAINT_E_8192E BIT14 // Beacon DMA Interrupt Extension for Win7 -+#define IMR_ATIMEND_8192E BIT12 // CTWidnow End or ATIM Window End -+#define IMR_C2HCMD_8192E BIT10 // CPU to Host Command INT Status, Write 1 clear -+#define IMR_CPWM2_8192E BIT9 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_CPWM_8192E BIT8 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_HIGHDOK_8192E BIT7 // High Queue DMA OK -+#define IMR_MGNTDOK_8192E BIT6 // Management Queue DMA OK -+#define IMR_BKDOK_8192E BIT5 // AC_BK DMA OK -+#define IMR_BEDOK_8192E BIT4 // AC_BE DMA OK -+#define IMR_VIDOK_8192E BIT3 // AC_VI DMA OK -+#define IMR_VODOK_8192E BIT2 // AC_VO DMA OK -+#define IMR_RDU_8192E BIT1 // Rx Descriptor Unavailable -+#define IMR_ROK_8192E BIT0 // Receive DMA OK -+ -+// IMR DW1(0x00B4-00B7) Bit 0-31 -+#define IMR_BCNDMAINT7_8192E BIT27 // Beacon DMA Interrupt 7 -+#define IMR_BCNDMAINT6_8192E BIT26 // Beacon DMA Interrupt 6 -+#define IMR_BCNDMAINT5_8192E BIT25 // Beacon DMA Interrupt 5 -+#define IMR_BCNDMAINT4_8192E BIT24 // Beacon DMA Interrupt 4 -+#define IMR_BCNDMAINT3_8192E BIT23 // Beacon DMA Interrupt 3 -+#define IMR_BCNDMAINT2_8192E BIT22 // Beacon DMA Interrupt 2 -+#define IMR_BCNDMAINT1_8192E BIT21 // Beacon DMA Interrupt 1 -+#define IMR_BCNDOK7_8192E BIT20 // Beacon Queue DMA OK Interrup 7 -+#define IMR_BCNDOK6_8192E BIT19 // Beacon Queue DMA OK Interrup 6 -+#define IMR_BCNDOK5_8192E BIT18 // Beacon Queue DMA OK Interrup 5 -+#define IMR_BCNDOK4_8192E BIT17 // Beacon Queue DMA OK Interrup 4 -+#define IMR_BCNDOK3_8192E BIT16 // Beacon Queue DMA OK Interrup 3 -+#define IMR_BCNDOK2_8192E BIT15 // Beacon Queue DMA OK Interrup 2 -+#define IMR_BCNDOK1_8192E BIT14 // Beacon Queue DMA OK Interrup 1 -+#define IMR_ATIMEND_E_8192E BIT13 // ATIM Window End Extension for Win7 -+#define IMR_TXERR_8192E BIT11 // Tx Error Flag Interrupt Status, write 1 clear. -+#define IMR_RXERR_8192E BIT10 // Rx Error Flag INT Status, Write 1 clear -+#define IMR_TXFOVW_8192E BIT9 // Transmit FIFO Overflow -+#define IMR_RXFOVW_8192E BIT8 // Receive FIFO Overflow -+ -+//---------------------------------------------------------------------------- -+// 8192E Auto LLT bits (offset 0x224, 8bits) -+//---------------------------------------------------------------------------- -+//224 REG_AUTO_LLT -+// move to hal_com_reg.h -+ -+//---------------------------------------------------------------------------- -+// 8192E Auto LLT bits (offset 0x290, 32bits) -+//---------------------------------------------------------------------------- -+#define BIT_DMA_MODE BIT1 -+#define BIT_USB_RXDMA_AGG_EN BIT31 -+ -+//---------------------------------------------------------------------------- -+// 8192E REG_SYS_CFG1 (offset 0xF0, 32bits) -+//---------------------------------------------------------------------------- -+#define BIT_SPSLDO_SEL BIT24 -+ -+ -+//---------------------------------------------------------------------------- -+// 8192E REG_CCK_CHECK (offset 0x454, 8bits) -+//---------------------------------------------------------------------------- -+#define BIT_BCN_PORT_SEL BIT5 -+ -+//============================================================================ -+// Regsiter Bit and Content definition -+//============================================================================ -+ -+//2 ACMHWCTRL 0x05C0 -+#define AcmHw_HwEn_8192E BIT(0) -+#define AcmHw_VoqEn_8192E BIT(1) -+#define AcmHw_ViqEn_8192E BIT(2) -+#define AcmHw_BeqEn_8192E BIT(3) -+#define AcmHw_VoqStatus_8192E BIT(5) -+#define AcmHw_ViqStatus_8192E BIT(6) -+#define AcmHw_BeqStatus_8192E BIT(7) -+ -+//======================================================== -+// General definitions -+//======================================================== -+ -+#define MACID_NUM_8192E 128 -+#define SEC_CAM_ENT_NUM_8192E 64 -+#define NSS_NUM_8192E 2 -+#define BAND_CAP_8192E (BAND_CAP_2G) -+#define BW_CAP_8192E (BW_CAP_20M | BW_CAP_40M) -+ -+#endif //__RTL8192E_SPEC_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8192E_SPEC_H__ ++#define __RTL8192E_SPEC_H__ ++ ++#include ++ ++ ++//============================================================ ++// 8192E Regsiter offset definition ++//============================================================ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_SWR_CTRL1_8192E 0x0010 // 1 Byte ++#define REG_SYS_SWR_CTRL2_8192E 0x0014 // 1 Byte ++#define REG_AFE_CTRL1_8192E 0x0024 ++#define REG_AFE_CTRL2_8192E 0x0028 ++#define REG_AFE_CTRL3_8192E 0x002c ++ ++#define REG_PAD_CTRL1_8192E 0x0064 ++#define REG_SDIO_CTRL_8192E 0x0070 ++#define REG_OPT_CTRL_8192E 0x0074 ++#define REG_RF_B_CTRL_8192E 0x0076 ++#define REG_AFE_CTRL4_8192E 0x0078 ++#define REG_LDO_SWR_CTRL 0x007C ++#define REG_FW_DRV_MSG_8192E 0x0088 ++#define REG_HMEBOX_E2_E3_8192E 0x008C ++#define REG_HIMR0_8192E 0x00B0 ++#define REG_HISR0_8192E 0x00B4 ++#define REG_HIMR1_8192E 0x00B8 ++#define REG_HISR1_8192E 0x00BC ++ ++#define REG_SYS_CFG1_8192E 0x00F0 ++#define REG_SYS_CFG2_8192E 0x00FC ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) ++#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) ++#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++#define REG_RSVD3_8192E 0x0168 ++#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 ++#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 ++#define REG_C2HEVT_CMD_LEN_88XX 0x01AE ++ ++#define REG_HMEBOX_EXT0_8192E 0x01F0 ++#define REG_HMEBOX_EXT1_8192E 0x01F4 ++#define REG_HMEBOX_EXT2_8192E 0x01F8 ++#define REG_HMEBOX_EXT3_8192E 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_DWBCN0_CTRL 0x0208 ++#define REG_DWBCN1_CTRL 0x0228 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_8192E 0x0290 ++#define REG_EARLY_MODE_CONTROL_8192E 0x02BC ++ ++#define REG_RSVD5_8192E 0x02F0 ++#define REG_RSVD6_8192E 0x02F4 ++#define REG_RSVD7_8192E 0x02F8 ++#define REG_RSVD8_8192E 0x02FC ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8192E 0x0300 ++#define REG_INT_MIG_8192E 0x0304 // Interrupt Migration ++#define REG_BCNQ_TXBD_DESA_8192E 0x0308 // TX Beacon Descriptor Address ++#define REG_MGQ_TXBD_DESA_8192E 0x0310 // TX Manage Queue Descriptor Address ++#define REG_VOQ_TXBD_DESA_8192E 0x0318 // TX VO Queue Descriptor Address ++#define REG_VIQ_TXBD_DESA_8192E 0x0320 // TX VI Queue Descriptor Address ++#define REG_BEQ_TXBD_DESA_8192E 0x0328 // TX BE Queue Descriptor Address ++#define REG_BKQ_TXBD_DESA_8192E 0x0330 // TX BK Queue Descriptor Address ++#define REG_RXQ_RXBD_DESA_8192E 0x0338 // RX Queue Descriptor Address ++#define REG_HI0Q_TXBD_DESA_8192E 0x0340 ++#define REG_HI1Q_TXBD_DESA_8192E 0x0348 ++#define REG_HI2Q_TXBD_DESA_8192E 0x0350 ++#define REG_HI3Q_TXBD_DESA_8192E 0x0358 ++#define REG_HI4Q_TXBD_DESA_8192E 0x0360 ++#define REG_HI5Q_TXBD_DESA_8192E 0x0368 ++#define REG_HI6Q_TXBD_DESA_8192E 0x0370 ++#define REG_HI7Q_TXBD_DESA_8192E 0x0378 ++#define REG_MGQ_TXBD_NUM_8192E 0x0380 ++#define REG_RX_RXBD_NUM_8192E 0x0382 ++#define REG_VOQ_TXBD_NUM_8192E 0x0384 ++#define REG_VIQ_TXBD_NUM_8192E 0x0386 ++#define REG_BEQ_TXBD_NUM_8192E 0x0388 ++#define REG_BKQ_TXBD_NUM_8192E 0x038A ++#define REG_HI0Q_TXBD_NUM_8192E 0x038C ++#define REG_HI1Q_TXBD_NUM_8192E 0x038E ++#define REG_HI2Q_TXBD_NUM_8192E 0x0390 ++#define REG_HI3Q_TXBD_NUM_8192E 0x0392 ++#define REG_HI4Q_TXBD_NUM_8192E 0x0394 ++#define REG_HI5Q_TXBD_NUM_8192E 0x0396 ++#define REG_HI6Q_TXBD_NUM_8192E 0x0398 ++#define REG_HI7Q_TXBD_NUM_8192E 0x039A ++#define REG_TSFTIMER_HCI_8192E 0x039C ++ ++//Read Write Point ++#define REG_VOQ_TXBD_IDX_8192E 0x03A0 ++#define REG_VIQ_TXBD_IDX_8192E 0x03A4 ++#define REG_BEQ_TXBD_IDX_8192E 0x03A8 ++#define REG_BKQ_TXBD_IDX_8192E 0x03AC ++#define REG_MGQ_TXBD_IDX_8192E 0x03B0 ++#define REG_RXQ_TXBD_IDX_8192E 0x03B4 ++#define REG_HI0Q_TXBD_IDX_8192E 0x03B8 ++#define REG_HI1Q_TXBD_IDX_8192E 0x03BC ++#define REG_HI2Q_TXBD_IDX_8192E 0x03C0 ++#define REG_HI3Q_TXBD_IDX_8192E 0x03C4 ++#define REG_HI4Q_TXBD_IDX_8192E 0x03C8 ++#define REG_HI5Q_TXBD_IDX_8192E 0x03CC ++#define REG_HI6Q_TXBD_IDX_8192E 0x03D0 ++#define REG_HI7Q_TXBD_IDX_8192E 0x03D4 ++ ++#define REG_PCIE_HCPWM_8192EE 0x03D8 // ?????? ++#define REG_PCIE_HRPWM_8192EE 0x03DC //PCIe RPWM // ?????? ++#define REG_DBI_WDATA_V1_8192E 0x03E8 ++#define REG_DBI_RDATA_V1_8192E 0x03EC ++#define REG_DBI_FLAG_V1_8192E 0x03F0 ++#define REG_MDIO_V1_8192E 0x3F4 ++#define REG_PCIE_MIX_CFG_8192E 0x3F8 ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_TXBF_CTRL_8192E 0x042C ++#define REG_ARFR0_8192E 0x0444 ++#define REG_ARFR1_8192E 0x044C ++#define REG_CCK_CHECK_8192E 0x0454 ++#define REG_AMPDU_MAX_TIME_8192E 0x0456 ++#define REG_BCNQ1_BDNY_8192E 0x0457 ++ ++#define REG_AMPDU_MAX_LENGTH_8192E 0x0458 ++#define REG_WMAC_LBK_BUF_HD_8192E 0x045D ++#define REG_NDPA_OPT_CTRL_8192E 0x045F ++#define REG_DATA_SC_8192E 0x0483 ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_ARFR2_8192E 0x048C ++#define REG_ARFR3_8192E 0x0494 ++#define REG_TXRPT_START_OFFSET 0x04AC ++#define REG_AMPDU_BURST_MODE_8192E 0x04BC ++#define REG_HT_SINGLE_AMPDU_8192E 0x04C7 ++#define REG_MACID_PKT_DROP0_8192E 0x04D0 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_CTWND_8192E 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8192E 0x0577 ++#define REG_SCH_TXCMD_8192E 0x05F8 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8192E 0x0600 ++ ++#define REG_MAC_TX_SM_STATE_8192E 0x06B4 ++ ++// Power ++#define REG_BFMER0_INFO_8192E 0x06E4 ++#define REG_BFMER1_INFO_8192E 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8192E 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8192E 0x06FC ++ ++// Hardware Port 2 ++#define REG_BFMEE_SEL_8192E 0x0714 ++#define REG_SND_PTCL_CTRL_8192E 0x0718 ++ ++ ++//----------------------------------------------------- ++// ++// Redifine register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define ISR_8192E REG_HISR0_8192E ++ ++//---------------------------------------------------------------------------- ++// 8192E IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8192E 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8192E BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8192E BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8192E BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8192E BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8192E BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8192E BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8192E BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8192E BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8192E BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8192E BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8192E BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8192E BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8192E BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8192E BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8192E BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8192E BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8192E BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8192E BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8192E BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8192E BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8192E BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8192E BIT2 // AC_VO DMA OK ++#define IMR_RDU_8192E BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8192E BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8192E BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8192E BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8192E BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8192E BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8192E BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8192E BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8192E BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8192E BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8192E BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8192E BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8192E BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8192E BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8192E BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8192E BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8192E BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8192E BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8192E BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8192E BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8192E BIT8 // Receive FIFO Overflow ++ ++//---------------------------------------------------------------------------- ++// 8192E Auto LLT bits (offset 0x224, 8bits) ++//---------------------------------------------------------------------------- ++//224 REG_AUTO_LLT ++// move to hal_com_reg.h ++ ++//---------------------------------------------------------------------------- ++// 8192E Auto LLT bits (offset 0x290, 32bits) ++//---------------------------------------------------------------------------- ++#define BIT_DMA_MODE BIT1 ++#define BIT_USB_RXDMA_AGG_EN BIT31 ++ ++//---------------------------------------------------------------------------- ++// 8192E REG_SYS_CFG1 (offset 0xF0, 32bits) ++//---------------------------------------------------------------------------- ++#define BIT_SPSLDO_SEL BIT24 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192E REG_CCK_CHECK (offset 0x454, 8bits) ++//---------------------------------------------------------------------------- ++#define BIT_BCN_PORT_SEL BIT5 ++ ++//============================================================================ ++// Regsiter Bit and Content definition ++//============================================================================ ++ ++//2 ACMHWCTRL 0x05C0 ++#define AcmHw_HwEn_8192E BIT(0) ++#define AcmHw_VoqEn_8192E BIT(1) ++#define AcmHw_ViqEn_8192E BIT(2) ++#define AcmHw_BeqEn_8192E BIT(3) ++#define AcmHw_VoqStatus_8192E BIT(5) ++#define AcmHw_ViqStatus_8192E BIT(6) ++#define AcmHw_BeqStatus_8192E BIT(7) ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8192E 128 ++#define SEC_CAM_ENT_NUM_8192E 64 ++#define NSS_NUM_8192E 2 ++#define BAND_CAP_8192E (BAND_CAP_2G) ++#define BW_CAP_8192E (BW_CAP_20M | BW_CAP_40M) ++ ++#endif //__RTL8192E_SPEC_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_sreset.h new file mode 100644 -index 000000000..ea2f19f04 +index 0000000..ea2f19f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_sreset.h @@ -0,0 +1,30 @@ @@ -290724,464 +332156,464 @@ index 000000000..ea2f19f04 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_xmit.h new file mode 100644 -index 000000000..2d29eb248 +index 0000000..37e0088 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8192e_xmit.h @@ -0,0 +1,451 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8192E_XMIT_H__ -+#define __RTL8192E_XMIT_H__ -+ -+typedef struct txdescriptor_8192e -+{ -+ //Offset 0 -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 own:1; -+ -+ //Offset 4 -+ u32 macid:6; -+ u32 rsvd0406:2; -+ u32 qsel:5; -+ u32 rd_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:4; -+ u32 navusehdr:1; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 rsvd0424:2; -+ u32 pkt_offset:5; // unit: 8 bytes -+ u32 rsvd0431:1; -+ -+ //Offset 8 -+ u32 rts_rc:6; -+ u32 data_rc:6; -+ u32 agg_en:1; -+ u32 rd_en:1; -+ u32 bar_rty_th:2; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 ccx:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 ant_sel_a:1; -+ u32 ant_sel_b:1; -+ u32 tx_ant_cck:2; -+ u32 tx_antl:2; -+ u32 tx_ant_ht:2; -+ -+ //Offset 12 -+ u32 nextheadpage:8; -+ u32 tailpage:8; -+ u32 seq:12; -+ u32 cpu_handle:1; -+ u32 tag1:1; -+ u32 trigger_int:1; -+ u32 hwseq_en:1; -+ -+ //Offset 16 -+ u32 rtsrate:5; -+ u32 ap_dcfe:1; -+ u32 hwseq_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 pwr_status:3; -+ u32 wait_dcts:1; -+ u32 cts2ap_en:1; -+ u32 data_sc:2; -+ u32 data_stbc:2; -+ u32 data_short:1; -+ u32 data_bw:1; -+ u32 rts_short:1; -+ u32 rts_bw:1; -+ u32 rts_sc:2; -+ u32 vcs_stbc:2; -+ -+ //Offset 20 -+ u32 datarate:6; -+ u32 sgi:1; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 usb_txagg_num:8; -+ -+ //Offset 24 -+ u32 txagg_a:5; -+ u32 txagg_b:5; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 mcsg1_max_len:4; -+ u32 mcsg2_max_len:4; -+ u32 mcsg3_max_len:4; -+ u32 mcs7_sgi_max_len:4; -+ -+ //Offset 28 -+ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) -+ u32 mcsg4_max_len:4; -+ u32 mcsg5_max_len:4; -+ u32 mcsg6_max_len:4; -+ u32 mcs15_sgi_max_len:4; -+}TXDESC_8192E, *PTXDESC_8192E; -+ -+ -+ -+//For 88e early mode -+#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -+#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -+#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -+#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -+#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -+#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -+#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) -+ -+// -+//defined for TX DESC Operation -+// -+ -+#define MAX_TID (15) -+ -+//OFFSET 0 -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+#define BMC BIT(24) -+#define LSG BIT(26) -+#define FSG BIT(27) -+#define OWN BIT(31) -+ -+ -+//OFFSET 4 -+#define PKT_OFFSET_SZ 0 -+#define QSEL_SHT 8 -+#define RATE_ID_SHT 16 -+#define NAVUSEHDR BIT(20) -+#define SEC_TYPE_SHT 22 -+#define PKT_OFFSET_SHT 26 -+ -+//OFFSET 8 -+#define AGG_EN BIT(12) -+#define AGG_BK BIT(16) -+#define AMPDU_DENSITY_SHT 20 -+#define ANTSEL_A BIT(24) -+#define ANTSEL_B BIT(25) -+#define TX_ANT_CCK_SHT 26 -+#define TX_ANTL_SHT 28 -+#define TX_ANT_HT_SHT 30 -+ -+//OFFSET 12 -+#define SEQ_SHT 16 -+#define EN_HWSEQ BIT(31) -+ -+//OFFSET 16 -+#define QOS BIT(6) -+#define HW_SSN BIT(7) -+#define USERATE BIT(8) -+#define DISDATAFB BIT(10) -+#define CTS_2_SELF BIT(11) -+#define RTS_EN BIT(12) -+#define HW_RTS_EN BIT(13) -+#define DATA_SHORT BIT(24) -+#define PWR_STATUS_SHT 15 -+#define DATA_SC_SHT 20 -+#define DATA_BW BIT(25) -+ -+//OFFSET 20 -+#define RTY_LMT_EN BIT(17) -+ -+ -+//OFFSET 20 -+#define SGI BIT(6) -+#define USB_TXAGG_NUM_SHT 24 -+ -+ -+//=====Tx Desc Buffer content -+ -+// config element for each tx buffer -+/* -+#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu) -+#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) -+*/ -+#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) -+#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) -+ -+ -+// Dword 0 -+#define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -+#define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -+#define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+// Dword 1 -+#define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -+#define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0,32) -+ -+ -+// Dword 2 -+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) -+// Dword 3, RESERVED -+ -+ -+//=====Tx Desc content -+// Dword 0 -+#define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+#define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+// Dword 1 -+#define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+#define SET_TX_DESC_MORE_DATA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_CAP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_MODE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) -+ -+ -+// Dword 2 -+#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_NULL_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -+#define SET_TX_DESC_NULL_1_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -+#define SET_TX_DESC_BK_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define GET_TX_DESC_MORE_FRAG_92E(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) -+#define SET_TX_DESC_SPE_RPT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_NULL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+ -+// Dword 3 -+#define SET_TX_DESC_WHEADER_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+#define SET_TX_DESC_CHK_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+#define SET_TX_DESC_EARLY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_HW_PORT_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+// Dword 4 -+#define SET_TX_DESC_TX_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_TRY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+#define SET_TX_DESC_PCTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -+#define SET_TX_DESC_PCTS_MASK_IDX_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) -+ -+ -+// Dword 5 -+#define SET_TX_DESC_DATA_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_VCS_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_TX_ANT_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) -+#define SET_TX_DESC_TX_POWER_0_PSET_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) -+ -+// Dword 6 -+#define SET_TX_DESC_SW_DEFINE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_ANTSEL_A_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANTSEL_C_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+#define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+ -+// Dword 7 -+#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) -+#define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#else -+#define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ -+ -+//#define SET_TX_DESC_HWSEQ_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+// Dword 8 -+ -+#define SET_TX_DESC_RTS_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -+#define SET_TX_DESC_BAR_RTY_TH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -+#define SET_TX_DESC_DATA_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -+#define SET_TX_DESC_EN_HWSEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+#define SET_TX_DESC_NEXT_HEAD_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -+#define SET_TX_DESC_TAIL_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) -+ -+// Dword 9 -+#define SET_TX_DESC_PADDING_LENGTH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -+#define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) -+#define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+#define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8192eu_init_xmit_priv(PADAPTER padapter); -+void rtl8192eu_free_xmit_priv(PADAPTER padapter); -+s32 rtl8192eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8192eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8192eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter); -+#define hal_xmit_handler rtl8192eu_xmit_buf_handler -+void rtl8192eu_xmit_tasklet(void *priv); -+s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8192ee_init_xmit_priv(PADAPTER padapter); -+void rtl8192ee_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8192ee_xmitframe_resume(_adapter *padapter); -+s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+void rtl8192ee_xmit_tasklet(void *priv); -+#endif -+ -+#if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) -+s32 rtl8192es_init_xmit_priv(PADAPTER padapter); -+void rtl8192es_free_xmit_priv(PADAPTER padapter); -+ -+s32 rtl8192es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8192es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8192es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+thread_return rtl8192es_xmit_thread(thread_context context); -+s32 rtl8192es_xmit_buf_handler(PADAPTER padapter); -+ -+#ifdef CONFIG_SDIO_TX_TASKLET -+void rtl8192es_xmit_tasklet(void *priv); -+#endif -+#endif -+ -+struct txrpt_ccx_92e { -+ /* offset 0 */ -+ u8 tag1:1; -+ u8 pkt_num:3; -+ u8 txdma_underflow:1; -+ u8 int_bt:1; -+ u8 int_tri:1; -+ u8 int_ccx:1; -+ -+ /* offset 1 */ -+ u8 mac_id:6; -+ u8 pkt_ok:1; -+ u8 bmc:1; -+ -+ /* offset 2 */ -+ u8 retry_cnt:6; -+ u8 lifetime_over:1; -+ u8 retry_over:1; -+ -+ /* offset 3 */ -+ u8 ccx_qtime0; -+ u8 ccx_qtime1; -+ -+ /* offset 5 */ -+ u8 final_data_rate; -+ -+ /* offset 6 */ -+ u8 sw1:4; -+ u8 qsel:4; -+ -+ /* offset 7 */ -+ u8 sw0; -+}; -+ -+#ifdef CONFIG_TX_EARLY_MODE -+void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); -+#endif -+ s32 rtl8192e_init_xmit_priv(_adapter *padapter); -+void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); -+ -+void rtl8192e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, -+ u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); -+void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); -+ -+u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); -+void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8192e_fixed_rate(_adapter *padapter,u8 *ptxdesc); -+ -+#endif //__RTL8192E_XMIT_H__ -+ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_XMIT_H__ ++#define __RTL8192E_XMIT_H__ ++ ++typedef struct txdescriptor_8192e ++{ ++ //Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 own:1; ++ ++ //Offset 4 ++ u32 macid:6; ++ u32 rsvd0406:2; ++ u32 qsel:5; ++ u32 rd_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:4; ++ u32 navusehdr:1; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 rsvd0424:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 rsvd0431:1; ++ ++ //Offset 8 ++ u32 rts_rc:6; ++ u32 data_rc:6; ++ u32 agg_en:1; ++ u32 rd_en:1; ++ u32 bar_rty_th:2; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 ccx:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 ant_sel_a:1; ++ u32 ant_sel_b:1; ++ u32 tx_ant_cck:2; ++ u32 tx_antl:2; ++ u32 tx_ant_ht:2; ++ ++ //Offset 12 ++ u32 nextheadpage:8; ++ u32 tailpage:8; ++ u32 seq:12; ++ u32 cpu_handle:1; ++ u32 tag1:1; ++ u32 trigger_int:1; ++ u32 hwseq_en:1; ++ ++ //Offset 16 ++ u32 rtsrate:5; ++ u32 ap_dcfe:1; ++ u32 hwseq_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 pwr_status:3; ++ u32 wait_dcts:1; ++ u32 cts2ap_en:1; ++ u32 data_sc:2; ++ u32 data_stbc:2; ++ u32 data_short:1; ++ u32 data_bw:1; ++ u32 rts_short:1; ++ u32 rts_bw:1; ++ u32 rts_sc:2; ++ u32 vcs_stbc:2; ++ ++ //Offset 20 ++ u32 datarate:6; ++ u32 sgi:1; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 usb_txagg_num:8; ++ ++ //Offset 24 ++ u32 txagg_a:5; ++ u32 txagg_b:5; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 mcsg1_max_len:4; ++ u32 mcsg2_max_len:4; ++ u32 mcsg3_max_len:4; ++ u32 mcs7_sgi_max_len:4; ++ ++ //Offset 28 ++ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) ++ u32 mcsg4_max_len:4; ++ u32 mcsg5_max_len:4; ++ u32 mcsg6_max_len:4; ++ u32 mcs15_sgi_max_len:4; ++}TXDESC_8192E, *PTXDESC_8192E; ++ ++ ++ ++//For 88e early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define QSEL_SHT 8 ++#define RATE_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define SEC_TYPE_SHT 22 ++#define PKT_OFFSET_SHT 26 ++ ++//OFFSET 8 ++#define AGG_EN BIT(12) ++#define AGG_BK BIT(16) ++#define AMPDU_DENSITY_SHT 20 ++#define ANTSEL_A BIT(24) ++#define ANTSEL_B BIT(25) ++#define TX_ANT_CCK_SHT 26 ++#define TX_ANTL_SHT 28 ++#define TX_ANT_HT_SHT 30 ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++#define EN_HWSEQ BIT(31) ++ ++//OFFSET 16 ++#define QOS BIT(6) ++#define HW_SSN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define CTS_2_SELF BIT(11) ++#define RTS_EN BIT(12) ++#define HW_RTS_EN BIT(13) ++#define DATA_SHORT BIT(24) ++#define PWR_STATUS_SHT 15 ++#define DATA_SC_SHT 20 ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define RTY_LMT_EN BIT(17) ++ ++ ++//OFFSET 20 ++#define SGI BIT(6) ++#define USB_TXAGG_NUM_SHT 24 ++ ++ ++//=====Tx Desc Buffer content ++ ++// config element for each tx buffer ++/* ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) ++*/ ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) ++ ++ ++// Dword 0 ++#define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) ++#define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) ++#define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++// Dword 1 ++#define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0,32) ++ ++ ++// Dword 2 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) ++// Dword 3, RESERVED ++ ++ ++//=====Tx Desc content ++// Dword 0 ++#define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++#define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++#define SET_TX_DESC_MORE_DATA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_CAP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_MODE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_NULL_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) ++#define SET_TX_DESC_NULL_1_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) ++#define SET_TX_DESC_BK_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define GET_TX_DESC_MORE_FRAG_92E(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) ++#define SET_TX_DESC_SPE_RPT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_NULL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_HW_PORT_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_TRY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++#define SET_TX_DESC_PCTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) ++#define SET_TX_DESC_PCTS_MASK_IDX_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_VCS_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++#define SET_TX_DESC_TX_ANT_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) ++#define SET_TX_DESC_TX_POWER_0_PSET_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++ ++ ++//#define SET_TX_DESC_HWSEQ_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++// Dword 8 ++ ++#define SET_TX_DESC_RTS_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) ++#define SET_TX_DESC_BAR_RTY_TH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) ++#define SET_TX_DESC_DATA_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) ++#define SET_TX_DESC_EN_HWSEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++#define SET_TX_DESC_NEXT_HEAD_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) ++#define SET_TX_DESC_TAIL_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_PADDING_LENGTH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) ++#define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) ++#define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++#define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8192eu_init_xmit_priv(PADAPTER padapter); ++void rtl8192eu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8192eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8192eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter); ++#define hal_xmit_handler rtl8192eu_xmit_buf_handler ++void rtl8192eu_xmit_tasklet(void *priv); ++s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192ee_init_xmit_priv(PADAPTER padapter); ++void rtl8192ee_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8192ee_xmitframe_resume(_adapter *padapter); ++s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++void rtl8192ee_xmit_tasklet(void *priv); ++#endif ++ ++#if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) ++s32 rtl8192es_init_xmit_priv(PADAPTER padapter); ++void rtl8192es_free_xmit_priv(PADAPTER padapter); ++ ++s32 rtl8192es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8192es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++thread_return rtl8192es_xmit_thread(thread_context context); ++s32 rtl8192es_xmit_buf_handler(PADAPTER padapter); ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++void rtl8192es_xmit_tasklet(void *priv); ++#endif ++#endif ++ ++struct txrpt_ccx_92e { ++ /* offset 0 */ ++ u8 tag1:1; ++ u8 pkt_num:3; ++ u8 txdma_underflow:1; ++ u8 int_bt:1; ++ u8 int_tri:1; ++ u8 int_ccx:1; ++ ++ /* offset 1 */ ++ u8 mac_id:6; ++ u8 pkt_ok:1; ++ u8 bmc:1; ++ ++ /* offset 2 */ ++ u8 retry_cnt:6; ++ u8 lifetime_over:1; ++ u8 retry_over:1; ++ ++ /* offset 3 */ ++ u8 ccx_qtime0; ++ u8 ccx_qtime1; ++ ++ /* offset 5 */ ++ u8 final_data_rate; ++ ++ /* offset 6 */ ++ u8 sw1:4; ++ u8 qsel:4; ++ ++ /* offset 7 */ ++ u8 sw0; ++}; ++ ++#ifdef CONFIG_TX_EARLY_MODE ++void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); ++#endif ++ s32 rtl8192e_init_xmit_priv(_adapter *padapter); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); ++ ++void rtl8192e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, ++ u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); ++ ++u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); ++u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); ++void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8192e_fixed_rate(_adapter *padapter,u8 *ptxdesc); ++ ++#endif //__RTL8192E_XMIT_H__ ++ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_cmd.h new file mode 100644 -index 000000000..972bed5fe +index 0000000..972bed5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_cmd.h @@ -0,0 +1,217 @@ @@ -291404,7 +332836,7 @@ index 000000000..972bed5fe + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_dm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_dm.h new file mode 100644 -index 000000000..094adc85e +index 0000000..094adc8 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_dm.h @@ -0,0 +1,48 @@ @@ -291458,492 +332890,492 @@ index 000000000..094adc85e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_hal.h new file mode 100644 -index 000000000..7ad47d465 +index 0000000..69a6dc5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_hal.h @@ -0,0 +1,326 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8703B_HAL_H__ -+#define __RTL8703B_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8703b_spec.h" -+#include "rtl8703b_rf.h" -+#include "rtl8703b_dm.h" -+#include "rtl8703b_recv.h" -+#include "rtl8703b_xmit.h" -+#include "rtl8703b_cmd.h" -+#include "rtl8703b_led.h" -+#include "Hal8703BPwrSeq.h" -+#include "Hal8703BPhyReg.h" -+#include "Hal8703BPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8703b_sreset.h" -+#endif -+ -+ -+//--------------------------------------------------------------------- -+// RTL8703B From file -+//--------------------------------------------------------------------- -+ #define RTL8703B_FW_IMG "rtl8703b/FW_NIC.bin" -+ #define RTL8703B_FW_WW_IMG "rtl8703b/FW_WoWLAN.bin" -+ #define RTL8703B_PHY_REG "rtl8703b/PHY_REG.txt" -+ #define RTL8703B_PHY_RADIO_A "rtl8703b/RadioA.txt" -+ #define RTL8703B_PHY_RADIO_B "rtl8703b/RadioB.txt" -+ #define RTL8703B_TXPWR_TRACK "rtl8703b/TxPowerTrack.txt" -+ #define RTL8703B_AGC_TAB "rtl8703b/AGC_TAB.txt" -+ #define RTL8703B_PHY_MACREG "rtl8703b/MAC_REG.txt" -+ #define RTL8703B_PHY_REG_PG "rtl8703b/PHY_REG_PG.txt" -+ #define RTL8703B_PHY_REG_MP "rtl8703b/PHY_REG_MP.txt" -+ #define RTL8703B_TXPWR_LMT "rtl8703b/TXPWR_LMT.txt" -+ -+//--------------------------------------------------------------------- -+// RTL8703B From header -+//--------------------------------------------------------------------- -+ -+#if MP_DRIVER == 1 -+ #define Rtl8703B_FwBTImgArray Rtl8703BFwBTImgArray -+ #define Rtl8703B_FwBTImgArrayLength Rtl8703BFwBTImgArrayLength -+ -+ #define Rtl8703B_PHY_REG_Array_MP Rtl8703B_PHYREG_Array_MP -+ #define Rtl8703B_PHY_REG_Array_MPLength Rtl8703B_PHYREG_Array_MPLength -+#endif -+ -+ -+#define FW_8703B_SIZE 0x8000 -+#define FW_8703B_START_ADDRESS 0x1000 -+#define FW_8703B_END_ADDRESS 0x1FFF //0x5FFF -+ -+#define IS_FW_HEADER_EXIST_8703B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x03B0) -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8* szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8703B_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8703B, *PRT_FIRMWARE_8703B; -+ -+// -+// This structure must be cared byte-ordering -+// -+// Added by tynli. 2009.12.04. -+typedef struct _RT_8703B_FIRMWARE_HDR -+{ -+ // 8-byte alinment required -+ -+ //--- LONG WORD 0 ---- -+ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut -+ u8 Category; // AP/NIC and USB/PCI -+ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions -+ u16 Version; // FW Version -+ u16 Subversion; // FW Subversion, default 0x00 -+ -+ //--- LONG WORD 1 ---- -+ u8 Month; // Release time Month field -+ u8 Date; // Release time Date field -+ u8 Hour; // Release time Hour field -+ u8 Minute; // Release time Minute field -+ u16 RamCodeSize; // The size of RAM code -+ u16 Rsvd2; -+ -+ //--- LONG WORD 2 ---- -+ u32 SvnIdx; // The SVN entry index -+ u32 Rsvd3; -+ -+ //--- LONG WORD 3 ---- -+ u32 Rsvd4; -+ u32 Rsvd5; -+}RT_8703B_FIRMWARE_HDR, *PRT_8703B_FIRMWARE_HDR; -+ -+#define DRIVER_EARLY_INT_TIME_8703B 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8703B 0x02 -+ -+// for 8703B -+// TX 32K, RX 16K, Page size 128B for TX, 8B for RX -+#define PAGE_SIZE_TX_8703B 128 -+#define PAGE_SIZE_RX_8703B 8 -+ -+#define TX_DMA_SIZE_8703B 0x8000 /* 32K(TX) */ -+#define RX_DMA_SIZE_8703B 0x4000 /* 16K(RX) */ -+ -+#ifdef CONFIG_WOWLAN -+#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ -+#else -+#define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+#define RX_DMA_RESERVED_SIZE_8703B 0x100 // 256B, reserved for c2h debug message -+#else -+#define RX_DMA_RESERVED_SIZE_8703B 0x80 // 128B, reserved for tx report -+#endif -+#define RX_DMA_BOUNDARY_8703B (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B - 1) -+ -+ -+// Note: We will divide number of page equally for each queue other than public queue! -+ -+//For General Reserved Page Number(Beacon Queue is reserved page) -+//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 -+#define BCNQ_PAGE_NUM_8703B 0x08 -+#ifdef CONFIG_CONCURRENT_MODE -+#define BCNQ1_PAGE_NUM_8703B 0x08 // 0x04 -+#else -+#define BCNQ1_PAGE_NUM_8703B 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+#undef BCNQ1_PAGE_NUM_8703B -+#define BCNQ1_PAGE_NUM_8703B 0x00 // 0x04 -+#endif -+ -+//For WoWLan , more reserved page -+//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 -+#ifdef CONFIG_WOWLAN -+#define WOWLAN_PAGE_NUM_8703B 0x07 -+#else -+#define WOWLAN_PAGE_NUM_8703B 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+#undef WOWLAN_PAGE_NUM_8703B -+#define WOWLAN_PAGE_NUM_8703B 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+#define AP_WOWLAN_PAGE_NUM_8703B 0x02 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8703B (0xFF - BCNQ_PAGE_NUM_8703B - BCNQ1_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B) -+#define TX_PAGE_BOUNDARY_8703B (TX_TOTAL_PAGE_NUMBER_8703B + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B TX_TOTAL_PAGE_NUMBER_8703B -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8703B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B + 1) -+ -+// For Normal Chip Setting -+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8703B -+#define NORMAL_PAGE_NUM_HPQ_8703B 0x0C -+#define NORMAL_PAGE_NUM_LPQ_8703B 0x02 -+#define NORMAL_PAGE_NUM_NPQ_8703B 0x02 -+ -+// Note: For Normal Chip Setting, modify later -+#define WMM_NORMAL_PAGE_NUM_HPQ_8703B 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8703B 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8703B 0x20 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES 15 -+ -+#define HAL_EFUSE_MEMORY -+ -+#define HWSET_MAX_SIZE_8703B 256 -+#define EFUSE_REAL_CONTENT_LEN_8703B 256 -+#define EFUSE_MAP_LEN_8703B 512 -+#define EFUSE_MAX_SECTION_8703B 64 -+ -+#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8703B) -+ -+#define EFUSE_ACCESS_ON 0x69 -+#define EFUSE_ACCESS_OFF 0x00 -+ -+//======================================================== -+// EFUSE for BT definition -+//======================================================== -+#define BANK_NUM 1 -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 -+#define EFUSE_BT_REAL_CONTENT_LEN (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) -+#define EFUSE_BT_MAP_LEN 1024 // 1k bytes -+#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+typedef struct _C2H_EVT_HDR -+{ -+ u8 CmdID; -+ u8 CmdLen; -+ u8 CmdSeq; -+} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; -+ -+typedef enum tag_Package_Definition -+{ -+ PACKAGE_DEFAULT, -+ PACKAGE_QFN68, -+ PACKAGE_TFBGA90, -+ PACKAGE_TFBGA80, -+ PACKAGE_TFBGA79 -+}PACKAGE_TYPE_E; -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+// rtl8703b_hal_init.c -+s32 rtl8703b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8703b_FirmwareSelfReset(PADAPTER padapter); -+void rtl8703b_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8703b_InitAntenna_Selection(PADAPTER padapter); -+void rtl8703b_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8703b_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8703b_init_default_value(PADAPTER padapter); -+ -+s32 rtl8703b_InitLLTTable(PADAPTER padapter); -+ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -+s32 CardDisableWithoutHWSM(PADAPTER padapter); -+ -+// EFuse -+u8 GetEEPROMSize8703B(PADAPTER padapter); -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8703B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBTCoexistInfo_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseEEPROMVer_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8703B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8703B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -+VOID Hal_EfuseParseMacHidden_8703B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+VOID Hal_EfuseParseVoltage_8703B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+VOID Hal_EfuseParseBoardType_8703B(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); -+ -+#ifdef CONFIG_C2H_PACKET_EN -+void rtl8703b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); -+#endif -+ -+ -+void rtl8703b_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8703b(_adapter *adapter); -+void SetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); -+#ifdef CONFIG_C2H_PACKET_EN -+void SetHwRegWithBuf8703B(PADAPTER padapter, u8 variable, u8 *pbuf, int len); -+#endif // CONFIG_C2H_PACKET_EN -+u8 SetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+// register -+void rtl8703b_InitBeaconParameters(PADAPTER padapter); -+void rtl8703b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+void _InitBurstPktLen_8703BS(PADAPTER Adapter); -+void _InitLTECoex_8703BS(PADAPTER Adapter); -+void _InitMacAPLLSetting_8703B(PADAPTER Adapter); -+void _8051Reset8703(PADAPTER padapter); -+#ifdef CONFIG_WOWLAN -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif //CONFIG_WOWLAN -+ -+void rtl8703b_start_thread(_adapter *padapter); -+void rtl8703b_stop_thread(_adapter *padapter); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+void rtl8703bs_init_checkbthang_workqueue(_adapter * adapter); -+void rtl8703bs_free_checkbthang_workqueue(_adapter * adapter); -+void rtl8703bs_cancle_checkbthang_workqueue(_adapter * adapter); -+void rtl8703bs_hal_check_bt_hang(_adapter * adapter); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+ -+int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+ -+void CCX_FwC2HTxRpt_8703b(PADAPTER padapter, u8 *pdata, u8 len); -+s32 c2h_id_filter_ccx_8703b(u8 *buf); -+s32 c2h_handler_8703b(PADAPTER padapter, u8 *pC2hEvent); -+u8 MRateToHwRate8703B(u8 rate); -+u8 HwRateToMRate8703B(u8 rate); -+ -+void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+ -+#ifdef CONFIG_PCI_HCI -+BOOLEAN InterruptRecognized8703BE(PADAPTER Adapter); -+VOID UpdateInterruptMask8703BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_HAL_H__ ++#define __RTL8703B_HAL_H__ ++ ++#include "hal_data.h" ++ ++#include "rtl8703b_spec.h" ++#include "rtl8703b_rf.h" ++#include "rtl8703b_dm.h" ++#include "rtl8703b_recv.h" ++#include "rtl8703b_xmit.h" ++#include "rtl8703b_cmd.h" ++#include "rtl8703b_led.h" ++#include "Hal8703BPwrSeq.h" ++#include "Hal8703BPhyReg.h" ++#include "Hal8703BPhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8703b_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8703B From file ++//--------------------------------------------------------------------- ++ #define RTL8703B_FW_IMG "rtl8703b/FW_NIC.bin" ++ #define RTL8703B_FW_WW_IMG "rtl8703b/FW_WoWLAN.bin" ++ #define RTL8703B_PHY_REG "rtl8703b/PHY_REG.txt" ++ #define RTL8703B_PHY_RADIO_A "rtl8703b/RadioA.txt" ++ #define RTL8703B_PHY_RADIO_B "rtl8703b/RadioB.txt" ++ #define RTL8703B_TXPWR_TRACK "rtl8703b/TxPowerTrack.txt" ++ #define RTL8703B_AGC_TAB "rtl8703b/AGC_TAB.txt" ++ #define RTL8703B_PHY_MACREG "rtl8703b/MAC_REG.txt" ++ #define RTL8703B_PHY_REG_PG "rtl8703b/PHY_REG_PG.txt" ++ #define RTL8703B_PHY_REG_MP "rtl8703b/PHY_REG_MP.txt" ++ #define RTL8703B_TXPWR_LMT "rtl8703b/TXPWR_LMT.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8703B From header ++//--------------------------------------------------------------------- ++ ++#if MP_DRIVER == 1 ++ #define Rtl8703B_FwBTImgArray Rtl8703BFwBTImgArray ++ #define Rtl8703B_FwBTImgArrayLength Rtl8703BFwBTImgArrayLength ++ ++ #define Rtl8703B_PHY_REG_Array_MP Rtl8703B_PHYREG_Array_MP ++ #define Rtl8703B_PHY_REG_Array_MPLength Rtl8703B_PHYREG_Array_MPLength ++#endif ++ ++ ++#define FW_8703B_SIZE 0x8000 ++#define FW_8703B_START_ADDRESS 0x1000 ++#define FW_8703B_END_ADDRESS 0x1FFF //0x5FFF ++ ++#define IS_FW_HEADER_EXIST_8703B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x03B0) ++ ++typedef struct _RT_FIRMWARE { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_8703B_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8703B, *PRT_FIRMWARE_8703B; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8703B_FIRMWARE_HDR ++{ ++ // 8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u16 Subversion; // FW Subversion, default 0x00 ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++}RT_8703B_FIRMWARE_HDR, *PRT_8703B_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME_8703B 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8703B 0x02 ++ ++// for 8703B ++// TX 32K, RX 16K, Page size 128B for TX, 8B for RX ++#define PAGE_SIZE_TX_8703B 128 ++#define PAGE_SIZE_RX_8703B 8 ++ ++#define TX_DMA_SIZE_8703B 0x8000 /* 32K(TX) */ ++#define RX_DMA_SIZE_8703B 0x4000 /* 16K(RX) */ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8703B 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8703B 0x80 // 128B, reserved for tx report ++#endif ++#define RX_DMA_BOUNDARY_8703B (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B - 1) ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++//For General Reserved Page Number(Beacon Queue is reserved page) ++//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 ++#define BCNQ_PAGE_NUM_8703B 0x08 ++#ifdef CONFIG_CONCURRENT_MODE ++#define BCNQ1_PAGE_NUM_8703B 0x08 // 0x04 ++#else ++#define BCNQ1_PAGE_NUM_8703B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef BCNQ1_PAGE_NUM_8703B ++#define BCNQ1_PAGE_NUM_8703B 0x00 // 0x04 ++#endif ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8703B 0x07 ++#else ++#define WOWLAN_PAGE_NUM_8703B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef WOWLAN_PAGE_NUM_8703B ++#define WOWLAN_PAGE_NUM_8703B 0x15 ++#endif ++ ++#ifdef CONFIG_AP_WOWLAN ++#define AP_WOWLAN_PAGE_NUM_8703B 0x02 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8703B (0xFF - BCNQ_PAGE_NUM_8703B - BCNQ1_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B) ++#define TX_PAGE_BOUNDARY_8703B (TX_TOTAL_PAGE_NUMBER_8703B + 1) ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B TX_TOTAL_PAGE_NUMBER_8703B ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8703B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8703B ++#define NORMAL_PAGE_NUM_HPQ_8703B 0x0C ++#define NORMAL_PAGE_NUM_LPQ_8703B 0x02 ++#define NORMAL_PAGE_NUM_NPQ_8703B 0x02 ++ ++// Note: For Normal Chip Setting, modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_8703B 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8703B 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8703B 0x20 ++ ++ ++#include "HalVerDef.h" ++#include "hal_com.h" ++ ++#define EFUSE_OOB_PROTECT_BYTES 15 ++ ++#define HAL_EFUSE_MEMORY ++ ++#define HWSET_MAX_SIZE_8703B 256 ++#define EFUSE_REAL_CONTENT_LEN_8703B 256 ++#define EFUSE_MAP_LEN_8703B 512 ++#define EFUSE_MAX_SECTION_8703B 64 ++ ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8703B) ++ ++#define EFUSE_ACCESS_ON 0x69 ++#define EFUSE_ACCESS_OFF 0x00 ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define BANK_NUM 1 ++#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 ++#define EFUSE_BT_REAL_CONTENT_LEN (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++typedef struct _C2H_EVT_HDR ++{ ++ u8 CmdID; ++ u8 CmdLen; ++ u8 CmdSeq; ++} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; ++ ++typedef enum tag_Package_Definition ++{ ++ PACKAGE_DEFAULT, ++ PACKAGE_QFN68, ++ PACKAGE_TFBGA90, ++ PACKAGE_TFBGA80, ++ PACKAGE_TFBGA79 ++}PACKAGE_TYPE_E; ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++// rtl8703b_hal_init.c ++s32 rtl8703b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); ++void rtl8703b_FirmwareSelfReset(PADAPTER padapter); ++void rtl8703b_InitializeFirmwareVars(PADAPTER padapter); ++ ++void rtl8703b_InitAntenna_Selection(PADAPTER padapter); ++void rtl8703b_DeinitAntenna_Selection(PADAPTER padapter); ++void rtl8703b_CheckAntenna_Selection(PADAPTER padapter); ++void rtl8703b_init_default_value(PADAPTER padapter); ++ ++s32 rtl8703b_InitLLTTable(PADAPTER padapter); ++ ++s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); ++s32 CardDisableWithoutHWSM(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8703B(PADAPTER padapter); ++void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); ++void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); ++void Hal_EfuseParseTxPowerInfo_8703B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseBTCoexistInfo_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseEEPROMVer_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseChnlPlan_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseCustomerID_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseAntennaDiversity_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8703B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); ++void Hal_EfuseParseThermalMeter_8703B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); ++VOID Hal_EfuseParseMacHidden_8703B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseVoltage_8703B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseBoardType_8703B(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++ ++#ifdef CONFIG_C2H_PACKET_EN ++void rtl8703b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); ++#endif ++ ++ ++void rtl8703b_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8703b(_adapter *adapter); ++void SetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); ++void GetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); ++#ifdef CONFIG_C2H_PACKET_EN ++void SetHwRegWithBuf8703B(PADAPTER padapter, u8 variable, u8 *pbuf, int len); ++#endif // CONFIG_C2H_PACKET_EN ++u8 SetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++ ++// register ++void rtl8703b_InitBeaconParameters(PADAPTER padapter); ++void rtl8703b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); ++void _InitBurstPktLen_8703BS(PADAPTER Adapter); ++void _InitLTECoex_8703BS(PADAPTER Adapter); ++void _InitMacAPLLSetting_8703B(PADAPTER Adapter); ++void _8051Reset8703(PADAPTER padapter); ++#ifdef CONFIG_WOWLAN ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void rtl8703b_start_thread(_adapter *padapter); ++void rtl8703b_stop_thread(_adapter *padapter); ++ ++#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) ++void rtl8703bs_init_checkbthang_workqueue(_adapter * adapter); ++void rtl8703bs_free_checkbthang_workqueue(_adapter * adapter); ++void rtl8703bs_cancle_checkbthang_workqueue(_adapter * adapter); ++void rtl8703bs_hal_check_bt_hang(_adapter * adapter); ++#endif ++ ++#ifdef CONFIG_GPIO_WAKEUP ++void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); ++#endif ++ ++int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++ ++void CCX_FwC2HTxRpt_8703b(PADAPTER padapter, u8 *pdata, u8 len); ++s32 c2h_id_filter_ccx_8703b(u8 *buf); ++s32 c2h_handler_8703b(PADAPTER padapter, u8 *pC2hEvent); ++u8 MRateToHwRate8703B(u8 rate); ++u8 HwRateToMRate8703B(u8 rate); ++ ++void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8703BE(PADAPTER Adapter); ++VOID UpdateInterruptMask8703BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_led.h new file mode 100644 -index 000000000..bfd851e6f +index 0000000..1be6754 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_led.h @@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8703B_LED_H__ -+#define __RTL8703B_LED_H__ -+ -+#include -+#include -+#include -+ -+ -+//================================================================================ -+// Interface to manipulate LED objects. -+//================================================================================ -+#ifdef CONFIG_USB_HCI -+void rtl8703bu_InitSwLeds(PADAPTER padapter); -+void rtl8703bu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+void rtl8703bs_InitSwLeds(PADAPTER padapter); -+void rtl8703bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_GSPI_HCI -+void rtl8703bs_InitSwLeds(PADAPTER padapter); -+void rtl8703bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+void rtl8703be_InitSwLeds(PADAPTER padapter); -+void rtl8703be_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_LED_H__ ++#define __RTL8703B_LED_H__ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8703bu_InitSwLeds(PADAPTER padapter); ++void rtl8703bu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8703bs_InitSwLeds(PADAPTER padapter); ++void rtl8703bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_GSPI_HCI ++void rtl8703bs_InitSwLeds(PADAPTER padapter); ++void rtl8703bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8703be_InitSwLeds(PADAPTER padapter); ++void rtl8703be_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_recv.h new file mode 100644 -index 000000000..091705e0b +index 0000000..024f912 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_recv.h @@ -0,0 +1,92 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8703B_RECV_H__ -+#define __RTL8703B_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ -+#ifndef MAX_RECVBUF_SZ -+#ifdef PLATFORM_OS_CE -+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+#else -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ //#define MAX_RECVBUF_SZ (32768) // 32k -+ //#define MAX_RECVBUF_SZ (16384) //16K -+ //#define MAX_RECVBUF_SZ (10240) //10K -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) // 8K -+ #else -+ #define MAX_RECVBUF_SZ (15360) // 15k < 16k -+ #endif -+ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+ #else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+ #endif -+#endif -+#endif //!MAX_RECVBUF_SZ -+ -+#elif defined(CONFIG_PCI_HCI) -+//#ifndef CONFIG_MINIMAL_MEMORY_USAGE -+// #define MAX_RECVBUF_SZ (9100) -+//#else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+//#endif -+ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+#define MAX_RECVBUF_SZ (10240) -+ -+#endif -+ -+// Rx smooth factor -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_SDIO_HCI -+#ifndef CONFIG_SDIO_RX_COPY -+#undef MAX_RECVBUF_SZ -+#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B) -+#endif // !CONFIG_SDIO_RX_COPY -+#endif // CONFIG_SDIO_HCI -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+s32 rtl8703bs_init_recv_priv(PADAPTER padapter); -+void rtl8703bs_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+int rtl8703bu_init_recv_priv(_adapter *padapter); -+void rtl8703bu_free_recv_priv (_adapter *padapter); -+void rtl8703bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8703be_init_recv_priv(PADAPTER padapter); -+void rtl8703be_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8703b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8703B_RECV_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_RECV_H__ ++#define __RTL8703B_RECV_H__ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ ++#define MAX_RECVBUF_SZ (10240) ++ ++#endif ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_SDIO_HCI ++#ifndef CONFIG_SDIO_RX_COPY ++#undef MAX_RECVBUF_SZ ++#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B) ++#endif // !CONFIG_SDIO_RX_COPY ++#endif // CONFIG_SDIO_HCI ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8703bs_init_recv_priv(PADAPTER padapter); ++void rtl8703bs_free_recv_priv(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++int rtl8703bu_init_recv_priv(_adapter *padapter); ++void rtl8703bu_free_recv_priv (_adapter *padapter); ++void rtl8703bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8703be_init_recv_priv(PADAPTER padapter); ++void rtl8703be_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8703b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8703B_RECV_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_rf.h new file mode 100644 -index 000000000..20e7268aa +index 0000000..20e7268 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_rf.h @@ -0,0 +1,31 @@ @@ -291980,492 +333412,492 @@ index 000000000..20e7268aa + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_spec.h new file mode 100644 -index 000000000..67b9a5eda +index 0000000..d83e1e3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_spec.h @@ -0,0 +1,479 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ *******************************************************************************/ -+#ifndef __RTL8703B_SPEC_H__ -+#define __RTL8703B_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8703B 128 // micro-second -+ -+//----------------------------------------------------- -+// -+// 0x0000h ~ 0x00FFh System Configuration -+// -+//----------------------------------------------------- -+#define REG_SYS_ISO_CTRL_8703B 0x0000 // 2 Byte -+#define REG_SYS_FUNC_EN_8703B 0x0002 // 2 Byte -+#define REG_APS_FSMCO_8703B 0x0004 // 4 Byte -+#define REG_SYS_CLKR_8703B 0x0008 // 2 Byte -+#define REG_9346CR_8703B 0x000A // 2 Byte -+#define REG_EE_VPD_8703B 0x000C // 2 Byte -+#define REG_AFE_MISC_8703B 0x0010 // 1 Byte -+#define REG_SPS0_CTRL_8703B 0x0011 // 7 Byte -+#define REG_SPS_OCP_CFG_8703B 0x0018 // 4 Byte -+#define REG_RSV_CTRL_8703B 0x001C // 3 Byte -+#define REG_RF_CTRL_8703B 0x001F // 1 Byte -+#define REG_LPLDO_CTRL_8703B 0x0023 // 1 Byte -+#define REG_AFE_XTAL_CTRL_8703B 0x0024 // 4 Byte -+#define REG_AFE_PLL_CTRL_8703B 0x0028 // 4 Byte -+#define REG_MAC_PLL_CTRL_EXT_8703B 0x002c // 4 Byte -+#define REG_EFUSE_CTRL_8703B 0x0030 -+#define REG_EFUSE_TEST_8703B 0x0034 -+#define REG_PWR_DATA_8703B 0x0038 -+#define REG_CAL_TIMER_8703B 0x003C -+#define REG_ACLK_MON_8703B 0x003E -+#define REG_GPIO_MUXCFG_8703B 0x0040 -+#define REG_GPIO_IO_SEL_8703B 0x0042 -+#define REG_MAC_PINMUX_CFG_8703B 0x0043 -+#define REG_GPIO_PIN_CTRL_8703B 0x0044 -+#define REG_GPIO_INTM_8703B 0x0048 -+#define REG_LEDCFG0_8703B 0x004C -+#define REG_LEDCFG1_8703B 0x004D -+#define REG_LEDCFG2_8703B 0x004E -+#define REG_LEDCFG3_8703B 0x004F -+#define REG_FSIMR_8703B 0x0050 -+#define REG_FSISR_8703B 0x0054 -+#define REG_HSIMR_8703B 0x0058 -+#define REG_HSISR_8703B 0x005c -+#define REG_GPIO_EXT_CTRL 0x0060 -+#define REG_PAD_CTRL1_8703B 0x0064 -+#define REG_MULTI_FUNC_CTRL_8703B 0x0068 -+#define REG_GPIO_STATUS_8703B 0x006C -+#define REG_SDIO_CTRL_8703B 0x0070 -+#define REG_OPT_CTRL_8703B 0x0074 -+#define REG_AFE_CTRL_4_8703B 0x0078 -+#define REG_MCUFWDL_8703B 0x0080 -+#define REG_HMEBOX_DBG_0_8703B 0x0088 -+#define REG_HMEBOX_DBG_1_8703B 0x008A -+#define REG_HMEBOX_DBG_2_8703B 0x008C -+#define REG_HMEBOX_DBG_3_8703B 0x008E -+#define REG_HIMR0_8703B 0x00B0 -+#define REG_HISR0_8703B 0x00B4 -+#define REG_HIMR1_8703B 0x00B8 -+#define REG_HISR1_8703B 0x00BC -+#define REG_PMC_DBG_CTRL2_8703B 0x00CC -+#define REG_EFUSE_BURN_GNT_8703B 0x00CF -+#define REG_HPON_FSM_8703B 0x00EC -+#define REG_SYS_CFG_8703B 0x00F0 -+#define REG_SYS_CFG1_8703B 0x00FC -+#define REG_ROM_VERSION 0x00FD -+ -+//----------------------------------------------------- -+// -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+// -+//----------------------------------------------------- -+#define REG_C2HEVT_CMD_ID_8703B 0x01A0 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_8703B 0x01AE -+#define REG_C2HEVT_CMD_LEN_88XX REG_C2HEVT_CMD_LEN_8703B -+#define REG_C2HEVT_CLEAR_8703B 0x01AF -+#define REG_MCUTST_1_8703B 0x01C0 -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_FMETHR_8703B 0x01C8 -+#define REG_HMETFR_8703B 0x01CC -+#define REG_HMEBOX_0_8703B 0x01D0 -+#define REG_HMEBOX_1_8703B 0x01D4 -+#define REG_HMEBOX_2_8703B 0x01D8 -+#define REG_HMEBOX_3_8703B 0x01DC -+#define REG_LLT_INIT_8703B 0x01E0 -+#define REG_HMEBOX_EXT0_8703B 0x01F0 -+#define REG_HMEBOX_EXT1_8703B 0x01F4 -+#define REG_HMEBOX_EXT2_8703B 0x01F8 -+#define REG_HMEBOX_EXT3_8703B 0x01FC -+ -+//----------------------------------------------------- -+// -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_RQPN_8703B 0x0200 -+#define REG_FIFOPAGE_8703B 0x0204 -+#define REG_DWBCN0_CTRL_8703B REG_TDECTRL -+#define REG_TXDMA_OFFSET_CHK_8703B 0x020C -+#define REG_TXDMA_STATUS_8703B 0x0210 -+#define REG_RQPN_NPQ_8703B 0x0214 -+#define REG_DWBCN1_CTRL_8703B 0x0228 -+ -+ -+//----------------------------------------------------- -+// -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_RXDMA_AGG_PG_TH_8703B 0x0280 -+#define REG_FW_UPD_RDPTR_8703B 0x0284 // FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 -+#define REG_RXDMA_CONTROL_8703B 0x0286 // Control the RX DMA. -+#define REG_RXPKT_NUM_8703B 0x0287 // The number of packets in RXPKTBUF. -+#define REG_RXDMA_STATUS_8703B 0x0288 -+#define REG_RXDMA_MODE_CTRL_8703B 0x0290 -+#define REG_EARLY_MODE_CONTROL_8703B 0x02BC -+#define REG_RSVD5_8703B 0x02F0 -+#define REG_RSVD6_8703B 0x02F4 -+ -+//----------------------------------------------------- -+// -+// 0x0300h ~ 0x03FFh PCIe -+// -+//----------------------------------------------------- -+#define REG_PCIE_CTRL_REG_8703B 0x0300 -+#define REG_INT_MIG_8703B 0x0304 // Interrupt Migration -+#define REG_BCNQ_DESA_8703B 0x0308 // TX Beacon Descriptor Address -+#define REG_HQ_DESA_8703B 0x0310 // TX High Queue Descriptor Address -+#define REG_MGQ_DESA_8703B 0x0318 // TX Manage Queue Descriptor Address -+#define REG_VOQ_DESA_8703B 0x0320 // TX VO Queue Descriptor Address -+#define REG_VIQ_DESA_8703B 0x0328 // TX VI Queue Descriptor Address -+#define REG_BEQ_DESA_8703B 0x0330 // TX BE Queue Descriptor Address -+#define REG_BKQ_DESA_8703B 0x0338 // TX BK Queue Descriptor Address -+#define REG_RX_DESA_8703B 0x0340 // RX Queue Descriptor Address -+#define REG_DBI_WDATA_8703B 0x0348 // DBI Write Data -+#define REG_DBI_RDATA_8703B 0x034C // DBI Read Data -+#define REG_DBI_ADDR_8703B 0x0350 // DBI Address -+#define REG_DBI_FLAG_8703B 0x0352 // DBI Read/Write Flag -+#define REG_MDIO_WDATA_8703B 0x0354 // MDIO for Write PCIE PHY -+#define REG_MDIO_RDATA_8703B 0x0356 // MDIO for Reads PCIE PHY -+#define REG_MDIO_CTL_8703B 0x0358 // MDIO for Control -+#define REG_DBG_SEL_8703B 0x0360 // Debug Selection Register -+#define REG_PCIE_HRPWM_8703B 0x0361 //PCIe RPWM -+#define REG_PCIE_HCPWM_8703B 0x0363 //PCIe CPWM -+#define REG_PCIE_MULTIFET_CTRL_8703B 0x036A //PCIE Multi-Fethc Control -+ -+//----------------------------------------------------- -+// -+// 0x0400h ~ 0x047Fh Protocol Configuration -+// -+//----------------------------------------------------- -+#define REG_VOQ_INFORMATION_8703B 0x0400 -+#define REG_VIQ_INFORMATION_8703B 0x0404 -+#define REG_BEQ_INFORMATION_8703B 0x0408 -+#define REG_BKQ_INFORMATION_8703B 0x040C -+#define REG_MGQ_INFORMATION_8703B 0x0410 -+#define REG_HGQ_INFORMATION_8703B 0x0414 -+#define REG_BCNQ_INFORMATION_8703B 0x0418 -+#define REG_TXPKT_EMPTY_8703B 0x041A -+ -+#define REG_FWHW_TXQ_CTRL_8703B 0x0420 -+#define REG_HWSEQ_CTRL_8703B 0x0423 -+#define REG_TXPKTBUF_BCNQ_BDNY_8703B 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8703B 0x0425 -+#define REG_LIFECTRL_CTRL_8703B 0x0426 -+#define REG_MULTI_BCNQ_OFFSET_8703B 0x0427 -+#define REG_SPEC_SIFS_8703B 0x0428 -+#define REG_RL_8703B 0x042A -+#define REG_TXBF_CTRL_8703B 0x042C -+#define REG_DARFRC_8703B 0x0430 -+#define REG_RARFRC_8703B 0x0438 -+#define REG_RRSR_8703B 0x0440 -+#define REG_ARFR0_8703B 0x0444 -+#define REG_ARFR1_8703B 0x044C -+#define REG_CCK_CHECK_8703B 0x0454 -+#define REG_AMPDU_MAX_TIME_8703B 0x0456 -+#define REG_TXPKTBUF_BCNQ_BDNY1_8703B 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8703B 0x0458 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8703B 0x045D -+#define REG_NDPA_OPT_CTRL_8703B 0x045F -+#define REG_FAST_EDCA_CTRL_8703B 0x0460 -+#define REG_RD_RESP_PKT_TH_8703B 0x0463 -+#define REG_DATA_SC_8703B 0x0483 -+#ifdef CONFIG_WOWLAN -+#define REG_TXPKTBUF_IV_LOW 0x0484 -+#define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_POWER_STAGE1_8703B 0x04B4 -+#define REG_POWER_STAGE2_8703B 0x04B8 -+#define REG_AMPDU_BURST_MODE_8703B 0x04BC -+#define REG_PKT_VO_VI_LIFE_TIME_8703B 0x04C0 -+#define REG_PKT_BE_BK_LIFE_TIME_8703B 0x04C2 -+#define REG_STBC_SETTING_8703B 0x04C4 -+#define REG_HT_SINGLE_AMPDU_8703B 0x04C7 -+#define REG_PROT_MODE_CTRL_8703B 0x04C8 -+#define REG_MAX_AGGR_NUM_8703B 0x04CA -+#define REG_RTS_MAX_AGGR_NUM_8703B 0x04CB -+#define REG_BAR_MODE_CTRL_8703B 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT_8703B 0x04CF -+#define REG_MACID_PKT_DROP0_8703B 0x04D0 -+#define REG_MACID_PKT_SLEEP_8703B 0x04D4 -+ -+//----------------------------------------------------- -+// -+// 0x0500h ~ 0x05FFh EDCA Configuration -+// -+//----------------------------------------------------- -+#define REG_EDCA_VO_PARAM_8703B 0x0500 -+#define REG_EDCA_VI_PARAM_8703B 0x0504 -+#define REG_EDCA_BE_PARAM_8703B 0x0508 -+#define REG_EDCA_BK_PARAM_8703B 0x050C -+#define REG_BCNTCFG_8703B 0x0510 -+#define REG_PIFS_8703B 0x0512 -+#define REG_RDG_PIFS_8703B 0x0513 -+#define REG_SIFS_CTX_8703B 0x0514 -+#define REG_SIFS_TRX_8703B 0x0516 -+#define REG_AGGR_BREAK_TIME_8703B 0x051A -+#define REG_SLOT_8703B 0x051B -+#define REG_TX_PTCL_CTRL_8703B 0x0520 -+#define REG_TXPAUSE_8703B 0x0522 -+#define REG_DIS_TXREQ_CLR_8703B 0x0523 -+#define REG_RD_CTRL_8703B 0x0524 -+// -+// Format for offset 540h-542h: -+// [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+// [7:4]: Reserved. -+// [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+// [23:20]: Reserved -+// Description: -+// | -+// |<--Setup--|--Hold------------>| -+// --------------|---------------------- -+// | -+// TBTT -+// Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+// Described by Designer Tim and Bruce, 2011-01-14. -+// -+#define REG_TBTT_PROHIBIT_8703B 0x0540 -+#define REG_RD_NAV_NXT_8703B 0x0544 -+#define REG_NAV_PROT_LEN_8703B 0x0546 -+#define REG_BCN_CTRL_8703B 0x0550 -+#define REG_BCN_CTRL_1_8703B 0x0551 -+#define REG_MBID_NUM_8703B 0x0552 -+#define REG_DUAL_TSF_RST_8703B 0x0553 -+#define REG_BCN_INTERVAL_8703B 0x0554 -+#define REG_DRVERLYINT_8703B 0x0558 -+#define REG_BCNDMATIM_8703B 0x0559 -+#define REG_ATIMWND_8703B 0x055A -+#define REG_USTIME_TSF_8703B 0x055C -+#define REG_BCN_MAX_ERR_8703B 0x055D -+#define REG_RXTSF_OFFSET_CCK_8703B 0x055E -+#define REG_RXTSF_OFFSET_OFDM_8703B 0x055F -+#define REG_TSFTR_8703B 0x0560 -+#define REG_CTWND_8703B 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8703B 0x0577 -+#define REG_PSTIMER_8703B 0x0580 -+#define REG_TIMER0_8703B 0x0584 -+#define REG_TIMER1_8703B 0x0588 -+#define REG_ACMHWCTRL_8703B 0x05C0 -+#define REG_SCH_TXCMD_8703B 0x05F8 -+ -+//----------------------------------------------------- -+// -+// 0x0600h ~ 0x07FFh WMAC Configuration -+// -+//----------------------------------------------------- -+#define REG_MAC_CR_8703B 0x0600 -+#define REG_TCR_8703B 0x0604 -+#define REG_RCR_8703B 0x0608 -+#define REG_RX_PKT_LIMIT_8703B 0x060C -+#define REG_RX_DLK_TIME_8703B 0x060D -+#define REG_RX_DRVINFO_SZ_8703B 0x060F -+ -+#define REG_MACID_8703B 0x0610 -+#define REG_BSSID_8703B 0x0618 -+#define REG_MAR_8703B 0x0620 -+#define REG_MBIDCAMCFG_8703B 0x0628 -+#define REG_WOWLAN_GTK_DBG1 0x630 -+#define REG_WOWLAN_GTK_DBG2 0x634 -+ -+#define REG_USTIME_EDCA_8703B 0x0638 -+#define REG_MAC_SPEC_SIFS_8703B 0x063A -+#define REG_RESP_SIFP_CCK_8703B 0x063C -+#define REG_RESP_SIFS_OFDM_8703B 0x063E -+#define REG_ACKTO_8703B 0x0640 -+#define REG_CTS2TO_8703B 0x0641 -+#define REG_EIFS_8703B 0x0642 -+ -+#define REG_NAV_UPPER_8703B 0x0652 // unit of 128 -+#define REG_TRXPTCL_CTL_8703B 0x0668 -+ -+// Security -+#define REG_CAMCMD_8703B 0x0670 -+#define REG_CAMWRITE_8703B 0x0674 -+#define REG_CAMREAD_8703B 0x0678 -+#define REG_CAMDBG_8703B 0x067C -+#define REG_SECCFG_8703B 0x0680 -+ -+// Power -+#define REG_WOW_CTRL_8703B 0x0690 -+#define REG_PS_RX_INFO_8703B 0x0692 -+#define REG_UAPSD_TID_8703B 0x0693 -+#define REG_WKFMCAM_CMD_8703B 0x0698 -+#define REG_WKFMCAM_NUM_8703B 0x0698 -+#define REG_WKFMCAM_RWD_8703B 0x069C -+#define REG_RXFLTMAP0_8703B 0x06A0 -+#define REG_RXFLTMAP1_8703B 0x06A2 -+#define REG_RXFLTMAP2_8703B 0x06A4 -+#define REG_BCN_PSR_RPT_8703B 0x06A8 -+#define REG_BT_COEX_TABLE_8703B 0x06C0 -+#define REG_BFMER0_INFO_8703B 0x06E4 -+#define REG_BFMER1_INFO_8703B 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8703B 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8703B 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8703B 0x06FC -+ -+// Hardware Port 2 -+#define REG_MACID1_8703B 0x0700 -+#define REG_BSSID1_8703B 0x0708 -+#define REG_BFMEE_SEL_8703B 0x0714 -+#define REG_SND_PTCL_CTRL_8703B 0x0718 -+ -+// LTE_COEX -+#define REG_LTECOEX_CTRL 0x07C0 -+#define REG_LTECOEX_WRITE_DATA 0x07C4 -+#define REG_LTECOEX_READ_DATA 0x07C8 -+#define REG_LTECOEX_PATH_CONTROL 0x70 -+ -+//============================================================ -+// SDIO Bus Specification -+//============================================================ -+ -+//----------------------------------------------------- -+// SDIO CMD Address Mapping -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// I/O bus domain (Host) -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// SDIO register -+//----------------------------------------------------- -+#define SDIO_REG_HCPWM1_8703B 0x025 // HCI Current Power Mode 1 -+ -+ -+//============================================================================ -+// 8703 Regsiter Bit and Content definition -+//============================================================================ -+ -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+#define RXPKT_RELEASE_POLL BIT(16) -+#define RXDMA_IDLE BIT(17) -+#define RW_RELEASE_EN BIT(18) -+#endif -+ -+//2 HSISR -+// interrupt mask which needs to clear -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+ -+//---------------------------------------------------------------------------- -+// 8703B REG_CCK_CHECK (offset 0x454) -+//---------------------------------------------------------------------------- -+#define BIT_BCN_PORT_SEL BIT5 -+ -+#ifdef CONFIG_RF_GAIN_OFFSET -+ -+#ifdef CONFIG_RTL8703B -+#define EEPROM_RF_GAIN_OFFSET 0xC1 -+#endif -+ -+#define EEPROM_RF_GAIN_VAL 0x1F6 -+#endif //CONFIG_RF_GAIN_OFFSET -+ -+ -+//---------------------------------------------------------------------------- -+// 8195 IMR/ISR bits (offset 0xB0, 8bits) -+//---------------------------------------------------------------------------- -+#define IMR_DISABLED_8703B 0 -+// IMR DW0(0x00B0-00B3) Bit 0-31 -+#define IMR_TIMER2_8703B BIT31 // Timeout interrupt 2 -+#define IMR_TIMER1_8703B BIT30 // Timeout interrupt 1 -+#define IMR_PSTIMEOUT_8703B BIT29 // Power Save Time Out Interrupt -+#define IMR_GTINT4_8703B BIT28 // When GTIMER4 expires, this bit is set to 1 -+#define IMR_GTINT3_8703B BIT27 // When GTIMER3 expires, this bit is set to 1 -+#define IMR_TXBCN0ERR_8703B BIT26 // Transmit Beacon0 Error -+#define IMR_TXBCN0OK_8703B BIT25 // Transmit Beacon0 OK -+#define IMR_TSF_BIT32_TOGGLE_8703B BIT24 // TSF Timer BIT32 toggle indication interrupt -+#define IMR_BCNDMAINT0_8703B BIT20 // Beacon DMA Interrupt 0 -+#define IMR_BCNDERR0_8703B BIT16 // Beacon Queue DMA OK0 -+#define IMR_HSISR_IND_ON_INT_8703B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) -+#define IMR_BCNDMAINT_E_8703B BIT14 // Beacon DMA Interrupt Extension for Win7 -+#define IMR_ATIMEND_8703B BIT12 // CTWidnow End or ATIM Window End -+#define IMR_C2HCMD_8703B BIT10 // CPU to Host Command INT Status, Write 1 clear -+#define IMR_CPWM2_8703B BIT9 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_CPWM_8703B BIT8 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_HIGHDOK_8703B BIT7 // High Queue DMA OK -+#define IMR_MGNTDOK_8703B BIT6 // Management Queue DMA OK -+#define IMR_BKDOK_8703B BIT5 // AC_BK DMA OK -+#define IMR_BEDOK_8703B BIT4 // AC_BE DMA OK -+#define IMR_VIDOK_8703B BIT3 // AC_VI DMA OK -+#define IMR_VODOK_8703B BIT2 // AC_VO DMA OK -+#define IMR_RDU_8703B BIT1 // Rx Descriptor Unavailable -+#define IMR_ROK_8703B BIT0 // Receive DMA OK -+ -+// IMR DW1(0x00B4-00B7) Bit 0-31 -+#define IMR_BCNDMAINT7_8703B BIT27 // Beacon DMA Interrupt 7 -+#define IMR_BCNDMAINT6_8703B BIT26 // Beacon DMA Interrupt 6 -+#define IMR_BCNDMAINT5_8703B BIT25 // Beacon DMA Interrupt 5 -+#define IMR_BCNDMAINT4_8703B BIT24 // Beacon DMA Interrupt 4 -+#define IMR_BCNDMAINT3_8703B BIT23 // Beacon DMA Interrupt 3 -+#define IMR_BCNDMAINT2_8703B BIT22 // Beacon DMA Interrupt 2 -+#define IMR_BCNDMAINT1_8703B BIT21 // Beacon DMA Interrupt 1 -+#define IMR_BCNDOK7_8703B BIT20 // Beacon Queue DMA OK Interrup 7 -+#define IMR_BCNDOK6_8703B BIT19 // Beacon Queue DMA OK Interrup 6 -+#define IMR_BCNDOK5_8703B BIT18 // Beacon Queue DMA OK Interrup 5 -+#define IMR_BCNDOK4_8703B BIT17 // Beacon Queue DMA OK Interrup 4 -+#define IMR_BCNDOK3_8703B BIT16 // Beacon Queue DMA OK Interrup 3 -+#define IMR_BCNDOK2_8703B BIT15 // Beacon Queue DMA OK Interrup 2 -+#define IMR_BCNDOK1_8703B BIT14 // Beacon Queue DMA OK Interrup 1 -+#define IMR_ATIMEND_E_8703B BIT13 // ATIM Window End Extension for Win7 -+#define IMR_TXERR_8703B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. -+#define IMR_RXERR_8703B BIT10 // Rx Error Flag INT Status, Write 1 clear -+#define IMR_TXFOVW_8703B BIT9 // Transmit FIFO Overflow -+#define IMR_RXFOVW_8703B BIT8 // Receive FIFO Overflow -+ -+#ifdef CONFIG_PCI_HCI -+//#define IMR_RX_MASK (IMR_ROK_8703B|IMR_RDU_8703B|IMR_RXFOVW_8703B) -+#define IMR_TX_MASK (IMR_VODOK_8703B|IMR_VIDOK_8703B|IMR_BEDOK_8703B|IMR_BKDOK_8703B|IMR_MGNTDOK_8703B|IMR_HIGHDOK_8703B) -+ -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8703B | IMR_TXBCN0OK_8703B | IMR_TXBCN0ERR_8703B | IMR_BCNDERR0_8703B) -+ -+#define RT_AC_INT_MASKS (IMR_VIDOK_8703B | IMR_VODOK_8703B | IMR_BEDOK_8703B|IMR_BKDOK_8703B) -+#endif -+ -+//======================================================== -+// General definitions -+//======================================================== -+ -+#define MACID_NUM_8703B 16 -+#define SEC_CAM_ENT_NUM_8703B 16 -+#define NSS_NUM_8703B 1 -+#define BAND_CAP_8703B (BAND_CAP_2G) -+#define BW_CAP_8703B (BW_CAP_20M | BW_CAP_40M) -+ -+#endif /* __RTL8703B_SPEC_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8703B_SPEC_H__ ++#define __RTL8703B_SPEC_H__ ++ ++#include ++ ++ ++#define HAL_NAV_UPPER_UNIT_8703B 128 // micro-second ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL_8703B 0x0000 // 2 Byte ++#define REG_SYS_FUNC_EN_8703B 0x0002 // 2 Byte ++#define REG_APS_FSMCO_8703B 0x0004 // 4 Byte ++#define REG_SYS_CLKR_8703B 0x0008 // 2 Byte ++#define REG_9346CR_8703B 0x000A // 2 Byte ++#define REG_EE_VPD_8703B 0x000C // 2 Byte ++#define REG_AFE_MISC_8703B 0x0010 // 1 Byte ++#define REG_SPS0_CTRL_8703B 0x0011 // 7 Byte ++#define REG_SPS_OCP_CFG_8703B 0x0018 // 4 Byte ++#define REG_RSV_CTRL_8703B 0x001C // 3 Byte ++#define REG_RF_CTRL_8703B 0x001F // 1 Byte ++#define REG_LPLDO_CTRL_8703B 0x0023 // 1 Byte ++#define REG_AFE_XTAL_CTRL_8703B 0x0024 // 4 Byte ++#define REG_AFE_PLL_CTRL_8703B 0x0028 // 4 Byte ++#define REG_MAC_PLL_CTRL_EXT_8703B 0x002c // 4 Byte ++#define REG_EFUSE_CTRL_8703B 0x0030 ++#define REG_EFUSE_TEST_8703B 0x0034 ++#define REG_PWR_DATA_8703B 0x0038 ++#define REG_CAL_TIMER_8703B 0x003C ++#define REG_ACLK_MON_8703B 0x003E ++#define REG_GPIO_MUXCFG_8703B 0x0040 ++#define REG_GPIO_IO_SEL_8703B 0x0042 ++#define REG_MAC_PINMUX_CFG_8703B 0x0043 ++#define REG_GPIO_PIN_CTRL_8703B 0x0044 ++#define REG_GPIO_INTM_8703B 0x0048 ++#define REG_LEDCFG0_8703B 0x004C ++#define REG_LEDCFG1_8703B 0x004D ++#define REG_LEDCFG2_8703B 0x004E ++#define REG_LEDCFG3_8703B 0x004F ++#define REG_FSIMR_8703B 0x0050 ++#define REG_FSISR_8703B 0x0054 ++#define REG_HSIMR_8703B 0x0058 ++#define REG_HSISR_8703B 0x005c ++#define REG_GPIO_EXT_CTRL 0x0060 ++#define REG_PAD_CTRL1_8703B 0x0064 ++#define REG_MULTI_FUNC_CTRL_8703B 0x0068 ++#define REG_GPIO_STATUS_8703B 0x006C ++#define REG_SDIO_CTRL_8703B 0x0070 ++#define REG_OPT_CTRL_8703B 0x0074 ++#define REG_AFE_CTRL_4_8703B 0x0078 ++#define REG_MCUFWDL_8703B 0x0080 ++#define REG_HMEBOX_DBG_0_8703B 0x0088 ++#define REG_HMEBOX_DBG_1_8703B 0x008A ++#define REG_HMEBOX_DBG_2_8703B 0x008C ++#define REG_HMEBOX_DBG_3_8703B 0x008E ++#define REG_HIMR0_8703B 0x00B0 ++#define REG_HISR0_8703B 0x00B4 ++#define REG_HIMR1_8703B 0x00B8 ++#define REG_HISR1_8703B 0x00BC ++#define REG_PMC_DBG_CTRL2_8703B 0x00CC ++#define REG_EFUSE_BURN_GNT_8703B 0x00CF ++#define REG_HPON_FSM_8703B 0x00EC ++#define REG_SYS_CFG_8703B 0x00F0 ++#define REG_SYS_CFG1_8703B 0x00FC ++#define REG_ROM_VERSION 0x00FD ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_C2HEVT_CMD_ID_8703B 0x01A0 ++#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 ++#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 ++#define REG_C2HEVT_CMD_LEN_8703B 0x01AE ++#define REG_C2HEVT_CMD_LEN_88XX REG_C2HEVT_CMD_LEN_8703B ++#define REG_C2HEVT_CLEAR_8703B 0x01AF ++#define REG_MCUTST_1_8703B 0x01C0 ++#define REG_WOWLAN_WAKE_REASON 0x01C7 ++#define REG_FMETHR_8703B 0x01C8 ++#define REG_HMETFR_8703B 0x01CC ++#define REG_HMEBOX_0_8703B 0x01D0 ++#define REG_HMEBOX_1_8703B 0x01D4 ++#define REG_HMEBOX_2_8703B 0x01D8 ++#define REG_HMEBOX_3_8703B 0x01DC ++#define REG_LLT_INIT_8703B 0x01E0 ++#define REG_HMEBOX_EXT0_8703B 0x01F0 ++#define REG_HMEBOX_EXT1_8703B 0x01F4 ++#define REG_HMEBOX_EXT2_8703B 0x01F8 ++#define REG_HMEBOX_EXT3_8703B 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RQPN_8703B 0x0200 ++#define REG_FIFOPAGE_8703B 0x0204 ++#define REG_DWBCN0_CTRL_8703B REG_TDECTRL ++#define REG_TXDMA_OFFSET_CHK_8703B 0x020C ++#define REG_TXDMA_STATUS_8703B 0x0210 ++#define REG_RQPN_NPQ_8703B 0x0214 ++#define REG_DWBCN1_CTRL_8703B 0x0228 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH_8703B 0x0280 ++#define REG_FW_UPD_RDPTR_8703B 0x0284 // FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 ++#define REG_RXDMA_CONTROL_8703B 0x0286 // Control the RX DMA. ++#define REG_RXPKT_NUM_8703B 0x0287 // The number of packets in RXPKTBUF. ++#define REG_RXDMA_STATUS_8703B 0x0288 ++#define REG_RXDMA_MODE_CTRL_8703B 0x0290 ++#define REG_EARLY_MODE_CONTROL_8703B 0x02BC ++#define REG_RSVD5_8703B 0x02F0 ++#define REG_RSVD6_8703B 0x02F4 ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8703B 0x0300 ++#define REG_INT_MIG_8703B 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA_8703B 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA_8703B 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA_8703B 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA_8703B 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA_8703B 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA_8703B 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA_8703B 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA_8703B 0x0340 // RX Queue Descriptor Address ++#define REG_DBI_WDATA_8703B 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8703B 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8703B 0x0350 // DBI Address ++#define REG_DBI_FLAG_8703B 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8703B 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8703B 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8703B 0x0358 // MDIO for Control ++#define REG_DBG_SEL_8703B 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM_8703B 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM_8703B 0x0363 //PCIe CPWM ++#define REG_PCIE_MULTIFET_CTRL_8703B 0x036A //PCIE Multi-Fethc Control ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION_8703B 0x0400 ++#define REG_VIQ_INFORMATION_8703B 0x0404 ++#define REG_BEQ_INFORMATION_8703B 0x0408 ++#define REG_BKQ_INFORMATION_8703B 0x040C ++#define REG_MGQ_INFORMATION_8703B 0x0410 ++#define REG_HGQ_INFORMATION_8703B 0x0414 ++#define REG_BCNQ_INFORMATION_8703B 0x0418 ++#define REG_TXPKT_EMPTY_8703B 0x041A ++ ++#define REG_FWHW_TXQ_CTRL_8703B 0x0420 ++#define REG_HWSEQ_CTRL_8703B 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY_8703B 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY_8703B 0x0425 ++#define REG_LIFECTRL_CTRL_8703B 0x0426 ++#define REG_MULTI_BCNQ_OFFSET_8703B 0x0427 ++#define REG_SPEC_SIFS_8703B 0x0428 ++#define REG_RL_8703B 0x042A ++#define REG_TXBF_CTRL_8703B 0x042C ++#define REG_DARFRC_8703B 0x0430 ++#define REG_RARFRC_8703B 0x0438 ++#define REG_RRSR_8703B 0x0440 ++#define REG_ARFR0_8703B 0x0444 ++#define REG_ARFR1_8703B 0x044C ++#define REG_CCK_CHECK_8703B 0x0454 ++#define REG_AMPDU_MAX_TIME_8703B 0x0456 ++#define REG_TXPKTBUF_BCNQ_BDNY1_8703B 0x0457 ++ ++#define REG_AMPDU_MAX_LENGTH_8703B 0x0458 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8703B 0x045D ++#define REG_NDPA_OPT_CTRL_8703B 0x045F ++#define REG_FAST_EDCA_CTRL_8703B 0x0460 ++#define REG_RD_RESP_PKT_TH_8703B 0x0463 ++#define REG_DATA_SC_8703B 0x0483 ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_TXRPT_START_OFFSET 0x04AC ++#define REG_POWER_STAGE1_8703B 0x04B4 ++#define REG_POWER_STAGE2_8703B 0x04B8 ++#define REG_AMPDU_BURST_MODE_8703B 0x04BC ++#define REG_PKT_VO_VI_LIFE_TIME_8703B 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME_8703B 0x04C2 ++#define REG_STBC_SETTING_8703B 0x04C4 ++#define REG_HT_SINGLE_AMPDU_8703B 0x04C7 ++#define REG_PROT_MODE_CTRL_8703B 0x04C8 ++#define REG_MAX_AGGR_NUM_8703B 0x04CA ++#define REG_RTS_MAX_AGGR_NUM_8703B 0x04CB ++#define REG_BAR_MODE_CTRL_8703B 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT_8703B 0x04CF ++#define REG_MACID_PKT_DROP0_8703B 0x04D0 ++#define REG_MACID_PKT_SLEEP_8703B 0x04D4 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM_8703B 0x0500 ++#define REG_EDCA_VI_PARAM_8703B 0x0504 ++#define REG_EDCA_BE_PARAM_8703B 0x0508 ++#define REG_EDCA_BK_PARAM_8703B 0x050C ++#define REG_BCNTCFG_8703B 0x0510 ++#define REG_PIFS_8703B 0x0512 ++#define REG_RDG_PIFS_8703B 0x0513 ++#define REG_SIFS_CTX_8703B 0x0514 ++#define REG_SIFS_TRX_8703B 0x0516 ++#define REG_AGGR_BREAK_TIME_8703B 0x051A ++#define REG_SLOT_8703B 0x051B ++#define REG_TX_PTCL_CTRL_8703B 0x0520 ++#define REG_TXPAUSE_8703B 0x0522 ++#define REG_DIS_TXREQ_CLR_8703B 0x0523 ++#define REG_RD_CTRL_8703B 0x0524 ++// ++// Format for offset 540h-542h: ++// [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. ++// [7:4]: Reserved. ++// [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. ++// [23:20]: Reserved ++// Description: ++// | ++// |<--Setup--|--Hold------------>| ++// --------------|---------------------- ++// | ++// TBTT ++// Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. ++// Described by Designer Tim and Bruce, 2011-01-14. ++// ++#define REG_TBTT_PROHIBIT_8703B 0x0540 ++#define REG_RD_NAV_NXT_8703B 0x0544 ++#define REG_NAV_PROT_LEN_8703B 0x0546 ++#define REG_BCN_CTRL_8703B 0x0550 ++#define REG_BCN_CTRL_1_8703B 0x0551 ++#define REG_MBID_NUM_8703B 0x0552 ++#define REG_DUAL_TSF_RST_8703B 0x0553 ++#define REG_BCN_INTERVAL_8703B 0x0554 ++#define REG_DRVERLYINT_8703B 0x0558 ++#define REG_BCNDMATIM_8703B 0x0559 ++#define REG_ATIMWND_8703B 0x055A ++#define REG_USTIME_TSF_8703B 0x055C ++#define REG_BCN_MAX_ERR_8703B 0x055D ++#define REG_RXTSF_OFFSET_CCK_8703B 0x055E ++#define REG_RXTSF_OFFSET_OFDM_8703B 0x055F ++#define REG_TSFTR_8703B 0x0560 ++#define REG_CTWND_8703B 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8703B 0x0577 ++#define REG_PSTIMER_8703B 0x0580 ++#define REG_TIMER0_8703B 0x0584 ++#define REG_TIMER1_8703B 0x0588 ++#define REG_ACMHWCTRL_8703B 0x05C0 ++#define REG_SCH_TXCMD_8703B 0x05F8 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8703B 0x0600 ++#define REG_TCR_8703B 0x0604 ++#define REG_RCR_8703B 0x0608 ++#define REG_RX_PKT_LIMIT_8703B 0x060C ++#define REG_RX_DLK_TIME_8703B 0x060D ++#define REG_RX_DRVINFO_SZ_8703B 0x060F ++ ++#define REG_MACID_8703B 0x0610 ++#define REG_BSSID_8703B 0x0618 ++#define REG_MAR_8703B 0x0620 ++#define REG_MBIDCAMCFG_8703B 0x0628 ++#define REG_WOWLAN_GTK_DBG1 0x630 ++#define REG_WOWLAN_GTK_DBG2 0x634 ++ ++#define REG_USTIME_EDCA_8703B 0x0638 ++#define REG_MAC_SPEC_SIFS_8703B 0x063A ++#define REG_RESP_SIFP_CCK_8703B 0x063C ++#define REG_RESP_SIFS_OFDM_8703B 0x063E ++#define REG_ACKTO_8703B 0x0640 ++#define REG_CTS2TO_8703B 0x0641 ++#define REG_EIFS_8703B 0x0642 ++ ++#define REG_NAV_UPPER_8703B 0x0652 // unit of 128 ++#define REG_TRXPTCL_CTL_8703B 0x0668 ++ ++// Security ++#define REG_CAMCMD_8703B 0x0670 ++#define REG_CAMWRITE_8703B 0x0674 ++#define REG_CAMREAD_8703B 0x0678 ++#define REG_CAMDBG_8703B 0x067C ++#define REG_SECCFG_8703B 0x0680 ++ ++// Power ++#define REG_WOW_CTRL_8703B 0x0690 ++#define REG_PS_RX_INFO_8703B 0x0692 ++#define REG_UAPSD_TID_8703B 0x0693 ++#define REG_WKFMCAM_CMD_8703B 0x0698 ++#define REG_WKFMCAM_NUM_8703B 0x0698 ++#define REG_WKFMCAM_RWD_8703B 0x069C ++#define REG_RXFLTMAP0_8703B 0x06A0 ++#define REG_RXFLTMAP1_8703B 0x06A2 ++#define REG_RXFLTMAP2_8703B 0x06A4 ++#define REG_BCN_PSR_RPT_8703B 0x06A8 ++#define REG_BT_COEX_TABLE_8703B 0x06C0 ++#define REG_BFMER0_INFO_8703B 0x06E4 ++#define REG_BFMER1_INFO_8703B 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8703B 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8703B 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8703B 0x06FC ++ ++// Hardware Port 2 ++#define REG_MACID1_8703B 0x0700 ++#define REG_BSSID1_8703B 0x0708 ++#define REG_BFMEE_SEL_8703B 0x0714 ++#define REG_SND_PTCL_CTRL_8703B 0x0718 ++ ++// LTE_COEX ++#define REG_LTECOEX_CTRL 0x07C0 ++#define REG_LTECOEX_WRITE_DATA 0x07C4 ++#define REG_LTECOEX_READ_DATA 0x07C8 ++#define REG_LTECOEX_PATH_CONTROL 0x70 ++ ++//============================================================ ++// SDIO Bus Specification ++//============================================================ ++ ++//----------------------------------------------------- ++// SDIO CMD Address Mapping ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// I/O bus domain (Host) ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// SDIO register ++//----------------------------------------------------- ++#define SDIO_REG_HCPWM1_8703B 0x025 // HCI Current Power Mode 1 ++ ++ ++//============================================================================ ++// 8703 Regsiter Bit and Content definition ++//============================================================================ ++ ++#define BIT_USB_RXDMA_AGG_EN BIT(31) ++#define RXDMA_AGG_MODE_EN BIT(1) ++ ++#ifdef CONFIG_WOWLAN ++#define RXPKT_RELEASE_POLL BIT(16) ++#define RXDMA_IDLE BIT(17) ++#define RW_RELEASE_EN BIT(18) ++#endif ++ ++//2 HSISR ++// interrupt mask which needs to clear ++#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ ++ HSISR_SPS_OCP_INT |\ ++ HSISR_RON_INT |\ ++ HSISR_PDNINT |\ ++ HSISR_GPIO9_INT) ++ ++ ++//---------------------------------------------------------------------------- ++// 8703B REG_CCK_CHECK (offset 0x454) ++//---------------------------------------------------------------------------- ++#define BIT_BCN_PORT_SEL BIT5 ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++ ++#ifdef CONFIG_RTL8703B ++#define EEPROM_RF_GAIN_OFFSET 0xC1 ++#endif ++ ++#define EEPROM_RF_GAIN_VAL 0x1F6 ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8703B 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8703B BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8703B BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8703B BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8703B BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8703B BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8703B BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8703B BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8703B BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8703B BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8703B BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8703B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8703B BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8703B BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8703B BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8703B BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8703B BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8703B BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8703B BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8703B BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8703B BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8703B BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8703B BIT2 // AC_VO DMA OK ++#define IMR_RDU_8703B BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8703B BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8703B BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8703B BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8703B BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8703B BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8703B BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8703B BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8703B BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8703B BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8703B BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8703B BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8703B BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8703B BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8703B BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8703B BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8703B BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8703B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8703B BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8703B BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8703B BIT8 // Receive FIFO Overflow ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_8703B|IMR_RDU_8703B|IMR_RXFOVW_8703B) ++#define IMR_TX_MASK (IMR_VODOK_8703B|IMR_VIDOK_8703B|IMR_BEDOK_8703B|IMR_BKDOK_8703B|IMR_MGNTDOK_8703B|IMR_HIGHDOK_8703B) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8703B | IMR_TXBCN0OK_8703B | IMR_TXBCN0ERR_8703B | IMR_BCNDERR0_8703B) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8703B | IMR_VODOK_8703B | IMR_BEDOK_8703B|IMR_BKDOK_8703B) ++#endif ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8703B 16 ++#define SEC_CAM_ENT_NUM_8703B 16 ++#define NSS_NUM_8703B 1 ++#define BAND_CAP_8703B (BAND_CAP_2G) ++#define BW_CAP_8703B (BW_CAP_20M | BW_CAP_40M) ++ ++#endif /* __RTL8703B_SPEC_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_sreset.h new file mode 100644 -index 000000000..4eb70ddb9 +index 0000000..4eb70dd --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_sreset.h @@ -0,0 +1,30 @@ @@ -292501,349 +333933,349 @@ index 000000000..4eb70ddb9 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_xmit.h new file mode 100644 -index 000000000..a0b7334f3 +index 0000000..2509b2f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8703b_xmit.h @@ -0,0 +1,336 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8703B_XMIT_H__ -+#define __RTL8703B_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8703BDESC_H -+#define __INC_HAL8703BDESC_H -+ -+#define RX_STATUS_DESC_SIZE_8703B 24 -+#define RX_DRV_INFO_SIZE_UNIT_8703B 8 -+ -+ -+//DWORD 0 -+#define SET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_LAST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) -+#define GET_RX_STATUS_DESC_FIRST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) -+#define GET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) -+ -+//DWORD 1 -+#define GET_RX_STATUS_DESC_MACID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) -+ -+//DWORD 2 -+#define GET_RX_STATUS_DESC_SEQ_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) -+ -+//DWORD 3 -+#define GET_RX_STATUS_DESC_RX_RATE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) -+ -+//DWORD 6 -+#define GET_RX_STATUS_DESC_SPLCP_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) -+#define GET_RX_STATUS_DESC_LDPC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) -+#define GET_RX_STATUS_DESC_STBC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) -+#define GET_RX_STATUS_DESC_BW_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) -+ -+//DWORD 5 -+#define GET_RX_STATUS_DESC_TSFL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+#define SET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+// Dword 0 -+#define GET_TX_DESC_OWN_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+#define SET_TX_DESC_PKT_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_FIRST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_LINIP_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_OWN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+// Dword 1 -+#define SET_TX_DESC_MACID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+ -+ -+// Dword 2 -+#define SET_TX_DESC_PAID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_AGG_BREAK_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_SPE_RPT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+ -+// Dword 3 -+#define SET_TX_DESC_WHEADER_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+#define SET_TX_DESC_CHK_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+#define SET_TX_DESC_EARLY_MODE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+// Dword 4 -+#define SET_TX_DESC_TX_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+ -+ -+// Dword 5 -+#define SET_TX_DESC_DATA_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_CTROL_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+ -+ -+// Dword 6 -+#define SET_TX_DESC_SW_DEFINE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_ANTSEL_A_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANTSEL_C_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+#define SET_TX_DESC_ANTSEL_D_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+ -+// Dword 7 -+#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) -+#define SET_TX_DESC_TX_BUFFER_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#else -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#define SET_TX_DESC_USB_TXAGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) -+#define SET_TX_DESC_SDIO_TXSEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+#endif -+ -+// Dword 8 -+#define SET_TX_DESC_HWSEQ_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+ -+// Dword 9 -+#define SET_TX_DESC_SEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+ -+// Dword 10 -+#define SET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+#define GET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) -+ -+// Dword 11 -+#define SET_TX_DESC_NEXT_DESC_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+#endif -+//----------------------------------------------------------- -+// -+// Rate -+// -+//----------------------------------------------------------- -+// CCK Rates, TxHT = 0 -+#define DESC8703B_RATE1M 0x00 -+#define DESC8703B_RATE2M 0x01 -+#define DESC8703B_RATE5_5M 0x02 -+#define DESC8703B_RATE11M 0x03 -+ -+// OFDM Rates, TxHT = 0 -+#define DESC8703B_RATE6M 0x04 -+#define DESC8703B_RATE9M 0x05 -+#define DESC8703B_RATE12M 0x06 -+#define DESC8703B_RATE18M 0x07 -+#define DESC8703B_RATE24M 0x08 -+#define DESC8703B_RATE36M 0x09 -+#define DESC8703B_RATE48M 0x0a -+#define DESC8703B_RATE54M 0x0b -+ -+// MCS Rates, TxHT = 1 -+#define DESC8703B_RATEMCS0 0x0c -+#define DESC8703B_RATEMCS1 0x0d -+#define DESC8703B_RATEMCS2 0x0e -+#define DESC8703B_RATEMCS3 0x0f -+#define DESC8703B_RATEMCS4 0x10 -+#define DESC8703B_RATEMCS5 0x11 -+#define DESC8703B_RATEMCS6 0x12 -+#define DESC8703B_RATEMCS7 0x13 -+#define DESC8703B_RATEMCS8 0x14 -+#define DESC8703B_RATEMCS9 0x15 -+#define DESC8703B_RATEMCS10 0x16 -+#define DESC8703B_RATEMCS11 0x17 -+#define DESC8703B_RATEMCS12 0x18 -+#define DESC8703B_RATEMCS13 0x19 -+#define DESC8703B_RATEMCS14 0x1a -+#define DESC8703B_RATEMCS15 0x1b -+#define DESC8703B_RATEVHTSS1MCS0 0x2c -+#define DESC8703B_RATEVHTSS1MCS1 0x2d -+#define DESC8703B_RATEVHTSS1MCS2 0x2e -+#define DESC8703B_RATEVHTSS1MCS3 0x2f -+#define DESC8703B_RATEVHTSS1MCS4 0x30 -+#define DESC8703B_RATEVHTSS1MCS5 0x31 -+#define DESC8703B_RATEVHTSS1MCS6 0x32 -+#define DESC8703B_RATEVHTSS1MCS7 0x33 -+#define DESC8703B_RATEVHTSS1MCS8 0x34 -+#define DESC8703B_RATEVHTSS1MCS9 0x35 -+#define DESC8703B_RATEVHTSS2MCS0 0x36 -+#define DESC8703B_RATEVHTSS2MCS1 0x37 -+#define DESC8703B_RATEVHTSS2MCS2 0x38 -+#define DESC8703B_RATEVHTSS2MCS3 0x39 -+#define DESC8703B_RATEVHTSS2MCS4 0x3a -+#define DESC8703B_RATEVHTSS2MCS5 0x3b -+#define DESC8703B_RATEVHTSS2MCS6 0x3c -+#define DESC8703B_RATEVHTSS2MCS7 0x3d -+#define DESC8703B_RATEVHTSS2MCS8 0x3e -+#define DESC8703B_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8703B(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE1M ||\ -+ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE2M ||\ -+ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE5_5M ||\ -+ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE11M) -+ -+ -+void rtl8703b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8703b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+s32 rtl8703bs_init_xmit_priv(PADAPTER padapter); -+void rtl8703bs_free_xmit_priv(PADAPTER padapter); -+s32 rtl8703bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8703bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8703bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8703bs_xmit_buf_handler(PADAPTER padapter); -+thread_return rtl8703bs_xmit_thread(thread_context context); -+#define hal_xmit_handler rtl8703bs_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8703bu_xmit_buf_handler(PADAPTER padapter); -+#define hal_xmit_handler rtl8703bu_xmit_buf_handler -+ -+ -+s32 rtl8703bu_init_xmit_priv(PADAPTER padapter); -+void rtl8703bu_free_xmit_priv(PADAPTER padapter); -+s32 rtl8703bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8703bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8703bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); -+void rtl8703bu_xmit_tasklet(void *priv); -+s32 rtl8703bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8703be_init_xmit_priv(PADAPTER padapter); -+void rtl8703be_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8703be_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8703be_xmitframe_resume(_adapter *padapter); -+s32 rtl8703be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8703be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8703be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8703be_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_XMIT_H__ ++#define __RTL8703B_XMIT_H__ ++ ++ ++#define MAX_TID (15) ++ ++ ++#ifndef __INC_HAL8703BDESC_H ++#define __INC_HAL8703BDESC_H ++ ++#define RX_STATUS_DESC_SIZE_8703B 24 ++#define RX_DRV_INFO_SIZE_UNIT_8703B 8 ++ ++ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_AMSDU_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_CHKERR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_IPVER_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_IS_TCPUDP__8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_CHK_VLD_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_RPT_SEL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++#endif ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++//DWORD 6 ++#define GET_RX_STATUS_DESC_SPLCP_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) ++#define GET_RX_STATUS_DESC_LDPC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) ++#define GET_RX_STATUS_DESC_STBC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) ++#define GET_RX_STATUS_DESC_BW_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++#define SET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) ++ ++ ++// Dword 0 ++#define GET_TX_DESC_OWN_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++#define SET_TX_DESC_PKT_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_AGG_BREAK_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_INT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_MODE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++ ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_USB_TXAGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) ++#define SET_TX_DESC_SDIO_TXSEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif ++ ++// Dword 8 ++#define SET_TX_DESC_HWSEQ_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_SEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++ ++// Dword 10 ++#define SET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) ++ ++// Dword 11 ++#define SET_TX_DESC_NEXT_DESC_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++#endif ++//----------------------------------------------------------- ++// ++// Rate ++// ++//----------------------------------------------------------- ++// CCK Rates, TxHT = 0 ++#define DESC8703B_RATE1M 0x00 ++#define DESC8703B_RATE2M 0x01 ++#define DESC8703B_RATE5_5M 0x02 ++#define DESC8703B_RATE11M 0x03 ++ ++// OFDM Rates, TxHT = 0 ++#define DESC8703B_RATE6M 0x04 ++#define DESC8703B_RATE9M 0x05 ++#define DESC8703B_RATE12M 0x06 ++#define DESC8703B_RATE18M 0x07 ++#define DESC8703B_RATE24M 0x08 ++#define DESC8703B_RATE36M 0x09 ++#define DESC8703B_RATE48M 0x0a ++#define DESC8703B_RATE54M 0x0b ++ ++// MCS Rates, TxHT = 1 ++#define DESC8703B_RATEMCS0 0x0c ++#define DESC8703B_RATEMCS1 0x0d ++#define DESC8703B_RATEMCS2 0x0e ++#define DESC8703B_RATEMCS3 0x0f ++#define DESC8703B_RATEMCS4 0x10 ++#define DESC8703B_RATEMCS5 0x11 ++#define DESC8703B_RATEMCS6 0x12 ++#define DESC8703B_RATEMCS7 0x13 ++#define DESC8703B_RATEMCS8 0x14 ++#define DESC8703B_RATEMCS9 0x15 ++#define DESC8703B_RATEMCS10 0x16 ++#define DESC8703B_RATEMCS11 0x17 ++#define DESC8703B_RATEMCS12 0x18 ++#define DESC8703B_RATEMCS13 0x19 ++#define DESC8703B_RATEMCS14 0x1a ++#define DESC8703B_RATEMCS15 0x1b ++#define DESC8703B_RATEVHTSS1MCS0 0x2c ++#define DESC8703B_RATEVHTSS1MCS1 0x2d ++#define DESC8703B_RATEVHTSS1MCS2 0x2e ++#define DESC8703B_RATEVHTSS1MCS3 0x2f ++#define DESC8703B_RATEVHTSS1MCS4 0x30 ++#define DESC8703B_RATEVHTSS1MCS5 0x31 ++#define DESC8703B_RATEVHTSS1MCS6 0x32 ++#define DESC8703B_RATEVHTSS1MCS7 0x33 ++#define DESC8703B_RATEVHTSS1MCS8 0x34 ++#define DESC8703B_RATEVHTSS1MCS9 0x35 ++#define DESC8703B_RATEVHTSS2MCS0 0x36 ++#define DESC8703B_RATEVHTSS2MCS1 0x37 ++#define DESC8703B_RATEVHTSS2MCS2 0x38 ++#define DESC8703B_RATEVHTSS2MCS3 0x39 ++#define DESC8703B_RATEVHTSS2MCS4 0x3a ++#define DESC8703B_RATEVHTSS2MCS5 0x3b ++#define DESC8703B_RATEVHTSS2MCS6 0x3c ++#define DESC8703B_RATEVHTSS2MCS7 0x3d ++#define DESC8703B_RATEVHTSS2MCS8 0x3e ++#define DESC8703B_RATEVHTSS2MCS9 0x3f ++ ++ ++#define RX_HAL_IS_CCK_RATE_8703B(pDesc)\ ++ (GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE1M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE2M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE5_5M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE11M) ++ ++ ++void rtl8703b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); ++void rtl8703b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8703bs_init_xmit_priv(PADAPTER padapter); ++void rtl8703bs_free_xmit_priv(PADAPTER padapter); ++s32 rtl8703bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8703bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703bs_xmit_buf_handler(PADAPTER padapter); ++thread_return rtl8703bs_xmit_thread(thread_context context); ++#define hal_xmit_handler rtl8703bs_xmit_buf_handler ++#endif ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8703bu_xmit_buf_handler(PADAPTER padapter); ++#define hal_xmit_handler rtl8703bu_xmit_buf_handler ++ ++ ++s32 rtl8703bu_init_xmit_priv(PADAPTER padapter); ++void rtl8703bu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8703bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8703bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); ++void rtl8703bu_xmit_tasklet(void *priv); ++s32 rtl8703bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8703be_init_xmit_priv(PADAPTER padapter); ++void rtl8703be_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8703be_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8703be_xmitframe_resume(_adapter *padapter); ++s32 rtl8703be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8703be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8703be_xmit_tasklet(void *priv); ++#endif ++ ++u8 BWMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++u8 SCMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_cmd.h new file mode 100644 -index 000000000..aa8c64505 +index 0000000..aa8c645 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_cmd.h @@ -0,0 +1,217 @@ @@ -293066,7 +334498,7 @@ index 000000000..aa8c64505 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_dm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_dm.h new file mode 100644 -index 000000000..2108c46dd +index 0000000..2108c46 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_dm.h @@ -0,0 +1,48 @@ @@ -293120,492 +334552,492 @@ index 000000000..2108c46dd + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_hal.h new file mode 100644 -index 000000000..58d8494ae +index 0000000..8424308 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_hal.h @@ -0,0 +1,326 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8723B_HAL_H__ -+#define __RTL8723B_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8723b_spec.h" -+#include "rtl8723b_rf.h" -+#include "rtl8723b_dm.h" -+#include "rtl8723b_recv.h" -+#include "rtl8723b_xmit.h" -+#include "rtl8723b_cmd.h" -+#include "rtl8723b_led.h" -+#include "Hal8723BPwrSeq.h" -+#include "Hal8723BPhyReg.h" -+#include "Hal8723BPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8723b_sreset.h" -+#endif -+ -+ -+//--------------------------------------------------------------------- -+// RTL8723B From file -+//--------------------------------------------------------------------- -+ #define RTL8723B_FW_IMG "rtl8723b/FW_NIC.bin" -+ #define RTL8723B_FW_WW_IMG "rtl8723b/FW_WoWLAN.bin" -+ #define RTL8723B_PHY_REG "rtl8723b/PHY_REG.txt" -+ #define RTL8723B_PHY_RADIO_A "rtl8723b/RadioA.txt" -+ #define RTL8723B_PHY_RADIO_B "rtl8723b/RadioB.txt" -+ #define RTL8723B_TXPWR_TRACK "rtl8723b/TxPowerTrack.txt" -+ #define RTL8723B_AGC_TAB "rtl8723b/AGC_TAB.txt" -+ #define RTL8723B_PHY_MACREG "rtl8723b/MAC_REG.txt" -+ #define RTL8723B_PHY_REG_PG "rtl8723b/PHY_REG_PG.txt" -+ #define RTL8723B_PHY_REG_MP "rtl8723b/PHY_REG_MP.txt" -+ #define RTL8723B_TXPWR_LMT "rtl8723b/TXPWR_LMT.txt" -+ -+//--------------------------------------------------------------------- -+// RTL8723B From header -+//--------------------------------------------------------------------- -+ -+#if MP_DRIVER == 1 -+ #define Rtl8723B_FwBTImgArray Rtl8723BFwBTImgArray -+ #define Rtl8723B_FwBTImgArrayLength Rtl8723BFwBTImgArrayLength -+ -+ #define Rtl8723B_PHY_REG_Array_MP Rtl8723B_PHYREG_Array_MP -+ #define Rtl8723B_PHY_REG_Array_MPLength Rtl8723B_PHYREG_Array_MPLength -+#endif -+ -+ -+#define FW_8723B_SIZE 0x8000 -+#define FW_8723B_START_ADDRESS 0x1000 -+#define FW_8723B_END_ADDRESS 0x1FFF //0x5FFF -+ -+#define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x5300) -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8* szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8723B_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; -+ -+// -+// This structure must be cared byte-ordering -+// -+// Added by tynli. 2009.12.04. -+typedef struct _RT_8723B_FIRMWARE_HDR -+{ -+ // 8-byte alinment required -+ -+ //--- LONG WORD 0 ---- -+ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut -+ u8 Category; // AP/NIC and USB/PCI -+ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions -+ u16 Version; // FW Version -+ u16 Subversion; // FW Subversion, default 0x00 -+ -+ //--- LONG WORD 1 ---- -+ u8 Month; // Release time Month field -+ u8 Date; // Release time Date field -+ u8 Hour; // Release time Hour field -+ u8 Minute; // Release time Minute field -+ u16 RamCodeSize; // The size of RAM code -+ u16 Rsvd2; -+ -+ //--- LONG WORD 2 ---- -+ u32 SvnIdx; // The SVN entry index -+ u32 Rsvd3; -+ -+ //--- LONG WORD 3 ---- -+ u32 Rsvd4; -+ u32 Rsvd5; -+}RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; -+ -+#define DRIVER_EARLY_INT_TIME_8723B 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8723B 0x02 -+ -+// for 8723B -+// TX 32K, RX 16K, Page size 128B for TX, 8B for RX -+#define PAGE_SIZE_TX_8723B 128 -+#define PAGE_SIZE_RX_8723B 8 -+ -+#define TX_DMA_SIZE_8723B 0x8000 /* 32K(TX) */ -+#define RX_DMA_SIZE_8723B 0x4000 /* 16K(RX) */ -+ -+#ifdef CONFIG_WOWLAN -+#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ -+#else -+#define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+#define RX_DMA_RESERVED_SIZE_8723B 0x100 // 256B, reserved for c2h debug message -+#else -+#define RX_DMA_RESERVED_SIZE_8723B 0x80 // 128B, reserved for tx report -+#endif -+#define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) -+ -+ -+// Note: We will divide number of page equally for each queue other than public queue! -+ -+//For General Reserved Page Number(Beacon Queue is reserved page) -+//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 -+#define BCNQ_PAGE_NUM_8723B 0x08 -+#ifdef CONFIG_CONCURRENT_MODE -+#define BCNQ1_PAGE_NUM_8723B 0x08 // 0x04 -+#else -+#define BCNQ1_PAGE_NUM_8723B 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+#undef BCNQ1_PAGE_NUM_8723B -+#define BCNQ1_PAGE_NUM_8723B 0x00 // 0x04 -+#endif -+ -+//For WoWLan , more reserved page -+//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 -+#ifdef CONFIG_WOWLAN -+#define WOWLAN_PAGE_NUM_8723B 0x07 -+#else -+#define WOWLAN_PAGE_NUM_8723B 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+#undef WOWLAN_PAGE_NUM_8723B -+#define WOWLAN_PAGE_NUM_8723B 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+#define AP_WOWLAN_PAGE_NUM_8723B 0x02 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - BCNQ1_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) -+#define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) -+ -+// For Normal Chip Setting -+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B -+#define NORMAL_PAGE_NUM_HPQ_8723B 0x0C -+#define NORMAL_PAGE_NUM_LPQ_8723B 0x02 -+#define NORMAL_PAGE_NUM_NPQ_8723B 0x02 -+ -+// Note: For Normal Chip Setting, modify later -+#define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES 15 -+ -+#define HAL_EFUSE_MEMORY -+ -+#define HWSET_MAX_SIZE_8723B 512 -+#define EFUSE_REAL_CONTENT_LEN_8723B 512 -+#define EFUSE_MAP_LEN_8723B 512 -+#define EFUSE_MAX_SECTION_8723B 64 -+ -+#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) -+ -+#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. -+#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. -+ -+//======================================================== -+// EFUSE for BT definition -+//======================================================== -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -+#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 -+#define EFUSE_BT_MAP_LEN 1024 // 1k bytes -+#define EFUSE_BT_MAX_SECTION 128 // 1024/8 -+ -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+typedef struct _C2H_EVT_HDR -+{ -+ u8 CmdID; -+ u8 CmdLen; -+ u8 CmdSeq; -+} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; -+ -+typedef enum tag_Package_Definition -+{ -+ PACKAGE_DEFAULT, -+ PACKAGE_QFN68, -+ PACKAGE_TFBGA90, -+ PACKAGE_TFBGA80, -+ PACKAGE_TFBGA79 -+}PACKAGE_TYPE_E; -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+// rtl8723a_hal_init.c -+s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8723b_FirmwareSelfReset(PADAPTER padapter); -+void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8723b_InitAntenna_Selection(PADAPTER padapter); -+void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8723b_init_default_value(PADAPTER padapter); -+ -+s32 rtl8723b_InitLLTTable(PADAPTER padapter); -+ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -+s32 CardDisableWithoutHWSM(PADAPTER padapter); -+ -+// EFuse -+u8 GetEEPROMSize8723B(PADAPTER padapter); -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -+VOID Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+VOID Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+VOID Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); -+ -+#ifdef CONFIG_C2H_PACKET_EN -+void rtl8723b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); -+#endif -+ -+ -+void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8723b(_adapter *adapter); -+void SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); -+#ifdef CONFIG_C2H_PACKET_EN -+void SetHwRegWithBuf8723B(PADAPTER padapter, u8 variable, u8 *pbuf, int len); -+#endif // CONFIG_C2H_PACKET_EN -+u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+// register -+void rtl8723b_InitBeaconParameters(PADAPTER padapter); -+void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+void _InitBurstPktLen_8723BS(PADAPTER Adapter); -+void _8051Reset8723(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif //CONFIG_WOWLAN -+ -+void rtl8723b_start_thread(_adapter *padapter); -+void rtl8723b_stop_thread(_adapter *padapter); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+void rtl8723bs_init_checkbthang_workqueue(_adapter * adapter); -+void rtl8723bs_free_checkbthang_workqueue(_adapter * adapter); -+void rtl8723bs_cancle_checkbthang_workqueue(_adapter * adapter); -+void rtl8723bs_hal_check_bt_hang(_adapter * adapter); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+ -+int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+ -+void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); -+s32 c2h_id_filter_ccx_8723b(u8 *buf); -+s32 c2h_handler_8723b(PADAPTER padapter, u8 *pC2hEvent); -+u8 MRateToHwRate8723B(u8 rate); -+u8 HwRateToMRate8723B(u8 rate); -+ -+#ifdef CONFIG_RF_GAIN_OFFSET -+void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); -+#endif //CONFIG_RF_GAIN_OFFSET -+ -+#ifdef CONFIG_PCI_HCI -+BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); -+VOID UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_HAL_H__ ++#define __RTL8723B_HAL_H__ ++ ++#include "hal_data.h" ++ ++#include "rtl8723b_spec.h" ++#include "rtl8723b_rf.h" ++#include "rtl8723b_dm.h" ++#include "rtl8723b_recv.h" ++#include "rtl8723b_xmit.h" ++#include "rtl8723b_cmd.h" ++#include "rtl8723b_led.h" ++#include "Hal8723BPwrSeq.h" ++#include "Hal8723BPhyReg.h" ++#include "Hal8723BPhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8723b_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8723B From file ++//--------------------------------------------------------------------- ++ #define RTL8723B_FW_IMG "rtl8723b/FW_NIC.bin" ++ #define RTL8723B_FW_WW_IMG "rtl8723b/FW_WoWLAN.bin" ++ #define RTL8723B_PHY_REG "rtl8723b/PHY_REG.txt" ++ #define RTL8723B_PHY_RADIO_A "rtl8723b/RadioA.txt" ++ #define RTL8723B_PHY_RADIO_B "rtl8723b/RadioB.txt" ++ #define RTL8723B_TXPWR_TRACK "rtl8723b/TxPowerTrack.txt" ++ #define RTL8723B_AGC_TAB "rtl8723b/AGC_TAB.txt" ++ #define RTL8723B_PHY_MACREG "rtl8723b/MAC_REG.txt" ++ #define RTL8723B_PHY_REG_PG "rtl8723b/PHY_REG_PG.txt" ++ #define RTL8723B_PHY_REG_MP "rtl8723b/PHY_REG_MP.txt" ++ #define RTL8723B_TXPWR_LMT "rtl8723b/TXPWR_LMT.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8723B From header ++//--------------------------------------------------------------------- ++ ++#if MP_DRIVER == 1 ++ #define Rtl8723B_FwBTImgArray Rtl8723BFwBTImgArray ++ #define Rtl8723B_FwBTImgArrayLength Rtl8723BFwBTImgArrayLength ++ ++ #define Rtl8723B_PHY_REG_Array_MP Rtl8723B_PHYREG_Array_MP ++ #define Rtl8723B_PHY_REG_Array_MPLength Rtl8723B_PHYREG_Array_MPLength ++#endif ++ ++ ++#define FW_8723B_SIZE 0x8000 ++#define FW_8723B_START_ADDRESS 0x1000 ++#define FW_8723B_END_ADDRESS 0x1FFF //0x5FFF ++ ++#define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x5300) ++ ++typedef struct _RT_FIRMWARE { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_8723B_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8723B_FIRMWARE_HDR ++{ ++ // 8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u16 Subversion; // FW Subversion, default 0x00 ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++}RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME_8723B 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8723B 0x02 ++ ++// for 8723B ++// TX 32K, RX 16K, Page size 128B for TX, 8B for RX ++#define PAGE_SIZE_TX_8723B 128 ++#define PAGE_SIZE_RX_8723B 8 ++ ++#define TX_DMA_SIZE_8723B 0x8000 /* 32K(TX) */ ++#define RX_DMA_SIZE_8723B 0x4000 /* 16K(RX) */ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8723B 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8723B 0x80 // 128B, reserved for tx report ++#endif ++#define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++//For General Reserved Page Number(Beacon Queue is reserved page) ++//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 ++#define BCNQ_PAGE_NUM_8723B 0x08 ++#ifdef CONFIG_CONCURRENT_MODE ++#define BCNQ1_PAGE_NUM_8723B 0x08 // 0x04 ++#else ++#define BCNQ1_PAGE_NUM_8723B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef BCNQ1_PAGE_NUM_8723B ++#define BCNQ1_PAGE_NUM_8723B 0x00 // 0x04 ++#endif ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8723B 0x07 ++#else ++#define WOWLAN_PAGE_NUM_8723B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef WOWLAN_PAGE_NUM_8723B ++#define WOWLAN_PAGE_NUM_8723B 0x15 ++#endif ++ ++#ifdef CONFIG_AP_WOWLAN ++#define AP_WOWLAN_PAGE_NUM_8723B 0x02 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - BCNQ1_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) ++#define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B ++#define NORMAL_PAGE_NUM_HPQ_8723B 0x0C ++#define NORMAL_PAGE_NUM_LPQ_8723B 0x02 ++#define NORMAL_PAGE_NUM_NPQ_8723B 0x02 ++ ++// Note: For Normal Chip Setting, modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 ++ ++ ++#include "HalVerDef.h" ++#include "hal_com.h" ++ ++#define EFUSE_OOB_PROTECT_BYTES 15 ++ ++#define HAL_EFUSE_MEMORY ++ ++#define HWSET_MAX_SIZE_8723B 512 ++#define EFUSE_REAL_CONTENT_LEN_8723B 512 ++#define EFUSE_MAP_LEN_8723B 512 ++#define EFUSE_MAX_SECTION_8723B 64 ++ ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) ++ ++#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. ++#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 ++#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++typedef struct _C2H_EVT_HDR ++{ ++ u8 CmdID; ++ u8 CmdLen; ++ u8 CmdSeq; ++} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; ++ ++typedef enum tag_Package_Definition ++{ ++ PACKAGE_DEFAULT, ++ PACKAGE_QFN68, ++ PACKAGE_TFBGA90, ++ PACKAGE_TFBGA80, ++ PACKAGE_TFBGA79 ++}PACKAGE_TYPE_E; ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++// rtl8723a_hal_init.c ++s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); ++void rtl8723b_FirmwareSelfReset(PADAPTER padapter); ++void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); ++ ++void rtl8723b_InitAntenna_Selection(PADAPTER padapter); ++void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); ++void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); ++void rtl8723b_init_default_value(PADAPTER padapter); ++ ++s32 rtl8723b_InitLLTTable(PADAPTER padapter); ++ ++s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); ++s32 CardDisableWithoutHWSM(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8723B(PADAPTER padapter); ++void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); ++void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); ++void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); ++void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); ++VOID Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++ ++#ifdef CONFIG_C2H_PACKET_EN ++void rtl8723b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); ++#endif ++ ++ ++void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8723b(_adapter *adapter); ++void SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); ++void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); ++#ifdef CONFIG_C2H_PACKET_EN ++void SetHwRegWithBuf8723B(PADAPTER padapter, u8 variable, u8 *pbuf, int len); ++#endif // CONFIG_C2H_PACKET_EN ++u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++ ++// register ++void rtl8723b_InitBeaconParameters(PADAPTER padapter); ++void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); ++void _InitBurstPktLen_8723BS(PADAPTER Adapter); ++void _8051Reset8723(PADAPTER padapter); ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void rtl8723b_start_thread(_adapter *padapter); ++void rtl8723b_stop_thread(_adapter *padapter); ++ ++#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) ++void rtl8723bs_init_checkbthang_workqueue(_adapter * adapter); ++void rtl8723bs_free_checkbthang_workqueue(_adapter * adapter); ++void rtl8723bs_cancle_checkbthang_workqueue(_adapter * adapter); ++void rtl8723bs_hal_check_bt_hang(_adapter * adapter); ++#endif ++ ++#ifdef CONFIG_GPIO_WAKEUP ++void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); ++#endif ++ ++int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++ ++void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); ++s32 c2h_id_filter_ccx_8723b(u8 *buf); ++s32 c2h_handler_8723b(PADAPTER padapter, u8 *pC2hEvent); ++u8 MRateToHwRate8723B(u8 rate); ++u8 HwRateToMRate8723B(u8 rate); ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); ++VOID UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_led.h new file mode 100644 -index 000000000..161fa4840 +index 0000000..36772c0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_led.h @@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8723B_LED_H__ -+#define __RTL8723B_LED_H__ -+ -+#include -+#include -+#include -+ -+ -+//================================================================================ -+// Interface to manipulate LED objects. -+//================================================================================ -+#ifdef CONFIG_USB_HCI -+void rtl8723bu_InitSwLeds(PADAPTER padapter); -+void rtl8723bu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+void rtl8723bs_InitSwLeds(PADAPTER padapter); -+void rtl8723bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_GSPI_HCI -+void rtl8723bs_InitSwLeds(PADAPTER padapter); -+void rtl8723bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+void rtl8723be_InitSwLeds(PADAPTER padapter); -+void rtl8723be_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_LED_H__ ++#define __RTL8723B_LED_H__ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8723bu_InitSwLeds(PADAPTER padapter); ++void rtl8723bu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8723bs_InitSwLeds(PADAPTER padapter); ++void rtl8723bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_GSPI_HCI ++void rtl8723bs_InitSwLeds(PADAPTER padapter); ++void rtl8723bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8723be_InitSwLeds(PADAPTER padapter); ++void rtl8723be_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_recv.h new file mode 100644 -index 000000000..a49385a9e +index 0000000..f461186 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_recv.h @@ -0,0 +1,92 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8723B_RECV_H__ -+#define __RTL8723B_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ -+#ifndef MAX_RECVBUF_SZ -+#ifdef PLATFORM_OS_CE -+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+#else -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ //#define MAX_RECVBUF_SZ (32768) // 32k -+ //#define MAX_RECVBUF_SZ (16384) //16K -+ //#define MAX_RECVBUF_SZ (10240) //10K -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) // 8K -+ #else -+ #define MAX_RECVBUF_SZ (15360) // 15k < 16k -+ #endif -+ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+ #else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+ #endif -+#endif -+#endif //!MAX_RECVBUF_SZ -+ -+#elif defined(CONFIG_PCI_HCI) -+//#ifndef CONFIG_MINIMAL_MEMORY_USAGE -+// #define MAX_RECVBUF_SZ (9100) -+//#else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+//#endif -+ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+#define MAX_RECVBUF_SZ (10240) -+ -+#endif -+ -+// Rx smooth factor -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_SDIO_HCI -+#ifndef CONFIG_SDIO_RX_COPY -+#undef MAX_RECVBUF_SZ -+#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) -+#endif // !CONFIG_SDIO_RX_COPY -+#endif // CONFIG_SDIO_HCI -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+s32 rtl8723bs_init_recv_priv(PADAPTER padapter); -+void rtl8723bs_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+int rtl8723bu_init_recv_priv(_adapter *padapter); -+void rtl8723bu_free_recv_priv (_adapter *padapter); -+void rtl8723bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8723be_init_recv_priv(PADAPTER padapter); -+void rtl8723be_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8723B_RECV_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_RECV_H__ ++#define __RTL8723B_RECV_H__ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ ++#define MAX_RECVBUF_SZ (10240) ++ ++#endif ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_SDIO_HCI ++#ifndef CONFIG_SDIO_RX_COPY ++#undef MAX_RECVBUF_SZ ++#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) ++#endif // !CONFIG_SDIO_RX_COPY ++#endif // CONFIG_SDIO_HCI ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8723bs_init_recv_priv(PADAPTER padapter); ++void rtl8723bs_free_recv_priv(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++int rtl8723bu_init_recv_priv(_adapter *padapter); ++void rtl8723bu_free_recv_priv (_adapter *padapter); ++void rtl8723bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8723be_init_recv_priv(PADAPTER padapter); ++void rtl8723be_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8723B_RECV_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_rf.h new file mode 100644 -index 000000000..2bb734176 +index 0000000..2bb7341 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_rf.h @@ -0,0 +1,31 @@ @@ -293642,308 +335074,308 @@ index 000000000..2bb734176 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_spec.h new file mode 100644 -index 000000000..c19b3c526 +index 0000000..63f3059 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_spec.h @@ -0,0 +1,295 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ *******************************************************************************/ -+#ifndef __RTL8723B_SPEC_H__ -+#define __RTL8723B_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8723B 128 // micro-second -+ -+//----------------------------------------------------- -+// -+// 0x0000h ~ 0x00FFh System Configuration -+// -+//----------------------------------------------------- -+#define REG_RSV_CTRL_8723B 0x001C // 3 Byte -+#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038 -+#define REG_HSISR_8723B 0x005c -+#define REG_PAD_CTRL1_8723B 0x0064 -+#define REG_AFE_CTRL_4_8723B 0x0078 -+#define REG_HMEBOX_DBG_0_8723B 0x0088 -+#define REG_HMEBOX_DBG_1_8723B 0x008A -+#define REG_HMEBOX_DBG_2_8723B 0x008C -+#define REG_HMEBOX_DBG_3_8723B 0x008E -+#define REG_HIMR0_8723B 0x00B0 -+#define REG_HISR0_8723B 0x00B4 -+#define REG_HIMR1_8723B 0x00B8 -+#define REG_HISR1_8723B 0x00BC -+#define REG_PMC_DBG_CTRL2_8723B 0x00CC -+ -+//----------------------------------------------------- -+// -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+// -+//----------------------------------------------------- -+#define REG_C2HEVT_CMD_ID_8723B 0x01A0 -+#define REG_C2HEVT_CMD_LEN_8723B 0x01AE -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_WOWLAN_GTK_DBG1 0x630 -+#define REG_WOWLAN_GTK_DBG2 0x634 -+ -+#define REG_HMEBOX_EXT0_8723B 0x01F0 -+#define REG_HMEBOX_EXT1_8723B 0x01F4 -+#define REG_HMEBOX_EXT2_8723B 0x01F8 -+#define REG_HMEBOX_EXT3_8723B 0x01FC -+ -+//----------------------------------------------------- -+// -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+// -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_RXDMA_CONTROL_8723B 0x0286 // Control the RX DMA. -+#define REG_RXDMA_MODE_CTRL_8723B 0x0290 -+ -+//----------------------------------------------------- -+// -+// 0x0300h ~ 0x03FFh PCIe -+// -+//----------------------------------------------------- -+#define REG_PCIE_CTRL_REG_8723B 0x0300 -+#define REG_INT_MIG_8723B 0x0304 // Interrupt Migration -+#define REG_BCNQ_DESA_8723B 0x0308 // TX Beacon Descriptor Address -+#define REG_HQ_DESA_8723B 0x0310 // TX High Queue Descriptor Address -+#define REG_MGQ_DESA_8723B 0x0318 // TX Manage Queue Descriptor Address -+#define REG_VOQ_DESA_8723B 0x0320 // TX VO Queue Descriptor Address -+#define REG_VIQ_DESA_8723B 0x0328 // TX VI Queue Descriptor Address -+#define REG_BEQ_DESA_8723B 0x0330 // TX BE Queue Descriptor Address -+#define REG_BKQ_DESA_8723B 0x0338 // TX BK Queue Descriptor Address -+#define REG_RX_DESA_8723B 0x0340 // RX Queue Descriptor Address -+#define REG_DBI_WDATA_8723B 0x0348 // DBI Write Data -+#define REG_DBI_RDATA_8723B 0x034C // DBI Read Data -+#define REG_DBI_ADDR_8723B 0x0350 // DBI Address -+#define REG_DBI_FLAG_8723B 0x0352 // DBI Read/Write Flag -+#define REG_MDIO_WDATA_8723B 0x0354 // MDIO for Write PCIE PHY -+#define REG_MDIO_RDATA_8723B 0x0356 // MDIO for Reads PCIE PHY -+#define REG_MDIO_CTL_8723B 0x0358 // MDIO for Control -+#define REG_DBG_SEL_8723B 0x0360 // Debug Selection Register -+#define REG_PCIE_HRPWM_8723B 0x0361 //PCIe RPWM -+#define REG_PCIE_HCPWM_8723B 0x0363 //PCIe CPWM -+#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A //PCIE Multi-Fethc Control -+ -+//----------------------------------------------------- -+// -+// 0x0400h ~ 0x047Fh Protocol Configuration -+// -+//----------------------------------------------------- -+#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D -+#ifdef CONFIG_WOWLAN -+#define REG_TXPKTBUF_IV_LOW 0x0484 -+#define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_AMPDU_BURST_MODE_8723B 0x04BC -+ -+//----------------------------------------------------- -+// -+// 0x0500h ~ 0x05FFh EDCA Configuration -+// -+//----------------------------------------------------- -+#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 -+ -+//----------------------------------------------------- -+// -+// 0x0600h ~ 0x07FFh WMAC Configuration -+// -+//----------------------------------------------------- -+ -+ -+//============================================================ -+// SDIO Bus Specification -+//============================================================ -+ -+//----------------------------------------------------- -+// SDIO CMD Address Mapping -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// I/O bus domain (Host) -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// SDIO register -+//----------------------------------------------------- -+#define SDIO_REG_HCPWM1_8723B 0x025 // HCI Current Power Mode 1 -+ -+ -+//============================================================================ -+// 8723 Regsiter Bit and Content definition -+//============================================================================ -+ -+//2 HSISR -+// interrupt mask which needs to clear -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+//----------------------------------------------------- -+// -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+// -+//----------------------------------------------------- -+#undef IS_E_CUT -+#define IS_E_CUT(version) FALSE -+#undef IS_F_CUT -+#define IS_F_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) -+ -+//----------------------------------------------------- -+// -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+// -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+// -+//----------------------------------------------------- -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+#define RXPKT_RELEASE_POLL BIT(16) -+#define RXDMA_IDLE BIT(17) -+#define RW_RELEASE_EN BIT(18) -+#endif -+ -+//----------------------------------------------------- -+// -+// 0x0400h ~ 0x047Fh Protocol Configuration -+// -+//----------------------------------------------------- -+ -+//---------------------------------------------------------------------------- -+// 8723B REG_CCK_CHECK (offset 0x454) -+//---------------------------------------------------------------------------- -+#define BIT_BCN_PORT_SEL BIT5 -+ -+//----------------------------------------------------- -+// -+// 0x0500h ~ 0x05FFh EDCA Configuration -+// -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// -+// 0x0600h ~ 0x07FFh WMAC Configuration -+// -+//----------------------------------------------------- -+#ifdef CONFIG_RF_GAIN_OFFSET -+ -+#ifdef CONFIG_RTL8723B -+#define EEPROM_RF_GAIN_OFFSET 0xC1 -+#endif -+ -+#define EEPROM_RF_GAIN_VAL 0x1F6 -+#endif //CONFIG_RF_GAIN_OFFSET -+ -+ -+//---------------------------------------------------------------------------- -+// 8195 IMR/ISR bits (offset 0xB0, 8bits) -+//---------------------------------------------------------------------------- -+#define IMR_DISABLED_8723B 0 -+// IMR DW0(0x00B0-00B3) Bit 0-31 -+#define IMR_TIMER2_8723B BIT31 // Timeout interrupt 2 -+#define IMR_TIMER1_8723B BIT30 // Timeout interrupt 1 -+#define IMR_PSTIMEOUT_8723B BIT29 // Power Save Time Out Interrupt -+#define IMR_GTINT4_8723B BIT28 // When GTIMER4 expires, this bit is set to 1 -+#define IMR_GTINT3_8723B BIT27 // When GTIMER3 expires, this bit is set to 1 -+#define IMR_TXBCN0ERR_8723B BIT26 // Transmit Beacon0 Error -+#define IMR_TXBCN0OK_8723B BIT25 // Transmit Beacon0 OK -+#define IMR_TSF_BIT32_TOGGLE_8723B BIT24 // TSF Timer BIT32 toggle indication interrupt -+#define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0 -+#define IMR_BCNDERR0_8723B BIT16 // Beacon Queue DMA OK0 -+#define IMR_HSISR_IND_ON_INT_8723B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) -+#define IMR_BCNDMAINT_E_8723B BIT14 // Beacon DMA Interrupt Extension for Win7 -+#define IMR_ATIMEND_8723B BIT12 // CTWidnow End or ATIM Window End -+#define IMR_C2HCMD_8723B BIT10 // CPU to Host Command INT Status, Write 1 clear -+#define IMR_CPWM2_8723B BIT9 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_CPWM_8723B BIT8 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_HIGHDOK_8723B BIT7 // High Queue DMA OK -+#define IMR_MGNTDOK_8723B BIT6 // Management Queue DMA OK -+#define IMR_BKDOK_8723B BIT5 // AC_BK DMA OK -+#define IMR_BEDOK_8723B BIT4 // AC_BE DMA OK -+#define IMR_VIDOK_8723B BIT3 // AC_VI DMA OK -+#define IMR_VODOK_8723B BIT2 // AC_VO DMA OK -+#define IMR_RDU_8723B BIT1 // Rx Descriptor Unavailable -+#define IMR_ROK_8723B BIT0 // Receive DMA OK -+ -+// IMR DW1(0x00B4-00B7) Bit 0-31 -+#define IMR_BCNDMAINT7_8723B BIT27 // Beacon DMA Interrupt 7 -+#define IMR_BCNDMAINT6_8723B BIT26 // Beacon DMA Interrupt 6 -+#define IMR_BCNDMAINT5_8723B BIT25 // Beacon DMA Interrupt 5 -+#define IMR_BCNDMAINT4_8723B BIT24 // Beacon DMA Interrupt 4 -+#define IMR_BCNDMAINT3_8723B BIT23 // Beacon DMA Interrupt 3 -+#define IMR_BCNDMAINT2_8723B BIT22 // Beacon DMA Interrupt 2 -+#define IMR_BCNDMAINT1_8723B BIT21 // Beacon DMA Interrupt 1 -+#define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7 -+#define IMR_BCNDOK6_8723B BIT19 // Beacon Queue DMA OK Interrup 6 -+#define IMR_BCNDOK5_8723B BIT18 // Beacon Queue DMA OK Interrup 5 -+#define IMR_BCNDOK4_8723B BIT17 // Beacon Queue DMA OK Interrup 4 -+#define IMR_BCNDOK3_8723B BIT16 // Beacon Queue DMA OK Interrup 3 -+#define IMR_BCNDOK2_8723B BIT15 // Beacon Queue DMA OK Interrup 2 -+#define IMR_BCNDOK1_8723B BIT14 // Beacon Queue DMA OK Interrup 1 -+#define IMR_ATIMEND_E_8723B BIT13 // ATIM Window End Extension for Win7 -+#define IMR_TXERR_8723B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. -+#define IMR_RXERR_8723B BIT10 // Rx Error Flag INT Status, Write 1 clear -+#define IMR_TXFOVW_8723B BIT9 // Transmit FIFO Overflow -+#define IMR_RXFOVW_8723B BIT8 // Receive FIFO Overflow -+ -+#ifdef CONFIG_PCI_HCI -+//#define IMR_RX_MASK (IMR_ROK_8723B|IMR_RDU_8723B|IMR_RXFOVW_8723B) -+#define IMR_TX_MASK (IMR_VODOK_8723B|IMR_VIDOK_8723B|IMR_BEDOK_8723B|IMR_BKDOK_8723B|IMR_MGNTDOK_8723B|IMR_HIGHDOK_8723B) -+ -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723B | IMR_TXBCN0OK_8723B | IMR_TXBCN0ERR_8723B | IMR_BCNDERR0_8723B) -+ -+#define RT_AC_INT_MASKS (IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B|IMR_BKDOK_8723B) -+#endif -+ -+//======================================================== -+// General definitions -+//======================================================== -+ -+#define MACID_NUM_8723B 128 -+#define SEC_CAM_ENT_NUM_8723B 64 -+#define NSS_NUM_8723B 1 -+#define BAND_CAP_8723B (BAND_CAP_2G) -+#define BW_CAP_8723B (BW_CAP_20M | BW_CAP_40M) -+ -+#endif /* __RTL8723B_SPEC_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8723B_SPEC_H__ ++#define __RTL8723B_SPEC_H__ ++ ++#include ++ ++ ++#define HAL_NAV_UPPER_UNIT_8723B 128 // micro-second ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_RSV_CTRL_8723B 0x001C // 3 Byte ++#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038 ++#define REG_HSISR_8723B 0x005c ++#define REG_PAD_CTRL1_8723B 0x0064 ++#define REG_AFE_CTRL_4_8723B 0x0078 ++#define REG_HMEBOX_DBG_0_8723B 0x0088 ++#define REG_HMEBOX_DBG_1_8723B 0x008A ++#define REG_HMEBOX_DBG_2_8723B 0x008C ++#define REG_HMEBOX_DBG_3_8723B 0x008E ++#define REG_HIMR0_8723B 0x00B0 ++#define REG_HISR0_8723B 0x00B4 ++#define REG_HIMR1_8723B 0x00B8 ++#define REG_HISR1_8723B 0x00BC ++#define REG_PMC_DBG_CTRL2_8723B 0x00CC ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_C2HEVT_CMD_ID_8723B 0x01A0 ++#define REG_C2HEVT_CMD_LEN_8723B 0x01AE ++#define REG_WOWLAN_WAKE_REASON 0x01C7 ++#define REG_WOWLAN_GTK_DBG1 0x630 ++#define REG_WOWLAN_GTK_DBG2 0x634 ++ ++#define REG_HMEBOX_EXT0_8723B 0x01F0 ++#define REG_HMEBOX_EXT1_8723B 0x01F4 ++#define REG_HMEBOX_EXT2_8723B 0x01F8 ++#define REG_HMEBOX_EXT3_8723B 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_CONTROL_8723B 0x0286 // Control the RX DMA. ++#define REG_RXDMA_MODE_CTRL_8723B 0x0290 ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8723B 0x0300 ++#define REG_INT_MIG_8723B 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA_8723B 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA_8723B 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA_8723B 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA_8723B 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA_8723B 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA_8723B 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA_8723B 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA_8723B 0x0340 // RX Queue Descriptor Address ++#define REG_DBI_WDATA_8723B 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8723B 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8723B 0x0350 // DBI Address ++#define REG_DBI_FLAG_8723B 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8723B 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8723B 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8723B 0x0358 // MDIO for Control ++#define REG_DBG_SEL_8723B 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM_8723B 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM_8723B 0x0363 //PCIe CPWM ++#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A //PCIE Multi-Fethc Control ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_AMPDU_BURST_MODE_8723B 0x04BC ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++ ++//============================================================ ++// SDIO Bus Specification ++//============================================================ ++ ++//----------------------------------------------------- ++// SDIO CMD Address Mapping ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// I/O bus domain (Host) ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// SDIO register ++//----------------------------------------------------- ++#define SDIO_REG_HCPWM1_8723B 0x025 // HCI Current Power Mode 1 ++ ++ ++//============================================================================ ++// 8723 Regsiter Bit and Content definition ++//============================================================================ ++ ++//2 HSISR ++// interrupt mask which needs to clear ++#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ ++ HSISR_SPS_OCP_INT |\ ++ HSISR_RON_INT |\ ++ HSISR_PDNINT |\ ++ HSISR_GPIO9_INT) ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#undef IS_E_CUT ++#define IS_E_CUT(version) FALSE ++#undef IS_F_CUT ++#define IS_F_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define BIT_USB_RXDMA_AGG_EN BIT(31) ++#define RXDMA_AGG_MODE_EN BIT(1) ++ ++#ifdef CONFIG_WOWLAN ++#define RXPKT_RELEASE_POLL BIT(16) ++#define RXDMA_IDLE BIT(17) ++#define RW_RELEASE_EN BIT(18) ++#endif ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++ ++//---------------------------------------------------------------------------- ++// 8723B REG_CCK_CHECK (offset 0x454) ++//---------------------------------------------------------------------------- ++#define BIT_BCN_PORT_SEL BIT5 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#ifdef CONFIG_RF_GAIN_OFFSET ++ ++#ifdef CONFIG_RTL8723B ++#define EEPROM_RF_GAIN_OFFSET 0xC1 ++#endif ++ ++#define EEPROM_RF_GAIN_VAL 0x1F6 ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8723B 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8723B BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8723B BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8723B BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8723B BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8723B BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8723B BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8723B BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8723B BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8723B BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8723B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8723B BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8723B BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8723B BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8723B BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8723B BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8723B BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8723B BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8723B BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8723B BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8723B BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8723B BIT2 // AC_VO DMA OK ++#define IMR_RDU_8723B BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8723B BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8723B BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8723B BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8723B BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8723B BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8723B BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8723B BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8723B BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8723B BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8723B BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8723B BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8723B BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8723B BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8723B BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8723B BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8723B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8723B BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8723B BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8723B BIT8 // Receive FIFO Overflow ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_8723B|IMR_RDU_8723B|IMR_RXFOVW_8723B) ++#define IMR_TX_MASK (IMR_VODOK_8723B|IMR_VIDOK_8723B|IMR_BEDOK_8723B|IMR_BKDOK_8723B|IMR_MGNTDOK_8723B|IMR_HIGHDOK_8723B) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723B | IMR_TXBCN0OK_8723B | IMR_TXBCN0ERR_8723B | IMR_BCNDERR0_8723B) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B|IMR_BKDOK_8723B) ++#endif ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8723B 128 ++#define SEC_CAM_ENT_NUM_8723B 64 ++#define NSS_NUM_8723B 1 ++#define BAND_CAP_8723B (BAND_CAP_2G) ++#define BW_CAP_8723B (BW_CAP_20M | BW_CAP_40M) ++ ++#endif /* __RTL8723B_SPEC_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_sreset.h new file mode 100644 -index 000000000..9ade2dc75 +index 0000000..9ade2dc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_sreset.h @@ -0,0 +1,30 @@ @@ -293979,349 +335411,349 @@ index 000000000..9ade2dc75 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_xmit.h new file mode 100644 -index 000000000..8caa30717 +index 0000000..b998233 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8723b_xmit.h @@ -0,0 +1,336 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8723B_XMIT_H__ -+#define __RTL8723B_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8723BDESC_H -+#define __INC_HAL8723BDESC_H -+ -+#define RX_STATUS_DESC_SIZE_8723B 24 -+#define RX_DRV_INFO_SIZE_UNIT_8723B 8 -+ -+ -+//DWORD 0 -+#define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) -+#define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) -+#define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) -+ -+//DWORD 1 -+#define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) -+ -+//DWORD 2 -+#define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) -+ -+//DWORD 3 -+#define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) -+ -+//DWORD 6 -+#define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) -+#define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) -+#define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) -+#define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) -+ -+//DWORD 5 -+#define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+#define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+// Dword 0 -+#define GET_TX_DESC_OWN_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+#define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+// Dword 1 -+#define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+ -+ -+// Dword 2 -+#define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+ -+// Dword 3 -+#define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+#define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+#define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+// Dword 4 -+#define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+ -+ -+// Dword 5 -+#define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+ -+ -+// Dword 6 -+#define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+#define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+ -+// Dword 7 -+#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) -+#define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#else -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) -+#define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+#endif -+ -+// Dword 8 -+#define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+ -+// Dword 9 -+#define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+ -+// Dword 10 -+#define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+#define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) -+ -+// Dword 11 -+#define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+#endif -+//----------------------------------------------------------- -+// -+// Rate -+// -+//----------------------------------------------------------- -+// CCK Rates, TxHT = 0 -+#define DESC8723B_RATE1M 0x00 -+#define DESC8723B_RATE2M 0x01 -+#define DESC8723B_RATE5_5M 0x02 -+#define DESC8723B_RATE11M 0x03 -+ -+// OFDM Rates, TxHT = 0 -+#define DESC8723B_RATE6M 0x04 -+#define DESC8723B_RATE9M 0x05 -+#define DESC8723B_RATE12M 0x06 -+#define DESC8723B_RATE18M 0x07 -+#define DESC8723B_RATE24M 0x08 -+#define DESC8723B_RATE36M 0x09 -+#define DESC8723B_RATE48M 0x0a -+#define DESC8723B_RATE54M 0x0b -+ -+// MCS Rates, TxHT = 1 -+#define DESC8723B_RATEMCS0 0x0c -+#define DESC8723B_RATEMCS1 0x0d -+#define DESC8723B_RATEMCS2 0x0e -+#define DESC8723B_RATEMCS3 0x0f -+#define DESC8723B_RATEMCS4 0x10 -+#define DESC8723B_RATEMCS5 0x11 -+#define DESC8723B_RATEMCS6 0x12 -+#define DESC8723B_RATEMCS7 0x13 -+#define DESC8723B_RATEMCS8 0x14 -+#define DESC8723B_RATEMCS9 0x15 -+#define DESC8723B_RATEMCS10 0x16 -+#define DESC8723B_RATEMCS11 0x17 -+#define DESC8723B_RATEMCS12 0x18 -+#define DESC8723B_RATEMCS13 0x19 -+#define DESC8723B_RATEMCS14 0x1a -+#define DESC8723B_RATEMCS15 0x1b -+#define DESC8723B_RATEVHTSS1MCS0 0x2c -+#define DESC8723B_RATEVHTSS1MCS1 0x2d -+#define DESC8723B_RATEVHTSS1MCS2 0x2e -+#define DESC8723B_RATEVHTSS1MCS3 0x2f -+#define DESC8723B_RATEVHTSS1MCS4 0x30 -+#define DESC8723B_RATEVHTSS1MCS5 0x31 -+#define DESC8723B_RATEVHTSS1MCS6 0x32 -+#define DESC8723B_RATEVHTSS1MCS7 0x33 -+#define DESC8723B_RATEVHTSS1MCS8 0x34 -+#define DESC8723B_RATEVHTSS1MCS9 0x35 -+#define DESC8723B_RATEVHTSS2MCS0 0x36 -+#define DESC8723B_RATEVHTSS2MCS1 0x37 -+#define DESC8723B_RATEVHTSS2MCS2 0x38 -+#define DESC8723B_RATEVHTSS2MCS3 0x39 -+#define DESC8723B_RATEVHTSS2MCS4 0x3a -+#define DESC8723B_RATEVHTSS2MCS5 0x3b -+#define DESC8723B_RATEVHTSS2MCS6 0x3c -+#define DESC8723B_RATEVHTSS2MCS7 0x3d -+#define DESC8723B_RATEVHTSS2MCS8 0x3e -+#define DESC8723B_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\ -+ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M ||\ -+ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M ||\ -+ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M) -+ -+ -+void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8723b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+s32 rtl8723bs_init_xmit_priv(PADAPTER padapter); -+void rtl8723bs_free_xmit_priv(PADAPTER padapter); -+s32 rtl8723bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8723bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter); -+thread_return rtl8723bs_xmit_thread(thread_context context); -+#define hal_xmit_handler rtl8723bs_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8723bu_xmit_buf_handler(PADAPTER padapter); -+#define hal_xmit_handler rtl8723bu_xmit_buf_handler -+ -+ -+s32 rtl8723bu_init_xmit_priv(PADAPTER padapter); -+void rtl8723bu_free_xmit_priv(PADAPTER padapter); -+s32 rtl8723bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8723bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8723bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); -+void rtl8723bu_xmit_tasklet(void *priv); -+s32 rtl8723bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8723be_init_xmit_priv(PADAPTER padapter); -+void rtl8723be_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8723be_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8723be_xmitframe_resume(_adapter *padapter); -+s32 rtl8723be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8723be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8723be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8723be_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_XMIT_H__ ++#define __RTL8723B_XMIT_H__ ++ ++ ++#define MAX_TID (15) ++ ++ ++#ifndef __INC_HAL8723BDESC_H ++#define __INC_HAL8723BDESC_H ++ ++#define RX_STATUS_DESC_SIZE_8723B 24 ++#define RX_DRV_INFO_SIZE_UNIT_8723B 8 ++ ++ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++#endif ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++//DWORD 6 ++#define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) ++#define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) ++#define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) ++#define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++#define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) ++ ++ ++// Dword 0 ++#define GET_TX_DESC_OWN_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++#define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++ ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) ++#define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif ++ ++// Dword 8 ++#define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++ ++// Dword 10 ++#define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) ++ ++// Dword 11 ++#define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++#endif ++//----------------------------------------------------------- ++// ++// Rate ++// ++//----------------------------------------------------------- ++// CCK Rates, TxHT = 0 ++#define DESC8723B_RATE1M 0x00 ++#define DESC8723B_RATE2M 0x01 ++#define DESC8723B_RATE5_5M 0x02 ++#define DESC8723B_RATE11M 0x03 ++ ++// OFDM Rates, TxHT = 0 ++#define DESC8723B_RATE6M 0x04 ++#define DESC8723B_RATE9M 0x05 ++#define DESC8723B_RATE12M 0x06 ++#define DESC8723B_RATE18M 0x07 ++#define DESC8723B_RATE24M 0x08 ++#define DESC8723B_RATE36M 0x09 ++#define DESC8723B_RATE48M 0x0a ++#define DESC8723B_RATE54M 0x0b ++ ++// MCS Rates, TxHT = 1 ++#define DESC8723B_RATEMCS0 0x0c ++#define DESC8723B_RATEMCS1 0x0d ++#define DESC8723B_RATEMCS2 0x0e ++#define DESC8723B_RATEMCS3 0x0f ++#define DESC8723B_RATEMCS4 0x10 ++#define DESC8723B_RATEMCS5 0x11 ++#define DESC8723B_RATEMCS6 0x12 ++#define DESC8723B_RATEMCS7 0x13 ++#define DESC8723B_RATEMCS8 0x14 ++#define DESC8723B_RATEMCS9 0x15 ++#define DESC8723B_RATEMCS10 0x16 ++#define DESC8723B_RATEMCS11 0x17 ++#define DESC8723B_RATEMCS12 0x18 ++#define DESC8723B_RATEMCS13 0x19 ++#define DESC8723B_RATEMCS14 0x1a ++#define DESC8723B_RATEMCS15 0x1b ++#define DESC8723B_RATEVHTSS1MCS0 0x2c ++#define DESC8723B_RATEVHTSS1MCS1 0x2d ++#define DESC8723B_RATEVHTSS1MCS2 0x2e ++#define DESC8723B_RATEVHTSS1MCS3 0x2f ++#define DESC8723B_RATEVHTSS1MCS4 0x30 ++#define DESC8723B_RATEVHTSS1MCS5 0x31 ++#define DESC8723B_RATEVHTSS1MCS6 0x32 ++#define DESC8723B_RATEVHTSS1MCS7 0x33 ++#define DESC8723B_RATEVHTSS1MCS8 0x34 ++#define DESC8723B_RATEVHTSS1MCS9 0x35 ++#define DESC8723B_RATEVHTSS2MCS0 0x36 ++#define DESC8723B_RATEVHTSS2MCS1 0x37 ++#define DESC8723B_RATEVHTSS2MCS2 0x38 ++#define DESC8723B_RATEVHTSS2MCS3 0x39 ++#define DESC8723B_RATEVHTSS2MCS4 0x3a ++#define DESC8723B_RATEVHTSS2MCS5 0x3b ++#define DESC8723B_RATEVHTSS2MCS6 0x3c ++#define DESC8723B_RATEVHTSS2MCS7 0x3d ++#define DESC8723B_RATEVHTSS2MCS8 0x3e ++#define DESC8723B_RATEVHTSS2MCS9 0x3f ++ ++ ++#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ ++ (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M) ++ ++ ++void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); ++void rtl8723b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8723bs_init_xmit_priv(PADAPTER padapter); ++void rtl8723bs_free_xmit_priv(PADAPTER padapter); ++s32 rtl8723bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter); ++thread_return rtl8723bs_xmit_thread(thread_context context); ++#define hal_xmit_handler rtl8723bs_xmit_buf_handler ++#endif ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8723bu_xmit_buf_handler(PADAPTER padapter); ++#define hal_xmit_handler rtl8723bu_xmit_buf_handler ++ ++ ++s32 rtl8723bu_init_xmit_priv(PADAPTER padapter); ++void rtl8723bu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8723bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8723bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); ++void rtl8723bu_xmit_tasklet(void *priv); ++s32 rtl8723bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8723be_init_xmit_priv(PADAPTER padapter); ++void rtl8723be_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8723be_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8723be_xmitframe_resume(_adapter *padapter); ++s32 rtl8723be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8723be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8723be_xmit_tasklet(void *priv); ++#endif ++ ++u8 BWMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_cmd.h new file mode 100644 -index 000000000..e34683b1d +index 0000000..e34683b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_cmd.h @@ -0,0 +1,177 @@ @@ -294504,7 +335936,7 @@ index 000000000..e34683b1d + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_dm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_dm.h new file mode 100644 -index 000000000..3196973d8 +index 0000000..3196973 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_dm.h @@ -0,0 +1,37 @@ @@ -294547,601 +335979,601 @@ index 000000000..3196973d8 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_hal.h new file mode 100644 -index 000000000..7a8875507 +index 0000000..8260256 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_hal.h @@ -0,0 +1,373 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8812A_HAL_H__ -+#define __RTL8812A_HAL_H__ -+ -+//#include "hal_com.h" -+#include "hal_data.h" -+ -+//include HAL Related header after HAL Related compiling flags -+#include "rtl8812a_spec.h" -+#include "rtl8812a_rf.h" -+#include "rtl8812a_dm.h" -+#include "rtl8812a_recv.h" -+#include "rtl8812a_xmit.h" -+#include "rtl8812a_cmd.h" -+#include "rtl8812a_led.h" -+#include "Hal8812PwrSeq.h" -+#include "Hal8821APwrSeq.h" //for 8821A/8811A -+#include "Hal8812PhyReg.h" -+#include "Hal8812PhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8812a_sreset.h" -+#endif -+ -+ -+//--------------------------------------------------------------------- -+// RTL8812AU From header -+//--------------------------------------------------------------------- -+ #define RTL8812_FW_IMG "rtl8812a/FW_NIC.bin" -+ #define RTL8812_FW_WW_IMG "rtl8812a/FW_WoWLAN.bin" -+ #define RTL8812_PHY_REG "rtl8812a/PHY_REG.txt" -+ #define RTL8812_PHY_RADIO_A "rtl8812a/RadioA.txt" -+ #define RTL8812_PHY_RADIO_B "rtl8812a/RadioB.txt" -+ #define RTL8812_TXPWR_TRACK "rtl8812a/TxPowerTrack.txt" -+ #define RTL8812_AGC_TAB "rtl8812a/AGC_TAB.txt" -+ #define RTL8812_PHY_MACREG "rtl8812a/MAC_REG.txt" -+ #define RTL8812_PHY_REG_PG "rtl8812a/PHY_REG_PG.txt" -+ #define RTL8812_PHY_REG_MP "rtl8812a/PHY_REG_MP.txt" -+ #define RTL8812_TXPWR_LMT "rtl8812a/TXPWR_LMT.txt" -+ #define RTL8812_WIFI_ANT_ISOLATION "rtl8812a/wifi_ant_isolation.txt" -+ -+//--------------------------------------------------------------------- -+// RTL8821U From file -+//--------------------------------------------------------------------- -+ #define RTL8821_FW_IMG "rtl8821a/FW_NIC.bin" -+ #define RTL8821_FW_WW_IMG "rtl8821a/FW_WoWLAN.bin" -+ #define RTL8821_PHY_REG "rtl8821a/PHY_REG.txt" -+ #define RTL8821_PHY_RADIO_A "rtl8821a/RadioA.txt" -+ #define RTL8821_PHY_RADIO_B "rtl8821a/RadioB.txt" -+ #define RTL8821_TXPWR_TRACK "rtl8821a/TxPowerTrack.txt" -+ #define RTL8821_AGC_TAB "rtl8821a/AGC_TAB.txt" -+ #define RTL8821_PHY_MACREG "rtl8821a/MAC_REG.txt" -+ #define RTL8821_PHY_REG_PG "rtl8821a/PHY_REG_PG.txt" -+ #define RTL8821_PHY_REG_MP "rtl8821a/PHY_REG_MP.txt" -+ #define RTL8821_TXPWR_LMT "rtl8821a/TXPWR_LMT.txt" -+ -+//--------------------------------------------------------------------- -+// RTL8812 Power Configuration CMDs for PCIe interface -+//--------------------------------------------------------------------- -+#define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow -+#define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow -+#define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow -+#define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow -+#define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow -+#define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow -+#define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow -+#define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow -+#define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow -+ -+//--------------------------------------------------------------------- -+// RTL8821 Power Configuration CMDs for PCIe interface -+//--------------------------------------------------------------------- -+#define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow -+#define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow -+#define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow -+#define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow -+#define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow -+#define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow -+#define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow -+#define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow -+#define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow -+ -+ -+#if 1 // download firmware related data structure -+#define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k -+#define FW_START_ADDRESS 0x1000 -+#define FW_END_ADDRESS 0x5FFF -+ -+ -+ -+typedef struct _RT_FIRMWARE_8812 { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8* szFwBuffer; -+#else -+ u8 szFwBuffer[FW_SIZE_8812]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8812, *PRT_FIRMWARE_8812; -+ -+// -+// This structure must be cared byte-ordering -+// -+// Added by tynli. 2009.12.04. -+#define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500) -+ -+#define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100) -+//===================================================== -+// Firmware Header(8-byte alinment required) -+//===================================================== -+//--- LONG WORD 0 ---- -+#define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut -+#define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI -+#define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions -+#define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version -+#define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 -+#define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) -+ -+//--- LONG WORD 1 ---- -+#define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field -+#define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field -+#define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field -+#define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field -+#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code -+#define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) -+ -+//--- LONG WORD 2 ---- -+#define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index -+#define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) -+ -+//--- LONG WORD 3 ---- -+#define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) -+#define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) -+ -+#endif // download firmware related data structure -+ -+ -+#define DRIVER_EARLY_INT_TIME_8812 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8812 0x02 -+ -+//for 8812 -+// TX 128K, RX 16K, Page size 512B for TX, 128B for RX -+#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 /* RX 16K */ -+ -+#ifdef CONFIG_WOWLAN -+#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ -+#else -+#define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+#define RX_DMA_RESERVED_SIZE_8812 0x100 // 256B, reserved for c2h debug message -+#else -+#define RX_DMA_RESERVED_SIZE_8812 0x0 // 0B -+#endif -+#define RX_DMA_BOUNDARY_8812 (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1) -+ -+#define BCNQ_PAGE_NUM_8812 0x07 -+ -+//For WoWLan , more reserved page -+//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 -+#ifdef CONFIG_WOWLAN -+#define WOWLAN_PAGE_NUM_8812 0x05 -+#else -+#define WOWLAN_PAGE_NUM_8812 0x00 -+#endif -+ -+ -+#ifdef CONFIG_BEAMFORMER_FW_NDPA -+#define FW_NDPA_PAGE_NUM 0x02 -+#else -+#define FW_NDPA_PAGE_NUM 0x00 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812-FW_NDPA_PAGE_NUM) -+#define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1) -+ -+#define TX_PAGE_BOUNDARY_WOWLAN_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_TOTAL_PAGE_NUMBER_8812 -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1) -+ -+// For Normal Chip Setting -+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812 -+#define NORMAL_PAGE_NUM_LPQ_8812 0x10 -+#define NORMAL_PAGE_NUM_HPQ_8812 0x10 -+#define NORMAL_PAGE_NUM_NPQ_8812 0x00 -+ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20 -+ -+ -+// for 8821A -+// TX 64K, RX 16K, Page size 256B for TX, 128B for RX -+#define PAGE_SIZE_TX_8821A 256 -+#define PAGE_SIZE_RX_8821A 128 -+ -+#define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 /* RX 16K */ -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+#define RX_DMA_RESERVED_SIZE_8821 0x100 // 256B, reserved for c2h debug message -+#else -+#define RX_DMA_RESERVED_SIZE_8821 0x0 // 0B -+#endif -+#define RX_DMA_BOUNDARY_8821 (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1) -+ -+#define BCNQ_PAGE_NUM_8821 0x08 -+#ifdef CONFIG_CONCURRENT_MODE -+#define BCNQ1_PAGE_NUM_8821 0x04 -+#else -+#define BCNQ1_PAGE_NUM_8821 0x00 -+#endif -+ -+//For WoWLan , more reserved page -+//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 -+#ifdef CONFIG_WOWLAN -+#define WOWLAN_PAGE_NUM_8821 0x06 -+#else -+#define WOWLAN_PAGE_NUM_8821 0x00 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) -+#define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) -+//#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821 -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1) -+ -+ -+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER -+#define NORMAL_PAGE_NUM_LPQ_8821 0x08//0x10 -+#define NORMAL_PAGE_NUM_HPQ_8821 0x08//0x10 -+#define NORMAL_PAGE_NUM_NPQ_8821 0x00 -+ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20 -+ -+ -+#define EFUSE_HIDDEN_812AU 0 -+#define EFUSE_HIDDEN_812AU_VS 1 -+#define EFUSE_HIDDEN_812AU_VL 2 -+#define EFUSE_HIDDEN_812AU_VN 3 -+ -+#if 0 -+#define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024 -+#define HWSET_MAX_SIZE_JAGUAR 1024 -+#else -+#define EFUSE_REAL_CONTENT_LEN_JAGUAR 512 -+#define HWSET_MAX_SIZE_JAGUAR 512 -+#endif -+ -+#define EFUSE_MAX_BANK_8812A 2 -+#define EFUSE_MAP_LEN_JAGUAR 512 -+#define EFUSE_MAX_SECTION_JAGUAR 64 -+#define EFUSE_MAX_WORD_UNIT_JAGUAR 4 -+#define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. -+#define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) -+// To prevent out of boundary programming case, leave 1byte and program full section -+// 9bytes + 1byt + 5bytes and pre 1byte. -+// For worst case: -+// | 2byte|----8bytes----|1byte|--7bytes--| //92D -+#define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. -+#define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16 -+// Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09. -+typedef enum _TX_PWR_PERCENTAGE{ -+ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% -+ TX_PWR_PERCENTAGE_1 = 0x02, // 25% -+ TX_PWR_PERCENTAGE_2 = 0x04, // 50% -+ TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. -+} TX_PWR_PERCENTAGE; -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) -+ -+//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) -+ -+// rtl8812_hal_init.c -+void _8051Reset8812(PADAPTER padapter); -+s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); -+void InitializeFirmwareVars8812(PADAPTER padapter); -+ -+s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data); -+s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy); -+void InitRDGSetting8812A(PADAPTER padapter); -+ -+void CheckAutoloadState8812A(PADAPTER padapter); -+ -+// EFuse -+u8 GetEEPROMSize8812A(PADAPTER padapter); -+void InitPGData8812A(PADAPTER padapter); -+void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo); -+void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); -+void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); -+void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); -+void Hal_ReadAntennaDiversity8821A(PADAPTER pAdapter, u8* PROMContent, BOOLEAN AutoLoadFail); -+void Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); -+void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); -+void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); -+ -+BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); -+void Hal_EfuseParseKFreeData_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+ -+#ifdef CONFIG_WOWLAN -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif //CONFIG_WOWLAN -+ -+void _InitBeaconParameters_8812A(PADAPTER padapter); -+void SetBeaconRelatedRegisters8812A(PADAPTER padapter); -+ -+void ReadRFType8812A(PADAPTER padapter); -+void InitDefaultValue8821A(PADAPTER padapter); -+ -+void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); -+void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); -+u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+s32 c2h_id_filter_ccx_8812a(u8 *buf); -+void rtl8812_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8812a(_adapter *adapter); -+void init_hal_spec_8821a(_adapter *adapter); -+ -+// register -+void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); -+ -+void rtl8812_start_thread(PADAPTER padapter); -+void rtl8812_stop_thread(PADAPTER padapter); -+ -+#ifdef CONFIG_PCI_HCI -+BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); -+VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); -+#endif -+ -+VOID -+Hal_PatchwithJaguar_8812( -+ IN PADAPTER Adapter, -+ IN RT_MEDIA_STATUS MediaStatus -+ ); -+ -+#endif //__RTL8188E_HAL_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_HAL_H__ ++#define __RTL8812A_HAL_H__ ++ ++//#include "hal_com.h" ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8812a_spec.h" ++#include "rtl8812a_rf.h" ++#include "rtl8812a_dm.h" ++#include "rtl8812a_recv.h" ++#include "rtl8812a_xmit.h" ++#include "rtl8812a_cmd.h" ++#include "rtl8812a_led.h" ++#include "Hal8812PwrSeq.h" ++#include "Hal8821APwrSeq.h" //for 8821A/8811A ++#include "Hal8812PhyReg.h" ++#include "Hal8812PhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8812a_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8812AU From header ++//--------------------------------------------------------------------- ++ #define RTL8812_FW_IMG "rtl8812a/FW_NIC.bin" ++ #define RTL8812_FW_WW_IMG "rtl8812a/FW_WoWLAN.bin" ++ #define RTL8812_PHY_REG "rtl8812a/PHY_REG.txt" ++ #define RTL8812_PHY_RADIO_A "rtl8812a/RadioA.txt" ++ #define RTL8812_PHY_RADIO_B "rtl8812a/RadioB.txt" ++ #define RTL8812_TXPWR_TRACK "rtl8812a/TxPowerTrack.txt" ++ #define RTL8812_AGC_TAB "rtl8812a/AGC_TAB.txt" ++ #define RTL8812_PHY_MACREG "rtl8812a/MAC_REG.txt" ++ #define RTL8812_PHY_REG_PG "rtl8812a/PHY_REG_PG.txt" ++ #define RTL8812_PHY_REG_MP "rtl8812a/PHY_REG_MP.txt" ++ #define RTL8812_TXPWR_LMT "rtl8812a/TXPWR_LMT.txt" ++ #define RTL8812_WIFI_ANT_ISOLATION "rtl8812a/wifi_ant_isolation.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8821U From file ++//--------------------------------------------------------------------- ++ #define RTL8821_FW_IMG "rtl8821a/FW_NIC.bin" ++ #define RTL8821_FW_WW_IMG "rtl8821a/FW_WoWLAN.bin" ++ #define RTL8821_PHY_REG "rtl8821a/PHY_REG.txt" ++ #define RTL8821_PHY_RADIO_A "rtl8821a/RadioA.txt" ++ #define RTL8821_PHY_RADIO_B "rtl8821a/RadioB.txt" ++ #define RTL8821_TXPWR_TRACK "rtl8821a/TxPowerTrack.txt" ++ #define RTL8821_AGC_TAB "rtl8821a/AGC_TAB.txt" ++ #define RTL8821_PHY_MACREG "rtl8821a/MAC_REG.txt" ++ #define RTL8821_PHY_REG_PG "rtl8821a/PHY_REG_PG.txt" ++ #define RTL8821_PHY_REG_MP "rtl8821a/PHY_REG_MP.txt" ++ #define RTL8821_TXPWR_LMT "rtl8821a/TXPWR_LMT.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8812 Power Configuration CMDs for PCIe interface ++//--------------------------------------------------------------------- ++#define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow ++#define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow ++#define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow ++#define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow ++#define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow ++#define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow ++#define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow ++#define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow ++#define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow ++ ++//--------------------------------------------------------------------- ++// RTL8821 Power Configuration CMDs for PCIe interface ++//--------------------------------------------------------------------- ++#define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow ++#define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow ++#define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow ++#define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow ++#define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow ++#define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow ++#define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow ++#define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow ++#define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow ++ ++ ++#if 1 // download firmware related data structure ++#define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k ++#define FW_START_ADDRESS 0x1000 ++#define FW_END_ADDRESS 0x5FFF ++ ++ ++ ++typedef struct _RT_FIRMWARE_8812 { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_SIZE_8812]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8812, *PRT_FIRMWARE_8812; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++#define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500) ++ ++#define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100) ++//===================================================== ++// Firmware Header(8-byte alinment required) ++//===================================================== ++//--- LONG WORD 0 ---- ++#define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++#define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI ++#define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++#define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version ++#define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 ++#define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) ++ ++//--- LONG WORD 1 ---- ++#define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field ++#define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field ++#define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field ++#define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field ++#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code ++#define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) ++ ++//--- LONG WORD 2 ---- ++#define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index ++#define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) ++ ++//--- LONG WORD 3 ---- ++#define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) ++#define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) ++ ++#endif // download firmware related data structure ++ ++ ++#define DRIVER_EARLY_INT_TIME_8812 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8812 0x02 ++ ++//for 8812 ++// TX 128K, RX 16K, Page size 512B for TX, 128B for RX ++#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 /* RX 16K */ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8812 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8812 0x0 // 0B ++#endif ++#define RX_DMA_BOUNDARY_8812 (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1) ++ ++#define BCNQ_PAGE_NUM_8812 0x07 ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8812 0x05 ++#else ++#define WOWLAN_PAGE_NUM_8812 0x00 ++#endif ++ ++ ++#ifdef CONFIG_BEAMFORMER_FW_NDPA ++#define FW_NDPA_PAGE_NUM 0x02 ++#else ++#define FW_NDPA_PAGE_NUM 0x00 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812-FW_NDPA_PAGE_NUM) ++#define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1) ++ ++#define TX_PAGE_BOUNDARY_WOWLAN_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1) ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_TOTAL_PAGE_NUMBER_8812 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812 ++#define NORMAL_PAGE_NUM_LPQ_8812 0x10 ++#define NORMAL_PAGE_NUM_HPQ_8812 0x10 ++#define NORMAL_PAGE_NUM_NPQ_8812 0x00 ++ ++#define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20 ++ ++ ++// for 8821A ++// TX 64K, RX 16K, Page size 256B for TX, 128B for RX ++#define PAGE_SIZE_TX_8821A 256 ++#define PAGE_SIZE_RX_8821A 128 ++ ++#define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 /* RX 16K */ ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8821 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8821 0x0 // 0B ++#endif ++#define RX_DMA_BOUNDARY_8821 (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1) ++ ++#define BCNQ_PAGE_NUM_8821 0x08 ++#ifdef CONFIG_CONCURRENT_MODE ++#define BCNQ1_PAGE_NUM_8821 0x04 ++#else ++#define BCNQ1_PAGE_NUM_8821 0x00 ++#endif ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8821 0x06 ++#else ++#define WOWLAN_PAGE_NUM_8821 0x00 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) ++#define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) ++//#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1) ++ ++ ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define NORMAL_PAGE_NUM_LPQ_8821 0x08//0x10 ++#define NORMAL_PAGE_NUM_HPQ_8821 0x08//0x10 ++#define NORMAL_PAGE_NUM_NPQ_8821 0x00 ++ ++#define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20 ++ ++ ++#define EFUSE_HIDDEN_812AU 0 ++#define EFUSE_HIDDEN_812AU_VS 1 ++#define EFUSE_HIDDEN_812AU_VL 2 ++#define EFUSE_HIDDEN_812AU_VN 3 ++ ++#if 0 ++#define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024 ++#define HWSET_MAX_SIZE_JAGUAR 1024 ++#else ++#define EFUSE_REAL_CONTENT_LEN_JAGUAR 512 ++#define HWSET_MAX_SIZE_JAGUAR 512 ++#endif ++ ++#define EFUSE_MAX_BANK_8812A 2 ++#define EFUSE_MAP_LEN_JAGUAR 512 ++#define EFUSE_MAX_SECTION_JAGUAR 64 ++#define EFUSE_MAX_WORD_UNIT_JAGUAR 4 ++#define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 2byte|----8bytes----|1byte|--7bytes--| //92D ++#define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. ++#define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16 ++// Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09. ++typedef enum _TX_PWR_PERCENTAGE{ ++ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% ++ TX_PWR_PERCENTAGE_1 = 0x02, // 25% ++ TX_PWR_PERCENTAGE_2 = 0x04, // 50% ++ TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. ++} TX_PWR_PERCENTAGE; ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++// rtl8812_hal_init.c ++void _8051Reset8812(PADAPTER padapter); ++s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); ++void InitializeFirmwareVars8812(PADAPTER padapter); ++ ++s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data); ++s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy); ++void InitRDGSetting8812A(PADAPTER padapter); ++ ++void CheckAutoloadState8812A(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8812A(PADAPTER padapter); ++void InitPGData8812A(PADAPTER padapter); ++void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo); ++void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); ++void Hal_ReadAntennaDiversity8821A(PADAPTER pAdapter, u8* PROMContent, BOOLEAN AutoLoadFail); ++void Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++ ++BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); ++void Hal_EfuseParseKFreeData_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++ ++#ifdef CONFIG_WOWLAN ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void _InitBeaconParameters_8812A(PADAPTER padapter); ++void SetBeaconRelatedRegisters8812A(PADAPTER padapter); ++ ++void ReadRFType8812A(PADAPTER padapter); ++void InitDefaultValue8821A(PADAPTER padapter); ++ ++void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); ++void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); ++u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++s32 c2h_id_filter_ccx_8812a(u8 *buf); ++void rtl8812_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8812a(_adapter *adapter); ++void init_hal_spec_8821a(_adapter *adapter); ++ ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++ ++void rtl8812_start_thread(PADAPTER padapter); ++void rtl8812_stop_thread(PADAPTER padapter); ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); ++VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); ++#endif ++ ++VOID ++Hal_PatchwithJaguar_8812( ++ IN PADAPTER Adapter, ++ IN RT_MEDIA_STATUS MediaStatus ++ ); ++ ++#endif //__RTL8188E_HAL_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_led.h new file mode 100644 -index 000000000..eb90dbb2a +index 0000000..52eb6e0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_led.h @@ -0,0 +1,41 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8812A_LED_H__ -+#define __RTL8812A_LED_H__ -+ -+ -+//================================================================================ -+// Interface to manipulate LED objects. -+//================================================================================ -+#ifdef CONFIG_USB_HCI -+void rtl8812au_InitSwLeds(PADAPTER padapter); -+void rtl8812au_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+void rtl8812ae_InitSwLeds(PADAPTER padapter); -+void rtl8812ae_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+void rtl8821as_InitSwLeds(PADAPTER padapter); -+void rtl8821as_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_LED_H__ ++#define __RTL8812A_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8812au_InitSwLeds(PADAPTER padapter); ++void rtl8812au_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8812ae_InitSwLeds(PADAPTER padapter); ++void rtl8812ae_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8821as_InitSwLeds(PADAPTER padapter); ++void rtl8821as_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_recv.h new file mode 100644 -index 000000000..7729d4267 +index 0000000..ff5fa76 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_recv.h @@ -0,0 +1,162 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8812A_RECV_H__ -+#define __RTL8812A_RECV_H__ -+ -+#if defined(CONFIG_USB_HCI) -+ -+#ifndef MAX_RECVBUF_SZ -+#ifdef PLATFORM_OS_CE -+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+#else -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ -+ #else -+ #define MAX_RECVBUF_SZ (32768) /*32k*/ -+ #endif -+ //#define MAX_RECVBUF_SZ (24576) // 24k -+ //#define MAX_RECVBUF_SZ (20480) //20K -+ //#define MAX_RECVBUF_SZ (10240) //10K -+ //#define MAX_RECVBUF_SZ (15360) // 15k < 16k -+ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ #undef MAX_RECVBUF_SZ -+ #define MAX_RECVBUF_SZ (15360) // 15k < 16k -+ #endif //CONFIG_PLATFORM_NOVATEK_NT72668 -+ #else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+ #endif -+#endif -+#endif //!MAX_RECVBUF_SZ -+ -+#elif defined(CONFIG_PCI_HCI) -+//#ifndef CONFIG_MINIMAL_MEMORY_USAGE -+// #define MAX_RECVBUF_SZ (9100) -+//#else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+//#endif -+ -+ -+#elif defined(CONFIG_SDIO_HCI) -+ -+#define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8821 + 1) -+ -+#endif -+ -+ -+// Rx smooth factor -+#define Rx_Smooth_Factor (20) -+ -+//DWORD 0 -+#define SET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_LAST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) -+#define GET_RX_STATUS_DESC_FIRST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) -+#define GET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) -+ -+//DWORD 1 -+#define GET_RX_STATUS_DESC_MACID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) -+ -+//DWORD 2 -+#define GET_RX_STATUS_DESC_SEQ_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) -+ -+//DWORD 3 -+#define GET_RX_STATUS_DESC_RX_RATE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) -+ -+//DWORD 6 -+#define GET_RX_STATUS_DESC_SPLCP_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) -+#define GET_RX_STATUS_DESC_LDPC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) -+#define GET_RX_STATUS_DESC_STBC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) -+#define GET_RX_STATUS_DESC_BW_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) -+ -+//DWORD 5 -+#define GET_RX_STATUS_DESC_TSFL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+#define SET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+#ifdef CONFIG_SDIO_HCI -+s32 InitRecvPriv8821AS(PADAPTER padapter); -+void FreeRecvPriv8821AS(PADAPTER padapter); -+#endif // CONFIG_SDIO_HCI -+ -+#ifdef CONFIG_USB_HCI -+void rtl8812au_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+s32 rtl8812au_init_recv_priv(PADAPTER padapter); -+void rtl8812au_free_recv_priv(PADAPTER padapter); -+void rtl8812au_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); -+void rtl8812au_recv_tasklet(void *priv); -+ -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8812ae_init_recv_priv(PADAPTER padapter); -+void rtl8812ae_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8812A_RECV_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_RECV_H__ ++#define __RTL8812A_RECV_H__ ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ ++ #else ++ #define MAX_RECVBUF_SZ (32768) /*32k*/ ++ #endif ++ //#define MAX_RECVBUF_SZ (24576) // 24k ++ //#define MAX_RECVBUF_SZ (20480) //20K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ //#define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 ++ #undef MAX_RECVBUF_SZ ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif //CONFIG_PLATFORM_NOVATEK_NT72668 ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) ++ ++#define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8821 + 1) ++ ++#endif ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_AMSDU_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_CHKERR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_IPVER_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_IS_TCPUDP__8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_CHK_VLD_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_RPT_SEL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++#endif ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++//DWORD 6 ++#define GET_RX_STATUS_DESC_SPLCP_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) ++#define GET_RX_STATUS_DESC_LDPC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) ++#define GET_RX_STATUS_DESC_STBC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) ++#define GET_RX_STATUS_DESC_BW_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++#define SET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) ++ ++ ++#ifdef CONFIG_SDIO_HCI ++s32 InitRecvPriv8821AS(PADAPTER padapter); ++void FreeRecvPriv8821AS(PADAPTER padapter); ++#endif // CONFIG_SDIO_HCI ++ ++#ifdef CONFIG_USB_HCI ++void rtl8812au_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++s32 rtl8812au_init_recv_priv(PADAPTER padapter); ++void rtl8812au_free_recv_priv(PADAPTER padapter); ++void rtl8812au_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++void rtl8812au_recv_tasklet(void *priv); ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8812ae_init_recv_priv(PADAPTER padapter); ++void rtl8812ae_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8812A_RECV_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_rf.h new file mode 100644 -index 000000000..e87b88534 +index 0000000..e87b885 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_rf.h @@ -0,0 +1,34 @@ @@ -295181,288 +336613,288 @@ index 000000000..e87b88534 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_spec.h new file mode 100644 -index 000000000..4dd936148 +index 0000000..eab6d1c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_spec.h @@ -0,0 +1,275 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ *******************************************************************************/ -+#ifndef __RTL8812A_SPEC_H__ -+#define __RTL8812A_SPEC_H__ -+ -+#include -+ -+ -+//============================================================ -+// 8812 Regsiter offset definition -+//============================================================ -+ -+//============================================================ -+// -+//============================================================ -+ -+//----------------------------------------------------- -+// -+// 0x0000h ~ 0x00FFh System Configuration -+// -+//----------------------------------------------------- -+#define REG_SYS_CLKR_8812A 0x0008 -+#define REG_AFE_PLL_CTRL_8812A 0x0028 -+#define REG_HSIMR_8812 0x0058 -+#define REG_HSISR_8812 0x005c -+#define REG_GPIO_EXT_CTRL 0x0060 -+#define REG_GPIO_STATUS_8812 0x006C -+#define REG_SDIO_CTRL_8812 0x0070 -+#define REG_OPT_CTRL_8812 0x0074 -+#define REG_RF_B_CTRL_8812 0x0076 -+#define REG_FW_DRV_MSG_8812 0x0088 -+#define REG_HMEBOX_E2_E3_8812 0x008C -+#define REG_HIMR0_8812 0x00B0 -+#define REG_HISR0_8812 0x00B4 -+#define REG_HIMR1_8812 0x00B8 -+#define REG_HISR1_8812 0x00BC -+#define REG_EFUSE_BURN_GNT_8812 0x00CF -+#define REG_SYS_CFG1_8812 0x00FC -+ -+//----------------------------------------------------- -+// -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+// -+//----------------------------------------------------- -+#define REG_CR_8812A 0x100 -+#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -+#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -+#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+#define REG_RSVD3_8812 0x0168 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_88XX 0x01AE -+ -+#define REG_HMEBOX_EXT0_8812 0x01F0 -+#define REG_HMEBOX_EXT1_8812 0x01F4 -+#define REG_HMEBOX_EXT2_8812 0x01F8 -+#define REG_HMEBOX_EXT3_8812 0x01FC -+ -+//----------------------------------------------------- -+// -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_DWBCN0_CTRL_8812 REG_TDECTRL -+#define REG_DWBCN1_CTRL_8812 0x0228 -+ -+//----------------------------------------------------- -+// -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_TDECTRL_8812A 0x0208 -+#define REG_RXDMA_CONTROL_8812A 0x0286 /*Control the RX DMA.*/ -+#define REG_RXDMA_PRO_8812 0x0290 -+#define REG_EARLY_MODE_CONTROL_8812 0x02BC -+#define REG_RSVD5_8812 0x02F0 -+#define REG_RSVD6_8812 0x02F4 -+#define REG_RSVD7_8812 0x02F8 -+#define REG_RSVD8_8812 0x02FC -+ -+ -+//----------------------------------------------------- -+// -+// 0x0300h ~ 0x03FFh PCIe -+// -+//----------------------------------------------------- -+#define REG_PCIE_CTRL_REG_8812A 0x0300 -+#define REG_DBI_WDATA_8812 0x0348 // DBI Write Data -+#define REG_DBI_RDATA_8812 0x034C // DBI Read Data -+#define REG_DBI_ADDR_8812 0x0350 // DBI Address -+#define REG_DBI_FLAG_8812 0x0352 // DBI Read/Write Flag -+#define REG_MDIO_WDATA_8812 0x0354 // MDIO for Write PCIE PHY -+#define REG_MDIO_RDATA_8812 0x0356 // MDIO for Reads PCIE PHY -+#define REG_MDIO_CTL_8812 0x0358 // MDIO for Control -+#define REG_PCIE_MULTIFET_CTRL_8812 0x036A //PCIE Multi-Fethc Control -+ -+//----------------------------------------------------- -+// -+// 0x0400h ~ 0x047Fh Protocol Configuration -+// -+//----------------------------------------------------- -+#define REG_TXPKT_EMPTY_8812A 0x041A -+#define REG_FWHW_TXQ_CTRL_8812A 0x0420 -+#define REG_TXBF_CTRL_8812A 0x042C -+#define REG_ARFR0_8812 0x0444 -+#define REG_ARFR1_8812 0x044C -+#define REG_CCK_CHECK_8812 0x0454 -+#define REG_AMPDU_MAX_TIME_8812 0x0456 -+#define REG_TXPKTBUF_BCNQ_BDNY1_8812 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8812 0x0458 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8812 0x045D -+#define REG_NDPA_OPT_CTRL_8812A 0x045F -+#define REG_DATA_SC_8812 0x0483 -+#ifdef CONFIG_WOWLAN -+#define REG_TXPKTBUF_IV_LOW 0x0484 -+#define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_ARFR2_8812 0x048C -+#define REG_ARFR3_8812 0x0494 -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_AMPDU_BURST_MODE_8812 0x04BC -+#define REG_HT_SINGLE_AMPDU_8812 0x04C7 -+#define REG_MACID_PKT_DROP0_8812 0x04D0 -+ -+//----------------------------------------------------- -+// -+// 0x0500h ~ 0x05FFh EDCA Configuration -+// -+//----------------------------------------------------- -+#define REG_TXPAUSE_8812A 0x0522 -+#define REG_CTWND_8812 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8812 0x0577 -+#define REG_SCH_TXCMD_8812A 0x05F8 -+ -+//----------------------------------------------------- -+// -+// 0x0600h ~ 0x07FFh WMAC Configuration -+// -+//----------------------------------------------------- -+#define REG_MAC_CR_8812 0x0600 -+ -+#define REG_MAC_TX_SM_STATE_8812 0x06B4 -+ -+// Power -+#define REG_BFMER0_INFO_8812A 0x06E4 -+#define REG_BFMER1_INFO_8812A 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8812A 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8812A 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8812A 0x06FC -+ -+// Hardware Port 2 -+#define REG_BFMEE_SEL_8812A 0x0714 -+#define REG_SND_PTCL_CTRL_8812A 0x0718 -+ -+ -+//----------------------------------------------------- -+// -+// Redifine register definition for compatibility -+// -+//----------------------------------------------------- -+ -+// TODO: use these definition when using REG_xxx naming rule. -+// NOTE: DO NOT Remove these definition. Use later. -+#define ISR_8812 REG_HISR0_8812 -+ -+//---------------------------------------------------------------------------- -+// 8195 IMR/ISR bits (offset 0xB0, 8bits) -+//---------------------------------------------------------------------------- -+#define IMR_DISABLED_8812 0 -+// IMR DW0(0x00B0-00B3) Bit 0-31 -+#define IMR_TIMER2_8812 BIT31 // Timeout interrupt 2 -+#define IMR_TIMER1_8812 BIT30 // Timeout interrupt 1 -+#define IMR_PSTIMEOUT_8812 BIT29 // Power Save Time Out Interrupt -+#define IMR_GTINT4_8812 BIT28 // When GTIMER4 expires, this bit is set to 1 -+#define IMR_GTINT3_8812 BIT27 // When GTIMER3 expires, this bit is set to 1 -+#define IMR_TXBCN0ERR_8812 BIT26 // Transmit Beacon0 Error -+#define IMR_TXBCN0OK_8812 BIT25 // Transmit Beacon0 OK -+#define IMR_TSF_BIT32_TOGGLE_8812 BIT24 // TSF Timer BIT32 toggle indication interrupt -+#define IMR_BCNDMAINT0_8812 BIT20 // Beacon DMA Interrupt 0 -+#define IMR_BCNDERR0_8812 BIT16 // Beacon Queue DMA OK0 -+#define IMR_HSISR_IND_ON_INT_8812 BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) -+#define IMR_BCNDMAINT_E_8812 BIT14 // Beacon DMA Interrupt Extension for Win7 -+#define IMR_ATIMEND_8812 BIT12 // CTWidnow End or ATIM Window End -+#define IMR_C2HCMD_8812 BIT10 // CPU to Host Command INT Status, Write 1 clear -+#define IMR_CPWM2_8812 BIT9 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_CPWM_8812 BIT8 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_HIGHDOK_8812 BIT7 // High Queue DMA OK -+#define IMR_MGNTDOK_8812 BIT6 // Management Queue DMA OK -+#define IMR_BKDOK_8812 BIT5 // AC_BK DMA OK -+#define IMR_BEDOK_8812 BIT4 // AC_BE DMA OK -+#define IMR_VIDOK_8812 BIT3 // AC_VI DMA OK -+#define IMR_VODOK_8812 BIT2 // AC_VO DMA OK -+#define IMR_RDU_8812 BIT1 // Rx Descriptor Unavailable -+#define IMR_ROK_8812 BIT0 // Receive DMA OK -+ -+// IMR DW1(0x00B4-00B7) Bit 0-31 -+#define IMR_BCNDMAINT7_8812 BIT27 // Beacon DMA Interrupt 7 -+#define IMR_BCNDMAINT6_8812 BIT26 // Beacon DMA Interrupt 6 -+#define IMR_BCNDMAINT5_8812 BIT25 // Beacon DMA Interrupt 5 -+#define IMR_BCNDMAINT4_8812 BIT24 // Beacon DMA Interrupt 4 -+#define IMR_BCNDMAINT3_8812 BIT23 // Beacon DMA Interrupt 3 -+#define IMR_BCNDMAINT2_8812 BIT22 // Beacon DMA Interrupt 2 -+#define IMR_BCNDMAINT1_8812 BIT21 // Beacon DMA Interrupt 1 -+#define IMR_BCNDOK7_8812 BIT20 // Beacon Queue DMA OK Interrup 7 -+#define IMR_BCNDOK6_8812 BIT19 // Beacon Queue DMA OK Interrup 6 -+#define IMR_BCNDOK5_8812 BIT18 // Beacon Queue DMA OK Interrup 5 -+#define IMR_BCNDOK4_8812 BIT17 // Beacon Queue DMA OK Interrup 4 -+#define IMR_BCNDOK3_8812 BIT16 // Beacon Queue DMA OK Interrup 3 -+#define IMR_BCNDOK2_8812 BIT15 // Beacon Queue DMA OK Interrup 2 -+#define IMR_BCNDOK1_8812 BIT14 // Beacon Queue DMA OK Interrup 1 -+#define IMR_ATIMEND_E_8812 BIT13 // ATIM Window End Extension for Win7 -+#define IMR_TXERR_8812 BIT11 // Tx Error Flag Interrupt Status, write 1 clear. -+#define IMR_RXERR_8812 BIT10 // Rx Error Flag INT Status, Write 1 clear -+#define IMR_TXFOVW_8812 BIT9 // Transmit FIFO Overflow -+#define IMR_RXFOVW_8812 BIT8 // Receive FIFO Overflow -+ -+ -+#ifdef CONFIG_PCI_HCI -+//#define IMR_RX_MASK (IMR_ROK_8812|IMR_RDU_8812|IMR_RXFOVW_8812) -+#define IMR_TX_MASK (IMR_VODOK_8812|IMR_VIDOK_8812|IMR_BEDOK_8812|IMR_BKDOK_8812|IMR_MGNTDOK_8812|IMR_HIGHDOK_8812) -+ -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8812 | IMR_TXBCN0OK_8812 | IMR_TXBCN0ERR_8812 | IMR_BCNDERR0_8812) -+ -+#define RT_AC_INT_MASKS (IMR_VIDOK_8812 | IMR_VODOK_8812 | IMR_BEDOK_8812|IMR_BKDOK_8812) -+#endif -+ -+ -+//============================================================================ -+// Regsiter Bit and Content definition -+//============================================================================ -+ -+//2 ACMHWCTRL 0x05C0 -+#define AcmHw_HwEn_8812 BIT(0) -+#define AcmHw_VoqEn_8812 BIT(1) -+#define AcmHw_ViqEn_8812 BIT(2) -+#define AcmHw_BeqEn_8812 BIT(3) -+#define AcmHw_VoqStatus_8812 BIT(5) -+#define AcmHw_ViqStatus_8812 BIT(6) -+#define AcmHw_BeqStatus_8812 BIT(7) -+ -+//======================================================== -+// General definitions -+//======================================================== -+ -+#define MACID_NUM_8812A 128 -+#define SEC_CAM_ENT_NUM_8812A 64 -+#define NSS_NUM_8812A 2 -+#define BAND_CAP_8812A (BAND_CAP_2G | BAND_CAP_5G) -+#define BW_CAP_8812A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) -+ -+#endif /* __RTL8812A_SPEC_H__ */ -+ -+#ifdef CONFIG_RTL8821A -+#include "rtl8821a_spec.h" -+#endif /* CONFIG_RTL8821A */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8812A_SPEC_H__ ++#define __RTL8812A_SPEC_H__ ++ ++#include ++ ++ ++//============================================================ ++// 8812 Regsiter offset definition ++//============================================================ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_CLKR_8812A 0x0008 ++#define REG_AFE_PLL_CTRL_8812A 0x0028 ++#define REG_HSIMR_8812 0x0058 ++#define REG_HSISR_8812 0x005c ++#define REG_GPIO_EXT_CTRL 0x0060 ++#define REG_GPIO_STATUS_8812 0x006C ++#define REG_SDIO_CTRL_8812 0x0070 ++#define REG_OPT_CTRL_8812 0x0074 ++#define REG_RF_B_CTRL_8812 0x0076 ++#define REG_FW_DRV_MSG_8812 0x0088 ++#define REG_HMEBOX_E2_E3_8812 0x008C ++#define REG_HIMR0_8812 0x00B0 ++#define REG_HISR0_8812 0x00B4 ++#define REG_HIMR1_8812 0x00B8 ++#define REG_HISR1_8812 0x00BC ++#define REG_EFUSE_BURN_GNT_8812 0x00CF ++#define REG_SYS_CFG1_8812 0x00FC ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR_8812A 0x100 ++#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) ++#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) ++#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++#define REG_RSVD3_8812 0x0168 ++#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 ++#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 ++#define REG_C2HEVT_CMD_LEN_88XX 0x01AE ++ ++#define REG_HMEBOX_EXT0_8812 0x01F0 ++#define REG_HMEBOX_EXT1_8812 0x01F4 ++#define REG_HMEBOX_EXT2_8812 0x01F8 ++#define REG_HMEBOX_EXT3_8812 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_DWBCN0_CTRL_8812 REG_TDECTRL ++#define REG_DWBCN1_CTRL_8812 0x0228 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_TDECTRL_8812A 0x0208 ++#define REG_RXDMA_CONTROL_8812A 0x0286 /*Control the RX DMA.*/ ++#define REG_RXDMA_PRO_8812 0x0290 ++#define REG_EARLY_MODE_CONTROL_8812 0x02BC ++#define REG_RSVD5_8812 0x02F0 ++#define REG_RSVD6_8812 0x02F4 ++#define REG_RSVD7_8812 0x02F8 ++#define REG_RSVD8_8812 0x02FC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8812A 0x0300 ++#define REG_DBI_WDATA_8812 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8812 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8812 0x0350 // DBI Address ++#define REG_DBI_FLAG_8812 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8812 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8812 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8812 0x0358 // MDIO for Control ++#define REG_PCIE_MULTIFET_CTRL_8812 0x036A //PCIE Multi-Fethc Control ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_TXPKT_EMPTY_8812A 0x041A ++#define REG_FWHW_TXQ_CTRL_8812A 0x0420 ++#define REG_TXBF_CTRL_8812A 0x042C ++#define REG_ARFR0_8812 0x0444 ++#define REG_ARFR1_8812 0x044C ++#define REG_CCK_CHECK_8812 0x0454 ++#define REG_AMPDU_MAX_TIME_8812 0x0456 ++#define REG_TXPKTBUF_BCNQ_BDNY1_8812 0x0457 ++ ++#define REG_AMPDU_MAX_LENGTH_8812 0x0458 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8812 0x045D ++#define REG_NDPA_OPT_CTRL_8812A 0x045F ++#define REG_DATA_SC_8812 0x0483 ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_ARFR2_8812 0x048C ++#define REG_ARFR3_8812 0x0494 ++#define REG_TXRPT_START_OFFSET 0x04AC ++#define REG_AMPDU_BURST_MODE_8812 0x04BC ++#define REG_HT_SINGLE_AMPDU_8812 0x04C7 ++#define REG_MACID_PKT_DROP0_8812 0x04D0 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_TXPAUSE_8812A 0x0522 ++#define REG_CTWND_8812 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8812 0x0577 ++#define REG_SCH_TXCMD_8812A 0x05F8 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8812 0x0600 ++ ++#define REG_MAC_TX_SM_STATE_8812 0x06B4 ++ ++// Power ++#define REG_BFMER0_INFO_8812A 0x06E4 ++#define REG_BFMER1_INFO_8812A 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8812A 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8812A 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8812A 0x06FC ++ ++// Hardware Port 2 ++#define REG_BFMEE_SEL_8812A 0x0714 ++#define REG_SND_PTCL_CTRL_8812A 0x0718 ++ ++ ++//----------------------------------------------------- ++// ++// Redifine register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define ISR_8812 REG_HISR0_8812 ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8812 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8812 BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8812 BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8812 BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8812 BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8812 BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8812 BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8812 BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8812 BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8812 BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8812 BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8812 BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8812 BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8812 BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8812 BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8812 BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8812 BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8812 BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8812 BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8812 BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8812 BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8812 BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8812 BIT2 // AC_VO DMA OK ++#define IMR_RDU_8812 BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8812 BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8812 BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8812 BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8812 BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8812 BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8812 BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8812 BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8812 BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8812 BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8812 BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8812 BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8812 BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8812 BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8812 BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8812 BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8812 BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8812 BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8812 BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8812 BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8812 BIT8 // Receive FIFO Overflow ++ ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_8812|IMR_RDU_8812|IMR_RXFOVW_8812) ++#define IMR_TX_MASK (IMR_VODOK_8812|IMR_VIDOK_8812|IMR_BEDOK_8812|IMR_BKDOK_8812|IMR_MGNTDOK_8812|IMR_HIGHDOK_8812) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8812 | IMR_TXBCN0OK_8812 | IMR_TXBCN0ERR_8812 | IMR_BCNDERR0_8812) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8812 | IMR_VODOK_8812 | IMR_BEDOK_8812|IMR_BKDOK_8812) ++#endif ++ ++ ++//============================================================================ ++// Regsiter Bit and Content definition ++//============================================================================ ++ ++//2 ACMHWCTRL 0x05C0 ++#define AcmHw_HwEn_8812 BIT(0) ++#define AcmHw_VoqEn_8812 BIT(1) ++#define AcmHw_ViqEn_8812 BIT(2) ++#define AcmHw_BeqEn_8812 BIT(3) ++#define AcmHw_VoqStatus_8812 BIT(5) ++#define AcmHw_ViqStatus_8812 BIT(6) ++#define AcmHw_BeqStatus_8812 BIT(7) ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8812A 128 ++#define SEC_CAM_ENT_NUM_8812A 64 ++#define NSS_NUM_8812A 2 ++#define BAND_CAP_8812A (BAND_CAP_2G | BAND_CAP_5G) ++#define BW_CAP_8812A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) ++ ++#endif /* __RTL8812A_SPEC_H__ */ ++ ++#ifdef CONFIG_RTL8821A ++#include "rtl8821a_spec.h" ++#endif /* CONFIG_RTL8821A */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_sreset.h new file mode 100644 -index 000000000..53f39d762 +index 0000000..53f39d7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_sreset.h @@ -0,0 +1,30 @@ @@ -295498,378 +336930,378 @@ index 000000000..53f39d762 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_xmit.h new file mode 100644 -index 000000000..0d25436ee +index 0000000..42e1a88 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8812a_xmit.h @@ -0,0 +1,365 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8812A_XMIT_H__ -+#define __RTL8812A_XMIT_H__ -+ -+ -+//For 88e early mode -+#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -+#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -+#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -+#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -+#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -+#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -+#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) -+ -+// -+//defined for TX DESC Operation -+// -+ -+#define MAX_TID (15) -+ -+//OFFSET 0 -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+#define BMC BIT(24) -+#define LSG BIT(26) -+#define FSG BIT(27) -+#define OWN BIT(31) -+ -+ -+//OFFSET 4 -+#define PKT_OFFSET_SZ 0 -+#define QSEL_SHT 8 -+#define RATE_ID_SHT 16 -+#define NAVUSEHDR BIT(20) -+#define SEC_TYPE_SHT 22 -+#define PKT_OFFSET_SHT 26 -+ -+//OFFSET 8 -+#define AGG_EN BIT(12) -+#define AGG_BK BIT(16) -+#define AMPDU_DENSITY_SHT 20 -+#define ANTSEL_A BIT(24) -+#define ANTSEL_B BIT(25) -+#define TX_ANT_CCK_SHT 26 -+#define TX_ANTL_SHT 28 -+#define TX_ANT_HT_SHT 30 -+ -+//OFFSET 12 -+#define SEQ_SHT 16 -+#define EN_HWSEQ BIT(31) -+ -+//OFFSET 16 -+#define QOS BIT(6) -+#define HW_SSN BIT(7) -+#define USERATE BIT(8) -+#define DISDATAFB BIT(10) -+#define CTS_2_SELF BIT(11) -+#define RTS_EN BIT(12) -+#define HW_RTS_EN BIT(13) -+#define DATA_SHORT BIT(24) -+#define PWR_STATUS_SHT 15 -+#define DATA_SC_SHT 20 -+#define DATA_BW BIT(25) -+ -+//OFFSET 20 -+#define RTY_LMT_EN BIT(17) -+ -+//OFFSET 20 -+#define SGI BIT(6) -+#define USB_TXAGG_NUM_SHT 24 -+ -+typedef struct txdescriptor_8812 -+{ -+ // Offset 0 -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 own:1; -+ -+ // Offset 4 -+ u32 macid:6; -+ u32 rsvd0406:2; -+ u32 qsel:5; -+ u32 rd_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:4; -+ u32 navusehdr:1; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 rsvd0424:2; -+ u32 pkt_offset:5; // unit: 8 bytes -+ u32 rsvd0431:1; -+ -+ // Offset 8 -+ u32 rts_rc:6; -+ u32 data_rc:6; -+ u32 agg_en:1; -+ u32 rd_en:1; -+ u32 bar_rty_th:2; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 ccx:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 ant_sel_a:1; -+ u32 ant_sel_b:1; -+ u32 tx_ant_cck:2; -+ u32 tx_antl:2; -+ u32 tx_ant_ht:2; -+ -+ // Offset 12 -+ u32 nextheadpage:8; -+ u32 tailpage:8; -+ u32 seq:12; -+ u32 cpu_handle:1; -+ u32 tag1:1; -+ u32 trigger_int:1; -+ u32 hwseq_en:1; -+ -+ // Offset 16 -+ u32 rtsrate:5; -+ u32 ap_dcfe:1; -+ u32 hwseq_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 pwr_status:3; -+ u32 wait_dcts:1; -+ u32 cts2ap_en:1; -+ u32 data_sc:2; -+ u32 data_stbc:2; -+ u32 data_short:1; -+ u32 data_bw:1; -+ u32 rts_short:1; -+ u32 rts_bw:1; -+ u32 rts_sc:2; -+ u32 vcs_stbc:2; -+ -+ // Offset 20 -+ u32 datarate:6; -+ u32 sgi:1; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 usb_txagg_num:8; -+ -+ // Offset 24 -+ u32 txagg_a:5; -+ u32 txagg_b:5; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 mcsg1_max_len:4; -+ u32 mcsg2_max_len:4; -+ u32 mcsg3_max_len:4; -+ u32 mcs7_sgi_max_len:4; -+ -+ // Offset 28 -+ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) -+ u32 mcsg4_max_len:4; -+ u32 mcsg5_max_len:4; -+ u32 mcsg6_max_len:4; -+ u32 mcs15_sgi_max_len:4; -+ -+ // Offset 32 -+ u32 rsvd32; -+ -+ // Offset 36 -+ u32 rsvd36; -+}TXDESC_8812, *PTXDESC_8812; -+ -+ -+// Dword 0 -+#define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+#define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+// Dword 1 -+#define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+ -+// Dword 2 -+#define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+// Dword 3 -+#define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+#define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+#define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+// Dword 4 -+#define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+ -+// Dword 5 -+#define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) -+ -+// Dword 6 -+#define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+#define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+#define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+ -+// Dword 7 -+#define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+#ifdef CONFIG_SDIO_HCI -+#define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+#endif -+ -+// Dword 8 -+#define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+ -+// Dword 9 -+#define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+ -+// Dword 10 -+#define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+#define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) -+ -+// Dword 11 -+#define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+#ifdef CONFIG_TX_EARLY_MODE -+#define USB_DUMMY_OFFSET 2 -+#else -+#define USB_DUMMY_OFFSET 1 -+#endif -+#define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ) -+ -+ -+void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc); -+void rtl8812a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); -+void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8812au_init_xmit_priv(PADAPTER padapter); -+void rtl8812au_free_xmit_priv(PADAPTER padapter); -+s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); -+void rtl8812au_xmit_tasklet(void *priv); -+s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8812ae_init_xmit_priv(PADAPTER padapter); -+void rtl8812ae_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8812ae_xmitframe_resume(_adapter *padapter); -+s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8812ae_xmit_tasklet(void *priv); -+#endif -+ -+#ifdef CONFIG_TX_EARLY_MODE -+void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); -+#endif -+ -+void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); -+ -+u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif //__RTL8812_XMIT_H__ -+ -+#ifdef CONFIG_RTL8821A -+#include "rtl8821a_xmit.h" -+#endif // CONFIG_RTL8821A -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_XMIT_H__ ++#define __RTL8812A_XMIT_H__ ++ ++ ++//For 88e early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define QSEL_SHT 8 ++#define RATE_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define SEC_TYPE_SHT 22 ++#define PKT_OFFSET_SHT 26 ++ ++//OFFSET 8 ++#define AGG_EN BIT(12) ++#define AGG_BK BIT(16) ++#define AMPDU_DENSITY_SHT 20 ++#define ANTSEL_A BIT(24) ++#define ANTSEL_B BIT(25) ++#define TX_ANT_CCK_SHT 26 ++#define TX_ANTL_SHT 28 ++#define TX_ANT_HT_SHT 30 ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++#define EN_HWSEQ BIT(31) ++ ++//OFFSET 16 ++#define QOS BIT(6) ++#define HW_SSN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define CTS_2_SELF BIT(11) ++#define RTS_EN BIT(12) ++#define HW_RTS_EN BIT(13) ++#define DATA_SHORT BIT(24) ++#define PWR_STATUS_SHT 15 ++#define DATA_SC_SHT 20 ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define RTY_LMT_EN BIT(17) ++ ++//OFFSET 20 ++#define SGI BIT(6) ++#define USB_TXAGG_NUM_SHT 24 ++ ++typedef struct txdescriptor_8812 ++{ ++ // Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 own:1; ++ ++ // Offset 4 ++ u32 macid:6; ++ u32 rsvd0406:2; ++ u32 qsel:5; ++ u32 rd_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:4; ++ u32 navusehdr:1; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 rsvd0424:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 rsvd0431:1; ++ ++ // Offset 8 ++ u32 rts_rc:6; ++ u32 data_rc:6; ++ u32 agg_en:1; ++ u32 rd_en:1; ++ u32 bar_rty_th:2; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 ccx:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 ant_sel_a:1; ++ u32 ant_sel_b:1; ++ u32 tx_ant_cck:2; ++ u32 tx_antl:2; ++ u32 tx_ant_ht:2; ++ ++ // Offset 12 ++ u32 nextheadpage:8; ++ u32 tailpage:8; ++ u32 seq:12; ++ u32 cpu_handle:1; ++ u32 tag1:1; ++ u32 trigger_int:1; ++ u32 hwseq_en:1; ++ ++ // Offset 16 ++ u32 rtsrate:5; ++ u32 ap_dcfe:1; ++ u32 hwseq_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 pwr_status:3; ++ u32 wait_dcts:1; ++ u32 cts2ap_en:1; ++ u32 data_sc:2; ++ u32 data_stbc:2; ++ u32 data_short:1; ++ u32 data_bw:1; ++ u32 rts_short:1; ++ u32 rts_bw:1; ++ u32 rts_sc:2; ++ u32 vcs_stbc:2; ++ ++ // Offset 20 ++ u32 datarate:6; ++ u32 sgi:1; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 usb_txagg_num:8; ++ ++ // Offset 24 ++ u32 txagg_a:5; ++ u32 txagg_b:5; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 mcsg1_max_len:4; ++ u32 mcsg2_max_len:4; ++ u32 mcsg3_max_len:4; ++ u32 mcs7_sgi_max_len:4; ++ ++ // Offset 28 ++ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) ++ u32 mcsg4_max_len:4; ++ u32 mcsg5_max_len:4; ++ u32 mcsg6_max_len:4; ++ u32 mcs15_sgi_max_len:4; ++ ++ // Offset 32 ++ u32 rsvd32; ++ ++ // Offset 36 ++ u32 rsvd36; ++}TXDESC_8812, *PTXDESC_8812; ++ ++ ++// Dword 0 ++#define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++#define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++#define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++#define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++ ++// Dword 7 ++#define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++#ifdef CONFIG_SDIO_HCI ++#define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif ++ ++// Dword 8 ++#define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++ ++// Dword 10 ++#define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) ++ ++// Dword 11 ++#define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++#ifdef CONFIG_TX_EARLY_MODE ++#define USB_DUMMY_OFFSET 2 ++#else ++#define USB_DUMMY_OFFSET 1 ++#endif ++#define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ) ++ ++ ++void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc); ++void rtl8812a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8812au_init_xmit_priv(PADAPTER padapter); ++void rtl8812au_free_xmit_priv(PADAPTER padapter); ++s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); ++void rtl8812au_xmit_tasklet(void *priv); ++s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8812ae_init_xmit_priv(PADAPTER padapter); ++void rtl8812ae_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8812ae_xmitframe_resume(_adapter *padapter); ++s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8812ae_xmit_tasklet(void *priv); ++#endif ++ ++#ifdef CONFIG_TX_EARLY_MODE ++void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); ++#endif ++ ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); ++ ++u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++#endif //__RTL8812_XMIT_H__ ++ ++#ifdef CONFIG_RTL8821A ++#include "rtl8821a_xmit.h" ++#endif // CONFIG_RTL8821A ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_cmd.h new file mode 100644 -index 000000000..6f9cdc2e3 +index 0000000..6f9cdc2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_cmd.h @@ -0,0 +1,153 @@ @@ -296028,7 +337460,7 @@ index 000000000..6f9cdc2e3 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_dm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_dm.h new file mode 100644 -index 000000000..48837700e +index 0000000..4883770 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_dm.h @@ -0,0 +1,34 @@ @@ -296068,595 +337500,595 @@ index 000000000..48837700e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_hal.h new file mode 100644 -index 000000000..400c09e35 +index 0000000..842ddc6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_hal.h @@ -0,0 +1,341 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8814A_HAL_H__ -+#define __RTL8814A_HAL_H__ -+ -+//#include "hal_com.h" -+#include "hal_data.h" -+ -+//include HAL Related header after HAL Related compiling flags -+#include "rtl8814a_spec.h" -+#include "rtl8814a_rf.h" -+#include "rtl8814a_dm.h" -+#include "rtl8814a_recv.h" -+#include "rtl8814a_xmit.h" -+#include "rtl8814a_cmd.h" -+#include "rtl8814a_led.h" -+#include "Hal8814PwrSeq.h" -+#include "Hal8814PhyReg.h" -+#include "Hal8814PhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8814a_sreset.h" -+#endif //DBG_CONFIG_ERROR_DETECT -+ -+ -+typedef enum _TX_PWR_PERCENTAGE{ -+ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% -+ TX_PWR_PERCENTAGE_1 = 0x02, // 25% -+ TX_PWR_PERCENTAGE_2 = 0x04, // 50% -+ TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. -+} TX_PWR_PERCENTAGE; -+ -+ -+enum{ -+ VOLTAGE_V25 = 0x03, -+ LDOE25_SHIFT = 28 , -+ }; -+/* max. iram is 64k , max dmen is 32k. Total = 96k = 0x18000*/ -+#define FW_SIZE 0x18000 -+#define FW_START_ADDRESS 0x1000 -+typedef struct _RT_FIRMWARE_8814 { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8* szFwBuffer; -+#else -+ u8 szFwBuffer[FW_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8814, *PRT_FIRMWARE_8814; -+ -+#define PAGE_SIZE_TX_8814 PAGE_SIZE_128 -+#define BCNQ_PAGE_NUM_8814 0x08 -+ -+//--------------------------------------------------------------------- -+// RTL8814AU From header -+//--------------------------------------------------------------------- -+ #define RTL8814A_FW_IMG "rtl8814a/FW_NIC.bin" -+ #define RTL8814A_FW_WW_IMG "rtl8814a/FW_WoWLAN.bin" -+ #define RTL8814A_PHY_REG "rtl8814a/PHY_REG.txt" -+ #define RTL8814A_PHY_RADIO_A "rtl8814a/RadioA.txt" -+ #define RTL8814A_PHY_RADIO_B "rtl8814a/RadioB.txt" -+ #define RTL8814A_PHY_RADIO_C "rtl8814a/RadioC.txt" -+ #define RTL8814A_PHY_RADIO_D "rtl8814a/RadioD.txt" -+ #define RTL8814A_TXPWR_TRACK "rtl8814a/TxPowerTrack.txt" -+ #define RTL8814A_AGC_TAB "rtl8814a/AGC_TAB.txt" -+ #define RTL8814A_PHY_MACREG "rtl8814a/MAC_REG.txt" -+ #define RTL8814A_PHY_REG_PG "rtl8814a/PHY_REG_PG.txt" -+ #define RTL8814A_PHY_REG_MP "rtl8814a/PHY_REG_MP.txt" -+ #define RTL8814A_TXPWR_LMT "rtl8814a/TXPWR_LMT.txt" -+ #define RTL8814A_WIFI_ANT_ISOLATION "rtl8814a/wifi_ant_isolation.txt" -+ -+#define Rtl8814A_NIC_PWR_ON_FLOW rtl8814A_power_on_flow -+#define Rtl8814A_NIC_RF_OFF_FLOW rtl8814A_radio_off_flow -+#define Rtl8814A_NIC_DISABLE_FLOW rtl8814A_card_disable_flow -+#define Rtl8814A_NIC_ENABLE_FLOW rtl8814A_card_enable_flow -+#define Rtl8814A_NIC_SUSPEND_FLOW rtl8814A_suspend_flow -+#define Rtl8814A_NIC_RESUME_FLOW rtl8814A_resume_flow -+#define Rtl8814A_NIC_PDN_FLOW rtl8814A_hwpdn_flow -+#define Rtl8814A_NIC_LPS_ENTER_FLOW rtl8814A_enter_lps_flow -+#define Rtl8814A_NIC_LPS_LEAVE_FLOW rtl8814A_leave_lps_flow -+ -+//===================================================== -+// New Firmware Header(8-byte alinment required) -+//===================================================== -+//--- LONG WORD 0 ---- -+#define GET_FIRMWARE_HDR_SIGNATURE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) -+#define GET_FIRMWARE_HDR_CATEGORY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI -+#define GET_FIRMWARE_HDR_FUNCTION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions -+#define GET_FIRMWARE_HDR_VERSION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version -+#define GET_FIRMWARE_HDR_SUB_VER_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 -+#define GET_FIRMWARE_HDR_SUB_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) // FW Subversion Index -+ -+//--- LONG WORD 1 ---- -+#define GET_FIRMWARE_HDR_SVN_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 32)// The SVN entry index -+#define GET_FIRMWARE_HDR_RSVD1_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 32) -+ -+//--- LONG WORD 2 ---- -+#define GET_FIRMWARE_HDR_MONTH_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 8) // Release time Month field -+#define GET_FIRMWARE_HDR_DATE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 8, 8) // Release time Date field -+#define GET_FIRMWARE_HDR_HOUR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 16, 8)// Release time Hour field -+#define GET_FIRMWARE_HDR_MINUTE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 24, 8)// Release time Minute field -+#define GET_FIRMWARE_HDR_YEAR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 16)// Release time Year field -+#define GET_FIRMWARE_HDR_FOUNDRY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 16, 8)// Release time Foundry field -+#define GET_FIRMWARE_HDR_RSVD2_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 24, 8) -+ -+//--- LONG WORD 3 ---- -+#define GET_FIRMWARE_HDR_MEM_UASGE_DL_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 1, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_LOADER_3081(__FwHdr)LE_BITS_TO_4BYTE(__FwHdr+24, 2, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_IRAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 3, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_ERAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 4, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_RSVD4_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 5, 3) -+#define GET_FIRMWARE_HDR_RSVD3_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 8, 8) -+#define GET_FIRMWARE_HDR_BOOT_LOADER_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 16, 16) -+#define GET_FIRMWARE_HDR_RSVD5_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) -+ -+//--- LONG WORD 4 ---- -+#define GET_FIRMWARE_HDR_TOTAL_DMEM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 32) -+#define GET_FIRMWARE_HDR_FW_CFG_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 16) -+#define GET_FIRMWARE_HDR_FW_ATTR_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 16, 16) -+ -+//--- LONG WORD 5 ---- -+#define GET_FIRMWARE_HDR_IROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+40, 0, 32) -+#define GET_FIRMWARE_HDR_EROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+44, 0, 32) -+ -+//--- LONG WORD 6 ---- -+#define GET_FIRMWARE_HDR_IRAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+48, 0, 32) -+#define GET_FIRMWARE_HDR_ERAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+52, 0, 32) -+ -+//--- LONG WORD 7 ---- -+#define GET_FIRMWARE_HDR_RSVD6_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+56, 0, 32) -+#define GET_FIRMWARE_HDR_RSVD7_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+60, 0, 32) -+ -+ -+ -+// -+// 2013/08/16 MH MOve from SDIO.h for common use. -+// -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+#define TRX_SHARE_MODE_8814A 0 //TRX Buffer Share Index -+#define BASIC_RXFF_SIZE_8814A 24576//Basic RXFF Size is 24K = 24*1024 Unit: Byte -+#define TRX_SHARE_BUFF_UNIT_8814A 65536//TRX Share Buffer unit Size 64K = 64*1024 Unit: Byte -+#define TRX_SHARE_BUFF_UNIT_PAGE_8814A TRX_SHARE_BUFF_UNIT_8814A/PAGE_SIZE_8814A//512 Pages -+ -+//Origin: -+#define HPQ_PGNUM_8814A 0x20 //High Queue -+#define LPQ_PGNUM_8814A 0x20 //Low Queue -+#define NPQ_PGNUM_8814A 0x20 //Normal Queue -+#define EPQ_PGNUM_8814A 0x20 //Extra Queue -+ -+#else // #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+ -+#define HPQ_PGNUM_8814A 20 -+#define NPQ_PGNUM_8814A 20 -+#define LPQ_PGNUM_8814A 20 //1972 -+#define EPQ_PGNUM_8814A 20 -+#define BCQ_PGNUM_8814A 32 -+ -+#endif //#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+ -+#ifdef CONFIG_WOWLAN -+#define WOWLAN_PAGE_NUM_8814 0x00 -+#else -+#define WOWLAN_PAGE_NUM_8814 0x00 -+#endif -+ -+#define PAGE_SIZE_8814A 128//TXFF Page Size, Unit: Byte -+#define MAX_RX_DMA_BUFFER_SIZE_8814A 0x5C00 //BASIC_RXFF_SIZE_8814A+TRX_SHARE_MODE_8814A*TRX_SHARE_BUFF_UNIT_8814A //Basic RXFF Size + ShareBuffer Size -+#define TX_PAGE_BOUNDARY_8814A TXPKT_PGNUM_8814A // Need to enlarge boundary, by KaiYuan -+#define TX_PAGE_BOUNDARY_WOWLAN_8814A TXPKT_PGNUM_8814A //TODO: 20130415 KaiYuan Check this value later -+ -+ -+#define TOTAL_PGNUM_8814A 2048 -+#define TXPKT_PGNUM_8814A (2048 - BCNQ_PAGE_NUM_8814-WOWLAN_PAGE_NUM_8814) -+#define PUB_PGNUM_8814A (TXPKT_PGNUM_8814A-HPQ_PGNUM_8814A-NPQ_PGNUM_8814A-LPQ_PGNUM_8814A-EPQ_PGNUM_8814A) -+ -+//Note: For WMM Normal Chip Setting ,modify later -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A TX_PAGE_BOUNDARY_8814A -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8814A (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A + 1) -+ -+#define DRIVER_EARLY_INT_TIME_8814 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8814 0x02 -+ -+ -+#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes -+ -+#define EFUSE_MAX_SECTION_JAGUAR 64 -+ -+#define HWSET_MAX_SIZE_8814A 512 -+ -+#define EFUSE_REAL_CONTENT_LEN_8814A 1024 -+#define EFUSE_MAX_BANK_8814A 2 -+ -+#define EFUSE_MAP_LEN_8814A 512 -+#define EFUSE_MAX_SECTION_8814A 64 -+#define EFUSE_MAX_WORD_UNIT_8814A 4 -+#define EFUSE_PROTECT_BYTES_BANK_8814A 16 -+ -+#define EFUSE_IC_ID_OFFSET_8814A 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. -+#define AVAILABLE_EFUSE_ADDR_8814A(addr) (addr < EFUSE_REAL_CONTENT_LEN_8814A) -+ -+/*------------------------------------------------------------------------- -+Chip specific -+-------------------------------------------------------------------------*/ -+ -+/* pic buffer descriptor */ -+#if 1 /* according to the define in the rtw_xmit.h, rtw_recv.h */ -+#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ -+#define TX_DESC_NUM_8814A TXDESC_NUM /* 128 */ -+#define RX_DESC_NUM_8814A PCI_MAX_RX_COUNT /* 128 */ -+#ifdef CONFIG_CONCURRENT_MODE -+#define BE_QUEUE_TX_DESC_NUM_8814A (TXDESC_NUM<<1) /* 256 */ -+#else -+#define BE_QUEUE_TX_DESC_NUM_8814A (TXDESC_NUM+(TXDESC_NUM>>1)) /* 192 */ -+#endif -+#else -+#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ -+#define TX_DESC_NUM_8814A 128 /* 1024//2048 change by ylb 20130624 */ -+#define RX_DESC_NUM_8814A 128 /* 1024 //512 change by ylb 20130624 */ -+#endif -+ -+// To prevent out of boundary programming case, leave 1byte and program full section -+// 9bytes + 1byt + 5bytes and pre 1byte. -+// For worst case: -+// | 1byte|----8bytes----|1byte|--5bytes--| -+// | | Reserved(14bytes) | -+// -+#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. -+ -+/* rtl8814_hal_init.c */ -+s32 FirmwareDownload8814A( PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); -+void InitializeFirmwareVars8814(PADAPTER padapter); -+ -+VOID -+Hal_InitEfuseVars_8814A( -+ IN PADAPTER Adapter -+ ); -+ -+s32 InitLLTTable8814A( -+ IN PADAPTER Adapter -+ ); -+ -+ -+void InitRDGSetting8814A(PADAPTER padapter); -+ -+//void CheckAutoloadState8812A(PADAPTER padapter); -+ -+// EFuse -+u8 GetEEPROMSize8814A(PADAPTER padapter); -+void InitPGData8814A(PADAPTER padapter); -+ -+void hal_ReadPROMVersion8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_ReadTxPowerInfo8814A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); -+void hal_ReadBoardType8814A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); -+void hal_ReadThermalMeter_8814A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); -+void hal_ReadChannelPlan8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_EfuseParseXtal_8814A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); -+void hal_ReadAntennaDiversity8814A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); -+void hal_Read_TRX_antenna_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+VOID hal_ReadAmplifierType_8814A( -+ IN PADAPTER Adapter -+ ); -+VOID hal_ReadPAType_8814A( -+ IN PADAPTER Adapter, -+ IN u8* PROMContent, -+ IN BOOLEAN AutoloadFail, -+ OUT u8* pPAType, -+ OUT u8* pLNAType -+ ); -+void hal_GetRxGainOffset_8814A( -+ PADAPTER Adapter, -+ pu1Byte PROMContent, -+ BOOLEAN AutoloadFail -+ ); -+void Hal_EfuseParseKFreeData_8814A( -+ IN PADAPTER Adapter, -+ IN u8 *PROMContent, -+ IN BOOLEAN AutoloadFail); -+void hal_ReadRFEType_8814A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); -+void hal_EfuseParseBTCoexistInfo8814A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); -+ -+//void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+//int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+void hal_ReadRemoteWakeup_8814A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); -+u8 MgntQuery_NssTxRate(u16 Rate); -+ -+//BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); -+ -+#ifdef CONFIG_WOWLAN -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif //CONFIG_WOWLAN -+ -+void _InitBeaconParameters_8814A(PADAPTER padapter); -+void SetBeaconRelatedRegisters8814A(PADAPTER padapter); -+ -+void ReadRFType8814A(PADAPTER padapter); -+void InitDefaultValue8814A(PADAPTER padapter); -+ -+void SetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); -+void GetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); -+u8 SetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+s32 c2h_id_filter_ccx_8814a(u8 *buf); -+void rtl8814_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8814a(_adapter *adapter); -+ -+// register -+void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); -+void SetBcnCtrlReg(PADAPTER Adapter, u8 SetBits, u8 ClearBits); -+void rtl8814_start_thread(PADAPTER padapter); -+void rtl8814_stop_thread(PADAPTER padapter); -+ -+ -+#ifdef CONFIG_PCI_HCI -+BOOLEAN InterruptRecognized8814AE(PADAPTER Adapter); -+VOID UpdateInterruptMask8814AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+u16 get_txbd_idx_addr(u16 ff_hwaddr); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); -+#endif -+ -+#endif //__RTL8188E_HAL_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_HAL_H__ ++#define __RTL8814A_HAL_H__ ++ ++//#include "hal_com.h" ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8814a_spec.h" ++#include "rtl8814a_rf.h" ++#include "rtl8814a_dm.h" ++#include "rtl8814a_recv.h" ++#include "rtl8814a_xmit.h" ++#include "rtl8814a_cmd.h" ++#include "rtl8814a_led.h" ++#include "Hal8814PwrSeq.h" ++#include "Hal8814PhyReg.h" ++#include "Hal8814PhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8814a_sreset.h" ++#endif //DBG_CONFIG_ERROR_DETECT ++ ++ ++typedef enum _TX_PWR_PERCENTAGE{ ++ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% ++ TX_PWR_PERCENTAGE_1 = 0x02, // 25% ++ TX_PWR_PERCENTAGE_2 = 0x04, // 50% ++ TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. ++} TX_PWR_PERCENTAGE; ++ ++ ++enum{ ++ VOLTAGE_V25 = 0x03, ++ LDOE25_SHIFT = 28 , ++ }; ++/* max. iram is 64k , max dmen is 32k. Total = 96k = 0x18000*/ ++#define FW_SIZE 0x18000 ++#define FW_START_ADDRESS 0x1000 ++typedef struct _RT_FIRMWARE_8814 { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8814, *PRT_FIRMWARE_8814; ++ ++#define PAGE_SIZE_TX_8814 PAGE_SIZE_128 ++#define BCNQ_PAGE_NUM_8814 0x08 ++ ++//--------------------------------------------------------------------- ++// RTL8814AU From header ++//--------------------------------------------------------------------- ++ #define RTL8814A_FW_IMG "rtl8814a/FW_NIC.bin" ++ #define RTL8814A_FW_WW_IMG "rtl8814a/FW_WoWLAN.bin" ++ #define RTL8814A_PHY_REG "rtl8814a/PHY_REG.txt" ++ #define RTL8814A_PHY_RADIO_A "rtl8814a/RadioA.txt" ++ #define RTL8814A_PHY_RADIO_B "rtl8814a/RadioB.txt" ++ #define RTL8814A_PHY_RADIO_C "rtl8814a/RadioC.txt" ++ #define RTL8814A_PHY_RADIO_D "rtl8814a/RadioD.txt" ++ #define RTL8814A_TXPWR_TRACK "rtl8814a/TxPowerTrack.txt" ++ #define RTL8814A_AGC_TAB "rtl8814a/AGC_TAB.txt" ++ #define RTL8814A_PHY_MACREG "rtl8814a/MAC_REG.txt" ++ #define RTL8814A_PHY_REG_PG "rtl8814a/PHY_REG_PG.txt" ++ #define RTL8814A_PHY_REG_MP "rtl8814a/PHY_REG_MP.txt" ++ #define RTL8814A_TXPWR_LMT "rtl8814a/TXPWR_LMT.txt" ++ #define RTL8814A_WIFI_ANT_ISOLATION "rtl8814a/wifi_ant_isolation.txt" ++ ++#define Rtl8814A_NIC_PWR_ON_FLOW rtl8814A_power_on_flow ++#define Rtl8814A_NIC_RF_OFF_FLOW rtl8814A_radio_off_flow ++#define Rtl8814A_NIC_DISABLE_FLOW rtl8814A_card_disable_flow ++#define Rtl8814A_NIC_ENABLE_FLOW rtl8814A_card_enable_flow ++#define Rtl8814A_NIC_SUSPEND_FLOW rtl8814A_suspend_flow ++#define Rtl8814A_NIC_RESUME_FLOW rtl8814A_resume_flow ++#define Rtl8814A_NIC_PDN_FLOW rtl8814A_hwpdn_flow ++#define Rtl8814A_NIC_LPS_ENTER_FLOW rtl8814A_enter_lps_flow ++#define Rtl8814A_NIC_LPS_LEAVE_FLOW rtl8814A_leave_lps_flow ++ ++//===================================================== ++// New Firmware Header(8-byte alinment required) ++//===================================================== ++//--- LONG WORD 0 ---- ++#define GET_FIRMWARE_HDR_SIGNATURE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) ++#define GET_FIRMWARE_HDR_CATEGORY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI ++#define GET_FIRMWARE_HDR_FUNCTION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++#define GET_FIRMWARE_HDR_VERSION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version ++#define GET_FIRMWARE_HDR_SUB_VER_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 ++#define GET_FIRMWARE_HDR_SUB_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) // FW Subversion Index ++ ++//--- LONG WORD 1 ---- ++#define GET_FIRMWARE_HDR_SVN_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 32)// The SVN entry index ++#define GET_FIRMWARE_HDR_RSVD1_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 32) ++ ++//--- LONG WORD 2 ---- ++#define GET_FIRMWARE_HDR_MONTH_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 8) // Release time Month field ++#define GET_FIRMWARE_HDR_DATE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 8, 8) // Release time Date field ++#define GET_FIRMWARE_HDR_HOUR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 16, 8)// Release time Hour field ++#define GET_FIRMWARE_HDR_MINUTE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 24, 8)// Release time Minute field ++#define GET_FIRMWARE_HDR_YEAR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 16)// Release time Year field ++#define GET_FIRMWARE_HDR_FOUNDRY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 16, 8)// Release time Foundry field ++#define GET_FIRMWARE_HDR_RSVD2_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 24, 8) ++ ++//--- LONG WORD 3 ---- ++#define GET_FIRMWARE_HDR_MEM_UASGE_DL_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 1, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_LOADER_3081(__FwHdr)LE_BITS_TO_4BYTE(__FwHdr+24, 2, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_IRAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 3, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_ERAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 4, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_RSVD4_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 5, 3) ++#define GET_FIRMWARE_HDR_RSVD3_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 8, 8) ++#define GET_FIRMWARE_HDR_BOOT_LOADER_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 16, 16) ++#define GET_FIRMWARE_HDR_RSVD5_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) ++ ++//--- LONG WORD 4 ---- ++#define GET_FIRMWARE_HDR_TOTAL_DMEM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 32) ++#define GET_FIRMWARE_HDR_FW_CFG_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 16) ++#define GET_FIRMWARE_HDR_FW_ATTR_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 16, 16) ++ ++//--- LONG WORD 5 ---- ++#define GET_FIRMWARE_HDR_IROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+40, 0, 32) ++#define GET_FIRMWARE_HDR_EROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+44, 0, 32) ++ ++//--- LONG WORD 6 ---- ++#define GET_FIRMWARE_HDR_IRAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+48, 0, 32) ++#define GET_FIRMWARE_HDR_ERAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+52, 0, 32) ++ ++//--- LONG WORD 7 ---- ++#define GET_FIRMWARE_HDR_RSVD6_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+56, 0, 32) ++#define GET_FIRMWARE_HDR_RSVD7_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+60, 0, 32) ++ ++ ++ ++// ++// 2013/08/16 MH MOve from SDIO.h for common use. ++// ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) ++#define TRX_SHARE_MODE_8814A 0 //TRX Buffer Share Index ++#define BASIC_RXFF_SIZE_8814A 24576//Basic RXFF Size is 24K = 24*1024 Unit: Byte ++#define TRX_SHARE_BUFF_UNIT_8814A 65536//TRX Share Buffer unit Size 64K = 64*1024 Unit: Byte ++#define TRX_SHARE_BUFF_UNIT_PAGE_8814A TRX_SHARE_BUFF_UNIT_8814A/PAGE_SIZE_8814A//512 Pages ++ ++//Origin: ++#define HPQ_PGNUM_8814A 0x20 //High Queue ++#define LPQ_PGNUM_8814A 0x20 //Low Queue ++#define NPQ_PGNUM_8814A 0x20 //Normal Queue ++#define EPQ_PGNUM_8814A 0x20 //Extra Queue ++ ++#else // #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) ++ ++#define HPQ_PGNUM_8814A 20 ++#define NPQ_PGNUM_8814A 20 ++#define LPQ_PGNUM_8814A 20 //1972 ++#define EPQ_PGNUM_8814A 20 ++#define BCQ_PGNUM_8814A 32 ++ ++#endif //#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) ++ ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8814 0x00 ++#else ++#define WOWLAN_PAGE_NUM_8814 0x00 ++#endif ++ ++#define PAGE_SIZE_8814A 128//TXFF Page Size, Unit: Byte ++#define MAX_RX_DMA_BUFFER_SIZE_8814A 0x5C00 //BASIC_RXFF_SIZE_8814A+TRX_SHARE_MODE_8814A*TRX_SHARE_BUFF_UNIT_8814A //Basic RXFF Size + ShareBuffer Size ++#define TX_PAGE_BOUNDARY_8814A TXPKT_PGNUM_8814A // Need to enlarge boundary, by KaiYuan ++#define TX_PAGE_BOUNDARY_WOWLAN_8814A TXPKT_PGNUM_8814A //TODO: 20130415 KaiYuan Check this value later ++ ++ ++#define TOTAL_PGNUM_8814A 2048 ++#define TXPKT_PGNUM_8814A (2048 - BCNQ_PAGE_NUM_8814-WOWLAN_PAGE_NUM_8814) ++#define PUB_PGNUM_8814A (TXPKT_PGNUM_8814A-HPQ_PGNUM_8814A-NPQ_PGNUM_8814A-LPQ_PGNUM_8814A-EPQ_PGNUM_8814A) ++ ++//Note: For WMM Normal Chip Setting ,modify later ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A TX_PAGE_BOUNDARY_8814A ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8814A (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A + 1) ++ ++#define DRIVER_EARLY_INT_TIME_8814 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8814 0x02 ++ ++ ++#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes ++ ++#define EFUSE_MAX_SECTION_JAGUAR 64 ++ ++#define HWSET_MAX_SIZE_8814A 512 ++ ++#define EFUSE_REAL_CONTENT_LEN_8814A 1024 ++#define EFUSE_MAX_BANK_8814A 2 ++ ++#define EFUSE_MAP_LEN_8814A 512 ++#define EFUSE_MAX_SECTION_8814A 64 ++#define EFUSE_MAX_WORD_UNIT_8814A 4 ++#define EFUSE_PROTECT_BYTES_BANK_8814A 16 ++ ++#define EFUSE_IC_ID_OFFSET_8814A 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_8814A(addr) (addr < EFUSE_REAL_CONTENT_LEN_8814A) ++ ++/*------------------------------------------------------------------------- ++Chip specific ++-------------------------------------------------------------------------*/ ++ ++/* pic buffer descriptor */ ++#if 1 /* according to the define in the rtw_xmit.h, rtw_recv.h */ ++#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ ++#define TX_DESC_NUM_8814A TXDESC_NUM /* 128 */ ++#define RX_DESC_NUM_8814A PCI_MAX_RX_COUNT /* 128 */ ++#ifdef CONFIG_CONCURRENT_MODE ++#define BE_QUEUE_TX_DESC_NUM_8814A (TXDESC_NUM<<1) /* 256 */ ++#else ++#define BE_QUEUE_TX_DESC_NUM_8814A (TXDESC_NUM+(TXDESC_NUM>>1)) /* 192 */ ++#endif ++#else ++#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ ++#define TX_DESC_NUM_8814A 128 /* 1024//2048 change by ylb 20130624 */ ++#define RX_DESC_NUM_8814A 128 /* 1024 //512 change by ylb 20130624 */ ++#endif ++ ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++/* rtl8814_hal_init.c */ ++s32 FirmwareDownload8814A( PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); ++void InitializeFirmwareVars8814(PADAPTER padapter); ++ ++VOID ++Hal_InitEfuseVars_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++s32 InitLLTTable8814A( ++ IN PADAPTER Adapter ++ ); ++ ++ ++void InitRDGSetting8814A(PADAPTER padapter); ++ ++//void CheckAutoloadState8812A(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8814A(PADAPTER padapter); ++void InitPGData8814A(PADAPTER padapter); ++ ++void hal_ReadPROMVersion8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void hal_ReadTxPowerInfo8814A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void hal_ReadBoardType8814A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void hal_ReadThermalMeter_8814A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++void hal_ReadChannelPlan8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void hal_EfuseParseXtal_8814A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void hal_ReadAntennaDiversity8814A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); ++void hal_Read_TRX_antenna_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++VOID hal_ReadAmplifierType_8814A( ++ IN PADAPTER Adapter ++ ); ++VOID hal_ReadPAType_8814A( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail, ++ OUT u8* pPAType, ++ OUT u8* pLNAType ++ ); ++void hal_GetRxGainOffset_8814A( ++ PADAPTER Adapter, ++ pu1Byte PROMContent, ++ BOOLEAN AutoloadFail ++ ); ++void Hal_EfuseParseKFreeData_8814A( ++ IN PADAPTER Adapter, ++ IN u8 *PROMContent, ++ IN BOOLEAN AutoloadFail); ++void hal_ReadRFEType_8814A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void hal_EfuseParseBTCoexistInfo8814A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++ ++//void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++//int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++void hal_ReadRemoteWakeup_8814A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++u8 MgntQuery_NssTxRate(u16 Rate); ++ ++//BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); ++ ++#ifdef CONFIG_WOWLAN ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void _InitBeaconParameters_8814A(PADAPTER padapter); ++void SetBeaconRelatedRegisters8814A(PADAPTER padapter); ++ ++void ReadRFType8814A(PADAPTER padapter); ++void InitDefaultValue8814A(PADAPTER padapter); ++ ++void SetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); ++void GetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); ++u8 SetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++s32 c2h_id_filter_ccx_8814a(u8 *buf); ++void rtl8814_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8814a(_adapter *adapter); ++ ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++void SetBcnCtrlReg(PADAPTER Adapter, u8 SetBits, u8 ClearBits); ++void rtl8814_start_thread(PADAPTER padapter); ++void rtl8814_stop_thread(PADAPTER padapter); ++ ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8814AE(PADAPTER Adapter); ++VOID UpdateInterruptMask8814AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++u16 get_txbd_idx_addr(u16 ff_hwaddr); ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); ++#endif ++ ++#endif //__RTL8188E_HAL_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_led.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_led.h new file mode 100644 -index 000000000..93d0a7ceb +index 0000000..17cbd2c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_led.h @@ -0,0 +1,41 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8814A_LED_H__ -+#define __RTL8814A_LED_H__ -+ -+ -+//================================================================================ -+// Interface to manipulate LED objects. -+//================================================================================ -+#ifdef CONFIG_USB_HCI -+void rtl8814au_InitSwLeds(PADAPTER padapter); -+void rtl8814au_DeInitSwLeds(PADAPTER padapter); -+#endif //CONFIG_USB_HCI -+#ifdef CONFIG_PCI_HCI -+void rtl8814ae_InitSwLeds(PADAPTER padapter); -+void rtl8814ae_DeInitSwLeds(PADAPTER padapter); -+#endif //CONFIG_PCI_HCI -+#ifdef CONFIG_SDIO_HCI -+void rtl8814s_InitSwLeds(PADAPTER padapter); -+void rtl8814s_DeInitSwLeds(PADAPTER padapter); -+#endif //CONFIG_SDIO_HCI -+ -+#endif //__RTL8814A_LED_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_LED_H__ ++#define __RTL8814A_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8814au_InitSwLeds(PADAPTER padapter); ++void rtl8814au_DeInitSwLeds(PADAPTER padapter); ++#endif //CONFIG_USB_HCI ++#ifdef CONFIG_PCI_HCI ++void rtl8814ae_InitSwLeds(PADAPTER padapter); ++void rtl8814ae_DeInitSwLeds(PADAPTER padapter); ++#endif //CONFIG_PCI_HCI ++#ifdef CONFIG_SDIO_HCI ++void rtl8814s_InitSwLeds(PADAPTER padapter); ++void rtl8814s_DeInitSwLeds(PADAPTER padapter); ++#endif //CONFIG_SDIO_HCI ++ ++#endif //__RTL8814A_LED_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_recv.h new file mode 100644 -index 000000000..718e74935 +index 0000000..f2ae183 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_recv.h @@ -0,0 +1,188 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8814A_RECV_H__ -+#define __RTL8814A_RECV_H__ -+ -+#if defined(CONFIG_USB_HCI) -+ -+#ifndef MAX_RECVBUF_SZ -+#ifdef PLATFORM_OS_CE -+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+#else -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) // 8K -+ #else -+ #define MAX_RECVBUF_SZ (32768) // 32k -+ #endif -+ //#define MAX_RECVBUF_SZ (24576) // 24k -+ //#define MAX_RECVBUF_SZ (20480) //20K -+ //#define MAX_RECVBUF_SZ (10240) //10K -+ //#define MAX_RECVBUF_SZ (15360) // 15k < 16k -+ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -+ #else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+ #endif -+#endif -+#endif //!MAX_RECVBUF_SZ -+ -+#elif defined(CONFIG_PCI_HCI) -+//#ifndef CONFIG_MINIMAL_MEMORY_USAGE -+// #define MAX_RECVBUF_SZ (9100) -+//#else -+ #define MAX_RECVBUF_SZ (4000) // about 4K -+//#endif -+ -+ -+#elif defined(CONFIG_SDIO_HCI) -+/* temp solution -+#ifdef CONFIG_SDIO_RX_COPY -+#define MAX_RECVBUF_SZ (10240) -+#else // !CONFIG_SDIO_RX_COPY -+#define MAX_RECVBUF_SZ MAX_RX_DMA_BUFFER_SIZE_8821 -+#endif // !CONFIG_SDIO_RX_COPY -+*/ -+#endif -+ -+ -+/* RX buffer descriptor */ -+/* DWORD 0 */ -+#define SET_RX_BUFFER_DESC_DATA_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 14, 1, __Value) -+#define SET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 16, __Value) -+ -+#define GET_RX_BUFFER_DESC_OWN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+#define GET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -+ -+/* DWORD 1 */ -+#define SET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) -+#define GET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32) -+ -+/* DWORD 2 */ -+#define SET_RX_BUFFER_PHYSICAL_HIGH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -+ -+/* DWORD 3*/ /* RESERVED */ -+ -+ -+/*============= -+//RX Info -+==============*/ -+//DWORD 0 -+#define SET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8814AE(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_LAST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) -+#define GET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) -+ -+//DWORD 1 -+#define GET_RX_STATUS_DESC_MACID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_EXT_SECTYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 7, 1)/* 20130415 KaiYuan add for 8814 */ -+#define GET_RX_STATUS_DESC_TID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_MACID_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 12, 1) -+#define GET_RX_STATUS_DESC_AMSDU_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_FIRST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) -+#define GET_RX_STATUS_DESC_EOR_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_MC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) -+ -+//DWORD 2 -+#define GET_RX_STATUS_DESC_SEQ_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 8) -+#else -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) -+#endif -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_HWRSVD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) -+#define GET_RX_STATUS_C2H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) -+#define GET_RX_STATUS_DESC_FCS_OK_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) -+ -+//DWORD 3 -+#define GET_RX_STATUS_DESC_RX_RATE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_BSSID_FIT_H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 7, 3)//20130415 KaiYuan add for 8814 -+#define GET_RX_STATUS_DESC_HTC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_L_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) -+#define GET_RX_STATUS_DESC_DMA_AGG_NUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8)//20130415 KaiYuan Check if it exist anymore -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_WAKE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 31, 1) -+ -+//DWORD 4 -+#define GET_RX_STATUS_DESC_PATTERN_IDX_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 0, 8) -+#define GET_RX_STATUS_DESC_RX_EOF_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 8, 1) -+#define GET_RX_STATUS_DESC_RX_SCRAMBLER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 9, 7) -+#define GET_RX_STATUS_DESC_RX_PRE_NDP_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 16, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 24, 5) -+ -+ -+//DWORD 5 -+#define GET_RX_STATUS_DESC_TSFL_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) -+ -+ -+// Rx smooth factor -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8814au_init_recv_priv(PADAPTER padapter); -+void rtl8814au_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8814ae_init_recv_priv(PADAPTER padapter); -+void rtl8814ae_free_recv_priv(PADAPTER padapter); -+#endif -+ -+/* temp solution -+#ifdef CONFIG_SDIO_HCI -+s32 InitRecvPriv8821AS(PADAPTER padapter); -+void FreeRecvPriv8821AS(PADAPTER padapter); -+#endif // CONFIG_SDIO_HCI -+*/ -+ -+void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8814A_RECV_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_RECV_H__ ++#define __RTL8814A_RECV_H__ ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (32768) // 32k ++ #endif ++ //#define MAX_RECVBUF_SZ (24576) // 24k ++ //#define MAX_RECVBUF_SZ (20480) //20K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ //#define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) ++/* temp solution ++#ifdef CONFIG_SDIO_RX_COPY ++#define MAX_RECVBUF_SZ (10240) ++#else // !CONFIG_SDIO_RX_COPY ++#define MAX_RECVBUF_SZ MAX_RX_DMA_BUFFER_SIZE_8821 ++#endif // !CONFIG_SDIO_RX_COPY ++*/ ++#endif ++ ++ ++/* RX buffer descriptor */ ++/* DWORD 0 */ ++#define SET_RX_BUFFER_DESC_DATA_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 14, 1, __Value) ++#define SET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) ++#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 16, __Value) ++ ++#define GET_RX_BUFFER_DESC_OWN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) ++#define GET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) ++#define GET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) ++#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) ++ ++/* DWORD 1 */ ++#define SET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) ++#define GET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32) ++ ++/* DWORD 2 */ ++#define SET_RX_BUFFER_PHYSICAL_HIGH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) ++ ++/* DWORD 3*/ /* RESERVED */ ++ ++ ++/*============= ++//RX Info ++==============*/ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8814AE(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_EXT_SECTYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 7, 1)/* 20130415 KaiYuan add for 8814 */ ++#define GET_RX_STATUS_DESC_TID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_MACID_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 12, 1) ++#define GET_RX_STATUS_DESC_AMSDU_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_MC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 8) ++#else ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#endif ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_HWRSVD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) ++#define GET_RX_STATUS_C2H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++#define GET_RX_STATUS_DESC_FCS_OK_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_BSSID_FIT_H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 7, 3)//20130415 KaiYuan add for 8814 ++#define GET_RX_STATUS_DESC_HTC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_L_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#define GET_RX_STATUS_DESC_DMA_AGG_NUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8)//20130415 KaiYuan Check if it exist anymore ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_WAKE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 31, 1) ++ ++//DWORD 4 ++#define GET_RX_STATUS_DESC_PATTERN_IDX_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 0, 8) ++#define GET_RX_STATUS_DESC_RX_EOF_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 8, 1) ++#define GET_RX_STATUS_DESC_RX_SCRAMBLER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 9, 7) ++#define GET_RX_STATUS_DESC_RX_PRE_NDP_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 16, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 24, 5) ++ ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8814au_init_recv_priv(PADAPTER padapter); ++void rtl8814au_free_recv_priv(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8814ae_init_recv_priv(PADAPTER padapter); ++void rtl8814ae_free_recv_priv(PADAPTER padapter); ++#endif ++ ++/* temp solution ++#ifdef CONFIG_SDIO_HCI ++s32 InitRecvPriv8821AS(PADAPTER padapter); ++void FreeRecvPriv8821AS(PADAPTER padapter); ++#endif // CONFIG_SDIO_HCI ++*/ ++ ++void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8814A_RECV_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_rf.h new file mode 100644 -index 000000000..5cd517a87 +index 0000000..5cd517a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_rf.h @@ -0,0 +1,34 @@ @@ -296696,655 +338128,655 @@ index 000000000..5cd517a87 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_spec.h new file mode 100644 -index 000000000..0e343ec72 +index 0000000..4ffa5bc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_spec.h @@ -0,0 +1,642 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ *******************************************************************************/ -+#ifndef __RTL8814A_SPEC_H__ -+#define __RTL8814A_SPEC_H__ -+ -+#include -+ -+ -+//============================================================ -+// -+//============================================================ -+ -+//----------------------------------------------------- -+// -+// 0x0000h ~ 0x00FFh System Configuration -+// -+//----------------------------------------------------- -+#define REG_SYS_ISO_CTRL_8814A 0x0000 // 2 Byte -+#define REG_SYS_FUNC_EN_8814A 0x0002 // 2 Byte -+#define REG_SYS_PW_CTRL_8814A 0x0004 // 4 Byte -+#define REG_SYS_CLKR_8814A 0x0008 // 2 Byte -+#define REG_SYS_EEPROM_CTRL_8814A 0x000A // 2 Byte -+#define REG_EE_VPD_8814A 0x000C // 2 Byte -+#define REG_SYS_SWR_CTRL1_8814A 0x0010 // 1 Byte -+#define REG_SPS0_CTRL_8814A 0x0011 // 7 Byte -+#define REG_SYS_SWR_CTRL3_8814A 0x0018 // 4 Byte -+#define REG_RSV_CTRL_8814A 0x001C // 3 Byte -+#define REG_RF_CTRL0_8814A 0x001F // 1 Byte -+#define REG_RF_CTRL1_8814A 0x0020 // 1 Byte -+#define REG_RF_CTRL2_8814A 0x0021 // 1 Byte -+#define REG_LPLDO_CTRL_8814A 0x0023 // 1 Byte -+#define REG_AFE_CTRL1_8814A 0x0024 // 4 Byte -+#define REG_AFE_CTRL2_8814A 0x0028 // 4 Byte -+#define REG_AFE_CTRL3_8814A 0x002c // 4 Byte -+#define REG_EFUSE_CTRL_8814A 0x0030 -+#define REG_LDO_EFUSE_CTRL_8814A 0x0034 -+#define REG_PWR_DATA_8814A 0x0038 -+#define REG_CAL_TIMER_8814A 0x003C -+#define REG_ACLK_MON_8814A 0x003E -+#define REG_GPIO_MUXCFG_8814A 0x0040 -+#define REG_GPIO_IO_SEL_8814A 0x0042 -+#define REG_MAC_PINMUX_CFG_8814A 0x0043 -+#define REG_GPIO_PIN_CTRL_8814A 0x0044 -+#define REG_GPIO_INTM_8814A 0x0048 -+#define REG_LEDCFG0_8814A 0x004C -+#define REG_LEDCFG1_8814A 0x004D -+#define REG_LEDCFG2_8814A 0x004E -+#define REG_LEDCFG3_8814A 0x004F -+#define REG_FSIMR_8814A 0x0050 -+#define REG_FSISR_8814A 0x0054 -+#define REG_HSIMR_8814A 0x0058 -+#define REG_HSISR_8814A 0x005c -+#define REG_GPIO_EXT_CTRL_8814A 0x0060 -+#define REG_GPIO_STATUS_8814A 0x006C -+#define REG_SDIO_CTRL_8814A 0x0070 -+#define REG_HCI_OPT_CTRL_8814A 0x0074 -+#define REG_RF_CTRL3_8814A 0x0076 // 1 Byte -+#define REG_AFE_CTRL4_8814A 0x0078 -+#define REG_8051FW_CTRL_8814A 0x0080 -+#define REG_HIMR0_8814A 0x00B0 -+#define REG_HISR0_8814A 0x00B4 -+#define REG_HIMR1_8814A 0x00B8 -+#define REG_HISR1_8814A 0x00BC -+#define REG_SYS_CFG1_8814A 0x00F0 -+#define REG_SYS_CFG2_8814A 0x00FC -+#define REG_SYS_CFG3_8814A 0x1000 -+ -+//----------------------------------------------------- -+// -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+// -+//----------------------------------------------------- -+#define REG_CR_8814A 0x0100 -+#define REG_PBP_8814A 0x0104 -+#define REG_PKT_BUFF_ACCESS_CTRL_8814A 0x0106 -+#define REG_TRXDMA_CTRL_8814A 0x010C -+#define REG_TRXFF_BNDY_8814A 0x0114 -+#define REG_TRXFF_STATUS_8814A 0x0118 -+#define REG_RXFF_PTR_8814A 0x011C -+#define REG_CPWM_8814A 0x012F -+#define REG_FWIMR_8814A 0x0130 -+#define REG_FWISR_8814A 0x0134 -+#define REG_FTIMR_8814A 0x0138 -+#define REG_PKTBUF_DBG_CTRL_8814A 0x0140 -+#define REG_RXPKTBUF_CTRL_8814A 0x0142 -+#define REG_PKTBUF_DBG_DATA_L_8814A 0x0144 -+#define REG_PKTBUF_DBG_DATA_H_8814A 0x0148 -+ -+#define REG_TC0_CTRL_8814A 0x0150 -+#define REG_TC1_CTRL_8814A 0x0154 -+#define REG_TC2_CTRL_8814A 0x0158 -+#define REG_TC3_CTRL_8814A 0x015C -+#define REG_TC4_CTRL_8814A 0x0160 -+#define REG_TCUNIT_BASE_8814A 0x0164 -+#define REG_RSVD3_8814A 0x0168 -+#define REG_C2HEVT_MSG_NORMAL_8814A 0x01A0 -+#define REG_C2HEVT_CLEAR_8814A 0x01AF -+#define REG_MCUTST_1_8814A 0x01C0 -+#define REG_MCUTST_WOWLAN_8814A 0x01C7 -+#define REG_FMETHR_8814A 0x01C8 -+#define REG_HMETFR_8814A 0x01CC -+#define REG_HMEBOX_0_8814A 0x01D0 -+#define REG_HMEBOX_1_8814A 0x01D4 -+#define REG_HMEBOX_2_8814A 0x01D8 -+#define REG_HMEBOX_3_8814A 0x01DC -+#define REG_LLT_INIT_8814A 0x01E0 -+#define REG_LLT_ADDR_8814A 0x01E4 //20130415 KaiYuan add for 8814 -+#define REG_HMEBOX_EXT0_8814A 0x01F0 -+#define REG_HMEBOX_EXT1_8814A 0x01F4 -+#define REG_HMEBOX_EXT2_8814A 0x01F8 -+#define REG_HMEBOX_EXT3_8814A 0x01FC -+ -+//----------------------------------------------------- -+// -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_FIFOPAGE_CTRL_1_8814A 0x0200 -+#define REG_FIFOPAGE_CTRL_2_8814A 0x0204 -+#define REG_AUTO_LLT_8814A 0x0208 -+#define REG_TXDMA_OFFSET_CHK_8814A 0x020C -+#define REG_TXDMA_STATUS_8814A 0x0210 -+#define REG_RQPN_NPQ_8814A 0x0214 -+#define REG_TQPNT1_8814A 0x0218 -+#define REG_TQPNT2_8814A 0x021C -+#define REG_TQPNT3_8814A 0x0220 -+#define REG_TQPNT4_8814A 0x0224 -+#define REG_RQPN_CTRL_1_8814A 0x0228 -+#define REG_RQPN_CTRL_2_8814A 0x022C -+#define REG_FIFOPAGE_INFO_1_8814A 0x0230 -+#define REG_FIFOPAGE_INFO_2_8814A 0x0234 -+#define REG_FIFOPAGE_INFO_3_8814A 0x0238 -+#define REG_FIFOPAGE_INFO_4_8814A 0x023C -+#define REG_FIFOPAGE_INFO_5_8814A 0x0240 -+ -+ -+//----------------------------------------------------- -+// -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+// -+//----------------------------------------------------- -+#define REG_RXDMA_AGG_PG_TH_8814A 0x0280 -+#define REG_RXPKT_NUM_8814A 0x0284 // The number of packets in RXPKTBUF. -+#define REG_RXDMA_CONTROL_8814A 0x0286 // ?????? Control the RX DMA. -+#define REG_RXDMA_STATUS_8814A 0x0288 -+#define REG_RXDMA_MODE_8814A 0x0290 // ?????? -+#define REG_EARLY_MODE_CONTROL_8814A 0x02BC // ?????? -+#define REG_RSVD5_8814A 0x02F0 // ?????? -+ -+ -+//----------------------------------------------------- -+// -+// 0x0300h ~ 0x03FFh PCIe -+// -+//----------------------------------------------------- -+#define REG_PCIE_CTRL_REG_8814A 0x0300 -+#define REG_INT_MIG_8814A 0x0304 // Interrupt Migration -+#define REG_BCNQ_TXBD_DESA_8814A 0x0308 // TX Beacon Descriptor Address -+#define REG_MGQ_TXBD_DESA_8814A 0x0310 // TX Manage Queue Descriptor Address -+#define REG_VOQ_TXBD_DESA_8814A 0x0318 // TX VO Queue Descriptor Address -+#define REG_VIQ_TXBD_DESA_8814A 0x0320 // TX VI Queue Descriptor Address -+#define REG_BEQ_TXBD_DESA_8814A 0x0328 // TX BE Queue Descriptor Address -+#define REG_BKQ_TXBD_DESA_8814A 0x0330 // TX BK Queue Descriptor Address -+#define REG_RXQ_RXBD_DESA_8814A 0x0338 // RX Queue Descriptor Address -+#define REG_HI0Q_TXBD_DESA_8814A 0x0340 -+#define REG_HI1Q_TXBD_DESA_8814A 0x0348 -+#define REG_HI2Q_TXBD_DESA_8814A 0x0350 -+#define REG_HI3Q_TXBD_DESA_8814A 0x0358 -+#define REG_HI4Q_TXBD_DESA_8814A 0x0360 -+#define REG_HI5Q_TXBD_DESA_8814A 0x0368 -+#define REG_HI6Q_TXBD_DESA_8814A 0x0370 -+#define REG_HI7Q_TXBD_DESA_8814A 0x0378 -+#define REG_MGQ_TXBD_NUM_8814A 0x0380 -+#define REG_RX_RXBD_NUM_8814A 0x0382 -+#define REG_VOQ_TXBD_NUM_8814A 0x0384 -+#define REG_VIQ_TXBD_NUM_8814A 0x0386 -+#define REG_BEQ_TXBD_NUM_8814A 0x0388 -+#define REG_BKQ_TXBD_NUM_8814A 0x038A -+#define REG_HI0Q_TXBD_NUM_8814A 0x038C -+#define REG_HI1Q_TXBD_NUM_8814A 0x038E -+#define REG_HI2Q_TXBD_NUM_8814A 0x0390 -+#define REG_HI3Q_TXBD_NUM_8814A 0x0392 -+#define REG_HI4Q_TXBD_NUM_8814A 0x0394 -+#define REG_HI5Q_TXBD_NUM_8814A 0x0396 -+#define REG_HI6Q_TXBD_NUM_8814A 0x0398 -+#define REG_HI7Q_TXBD_NUM_8814A 0x039A -+#define REG_TSFTIMER_HCI_8814A 0x039C -+ -+//Read Write Point -+#define REG_VOQ_TXBD_IDX_8814A 0x03A0 -+#define REG_VIQ_TXBD_IDX_8814A 0x03A4 -+#define REG_BEQ_TXBD_IDX_8814A 0x03A8 -+#define REG_BKQ_TXBD_IDX_8814A 0x03AC -+#define REG_MGQ_TXBD_IDX_8814A 0x03B0 -+#define REG_RXQ_TXBD_IDX_8814A 0x03B4 -+#define REG_HI0Q_TXBD_IDX_8814A 0x03B8 -+#define REG_HI1Q_TXBD_IDX_8814A 0x03BC -+#define REG_HI2Q_TXBD_IDX_8814A 0x03C0 -+#define REG_HI3Q_TXBD_IDX_8814A 0x03C4 -+#define REG_HI4Q_TXBD_IDX_8814A 0x03C8 -+#define REG_HI5Q_TXBD_IDX_8814A 0x03CC -+#define REG_HI6Q_TXBD_IDX_8814A 0x03D0 -+#define REG_HI7Q_TXBD_IDX_8814A 0x03D4 -+#define REG_DBG_SEL_V1_8814A 0x03D8 -+#define REG_PCIE_HRPWM1_V1_8814A 0x03D9 -+#define REG_PCIE_HCPWM1_V1_8814A 0x03DA -+#define REG_PCIE_CTRL2_8814A 0x03DB -+#define REG_PCIE_HRPWM2_V1_8814A 0x03DC -+#define REG_PCIE_HCPWM2_V1_8814A 0x03DE -+#define REG_PCIE_H2C_MSG_V1_8814A 0x03E0 -+#define REG_PCIE_C2H_MSG_V1_8814A 0x03E4 -+#define REG_DBI_WDATA_V1_8814A 0x03E8 -+#define REG_DBI_RDATA_V1_8814A 0x03EC -+#define REG_DBI_FLAG_V1_8814A 0x03F0 -+#define REG_MDIO_V1_8814A 0x03F4 -+#define REG_PCIE_MIX_CFG_8814A 0x03F8 -+#define REG_DBG_8814A 0x03FC -+//----------------------------------------------------- -+// -+// 0x0400h ~ 0x047Fh Protocol Configuration -+// -+//----------------------------------------------------- -+#define REG_VOQ_INFORMATION_8814A 0x0400 -+#define REG_VIQ_INFORMATION_8814A 0x0404 -+#define REG_BEQ_INFORMATION_8814A 0x0408 -+#define REG_BKQ_INFORMATION_8814A 0x040C -+#define REG_MGQ_INFORMATION_8814A 0x0410 -+#define REG_HGQ_INFORMATION_8814A 0x0414 -+#define REG_BCNQ_INFORMATION_8814A 0x0418 -+#define REG_TXPKT_EMPTY_8814A 0x041A -+#define REG_CPU_MGQ_INFORMATION_8814A 0x041C -+#define REG_FWHW_TXQ_CTRL_8814A 0x0420 -+#define REG_HWSEQ_CTRL_8814A 0x0423 -+#define REG_TXPKTBUF_BCNQ_BDNY_8814A 0x0424 -+//#define REG_MGQ_BDNY_8814A 0x0425 -+#define REG_LIFETIME_EN_8814A 0x0426 -+//#define REG_FW_FREE_TAIL_8814A 0x0427 -+#define REG_SPEC_SIFS_8814A 0x0428 -+#define REG_RETRY_LIMIT_8814A 0x042A -+#define REG_TXBF_CTRL_8814A 0x042C -+#define REG_DARFRC_8814A 0x0430 -+#define REG_RARFRC_8814A 0x0438 -+#define REG_RRSR_8814A 0x0440 -+#define REG_ARFR0_8814A 0x0444 -+#define REG_ARFR1_8814A 0x044C -+#define REG_CCK_CHECK_8814A 0x0454 -+#define REG_AMPDU_MAX_TIME_8814A 0x0455 -+#define REG_TXPKTBUF_BCNQ1_BDNY_8814A 0x0456 -+#define REG_AMPDU_MAX_LENGTH_8814A 0x0458 -+#define REG_ACQ_STOP_8814A 0x045C -+#define REG_NDPA_RATE_8814A 0x045D -+#define REG_TX_HANG_CTRL_8814A 0x045E -+#define REG_NDPA_OPT_CTRL_8814A 0x045F -+#define REG_FAST_EDCA_CTRL_8814A 0x0460 -+#define REG_RD_RESP_PKT_TH_8814A 0x0463 -+#define REG_CMDQ_INFO_8814A 0x0464 -+#define REG_Q4_INFO_8814A 0x0468 -+#define REG_Q5_INFO_8814A 0x046C -+#define REG_Q6_INFO_8814A 0x0470 -+#define REG_Q7_INFO_8814A 0x0474 -+#define REG_WMAC_LBK_BUF_HD_8814A 0x0478 -+#define REG_MGQ_PGBNDY_8814A 0x047A -+#define REG_INIRTS_RATE_SEL_8814A 0x0480 -+#define REG_BASIC_CFEND_RATE_8814A 0x0481 -+#define REG_STBC_CFEND_RATE_8814A 0x0482 -+#define REG_DATA_SC_8814A 0x0483 -+#define REG_MACID_SLEEP3_8814A 0x0484 -+#define REG_MACID_SLEEP1_8814A 0x0488 -+#define REG_ARFR2_8814A 0x048C -+#define REG_ARFR3_8814A 0x0494 -+#define REG_ARFR4_8814A 0x049C -+#define REG_ARFR5_8814A 0x04A4 -+#define REG_TXRPT_START_OFFSET_8814A 0x04AC -+#define REG_TRYING_CNT_TH_8814A 0x04B0 -+#define REG_POWER_STAGE1_8814A 0x04B4 -+#define REG_POWER_STAGE2_8814A 0x04B8 -+#define REG_SW_AMPDU_BURST_MODE_CTRL_8814A 0x04BC -+#define REG_PKT_LIFE_TIME_8814A 0x04C0 -+#define REG_PKT_BE_BK_LIFE_TIME_8814A 0x04C2 // ?????? -+#define REG_STBC_SETTING_8814A 0x04C4 -+#define REG_STBC_8814A 0x04C5 -+#define REG_QUEUE_CTRL_8814A 0x04C6 -+#define REG_SINGLE_AMPDU_CTRL_8814A 0x04C7 -+#define REG_PROT_MODE_CTRL_8814A 0x04C8 -+#define REG_MAX_AGGR_NUM_8814A 0x04CA -+#define REG_RTS_MAX_AGGR_NUM_8814A 0x04CB -+#define REG_BAR_MODE_CTRL_8814A 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT_8814A 0x04CF -+#define REG_MACID_SLEEP2_8814A 0x04D0 -+#define REG_MACID_SLEEP0_8814A 0x04D4 -+#define REG_HW_SEQ0_8814A 0x04D8 -+#define REG_HW_SEQ1_8814A 0x04DA -+#define REG_HW_SEQ2_8814A 0x04DC -+#define REG_HW_SEQ3_8814A 0x04DE -+#define REG_NULL_PKT_STATUS_8814A 0x04E0 -+#define REG_PTCL_ERR_STATUS_8814A 0x04E2 -+#define REG_DROP_PKT_NUM_8814A 0x04EC -+#define REG_PTCL_TX_RPT_8814A 0x04F0 -+#define REG_Dummy_8814A 0x04FC -+ -+ -+//----------------------------------------------------- -+// -+// 0x0500h ~ 0x05FFh EDCA Configuration -+// -+//----------------------------------------------------- -+#define REG_EDCA_VO_PARAM_8814A 0x0500 -+#define REG_EDCA_VI_PARAM_8814A 0x0504 -+#define REG_EDCA_BE_PARAM_8814A 0x0508 -+#define REG_EDCA_BK_PARAM_8814A 0x050C -+#define REG_BCNTCFG_8814A 0x0510 -+#define REG_PIFS_8814A 0x0512 -+#define REG_RDG_PIFS_8814A 0x0513 -+#define REG_SIFS_CTX_8814A 0x0514 -+#define REG_SIFS_TRX_8814A 0x0516 -+#define REG_AGGR_BREAK_TIME_8814A 0x051A -+#define REG_SLOT_8814A 0x051B -+#define REG_TX_PTCL_CTRL_8814A 0x0520 -+#define REG_TXPAUSE_8814A 0x0522 -+#define REG_DIS_TXREQ_CLR_8814A 0x0523 -+#define REG_RD_CTRL_8814A 0x0524 -+// -+// Format for offset 540h-542h: -+// [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+// [7:4]: Reserved. -+// [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+// [23:20]: Reserved -+// Description: -+// | -+// |<--Setup--|--Hold------------>| -+// --------------|---------------------- -+// | -+// TBTT -+// Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+// Described by Designer Tim and Bruce, 2011-01-14. -+// -+#define REG_TBTT_PROHIBIT_8814A 0x0540 -+#define REG_RD_NAV_NXT_8814A 0x0544 -+#define REG_NAV_PROT_LEN_8814A 0x0546 -+#define REG_BCN_CTRL_8814A 0x0550 -+#define REG_BCN_CTRL_1_8814A 0x0551 -+#define REG_MBID_NUM_8814A 0x0552 -+#define REG_DUAL_TSF_RST_8814A 0x0553 -+#define REG_MBSSID_BCN_SPACE_8814A 0x0554 -+#define REG_DRVERLYINT_8814A 0x0558 -+#define REG_BCNDMATIM_8814A 0x0559 -+#define REG_ATIMWND_8814A 0x055A -+#define REG_USTIME_TSF_8814A 0x055C -+#define REG_BCN_MAX_ERR_8814A 0x055D -+#define REG_RXTSF_OFFSET_CCK_8814A 0x055E -+#define REG_RXTSF_OFFSET_OFDM_8814A 0x055F -+#define REG_TSFTR_8814A 0x0560 -+#define REG_CTWND_8814A 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8814A 0x0577 // ?????? -+#define REG_PSTIMER_8814A 0x0580 -+#define REG_TIMER0_8814A 0x0584 -+#define REG_TIMER1_8814A 0x0588 -+#define REG_BCN_PREDL_ITV_8814A 0x058F //Pre download beacon interval -+#define REG_ACMHWCTRL_8814A 0x05C0 -+ -+//----------------------------------------------------- -+// -+// 0x0600h ~ 0x07FFh WMAC Configuration -+// -+//----------------------------------------------------- -+#define REG_MAC_CR_8814A 0x0600 -+#define REG_TCR_8814A 0x0604 -+#define REG_RCR_8814A 0x0608 -+#define REG_RX_PKT_LIMIT_8814A 0x060C -+#define REG_RX_DLK_TIME_8814A 0x060D -+#define REG_RX_DRVINFO_SZ_8814A 0x060F -+ -+#define REG_MACID_8814A 0x0610 -+#define REG_BSSID_8814A 0x0618 -+#define REG_MAR_8814A 0x0620 -+#define REG_MBIDCAMCFG_8814A 0x0628 -+ -+#define REG_USTIME_EDCA_8814A 0x0638 -+#define REG_MAC_SPEC_SIFS_8814A 0x063A -+#define REG_RESP_SIFP_CCK_8814A 0x063C -+#define REG_RESP_SIFS_OFDM_8814A 0x063E -+#define REG_ACKTO_8814A 0x0640 -+#define REG_CTS2TO_8814A 0x0641 -+#define REG_EIFS_8814A 0x0642 -+ -+#define REG_NAV_UPPER_8814A 0x0652 // unit of 128 -+#define REG_TRXPTCL_CTL_8814A 0x0668 -+ -+// Security -+#define REG_CAMCMD_8814A 0x0670 -+#define REG_CAMWRITE_8814A 0x0674 -+#define REG_CAMREAD_8814A 0x0678 -+#define REG_CAMDBG_8814A 0x067C -+#define REG_SECCFG_8814A 0x0680 -+ -+// Power -+#define REG_WOW_CTRL_8814A 0x0690 -+#define REG_PS_RX_INFO_8814A 0x0692 -+#define REG_UAPSD_TID_8814A 0x0693 -+#define REG_WKFMCAM_NUM_8814A 0x0698 -+#define REG_RXFLTMAP0_8814A 0x06A0 -+#define REG_RXFLTMAP1_8814A 0x06A2 -+#define REG_RXFLTMAP2_8814A 0x06A4 -+#define REG_BCN_PSR_RPT_8814A 0x06A8 -+#define REG_BT_COEX_TABLE_8814A 0x06C0 -+#define REG_TX_DATA_RSP_RATE_8814A 0x06DE -+#define REG_ASSOCIATED_BFMER0_INFO_8814A 0x06E4 -+#define REG_ASSOCIATED_BFMER1_INFO_8814A 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8814A 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8814A 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8814A 0x06FC -+ -+// Hardware Port 2 -+#define REG_MACID1_8814A 0x0700 -+#define REG_BSSID1_8814A 0x0708 -+// Hardware Port 3 -+#define REG_MACID2_8814A 0x1620 -+#define REG_BSSID2_8814A 0x1628 -+// Hardware Port 4 -+#define REG_MACID3_8814A 0x1630 -+#define REG_BSSID3_8814A 0x1638 -+// Hardware Port 5 -+#define REG_MACID4_8814A 0x1640 -+#define REG_BSSID4_8814A 0x1648 -+ -+#define REG_ASSOCIATED_BFMEE_SEL_8814A 0x0714 -+#define REG_SND_PTCL_CTRL_8814A 0x0718 -+#define REG_IQ_DUMP_8814A 0x07C0 -+ -+/**** page 19 ****/ -+//TX BeamForming -+#define REG_BB_TXBF_ANT_SET_BF1 0x19ac -+#define REG_BB_TXBF_ANT_SET_BF0 0x19b4 -+ -+// 0x1200h ~ 0x12FFh DDMA CTRL -+// -+//----------------------------------------------------- -+#define REG_DDMA_CH0SA 0x1200 -+#define REG_DDMA_CH0DA 0x1204 -+#define REG_DDMA_CH0CTRL 0x1208 -+#define REG_DDMA_CH1SA 0x1210 -+#define REG_DDMA_CH1DA 0x1214 -+#define REG_DDMA_CH1CTRL 0x1218 -+#define REG_DDMA_CH2SA 0x1220 -+#define REG_DDMA_CH2DA 0x1224 -+#define REG_DDMA_CH2CTRL 0x1228 -+#define REG_DDMA_CH3SA 0x1230 -+#define REG_DDMA_CH3DA 0x1234 -+#define REG_DDMA_CH3CTRL 0x1238 -+#define REG_DDMA_CH4SA 0x1240 -+#define REG_DDMA_CH4DA 0x1244 -+#define REG_DDMA_CH4CTRL 0x1248 -+#define REG_DDMA_CH5SA 0x1250 -+#define REG_DDMA_CH5DA 0x1254 -+#define REG_DDMA_CH5CTRL 0x1258 -+#define REG_DDMA_INT_MSK 0x12E0 -+#define REG_DDMA_CHSTATUS 0x12E8 -+#define REG_DDMA_CHKSUM 0x12F0 -+#define REG_DDMA_MONITER 0x12FC -+ -+#define DDMA_LEN_MASK 0x0001FFFF -+#define FW_CHKSUM_DUMMY_SZ 8 -+#define DDMA_CH_CHKSUM_CNT BIT(24) -+#define DDMA_RST_CHKSUM_STS BIT(25) -+#define DDMA_MODE_BLOCK_CPU BIT(26) -+#define DDMA_CHKSUM_FAIL BIT(27) -+#define DDMA_DA_W_DISABLE BIT(28) -+#define DDMA_CHKSUM_EN BIT(29) -+#define DDMA_CH_OWN BIT(31) -+ -+ -+//3081 FWDL -+#define FWDL_EN BIT0 -+#define IMEM_BOOT_DL_RDY BIT1 -+#define IMEM_BOOT_CHKSUM_FAIL BIT2 -+#define IMEM_DL_RDY BIT3 -+#define IMEM_CHKSUM_OK BIT4 -+#define DMEM_DL_RDY BIT5 -+#define DMEM_CHKSUM_OK BIT6 -+#define EMEM_DL_RDY BIT7 -+#define EMEM_CHKSUM_FAIL BIT8 -+#define EMEM_TXBUF_DL_RDY BIT9 -+#define EMEM_TXBUF_CHKSUM_FAIL BIT10 -+#define CPU_CLK_SWITCH_BUSY BIT11 -+#define CPU_CLK_SEL (BIT12|BIT13) -+#define FWDL_OK BIT14 -+#define FW_INIT_RDY BIT15 -+#define R_EN_BOOT_FLASH BIT20 -+ -+#define OCPBASE_IMEM_3081 0x00000000 -+#define OCPBASE_DMEM_3081 0x00200000 -+#define OCPBASE_RPTBUF_3081 0x18660000 -+#define OCPBASE_RXBUF2_3081 0x18680000 -+#define OCPBASE_RXBUF_3081 0x18700000 -+#define OCPBASE_TXBUF_3081 0x18780000 -+ -+ -+#define REG_FAST_EDCA_VOVI_SETTING_8814A 0x1448 -+#define REG_FAST_EDCA_BEBK_SETTING_8814A 0x144C -+ -+ -+//----------------------------------------------------- -+// -+ -+ -+//----------------------------------------------------- -+// -+// Redifine 8192C register definition for compatibility -+// -+//----------------------------------------------------- -+ -+// TODO: use these definition when using REG_xxx naming rule. -+// NOTE: DO NOT Remove these definition. Use later. -+#define EFUSE_CTRL_8814A REG_EFUSE_CTRL_8814A // E-Fuse Control. -+#define EFUSE_TEST_8814A REG_LDO_EFUSE_CTRL_8814A // E-Fuse Test. -+#define MSR_8814A (REG_CR_8814A + 2) // Media Status register -+#define ISR_8814A REG_HISR0_8814A -+#define TSFR_8814A REG_TSFTR_8814A // Timing Sync Function Timer Register. -+ -+#define PBP_8814A REG_PBP_8814A -+ -+// Redifine MACID register, to compatible prior ICs. -+#define IDR0_8814A REG_MACID_8814A // MAC ID Register, Offset 0x0050-0x0053 -+#define IDR4_8814A (REG_MACID_8814A + 4) // MAC ID Register, Offset 0x0054-0x0055 -+ -+ -+// -+// 9. Security Control Registers (Offset: ) -+// -+#define RWCAM_8814A REG_CAMCMD_8814A //IN 8190 Data Sheet is called CAMcmd -+#define WCAMI_8814A REG_CAMWRITE_8814A // Software write CAM input content -+#define RCAMO_8814A REG_CAMREAD_8814A // Software read/write CAM config -+#define CAMDBG_8814A REG_CAMDBG_8814A -+#define SECR_8814A REG_SECCFG_8814A //Security Configuration Register -+ -+ -+//---------------------------------------------------------------------------- -+// 8195 IMR/ISR bits (offset 0xB0, 8bits) -+//---------------------------------------------------------------------------- -+#define IMR_DISABLED_8814A 0 -+// IMR DW0(0x00B0-00B3) Bit 0-31 -+#define IMR_TIMER2_8814A BIT31 // Timeout interrupt 2 -+#define IMR_TIMER1_8814A BIT30 // Timeout interrupt 1 -+#define IMR_PSTIMEOUT_8814A BIT29 // Power Save Time Out Interrupt -+#define IMR_GTINT4_8814A BIT28 // When GTIMER4 expires, this bit is set to 1 -+#define IMR_GTINT3_8814A BIT27 // When GTIMER3 expires, this bit is set to 1 -+#define IMR_TXBCN0ERR_8814A BIT26 // Transmit Beacon0 Error -+#define IMR_TXBCN0OK_8814A BIT25 // Transmit Beacon0 OK -+#define IMR_TSF_BIT32_TOGGLE_8814A BIT24 // TSF Timer BIT32 toggle indication interrupt -+#define IMR_BCNDMAINT0_8814A BIT20 // Beacon DMA Interrupt 0 -+#define IMR_BCNDERR0_8814A BIT16 // Beacon Queue DMA OK0 -+#define IMR_HSISR_IND_ON_INT_8814A BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) -+#define IMR_BCNDMAINT_E_8814A BIT14 // Beacon DMA Interrupt Extension for Win7 -+#define IMR_ATIMEND_8814A BIT12 // CTWidnow End or ATIM Window End -+#define IMR_C2HCMD_8814A BIT10 // CPU to Host Command INT Status, Write 1 clear -+#define IMR_CPWM2_8814A BIT9 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_CPWM_8814A BIT8 // CPU power Mode exchange INT Status, Write 1 clear -+#define IMR_HIGHDOK_8814A BIT7 // High Queue DMA OK -+#define IMR_MGNTDOK_8814A BIT6 // Management Queue DMA OK -+#define IMR_BKDOK_8814A BIT5 // AC_BK DMA OK -+#define IMR_BEDOK_8814A BIT4 // AC_BE DMA OK -+#define IMR_VIDOK_8814A BIT3 // AC_VI DMA OK -+#define IMR_VODOK_8814A BIT2 // AC_VO DMA OK -+#define IMR_RDU_8814A BIT1 // Rx Descriptor Unavailable -+#define IMR_ROK_8814A BIT0 // Receive DMA OK -+ -+// IMR DW1(0x00B4-00B7) Bit 0-31 -+#define IMR_MCUERR_8814A BIT28 // Beacon DMA Interrupt 7 -+#define IMR_BCNDMAINT7_8814A BIT27 // Beacon DMA Interrupt 7 -+#define IMR_BCNDMAINT6_8814A BIT26 // Beacon DMA Interrupt 6 -+#define IMR_BCNDMAINT5_8814A BIT25 // Beacon DMA Interrupt 5 -+#define IMR_BCNDMAINT4_8814A BIT24 // Beacon DMA Interrupt 4 -+#define IMR_BCNDMAINT3_8814A BIT23 // Beacon DMA Interrupt 3 -+#define IMR_BCNDMAINT2_8814A BIT22 // Beacon DMA Interrupt 2 -+#define IMR_BCNDMAINT1_8814A BIT21 // Beacon DMA Interrupt 1 -+#define IMR_BCNDOK7_8814A BIT20 // Beacon Queue DMA OK Interrup 7 -+#define IMR_BCNDOK6_8814A BIT19 // Beacon Queue DMA OK Interrup 6 -+#define IMR_BCNDOK5_8814A BIT18 // Beacon Queue DMA OK Interrup 5 -+#define IMR_BCNDOK4_8814A BIT17 // Beacon Queue DMA OK Interrup 4 -+#define IMR_BCNDOK3_8814A BIT16 // Beacon Queue DMA OK Interrup 3 -+#define IMR_BCNDOK2_8814A BIT15 // Beacon Queue DMA OK Interrup 2 -+#define IMR_BCNDOK1_8814A BIT14 // Beacon Queue DMA OK Interrup 1 -+#define IMR_ATIMEND_E_8814A BIT13 // ATIM Window End Extension for Win7 -+#define IMR_TXERR_8814A BIT11 // Tx Error Flag Interrupt Status, write 1 clear. -+#define IMR_RXERR_8814A BIT10 // Rx Error Flag INT Status, Write 1 clear -+#define IMR_TXFOVW_8814A BIT9 // Transmit FIFO Overflow -+#define IMR_RXFOVW_8814A BIT8 // Receive FIFO Overflow -+ -+ -+#ifdef CONFIG_PCI_HCI -+#define IMR_TX_MASK (IMR_VODOK_8814A | IMR_VIDOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A | IMR_MGNTDOK_8814A | IMR_HIGHDOK_8814A) -+ -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8814A | IMR_TXBCN0OK_8814A | IMR_TXBCN0ERR_8814A | IMR_BCNDERR0_8814A) -+ -+#define RT_AC_INT_MASKS (IMR_VIDOK_8814A | IMR_VODOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A) -+#endif -+ -+ -+/*=================================================================== -+===================================================================== -+Here the register defines are for 92C. When the define is as same with 92C, -+we will use the 92C's define for the consistency -+So the following defines for 92C is not entire!!!!!! -+===================================================================== -+=====================================================================*/ -+ -+ -+//----------------------------------------------------- -+// -+// 0xFE00h ~ 0xFE55h USB Configuration -+// -+//----------------------------------------------------- -+ -+//2 Special Option -+#define USB_AGG_EN_8814A BIT(7) -+#define REG_USB_HRPWM_U3 0xF052 -+ -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A 2048-1 //20130415 KaiYuan add for 8814 -+ -+#define MACID_NUM_8814A 128 -+#define SEC_CAM_ENT_NUM_8814A 64 -+#define NSS_NUM_8814A 3 -+#define BAND_CAP_8814A (BAND_CAP_2G | BAND_CAP_5G) -+#define BW_CAP_8814A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) -+ -+#endif //__RTL8814A_SPEC_H__ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8814A_SPEC_H__ ++#define __RTL8814A_SPEC_H__ ++ ++#include ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL_8814A 0x0000 // 2 Byte ++#define REG_SYS_FUNC_EN_8814A 0x0002 // 2 Byte ++#define REG_SYS_PW_CTRL_8814A 0x0004 // 4 Byte ++#define REG_SYS_CLKR_8814A 0x0008 // 2 Byte ++#define REG_SYS_EEPROM_CTRL_8814A 0x000A // 2 Byte ++#define REG_EE_VPD_8814A 0x000C // 2 Byte ++#define REG_SYS_SWR_CTRL1_8814A 0x0010 // 1 Byte ++#define REG_SPS0_CTRL_8814A 0x0011 // 7 Byte ++#define REG_SYS_SWR_CTRL3_8814A 0x0018 // 4 Byte ++#define REG_RSV_CTRL_8814A 0x001C // 3 Byte ++#define REG_RF_CTRL0_8814A 0x001F // 1 Byte ++#define REG_RF_CTRL1_8814A 0x0020 // 1 Byte ++#define REG_RF_CTRL2_8814A 0x0021 // 1 Byte ++#define REG_LPLDO_CTRL_8814A 0x0023 // 1 Byte ++#define REG_AFE_CTRL1_8814A 0x0024 // 4 Byte ++#define REG_AFE_CTRL2_8814A 0x0028 // 4 Byte ++#define REG_AFE_CTRL3_8814A 0x002c // 4 Byte ++#define REG_EFUSE_CTRL_8814A 0x0030 ++#define REG_LDO_EFUSE_CTRL_8814A 0x0034 ++#define REG_PWR_DATA_8814A 0x0038 ++#define REG_CAL_TIMER_8814A 0x003C ++#define REG_ACLK_MON_8814A 0x003E ++#define REG_GPIO_MUXCFG_8814A 0x0040 ++#define REG_GPIO_IO_SEL_8814A 0x0042 ++#define REG_MAC_PINMUX_CFG_8814A 0x0043 ++#define REG_GPIO_PIN_CTRL_8814A 0x0044 ++#define REG_GPIO_INTM_8814A 0x0048 ++#define REG_LEDCFG0_8814A 0x004C ++#define REG_LEDCFG1_8814A 0x004D ++#define REG_LEDCFG2_8814A 0x004E ++#define REG_LEDCFG3_8814A 0x004F ++#define REG_FSIMR_8814A 0x0050 ++#define REG_FSISR_8814A 0x0054 ++#define REG_HSIMR_8814A 0x0058 ++#define REG_HSISR_8814A 0x005c ++#define REG_GPIO_EXT_CTRL_8814A 0x0060 ++#define REG_GPIO_STATUS_8814A 0x006C ++#define REG_SDIO_CTRL_8814A 0x0070 ++#define REG_HCI_OPT_CTRL_8814A 0x0074 ++#define REG_RF_CTRL3_8814A 0x0076 // 1 Byte ++#define REG_AFE_CTRL4_8814A 0x0078 ++#define REG_8051FW_CTRL_8814A 0x0080 ++#define REG_HIMR0_8814A 0x00B0 ++#define REG_HISR0_8814A 0x00B4 ++#define REG_HIMR1_8814A 0x00B8 ++#define REG_HISR1_8814A 0x00BC ++#define REG_SYS_CFG1_8814A 0x00F0 ++#define REG_SYS_CFG2_8814A 0x00FC ++#define REG_SYS_CFG3_8814A 0x1000 ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR_8814A 0x0100 ++#define REG_PBP_8814A 0x0104 ++#define REG_PKT_BUFF_ACCESS_CTRL_8814A 0x0106 ++#define REG_TRXDMA_CTRL_8814A 0x010C ++#define REG_TRXFF_BNDY_8814A 0x0114 ++#define REG_TRXFF_STATUS_8814A 0x0118 ++#define REG_RXFF_PTR_8814A 0x011C ++#define REG_CPWM_8814A 0x012F ++#define REG_FWIMR_8814A 0x0130 ++#define REG_FWISR_8814A 0x0134 ++#define REG_FTIMR_8814A 0x0138 ++#define REG_PKTBUF_DBG_CTRL_8814A 0x0140 ++#define REG_RXPKTBUF_CTRL_8814A 0x0142 ++#define REG_PKTBUF_DBG_DATA_L_8814A 0x0144 ++#define REG_PKTBUF_DBG_DATA_H_8814A 0x0148 ++ ++#define REG_TC0_CTRL_8814A 0x0150 ++#define REG_TC1_CTRL_8814A 0x0154 ++#define REG_TC2_CTRL_8814A 0x0158 ++#define REG_TC3_CTRL_8814A 0x015C ++#define REG_TC4_CTRL_8814A 0x0160 ++#define REG_TCUNIT_BASE_8814A 0x0164 ++#define REG_RSVD3_8814A 0x0168 ++#define REG_C2HEVT_MSG_NORMAL_8814A 0x01A0 ++#define REG_C2HEVT_CLEAR_8814A 0x01AF ++#define REG_MCUTST_1_8814A 0x01C0 ++#define REG_MCUTST_WOWLAN_8814A 0x01C7 ++#define REG_FMETHR_8814A 0x01C8 ++#define REG_HMETFR_8814A 0x01CC ++#define REG_HMEBOX_0_8814A 0x01D0 ++#define REG_HMEBOX_1_8814A 0x01D4 ++#define REG_HMEBOX_2_8814A 0x01D8 ++#define REG_HMEBOX_3_8814A 0x01DC ++#define REG_LLT_INIT_8814A 0x01E0 ++#define REG_LLT_ADDR_8814A 0x01E4 //20130415 KaiYuan add for 8814 ++#define REG_HMEBOX_EXT0_8814A 0x01F0 ++#define REG_HMEBOX_EXT1_8814A 0x01F4 ++#define REG_HMEBOX_EXT2_8814A 0x01F8 ++#define REG_HMEBOX_EXT3_8814A 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_FIFOPAGE_CTRL_1_8814A 0x0200 ++#define REG_FIFOPAGE_CTRL_2_8814A 0x0204 ++#define REG_AUTO_LLT_8814A 0x0208 ++#define REG_TXDMA_OFFSET_CHK_8814A 0x020C ++#define REG_TXDMA_STATUS_8814A 0x0210 ++#define REG_RQPN_NPQ_8814A 0x0214 ++#define REG_TQPNT1_8814A 0x0218 ++#define REG_TQPNT2_8814A 0x021C ++#define REG_TQPNT3_8814A 0x0220 ++#define REG_TQPNT4_8814A 0x0224 ++#define REG_RQPN_CTRL_1_8814A 0x0228 ++#define REG_RQPN_CTRL_2_8814A 0x022C ++#define REG_FIFOPAGE_INFO_1_8814A 0x0230 ++#define REG_FIFOPAGE_INFO_2_8814A 0x0234 ++#define REG_FIFOPAGE_INFO_3_8814A 0x0238 ++#define REG_FIFOPAGE_INFO_4_8814A 0x023C ++#define REG_FIFOPAGE_INFO_5_8814A 0x0240 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH_8814A 0x0280 ++#define REG_RXPKT_NUM_8814A 0x0284 // The number of packets in RXPKTBUF. ++#define REG_RXDMA_CONTROL_8814A 0x0286 // ?????? Control the RX DMA. ++#define REG_RXDMA_STATUS_8814A 0x0288 ++#define REG_RXDMA_MODE_8814A 0x0290 // ?????? ++#define REG_EARLY_MODE_CONTROL_8814A 0x02BC // ?????? ++#define REG_RSVD5_8814A 0x02F0 // ?????? ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8814A 0x0300 ++#define REG_INT_MIG_8814A 0x0304 // Interrupt Migration ++#define REG_BCNQ_TXBD_DESA_8814A 0x0308 // TX Beacon Descriptor Address ++#define REG_MGQ_TXBD_DESA_8814A 0x0310 // TX Manage Queue Descriptor Address ++#define REG_VOQ_TXBD_DESA_8814A 0x0318 // TX VO Queue Descriptor Address ++#define REG_VIQ_TXBD_DESA_8814A 0x0320 // TX VI Queue Descriptor Address ++#define REG_BEQ_TXBD_DESA_8814A 0x0328 // TX BE Queue Descriptor Address ++#define REG_BKQ_TXBD_DESA_8814A 0x0330 // TX BK Queue Descriptor Address ++#define REG_RXQ_RXBD_DESA_8814A 0x0338 // RX Queue Descriptor Address ++#define REG_HI0Q_TXBD_DESA_8814A 0x0340 ++#define REG_HI1Q_TXBD_DESA_8814A 0x0348 ++#define REG_HI2Q_TXBD_DESA_8814A 0x0350 ++#define REG_HI3Q_TXBD_DESA_8814A 0x0358 ++#define REG_HI4Q_TXBD_DESA_8814A 0x0360 ++#define REG_HI5Q_TXBD_DESA_8814A 0x0368 ++#define REG_HI6Q_TXBD_DESA_8814A 0x0370 ++#define REG_HI7Q_TXBD_DESA_8814A 0x0378 ++#define REG_MGQ_TXBD_NUM_8814A 0x0380 ++#define REG_RX_RXBD_NUM_8814A 0x0382 ++#define REG_VOQ_TXBD_NUM_8814A 0x0384 ++#define REG_VIQ_TXBD_NUM_8814A 0x0386 ++#define REG_BEQ_TXBD_NUM_8814A 0x0388 ++#define REG_BKQ_TXBD_NUM_8814A 0x038A ++#define REG_HI0Q_TXBD_NUM_8814A 0x038C ++#define REG_HI1Q_TXBD_NUM_8814A 0x038E ++#define REG_HI2Q_TXBD_NUM_8814A 0x0390 ++#define REG_HI3Q_TXBD_NUM_8814A 0x0392 ++#define REG_HI4Q_TXBD_NUM_8814A 0x0394 ++#define REG_HI5Q_TXBD_NUM_8814A 0x0396 ++#define REG_HI6Q_TXBD_NUM_8814A 0x0398 ++#define REG_HI7Q_TXBD_NUM_8814A 0x039A ++#define REG_TSFTIMER_HCI_8814A 0x039C ++ ++//Read Write Point ++#define REG_VOQ_TXBD_IDX_8814A 0x03A0 ++#define REG_VIQ_TXBD_IDX_8814A 0x03A4 ++#define REG_BEQ_TXBD_IDX_8814A 0x03A8 ++#define REG_BKQ_TXBD_IDX_8814A 0x03AC ++#define REG_MGQ_TXBD_IDX_8814A 0x03B0 ++#define REG_RXQ_TXBD_IDX_8814A 0x03B4 ++#define REG_HI0Q_TXBD_IDX_8814A 0x03B8 ++#define REG_HI1Q_TXBD_IDX_8814A 0x03BC ++#define REG_HI2Q_TXBD_IDX_8814A 0x03C0 ++#define REG_HI3Q_TXBD_IDX_8814A 0x03C4 ++#define REG_HI4Q_TXBD_IDX_8814A 0x03C8 ++#define REG_HI5Q_TXBD_IDX_8814A 0x03CC ++#define REG_HI6Q_TXBD_IDX_8814A 0x03D0 ++#define REG_HI7Q_TXBD_IDX_8814A 0x03D4 ++#define REG_DBG_SEL_V1_8814A 0x03D8 ++#define REG_PCIE_HRPWM1_V1_8814A 0x03D9 ++#define REG_PCIE_HCPWM1_V1_8814A 0x03DA ++#define REG_PCIE_CTRL2_8814A 0x03DB ++#define REG_PCIE_HRPWM2_V1_8814A 0x03DC ++#define REG_PCIE_HCPWM2_V1_8814A 0x03DE ++#define REG_PCIE_H2C_MSG_V1_8814A 0x03E0 ++#define REG_PCIE_C2H_MSG_V1_8814A 0x03E4 ++#define REG_DBI_WDATA_V1_8814A 0x03E8 ++#define REG_DBI_RDATA_V1_8814A 0x03EC ++#define REG_DBI_FLAG_V1_8814A 0x03F0 ++#define REG_MDIO_V1_8814A 0x03F4 ++#define REG_PCIE_MIX_CFG_8814A 0x03F8 ++#define REG_DBG_8814A 0x03FC ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION_8814A 0x0400 ++#define REG_VIQ_INFORMATION_8814A 0x0404 ++#define REG_BEQ_INFORMATION_8814A 0x0408 ++#define REG_BKQ_INFORMATION_8814A 0x040C ++#define REG_MGQ_INFORMATION_8814A 0x0410 ++#define REG_HGQ_INFORMATION_8814A 0x0414 ++#define REG_BCNQ_INFORMATION_8814A 0x0418 ++#define REG_TXPKT_EMPTY_8814A 0x041A ++#define REG_CPU_MGQ_INFORMATION_8814A 0x041C ++#define REG_FWHW_TXQ_CTRL_8814A 0x0420 ++#define REG_HWSEQ_CTRL_8814A 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY_8814A 0x0424 ++//#define REG_MGQ_BDNY_8814A 0x0425 ++#define REG_LIFETIME_EN_8814A 0x0426 ++//#define REG_FW_FREE_TAIL_8814A 0x0427 ++#define REG_SPEC_SIFS_8814A 0x0428 ++#define REG_RETRY_LIMIT_8814A 0x042A ++#define REG_TXBF_CTRL_8814A 0x042C ++#define REG_DARFRC_8814A 0x0430 ++#define REG_RARFRC_8814A 0x0438 ++#define REG_RRSR_8814A 0x0440 ++#define REG_ARFR0_8814A 0x0444 ++#define REG_ARFR1_8814A 0x044C ++#define REG_CCK_CHECK_8814A 0x0454 ++#define REG_AMPDU_MAX_TIME_8814A 0x0455 ++#define REG_TXPKTBUF_BCNQ1_BDNY_8814A 0x0456 ++#define REG_AMPDU_MAX_LENGTH_8814A 0x0458 ++#define REG_ACQ_STOP_8814A 0x045C ++#define REG_NDPA_RATE_8814A 0x045D ++#define REG_TX_HANG_CTRL_8814A 0x045E ++#define REG_NDPA_OPT_CTRL_8814A 0x045F ++#define REG_FAST_EDCA_CTRL_8814A 0x0460 ++#define REG_RD_RESP_PKT_TH_8814A 0x0463 ++#define REG_CMDQ_INFO_8814A 0x0464 ++#define REG_Q4_INFO_8814A 0x0468 ++#define REG_Q5_INFO_8814A 0x046C ++#define REG_Q6_INFO_8814A 0x0470 ++#define REG_Q7_INFO_8814A 0x0474 ++#define REG_WMAC_LBK_BUF_HD_8814A 0x0478 ++#define REG_MGQ_PGBNDY_8814A 0x047A ++#define REG_INIRTS_RATE_SEL_8814A 0x0480 ++#define REG_BASIC_CFEND_RATE_8814A 0x0481 ++#define REG_STBC_CFEND_RATE_8814A 0x0482 ++#define REG_DATA_SC_8814A 0x0483 ++#define REG_MACID_SLEEP3_8814A 0x0484 ++#define REG_MACID_SLEEP1_8814A 0x0488 ++#define REG_ARFR2_8814A 0x048C ++#define REG_ARFR3_8814A 0x0494 ++#define REG_ARFR4_8814A 0x049C ++#define REG_ARFR5_8814A 0x04A4 ++#define REG_TXRPT_START_OFFSET_8814A 0x04AC ++#define REG_TRYING_CNT_TH_8814A 0x04B0 ++#define REG_POWER_STAGE1_8814A 0x04B4 ++#define REG_POWER_STAGE2_8814A 0x04B8 ++#define REG_SW_AMPDU_BURST_MODE_CTRL_8814A 0x04BC ++#define REG_PKT_LIFE_TIME_8814A 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME_8814A 0x04C2 // ?????? ++#define REG_STBC_SETTING_8814A 0x04C4 ++#define REG_STBC_8814A 0x04C5 ++#define REG_QUEUE_CTRL_8814A 0x04C6 ++#define REG_SINGLE_AMPDU_CTRL_8814A 0x04C7 ++#define REG_PROT_MODE_CTRL_8814A 0x04C8 ++#define REG_MAX_AGGR_NUM_8814A 0x04CA ++#define REG_RTS_MAX_AGGR_NUM_8814A 0x04CB ++#define REG_BAR_MODE_CTRL_8814A 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT_8814A 0x04CF ++#define REG_MACID_SLEEP2_8814A 0x04D0 ++#define REG_MACID_SLEEP0_8814A 0x04D4 ++#define REG_HW_SEQ0_8814A 0x04D8 ++#define REG_HW_SEQ1_8814A 0x04DA ++#define REG_HW_SEQ2_8814A 0x04DC ++#define REG_HW_SEQ3_8814A 0x04DE ++#define REG_NULL_PKT_STATUS_8814A 0x04E0 ++#define REG_PTCL_ERR_STATUS_8814A 0x04E2 ++#define REG_DROP_PKT_NUM_8814A 0x04EC ++#define REG_PTCL_TX_RPT_8814A 0x04F0 ++#define REG_Dummy_8814A 0x04FC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM_8814A 0x0500 ++#define REG_EDCA_VI_PARAM_8814A 0x0504 ++#define REG_EDCA_BE_PARAM_8814A 0x0508 ++#define REG_EDCA_BK_PARAM_8814A 0x050C ++#define REG_BCNTCFG_8814A 0x0510 ++#define REG_PIFS_8814A 0x0512 ++#define REG_RDG_PIFS_8814A 0x0513 ++#define REG_SIFS_CTX_8814A 0x0514 ++#define REG_SIFS_TRX_8814A 0x0516 ++#define REG_AGGR_BREAK_TIME_8814A 0x051A ++#define REG_SLOT_8814A 0x051B ++#define REG_TX_PTCL_CTRL_8814A 0x0520 ++#define REG_TXPAUSE_8814A 0x0522 ++#define REG_DIS_TXREQ_CLR_8814A 0x0523 ++#define REG_RD_CTRL_8814A 0x0524 ++// ++// Format for offset 540h-542h: ++// [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. ++// [7:4]: Reserved. ++// [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. ++// [23:20]: Reserved ++// Description: ++// | ++// |<--Setup--|--Hold------------>| ++// --------------|---------------------- ++// | ++// TBTT ++// Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. ++// Described by Designer Tim and Bruce, 2011-01-14. ++// ++#define REG_TBTT_PROHIBIT_8814A 0x0540 ++#define REG_RD_NAV_NXT_8814A 0x0544 ++#define REG_NAV_PROT_LEN_8814A 0x0546 ++#define REG_BCN_CTRL_8814A 0x0550 ++#define REG_BCN_CTRL_1_8814A 0x0551 ++#define REG_MBID_NUM_8814A 0x0552 ++#define REG_DUAL_TSF_RST_8814A 0x0553 ++#define REG_MBSSID_BCN_SPACE_8814A 0x0554 ++#define REG_DRVERLYINT_8814A 0x0558 ++#define REG_BCNDMATIM_8814A 0x0559 ++#define REG_ATIMWND_8814A 0x055A ++#define REG_USTIME_TSF_8814A 0x055C ++#define REG_BCN_MAX_ERR_8814A 0x055D ++#define REG_RXTSF_OFFSET_CCK_8814A 0x055E ++#define REG_RXTSF_OFFSET_OFDM_8814A 0x055F ++#define REG_TSFTR_8814A 0x0560 ++#define REG_CTWND_8814A 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8814A 0x0577 // ?????? ++#define REG_PSTIMER_8814A 0x0580 ++#define REG_TIMER0_8814A 0x0584 ++#define REG_TIMER1_8814A 0x0588 ++#define REG_BCN_PREDL_ITV_8814A 0x058F //Pre download beacon interval ++#define REG_ACMHWCTRL_8814A 0x05C0 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8814A 0x0600 ++#define REG_TCR_8814A 0x0604 ++#define REG_RCR_8814A 0x0608 ++#define REG_RX_PKT_LIMIT_8814A 0x060C ++#define REG_RX_DLK_TIME_8814A 0x060D ++#define REG_RX_DRVINFO_SZ_8814A 0x060F ++ ++#define REG_MACID_8814A 0x0610 ++#define REG_BSSID_8814A 0x0618 ++#define REG_MAR_8814A 0x0620 ++#define REG_MBIDCAMCFG_8814A 0x0628 ++ ++#define REG_USTIME_EDCA_8814A 0x0638 ++#define REG_MAC_SPEC_SIFS_8814A 0x063A ++#define REG_RESP_SIFP_CCK_8814A 0x063C ++#define REG_RESP_SIFS_OFDM_8814A 0x063E ++#define REG_ACKTO_8814A 0x0640 ++#define REG_CTS2TO_8814A 0x0641 ++#define REG_EIFS_8814A 0x0642 ++ ++#define REG_NAV_UPPER_8814A 0x0652 // unit of 128 ++#define REG_TRXPTCL_CTL_8814A 0x0668 ++ ++// Security ++#define REG_CAMCMD_8814A 0x0670 ++#define REG_CAMWRITE_8814A 0x0674 ++#define REG_CAMREAD_8814A 0x0678 ++#define REG_CAMDBG_8814A 0x067C ++#define REG_SECCFG_8814A 0x0680 ++ ++// Power ++#define REG_WOW_CTRL_8814A 0x0690 ++#define REG_PS_RX_INFO_8814A 0x0692 ++#define REG_UAPSD_TID_8814A 0x0693 ++#define REG_WKFMCAM_NUM_8814A 0x0698 ++#define REG_RXFLTMAP0_8814A 0x06A0 ++#define REG_RXFLTMAP1_8814A 0x06A2 ++#define REG_RXFLTMAP2_8814A 0x06A4 ++#define REG_BCN_PSR_RPT_8814A 0x06A8 ++#define REG_BT_COEX_TABLE_8814A 0x06C0 ++#define REG_TX_DATA_RSP_RATE_8814A 0x06DE ++#define REG_ASSOCIATED_BFMER0_INFO_8814A 0x06E4 ++#define REG_ASSOCIATED_BFMER1_INFO_8814A 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8814A 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8814A 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8814A 0x06FC ++ ++// Hardware Port 2 ++#define REG_MACID1_8814A 0x0700 ++#define REG_BSSID1_8814A 0x0708 ++// Hardware Port 3 ++#define REG_MACID2_8814A 0x1620 ++#define REG_BSSID2_8814A 0x1628 ++// Hardware Port 4 ++#define REG_MACID3_8814A 0x1630 ++#define REG_BSSID3_8814A 0x1638 ++// Hardware Port 5 ++#define REG_MACID4_8814A 0x1640 ++#define REG_BSSID4_8814A 0x1648 ++ ++#define REG_ASSOCIATED_BFMEE_SEL_8814A 0x0714 ++#define REG_SND_PTCL_CTRL_8814A 0x0718 ++#define REG_IQ_DUMP_8814A 0x07C0 ++ ++/**** page 19 ****/ ++//TX BeamForming ++#define REG_BB_TXBF_ANT_SET_BF1 0x19ac ++#define REG_BB_TXBF_ANT_SET_BF0 0x19b4 ++ ++// 0x1200h ~ 0x12FFh DDMA CTRL ++// ++//----------------------------------------------------- ++#define REG_DDMA_CH0SA 0x1200 ++#define REG_DDMA_CH0DA 0x1204 ++#define REG_DDMA_CH0CTRL 0x1208 ++#define REG_DDMA_CH1SA 0x1210 ++#define REG_DDMA_CH1DA 0x1214 ++#define REG_DDMA_CH1CTRL 0x1218 ++#define REG_DDMA_CH2SA 0x1220 ++#define REG_DDMA_CH2DA 0x1224 ++#define REG_DDMA_CH2CTRL 0x1228 ++#define REG_DDMA_CH3SA 0x1230 ++#define REG_DDMA_CH3DA 0x1234 ++#define REG_DDMA_CH3CTRL 0x1238 ++#define REG_DDMA_CH4SA 0x1240 ++#define REG_DDMA_CH4DA 0x1244 ++#define REG_DDMA_CH4CTRL 0x1248 ++#define REG_DDMA_CH5SA 0x1250 ++#define REG_DDMA_CH5DA 0x1254 ++#define REG_DDMA_CH5CTRL 0x1258 ++#define REG_DDMA_INT_MSK 0x12E0 ++#define REG_DDMA_CHSTATUS 0x12E8 ++#define REG_DDMA_CHKSUM 0x12F0 ++#define REG_DDMA_MONITER 0x12FC ++ ++#define DDMA_LEN_MASK 0x0001FFFF ++#define FW_CHKSUM_DUMMY_SZ 8 ++#define DDMA_CH_CHKSUM_CNT BIT(24) ++#define DDMA_RST_CHKSUM_STS BIT(25) ++#define DDMA_MODE_BLOCK_CPU BIT(26) ++#define DDMA_CHKSUM_FAIL BIT(27) ++#define DDMA_DA_W_DISABLE BIT(28) ++#define DDMA_CHKSUM_EN BIT(29) ++#define DDMA_CH_OWN BIT(31) ++ ++ ++//3081 FWDL ++#define FWDL_EN BIT0 ++#define IMEM_BOOT_DL_RDY BIT1 ++#define IMEM_BOOT_CHKSUM_FAIL BIT2 ++#define IMEM_DL_RDY BIT3 ++#define IMEM_CHKSUM_OK BIT4 ++#define DMEM_DL_RDY BIT5 ++#define DMEM_CHKSUM_OK BIT6 ++#define EMEM_DL_RDY BIT7 ++#define EMEM_CHKSUM_FAIL BIT8 ++#define EMEM_TXBUF_DL_RDY BIT9 ++#define EMEM_TXBUF_CHKSUM_FAIL BIT10 ++#define CPU_CLK_SWITCH_BUSY BIT11 ++#define CPU_CLK_SEL (BIT12|BIT13) ++#define FWDL_OK BIT14 ++#define FW_INIT_RDY BIT15 ++#define R_EN_BOOT_FLASH BIT20 ++ ++#define OCPBASE_IMEM_3081 0x00000000 ++#define OCPBASE_DMEM_3081 0x00200000 ++#define OCPBASE_RPTBUF_3081 0x18660000 ++#define OCPBASE_RXBUF2_3081 0x18680000 ++#define OCPBASE_RXBUF_3081 0x18700000 ++#define OCPBASE_TXBUF_3081 0x18780000 ++ ++ ++#define REG_FAST_EDCA_VOVI_SETTING_8814A 0x1448 ++#define REG_FAST_EDCA_BEBK_SETTING_8814A 0x144C ++ ++ ++//----------------------------------------------------- ++// ++ ++ ++//----------------------------------------------------- ++// ++// Redifine 8192C register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define EFUSE_CTRL_8814A REG_EFUSE_CTRL_8814A // E-Fuse Control. ++#define EFUSE_TEST_8814A REG_LDO_EFUSE_CTRL_8814A // E-Fuse Test. ++#define MSR_8814A (REG_CR_8814A + 2) // Media Status register ++#define ISR_8814A REG_HISR0_8814A ++#define TSFR_8814A REG_TSFTR_8814A // Timing Sync Function Timer Register. ++ ++#define PBP_8814A REG_PBP_8814A ++ ++// Redifine MACID register, to compatible prior ICs. ++#define IDR0_8814A REG_MACID_8814A // MAC ID Register, Offset 0x0050-0x0053 ++#define IDR4_8814A (REG_MACID_8814A + 4) // MAC ID Register, Offset 0x0054-0x0055 ++ ++ ++// ++// 9. Security Control Registers (Offset: ) ++// ++#define RWCAM_8814A REG_CAMCMD_8814A //IN 8190 Data Sheet is called CAMcmd ++#define WCAMI_8814A REG_CAMWRITE_8814A // Software write CAM input content ++#define RCAMO_8814A REG_CAMREAD_8814A // Software read/write CAM config ++#define CAMDBG_8814A REG_CAMDBG_8814A ++#define SECR_8814A REG_SECCFG_8814A //Security Configuration Register ++ ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8814A 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8814A BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8814A BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8814A BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8814A BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8814A BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8814A BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8814A BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8814A BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8814A BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8814A BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8814A BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8814A BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8814A BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8814A BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8814A BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8814A BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8814A BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8814A BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8814A BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8814A BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8814A BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8814A BIT2 // AC_VO DMA OK ++#define IMR_RDU_8814A BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8814A BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_MCUERR_8814A BIT28 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT7_8814A BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8814A BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8814A BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8814A BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8814A BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8814A BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8814A BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8814A BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8814A BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8814A BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8814A BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8814A BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8814A BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8814A BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8814A BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8814A BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8814A BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8814A BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8814A BIT8 // Receive FIFO Overflow ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define IMR_TX_MASK (IMR_VODOK_8814A | IMR_VIDOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A | IMR_MGNTDOK_8814A | IMR_HIGHDOK_8814A) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8814A | IMR_TXBCN0OK_8814A | IMR_TXBCN0ERR_8814A | IMR_BCNDERR0_8814A) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8814A | IMR_VODOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A) ++#endif ++ ++ ++/*=================================================================== ++===================================================================== ++Here the register defines are for 92C. When the define is as same with 92C, ++we will use the 92C's define for the consistency ++So the following defines for 92C is not entire!!!!!! ++===================================================================== ++=====================================================================*/ ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++ ++//2 Special Option ++#define USB_AGG_EN_8814A BIT(7) ++#define REG_USB_HRPWM_U3 0xF052 ++ ++#define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A 2048-1 //20130415 KaiYuan add for 8814 ++ ++#define MACID_NUM_8814A 128 ++#define SEC_CAM_ENT_NUM_8814A 64 ++#define NSS_NUM_8814A 3 ++#define BAND_CAP_8814A (BAND_CAP_2G | BAND_CAP_5G) ++#define BW_CAP_8814A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) ++ ++#endif //__RTL8814A_SPEC_H__ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_sreset.h new file mode 100644 -index 000000000..af26460ad +index 0000000..af26460 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_sreset.h @@ -0,0 +1,30 @@ @@ -297380,621 +338812,621 @@ index 000000000..af26460ad + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_xmit.h new file mode 100644 -index 000000000..940e293c0 +index 0000000..c005bc5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8814a_xmit.h @@ -0,0 +1,309 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8814A_XMIT_H__ -+#define __RTL8814A_XMIT_H__ -+ -+typedef struct txdescriptor_8814 -+{ -+ // Offset 0 -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+}TXDESC_8814, *PTXDESC_8814; -+ -+ -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+ -+ -+ -+#ifdef CONFIG_SDIO_HCI -+#define SET_TX_DESC_SDIO_TXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+#endif //CONFIG_SDIO_HCI -+ -+//----------------------------------------------------------------- -+// RTL8814A TX BUFFER DESC -+//----------------------------------------------------------------- -+/* -+- Each TXBD has 4 segment. -+ -- For 32 bit, each segment is 8 bytes. -+ -- For 64 bit, each segment is 16 bytes. -+*/ -+#if 0 -+#if 1 /* 32 bit */ -+#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8), 0, 16, __Value) -+#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8)+4, 0, 32, __Value) -+#else /* 64 bit */ -+#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16), 0, 16, __Value) -+#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+4, 0, 32, __Value) -+#endif -+#define SET_TX_EXTBUFF_DESC_ADDR_HIGH_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+8, 0, 32, __Value) -+#endif -+/*c2h-DWORD 2*/ -+#define GET_RX_STATUS_DESC_RPT_SEL_8814A(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+8, 28, 1) -+ -+//========================================================= -+// for Txfilldescroptor8814Ae, fill the desc content. -+#if 1 /* 32 bit */ -+#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 0, 16, __Valeu) -+#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 31, 1, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8)+4, 0, 32, __Valeu) -+#else /* 64 bit */ -+#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) -+#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) -+#endif -+#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -+ -+//========================================================= -+ -+//TX buffer -+//============= -+// Dword 0 -+#define SET_TX_BUFF_DESC_LEN_0_8814A(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Valeu) -+#define SET_TX_BUFF_DESC_PSB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -+#define SET_TX_BUFF_DESC_OWN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+#define GET_TX_BUFF_DESC_OWN_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+// Dword 1 -+#define SET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -+#define GET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -+// Dword 2 -+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) -+#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -+// Dword 3 //RESERVED 0 -+ -+#if 0 /* 64 bit */ -+// Dword 4 -+#define SET_TX_BUFF_DESC_LEN_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 16, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 31, 1, __Value) -+// Dword 5 -+#define SET_TX_BUFF_DESC_ADDR_LOW_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 32, __Value) -+// Dword 6 -+#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 32, __Value) -+// Dword 7 //RESERVED 0 -+// Dword 8 -+#define SET_TX_BUFF_DESC_LEN_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 16, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 31, 1, __Value) -+// Dword 9 -+#define SET_TX_BUFF_DESC_ADDR_LOW_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 32, __Value) -+// Dword 10 -+#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+// Dword 11 //RESERVED 0 -+// Dword 12 -+#define SET_TX_BUFF_DESC_LEN_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 16, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 31, 1, __Value) -+// Dword 13 -+#define SET_TX_BUFF_DESC_ADDR_LOW_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+52, 0, 32, __Value) -+// Dword 14 -+#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+56, 0, 32, __Value) -+// Dword 15 //RESERVED 0 -+#endif -+ -+//=====Desc content -+//TX Info -+//============= -+// Dword 0 -+#define SET_TX_DESC_PKT_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define GET_TX_DESC_PKT_SIZE_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc, 0, 16) -+#define SET_TX_DESC_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define GET_TX_DESC_OFFSET_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc, 16, 8) -+#define SET_TX_DESC_BMC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_LINIP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_AMSDU_PAD_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_DISQSELSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+// Dword 1 -+#define SET_TX_DESC_MACID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+#define SET_TX_DESC_MORE_DATA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_CAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_MODE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) -+ -+ -+// Dword 2 -+#define SET_TX_DESC_PAID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_NULL_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -+#define SET_TX_DESC_NULL_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -+#define SET_TX_DESC_BK_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define GET_TX_DESC_MORE_FRAG_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) -+#define SET_TX_DESC_RAW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_SPE_RPT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_NULL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+#define SET_TX_DESC_HW_AES_IV_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 31, 1, __Value) -+ -+ -+// Dword 3 -+#define SET_TX_DESC_WHEADER_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 5, __Value) -+#define SET_TX_DESC_EARLY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HW_SSN_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_CHECK_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+// Dword 4 -+#define SET_TX_DESC_TX_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_TRY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+#define SET_TX_DESC_PCTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -+#define SET_TX_DESC_PCTS_MASK_IDX_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) -+ -+ -+// Dword 5 -+#define SET_TX_DESC_DATA_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_CTROL_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_SIGNALING_TA_PKT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 17, 1, __Value) -+#define SET_TX_DESC_PORT_ID_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 3, __Value)//20130415 KaiYuan add for 8814 -+#define SET_TX_DESC_TX_ANT_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) -+#define SET_TX_DESC_TX_POWER_OFFSET_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) -+ -+// Dword 6 -+#define SET_TX_DESC_SW_DEFINE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_ANTSEL_A_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANT_MAPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 2, __Value) -+#define SET_TX_DESC_ANT_MAPB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 24, 2, __Value) -+#define SET_TX_DESC_ANT_MAPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 26, 2, __Value) -+#define SET_TX_DESC_ANT_MAPD_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 28, 2, __Value) -+ -+ -+// Dword 7 -+#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) -+#define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#else -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value) -+#define SET_TX_DESC_USB_TXAGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ -+ -+// Dword 8 -+#define SET_TX_DESC_RTS_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -+#define SET_TX_DESC_BAR_RTY_TH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -+#define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -+#define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value) -+#define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+#if(DEV_BUS_TYPE != RT_SDIO_INTERFACE) -+#define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -+#else -+#define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) //20130415 KaiYuan add for 8814AS -+#endif -+#define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) -+ -+// Dword 9 -+#define SET_TX_DESC_PADDING_LENGTH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -+#define SET_TX_DESC_TXBF_PATH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) -+#define SET_TX_DESC_SEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+#define SET_TX_DESC_NEXT_HEAD_PAGE_H_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 4, __Value) -+#define SET_TX_DESC_TAIL_PAGE_H_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 28, 4, __Value) -+ -+ -+ -+#define SET_EARLYMODE_PKTNUM_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+ -+void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc); -+void rtl8814a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); -+void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8814au_init_xmit_priv(PADAPTER padapter); -+void rtl8814au_free_xmit_priv(PADAPTER padapter); -+s32 rtl8814au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8814au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8814au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8814au_xmit_buf_handler(PADAPTER padapter); -+void rtl8814au_xmit_tasklet(void *priv); -+s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif //CONFIG_USB_HCI -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8814ae_init_xmit_priv(PADAPTER padapter); -+void rtl8814ae_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8814ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8814ae_xmitframe_resume(_adapter *padapter); -+s32 rtl8814ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8814ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8814ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8814ae_xmit_tasklet(void *priv); -+#endif -+ -+void _dbg_dump_tx_info(_adapter *padapter,int frame_tag, u8 *ptxdesc); -+u8 -+SCMapping_8814( -+ IN PADAPTER Adapter, -+ IN struct pkt_attrib *pattrib -+); -+ -+u8 -+BWMapping_8814( -+ IN PADAPTER Adapter, -+ IN struct pkt_attrib *pattrib -+); -+ -+ -+#endif /* __RTL8814_XMIT_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_XMIT_H__ ++#define __RTL8814A_XMIT_H__ ++ ++typedef struct txdescriptor_8814 ++{ ++ // Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++}TXDESC_8814, *PTXDESC_8814; ++ ++ ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++ ++ ++ ++#ifdef CONFIG_SDIO_HCI ++#define SET_TX_DESC_SDIO_TXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif //CONFIG_SDIO_HCI ++ ++//----------------------------------------------------------------- ++// RTL8814A TX BUFFER DESC ++//----------------------------------------------------------------- ++/* ++- Each TXBD has 4 segment. ++ -- For 32 bit, each segment is 8 bytes. ++ -- For 64 bit, each segment is 16 bytes. ++*/ ++#if 0 ++#if 1 /* 32 bit */ ++#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8), 0, 16, __Value) ++#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8)+4, 0, 32, __Value) ++#else /* 64 bit */ ++#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16), 0, 16, __Value) ++#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+4, 0, 32, __Value) ++#endif ++#define SET_TX_EXTBUFF_DESC_ADDR_HIGH_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+8, 0, 32, __Value) ++#endif ++/*c2h-DWORD 2*/ ++#define GET_RX_STATUS_DESC_RPT_SEL_8814A(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+8, 28, 1) ++ ++//========================================================= ++// for Txfilldescroptor8814Ae, fill the desc content. ++#if 1 /* 32 bit */ ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8)+4, 0, 32, __Valeu) ++#else /* 64 bit */ ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) ++#endif ++#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) ++ ++//========================================================= ++ ++//TX buffer ++//============= ++// Dword 0 ++#define SET_TX_BUFF_DESC_LEN_0_8814A(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Valeu) ++#define SET_TX_BUFF_DESC_PSB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) ++#define SET_TX_BUFF_DESC_OWN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++#define GET_TX_BUFF_DESC_OWN_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++// Dword 1 ++#define SET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) ++#define GET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) ++// Dword 2 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) ++#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) ++// Dword 3 //RESERVED 0 ++ ++#if 0 /* 64 bit */ ++// Dword 4 ++#define SET_TX_BUFF_DESC_LEN_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 16, __Value) ++#define SET_TX_BUFF_DESC_AMSDU_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 31, 1, __Value) ++// Dword 5 ++#define SET_TX_BUFF_DESC_ADDR_LOW_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 32, __Value) ++// Dword 6 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 32, __Value) ++// Dword 7 //RESERVED 0 ++// Dword 8 ++#define SET_TX_BUFF_DESC_LEN_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 16, __Value) ++#define SET_TX_BUFF_DESC_AMSDU_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 31, 1, __Value) ++// Dword 9 ++#define SET_TX_BUFF_DESC_ADDR_LOW_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 32, __Value) ++// Dword 10 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++// Dword 11 //RESERVED 0 ++// Dword 12 ++#define SET_TX_BUFF_DESC_LEN_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 16, __Value) ++#define SET_TX_BUFF_DESC_AMSDU_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 31, 1, __Value) ++// Dword 13 ++#define SET_TX_BUFF_DESC_ADDR_LOW_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+52, 0, 32, __Value) ++// Dword 14 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+56, 0, 32, __Value) ++// Dword 15 //RESERVED 0 ++#endif ++ ++//=====Desc content ++//TX Info ++//============= ++// Dword 0 ++#define SET_TX_DESC_PKT_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define GET_TX_DESC_PKT_SIZE_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc, 0, 16) ++#define SET_TX_DESC_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define GET_TX_DESC_OFFSET_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc, 16, 8) ++#define SET_TX_DESC_BMC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_LINIP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_AMSDU_PAD_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_DISQSELSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++#define SET_TX_DESC_MORE_DATA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_CAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_MODE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_NULL_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) ++#define SET_TX_DESC_NULL_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) ++#define SET_TX_DESC_BK_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define GET_TX_DESC_MORE_FRAG_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) ++#define SET_TX_DESC_RAW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_NULL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++#define SET_TX_DESC_HW_AES_IV_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 31, 1, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 5, __Value) ++#define SET_TX_DESC_EARLY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HW_SSN_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_CHECK_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_TRY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++#define SET_TX_DESC_PCTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) ++#define SET_TX_DESC_PCTS_MASK_IDX_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++#define SET_TX_DESC_SIGNALING_TA_PKT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 17, 1, __Value) ++#define SET_TX_DESC_PORT_ID_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 3, __Value)//20130415 KaiYuan add for 8814 ++#define SET_TX_DESC_TX_ANT_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) ++#define SET_TX_DESC_TX_POWER_OFFSET_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANT_MAPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 2, __Value) ++#define SET_TX_DESC_ANT_MAPB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 24, 2, __Value) ++#define SET_TX_DESC_ANT_MAPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 26, 2, __Value) ++#define SET_TX_DESC_ANT_MAPD_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 28, 2, __Value) ++ ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value) ++#define SET_TX_DESC_USB_TXAGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++ ++ ++// Dword 8 ++#define SET_TX_DESC_RTS_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) ++#define SET_TX_DESC_BAR_RTY_TH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) ++#define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) ++#define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value) ++#define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++#if(DEV_BUS_TYPE != RT_SDIO_INTERFACE) ++#define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) ++#else ++#define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) //20130415 KaiYuan add for 8814AS ++#endif ++#define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_PADDING_LENGTH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) ++#define SET_TX_DESC_TXBF_PATH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) ++#define SET_TX_DESC_SEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++#define SET_TX_DESC_NEXT_HEAD_PAGE_H_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 4, __Value) ++#define SET_TX_DESC_TAIL_PAGE_H_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 28, 4, __Value) ++ ++ ++ ++#define SET_EARLYMODE_PKTNUM_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++ ++void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc); ++void rtl8814a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8814au_init_xmit_priv(PADAPTER padapter); ++void rtl8814au_free_xmit_priv(PADAPTER padapter); ++s32 rtl8814au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8814au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8814au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8814au_xmit_buf_handler(PADAPTER padapter); ++void rtl8814au_xmit_tasklet(void *priv); ++s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif //CONFIG_USB_HCI ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8814ae_init_xmit_priv(PADAPTER padapter); ++void rtl8814ae_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8814ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8814ae_xmitframe_resume(_adapter *padapter); ++s32 rtl8814ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8814ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8814ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8814ae_xmit_tasklet(void *priv); ++#endif ++ ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag, u8 *ptxdesc); ++u8 ++SCMapping_8814( ++ IN PADAPTER Adapter, ++ IN struct pkt_attrib *pattrib ++); ++ ++u8 ++BWMapping_8814( ++ IN PADAPTER Adapter, ++ IN struct pkt_attrib *pattrib ++); ++ ++ ++#endif /* __RTL8814_XMIT_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8821a_spec.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8821a_spec.h new file mode 100644 -index 000000000..01f13826f +index 0000000..10a616b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8821a_spec.h @@ -0,0 +1,107 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ *******************************************************************************/ -+#ifndef __RTL8821A_SPEC_H__ -+#define __RTL8821A_SPEC_H__ -+ -+#include -+// This file should based on "hal_com_reg.h" -+#include -+// Because 8812a and 8821a is the same serial, -+// most of 8821a register definitions are the same as 8812a. -+#include -+ -+ -+//============================================================ -+// 8821A Regsiter offset definition -+//============================================================ -+ -+//============================================================ -+// MAC register -+//============================================================ -+ -+//----------------------------------------------------- -+// 0x0000h ~ 0x00FFh System Configuration -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// 0x0100h ~ 0x01FFh MACTOP General Configuration -+//----------------------------------------------------- -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+//----------------------------------------------------- -+// 0x0200h ~ 0x027Fh TXDMA Configuration -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// 0x0280h ~ 0x02FFh RXDMA Configuration -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// 0x0300h ~ 0x03FFh PCIe -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// 0x0400h ~ 0x047Fh Protocol Configuration -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// 0x0500h ~ 0x05FFh EDCA Configuration -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// 0x0600h ~ 0x07FFh WMAC Configuration -+//----------------------------------------------------- -+ -+ -+//============================================================ -+// SDIO Bus Specification -+//============================================================ -+ -+//----------------------------------------------------- -+// SDIO CMD Address Mapping -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// I/O bus domain (Host) -+//----------------------------------------------------- -+ -+//----------------------------------------------------- -+// SDIO register -+//----------------------------------------------------- -+#undef SDIO_REG_HCPWM1 -+#define SDIO_REG_FREE_TXPG2 0x024 -+#define SDIO_REG_HCPWM1 0x025 -+ -+ -+//============================================================ -+// Regsiter Bit and Content definition -+//============================================================ -+ -+//======================================================== -+// General definitions -+//======================================================== -+ -+#define MACID_NUM_8821A 128 -+#define SEC_CAM_ENT_NUM_8821A 64 -+#define NSS_NUM_8821A 1 -+#define BAND_CAP_8821A (BAND_CAP_2G | BAND_CAP_5G) -+#define BW_CAP_8821A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) -+ -+#endif /* __RTL8821A_SPEC_H__ */ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8821A_SPEC_H__ ++#define __RTL8821A_SPEC_H__ ++ ++#include ++// This file should based on "hal_com_reg.h" ++#include ++// Because 8812a and 8821a is the same serial, ++// most of 8821a register definitions are the same as 8812a. ++#include ++ ++ ++//============================================================ ++// 8821A Regsiter offset definition ++//============================================================ ++ ++//============================================================ ++// MAC register ++//============================================================ ++ ++//----------------------------------------------------- ++// 0x0000h ~ 0x00FFh System Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++//----------------------------------------------------- ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++//----------------------------------------------------- ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0300h ~ 0x03FFh PCIe ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0400h ~ 0x047Fh Protocol Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0500h ~ 0x05FFh EDCA Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0600h ~ 0x07FFh WMAC Configuration ++//----------------------------------------------------- ++ ++ ++//============================================================ ++// SDIO Bus Specification ++//============================================================ ++ ++//----------------------------------------------------- ++// SDIO CMD Address Mapping ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// I/O bus domain (Host) ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// SDIO register ++//----------------------------------------------------- ++#undef SDIO_REG_HCPWM1 ++#define SDIO_REG_FREE_TXPG2 0x024 ++#define SDIO_REG_HCPWM1 0x025 ++ ++ ++//============================================================ ++// Regsiter Bit and Content definition ++//============================================================ ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8821A 128 ++#define SEC_CAM_ENT_NUM_8821A 64 ++#define NSS_NUM_8821A 1 ++#define BAND_CAP_8821A (BAND_CAP_2G | BAND_CAP_5G) ++#define BW_CAP_8821A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) ++ ++#endif /* __RTL8821A_SPEC_H__ */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtl8821a_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8821a_xmit.h new file mode 100644 -index 000000000..8128f8025 +index 0000000..2b7320d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtl8821a_xmit.h @@ -0,0 +1,180 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTL8821A_XMIT_H__ -+#define __RTL8821A_XMIT_H__ -+ -+#include -+ -+typedef struct txdescriptor_8821a -+{ -+ // Offset 0 -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 rsvd0026:1; -+ u32 rsvd0027:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 rsvd0031:1; -+ -+ // Offset 4 -+ u32 macid:7; -+ u32 rsvd0407:1; -+ u32 qsel:5; -+ u32 rdg_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:5; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 pkt_offset:5; // unit: 8 bytes -+ u32 moredata:1; -+ u32 txop_ps_cap:1; -+ u32 txop_ps_mode:1; -+ -+ // Offset 8 -+ u32 p_aid:9; -+ u32 rsvd0809:1; -+ u32 cca_rts:2; -+ u32 agg_en:1; -+ u32 rdg_en:1; -+ u32 null_0:1; -+ u32 null_1:1; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 spe_rpt:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 g_id:6; -+ u32 rsvd0830:2; -+ -+ // Offset 12 -+ u32 wheader_len:4; -+ u32 chk_en:1; -+ u32 early_rate:1; -+ u32 hw_ssn_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 navusehdr:1; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 ndpa:2; -+ u32 ampdu_max_time:8; -+ -+ // Offset 16 -+ u32 datarate:7; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 rtsrate:5; -+ u32 pcts_en:1; -+ u32 pcts_mask_idx:2; -+ -+ // Offset 20 -+ u32 data_sc:4; -+ u32 data_short:1; -+ u32 data_bw:2; -+ u32 data_ldpc:1; -+ u32 data_stbc:2; -+ u32 vcs_stbc:2; -+ u32 rts_short:1; -+ u32 rts_sc:4; -+ u32 rsvd2016:7; -+ u32 tx_ant:4; -+ u32 txpwr_offset:3; -+ u32 rsvd2031:1; -+ -+ // Offset 24 -+ u32 sw_define:12; -+ u32 mbssid:4; -+ u32 antsel_A:3; -+ u32 antsel_B:3; -+ u32 antsel_C:3; -+ u32 antsel_D:3; -+ u32 rsvd2428:4; -+ -+ // Offset 28 -+ u32 checksum:16; -+ u32 rsvd2816:8; -+ u32 usb_txagg_num:8; -+ -+ // Offset 32 -+ u32 rts_rc:6; -+ u32 bar_rty_th:2; -+ u32 data_rc:6; -+ u32 rsvd3214:1; -+ u32 en_hwseq:1; -+ u32 nextneadpage:8; -+ u32 tailpage:8; -+ -+ // Offset 36 -+ u32 padding_len:11; -+ u32 txbf_path:1; -+ u32 seq:12; -+ u32 final_data_rate:8; -+}TXDESC_8821A, *PTXDESC_8821A; -+ -+#ifdef CONFIG_SDIO_HCI -+s32 InitXmitPriv8821AS(PADAPTER padapter); -+void FreeXmitPriv8821AS(PADAPTER padapter); -+s32 XmitBufHandler8821AS(PADAPTER padapter); -+s32 MgntXmit8821AS(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 HalXmitNoLock8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 HalXmit8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); -+#ifndef CONFIG_SDIO_TX_TASKLET -+thread_return XmitThread8821AS(thread_context context); -+#endif // !CONFIG_SDIO_TX_TASKLET -+#endif // CONFIG_SDIO_HCI -+ -+#if 0 -+#ifdef CONFIG_USB_HCI -+s32 rtl8821au_init_xmit_priv(PADAPTER padapter); -+void rtl8821au_free_xmit_priv(PADAPTER padapter); -+s32 rtl8821au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8821au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8821au_hal_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8821au_xmit_buf_handler(PADAPTER padapter); -+void rtl8821au_xmit_tasklet(void *priv); -+s32 rtl8821au_xmitframe_complete(PADAPTER padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif // CONFIG_USB_HCI -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8821e_init_xmit_priv(PADAPTER padapter); -+void rtl8821e_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf* rtl8821e_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8821e_xmitframe_resume(PADAPTER padapter); -+s32 rtl8821e_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8821e_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+void rtl8821e_xmit_tasklet(void *priv); -+#endif // CONFIG_PCI_HCI -+#endif -+ -+#endif //__RTL8821_XMIT_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8821A_XMIT_H__ ++#define __RTL8821A_XMIT_H__ ++ ++#include ++ ++typedef struct txdescriptor_8821a ++{ ++ // Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 rsvd0026:1; ++ u32 rsvd0027:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 rsvd0031:1; ++ ++ // Offset 4 ++ u32 macid:7; ++ u32 rsvd0407:1; ++ u32 qsel:5; ++ u32 rdg_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:5; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 moredata:1; ++ u32 txop_ps_cap:1; ++ u32 txop_ps_mode:1; ++ ++ // Offset 8 ++ u32 p_aid:9; ++ u32 rsvd0809:1; ++ u32 cca_rts:2; ++ u32 agg_en:1; ++ u32 rdg_en:1; ++ u32 null_0:1; ++ u32 null_1:1; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 spe_rpt:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 g_id:6; ++ u32 rsvd0830:2; ++ ++ // Offset 12 ++ u32 wheader_len:4; ++ u32 chk_en:1; ++ u32 early_rate:1; ++ u32 hw_ssn_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 navusehdr:1; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 ndpa:2; ++ u32 ampdu_max_time:8; ++ ++ // Offset 16 ++ u32 datarate:7; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 rtsrate:5; ++ u32 pcts_en:1; ++ u32 pcts_mask_idx:2; ++ ++ // Offset 20 ++ u32 data_sc:4; ++ u32 data_short:1; ++ u32 data_bw:2; ++ u32 data_ldpc:1; ++ u32 data_stbc:2; ++ u32 vcs_stbc:2; ++ u32 rts_short:1; ++ u32 rts_sc:4; ++ u32 rsvd2016:7; ++ u32 tx_ant:4; ++ u32 txpwr_offset:3; ++ u32 rsvd2031:1; ++ ++ // Offset 24 ++ u32 sw_define:12; ++ u32 mbssid:4; ++ u32 antsel_A:3; ++ u32 antsel_B:3; ++ u32 antsel_C:3; ++ u32 antsel_D:3; ++ u32 rsvd2428:4; ++ ++ // Offset 28 ++ u32 checksum:16; ++ u32 rsvd2816:8; ++ u32 usb_txagg_num:8; ++ ++ // Offset 32 ++ u32 rts_rc:6; ++ u32 bar_rty_th:2; ++ u32 data_rc:6; ++ u32 rsvd3214:1; ++ u32 en_hwseq:1; ++ u32 nextneadpage:8; ++ u32 tailpage:8; ++ ++ // Offset 36 ++ u32 padding_len:11; ++ u32 txbf_path:1; ++ u32 seq:12; ++ u32 final_data_rate:8; ++}TXDESC_8821A, *PTXDESC_8821A; ++ ++#ifdef CONFIG_SDIO_HCI ++s32 InitXmitPriv8821AS(PADAPTER padapter); ++void FreeXmitPriv8821AS(PADAPTER padapter); ++s32 XmitBufHandler8821AS(PADAPTER padapter); ++s32 MgntXmit8821AS(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 HalXmitNoLock8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 HalXmit8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); ++#ifndef CONFIG_SDIO_TX_TASKLET ++thread_return XmitThread8821AS(thread_context context); ++#endif // !CONFIG_SDIO_TX_TASKLET ++#endif // CONFIG_SDIO_HCI ++ ++#if 0 ++#ifdef CONFIG_USB_HCI ++s32 rtl8821au_init_xmit_priv(PADAPTER padapter); ++void rtl8821au_free_xmit_priv(PADAPTER padapter); ++s32 rtl8821au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8821au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8821au_hal_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8821au_xmit_buf_handler(PADAPTER padapter); ++void rtl8821au_xmit_tasklet(void *priv); ++s32 rtl8821au_xmitframe_complete(PADAPTER padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif // CONFIG_USB_HCI ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8821e_init_xmit_priv(PADAPTER padapter); ++void rtl8821e_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf* rtl8821e_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8821e_xmitframe_resume(PADAPTER padapter); ++s32 rtl8821e_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8821e_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++void rtl8821e_xmit_tasklet(void *priv); ++#endif // CONFIG_PCI_HCI ++#endif ++ ++#endif //__RTL8821_XMIT_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_android.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_android.h new file mode 100644 -index 000000000..5b52846f2 +index 0000000..5b52846 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_android.h @@ -0,0 +1,113 @@ @@ -298113,249 +339545,249 @@ index 000000000..5b52846f2 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ap.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ap.h new file mode 100644 -index 000000000..f8246c673 +index 0000000..9eaf324 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ap.h @@ -0,0 +1,80 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTW_AP_H_ -+#define __RTW_AP_H_ -+ -+ -+#ifdef CONFIG_AP_MODE -+ -+//external function -+extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); -+extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); -+ -+ -+void init_mlme_ap_info(_adapter *padapter); -+void free_mlme_ap_info(_adapter *padapter); -+//void update_BCNTIM(_adapter *padapter); -+void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len); -+void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index); -+void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag); -+#define update_beacon(adapter, ie_id, oui, tx) _update_beacon((adapter), (ie_id), (oui), (tx), __func__) -+void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level); -+void expire_timeout_chk(_adapter *padapter); -+void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); -+void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter); -+void start_bss_network(_adapter *padapter, struct createbss_parm *parm); -+int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); -+void rtw_ap_restore_network(_adapter *padapter); -+void rtw_set_macaddr_acl(_adapter *padapter, int mode); -+int rtw_acl_add_sta(_adapter *padapter, u8 *addr); -+int rtw_acl_remove_sta(_adapter *padapter, u8 *addr); -+ -+u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta); -+int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid); -+int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx); -+ -+#ifdef CONFIG_NATIVEAP_MLME -+void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type); -+void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta); -+u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta); -+void sta_info_update(_adapter *padapter, struct sta_info *psta); -+void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); -+u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue); -+int rtw_sta_flush(_adapter *padapter, bool enqueue); -+int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset); -+void start_ap_mode(_adapter *padapter); -+void stop_ap_mode(_adapter *padapter); -+#endif -+ -+void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset); -+bool rtw_ap_chbw_decision(_adapter *adapter, u8 req_ch, u8 req_bw, u8 req_offset, u8 *ch, u8 *bw, u8 *offset); -+ -+#ifdef CONFIG_AUTO_AP_MODE -+extern void rtw_start_auto_ap(_adapter *adapter); -+#endif //CONFIG_AUTO_AP_MODE -+ -+#endif //end of CONFIG_AP_MODE -+ -+#endif -+void update_bmc_sta(_adapter *padapter); -+ -+void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field); -+void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len); -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_AP_H_ ++#define __RTW_AP_H_ ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++//external function ++extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); ++extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); ++ ++ ++void init_mlme_ap_info(_adapter *padapter); ++void free_mlme_ap_info(_adapter *padapter); ++//void update_BCNTIM(_adapter *padapter); ++void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len); ++void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index); ++void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag); ++#define update_beacon(adapter, ie_id, oui, tx) _update_beacon((adapter), (ie_id), (oui), (tx), __func__) ++void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level); ++void expire_timeout_chk(_adapter *padapter); ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); ++void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter); ++void start_bss_network(_adapter *padapter, struct createbss_parm *parm); ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); ++void rtw_ap_restore_network(_adapter *padapter); ++void rtw_set_macaddr_acl(_adapter *padapter, int mode); ++int rtw_acl_add_sta(_adapter *padapter, u8 *addr); ++int rtw_acl_remove_sta(_adapter *padapter, u8 *addr); ++ ++u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta); ++int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid); ++int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx); ++ ++#ifdef CONFIG_NATIVEAP_MLME ++void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type); ++void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta); ++u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta); ++void sta_info_update(_adapter *padapter, struct sta_info *psta); ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); ++u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue); ++int rtw_sta_flush(_adapter *padapter, bool enqueue); ++int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset); ++void start_ap_mode(_adapter *padapter); ++void stop_ap_mode(_adapter *padapter); ++#endif ++ ++void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset); ++bool rtw_ap_chbw_decision(_adapter *adapter, u8 req_ch, u8 req_bw, u8 req_offset, u8 *ch, u8 *bw, u8 *offset); ++ ++#ifdef CONFIG_AUTO_AP_MODE ++extern void rtw_start_auto_ap(_adapter *adapter); ++#endif //CONFIG_AUTO_AP_MODE ++ ++#endif //end of CONFIG_AP_MODE ++ ++#endif ++void update_bmc_sta(_adapter *padapter); ++ ++void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field); ++void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len); ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_beamforming.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_beamforming.h new file mode 100644 -index 000000000..fde61003d +index 0000000..8f71afd --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_beamforming.h @@ -0,0 +1,150 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTW_BEAMFORMING_H_ -+#define __RTW_BEAMFORMING_H_ -+ -+#ifdef CONFIG_BEAMFORMING -+ -+#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ -+#define BEAMFORMING_ENTRY_NUM 2 -+#define GET_BEAMFORM_INFO(_pmlmepriv) ((struct beamforming_info *)(&(_pmlmepriv)->beamforming_info)) -+ -+ -+typedef enum _BEAMFORMING_ENTRY_STATE -+{ -+ BEAMFORMING_ENTRY_STATE_UNINITIALIZE, -+ BEAMFORMING_ENTRY_STATE_INITIALIZEING, -+ BEAMFORMING_ENTRY_STATE_INITIALIZED, -+ BEAMFORMING_ENTRY_STATE_PROGRESSING, -+ BEAMFORMING_ENTRY_STATE_PROGRESSED, -+}BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; -+ -+ -+typedef enum _BEAMFORMING_STATE -+{ -+ BEAMFORMING_STATE_IDLE, -+ BEAMFORMING_STATE_START, -+ BEAMFORMING_STATE_END, -+}BEAMFORMING_STATE, *PBEAMFORMING_STATE; -+ -+ -+typedef enum _BEAMFORMING_CAP -+{ -+ BEAMFORMING_CAP_NONE = 0x0, -+ BEAMFORMER_CAP_HT_EXPLICIT = 0x1, -+ BEAMFORMEE_CAP_HT_EXPLICIT = 0x2, -+ BEAMFORMER_CAP_VHT_SU = 0x4, // Self has er Cap, because Reg er & peer ee -+ BEAMFORMEE_CAP_VHT_SU = 0x8, // Self has ee Cap, because Reg ee & peer er -+ BEAMFORMER_CAP = 0x10, -+ BEAMFORMEE_CAP = 0x20, -+}BEAMFORMING_CAP, *PBEAMFORMING_CAP; -+ -+ -+typedef enum _SOUNDING_MODE -+{ -+ SOUNDING_SW_VHT_TIMER = 0x0, -+ SOUNDING_SW_HT_TIMER = 0x1, -+ SOUNDING_STOP_All_TIMER = 0x2, -+ SOUNDING_HW_VHT_TIMER = 0x3, -+ SOUNDING_HW_HT_TIMER = 0x4, -+ SOUNDING_STOP_OID_TIMER = 0x5, -+ SOUNDING_AUTO_VHT_TIMER = 0x6, -+ SOUNDING_AUTO_HT_TIMER = 0x7, -+ SOUNDING_FW_VHT_TIMER = 0x8, -+ SOUNDING_FW_HT_TIMER = 0x9, -+}SOUNDING_MODE, *PSOUNDING_MODE; -+ -+struct beamforming_entry { -+ BOOLEAN bUsed; -+ BOOLEAN bSound; -+ u16 aid; // Used to construct AID field of NDPA packet. -+ u16 mac_id; // Used to Set Reg42C in IBSS mode. -+ u16 p_aid; // Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. -+ u16 g_id; -+ u8 mac_addr[6];// Used to fill Reg6E4 to fill Mac address of CSI report frame. -+ CHANNEL_WIDTH sound_bw; // Sounding BandWidth -+ u16 sound_period; -+ BEAMFORMING_CAP beamforming_entry_cap; -+ BEAMFORMING_ENTRY_STATE beamforming_entry_state; -+ u8 ClockResetTimes; /*Modified by Jeffery @2015-04-10*/ -+ u8 PreLogSeq; /*Modified by Jeffery @2015-03-30*/ -+ u8 LogSeq; /*Modified by Jeffery @2014-10-29*/ -+ u16 LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/ -+ u16 LogSuccess:2; /*Modified by Jeffery @2014-10-29*/ -+ -+ u8 LogStatusFailCnt; -+ u8 PreCsiReport[327]; -+ u8 DefaultCsiCnt; -+ BOOLEAN bDefaultCSI; -+}; -+ -+struct sounding_info { -+ u8 sound_idx; -+ CHANNEL_WIDTH sound_bw; -+ SOUNDING_MODE sound_mode; -+ u16 sound_period; -+}; -+ -+struct beamforming_info { -+ BEAMFORMING_CAP beamforming_cap; -+ BEAMFORMING_STATE beamforming_state; -+ struct beamforming_entry beamforming_entry[BEAMFORMING_ENTRY_NUM]; -+ u8 beamforming_cur_idx; -+ u8 beamforming_in_progress; -+ u8 sounding_sequence; -+ struct sounding_info sounding_info; -+}; -+ -+struct rtw_ndpa_sta_info { -+ u16 aid:12; -+ u16 feedback_type:1; -+ u16 nc_index:3; -+}; -+ -+BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id); -+void beamforming_notify(PADAPTER adapter); -+BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo); -+ -+BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx); -+BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx); -+ -+void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status); -+ -+void beamforming_watchdog(PADAPTER Adapter); -+#endif /*#if (BEAMFORMING_SUPPORT ==0)- for diver defined beamforming*/ -+ -+enum BEAMFORMING_CTRL_TYPE { -+ BEAMFORMING_CTRL_ENTER = 0, -+ BEAMFORMING_CTRL_LEAVE = 1, -+ BEAMFORMING_CTRL_START_PERIOD = 2, -+ BEAMFORMING_CTRL_END_PERIOD = 3, -+ BEAMFORMING_CTRL_SOUNDING_FAIL = 4, -+ BEAMFORMING_CTRL_SOUNDING_CLK = 5, -+}; -+u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame); -+void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame); -+ -+void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf); -+u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue); -+void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); -+ -+#endif /*#ifdef CONFIG_BEAMFORMING */ -+ -+#endif /*__RTW_BEAMFORMING_H_*/ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_BEAMFORMING_H_ ++#define __RTW_BEAMFORMING_H_ ++ ++#ifdef CONFIG_BEAMFORMING ++ ++#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ ++#define BEAMFORMING_ENTRY_NUM 2 ++#define GET_BEAMFORM_INFO(_pmlmepriv) ((struct beamforming_info *)(&(_pmlmepriv)->beamforming_info)) ++ ++ ++typedef enum _BEAMFORMING_ENTRY_STATE ++{ ++ BEAMFORMING_ENTRY_STATE_UNINITIALIZE, ++ BEAMFORMING_ENTRY_STATE_INITIALIZEING, ++ BEAMFORMING_ENTRY_STATE_INITIALIZED, ++ BEAMFORMING_ENTRY_STATE_PROGRESSING, ++ BEAMFORMING_ENTRY_STATE_PROGRESSED, ++}BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; ++ ++ ++typedef enum _BEAMFORMING_STATE ++{ ++ BEAMFORMING_STATE_IDLE, ++ BEAMFORMING_STATE_START, ++ BEAMFORMING_STATE_END, ++}BEAMFORMING_STATE, *PBEAMFORMING_STATE; ++ ++ ++typedef enum _BEAMFORMING_CAP ++{ ++ BEAMFORMING_CAP_NONE = 0x0, ++ BEAMFORMER_CAP_HT_EXPLICIT = 0x1, ++ BEAMFORMEE_CAP_HT_EXPLICIT = 0x2, ++ BEAMFORMER_CAP_VHT_SU = 0x4, // Self has er Cap, because Reg er & peer ee ++ BEAMFORMEE_CAP_VHT_SU = 0x8, // Self has ee Cap, because Reg ee & peer er ++ BEAMFORMER_CAP = 0x10, ++ BEAMFORMEE_CAP = 0x20, ++}BEAMFORMING_CAP, *PBEAMFORMING_CAP; ++ ++ ++typedef enum _SOUNDING_MODE ++{ ++ SOUNDING_SW_VHT_TIMER = 0x0, ++ SOUNDING_SW_HT_TIMER = 0x1, ++ SOUNDING_STOP_All_TIMER = 0x2, ++ SOUNDING_HW_VHT_TIMER = 0x3, ++ SOUNDING_HW_HT_TIMER = 0x4, ++ SOUNDING_STOP_OID_TIMER = 0x5, ++ SOUNDING_AUTO_VHT_TIMER = 0x6, ++ SOUNDING_AUTO_HT_TIMER = 0x7, ++ SOUNDING_FW_VHT_TIMER = 0x8, ++ SOUNDING_FW_HT_TIMER = 0x9, ++}SOUNDING_MODE, *PSOUNDING_MODE; ++ ++struct beamforming_entry { ++ BOOLEAN bUsed; ++ BOOLEAN bSound; ++ u16 aid; // Used to construct AID field of NDPA packet. ++ u16 mac_id; // Used to Set Reg42C in IBSS mode. ++ u16 p_aid; // Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. ++ u16 g_id; ++ u8 mac_addr[6];// Used to fill Reg6E4 to fill Mac address of CSI report frame. ++ CHANNEL_WIDTH sound_bw; // Sounding BandWidth ++ u16 sound_period; ++ BEAMFORMING_CAP beamforming_entry_cap; ++ BEAMFORMING_ENTRY_STATE beamforming_entry_state; ++ u8 ClockResetTimes; /*Modified by Jeffery @2015-04-10*/ ++ u8 PreLogSeq; /*Modified by Jeffery @2015-03-30*/ ++ u8 LogSeq; /*Modified by Jeffery @2014-10-29*/ ++ u16 LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/ ++ u16 LogSuccess:2; /*Modified by Jeffery @2014-10-29*/ ++ ++ u8 LogStatusFailCnt; ++ u8 PreCsiReport[327]; ++ u8 DefaultCsiCnt; ++ BOOLEAN bDefaultCSI; ++}; ++ ++struct sounding_info { ++ u8 sound_idx; ++ CHANNEL_WIDTH sound_bw; ++ SOUNDING_MODE sound_mode; ++ u16 sound_period; ++}; ++ ++struct beamforming_info { ++ BEAMFORMING_CAP beamforming_cap; ++ BEAMFORMING_STATE beamforming_state; ++ struct beamforming_entry beamforming_entry[BEAMFORMING_ENTRY_NUM]; ++ u8 beamforming_cur_idx; ++ u8 beamforming_in_progress; ++ u8 sounding_sequence; ++ struct sounding_info sounding_info; ++}; ++ ++struct rtw_ndpa_sta_info { ++ u16 aid:12; ++ u16 feedback_type:1; ++ u16 nc_index:3; ++}; ++ ++BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id); ++void beamforming_notify(PADAPTER adapter); ++BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo); ++ ++BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx); ++BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx); ++ ++void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status); ++ ++void beamforming_watchdog(PADAPTER Adapter); ++#endif /*#if (BEAMFORMING_SUPPORT ==0)- for diver defined beamforming*/ ++ ++enum BEAMFORMING_CTRL_TYPE { ++ BEAMFORMING_CTRL_ENTER = 0, ++ BEAMFORMING_CTRL_LEAVE = 1, ++ BEAMFORMING_CTRL_START_PERIOD = 2, ++ BEAMFORMING_CTRL_END_PERIOD = 3, ++ BEAMFORMING_CTRL_SOUNDING_FAIL = 4, ++ BEAMFORMING_CTRL_SOUNDING_CLK = 5, ++}; ++u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame); ++void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame); ++ ++void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf); ++u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue); ++void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); ++ ++#endif /*#ifdef CONFIG_BEAMFORMING */ ++ ++#endif /*__RTW_BEAMFORMING_H_*/ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_br_ext.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_br_ext.h new file mode 100644 -index 000000000..dcb51014a +index 0000000..dcb5101 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_br_ext.h @@ -0,0 +1,76 @@ @@ -298437,308 +339869,308 @@ index 000000000..dcb51014a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_bt_mp.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_bt_mp.h new file mode 100644 -index 000000000..4624ccd9e +index 0000000..8d26045 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_bt_mp.h @@ -0,0 +1,295 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#ifndef __RTW_BT_MP_H -+#define __RTW_BT_MP_H -+ -+ -+#if(MP_DRIVER == 1) -+ -+#pragma pack(1) -+ -+// definition for BT_UP_OP_BT_READY -+#define MP_BT_NOT_READY 0 -+#define MP_BT_READY 1 -+ -+// definition for BT_UP_OP_BT_SET_MODE -+typedef enum _MP_BT_MODE{ -+ MP_BT_MODE_RF_TXRX_TEST_MODE = 0, -+ MP_BT_MODE_BT20_DUT_TEST_MODE = 1, -+ MP_BT_MODE_BT40_DIRECT_TEST_MODE = 2, -+ MP_BT_MODE_CONNECT_TEST_MODE = 3, -+ MP_BT_MODE_MAX -+}MP_BT_MODE,*PMP_BT_MODE; -+ -+ -+// definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER -+typedef struct _BT_TXRX_PARAMETERS{ -+ u1Byte txrxChannel; -+ u4Byte txrxTxPktCnt; -+ u1Byte txrxTxPktInterval; -+ u1Byte txrxPayloadType; -+ u1Byte txrxPktType; -+ u2Byte txrxPayloadLen; -+ u4Byte txrxPktHeader; -+ u1Byte txrxWhitenCoeff; -+ u1Byte txrxBdaddr[6]; -+ u1Byte txrxTxGainIndex; -+} BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; -+ -+// txrxPktType -+typedef enum _MP_BT_PKT_TYPE{ -+ MP_BT_PKT_DH1 = 0, -+ MP_BT_PKT_DH3 = 1, -+ MP_BT_PKT_DH5 = 2, -+ MP_BT_PKT_2DH1 = 3, -+ MP_BT_PKT_2DH3 = 4, -+ MP_BT_PKT_2DH5 = 5, -+ MP_BT_PKT_3DH1 = 6, -+ MP_BT_PKT_3DH3 = 7, -+ MP_BT_PKT_3DH5 = 8, -+ MP_BT_PKT_LE = 9, -+ MP_BT_PKT_MAX -+}MP_BT_PKT_TYPE,*PMP_BT_PKT_TYPE; -+// txrxPayloadType -+typedef enum _MP_BT_PAYLOAD_TYPE{ -+ MP_BT_PAYLOAD_01010101 = 0, -+ MP_BT_PAYLOAD_ALL_1 = 1, -+ MP_BT_PAYLOAD_ALL_0 = 2, -+ MP_BT_PAYLOAD_11110000 = 3, -+ MP_BT_PAYLOAD_PRBS9 = 4, -+ MP_BT_PAYLOAD_MAX = 8, -+}MP_BT_PAYLOAD_TYPE,*PMP_BT_PAYLOAD_TYPE; -+ -+ -+// definition for BT_UP_OP_BT_TEST_CTRL -+typedef enum _MP_BT_TEST_CTRL{ -+ MP_BT_TEST_STOP_ALL_TESTS = 0, -+ MP_BT_TEST_START_RX_TEST = 1, -+ MP_BT_TEST_START_PACKET_TX_TEST = 2, -+ MP_BT_TEST_START_CONTINUOUS_TX_TEST = 3, -+ MP_BT_TEST_START_INQUIRY_SCAN_TEST = 4, -+ MP_BT_TEST_START_PAGE_SCAN_TEST = 5, -+ MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST = 6, -+ MP_BT_TEST_START_LEGACY_CONNECT_TEST = 7, -+ MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR = 8, -+ MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER = 9, -+ MP_BT_TEST_MAX -+}MP_BT_TEST_CTRL,*PMP_BT_TEST_CTRL; -+ -+ -+typedef enum _RTL_EXT_C2H_EVT -+{ -+ EXT_C2H_WIFI_FW_ACTIVE_RSP = 0, -+ EXT_C2H_TRIG_BY_BT_FW = 1, -+ MAX_EXT_C2HEVENT -+}RTL_EXT_C2H_EVT; -+ -+// OP codes definition between the user layer and driver -+typedef enum _BT_CTRL_OPCODE_UPPER{ -+ BT_UP_OP_BT_READY = 0x00, -+ BT_UP_OP_BT_SET_MODE = 0x01, -+ BT_UP_OP_BT_SET_TX_RX_PARAMETER = 0x02, -+ BT_UP_OP_BT_SET_GENERAL = 0x03, -+ BT_UP_OP_BT_GET_GENERAL = 0x04, -+ BT_UP_OP_BT_TEST_CTRL = 0x05, -+ BT_UP_OP_TEST_BT = 0x06, -+ BT_UP_OP_MAX -+}BT_CTRL_OPCODE_UPPER,*PBT_CTRL_OPCODE_UPPER; -+ -+ -+typedef enum _BT_SET_GENERAL{ -+ BT_GSET_REG = 0x00, -+ BT_GSET_RESET = 0x01, -+ BT_GSET_TARGET_BD_ADDR = 0x02, -+ BT_GSET_TX_PWR_FINETUNE = 0x03, -+ BT_SET_TRACKING_INTERVAL = 0x04, -+ BT_SET_THERMAL_METER = 0x05, -+ BT_ENABLE_CFO_TRACKING = 0x06, -+ BT_GSET_UPDATE_BT_PATCH = 0x07, -+ BT_GSET_MAX -+}BT_SET_GENERAL,*PBT_SET_GENERAL; -+ -+typedef enum _BT_GET_GENERAL{ -+ BT_GGET_REG = 0x00, -+ BT_GGET_STATUS = 0x01, -+ BT_GGET_REPORT = 0x02, -+ BT_GGET_AFH_MAP = 0x03, -+ BT_GGET_AFH_STATUS = 0x04, -+ BT_GGET_MAX -+}BT_GET_GENERAL,*PBT_GET_GENERAL; -+ -+// definition for BT_UP_OP_BT_SET_GENERAL -+typedef enum _BT_REG_TYPE{ -+ BT_REG_RF = 0, -+ BT_REG_MODEM = 1, -+ BT_REG_BLUEWIZE = 2, -+ BT_REG_VENDOR = 3, -+ BT_REG_LE = 4, -+ BT_REG_MAX -+}BT_REG_TYPE,*PBT_REG_TYPE; -+ -+// definition for BT_LO_OP_GET_AFH_MAP -+typedef enum _BT_AFH_MAP_TYPE{ -+ BT_AFH_MAP_RESULT = 0, -+ BT_AFH_MAP_WIFI_PSD_ONLY = 1, -+ BT_AFH_MAP_WIFI_CH_BW_ONLY = 2, -+ BT_AFH_MAP_BT_PSD_ONLY = 3, -+ BT_AFH_MAP_HOST_CLASSIFICATION_ONLY = 4, -+ BT_AFH_MAP_MAX -+}BT_AFH_MAP_TYPE,*PBT_AFH_MAP_TYPE; -+ -+// definition for BT_UP_OP_BT_GET_GENERAL -+typedef enum _BT_REPORT_TYPE{ -+ BT_REPORT_RX_PACKET_CNT = 0, -+ BT_REPORT_RX_ERROR_BITS = 1, -+ BT_REPORT_RSSI = 2, -+ BT_REPORT_CFO_HDR_QUALITY = 3, -+ BT_REPORT_CONNECT_TARGET_BD_ADDR = 4, -+ BT_REPORT_MAX -+}BT_REPORT_TYPE,*PBT_REPORT_TYPE; -+ -+VOID -+MPTBT_Test( -+ IN PADAPTER Adapter, -+ IN u1Byte opCode, -+ IN u1Byte byte1, -+ IN u1Byte byte2, -+ IN u1Byte byte3 -+ ); -+ -+NDIS_STATUS -+MPTBT_SendOidBT( -+ IN PADAPTER pAdapter, -+ IN PVOID InformationBuffer, -+ IN ULONG InformationBufferLength, -+ OUT PULONG BytesRead, -+ OUT PULONG BytesNeeded -+ ); -+ -+VOID -+MPTBT_FwC2hBtMpCtrl( -+ PADAPTER Adapter, -+ pu1Byte tmpBuf, -+ u1Byte length -+ ); -+ -+void MPh2c_timeout_handle(void *FunctionContext); -+ -+VOID mptbt_BtControlProcess( -+ PADAPTER Adapter, -+ PVOID pInBuf -+ ); -+ -+#define BT_H2C_MAX_RETRY 1 -+#define BT_MAX_C2H_LEN 20 -+ -+typedef struct _BT_REQ_CMD{ -+ UCHAR opCodeVer; -+ UCHAR OpCode; -+ USHORT paraLength; -+ UCHAR pParamStart[100]; -+} BT_REQ_CMD, *PBT_REQ_CMD; -+ -+typedef struct _BT_RSP_CMD{ -+ USHORT status; -+ USHORT paraLength; -+ UCHAR pParamStart[100]; -+} BT_RSP_CMD, *PBT_RSP_CMD; -+ -+ -+typedef struct _BT_H2C{ -+ u1Byte opCodeVer:4; -+ u1Byte reqNum:4; -+ u1Byte opCode; -+ u1Byte buf[100]; -+}BT_H2C, *PBT_H2C; -+ -+ -+ -+typedef struct _BT_EXT_C2H{ -+ u1Byte extendId; -+ u1Byte statusCode:4; -+ u1Byte retLen:4; -+ u1Byte opCodeVer:4; -+ u1Byte reqNum:4; -+ u1Byte buf[100]; -+}BT_EXT_C2H, *PBT_EXT_C2H; -+ -+ -+typedef enum _BT_OPCODE_STATUS{ -+ BT_OP_STATUS_SUCCESS = 0x00, // Success -+ BT_OP_STATUS_VERSION_MISMATCH = 0x01, -+ BT_OP_STATUS_UNKNOWN_OPCODE = 0x02, -+ BT_OP_STATUS_ERROR_PARAMETER = 0x03, -+ BT_OP_STATUS_MAX -+}BT_OPCODE_STATUS,*PBT_OPCODE_STATUS; -+ -+ -+ -+//OP codes definition between driver and bt fw -+typedef enum _BT_CTRL_OPCODE_LOWER{ -+ BT_LO_OP_GET_BT_VERSION = 0x00, -+ BT_LO_OP_RESET = 0x01, -+ BT_LO_OP_TEST_CTRL = 0x02, -+ BT_LO_OP_SET_BT_MODE = 0x03, -+ BT_LO_OP_SET_CHNL_TX_GAIN = 0x04, -+ BT_LO_OP_SET_PKT_TYPE_LEN = 0x05, -+ BT_LO_OP_SET_PKT_CNT_L_PL_TYPE = 0x06, -+ BT_LO_OP_SET_PKT_CNT_H_PKT_INTV = 0x07, -+ BT_LO_OP_SET_PKT_HEADER = 0x08, -+ BT_LO_OP_SET_WHITENCOEFF = 0x09, -+ BT_LO_OP_SET_BD_ADDR_L = 0x0a, -+ BT_LO_OP_SET_BD_ADDR_H = 0x0b, -+ BT_LO_OP_WRITE_REG_ADDR = 0x0c, -+ BT_LO_OP_WRITE_REG_VALUE = 0x0d, -+ BT_LO_OP_GET_BT_STATUS = 0x0e, -+ BT_LO_OP_GET_BD_ADDR_L = 0x0f, -+ BT_LO_OP_GET_BD_ADDR_H = 0x10, -+ BT_LO_OP_READ_REG = 0x11, -+ BT_LO_OP_SET_TARGET_BD_ADDR_L = 0x12, -+ BT_LO_OP_SET_TARGET_BD_ADDR_H = 0x13, -+ BT_LO_OP_SET_TX_POWER_CALIBRATION = 0x14, -+ BT_LO_OP_GET_RX_PKT_CNT_L = 0x15, -+ BT_LO_OP_GET_RX_PKT_CNT_H = 0x16, -+ BT_LO_OP_GET_RX_ERROR_BITS_L = 0x17, -+ BT_LO_OP_GET_RX_ERROR_BITS_H = 0x18, -+ BT_LO_OP_GET_RSSI = 0x19, -+ BT_LO_OP_GET_CFO_HDR_QUALITY_L = 0x1a, -+ BT_LO_OP_GET_CFO_HDR_QUALITY_H = 0x1b, -+ BT_LO_OP_GET_TARGET_BD_ADDR_L = 0x1c, -+ BT_LO_OP_GET_TARGET_BD_ADDR_H = 0x1d, -+ BT_LO_OP_GET_AFH_MAP_L = 0x1e, -+ BT_LO_OP_GET_AFH_MAP_M = 0x1f, -+ BT_LO_OP_GET_AFH_MAP_H = 0x20, -+ BT_LO_OP_GET_AFH_STATUS = 0x21, -+ BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, -+ BT_LO_OP_SET_THERMAL_METER = 0x23, -+ BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, -+ BT_LO_OP_MAX -+}BT_CTRL_OPCODE_LOWER,*PBT_CTRL_OPCODE_LOWER; -+ -+ -+ -+ -+#endif /* #if(MP_DRIVER == 1) */ -+ -+#endif // #ifndef __INC_MPT_BT_H -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __RTW_BT_MP_H ++#define __RTW_BT_MP_H ++ ++ ++#if(MP_DRIVER == 1) ++ ++#pragma pack(1) ++ ++// definition for BT_UP_OP_BT_READY ++#define MP_BT_NOT_READY 0 ++#define MP_BT_READY 1 ++ ++// definition for BT_UP_OP_BT_SET_MODE ++typedef enum _MP_BT_MODE{ ++ MP_BT_MODE_RF_TXRX_TEST_MODE = 0, ++ MP_BT_MODE_BT20_DUT_TEST_MODE = 1, ++ MP_BT_MODE_BT40_DIRECT_TEST_MODE = 2, ++ MP_BT_MODE_CONNECT_TEST_MODE = 3, ++ MP_BT_MODE_MAX ++}MP_BT_MODE,*PMP_BT_MODE; ++ ++ ++// definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER ++typedef struct _BT_TXRX_PARAMETERS{ ++ u1Byte txrxChannel; ++ u4Byte txrxTxPktCnt; ++ u1Byte txrxTxPktInterval; ++ u1Byte txrxPayloadType; ++ u1Byte txrxPktType; ++ u2Byte txrxPayloadLen; ++ u4Byte txrxPktHeader; ++ u1Byte txrxWhitenCoeff; ++ u1Byte txrxBdaddr[6]; ++ u1Byte txrxTxGainIndex; ++} BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; ++ ++// txrxPktType ++typedef enum _MP_BT_PKT_TYPE{ ++ MP_BT_PKT_DH1 = 0, ++ MP_BT_PKT_DH3 = 1, ++ MP_BT_PKT_DH5 = 2, ++ MP_BT_PKT_2DH1 = 3, ++ MP_BT_PKT_2DH3 = 4, ++ MP_BT_PKT_2DH5 = 5, ++ MP_BT_PKT_3DH1 = 6, ++ MP_BT_PKT_3DH3 = 7, ++ MP_BT_PKT_3DH5 = 8, ++ MP_BT_PKT_LE = 9, ++ MP_BT_PKT_MAX ++}MP_BT_PKT_TYPE,*PMP_BT_PKT_TYPE; ++// txrxPayloadType ++typedef enum _MP_BT_PAYLOAD_TYPE{ ++ MP_BT_PAYLOAD_01010101 = 0, ++ MP_BT_PAYLOAD_ALL_1 = 1, ++ MP_BT_PAYLOAD_ALL_0 = 2, ++ MP_BT_PAYLOAD_11110000 = 3, ++ MP_BT_PAYLOAD_PRBS9 = 4, ++ MP_BT_PAYLOAD_MAX = 8, ++}MP_BT_PAYLOAD_TYPE,*PMP_BT_PAYLOAD_TYPE; ++ ++ ++// definition for BT_UP_OP_BT_TEST_CTRL ++typedef enum _MP_BT_TEST_CTRL{ ++ MP_BT_TEST_STOP_ALL_TESTS = 0, ++ MP_BT_TEST_START_RX_TEST = 1, ++ MP_BT_TEST_START_PACKET_TX_TEST = 2, ++ MP_BT_TEST_START_CONTINUOUS_TX_TEST = 3, ++ MP_BT_TEST_START_INQUIRY_SCAN_TEST = 4, ++ MP_BT_TEST_START_PAGE_SCAN_TEST = 5, ++ MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST = 6, ++ MP_BT_TEST_START_LEGACY_CONNECT_TEST = 7, ++ MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR = 8, ++ MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER = 9, ++ MP_BT_TEST_MAX ++}MP_BT_TEST_CTRL,*PMP_BT_TEST_CTRL; ++ ++ ++typedef enum _RTL_EXT_C2H_EVT ++{ ++ EXT_C2H_WIFI_FW_ACTIVE_RSP = 0, ++ EXT_C2H_TRIG_BY_BT_FW = 1, ++ MAX_EXT_C2HEVENT ++}RTL_EXT_C2H_EVT; ++ ++// OP codes definition between the user layer and driver ++typedef enum _BT_CTRL_OPCODE_UPPER{ ++ BT_UP_OP_BT_READY = 0x00, ++ BT_UP_OP_BT_SET_MODE = 0x01, ++ BT_UP_OP_BT_SET_TX_RX_PARAMETER = 0x02, ++ BT_UP_OP_BT_SET_GENERAL = 0x03, ++ BT_UP_OP_BT_GET_GENERAL = 0x04, ++ BT_UP_OP_BT_TEST_CTRL = 0x05, ++ BT_UP_OP_TEST_BT = 0x06, ++ BT_UP_OP_MAX ++}BT_CTRL_OPCODE_UPPER,*PBT_CTRL_OPCODE_UPPER; ++ ++ ++typedef enum _BT_SET_GENERAL{ ++ BT_GSET_REG = 0x00, ++ BT_GSET_RESET = 0x01, ++ BT_GSET_TARGET_BD_ADDR = 0x02, ++ BT_GSET_TX_PWR_FINETUNE = 0x03, ++ BT_SET_TRACKING_INTERVAL = 0x04, ++ BT_SET_THERMAL_METER = 0x05, ++ BT_ENABLE_CFO_TRACKING = 0x06, ++ BT_GSET_UPDATE_BT_PATCH = 0x07, ++ BT_GSET_MAX ++}BT_SET_GENERAL,*PBT_SET_GENERAL; ++ ++typedef enum _BT_GET_GENERAL{ ++ BT_GGET_REG = 0x00, ++ BT_GGET_STATUS = 0x01, ++ BT_GGET_REPORT = 0x02, ++ BT_GGET_AFH_MAP = 0x03, ++ BT_GGET_AFH_STATUS = 0x04, ++ BT_GGET_MAX ++}BT_GET_GENERAL,*PBT_GET_GENERAL; ++ ++// definition for BT_UP_OP_BT_SET_GENERAL ++typedef enum _BT_REG_TYPE{ ++ BT_REG_RF = 0, ++ BT_REG_MODEM = 1, ++ BT_REG_BLUEWIZE = 2, ++ BT_REG_VENDOR = 3, ++ BT_REG_LE = 4, ++ BT_REG_MAX ++}BT_REG_TYPE,*PBT_REG_TYPE; ++ ++// definition for BT_LO_OP_GET_AFH_MAP ++typedef enum _BT_AFH_MAP_TYPE{ ++ BT_AFH_MAP_RESULT = 0, ++ BT_AFH_MAP_WIFI_PSD_ONLY = 1, ++ BT_AFH_MAP_WIFI_CH_BW_ONLY = 2, ++ BT_AFH_MAP_BT_PSD_ONLY = 3, ++ BT_AFH_MAP_HOST_CLASSIFICATION_ONLY = 4, ++ BT_AFH_MAP_MAX ++}BT_AFH_MAP_TYPE,*PBT_AFH_MAP_TYPE; ++ ++// definition for BT_UP_OP_BT_GET_GENERAL ++typedef enum _BT_REPORT_TYPE{ ++ BT_REPORT_RX_PACKET_CNT = 0, ++ BT_REPORT_RX_ERROR_BITS = 1, ++ BT_REPORT_RSSI = 2, ++ BT_REPORT_CFO_HDR_QUALITY = 3, ++ BT_REPORT_CONNECT_TARGET_BD_ADDR = 4, ++ BT_REPORT_MAX ++}BT_REPORT_TYPE,*PBT_REPORT_TYPE; ++ ++VOID ++MPTBT_Test( ++ IN PADAPTER Adapter, ++ IN u1Byte opCode, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3 ++ ); ++ ++NDIS_STATUS ++MPTBT_SendOidBT( ++ IN PADAPTER pAdapter, ++ IN PVOID InformationBuffer, ++ IN ULONG InformationBufferLength, ++ OUT PULONG BytesRead, ++ OUT PULONG BytesNeeded ++ ); ++ ++VOID ++MPTBT_FwC2hBtMpCtrl( ++ PADAPTER Adapter, ++ pu1Byte tmpBuf, ++ u1Byte length ++ ); ++ ++void MPh2c_timeout_handle(void *FunctionContext); ++ ++VOID mptbt_BtControlProcess( ++ PADAPTER Adapter, ++ PVOID pInBuf ++ ); ++ ++#define BT_H2C_MAX_RETRY 1 ++#define BT_MAX_C2H_LEN 20 ++ ++typedef struct _BT_REQ_CMD{ ++ UCHAR opCodeVer; ++ UCHAR OpCode; ++ USHORT paraLength; ++ UCHAR pParamStart[100]; ++} BT_REQ_CMD, *PBT_REQ_CMD; ++ ++typedef struct _BT_RSP_CMD{ ++ USHORT status; ++ USHORT paraLength; ++ UCHAR pParamStart[100]; ++} BT_RSP_CMD, *PBT_RSP_CMD; ++ ++ ++typedef struct _BT_H2C{ ++ u1Byte opCodeVer:4; ++ u1Byte reqNum:4; ++ u1Byte opCode; ++ u1Byte buf[100]; ++}BT_H2C, *PBT_H2C; ++ ++ ++ ++typedef struct _BT_EXT_C2H{ ++ u1Byte extendId; ++ u1Byte statusCode:4; ++ u1Byte retLen:4; ++ u1Byte opCodeVer:4; ++ u1Byte reqNum:4; ++ u1Byte buf[100]; ++}BT_EXT_C2H, *PBT_EXT_C2H; ++ ++ ++typedef enum _BT_OPCODE_STATUS{ ++ BT_OP_STATUS_SUCCESS = 0x00, // Success ++ BT_OP_STATUS_VERSION_MISMATCH = 0x01, ++ BT_OP_STATUS_UNKNOWN_OPCODE = 0x02, ++ BT_OP_STATUS_ERROR_PARAMETER = 0x03, ++ BT_OP_STATUS_MAX ++}BT_OPCODE_STATUS,*PBT_OPCODE_STATUS; ++ ++ ++ ++//OP codes definition between driver and bt fw ++typedef enum _BT_CTRL_OPCODE_LOWER{ ++ BT_LO_OP_GET_BT_VERSION = 0x00, ++ BT_LO_OP_RESET = 0x01, ++ BT_LO_OP_TEST_CTRL = 0x02, ++ BT_LO_OP_SET_BT_MODE = 0x03, ++ BT_LO_OP_SET_CHNL_TX_GAIN = 0x04, ++ BT_LO_OP_SET_PKT_TYPE_LEN = 0x05, ++ BT_LO_OP_SET_PKT_CNT_L_PL_TYPE = 0x06, ++ BT_LO_OP_SET_PKT_CNT_H_PKT_INTV = 0x07, ++ BT_LO_OP_SET_PKT_HEADER = 0x08, ++ BT_LO_OP_SET_WHITENCOEFF = 0x09, ++ BT_LO_OP_SET_BD_ADDR_L = 0x0a, ++ BT_LO_OP_SET_BD_ADDR_H = 0x0b, ++ BT_LO_OP_WRITE_REG_ADDR = 0x0c, ++ BT_LO_OP_WRITE_REG_VALUE = 0x0d, ++ BT_LO_OP_GET_BT_STATUS = 0x0e, ++ BT_LO_OP_GET_BD_ADDR_L = 0x0f, ++ BT_LO_OP_GET_BD_ADDR_H = 0x10, ++ BT_LO_OP_READ_REG = 0x11, ++ BT_LO_OP_SET_TARGET_BD_ADDR_L = 0x12, ++ BT_LO_OP_SET_TARGET_BD_ADDR_H = 0x13, ++ BT_LO_OP_SET_TX_POWER_CALIBRATION = 0x14, ++ BT_LO_OP_GET_RX_PKT_CNT_L = 0x15, ++ BT_LO_OP_GET_RX_PKT_CNT_H = 0x16, ++ BT_LO_OP_GET_RX_ERROR_BITS_L = 0x17, ++ BT_LO_OP_GET_RX_ERROR_BITS_H = 0x18, ++ BT_LO_OP_GET_RSSI = 0x19, ++ BT_LO_OP_GET_CFO_HDR_QUALITY_L = 0x1a, ++ BT_LO_OP_GET_CFO_HDR_QUALITY_H = 0x1b, ++ BT_LO_OP_GET_TARGET_BD_ADDR_L = 0x1c, ++ BT_LO_OP_GET_TARGET_BD_ADDR_H = 0x1d, ++ BT_LO_OP_GET_AFH_MAP_L = 0x1e, ++ BT_LO_OP_GET_AFH_MAP_M = 0x1f, ++ BT_LO_OP_GET_AFH_MAP_H = 0x20, ++ BT_LO_OP_GET_AFH_STATUS = 0x21, ++ BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, ++ BT_LO_OP_SET_THERMAL_METER = 0x23, ++ BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, ++ BT_LO_OP_MAX ++}BT_CTRL_OPCODE_LOWER,*PBT_CTRL_OPCODE_LOWER; ++ ++ ++ ++ ++#endif /* #if(MP_DRIVER == 1) */ ++ ++#endif // #ifndef __INC_MPT_BT_H ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_btcoex.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_btcoex.h new file mode 100644 -index 000000000..b1489c4b6 +index 0000000..b1489c4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_btcoex.h @@ -0,0 +1,436 @@ @@ -299180,7 +340612,7 @@ index 000000000..b1489c4b6 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_byteorder.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_byteorder.h new file mode 100644 -index 000000000..29c5029ce +index 0000000..29c5029 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_byteorder.h @@ -0,0 +1,39 @@ @@ -299225,7 +340657,7 @@ index 000000000..29c5029ce + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_cmd.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_cmd.h new file mode 100644 -index 000000000..1f57d56c6 +index 0000000..1f57d56 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_cmd.h @@ -0,0 +1,1320 @@ @@ -300551,7 +341983,7 @@ index 000000000..1f57d56c6 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_debug.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_debug.h new file mode 100644 -index 000000000..77ce753c8 +index 0000000..77ce753 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_debug.h @@ -0,0 +1,538 @@ @@ -301095,7 +342527,7 @@ index 000000000..77ce753c8 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_eeprom.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_eeprom.h new file mode 100644 -index 000000000..2da2a67b3 +index 0000000..2da2a67 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_eeprom.h @@ -0,0 +1,123 @@ @@ -301224,7 +342656,7 @@ index 000000000..2da2a67b3 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_efuse.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_efuse.h new file mode 100644 -index 000000000..828841fc9 +index 0000000..828841f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_efuse.h @@ -0,0 +1,216 @@ @@ -301446,7 +342878,7 @@ index 000000000..828841fc9 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_event.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_event.h new file mode 100644 -index 000000000..b08b68d88 +index 0000000..b08b68d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_event.h @@ -0,0 +1,137 @@ @@ -301589,7 +343021,7 @@ index 000000000..b08b68d88 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ht.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ht.h new file mode 100644 -index 000000000..1509dba62 +index 0000000..1509dba --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ht.h @@ -0,0 +1,221 @@ @@ -301816,7 +343248,7 @@ index 000000000..1509dba62 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_io.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_io.h new file mode 100644 -index 000000000..1b031f57e +index 0000000..1b031f5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_io.h @@ -0,0 +1,578 @@ @@ -302400,7 +343832,7 @@ index 000000000..1b031f57e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl.h new file mode 100644 -index 000000000..3a82c6d5a +index 0000000..3a82c6d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl.h @@ -0,0 +1,329 @@ @@ -302735,7 +344167,7 @@ index 000000000..3a82c6d5a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_query.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_query.h new file mode 100644 -index 000000000..d91d35f99 +index 0000000..d91d35f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_query.h @@ -0,0 +1,33 @@ @@ -302774,7 +344206,7 @@ index 000000000..d91d35f99 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_rtl.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_rtl.h new file mode 100644 -index 000000000..a1b3491f5 +index 0000000..a1b3491 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_rtl.h @@ -0,0 +1,81 @@ @@ -302861,7 +344293,7 @@ index 000000000..a1b3491f5 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_set.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_set.h new file mode 100644 -index 000000000..1b7184688 +index 0000000..1b71846 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_ioctl_set.h @@ -0,0 +1,76 @@ @@ -302943,198 +344375,198 @@ index 000000000..1b7184688 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_iol.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_iol.h new file mode 100644 -index 000000000..128668c41 +index 0000000..ddabeac --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_iol.h @@ -0,0 +1,137 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTW_IOL_H_ -+#define __RTW_IOL_H_ -+ -+ -+struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); -+int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); -+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); -+int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); -+bool rtw_IOL_applied(ADAPTER *adapter); -+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); -+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); -+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); -+ -+ -+#ifdef CONFIG_IOL_NEW_GENERATION -+#define IOREG_CMD_END_LEN 4 -+ -+struct ioreg_cfg{ -+ u8 length; -+ u8 cmd_id; -+ u16 address; -+ u32 data; -+ u32 mask; -+}; -+enum ioreg_cmd{ -+ IOREG_CMD_LLT = 0x01, -+ IOREG_CMD_REFUSE = 0x02, -+ IOREG_CMD_EFUSE_PATH = 0x03, -+ IOREG_CMD_WB_REG = 0x04, -+ IOREG_CMD_WW_REG = 0x05, -+ IOREG_CMD_WD_REG = 0x06, -+ IOREG_CMD_W_RF = 0x07, -+ IOREG_CMD_DELAY_US = 0x10, -+ IOREG_CMD_DELAY_MS = 0x11, -+ IOREG_CMD_END = 0xFF, -+}; -+void read_efuse_from_txpktbuf(ADAPTER *adapter, int bcnhead, u8 *content, u16 *size); -+ -+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask); -+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask); -+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask); -+int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask); -+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask)) -+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask)) -+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value),(mask)) -+#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value,mask) _rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value),(mask)) -+ -+u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame); -+void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter,int buf_len,u8 *pbuf); -+ -+#ifdef CONFIG_IOL_IOREG_CFG_DBG -+ struct cmd_cmp{ -+ u16 addr; -+ u32 value; -+ }; -+#endif -+ -+#else //CONFIG_IOL_NEW_GENERATION -+ -+typedef struct _io_offload_cmd { -+ u8 rsvd0; -+ u8 cmd; -+ u16 address; -+ u32 value; -+} IO_OFFLOAD_CMD, IOL_CMD; -+ -+#define IOL_CMD_LLT 0x00 -+//#define IOL_CMD_R_EFUSE 0x01 -+#define IOL_CMD_WB_REG 0x02 -+#define IOL_CMD_WW_REG 0x03 -+#define IOL_CMD_WD_REG 0x04 -+//#define IOL_CMD_W_RF 0x05 -+#define IOL_CMD_DELAY_US 0x80 -+#define IOL_CMD_DELAY_MS 0x81 -+//#define IOL_CMD_DELAY_S 0x82 -+#define IOL_CMD_END 0x83 -+ -+/***************************************************** -+CMD Address Value -+(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) -+****************************************************** -+IOL_CMD_LLT - B7: PGBNDY -+//IOL_CMD_R_EFUSE - - -+IOL_CMD_WB_REG 0x0~0xFFFF B7 -+IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 -+IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 -+//IOL_CMD_W_RF RF Reg B5~B7 -+IOL_CMD_DELAY_US - B6~B7 -+IOL_CMD_DELAY_MS - B6~B7 -+//IOL_CMD_DELAY_S - B6~B7 -+IOL_CMD_END - - -+******************************************************/ -+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); -+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); -+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); -+ -+ -+int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); -+int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); -+ -+#ifdef DBG_IO -+int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); -+int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); -+int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); -+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -+#else -+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) -+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) -+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) -+#endif // DBG_IO -+#endif // CONFIG_IOL_NEW_GENERATION -+ -+ -+ -+#endif //__RTW_IOL_H_ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_IOL_H_ ++#define __RTW_IOL_H_ ++ ++ ++struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); ++int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); ++int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); ++int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); ++bool rtw_IOL_applied(ADAPTER *adapter); ++int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); ++int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); ++int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); ++ ++ ++#ifdef CONFIG_IOL_NEW_GENERATION ++#define IOREG_CMD_END_LEN 4 ++ ++struct ioreg_cfg{ ++ u8 length; ++ u8 cmd_id; ++ u16 address; ++ u32 data; ++ u32 mask; ++}; ++enum ioreg_cmd{ ++ IOREG_CMD_LLT = 0x01, ++ IOREG_CMD_REFUSE = 0x02, ++ IOREG_CMD_EFUSE_PATH = 0x03, ++ IOREG_CMD_WB_REG = 0x04, ++ IOREG_CMD_WW_REG = 0x05, ++ IOREG_CMD_WD_REG = 0x06, ++ IOREG_CMD_W_RF = 0x07, ++ IOREG_CMD_DELAY_US = 0x10, ++ IOREG_CMD_DELAY_MS = 0x11, ++ IOREG_CMD_END = 0xFF, ++}; ++void read_efuse_from_txpktbuf(ADAPTER *adapter, int bcnhead, u8 *content, u16 *size); ++ ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask); ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask); ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask); ++int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask); ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask)) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask)) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value),(mask)) ++#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value,mask) _rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value),(mask)) ++ ++u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame); ++void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter,int buf_len,u8 *pbuf); ++ ++#ifdef CONFIG_IOL_IOREG_CFG_DBG ++ struct cmd_cmp{ ++ u16 addr; ++ u32 value; ++ }; ++#endif ++ ++#else //CONFIG_IOL_NEW_GENERATION ++ ++typedef struct _io_offload_cmd { ++ u8 rsvd0; ++ u8 cmd; ++ u16 address; ++ u32 value; ++} IO_OFFLOAD_CMD, IOL_CMD; ++ ++#define IOL_CMD_LLT 0x00 ++//#define IOL_CMD_R_EFUSE 0x01 ++#define IOL_CMD_WB_REG 0x02 ++#define IOL_CMD_WW_REG 0x03 ++#define IOL_CMD_WD_REG 0x04 ++//#define IOL_CMD_W_RF 0x05 ++#define IOL_CMD_DELAY_US 0x80 ++#define IOL_CMD_DELAY_MS 0x81 ++//#define IOL_CMD_DELAY_S 0x82 ++#define IOL_CMD_END 0x83 ++ ++/***************************************************** ++CMD Address Value ++(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) ++****************************************************** ++IOL_CMD_LLT - B7: PGBNDY ++//IOL_CMD_R_EFUSE - - ++IOL_CMD_WB_REG 0x0~0xFFFF B7 ++IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 ++IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 ++//IOL_CMD_W_RF RF Reg B5~B7 ++IOL_CMD_DELAY_US - B6~B7 ++IOL_CMD_DELAY_MS - B6~B7 ++//IOL_CMD_DELAY_S - B6~B7 ++IOL_CMD_END - - ++******************************************************/ ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); ++ ++ ++int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); ++int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); ++ ++#ifdef DBG_IO ++int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#else ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) ++#endif // DBG_IO ++#endif // CONFIG_IOL_NEW_GENERATION ++ ++ ++ ++#endif //__RTW_IOL_H_ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mem.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mem.h new file mode 100644 -index 000000000..8017e6ae6 +index 0000000..1c11db1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mem.h @@ -0,0 +1,42 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTW_MEM_H__ -+#define __RTW_MEM_H__ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_PLATFORM_MSTAR_HIGH -+#define MAX_RTKM_RECVBUF_SZ (31744) /* 31k */ -+#else -+#define MAX_RTKM_RECVBUF_SZ (15360) /* 15k */ -+#endif /* CONFIG_PLATFORM_MSTAR_HIGH */ -+#define MAX_RTKM_NR_PREALLOC_RECV_SKB 16 -+ -+u16 rtw_rtkm_get_buff_size(void); -+u8 rtw_rtkm_get_nr_recv_skb(void); -+struct u8* rtw_alloc_revcbuf_premem(void); -+struct sk_buff *rtw_alloc_skb_premem(u16 in_size); -+int rtw_free_skb_premem(struct sk_buff *pskb); -+ -+ -+#endif //__RTW_MEM_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_MEM_H__ ++#define __RTW_MEM_H__ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_PLATFORM_MSTAR_HIGH ++#define MAX_RTKM_RECVBUF_SZ (31744) /* 31k */ ++#else ++#define MAX_RTKM_RECVBUF_SZ (15360) /* 15k */ ++#endif /* CONFIG_PLATFORM_MSTAR_HIGH */ ++#define MAX_RTKM_NR_PREALLOC_RECV_SKB 16 ++ ++u16 rtw_rtkm_get_buff_size(void); ++u8 rtw_rtkm_get_nr_recv_skb(void); ++struct u8* rtw_alloc_revcbuf_premem(void); ++struct sk_buff *rtw_alloc_skb_premem(u16 in_size); ++int rtw_free_skb_premem(struct sk_buff *pskb); ++ ++ ++#endif //__RTW_MEM_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mlme.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mlme.h new file mode 100644 -index 000000000..e592d6819 +index 0000000..e592d68 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mlme.h @@ -0,0 +1,1078 @@ @@ -304218,7 +345650,7 @@ index 000000000..e592d6819 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mlme_ext.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mlme_ext.h new file mode 100644 -index 000000000..85795bc3d +index 0000000..85795bc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mlme_ext.h @@ -0,0 +1,1226 @@ @@ -305450,7 +346882,7 @@ index 000000000..85795bc3d + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp.h new file mode 100644 -index 000000000..ab832d91f +index 0000000..ab832d9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp.h @@ -0,0 +1,979 @@ @@ -306435,7 +347867,7 @@ index 000000000..ab832d91f + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp_ioctl.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp_ioctl.h new file mode 100644 -index 000000000..cd6303c2d +index 0000000..cd6303c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp_ioctl.h @@ -0,0 +1,591 @@ @@ -307032,7 +348464,7 @@ index 000000000..cd6303c2d + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp_phy_regdef.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp_phy_regdef.h new file mode 100644 -index 000000000..340015cd3 +index 0000000..340015c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_mp_phy_regdef.h @@ -0,0 +1,1100 @@ @@ -308138,7 +349570,7 @@ index 000000000..340015cd3 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_odm.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_odm.h new file mode 100644 -index 000000000..8c0faebba +index 0000000..8c0faeb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_odm.h @@ -0,0 +1,53 @@ @@ -308197,7 +349629,7 @@ index 000000000..8c0faebba + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_p2p.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_p2p.h new file mode 100644 -index 000000000..ab3f4c87d +index 0000000..ab3f4c8 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_p2p.h @@ -0,0 +1,179 @@ @@ -308382,7 +349814,7 @@ index 000000000..ab3f4c87d + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_pwrctrl.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_pwrctrl.h new file mode 100644 -index 000000000..8c4fa6b57 +index 0000000..8c4fa6b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_pwrctrl.h @@ -0,0 +1,514 @@ @@ -308902,7 +350334,7 @@ index 000000000..8c4fa6b57 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_qos.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_qos.h new file mode 100644 -index 000000000..cc5fcea51 +index 0000000..cc5fcea --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_qos.h @@ -0,0 +1,35 @@ @@ -308943,10 +350375,10 @@ index 000000000..cc5fcea51 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_recv.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_recv.h new file mode 100644 -index 000000000..a2d7f9e36 +index 0000000..cc3dc61 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_recv.h -@@ -0,0 +1,879 @@ +@@ -0,0 +1,883 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. @@ -309024,6 +350456,7 @@ index 000000000..a2d7f9e36 +#define RX_CMD_QUEUE 1 +#define RX_MAX_QUEUE 2 + ++#if 0 // jfm +static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37}; + +static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3}; @@ -309033,13 +350466,16 @@ index 000000000..a2d7f9e36 + +static u8 oui_8021h[] = {0x00, 0x00, 0xf8}; +static u8 oui_rfc1042[]= {0x00,0x00,0x00}; ++#endif + +#define MAX_SUBFRAME_COUNT 64 ++#if 0 // jfm +static u8 rtw_rfc1042_header[] = +{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; +/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */ +static u8 rtw_bridge_tunnel_header[] = +{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 }; ++#endif + +//for Rx reordering buffer control +struct recv_reorder_ctrl @@ -309828,7 +351264,7 @@ index 000000000..a2d7f9e36 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_rf.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_rf.h new file mode 100644 -index 000000000..d4dd6a29e +index 0000000..d4dd6a2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_rf.h @@ -0,0 +1,271 @@ @@ -310105,7 +351541,7 @@ index 000000000..d4dd6a29e + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_security.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_security.h new file mode 100644 -index 000000000..5820a55cb +index 0000000..5820a55 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_security.h @@ -0,0 +1,490 @@ @@ -310601,7 +352037,7 @@ index 000000000..5820a55cb + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_sreset.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_sreset.h new file mode 100644 -index 000000000..4a225589a +index 0000000..4a22558 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_sreset.h @@ -0,0 +1,61 @@ @@ -310668,169 +352104,169 @@ index 000000000..4a225589a + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_tdls.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_tdls.h new file mode 100644 -index 000000000..56ea31636 +index 0000000..ed54a99 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_tdls.h @@ -0,0 +1,149 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTW_TDLS_H_ -+#define __RTW_TDLS_H_ -+ -+ -+#ifdef CONFIG_TDLS -+/* TDLS STA state */ -+ -+ -+/* TDLS Diect Link Establishment */ -+#define TDLS_STATE_NONE 0x00000000 /* Default state */ -+#define TDLS_INITIATOR_STATE BIT(28) /* 0x10000000 */ -+#define TDLS_RESPONDER_STATE BIT(29) /* 0x20000000 */ -+#define TDLS_LINKED_STATE BIT(30) /* 0x40000000 */ -+/* TDLS PU Buffer STA */ -+#define TDLS_WAIT_PTR_STATE BIT(24) /* 0x01000000 */ /* Waiting peer's TDLS_PEER_TRAFFIC_RESPONSE frame */ -+/* TDLS Check ALive */ -+#define TDLS_ALIVE_STATE BIT(20) /* 0x00100000 */ /* Check if peer sta is alived. */ -+/* TDLS Channel Switch */ -+#define TDLS_CH_SWITCH_ON_STATE BIT(16) /* 0x00010000 */ -+#define TDLS_PEER_AT_OFF_STATE BIT(17) /* 0x00020000 */ /* Could send pkt on target ch */ -+#define TDLS_CH_SW_INITIATOR_STATE BIT(18) /* 0x00040000 */ /* Avoid duplicated or unconditional ch. switch rsp. */ -+#define TDLS_WAIT_CH_RSP_STATE BIT(19) /* 0x00080000 */ /* Wait Ch. response as we are TDLS channel switch initiator */ -+ -+ -+#define TPK_RESEND_COUNT 1800 /*Unit: seconds */ -+#define CH_SWITCH_TIME 5 -+#define CH_SWITCH_TIMEOUT 20 -+#define TDLS_SIGNAL_THRESH 0x20 -+#define TDLS_WATCHDOG_PERIOD 10 /* Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec */ -+#define TDLS_HANDSHAKE_TIME 3000 -+#define TDLS_PTI_TIME 7000 -+ -+#define TDLS_MIC_LEN 16 -+#define WPA_NONCE_LEN 32 -+#define TDLS_TIMEOUT_LEN 4 -+ -+struct wpa_tdls_ftie { -+ u8 ie_type; /* FTIE */ -+ u8 ie_len; -+ u8 mic_ctrl[2]; -+ u8 mic[TDLS_MIC_LEN]; -+ u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ -+ u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ -+ /* followed by optional elements */ -+} ; -+ -+struct wpa_tdls_lnkid { -+ u8 ie_type; /* Link Identifier IE */ -+ u8 ie_len; -+ u8 bssid[ETH_ALEN]; -+ u8 init_sta[ETH_ALEN]; -+ u8 resp_sta[ETH_ALEN]; -+} ; -+ -+static u8 TDLS_RSNIE[20]={ 0x01, 0x00, /* Version shall be set to 1 */ -+ 0x00, 0x0f, 0xac, 0x07, /* Group sipher suite */ -+ 0x01, 0x00, /* Pairwise cipher suite count */ -+ 0x00, 0x0f, 0xac, 0x04, /* Pairwise cipher suite list; CCMP only */ -+ 0x01, 0x00, /* AKM suite count */ -+ 0x00, 0x0f, 0xac, 0x07, /* TPK Handshake */ -+ 0x0c, 0x02, -+ /* PMKID shall not be present */ -+ }; -+ -+static u8 TDLS_WMMIE[]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; /* Qos info all set zero */ -+ -+static u8 TDLS_WMM_PARAM_IE[] = {0x00, 0x00, 0x03, 0xa4, 0x00, 0x00, 0x27, 0xa4, 0x00, 0x00, 0x42, 0x43, 0x5e, 0x00, 0x62, 0x32, 0x2f, 0x00}; -+ -+static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20, 0x00, 0x00, 0x00}; /* bit(28), bit(30), bit(37) */ -+ -+/* SRC: Supported Regulatory Classes */ -+static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 }; -+ -+int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len); -+int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len); -+void rtw_reset_tdls_info(_adapter* padapter); -+int rtw_init_tdls_info(_adapter* padapter); -+void rtw_free_tdls_info(struct tdls_info *ptdlsinfo); -+int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms); -+void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta); -+void rtw_free_tdls_timer(struct sta_info *psta); -+void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta); -+#ifdef CONFIG_WFD -+int issue_tunneled_probe_req(_adapter *padapter); -+int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame); -+#endif /* CONFIG_WFD */ -+int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); -+int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_dis_rsp(_adapter * padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy); -+int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack); -+int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *psta, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta); -+int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta); -+int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); -+sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame); -+sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame); -+int On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame); -+int On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame); -+int On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame); -+int On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame); -+int On_TDLS_Peer_Traffic_Indication(_adapter *adapter, union recv_frame *precv_frame); -+int On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame); -+#ifdef CONFIG_TDLS_CH_SW -+sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame); -+sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame); -+void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+#endif -+void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy); -+void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); -+void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); -+ -+u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta); -+u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta); -+int rtw_tdls_is_driver_setup(_adapter *padapter); -+void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta); -+const char * rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action); -+#endif /* CONFIG_TDLS */ -+ -+#endif -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_TDLS_H_ ++#define __RTW_TDLS_H_ ++ ++ ++#ifdef CONFIG_TDLS ++/* TDLS STA state */ ++ ++ ++/* TDLS Diect Link Establishment */ ++#define TDLS_STATE_NONE 0x00000000 /* Default state */ ++#define TDLS_INITIATOR_STATE BIT(28) /* 0x10000000 */ ++#define TDLS_RESPONDER_STATE BIT(29) /* 0x20000000 */ ++#define TDLS_LINKED_STATE BIT(30) /* 0x40000000 */ ++/* TDLS PU Buffer STA */ ++#define TDLS_WAIT_PTR_STATE BIT(24) /* 0x01000000 */ /* Waiting peer's TDLS_PEER_TRAFFIC_RESPONSE frame */ ++/* TDLS Check ALive */ ++#define TDLS_ALIVE_STATE BIT(20) /* 0x00100000 */ /* Check if peer sta is alived. */ ++/* TDLS Channel Switch */ ++#define TDLS_CH_SWITCH_ON_STATE BIT(16) /* 0x00010000 */ ++#define TDLS_PEER_AT_OFF_STATE BIT(17) /* 0x00020000 */ /* Could send pkt on target ch */ ++#define TDLS_CH_SW_INITIATOR_STATE BIT(18) /* 0x00040000 */ /* Avoid duplicated or unconditional ch. switch rsp. */ ++#define TDLS_WAIT_CH_RSP_STATE BIT(19) /* 0x00080000 */ /* Wait Ch. response as we are TDLS channel switch initiator */ ++ ++ ++#define TPK_RESEND_COUNT 1800 /*Unit: seconds */ ++#define CH_SWITCH_TIME 5 ++#define CH_SWITCH_TIMEOUT 20 ++#define TDLS_SIGNAL_THRESH 0x20 ++#define TDLS_WATCHDOG_PERIOD 10 /* Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec */ ++#define TDLS_HANDSHAKE_TIME 3000 ++#define TDLS_PTI_TIME 7000 ++ ++#define TDLS_MIC_LEN 16 ++#define WPA_NONCE_LEN 32 ++#define TDLS_TIMEOUT_LEN 4 ++ ++struct wpa_tdls_ftie { ++ u8 ie_type; /* FTIE */ ++ u8 ie_len; ++ u8 mic_ctrl[2]; ++ u8 mic[TDLS_MIC_LEN]; ++ u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ ++ u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ ++ /* followed by optional elements */ ++} ; ++ ++struct wpa_tdls_lnkid { ++ u8 ie_type; /* Link Identifier IE */ ++ u8 ie_len; ++ u8 bssid[ETH_ALEN]; ++ u8 init_sta[ETH_ALEN]; ++ u8 resp_sta[ETH_ALEN]; ++} ; ++ ++static u8 TDLS_RSNIE[20]={ 0x01, 0x00, /* Version shall be set to 1 */ ++ 0x00, 0x0f, 0xac, 0x07, /* Group sipher suite */ ++ 0x01, 0x00, /* Pairwise cipher suite count */ ++ 0x00, 0x0f, 0xac, 0x04, /* Pairwise cipher suite list; CCMP only */ ++ 0x01, 0x00, /* AKM suite count */ ++ 0x00, 0x0f, 0xac, 0x07, /* TPK Handshake */ ++ 0x0c, 0x02, ++ /* PMKID shall not be present */ ++ }; ++ ++static u8 TDLS_WMMIE[]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; /* Qos info all set zero */ ++ ++static u8 TDLS_WMM_PARAM_IE[] = {0x00, 0x00, 0x03, 0xa4, 0x00, 0x00, 0x27, 0xa4, 0x00, 0x00, 0x42, 0x43, 0x5e, 0x00, 0x62, 0x32, 0x2f, 0x00}; ++ ++static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20, 0x00, 0x00, 0x00}; /* bit(28), bit(30), bit(37) */ ++ ++/* SRC: Supported Regulatory Classes */ ++static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 }; ++ ++int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len); ++int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len); ++void rtw_reset_tdls_info(_adapter* padapter); ++int rtw_init_tdls_info(_adapter* padapter); ++void rtw_free_tdls_info(struct tdls_info *ptdlsinfo); ++int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms); ++void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta); ++void rtw_free_tdls_timer(struct sta_info *psta); ++void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta); ++#ifdef CONFIG_WFD ++int issue_tunneled_probe_req(_adapter *padapter); ++int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame); ++#endif /* CONFIG_WFD */ ++int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); ++int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_dis_rsp(_adapter * padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy); ++int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack); ++int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *psta, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta); ++int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta); ++int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); ++sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Peer_Traffic_Indication(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++#ifdef CONFIG_TDLS_CH_SW ++sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++#endif ++void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy); ++void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++ ++u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta); ++u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta); ++int rtw_tdls_is_driver_setup(_adapter *padapter); ++void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta); ++const char * rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action); ++#endif /* CONFIG_TDLS */ ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_version.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_version.h new file mode 100644 -index 000000000..3e3cb7ce9 +index 0000000..3e3cb7c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_version.h @@ -0,0 +1 @@ +#define DRIVERVERSION "v4.3.24_15589.20151023" diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_vht.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_vht.h new file mode 100644 -index 000000000..def791ab6 +index 0000000..def791a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_vht.h @@ -0,0 +1,143 @@ @@ -310979,238 +352415,238 @@ index 000000000..def791ab6 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_wapi.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_wapi.h new file mode 100644 -index 000000000..15b9212b3 +index 0000000..582410c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_wapi.h @@ -0,0 +1,222 @@ -+#ifndef __INC_WAPI_H -+#define __INC_WAPI_H -+ -+ -+#define CONFIG_WAPI_SW_SMS4 -+#define WAPI_DEBUG -+ -+#define SMS4_MIC_LEN 16 -+#define WAPI_EXT_LEN 18 -+#define MAX_WAPI_IE_LEN 256 -+#define sMacHdrLng 24 // octets in data header, no WEP -+ -+#ifdef WAPI_DEBUG -+ -+/* WAPI trace debug */ -+extern u32 wapi_debug_component; -+ -+static inline void dump_buf(u8 *buf, u32 len) -+{ -+ u32 i; -+ printk("-----------------Len %d----------------\n", len); -+ for(i=0; i= KERNEL_VERSION(4, 7, 0)) ++#define ieee80211_band nl80211_band ++#define IEEE80211_BAND_2GHZ NL80211_BAND_2GHZ ++#define IEEE80211_BAND_5GHZ NL80211_BAND_5GHZ ++#define IEEE80211_NUM_BANDS NUM_NL80211_BANDS ++#endif ++ +struct country_code_to_enum_rd { + u16 countrycode; + const char *iso_name; @@ -311239,7 +352682,7 @@ index 000000000..aea636529 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/rtw_xmit.h b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_xmit.h new file mode 100644 -index 000000000..e1dd91ecd +index 0000000..e1dd91e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/rtw_xmit.h @@ -0,0 +1,865 @@ @@ -312110,7 +353553,7 @@ index 000000000..e1dd91ecd + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/sdio_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_hal.h new file mode 100644 -index 000000000..a694cdd46 +index 0000000..a694cdd --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_hal.h @@ -0,0 +1,56 @@ @@ -312172,7 +353615,7 @@ index 000000000..a694cdd46 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops.h b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops.h new file mode 100644 -index 000000000..6907814d3 +index 0000000..6907814 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops.h @@ -0,0 +1,140 @@ @@ -312318,7 +353761,7 @@ index 000000000..6907814d3 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_ce.h b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_ce.h new file mode 100644 -index 000000000..6dfc77418 +index 0000000..d2da293 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_ce.h @@ -0,0 +1,55 @@ @@ -312340,46 +353783,46 @@ index 000000000..6dfc77418 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * -+ ******************************************************************************/ -+#ifndef _SDIO_OPS_WINCE_H_ -+#define _SDIO_OPS_WINCE_H_ -+ -+#include -+#include -+#include -+#include -+ -+ -+#ifdef PLATFORM_OS_CE -+ -+ -+extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); -+ -+ -+extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); -+ -+ -+uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+ -+extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); -+ -+extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); -+extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); -+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); -+extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); -+ -+#endif -+ -+#endif -+ ++ ******************************************************************************/ ++#ifndef _SDIO_OPS_WINCE_H_ ++#define _SDIO_OPS_WINCE_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_CE ++ ++ ++extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); ++ ++ ++extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); ++ ++ ++uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++ ++extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); ++ ++extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); ++extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); ++extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); ++ ++#endif ++ ++#endif ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_linux.h b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_linux.h new file mode 100644 -index 000000000..38b6a215f +index 0000000..38b6a21 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_linux.h @@ -0,0 +1,52 @@ @@ -312437,7 +353880,7 @@ index 000000000..38b6a215f + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_xp.h b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_xp.h new file mode 100644 -index 000000000..757b35d44 +index 0000000..757b35d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_ops_xp.h @@ -0,0 +1,55 @@ @@ -312498,7 +353941,7 @@ index 000000000..757b35d44 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/sdio_osintf.h b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_osintf.h new file mode 100644 -index 000000000..1a81d2ebc +index 0000000..1a81d2e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/sdio_osintf.h @@ -0,0 +1,36 @@ @@ -312540,7 +353983,7 @@ index 000000000..1a81d2ebc + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/sta_info.h b/drivers/net/wireless/realtek/rtl8189fs/include/sta_info.h new file mode 100644 -index 000000000..bfb63df16 +index 0000000..bfb63df --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/sta_info.h @@ -0,0 +1,591 @@ @@ -313137,7 +354580,7 @@ index 000000000..bfb63df16 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/usb_hal.h b/drivers/net/wireless/realtek/rtl8189fs/include/usb_hal.h new file mode 100644 -index 000000000..8d500eb50 +index 0000000..8d500eb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/usb_hal.h @@ -0,0 +1,61 @@ @@ -313204,7 +354647,7 @@ index 000000000..8d500eb50 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/usb_ops.h b/drivers/net/wireless/realtek/rtl8189fs/include/usb_ops.h new file mode 100644 -index 000000000..ee23314aa +index 0000000..ee23314 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/usb_ops.h @@ -0,0 +1,148 @@ @@ -313358,7 +354801,7 @@ index 000000000..ee23314aa + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/usb_ops_linux.h b/drivers/net/wireless/realtek/rtl8189fs/include/usb_ops_linux.h new file mode 100644 -index 000000000..b0d0f43ee +index 0000000..b0d0f43 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/usb_ops_linux.h @@ -0,0 +1,89 @@ @@ -313453,7 +354896,7 @@ index 000000000..b0d0f43ee + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/usb_osintf.h b/drivers/net/wireless/realtek/rtl8189fs/include/usb_osintf.h new file mode 100644 -index 000000000..62dc44aab +index 0000000..62dc44a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/usb_osintf.h @@ -0,0 +1,32 @@ @@ -313491,7 +354934,7 @@ index 000000000..62dc44aab + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/usb_vendor_req.h b/drivers/net/wireless/realtek/rtl8189fs/include/usb_vendor_req.h new file mode 100644 -index 000000000..b60eeface +index 0000000..b60eefa --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/usb_vendor_req.h @@ -0,0 +1,60 @@ @@ -313557,7 +355000,7 @@ index 000000000..b60eeface + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/wifi.h b/drivers/net/wireless/realtek/rtl8189fs/include/wifi.h new file mode 100644 -index 000000000..9d21a5afd +index 0000000..9d21a5a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/wifi.h @@ -0,0 +1,1397 @@ @@ -314960,7 +356403,7 @@ index 000000000..9d21a5afd + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/wlan_bssdef.h b/drivers/net/wireless/realtek/rtl8189fs/include/wlan_bssdef.h new file mode 100644 -index 000000000..bd5237a75 +index 0000000..bd5237a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/wlan_bssdef.h @@ -0,0 +1,748 @@ @@ -315714,7 +357157,7 @@ index 000000000..bd5237a75 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/include/xmit_osdep.h b/drivers/net/wireless/realtek/rtl8189fs/include/xmit_osdep.h new file mode 100644 -index 000000000..d489ebfcf +index 0000000..d489ebf --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/include/xmit_osdep.h @@ -0,0 +1,100 @@ @@ -315820,7 +357263,7 @@ index 000000000..d489ebfcf + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/custom_gpio_linux.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/custom_gpio_linux.c new file mode 100644 -index 000000000..418d7932e +index 0000000..418d793 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/custom_gpio_linux.c @@ -0,0 +1,356 @@ @@ -316182,7104 +357625,7147 @@ index 000000000..418d7932e +#endif //CONFIG_PLATFORM_SPRD diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_cfg80211.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_cfg80211.c new file mode 100644 -index 000000000..d8e06fbe5 +index 0000000..c942ed6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_cfg80211.c -@@ -0,0 +1,6873 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#define _IOCTL_CFG80211_C_ -+ -+#include -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) -+#define STATION_INFO_SIGNAL BIT(NL80211_STA_INFO_SIGNAL) -+#define STATION_INFO_TX_BITRATE BIT(NL80211_STA_INFO_TX_BITRATE) -+#define STATION_INFO_RX_PACKETS BIT(NL80211_STA_INFO_RX_PACKETS) -+#define STATION_INFO_TX_PACKETS BIT(NL80211_STA_INFO_TX_PACKETS) -+#define STATION_INFO_ASSOC_REQ_IES 0 -+#endif /* Linux kernel >= 4.0.0 */ -+ -+#include +@@ -0,0 +1,6916 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IOCTL_CFG80211_C_ ++ ++#include ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) ++#define STATION_INFO_SIGNAL BIT(NL80211_STA_INFO_SIGNAL) ++#define STATION_INFO_TX_BITRATE BIT(NL80211_STA_INFO_TX_BITRATE) ++#define STATION_INFO_RX_PACKETS BIT(NL80211_STA_INFO_RX_PACKETS) ++#define STATION_INFO_TX_PACKETS BIT(NL80211_STA_INFO_TX_PACKETS) ++#define STATION_INFO_ASSOC_REQ_IES 0 ++#endif /* Linux kernel >= 4.0.0 */ ++ ++#include +#include -+ -+#define RTW_MAX_MGMT_TX_CNT (8) -+#define RTW_MAX_MGMT_TX_MS_GAS (500) -+ -+#define RTW_SCAN_IE_LEN_MAX 2304 -+#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 //ms -+#define RTW_MAX_NUM_PMKIDS 4 -+ -+#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ -+#ifndef WLAN_CIPHER_SUITE_SMS4 -+#define WLAN_CIPHER_SUITE_SMS4 0x00147201 -+#endif -+ -+#ifndef WLAN_AKM_SUITE_WAPI_PSK -+#define WLAN_AKM_SUITE_WAPI_PSK 0x000FAC04 -+#endif -+ -+#ifndef WLAN_AKM_SUITE_WAPI_CERT -+#define WLAN_AKM_SUITE_WAPI_CERT 0x000FAC12 -+#endif -+ -+#ifndef NL80211_WAPI_VERSION_1 -+#define NL80211_WAPI_VERSION_1 (1 << 2) -+#endif -+ -+#endif -+ -+#ifdef CONFIG_PLATFORM_ARM_SUN8I -+#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 8000 -+#else -+#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 12000 -+#endif -+ -+static const u32 rtw_cipher_suites[] = { -+ WLAN_CIPHER_SUITE_WEP40, -+ WLAN_CIPHER_SUITE_WEP104, -+ WLAN_CIPHER_SUITE_TKIP, -+ WLAN_CIPHER_SUITE_CCMP, -+#ifdef CONFIG_WAPI_SUPPORT -+ WLAN_CIPHER_SUITE_SMS4, -+#endif // CONFIG_WAPI_SUPPORT -+#ifdef CONFIG_IEEE80211W -+ WLAN_CIPHER_SUITE_AES_CMAC, -+#endif //CONFIG_IEEE80211W -+}; -+ -+#define RATETAB_ENT(_rate, _rateid, _flags) \ -+ { \ -+ .bitrate = (_rate), \ -+ .hw_value = (_rateid), \ -+ .flags = (_flags), \ -+ } -+ -+#define CHAN2G(_channel, _freq, _flags) { \ -+ .band = IEEE80211_BAND_2GHZ, \ -+ .center_freq = (_freq), \ -+ .hw_value = (_channel), \ -+ .flags = (_flags), \ -+ .max_antenna_gain = 0, \ -+ .max_power = 30, \ -+} -+ -+#define CHAN5G(_channel, _flags) { \ -+ .band = IEEE80211_BAND_5GHZ, \ -+ .center_freq = 5000 + (5 * (_channel)), \ -+ .hw_value = (_channel), \ -+ .flags = (_flags), \ -+ .max_antenna_gain = 0, \ -+ .max_power = 30, \ -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+/* if wowlan is not supported, kernel generate a disconnect at each suspend -+ * cf: /net/wireless/sysfs.c, so register a stub wowlan. -+ * Moreover wowlan has to be enabled via a the nl80211_set_wowlan callback. -+ * (from user space, e.g. iw phy0 wowlan enable) -+ */ -+static const struct wiphy_wowlan_support wowlan_stub = { -+ .flags = WIPHY_WOWLAN_ANY, -+ .n_patterns = 0, -+ .pattern_max_len = 0, -+ .pattern_min_len = 0, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+ .max_pkt_offset = 0, -+#endif -+}; -+#endif -+ -+static struct ieee80211_rate rtw_rates[] = { -+ RATETAB_ENT(10, 0x1, 0), -+ RATETAB_ENT(20, 0x2, 0), -+ RATETAB_ENT(55, 0x4, 0), -+ RATETAB_ENT(110, 0x8, 0), -+ RATETAB_ENT(60, 0x10, 0), -+ RATETAB_ENT(90, 0x20, 0), -+ RATETAB_ENT(120, 0x40, 0), -+ RATETAB_ENT(180, 0x80, 0), -+ RATETAB_ENT(240, 0x100, 0), -+ RATETAB_ENT(360, 0x200, 0), -+ RATETAB_ENT(480, 0x400, 0), -+ RATETAB_ENT(540, 0x800, 0), -+}; -+ -+#define rtw_a_rates (rtw_rates + 4) -+#define RTW_A_RATES_NUM 8 -+#define rtw_g_rates (rtw_rates + 0) -+#define RTW_G_RATES_NUM 12 -+ -+#define RTW_2G_CHANNELS_NUM 14 -+#define RTW_5G_CHANNELS_NUM 37 -+ -+static struct ieee80211_channel rtw_2ghz_channels[] = { -+ CHAN2G(1, 2412, 0), -+ CHAN2G(2, 2417, 0), -+ CHAN2G(3, 2422, 0), -+ CHAN2G(4, 2427, 0), -+ CHAN2G(5, 2432, 0), -+ CHAN2G(6, 2437, 0), -+ CHAN2G(7, 2442, 0), -+ CHAN2G(8, 2447, 0), -+ CHAN2G(9, 2452, 0), -+ CHAN2G(10, 2457, 0), -+ CHAN2G(11, 2462, 0), -+ CHAN2G(12, 2467, 0), -+ CHAN2G(13, 2472, 0), -+ CHAN2G(14, 2484, 0), -+}; -+ -+static struct ieee80211_channel rtw_5ghz_a_channels[] = { -+ CHAN5G(34, 0), CHAN5G(36, 0), -+ CHAN5G(38, 0), CHAN5G(40, 0), -+ CHAN5G(42, 0), CHAN5G(44, 0), -+ CHAN5G(46, 0), CHAN5G(48, 0), -+ CHAN5G(52, 0), CHAN5G(56, 0), -+ CHAN5G(60, 0), CHAN5G(64, 0), -+ CHAN5G(100, 0), CHAN5G(104, 0), -+ CHAN5G(108, 0), CHAN5G(112, 0), -+ CHAN5G(116, 0), CHAN5G(120, 0), -+ CHAN5G(124, 0), CHAN5G(128, 0), -+ CHAN5G(132, 0), CHAN5G(136, 0), -+ CHAN5G(140, 0), CHAN5G(149, 0), -+ CHAN5G(153, 0), CHAN5G(157, 0), -+ CHAN5G(161, 0), CHAN5G(165, 0), -+ CHAN5G(184, 0), CHAN5G(188, 0), -+ CHAN5G(192, 0), CHAN5G(196, 0), -+ CHAN5G(200, 0), CHAN5G(204, 0), -+ CHAN5G(208, 0), CHAN5G(212, 0), -+ CHAN5G(216, 0), -+}; -+ -+ -+void rtw_2g_channels_init(struct ieee80211_channel *channels) -+{ -+ _rtw_memcpy((void*)channels, (void*)rtw_2ghz_channels, -+ sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM -+ ); -+} -+ -+void rtw_5g_channels_init(struct ieee80211_channel *channels) -+{ -+ _rtw_memcpy((void*)channels, (void*)rtw_5ghz_a_channels, -+ sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM -+ ); -+} -+ -+void rtw_2g_rates_init(struct ieee80211_rate *rates) -+{ -+ _rtw_memcpy(rates, rtw_g_rates, -+ sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM -+ ); -+} -+ -+void rtw_5g_rates_init(struct ieee80211_rate *rates) -+{ -+ _rtw_memcpy(rates, rtw_a_rates, -+ sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM -+ ); -+} -+ -+struct ieee80211_supported_band *rtw_spt_band_alloc( -+ enum ieee80211_band band -+ ) -+{ -+ struct ieee80211_supported_band *spt_band = NULL; -+ int n_channels, n_bitrates; -+ -+ if(band == IEEE80211_BAND_2GHZ) -+ { -+ n_channels = RTW_2G_CHANNELS_NUM; -+ n_bitrates = RTW_G_RATES_NUM; -+ } -+ else if(band == IEEE80211_BAND_5GHZ) -+ { -+ n_channels = RTW_5G_CHANNELS_NUM; -+ n_bitrates = RTW_A_RATES_NUM; -+ } -+ else -+ { -+ goto exit; -+ } -+ -+ spt_band = (struct ieee80211_supported_band *)rtw_zmalloc( -+ sizeof(struct ieee80211_supported_band) -+ + sizeof(struct ieee80211_channel)*n_channels -+ + sizeof(struct ieee80211_rate)*n_bitrates -+ ); -+ if(!spt_band) -+ goto exit; -+ -+ spt_band->channels = (struct ieee80211_channel*)(((u8*)spt_band)+sizeof(struct ieee80211_supported_band)); -+ spt_band->bitrates= (struct ieee80211_rate*)(((u8*)spt_band->channels)+sizeof(struct ieee80211_channel)*n_channels); -+ spt_band->band = band; -+ spt_band->n_channels = n_channels; -+ spt_band->n_bitrates = n_bitrates; -+ -+ if(band == IEEE80211_BAND_2GHZ) -+ { -+ rtw_2g_channels_init(spt_band->channels); -+ rtw_2g_rates_init(spt_band->bitrates); -+ } -+ else if(band == IEEE80211_BAND_5GHZ) -+ { -+ rtw_5g_channels_init(spt_band->channels); -+ rtw_5g_rates_init(spt_band->bitrates); -+ } -+ -+ //spt_band.ht_cap -+ -+exit: -+ -+ return spt_band; -+} -+ -+void rtw_spt_band_free(struct ieee80211_supported_band *spt_band) -+{ -+ u32 size = 0; -+ -+ if(!spt_band) -+ return; -+ -+ if(spt_band->band == IEEE80211_BAND_2GHZ) -+ { -+ size = sizeof(struct ieee80211_supported_band) -+ + sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM -+ + sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM; -+ } -+ else if(spt_band->band == IEEE80211_BAND_5GHZ) -+ { -+ size = sizeof(struct ieee80211_supported_band) -+ + sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM -+ + sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM; -+ } -+ else -+ { -+ -+ } -+ rtw_mfree((u8*)spt_band, size); -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+static const struct ieee80211_txrx_stypes -+rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { -+ [NL80211_IFTYPE_ADHOC] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+ [NL80211_IFTYPE_STATION] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) -+ }, -+ [NL80211_IFTYPE_AP] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | -+ BIT(IEEE80211_STYPE_DISASSOC >> 4) | -+ BIT(IEEE80211_STYPE_AUTH >> 4) | -+ BIT(IEEE80211_STYPE_DEAUTH >> 4) | -+ BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+ [NL80211_IFTYPE_AP_VLAN] = { -+ /* copy AP */ -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | -+ BIT(IEEE80211_STYPE_DISASSOC >> 4) | -+ BIT(IEEE80211_STYPE_AUTH >> 4) | -+ BIT(IEEE80211_STYPE_DEAUTH >> 4) | -+ BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+ [NL80211_IFTYPE_P2P_CLIENT] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) -+ }, -+ [NL80211_IFTYPE_P2P_GO] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | -+ BIT(IEEE80211_STYPE_DISASSOC >> 4) | -+ BIT(IEEE80211_STYPE_AUTH >> 4) | -+ BIT(IEEE80211_STYPE_DEAUTH >> 4) | -+ BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+}; -+#endif -+ -+static u64 rtw_get_systime_us(void) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,39)) -+ struct timespec ts; -+ get_monotonic_boottime(&ts); -+ return ((u64)ts.tv_sec*1000000) + ts.tv_nsec / 1000; -+#else -+ struct timeval tv; -+ do_gettimeofday(&tv); -+ return ((u64)tv.tv_sec*1000000) + tv.tv_usec; -+#endif -+} -+ -+#define MAX_BSSINFO_LEN 1000 -+struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) -+{ -+ struct ieee80211_channel *notify_channel; -+ struct cfg80211_bss *bss = NULL; -+ //struct ieee80211_supported_band *band; -+ u16 channel; -+ u32 freq; -+ u64 notify_timestamp; -+ u16 notify_capability; -+ u16 notify_interval; -+ u8 *notify_ie; -+ size_t notify_ielen; -+ s32 notify_signal; -+ //u8 buf[MAX_BSSINFO_LEN]; -+ -+ u8 *pbuf; -+ size_t buf_size = MAX_BSSINFO_LEN; -+ size_t len,bssinf_len=0; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ struct wireless_dev *wdev = padapter->rtw_wdev; -+ struct wiphy *wiphy = wdev->wiphy; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ pbuf = rtw_zmalloc(buf_size); -+ if(pbuf == NULL){ -+ DBG_871X("%s pbuf allocate failed !! \n",__FUNCTION__); -+ return bss; -+ } -+ -+ //DBG_8192C("%s\n", __func__); -+ -+ bssinf_len = pnetwork->network.IELength+sizeof (struct rtw_ieee80211_hdr_3addr); -+ if(bssinf_len > buf_size){ -+ DBG_871X("%s IE Length too long > %zu byte \n",__FUNCTION__,buf_size); -+ goto exit; -+ } -+ -+#ifndef CONFIG_WAPI_SUPPORT -+ { -+ u16 wapi_len = 0; -+ -+ if(rtw_get_wapi_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wapi_len)>0) -+ { -+ if(wapi_len > 0) -+ { -+ DBG_871X("%s, no support wapi!\n",__FUNCTION__); -+ goto exit; -+ } -+ } -+ } -+#endif //!CONFIG_WAPI_SUPPORT -+ -+ //To reduce PBC Overlap rate -+ //_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ if(adapter_wdev_data(padapter)->scan_request != NULL) -+ { -+ u8 *psr=NULL, sr = 0; -+ NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; -+ struct cfg80211_scan_request *request = adapter_wdev_data(padapter)->scan_request; -+ struct cfg80211_ssid *ssids = request->ssids; -+ u32 wpsielen=0; -+ u8 *wpsie=NULL; -+ -+ wpsie = rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); -+ -+ if(wpsie && wpsielen>0) -+ psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); -+ -+ if (sr != 0) -+ { -+ if(request->n_ssids == 1 && request->n_channels == 1) // it means under processing WPS -+ { -+ DBG_8192C("ssid=%s, len=%d\n", pssid->Ssid, pssid->SsidLength); -+ -+ if (ssids[0].ssid_len == 0) { -+ } -+ else if(pssid->SsidLength == ssids[0].ssid_len && -+ _rtw_memcmp(pssid->Ssid, ssids[0].ssid, ssids[0].ssid_len)) -+ { -+ DBG_871X("%s, got sr and ssid match!\n", __func__); -+ } -+ else -+ { -+ if(psr !=NULL) -+ *psr = 0; //clear sr -+ -+#if 0 -+ WLAN_BSSID_EX *pselect_network = &pnetwork->network; -+ struct cfg80211_bss *pselect_bss = NULL; -+ struct ieee80211_channel *notify_channel = NULL; -+ u32 freq; -+ -+ DBG_871X("%s, got sr, but ssid mismatch, to remove this bss\n", __func__); -+ -+ freq = rtw_ch2freq(pselect_network->Configuration.DSConfig); -+ notify_channel = ieee80211_get_channel(wiphy, freq); -+ pselect_bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, -+ pselect_network->MacAddress, pselect_network->Ssid.Ssid, -+ pselect_network->Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, -+ 0/*WLAN_CAPABILITY_ESS*/); -+ -+ if(pselect_bss) -+ { -+ DBG_871X("%s, got bss for cfg80211 for unlinking bss\n", __func__); -+ -+ cfg80211_unlink_bss(wiphy, pselect_bss); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) -+ cfg80211_put_bss(wiphy, pselect_bss); -+#else -+ cfg80211_put_bss(pselect_bss); -+#endif -+ -+ } -+ -+ goto exit; -+#endif -+ } -+ } -+ } -+ } -+ //_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ -+ -+ channel = pnetwork->network.Configuration.DSConfig; -+ freq = rtw_ch2freq(channel); -+ notify_channel = ieee80211_get_channel(wiphy, freq); -+ -+ if (0) -+ notify_timestamp = le64_to_cpu(*(u64*)rtw_get_timestampe_from_ie(pnetwork->network.IEs)); -+ else -+ notify_timestamp = rtw_get_systime_us(); -+ -+ notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); -+ notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); -+ -+ notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; -+ notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; -+ -+ //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) -+ if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && -+ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { -+ notify_signal = 100*translate_percentage_to_dbm(padapter->recvpriv.signal_strength);//dbm -+ } else { -+ notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm -+ } -+ -+ #if 0 -+ DBG_8192C("bssid: "MAC_FMT"\n", MAC_ARG(pnetwork->network.MacAddress)); -+ DBG_8192C("Channel: %d(%d)\n", channel, freq); -+ DBG_8192C("Capability: %X\n", notify_capability); -+ DBG_8192C("Beacon interval: %d\n", notify_interval); -+ DBG_8192C("Signal: %d\n", notify_signal); -+ DBG_8192C("notify_timestamp: %llu\n", notify_timestamp); -+ #endif -+ -+ //pbuf = buf; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); -+ //pmlmeext->mgnt_seq++; -+ -+ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ SetFrameSubType(pbuf, WIFI_BEACON); -+ } else { -+ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); -+ SetFrameSubType(pbuf, WIFI_PROBERSP); -+ } -+ -+ _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); -+ -+ -+ //pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); -+ len = sizeof (struct rtw_ieee80211_hdr_3addr); -+ _rtw_memcpy((pbuf+len), pnetwork->network.IEs, pnetwork->network.IELength); -+ *((u64*)(pbuf+len)) = cpu_to_le64(notify_timestamp); -+ -+ len += pnetwork->network.IELength; -+ -+ //#ifdef CONFIG_P2P -+ //if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) -+ //{ -+ // DBG_8192C("%s, got p2p_ie\n", __func__); -+ //} -+ //#endif -+ -+#if 1 -+ bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)pbuf, -+ len, notify_signal, GFP_ATOMIC); -+#else -+ -+ bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, -+ notify_timestamp, notify_capability, notify_interval, notify_ie, -+ notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); -+#endif -+ -+ if (unlikely(!bss)) { -+ DBG_8192C(FUNC_ADPT_FMT" bss NULL\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) -+#ifndef COMPAT_KERNEL_RELEASE -+ //patch for cfg80211, update beacon ies to information_elements -+ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON -+ -+ if(bss->len_information_elements != bss->len_beacon_ies) -+ { -+ bss->information_elements = bss->beacon_ies; -+ bss->len_information_elements = bss->len_beacon_ies; -+ } -+ } -+#endif //COMPAT_KERNEL_RELEASE -+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) -+ -+/* -+ { -+ if( bss->information_elements == bss->proberesp_ies) -+ { -+ if( bss->len_information_elements != bss->len_proberesp_ies) -+ { -+ DBG_8192C("error!, len_information_elements != bss->len_proberesp_ies\n"); -+ } -+ -+ } -+ else if(bss->len_information_elements < bss->len_beacon_ies) -+ { -+ bss->information_elements = bss->beacon_ies; -+ bss->len_information_elements = bss->len_beacon_ies; -+ } -+ } -+*/ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) -+ cfg80211_put_bss(wiphy, bss); -+#else -+ cfg80211_put_bss(bss); -+#endif -+ -+exit: -+ if(pbuf) -+ rtw_mfree(pbuf, buf_size); -+ return bss; -+ -+} -+ -+/* -+ Check the given bss is valid by kernel API cfg80211_get_bss() -+ @padapter : the given adapter -+ -+ return _TRUE if bss is valid, _FALSE for not found. -+*/ -+int rtw_cfg80211_check_bss(_adapter *padapter) -+{ -+ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); -+ struct cfg80211_bss *bss = NULL; -+ struct ieee80211_channel *notify_channel = NULL; -+ u32 freq; -+ -+ if (!(pnetwork) || !(padapter->rtw_wdev)) -+ return _FALSE; -+ -+ freq = rtw_ch2freq(pnetwork->Configuration.DSConfig); -+ notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); -+ bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, -+ pnetwork->MacAddress, pnetwork->Ssid.Ssid, -+ pnetwork->Ssid.SsidLength, -+ WLAN_CAPABILITY_ESS, WLAN_CAPABILITY_ESS); -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) -+ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); -+#else -+ cfg80211_put_bss(bss); -+#endif -+ -+ return (bss!=NULL); -+} -+ -+void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct cfg80211_bss *bss = NULL; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) -+ struct wiphy *wiphy = pwdev->wiphy; -+ int freq = 2412; -+ struct ieee80211_channel *notify_channel; -+#endif -+ -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) -+ freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig); -+ -+ if (0) -+ DBG_871X("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq); -+#endif -+ -+ if (pwdev->iftype != NL80211_IFTYPE_ADHOC) -+ { -+ return; -+ } -+ -+ if (!rtw_cfg80211_check_bss(padapter)) { -+ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); -+ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; -+ -+ if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE) -+ { -+ -+ _rtw_memcpy(&cur_network->network, pnetwork, sizeof(WLAN_BSSID_EX)); -+ if(cur_network) -+ { -+ if (!rtw_cfg80211_inform_bss(padapter,cur_network)) -+ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); -+ else -+ DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); -+ } -+ else -+ { -+ DBG_871X("cur_network is not exist!!!\n"); -+ return ; -+ } -+ } -+ else -+ { -+ if(scanned == NULL) -+ rtw_warn_on(1); -+ -+ if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE -+ && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE -+ ) { -+ if (!rtw_cfg80211_inform_bss(padapter,scanned)) { -+ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); -+ } else { -+ //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); -+ } -+ } else { -+ DBG_871X("scanned & pnetwork compare fail\n"); -+ rtw_warn_on(1); -+ } -+ } -+ -+ if (!rtw_cfg80211_check_bss(padapter)) -+ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); -+ } -+ //notify cfg80211 that device joined an IBSS -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) -+ notify_channel = ieee80211_get_channel(wiphy, freq); -+ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, notify_channel, GFP_ATOMIC); -+#else -+ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_indicate_connect(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); -+#endif -+ struct cfg80211_bss *bss = NULL; -+ -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ if (pwdev->iftype != NL80211_IFTYPE_STATION -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT -+ #endif -+ ) { -+ return; -+ } -+ -+ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) -+ return; -+ -+#ifdef CONFIG_P2P -+ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) -+ { -+ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); -+ } -+ } -+#endif //CONFIG_P2P -+ -+ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) { -+ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); -+ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; -+ -+ //DBG_871X(FUNC_ADPT_FMT" BSS not found\n", FUNC_ADPT_ARG(padapter)); -+ -+ if(scanned == NULL) { -+ rtw_warn_on(1); -+ goto check_bss; -+ } -+ -+ if (_rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE -+ && _rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE -+ ) { -+ if (!rtw_cfg80211_inform_bss(padapter,scanned)) { -+ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); -+ } else { -+ //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); -+ } -+ } else { -+ DBG_871X("scanned: %s("MAC_FMT"), cur: %s("MAC_FMT")\n", -+ scanned->network.Ssid.Ssid, MAC_ARG(scanned->network.MacAddress), -+ pnetwork->Ssid.Ssid, MAC_ARG(pnetwork->MacAddress) -+ ); -+ rtw_warn_on(1); -+ } -+ } -+ -+check_bss: -+ if (!rtw_cfg80211_check_bss(padapter)) -+ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (rtw_to_roam(padapter) > 0) { -+ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) -+ struct wiphy *wiphy = pwdev->wiphy; -+ struct ieee80211_channel *notify_channel; -+ u32 freq; -+ u16 channel = cur_network->network.Configuration.DSConfig; -+ -+ freq = rtw_ch2freq(channel); -+ notify_channel = ieee80211_get_channel(wiphy, freq); -+ #endif -+ -+ DBG_871X(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter)); -+ cfg80211_roamed(padapter->pnetdev -+ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) -+ , notify_channel -+ #endif -+ , cur_network->network.MacAddress -+ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 -+ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 -+ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 -+ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 -+ , GFP_ATOMIC); -+ } -+ else -+ { -+ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) -+ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); -+ #endif -+ cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress -+ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 -+ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 -+ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 -+ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 -+ , WLAN_STATUS_SUCCESS, GFP_ATOMIC); -+ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) -+ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); -+ #endif -+ } -+} -+ -+void rtw_cfg80211_indicate_disconnect(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); -+#endif -+ -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (pwdev->iftype != NL80211_IFTYPE_STATION -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT -+ #endif -+ ) { -+ return; -+ } -+ -+ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) -+ return; -+ -+#ifdef CONFIG_P2P -+ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) -+ { -+ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ { -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ if (pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT) -+ #endif -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ -+ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); -+ } -+ } -+#endif //CONFIG_P2P -+ -+ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 -+ if (!padapter->mlmepriv.not_indic_disco || padapter->ndev_unregistering) { -+ #else -+ { -+ #endif -+ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) -+ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); -+ -+ if(pwdev->sme_state==CFG80211_SME_CONNECTING) -+ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, -+ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); -+ else if(pwdev->sme_state==CFG80211_SME_CONNECTED) -+ icfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, 0, GFP_ATOMIC); -+ //else -+ //DBG_8192C("pwdev->sme_state=%d\n", pwdev->sme_state); -+ -+ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); -+ #else -+ -+ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { -+ DBG_871X(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter)); ++ ++#define RTW_MAX_MGMT_TX_CNT (8) ++#define RTW_MAX_MGMT_TX_MS_GAS (500) ++ ++#define RTW_SCAN_IE_LEN_MAX 2304 ++#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 //ms ++#define RTW_MAX_NUM_PMKIDS 4 ++ ++#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ ++#ifndef WLAN_CIPHER_SUITE_SMS4 ++#define WLAN_CIPHER_SUITE_SMS4 0x00147201 ++#endif ++ ++#ifndef WLAN_AKM_SUITE_WAPI_PSK ++#define WLAN_AKM_SUITE_WAPI_PSK 0x000FAC04 ++#endif ++ ++#ifndef WLAN_AKM_SUITE_WAPI_CERT ++#define WLAN_AKM_SUITE_WAPI_CERT 0x000FAC12 ++#endif ++ ++#ifndef NL80211_WAPI_VERSION_1 ++#define NL80211_WAPI_VERSION_1 (1 << 2) ++#endif ++ ++#endif ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN8I ++#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 8000 ++#else ++#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 12000 ++#endif ++ ++static const u32 rtw_cipher_suites[] = { ++ WLAN_CIPHER_SUITE_WEP40, ++ WLAN_CIPHER_SUITE_WEP104, ++ WLAN_CIPHER_SUITE_TKIP, ++ WLAN_CIPHER_SUITE_CCMP, ++#ifdef CONFIG_WAPI_SUPPORT ++ WLAN_CIPHER_SUITE_SMS4, ++#endif // CONFIG_WAPI_SUPPORT ++#ifdef CONFIG_IEEE80211W ++ WLAN_CIPHER_SUITE_AES_CMAC, ++#endif //CONFIG_IEEE80211W ++}; ++ ++#define RATETAB_ENT(_rate, _rateid, _flags) \ ++ { \ ++ .bitrate = (_rate), \ ++ .hw_value = (_rateid), \ ++ .flags = (_flags), \ ++ } ++ ++#define CHAN2G(_channel, _freq, _flags) { \ ++ .band = IEEE80211_BAND_2GHZ, \ ++ .center_freq = (_freq), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++#define CHAN5G(_channel, _flags) { \ ++ .band = IEEE80211_BAND_5GHZ, \ ++ .center_freq = 5000 + (5 * (_channel)), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++/* if wowlan is not supported, kernel generate a disconnect at each suspend ++ * cf: /net/wireless/sysfs.c, so register a stub wowlan. ++ * Moreover wowlan has to be enabled via a the nl80211_set_wowlan callback. ++ * (from user space, e.g. iw phy0 wowlan enable) ++ */ ++static const struct wiphy_wowlan_support wowlan_stub = { ++ .flags = WIPHY_WOWLAN_ANY, ++ .n_patterns = 0, ++ .pattern_max_len = 0, ++ .pattern_min_len = 0, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) ++ .max_pkt_offset = 0, ++#endif ++}; ++#endif ++ ++static struct ieee80211_rate rtw_rates[] = { ++ RATETAB_ENT(10, 0x1, 0), ++ RATETAB_ENT(20, 0x2, 0), ++ RATETAB_ENT(55, 0x4, 0), ++ RATETAB_ENT(110, 0x8, 0), ++ RATETAB_ENT(60, 0x10, 0), ++ RATETAB_ENT(90, 0x20, 0), ++ RATETAB_ENT(120, 0x40, 0), ++ RATETAB_ENT(180, 0x80, 0), ++ RATETAB_ENT(240, 0x100, 0), ++ RATETAB_ENT(360, 0x200, 0), ++ RATETAB_ENT(480, 0x400, 0), ++ RATETAB_ENT(540, 0x800, 0), ++}; ++ ++#define rtw_a_rates (rtw_rates + 4) ++#define RTW_A_RATES_NUM 8 ++#define rtw_g_rates (rtw_rates + 0) ++#define RTW_G_RATES_NUM 12 ++ ++#define RTW_2G_CHANNELS_NUM 14 ++#define RTW_5G_CHANNELS_NUM 37 ++ ++static struct ieee80211_channel rtw_2ghz_channels[] = { ++ CHAN2G(1, 2412, 0), ++ CHAN2G(2, 2417, 0), ++ CHAN2G(3, 2422, 0), ++ CHAN2G(4, 2427, 0), ++ CHAN2G(5, 2432, 0), ++ CHAN2G(6, 2437, 0), ++ CHAN2G(7, 2442, 0), ++ CHAN2G(8, 2447, 0), ++ CHAN2G(9, 2452, 0), ++ CHAN2G(10, 2457, 0), ++ CHAN2G(11, 2462, 0), ++ CHAN2G(12, 2467, 0), ++ CHAN2G(13, 2472, 0), ++ CHAN2G(14, 2484, 0), ++}; ++ ++static struct ieee80211_channel rtw_5ghz_a_channels[] = { ++ CHAN5G(34, 0), CHAN5G(36, 0), ++ CHAN5G(38, 0), CHAN5G(40, 0), ++ CHAN5G(42, 0), CHAN5G(44, 0), ++ CHAN5G(46, 0), CHAN5G(48, 0), ++ CHAN5G(52, 0), CHAN5G(56, 0), ++ CHAN5G(60, 0), CHAN5G(64, 0), ++ CHAN5G(100, 0), CHAN5G(104, 0), ++ CHAN5G(108, 0), CHAN5G(112, 0), ++ CHAN5G(116, 0), CHAN5G(120, 0), ++ CHAN5G(124, 0), CHAN5G(128, 0), ++ CHAN5G(132, 0), CHAN5G(136, 0), ++ CHAN5G(140, 0), CHAN5G(149, 0), ++ CHAN5G(153, 0), CHAN5G(157, 0), ++ CHAN5G(161, 0), CHAN5G(165, 0), ++ CHAN5G(184, 0), CHAN5G(188, 0), ++ CHAN5G(192, 0), CHAN5G(196, 0), ++ CHAN5G(200, 0), CHAN5G(204, 0), ++ CHAN5G(208, 0), CHAN5G(212, 0), ++ CHAN5G(216, 0), ++}; ++ ++ ++void rtw_2g_channels_init(struct ieee80211_channel *channels) ++{ ++ _rtw_memcpy((void*)channels, (void*)rtw_2ghz_channels, ++ sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM ++ ); ++} ++ ++void rtw_5g_channels_init(struct ieee80211_channel *channels) ++{ ++ _rtw_memcpy((void*)channels, (void*)rtw_5ghz_a_channels, ++ sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM ++ ); ++} ++ ++void rtw_2g_rates_init(struct ieee80211_rate *rates) ++{ ++ _rtw_memcpy(rates, rtw_g_rates, ++ sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM ++ ); ++} ++ ++void rtw_5g_rates_init(struct ieee80211_rate *rates) ++{ ++ _rtw_memcpy(rates, rtw_a_rates, ++ sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM ++ ); ++} ++ ++struct ieee80211_supported_band *rtw_spt_band_alloc( ++ enum ieee80211_band band ++ ) ++{ ++ struct ieee80211_supported_band *spt_band = NULL; ++ int n_channels, n_bitrates; ++ ++ if(band == IEEE80211_BAND_2GHZ) ++ { ++ n_channels = RTW_2G_CHANNELS_NUM; ++ n_bitrates = RTW_G_RATES_NUM; ++ } ++ else if(band == IEEE80211_BAND_5GHZ) ++ { ++ n_channels = RTW_5G_CHANNELS_NUM; ++ n_bitrates = RTW_A_RATES_NUM; ++ } ++ else ++ { ++ goto exit; ++ } ++ ++ spt_band = (struct ieee80211_supported_band *)rtw_zmalloc( ++ sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*n_channels ++ + sizeof(struct ieee80211_rate)*n_bitrates ++ ); ++ if(!spt_band) ++ goto exit; ++ ++ spt_band->channels = (struct ieee80211_channel*)(((u8*)spt_band)+sizeof(struct ieee80211_supported_band)); ++ spt_band->bitrates= (struct ieee80211_rate*)(((u8*)spt_band->channels)+sizeof(struct ieee80211_channel)*n_channels); ++ spt_band->band = band; ++ spt_band->n_channels = n_channels; ++ spt_band->n_bitrates = n_bitrates; ++ ++ if(band == IEEE80211_BAND_2GHZ) ++ { ++ rtw_2g_channels_init(spt_band->channels); ++ rtw_2g_rates_init(spt_band->bitrates); ++ } ++ else if(band == IEEE80211_BAND_5GHZ) ++ { ++ rtw_5g_channels_init(spt_band->channels); ++ rtw_5g_rates_init(spt_band->bitrates); ++ } ++ ++ //spt_band.ht_cap ++ ++exit: ++ ++ return spt_band; ++} ++ ++void rtw_spt_band_free(struct ieee80211_supported_band *spt_band) ++{ ++ u32 size = 0; ++ ++ if(!spt_band) ++ return; ++ ++ if(spt_band->band == IEEE80211_BAND_2GHZ) ++ { ++ size = sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM ++ + sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM; ++ } ++ else if(spt_band->band == IEEE80211_BAND_5GHZ) ++ { ++ size = sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM ++ + sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM; ++ } ++ else ++ { ++ ++ } ++ rtw_mfree((u8*)spt_band, size); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++static const struct ieee80211_txrx_stypes ++rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { ++ [NL80211_IFTYPE_ADHOC] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_STATION] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_AP] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_AP_VLAN] = { ++ /* copy AP */ ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_CLIENT] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_GO] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++}; ++#endif ++ ++static u64 rtw_get_systime_us(void) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,39)) ++ struct timespec ts; ++ get_monotonic_boottime(&ts); ++ return ((u64)ts.tv_sec*1000000) + ts.tv_nsec / 1000; ++#else ++ struct timeval tv; ++ do_gettimeofday(&tv); ++ return ((u64)tv.tv_sec*1000000) + tv.tv_usec; ++#endif ++} ++ ++#define MAX_BSSINFO_LEN 1000 ++struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ struct ieee80211_channel *notify_channel; ++ struct cfg80211_bss *bss = NULL; ++ //struct ieee80211_supported_band *band; ++ u16 channel; ++ u32 freq; ++ u64 notify_timestamp; ++ u16 notify_capability; ++ u16 notify_interval; ++ u8 *notify_ie; ++ size_t notify_ielen; ++ s32 notify_signal; ++ //u8 buf[MAX_BSSINFO_LEN]; ++ ++ u8 *pbuf; ++ size_t buf_size = MAX_BSSINFO_LEN; ++ size_t len,bssinf_len=0; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = wdev->wiphy; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ pbuf = rtw_zmalloc(buf_size); ++ if(pbuf == NULL){ ++ DBG_871X("%s pbuf allocate failed !! \n",__FUNCTION__); ++ return bss; ++ } ++ ++ //DBG_8192C("%s\n", __func__); ++ ++ bssinf_len = pnetwork->network.IELength+sizeof (struct rtw_ieee80211_hdr_3addr); ++ if(bssinf_len > buf_size){ ++ DBG_871X("%s IE Length too long > %zu byte \n",__FUNCTION__,buf_size); ++ goto exit; ++ } ++ ++#ifndef CONFIG_WAPI_SUPPORT ++ { ++ u16 wapi_len = 0; ++ ++ if(rtw_get_wapi_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wapi_len)>0) ++ { ++ if(wapi_len > 0) ++ { ++ DBG_871X("%s, no support wapi!\n",__FUNCTION__); ++ goto exit; ++ } ++ } ++ } ++#endif //!CONFIG_WAPI_SUPPORT ++ ++ //To reduce PBC Overlap rate ++ //_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ if(adapter_wdev_data(padapter)->scan_request != NULL) ++ { ++ u8 *psr=NULL, sr = 0; ++ NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; ++ struct cfg80211_scan_request *request = adapter_wdev_data(padapter)->scan_request; ++ struct cfg80211_ssid *ssids = request->ssids; ++ u32 wpsielen=0; ++ u8 *wpsie=NULL; ++ ++ wpsie = rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); ++ ++ if(wpsie && wpsielen>0) ++ psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if (sr != 0) ++ { ++ if(request->n_ssids == 1 && request->n_channels == 1) // it means under processing WPS ++ { ++ DBG_8192C("ssid=%s, len=%d\n", pssid->Ssid, pssid->SsidLength); ++ ++ if (ssids[0].ssid_len == 0) { ++ } ++ else if(pssid->SsidLength == ssids[0].ssid_len && ++ _rtw_memcmp(pssid->Ssid, ssids[0].ssid, ssids[0].ssid_len)) ++ { ++ DBG_871X("%s, got sr and ssid match!\n", __func__); ++ } ++ else ++ { ++ if(psr !=NULL) ++ *psr = 0; //clear sr ++ ++#if 0 ++ WLAN_BSSID_EX *pselect_network = &pnetwork->network; ++ struct cfg80211_bss *pselect_bss = NULL; ++ struct ieee80211_channel *notify_channel = NULL; ++ u32 freq; ++ ++ DBG_871X("%s, got sr, but ssid mismatch, to remove this bss\n", __func__); ++ ++ freq = rtw_ch2freq(pselect_network->Configuration.DSConfig); ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ pselect_bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, ++ pselect_network->MacAddress, pselect_network->Ssid.Ssid, ++ pselect_network->Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, ++ 0/*WLAN_CAPABILITY_ESS*/); ++ ++ if(pselect_bss) ++ { ++ DBG_871X("%s, got bss for cfg80211 for unlinking bss\n", __func__); ++ ++ cfg80211_unlink_bss(wiphy, pselect_bss); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(wiphy, pselect_bss); ++#else ++ cfg80211_put_bss(pselect_bss); ++#endif ++ ++ } ++ ++ goto exit; ++#endif ++ } ++ } ++ } ++ } ++ //_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ ++ channel = pnetwork->network.Configuration.DSConfig; ++ freq = rtw_ch2freq(channel); ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ ++ if (0) ++ notify_timestamp = le64_to_cpu(*(u64*)rtw_get_timestampe_from_ie(pnetwork->network.IEs)); ++ else ++ notify_timestamp = rtw_get_systime_us(); ++ ++ notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); ++ notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); ++ ++ notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; ++ notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; ++ ++ //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) ++ if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && ++ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { ++ notify_signal = 100*translate_percentage_to_dbm(padapter->recvpriv.signal_strength);//dbm ++ } else { ++ notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm ++ } ++ ++ #if 0 ++ DBG_8192C("bssid: "MAC_FMT"\n", MAC_ARG(pnetwork->network.MacAddress)); ++ DBG_8192C("Channel: %d(%d)\n", channel, freq); ++ DBG_8192C("Capability: %X\n", notify_capability); ++ DBG_8192C("Beacon interval: %d\n", notify_interval); ++ DBG_8192C("Signal: %d\n", notify_signal); ++ DBG_8192C("notify_timestamp: %llu\n", notify_timestamp); ++ #endif ++ ++ //pbuf = buf; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ ++ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ SetFrameSubType(pbuf, WIFI_BEACON); ++ } else { ++ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); ++ SetFrameSubType(pbuf, WIFI_PROBERSP); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); ++ ++ ++ //pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); ++ len = sizeof (struct rtw_ieee80211_hdr_3addr); ++ _rtw_memcpy((pbuf+len), pnetwork->network.IEs, pnetwork->network.IELength); ++ *((u64*)(pbuf+len)) = cpu_to_le64(notify_timestamp); ++ ++ len += pnetwork->network.IELength; ++ ++ //#ifdef CONFIG_P2P ++ //if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) ++ //{ ++ // DBG_8192C("%s, got p2p_ie\n", __func__); ++ //} ++ //#endif ++ ++#if 1 ++ bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)pbuf, ++ len, notify_signal, GFP_ATOMIC); ++#else ++ ++ bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, ++ notify_timestamp, notify_capability, notify_interval, notify_ie, ++ notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); ++#endif ++ ++ if (unlikely(!bss)) { ++ DBG_8192C(FUNC_ADPT_FMT" bss NULL\n", FUNC_ADPT_ARG(padapter)); ++ goto exit; ++ } ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) ++#ifndef COMPAT_KERNEL_RELEASE ++ //patch for cfg80211, update beacon ies to information_elements ++ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON ++ ++ if(bss->len_information_elements != bss->len_beacon_ies) ++ { ++ bss->information_elements = bss->beacon_ies; ++ bss->len_information_elements = bss->len_beacon_ies; ++ } ++ } ++#endif //COMPAT_KERNEL_RELEASE ++#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) ++ ++/* ++ { ++ if( bss->information_elements == bss->proberesp_ies) ++ { ++ if( bss->len_information_elements != bss->len_proberesp_ies) ++ { ++ DBG_8192C("error!, len_information_elements != bss->len_proberesp_ies\n"); ++ } ++ ++ } ++ else if(bss->len_information_elements < bss->len_beacon_ies) ++ { ++ bss->information_elements = bss->beacon_ies; ++ bss->len_information_elements = bss->len_beacon_ies; ++ } ++ } ++*/ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(wiphy, bss); ++#else ++ cfg80211_put_bss(bss); ++#endif ++ ++exit: ++ if(pbuf) ++ rtw_mfree(pbuf, buf_size); ++ return bss; ++ ++} ++ ++/* ++ Check the given bss is valid by kernel API cfg80211_get_bss() ++ @padapter : the given adapter ++ ++ return _TRUE if bss is valid, _FALSE for not found. ++*/ ++int rtw_cfg80211_check_bss(_adapter *padapter) ++{ ++ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); ++ struct cfg80211_bss *bss = NULL; ++ struct ieee80211_channel *notify_channel = NULL; ++ u32 freq; ++ ++ if (!(pnetwork) || !(padapter->rtw_wdev)) ++ return _FALSE; ++ ++ freq = rtw_ch2freq(pnetwork->Configuration.DSConfig); ++ notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); ++ bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, ++ pnetwork->MacAddress, pnetwork->Ssid.Ssid, ++ pnetwork->Ssid.SsidLength, ++ WLAN_CAPABILITY_ESS, WLAN_CAPABILITY_ESS); ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); ++#else ++ cfg80211_put_bss(bss); ++#endif ++ ++ return (bss!=NULL); ++} ++ ++void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct cfg80211_bss *bss = NULL; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) ++ struct wiphy *wiphy = pwdev->wiphy; ++ int freq = 2412; ++ struct ieee80211_channel *notify_channel; ++#endif ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) ++ freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig); ++ ++ if (0) ++ DBG_871X("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq); ++#endif ++ ++ if (pwdev->iftype != NL80211_IFTYPE_ADHOC) ++ { ++ return; ++ } ++ ++ if (!rtw_cfg80211_check_bss(padapter)) { ++ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); ++ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE) ++ { ++ ++ _rtw_memcpy(&cur_network->network, pnetwork, sizeof(WLAN_BSSID_EX)); ++ if(cur_network) ++ { ++ if (!rtw_cfg80211_inform_bss(padapter,cur_network)) ++ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); ++ else ++ DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ else ++ { ++ DBG_871X("cur_network is not exist!!!\n"); ++ return ; ++ } ++ } ++ else ++ { ++ if(scanned == NULL) ++ rtw_warn_on(1); ++ ++ if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE ++ && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE ++ ) { ++ if (!rtw_cfg80211_inform_bss(padapter,scanned)) { ++ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); ++ } else { ++ //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ } else { ++ DBG_871X("scanned & pnetwork compare fail\n"); ++ rtw_warn_on(1); ++ } ++ } ++ ++ if (!rtw_cfg80211_check_bss(padapter)) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ //notify cfg80211 that device joined an IBSS ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, notify_channel, GFP_ATOMIC); ++#else ++ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ struct cfg80211_bss *bss = NULL; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++#ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) { ++ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); ++ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; ++ ++ //DBG_871X(FUNC_ADPT_FMT" BSS not found\n", FUNC_ADPT_ARG(padapter)); ++ ++ if(scanned == NULL) { ++ rtw_warn_on(1); ++ goto check_bss; ++ } ++ ++ if (_rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE ++ && _rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE ++ ) { ++ if (!rtw_cfg80211_inform_bss(padapter,scanned)) { ++ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); ++ } else { ++ //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ } else { ++ DBG_871X("scanned: %s("MAC_FMT"), cur: %s("MAC_FMT")\n", ++ scanned->network.Ssid.Ssid, MAC_ARG(scanned->network.MacAddress), ++ pnetwork->Ssid.Ssid, MAC_ARG(pnetwork->MacAddress) ++ ); ++ rtw_warn_on(1); ++ } ++ } ++ ++check_bss: ++ if (!rtw_cfg80211_check_bss(padapter)) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (rtw_to_roam(padapter) > 0) { ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) ++ struct wiphy *wiphy = pwdev->wiphy; ++ struct ieee80211_channel *notify_channel; ++ u32 freq; ++ u16 channel = cur_network->network.Configuration.DSConfig; ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)) ++ struct cfg80211_roam_info roam_info = {}; ++ #endif ++ ++ freq = rtw_ch2freq(channel); ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ #endif ++ ++ DBG_871X(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter)); ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)) ++ roam_info.channel = notify_channel; ++ roam_info.bssid = cur_network->network.MacAddress; ++ roam_info.req_ie = ++ pmlmepriv->assoc_req+sizeof(struct ieee80211_hdr_3addr)+2; ++ roam_info.req_ie_len = ++ pmlmepriv->assoc_req_len-sizeof(struct ieee80211_hdr_3addr)-2; ++ roam_info.resp_ie = ++ pmlmepriv->assoc_rsp+sizeof(struct ieee80211_hdr_3addr)+6; ++ roam_info.resp_ie_len = ++ pmlmepriv->assoc_rsp_len-sizeof(struct ieee80211_hdr_3addr)-6; ++ cfg80211_roamed(padapter->pnetdev, &roam_info, GFP_ATOMIC); ++ #else ++ cfg80211_roamed(padapter->pnetdev ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) ++ , notify_channel ++ #endif ++ , cur_network->network.MacAddress ++ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 ++ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 ++ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 ++ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 ++ , GFP_ATOMIC); ++ #endif ++ ++ } ++ else ++ { ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); ++ #endif ++ cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress ++ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 ++ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 ++ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 ++ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 ++ , WLAN_STATUS_SUCCESS, GFP_ATOMIC); ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); ++ #endif ++ } ++} ++ ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++#ifdef CONFIG_P2P ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) ++ if (pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT) ++ #endif ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ if (!padapter->mlmepriv.not_indic_disco || padapter->ndev_unregistering) { ++ #else ++ { ++ #endif ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); ++ ++ if(pwdev->sme_state==CFG80211_SME_CONNECTING) ++ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, ++ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); ++ else if(pwdev->sme_state==CFG80211_SME_CONNECTED) + cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, 0, GFP_ATOMIC); -+ } else { -+ DBG_871X(FUNC_ADPT_FMT" call cfg80211_connect_result\n", FUNC_ADPT_ARG(padapter)); -+ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, -+ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC); -+ } -+ #endif -+ } -+} -+ -+ -+#ifdef CONFIG_AP_MODE -+static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) -+{ -+ int ret = 0; -+ u32 wep_key_idx, wep_key_len,wep_total_len; -+ struct sta_info *psta = NULL, *pbcmc_sta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv* psecuritypriv=&(padapter->securitypriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ DBG_8192C("%s\n", __FUNCTION__); -+ -+ param->u.crypt.err = 0; -+ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; -+ -+ //sizeof(struct ieee_param) = 64 bytes; -+ //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) -+ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) -+ { -+ if (param->u.crypt.idx >= WEP_KEYS -+#ifdef CONFIG_IEEE80211W -+ && param->u.crypt.idx > BIP_MAX_KEYID -+#endif /* CONFIG_IEEE80211W */ -+ ) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } -+ else -+ { -+ psta = rtw_get_stainfo(pstapriv, param->sta_addr); -+ if(!psta) -+ { -+ //ret = -EINVAL; -+ DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); -+ goto exit; -+ } -+ } -+ -+ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) -+ { -+ //todo:clear default encryption keys -+ -+ DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); -+ -+ goto exit; -+ } -+ -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) -+ { -+ DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); -+ -+ wep_key_idx = param->u.crypt.idx; -+ wep_key_len = param->u.crypt.key_len; -+ -+ DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); -+ -+ if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (wep_key_len > 0) -+ { -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ } -+ -+ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) -+ { -+ //wep default key has not been set, so use this key index as default key. -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy=_WEP40_; -+ -+ if(wep_key_len == 13) -+ { -+ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy=_WEP104_; -+ } -+ -+ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; -+ } -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); -+ -+ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; -+ -+ rtw_ap_set_wep_key(padapter, param->u.crypt.key, wep_key_len, wep_key_idx, 1); -+ -+ goto exit; -+ -+ } -+ -+ -+ if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key -+ { -+ if(param->u.crypt.set_tx == 0) //group key -+ { -+ if(strcmp(param->u.crypt.alg, "WEP") == 0) -+ { -+ DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); -+ -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ if(param->u.crypt.key_len==13) -+ { -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ } -+ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) -+ { -+ DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); -+ -+ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; -+ -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ -+ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); -+ //set mic key -+ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); -+ -+ psecuritypriv->busetkipkey = _TRUE; -+ -+ } -+ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) -+ { -+ DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); -+ -+ psecuritypriv->dot118021XGrpPrivacy = _AES_; -+ -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ } -+#ifdef CONFIG_IEEE80211W -+ else if (strcmp(param->u.crypt.alg, "BIP") == 0) { -+ int no; -+ -+ DBG_871X("BIP key_len=%d , index=%d\n", param->u.crypt.key_len, param->u.crypt.idx); -+ /* save the IGTK key, length 16 bytes */ -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16:param->u.crypt.key_len)); -+ /* DBG_871X("IGTK key below:\n"); -+ for(no=0;no<16;no++) -+ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); -+ DBG_871X("\n"); */ -+ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; -+ padapter->securitypriv.binstallBIPkey = _TRUE; -+ DBG_871X(" ~~~~set sta key:IGKT\n"); -+ goto exit; -+ } -+#endif /* CONFIG_IEEE80211W */ -+ else -+ { -+ DBG_8192C("%s, set group_key, none\n", __FUNCTION__); -+ -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ } -+ -+ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; -+ -+ psecuritypriv->binstallGrpkey = _TRUE; -+ -+ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! -+ -+ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); -+ -+ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); -+ if(pbcmc_sta) -+ { -+ pbcmc_sta->ieee8021x_blocked = _FALSE; -+ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy -+ } -+ -+ } -+ -+ goto exit; -+ -+ } -+ -+ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x -+ { -+ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) -+ { -+ if(param->u.crypt.set_tx ==1) //pairwise key -+ { -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ -+ if(strcmp(param->u.crypt.alg, "WEP") == 0) -+ { -+ DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); -+ -+ psta->dot118021XPrivacy = _WEP40_; -+ if(param->u.crypt.key_len==13) -+ { -+ psta->dot118021XPrivacy = _WEP104_; -+ } -+ } -+ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) -+ { -+ DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); -+ -+ psta->dot118021XPrivacy = _TKIP_; -+ -+ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); -+ //set mic key -+ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); -+ -+ psecuritypriv->busetkipkey = _TRUE; -+ -+ } -+ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) -+ { -+ -+ DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); -+ -+ psta->dot118021XPrivacy = _AES_; -+ } -+ else -+ { -+ DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); -+ -+ psta->dot118021XPrivacy = _NO_PRIVACY_; -+ } -+ -+ rtw_ap_set_pairwise_key(padapter, psta); -+ -+ psta->ieee8021x_blocked = _FALSE; -+ -+ psta->bpairwise_key_installed = _TRUE; -+ -+ } -+ else//group key??? -+ { -+ if(strcmp(param->u.crypt.alg, "WEP") == 0) -+ { -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ if(param->u.crypt.key_len==13) -+ { -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ } -+ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) -+ { -+ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; -+ -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ -+ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); -+ //set mic key -+ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); -+ -+ psecuritypriv->busetkipkey = _TRUE; -+ -+ } -+ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) -+ { -+ psecuritypriv->dot118021XGrpPrivacy = _AES_; -+ -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ } -+ else -+ { -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ } -+ -+ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; -+ -+ psecuritypriv->binstallGrpkey = _TRUE; -+ -+ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! -+ -+ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); -+ -+ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); -+ if(pbcmc_sta) -+ { -+ pbcmc_sta->ieee8021x_blocked = _FALSE; -+ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy -+ } -+ -+ } -+ -+ } -+ -+ } -+ -+exit: -+ -+ return ret; -+ -+} -+#endif -+ -+static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) -+{ -+ int ret = 0; -+ u32 wep_key_idx, wep_key_len,wep_total_len; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+#ifdef CONFIG_P2P -+ struct wifidirect_info* pwdinfo = &padapter->wdinfo; -+#endif //CONFIG_P2P -+ -+_func_enter_; -+ -+ DBG_8192C("%s\n", __func__); -+ -+ param->u.crypt.err = 0; -+ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; -+ -+ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) -+ { -+ if (param->u.crypt.idx >= WEP_KEYS -+#ifdef CONFIG_IEEE80211W -+ && param->u.crypt.idx > BIP_MAX_KEYID -+#endif //CONFIG_IEEE80211W -+ ) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } else { -+#ifdef CONFIG_WAPI_SUPPORT -+ if (strcmp(param->u.crypt.alg, "SMS4")) -+#endif -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0) -+ { -+ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); -+ DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); -+ -+ wep_key_idx = param->u.crypt.idx; -+ wep_key_len = param->u.crypt.key_len; -+ -+ if ((wep_key_idx > WEP_KEYS) || (wep_key_len <= 0)) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) -+ { -+ //wep default key has not been set, so use this key index as default key. -+ -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ -+ if(wep_key_len==13) -+ { -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; -+ } -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); -+ -+ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; -+ -+ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); -+ -+ goto exit; -+ } -+ -+ if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x -+ { -+ struct sta_info * psta,*pbcmc_sta; -+ struct sta_priv * pstapriv = &padapter->stapriv; -+ -+ //DBG_8192C("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode -+ { -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); -+ DBG_8192C("%s, : Obtain Sta_info fail \n", __func__); -+ } -+ else -+ { -+ //Jeff: don't disable ieee8021x_blocked while clearing key -+ if (strcmp(param->u.crypt.alg, "none") != 0) -+ psta->ieee8021x_blocked = _FALSE; -+ -+ -+ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| -+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) -+ { -+ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ } -+ -+ if(param->u.crypt.set_tx ==1)//pairwise key -+ { -+ -+ DBG_8192C("%s, : param->u.crypt.set_tx ==1 \n", __func__); -+ -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ -+ if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key -+ { -+ //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); -+ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); -+ -+ padapter->securitypriv.busetkipkey=_FALSE; -+ //_set_timer(&padapter->securitypriv.tkip_timer, 50); -+ } -+ psta->bpairwise_key_installed = _TRUE; -+ //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); -+ DBG_871X(" ~~~~set sta key:unicastkey\n"); -+ -+ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _TRUE); -+ } -+ else//group key -+ { -+ if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) -+ { -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); -+ padapter->securitypriv.binstallGrpkey = _TRUE; -+ //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); -+ DBG_871X(" ~~~~set sta key:groupkey\n"); -+ -+ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; -+ rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); -+ } -+#ifdef CONFIG_IEEE80211W -+ else if(strcmp(param->u.crypt.alg, "BIP") == 0) -+ { -+ int no; -+ //DBG_871X("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); -+ //save the IGTK key, length 16 bytes -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); -+ /*DBG_871X("IGTK key below:\n"); -+ for(no=0;no<16;no++) -+ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); -+ DBG_871X("\n");*/ -+ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; -+ padapter->securitypriv.binstallBIPkey = _TRUE; -+ DBG_871X(" ~~~~set sta key:IGKT\n"); -+ } -+#endif //CONFIG_IEEE80211W -+ -+#ifdef CONFIG_P2P -+ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) -+ { -+ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) -+ { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); -+ } -+ } -+#endif //CONFIG_P2P -+ -+ } -+ } -+ -+ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); -+ if(pbcmc_sta==NULL) -+ { -+ //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); -+ } -+ else -+ { -+ //Jeff: don't disable ieee8021x_blocked while clearing key -+ if (strcmp(param->u.crypt.alg, "none") != 0) -+ pbcmc_sta->ieee8021x_blocked = _FALSE; -+ -+ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| -+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) -+ { -+ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ } -+ } -+ } -+ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode -+ { -+ } -+ } -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (strcmp(param->u.crypt.alg, "SMS4") == 0) -+ { -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_STA_INFO pWapiSta; -+ u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; -+ -+ if(param->u.crypt.set_tx == 1) -+ { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if(_rtw_memcmp(pWapiSta->PeerMacAddr,param->sta_addr,6)) -+ { -+ _rtw_memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); -+ -+ pWapiSta->wapiUsk.bSet = true; -+ _rtw_memcpy(pWapiSta->wapiUsk.dataKey,param->u.crypt.key,16); -+ _rtw_memcpy(pWapiSta->wapiUsk.micKey,param->u.crypt.key+16,16); -+ pWapiSta->wapiUsk.keyId = param->u.crypt.idx ; -+ pWapiSta->wapiUsk.bTxEnable = true; -+ -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16); -+ pWapiSta->wapiUskUpdate.bTxEnable = false; -+ pWapiSta->wapiUskUpdate.bSet = false; -+ -+ if (psecuritypriv->sw_encrypt== false || psecuritypriv->sw_decrypt == false) -+ { -+ //set unicast key for ASUE -+ rtw_wapi_set_key(padapter, &pWapiSta->wapiUsk, pWapiSta, false, false); -+ } -+ } -+ } -+ } -+ else -+ { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if(_rtw_memcmp(pWapiSta->PeerMacAddr,get_bssid(pmlmepriv),6)) -+ { -+ pWapiSta->wapiMsk.bSet = true; -+ _rtw_memcpy(pWapiSta->wapiMsk.dataKey,param->u.crypt.key,16); -+ _rtw_memcpy(pWapiSta->wapiMsk.micKey,param->u.crypt.key+16,16); -+ pWapiSta->wapiMsk.keyId = param->u.crypt.idx ; -+ pWapiSta->wapiMsk.bTxEnable = false; -+ if(!pWapiSta->bSetkeyOk) -+ pWapiSta->bSetkeyOk = true; -+ pWapiSta->bAuthenticateInProgress = false; -+ -+ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); -+ -+ if (psecuritypriv->sw_decrypt == false) -+ { -+ //set rx broadcast key for ASUE -+ rtw_wapi_set_key(padapter, &pWapiSta->wapiMsk, pWapiSta, true, false); -+ } -+ } -+ -+ } -+ } -+ } -+#endif -+ -+ -+exit: -+ -+ DBG_8192C("%s, ret=%d\n", __func__, ret); -+ -+ _func_exit_; -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ u8 key_index, bool pairwise, const u8 *mac_addr, -+#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ u8 key_index, const u8 *mac_addr, -+#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ struct key_params *params) -+{ -+ char *alg_name; -+ u32 param_len; -+ struct ieee_param *param = NULL; -+ int ret=0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+#ifdef CONFIG_TDLS -+ struct sta_info *ptdls_sta; -+#endif /* CONFIG_TDLS */ -+ -+ DBG_871X(FUNC_NDEV_FMT" adding key for %pM\n", FUNC_NDEV_ARG(ndev), mac_addr); -+ DBG_871X("cipher=0x%x\n", params->cipher); -+ DBG_871X("key_len=0x%x\n", params->key_len); -+ DBG_871X("seq_len=0x%x\n", params->seq_len); -+ DBG_871X("key_index=%d\n", key_index); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ DBG_871X("pairwise=%d\n", pairwise); -+#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ -+ param_len = sizeof(struct ieee_param) + params->key_len; -+ param = (struct ieee_param *)rtw_malloc(param_len); -+ if (param == NULL) -+ return -1; -+ -+ _rtw_memset(param, 0, param_len); -+ -+ param->cmd = IEEE_CMD_SET_ENCRYPTION; -+ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); -+ -+ switch (params->cipher) { -+ case IW_AUTH_CIPHER_NONE: -+ //todo: remove key -+ //remove = 1; -+ alg_name = "none"; -+ break; -+ case WLAN_CIPHER_SUITE_WEP40: -+ case WLAN_CIPHER_SUITE_WEP104: -+ alg_name = "WEP"; -+ break; -+ case WLAN_CIPHER_SUITE_TKIP: -+ alg_name = "TKIP"; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP: -+ alg_name = "CCMP"; -+ break; -+#ifdef CONFIG_IEEE80211W -+ case WLAN_CIPHER_SUITE_AES_CMAC: -+ alg_name = "BIP"; -+ break; -+#endif //CONFIG_IEEE80211W -+#ifdef CONFIG_WAPI_SUPPORT -+ case WLAN_CIPHER_SUITE_SMS4: -+ alg_name= "SMS4"; -+ if(pairwise == NL80211_KEYTYPE_PAIRWISE) { -+ if (key_index != 0 && key_index != 1) { -+ ret = -ENOTSUPP; -+ goto addkey_end; -+ } -+ _rtw_memcpy((void*)param->sta_addr, (void*)mac_addr, ETH_ALEN); -+ } else { -+ DBG_871X("mac_addr is null \n"); -+ } -+ DBG_871X("rtw_wx_set_enc_ext: SMS4 case \n"); -+ break; -+#endif -+ -+ default: -+ ret = -ENOTSUPP; -+ goto addkey_end; -+ } -+ -+ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); -+ -+ -+ if (!mac_addr || is_broadcast_ether_addr(mac_addr)) -+ { -+ param->u.crypt.set_tx = 0; //for wpa/wpa2 group key -+ } else { -+ param->u.crypt.set_tx = 1; //for wpa/wpa2 pairwise key -+ } -+ -+ -+ //param->u.crypt.idx = key_index - 1; -+ param->u.crypt.idx = key_index; -+ -+ if (params->seq_len && params->seq) -+ { -+ _rtw_memcpy(param->u.crypt.seq, (u8 *)params->seq, params->seq_len); -+ } -+ -+ if(params->key_len && params->key) -+ { -+ param->u.crypt.key_len = params->key_len; -+ _rtw_memcpy(param->u.crypt.key, (u8 *)params->key, params->key_len); -+ } -+ -+ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ { -+#ifdef CONFIG_TDLS -+ if (rtw_tdls_is_driver_setup(padapter) == _FALSE && mac_addr) { -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, (void *)mac_addr); -+ if (ptdls_sta != NULL && ptdls_sta->tdls_sta_state) { -+ _rtw_memcpy(ptdls_sta->tpk.tk, params->key, params->key_len); -+ rtw_tdls_set_key(padapter, ptdls_sta); -+ goto addkey_end; -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); -+ } -+ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) -+ { -+#ifdef CONFIG_AP_MODE -+ if(mac_addr) -+ _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); -+ -+ ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); -+#endif -+ } -+ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE -+ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) -+ { -+ //DBG_8192C("@@@@@@@@@@ fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); -+ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); -+ } -+ else -+ { -+ DBG_8192C("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); -+ -+ } -+ -+addkey_end: -+ if(param) -+ { -+ rtw_mfree((u8*)param, param_len); -+ } -+ -+ return ret; -+ -+} -+ -+static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ u8 key_index, bool pairwise, const u8 *mac_addr, -+#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ u8 key_index, const u8 *mac_addr, -+#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ void *cookie, -+ void (*callback)(void *cookie, -+ struct key_params*)) -+{ -+#if 0 -+ struct iwm_priv *iwm = ndev_to_iwm(ndev); -+ struct iwm_key *key = &iwm->keys[key_index]; -+ struct key_params params; -+ -+ IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); -+ -+ memset(¶ms, 0, sizeof(params)); -+ -+ params.cipher = key->cipher; -+ params.key_len = key->key_len; -+ params.seq_len = key->seq_len; -+ params.seq = key->seq; -+ params.key = key->key; -+ -+ callback(cookie, ¶ms); -+ -+ return key->key_len ? 0 : -ENOENT; -+#endif -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ return 0; -+} -+ -+static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ u8 key_index, bool pairwise, const u8 *mac_addr) -+#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+ u8 key_index, const u8 *mac_addr) -+#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ DBG_871X(FUNC_NDEV_FMT" key_index=%d\n", FUNC_NDEV_ARG(ndev), key_index); -+ -+ if (key_index == psecuritypriv->dot11PrivacyKeyIndex) -+ { -+ //clear the flag of wep default key set. -+ psecuritypriv->bWepDefaultKeyIdxSet = 0; -+ } -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, -+ struct net_device *ndev, u8 key_index -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) -+ , bool unicast, bool multicast -+ #endif -+ ) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+#define SET_DEF_KEY_PARAM_FMT " key_index=%d" -+#define SET_DEF_KEY_PARAM_ARG , key_index -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+ #define SET_DEF_KEY_PARAM_FMT_2_6_38 ", unicast=%d, multicast=%d" -+ #define SET_DEF_KEY_PARAM_ARG_2_6_38 , unicast, multicast -+#else -+ #define SET_DEF_KEY_PARAM_FMT_2_6_38 "" -+ #define SET_DEF_KEY_PARAM_ARG_2_6_38 -+#endif -+ -+ DBG_871X(FUNC_NDEV_FMT -+ SET_DEF_KEY_PARAM_FMT -+ SET_DEF_KEY_PARAM_FMT_2_6_38 -+ "\n", FUNC_NDEV_ARG(ndev) -+ SET_DEF_KEY_PARAM_ARG -+ SET_DEF_KEY_PARAM_ARG_2_6_38 -+ ); -+ -+ if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) //set wep default key -+ { -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ -+ psecuritypriv->dot11PrivacyKeyIndex = key_index; -+ -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ if (psecuritypriv->dot11DefKeylen[key_index] == 13) -+ { -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ psecuritypriv->bWepDefaultKeyIdxSet = 1; //set the flag to represent that wep default key has been set -+ } -+ -+ return 0; -+ -+} -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) -+static int cfg80211_rtw_set_rekey_data(struct wiphy *wiphy, -+ struct net_device *ndev, -+ struct cfg80211_gtk_rekey_data *data) -+{ -+ /*int i;*/ -+ struct sta_info *psta; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ DBG_871X("%s, : Obtain Sta_info fail\n", __func__); -+ return -1; -+ } -+ -+ _rtw_memcpy(psta->kek, data->kek, NL80211_KEK_LEN); -+ /*printk("\ncfg80211_rtw_set_rekey_data KEK:"); -+ for(i=0;ikek[i]);*/ -+ _rtw_memcpy(psta->kck, data->kck, NL80211_KCK_LEN); -+ /*printk("\ncfg80211_rtw_set_rekey_data KCK:"); -+ for(i=0;ikck[i]);*/ -+ _rtw_memcpy(psta->replay_ctr, data->replay_ctr, NL80211_REPLAY_CTR_LEN); -+ psecuritypriv->binstallKCK_KEK = _TRUE; -+ /*printk("\nREPLAY_CTR: "); -+ for(i=0;ireplay_ctr[i]);*/ -+ -+ return 0; -+} -+#endif /*CONFIG_GTK_OL*/ -+static int cfg80211_rtw_get_station(struct wiphy *wiphy, -+ struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) -+ u8 *mac, -+#else -+ const u8 *mac, -+#endif -+ struct station_info *sinfo) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ sinfo->filled = 0; -+ -+ if (!mac) { -+ DBG_871X(FUNC_NDEV_FMT" mac==%p\n", FUNC_NDEV_ARG(ndev), mac); -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ psta = rtw_get_stainfo(pstapriv, (u8 *)mac); -+ if (psta == NULL) { -+ DBG_8192C("%s, sta_info is null\n", __func__); -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_871X(FUNC_NDEV_FMT" mac="MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); -+#endif -+ -+ //for infra./P2PClient mode -+ if( check_fwstate(pmlmepriv, WIFI_STATION_STATE) -+ && check_fwstate(pmlmepriv, _FW_LINKED) -+ ) -+ { -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ -+ if (_rtw_memcmp((u8 *)mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { -+ DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); -+ ret = -ENOENT; -+ goto exit; -+ } -+ ++ //else ++ //DBG_8192C("pwdev->sme_state=%d\n", pwdev->sme_state); ++ ++ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); ++ #else ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { ++ DBG_871X(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter)); ++ cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, 0, GFP_ATOMIC); ++ } else { ++ DBG_871X(FUNC_ADPT_FMT" call cfg80211_connect_result\n", FUNC_ADPT_ARG(padapter)); ++ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, ++ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC); ++ } ++ #endif ++ } ++} ++ ++ ++#ifdef CONFIG_AP_MODE ++static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ struct sta_info *psta = NULL, *pbcmc_sta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ //sizeof(struct ieee_param) = 64 bytes; ++ //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS ++#ifdef CONFIG_IEEE80211W ++ && param->u.crypt.idx > BIP_MAX_KEYID ++#endif /* CONFIG_IEEE80211W */ ++ ) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(!psta) ++ { ++ //ret = -EINVAL; ++ DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) ++ { ++ //todo:clear default encryption keys ++ ++ DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); ++ ++ goto exit; ++ } ++ ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) ++ { ++ DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); ++ ++ if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ } ++ ++ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) ++ { ++ //wep default key has not been set, so use this key index as default key. ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP40_; ++ ++ if(wep_key_len == 13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP104_; ++ } ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; ++ ++ rtw_ap_set_wep_key(padapter, param->u.crypt.key, wep_key_len, wep_key_idx, 1); ++ ++ goto exit; ++ ++ } ++ ++ ++ if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key ++ { ++ if(param->u.crypt.set_tx == 0) //group key ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++#ifdef CONFIG_IEEE80211W ++ else if (strcmp(param->u.crypt.alg, "BIP") == 0) { ++ int no; ++ ++ DBG_871X("BIP key_len=%d , index=%d\n", param->u.crypt.key_len, param->u.crypt.idx); ++ /* save the IGTK key, length 16 bytes */ ++ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16:param->u.crypt.key_len)); ++ /* DBG_871X("IGTK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); ++ DBG_871X("\n"); */ ++ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; ++ padapter->securitypriv.binstallBIPkey = _TRUE; ++ DBG_871X(" ~~~~set sta key:IGKT\n"); ++ goto exit; ++ } ++#endif /* CONFIG_IEEE80211W */ ++ else ++ { ++ DBG_8192C("%s, set group_key, none\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x ++ { ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ if(param->u.crypt.set_tx ==1) //pairwise key ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psta->dot118021XPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _TKIP_; ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ ++ DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _AES_; ++ } ++ else ++ { ++ DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _NO_PRIVACY_; ++ } ++ ++ rtw_ap_set_pairwise_key(padapter, psta); ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ psta->bpairwise_key_installed = _TRUE; ++ ++ } ++ else//group key??? ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++#endif ++ ++static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS ++#ifdef CONFIG_IEEE80211W ++ && param->u.crypt.idx > BIP_MAX_KEYID ++#endif //CONFIG_IEEE80211W ++ ) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } else { ++#ifdef CONFIG_WAPI_SUPPORT ++ if (strcmp(param->u.crypt.alg, "SMS4")) ++#endif ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); ++ DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ if ((wep_key_idx > WEP_KEYS) || (wep_key_len <= 0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) ++ { ++ //wep default key has not been set, so use this key index as default key. ++ ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ ++ if(wep_key_len==13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; ++ ++ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); ++ ++ goto exit; ++ } ++ ++ if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x ++ { ++ struct sta_info * psta,*pbcmc_sta; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ ++ //DBG_8192C("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ DBG_8192C("%s, : Obtain Sta_info fail \n", __func__); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ if(param->u.crypt.set_tx ==1)//pairwise key ++ { ++ ++ DBG_8192C("%s, : param->u.crypt.set_tx ==1 \n", __func__); ++ ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key ++ { ++ //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ padapter->securitypriv.busetkipkey=_FALSE; ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ } ++ psta->bpairwise_key_installed = _TRUE; ++ //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); ++ DBG_871X(" ~~~~set sta key:unicastkey\n"); ++ ++ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _TRUE); ++ } ++ else//group key ++ { ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); ++ padapter->securitypriv.binstallGrpkey = _TRUE; ++ //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ DBG_871X(" ~~~~set sta key:groupkey\n"); ++ ++ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; ++ rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); ++ } ++#ifdef CONFIG_IEEE80211W ++ else if(strcmp(param->u.crypt.alg, "BIP") == 0) ++ { ++ int no; ++ //DBG_871X("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); ++ //save the IGTK key, length 16 bytes ++ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ /*DBG_871X("IGTK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); ++ DBG_871X("\n");*/ ++ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; ++ padapter->securitypriv.binstallBIPkey = _TRUE; ++ DBG_871X(" ~~~~set sta key:IGKT\n"); ++ } ++#endif //CONFIG_IEEE80211W ++ ++#ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ } ++ } ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta==NULL) ++ { ++ //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode ++ { ++ } ++ } ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if (strcmp(param->u.crypt.alg, "SMS4") == 0) ++ { ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_STA_INFO pWapiSta; ++ u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ ++ if(param->u.crypt.set_tx == 1) ++ { ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(_rtw_memcmp(pWapiSta->PeerMacAddr,param->sta_addr,6)) ++ { ++ _rtw_memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ ++ pWapiSta->wapiUsk.bSet = true; ++ _rtw_memcpy(pWapiSta->wapiUsk.dataKey,param->u.crypt.key,16); ++ _rtw_memcpy(pWapiSta->wapiUsk.micKey,param->u.crypt.key+16,16); ++ pWapiSta->wapiUsk.keyId = param->u.crypt.idx ; ++ pWapiSta->wapiUsk.bTxEnable = true; ++ ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16); ++ pWapiSta->wapiUskUpdate.bTxEnable = false; ++ pWapiSta->wapiUskUpdate.bSet = false; ++ ++ if (psecuritypriv->sw_encrypt== false || psecuritypriv->sw_decrypt == false) ++ { ++ //set unicast key for ASUE ++ rtw_wapi_set_key(padapter, &pWapiSta->wapiUsk, pWapiSta, false, false); ++ } ++ } ++ } ++ } ++ else ++ { ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(_rtw_memcmp(pWapiSta->PeerMacAddr,get_bssid(pmlmepriv),6)) ++ { ++ pWapiSta->wapiMsk.bSet = true; ++ _rtw_memcpy(pWapiSta->wapiMsk.dataKey,param->u.crypt.key,16); ++ _rtw_memcpy(pWapiSta->wapiMsk.micKey,param->u.crypt.key+16,16); ++ pWapiSta->wapiMsk.keyId = param->u.crypt.idx ; ++ pWapiSta->wapiMsk.bTxEnable = false; ++ if(!pWapiSta->bSetkeyOk) ++ pWapiSta->bSetkeyOk = true; ++ pWapiSta->bAuthenticateInProgress = false; ++ ++ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); ++ ++ if (psecuritypriv->sw_decrypt == false) ++ { ++ //set rx broadcast key for ASUE ++ rtw_wapi_set_key(padapter, &pWapiSta->wapiMsk, pWapiSta, true, false); ++ } ++ } ++ ++ } ++ } ++ } ++#endif ++ ++ ++exit: ++ ++ DBG_8192C("%s, ret=%d\n", __func__, ret); ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ struct key_params *params) ++{ ++ char *alg_name; ++ u32 param_len; ++ struct ieee_param *param = NULL; ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_TDLS ++ struct sta_info *ptdls_sta; ++#endif /* CONFIG_TDLS */ ++ ++ DBG_871X(FUNC_NDEV_FMT" adding key for %pM\n", FUNC_NDEV_ARG(ndev), mac_addr); ++ DBG_871X("cipher=0x%x\n", params->cipher); ++ DBG_871X("key_len=0x%x\n", params->key_len); ++ DBG_871X("seq_len=0x%x\n", params->seq_len); ++ DBG_871X("key_index=%d\n", key_index); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_871X("pairwise=%d\n", pairwise); ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ ++ param_len = sizeof(struct ieee_param) + params->key_len; ++ param = (struct ieee_param *)rtw_malloc(param_len); ++ if (param == NULL) ++ return -1; ++ ++ _rtw_memset(param, 0, param_len); ++ ++ param->cmd = IEEE_CMD_SET_ENCRYPTION; ++ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); ++ ++ switch (params->cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ //todo: remove key ++ //remove = 1; ++ alg_name = "none"; ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ case WLAN_CIPHER_SUITE_WEP104: ++ alg_name = "WEP"; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ alg_name = "TKIP"; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ alg_name = "CCMP"; ++ break; ++#ifdef CONFIG_IEEE80211W ++ case WLAN_CIPHER_SUITE_AES_CMAC: ++ alg_name = "BIP"; ++ break; ++#endif //CONFIG_IEEE80211W ++#ifdef CONFIG_WAPI_SUPPORT ++ case WLAN_CIPHER_SUITE_SMS4: ++ alg_name= "SMS4"; ++ if(pairwise == NL80211_KEYTYPE_PAIRWISE) { ++ if (key_index != 0 && key_index != 1) { ++ ret = -ENOTSUPP; ++ goto addkey_end; ++ } ++ _rtw_memcpy((void*)param->sta_addr, (void*)mac_addr, ETH_ALEN); ++ } else { ++ DBG_871X("mac_addr is null \n"); ++ } ++ DBG_871X("rtw_wx_set_enc_ext: SMS4 case \n"); ++ break; ++#endif ++ ++ default: ++ ret = -ENOTSUPP; ++ goto addkey_end; ++ } ++ ++ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); ++ ++ ++ if (!mac_addr || is_broadcast_ether_addr(mac_addr)) ++ { ++ param->u.crypt.set_tx = 0; //for wpa/wpa2 group key ++ } else { ++ param->u.crypt.set_tx = 1; //for wpa/wpa2 pairwise key ++ } ++ ++ ++ //param->u.crypt.idx = key_index - 1; ++ param->u.crypt.idx = key_index; ++ ++ if (params->seq_len && params->seq) ++ { ++ _rtw_memcpy(param->u.crypt.seq, (u8 *)params->seq, params->seq_len); ++ } ++ ++ if(params->key_len && params->key) ++ { ++ param->u.crypt.key_len = params->key_len; ++ _rtw_memcpy(param->u.crypt.key, (u8 *)params->key, params->key_len); ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++#ifdef CONFIG_TDLS ++ if (rtw_tdls_is_driver_setup(padapter) == _FALSE && mac_addr) { ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, (void *)mac_addr); ++ if (ptdls_sta != NULL && ptdls_sta->tdls_sta_state) { ++ _rtw_memcpy(ptdls_sta->tpk.tk, params->key, params->key_len); ++ rtw_tdls_set_key(padapter, ptdls_sta); ++ goto addkey_end; ++ } ++ } ++#endif /* CONFIG_TDLS */ ++ ++ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_AP_MODE ++ if(mac_addr) ++ _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); ++ ++ ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); ++#endif ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE ++ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ //DBG_8192C("@@@@@@@@@@ fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); ++ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); ++ } ++ else ++ { ++ DBG_8192C("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); ++ ++ } ++ ++addkey_end: ++ if(param) ++ { ++ rtw_mfree((u8*)param, param_len); ++ } ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ void *cookie, ++ void (*callback)(void *cookie, ++ struct key_params*)) ++{ ++#if 0 ++ struct iwm_priv *iwm = ndev_to_iwm(ndev); ++ struct iwm_key *key = &iwm->keys[key_index]; ++ struct key_params params; ++ ++ IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); ++ ++ memset(¶ms, 0, sizeof(params)); ++ ++ params.cipher = key->cipher; ++ params.key_len = key->key_len; ++ params.seq_len = key->seq_len; ++ params.seq = key->seq; ++ params.key = key->key; ++ ++ callback(cookie, ¶ms); ++ ++ return key->key_len ? 0 : -ENOENT; ++#endif ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr) ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr) ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT" key_index=%d\n", FUNC_NDEV_ARG(ndev), key_index); ++ ++ if (key_index == psecuritypriv->dot11PrivacyKeyIndex) ++ { ++ //clear the flag of wep default key set. ++ psecuritypriv->bWepDefaultKeyIdxSet = 0; ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, ++ struct net_device *ndev, u8 key_index ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ , bool unicast, bool multicast ++ #endif ++ ) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++#define SET_DEF_KEY_PARAM_FMT " key_index=%d" ++#define SET_DEF_KEY_PARAM_ARG , key_index ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) ++ #define SET_DEF_KEY_PARAM_FMT_2_6_38 ", unicast=%d, multicast=%d" ++ #define SET_DEF_KEY_PARAM_ARG_2_6_38 , unicast, multicast ++#else ++ #define SET_DEF_KEY_PARAM_FMT_2_6_38 "" ++ #define SET_DEF_KEY_PARAM_ARG_2_6_38 ++#endif ++ ++ DBG_871X(FUNC_NDEV_FMT ++ SET_DEF_KEY_PARAM_FMT ++ SET_DEF_KEY_PARAM_FMT_2_6_38 ++ "\n", FUNC_NDEV_ARG(ndev) ++ SET_DEF_KEY_PARAM_ARG ++ SET_DEF_KEY_PARAM_ARG_2_6_38 ++ ); ++ ++ if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) //set wep default key ++ { ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++ psecuritypriv->dot11PrivacyKeyIndex = key_index; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if (psecuritypriv->dot11DefKeylen[key_index] == 13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ psecuritypriv->bWepDefaultKeyIdxSet = 1; //set the flag to represent that wep default key has been set ++ } ++ ++ return 0; ++ ++} ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) ++static int cfg80211_rtw_set_rekey_data(struct wiphy *wiphy, ++ struct net_device *ndev, ++ struct cfg80211_gtk_rekey_data *data) ++{ ++ /*int i;*/ ++ struct sta_info *psta; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &(padapter->securitypriv); ++ ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ DBG_871X("%s, : Obtain Sta_info fail\n", __func__); ++ return -1; ++ } ++ ++ _rtw_memcpy(psta->kek, data->kek, NL80211_KEK_LEN); ++ /*printk("\ncfg80211_rtw_set_rekey_data KEK:"); ++ for(i=0;ikek[i]);*/ ++ _rtw_memcpy(psta->kck, data->kck, NL80211_KCK_LEN); ++ /*printk("\ncfg80211_rtw_set_rekey_data KCK:"); ++ for(i=0;ikck[i]);*/ ++ _rtw_memcpy(psta->replay_ctr, data->replay_ctr, NL80211_REPLAY_CTR_LEN); ++ psecuritypriv->binstallKCK_KEK = _TRUE; ++ /*printk("\nREPLAY_CTR: "); ++ for(i=0;ireplay_ctr[i]);*/ ++ ++ return 0; ++} ++#endif /*CONFIG_GTK_OL*/ ++static int cfg80211_rtw_get_station(struct wiphy *wiphy, ++ struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac, ++#else ++ const u8 *mac, ++#endif ++ struct station_info *sinfo) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ sinfo->filled = 0; ++ ++ if (!mac) { ++ DBG_871X(FUNC_NDEV_FMT" mac==%p\n", FUNC_NDEV_ARG(ndev), mac); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, (u8 *)mac); ++ if (psta == NULL) { ++ DBG_8192C("%s, sta_info is null\n", __func__); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_NDEV_FMT" mac="MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); ++#endif ++ ++ //for infra./P2PClient mode ++ if( check_fwstate(pmlmepriv, WIFI_STATION_STATE) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ ++ if (_rtw_memcmp((u8 *)mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { ++ DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); ++ ret = -ENOENT; ++ goto exit; ++ } ++ + sinfo->filled |= NL80211_STA_INFO_SIGNAL; -+ sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); -+ ++ sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); ++ + sinfo->filled |= NL80211_STA_INFO_TX_BITRATE; -+ sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); -+ ++ sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); ++ + sinfo->filled |= NL80211_STA_INFO_RX_PACKETS; -+ sinfo->rx_packets = sta_rx_data_pkts(psta); -+ ++ sinfo->rx_packets = sta_rx_data_pkts(psta); ++ + sinfo->filled |= NL80211_STA_INFO_TX_PACKETS; -+ sinfo->tx_packets = psta->sta_stats.tx_pkts; -+ -+ } -+ -+ //for Ad-Hoc/AP mode -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) -+ ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) -+ ||check_fwstate(pmlmepriv, WIFI_AP_STATE)) -+ && check_fwstate(pmlmepriv, _FW_LINKED) -+ ) -+ { -+ //TODO: should acquire station info... -+ } -+ -+exit: -+ return ret; -+} -+ -+extern int netdev_open(struct net_device *pnetdev); -+#ifdef CONFIG_CONCURRENT_MODE -+extern int netdev_if2_open(struct net_device *pnetdev); -+#endif -+ -+/* -+enum nl80211_iftype { -+ NL80211_IFTYPE_UNSPECIFIED, -+ NL80211_IFTYPE_ADHOC, //1 -+ NL80211_IFTYPE_STATION, //2 -+ NL80211_IFTYPE_AP, //3 -+ NL80211_IFTYPE_AP_VLAN, -+ NL80211_IFTYPE_WDS, -+ NL80211_IFTYPE_MONITOR, //6 -+ NL80211_IFTYPE_MESH_POINT, -+ NL80211_IFTYPE_P2P_CLIENT, //8 -+ NL80211_IFTYPE_P2P_GO, //9 -+ //keep last -+ NUM_NL80211_IFTYPES, -+ NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 -+}; -+*/ -+static int cfg80211_rtw_change_iface(struct wiphy *wiphy, -+ struct net_device *ndev, -+ enum nl80211_iftype type, u32 *flags, -+ struct vif_params *params) -+{ -+ enum nl80211_iftype old_type; -+ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); -+#endif -+ int ret = 0; -+ u8 change = _FALSE; -+ -+ DBG_871X(FUNC_NDEV_FMT" type=%d\n", FUNC_NDEV_ARG(ndev), type); -+ -+ if(adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) -+ { -+ ret= -EPERM; -+ goto exit; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if(padapter->adapter_type == SECONDARY_ADAPTER) -+ { -+ DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open\n", FUNC_NDEV_ARG(ndev)); -+ if(netdev_if2_open(ndev) != 0) { -+ DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open fail\n", FUNC_NDEV_ARG(ndev)); -+ ret= -EPERM; -+ goto exit; -+ } -+ } -+ else if(padapter->adapter_type == PRIMARY_ADAPTER) -+#endif //CONFIG_CONCURRENT_MODE -+ { -+ DBG_871X(FUNC_NDEV_FMT" call netdev_open\n", FUNC_NDEV_ARG(ndev)); -+ if(netdev_open(ndev) != 0) { -+ DBG_871X(FUNC_NDEV_FMT" call netdev_open fail\n", FUNC_NDEV_ARG(ndev)); -+ ret= -EPERM; -+ goto exit; -+ } -+ } -+ -+ if(_FAIL == rtw_pwr_wakeup(padapter)) { -+ DBG_871X(FUNC_NDEV_FMT" call rtw_pwr_wakeup fail\n", FUNC_NDEV_ARG(ndev)); -+ ret= -EPERM; -+ goto exit; -+ } -+ -+ old_type = rtw_wdev->iftype; -+ DBG_871X(FUNC_NDEV_FMT" old_iftype=%d, new_iftype=%d\n", -+ FUNC_NDEV_ARG(ndev), old_type, type); -+ -+ if(old_type != type) -+ { -+ change = _TRUE; -+ pmlmeext->action_public_rxseq = 0xffff; -+ pmlmeext->action_public_dialog_token = 0xff; -+ } -+ -+ /* initial default type */ -+ ndev->type = ARPHRD_ETHER; -+ -+ switch (type) { -+ case NL80211_IFTYPE_ADHOC: -+ networkType = Ndis802_11IBSS; -+ break; -+#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_CLIENT: -+#endif -+ case NL80211_IFTYPE_STATION: -+ networkType = Ndis802_11Infrastructure; -+ #ifdef CONFIG_P2P -+ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) -+ { -+ if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) -+ { -+ //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+ -+ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); -+ } -+ #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ if (type == NL80211_IFTYPE_P2P_CLIENT) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ else { -+ /* NL80211_IFTYPE_STATION */ -+ if (rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ } -+ #endif -+ } -+ #endif //CONFIG_P2P -+ break; -+#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_GO: -+#endif -+ case NL80211_IFTYPE_AP: -+ networkType = Ndis802_11APMode; -+ #ifdef CONFIG_P2P -+ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) -+ { -+ if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ { -+ //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ } -+ } -+ #endif //CONFIG_P2P -+ break; -+ case NL80211_IFTYPE_MONITOR: -+ networkType = Ndis802_11Monitor; -+#if 0 -+ ndev->type = ARPHRD_IEEE80211; /* IEEE 802.11 : 801 */ -+#endif -+ ndev->type = ARPHRD_IEEE80211_RADIOTAP; /* IEEE 802.11 + radiotap header : 803 */ -+ break; -+ default: -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ -+ rtw_wdev->iftype = type; -+ -+ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) -+ { -+ rtw_wdev->iftype = old_type; -+ ret = -EPERM; -+ goto exit; -+ } -+ -+ rtw_setopmode_cmd(padapter, networkType, _TRUE); -+ -+exit: -+ -+ DBG_871X(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret); -+ return ret; -+} -+ -+void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) -+{ -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ _irqL irqL; -+ -+ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ if (pwdev_priv->scan_request != NULL) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_871X("%s with scan req\n", __FUNCTION__); -+ #endif -+ -+ /* avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); */ -+ if(pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy) -+ { -+ DBG_8192C("error wiphy compare\n"); -+ } -+ else -+ { -+ cfg80211_scan_done(pwdev_priv->scan_request, aborted); -+ } -+ -+ pwdev_priv->scan_request = NULL; -+ } else { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_871X("%s without scan req\n", __FUNCTION__); -+ #endif -+ } -+ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+} -+ -+u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms) -+{ -+ struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); -+ u8 empty = _FALSE; -+ u32 start; -+ u32 pass_ms; -+ -+ start = rtw_get_current_time(); -+ -+ while (rtw_get_passing_time_ms(start) <= timeout_ms) { -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ break; -+ -+ if (!wdev_priv->scan_request) { -+ empty = _TRUE; -+ break; -+ } -+ -+ rtw_msleep_os(10); -+ } -+ -+ pass_ms = rtw_get_passing_time_ms(start); -+ -+ if (empty == _FALSE && pass_ms > timeout_ms) -+ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pass_ms:%u, timeout\n" -+ , FUNC_ADPT_ARG(adapter), pass_ms); -+ -+ return pass_ms; -+} -+ -+void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) -+{ -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct wiphy *wiphy = pwdev->wiphy; -+ struct cfg80211_bss *bss = NULL; -+ WLAN_BSSID_EX select_network = pnetwork->network; -+ -+ bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, -+ select_network.MacAddress, select_network.Ssid.Ssid, -+ select_network.Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, -+ 0/*WLAN_CAPABILITY_ESS*/); -+ -+ if (bss) { -+ cfg80211_unlink_bss(wiphy, bss); -+ DBG_8192C("%s(): cfg80211_unlink %s!! () ",__func__,select_network.Ssid.Ssid ); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) -+ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); -+#else -+ cfg80211_put_bss(bss); -+#endif -+ } -+ return; -+} -+ -+void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ u32 cnt=0; -+ u32 wait_for_surveydone; -+ sint wait_status; -+#ifdef CONFIG_P2P -+ struct wifidirect_info* pwdinfo = &padapter->wdinfo; -+#endif //CONFIG_P2P -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s\n", __func__); -+#endif -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while(1) -+ { -+ if (rtw_end_of_queue_search(phead,plist)== _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ //report network only if the current channel set contains the channel to which this network belongs -+ if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 -+ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE -+ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) -+ ) -+ { -+ //ev=translate_scan(padapter, a, pnetwork, ev, stop); -+ rtw_cfg80211_inform_bss(padapter, pnetwork); -+ } -+ /* //check ralink testbed RSN IE length -+ { -+ if(_rtw_memcmp(pnetwork->network.Ssid.Ssid, "Ralink_11n_AP",13)) -+ { -+ uint ie_len=0; -+ u8 *p=NULL; -+ p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); -+ DBG_871X("ie_len=%d\n", ie_len); -+ } -+ }*/ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+} -+ -+static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u8 *wps_ie; -+ u32 p2p_ielen = 0; -+ u8 *p2p_ie; -+ u32 wfd_ielen = 0; -+ u8 *wfd_ie; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, ielen=%d\n", __func__, len); -+#endif -+ -+ if(len>0) -+ { -+ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) -+ { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("probe_req_wps_ielen=%d\n", wps_ielen); -+ #endif -+ -+ if(pmlmepriv->wps_probe_req_ie) -+ { -+ u32 free_len = pmlmepriv->wps_probe_req_ie_len; -+ pmlmepriv->wps_probe_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); -+ pmlmepriv->wps_probe_req_ie = NULL; -+ } -+ -+ pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); -+ if ( pmlmepriv->wps_probe_req_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); -+ pmlmepriv->wps_probe_req_ie_len = wps_ielen; -+ } -+ -+ //buf += wps_ielen; -+ //len -= wps_ielen; -+ -+ #ifdef CONFIG_P2P -+ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) -+ { -+ struct wifidirect_info *wdinfo = &padapter->wdinfo; -+ u32 attr_contentlen = 0; -+ u8 listen_ch_attr[5]; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("probe_req_p2p_ielen=%d\n", p2p_ielen); -+ #endif -+ -+ if(pmlmepriv->p2p_probe_req_ie) -+ { -+ u32 free_len = pmlmepriv->p2p_probe_req_ie_len; -+ pmlmepriv->p2p_probe_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); -+ pmlmepriv->p2p_probe_req_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); -+ if ( pmlmepriv->p2p_probe_req_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; -+ -+ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8*)listen_ch_attr, (uint*) &attr_contentlen) -+ && attr_contentlen == 5) -+ { -+ if (wdinfo->listen_channel != listen_ch_attr[4]) { -+ DBG_871X(FUNC_ADPT_FMT" listen channel - country:%c%c%c, class:%u, ch:%u\n", -+ FUNC_ADPT_ARG(padapter), listen_ch_attr[0], listen_ch_attr[1], listen_ch_attr[2], -+ listen_ch_attr[3], listen_ch_attr[4]); -+ wdinfo->listen_channel = listen_ch_attr[4]; -+ } -+ } -+ } -+ #endif //CONFIG_P2P -+ -+ #ifdef CONFIG_WFD -+ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("probe_req_wfd_ielen=%d\n", wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ return -EINVAL; -+ } -+ #endif /* CONFIG_WFD */ -+ } -+ -+ return ret; -+ -+} -+ -+static int cfg80211_rtw_scan(struct wiphy *wiphy -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+ , struct net_device *ndev -+ #endif -+ , struct cfg80211_scan_request *request) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct net_device *ndev = wdev_to_ndev(request->wdev); -+#endif -+ int i; -+ u8 _status = _FALSE; -+ int ret = 0; -+ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; -+ struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; -+ _irqL irqL; -+ u8 *wps_ie=NULL; -+ uint wps_ielen=0; -+ u8 *p2p_ie=NULL; -+ uint p2p_ielen=0; -+ u8 survey_times=3; -+ u8 survey_times_for_one_ch=6; -+ struct cfg80211_ssid *ssids = request->ssids; -+ int social_channel = 0, j = 0; -+ bool need_indicate_scan_done = _FALSE; -+ bool ps_denied = _FALSE; -+ -+ _adapter *padapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ struct mlme_priv *pmlmepriv; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo; -+#endif //CONFIG_P2P -+#ifdef CONFIG_CONCURRENT_MODE -+ PADAPTER pbuddy_adapter = NULL; -+ struct mlme_priv *pbuddy_mlmepriv = NULL; -+#endif //CONFIG_CONCURRENT_MODE -+ -+ if (ndev == NULL) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(padapter); -+ pmlmepriv= &padapter->mlmepriv; -+#ifdef CONFIG_P2P -+ pwdinfo= &(padapter->wdinfo); -+#endif //CONFIG_P2P -+ -+//#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+//#endif -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->pbuddy_adapter) { -+ pbuddy_adapter = padapter->pbuddy_adapter; -+ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); -+ } -+#endif //CONFIG_CONCURRENT_MODE -+ -+#ifdef CONFIG_MP_INCLUDED -+if (padapter->registrypriv.mp_mode == 1) -+{ -+ DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EPERM; -+ goto exit; -+} -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->pbuddy_adapter) { -+ if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) -+ { -+ DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); -+ ret = -EPERM; -+ goto exit; -+ } -+ } -+#endif //CONFIG_CONCURRENT_MODE -+#endif -+ -+ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ pwdev_priv->scan_request = request; -+ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ -+ if (adapter_wdev_data(padapter)->block_scan == _TRUE) { -+ DBG_871X(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter)); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) -+ { -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_871X("%s under WIFI_AP_STATE\n", __FUNCTION__); -+#endif -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) -+ { -+ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); -+ -+ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) -+ { -+ DBG_8192C("AP mode process WPS \n"); -+ } -+ -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ } -+ -+ rtw_ps_deny(padapter, PS_DENY_SCAN); -+ ps_denied = _TRUE; -+ if(_FAIL == rtw_pwr_wakeup(padapter)) { -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ -+ #ifdef CONFIG_P2P -+ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) -+ { -+ if(ssids->ssid != NULL -+ && _rtw_memcmp(ssids->ssid, "DIRECT-", 7) -+ && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) -+ ) -+ { -+ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ { -+ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); -+ adapter_wdev_data(padapter)->p2p_enabled = _TRUE; -+ } -+ else -+ { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -+ #endif -+ } -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+ -+ if(request->n_channels == 3 && -+ request->channels[0]->hw_value == 1 && -+ request->channels[1]->hw_value == 6 && -+ request->channels[2]->hw_value == 11 -+ ) -+ { -+ social_channel = 1; -+ } -+ } -+ } -+ #endif //CONFIG_P2P -+ -+ if(request->ie && request->ie_len>0) -+ { -+ rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len ); -+ } -+ -+ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { -+ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { -+ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); -+ ret = -EBUSY; -+ goto check_need_indicate_scan_done; -+ } -+ -+ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) -+ { -+#if 1 // Miracast can't do AP scan -+ static u32 lastscantime = 0; -+ u32 passtime; -+ -+ passtime = rtw_get_passing_time_ms(lastscantime); -+ lastscantime = rtw_get_current_time(); -+ if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) -+#endif -+ { -+ DBG_871X("%s: bBusyTraffic == _TRUE\n", __FUNCTION__); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ } -+ -+ if (rtw_is_scan_deny(padapter)){ -+ DBG_871X(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if(pbuddy_mlmepriv && (pbuddy_mlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) -+ { -+#if 1 // Miracast can't do AP scan -+ static u32 buddylastscantime = 0; -+ u32 passtime; -+ -+ passtime = rtw_get_passing_time_ms(buddylastscantime); -+ buddylastscantime = rtw_get_current_time(); -+ if ((passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) -+//#ifdef CONFIG_P2P -+// ||(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) -+//#endif //CONFIG_P2P -+ ) -+#endif -+ { -+ DBG_871X("%s: bBusyTraffic == _TRUE at buddy_intf\n", __FUNCTION__); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ } -+ -+ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { -+ DBG_871X("buddy_intf's mlme state:0x%x\n", pbuddy_mlmepriv->fw_state); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ -+ } else if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY)) { -+ bool scan_via_buddy = _FALSE; -+ struct rtw_wdev_priv *buddy_wdev_priv = adapter_wdev_data(pbuddy_adapter); -+ -+ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); -+ if (buddy_wdev_priv->scan_request) { -+ DBG_871X("scan via buddy\n"); -+ pmlmepriv->scanning_via_buddy_intf = _TRUE; -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ scan_via_buddy = _TRUE; -+ } -+ _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); -+ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ -+ if (scan_via_buddy == _FALSE) -+ need_indicate_scan_done = _TRUE; -+ -+ goto check_need_indicate_scan_done; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+#ifdef CONFIG_P2P -+ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) -+ { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); -+ rtw_free_network_queue(padapter, _TRUE); -+ -+ if(social_channel == 0) -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); -+ else -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); -+ } -+#endif //CONFIG_P2P -+ -+ -+ _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); -+ //parsing request ssids, n_ssids -+ for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); -+ #endif -+ _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); -+ ssid[i].SsidLength = ssids[i].ssid_len; -+ } -+ -+ /* parsing channels, n_channels */ -+ _rtw_memset(ch, 0, sizeof(struct rtw_ieee80211_channel)*RTW_CHANNEL_SCAN_AMOUNT); -+ for (i=0;in_channels && ichannels[i])); -+ #endif -+ ch[i].hw_value = request->channels[i]->hw_value; -+ ch[i].flags = request->channels[i]->flags; -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ if (request->n_channels == 1) { -+ for(i=1;in_channels <= 4) { -+ for(j=request->n_channels-1;j>=0;j--) -+ for(i=0;in_channels); -+ } else { -+ _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, NULL, 0); -+ } -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+ if(_status == _FALSE) -+ { -+ ret = -1; -+ } -+ -+check_need_indicate_scan_done: -+ if (_TRUE == need_indicate_scan_done) -+ { -+ rtw_cfg80211_surveydone_event_callback(padapter); -+ rtw_cfg80211_indicate_scan_done(padapter, _FALSE); -+ } -+ -+cancel_ps_deny: -+ if (ps_denied == _TRUE) -+ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); -+ -+exit: -+ return ret; -+ -+} -+ -+static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) -+{ -+#if 0 -+ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); -+ -+ if (changed & WIPHY_PARAM_RTS_THRESHOLD && -+ (iwm->conf.rts_threshold != wiphy->rts_threshold)) { -+ int ret; -+ -+ iwm->conf.rts_threshold = wiphy->rts_threshold; -+ -+ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, -+ CFG_RTS_THRESHOLD, -+ iwm->conf.rts_threshold); -+ if (ret < 0) -+ return ret; -+ } -+ -+ if (changed & WIPHY_PARAM_FRAG_THRESHOLD && -+ (iwm->conf.frag_threshold != wiphy->frag_threshold)) { -+ int ret; -+ -+ iwm->conf.frag_threshold = wiphy->frag_threshold; -+ -+ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, -+ CFG_FRAG_THRESHOLD, -+ iwm->conf.frag_threshold); -+ if (ret < 0) -+ return ret; -+ } -+#endif -+ DBG_8192C("%s\n", __func__); -+ return 0; -+} -+ -+ -+ -+static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) -+{ -+ DBG_8192C("%s, wpa_version=%d\n", __func__, wpa_version); -+ -+ if (!wpa_version) { -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; -+ return 0; -+ } -+ -+ -+ if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) -+ { -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; -+ } -+ -+/* -+ if (wpa_version & NL80211_WPA_VERSION_2) -+ { -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; -+ } -+*/ -+ -+ #ifdef CONFIG_WAPI_SUPPORT -+ if (wpa_version & NL80211_WAPI_VERSION_1) -+ { -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWAPI; -+ } -+ #endif -+ -+ return 0; -+ -+} -+ -+static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, -+ enum nl80211_auth_type sme_auth_type) -+{ -+ DBG_8192C("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); -+ -+ -+ switch (sme_auth_type) { -+ case NL80211_AUTHTYPE_AUTOMATIC: -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+ -+ break; -+ case NL80211_AUTHTYPE_OPEN_SYSTEM: -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; -+ -+ if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if(psecuritypriv->ndisauthtype == Ndis802_11AuthModeWAPI) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+#endif -+ -+ break; -+ case NL80211_AUTHTYPE_SHARED_KEY: -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ -+ -+ break; -+ default: -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; -+ //return -ENOTSUPP; -+ } -+ -+ return 0; -+ -+} -+ -+static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) -+{ -+ u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ -+ u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : -+ &psecuritypriv->dot118021XGrpPrivacy; -+ -+ DBG_8192C("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); -+ -+ -+ if (!cipher) { -+ *profile_cipher = _NO_PRIVACY_; -+ psecuritypriv->ndisencryptstatus = ndisencryptstatus; -+ return 0; -+ } -+ -+ switch (cipher) { -+ case IW_AUTH_CIPHER_NONE: -+ *profile_cipher = _NO_PRIVACY_; -+ ndisencryptstatus = Ndis802_11EncryptionDisabled; -+#ifdef CONFIG_WAPI_SUPPORT -+ if(psecuritypriv->dot11PrivacyAlgrthm ==_SMS4_ ) -+ { -+ *profile_cipher = _SMS4_; -+ } -+#endif -+ break; -+ case WLAN_CIPHER_SUITE_WEP40: -+ *profile_cipher = _WEP40_; -+ ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WLAN_CIPHER_SUITE_WEP104: -+ *profile_cipher = _WEP104_; -+ ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WLAN_CIPHER_SUITE_TKIP: -+ *profile_cipher = _TKIP_; -+ ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP: -+ *profile_cipher = _AES_; -+ ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case WLAN_CIPHER_SUITE_SMS4: -+ *profile_cipher = _SMS4_; -+ ndisencryptstatus = Ndis802_11_EncrypteionWAPI; -+ break; -+#endif -+ default: -+ DBG_8192C("Unsupported cipher: 0x%x\n", cipher); -+ return -ENOTSUPP; -+ } -+ -+ if(ucast) -+ { -+ psecuritypriv->ndisencryptstatus = ndisencryptstatus; -+ -+ //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) -+ // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; -+ } -+ -+ return 0; -+} -+ -+static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) -+{ -+ DBG_8192C("%s, key_mgt=0x%x\n", __func__, key_mgt); -+ -+ if (key_mgt == WLAN_AKM_SUITE_8021X) -+ //*auth_type = UMAC_AUTH_TYPE_8021X; -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ else if (key_mgt == WLAN_AKM_SUITE_PSK) { -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ } -+#ifdef CONFIG_WAPI_SUPPORT -+ else if(key_mgt ==WLAN_AKM_SUITE_WAPI_PSK){ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+ } -+ else if(key_mgt ==WLAN_AKM_SUITE_WAPI_CERT){ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+ } -+#endif -+ -+ -+ else { -+ DBG_8192C("Invalid key mgt: 0x%x\n", key_mgt); -+ //return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) -+{ -+ u8 *buf=NULL, *pos=NULL; -+ u32 left; -+ int group_cipher = 0, pairwise_cipher = 0; -+ int ret = 0; -+ int wpa_ielen=0; -+ int wpa2_ielen=0; -+ u8 *pwpa, *pwpa2; -+ u8 null_addr[]= {0,0,0,0,0,0}; -+ -+ if (pie == NULL || !ielen) { -+ /* Treat this as normal case, but need to clear WIFI_UNDER_WPS */ -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ goto exit; -+ } -+ -+ if (ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ buf = rtw_zmalloc(ielen); -+ if (buf == NULL){ -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ _rtw_memcpy(buf, pie , ielen); -+ -+ //dump -+ { -+ int i; -+ DBG_8192C("set wpa_ie(length:%zu):\n", ielen); -+ for(i=0;i0) -+ { -+ if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) -+ { -+ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; -+ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; -+ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); -+ -+ DBG_8192C("got wpa_ie, wpa_ielen:%u\n", wpa_ielen); -+ } -+ } -+ -+ pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); -+ if(pwpa2 && wpa2_ielen>0) -+ { -+ if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) -+ { -+ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; -+ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; -+ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); -+ -+ DBG_8192C("got wpa2_ie, wpa2_ielen:%u\n", wpa2_ielen); -+ } -+ } -+ -+ if (group_cipher == 0) -+ { -+ group_cipher = WPA_CIPHER_NONE; -+ } -+ if (pairwise_cipher == 0) -+ { -+ pairwise_cipher = WPA_CIPHER_NONE; -+ } -+ -+ switch(group_cipher) -+ { -+ case WPA_CIPHER_NONE: -+ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; -+ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; -+ break; -+ case WPA_CIPHER_WEP40: -+ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WPA_CIPHER_TKIP: -+ padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WPA_CIPHER_CCMP: -+ padapter->securitypriv.dot118021XGrpPrivacy=_AES_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_WEP104: -+ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ } -+ -+ switch(pairwise_cipher) -+ { -+ case WPA_CIPHER_NONE: -+ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; -+ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; -+ break; -+ case WPA_CIPHER_WEP40: -+ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WPA_CIPHER_TKIP: -+ padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WPA_CIPHER_CCMP: -+ padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_WEP104: -+ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ } -+ -+ {/* handle wps_ie */ -+ uint wps_ielen; -+ u8 *wps_ie; -+ -+ wps_ie = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); -+ if (wps_ie && wps_ielen > 0) { -+ DBG_8192C("got wps_ie, wps_ielen:%u\n", wps_ielen); -+ padapter->securitypriv.wps_ie_len = wps_ielensecuritypriv.wps_ie, wps_ie, padapter->securitypriv.wps_ie_len); -+ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ } else { -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ } -+ } -+ -+ #ifdef CONFIG_P2P -+ {//check p2p_ie for assoc req; -+ uint p2p_ielen=0; -+ u8 *p2p_ie; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) -+ { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); -+ #endif -+ -+ if(pmlmepriv->p2p_assoc_req_ie) -+ { -+ u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; -+ pmlmepriv->p2p_assoc_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); -+ pmlmepriv->p2p_assoc_req_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); -+ if ( pmlmepriv->p2p_assoc_req_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ goto exit; -+ } -+ _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; -+ } -+ } -+ #endif //CONFIG_P2P -+ -+ #ifdef CONFIG_WFD -+ { -+ uint wfd_ielen=0; -+ u8 *wfd_ie; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ wfd_ie = rtw_get_wfd_ie(buf, ielen, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s wfd_assoc_req_ielen=%d\n", __FUNCTION__, wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ goto exit; -+ } -+ } -+ #endif /* CONFIG_WFD */ -+ -+ //TKIP and AES disallow multicast packets until installing group key -+ if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) -+ //WPS open need to enable multicast -+ //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) -+ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); -+ -+ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, -+ ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", -+ pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); -+ -+exit: -+ if (buf) -+ rtw_mfree(buf, ielen); -+ if (ret) -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ return ret; -+} -+ -+static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_ibss_params *params) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ NDIS_802_11_SSID ndis_ssid; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct cfg80211_chan_def *pch_def; -+#endif -+ struct ieee80211_channel *pch; -+ int ret=0; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ pch_def = (struct cfg80211_chan_def *)(¶ms->chandef); -+ pch = (struct ieee80211_channel *) pch_def->chan; -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) -+ pch = (struct ieee80211_channel *)(params->channel); -+#endif -+ -+ if(_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret= -EPERM; -+ goto exit; -+ } -+ -+ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -+ ret = -EPERM; -+ goto exit; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { -+ DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); -+ ret = -EINVAL; -+ goto exit; -+ } -+ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { -+ rtw_scan_abort(padapter->pbuddy_adapter); -+ } -+#endif //CONFIG_CONCURRENT_MODE -+ -+ if (!params->ssid || !params->ssid_len) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (params->ssid_len > IW_ESSID_MAX_SIZE){ -+ -+ ret= -E2BIG; -+ goto exit; -+ } -+ -+ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ ndis_ssid.SsidLength = params->ssid_len; -+ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)params->ssid, params->ssid_len); -+ -+ //DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, params->ssid_len); -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; -+ -+ ret = rtw_cfg80211_set_auth_type(psecuritypriv, NL80211_AUTHTYPE_OPEN_SYSTEM); -+ rtw_set_802_11_authentication_mode(padapter, psecuritypriv->ndisauthtype); -+ -+ DBG_871X("%s: center_freq = %d\n", __func__, pch->center_freq); -+ pmlmeext->cur_channel = rtw_freq2ch(pch->center_freq); -+ -+ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) -+ { -+ ret = -1; -+ goto exit; -+ } -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; -+ enum nl80211_iftype old_type; -+ int ret = 0; -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 -+ padapter->mlmepriv.not_indic_disco = _TRUE; -+ #endif -+ -+ old_type = rtw_wdev->iftype; -+ -+ rtw_set_to_roam(padapter, 0); -+ -+ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) -+ { -+ rtw_scan_abort(padapter); -+ LeaveAllPowerSaveMode(padapter); -+ -+ rtw_wdev->iftype = NL80211_IFTYPE_STATION; -+ -+ if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure) ==_FALSE) -+ { -+ rtw_wdev->iftype = old_type; -+ ret = -EPERM; -+ goto leave_ibss; -+ } -+ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_TRUE); -+ } -+ -+leave_ibss: -+ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 -+ padapter->mlmepriv.not_indic_disco = _FALSE; -+ #endif -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_connect_params *sme) -+{ -+ int ret=0; -+ _irqL irqL; -+ _list *phead; -+ struct wlan_network *pnetwork = NULL; -+ NDIS_802_11_AUTHENTICATION_MODE authmode; -+ NDIS_802_11_SSID ndis_ssid; -+ u8 *dst_ssid, *src_ssid; -+ u8 *dst_bssid, *src_bssid; -+ //u8 matched_by_bssid=_FALSE; -+ //u8 matched_by_ssid=_FALSE; -+ u8 matched=_FALSE; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ _queue *queue = &pmlmepriv->scanned_queue; -+ -+ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 -+ padapter->mlmepriv.not_indic_disco = _TRUE; -+ #endif -+ -+ DBG_871X("=>"FUNC_NDEV_FMT" - Start to Connection\n", FUNC_NDEV_ARG(ndev)); -+ DBG_871X("privacy=%d, key=%p, key_len=%d, key_idx=%d, auth_type=%d\n", -+ sme->privacy, sme->key, sme->key_len, sme->key_idx, sme->auth_type); -+ -+ -+ if(adapter_wdev_data(padapter)->block == _TRUE) -+ { -+ ret = -EBUSY; -+ DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); -+ goto exit; -+ } -+ -+#ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT -+ printk("MStar Android!\n"); -+ if(adapter_wdev_data(padapter)->bandroid_scan == _FALSE) -+ { -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); -+ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+#endif //CONFIG_P2P -+ { -+ ret = -EBUSY; -+ printk("Android hasn't attached yet!\n"); -+ goto exit; -+ } -+ } -+#endif -+ -+ rtw_ps_deny(padapter, PS_DENY_JOIN); -+ if(_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret= -EPERM; -+ goto exit; -+ } -+ -+ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -+ ret = -EPERM; -+ goto exit; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { -+ DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); -+ ret = -EINVAL; -+ goto exit; -+ } -+ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { -+ rtw_scan_abort(padapter->pbuddy_adapter); -+ } -+#endif -+ -+ if (!sme->ssid || !sme->ssid_len) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (sme->ssid_len > IW_ESSID_MAX_SIZE){ -+ -+ ret= -E2BIG; -+ goto exit; -+ } -+ -+ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ ndis_ssid.SsidLength = sme->ssid_len; -+ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)sme->ssid, sme->ssid_len); -+ -+ DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, sme->ssid_len); -+ -+ -+ if (sme->bssid) -+ DBG_8192C("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); -+ -+ -+ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { -+ ret = -EBUSY; -+ DBG_8192C("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); -+ goto exit; -+ } -+ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { -+ rtw_scan_abort(padapter); -+ } -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ padapter->wapiInfo.bWapiEnable = false; -+#endif -+ -+ ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); -+ if (ret < 0) -+ goto exit; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if(sme->crypto.wpa_versions & NL80211_WAPI_VERSION_1) -+ { -+ padapter->wapiInfo.bWapiEnable = true; -+ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; -+ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; -+ } -+#endif -+ -+ ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_WAPI) -+ padapter->mlmeextpriv.mlmext_info.auth_algo = psecuritypriv->dot11AuthAlgrthm; -+#endif -+ -+ -+ if (ret < 0) -+ goto exit; -+ -+ DBG_8192C("%s, ie_len=%zu\n", __func__, sme->ie_len); -+ -+ ret = rtw_cfg80211_set_wpa_ie(padapter, (u8 *)sme->ie, sme->ie_len); -+ if (ret < 0) -+ goto exit; -+ -+ if (sme->crypto.n_ciphers_pairwise) { -+ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); -+ if (ret < 0) -+ goto exit; -+ } -+ -+ //For WEP Shared auth -+ if (sme->key_len > 0 && sme->key) -+ { -+ u32 wep_key_idx, wep_key_len,wep_total_len; -+ NDIS_802_11_WEP *pwep = NULL; -+ DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); -+ -+ wep_key_idx = sme->key_idx; -+ wep_key_len = sme->key_len; -+ -+ if (sme->key_idx > WEP_KEYS) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (wep_key_len > 0) -+ { -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); -+ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); -+ if(pwep == NULL){ -+ DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ _rtw_memset(pwep, 0, wep_total_len); -+ -+ pwep->KeyLength = wep_key_len; -+ pwep->Length = wep_total_len; -+ -+ if(wep_key_len==13) -+ { -+ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; -+ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; -+ } -+ } -+ else { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ pwep->KeyIndex = wep_key_idx; -+ pwep->KeyIndex |= 0x80000000; -+ -+ _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); -+ -+ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) -+ { -+ ret = -EOPNOTSUPP ; -+ } -+ -+ if (pwep) { -+ rtw_mfree((u8 *)pwep,wep_total_len); -+ } -+ -+ if(ret < 0) -+ goto exit; -+ } -+ -+ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); -+ if (ret < 0) -+ return ret; -+ -+ if (sme->crypto.n_akm_suites) { -+ ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); -+ if (ret < 0) -+ goto exit; -+ } -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_PSK){ -+ padapter->wapiInfo.bWapiPSK = true; -+ } -+ else if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_CERT){ -+ padapter->wapiInfo.bWapiPSK = false; -+ } -+#endif -+ -+ authmode = psecuritypriv->ndisauthtype; -+ rtw_set_802_11_authentication_mode(padapter, authmode); -+ -+ //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); -+ -+ if (rtw_set_802_11_connect(padapter, (u8 *)sme->bssid, &ndis_ssid) == _FALSE) { -+ ret = -1; -+ goto exit; -+ } -+ -+ DBG_8192C("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); -+ -+exit: -+ -+ rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); -+ -+ DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); -+ -+ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 -+ padapter->mlmepriv.not_indic_disco = _FALSE; -+ #endif -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, -+ u16 reason_code) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ DBG_871X(FUNC_NDEV_FMT" - Start to Disconnect\n", FUNC_NDEV_ARG(ndev)); -+ -+ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 -+ padapter->mlmepriv.not_indic_disco = _TRUE; -+ #endif -+ -+ rtw_set_to_roam(padapter, 0); -+ -+ //if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) -+ { -+ rtw_scan_abort(padapter); -+ LeaveAllPowerSaveMode(padapter); -+ rtw_disassoc_cmd(padapter, 500, _FALSE); -+ -+ DBG_871X("%s...call rtw_indicate_disconnect\n", __FUNCTION__); -+ -+ rtw_indicate_disconnect(padapter); -+ -+ rtw_free_assoc_resources(padapter, 1); -+ rtw_pwr_wakeup(padapter); -+ } -+ -+ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 -+ padapter->mlmepriv.not_indic_disco = _FALSE; -+ #endif -+ -+ DBG_871X(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev)); -+ return 0; -+} -+ -+static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) -+ struct wireless_dev *wdev, -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE) -+ enum nl80211_tx_power_setting type, int mbm) -+#else -+ enum tx_power_setting type, int dbm) -+#endif -+{ -+#if 0 -+ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); -+ int ret; -+ -+ switch (type) { -+ case NL80211_TX_POWER_AUTOMATIC: -+ return 0; -+ case NL80211_TX_POWER_FIXED: -+ if (mbm < 0 || (mbm % 100)) -+ return -EOPNOTSUPP; -+ -+ if (!test_bit(IWM_STATUS_READY, &iwm->status)) -+ return 0; -+ -+ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, -+ CFG_TX_PWR_LIMIT_USR, -+ MBM_TO_DBM(mbm) * 2); -+ if (ret < 0) -+ return ret; -+ -+ return iwm_tx_power_trigger(iwm); -+ default: -+ IWM_ERR(iwm, "Unsupported power type: %d\n", type); -+ return -EOPNOTSUPP; -+ } -+#endif -+ DBG_8192C("%s\n", __func__); -+ return 0; -+} -+ -+static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) -+ struct wireless_dev *wdev, -+#endif -+ int *dbm) -+{ -+ DBG_8192C("%s\n", __func__); -+ -+ *dbm = (12); -+ -+ return 0; -+} -+ -+inline bool rtw_cfg80211_pwr_mgmt(_adapter *adapter) -+{ -+ struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(adapter); -+ return rtw_wdev_priv->power_mgmt; -+} -+ -+static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, -+ struct net_device *ndev, -+ bool enabled, int timeout) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(padapter); -+ -+ DBG_871X(FUNC_NDEV_FMT" enabled:%u, timeout:%d\n", FUNC_NDEV_ARG(ndev), -+ enabled, timeout); -+ -+ rtw_wdev_priv->power_mgmt = enabled; -+ -+ #ifdef CONFIG_LPS -+ if (!enabled) -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE_CFG80211_PWRMGMT, 1); -+ #endif -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, -+ struct net_device *ndev, -+ struct cfg80211_pmksa *pmksa) -+{ -+ u8 index,blInserted = _FALSE; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *mlme = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; -+ -+ DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) -+ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); -+ -+ if ( _rtw_memcmp((u8 *)pmksa->bssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) -+ { -+ return -EINVAL; -+ } -+ -+ if (check_fwstate(mlme, _FW_LINKED) == _FALSE) { -+ DBG_871X(FUNC_NDEV_FMT" not set pmksa cause not in linked state\n", FUNC_NDEV_ARG(ndev)); -+ return -EINVAL; -+ } -+ -+ blInserted = _FALSE; -+ -+ //overwrite PMKID -+ for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) -+ { // BSSID is matched, the same AP => rewrite with new PMKID. -+ DBG_871X(FUNC_NDEV_FMT" BSSID exists in the PMKList.\n", FUNC_NDEV_ARG(ndev)); -+ -+ _rtw_memcpy( psecuritypriv->PMKIDList[index].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); -+ psecuritypriv->PMKIDList[index].bUsed = _TRUE; -+ psecuritypriv->PMKIDIndex = index+1; -+ blInserted = _TRUE; -+ break; -+ } -+ } -+ -+ if(!blInserted) -+ { -+ // Find a new entry -+ DBG_871X(FUNC_NDEV_FMT" Use the new entry index = %d for this PMKID.\n", -+ FUNC_NDEV_ARG(ndev), psecuritypriv->PMKIDIndex ); -+ -+ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, (u8 *)pmksa->bssid, ETH_ALEN); -+ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); -+ -+ psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; -+ psecuritypriv->PMKIDIndex++ ; -+ if(psecuritypriv->PMKIDIndex==16) -+ { -+ psecuritypriv->PMKIDIndex =0; -+ } -+ } -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, -+ struct net_device *ndev, -+ struct cfg80211_pmksa *pmksa) -+{ -+ u8 index, bMatched = _FALSE; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) -+ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); -+ -+ for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) -+ { // BSSID is matched, the same AP => Remove this PMKID information and reset it. -+ _rtw_memset(psecuritypriv->PMKIDList[index].Bssid, 0x00, ETH_ALEN ); -+ _rtw_memset(psecuritypriv->PMKIDList[index].PMKID, 0x00, WLAN_PMKID_LEN ); -+ psecuritypriv->PMKIDList[index].bUsed = _FALSE; -+ bMatched = _TRUE; -+ DBG_871X(FUNC_NDEV_FMT" clear id:%hhu\n", FUNC_NDEV_ARG(ndev), index); -+ break; -+ } -+ } -+ -+ if(_FALSE == bMatched) -+ { -+ DBG_871X(FUNC_NDEV_FMT" do not have matched BSSID\n" -+ , FUNC_NDEV_ARG(ndev)); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, -+ struct net_device *ndev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); -+ psecuritypriv->PMKIDIndex = 0; -+ -+ return 0; -+} -+ -+#ifdef CONFIG_AP_MODE -+void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) -+{ -+ s32 freq; -+ int channel; -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct net_device *ndev = padapter->pnetdev; -+ -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) -+ { -+ struct station_info sinfo; -+ u8 ie_offset; -+ if (GetFrameSubType(pmgmt_frame) == WIFI_ASSOCREQ) -+ ie_offset = _ASOCREQ_IE_OFFSET_; -+ else // WIFI_REASSOCREQ -+ ie_offset = _REASOCREQ_IE_OFFSET_; -+ -+ sinfo.filled = 0; ++ sinfo->tx_packets = psta->sta_stats.tx_pkts; ++ ++ } ++ ++ //for Ad-Hoc/AP mode ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ //TODO: should acquire station info... ++ } ++ ++exit: ++ return ret; ++} ++ ++extern int netdev_open(struct net_device *pnetdev); ++#ifdef CONFIG_CONCURRENT_MODE ++extern int netdev_if2_open(struct net_device *pnetdev); ++#endif ++ ++/* ++enum nl80211_iftype { ++ NL80211_IFTYPE_UNSPECIFIED, ++ NL80211_IFTYPE_ADHOC, //1 ++ NL80211_IFTYPE_STATION, //2 ++ NL80211_IFTYPE_AP, //3 ++ NL80211_IFTYPE_AP_VLAN, ++ NL80211_IFTYPE_WDS, ++ NL80211_IFTYPE_MONITOR, //6 ++ NL80211_IFTYPE_MESH_POINT, ++ NL80211_IFTYPE_P2P_CLIENT, //8 ++ NL80211_IFTYPE_P2P_GO, //9 ++ //keep last ++ NUM_NL80211_IFTYPES, ++ NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 ++}; ++*/ ++static int cfg80211_rtw_change_iface(struct wiphy *wiphy, ++ struct net_device *ndev, ++ enum nl80211_iftype type, ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)) ++ u32 *flags, ++ #endif ++ struct vif_params *params) ++{ ++ enum nl80211_iftype old_type; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ int ret = 0; ++ u8 change = _FALSE; ++ ++ DBG_871X(FUNC_NDEV_FMT" type=%d\n", FUNC_NDEV_ARG(ndev), type); ++ ++ if(adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) ++ { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->adapter_type == SECONDARY_ADAPTER) ++ { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open\n", FUNC_NDEV_ARG(ndev)); ++ if(netdev_if2_open(ndev) != 0) { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open fail\n", FUNC_NDEV_ARG(ndev)); ++ ret= -EPERM; ++ goto exit; ++ } ++ } ++ else if(padapter->adapter_type == PRIMARY_ADAPTER) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_open\n", FUNC_NDEV_ARG(ndev)); ++ if(netdev_open(ndev) != 0) { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_open fail\n", FUNC_NDEV_ARG(ndev)); ++ ret= -EPERM; ++ goto exit; ++ } ++ } ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ DBG_871X(FUNC_NDEV_FMT" call rtw_pwr_wakeup fail\n", FUNC_NDEV_ARG(ndev)); ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ old_type = rtw_wdev->iftype; ++ DBG_871X(FUNC_NDEV_FMT" old_iftype=%d, new_iftype=%d\n", ++ FUNC_NDEV_ARG(ndev), old_type, type); ++ ++ if(old_type != type) ++ { ++ change = _TRUE; ++ pmlmeext->action_public_rxseq = 0xffff; ++ pmlmeext->action_public_dialog_token = 0xff; ++ } ++ ++ /* initial default type */ ++ ndev->type = ARPHRD_ETHER; ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ networkType = Ndis802_11IBSS; ++ break; ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ case NL80211_IFTYPE_P2P_CLIENT: ++#endif ++ case NL80211_IFTYPE_STATION: ++ networkType = Ndis802_11Infrastructure; ++ #ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) ++ if (type == NL80211_IFTYPE_P2P_CLIENT) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ else { ++ /* NL80211_IFTYPE_STATION */ ++ if (rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ } ++ #endif ++ } ++ #endif //CONFIG_P2P ++ break; ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ case NL80211_IFTYPE_P2P_GO: ++#endif ++ case NL80211_IFTYPE_AP: ++ networkType = Ndis802_11APMode; ++ #ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ #endif //CONFIG_P2P ++ break; ++ case NL80211_IFTYPE_MONITOR: ++ networkType = Ndis802_11Monitor; ++#if 0 ++ ndev->type = ARPHRD_IEEE80211; /* IEEE 802.11 : 801 */ ++#endif ++ ndev->type = ARPHRD_IEEE80211_RADIOTAP; /* IEEE 802.11 + radiotap header : 803 */ ++ break; ++ default: ++ ret = -EOPNOTSUPP; ++ goto exit; ++ } ++ ++ rtw_wdev->iftype = type; ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) ++ { ++ rtw_wdev->iftype = old_type; ++ ret = -EPERM; ++ goto exit; ++ } ++ ++ rtw_setopmode_cmd(padapter, networkType, _TRUE); ++ ++exit: ++ ++ DBG_871X(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret); ++ return ret; ++} ++ ++void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) ++{ ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); ++ _irqL irqL; ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ if (pwdev_priv->scan_request != NULL) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s with scan req\n", __FUNCTION__); ++ #endif ++ ++ /* avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); */ ++ if(pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy) ++ { ++ DBG_8192C("error wiphy compare\n"); ++ } ++ else ++ { ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 8, 0)) ++ struct cfg80211_scan_info info = { ++ .aborted = aborted, ++ }; ++ ++ cfg80211_scan_done(pwdev_priv->scan_request, &info); ++#else ++ cfg80211_scan_done(pwdev_priv->scan_request, aborted); ++#endif ++ } ++ ++ pwdev_priv->scan_request = NULL; ++ } else { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s without scan req\n", __FUNCTION__); ++ #endif ++ } ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++} ++ ++u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms) ++{ ++ struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); ++ u8 empty = _FALSE; ++ u32 start; ++ u32 pass_ms; ++ ++ start = rtw_get_current_time(); ++ ++ while (rtw_get_passing_time_ms(start) <= timeout_ms) { ++ ++ if (RTW_CANNOT_RUN(adapter)) ++ break; ++ ++ if (!wdev_priv->scan_request) { ++ empty = _TRUE; ++ break; ++ } ++ ++ rtw_msleep_os(10); ++ } ++ ++ pass_ms = rtw_get_passing_time_ms(start); ++ ++ if (empty == _FALSE && pass_ms > timeout_ms) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pass_ms:%u, timeout\n" ++ , FUNC_ADPT_ARG(adapter), pass_ms); ++ ++ return pass_ms; ++} ++ ++void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = pwdev->wiphy; ++ struct cfg80211_bss *bss = NULL; ++ WLAN_BSSID_EX select_network = pnetwork->network; ++ ++ bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, ++ select_network.MacAddress, select_network.Ssid.Ssid, ++ select_network.Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, ++ 0/*WLAN_CAPABILITY_ESS*/); ++ ++ if (bss) { ++ cfg80211_unlink_bss(wiphy, bss); ++ DBG_8192C("%s(): cfg80211_unlink %s!! () ",__func__,select_network.Ssid.Ssid ); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); ++#else ++ cfg80211_put_bss(bss); ++#endif ++ } ++ return; ++} ++ ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ sint wait_status; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s\n", __func__); ++#endif ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //report network only if the current channel set contains the channel to which this network belongs ++ if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 ++ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ++ ) ++ { ++ //ev=translate_scan(padapter, a, pnetwork, ev, stop); ++ rtw_cfg80211_inform_bss(padapter, pnetwork); ++ } ++ /* //check ralink testbed RSN IE length ++ { ++ if(_rtw_memcmp(pnetwork->network.Ssid.Ssid, "Ralink_11n_AP",13)) ++ { ++ uint ie_len=0; ++ u8 *p=NULL; ++ p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); ++ DBG_871X("ie_len=%d\n", ie_len); ++ } ++ }*/ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++} ++ ++static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_req_ie_len = wps_ielen; ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ struct wifidirect_info *wdinfo = &padapter->wdinfo; ++ u32 attr_contentlen = 0; ++ u8 listen_ch_attr[5]; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_req_ie_len; ++ pmlmepriv->p2p_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); ++ pmlmepriv->p2p_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_probe_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; ++ ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8*)listen_ch_attr, (uint*) &attr_contentlen) ++ && attr_contentlen == 5) ++ { ++ if (wdinfo->listen_channel != listen_ch_attr[4]) { ++ DBG_871X(FUNC_ADPT_FMT" listen channel - country:%c%c%c, class:%u, ch:%u\n", ++ FUNC_ADPT_ARG(padapter), listen_ch_attr[0], listen_ch_attr[1], listen_ch_attr[2], ++ listen_ch_attr[3], listen_ch_attr[4]); ++ wdinfo->listen_channel = listen_ch_attr[4]; ++ } ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ #ifdef CONFIG_WFD ++ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ return -EINVAL; ++ } ++ #endif /* CONFIG_WFD */ ++ } ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_scan(struct wiphy *wiphy ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) ++ , struct net_device *ndev ++ #endif ++ , struct cfg80211_scan_request *request) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(request->wdev); ++#endif ++ int i; ++ u8 _status = _FALSE; ++ int ret = 0; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; ++ _irqL irqL; ++ u8 *wps_ie=NULL; ++ uint wps_ielen=0; ++ u8 *p2p_ie=NULL; ++ uint p2p_ielen=0; ++ u8 survey_times=3; ++ u8 survey_times_for_one_ch=6; ++ struct cfg80211_ssid *ssids = request->ssids; ++ int social_channel = 0, j = 0; ++ bool need_indicate_scan_done = _FALSE; ++ bool ps_denied = _FALSE; ++ ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct mlme_priv *pmlmepriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo; ++#endif //CONFIG_P2P ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = NULL; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (ndev == NULL) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ pmlmepriv= &padapter->mlmepriv; ++#ifdef CONFIG_P2P ++ pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++//#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++//#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) { ++ pbuddy_adapter = padapter->pbuddy_adapter; ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_MP_INCLUDED ++if (padapter->registrypriv.mp_mode == 1) ++{ ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EPERM; ++ goto exit; ++} ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) { ++ if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) ++ { ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ++ ret = -EPERM; ++ goto exit; ++ } ++ } ++#endif //CONFIG_CONCURRENT_MODE ++#endif ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ pwdev_priv->scan_request = request; ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ if (adapter_wdev_data(padapter)->block_scan == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter)); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s under WIFI_AP_STATE\n", __FUNCTION__); ++#endif ++ ++ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ DBG_8192C("AP mode process WPS \n"); ++ } ++ ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ } ++ ++ rtw_ps_deny(padapter, PS_DENY_SCAN); ++ ps_denied = _TRUE; ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ #ifdef CONFIG_P2P ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(ssids->ssid != NULL ++ && _rtw_memcmp(ssids->ssid, "DIRECT-", 7) ++ && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) ++ ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ adapter_wdev_data(padapter)->p2p_enabled = _TRUE; ++ } ++ else ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++ #endif ++ } ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ ++ if(request->n_channels == 3 && ++ request->channels[0]->hw_value == 1 && ++ request->channels[1]->hw_value == 6 && ++ request->channels[2]->hw_value == 11 ++ ) ++ { ++ social_channel = 1; ++ } ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ if(request->ie && request->ie_len>0) ++ { ++ rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len ); ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ ret = -EBUSY; ++ goto check_need_indicate_scan_done; ++ } ++ ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) ++ { ++#if 1 // Miracast can't do AP scan ++ static u32 lastscantime = 0; ++ u32 passtime; ++ ++ passtime = rtw_get_passing_time_ms(lastscantime); ++ lastscantime = rtw_get_current_time(); ++ if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) ++#endif ++ { ++ DBG_871X("%s: bBusyTraffic == _TRUE\n", __FUNCTION__); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ } ++ ++ if (rtw_is_scan_deny(padapter)){ ++ DBG_871X(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_mlmepriv && (pbuddy_mlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) ++ { ++#if 1 // Miracast can't do AP scan ++ static u32 buddylastscantime = 0; ++ u32 passtime; ++ ++ passtime = rtw_get_passing_time_ms(buddylastscantime); ++ buddylastscantime = rtw_get_current_time(); ++ if ((passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) ++//#ifdef CONFIG_P2P ++// ||(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) ++//#endif //CONFIG_P2P ++ ) ++#endif ++ { ++ DBG_871X("%s: bBusyTraffic == _TRUE at buddy_intf\n", __FUNCTION__); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ } ++ ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { ++ DBG_871X("buddy_intf's mlme state:0x%x\n", pbuddy_mlmepriv->fw_state); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ ++ } else if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY)) { ++ bool scan_via_buddy = _FALSE; ++ struct rtw_wdev_priv *buddy_wdev_priv = adapter_wdev_data(pbuddy_adapter); ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); ++ if (buddy_wdev_priv->scan_request) { ++ DBG_871X("scan via buddy\n"); ++ pmlmepriv->scanning_via_buddy_intf = _TRUE; ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ scan_via_buddy = _TRUE; ++ } ++ _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ if (scan_via_buddy == _FALSE) ++ need_indicate_scan_done = _TRUE; ++ ++ goto check_need_indicate_scan_done; ++ } ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ if(social_channel == 0) ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ else ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); ++ } ++#endif //CONFIG_P2P ++ ++ ++ _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ //parsing request ssids, n_ssids ++ for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); ++ #endif ++ _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); ++ ssid[i].SsidLength = ssids[i].ssid_len; ++ } ++ ++ /* parsing channels, n_channels */ ++ _rtw_memset(ch, 0, sizeof(struct rtw_ieee80211_channel)*RTW_CHANNEL_SCAN_AMOUNT); ++ for (i=0;in_channels && ichannels[i])); ++ #endif ++ ch[i].hw_value = request->channels[i]->hw_value; ++ ch[i].flags = request->channels[i]->flags; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ if (request->n_channels == 1) { ++ for(i=1;in_channels <= 4) { ++ for(j=request->n_channels-1;j>=0;j--) ++ for(i=0;in_channels); ++ } else { ++ _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, NULL, 0); ++ } ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ if(_status == _FALSE) ++ { ++ ret = -1; ++ } ++ ++check_need_indicate_scan_done: ++ if (_TRUE == need_indicate_scan_done) ++ { ++ rtw_cfg80211_surveydone_event_callback(padapter); ++ rtw_cfg80211_indicate_scan_done(padapter, _FALSE); ++ } ++ ++cancel_ps_deny: ++ if (ps_denied == _TRUE) ++ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); ++ ++exit: ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ ++ if (changed & WIPHY_PARAM_RTS_THRESHOLD && ++ (iwm->conf.rts_threshold != wiphy->rts_threshold)) { ++ int ret; ++ ++ iwm->conf.rts_threshold = wiphy->rts_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_RTS_THRESHOLD, ++ iwm->conf.rts_threshold); ++ if (ret < 0) ++ return ret; ++ } ++ ++ if (changed & WIPHY_PARAM_FRAG_THRESHOLD && ++ (iwm->conf.frag_threshold != wiphy->frag_threshold)) { ++ int ret; ++ ++ iwm->conf.frag_threshold = wiphy->frag_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, ++ CFG_FRAG_THRESHOLD, ++ iwm->conf.frag_threshold); ++ if (ret < 0) ++ return ret; ++ } ++#endif ++ DBG_8192C("%s\n", __func__); ++ return 0; ++} ++ ++ ++ ++static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) ++{ ++ DBG_8192C("%s, wpa_version=%d\n", __func__, wpa_version); ++ ++ if (!wpa_version) { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ return 0; ++ } ++ ++ ++ if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; ++ } ++ ++/* ++ if (wpa_version & NL80211_WPA_VERSION_2) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++*/ ++ ++ #ifdef CONFIG_WAPI_SUPPORT ++ if (wpa_version & NL80211_WAPI_VERSION_1) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWAPI; ++ } ++ #endif ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, ++ enum nl80211_auth_type sme_auth_type) ++{ ++ DBG_8192C("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); ++ ++ ++ switch (sme_auth_type) { ++ case NL80211_AUTHTYPE_AUTOMATIC: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ ++ break; ++ case NL80211_AUTHTYPE_OPEN_SYSTEM: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ ++ if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(psecuritypriv->ndisauthtype == Ndis802_11AuthModeWAPI) ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; ++#endif ++ ++ break; ++ case NL80211_AUTHTYPE_SHARED_KEY: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++ ++ break; ++ default: ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ //return -ENOTSUPP; ++ } ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) ++{ ++ u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ ++ u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : ++ &psecuritypriv->dot118021XGrpPrivacy; ++ ++ DBG_8192C("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); ++ ++ ++ if (!cipher) { ++ *profile_cipher = _NO_PRIVACY_; ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ return 0; ++ } ++ ++ switch (cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ *profile_cipher = _NO_PRIVACY_; ++ ndisencryptstatus = Ndis802_11EncryptionDisabled; ++#ifdef CONFIG_WAPI_SUPPORT ++ if(psecuritypriv->dot11PrivacyAlgrthm ==_SMS4_ ) ++ { ++ *profile_cipher = _SMS4_; ++ } ++#endif ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ *profile_cipher = _WEP40_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_WEP104: ++ *profile_cipher = _WEP104_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ *profile_cipher = _TKIP_; ++ ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ *profile_cipher = _AES_; ++ ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++#ifdef CONFIG_WAPI_SUPPORT ++ case WLAN_CIPHER_SUITE_SMS4: ++ *profile_cipher = _SMS4_; ++ ndisencryptstatus = Ndis802_11_EncrypteionWAPI; ++ break; ++#endif ++ default: ++ DBG_8192C("Unsupported cipher: 0x%x\n", cipher); ++ return -ENOTSUPP; ++ } ++ ++ if(ucast) ++ { ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ ++ //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) ++ // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) ++{ ++ DBG_8192C("%s, key_mgt=0x%x\n", __func__, key_mgt); ++ ++ if (key_mgt == WLAN_AKM_SUITE_8021X) ++ //*auth_type = UMAC_AUTH_TYPE_8021X; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ else if (key_mgt == WLAN_AKM_SUITE_PSK) { ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ } ++#ifdef CONFIG_WAPI_SUPPORT ++ else if(key_mgt ==WLAN_AKM_SUITE_WAPI_PSK){ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; ++ } ++ else if(key_mgt ==WLAN_AKM_SUITE_WAPI_CERT){ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; ++ } ++#endif ++ ++ ++ else { ++ DBG_8192C("Invalid key mgt: 0x%x\n", key_mgt); ++ //return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) ++{ ++ u8 *buf=NULL, *pos=NULL; ++ u32 left; ++ int group_cipher = 0, pairwise_cipher = 0; ++ int ret = 0; ++ int wpa_ielen=0; ++ int wpa2_ielen=0; ++ u8 *pwpa, *pwpa2; ++ u8 null_addr[]= {0,0,0,0,0,0}; ++ ++ if (pie == NULL || !ielen) { ++ /* Treat this as normal case, but need to clear WIFI_UNDER_WPS */ ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ goto exit; ++ } ++ ++ if (ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ buf = rtw_zmalloc(ielen); ++ if (buf == NULL){ ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memcpy(buf, pie , ielen); ++ ++ //dump ++ { ++ int i; ++ DBG_8192C("set wpa_ie(length:%zu):\n", ielen); ++ for(i=0;i0) ++ { ++ if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); ++ ++ DBG_8192C("got wpa_ie, wpa_ielen:%u\n", wpa_ielen); ++ } ++ } ++ ++ pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); ++ if(pwpa2 && wpa2_ielen>0) ++ { ++ if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); ++ ++ DBG_8192C("got wpa2_ie, wpa2_ielen:%u\n", wpa2_ielen); ++ } ++ } ++ ++ if (group_cipher == 0) ++ { ++ group_cipher = WPA_CIPHER_NONE; ++ } ++ if (pairwise_cipher == 0) ++ { ++ pairwise_cipher = WPA_CIPHER_NONE; ++ } ++ ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ {/* handle wps_ie */ ++ uint wps_ielen; ++ u8 *wps_ie; ++ ++ wps_ie = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); ++ if (wps_ie && wps_ielen > 0) { ++ DBG_8192C("got wps_ie, wps_ielen:%u\n", wps_ielen); ++ padapter->securitypriv.wps_ie_len = wps_ielensecuritypriv.wps_ie, wps_ie, padapter->securitypriv.wps_ie_len); ++ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ } else { ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ } ++ } ++ ++ #ifdef CONFIG_P2P ++ {//check p2p_ie for assoc req; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_assoc_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; ++ pmlmepriv->p2p_assoc_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); ++ pmlmepriv->p2p_assoc_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_assoc_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ goto exit; ++ } ++ _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ #ifdef CONFIG_WFD ++ { ++ uint wfd_ielen=0; ++ u8 *wfd_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ wfd_ie = rtw_get_wfd_ie(buf, ielen, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s wfd_assoc_req_ielen=%d\n", __FUNCTION__, wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ goto exit; ++ } ++ } ++ #endif /* CONFIG_WFD */ ++ ++ //TKIP and AES disallow multicast packets until installing group key ++ if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) ++ //WPS open need to enable multicast ++ //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) ++ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", ++ pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); ++ ++exit: ++ if (buf) ++ rtw_mfree(buf, ielen); ++ if (ret) ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ return ret; ++} ++ ++static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_ibss_params *params) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ NDIS_802_11_SSID ndis_ssid; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ struct cfg80211_chan_def *pch_def; ++#endif ++ struct ieee80211_channel *pch; ++ int ret=0; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ pch_def = (struct cfg80211_chan_def *)(¶ms->chandef); ++ pch = (struct ieee80211_channel *) pch_def->chan; ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) ++ pch = (struct ieee80211_channel *)(params->channel); ++#endif ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); ++ ret = -EINVAL; ++ goto exit; ++ } ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (!params->ssid || !params->ssid_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (params->ssid_len > IW_ESSID_MAX_SIZE){ ++ ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = params->ssid_len; ++ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)params->ssid, params->ssid_len); ++ ++ //DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, params->ssid_len); ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ ++ ret = rtw_cfg80211_set_auth_type(psecuritypriv, NL80211_AUTHTYPE_OPEN_SYSTEM); ++ rtw_set_802_11_authentication_mode(padapter, psecuritypriv->ndisauthtype); ++ ++ DBG_871X("%s: center_freq = %d\n", __func__, pch->center_freq); ++ pmlmeext->cur_channel = rtw_freq2ch(pch->center_freq); ++ ++ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) ++ { ++ ret = -1; ++ goto exit; ++ } ++ ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; ++ enum nl80211_iftype old_type; ++ int ret = 0; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _TRUE; ++ #endif ++ ++ old_type = rtw_wdev->iftype; ++ ++ rtw_set_to_roam(padapter, 0); ++ ++ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ rtw_scan_abort(padapter); ++ LeaveAllPowerSaveMode(padapter); ++ ++ rtw_wdev->iftype = NL80211_IFTYPE_STATION; ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure) ==_FALSE) ++ { ++ rtw_wdev->iftype = old_type; ++ ret = -EPERM; ++ goto leave_ibss; ++ } ++ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_TRUE); ++ } ++ ++leave_ibss: ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _FALSE; ++ #endif ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_connect_params *sme) ++{ ++ int ret=0; ++ _irqL irqL; ++ _list *phead; ++ struct wlan_network *pnetwork = NULL; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ NDIS_802_11_SSID ndis_ssid; ++ u8 *dst_ssid, *src_ssid; ++ u8 *dst_bssid, *src_bssid; ++ //u8 matched_by_bssid=_FALSE; ++ //u8 matched_by_ssid=_FALSE; ++ u8 matched=_FALSE; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _TRUE; ++ #endif ++ ++ DBG_871X("=>"FUNC_NDEV_FMT" - Start to Connection\n", FUNC_NDEV_ARG(ndev)); ++ DBG_871X("privacy=%d, key=%p, key_len=%d, key_idx=%d, auth_type=%d\n", ++ sme->privacy, sme->key, sme->key_len, sme->key_idx, sme->auth_type); ++ ++ ++ if(adapter_wdev_data(padapter)->block == _TRUE) ++ { ++ ret = -EBUSY; ++ DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); ++ goto exit; ++ } ++ ++#ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT ++ printk("MStar Android!\n"); ++ if(adapter_wdev_data(padapter)->bandroid_scan == _FALSE) ++ { ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++#endif //CONFIG_P2P ++ { ++ ret = -EBUSY; ++ printk("Android hasn't attached yet!\n"); ++ goto exit; ++ } ++ } ++#endif ++ ++ rtw_ps_deny(padapter, PS_DENY_JOIN); ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); ++ ret = -EINVAL; ++ goto exit; ++ } ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ } ++#endif ++ ++ if (!sme->ssid || !sme->ssid_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (sme->ssid_len > IW_ESSID_MAX_SIZE){ ++ ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = sme->ssid_len; ++ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)sme->ssid, sme->ssid_len); ++ ++ DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, sme->ssid_len); ++ ++ ++ if (sme->bssid) ++ DBG_8192C("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); ++ ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ ret = -EBUSY; ++ DBG_8192C("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); ++ goto exit; ++ } ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter); ++ } ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ padapter->wapiInfo.bWapiEnable = false; ++#endif ++ ++ ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); ++ if (ret < 0) ++ goto exit; ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(sme->crypto.wpa_versions & NL80211_WAPI_VERSION_1) ++ { ++ padapter->wapiInfo.bWapiEnable = true; ++ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; ++ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; ++ } ++#endif ++ ++ ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_WAPI) ++ padapter->mlmeextpriv.mlmext_info.auth_algo = psecuritypriv->dot11AuthAlgrthm; ++#endif ++ ++ ++ if (ret < 0) ++ goto exit; ++ ++ DBG_8192C("%s, ie_len=%zu\n", __func__, sme->ie_len); ++ ++ ret = rtw_cfg80211_set_wpa_ie(padapter, (u8 *)sme->ie, sme->ie_len); ++ if (ret < 0) ++ goto exit; ++ ++ if (sme->crypto.n_ciphers_pairwise) { ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); ++ if (ret < 0) ++ goto exit; ++ } ++ ++ //For WEP Shared auth ++ if (sme->key_len > 0 && sme->key) ++ { ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); ++ ++ wep_key_idx = sme->key_idx; ++ wep_key_len = sme->key_len; ++ ++ if (sme->key_idx > WEP_KEYS) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ if(wep_key_len==13) ++ { ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ } ++ } ++ else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ pwep->KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); ++ ++ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ { ++ ret = -EOPNOTSUPP ; ++ } ++ ++ if (pwep) { ++ rtw_mfree((u8 *)pwep,wep_total_len); ++ } ++ ++ if(ret < 0) ++ goto exit; ++ } ++ ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); ++ if (ret < 0) ++ return ret; ++ ++ if (sme->crypto.n_akm_suites) { ++ ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); ++ if (ret < 0) ++ goto exit; ++ } ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_PSK){ ++ padapter->wapiInfo.bWapiPSK = true; ++ } ++ else if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_CERT){ ++ padapter->wapiInfo.bWapiPSK = false; ++ } ++#endif ++ ++ authmode = psecuritypriv->ndisauthtype; ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ ++ //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ ++ if (rtw_set_802_11_connect(padapter, (u8 *)sme->bssid, &ndis_ssid) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ ++ DBG_8192C("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); ++ ++exit: ++ ++ rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); ++ ++ DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _FALSE; ++ #endif ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, ++ u16 reason_code) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT" - Start to Disconnect\n", FUNC_NDEV_ARG(ndev)); ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _TRUE; ++ #endif ++ ++ rtw_set_to_roam(padapter, 0); ++ ++ //if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ rtw_scan_abort(padapter); ++ LeaveAllPowerSaveMode(padapter); ++ rtw_disassoc_cmd(padapter, 500, _FALSE); ++ ++ DBG_871X("%s...call rtw_indicate_disconnect\n", __FUNCTION__); ++ ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ rtw_pwr_wakeup(padapter); ++ } ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _FALSE; ++ #endif ++ ++ DBG_871X(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) ++ struct wireless_dev *wdev, ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE) ++ enum nl80211_tx_power_setting type, int mbm) ++#else ++ enum tx_power_setting type, int dbm) ++#endif ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ int ret; ++ ++ switch (type) { ++ case NL80211_TX_POWER_AUTOMATIC: ++ return 0; ++ case NL80211_TX_POWER_FIXED: ++ if (mbm < 0 || (mbm % 100)) ++ return -EOPNOTSUPP; ++ ++ if (!test_bit(IWM_STATUS_READY, &iwm->status)) ++ return 0; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_TX_PWR_LIMIT_USR, ++ MBM_TO_DBM(mbm) * 2); ++ if (ret < 0) ++ return ret; ++ ++ return iwm_tx_power_trigger(iwm); ++ default: ++ IWM_ERR(iwm, "Unsupported power type: %d\n", type); ++ return -EOPNOTSUPP; ++ } ++#endif ++ DBG_8192C("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) ++ struct wireless_dev *wdev, ++#endif ++ int *dbm) ++{ ++ DBG_8192C("%s\n", __func__); ++ ++ *dbm = (12); ++ ++ return 0; ++} ++ ++inline bool rtw_cfg80211_pwr_mgmt(_adapter *adapter) ++{ ++ struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(adapter); ++ return rtw_wdev_priv->power_mgmt; ++} ++ ++static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, ++ struct net_device *ndev, ++ bool enabled, int timeout) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(padapter); ++ ++ DBG_871X(FUNC_NDEV_FMT" enabled:%u, timeout:%d\n", FUNC_NDEV_ARG(ndev), ++ enabled, timeout); ++ ++ rtw_wdev_priv->power_mgmt = enabled; ++ ++ #ifdef CONFIG_LPS ++ if (!enabled) ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE_CFG80211_PWRMGMT, 1); ++ #endif ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, ++ struct net_device *ndev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ u8 index,blInserted = _FALSE; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *mlme = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; ++ ++ DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) ++ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); ++ ++ if ( _rtw_memcmp((u8 *)pmksa->bssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) ++ { ++ return -EINVAL; ++ } ++ ++ if (check_fwstate(mlme, _FW_LINKED) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" not set pmksa cause not in linked state\n", FUNC_NDEV_ARG(ndev)); ++ return -EINVAL; ++ } ++ ++ blInserted = _FALSE; ++ ++ //overwrite PMKID ++ for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => rewrite with new PMKID. ++ DBG_871X(FUNC_NDEV_FMT" BSSID exists in the PMKList.\n", FUNC_NDEV_ARG(ndev)); ++ ++ _rtw_memcpy( psecuritypriv->PMKIDList[index].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); ++ psecuritypriv->PMKIDList[index].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex = index+1; ++ blInserted = _TRUE; ++ break; ++ } ++ } ++ ++ if(!blInserted) ++ { ++ // Find a new entry ++ DBG_871X(FUNC_NDEV_FMT" Use the new entry index = %d for this PMKID.\n", ++ FUNC_NDEV_ARG(ndev), psecuritypriv->PMKIDIndex ); ++ ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, (u8 *)pmksa->bssid, ETH_ALEN); ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); ++ ++ psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex++ ; ++ if(psecuritypriv->PMKIDIndex==16) ++ { ++ psecuritypriv->PMKIDIndex =0; ++ } ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, ++ struct net_device *ndev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ u8 index, bMatched = _FALSE; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) ++ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); ++ ++ for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => Remove this PMKID information and reset it. ++ _rtw_memset(psecuritypriv->PMKIDList[index].Bssid, 0x00, ETH_ALEN ); ++ _rtw_memset(psecuritypriv->PMKIDList[index].PMKID, 0x00, WLAN_PMKID_LEN ); ++ psecuritypriv->PMKIDList[index].bUsed = _FALSE; ++ bMatched = _TRUE; ++ DBG_871X(FUNC_NDEV_FMT" clear id:%hhu\n", FUNC_NDEV_ARG(ndev), index); ++ break; ++ } ++ } ++ ++ if(_FALSE == bMatched) ++ { ++ DBG_871X(FUNC_NDEV_FMT" do not have matched BSSID\n" ++ , FUNC_NDEV_ARG(ndev)); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, ++ struct net_device *ndev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ psecuritypriv->PMKIDIndex = 0; ++ ++ return 0; ++} ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct net_device *ndev = padapter->pnetdev; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) ++ { ++ struct station_info sinfo; ++ u8 ie_offset; ++ if (GetFrameSubType(pmgmt_frame) == WIFI_ASSOCREQ) ++ ie_offset = _ASOCREQ_IE_OFFSET_; ++ else // WIFI_REASSOCREQ ++ ie_offset = _REASOCREQ_IE_OFFSET_; ++ ++ sinfo.filled = 0; +// cf commit 319090bf6c75e3ad42a8c -+// sinfo.filled = STATION_INFO_ASSOC_REQ_IES; -+ sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; -+ sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; -+ cfg80211_new_sta(ndev, GetAddr2Ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); -+ } -+#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+ channel = pmlmeext->cur_channel; -+ freq = rtw_ch2freq(channel); -+ -+ #ifdef COMPAT_KERNEL_RELEASE -+ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); -+ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); -+ #else //COMPAT_KERNEL_RELEASE -+ { -+ //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() -+ #ifndef CONFIG_PLATFORM_MSTAR -+ pwdev->iftype = NL80211_IFTYPE_STATION; -+ #endif //CONFIG_PLATFORM_MSTAR -+ DBG_8192C("iftype=%d before call cfg80211_send_rx_assoc()\n", pwdev->iftype); -+ rtw_cfg80211_send_rx_assoc(padapter, NULL, pmgmt_frame, frame_len); -+ DBG_8192C("iftype=%d after call cfg80211_send_rx_assoc()\n", pwdev->iftype); -+ pwdev->iftype = NL80211_IFTYPE_AP; -+ //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -+ } -+ #endif //COMPAT_KERNEL_RELEASE -+#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+ -+} -+ -+void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) -+{ -+ s32 freq; -+ int channel; -+ u8 *pmgmt_frame; -+ uint frame_len; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ u8 mgmt_buf[128] = {0}; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct net_device *ndev = padapter->pnetdev; -+ -+ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) -+ cfg80211_del_sta(ndev, da, GFP_ATOMIC); -+#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+ channel = pmlmeext->cur_channel; -+ freq = rtw_ch2freq(channel); -+ -+ pmgmt_frame = mgmt_buf; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); -+ -+ pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); -+ frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ reason = cpu_to_le16(reason); -+ pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); -+ -+ #ifdef COMPAT_KERNEL_RELEASE -+ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); -+ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); -+ #else //COMPAT_KERNEL_RELEASE -+ cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); -+ //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); -+ #endif //COMPAT_KERNEL_RELEASE -+#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+} -+ -+static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) -+{ -+ int ret = 0; -+ -+ DBG_8192C("%s\n", __func__); -+ -+ return ret; -+} -+ -+static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) -+{ -+ int ret = 0; -+ -+ DBG_8192C("%s\n", __func__); -+ -+ return ret; -+} -+ -+static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) -+{ -+ int ret = 0; -+ int rtap_len; -+ int qos_len = 0; -+ int dot11_hdr_len = 24; -+ int snap_len = 6; -+ unsigned char *pdata; -+ u16 frame_ctl; -+ unsigned char src_mac_addr[6]; -+ unsigned char dst_mac_addr[6]; -+ struct rtw_ieee80211_hdr *dot11_hdr; -+ struct ieee80211_radiotap_header *rtap_hdr; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ if (skb) -+ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); -+ -+ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) -+ goto fail; -+ -+ rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; -+ if (unlikely(rtap_hdr->it_version)) -+ goto fail; -+ -+ rtap_len = ieee80211_get_radiotap_len(skb->data); -+ if (unlikely(skb->len < rtap_len)) -+ goto fail; -+ -+ if(rtap_len != 14) -+ { -+ DBG_8192C("radiotap len (should be 14): %d\n", rtap_len); -+ goto fail; -+ } -+ -+ /* Skip the ratio tap header */ -+ skb_pull(skb, rtap_len); -+ -+ dot11_hdr = (struct rtw_ieee80211_hdr *)skb->data; -+ frame_ctl = le16_to_cpu(dot11_hdr->frame_ctl); -+ /* Check if the QoS bit is set */ -+ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { -+ /* Check if this ia a Wireless Distribution System (WDS) frame -+ * which has 4 MAC addresses -+ */ -+ if (dot11_hdr->frame_ctl & 0x0080) -+ qos_len = 2; -+ if ((dot11_hdr->frame_ctl & 0x0300) == 0x0300) -+ dot11_hdr_len += 6; -+ -+ memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); -+ memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); -+ -+ /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for -+ * for two MAC addresses -+ */ -+ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); -+ pdata = (unsigned char*)skb->data; -+ memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); -+ memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); -+ -+ DBG_8192C("should be eapol packet\n"); -+ -+ /* Use the real net device to transmit the packet */ -+ ret = _rtw_xmit_entry(skb, padapter->pnetdev); -+ -+ return ret; -+ -+ } -+ else if ((frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) -+ == (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) -+ ) -+ { -+ //only for action frames -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ //u8 category, action, OUI_Subtype, dialogToken=0; -+ //unsigned char *frame_body; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ u8 *buf = skb->data; -+ u32 len = skb->len; -+ u8 category, action; -+ int type = -1; -+ -+ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { -+ DBG_8192C(FUNC_NDEV_FMT" frame_control:0x%x\n", FUNC_NDEV_ARG(ndev), -+ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); -+ goto fail; -+ } -+ -+ DBG_8192C("RTW_Tx:da="MAC_FMT" via "FUNC_NDEV_FMT"\n", -+ MAC_ARG(GetAddr1Ptr(buf)), FUNC_NDEV_ARG(ndev)); -+ #ifdef CONFIG_P2P -+ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) -+ goto dump; -+ #endif -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) -+ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); -+ else -+ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); -+ -+dump: -+ //starting alloc mgmt frame to dump it -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ { -+ goto fail; -+ } -+ -+ //update attribute -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->retry_ctrl = _FALSE; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ _rtw_memcpy(pframe, (void*)buf, len); -+ pattrib->pktlen = len; -+ -+#ifdef CONFIG_P2P -+ if (type >= 0) -+ rtw_xframe_chk_wfd_ie(pmgntframe); -+#endif /* CONFIG_P2P */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ //update seq number -+ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); -+ pattrib->seqnum = pmlmeext->mgnt_seq; -+ pmlmeext->mgnt_seq++; -+ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ } -+ else -+ { -+ DBG_8192C("frame_ctl=0x%x\n", frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)); -+ } -+ -+ -+fail: -+ -+ rtw_skb_free(skb); -+ -+ return 0; -+ -+} -+ -+static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) -+{ -+ DBG_8192C("%s\n", __func__); -+} -+ -+static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) -+{ -+ int ret = 0; -+ -+ DBG_8192C("%s\n", __func__); -+ -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) -+static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { -+ .ndo_open = rtw_cfg80211_monitor_if_open, -+ .ndo_stop = rtw_cfg80211_monitor_if_close, -+ .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) -+ .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, -+ #endif -+ .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, -+}; -+#endif -+ -+static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) -+{ -+ int ret = 0; -+ struct net_device* mon_ndev = NULL; -+ struct wireless_dev* mon_wdev = NULL; -+ struct rtw_netdev_priv_indicator *pnpi; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ -+ if (!name) { -+ DBG_871X(FUNC_ADPT_FMT" without specific name\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ if (pwdev_priv->pmon_ndev) { -+ DBG_871X(FUNC_ADPT_FMT" monitor interface exist: "NDEV_FMT"\n", -+ FUNC_ADPT_ARG(padapter), NDEV_ARG(pwdev_priv->pmon_ndev)); -+ ret = -EBUSY; -+ goto out; -+ } -+ -+ mon_ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); -+ if (!mon_ndev) { -+ DBG_871X(FUNC_ADPT_FMT" allocate ndev fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; -+ strncpy(mon_ndev->name, name, IFNAMSIZ); -+ mon_ndev->name[IFNAMSIZ - 1] = 0; -+ mon_ndev->destructor = rtw_ndev_destructor; -+ -+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) -+ mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; -+#else -+ mon_ndev->open = rtw_cfg80211_monitor_if_open; -+ mon_ndev->stop = rtw_cfg80211_monitor_if_close; -+ mon_ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; -+ mon_ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; -+#endif -+ -+ pnpi = netdev_priv(mon_ndev); -+ pnpi->priv = padapter; -+ pnpi->sizeof_priv = sizeof(_adapter); -+ -+ /* wdev */ -+ mon_wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); -+ if (!mon_wdev) { -+ DBG_871X(FUNC_ADPT_FMT" allocate mon_wdev fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ mon_wdev->wiphy = padapter->rtw_wdev->wiphy; -+ mon_wdev->netdev = mon_ndev; -+ mon_wdev->iftype = NL80211_IFTYPE_MONITOR; -+ mon_ndev->ieee80211_ptr = mon_wdev; -+ -+ ret = register_netdevice(mon_ndev); -+ if (ret) { -+ goto out; -+ } -+ -+ *ndev = pwdev_priv->pmon_ndev = mon_ndev; -+ _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); -+ -+out: -+ if (ret && mon_wdev) { -+ rtw_mfree((u8*)mon_wdev, sizeof(struct wireless_dev)); -+ mon_wdev = NULL; -+ } -+ -+ if (ret && mon_ndev) { -+ free_netdev(mon_ndev); -+ *ndev = mon_ndev = NULL; -+ } -+ -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+static struct wireless_dev * -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) -+static struct net_device * -+#else -+static int -+#endif -+ cfg80211_rtw_add_virtual_intf( -+ struct wiphy *wiphy, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)) -+ const char *name, -+ #else -+ char *name, -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ unsigned char name_assign_type, -+ #endif -+ enum nl80211_iftype type, u32 *flags, struct vif_params *params) -+{ -+ int ret = 0; -+ struct net_device* ndev = NULL; -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+ -+ DBG_871X("%s wiphy:%s, name:%s, type:%d\n", -+ __func__, wiphy_name(wiphy), name, type); -+ -+ switch (type) { -+ case NL80211_IFTYPE_ADHOC: -+ case NL80211_IFTYPE_AP_VLAN: -+ case NL80211_IFTYPE_WDS: -+ case NL80211_IFTYPE_MESH_POINT: -+ ret = -ENODEV; -+ break; -+ case NL80211_IFTYPE_MONITOR: -+ ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); -+ break; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ case NL80211_IFTYPE_P2P_CLIENT: -+#endif -+ case NL80211_IFTYPE_STATION: -+ ret = -ENODEV; -+ break; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ case NL80211_IFTYPE_P2P_GO: -+#endif -+ case NL80211_IFTYPE_AP: -+ ret = -ENODEV; -+ break; -+ default: -+ ret = -ENODEV; -+ DBG_871X("Unsupported interface type\n"); -+ break; -+ } -+ -+ DBG_871X("%s ndev:%p, ret:%d\n", __func__, ndev, ret); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ return ndev ? ndev->ieee80211_ptr : ERR_PTR(ret); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) -+ return ndev ? ndev : ERR_PTR(ret); -+#else -+ return ret; -+#endif -+} -+ -+static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct wireless_dev *wdev -+#else -+ struct net_device *ndev -+#endif -+) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+ int ret = 0; -+ _adapter *adapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ if (!ndev) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ adapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(adapter); -+ -+ unregister_netdevice(ndev); -+ -+ if (ndev == pwdev_priv->pmon_ndev) { -+ pwdev_priv->pmon_ndev = NULL; -+ pwdev_priv->ifname_mon[0] = '\0'; -+ DBG_871X(FUNC_NDEV_FMT" remove monitor interface\n", FUNC_NDEV_ARG(ndev)); -+ } -+ -+exit: -+ return ret; -+} -+ -+static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) -+{ -+ int ret=0; -+ u8 *pbuf = NULL; -+ uint len, wps_ielen=0; -+ uint p2p_ielen=0; -+ u8 *p2p_ie; -+ u8 got_p2p_ie = _FALSE; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ //struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ -+ DBG_8192C("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); -+ -+ -+ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ if(head_len<24) -+ return -EINVAL; -+ -+ -+ pbuf = rtw_zmalloc(head_len+tail_len); -+ if(!pbuf) -+ return -ENOMEM; -+ -+ -+ //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); -+ -+ //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) -+ // pstapriv->max_num_sta = NUM_STA; -+ -+ -+ _rtw_memcpy(pbuf, (void *)head+24, head_len-24);// 24=beacon header len. -+ _rtw_memcpy(pbuf+head_len-24, (void *)tail, tail_len); -+ -+ len = head_len+tail_len-24; -+ -+ //check wps ie if inclued -+ if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) -+ DBG_8192C("add bcn, wps_ielen=%d\n", wps_ielen); -+ -+#ifdef CONFIG_P2P -+ if( adapter->wdinfo.driver_interface == DRIVER_CFG80211 ) -+ { -+ //check p2p if enable -+ if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) -+ { -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); -+ -+ DBG_8192C("got p2p_ie, len=%d\n", p2p_ielen); -+ -+ got_p2p_ie = _TRUE; -+ -+ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ { -+ DBG_8192C("Enable P2P function for the first time\n"); -+ rtw_p2p_enable(adapter, P2P_ROLE_GO); -+ adapter_wdev_data(adapter)->p2p_enabled = _TRUE; -+ -+ adapter->stapriv.expire_to = 3; // 3x2 = 6 sec in p2p mode -+ } -+ else -+ { -+ DBG_8192C("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); -+ -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ pwdinfo->intent = 15; -+ } -+ } -+ } -+#endif // CONFIG_P2P -+ -+ /* pbss_network->IEs will not include p2p_ie, wfd ie */ -+ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, P2P_OUI, 4); -+ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, WFD_OUI, 4); -+ -+ if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) -+ { -+#ifdef CONFIG_P2P -+ //check p2p if enable -+ if(got_p2p_ie == _TRUE) -+ { -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); -+ pwdinfo->operating_channel = pmlmeext->cur_channel; -+ } -+#endif //CONFIG_P2P -+ ret = 0; -+ } -+ else -+ { -+ ret = -EINVAL; -+ } -+ -+ -+ rtw_mfree(pbuf, head_len+tail_len); -+ -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) -+static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, -+ struct beacon_parameters *info) -+{ -+ int ret=0; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *ndev, -+ struct beacon_parameters *info) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ pmlmeext->bstart_bss = _TRUE; -+ -+ cfg80211_rtw_add_beacon(wiphy, ndev, info); -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *ndev) -+{ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return 0; -+} -+#else -+static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_ap_settings *settings) -+{ -+ int ret = 0; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ DBG_871X(FUNC_NDEV_FMT" hidden_ssid:%d, auth_type:%d\n", FUNC_NDEV_ARG(ndev), -+ settings->hidden_ssid, settings->auth_type); -+ -+ ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, -+ settings->beacon.tail, settings->beacon.tail_len); -+ -+ adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; -+ -+ if (settings->ssid && settings->ssid_len) { -+ WLAN_BSSID_EX *pbss_network = &adapter->mlmepriv.cur_network.network; -+ WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; -+ -+ if(0) -+ DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%zu), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), -+ settings->ssid, settings->ssid_len, -+ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); -+ -+ _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); -+ pbss_network->Ssid.SsidLength = settings->ssid_len; -+ _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); -+ pbss_network_ext->Ssid.SsidLength = settings->ssid_len; -+ -+ if(0) -+ DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), -+ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, -+ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); -+ } -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_beacon_data *info) -+{ -+ int ret = 0; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) -+{ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ return 0; -+} -+ -+#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) -+ -+static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) -+ u8 *mac, -+#else -+ const u8 *mac, -+#endif -+ struct station_parameters *params) -+{ -+ int ret = 0; -+#ifdef CONFIG_TDLS -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+#endif /* CONFIG_TDLS */ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+#ifdef CONFIG_TDLS -+ psta = rtw_get_stainfo(pstapriv, mac); -+ if (psta == NULL) { -+ psta = rtw_alloc_stainfo(pstapriv, mac); -+ if (psta ==NULL) { -+ DBG_871X("[%s] Alloc station for "MAC_FMT" fail\n", __FUNCTION__, MAC_ARG(mac)); -+ ret =-EOPNOTSUPP; -+ goto exit; -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) -+ u8 *mac -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) -+ const u8 *mac -+#else -+ struct station_del_parameters *params -+#endif -+ ) -+{ -+ int ret=0; -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 updated = _FALSE; -+ const u8 *target_mac; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ DBG_871X("+"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) -+ target_mac = mac; -+#else -+ target_mac = params->mac; -+#endif -+ -+ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) -+ { -+ DBG_8192C("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); -+ return -EINVAL; -+ } -+ -+ -+ if (!target_mac) -+ { -+ DBG_8192C("flush all sta, and cam_entry\n"); -+ -+ flush_all_cam_entry(padapter); //clear CAM -+ -+ ret = rtw_sta_flush(padapter, _TRUE); -+ -+ return ret; -+ } -+ -+ -+ DBG_8192C("free sta macaddr =" MAC_FMT "\n", MAC_ARG(target_mac)); -+ -+ if (target_mac[0] == 0xff && target_mac[1] == 0xff && -+ target_mac[2] == 0xff && target_mac[3] == 0xff && -+ target_mac[4] == 0xff && target_mac[5] == 0xff) -+ { -+ return -EINVAL; -+ } -+ -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ //check asoc_queue -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ -+ plist = get_next(plist); -+ -+ if (_rtw_memcmp((u8 *)target_mac, psta->hwaddr, ETH_ALEN)) -+ { -+ if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) -+ { -+ DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); -+ } -+ else -+ { -+ DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); -+ -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ -+ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (check_fwstate(pmlmepriv, (WIFI_AP_STATE)) == _TRUE) -+ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); -+ else -+ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); -+ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ psta = NULL; -+ -+ break; -+ } -+ -+ } -+ -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+ -+ DBG_871X("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return ret; -+ -+} -+ -+static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) -+ u8 *mac, -+#else -+ const u8 *mac, -+#endif -+ struct station_parameters *params) -+{ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return 0; -+} -+ -+struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapriv) -+ -+{ -+ -+ _list *phead, *plist; -+ struct sta_info *psta = NULL; -+ int i = 0; -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ //check asoc_queue -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) -+ { -+ if(idx == i) psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ i++; -+ } -+ return psta; -+} -+ -+static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, -+ int idx, u8 *mac, struct station_info *sinfo) -+{ -+ -+ int ret = 0; -+ _irqL irqL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ psta = rtw_sta_info_get_by_idx(idx, pstapriv); -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if(NULL == psta) -+ { -+ DBG_871X("Station is not found\n"); -+ ret = -ENOENT; -+ goto exit; -+ } -+ _rtw_memcpy(mac, psta->hwaddr, ETH_ALEN); -+ sinfo->filled = 0; ++// sinfo.filled = STATION_INFO_ASSOC_REQ_IES; ++ sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; ++ sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; ++ cfg80211_new_sta(ndev, GetAddr2Ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); ++ } ++#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ channel = pmlmeext->cur_channel; ++ freq = rtw_ch2freq(channel); ++ ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++ #else //COMPAT_KERNEL_RELEASE ++ { ++ //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() ++ #ifndef CONFIG_PLATFORM_MSTAR ++ pwdev->iftype = NL80211_IFTYPE_STATION; ++ #endif //CONFIG_PLATFORM_MSTAR ++ DBG_8192C("iftype=%d before call cfg80211_send_rx_assoc()\n", pwdev->iftype); ++ rtw_cfg80211_send_rx_assoc(padapter, NULL, pmgmt_frame, frame_len); ++ DBG_8192C("iftype=%d after call cfg80211_send_rx_assoc()\n", pwdev->iftype); ++ pwdev->iftype = NL80211_IFTYPE_AP; ++ //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++ } ++ #endif //COMPAT_KERNEL_RELEASE ++#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ ++} ++ ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) ++{ ++ s32 freq; ++ int channel; ++ u8 *pmgmt_frame; ++ uint frame_len; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 mgmt_buf[128] = {0}; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct net_device *ndev = padapter->pnetdev; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) ++ cfg80211_del_sta(ndev, da, GFP_ATOMIC); ++#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ channel = pmlmeext->cur_channel; ++ freq = rtw_ch2freq(channel); ++ ++ pmgmt_frame = mgmt_buf; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); ++ ++ pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); ++ frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ reason = cpu_to_le16(reason); ++ pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); ++ ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); ++ #else //COMPAT_KERNEL_RELEASE ++ cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); ++ //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); ++ #endif //COMPAT_KERNEL_RELEASE ++#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++} ++ ++static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) ++{ ++ int ret = 0; ++ int rtap_len; ++ int qos_len = 0; ++ int dot11_hdr_len = 24; ++ int snap_len = 6; ++ unsigned char *pdata; ++ u16 frame_ctl; ++ unsigned char src_mac_addr[6]; ++ unsigned char dst_mac_addr[6]; ++ struct rtw_ieee80211_hdr *dot11_hdr; ++ struct ieee80211_radiotap_header *rtap_hdr; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ if (skb) ++ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); ++ ++ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) ++ goto fail; ++ ++ rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; ++ if (unlikely(rtap_hdr->it_version)) ++ goto fail; ++ ++ rtap_len = ieee80211_get_radiotap_len(skb->data); ++ if (unlikely(skb->len < rtap_len)) ++ goto fail; ++ ++ if(rtap_len != 14) ++ { ++ DBG_8192C("radiotap len (should be 14): %d\n", rtap_len); ++ goto fail; ++ } ++ ++ /* Skip the ratio tap header */ ++ skb_pull(skb, rtap_len); ++ ++ dot11_hdr = (struct rtw_ieee80211_hdr *)skb->data; ++ frame_ctl = le16_to_cpu(dot11_hdr->frame_ctl); ++ /* Check if the QoS bit is set */ ++ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { ++ /* Check if this ia a Wireless Distribution System (WDS) frame ++ * which has 4 MAC addresses ++ */ ++ if (dot11_hdr->frame_ctl & 0x0080) ++ qos_len = 2; ++ if ((dot11_hdr->frame_ctl & 0x0300) == 0x0300) ++ dot11_hdr_len += 6; ++ ++ memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); ++ memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); ++ ++ /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for ++ * for two MAC addresses ++ */ ++ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); ++ pdata = (unsigned char*)skb->data; ++ memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); ++ memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); ++ ++ DBG_8192C("should be eapol packet\n"); ++ ++ /* Use the real net device to transmit the packet */ ++ ret = _rtw_xmit_entry(skb, padapter->pnetdev); ++ ++ return ret; ++ ++ } ++ else if ((frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) ++ == (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) ++ ) ++ { ++ //only for action frames ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ //u8 category, action, OUI_Subtype, dialogToken=0; ++ //unsigned char *frame_body; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 *buf = skb->data; ++ u32 len = skb->len; ++ u8 category, action; ++ int type = -1; ++ ++ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { ++ DBG_8192C(FUNC_NDEV_FMT" frame_control:0x%x\n", FUNC_NDEV_ARG(ndev), ++ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); ++ goto fail; ++ } ++ ++ DBG_8192C("RTW_Tx:da="MAC_FMT" via "FUNC_NDEV_FMT"\n", ++ MAC_ARG(GetAddr1Ptr(buf)), FUNC_NDEV_ARG(ndev)); ++ #ifdef CONFIG_P2P ++ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) ++ goto dump; ++ #endif ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) ++ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); ++ else ++ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); ++ ++dump: ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto fail; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ pattrib->pktlen = len; ++ ++#ifdef CONFIG_P2P ++ if (type >= 0) ++ rtw_xframe_chk_wfd_ie(pmgntframe); ++#endif /* CONFIG_P2P */ ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ } ++ else ++ { ++ DBG_8192C("frame_ctl=0x%x\n", frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)); ++ } ++ ++ ++fail: ++ ++ rtw_skb_free(skb); ++ ++ return 0; ++ ++} ++ ++static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) ++{ ++ DBG_8192C("%s\n", __func__); ++} ++ ++static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { ++ .ndo_open = rtw_cfg80211_monitor_if_open, ++ .ndo_stop = rtw_cfg80211_monitor_if_close, ++ .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) ++ .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, ++ #endif ++ .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, ++}; ++#endif ++ ++static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) ++{ ++ int ret = 0; ++ struct net_device* mon_ndev = NULL; ++ struct wireless_dev* mon_wdev = NULL; ++ struct rtw_netdev_priv_indicator *pnpi; ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); ++ ++ if (!name) { ++ DBG_871X(FUNC_ADPT_FMT" without specific name\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ if (pwdev_priv->pmon_ndev) { ++ DBG_871X(FUNC_ADPT_FMT" monitor interface exist: "NDEV_FMT"\n", ++ FUNC_ADPT_ARG(padapter), NDEV_ARG(pwdev_priv->pmon_ndev)); ++ ret = -EBUSY; ++ goto out; ++ } ++ ++ mon_ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++ if (!mon_ndev) { ++ DBG_871X(FUNC_ADPT_FMT" allocate ndev fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; ++ strncpy(mon_ndev->name, name, IFNAMSIZ); ++ mon_ndev->name[IFNAMSIZ - 1] = 0; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 9)) ++ mon_ndev->priv_destructor = rtw_ndev_destructor; ++ mon_ndev->needs_free_netdev = true; ++#else ++ mon_ndev->destructor = rtw_ndev_destructor; ++#endif ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; ++#else ++ mon_ndev->open = rtw_cfg80211_monitor_if_open; ++ mon_ndev->stop = rtw_cfg80211_monitor_if_close; ++ mon_ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; ++ mon_ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; ++#endif ++ ++ pnpi = netdev_priv(mon_ndev); ++ pnpi->priv = padapter; ++ pnpi->sizeof_priv = sizeof(_adapter); ++ ++ /* wdev */ ++ mon_wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); ++ if (!mon_wdev) { ++ DBG_871X(FUNC_ADPT_FMT" allocate mon_wdev fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ mon_wdev->wiphy = padapter->rtw_wdev->wiphy; ++ mon_wdev->netdev = mon_ndev; ++ mon_wdev->iftype = NL80211_IFTYPE_MONITOR; ++ mon_ndev->ieee80211_ptr = mon_wdev; ++ ++ ret = register_netdevice(mon_ndev); ++ if (ret) { ++ goto out; ++ } ++ ++ *ndev = pwdev_priv->pmon_ndev = mon_ndev; ++ _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); ++ ++out: ++ if (ret && mon_wdev) { ++ rtw_mfree((u8*)mon_wdev, sizeof(struct wireless_dev)); ++ mon_wdev = NULL; ++ } ++ ++ if (ret && mon_ndev) { ++ free_netdev(mon_ndev); ++ *ndev = mon_ndev = NULL; ++ } ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++static struct wireless_dev * ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++static struct net_device * ++#else ++static int ++#endif ++ cfg80211_rtw_add_virtual_intf( ++ struct wiphy *wiphy, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)) ++ const char *name, ++ #else ++ char *name, ++ #endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) ++ unsigned char name_assign_type, ++ #endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)) ++ enum nl80211_iftype type, struct vif_params *params) ++ #else ++ enum nl80211_iftype type, u32 *flags, struct vif_params *params) ++ #endif ++ ++{ ++ int ret = 0; ++ struct net_device* ndev = NULL; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ DBG_871X("%s wiphy:%s, name:%s, type:%d\n", ++ __func__, wiphy_name(wiphy), name, type); ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_AP_VLAN: ++ case NL80211_IFTYPE_WDS: ++ case NL80211_IFTYPE_MESH_POINT: ++ ret = -ENODEV; ++ break; ++ case NL80211_IFTYPE_MONITOR: ++ ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ case NL80211_IFTYPE_P2P_CLIENT: ++#endif ++ case NL80211_IFTYPE_STATION: ++ ret = -ENODEV; ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ case NL80211_IFTYPE_P2P_GO: ++#endif ++ case NL80211_IFTYPE_AP: ++ ret = -ENODEV; ++ break; ++ default: ++ ret = -ENODEV; ++ DBG_871X("Unsupported interface type\n"); ++ break; ++ } ++ ++ DBG_871X("%s ndev:%p, ret:%d\n", __func__, ndev, ret); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ return ndev ? ndev->ieee80211_ptr : ERR_PTR(ret); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ return ndev ? ndev : ERR_PTR(ret); ++#else ++ return ret; ++#endif ++} ++ ++static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev ++#else ++ struct net_device *ndev ++#endif ++) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ int ret = 0; ++ _adapter *adapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ if (!ndev) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ adapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(adapter); ++ ++ unregister_netdevice(ndev); ++ ++ if (ndev == pwdev_priv->pmon_ndev) { ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ DBG_871X(FUNC_NDEV_FMT" remove monitor interface\n", FUNC_NDEV_ARG(ndev)); ++ } ++ ++exit: ++ return ret; ++} ++ ++static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) ++{ ++ int ret=0; ++ u8 *pbuf = NULL; ++ uint len, wps_ielen=0; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ u8 got_p2p_ie = _FALSE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++ DBG_8192C("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ if(head_len<24) ++ return -EINVAL; ++ ++ ++ pbuf = rtw_zmalloc(head_len+tail_len); ++ if(!pbuf) ++ return -ENOMEM; ++ ++ ++ //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); ++ ++ //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) ++ // pstapriv->max_num_sta = NUM_STA; ++ ++ ++ _rtw_memcpy(pbuf, (void *)head+24, head_len-24);// 24=beacon header len. ++ _rtw_memcpy(pbuf+head_len-24, (void *)tail, tail_len); ++ ++ len = head_len+tail_len-24; ++ ++ //check wps ie if inclued ++ if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) ++ DBG_8192C("add bcn, wps_ielen=%d\n", wps_ielen); ++ ++#ifdef CONFIG_P2P ++ if( adapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ { ++ //check p2p if enable ++ if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); ++ ++ DBG_8192C("got p2p_ie, len=%d\n", p2p_ielen); ++ ++ got_p2p_ie = _TRUE; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_8192C("Enable P2P function for the first time\n"); ++ rtw_p2p_enable(adapter, P2P_ROLE_GO); ++ adapter_wdev_data(adapter)->p2p_enabled = _TRUE; ++ ++ adapter->stapriv.expire_to = 3; // 3x2 = 6 sec in p2p mode ++ } ++ else ++ { ++ DBG_8192C("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); ++ ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 15; ++ } ++ } ++ } ++#endif // CONFIG_P2P ++ ++ /* pbss_network->IEs will not include p2p_ie, wfd ie */ ++ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, P2P_OUI, 4); ++ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, WFD_OUI, 4); ++ ++ if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) ++ { ++#ifdef CONFIG_P2P ++ //check p2p if enable ++ if(got_p2p_ie == _TRUE) ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); ++ pwdinfo->operating_channel = pmlmeext->cur_channel; ++ } ++#endif //CONFIG_P2P ++ ret = 0; ++ } ++ else ++ { ++ ret = -EINVAL; ++ } ++ ++ ++ rtw_mfree(pbuf, head_len+tail_len); ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct beacon_parameters *info) ++{ ++ int ret=0; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct beacon_parameters *info) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ cfg80211_rtw_add_beacon(wiphy, ndev, info); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++#else ++static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_ap_settings *settings) ++{ ++ int ret = 0; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT" hidden_ssid:%d, auth_type:%d\n", FUNC_NDEV_ARG(ndev), ++ settings->hidden_ssid, settings->auth_type); ++ ++ ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, ++ settings->beacon.tail, settings->beacon.tail_len); ++ ++ adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; ++ ++ if (settings->ssid && settings->ssid_len) { ++ WLAN_BSSID_EX *pbss_network = &adapter->mlmepriv.cur_network.network; ++ WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%zu), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ settings->ssid, settings->ssid_len, ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); ++ ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); ++ pbss_network->Ssid.SsidLength = settings->ssid_len; ++ _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); ++ pbss_network_ext->Ssid.SsidLength = settings->ssid_len; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, ++ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); ++ } ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_beacon_data *info) ++{ ++ int ret = 0; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) ++ ++static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac, ++#else ++ const u8 *mac, ++#endif ++ struct station_parameters *params) ++{ ++ int ret = 0; ++#ifdef CONFIG_TDLS ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++#endif /* CONFIG_TDLS */ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++#ifdef CONFIG_TDLS ++ psta = rtw_get_stainfo(pstapriv, mac); ++ if (psta == NULL) { ++ psta = rtw_alloc_stainfo(pstapriv, mac); ++ if (psta ==NULL) { ++ DBG_871X("[%s] Alloc station for "MAC_FMT" fail\n", __FUNCTION__, MAC_ARG(mac)); ++ ret =-EOPNOTSUPP; ++ goto exit; ++ } ++ } ++#endif /* CONFIG_TDLS */ ++ ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) ++ const u8 *mac ++#else ++ struct station_del_parameters *params ++#endif ++ ) ++{ ++ int ret=0; ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 updated = _FALSE; ++ const u8 *target_mac; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("+"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) ++ target_mac = mac; ++#else ++ target_mac = params->mac; ++#endif ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ DBG_8192C("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); ++ return -EINVAL; ++ } ++ ++ ++ if (!target_mac) ++ { ++ DBG_8192C("flush all sta, and cam_entry\n"); ++ ++ flush_all_cam_entry(padapter); //clear CAM ++ ++ ret = rtw_sta_flush(padapter, _TRUE); ++ ++ return ret; ++ } ++ ++ ++ DBG_8192C("free sta macaddr =" MAC_FMT "\n", MAC_ARG(target_mac)); ++ ++ if (target_mac[0] == 0xff && target_mac[1] == 0xff && ++ target_mac[2] == 0xff && target_mac[3] == 0xff && ++ target_mac[4] == 0xff && target_mac[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ if (_rtw_memcmp((u8 *)target_mac, psta->hwaddr, ETH_ALEN)) ++ { ++ if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) ++ { ++ DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); ++ } ++ else ++ { ++ DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); ++ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (check_fwstate(pmlmepriv, (WIFI_AP_STATE)) == _TRUE) ++ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); ++ else ++ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ break; ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); ++ ++ DBG_871X("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac, ++#else ++ const u8 *mac, ++#endif ++ struct station_parameters *params) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++ ++struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapriv) ++ ++{ ++ ++ _list *phead, *plist; ++ struct sta_info *psta = NULL; ++ int i = 0; ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ if(idx == i) psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ i++; ++ } ++ return psta; ++} ++ ++static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, ++ int idx, u8 *mac, struct station_info *sinfo) ++{ ++ ++ int ret = 0; ++ _irqL irqL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ psta = rtw_sta_info_get_by_idx(idx, pstapriv); ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(NULL == psta) ++ { ++ DBG_871X("Station is not found\n"); ++ ret = -ENOENT; ++ goto exit; ++ } ++ _rtw_memcpy(mac, psta->hwaddr, ETH_ALEN); ++ sinfo->filled = 0; + sinfo->filled |= NL80211_STA_INFO_SIGNAL; -+ sinfo->signal = psta->rssi; -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, -+ struct bss_parameters *params) -+{ -+ u8 i; -+ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+/* -+ DBG_8192C("use_cts_prot=%d\n", params->use_cts_prot); -+ DBG_8192C("use_short_preamble=%d\n", params->use_short_preamble); -+ DBG_8192C("use_short_slot_time=%d\n", params->use_short_slot_time); -+ DBG_8192C("ap_isolate=%d\n", params->ap_isolate); -+ -+ DBG_8192C("basic_rates_len=%d\n", params->basic_rates_len); -+ for(i=0; ibasic_rates_len; i++) -+ { -+ DBG_8192C("basic_rates=%d\n", params->basic_rates[i]); -+ -+ } -+*/ -+ return 0; -+ -+} -+ -+static int cfg80211_rtw_set_channel(struct wiphy *wiphy -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) -+ , struct net_device *ndev -+ #endif -+ , struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) -+{ -+ int chan_target = (u8) ieee80211_frequency_to_channel(chan->center_freq); -+ int chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ int chan_width = CHANNEL_WIDTH_20; -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ #endif -+ -+ switch (channel_type) { -+ case NL80211_CHAN_NO_HT: -+ case NL80211_CHAN_HT20: -+ chan_width = CHANNEL_WIDTH_20; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_HT40MINUS: -+ chan_width = CHANNEL_WIDTH_40; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_HT40PLUS: -+ chan_width = CHANNEL_WIDTH_40; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ default: -+ chan_width = CHANNEL_WIDTH_20; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ -+ set_channel_bwmode(padapter, chan_target, chan_offset, chan_width); -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_set_monitor_channel(struct wiphy *wiphy -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ , struct cfg80211_chan_def *chandef -+#else -+ , struct ieee80211_channel *chan -+ , enum nl80211_channel_type channel_type -+#endif -+ ) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct ieee80211_channel *chan = chandef->chan; -+#endif -+ -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+ int target_channal = chan->hw_value; -+ int target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ int target_width = CHANNEL_WIDTH_20; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("center_freq %u Mhz ch %u width %u freq1 %u freq2 %u\n" -+ , chan->center_freq -+ , chan->hw_value -+ , chandef->width -+ , chandef->center_freq1 -+ , chandef->center_freq2); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ -+ switch (chandef->width) { -+ case NL80211_CHAN_WIDTH_20_NOHT: -+ case NL80211_CHAN_WIDTH_20: -+ target_width = CHANNEL_WIDTH_20; -+ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_WIDTH_40: -+ target_width = CHANNEL_WIDTH_40; -+ if (chandef->center_freq1 > chan->center_freq) -+ target_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else -+ target_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_WIDTH_80: -+ target_width = CHANNEL_WIDTH_80; -+ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_WIDTH_80P80: -+ target_width = CHANNEL_WIDTH_80_80; -+ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_WIDTH_160: -+ target_width = CHANNEL_WIDTH_160; -+ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ case NL80211_CHAN_WIDTH_5: -+ case NL80211_CHAN_WIDTH_10: -+#endif -+ default: -+ target_width = CHANNEL_WIDTH_20; -+ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+#else -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("center_freq %u Mhz ch %u channel_type %u\n" -+ , chan->center_freq -+ , chan->hw_value -+ , channel_type); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ -+ switch (channel_type) { -+ case NL80211_CHAN_NO_HT: -+ case NL80211_CHAN_HT20: -+ target_width = CHANNEL_WIDTH_20; -+ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_HT40MINUS: -+ target_width = CHANNEL_WIDTH_40; -+ target_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_HT40PLUS: -+ target_width = CHANNEL_WIDTH_40; -+ target_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ default: -+ target_width = CHANNEL_WIDTH_20; -+ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+#endif -+ -+ set_channel_bwmode(padapter, target_channal, target_offset, target_width); -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_auth_request *req) -+{ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_assoc_request *req) -+{ -+ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return 0; -+} -+#endif //CONFIG_AP_MODE -+ -+void rtw_cfg80211_rx_probe_request(_adapter *adapter, u8 *frame, uint frame_len) -+{ -+ s32 freq; -+ int channel; -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ u8 category, action; -+ -+ channel = rtw_get_oper_ch(adapter); -+ freq = rtw_ch2freq(channel); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("RTW_Rx: probe request, cur_ch=%d\n", channel); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); -+} -+ -+void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) -+{ -+ int type; -+ s32 freq; -+ int channel; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ u8 category, action; -+ -+ channel = rtw_get_oper_ch(padapter); -+ -+ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); -+ #ifdef CONFIG_P2P -+ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); -+ if (type >= 0) -+ goto indicate; -+ #endif -+ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); -+ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); -+ -+indicate: -+ freq = rtw_ch2freq(channel); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) -+{ -+ int type; -+ s32 freq; -+ int channel; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ u8 category, action; -+ -+ channel = rtw_get_oper_ch(padapter); -+ -+ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); -+ #ifdef CONFIG_P2P -+ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); -+ if (type >= 0) { -+ switch (type) { -+ case P2P_GO_NEGO_CONF: -+ case P2P_PROVISION_DISC_RESP: -+ case P2P_INVIT_RESP: -+ rtw_set_scan_deny(padapter, 2000); -+ rtw_clear_scan_deny(padapter); -+ } -+ goto indicate; -+ } -+ #endif -+ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); -+ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); -+ -+indicate: -+ freq = rtw_ch2freq(channel); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg) -+{ -+ s32 freq; -+ int channel; -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ u8 category, action; -+ -+ channel = rtw_get_oper_ch(adapter); -+ -+ rtw_action_frame_parse(frame, frame_len, &category, &action); -+ -+ if (action == ACT_PUBLIC_GAS_INITIAL_REQ) { -+ rtw_set_scan_deny(adapter, 200); -+ rtw_scan_abort_no_wait(adapter); -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_buddy_adapter_up(adapter)) -+ rtw_scan_abort_no_wait(adapter->pbuddy_adapter); -+ #endif -+ } -+ -+ freq = rtw_ch2freq(channel); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); -+#endif -+ -+ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); -+ if (msg) -+ DBG_871X("RTW_Rx:%s\n", msg); -+ else -+ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); -+} -+ -+#ifdef CONFIG_P2P -+void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) -+{ -+ u16 wps_devicepassword_id = 0x0000; -+ uint wps_devicepassword_id_len = 0; -+ u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; -+ uint p2p_ielen = 0; -+ uint wpsielen = 0; -+ u32 devinfo_contentlen = 0; -+ u8 devinfo_content[64] = { 0x00 }; -+ u16 capability = 0; -+ uint capability_len = 0; -+ -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u8 dialogToken = 1; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_PROVISION_DISC_REQ; -+ u32 p2pielen = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ -+ DBG_871X( "[%s] In\n", __FUNCTION__ ); -+ -+ //prepare for building provision_request frame -+ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); -+ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); -+ -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; -+ -+ rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); -+ rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); -+ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); -+ -+ switch(wps_devicepassword_id) -+ { -+ case WPS_DPID_PIN: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; -+ break; -+ case WPS_DPID_USER_SPEC: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; -+ break; -+ case WPS_DPID_MACHINE_SPEC: -+ break; -+ case WPS_DPID_REKEY: -+ break; -+ case WPS_DPID_PBC: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; -+ break; -+ case WPS_DPID_REGISTRAR_SPEC: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; -+ break; -+ default: -+ break; -+ } -+ -+ -+ if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) -+ { -+ -+ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); -+ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); -+ -+ } -+ -+ -+ //start to build provision_request frame -+ _rtw_memset(wpsie, 0, sizeof(wpsie)); -+ _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); -+ p2p_ielen = 0; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ { -+ return; -+ } -+ -+ -+ //update attribute -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ SetFrameSubType(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ -+ //build_prov_disc_request_p2p_ie -+ // P2P OUI -+ p2pielen = 0; -+ p2p_ie[ p2pielen++ ] = 0x50; -+ p2p_ie[ p2pielen++ ] = 0x6F; -+ p2p_ie[ p2pielen++ ] = 0x9A; -+ p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 -+ -+ // Commented by Albert 20110301 -+ // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes -+ // 1. P2P Capability -+ // 2. Device Info -+ // 3. Group ID ( When joining an operating P2P Group ) -+ -+ // P2P Capability ATTR -+ // Type: -+ p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; -+ -+ // Length: -+ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); -+ RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); -+ p2pielen += 2; -+ -+ // Value: -+ // Device Capability Bitmap, 1 byte -+ // Group Capability Bitmap, 1 byte -+ _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); -+ p2pielen += 2; -+ -+ -+ // Device Info ATTR -+ // Type: -+ p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; -+ -+ // Length: -+ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) -+ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) -+ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); -+ RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); -+ p2pielen += 2; -+ -+ // Value: -+ _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); -+ p2pielen += devinfo_contentlen; -+ -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); -+ //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); -+ //pframe += p2pielen; -+ pattrib->pktlen += p2p_ielen; -+ -+ wpsielen = 0; -+ // WPS OUI -+ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); -+ wpsielen += 4; -+ -+ // WPS version -+ // Type: -+ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); -+ wpsielen += 2; -+ -+ // Length: -+ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); -+ wpsielen += 2; -+ -+ // Value: -+ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 -+ -+ // Config Method -+ // Type: -+ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); -+ wpsielen += 2; -+ -+ // Length: -+ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); -+ wpsielen += 2; -+ -+ // Value: -+ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); -+ -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ //dump_mgntframe(padapter, pmgntframe); -+ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) -+ DBG_8192C("%s, ack to\n", __func__); -+ -+ //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) -+ //{ -+ // DBG_8192C("waiting for p2p peer key-in PIN CODE\n"); -+ // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. -+ //} -+ -+} -+ -+static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+ struct ieee80211_channel * channel, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) -+ enum nl80211_channel_type channel_type, -+#endif -+ unsigned int duration, u64 *cookie) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+ s32 err = 0; -+ u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); -+ u8 ready_on_channel = _FALSE; -+ _adapter *padapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ struct mlme_ext_priv *pmlmeext; -+ struct wifidirect_info *pwdinfo; -+ struct cfg80211_wifidirect_info *pcfg80211_wdinfo; -+ u8 is_p2p_find = _FALSE; -+ -+#ifndef CONFIG_RADIO_WORK -+ #define RTW_ROCH_DURATION_ENLARGE -+ #define RTW_ROCH_BACK_OP -+#endif -+ -+ if (ndev == NULL) { -+ return -EINVAL; -+ } -+ -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(padapter); -+ pmlmeext = &padapter->mlmeextpriv; -+ pwdinfo = &padapter->wdinfo; -+ pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; -+ #ifdef CONFIG_CONCURRENT_MODE -+ is_p2p_find=(duration < (pwdinfo->ext_listen_interval))? _TRUE : _FALSE; -+ #endif -+ -+ *cookie = ATOMIC_INC_RETURN(&pcfg80211_wdinfo->ro_ch_cookie_gen); -+ -+ DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d, cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), remain_ch, duration, *cookie); -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) { -+ DBG_871X(FUNC_ADPT_FMT ": MP mode block remain_on_channel request\n", FUNC_ADPT_ARG(padapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->pbuddy_adapter) { -+ if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) { -+ DBG_871X(FUNC_ADPT_FMT ": MP mode block remain_on_channel request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+ } -+#endif -+#endif -+ -+ if(pcfg80211_wdinfo->is_ro_ch == _TRUE) -+ { -+ DBG_8192C("%s, cancel ro ch timer\n", __func__); -+ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); -+ #ifdef CONFIG_CONCURRENT_MODE -+ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); -+ #endif //CONFIG_CONCURRENT_MODE -+ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); -+ } -+ -+ pcfg80211_wdinfo->is_ro_ch = _TRUE; -+ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); -+ -+ if(_FAIL == rtw_pwr_wakeup(padapter)) { -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) -+ pcfg80211_wdinfo->remain_on_ch_type= channel_type; -+ #endif -+ pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; -+ -+ rtw_scan_abort(padapter); -+#ifdef CONFIG_CONCURRENT_MODE -+ if ((rtw_buddy_adapter_up(padapter)) && is_p2p_find) //don't scan_abort during p2p_listen. -+ rtw_scan_abort(padapter->pbuddy_adapter); -+#endif //CONFIG_CONCURRENT_MODE -+ -+ if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) -+ { -+ DBG_871X("mlme state:0x%x\n", get_fwstate(&padapter->mlmepriv)); -+ remain_ch = padapter->mlmeextpriv.cur_channel; -+ } -+#ifdef CONFIG_CONCURRENT_MODE -+ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) -+ { -+ DBG_871X("buddy_intf's mlme state:0x%x\n", get_fwstate(&(padapter->pbuddy_adapter->mlmepriv))); -+ remain_ch = padapter->pbuddy_adapter->mlmeextpriv.cur_channel; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) -+ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ { -+ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); -+ adapter_wdev_data(padapter)->p2p_enabled = _TRUE; -+ padapter->wdinfo.listen_channel = remain_ch; -+ } else if (rtw_p2p_chk_state(pwdinfo , P2P_STATE_LISTEN)) { -+ padapter->wdinfo.listen_channel = remain_ch; -+ } else { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -+#endif -+ } -+ -+ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+ -+ #ifdef RTW_ROCH_DURATION_ENLARGE -+ if (duration < 400) -+ duration = duration * 3; /* extend from exper */ -+ #endif -+ -+#ifdef RTW_ROCH_BACK_OP -+#ifdef CONFIG_CONCURRENT_MODE -+ if (check_buddy_fwstate(padapter, _FW_LINKED)) { -+ if (is_p2p_find) /* p2p_find , duration<1000 */ -+ duration = duration + pwdinfo->ext_listen_interval; -+ else /* p2p_listen, duration=5000 */ -+ duration = pwdinfo->ext_listen_interval + (pwdinfo->ext_listen_interval / 4); -+ } -+#endif -+#endif /* RTW_ROCH_BACK_OP */ -+ -+ pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter); -+ -+ if(rtw_ch_set_search_ch(pmlmeext->channel_set, remain_ch) >= 0) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if ( check_buddy_fwstate(padapter, _FW_LINKED) ) -+ { -+ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; -+ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; -+ -+ if((remain_ch != pbuddy_mlmeext->cur_channel) && !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) -+ { -+ if(ATOMIC_READ(&pwdev_priv->switch_ch_to)==1 || -+ (remain_ch != pmlmeext->cur_channel)) -+ { -+ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) { -+ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); -+ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); -+ } -+ -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); -+ -+ #ifdef RTW_ROCH_BACK_OP -+ DBG_8192C("%s, set switch ch timer, duration=%d\n", __func__, duration-pwdinfo->ext_listen_interval); -+ _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval); -+ #endif -+ } -+ } -+ -+ ready_on_channel = _TRUE; -+ //pmlmeext->cur_channel = remain_ch; -+ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ }else -+#endif //CONFIG_CONCURRENT_MODE -+ if(remain_ch != rtw_get_oper_ch(padapter) ) -+ { -+ ready_on_channel = _TRUE; -+ //pmlmeext->cur_channel = remain_ch; -+ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } -+ } else { -+ DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); -+ } -+ -+ -+ //call this after other things have been done -+#ifdef CONFIG_CONCURRENT_MODE -+ if(ATOMIC_READ(&pwdev_priv->ro_ch_to)==1 || -+ (remain_ch != rtw_get_oper_ch(padapter))) -+ { -+ u8 co_channel = 0xff; -+ ATOMIC_SET(&pwdev_priv->ro_ch_to, 0); -+#endif -+ -+ if(ready_on_channel == _TRUE) -+ { -+ if ( !check_fwstate(&padapter->mlmepriv, _FW_LINKED ) ) -+ { -+ pmlmeext->cur_channel = remain_ch; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ co_channel = rtw_get_oper_ch(padapter); -+ -+ if(co_channel !=remain_ch) -+#endif -+ { -+ //if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) -+ set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } -+ } -+ } -+ DBG_8192C("%s, set ro ch timer, duration=%d\n", __func__, duration); -+ _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ } -+#endif -+ -+ rtw_cfg80211_ready_on_channel(padapter, *cookie, channel, channel_type, duration, GFP_KERNEL); -+ -+exit: -+ if (err) { -+ pcfg80211_wdinfo->is_ro_ch = _FALSE; -+ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); -+ } -+ -+ return err; -+} -+ -+static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+ u64 cookie) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+ s32 err = 0; -+ _adapter *padapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ struct wifidirect_info *pwdinfo; -+ struct cfg80211_wifidirect_info *pcfg80211_wdinfo; -+ -+ if (ndev == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(padapter); -+ pwdinfo = &padapter->wdinfo; -+ pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; -+ -+ DBG_871X(FUNC_ADPT_FMT" cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), cookie); -+ -+ if (pcfg80211_wdinfo->is_ro_ch == _TRUE) { -+ DBG_8192C("%s, cancel ro ch timer\n", __func__); -+ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); -+ #ifdef CONFIG_CONCURRENT_MODE -+ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); -+ #endif -+ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); -+ } -+ -+ #if 0 -+ // Disable P2P Listen State -+ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) -+ { -+ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); -+ _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); -+ } -+ } -+ else -+ #endif -+ { -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -+#endif -+ } -+ -+ pcfg80211_wdinfo->is_ro_ch = _FALSE; -+ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); -+ -+exit: -+ return err; -+} -+ -+#endif //CONFIG_P2P -+ -+static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, size_t len, int wait_ack) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ int ret = _FAIL; -+ bool ack = _TRUE; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif //CONFIG_P2P -+ //struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; -+ -+ rtw_set_scan_deny(padapter, 1000); -+ -+ rtw_scan_abort(padapter); -+ #ifdef CONFIG_CONCURRENT_MODE -+ if(rtw_buddy_adapter_up(padapter)) -+ rtw_scan_abort(padapter->pbuddy_adapter); -+ #endif /* CONFIG_CONCURRENT_MODE */ -+#ifdef CONFIG_P2P -+ if (padapter->cfg80211_wdinfo.is_ro_ch == _TRUE) { -+ //DBG_8192C("%s, cancel ro ch timer\n", __func__); -+ //_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); -+ //padapter->cfg80211_wdinfo.is_ro_ch = _FALSE; -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) -+ { -+ DBG_8192C("%s, extend ro ch time\n", __func__); -+ _set_timer( &padapter->cfg80211_wdinfo.remain_on_ch_timer, pwdinfo->ext_listen_period); -+ } -+ #endif //CONFIG_CONCURRENT_MODE -+ } -+#endif //CONFIG_P2P -+#ifdef CONFIG_CONCURRENT_MODE -+ if (check_buddy_fwstate(padapter, _FW_LINKED )) { -+ u8 co_channel=0xff; -+ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; -+ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; -+ -+ co_channel = rtw_get_oper_ch(padapter); -+ -+ if (tx_ch != pbuddy_mlmeext->cur_channel) { -+ -+ u16 ext_listen_period; -+ -+ if (ATOMIC_READ(&pwdev_priv->switch_ch_to)==1) { -+ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) { -+ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); -+ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); -+ } -+ -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); -+ -+ //DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, pwdinfo->ext_listen_period); -+ //_set_timer(&pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period); -+ } -+ -+ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED )) -+ { -+ ext_listen_period = 500;// 500ms -+ } -+ else -+ { -+ ext_listen_period = pwdinfo->ext_listen_period; -+ } -+ -+ DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, ext_listen_period); -+ _set_timer(&pwdinfo->ap_p2p_switch_timer, ext_listen_period); -+ -+ } -+ -+ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) -+ pmlmeext->cur_channel = tx_ch; -+ -+ if (tx_ch != co_channel) -+ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ }else -+#endif //CONFIG_CONCURRENT_MODE -+ //if (tx_ch != pmlmeext->cur_channel) { -+ if(tx_ch != rtw_get_oper_ch(padapter)) { -+ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) -+ pmlmeext->cur_channel = tx_ch; -+ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } -+ -+ //starting alloc mgmt frame to dump it -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ { -+ //ret = -ENOMEM; -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ //update attribute -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->retry_ctrl = _FALSE; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ _rtw_memcpy(pframe, (void*)buf, len); -+ pattrib->pktlen = len; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ //update seq number -+ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); -+ pattrib->seqnum = pmlmeext->mgnt_seq; -+ pmlmeext->mgnt_seq++; -+ -+#ifdef CONFIG_P2P -+ rtw_xframe_chk_wfd_ie(pmgntframe); -+#endif /* CONFIG_P2P */ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ack) { -+ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) { -+ ack = _FALSE; -+ ret = _FAIL; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, ack == _FAIL\n", __func__); -+#endif -+ } else { -+ -+#ifdef CONFIG_XMIT_ACK -+ rtw_msleep_os(50); -+#endif -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, ack=%d, ok!\n", __func__, ack); -+#endif -+ ret = _SUCCESS; -+ } -+ } else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+exit: -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, ret=%d\n", __func__, ret); -+ #endif -+ -+ return ret; -+ -+} -+ -+static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) -+ struct ieee80211_channel *chan, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) -+ bool offchan, -+ #endif -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) -+ enum nl80211_channel_type channel_type, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ bool channel_type_valid, -+ #endif -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) -+ unsigned int wait, -+ #endif -+ const u8 *buf, size_t len, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) -+ bool no_cck, -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) -+ bool dont_wait_for_ack, -+ #endif -+#else -+ struct cfg80211_mgmt_tx_params *params, -+#endif -+ u64 *cookie) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) -+ struct ieee80211_channel *chan = params->chan; -+ bool offchan = params->offchan; -+ unsigned int wait = params->wait; -+ const u8 *buf = params->buf; -+ size_t len = params->len; -+ bool no_cck = params->no_cck; -+ bool dont_wait_for_ack = params->dont_wait_for_ack; -+#endif -+ int ret = 0; -+ int tx_ret; -+ int wait_ack = 1; -+ u32 dump_limit = RTW_MAX_MGMT_TX_CNT; -+ u32 dump_cnt = 0; -+ bool ack = _TRUE; -+ u8 tx_ch; -+ u8 category, action; -+ u8 frame_styp; -+ int type = (-1); -+ u32 start = rtw_get_current_time(); -+ _adapter *padapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ if ((ndev == NULL) || (chan == NULL)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); -+ -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(padapter); -+ -+ /* cookie generation */ -+ *cookie = (unsigned long) buf; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_871X(FUNC_ADPT_FMT" len=%zu, ch=%d" -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) -+ ", ch_type=%d" -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ ", channel_type_valid=%d" -+ #endif -+ #endif -+ "\n", FUNC_ADPT_ARG(padapter), -+ len, tx_ch -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) -+ , channel_type -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ , channel_type_valid -+ #endif -+ #endif -+ ); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ -+ /* indicate ack before issue frame to avoid racing with rsp frame */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL); -+#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) -+ cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL); -+#endif -+ -+ frame_styp = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl) & IEEE80211_FCTL_STYPE; -+ if (IEEE80211_STYPE_PROBE_RESP == frame_styp) { -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("RTW_Tx: probe_resp tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ wait_ack = 0; -+ goto dump; -+ } -+ -+ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { -+ DBG_8192C(FUNC_ADPT_FMT" frame_control:0x%x\n", FUNC_ADPT_ARG(padapter), -+ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); -+ goto exit; -+ } -+ -+ DBG_8192C("RTW_Tx:tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); -+ #ifdef CONFIG_P2P -+ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) { -+ goto dump; -+ } -+ #endif -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) -+ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); -+ else -+ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); -+ -+dump: -+ -+ rtw_ps_deny(padapter, PS_DENY_MGNT_TX); -+ if(_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -EFAULT; -+ goto cancel_ps_deny; -+ } -+ -+ while (1) { -+ u32 sleep_ms = 0; -+ u32 retry_guarantee_ms = 0; -+ -+ dump_cnt++; -+ tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len, wait_ack); -+ -+ switch (action) { -+ case ACT_PUBLIC_GAS_INITIAL_REQ: -+ case ACT_PUBLIC_GAS_INITIAL_RSP: -+ sleep_ms = 50; -+ retry_guarantee_ms = RTW_MAX_MGMT_TX_MS_GAS; -+ } -+ -+ if (tx_ret == _SUCCESS -+ || (dump_cnt >= dump_limit && rtw_get_passing_time_ms(start) >= retry_guarantee_ms)) -+ break; -+ -+ if (sleep_ms > 0) -+ rtw_msleep_os(sleep_ms); -+ } -+ -+ if (tx_ret != _SUCCESS || dump_cnt > 1) { -+ DBG_871X(FUNC_ADPT_FMT" %s (%d/%d) in %d ms\n", FUNC_ADPT_ARG(padapter), -+ tx_ret==_SUCCESS?"OK":"FAIL", dump_cnt, dump_limit, rtw_get_passing_time_ms(start)); -+ } -+ -+ switch (type) { -+ case P2P_GO_NEGO_CONF: -+ rtw_clear_scan_deny(padapter); -+ break; -+ case P2P_INVIT_RESP: -+ if (pwdev_priv->invit_info.flags & BIT(0) -+ && pwdev_priv->invit_info.status == 0) -+ { -+ DBG_871X(FUNC_ADPT_FMT" agree with invitation of persistent group\n", -+ FUNC_ADPT_ARG(padapter)); -+ rtw_set_scan_deny(padapter, 5000); -+ rtw_pwr_wakeup_ex(padapter, 5000); -+ rtw_clear_scan_deny(padapter); -+ } -+ break; -+ } -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); -+exit: -+ return ret; -+} -+ -+static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+ u16 frame_type, bool reg) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) -+ struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+ _adapter *adapter; -+ -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ if (ndev == NULL) -+ goto exit; -+ -+ adapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(adapter); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_871X(FUNC_ADPT_FMT" frame_type:%x, reg:%d\n", FUNC_ADPT_ARG(adapter), -+ frame_type, reg); -+#endif -+ -+ /* Wait QC Verify */ -+ return; -+ -+ switch (frame_type) { -+ case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ -+ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); -+ break; -+ case IEEE80211_STYPE_ACTION: /* 0x00D0 */ -+ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); -+ break; -+ default: -+ break; -+ } -+ -+exit: -+ return; -+} -+ -+#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) -+static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, -+ struct net_device *ndev, -+ u8 *peer, -+ u8 action_code, -+ u8 dialog_token, -+ u16 status_code, -+ const u8 *buf, -+ size_t len) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ int ret = 0; -+ struct tdls_txmgmt txmgmt; -+ -+ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { -+ DBG_871X("Discard tdls action:%d, since hal doesn't support tdls\n", action_code); -+ goto discard; -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ DBG_871X("Discard tdls action:%d, let driver to set up direct link\n", action_code); -+ goto discard; -+ } -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); -+ txmgmt.action_code = action_code; -+ txmgmt.dialog_token= dialog_token; -+ txmgmt.status_code = status_code; -+ txmgmt.len = len; -+ txmgmt.buf = (u8 *)rtw_malloc(txmgmt.len); -+ if (txmgmt.buf == NULL) { -+ ret = -ENOMEM; -+ goto bad; -+ } -+ _rtw_memcpy(txmgmt.buf, (void*)buf, txmgmt.len); -+ -+/* Debug purpose */ -+#if 1 -+ DBG_871X("%s %d\n", __FUNCTION__, __LINE__); -+ DBG_871X("peer:"MAC_FMT", action code:%d, dialog:%d, status code:%d\n", -+ MAC_ARG(txmgmt.peer), txmgmt.action_code, -+ txmgmt.dialog_token, txmgmt.status_code); -+ if (txmgmt.len > 0) { -+ int i=0; -+ for(;i < len; i++) -+ printk("%02x ", *(txmgmt.buf+i)); -+ DBG_871X("len:%d\n", txmgmt.len); -+ } -+#endif -+ -+ switch (txmgmt.action_code) { -+ case TDLS_SETUP_REQUEST: -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ break; -+ case TDLS_SETUP_RESPONSE: -+ issue_tdls_setup_rsp(padapter, &txmgmt); -+ break; -+ case TDLS_SETUP_CONFIRM: -+ issue_tdls_setup_cfm(padapter, &txmgmt); -+ break; -+ case TDLS_TEARDOWN: -+ issue_tdls_teardown(padapter, &txmgmt, _TRUE); -+ break; -+ case TDLS_DISCOVERY_REQUEST: -+ issue_tdls_dis_req(padapter, &txmgmt); -+ break; -+ case TDLS_DISCOVERY_RESPONSE: -+ issue_tdls_dis_rsp(padapter, &txmgmt, pmlmeinfo->enc_algo? _TRUE : _FALSE); -+ break; -+ } -+ -+bad: -+ if (txmgmt.buf) -+ rtw_mfree(txmgmt.buf, txmgmt.len); -+ -+discard: -+ return ret; -+} -+ -+static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, -+ struct net_device *ndev, -+ u8 *peer, -+ enum nl80211_tdls_operation oper) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct tdls_txmgmt txmgmt; -+ struct sta_info *ptdls_sta = NULL; -+ -+ DBG_871X(FUNC_NDEV_FMT", nl80211_tdls_operation:%d\n", FUNC_NDEV_ARG(ndev), oper); -+ -+ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { -+ DBG_871X("Discard tdls oper:%d, since hal doesn't support tdls\n", oper); -+ return 0; -+ } -+ -+#ifdef CONFIG_LPS -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); -+#endif //CONFIG_LPS -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ if (peer) -+ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ /* these two cases are done by driver itself */ -+ if (oper == NL80211_TDLS_ENABLE_LINK || oper == NL80211_TDLS_DISABLE_LINK) -+ return 0; -+ } -+ -+ switch (oper) { -+ case NL80211_TDLS_DISCOVERY_REQ: -+ issue_tdls_dis_req(padapter, &txmgmt); -+ break; -+ case NL80211_TDLS_SETUP: -+#ifdef CONFIG_WFD -+ if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) { -+ if ( padapter->wdinfo.wfd_tdls_weaksec == _TRUE) -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ else -+ DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); -+ } else -+#endif // CONFIG_WFD -+ { -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ } -+ break; -+ case NL80211_TDLS_TEARDOWN: -+ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); -+ if (ptdls_sta != NULL) { -+ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; -+ issue_tdls_teardown(padapter, &txmgmt, _TRUE); -+ }else { -+ DBG_871X( "TDLS peer not found\n"); -+ } -+ break; -+ case NL80211_TDLS_ENABLE_LINK: -+ DBG_871X(FUNC_NDEV_FMT", NL80211_TDLS_ENABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), peer); -+ if (ptdls_sta != NULL) { -+ ptdlsinfo->link_established = _TRUE; -+ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; -+ ptdls_sta->state |= _FW_LINKED; -+ rtw_tdls_cmd(padapter, txmgmt.peer, TDLS_ESTABLISHED); -+ } -+ break; -+ case NL80211_TDLS_DISABLE_LINK: -+ DBG_871X(FUNC_NDEV_FMT", NL80211_TDLS_DISABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), peer); -+ if (ptdls_sta != NULL) { -+ rtw_tdls_cmd(padapter, peer, TDLS_TEAR_STA ); -+ } -+ break; -+ } -+ return 0; -+} -+#endif /* CONFIG_TDLS */ -+ -+#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) -+static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, -+ struct net_device *dev, -+ struct cfg80211_sched_scan_request *request) { -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 ret; -+ -+ if (padapter->bup == _FALSE) { -+ DBG_871X("%s: net device is down.\n", __func__); -+ return -EIO; -+ } -+ -+ if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE || -+ check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE || -+ check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { -+ DBG_871X("%s: device is busy.\n", __func__); -+ rtw_scan_abort(padapter); -+ } -+ -+ if (request == NULL) { -+ DBG_871X("%s: invalid cfg80211_requests parameters.\n", __func__); -+ return -EINVAL; -+ } -+ -+ ret = rtw_android_cfg80211_pno_setup(dev, request->ssids, -+ request->n_ssids, request->interval); -+ -+ if (ret < 0) { -+ DBG_871X("%s ret: %d\n", __func__, ret); -+ goto exit; -+ } -+ -+ ret = rtw_android_pno_enable(dev, _TRUE); -+ if (ret < 0) { -+ DBG_871X("%s ret: %d\n", __func__, ret); -+ goto exit; -+ } -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_sched_scan_stop(struct wiphy *wiphy, -+ struct net_device *dev) { -+ return rtw_android_pno_enable(dev, _FALSE); -+} -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, int len) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u8 *wps_ie; -+ u32 p2p_ielen = 0; -+ u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; -+ u8 *p2p_ie; -+ u32 wfd_ielen = 0; -+ u8 *wfd_ie; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ DBG_871X(FUNC_NDEV_FMT" ielen=%d\n", FUNC_NDEV_ARG(ndev), len); -+ -+ if(len>0) -+ { -+ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) -+ { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("bcn_wps_ielen=%d\n", wps_ielen); -+ #endif -+ -+ if(pmlmepriv->wps_beacon_ie) -+ { -+ u32 free_len = pmlmepriv->wps_beacon_ie_len; -+ pmlmepriv->wps_beacon_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); -+ pmlmepriv->wps_beacon_ie = NULL; -+ } -+ -+ pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); -+ if ( pmlmepriv->wps_beacon_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ -+ _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); -+ pmlmepriv->wps_beacon_ie_len = wps_ielen; -+ -+ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); -+ -+ } -+ -+ //buf += wps_ielen; -+ //len -= wps_ielen; -+ -+ #ifdef CONFIG_P2P -+ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) -+ { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("bcn_p2p_ielen=%d\n", p2p_ielen); -+ #endif -+ -+ if(pmlmepriv->p2p_beacon_ie) -+ { -+ u32 free_len = pmlmepriv->p2p_beacon_ie_len; -+ pmlmepriv->p2p_beacon_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); -+ pmlmepriv->p2p_beacon_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); -+ if ( pmlmepriv->p2p_beacon_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ -+ _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_beacon_ie_len = p2p_ielen; -+ -+ } -+ #endif //CONFIG_P2P -+ -+ -+ #ifdef CONFIG_WFD -+ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("bcn_wfd_ielen=%d\n", wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_BEACON_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ return -EINVAL; -+ } -+ #endif /* CONFIG_WFD */ -+ -+ pmlmeext->bstart_bss = _TRUE; -+ -+ } -+ -+ return ret; -+ -+} -+ -+static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u8 *wps_ie; -+ u32 p2p_ielen = 0; -+ u8 *p2p_ie; -+ u32 wfd_ielen = 0; -+ u8 *wfd_ie; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, ielen=%d\n", __func__, len); -+#endif -+ -+ if(len>0) -+ { -+ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) -+ { -+ uint attr_contentlen = 0; -+ u16 uconfig_method, *puconfig_method = NULL; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("probe_resp_wps_ielen=%d\n", wps_ielen); -+ #endif -+ -+ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) -+ { -+ u8 sr = 0; -+ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); -+ -+ if (sr != 0) -+ { -+ DBG_871X("%s, got sr\n", __func__); -+ } -+ else -+ { -+ DBG_8192C("GO mode process WPS under site-survey, sr no set\n"); -+ return ret; -+ } -+ } -+ -+ if(pmlmepriv->wps_probe_resp_ie) -+ { -+ u32 free_len = pmlmepriv->wps_probe_resp_ie_len; -+ pmlmepriv->wps_probe_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); -+ pmlmepriv->wps_probe_resp_ie = NULL; -+ } -+ -+ pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); -+ if ( pmlmepriv->wps_probe_resp_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ -+ //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode -+ if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) -+ { -+ //struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct wireless_dev *wdev = padapter->rtw_wdev; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); -+ #endif -+ -+ //if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ if(wdev->iftype != NL80211_IFTYPE_P2P_GO) //for WIFI-DIRECT LOGO 4.2.2, AUTO GO can't set PUSH_BUTTON flags -+ { -+ uconfig_method = WPS_CM_PUSH_BUTTON; -+ uconfig_method = cpu_to_be16( uconfig_method ); -+ -+ *puconfig_method |= uconfig_method; -+ } -+ #endif -+ } -+ -+ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); -+ pmlmepriv->wps_probe_resp_ie_len = wps_ielen; -+ -+ } -+ -+ //buf += wps_ielen; -+ //len -= wps_ielen; -+ -+ #ifdef CONFIG_P2P -+ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) -+ { -+ u8 is_GO = _FALSE; -+ u32 attr_contentlen = 0; -+ u16 cap_attr=0; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("probe_resp_p2p_ielen=%d\n", p2p_ielen); -+ #endif -+ -+ //Check P2P Capability ATTR -+ if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) -+ { -+ u8 grp_cap=0; -+ //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); -+ cap_attr = le16_to_cpu(cap_attr); -+ grp_cap = (u8)((cap_attr >> 8)&0xff); -+ -+ is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; -+ -+ if(is_GO) -+ DBG_8192C("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); -+ } -+ -+ -+ if(is_GO == _FALSE) -+ { -+ if(pmlmepriv->p2p_probe_resp_ie) -+ { -+ u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; -+ pmlmepriv->p2p_probe_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); -+ pmlmepriv->p2p_probe_resp_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); -+ if ( pmlmepriv->p2p_probe_resp_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; -+ } -+ else -+ { -+ if(pmlmepriv->p2p_go_probe_resp_ie) -+ { -+ u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; -+ pmlmepriv->p2p_go_probe_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); -+ pmlmepriv->p2p_go_probe_resp_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); -+ if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; -+ } -+ -+ } -+ #endif //CONFIG_P2P -+ -+ -+ #ifdef CONFIG_WFD -+ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("probe_resp_wfd_ielen=%d\n", wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_RESP_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ return -EINVAL; -+ } -+ #endif /* CONFIG_WFD */ -+ -+ } -+ -+ return ret; -+ -+} -+ -+static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 *ie; -+ u32 ie_len; -+ -+ DBG_8192C("%s, ielen=%d\n", __func__, len); -+ -+ if (len <= 0) -+ goto exit; -+ -+ ie = rtw_get_wps_ie(buf, len, NULL, &ie_len); -+ if (ie && ie_len) { -+ if (pmlmepriv->wps_assoc_resp_ie) { -+ u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; -+ -+ pmlmepriv->wps_assoc_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); -+ pmlmepriv->wps_assoc_resp_ie = NULL; -+ } -+ -+ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); -+ if (pmlmepriv->wps_assoc_resp_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ } -+ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, ie, ie_len); -+ pmlmepriv->wps_assoc_resp_ie_len = ie_len; -+ } -+ -+ ie = rtw_get_p2p_ie(buf, len, NULL, &ie_len); -+ if (ie && ie_len) { -+ if (pmlmepriv->p2p_assoc_resp_ie) { -+ u32 free_len = pmlmepriv->p2p_assoc_resp_ie_len; -+ -+ pmlmepriv->p2p_assoc_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_assoc_resp_ie, free_len); -+ pmlmepriv->p2p_assoc_resp_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_assoc_resp_ie = rtw_malloc(ie_len); -+ if (pmlmepriv->p2p_assoc_resp_ie == NULL) { -+ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ } -+ _rtw_memcpy(pmlmepriv->p2p_assoc_resp_ie, ie, ie_len); -+ pmlmepriv->p2p_assoc_resp_ie_len = ie_len; -+ } -+ -+#ifdef CONFIG_WFD -+ ie = rtw_get_wfd_ie(buf, len, NULL, &ie_len); -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_RESP_IE, ie, ie_len) != _SUCCESS) -+ return -EINVAL; -+#endif -+ -+exit: -+ return ret; -+} -+ -+int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, -+ int type) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u32 p2p_ielen = 0; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ DBG_8192C("%s, ielen=%d\n", __func__, len); -+#endif -+ -+ if( (rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) -+ #ifdef CONFIG_P2P -+ || (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) -+ #endif -+ ) -+ { -+ if (net != NULL) -+ { -+ switch (type) -+ { -+ case 0x1: //BEACON -+ ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); -+ break; -+ case 0x2: //PROBE_RESP -+ ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); -+ break; -+ case 0x4: //ASSOC_RESP -+ ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); -+ break; -+ } -+ } -+ } -+ -+ return ret; -+ -+} -+ -+static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ u8 stbc_rx_enable = _FALSE; -+ -+ rtw_ht_use_default_setting(padapter); -+ -+ /* RX LDPC */ -+ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX)) -+ ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; -+ -+ /* TX STBC */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) -+ ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; -+ -+ /* RX STBC */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) { -+ /*rtw_rx_stbc 0: disable, bit(0):enable 2.4g, bit(1):enable 5g*/ -+ if (IEEE80211_BAND_2GHZ == band) -+ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(0))?_TRUE:_FALSE; -+ if (IEEE80211_BAND_5GHZ == band) -+ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(1))?_TRUE:_FALSE; -+ -+ if (stbc_rx_enable) { -+ switch (rf_type) { -+ case RF_1T1R: -+ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/*RX STBC One spatial stream*/ -+ break; -+ -+ case RF_2T2R: -+ case RF_1T2R: -+ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ -+ break; -+ case RF_3T3R: -+ case RF_3T4R: -+ case RF_4T4R: -+ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ -+ break; -+ default: -+ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); -+ break; -+ } -+ } -+ } -+} -+ -+static void rtw_cfg80211_init_ht_capab(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) -+{ -+#define MAX_BIT_RATE_40MHZ_MCS23 450 /* Mbps */ -+#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ -+#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ -+ -+ ht_cap->ht_supported = _TRUE; -+ -+ ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | -+ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | -+ IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; -+ rtw_cfg80211_init_ht_capab_ex(padapter, ht_cap, band, rf_type); -+ -+ /* -+ *Maximum length of AMPDU that the STA can receive. -+ *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) -+ */ -+ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; -+ -+ /*Minimum MPDU start spacing , */ -+ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; -+ -+ ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; -+ -+ /* -+ *hw->wiphy->bands[IEEE80211_BAND_2GHZ] -+ *base on ant_num -+ *rx_mask: RX mask -+ *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 -+ *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 -+ *if rx_ant >=3 rx_mask[2]=0xff; -+ *if BW_40 rx_mask[4]=0x01; -+ *highest supported RX rate -+ */ -+ if (rf_type == RF_1T1R) { -+ ht_cap->mcs.rx_mask[0] = 0xFF; -+ -+ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; -+ } else if ((rf_type == RF_1T2R) || (rf_type == RF_2T2R) || (rf_type == RF_2T2R_GREEN)) { -+ ht_cap->mcs.rx_mask[0] = 0xFF; -+ ht_cap->mcs.rx_mask[1] = 0xFF; -+ -+ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; -+ } else if ((rf_type == RF_2T3R) || (rf_type == RF_3T3R)) { -+ ht_cap->mcs.rx_mask[0] = 0xFF; -+ ht_cap->mcs.rx_mask[1] = 0xFF; -+ ht_cap->mcs.rx_mask[2] = 0xFF; -+ -+ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS23; -+ } else { -+ rtw_warn_on(1); -+ DBG_8192C("%s, error rf_type=%d\n", __func__, rf_type); -+ } -+ -+} -+ -+void rtw_cfg80211_init_wiphy(_adapter *padapter) -+{ -+ u8 rf_type; -+ struct ieee80211_supported_band *bands; -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct wiphy *wiphy = pwdev->wiphy; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); -+ -+ DBG_8192C("%s:rf_type=%d\n", __func__, rf_type); -+ -+ if (IsSupported24G(padapter->registrypriv.wireless_mode)) { -+ bands = wiphy->bands[IEEE80211_BAND_2GHZ]; -+ if(bands) -+ rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); -+ } -+#ifdef CONFIG_IEEE80211_BAND_5GHZ -+ if (IsSupported5G(padapter->registrypriv.wireless_mode)) { -+ bands = wiphy->bands[IEEE80211_BAND_5GHZ]; -+ if(bands) -+ rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); -+ } -+#endif -+ /* init regulary domain */ -+ rtw_regd_init(padapter); -+ -+ /* copy mac_addr to wiphy */ -+ _rtw_memcpy(wiphy->perm_addr, adapter_mac_addr(padapter), ETH_ALEN); -+ -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+struct ieee80211_iface_limit rtw_limits[] = { -+ { .max = 2, -+ .types = BIT(NL80211_IFTYPE_STATION) -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ | BIT(NL80211_IFTYPE_P2P_CLIENT) -+ #endif -+ }, -+ #ifdef CONFIG_AP_MODE -+ { .max = 1, -+ .types = BIT(NL80211_IFTYPE_AP) -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ | BIT(NL80211_IFTYPE_P2P_GO) -+ #endif -+ }, -+ #endif -+}; -+ -+struct ieee80211_iface_combination rtw_combinations[] = { -+ { .limits = rtw_limits, -+ .n_limits = ARRAY_SIZE(rtw_limits), -+ .max_interfaces = 2, -+ .num_different_channels = 1, -+ }, -+}; -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) */ -+ -+static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ -+ wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; -+ -+ wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; -+ wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; -+ wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) -+ wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; -+#endif -+ -+ wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) -+ | BIT(NL80211_IFTYPE_ADHOC) -+#ifdef CONFIG_AP_MODE -+ | BIT(NL80211_IFTYPE_AP) -+ #ifdef CONFIG_WIFI_MONITOR -+ | BIT(NL80211_IFTYPE_MONITOR) -+ #endif -+#endif -+#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) -+ | BIT(NL80211_IFTYPE_P2P_CLIENT) -+ | BIT(NL80211_IFTYPE_P2P_GO) -+#endif -+ ; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+#ifdef CONFIG_AP_MODE -+ wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; -+#endif //CONFIG_AP_MODE -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) -+ #ifdef CONFIG_WIFI_MONITOR -+ wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR); -+ #endif -+#endif -+ -+ #if defined(RTW_SINGLE_WIPHY) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ wiphy->iface_combinations = rtw_combinations; -+ wiphy->n_iface_combinations = ARRAY_SIZE(rtw_combinations); -+ #endif -+ -+ wiphy->cipher_suites = rtw_cipher_suites; -+ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); -+ -+ if (IsSupported24G(adapter->registrypriv.wireless_mode)) -+ wiphy->bands[IEEE80211_BAND_2GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_2GHZ); -+ -+#ifdef CONFIG_IEEE80211_BAND_5GHZ -+ if (IsSupported5G(adapter->registrypriv.wireless_mode)) -+ wiphy->bands[IEEE80211_BAND_5GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_5GHZ); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) && LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)) -+ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) -+ wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; -+ wiphy->flags |= WIPHY_FLAG_HAVE_AP_SME; -+ /* remove WIPHY_FLAG_OFFCHAN_TX, because we not support this feature */ -+ /* wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; */ -+#endif -+ -+#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; -+#ifdef CONFIG_PNO_SUPPORT -+ wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; -+#endif -+#endif -+ -+#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0)) -+ wiphy->wowlan = wowlan_stub; -+#else -+ wiphy->wowlan = &wowlan_stub; -+#endif -+#endif -+ -+#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) -+ wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; -+#ifndef CONFIG_TDLS_DRIVER_SETUP -+ wiphy->flags |= WIPHY_FLAG_TDLS_EXTERNAL_SETUP; //Driver handles key exchange -+ wiphy->flags |= NL80211_ATTR_HT_CAPABILITY; -+#endif //CONFIG_TDLS_DRIVER_SETUP -+#endif /* CONFIG_TDLS */ -+ -+ if (regsty->power_mgnt != PS_MODE_ACTIVE) -+ wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; -+ else -+ wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) -+ //wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; -+#endif -+} -+ -+static struct cfg80211_ops rtw_cfg80211_ops = { -+ .change_virtual_intf = cfg80211_rtw_change_iface, -+ .add_key = cfg80211_rtw_add_key, -+ .get_key = cfg80211_rtw_get_key, -+ .del_key = cfg80211_rtw_del_key, -+ .set_default_key = cfg80211_rtw_set_default_key, -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) -+ .set_rekey_data = cfg80211_rtw_set_rekey_data, -+#endif /*CONFIG_GTK_OL*/ -+ .get_station = cfg80211_rtw_get_station, -+ .scan = cfg80211_rtw_scan, -+ .set_wiphy_params = cfg80211_rtw_set_wiphy_params, -+ .connect = cfg80211_rtw_connect, -+ .disconnect = cfg80211_rtw_disconnect, -+ .join_ibss = cfg80211_rtw_join_ibss, -+ .leave_ibss = cfg80211_rtw_leave_ibss, -+ .set_tx_power = cfg80211_rtw_set_txpower, -+ .get_tx_power = cfg80211_rtw_get_txpower, -+ .set_power_mgmt = cfg80211_rtw_set_power_mgmt, -+ .set_pmksa = cfg80211_rtw_set_pmksa, -+ .del_pmksa = cfg80211_rtw_del_pmksa, -+ .flush_pmksa = cfg80211_rtw_flush_pmksa, -+ -+#ifdef CONFIG_AP_MODE -+ .add_virtual_intf = cfg80211_rtw_add_virtual_intf, -+ .del_virtual_intf = cfg80211_rtw_del_virtual_intf, -+ -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) -+ .add_beacon = cfg80211_rtw_add_beacon, -+ .set_beacon = cfg80211_rtw_set_beacon, -+ .del_beacon = cfg80211_rtw_del_beacon, -+ #else -+ .start_ap = cfg80211_rtw_start_ap, -+ .change_beacon = cfg80211_rtw_change_beacon, -+ .stop_ap = cfg80211_rtw_stop_ap, -+ #endif -+ -+ .add_station = cfg80211_rtw_add_station, -+ .del_station = cfg80211_rtw_del_station, -+ .change_station = cfg80211_rtw_change_station, -+ .dump_station = cfg80211_rtw_dump_station, -+ .change_bss = cfg80211_rtw_change_bss, -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+ .set_channel = cfg80211_rtw_set_channel, -+ #endif -+ //.auth = cfg80211_rtw_auth, -+ //.assoc = cfg80211_rtw_assoc, -+#endif //CONFIG_AP_MODE -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ .set_monitor_channel = cfg80211_rtw_set_monitor_channel, -+#endif -+ -+#ifdef CONFIG_P2P -+ .remain_on_channel = cfg80211_rtw_remain_on_channel, -+ .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ .mgmt_tx = cfg80211_rtw_mgmt_tx, -+ .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, -+#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) -+ .action = cfg80211_rtw_mgmt_tx, -+#endif -+ -+#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) -+ .tdls_mgmt = cfg80211_rtw_tdls_mgmt, -+ .tdls_oper = cfg80211_rtw_tdls_oper, -+#endif /* CONFIG_TDLS */ -+ -+#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) -+ .sched_scan_start = cfg80211_rtw_sched_scan_start, -+ .sched_scan_stop = cfg80211_rtw_sched_scan_stop, -+#endif /* CONFIG_PNO_SUPPORT */ -+}; -+ -+struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev) -+{ -+ struct wiphy *wiphy; -+ struct rtw_wiphy_data *wiphy_data; -+ -+ /* wiphy */ -+ wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(_adapter*)); -+ if (!wiphy) { -+ DBG_8192C("Couldn't allocate wiphy device\n"); -+ goto exit; -+ } -+ set_wiphy_dev(wiphy, dev); -+ *((_adapter**)wiphy_priv(wiphy)) = padapter; -+ -+ rtw_cfg80211_preinit_wiphy(padapter, wiphy); -+ -+ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+exit: -+ return wiphy; -+} -+ -+void rtw_wiphy_free(struct wiphy *wiphy) -+{ -+ if (!wiphy) -+ return; -+ -+ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+ if (wiphy->bands[IEEE80211_BAND_2GHZ]) { -+ rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_2GHZ]); -+ wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; -+ } -+ if (wiphy->bands[IEEE80211_BAND_5GHZ]) { -+ rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_5GHZ]); -+ wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; -+ } -+ -+ wiphy_free(wiphy); -+} -+ -+int rtw_wiphy_register(struct wiphy *wiphy) -+{ -+ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) -+ rtw_cfgvendor_attach(wiphy); -+#endif -+ -+ return wiphy_register(wiphy); -+} -+ -+void rtw_wiphy_unregister(struct wiphy *wiphy) -+{ -+ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) -+ rtw_cfgvendor_detach(wiphy); -+#endif -+ -+ return wiphy_unregister(wiphy); -+} -+ -+int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy) -+{ -+ int ret = 0; -+ struct net_device *pnetdev = padapter->pnetdev; -+ struct wireless_dev *wdev; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ DBG_8192C("%s(padapter=%p)\n", __func__, padapter); -+ -+ /* wdev */ -+ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); -+ if (!wdev) { -+ DBG_8192C("Couldn't allocate wireless device\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ wdev->wiphy = wiphy; -+ wdev->netdev = pnetdev; -+ -+ wdev->iftype = NL80211_IFTYPE_STATION; // will be init in rtw_hal_init() -+ // Must sync with _rtw_init_mlme_priv() -+ // pmlmepriv->fw_state = WIFI_STATION_STATE -+ //wdev->iftype = NL80211_IFTYPE_MONITOR; // for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() -+ padapter->rtw_wdev = wdev; -+ pnetdev->ieee80211_ptr = wdev; -+ -+ //init pwdev_priv -+ pwdev_priv = adapter_wdev_data(padapter); -+ pwdev_priv->rtw_wdev = wdev; -+ pwdev_priv->pmon_ndev = NULL; -+ pwdev_priv->ifname_mon[0] = '\0'; -+ pwdev_priv->padapter = padapter; -+ pwdev_priv->scan_request = NULL; -+ _rtw_spinlock_init(&pwdev_priv->scan_req_lock); -+ -+ pwdev_priv->p2p_enabled = _FALSE; -+ pwdev_priv->provdisc_req_issued = _FALSE; -+ rtw_wdev_invit_info_init(&pwdev_priv->invit_info); -+ rtw_wdev_nego_info_init(&pwdev_priv->nego_info); -+ -+ pwdev_priv->bandroid_scan = _FALSE; -+ -+ if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) -+ pwdev_priv->power_mgmt = _TRUE; -+ else -+ pwdev_priv->power_mgmt = _FALSE; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); -+ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); -+#endif -+ -+exit: -+ return ret; -+} -+ -+void rtw_wdev_free(struct wireless_dev *wdev) -+{ -+ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); -+ -+ if (!wdev) -+ return; -+ -+ rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); -+} -+ -+void rtw_wdev_unregister(struct wireless_dev *wdev) -+{ -+ struct net_device *ndev; -+ _adapter *adapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); -+ -+ if (!wdev) -+ return; -+ -+ if(!(ndev = wdev_to_ndev(wdev))) -+ return; -+ -+ adapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(adapter); -+ -+ rtw_cfg80211_indicate_scan_done(adapter, _TRUE); -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) || defined(COMPAT_KERNEL_RELEASE) -+ if (wdev->current_bss) { -+ DBG_871X(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter)); -+ cfg80211_disconnected(adapter->pnetdev, 0, NULL, 0, 0, GFP_ATOMIC); -+ } -+ #endif -+ -+ if (pwdev_priv->pmon_ndev) { -+ DBG_8192C("%s, unregister monitor interface\n", __func__); -+ unregister_netdev(pwdev_priv->pmon_ndev); -+ } -+} -+ -+int rtw_cfg80211_ndev_res_alloc(_adapter *adapter) -+{ -+ int ret = _FAIL; -+ -+#if !defined(RTW_SINGLE_WIPHY) -+ struct wiphy *wiphy; -+ struct device *dev = dvobj_to_dev(adapter_to_dvobj(adapter)); -+ -+ wiphy = rtw_wiphy_alloc(adapter, dev); -+ if (wiphy == NULL) -+ goto exit; -+ -+ adapter->wiphy = wiphy; -+#endif -+ -+ if (rtw_wdev_alloc(adapter, adapter_to_wiphy(adapter)) == 0) -+ ret = _SUCCESS; -+ -+#if !defined(RTW_SINGLE_WIPHY) -+ if (ret != _SUCCESS) { -+ rtw_wiphy_free(wiphy); -+ adapter->wiphy = NULL; -+ } -+#endif -+ -+exit: -+ return ret; -+} -+ -+void rtw_cfg80211_ndev_res_free(_adapter *adapter) -+{ -+ rtw_wdev_free(adapter->rtw_wdev); -+#if !defined(RTW_SINGLE_WIPHY) -+ rtw_wiphy_free(adapter_to_wiphy(adapter)); -+ adapter->wiphy = NULL; -+#endif -+} -+ -+int rtw_cfg80211_ndev_res_register(_adapter *adapter) -+{ -+ int ret = _FAIL; -+ -+#if !defined(RTW_SINGLE_WIPHY) -+ if (rtw_wiphy_register(adapter_to_wiphy(adapter)) < 0) { -+ DBG_871X("%s rtw_wiphy_register fail for if%d\n", __func__, (adapter->iface_id+1)); -+ goto exit; -+ } -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+void rtw_cfg80211_ndev_res_unregister(_adapter *adapter) -+{ -+ rtw_wdev_unregister(adapter->rtw_wdev); -+} -+ -+int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj) -+{ -+ int ret = _FAIL; -+ -+#if defined(RTW_SINGLE_WIPHY) -+ struct wiphy *wiphy; -+ struct device *dev = dvobj_to_dev(dvobj); -+ -+ wiphy = rtw_wiphy_alloc(dvobj->padapters[IFACE_ID0], dev); -+ if (wiphy == NULL) -+ goto exit; -+ -+ dvobj->wiphy = wiphy; -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj) -+{ -+#if defined(RTW_SINGLE_WIPHY) -+ rtw_wiphy_free(dvobj_to_wiphy(dvobj)); -+ dvobj->wiphy = NULL; -+#endif -+} -+ -+int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj) -+{ -+ int ret = _FAIL; -+ -+#if defined(RTW_SINGLE_WIPHY) -+ if (rtw_wiphy_register(dvobj_to_wiphy(dvobj)) != 0) -+ goto exit; -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj) -+{ -+#if defined(RTW_SINGLE_WIPHY) -+ rtw_wiphy_unregister(dvobj_to_wiphy(dvobj)); -+#endif -+} -+ -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ ++ sinfo->signal = psta->rssi; ++ ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, ++ struct bss_parameters *params) ++{ ++ u8 i; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++/* ++ DBG_8192C("use_cts_prot=%d\n", params->use_cts_prot); ++ DBG_8192C("use_short_preamble=%d\n", params->use_short_preamble); ++ DBG_8192C("use_short_slot_time=%d\n", params->use_short_slot_time); ++ DBG_8192C("ap_isolate=%d\n", params->ap_isolate); ++ ++ DBG_8192C("basic_rates_len=%d\n", params->basic_rates_len); ++ for(i=0; ibasic_rates_len; i++) ++ { ++ DBG_8192C("basic_rates=%d\n", params->basic_rates[i]); ++ ++ } ++*/ ++ return 0; ++ ++} ++ ++static int cfg80211_rtw_set_channel(struct wiphy *wiphy ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ , struct net_device *ndev ++ #endif ++ , struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) ++{ ++ int chan_target = (u8) ieee80211_frequency_to_channel(chan->center_freq); ++ int chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ int chan_width = CHANNEL_WIDTH_20; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ #endif ++ ++ switch (channel_type) { ++ case NL80211_CHAN_NO_HT: ++ case NL80211_CHAN_HT20: ++ chan_width = CHANNEL_WIDTH_20; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_HT40MINUS: ++ chan_width = CHANNEL_WIDTH_40; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ case NL80211_CHAN_HT40PLUS: ++ chan_width = CHANNEL_WIDTH_40; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ default: ++ chan_width = CHANNEL_WIDTH_20; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ set_channel_bwmode(padapter, chan_target, chan_offset, chan_width); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_monitor_channel(struct wiphy *wiphy ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ , struct cfg80211_chan_def *chandef ++#else ++ , struct ieee80211_channel *chan ++ , enum nl80211_channel_type channel_type ++#endif ++ ) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ struct ieee80211_channel *chan = chandef->chan; ++#endif ++ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ int target_channal = chan->hw_value; ++ int target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ int target_width = CHANNEL_WIDTH_20; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("center_freq %u Mhz ch %u width %u freq1 %u freq2 %u\n" ++ , chan->center_freq ++ , chan->hw_value ++ , chandef->width ++ , chandef->center_freq1 ++ , chandef->center_freq2); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ ++ switch (chandef->width) { ++ case NL80211_CHAN_WIDTH_20_NOHT: ++ case NL80211_CHAN_WIDTH_20: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_WIDTH_40: ++ target_width = CHANNEL_WIDTH_40; ++ if (chandef->center_freq1 > chan->center_freq) ++ target_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ else ++ target_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ case NL80211_CHAN_WIDTH_80: ++ target_width = CHANNEL_WIDTH_80; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_WIDTH_80P80: ++ target_width = CHANNEL_WIDTH_80_80; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_WIDTH_160: ++ target_width = CHANNEL_WIDTH_160; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) ++ case NL80211_CHAN_WIDTH_5: ++ case NL80211_CHAN_WIDTH_10: ++#endif ++ default: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++#else ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("center_freq %u Mhz ch %u channel_type %u\n" ++ , chan->center_freq ++ , chan->hw_value ++ , channel_type); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ ++ switch (channel_type) { ++ case NL80211_CHAN_NO_HT: ++ case NL80211_CHAN_HT20: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_HT40MINUS: ++ target_width = CHANNEL_WIDTH_40; ++ target_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ case NL80211_CHAN_HT40PLUS: ++ target_width = CHANNEL_WIDTH_40; ++ target_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ default: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++#endif ++ ++ set_channel_bwmode(padapter, target_channal, target_offset, target_width); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_auth_request *req) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_assoc_request *req) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_rx_probe_request(_adapter *adapter, u8 *frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(adapter); ++ freq = rtw_ch2freq(channel); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("RTW_Rx: probe request, cur_ch=%d\n", channel); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); ++} ++ ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ int type; ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(padapter); ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ #ifdef CONFIG_P2P ++ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ if (type >= 0) ++ goto indicate; ++ #endif ++ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++ ++indicate: ++ freq = rtw_ch2freq(channel); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ int type; ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(padapter); ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ #ifdef CONFIG_P2P ++ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ if (type >= 0) { ++ switch (type) { ++ case P2P_GO_NEGO_CONF: ++ case P2P_PROVISION_DISC_RESP: ++ case P2P_INVIT_RESP: ++ rtw_set_scan_deny(padapter, 2000); ++ rtw_clear_scan_deny(padapter); ++ } ++ goto indicate; ++ } ++ #endif ++ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++ ++indicate: ++ freq = rtw_ch2freq(channel); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg) ++{ ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(adapter); ++ ++ rtw_action_frame_parse(frame, frame_len, &category, &action); ++ ++ if (action == ACT_PUBLIC_GAS_INITIAL_REQ) { ++ rtw_set_scan_deny(adapter, 200); ++ rtw_scan_abort_no_wait(adapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_buddy_adapter_up(adapter)) ++ rtw_scan_abort_no_wait(adapter->pbuddy_adapter); ++ #endif ++ } ++ ++ freq = rtw_ch2freq(channel); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); ++#endif ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ if (msg) ++ DBG_871X("RTW_Rx:%s\n", msg); ++ else ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++} ++ ++#ifdef CONFIG_P2P ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) ++{ ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++ u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; ++ uint p2p_ielen = 0; ++ uint wpsielen = 0; ++ u32 devinfo_contentlen = 0; ++ u8 devinfo_content[64] = { 0x00 }; ++ u16 capability = 0; ++ uint capability_len = 0; ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = 1; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_REQ; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ ++ //prepare for building provision_request frame ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ ++ rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); ++ rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ switch(wps_devicepassword_id) ++ { ++ case WPS_DPID_PIN: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; ++ break; ++ case WPS_DPID_USER_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; ++ break; ++ case WPS_DPID_MACHINE_SPEC: ++ break; ++ case WPS_DPID_REKEY: ++ break; ++ case WPS_DPID_PBC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ break; ++ case WPS_DPID_REGISTRAR_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; ++ break; ++ default: ++ break; ++ } ++ ++ ++ if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) ++ { ++ ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); ++ ++ } ++ ++ ++ //start to build provision_request frame ++ _rtw_memset(wpsie, 0, sizeof(wpsie)); ++ _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); ++ p2p_ielen = 0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //build_prov_disc_request_p2p_ie ++ // P2P OUI ++ p2pielen = 0; ++ p2p_ie[ p2pielen++ ] = 0x50; ++ p2p_ie[ p2pielen++ ] = 0x6F; ++ p2p_ie[ p2pielen++ ] = 0x9A; ++ p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110301 ++ // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Device Info ++ // 3. Group ID ( When joining an operating P2P Group ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Group Capability Bitmap, 1 byte ++ _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); ++ p2pielen += 2; ++ ++ ++ // Device Info ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); ++ p2pielen += devinfo_contentlen; ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); ++ //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); ++ //pframe += p2pielen; ++ pattrib->pktlen += p2p_ielen; ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ //dump_mgntframe(padapter, pmgntframe); ++ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) ++ DBG_8192C("%s, ack to\n", __func__); ++ ++ //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) ++ //{ ++ // DBG_8192C("waiting for p2p peer key-in PIN CODE\n"); ++ // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. ++ //} ++ ++} ++ ++static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ struct ieee80211_channel * channel, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ enum nl80211_channel_type channel_type, ++#endif ++ unsigned int duration, u64 *cookie) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ s32 err = 0; ++ u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); ++ u8 ready_on_channel = _FALSE; ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct mlme_ext_priv *pmlmeext; ++ struct wifidirect_info *pwdinfo; ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo; ++ u8 is_p2p_find = _FALSE; ++ ++#ifndef CONFIG_RADIO_WORK ++ #define RTW_ROCH_DURATION_ENLARGE ++ #define RTW_ROCH_BACK_OP ++#endif ++ ++ if (ndev == NULL) { ++ return -EINVAL; ++ } ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ pmlmeext = &padapter->mlmeextpriv; ++ pwdinfo = &padapter->wdinfo; ++ pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ #ifdef CONFIG_CONCURRENT_MODE ++ is_p2p_find=(duration < (pwdinfo->ext_listen_interval))? _TRUE : _FALSE; ++ #endif ++ ++ *cookie = ATOMIC_INC_RETURN(&pcfg80211_wdinfo->ro_ch_cookie_gen); ++ ++ DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d, cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), remain_ch, duration, *cookie); ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (padapter->registrypriv.mp_mode == 1) { ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block remain_on_channel request\n", FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) { ++ if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) { ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block remain_on_channel request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ } ++#endif ++#endif ++ ++ if(pcfg80211_wdinfo->is_ro_ch == _TRUE) ++ { ++ DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ #ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++ #endif //CONFIG_CONCURRENT_MODE ++ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); ++ } ++ ++ pcfg80211_wdinfo->is_ro_ch = _TRUE; ++ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ pcfg80211_wdinfo->remain_on_ch_type= channel_type; ++ #endif ++ pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; ++ ++ rtw_scan_abort(padapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ if ((rtw_buddy_adapter_up(padapter)) && is_p2p_find) //don't scan_abort during p2p_listen. ++ rtw_scan_abort(padapter->pbuddy_adapter); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) ++ { ++ DBG_871X("mlme state:0x%x\n", get_fwstate(&padapter->mlmepriv)); ++ remain_ch = padapter->mlmeextpriv.cur_channel; ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) ++ { ++ DBG_871X("buddy_intf's mlme state:0x%x\n", get_fwstate(&(padapter->pbuddy_adapter->mlmepriv))); ++ remain_ch = padapter->pbuddy_adapter->mlmeextpriv.cur_channel; ++ } ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++ //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ adapter_wdev_data(padapter)->p2p_enabled = _TRUE; ++ padapter->wdinfo.listen_channel = remain_ch; ++ } else if (rtw_p2p_chk_state(pwdinfo , P2P_STATE_LISTEN)) { ++ padapter->wdinfo.listen_channel = remain_ch; ++ } else { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ ++ #ifdef RTW_ROCH_DURATION_ENLARGE ++ if (duration < 400) ++ duration = duration * 3; /* extend from exper */ ++ #endif ++ ++#ifdef RTW_ROCH_BACK_OP ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_LINKED)) { ++ if (is_p2p_find) /* p2p_find , duration<1000 */ ++ duration = duration + pwdinfo->ext_listen_interval; ++ else /* p2p_listen, duration=5000 */ ++ duration = pwdinfo->ext_listen_interval + (pwdinfo->ext_listen_interval / 4); ++ } ++#endif ++#endif /* RTW_ROCH_BACK_OP */ ++ ++ pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter); ++ ++ if(rtw_ch_set_search_ch(pmlmeext->channel_set, remain_ch) >= 0) { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED) ) ++ { ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ if((remain_ch != pbuddy_mlmeext->cur_channel) && !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ if(ATOMIC_READ(&pwdev_priv->switch_ch_to)==1 || ++ (remain_ch != pmlmeext->cur_channel)) ++ { ++ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) { ++ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ } ++ ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); ++ ++ #ifdef RTW_ROCH_BACK_OP ++ DBG_8192C("%s, set switch ch timer, duration=%d\n", __func__, duration-pwdinfo->ext_listen_interval); ++ _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval); ++ #endif ++ } ++ } ++ ++ ready_on_channel = _TRUE; ++ //pmlmeext->cur_channel = remain_ch; ++ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ }else ++#endif //CONFIG_CONCURRENT_MODE ++ if(remain_ch != rtw_get_oper_ch(padapter) ) ++ { ++ ready_on_channel = _TRUE; ++ //pmlmeext->cur_channel = remain_ch; ++ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ } ++ } else { ++ DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); ++ } ++ ++ ++ //call this after other things have been done ++#ifdef CONFIG_CONCURRENT_MODE ++ if(ATOMIC_READ(&pwdev_priv->ro_ch_to)==1 || ++ (remain_ch != rtw_get_oper_ch(padapter))) ++ { ++ u8 co_channel = 0xff; ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 0); ++#endif ++ ++ if(ready_on_channel == _TRUE) ++ { ++ if ( !check_fwstate(&padapter->mlmepriv, _FW_LINKED ) ) ++ { ++ pmlmeext->cur_channel = remain_ch; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ co_channel = rtw_get_oper_ch(padapter); ++ ++ if(co_channel !=remain_ch) ++#endif ++ { ++ //if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) ++ set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ } ++ } ++ } ++ DBG_8192C("%s, set ro ch timer, duration=%d\n", __func__, duration); ++ _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ } ++#endif ++ ++ rtw_cfg80211_ready_on_channel(padapter, *cookie, channel, channel_type, duration, GFP_KERNEL); ++ ++exit: ++ if (err) { ++ pcfg80211_wdinfo->is_ro_ch = _FALSE; ++ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); ++ } ++ ++ return err; ++} ++ ++static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ u64 cookie) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ s32 err = 0; ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct wifidirect_info *pwdinfo; ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo; ++ ++ if (ndev == NULL) { ++ err = -EINVAL; ++ goto exit; ++ } ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ pwdinfo = &padapter->wdinfo; ++ pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ DBG_871X(FUNC_ADPT_FMT" cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), cookie); ++ ++ if (pcfg80211_wdinfo->is_ro_ch == _TRUE) { ++ DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ #ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++ #endif ++ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); ++ } ++ ++ #if 0 ++ // Disable P2P Listen State ++ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); ++ } ++ } ++ else ++ #endif ++ { ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ pcfg80211_wdinfo->is_ro_ch = _FALSE; ++ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); ++ ++exit: ++ return err; ++} ++ ++#endif //CONFIG_P2P ++ ++static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, size_t len, int wait_ack) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ int ret = _FAIL; ++ bool ack = _TRUE; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ //struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ rtw_set_scan_deny(padapter, 1000); ++ ++ rtw_scan_abort(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ #endif /* CONFIG_CONCURRENT_MODE */ ++#ifdef CONFIG_P2P ++ if (padapter->cfg80211_wdinfo.is_ro_ch == _TRUE) { ++ //DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ //_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ //padapter->cfg80211_wdinfo.is_ro_ch = _FALSE; ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ { ++ DBG_8192C("%s, extend ro ch time\n", __func__); ++ _set_timer( &padapter->cfg80211_wdinfo.remain_on_ch_timer, pwdinfo->ext_listen_period); ++ } ++ #endif //CONFIG_CONCURRENT_MODE ++ } ++#endif //CONFIG_P2P ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_LINKED )) { ++ u8 co_channel=0xff; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ co_channel = rtw_get_oper_ch(padapter); ++ ++ if (tx_ch != pbuddy_mlmeext->cur_channel) { ++ ++ u16 ext_listen_period; ++ ++ if (ATOMIC_READ(&pwdev_priv->switch_ch_to)==1) { ++ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) { ++ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ } ++ ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); ++ ++ //DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, pwdinfo->ext_listen_period); ++ //_set_timer(&pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period); ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ { ++ ext_listen_period = 500;// 500ms ++ } ++ else ++ { ++ ext_listen_period = pwdinfo->ext_listen_period; ++ } ++ ++ DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, ext_listen_period); ++ _set_timer(&pwdinfo->ap_p2p_switch_timer, ext_listen_period); ++ ++ } ++ ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ pmlmeext->cur_channel = tx_ch; ++ ++ if (tx_ch != co_channel) ++ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ }else ++#endif //CONFIG_CONCURRENT_MODE ++ //if (tx_ch != pmlmeext->cur_channel) { ++ if(tx_ch != rtw_get_oper_ch(padapter)) { ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ pmlmeext->cur_channel = tx_ch; ++ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ } ++ ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ //ret = -ENOMEM; ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++#ifdef CONFIG_P2P ++ rtw_xframe_chk_wfd_ie(pmgntframe); ++#endif /* CONFIG_P2P */ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ if (wait_ack) { ++ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) { ++ ack = _FALSE; ++ ret = _FAIL; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ack == _FAIL\n", __func__); ++#endif ++ } else { ++ ++#ifdef CONFIG_XMIT_ACK ++ rtw_msleep_os(50); ++#endif ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ack=%d, ok!\n", __func__, ack); ++#endif ++ ret = _SUCCESS; ++ } ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++exit: ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ret=%d\n", __func__, ret); ++ #endif ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) ++ struct ieee80211_channel *chan, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ bool offchan, ++ #endif ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ enum nl80211_channel_type channel_type, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ bool channel_type_valid, ++ #endif ++ #endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ unsigned int wait, ++ #endif ++ const u8 *buf, size_t len, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ bool no_cck, ++ #endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) ++ bool dont_wait_for_ack, ++ #endif ++#else ++ struct cfg80211_mgmt_tx_params *params, ++#endif ++ u64 *cookie) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) ++ struct ieee80211_channel *chan = params->chan; ++ bool offchan = params->offchan; ++ unsigned int wait = params->wait; ++ const u8 *buf = params->buf; ++ size_t len = params->len; ++ bool no_cck = params->no_cck; ++ bool dont_wait_for_ack = params->dont_wait_for_ack; ++#endif ++ int ret = 0; ++ int tx_ret; ++ int wait_ack = 1; ++ u32 dump_limit = RTW_MAX_MGMT_TX_CNT; ++ u32 dump_cnt = 0; ++ bool ack = _TRUE; ++ u8 tx_ch; ++ u8 category, action; ++ u8 frame_styp; ++ int type = (-1); ++ u32 start = rtw_get_current_time(); ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ if ((ndev == NULL) || (chan == NULL)) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ ++ /* cookie generation */ ++ *cookie = (unsigned long) buf; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT" len=%zu, ch=%d" ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ ", ch_type=%d" ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ ", channel_type_valid=%d" ++ #endif ++ #endif ++ "\n", FUNC_ADPT_ARG(padapter), ++ len, tx_ch ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ , channel_type ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ , channel_type_valid ++ #endif ++ #endif ++ ); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ ++ /* indicate ack before issue frame to avoid racing with rsp frame */ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL); ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL); ++#endif ++ ++ frame_styp = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl) & IEEE80211_FCTL_STYPE; ++ if (IEEE80211_STYPE_PROBE_RESP == frame_styp) { ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("RTW_Tx: probe_resp tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ wait_ack = 0; ++ goto dump; ++ } ++ ++ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { ++ DBG_8192C(FUNC_ADPT_FMT" frame_control:0x%x\n", FUNC_ADPT_ARG(padapter), ++ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); ++ goto exit; ++ } ++ ++ DBG_8192C("RTW_Tx:tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); ++ #ifdef CONFIG_P2P ++ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) { ++ goto dump; ++ } ++ #endif ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) ++ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); ++ else ++ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); ++ ++dump: ++ ++ rtw_ps_deny(padapter, PS_DENY_MGNT_TX); ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret = -EFAULT; ++ goto cancel_ps_deny; ++ } ++ ++ while (1) { ++ u32 sleep_ms = 0; ++ u32 retry_guarantee_ms = 0; ++ ++ dump_cnt++; ++ tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len, wait_ack); ++ ++ switch (action) { ++ case ACT_PUBLIC_GAS_INITIAL_REQ: ++ case ACT_PUBLIC_GAS_INITIAL_RSP: ++ sleep_ms = 50; ++ retry_guarantee_ms = RTW_MAX_MGMT_TX_MS_GAS; ++ } ++ ++ if (tx_ret == _SUCCESS ++ || (dump_cnt >= dump_limit && rtw_get_passing_time_ms(start) >= retry_guarantee_ms)) ++ break; ++ ++ if (sleep_ms > 0) ++ rtw_msleep_os(sleep_ms); ++ } ++ ++ if (tx_ret != _SUCCESS || dump_cnt > 1) { ++ DBG_871X(FUNC_ADPT_FMT" %s (%d/%d) in %d ms\n", FUNC_ADPT_ARG(padapter), ++ tx_ret==_SUCCESS?"OK":"FAIL", dump_cnt, dump_limit, rtw_get_passing_time_ms(start)); ++ } ++ ++ switch (type) { ++ case P2P_GO_NEGO_CONF: ++ rtw_clear_scan_deny(padapter); ++ break; ++ case P2P_INVIT_RESP: ++ if (pwdev_priv->invit_info.flags & BIT(0) ++ && pwdev_priv->invit_info.status == 0) ++ { ++ DBG_871X(FUNC_ADPT_FMT" agree with invitation of persistent group\n", ++ FUNC_ADPT_ARG(padapter)); ++ rtw_set_scan_deny(padapter, 5000); ++ rtw_pwr_wakeup_ex(padapter, 5000); ++ rtw_clear_scan_deny(padapter); ++ } ++ break; ++ } ++ ++cancel_ps_deny: ++ rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); ++exit: ++ return ret; ++} ++ ++static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ u16 frame_type, bool reg) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ _adapter *adapter; ++ ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ if (ndev == NULL) ++ goto exit; ++ ++ adapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(adapter); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT" frame_type:%x, reg:%d\n", FUNC_ADPT_ARG(adapter), ++ frame_type, reg); ++#endif ++ ++ /* Wait QC Verify */ ++ return; ++ ++ switch (frame_type) { ++ case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ ++ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); ++ break; ++ case IEEE80211_STYPE_ACTION: /* 0x00D0 */ ++ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); ++ break; ++ default: ++ break; ++ } ++ ++exit: ++ return; ++} ++ ++#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, ++ struct net_device *ndev, ++ u8 *peer, ++ u8 action_code, ++ u8 dialog_token, ++ u16 status_code, ++ const u8 *buf, ++ size_t len) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ int ret = 0; ++ struct tdls_txmgmt txmgmt; ++ ++ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { ++ DBG_871X("Discard tdls action:%d, since hal doesn't support tdls\n", action_code); ++ goto discard; ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ DBG_871X("Discard tdls action:%d, let driver to set up direct link\n", action_code); ++ goto discard; ++ } ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); ++ txmgmt.action_code = action_code; ++ txmgmt.dialog_token= dialog_token; ++ txmgmt.status_code = status_code; ++ txmgmt.len = len; ++ txmgmt.buf = (u8 *)rtw_malloc(txmgmt.len); ++ if (txmgmt.buf == NULL) { ++ ret = -ENOMEM; ++ goto bad; ++ } ++ _rtw_memcpy(txmgmt.buf, (void*)buf, txmgmt.len); ++ ++/* Debug purpose */ ++#if 1 ++ DBG_871X("%s %d\n", __FUNCTION__, __LINE__); ++ DBG_871X("peer:"MAC_FMT", action code:%d, dialog:%d, status code:%d\n", ++ MAC_ARG(txmgmt.peer), txmgmt.action_code, ++ txmgmt.dialog_token, txmgmt.status_code); ++ if (txmgmt.len > 0) { ++ int i=0; ++ for(;i < len; i++) ++ printk("%02x ", *(txmgmt.buf+i)); ++ DBG_871X("len:%d\n", txmgmt.len); ++ } ++#endif ++ ++ switch (txmgmt.action_code) { ++ case TDLS_SETUP_REQUEST: ++ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); ++ break; ++ case TDLS_SETUP_RESPONSE: ++ issue_tdls_setup_rsp(padapter, &txmgmt); ++ break; ++ case TDLS_SETUP_CONFIRM: ++ issue_tdls_setup_cfm(padapter, &txmgmt); ++ break; ++ case TDLS_TEARDOWN: ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); ++ break; ++ case TDLS_DISCOVERY_REQUEST: ++ issue_tdls_dis_req(padapter, &txmgmt); ++ break; ++ case TDLS_DISCOVERY_RESPONSE: ++ issue_tdls_dis_rsp(padapter, &txmgmt, pmlmeinfo->enc_algo? _TRUE : _FALSE); ++ break; ++ } ++ ++bad: ++ if (txmgmt.buf) ++ rtw_mfree(txmgmt.buf, txmgmt.len); ++ ++discard: ++ return ret; ++} ++ ++static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, ++ struct net_device *ndev, ++ u8 *peer, ++ enum nl80211_tdls_operation oper) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct tdls_txmgmt txmgmt; ++ struct sta_info *ptdls_sta = NULL; ++ ++ DBG_871X(FUNC_NDEV_FMT", nl80211_tdls_operation:%d\n", FUNC_NDEV_ARG(ndev), oper); ++ ++ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { ++ DBG_871X("Discard tdls oper:%d, since hal doesn't support tdls\n", oper); ++ return 0; ++ } ++ ++#ifdef CONFIG_LPS ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); ++#endif //CONFIG_LPS ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ if (peer) ++ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ /* these two cases are done by driver itself */ ++ if (oper == NL80211_TDLS_ENABLE_LINK || oper == NL80211_TDLS_DISABLE_LINK) ++ return 0; ++ } ++ ++ switch (oper) { ++ case NL80211_TDLS_DISCOVERY_REQ: ++ issue_tdls_dis_req(padapter, &txmgmt); ++ break; ++ case NL80211_TDLS_SETUP: ++#ifdef CONFIG_WFD ++ if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) { ++ if ( padapter->wdinfo.wfd_tdls_weaksec == _TRUE) ++ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); ++ else ++ DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); ++ } else ++#endif // CONFIG_WFD ++ { ++ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); ++ } ++ break; ++ case NL80211_TDLS_TEARDOWN: ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); ++ if (ptdls_sta != NULL) { ++ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); ++ }else { ++ DBG_871X( "TDLS peer not found\n"); ++ } ++ break; ++ case NL80211_TDLS_ENABLE_LINK: ++ DBG_871X(FUNC_NDEV_FMT", NL80211_TDLS_ENABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); ++ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), peer); ++ if (ptdls_sta != NULL) { ++ ptdlsinfo->link_established = _TRUE; ++ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; ++ ptdls_sta->state |= _FW_LINKED; ++ rtw_tdls_cmd(padapter, txmgmt.peer, TDLS_ESTABLISHED); ++ } ++ break; ++ case NL80211_TDLS_DISABLE_LINK: ++ DBG_871X(FUNC_NDEV_FMT", NL80211_TDLS_DISABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); ++ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), peer); ++ if (ptdls_sta != NULL) { ++ rtw_tdls_cmd(padapter, peer, TDLS_TEAR_STA ); ++ } ++ break; ++ } ++ return 0; ++} ++#endif /* CONFIG_TDLS */ ++ ++#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) ++static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, ++ struct net_device *dev, ++ struct cfg80211_sched_scan_request *request) { ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 ret; ++ ++ if (padapter->bup == _FALSE) { ++ DBG_871X("%s: net device is down.\n", __func__); ++ return -EIO; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE || ++ check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE || ++ check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_871X("%s: device is busy.\n", __func__); ++ rtw_scan_abort(padapter); ++ } ++ ++ if (request == NULL) { ++ DBG_871X("%s: invalid cfg80211_requests parameters.\n", __func__); ++ return -EINVAL; ++ } ++ ++ ret = rtw_android_cfg80211_pno_setup(dev, request->ssids, ++ request->n_ssids, request->interval); ++ ++ if (ret < 0) { ++ DBG_871X("%s ret: %d\n", __func__, ret); ++ goto exit; ++ } ++ ++ ret = rtw_android_pno_enable(dev, _TRUE); ++ if (ret < 0) { ++ DBG_871X("%s ret: %d\n", __func__, ret); ++ goto exit; ++ } ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_sched_scan_stop(struct wiphy *wiphy, ++ struct net_device *dev) { ++ return rtw_android_pno_enable(dev, _FALSE); ++} ++#endif /* CONFIG_PNO_SUPPORT */ ++ ++static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ DBG_871X(FUNC_NDEV_FMT" ielen=%d\n", FUNC_NDEV_ARG(ndev), len); ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->wps_beacon_ie_len; ++ pmlmepriv->wps_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); ++ pmlmepriv->wps_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_beacon_ie_len = wps_ielen; ++ ++ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); ++ ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_beacon_ie_len; ++ pmlmepriv->p2p_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); ++ pmlmepriv->p2p_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_beacon_ie_len = p2p_ielen; ++ ++ } ++ #endif //CONFIG_P2P ++ ++ ++ #ifdef CONFIG_WFD ++ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_BEACON_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ return -EINVAL; ++ } ++ #endif /* CONFIG_WFD */ ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ uint attr_contentlen = 0; ++ u16 uconfig_method, *puconfig_method = NULL; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ u8 sr = 0; ++ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if (sr != 0) ++ { ++ DBG_871X("%s, got sr\n", __func__); ++ } ++ else ++ { ++ DBG_8192C("GO mode process WPS under site-survey, sr no set\n"); ++ return ret; ++ } ++ } ++ ++ if(pmlmepriv->wps_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_resp_ie_len; ++ pmlmepriv->wps_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode ++ if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) ++ { ++ //struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); ++ #endif ++ ++ //if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ if(wdev->iftype != NL80211_IFTYPE_P2P_GO) //for WIFI-DIRECT LOGO 4.2.2, AUTO GO can't set PUSH_BUTTON flags ++ { ++ uconfig_method = WPS_CM_PUSH_BUTTON; ++ uconfig_method = cpu_to_be16( uconfig_method ); ++ ++ *puconfig_method |= uconfig_method; ++ } ++ #endif ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_resp_ie_len = wps_ielen; ++ ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ u8 is_GO = _FALSE; ++ u32 attr_contentlen = 0; ++ u16 cap_attr=0; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ //Check P2P Capability ATTR ++ if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) ++ { ++ u8 grp_cap=0; ++ //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); ++ cap_attr = le16_to_cpu(cap_attr); ++ grp_cap = (u8)((cap_attr >> 8)&0xff); ++ ++ is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; ++ ++ if(is_GO) ++ DBG_8192C("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); ++ } ++ ++ ++ if(is_GO == _FALSE) ++ { ++ if(pmlmepriv->p2p_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; ++ pmlmepriv->p2p_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; ++ } ++ else ++ { ++ if(pmlmepriv->p2p_go_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; ++ pmlmepriv->p2p_go_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); ++ pmlmepriv->p2p_go_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; ++ } ++ ++ } ++ #endif //CONFIG_P2P ++ ++ ++ #ifdef CONFIG_WFD ++ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_RESP_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ return -EINVAL; ++ } ++ #endif /* CONFIG_WFD */ ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 *ie; ++ u32 ie_len; ++ ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++ ++ if (len <= 0) ++ goto exit; ++ ++ ie = rtw_get_wps_ie(buf, len, NULL, &ie_len); ++ if (ie && ie_len) { ++ if (pmlmepriv->wps_assoc_resp_ie) { ++ u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; ++ ++ pmlmepriv->wps_assoc_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); ++ if (pmlmepriv->wps_assoc_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, ie, ie_len); ++ pmlmepriv->wps_assoc_resp_ie_len = ie_len; ++ } ++ ++ ie = rtw_get_p2p_ie(buf, len, NULL, &ie_len); ++ if (ie && ie_len) { ++ if (pmlmepriv->p2p_assoc_resp_ie) { ++ u32 free_len = pmlmepriv->p2p_assoc_resp_ie_len; ++ ++ pmlmepriv->p2p_assoc_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_assoc_resp_ie, free_len); ++ pmlmepriv->p2p_assoc_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_assoc_resp_ie = rtw_malloc(ie_len); ++ if (pmlmepriv->p2p_assoc_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ _rtw_memcpy(pmlmepriv->p2p_assoc_resp_ie, ie, ie_len); ++ pmlmepriv->p2p_assoc_resp_ie_len = ie_len; ++ } ++ ++#ifdef CONFIG_WFD ++ ie = rtw_get_wfd_ie(buf, len, NULL, &ie_len); ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_RESP_IE, ie, ie_len) != _SUCCESS) ++ return -EINVAL; ++#endif ++ ++exit: ++ return ret; ++} ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, ++ int type) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u32 p2p_ielen = 0; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if( (rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) ++ #ifdef CONFIG_P2P ++ || (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) ++ #endif ++ ) ++ { ++ if (net != NULL) ++ { ++ switch (type) ++ { ++ case 0x1: //BEACON ++ ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); ++ break; ++ case 0x2: //PROBE_RESP ++ ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); ++ break; ++ case 0x4: //ASSOC_RESP ++ ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); ++ break; ++ } ++ } ++ } ++ ++ return ret; ++ ++} ++ ++static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ u8 stbc_rx_enable = _FALSE; ++ ++ rtw_ht_use_default_setting(padapter); ++ ++ /* RX LDPC */ ++ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX)) ++ ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; ++ ++ /* TX STBC */ ++ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) ++ ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; ++ ++ /* RX STBC */ ++ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) { ++ /*rtw_rx_stbc 0: disable, bit(0):enable 2.4g, bit(1):enable 5g*/ ++ if (IEEE80211_BAND_2GHZ == band) ++ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(0))?_TRUE:_FALSE; ++ if (IEEE80211_BAND_5GHZ == band) ++ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(1))?_TRUE:_FALSE; ++ ++ if (stbc_rx_enable) { ++ switch (rf_type) { ++ case RF_1T1R: ++ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/*RX STBC One spatial stream*/ ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ ++ break; ++ case RF_3T3R: ++ case RF_3T4R: ++ case RF_4T4R: ++ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ ++ break; ++ default: ++ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); ++ break; ++ } ++ } ++ } ++} ++ ++static void rtw_cfg80211_init_ht_capab(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) ++{ ++#define MAX_BIT_RATE_40MHZ_MCS23 450 /* Mbps */ ++#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ ++#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ ++ ++ ht_cap->ht_supported = _TRUE; ++ ++ ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | ++ IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; ++ rtw_cfg80211_init_ht_capab_ex(padapter, ht_cap, band, rf_type); ++ ++ /* ++ *Maximum length of AMPDU that the STA can receive. ++ *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) ++ */ ++ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; ++ ++ /*Minimum MPDU start spacing , */ ++ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; ++ ++ ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; ++ ++ /* ++ *hw->wiphy->bands[IEEE80211_BAND_2GHZ] ++ *base on ant_num ++ *rx_mask: RX mask ++ *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 ++ *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 ++ *if rx_ant >=3 rx_mask[2]=0xff; ++ *if BW_40 rx_mask[4]=0x01; ++ *highest supported RX rate ++ */ ++ if (rf_type == RF_1T1R) { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; ++ } else if ((rf_type == RF_1T2R) || (rf_type == RF_2T2R) || (rf_type == RF_2T2R_GREEN)) { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0xFF; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; ++ } else if ((rf_type == RF_2T3R) || (rf_type == RF_3T3R)) { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0xFF; ++ ht_cap->mcs.rx_mask[2] = 0xFF; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS23; ++ } else { ++ rtw_warn_on(1); ++ DBG_8192C("%s, error rf_type=%d\n", __func__, rf_type); ++ } ++ ++} ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter) ++{ ++ u8 rf_type; ++ struct ieee80211_supported_band *bands; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = pwdev->wiphy; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ DBG_8192C("%s:rf_type=%d\n", __func__, rf_type); ++ ++ if (IsSupported24G(padapter->registrypriv.wireless_mode)) { ++ bands = wiphy->bands[IEEE80211_BAND_2GHZ]; ++ if(bands) ++ rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); ++ } ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ if (IsSupported5G(padapter->registrypriv.wireless_mode)) { ++ bands = wiphy->bands[IEEE80211_BAND_5GHZ]; ++ if(bands) ++ rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); ++ } ++#endif ++ /* init regulary domain */ ++ rtw_regd_init(padapter); ++ ++ /* copy mac_addr to wiphy */ ++ _rtw_memcpy(wiphy->perm_addr, adapter_mac_addr(padapter), ETH_ALEN); ++ ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++struct ieee80211_iface_limit rtw_limits[] = { ++ { .max = 2, ++ .types = BIT(NL80211_IFTYPE_STATION) ++ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_CLIENT) ++ #endif ++ }, ++ #ifdef CONFIG_AP_MODE ++ { .max = 1, ++ .types = BIT(NL80211_IFTYPE_AP) ++ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_GO) ++ #endif ++ }, ++ #endif ++}; ++ ++struct ieee80211_iface_combination rtw_combinations[] = { ++ { .limits = rtw_limits, ++ .n_limits = ARRAY_SIZE(rtw_limits), ++ .max_interfaces = 2, ++ .num_different_channels = 1, ++ }, ++}; ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) */ ++ ++static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct registry_priv *regsty = dvobj_to_regsty(dvobj); ++ ++ wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; ++ ++ wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; ++ wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; ++ wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; ++#endif ++ ++ wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) ++ | BIT(NL80211_IFTYPE_ADHOC) ++#ifdef CONFIG_AP_MODE ++ | BIT(NL80211_IFTYPE_AP) ++ #ifdef CONFIG_WIFI_MONITOR ++ | BIT(NL80211_IFTYPE_MONITOR) ++ #endif ++#endif ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_CLIENT) ++ | BIT(NL80211_IFTYPE_P2P_GO) ++#endif ++ ; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++#ifdef CONFIG_AP_MODE ++ wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; ++#endif //CONFIG_AP_MODE ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) ++ #ifdef CONFIG_WIFI_MONITOR ++ wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR); ++ #endif ++#endif ++ ++ #if defined(RTW_SINGLE_WIPHY) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++ wiphy->iface_combinations = rtw_combinations; ++ wiphy->n_iface_combinations = ARRAY_SIZE(rtw_combinations); ++ #endif ++ ++ wiphy->cipher_suites = rtw_cipher_suites; ++ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); ++ ++ if (IsSupported24G(adapter->registrypriv.wireless_mode)) ++ wiphy->bands[IEEE80211_BAND_2GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_2GHZ); ++ ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ if (IsSupported5G(adapter->registrypriv.wireless_mode)) ++ wiphy->bands[IEEE80211_BAND_5GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_5GHZ); ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) && LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)) ++ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) ++ wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; ++ wiphy->flags |= WIPHY_FLAG_HAVE_AP_SME; ++ /* remove WIPHY_FLAG_OFFCHAN_TX, because we not support this feature */ ++ /* wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; */ ++#endif ++ ++#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)) ++ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; ++#else // KERNEL_VERSION >= 4.12 ++ wiphy->max_sched_scan_reqs = 1; ++#endif ++#ifdef CONFIG_PNO_SUPPORT ++ wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; ++#endif ++#endif ++ ++#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0)) ++ wiphy->wowlan = wowlan_stub; ++#else ++ wiphy->wowlan = &wowlan_stub; ++#endif ++#endif ++ ++#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; ++#ifndef CONFIG_TDLS_DRIVER_SETUP ++ wiphy->flags |= WIPHY_FLAG_TDLS_EXTERNAL_SETUP; //Driver handles key exchange ++ wiphy->flags |= NL80211_ATTR_HT_CAPABILITY; ++#endif //CONFIG_TDLS_DRIVER_SETUP ++#endif /* CONFIG_TDLS */ ++ ++ if (regsty->power_mgnt != PS_MODE_ACTIVE) ++ wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; ++ else ++ wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ //wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; ++#endif ++} ++ ++static struct cfg80211_ops rtw_cfg80211_ops = { ++ .change_virtual_intf = cfg80211_rtw_change_iface, ++ .add_key = cfg80211_rtw_add_key, ++ .get_key = cfg80211_rtw_get_key, ++ .del_key = cfg80211_rtw_del_key, ++ .set_default_key = cfg80211_rtw_set_default_key, ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) ++ .set_rekey_data = cfg80211_rtw_set_rekey_data, ++#endif /*CONFIG_GTK_OL*/ ++ .get_station = cfg80211_rtw_get_station, ++ .scan = cfg80211_rtw_scan, ++ .set_wiphy_params = cfg80211_rtw_set_wiphy_params, ++ .connect = cfg80211_rtw_connect, ++ .disconnect = cfg80211_rtw_disconnect, ++ .join_ibss = cfg80211_rtw_join_ibss, ++ .leave_ibss = cfg80211_rtw_leave_ibss, ++ .set_tx_power = cfg80211_rtw_set_txpower, ++ .get_tx_power = cfg80211_rtw_get_txpower, ++ .set_power_mgmt = cfg80211_rtw_set_power_mgmt, ++ .set_pmksa = cfg80211_rtw_set_pmksa, ++ .del_pmksa = cfg80211_rtw_del_pmksa, ++ .flush_pmksa = cfg80211_rtw_flush_pmksa, ++ ++#ifdef CONFIG_AP_MODE ++ .add_virtual_intf = cfg80211_rtw_add_virtual_intf, ++ .del_virtual_intf = cfg80211_rtw_del_virtual_intf, ++ ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) ++ .add_beacon = cfg80211_rtw_add_beacon, ++ .set_beacon = cfg80211_rtw_set_beacon, ++ .del_beacon = cfg80211_rtw_del_beacon, ++ #else ++ .start_ap = cfg80211_rtw_start_ap, ++ .change_beacon = cfg80211_rtw_change_beacon, ++ .stop_ap = cfg80211_rtw_stop_ap, ++ #endif ++ ++ .add_station = cfg80211_rtw_add_station, ++ .del_station = cfg80211_rtw_del_station, ++ .change_station = cfg80211_rtw_change_station, ++ .dump_station = cfg80211_rtw_dump_station, ++ .change_bss = cfg80211_rtw_change_bss, ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) ++ .set_channel = cfg80211_rtw_set_channel, ++ #endif ++ //.auth = cfg80211_rtw_auth, ++ //.assoc = cfg80211_rtw_assoc, ++#endif //CONFIG_AP_MODE ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) ++ .set_monitor_channel = cfg80211_rtw_set_monitor_channel, ++#endif ++ ++#ifdef CONFIG_P2P ++ .remain_on_channel = cfg80211_rtw_remain_on_channel, ++ .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ .mgmt_tx = cfg80211_rtw_mgmt_tx, ++ .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ .action = cfg80211_rtw_mgmt_tx, ++#endif ++ ++#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ .tdls_mgmt = cfg80211_rtw_tdls_mgmt, ++ .tdls_oper = cfg80211_rtw_tdls_oper, ++#endif /* CONFIG_TDLS */ ++ ++#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) ++ .sched_scan_start = cfg80211_rtw_sched_scan_start, ++ .sched_scan_stop = cfg80211_rtw_sched_scan_stop, ++#endif /* CONFIG_PNO_SUPPORT */ ++}; ++ ++struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev) ++{ ++ struct wiphy *wiphy; ++ struct rtw_wiphy_data *wiphy_data; ++ ++ /* wiphy */ ++ wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(_adapter*)); ++ if (!wiphy) { ++ DBG_8192C("Couldn't allocate wiphy device\n"); ++ goto exit; ++ } ++ set_wiphy_dev(wiphy, dev); ++ *((_adapter**)wiphy_priv(wiphy)) = padapter; ++ ++ rtw_cfg80211_preinit_wiphy(padapter, wiphy); ++ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++exit: ++ return wiphy; ++} ++ ++void rtw_wiphy_free(struct wiphy *wiphy) ++{ ++ if (!wiphy) ++ return; ++ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++ if (wiphy->bands[IEEE80211_BAND_2GHZ]) { ++ rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_2GHZ]); ++ wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; ++ } ++ if (wiphy->bands[IEEE80211_BAND_5GHZ]) { ++ rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_5GHZ]); ++ wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; ++ } ++ ++ wiphy_free(wiphy); ++} ++ ++int rtw_wiphy_register(struct wiphy *wiphy) ++{ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) ++ rtw_cfgvendor_attach(wiphy); ++#endif ++ ++ return wiphy_register(wiphy); ++} ++ ++void rtw_wiphy_unregister(struct wiphy *wiphy) ++{ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) ++ rtw_cfgvendor_detach(wiphy); ++#endif ++ ++ return wiphy_unregister(wiphy); ++} ++ ++int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy) ++{ ++ int ret = 0; ++ struct net_device *pnetdev = padapter->pnetdev; ++ struct wireless_dev *wdev; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ DBG_8192C("%s(padapter=%p)\n", __func__, padapter); ++ ++ /* wdev */ ++ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); ++ if (!wdev) { ++ DBG_8192C("Couldn't allocate wireless device\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ wdev->wiphy = wiphy; ++ wdev->netdev = pnetdev; ++ ++ wdev->iftype = NL80211_IFTYPE_STATION; // will be init in rtw_hal_init() ++ // Must sync with _rtw_init_mlme_priv() ++ // pmlmepriv->fw_state = WIFI_STATION_STATE ++ //wdev->iftype = NL80211_IFTYPE_MONITOR; // for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() ++ padapter->rtw_wdev = wdev; ++ pnetdev->ieee80211_ptr = wdev; ++ ++ //init pwdev_priv ++ pwdev_priv = adapter_wdev_data(padapter); ++ pwdev_priv->rtw_wdev = wdev; ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ pwdev_priv->padapter = padapter; ++ pwdev_priv->scan_request = NULL; ++ _rtw_spinlock_init(&pwdev_priv->scan_req_lock); ++ ++ pwdev_priv->p2p_enabled = _FALSE; ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ rtw_wdev_invit_info_init(&pwdev_priv->invit_info); ++ rtw_wdev_nego_info_init(&pwdev_priv->nego_info); ++ ++ pwdev_priv->bandroid_scan = _FALSE; ++ ++ if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) ++ pwdev_priv->power_mgmt = _TRUE; ++ else ++ pwdev_priv->power_mgmt = _FALSE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++#endif ++ ++exit: ++ return ret; ++} ++ ++void rtw_wdev_free(struct wireless_dev *wdev) ++{ ++ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); ++ ++ if (!wdev) ++ return; ++ ++ rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); ++} ++ ++void rtw_wdev_unregister(struct wireless_dev *wdev) ++{ ++ struct net_device *ndev; ++ _adapter *adapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); ++ ++ if (!wdev) ++ return; ++ ++ if(!(ndev = wdev_to_ndev(wdev))) ++ return; ++ ++ adapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(adapter); ++ ++ rtw_cfg80211_indicate_scan_done(adapter, _TRUE); ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) || defined(COMPAT_KERNEL_RELEASE) ++ if (wdev->current_bss) { ++ DBG_871X(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter)); ++ cfg80211_disconnected(adapter->pnetdev, 0, NULL, 0, 0, GFP_ATOMIC); ++ } ++ #endif ++ ++ if (pwdev_priv->pmon_ndev) { ++ DBG_8192C("%s, unregister monitor interface\n", __func__); ++ unregister_netdev(pwdev_priv->pmon_ndev); ++ } ++} ++ ++int rtw_cfg80211_ndev_res_alloc(_adapter *adapter) ++{ ++ int ret = _FAIL; ++ ++#if !defined(RTW_SINGLE_WIPHY) ++ struct wiphy *wiphy; ++ struct device *dev = dvobj_to_dev(adapter_to_dvobj(adapter)); ++ ++ wiphy = rtw_wiphy_alloc(adapter, dev); ++ if (wiphy == NULL) ++ goto exit; ++ ++ adapter->wiphy = wiphy; ++#endif ++ ++ if (rtw_wdev_alloc(adapter, adapter_to_wiphy(adapter)) == 0) ++ ret = _SUCCESS; ++ ++#if !defined(RTW_SINGLE_WIPHY) ++ if (ret != _SUCCESS) { ++ rtw_wiphy_free(wiphy); ++ adapter->wiphy = NULL; ++ } ++#endif ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_ndev_res_free(_adapter *adapter) ++{ ++ rtw_wdev_free(adapter->rtw_wdev); ++#if !defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_free(adapter_to_wiphy(adapter)); ++ adapter->wiphy = NULL; ++#endif ++} ++ ++int rtw_cfg80211_ndev_res_register(_adapter *adapter) ++{ ++ int ret = _FAIL; ++ ++#if !defined(RTW_SINGLE_WIPHY) ++ if (rtw_wiphy_register(adapter_to_wiphy(adapter)) < 0) { ++ DBG_871X("%s rtw_wiphy_register fail for if%d\n", __func__, (adapter->iface_id+1)); ++ goto exit; ++ } ++#endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_ndev_res_unregister(_adapter *adapter) ++{ ++ rtw_wdev_unregister(adapter->rtw_wdev); ++} ++ ++int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj) ++{ ++ int ret = _FAIL; ++ ++#if defined(RTW_SINGLE_WIPHY) ++ struct wiphy *wiphy; ++ struct device *dev = dvobj_to_dev(dvobj); ++ ++ wiphy = rtw_wiphy_alloc(dvobj->padapters[IFACE_ID0], dev); ++ if (wiphy == NULL) ++ goto exit; ++ ++ dvobj->wiphy = wiphy; ++#endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj) ++{ ++#if defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_free(dvobj_to_wiphy(dvobj)); ++ dvobj->wiphy = NULL; ++#endif ++} ++ ++int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj) ++{ ++ int ret = _FAIL; ++ ++#if defined(RTW_SINGLE_WIPHY) ++ if (rtw_wiphy_register(dvobj_to_wiphy(dvobj)) != 0) ++ goto exit; ++#endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj) ++{ ++#if defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_unregister(dvobj_to_wiphy(dvobj)); ++#endif ++} ++ ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_cfg80211.h b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_cfg80211.h new file mode 100644 -index 000000000..70fecd565 +index 0000000..9b483c6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_cfg80211.h @@ -0,0 +1,212 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __IOCTL_CFG80211_H__ -+#define __IOCTL_CFG80211_H__ -+ -+ -+#if defined(RTW_USE_CFG80211_STA_EVENT) -+ #undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER -+#endif -+ -+struct rtw_wdev_invit_info { -+ u8 state; /* 0: req, 1:rep */ -+ u8 peer_mac[ETH_ALEN]; -+ u8 active; -+ u8 token; -+ u8 flags; -+ u8 status; -+ u8 req_op_ch; -+ u8 rsp_op_ch; -+}; -+ -+#define rtw_wdev_invit_info_init(invit_info) \ -+ do { \ -+ (invit_info)->state = 0xff; \ -+ _rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \ -+ (invit_info)->active = 0xff; \ -+ (invit_info)->token = 0; \ -+ (invit_info)->flags = 0x00; \ -+ (invit_info)->status = 0xff; \ -+ (invit_info)->req_op_ch = 0; \ -+ (invit_info)->rsp_op_ch = 0; \ -+ } while (0) -+ -+struct rtw_wdev_nego_info { -+ u8 state; /* 0: req, 1:rep, 2:conf */ -+ u8 peer_mac[ETH_ALEN]; -+ u8 active; -+ u8 token; -+ u8 status; -+ u8 req_intent; -+ u8 req_op_ch; -+ u8 req_listen_ch; -+ u8 rsp_intent; -+ u8 rsp_op_ch; -+ u8 conf_op_ch; -+}; -+ -+#define rtw_wdev_nego_info_init(nego_info) \ -+ do { \ -+ (nego_info)->state = 0xff; \ -+ _rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \ -+ (nego_info)->active = 0xff; \ -+ (nego_info)->token = 0; \ -+ (nego_info)->status = 0xff; \ -+ (nego_info)->req_intent = 0xff; \ -+ (nego_info)->req_op_ch = 0; \ -+ (nego_info)->req_listen_ch = 0; \ -+ (nego_info)->rsp_intent = 0xff; \ -+ (nego_info)->rsp_op_ch = 0; \ -+ (nego_info)->conf_op_ch = 0; \ -+ } while (0) -+ -+struct rtw_wdev_priv -+{ -+ struct wireless_dev *rtw_wdev; -+ -+ _adapter *padapter; -+ -+ struct cfg80211_scan_request *scan_request; -+ _lock scan_req_lock; -+ -+ struct net_device *pmon_ndev;//for monitor interface -+ char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface -+ -+ u8 p2p_enabled; -+ -+ u8 provdisc_req_issued; -+ -+ struct rtw_wdev_invit_info invit_info; -+ struct rtw_wdev_nego_info nego_info; -+ -+ u8 bandroid_scan; -+ bool block; -+ bool block_scan; -+ bool power_mgmt; -+ -+ /* report mgmt_frame registered */ -+ u16 report_mgmt; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ ATOMIC_T ro_ch_to; -+ ATOMIC_T switch_ch_to; -+#endif -+ -+}; -+ -+#define wiphy_to_adapter(x) (*((_adapter**)wiphy_priv(x))) -+ -+#define wdev_to_ndev(w) ((w)->netdev) -+#define wdev_to_wiphy(w) ((w)->wiphy) -+#define ndev_to_wdev(n) ((n)->ieee80211_ptr) -+ -+#define WIPHY_FMT "%s" -+#define WIPHY_ARG(wiphy) wiphy_name(wiphy) -+#define FUNC_WIPHY_FMT "%s("WIPHY_FMT")" -+#define FUNC_WIPHY_ARG(wiphy) __func__, WIPHY_ARG(wiphy) -+ -+#define SET_CFG80211_REPORT_MGMT(w, t, v) (w->report_mgmt |= (v?BIT(t >> 4):0)) -+#define GET_CFG80211_REPORT_MGMT(w, t) ((w->report_mgmt & BIT(t >> 4)) > 0) -+ -+struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev); -+void rtw_wiphy_free(struct wiphy *wiphy); -+int rtw_wiphy_register(struct wiphy *wiphy); -+void rtw_wiphy_unregister(struct wiphy *wiphy); -+ -+int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy); -+void rtw_wdev_free(struct wireless_dev *wdev); -+void rtw_wdev_unregister(struct wireless_dev *wdev); -+ -+int rtw_cfg80211_ndev_res_alloc(_adapter *adapter); -+void rtw_cfg80211_ndev_res_free(_adapter *adapter); -+int rtw_cfg80211_ndev_res_register(_adapter *adapter); -+void rtw_cfg80211_ndev_res_unregister(_adapter *adapter); -+ -+int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj); -+void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj); -+int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj); -+void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj); -+ -+void rtw_cfg80211_init_wiphy(_adapter *padapter); -+ -+void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork); -+void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); -+struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork); -+int rtw_cfg80211_check_bss(_adapter *padapter); -+void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter); -+void rtw_cfg80211_indicate_connect(_adapter *padapter); -+void rtw_cfg80211_indicate_disconnect(_adapter *padapter); -+void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted); -+u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms); -+ -+#ifdef CONFIG_AP_MODE -+void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); -+void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); -+#endif //CONFIG_AP_MODE -+ -+void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); -+void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); -+void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); -+void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg); -+void rtw_cfg80211_rx_probe_request(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); -+ -+int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); -+ -+bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) -+#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) -+#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)) -+#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3 , 18 , 0)) -+#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0 , gfp) -+#else -+#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) -+#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) -+#else -+#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) -+#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp) -+#else -+#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) -+#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp) -+#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) -+#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp) -+#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp) -+#else -+#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp) -+#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp) -+#endif -+ -+#include "rtw_cfgvendor.h" -+ -+#endif //__IOCTL_CFG80211_H__ -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IOCTL_CFG80211_H__ ++#define __IOCTL_CFG80211_H__ ++ ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) ++ #undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER ++#endif ++ ++struct rtw_wdev_invit_info { ++ u8 state; /* 0: req, 1:rep */ ++ u8 peer_mac[ETH_ALEN]; ++ u8 active; ++ u8 token; ++ u8 flags; ++ u8 status; ++ u8 req_op_ch; ++ u8 rsp_op_ch; ++}; ++ ++#define rtw_wdev_invit_info_init(invit_info) \ ++ do { \ ++ (invit_info)->state = 0xff; \ ++ _rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \ ++ (invit_info)->active = 0xff; \ ++ (invit_info)->token = 0; \ ++ (invit_info)->flags = 0x00; \ ++ (invit_info)->status = 0xff; \ ++ (invit_info)->req_op_ch = 0; \ ++ (invit_info)->rsp_op_ch = 0; \ ++ } while (0) ++ ++struct rtw_wdev_nego_info { ++ u8 state; /* 0: req, 1:rep, 2:conf */ ++ u8 peer_mac[ETH_ALEN]; ++ u8 active; ++ u8 token; ++ u8 status; ++ u8 req_intent; ++ u8 req_op_ch; ++ u8 req_listen_ch; ++ u8 rsp_intent; ++ u8 rsp_op_ch; ++ u8 conf_op_ch; ++}; ++ ++#define rtw_wdev_nego_info_init(nego_info) \ ++ do { \ ++ (nego_info)->state = 0xff; \ ++ _rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \ ++ (nego_info)->active = 0xff; \ ++ (nego_info)->token = 0; \ ++ (nego_info)->status = 0xff; \ ++ (nego_info)->req_intent = 0xff; \ ++ (nego_info)->req_op_ch = 0; \ ++ (nego_info)->req_listen_ch = 0; \ ++ (nego_info)->rsp_intent = 0xff; \ ++ (nego_info)->rsp_op_ch = 0; \ ++ (nego_info)->conf_op_ch = 0; \ ++ } while (0) ++ ++struct rtw_wdev_priv ++{ ++ struct wireless_dev *rtw_wdev; ++ ++ _adapter *padapter; ++ ++ struct cfg80211_scan_request *scan_request; ++ _lock scan_req_lock; ++ ++ struct net_device *pmon_ndev;//for monitor interface ++ char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface ++ ++ u8 p2p_enabled; ++ ++ u8 provdisc_req_issued; ++ ++ struct rtw_wdev_invit_info invit_info; ++ struct rtw_wdev_nego_info nego_info; ++ ++ u8 bandroid_scan; ++ bool block; ++ bool block_scan; ++ bool power_mgmt; ++ ++ /* report mgmt_frame registered */ ++ u16 report_mgmt; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_T ro_ch_to; ++ ATOMIC_T switch_ch_to; ++#endif ++ ++}; ++ ++#define wiphy_to_adapter(x) (*((_adapter**)wiphy_priv(x))) ++ ++#define wdev_to_ndev(w) ((w)->netdev) ++#define wdev_to_wiphy(w) ((w)->wiphy) ++#define ndev_to_wdev(n) ((n)->ieee80211_ptr) ++ ++#define WIPHY_FMT "%s" ++#define WIPHY_ARG(wiphy) wiphy_name(wiphy) ++#define FUNC_WIPHY_FMT "%s("WIPHY_FMT")" ++#define FUNC_WIPHY_ARG(wiphy) __func__, WIPHY_ARG(wiphy) ++ ++#define SET_CFG80211_REPORT_MGMT(w, t, v) (w->report_mgmt |= (v?BIT(t >> 4):0)) ++#define GET_CFG80211_REPORT_MGMT(w, t) ((w->report_mgmt & BIT(t >> 4)) > 0) ++ ++struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev); ++void rtw_wiphy_free(struct wiphy *wiphy); ++int rtw_wiphy_register(struct wiphy *wiphy); ++void rtw_wiphy_unregister(struct wiphy *wiphy); ++ ++int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy); ++void rtw_wdev_free(struct wireless_dev *wdev); ++void rtw_wdev_unregister(struct wireless_dev *wdev); ++ ++int rtw_cfg80211_ndev_res_alloc(_adapter *adapter); ++void rtw_cfg80211_ndev_res_free(_adapter *adapter); ++int rtw_cfg80211_ndev_res_register(_adapter *adapter); ++void rtw_cfg80211_ndev_res_unregister(_adapter *adapter); ++ ++int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj); ++void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj); ++int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj); ++void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj); ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter); ++ ++void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork); ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); ++struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork); ++int rtw_cfg80211_check_bss(_adapter *padapter); ++void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter); ++void rtw_cfg80211_indicate_connect(_adapter *padapter); ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter); ++void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted); ++u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms); ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg); ++void rtw_cfg80211_rx_probe_request(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); ++ ++bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3 , 18 , 0)) ++#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0 , gfp) ++#else ++#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) ++#else ++#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp) ++#else ++#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp) ++#else ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp) ++#endif ++ ++#include "rtw_cfgvendor.h" ++ ++#endif //__IOCTL_CFG80211_H__ ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_linux.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_linux.c new file mode 100644 -index 000000000..be2819631 +index 0000000..be28196 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_linux.c @@ -0,0 +1,13875 @@ @@ -337160,7 +378646,7 @@ index 000000000..be2819631 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_mp.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_mp.c new file mode 100644 -index 000000000..58c254c53 +index 0000000..58c254c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/ioctl_mp.c @@ -0,0 +1,2308 @@ @@ -339474,7 +380960,7 @@ index 000000000..58c254c53 +#endif diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/mlme_linux.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/mlme_linux.c new file mode 100644 -index 000000000..dd52afaf0 +index 0000000..dd52afa --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/mlme_linux.c @@ -0,0 +1,618 @@ @@ -340098,10 +381584,10 @@ index 000000000..dd52afaf0 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/os_intfs.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/os_intfs.c new file mode 100644 -index 000000000..42fe7a5a2 +index 0000000..3644095 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/os_intfs.c -@@ -0,0 +1,4536 @@ +@@ -0,0 +1,4538 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. @@ -343190,7 +384676,9 @@ index 000000000..42fe7a5a2 + if (ndev->ieee80211_ptr) + rtw_mfree((u8 *)ndev->ieee80211_ptr, sizeof(struct wireless_dev)); +#endif ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 9)) + free_netdev(ndev); ++#endif +} + +#ifdef CONFIG_ARP_KEEP_ALIVE @@ -344640,10 +386128,10 @@ index 000000000..42fe7a5a2 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/recv_linux.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/recv_linux.c new file mode 100644 -index 000000000..e37f01483 +index 0000000..820285e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/recv_linux.c -@@ -0,0 +1,815 @@ +@@ -0,0 +1,821 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. @@ -344667,6 +386155,12 @@ index 000000000..e37f01483 + +#include + ++static u8 rtw_rfc1042_header[] = ++{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; ++/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */ ++static u8 rtw_bridge_tunnel_header[] = ++{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 }; ++ +int rtw_os_alloc_recvframe(_adapter *padapter, union recv_frame *precvframe, u8 *pdata, _pkt *pskb) +{ + int res = _SUCCESS; @@ -345461,7 +386955,7 @@ index 000000000..e37f01483 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/rtw_android.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/rtw_android.c new file mode 100644 -index 000000000..8de7ff72f +index 0000000..140f22a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/rtw_android.c @@ -0,0 +1,1293 @@ @@ -345818,7 +387312,7 @@ index 000000000..8de7ff72f +{ + int cmd_num; + for(cmd_num=0 ; cmd_num +#include +#include -+#include + +#ifndef CONFIG_SDIO_HCI +#error "CONFIG_SDIO_HCI shall be on!\n" @@ -351056,6 +392549,7 @@ index 000000000..53522c783 +{ + int status = _FAIL; + PADAPTER padapter = NULL; ++ PSDIO_DATA psdio = &dvobj->intf_data; + + padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter)); + if (padapter == NULL) @@ -351127,11 +392621,7 @@ index 000000000..53522c783 + + //3 8. get WLan MAC address + // set mac addr -+ if (dvobj_to_dev(dvobj)->of_node) { -+ rtw_macaddr_cfg(adapter_mac_addr(padapter), of_get_mac_address(dvobj_to_dev(dvobj)->of_node)); -+ } else { -+ rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); -+ } ++ rtw_macaddr_cfg(&psdio->func->dev, adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); +#ifdef CONFIG_P2P + rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); +#endif /* CONFIG_P2P */ @@ -351622,7 +393112,7 @@ index 000000000..53522c783 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/sdio_ops_linux.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/sdio_ops_linux.c new file mode 100644 -index 000000000..0ea81f150 +index 0000000..0ea81f1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/sdio_ops_linux.c @@ -0,0 +1,910 @@ @@ -352538,7 +394028,7 @@ index 000000000..0ea81f150 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/wifi_regd.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/wifi_regd.c new file mode 100644 -index 000000000..154a28fa4 +index 0000000..154a28f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/wifi_regd.c @@ -0,0 +1,548 @@ @@ -353092,7 +394582,7 @@ index 000000000..154a28fa4 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/xmit_linux.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/xmit_linux.c new file mode 100644 -index 000000000..129269948 +index 0000000..1292699 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/linux/xmit_linux.c @@ -0,0 +1,546 @@ @@ -353644,7 +395134,7 @@ index 000000000..129269948 + diff --git a/drivers/net/wireless/realtek/rtl8189fs/os_dep/osdep_service.c b/drivers/net/wireless/realtek/rtl8189fs/os_dep/osdep_service.c new file mode 100644 -index 000000000..7079096cc +index 0000000..7079096 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/os_dep/osdep_service.c @@ -0,0 +1,2526 @@ @@ -356176,572 +397666,572 @@ index 000000000..7079096cc + diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUN50IW1P1_sdio.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUN50IW1P1_sdio.c new file mode 100644 -index 000000000..8e78cce64 +index 0000000..aec9cdb --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUN50IW1P1_sdio.c @@ -0,0 +1,91 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+/* -+ * Description: -+ * This file can be applied to following platforms: -+ * CONFIG_PLATFORM_ARM_SUN50IW1P1 -+ */ -+#include -+#ifdef CONFIG_GPIO_WAKEUP -+#include -+#endif -+ -+#ifdef CONFIG_MMC -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+extern void sunxi_mmc_rescan_card(unsigned ids); -+extern void sunxi_wlan_set_power(int on); -+extern int sunxi_wlan_get_bus_index(void); -+extern int sunxi_wlan_get_oob_irq(void); -+extern int sunxi_wlan_get_oob_irq_flags(void); -+#endif -+#ifdef CONFIG_GPIO_WAKEUP -+extern unsigned int oob_irq; -+#endif -+#endif // CONFIG_MMC -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_MMC -+{ -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+ int wlan_bus_index = sunxi_wlan_get_bus_index(); ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ * Description: ++ * This file can be applied to following platforms: ++ * CONFIG_PLATFORM_ARM_SUN50IW1P1 ++ */ ++#include ++#ifdef CONFIG_GPIO_WAKEUP ++#include ++#endif ++ ++#ifdef CONFIG_MMC ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++extern void sunxi_mmc_rescan_card(unsigned ids); ++extern void sunxi_wlan_set_power(int on); ++extern int sunxi_wlan_get_bus_index(void); ++extern int sunxi_wlan_get_oob_irq(void); ++extern int sunxi_wlan_get_oob_irq_flags(void); ++#endif ++#ifdef CONFIG_GPIO_WAKEUP ++extern unsigned int oob_irq; ++#endif ++#endif // CONFIG_MMC ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_MMC ++{ ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++ int wlan_bus_index = sunxi_wlan_get_bus_index(); + if(wlan_bus_index < 0) + return wlan_bus_index; + -+ sunxi_wlan_set_power(1); -+ mdelay(100); -+ sunxi_mmc_rescan_card(wlan_bus_index); -+#endif -+ DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+ oob_irq = sunxi_wlan_get_oob_irq(); -+#endif -+#endif // CONFIG_GPIO_WAKEUP -+} -+#endif // CONFIG_MMC -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#ifdef CONFIG_MMC -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+ int wlan_bus_index = sunxi_wlan_get_bus_index(); ++ sunxi_wlan_set_power(1); ++ mdelay(100); ++ sunxi_mmc_rescan_card(wlan_bus_index); ++#endif ++ DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); ++ ++#ifdef CONFIG_GPIO_WAKEUP ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++ oob_irq = sunxi_wlan_get_oob_irq(); ++#endif ++#endif // CONFIG_GPIO_WAKEUP ++} ++#endif // CONFIG_MMC ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++#ifdef CONFIG_MMC ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++ int wlan_bus_index = sunxi_wlan_get_bus_index(); + if(wlan_bus_index < 0) + return; + -+ sunxi_mmc_rescan_card(wlan_bus_index); -+ mdelay(100); -+ sunxi_wlan_set_power(0); -+#endif -+ DBG_871X("%s: remove card, power off.\n", __FUNCTION__); -+#endif // CONFIG_MMC -+} ++ sunxi_mmc_rescan_card(wlan_bus_index); ++ mdelay(100); ++ sunxi_wlan_set_power(0); ++#endif ++ DBG_871X("%s: remove card, power off.\n", __FUNCTION__); ++#endif // CONFIG_MMC ++} diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNnI_sdio.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNnI_sdio.c new file mode 100644 -index 000000000..2d89b80a9 +index 0000000..601e738 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNnI_sdio.c @@ -0,0 +1,114 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+/* -+ * Description: -+ * This file can be applied to following platforms: -+ * CONFIG_PLATFORM_ARM_SUN6I -+ * CONFIG_PLATFORM_ARM_SUN7I -+ * CONFIG_PLATFORM_ARM_SUN8I -+ */ -+#include -+#include -+#ifdef CONFIG_GPIO_WAKEUP -+#include -+#endif -+ -+#ifdef CONFIG_MMC -+static int sdc_id = -1; -+static signed int gpio_eint_wlan = -1; -+static u32 eint_wlan_handle = 0; -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+extern void sw_mci_rescan_card(unsigned id, unsigned insert); -+#elif defined(CONFIG_PLATFORM_ARM_SUN8I) -+extern void sunxi_mci_rescan_card(unsigned id, unsigned insert); -+#endif -+ -+extern void wifi_pm_power(int on); -+#ifdef CONFIG_GPIO_WAKEUP -+extern unsigned int oob_irq; -+#endif -+#endif // CONFIG_MMC -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_MMC -+{ -+ script_item_u val; -+ script_item_value_type_e type; -+ -+ type = script_get_item("wifi_para", "wifi_sdc_id", &val); -+ if (SCIRPT_ITEM_VALUE_TYPE_INT!=type) { -+ DBG_871X("get wifi_sdc_id failed\n"); -+ ret = -1; -+ } else { -+ sdc_id = val.val; -+ DBG_871X("----- %s sdc_id: %d\n", __FUNCTION__, sdc_id); -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ sw_mci_rescan_card(sdc_id, 1); -+#elif defined(CONFIG_PLATFORM_ARM_SUN8I) -+ sunxi_mci_rescan_card(sdc_id, 1); -+#endif -+ mdelay(100); -+ wifi_pm_power(1); -+ -+ DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); -+ } -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ type = script_get_item("wifi_para", "wl_host_wake", &val); -+ if (SCIRPT_ITEM_VALUE_TYPE_PIO != type) { -+ DBG_871X("No definition of wake up host PIN\n"); -+ ret = -1; -+ } else { -+ gpio_eint_wlan = val.gpio.gpio; -+#ifdef CONFIG_PLATFORM_ARM_SUN8I -+ oob_irq = gpio_to_irq(gpio_eint_wlan); -+#endif -+ } -+#endif // CONFIG_GPIO_WAKEUP -+} -+#endif // CONFIG_MMC -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#ifdef CONFIG_MMC -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) ||defined(CONFIG_PLATFORM_ARM_SUN7I) -+ sw_mci_rescan_card(sdc_id, 0); -+#elif defined(CONFIG_PLATFORM_ARM_SUN8I) -+ sunxi_mci_rescan_card(sdc_id, 0); -+#endif -+ mdelay(100); -+ wifi_pm_power(0); -+ -+ DBG_871X("%s: remove card, power off.\n", __FUNCTION__); -+#endif // CONFIG_MMC -+} ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ * Description: ++ * This file can be applied to following platforms: ++ * CONFIG_PLATFORM_ARM_SUN6I ++ * CONFIG_PLATFORM_ARM_SUN7I ++ * CONFIG_PLATFORM_ARM_SUN8I ++ */ ++#include ++#include ++#ifdef CONFIG_GPIO_WAKEUP ++#include ++#endif ++ ++#ifdef CONFIG_MMC ++static int sdc_id = -1; ++static signed int gpio_eint_wlan = -1; ++static u32 eint_wlan_handle = 0; ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++extern void sw_mci_rescan_card(unsigned id, unsigned insert); ++#elif defined(CONFIG_PLATFORM_ARM_SUN8I) ++extern void sunxi_mci_rescan_card(unsigned id, unsigned insert); ++#endif ++ ++extern void wifi_pm_power(int on); ++#ifdef CONFIG_GPIO_WAKEUP ++extern unsigned int oob_irq; ++#endif ++#endif // CONFIG_MMC ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_MMC ++{ ++ script_item_u val; ++ script_item_value_type_e type; ++ ++ type = script_get_item("wifi_para", "wifi_sdc_id", &val); ++ if (SCIRPT_ITEM_VALUE_TYPE_INT!=type) { ++ DBG_871X("get wifi_sdc_id failed\n"); ++ ret = -1; ++ } else { ++ sdc_id = val.val; ++ DBG_871X("----- %s sdc_id: %d\n", __FUNCTION__, sdc_id); ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ sw_mci_rescan_card(sdc_id, 1); ++#elif defined(CONFIG_PLATFORM_ARM_SUN8I) ++ sunxi_mci_rescan_card(sdc_id, 1); ++#endif ++ mdelay(100); ++ wifi_pm_power(1); ++ ++ DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); ++ } ++ ++#ifdef CONFIG_GPIO_WAKEUP ++ type = script_get_item("wifi_para", "wl_host_wake", &val); ++ if (SCIRPT_ITEM_VALUE_TYPE_PIO != type) { ++ DBG_871X("No definition of wake up host PIN\n"); ++ ret = -1; ++ } else { ++ gpio_eint_wlan = val.gpio.gpio; ++#ifdef CONFIG_PLATFORM_ARM_SUN8I ++ oob_irq = gpio_to_irq(gpio_eint_wlan); ++#endif ++ } ++#endif // CONFIG_GPIO_WAKEUP ++} ++#endif // CONFIG_MMC ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++#ifdef CONFIG_MMC ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) ||defined(CONFIG_PLATFORM_ARM_SUN7I) ++ sw_mci_rescan_card(sdc_id, 0); ++#elif defined(CONFIG_PLATFORM_ARM_SUN8I) ++ sunxi_mci_rescan_card(sdc_id, 0); ++#endif ++ mdelay(100); ++ wifi_pm_power(0); ++ ++ DBG_871X("%s: remove card, power off.\n", __FUNCTION__); ++#endif // CONFIG_MMC ++} diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNxI_sdio.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNxI_sdio.c new file mode 100644 -index 000000000..770f93506 +index 0000000..5bc888d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNxI_sdio.c @@ -0,0 +1,95 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#include -+ -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+#ifdef CONFIG_WITS_EVB_V13 -+#define SDIOID 0 -+#else // !CONFIG_WITS_EVB_V13 -+#define SDIOID (CONFIG_CHIP_ID==1123 ? 3 : 1) -+#endif // !CONFIG_WITS_EVB_V13 -+ -+#define SUNXI_SDIO_WIFI_NUM_RTL8189ES 10 -+extern void sunximmc_rescan_card(unsigned id, unsigned insert); -+extern int mmc_pm_get_mod_type(void); -+extern int mmc_pm_gpio_ctrl(char* name, int level); -+/* -+ * rtl8189es_shdn = port:PH09<1><0> -+ * rtl8189es_wakeup = port:PH10<1><1> -+ * rtl8189es_vdd_en = port:PH11<1><0> -+ * rtl8189es_vcc_en = port:PH12<1><0> -+ */ -+ -+int rtl8189es_sdio_powerup(void) -+{ -+ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 1); -+ udelay(100); -+ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 1); -+ udelay(50); -+ mmc_pm_gpio_ctrl("rtl8189es_shdn", 1); -+ return 0; -+} -+ -+int rtl8189es_sdio_poweroff(void) -+{ -+ mmc_pm_gpio_ctrl("rtl8189es_shdn", 0); -+ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 0); -+ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 0); -+ return 0; -+} -+#endif // CONFIG_MMC_SUNXI_POWER_CONTROL -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+ unsigned int mod_sel = mmc_pm_get_mod_type(); -+#endif // CONFIG_MMC_SUNXI_POWER_CONTROL -+ -+ -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+ if (mod_sel == SUNXI_SDIO_WIFI_NUM_RTL8189ES) { -+ rtl8189es_sdio_powerup(); -+ sunximmc_rescan_card(SDIOID, 1); -+ printk("[rtl8189es] %s: power up, rescan card.\n", __FUNCTION__); -+ } else { -+ ret = -1; -+ printk("[rtl8189es] %s: mod_sel = %d is incorrect.\n", __FUNCTION__, mod_sel); -+ } -+#endif // CONFIG_MMC_SUNXI_POWER_CONTROL -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+ sunximmc_rescan_card(SDIOID, 0); -+#ifdef CONFIG_RTL8188E -+ rtl8189es_sdio_poweroff(); -+ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); -+#endif // CONFIG_RTL8188E -+#endif // CONFIG_MMC_SUNXI_POWER_CONTROL -+} ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++ ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++#ifdef CONFIG_WITS_EVB_V13 ++#define SDIOID 0 ++#else // !CONFIG_WITS_EVB_V13 ++#define SDIOID (CONFIG_CHIP_ID==1123 ? 3 : 1) ++#endif // !CONFIG_WITS_EVB_V13 ++ ++#define SUNXI_SDIO_WIFI_NUM_RTL8189ES 10 ++extern void sunximmc_rescan_card(unsigned id, unsigned insert); ++extern int mmc_pm_get_mod_type(void); ++extern int mmc_pm_gpio_ctrl(char* name, int level); ++/* ++ * rtl8189es_shdn = port:PH09<1><0> ++ * rtl8189es_wakeup = port:PH10<1><1> ++ * rtl8189es_vdd_en = port:PH11<1><0> ++ * rtl8189es_vcc_en = port:PH12<1><0> ++ */ ++ ++int rtl8189es_sdio_powerup(void) ++{ ++ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 1); ++ udelay(100); ++ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 1); ++ udelay(50); ++ mmc_pm_gpio_ctrl("rtl8189es_shdn", 1); ++ return 0; ++} ++ ++int rtl8189es_sdio_poweroff(void) ++{ ++ mmc_pm_gpio_ctrl("rtl8189es_shdn", 0); ++ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 0); ++ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 0); ++ return 0; ++} ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++ unsigned int mod_sel = mmc_pm_get_mod_type(); ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++ ++ ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++ if (mod_sel == SUNXI_SDIO_WIFI_NUM_RTL8189ES) { ++ rtl8189es_sdio_powerup(); ++ sunximmc_rescan_card(SDIOID, 1); ++ printk("[rtl8189es] %s: power up, rescan card.\n", __FUNCTION__); ++ } else { ++ ret = -1; ++ printk("[rtl8189es] %s: mod_sel = %d is incorrect.\n", __FUNCTION__, mod_sel); ++ } ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++ sunximmc_rescan_card(SDIOID, 0); ++#ifdef CONFIG_RTL8188E ++ rtl8189es_sdio_poweroff(); ++ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); ++#endif // CONFIG_RTL8188E ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++} diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNxI_usb.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNxI_usb.c new file mode 100644 -index 000000000..774392bdd +index 0000000..5352313 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_SUNxI_usb.c @@ -0,0 +1,142 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+/* -+ * Description: -+ * This file can be applied to following platforms: -+ * CONFIG_PLATFORM_ARM_SUNXI Series platform -+ * -+ */ -+ -+#include -+#include -+ -+#ifdef CONFIG_PLATFORM_ARM_SUNxI -+extern int sw_usb_disable_hcd(__u32 usbc_no); -+extern int sw_usb_enable_hcd(__u32 usbc_no); -+static int usb_wifi_host = 2; -+#endif -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+extern int sw_usb_disable_hcd(__u32 usbc_no); -+extern int sw_usb_enable_hcd(__u32 usbc_no); -+extern void wifi_pm_power(int on); -+static script_item_u item; -+#endif -+ -+#ifdef CONFIG_PLATFORM_ARM_SUN8I -+extern int sunxi_usb_disable_hcd(__u32 usbc_no); -+extern int sunxi_usb_enable_hcd(__u32 usbc_no); -+extern void wifi_pm_power(int on); -+static script_item_u item; -+#endif -+ -+ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_PLATFORM_ARM_SUNxI -+#ifndef CONFIG_RTL8723A -+ { -+ /* ----------get usb_wifi_usbc_num------------- */ -+ ret = script_parser_fetch("usb_wifi_para", "usb_wifi_usbc_num", (int *)&usb_wifi_host, 64); -+ if(ret != 0){ -+ DBG_8192C("ERR: script_parser_fetch usb_wifi_usbc_num failed\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ DBG_8192C("sw_usb_enable_hcd: usbc_num = %d\n", usb_wifi_host); -+ sw_usb_enable_hcd(usb_wifi_host); -+ } -+#endif //CONFIG_RTL8723A -+#endif //CONFIG_PLATFORM_ARM_SUNxI -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ { -+ script_item_value_type_e type; -+ -+ type = script_get_item("wifi_para", "wifi_usbc_id", &item); -+ if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ -+ printk("ERR: script_get_item wifi_usbc_id failed\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); -+ wifi_pm_power(1); -+ mdelay(10); -+ -+ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sw_usb_enable_hcd(item.val); -+ #endif -+ } -+#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN8I) -+ { -+ script_item_value_type_e type; -+ -+ type = script_get_item("wifi_para", "wifi_usbc_id", &item); -+ if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ -+ printk("ERR: script_get_item wifi_usbc_id failed\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); -+ wifi_pm_power(1); -+ mdelay(10); -+ -+ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sunxi_usb_enable_hcd(item.val); -+ #endif -+ } -+#endif //CONFIG_PLATFORM_ARM_SUN8I -+ -+exit: -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+ -+#ifdef CONFIG_PLATFORM_ARM_SUNxI -+#ifndef CONFIG_RTL8723A -+ DBG_8192C("sw_usb_disable_hcd: usbc_num = %d\n", usb_wifi_host); -+ sw_usb_disable_hcd(usb_wifi_host); -+#endif //ifndef CONFIG_RTL8723A -+#endif //CONFIG_PLATFORM_ARM_SUNxI -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sw_usb_disable_hcd(item.val); -+ #endif -+ wifi_pm_power(0); -+#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN8I) -+ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sunxi_usb_disable_hcd(item.val); -+ #endif -+ wifi_pm_power(0); -+#endif //defined(CONFIG_PLATFORM_ARM_SUN8I) -+ -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ * Description: ++ * This file can be applied to following platforms: ++ * CONFIG_PLATFORM_ARM_SUNXI Series platform ++ * ++ */ ++ ++#include ++#include ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++extern int sw_usb_disable_hcd(__u32 usbc_no); ++extern int sw_usb_enable_hcd(__u32 usbc_no); ++static int usb_wifi_host = 2; ++#endif ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++extern int sw_usb_disable_hcd(__u32 usbc_no); ++extern int sw_usb_enable_hcd(__u32 usbc_no); ++extern void wifi_pm_power(int on); ++static script_item_u item; ++#endif ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN8I ++extern int sunxi_usb_disable_hcd(__u32 usbc_no); ++extern int sunxi_usb_enable_hcd(__u32 usbc_no); ++extern void wifi_pm_power(int on); ++static script_item_u item; ++#endif ++ ++ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++#ifndef CONFIG_RTL8723A ++ { ++ /* ----------get usb_wifi_usbc_num------------- */ ++ ret = script_parser_fetch("usb_wifi_para", "usb_wifi_usbc_num", (int *)&usb_wifi_host, 64); ++ if(ret != 0){ ++ DBG_8192C("ERR: script_parser_fetch usb_wifi_usbc_num failed\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ DBG_8192C("sw_usb_enable_hcd: usbc_num = %d\n", usb_wifi_host); ++ sw_usb_enable_hcd(usb_wifi_host); ++ } ++#endif //CONFIG_RTL8723A ++#endif //CONFIG_PLATFORM_ARM_SUNxI ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ { ++ script_item_value_type_e type; ++ ++ type = script_get_item("wifi_para", "wifi_usbc_id", &item); ++ if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ ++ printk("ERR: script_get_item wifi_usbc_id failed\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); ++ wifi_pm_power(1); ++ mdelay(10); ++ ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sw_usb_enable_hcd(item.val); ++ #endif ++ } ++#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN8I) ++ { ++ script_item_value_type_e type; ++ ++ type = script_get_item("wifi_para", "wifi_usbc_id", &item); ++ if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ ++ printk("ERR: script_get_item wifi_usbc_id failed\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); ++ wifi_pm_power(1); ++ mdelay(10); ++ ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sunxi_usb_enable_hcd(item.val); ++ #endif ++ } ++#endif //CONFIG_PLATFORM_ARM_SUN8I ++ ++exit: ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++#ifndef CONFIG_RTL8723A ++ DBG_8192C("sw_usb_disable_hcd: usbc_num = %d\n", usb_wifi_host); ++ sw_usb_disable_hcd(usb_wifi_host); ++#endif //ifndef CONFIG_RTL8723A ++#endif //CONFIG_PLATFORM_ARM_SUNxI ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sw_usb_disable_hcd(item.val); ++ #endif ++ wifi_pm_power(0); ++#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN8I) ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sunxi_usb_disable_hcd(item.val); ++ #endif ++ wifi_pm_power(0); ++#endif //defined(CONFIG_PLATFORM_ARM_SUN8I) ++ ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_WMT_sdio.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_WMT_sdio.c new file mode 100644 -index 000000000..e994ea51d +index 0000000..62e5825 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ARM_WMT_sdio.c @@ -0,0 +1,51 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#include -+#include -+#include -+ -+extern void wmt_detect_sdio2(void); -+extern void force_remove_sdio2(void); -+ -+int platform_wifi_power_on(void) -+{ -+ int err = 0; -+ err = gpio_request(WMT_PIN_GP62_SUSGPIO1, "wifi_chip_en"); -+ if (err < 0){ -+ printk("request gpio for rtl8188eu failed!\n"); -+ return err; -+ } -+ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 0);//pull sus_gpio1 to 0 to open vcc_wifi. -+ printk("power on rtl8189.\n"); -+ msleep(500); -+ wmt_detect_sdio2(); -+ printk("[rtl8189es] %s: new card, power on.\n", __FUNCTION__); -+ return err; -+} -+ -+void platform_wifi_power_off(void) -+{ -+ force_remove_sdio2(); -+ -+ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 1);//pull sus_gpio1 to 1 to close vcc_wifi. -+ printk("power off rtl8189.\n"); -+ gpio_free(WMT_PIN_GP62_SUSGPIO1); -+ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); -+} ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++#include ++#include ++ ++extern void wmt_detect_sdio2(void); ++extern void force_remove_sdio2(void); ++ ++int platform_wifi_power_on(void) ++{ ++ int err = 0; ++ err = gpio_request(WMT_PIN_GP62_SUSGPIO1, "wifi_chip_en"); ++ if (err < 0){ ++ printk("request gpio for rtl8188eu failed!\n"); ++ return err; ++ } ++ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 0);//pull sus_gpio1 to 0 to open vcc_wifi. ++ printk("power on rtl8189.\n"); ++ msleep(500); ++ wmt_detect_sdio2(); ++ printk("[rtl8189es] %s: new card, power on.\n", __FUNCTION__); ++ return err; ++} ++ ++void platform_wifi_power_off(void) ++{ ++ force_remove_sdio2(); ++ ++ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 1);//pull sus_gpio1 to 1 to close vcc_wifi. ++ printk("power off rtl8189.\n"); ++ gpio_free(WMT_PIN_GP62_SUSGPIO1); ++ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); ++} diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_RTK_DMP_usb.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_RTK_DMP_usb.c new file mode 100644 -index 000000000..d296641f1 +index 0000000..5331433 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_RTK_DMP_usb.c @@ -0,0 +1,36 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#include -+ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ u32 tmp; -+ tmp=readl((volatile unsigned int*)0xb801a608); -+ tmp &= 0xffffff00; -+ tmp |= 0x55; -+ writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055 -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+} -+ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ u32 tmp; ++ tmp=readl((volatile unsigned int*)0xb801a608); ++ tmp &= 0xffffff00; ++ tmp |= 0x55; ++ writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055 ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++} ++ diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_arm_act_sdio.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_arm_act_sdio.c new file mode 100644 -index 000000000..539bb178c +index 0000000..539bb17 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_arm_act_sdio.c @@ -0,0 +1,58 @@ @@ -356805,185 +398295,225 @@ index 000000000..539bb178c +} diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ops.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ops.c new file mode 100644 -index 000000000..aad3a2ed1 +index 0000000..2dc840a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ops.c -@@ -0,0 +1,46 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#include -+#include -+#ifndef CONFIG_PLATFORM_OPS -+extern void sdio_reinit(void); -+extern void extern_wifi_set_enable(int is_on); -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+ printk("######%s: \n",__func__); -+// extern_wifi_set_enable(0); -+// msleep(500); -+// extern_wifi_set_enable(1); -+// msleep(500); -+// sdio_reinit(); -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+} -+#endif // !CONFIG_PLATFORM_OPS +@@ -0,0 +1,38 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++#include ++#ifndef CONFIG_PLATFORM_OPS ++extern void sdio_reinit(void); ++extern void extern_wifi_set_enable(int is_on); ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ return 0; ++} ++ ++void platform_wifi_power_off(void) ++{ ++} ++#endif // !CONFIG_PLATFORM_OPS diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ops.h b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ops.h new file mode 100644 -index 000000000..7b66f445f +index 0000000..bd2e668 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_ops.h @@ -0,0 +1,31 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __PLATFORM_OPS_H__ -+#define __PLATFORM_OPS_H__ -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void); -+void platform_wifi_power_off(void); -+ -+#endif // __PLATFORM_OPS_H__ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PLATFORM_OPS_H__ ++#define __PLATFORM_OPS_H__ ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void); ++void platform_wifi_power_off(void); ++ ++#endif // __PLATFORM_OPS_H__ diff --git a/drivers/net/wireless/realtek/rtl8189fs/platform/platform_sprd_sdio.c b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_sprd_sdio.c new file mode 100644 -index 000000000..eec894503 +index 0000000..a4e2502 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8189fs/platform/platform_sprd_sdio.c @@ -0,0 +1,89 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#include ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++ ++extern void sdhci_bus_scan(void); ++#ifndef ANDROID_2X ++extern int sdhci_device_attached(void); ++#endif ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++ ++#ifdef CONFIG_RTL8188E ++ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_ON); ++#endif // CONFIG_RTL8188E ++ ++ /* Pull up pwd pin, make wifi leave power down mode. */ ++ rtw_wifi_gpio_init(); ++ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON); ++ ++#if (MP_DRIVER == 1) && (defined(CONFIG_RTL8723A)||defined(CONFIG_RTL8723B)) ++ // Pull up BT reset pin. ++ rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); ++#endif ++ rtw_mdelay_os(5); ++ ++ sdhci_bus_scan(); ++#ifdef CONFIG_RTL8723B ++ //YJ,test,130305 ++ rtw_mdelay_os(1000); ++#endif ++#ifdef ANDROID_2X ++ rtw_mdelay_os(200); ++#else // !ANDROID_2X ++ if (1) { ++ int i = 0; ++ ++ for (i = 0; i <= 50; i++) { ++ msleep(10); ++ if (sdhci_device_attached()) ++ break; ++ printk("%s delay times:%d\n", __func__, i); ++ } ++ } ++#endif // !ANDROID_2X ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++ /* Pull down pwd pin, make wifi enter power down mode. */ ++ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF); ++ rtw_mdelay_os(5); ++ rtw_wifi_gpio_deinit(); ++ ++#ifdef CONFIG_RTL8188E ++ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_OFF); ++#endif // CONFIG_RTL8188E ++ ++#ifdef CONFIG_WOWLAN ++ if(mmc_host) ++ mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER; ++#endif // CONFIG_WOWLAN ++} +diff --git a/drivers/net/wireless/realtek/rtl8189fs/runwpa b/drivers/net/wireless/realtek/rtl8189fs/runwpa +new file mode 100644 +index 0000000..f825e8b +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/runwpa +@@ -0,0 +1,20 @@ ++#!/bin/bash + -+extern void sdhci_bus_scan(void); -+#ifndef ANDROID_2X -+extern int sdhci_device_attached(void); -+#endif ++if [ "`which iwconfig`" = "" ] ; then ++ echo "WARNING:Wireless tool not exist!" ++ echo " Please install it!" ++ exit ++else ++ if [ `uname -r | cut -d. -f2` -eq 4 ]; then ++ wpa_supplicant -D ipw -c wpa1.conf -i wlan0 ++ else ++ if [ `iwconfig -v |awk '{print $4}' | head -n 1` -lt 18 ] ; then ++ wpa_supplicant -D ipw -c wpa1.conf -i wlan0 ++ else ++ wpa_supplicant -D wext -c wpa1.conf -i wlan0 ++ fi + -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; ++ fi ++fi + + -+#ifdef CONFIG_RTL8188E -+ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_ON); -+#endif // CONFIG_RTL8188E +diff --git a/drivers/net/wireless/realtek/rtl8189fs/wlan0dhcp b/drivers/net/wireless/realtek/rtl8189fs/wlan0dhcp +new file mode 100644 +index 0000000..6043382 +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8189fs/wlan0dhcp +@@ -0,0 +1,16 @@ ++#!/bin/bash + -+ /* Pull up pwd pin, make wifi leave power down mode. */ -+ rtw_wifi_gpio_init(); -+ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON); ++var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'` + -+#if (MP_DRIVER == 1) && (defined(CONFIG_RTL8723A)||defined(CONFIG_RTL8723B)) -+ // Pull up BT reset pin. -+ rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); -+#endif -+ rtw_mdelay_os(5); ++kill $var0 ++cp ifcfg-wlan0 /etc/sysconfig/network-scripts/ + -+ sdhci_bus_scan(); -+#ifdef CONFIG_RTL8723B -+ //YJ,test,130305 -+ rtw_mdelay_os(1000); -+#endif -+#ifdef ANDROID_2X -+ rtw_mdelay_os(200); -+#else // !ANDROID_2X -+ if (1) { -+ int i = 0; ++dhclient wlan0 + -+ for (i = 0; i <= 50; i++) { -+ msleep(10); -+ if (sdhci_device_attached()) -+ break; -+ printk("%s delay times:%d\n", __func__, i); -+ } -+ } -+#endif // !ANDROID_2X ++var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'` + -+ return ret; -+} + -+void platform_wifi_power_off(void) -+{ -+ /* Pull down pwd pin, make wifi enter power down mode. */ -+ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF); -+ rtw_mdelay_os(5); -+ rtw_wifi_gpio_deinit(); ++rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0 + -+#ifdef CONFIG_RTL8188E -+ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_OFF); -+#endif // CONFIG_RTL8188E ++echo "get ip: $var1" + -+#ifdef CONFIG_WOWLAN -+ if(mmc_host) -+ mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER; -+#endif // CONFIG_WOWLAN -+} diff --git a/patch/u-boot/u-boot-sunxi/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch b/patch/u-boot/u-boot-sunxi/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch new file mode 100644 index 0000000000..bdd63efabd --- /dev/null +++ b/patch/u-boot/u-boot-sunxi/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch @@ -0,0 +1,42 @@ +From 55d3cc28b37000d1a3d7224c0ba4a808274e0b33 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Fri, 27 Oct 2017 17:25:00 +0800 +Subject: [PATCH 20/20] sunxi: call fdt_fixup_ethernet again to set macaddr for + more aliases + +Sometimes some ethernet aliases do not exist in U-Boot FDT but they +exist in the FDT used to boot the system. In this situation +setup_environment is called again in ft_board_setup to generate macaddr +environment variable for them. However now the call to +fdt_fixup_ethernet is moved before the call of ft_board_setup. + +Call fdt_fixup_ethernet again to add MAC addresses for the extra +ethernet aliases. + +Signed-off-by: Icenowy Zheng +--- + board/sunxi/board.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 192cf8ca45..0fe70f47cb 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -751,10 +751,12 @@ int ft_board_setup(void *blob, bd_t *bd) + int __maybe_unused r; + + /* +- * Call setup_environment again in case the boot fdt has +- * ethernet aliases the u-boot copy does not have. ++ * Call setup_environment and fdt_fixup_ethernet again ++ * in case the boot fdt has ethernet aliases the u-boot ++ * copy does not have. + */ + setup_environment(blob); ++ fdt_fixup_ethernet(blob); + + #ifdef CONFIG_VIDEO_DT_SIMPLEFB + r = sunxi_simplefb_setup(blob); +-- +2.13.6 +